Warning fixes:
[gcc.git] / gcc / jump.c
1 /* Optimize jump instructions, for GNU compiler.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This is the jump-optimization pass of the compiler.
23 It is run two or three times: once before cse, sometimes once after cse,
24 and once after reload (before final).
25
26 jump_optimize deletes unreachable code and labels that are not used.
27 It also deletes jumps that jump to the following insn,
28 and simplifies jumps around unconditional jumps and jumps
29 to unconditional jumps.
30
31 Each CODE_LABEL has a count of the times it is used
32 stored in the LABEL_NUSES internal field, and each JUMP_INSN
33 has one label that it refers to stored in the
34 JUMP_LABEL internal field. With this we can detect labels that
35 become unused because of the deletion of all the jumps that
36 formerly used them. The JUMP_LABEL info is sometimes looked
37 at by later passes.
38
39 Optionally, cross-jumping can be done. Currently it is done
40 only the last time (when after reload and before final).
41 In fact, the code for cross-jumping now assumes that register
42 allocation has been done, since it uses `rtx_renumbered_equal_p'.
43
44 Jump optimization is done after cse when cse's constant-propagation
45 causes jumps to become unconditional or to be deleted.
46
47 Unreachable loops are not detected here, because the labels
48 have references and the insns appear reachable from the labels.
49 find_basic_blocks in flow.c finds and deletes such loops.
50
51 The subroutines delete_insn, redirect_jump, and invert_jump are used
52 from other passes as well. */
53
54 #include "config.h"
55 #include "system.h"
56 #include "rtl.h"
57 #include "flags.h"
58 #include "hard-reg-set.h"
59 #include "regs.h"
60 #include "insn-config.h"
61 #include "insn-flags.h"
62 #include "recog.h"
63 #include "expr.h"
64 #include "real.h"
65 #include "except.h"
66 #include "toplev.h"
67
68 /* ??? Eventually must record somehow the labels used by jumps
69 from nested functions. */
70 /* Pre-record the next or previous real insn for each label?
71 No, this pass is very fast anyway. */
72 /* Condense consecutive labels?
73 This would make life analysis faster, maybe. */
74 /* Optimize jump y; x: ... y: jumpif... x?
75 Don't know if it is worth bothering with. */
76 /* Optimize two cases of conditional jump to conditional jump?
77 This can never delete any instruction or make anything dead,
78 or even change what is live at any point.
79 So perhaps let combiner do it. */
80
81 /* Vector indexed by uid.
82 For each CODE_LABEL, index by its uid to get first unconditional jump
83 that jumps to the label.
84 For each JUMP_INSN, index by its uid to get the next unconditional jump
85 that jumps to the same label.
86 Element 0 is the start of a chain of all return insns.
87 (It is safe to use element 0 because insn uid 0 is not used. */
88
89 static rtx *jump_chain;
90
91 /* List of labels referred to from initializers.
92 These can never be deleted. */
93 rtx forced_labels;
94
95 /* Maximum index in jump_chain. */
96
97 static int max_jump_chain;
98
99 /* Set nonzero by jump_optimize if control can fall through
100 to the end of the function. */
101 int can_reach_end;
102
103 /* Indicates whether death notes are significant in cross jump analysis.
104 Normally they are not significant, because of A and B jump to C,
105 and R dies in A, it must die in B. But this might not be true after
106 stack register conversion, and we must compare death notes in that
107 case. */
108
109 static int cross_jump_death_matters = 0;
110
111 static int duplicate_loop_exit_test PROTO((rtx));
112 static void find_cross_jump PROTO((rtx, rtx, int, rtx *, rtx *));
113 static void do_cross_jump PROTO((rtx, rtx, rtx));
114 static int jump_back_p PROTO((rtx, rtx));
115 static int tension_vector_labels PROTO((rtx, int));
116 static void mark_jump_label PROTO((rtx, rtx, int));
117 static void delete_computation PROTO((rtx));
118 static void delete_from_jump_chain PROTO((rtx));
119 static int delete_labelref_insn PROTO((rtx, rtx, int));
120 static void mark_modified_reg PROTO((rtx, rtx));
121 static void redirect_tablejump PROTO((rtx, rtx));
122 #ifndef HAVE_cc0
123 static rtx find_insert_position PROTO((rtx, rtx));
124 #endif
125 \f
126 /* Delete no-op jumps and optimize jumps to jumps
127 and jumps around jumps.
128 Delete unused labels and unreachable code.
129
130 If CROSS_JUMP is 1, detect matching code
131 before a jump and its destination and unify them.
132 If CROSS_JUMP is 2, do cross-jumping, but pay attention to death notes.
133
134 If NOOP_MOVES is nonzero, delete no-op move insns.
135
136 If AFTER_REGSCAN is nonzero, then this jump pass is being run immediately
137 after regscan, and it is safe to use regno_first_uid and regno_last_uid.
138
139 If `optimize' is zero, don't change any code,
140 just determine whether control drops off the end of the function.
141 This case occurs when we have -W and not -O.
142 It works because `delete_insn' checks the value of `optimize'
143 and refrains from actually deleting when that is 0. */
144
145 void
146 jump_optimize (f, cross_jump, noop_moves, after_regscan)
147 rtx f;
148 int cross_jump;
149 int noop_moves;
150 int after_regscan;
151 {
152 register rtx insn, next, note;
153 int changed;
154 int old_max_reg;
155 int first = 1;
156 int max_uid = 0;
157 rtx last_insn;
158
159 cross_jump_death_matters = (cross_jump == 2);
160
161 /* Initialize LABEL_NUSES and JUMP_LABEL fields. Delete any REG_LABEL
162 notes whose labels don't occur in the insn any more. */
163
164 for (insn = f; insn; insn = NEXT_INSN (insn))
165 {
166 if (GET_CODE (insn) == CODE_LABEL)
167 LABEL_NUSES (insn) = (LABEL_PRESERVE_P (insn) != 0);
168 else if (GET_CODE (insn) == JUMP_INSN)
169 JUMP_LABEL (insn) = 0;
170 else if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
171 for (note = REG_NOTES (insn); note; note = next)
172 {
173 next = XEXP (note, 1);
174 if (REG_NOTE_KIND (note) == REG_LABEL
175 && ! reg_mentioned_p (XEXP (note, 0), PATTERN (insn)))
176 remove_note (insn, note);
177 }
178
179 if (INSN_UID (insn) > max_uid)
180 max_uid = INSN_UID (insn);
181 }
182
183 max_uid++;
184
185 /* Delete insns following barriers, up to next label. */
186
187 for (insn = f; insn;)
188 {
189 if (GET_CODE (insn) == BARRIER)
190 {
191 insn = NEXT_INSN (insn);
192 while (insn != 0 && GET_CODE (insn) != CODE_LABEL)
193 {
194 if (GET_CODE (insn) == NOTE
195 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
196 insn = NEXT_INSN (insn);
197 else
198 insn = delete_insn (insn);
199 }
200 /* INSN is now the code_label. */
201 }
202 else
203 insn = NEXT_INSN (insn);
204 }
205
206 /* Leave some extra room for labels and duplicate exit test insns
207 we make. */
208 max_jump_chain = max_uid * 14 / 10;
209 jump_chain = (rtx *) alloca (max_jump_chain * sizeof (rtx));
210 bzero ((char *) jump_chain, max_jump_chain * sizeof (rtx));
211
212 /* Mark the label each jump jumps to.
213 Combine consecutive labels, and count uses of labels.
214
215 For each label, make a chain (using `jump_chain')
216 of all the *unconditional* jumps that jump to it;
217 also make a chain of all returns. */
218
219 for (insn = f; insn; insn = NEXT_INSN (insn))
220 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
221 {
222 mark_jump_label (PATTERN (insn), insn, cross_jump);
223 if (! INSN_DELETED_P (insn) && GET_CODE (insn) == JUMP_INSN)
224 {
225 if (JUMP_LABEL (insn) != 0 && simplejump_p (insn))
226 {
227 jump_chain[INSN_UID (insn)]
228 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
229 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
230 }
231 if (GET_CODE (PATTERN (insn)) == RETURN)
232 {
233 jump_chain[INSN_UID (insn)] = jump_chain[0];
234 jump_chain[0] = insn;
235 }
236 }
237 }
238
239 /* Keep track of labels used from static data;
240 they cannot ever be deleted. */
241
242 for (insn = forced_labels; insn; insn = XEXP (insn, 1))
243 LABEL_NUSES (XEXP (insn, 0))++;
244
245 check_exception_handler_labels ();
246
247 /* Keep track of labels used for marking handlers for exception
248 regions; they cannot usually be deleted. */
249
250 for (insn = exception_handler_labels; insn; insn = XEXP (insn, 1))
251 LABEL_NUSES (XEXP (insn, 0))++;
252
253 exception_optimize ();
254
255 /* Delete all labels already not referenced.
256 Also find the last insn. */
257
258 last_insn = 0;
259 for (insn = f; insn; )
260 {
261 if (GET_CODE (insn) == CODE_LABEL && LABEL_NUSES (insn) == 0)
262 insn = delete_insn (insn);
263 else
264 {
265 last_insn = insn;
266 insn = NEXT_INSN (insn);
267 }
268 }
269
270 if (!optimize)
271 {
272 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
273 If so record that this function can drop off the end. */
274
275 insn = last_insn;
276 {
277 int n_labels = 1;
278 while (insn
279 /* One label can follow the end-note: the return label. */
280 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
281 /* Ordinary insns can follow it if returning a structure. */
282 || GET_CODE (insn) == INSN
283 /* If machine uses explicit RETURN insns, no epilogue,
284 then one of them follows the note. */
285 || (GET_CODE (insn) == JUMP_INSN
286 && GET_CODE (PATTERN (insn)) == RETURN)
287 /* A barrier can follow the return insn. */
288 || GET_CODE (insn) == BARRIER
289 /* Other kinds of notes can follow also. */
290 || (GET_CODE (insn) == NOTE
291 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
292 insn = PREV_INSN (insn);
293 }
294
295 /* Report if control can fall through at the end of the function. */
296 if (insn && GET_CODE (insn) == NOTE
297 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END
298 && ! INSN_DELETED_P (insn))
299 can_reach_end = 1;
300
301 /* Zero the "deleted" flag of all the "deleted" insns. */
302 for (insn = f; insn; insn = NEXT_INSN (insn))
303 INSN_DELETED_P (insn) = 0;
304
305 /* Show that the jump chain is not valid. */
306 jump_chain = 0;
307 return;
308 }
309
310 #ifdef HAVE_return
311 if (HAVE_return)
312 {
313 /* If we fall through to the epilogue, see if we can insert a RETURN insn
314 in front of it. If the machine allows it at this point (we might be
315 after reload for a leaf routine), it will improve optimization for it
316 to be there. */
317 insn = get_last_insn ();
318 while (insn && GET_CODE (insn) == NOTE)
319 insn = PREV_INSN (insn);
320
321 if (insn && GET_CODE (insn) != BARRIER)
322 {
323 emit_jump_insn (gen_return ());
324 emit_barrier ();
325 }
326 }
327 #endif
328
329 if (noop_moves)
330 for (insn = f; insn; )
331 {
332 next = NEXT_INSN (insn);
333
334 if (GET_CODE (insn) == INSN)
335 {
336 register rtx body = PATTERN (insn);
337
338 /* Combine stack_adjusts with following push_insns. */
339 #ifdef PUSH_ROUNDING
340 if (GET_CODE (body) == SET
341 && SET_DEST (body) == stack_pointer_rtx
342 && GET_CODE (SET_SRC (body)) == PLUS
343 && XEXP (SET_SRC (body), 0) == stack_pointer_rtx
344 && GET_CODE (XEXP (SET_SRC (body), 1)) == CONST_INT
345 && INTVAL (XEXP (SET_SRC (body), 1)) > 0)
346 {
347 rtx p;
348 rtx stack_adjust_insn = insn;
349 int stack_adjust_amount = INTVAL (XEXP (SET_SRC (body), 1));
350 int total_pushed = 0;
351 int pushes = 0;
352
353 /* Find all successive push insns. */
354 p = insn;
355 /* Don't convert more than three pushes;
356 that starts adding too many displaced addresses
357 and the whole thing starts becoming a losing
358 proposition. */
359 while (pushes < 3)
360 {
361 rtx pbody, dest;
362 p = next_nonnote_insn (p);
363 if (p == 0 || GET_CODE (p) != INSN)
364 break;
365 pbody = PATTERN (p);
366 if (GET_CODE (pbody) != SET)
367 break;
368 dest = SET_DEST (pbody);
369 /* Allow a no-op move between the adjust and the push. */
370 if (GET_CODE (dest) == REG
371 && GET_CODE (SET_SRC (pbody)) == REG
372 && REGNO (dest) == REGNO (SET_SRC (pbody)))
373 continue;
374 if (! (GET_CODE (dest) == MEM
375 && GET_CODE (XEXP (dest, 0)) == POST_INC
376 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
377 break;
378 pushes++;
379 if (total_pushed + GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)))
380 > stack_adjust_amount)
381 break;
382 total_pushed += GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
383 }
384
385 /* Discard the amount pushed from the stack adjust;
386 maybe eliminate it entirely. */
387 if (total_pushed >= stack_adjust_amount)
388 {
389 delete_computation (stack_adjust_insn);
390 total_pushed = stack_adjust_amount;
391 }
392 else
393 XEXP (SET_SRC (PATTERN (stack_adjust_insn)), 1)
394 = GEN_INT (stack_adjust_amount - total_pushed);
395
396 /* Change the appropriate push insns to ordinary stores. */
397 p = insn;
398 while (total_pushed > 0)
399 {
400 rtx pbody, dest;
401 p = next_nonnote_insn (p);
402 if (GET_CODE (p) != INSN)
403 break;
404 pbody = PATTERN (p);
405 if (GET_CODE (pbody) != SET)
406 break;
407 dest = SET_DEST (pbody);
408 /* Allow a no-op move between the adjust and the push. */
409 if (GET_CODE (dest) == REG
410 && GET_CODE (SET_SRC (pbody)) == REG
411 && REGNO (dest) == REGNO (SET_SRC (pbody)))
412 continue;
413 if (! (GET_CODE (dest) == MEM
414 && GET_CODE (XEXP (dest, 0)) == POST_INC
415 && XEXP (XEXP (dest, 0), 0) == stack_pointer_rtx))
416 break;
417 total_pushed -= GET_MODE_SIZE (GET_MODE (SET_DEST (pbody)));
418 /* If this push doesn't fully fit in the space
419 of the stack adjust that we deleted,
420 make another stack adjust here for what we
421 didn't use up. There should be peepholes
422 to recognize the resulting sequence of insns. */
423 if (total_pushed < 0)
424 {
425 emit_insn_before (gen_add2_insn (stack_pointer_rtx,
426 GEN_INT (- total_pushed)),
427 p);
428 break;
429 }
430 XEXP (dest, 0)
431 = plus_constant (stack_pointer_rtx, total_pushed);
432 }
433 }
434 #endif
435
436 /* Detect and delete no-op move instructions
437 resulting from not allocating a parameter in a register. */
438
439 if (GET_CODE (body) == SET
440 && (SET_DEST (body) == SET_SRC (body)
441 || (GET_CODE (SET_DEST (body)) == MEM
442 && GET_CODE (SET_SRC (body)) == MEM
443 && rtx_equal_p (SET_SRC (body), SET_DEST (body))))
444 && ! (GET_CODE (SET_DEST (body)) == MEM
445 && MEM_VOLATILE_P (SET_DEST (body)))
446 && ! (GET_CODE (SET_SRC (body)) == MEM
447 && MEM_VOLATILE_P (SET_SRC (body))))
448 delete_computation (insn);
449
450 /* Detect and ignore no-op move instructions
451 resulting from smart or fortuitous register allocation. */
452
453 else if (GET_CODE (body) == SET)
454 {
455 int sreg = true_regnum (SET_SRC (body));
456 int dreg = true_regnum (SET_DEST (body));
457
458 if (sreg == dreg && sreg >= 0)
459 delete_insn (insn);
460 else if (sreg >= 0 && dreg >= 0)
461 {
462 rtx trial;
463 rtx tem = find_equiv_reg (NULL_RTX, insn, 0,
464 sreg, NULL_PTR, dreg,
465 GET_MODE (SET_SRC (body)));
466
467 if (tem != 0
468 && GET_MODE (tem) == GET_MODE (SET_DEST (body)))
469 {
470 /* DREG may have been the target of a REG_DEAD note in
471 the insn which makes INSN redundant. If so, reorg
472 would still think it is dead. So search for such a
473 note and delete it if we find it. */
474 if (! find_regno_note (insn, REG_UNUSED, dreg))
475 for (trial = prev_nonnote_insn (insn);
476 trial && GET_CODE (trial) != CODE_LABEL;
477 trial = prev_nonnote_insn (trial))
478 if (find_regno_note (trial, REG_DEAD, dreg))
479 {
480 remove_death (dreg, trial);
481 break;
482 }
483 #ifdef PRESERVE_DEATH_INFO_REGNO_P
484 /* Deleting insn could lose a death-note for SREG
485 so don't do it if final needs accurate
486 death-notes. */
487 if (PRESERVE_DEATH_INFO_REGNO_P (sreg)
488 && (trial = find_regno_note (insn, REG_DEAD, sreg)))
489 {
490 /* Change this into a USE so that we won't emit
491 code for it, but still can keep the note. */
492 PATTERN (insn)
493 = gen_rtx_USE (VOIDmode, XEXP (trial, 0));
494 INSN_CODE (insn) = -1;
495 /* Remove all reg notes but the REG_DEAD one. */
496 REG_NOTES (insn) = trial;
497 XEXP (trial, 1) = NULL_RTX;
498 }
499 else
500 #endif
501 delete_insn (insn);
502 }
503 }
504 else if (dreg >= 0 && CONSTANT_P (SET_SRC (body))
505 && find_equiv_reg (SET_SRC (body), insn, 0, dreg,
506 NULL_PTR, 0,
507 GET_MODE (SET_DEST (body))))
508 {
509 /* This handles the case where we have two consecutive
510 assignments of the same constant to pseudos that didn't
511 get a hard reg. Each SET from the constant will be
512 converted into a SET of the spill register and an
513 output reload will be made following it. This produces
514 two loads of the same constant into the same spill
515 register. */
516
517 rtx in_insn = insn;
518
519 /* Look back for a death note for the first reg.
520 If there is one, it is no longer accurate. */
521 while (in_insn && GET_CODE (in_insn) != CODE_LABEL)
522 {
523 if ((GET_CODE (in_insn) == INSN
524 || GET_CODE (in_insn) == JUMP_INSN)
525 && find_regno_note (in_insn, REG_DEAD, dreg))
526 {
527 remove_death (dreg, in_insn);
528 break;
529 }
530 in_insn = PREV_INSN (in_insn);
531 }
532
533 /* Delete the second load of the value. */
534 delete_insn (insn);
535 }
536 }
537 else if (GET_CODE (body) == PARALLEL)
538 {
539 /* If each part is a set between two identical registers or
540 a USE or CLOBBER, delete the insn. */
541 int i, sreg, dreg;
542 rtx tem;
543
544 for (i = XVECLEN (body, 0) - 1; i >= 0; i--)
545 {
546 tem = XVECEXP (body, 0, i);
547 if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER)
548 continue;
549
550 if (GET_CODE (tem) != SET
551 || (sreg = true_regnum (SET_SRC (tem))) < 0
552 || (dreg = true_regnum (SET_DEST (tem))) < 0
553 || dreg != sreg)
554 break;
555 }
556
557 if (i < 0)
558 delete_insn (insn);
559 }
560 /* Also delete insns to store bit fields if they are no-ops. */
561 /* Not worth the hair to detect this in the big-endian case. */
562 else if (! BYTES_BIG_ENDIAN
563 && GET_CODE (body) == SET
564 && GET_CODE (SET_DEST (body)) == ZERO_EXTRACT
565 && XEXP (SET_DEST (body), 2) == const0_rtx
566 && XEXP (SET_DEST (body), 0) == SET_SRC (body)
567 && ! (GET_CODE (SET_SRC (body)) == MEM
568 && MEM_VOLATILE_P (SET_SRC (body))))
569 delete_insn (insn);
570 }
571 insn = next;
572 }
573
574 /* If we haven't yet gotten to reload and we have just run regscan,
575 delete any insn that sets a register that isn't used elsewhere.
576 This helps some of the optimizations below by having less insns
577 being jumped around. */
578
579 if (! reload_completed && after_regscan)
580 for (insn = f; insn; insn = next)
581 {
582 rtx set = single_set (insn);
583
584 next = NEXT_INSN (insn);
585
586 if (set && GET_CODE (SET_DEST (set)) == REG
587 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER
588 && REGNO_FIRST_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
589 /* We use regno_last_note_uid so as not to delete the setting
590 of a reg that's used in notes. A subsequent optimization
591 might arrange to use that reg for real. */
592 && REGNO_LAST_NOTE_UID (REGNO (SET_DEST (set))) == INSN_UID (insn)
593 && ! side_effects_p (SET_SRC (set))
594 && ! find_reg_note (insn, REG_RETVAL, 0))
595 delete_insn (insn);
596 }
597
598 /* Now iterate optimizing jumps until nothing changes over one pass. */
599 changed = 1;
600 old_max_reg = max_reg_num ();
601 while (changed)
602 {
603 changed = 0;
604
605 for (insn = f; insn; insn = next)
606 {
607 rtx reallabelprev;
608 rtx temp, temp1, temp2, temp3, temp4, temp5, temp6;
609 rtx nlabel;
610 int this_is_simplejump, this_is_condjump, reversep = 0;
611 int this_is_condjump_in_parallel;
612
613 #if 0
614 /* If NOT the first iteration, if this is the last jump pass
615 (just before final), do the special peephole optimizations.
616 Avoiding the first iteration gives ordinary jump opts
617 a chance to work before peephole opts. */
618
619 if (reload_completed && !first && !flag_no_peephole)
620 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN)
621 peephole (insn);
622 #endif
623
624 /* That could have deleted some insns after INSN, so check now
625 what the following insn is. */
626
627 next = NEXT_INSN (insn);
628
629 /* See if this is a NOTE_INSN_LOOP_BEG followed by an unconditional
630 jump. Try to optimize by duplicating the loop exit test if so.
631 This is only safe immediately after regscan, because it uses
632 the values of regno_first_uid and regno_last_uid. */
633 if (after_regscan && GET_CODE (insn) == NOTE
634 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
635 && (temp1 = next_nonnote_insn (insn)) != 0
636 && simplejump_p (temp1))
637 {
638 temp = PREV_INSN (insn);
639 if (duplicate_loop_exit_test (insn))
640 {
641 changed = 1;
642 next = NEXT_INSN (temp);
643 continue;
644 }
645 }
646
647 if (GET_CODE (insn) != JUMP_INSN)
648 continue;
649
650 this_is_simplejump = simplejump_p (insn);
651 this_is_condjump = condjump_p (insn);
652 this_is_condjump_in_parallel = condjump_in_parallel_p (insn);
653
654 /* Tension the labels in dispatch tables. */
655
656 if (GET_CODE (PATTERN (insn)) == ADDR_VEC)
657 changed |= tension_vector_labels (PATTERN (insn), 0);
658 if (GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
659 changed |= tension_vector_labels (PATTERN (insn), 1);
660
661 /* If a dispatch table always goes to the same place,
662 get rid of it and replace the insn that uses it. */
663
664 if (GET_CODE (PATTERN (insn)) == ADDR_VEC
665 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
666 {
667 int i;
668 rtx pat = PATTERN (insn);
669 int diff_vec_p = GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC;
670 int len = XVECLEN (pat, diff_vec_p);
671 rtx dispatch = prev_real_insn (insn);
672
673 for (i = 0; i < len; i++)
674 if (XEXP (XVECEXP (pat, diff_vec_p, i), 0)
675 != XEXP (XVECEXP (pat, diff_vec_p, 0), 0))
676 break;
677 if (i == len
678 && dispatch != 0
679 && GET_CODE (dispatch) == JUMP_INSN
680 && JUMP_LABEL (dispatch) != 0
681 /* Don't mess with a casesi insn. */
682 && !(GET_CODE (PATTERN (dispatch)) == SET
683 && (GET_CODE (SET_SRC (PATTERN (dispatch)))
684 == IF_THEN_ELSE))
685 && next_real_insn (JUMP_LABEL (dispatch)) == insn)
686 {
687 redirect_tablejump (dispatch,
688 XEXP (XVECEXP (pat, diff_vec_p, 0), 0));
689 changed = 1;
690 }
691 }
692
693 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
694
695 /* If a jump references the end of the function, try to turn
696 it into a RETURN insn, possibly a conditional one. */
697 if (JUMP_LABEL (insn)
698 && (next_active_insn (JUMP_LABEL (insn)) == 0
699 || GET_CODE (PATTERN (next_active_insn (JUMP_LABEL (insn))))
700 == RETURN))
701 changed |= redirect_jump (insn, NULL_RTX);
702
703 /* Detect jump to following insn. */
704 if (reallabelprev == insn && condjump_p (insn))
705 {
706 next = next_real_insn (JUMP_LABEL (insn));
707 delete_jump (insn);
708 changed = 1;
709 continue;
710 }
711
712 /* If we have an unconditional jump preceded by a USE, try to put
713 the USE before the target and jump there. This simplifies many
714 of the optimizations below since we don't have to worry about
715 dealing with these USE insns. We only do this if the label
716 being branch to already has the identical USE or if code
717 never falls through to that label. */
718
719 if (this_is_simplejump
720 && (temp = prev_nonnote_insn (insn)) != 0
721 && GET_CODE (temp) == INSN && GET_CODE (PATTERN (temp)) == USE
722 && (temp1 = prev_nonnote_insn (JUMP_LABEL (insn))) != 0
723 && (GET_CODE (temp1) == BARRIER
724 || (GET_CODE (temp1) == INSN
725 && rtx_equal_p (PATTERN (temp), PATTERN (temp1))))
726 /* Don't do this optimization if we have a loop containing only
727 the USE instruction, and the loop start label has a usage
728 count of 1. This is because we will redo this optimization
729 everytime through the outer loop, and jump opt will never
730 exit. */
731 && ! ((temp2 = prev_nonnote_insn (temp)) != 0
732 && temp2 == JUMP_LABEL (insn)
733 && LABEL_NUSES (temp2) == 1))
734 {
735 if (GET_CODE (temp1) == BARRIER)
736 {
737 emit_insn_after (PATTERN (temp), temp1);
738 temp1 = NEXT_INSN (temp1);
739 }
740
741 delete_insn (temp);
742 redirect_jump (insn, get_label_before (temp1));
743 reallabelprev = prev_real_insn (temp1);
744 changed = 1;
745 }
746
747 /* Simplify if (...) x = a; else x = b; by converting it
748 to x = b; if (...) x = a;
749 if B is sufficiently simple, the test doesn't involve X,
750 and nothing in the test modifies B or X.
751
752 If we have small register classes, we also can't do this if X
753 is a hard register.
754
755 If the "x = b;" insn has any REG_NOTES, we don't do this because
756 of the possibility that we are running after CSE and there is a
757 REG_EQUAL note that is only valid if the branch has already been
758 taken. If we move the insn with the REG_EQUAL note, we may
759 fold the comparison to always be false in a later CSE pass.
760 (We could also delete the REG_NOTES when moving the insn, but it
761 seems simpler to not move it.) An exception is that we can move
762 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
763 value is the same as "b".
764
765 INSN is the branch over the `else' part.
766
767 We set:
768
769 TEMP to the jump insn preceding "x = a;"
770 TEMP1 to X
771 TEMP2 to the insn that sets "x = b;"
772 TEMP3 to the insn that sets "x = a;"
773 TEMP4 to the set of "x = b"; */
774
775 if (this_is_simplejump
776 && (temp3 = prev_active_insn (insn)) != 0
777 && GET_CODE (temp3) == INSN
778 && (temp4 = single_set (temp3)) != 0
779 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
780 && (! SMALL_REGISTER_CLASSES
781 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
782 && (temp2 = next_active_insn (insn)) != 0
783 && GET_CODE (temp2) == INSN
784 && (temp4 = single_set (temp2)) != 0
785 && rtx_equal_p (SET_DEST (temp4), temp1)
786 && ! side_effects_p (SET_SRC (temp4))
787 && ! may_trap_p (SET_SRC (temp4))
788 && (REG_NOTES (temp2) == 0
789 || ((REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUAL
790 || REG_NOTE_KIND (REG_NOTES (temp2)) == REG_EQUIV)
791 && XEXP (REG_NOTES (temp2), 1) == 0
792 && rtx_equal_p (XEXP (REG_NOTES (temp2), 0),
793 SET_SRC (temp4))))
794 && (temp = prev_active_insn (temp3)) != 0
795 && condjump_p (temp) && ! simplejump_p (temp)
796 /* TEMP must skip over the "x = a;" insn */
797 && prev_real_insn (JUMP_LABEL (temp)) == insn
798 && no_labels_between_p (insn, JUMP_LABEL (temp))
799 /* There must be no other entries to the "x = b;" insn. */
800 && no_labels_between_p (JUMP_LABEL (temp), temp2)
801 /* INSN must either branch to the insn after TEMP2 or the insn
802 after TEMP2 must branch to the same place as INSN. */
803 && (reallabelprev == temp2
804 || ((temp5 = next_active_insn (temp2)) != 0
805 && simplejump_p (temp5)
806 && JUMP_LABEL (temp5) == JUMP_LABEL (insn))))
807 {
808 /* The test expression, X, may be a complicated test with
809 multiple branches. See if we can find all the uses of
810 the label that TEMP branches to without hitting a CALL_INSN
811 or a jump to somewhere else. */
812 rtx target = JUMP_LABEL (temp);
813 int nuses = LABEL_NUSES (target);
814 rtx p;
815 #ifdef HAVE_cc0
816 rtx q;
817 #endif
818
819 /* Set P to the first jump insn that goes around "x = a;". */
820 for (p = temp; nuses && p; p = prev_nonnote_insn (p))
821 {
822 if (GET_CODE (p) == JUMP_INSN)
823 {
824 if (condjump_p (p) && ! simplejump_p (p)
825 && JUMP_LABEL (p) == target)
826 {
827 nuses--;
828 if (nuses == 0)
829 break;
830 }
831 else
832 break;
833 }
834 else if (GET_CODE (p) == CALL_INSN)
835 break;
836 }
837
838 #ifdef HAVE_cc0
839 /* We cannot insert anything between a set of cc and its use
840 so if P uses cc0, we must back up to the previous insn. */
841 q = prev_nonnote_insn (p);
842 if (q && GET_RTX_CLASS (GET_CODE (q)) == 'i'
843 && sets_cc0_p (PATTERN (q)))
844 p = q;
845 #endif
846
847 if (p)
848 p = PREV_INSN (p);
849
850 /* If we found all the uses and there was no data conflict, we
851 can move the assignment unless we can branch into the middle
852 from somewhere. */
853 if (nuses == 0 && p
854 && no_labels_between_p (p, insn)
855 && ! reg_referenced_between_p (temp1, p, NEXT_INSN (temp3))
856 && ! reg_set_between_p (temp1, p, temp3)
857 && (GET_CODE (SET_SRC (temp4)) == CONST_INT
858 || ! modified_between_p (SET_SRC (temp4), p, temp2))
859 /* Verify that registers used by the jump are not clobbered
860 by the instruction being moved. */
861 && ! modified_between_p (PATTERN (temp), temp2,
862 NEXT_INSN (temp2)))
863 {
864 emit_insn_after_with_line_notes (PATTERN (temp2), p, temp2);
865 delete_insn (temp2);
866
867 /* Set NEXT to an insn that we know won't go away. */
868 next = next_active_insn (insn);
869
870 /* Delete the jump around the set. Note that we must do
871 this before we redirect the test jumps so that it won't
872 delete the code immediately following the assignment
873 we moved (which might be a jump). */
874
875 delete_insn (insn);
876
877 /* We either have two consecutive labels or a jump to
878 a jump, so adjust all the JUMP_INSNs to branch to where
879 INSN branches to. */
880 for (p = NEXT_INSN (p); p != next; p = NEXT_INSN (p))
881 if (GET_CODE (p) == JUMP_INSN)
882 redirect_jump (p, target);
883
884 changed = 1;
885 continue;
886 }
887 }
888
889 /* Simplify if (...) { x = a; goto l; } x = b; by converting it
890 to x = a; if (...) goto l; x = b;
891 if A is sufficiently simple, the test doesn't involve X,
892 and nothing in the test modifies A or X.
893
894 If we have small register classes, we also can't do this if X
895 is a hard register.
896
897 If the "x = a;" insn has any REG_NOTES, we don't do this because
898 of the possibility that we are running after CSE and there is a
899 REG_EQUAL note that is only valid if the branch has already been
900 taken. If we move the insn with the REG_EQUAL note, we may
901 fold the comparison to always be false in a later CSE pass.
902 (We could also delete the REG_NOTES when moving the insn, but it
903 seems simpler to not move it.) An exception is that we can move
904 the insn if the only note is a REG_EQUAL or REG_EQUIV whose
905 value is the same as "a".
906
907 INSN is the goto.
908
909 We set:
910
911 TEMP to the jump insn preceding "x = a;"
912 TEMP1 to X
913 TEMP2 to the insn that sets "x = b;"
914 TEMP3 to the insn that sets "x = a;"
915 TEMP4 to the set of "x = a"; */
916
917 if (this_is_simplejump
918 && (temp2 = next_active_insn (insn)) != 0
919 && GET_CODE (temp2) == INSN
920 && (temp4 = single_set (temp2)) != 0
921 && GET_CODE (temp1 = SET_DEST (temp4)) == REG
922 && (! SMALL_REGISTER_CLASSES
923 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
924 && (temp3 = prev_active_insn (insn)) != 0
925 && GET_CODE (temp3) == INSN
926 && (temp4 = single_set (temp3)) != 0
927 && rtx_equal_p (SET_DEST (temp4), temp1)
928 && ! side_effects_p (SET_SRC (temp4))
929 && ! may_trap_p (SET_SRC (temp4))
930 && (REG_NOTES (temp3) == 0
931 || ((REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUAL
932 || REG_NOTE_KIND (REG_NOTES (temp3)) == REG_EQUIV)
933 && XEXP (REG_NOTES (temp3), 1) == 0
934 && rtx_equal_p (XEXP (REG_NOTES (temp3), 0),
935 SET_SRC (temp4))))
936 && (temp = prev_active_insn (temp3)) != 0
937 && condjump_p (temp) && ! simplejump_p (temp)
938 /* TEMP must skip over the "x = a;" insn */
939 && prev_real_insn (JUMP_LABEL (temp)) == insn
940 && no_labels_between_p (temp, insn))
941 {
942 rtx prev_label = JUMP_LABEL (temp);
943 rtx insert_after = prev_nonnote_insn (temp);
944
945 #ifdef HAVE_cc0
946 /* We cannot insert anything between a set of cc and its use. */
947 if (insert_after && GET_RTX_CLASS (GET_CODE (insert_after)) == 'i'
948 && sets_cc0_p (PATTERN (insert_after)))
949 insert_after = prev_nonnote_insn (insert_after);
950 #endif
951 ++LABEL_NUSES (prev_label);
952
953 if (insert_after
954 && no_labels_between_p (insert_after, temp)
955 && ! reg_referenced_between_p (temp1, insert_after, temp3)
956 && ! reg_referenced_between_p (temp1, temp3,
957 NEXT_INSN (temp2))
958 && ! reg_set_between_p (temp1, insert_after, temp)
959 && ! modified_between_p (SET_SRC (temp4), insert_after, temp)
960 /* Verify that registers used by the jump are not clobbered
961 by the instruction being moved. */
962 && ! modified_between_p (PATTERN (temp), temp3,
963 NEXT_INSN (temp3))
964 && invert_jump (temp, JUMP_LABEL (insn)))
965 {
966 emit_insn_after_with_line_notes (PATTERN (temp3),
967 insert_after, temp3);
968 delete_insn (temp3);
969 delete_insn (insn);
970 /* Set NEXT to an insn that we know won't go away. */
971 next = temp2;
972 changed = 1;
973 }
974 if (prev_label && --LABEL_NUSES (prev_label) == 0)
975 delete_insn (prev_label);
976 if (changed)
977 continue;
978 }
979
980 #ifndef HAVE_cc0
981 /* If we have if (...) x = exp; and branches are expensive,
982 EXP is a single insn, does not have any side effects, cannot
983 trap, and is not too costly, convert this to
984 t = exp; if (...) x = t;
985
986 Don't do this when we have CC0 because it is unlikely to help
987 and we'd need to worry about where to place the new insn and
988 the potential for conflicts. We also can't do this when we have
989 notes on the insn for the same reason as above.
990
991 We set:
992
993 TEMP to the "x = exp;" insn.
994 TEMP1 to the single set in the "x = exp;" insn.
995 TEMP2 to "x". */
996
997 if (! reload_completed
998 && this_is_condjump && ! this_is_simplejump
999 && BRANCH_COST >= 3
1000 && (temp = next_nonnote_insn (insn)) != 0
1001 && GET_CODE (temp) == INSN
1002 && REG_NOTES (temp) == 0
1003 && (reallabelprev == temp
1004 || ((temp2 = next_active_insn (temp)) != 0
1005 && simplejump_p (temp2)
1006 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1007 && (temp1 = single_set (temp)) != 0
1008 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1009 && (! SMALL_REGISTER_CLASSES
1010 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1011 && GET_CODE (SET_SRC (temp1)) != REG
1012 && GET_CODE (SET_SRC (temp1)) != SUBREG
1013 && GET_CODE (SET_SRC (temp1)) != CONST_INT
1014 && ! side_effects_p (SET_SRC (temp1))
1015 && ! may_trap_p (SET_SRC (temp1))
1016 && rtx_cost (SET_SRC (temp1), SET) < 10)
1017 {
1018 rtx new = gen_reg_rtx (GET_MODE (temp2));
1019
1020 if ((temp3 = find_insert_position (insn, temp))
1021 && validate_change (temp, &SET_DEST (temp1), new, 0))
1022 {
1023 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1024 emit_insn_after_with_line_notes (PATTERN (temp),
1025 PREV_INSN (temp3), temp);
1026 delete_insn (temp);
1027 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1028
1029 if (after_regscan)
1030 {
1031 reg_scan_update (temp3, NEXT_INSN (next), old_max_reg);
1032 old_max_reg = max_reg_num ();
1033 }
1034 }
1035 }
1036
1037 /* Similarly, if it takes two insns to compute EXP but they
1038 have the same destination. Here TEMP3 will be the second
1039 insn and TEMP4 the SET from that insn. */
1040
1041 if (! reload_completed
1042 && this_is_condjump && ! this_is_simplejump
1043 && BRANCH_COST >= 4
1044 && (temp = next_nonnote_insn (insn)) != 0
1045 && GET_CODE (temp) == INSN
1046 && REG_NOTES (temp) == 0
1047 && (temp3 = next_nonnote_insn (temp)) != 0
1048 && GET_CODE (temp3) == INSN
1049 && REG_NOTES (temp3) == 0
1050 && (reallabelprev == temp3
1051 || ((temp2 = next_active_insn (temp3)) != 0
1052 && simplejump_p (temp2)
1053 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1054 && (temp1 = single_set (temp)) != 0
1055 && (temp2 = SET_DEST (temp1), GET_CODE (temp2) == REG)
1056 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1057 && (! SMALL_REGISTER_CLASSES
1058 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1059 && ! side_effects_p (SET_SRC (temp1))
1060 && ! may_trap_p (SET_SRC (temp1))
1061 && rtx_cost (SET_SRC (temp1), SET) < 10
1062 && (temp4 = single_set (temp3)) != 0
1063 && rtx_equal_p (SET_DEST (temp4), temp2)
1064 && ! side_effects_p (SET_SRC (temp4))
1065 && ! may_trap_p (SET_SRC (temp4))
1066 && rtx_cost (SET_SRC (temp4), SET) < 10)
1067 {
1068 rtx new = gen_reg_rtx (GET_MODE (temp2));
1069
1070 if ((temp5 = find_insert_position (insn, temp))
1071 && (temp6 = find_insert_position (insn, temp3))
1072 && validate_change (temp, &SET_DEST (temp1), new, 0))
1073 {
1074 /* Use the earliest of temp5 and temp6. */
1075 if (temp5 != insn)
1076 temp6 = temp5;
1077 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1078 emit_insn_after_with_line_notes (PATTERN (temp),
1079 PREV_INSN (temp6), temp);
1080 emit_insn_after_with_line_notes
1081 (replace_rtx (PATTERN (temp3), temp2, new),
1082 PREV_INSN (temp6), temp3);
1083 delete_insn (temp);
1084 delete_insn (temp3);
1085 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1086
1087 if (after_regscan)
1088 {
1089 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1090 old_max_reg = max_reg_num ();
1091 }
1092 }
1093 }
1094
1095 /* Finally, handle the case where two insns are used to
1096 compute EXP but a temporary register is used. Here we must
1097 ensure that the temporary register is not used anywhere else. */
1098
1099 if (! reload_completed
1100 && after_regscan
1101 && this_is_condjump && ! this_is_simplejump
1102 && BRANCH_COST >= 4
1103 && (temp = next_nonnote_insn (insn)) != 0
1104 && GET_CODE (temp) == INSN
1105 && REG_NOTES (temp) == 0
1106 && (temp3 = next_nonnote_insn (temp)) != 0
1107 && GET_CODE (temp3) == INSN
1108 && REG_NOTES (temp3) == 0
1109 && (reallabelprev == temp3
1110 || ((temp2 = next_active_insn (temp3)) != 0
1111 && simplejump_p (temp2)
1112 && JUMP_LABEL (temp2) == JUMP_LABEL (insn)))
1113 && (temp1 = single_set (temp)) != 0
1114 && (temp5 = SET_DEST (temp1),
1115 (GET_CODE (temp5) == REG
1116 || (GET_CODE (temp5) == SUBREG
1117 && (temp5 = SUBREG_REG (temp5),
1118 GET_CODE (temp5) == REG))))
1119 && REGNO (temp5) >= FIRST_PSEUDO_REGISTER
1120 && REGNO_FIRST_UID (REGNO (temp5)) == INSN_UID (temp)
1121 && REGNO_LAST_UID (REGNO (temp5)) == INSN_UID (temp3)
1122 && ! side_effects_p (SET_SRC (temp1))
1123 && ! may_trap_p (SET_SRC (temp1))
1124 && rtx_cost (SET_SRC (temp1), SET) < 10
1125 && (temp4 = single_set (temp3)) != 0
1126 && (temp2 = SET_DEST (temp4), GET_CODE (temp2) == REG)
1127 && GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT
1128 && (! SMALL_REGISTER_CLASSES
1129 || REGNO (temp2) >= FIRST_PSEUDO_REGISTER)
1130 && rtx_equal_p (SET_DEST (temp4), temp2)
1131 && ! side_effects_p (SET_SRC (temp4))
1132 && ! may_trap_p (SET_SRC (temp4))
1133 && rtx_cost (SET_SRC (temp4), SET) < 10)
1134 {
1135 rtx new = gen_reg_rtx (GET_MODE (temp2));
1136
1137 if ((temp5 = find_insert_position (insn, temp))
1138 && (temp6 = find_insert_position (insn, temp3))
1139 && validate_change (temp3, &SET_DEST (temp4), new, 0))
1140 {
1141 /* Use the earliest of temp5 and temp6. */
1142 if (temp5 != insn)
1143 temp6 = temp5;
1144 next = emit_insn_after (gen_move_insn (temp2, new), insn);
1145 emit_insn_after_with_line_notes (PATTERN (temp),
1146 PREV_INSN (temp6), temp);
1147 emit_insn_after_with_line_notes (PATTERN (temp3),
1148 PREV_INSN (temp6), temp3);
1149 delete_insn (temp);
1150 delete_insn (temp3);
1151 reallabelprev = prev_active_insn (JUMP_LABEL (insn));
1152
1153 if (after_regscan)
1154 {
1155 reg_scan_update (temp6, NEXT_INSN (next), old_max_reg);
1156 old_max_reg = max_reg_num ();
1157 }
1158 }
1159 }
1160 #endif /* HAVE_cc0 */
1161
1162 /* Try to use a conditional move (if the target has them), or a
1163 store-flag insn. The general case is:
1164
1165 1) x = a; if (...) x = b; and
1166 2) if (...) x = b;
1167
1168 If the jump would be faster, the machine should not have defined
1169 the movcc or scc insns!. These cases are often made by the
1170 previous optimization.
1171
1172 The second case is treated as x = x; if (...) x = b;.
1173
1174 INSN here is the jump around the store. We set:
1175
1176 TEMP to the "x = b;" insn.
1177 TEMP1 to X.
1178 TEMP2 to B.
1179 TEMP3 to A (X in the second case).
1180 TEMP4 to the condition being tested.
1181 TEMP5 to the earliest insn used to find the condition. */
1182
1183 if (/* We can't do this after reload has completed. */
1184 ! reload_completed
1185 && this_is_condjump && ! this_is_simplejump
1186 /* Set TEMP to the "x = b;" insn. */
1187 && (temp = next_nonnote_insn (insn)) != 0
1188 && GET_CODE (temp) == INSN
1189 && GET_CODE (PATTERN (temp)) == SET
1190 && GET_CODE (temp1 = SET_DEST (PATTERN (temp))) == REG
1191 && (! SMALL_REGISTER_CLASSES
1192 || REGNO (temp1) >= FIRST_PSEUDO_REGISTER)
1193 && ! side_effects_p (temp2 = SET_SRC (PATTERN (temp)))
1194 && ! may_trap_p (temp2)
1195 /* Allow either form, but prefer the former if both apply.
1196 There is no point in using the old value of TEMP1 if
1197 it is a register, since cse will alias them. It can
1198 lose if the old value were a hard register since CSE
1199 won't replace hard registers. Avoid using TEMP3 if
1200 small register classes and it is a hard register. */
1201 && (((temp3 = reg_set_last (temp1, insn)) != 0
1202 && ! (SMALL_REGISTER_CLASSES && GET_CODE (temp3) == REG
1203 && REGNO (temp3) < FIRST_PSEUDO_REGISTER))
1204 /* Make the latter case look like x = x; if (...) x = b; */
1205 || (temp3 = temp1, 1))
1206 /* INSN must either branch to the insn after TEMP or the insn
1207 after TEMP must branch to the same place as INSN. */
1208 && (reallabelprev == temp
1209 || ((temp4 = next_active_insn (temp)) != 0
1210 && simplejump_p (temp4)
1211 && JUMP_LABEL (temp4) == JUMP_LABEL (insn)))
1212 && (temp4 = get_condition (insn, &temp5)) != 0
1213 /* We must be comparing objects whose modes imply the size.
1214 We could handle BLKmode if (1) emit_store_flag could
1215 and (2) we could find the size reliably. */
1216 && GET_MODE (XEXP (temp4, 0)) != BLKmode
1217 /* Even if branches are cheap, the store_flag optimization
1218 can win when the operation to be performed can be
1219 expressed directly. */
1220 #ifdef HAVE_cc0
1221 /* If the previous insn sets CC0 and something else, we can't
1222 do this since we are going to delete that insn. */
1223
1224 && ! ((temp6 = prev_nonnote_insn (insn)) != 0
1225 && GET_CODE (temp6) == INSN
1226 && (sets_cc0_p (PATTERN (temp6)) == -1
1227 || (sets_cc0_p (PATTERN (temp6)) == 1
1228 && FIND_REG_INC_NOTE (temp6, NULL_RTX))))
1229 #endif
1230 )
1231 {
1232 #ifdef HAVE_conditional_move
1233 /* First try a conditional move. */
1234 {
1235 enum rtx_code code = GET_CODE (temp4);
1236 rtx var = temp1;
1237 rtx cond0, cond1, aval, bval;
1238 rtx target;
1239
1240 /* Copy the compared variables into cond0 and cond1, so that
1241 any side effects performed in or after the old comparison,
1242 will not affect our compare which will come later. */
1243 /* ??? Is it possible to just use the comparison in the jump
1244 insn? After all, we're going to delete it. We'd have
1245 to modify emit_conditional_move to take a comparison rtx
1246 instead or write a new function. */
1247 cond0 = gen_reg_rtx (GET_MODE (XEXP (temp4, 0)));
1248 /* We want the target to be able to simplify comparisons with
1249 zero (and maybe other constants as well), so don't create
1250 pseudos for them. There's no need to either. */
1251 if (GET_CODE (XEXP (temp4, 1)) == CONST_INT
1252 || GET_CODE (XEXP (temp4, 1)) == CONST_DOUBLE)
1253 cond1 = XEXP (temp4, 1);
1254 else
1255 cond1 = gen_reg_rtx (GET_MODE (XEXP (temp4, 1)));
1256
1257 aval = temp3;
1258 bval = temp2;
1259
1260 start_sequence ();
1261 target = emit_conditional_move (var, code,
1262 cond0, cond1, VOIDmode,
1263 aval, bval, GET_MODE (var),
1264 (code == LTU || code == GEU
1265 || code == LEU || code == GTU));
1266
1267 if (target)
1268 {
1269 rtx seq1,seq2,last;
1270
1271 /* Save the conditional move sequence but don't emit it
1272 yet. On some machines, like the alpha, it is possible
1273 that temp5 == insn, so next generate the sequence that
1274 saves the compared values and then emit both
1275 sequences ensuring seq1 occurs before seq2. */
1276 seq2 = get_insns ();
1277 end_sequence ();
1278
1279 /* Now that we can't fail, generate the copy insns that
1280 preserve the compared values. */
1281 start_sequence ();
1282 emit_move_insn (cond0, XEXP (temp4, 0));
1283 if (cond1 != XEXP (temp4, 1))
1284 emit_move_insn (cond1, XEXP (temp4, 1));
1285 seq1 = get_insns ();
1286 end_sequence ();
1287
1288 emit_insns_before (seq1, temp5);
1289 /* Insert conditional move after insn, to be sure that
1290 the jump and a possible compare won't be separated */
1291 last = emit_insns_after (seq2, insn);
1292
1293 /* ??? We can also delete the insn that sets X to A.
1294 Flow will do it too though. */
1295 delete_insn (temp);
1296 next = NEXT_INSN (insn);
1297 delete_jump (insn);
1298
1299 if (after_regscan)
1300 {
1301 reg_scan_update (seq1, NEXT_INSN (last), old_max_reg);
1302 old_max_reg = max_reg_num ();
1303 }
1304
1305 changed = 1;
1306 continue;
1307 }
1308 else
1309 end_sequence ();
1310 }
1311 #endif
1312
1313 /* That didn't work, try a store-flag insn.
1314
1315 We further divide the cases into:
1316
1317 1) x = a; if (...) x = b; and either A or B is zero,
1318 2) if (...) x = 0; and jumps are expensive,
1319 3) x = a; if (...) x = b; and A and B are constants where all
1320 the set bits in A are also set in B and jumps are expensive,
1321 4) x = a; if (...) x = b; and A and B non-zero, and jumps are
1322 more expensive, and
1323 5) if (...) x = b; if jumps are even more expensive. */
1324
1325 if (GET_MODE_CLASS (GET_MODE (temp1)) == MODE_INT
1326 && ((GET_CODE (temp3) == CONST_INT)
1327 /* Make the latter case look like
1328 x = x; if (...) x = 0; */
1329 || (temp3 = temp1,
1330 ((BRANCH_COST >= 2
1331 && temp2 == const0_rtx)
1332 || BRANCH_COST >= 3)))
1333 /* If B is zero, OK; if A is zero, can only do (1) if we
1334 can reverse the condition. See if (3) applies possibly
1335 by reversing the condition. Prefer reversing to (4) when
1336 branches are very expensive. */
1337 && (((BRANCH_COST >= 2
1338 || STORE_FLAG_VALUE == -1
1339 || (STORE_FLAG_VALUE == 1
1340 /* Check that the mask is a power of two,
1341 so that it can probably be generated
1342 with a shift. */
1343 && GET_CODE (temp3) == CONST_INT
1344 && exact_log2 (INTVAL (temp3)) >= 0))
1345 && (reversep = 0, temp2 == const0_rtx))
1346 || ((BRANCH_COST >= 2
1347 || STORE_FLAG_VALUE == -1
1348 || (STORE_FLAG_VALUE == 1
1349 && GET_CODE (temp2) == CONST_INT
1350 && exact_log2 (INTVAL (temp2)) >= 0))
1351 && temp3 == const0_rtx
1352 && (reversep = can_reverse_comparison_p (temp4, insn)))
1353 || (BRANCH_COST >= 2
1354 && GET_CODE (temp2) == CONST_INT
1355 && GET_CODE (temp3) == CONST_INT
1356 && ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp2)
1357 || ((INTVAL (temp2) & INTVAL (temp3)) == INTVAL (temp3)
1358 && (reversep = can_reverse_comparison_p (temp4,
1359 insn)))))
1360 || BRANCH_COST >= 3)
1361 )
1362 {
1363 enum rtx_code code = GET_CODE (temp4);
1364 rtx uval, cval, var = temp1;
1365 int normalizep;
1366 rtx target;
1367
1368 /* If necessary, reverse the condition. */
1369 if (reversep)
1370 code = reverse_condition (code), uval = temp2, cval = temp3;
1371 else
1372 uval = temp3, cval = temp2;
1373
1374 /* If CVAL is non-zero, normalize to -1. Otherwise, if UVAL
1375 is the constant 1, it is best to just compute the result
1376 directly. If UVAL is constant and STORE_FLAG_VALUE
1377 includes all of its bits, it is best to compute the flag
1378 value unnormalized and `and' it with UVAL. Otherwise,
1379 normalize to -1 and `and' with UVAL. */
1380 normalizep = (cval != const0_rtx ? -1
1381 : (uval == const1_rtx ? 1
1382 : (GET_CODE (uval) == CONST_INT
1383 && (INTVAL (uval) & ~STORE_FLAG_VALUE) == 0)
1384 ? 0 : -1));
1385
1386 /* We will be putting the store-flag insn immediately in
1387 front of the comparison that was originally being done,
1388 so we know all the variables in TEMP4 will be valid.
1389 However, this might be in front of the assignment of
1390 A to VAR. If it is, it would clobber the store-flag
1391 we will be emitting.
1392
1393 Therefore, emit into a temporary which will be copied to
1394 VAR immediately after TEMP. */
1395
1396 start_sequence ();
1397 target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code,
1398 XEXP (temp4, 0), XEXP (temp4, 1),
1399 VOIDmode,
1400 (code == LTU || code == LEU
1401 || code == GEU || code == GTU),
1402 normalizep);
1403 if (target)
1404 {
1405 rtx seq;
1406 rtx before = insn;
1407
1408 seq = get_insns ();
1409 end_sequence ();
1410
1411 /* Put the store-flag insns in front of the first insn
1412 used to compute the condition to ensure that we
1413 use the same values of them as the current
1414 comparison. However, the remainder of the insns we
1415 generate will be placed directly in front of the
1416 jump insn, in case any of the pseudos we use
1417 are modified earlier. */
1418
1419 emit_insns_before (seq, temp5);
1420
1421 start_sequence ();
1422
1423 /* Both CVAL and UVAL are non-zero. */
1424 if (cval != const0_rtx && uval != const0_rtx)
1425 {
1426 rtx tem1, tem2;
1427
1428 tem1 = expand_and (uval, target, NULL_RTX);
1429 if (GET_CODE (cval) == CONST_INT
1430 && GET_CODE (uval) == CONST_INT
1431 && (INTVAL (cval) & INTVAL (uval)) == INTVAL (cval))
1432 tem2 = cval;
1433 else
1434 {
1435 tem2 = expand_unop (GET_MODE (var), one_cmpl_optab,
1436 target, NULL_RTX, 0);
1437 tem2 = expand_and (cval, tem2,
1438 (GET_CODE (tem2) == REG
1439 ? tem2 : 0));
1440 }
1441
1442 /* If we usually make new pseudos, do so here. This
1443 turns out to help machines that have conditional
1444 move insns. */
1445 /* ??? Conditional moves have already been handled.
1446 This may be obsolete. */
1447
1448 if (flag_expensive_optimizations)
1449 target = 0;
1450
1451 target = expand_binop (GET_MODE (var), ior_optab,
1452 tem1, tem2, target,
1453 1, OPTAB_WIDEN);
1454 }
1455 else if (normalizep != 1)
1456 {
1457 /* We know that either CVAL or UVAL is zero. If
1458 UVAL is zero, negate TARGET and `and' with CVAL.
1459 Otherwise, `and' with UVAL. */
1460 if (uval == const0_rtx)
1461 {
1462 target = expand_unop (GET_MODE (var), one_cmpl_optab,
1463 target, NULL_RTX, 0);
1464 uval = cval;
1465 }
1466
1467 target = expand_and (uval, target,
1468 (GET_CODE (target) == REG
1469 && ! preserve_subexpressions_p ()
1470 ? target : NULL_RTX));
1471 }
1472
1473 emit_move_insn (var, target);
1474 seq = get_insns ();
1475 end_sequence ();
1476 #ifdef HAVE_cc0
1477 /* If INSN uses CC0, we must not separate it from the
1478 insn that sets cc0. */
1479 if (reg_mentioned_p (cc0_rtx, PATTERN (before)))
1480 before = prev_nonnote_insn (before);
1481 #endif
1482 emit_insns_before (seq, before);
1483
1484 delete_insn (temp);
1485 next = NEXT_INSN (insn);
1486 delete_jump (insn);
1487
1488 if (after_regscan)
1489 {
1490 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1491 old_max_reg = max_reg_num ();
1492 }
1493
1494 changed = 1;
1495 continue;
1496 }
1497 else
1498 end_sequence ();
1499 }
1500 }
1501
1502 /* If branches are expensive, convert
1503 if (foo) bar++; to bar += (foo != 0);
1504 and similarly for "bar--;"
1505
1506 INSN is the conditional branch around the arithmetic. We set:
1507
1508 TEMP is the arithmetic insn.
1509 TEMP1 is the SET doing the arithmetic.
1510 TEMP2 is the operand being incremented or decremented.
1511 TEMP3 to the condition being tested.
1512 TEMP4 to the earliest insn used to find the condition. */
1513
1514 if ((BRANCH_COST >= 2
1515 #ifdef HAVE_incscc
1516 || HAVE_incscc
1517 #endif
1518 #ifdef HAVE_decscc
1519 || HAVE_decscc
1520 #endif
1521 )
1522 && ! reload_completed
1523 && this_is_condjump && ! this_is_simplejump
1524 && (temp = next_nonnote_insn (insn)) != 0
1525 && (temp1 = single_set (temp)) != 0
1526 && (temp2 = SET_DEST (temp1),
1527 GET_MODE_CLASS (GET_MODE (temp2)) == MODE_INT)
1528 && GET_CODE (SET_SRC (temp1)) == PLUS
1529 && (XEXP (SET_SRC (temp1), 1) == const1_rtx
1530 || XEXP (SET_SRC (temp1), 1) == constm1_rtx)
1531 && rtx_equal_p (temp2, XEXP (SET_SRC (temp1), 0))
1532 && ! side_effects_p (temp2)
1533 && ! may_trap_p (temp2)
1534 /* INSN must either branch to the insn after TEMP or the insn
1535 after TEMP must branch to the same place as INSN. */
1536 && (reallabelprev == temp
1537 || ((temp3 = next_active_insn (temp)) != 0
1538 && simplejump_p (temp3)
1539 && JUMP_LABEL (temp3) == JUMP_LABEL (insn)))
1540 && (temp3 = get_condition (insn, &temp4)) != 0
1541 /* We must be comparing objects whose modes imply the size.
1542 We could handle BLKmode if (1) emit_store_flag could
1543 and (2) we could find the size reliably. */
1544 && GET_MODE (XEXP (temp3, 0)) != BLKmode
1545 && can_reverse_comparison_p (temp3, insn))
1546 {
1547 rtx temp6, target = 0, seq, init_insn = 0, init = temp2;
1548 enum rtx_code code = reverse_condition (GET_CODE (temp3));
1549
1550 start_sequence ();
1551
1552 /* It must be the case that TEMP2 is not modified in the range
1553 [TEMP4, INSN). The one exception we make is if the insn
1554 before INSN sets TEMP2 to something which is also unchanged
1555 in that range. In that case, we can move the initialization
1556 into our sequence. */
1557
1558 if ((temp5 = prev_active_insn (insn)) != 0
1559 && no_labels_between_p (temp5, insn)
1560 && GET_CODE (temp5) == INSN
1561 && (temp6 = single_set (temp5)) != 0
1562 && rtx_equal_p (temp2, SET_DEST (temp6))
1563 && (CONSTANT_P (SET_SRC (temp6))
1564 || GET_CODE (SET_SRC (temp6)) == REG
1565 || GET_CODE (SET_SRC (temp6)) == SUBREG))
1566 {
1567 emit_insn (PATTERN (temp5));
1568 init_insn = temp5;
1569 init = SET_SRC (temp6);
1570 }
1571
1572 if (CONSTANT_P (init)
1573 || ! reg_set_between_p (init, PREV_INSN (temp4), insn))
1574 target = emit_store_flag (gen_reg_rtx (GET_MODE (temp2)), code,
1575 XEXP (temp3, 0), XEXP (temp3, 1),
1576 VOIDmode,
1577 (code == LTU || code == LEU
1578 || code == GTU || code == GEU), 1);
1579
1580 /* If we can do the store-flag, do the addition or
1581 subtraction. */
1582
1583 if (target)
1584 target = expand_binop (GET_MODE (temp2),
1585 (XEXP (SET_SRC (temp1), 1) == const1_rtx
1586 ? add_optab : sub_optab),
1587 temp2, target, temp2, 0, OPTAB_WIDEN);
1588
1589 if (target != 0)
1590 {
1591 /* Put the result back in temp2 in case it isn't already.
1592 Then replace the jump, possible a CC0-setting insn in
1593 front of the jump, and TEMP, with the sequence we have
1594 made. */
1595
1596 if (target != temp2)
1597 emit_move_insn (temp2, target);
1598
1599 seq = get_insns ();
1600 end_sequence ();
1601
1602 emit_insns_before (seq, temp4);
1603 delete_insn (temp);
1604
1605 if (init_insn)
1606 delete_insn (init_insn);
1607
1608 next = NEXT_INSN (insn);
1609 #ifdef HAVE_cc0
1610 delete_insn (prev_nonnote_insn (insn));
1611 #endif
1612 delete_insn (insn);
1613
1614 if (after_regscan)
1615 {
1616 reg_scan_update (seq, NEXT_INSN (next), old_max_reg);
1617 old_max_reg = max_reg_num ();
1618 }
1619
1620 changed = 1;
1621 continue;
1622 }
1623 else
1624 end_sequence ();
1625 }
1626
1627 /* Simplify if (...) x = 1; else {...} if (x) ...
1628 We recognize this case scanning backwards as well.
1629
1630 TEMP is the assignment to x;
1631 TEMP1 is the label at the head of the second if. */
1632 /* ?? This should call get_condition to find the values being
1633 compared, instead of looking for a COMPARE insn when HAVE_cc0
1634 is not defined. This would allow it to work on the m88k. */
1635 /* ?? This optimization is only safe before cse is run if HAVE_cc0
1636 is not defined and the condition is tested by a separate compare
1637 insn. This is because the code below assumes that the result
1638 of the compare dies in the following branch.
1639
1640 Not only that, but there might be other insns between the
1641 compare and branch whose results are live. Those insns need
1642 to be executed.
1643
1644 A way to fix this is to move the insns at JUMP_LABEL (insn)
1645 to before INSN. If we are running before flow, they will
1646 be deleted if they aren't needed. But this doesn't work
1647 well after flow.
1648
1649 This is really a special-case of jump threading, anyway. The
1650 right thing to do is to replace this and jump threading with
1651 much simpler code in cse.
1652
1653 This code has been turned off in the non-cc0 case in the
1654 meantime. */
1655
1656 #ifdef HAVE_cc0
1657 else if (this_is_simplejump
1658 /* Safe to skip USE and CLOBBER insns here
1659 since they will not be deleted. */
1660 && (temp = prev_active_insn (insn))
1661 && no_labels_between_p (temp, insn)
1662 && GET_CODE (temp) == INSN
1663 && GET_CODE (PATTERN (temp)) == SET
1664 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1665 && CONSTANT_P (SET_SRC (PATTERN (temp)))
1666 && (temp1 = next_active_insn (JUMP_LABEL (insn)))
1667 /* If we find that the next value tested is `x'
1668 (TEMP1 is the insn where this happens), win. */
1669 && GET_CODE (temp1) == INSN
1670 && GET_CODE (PATTERN (temp1)) == SET
1671 #ifdef HAVE_cc0
1672 /* Does temp1 `tst' the value of x? */
1673 && SET_SRC (PATTERN (temp1)) == SET_DEST (PATTERN (temp))
1674 && SET_DEST (PATTERN (temp1)) == cc0_rtx
1675 && (temp1 = next_nonnote_insn (temp1))
1676 #else
1677 /* Does temp1 compare the value of x against zero? */
1678 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1679 && XEXP (SET_SRC (PATTERN (temp1)), 1) == const0_rtx
1680 && (XEXP (SET_SRC (PATTERN (temp1)), 0)
1681 == SET_DEST (PATTERN (temp)))
1682 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1683 && (temp1 = find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1684 #endif
1685 && condjump_p (temp1))
1686 {
1687 /* Get the if_then_else from the condjump. */
1688 rtx choice = SET_SRC (PATTERN (temp1));
1689 if (GET_CODE (choice) == IF_THEN_ELSE)
1690 {
1691 enum rtx_code code = GET_CODE (XEXP (choice, 0));
1692 rtx val = SET_SRC (PATTERN (temp));
1693 rtx cond
1694 = simplify_relational_operation (code, GET_MODE (SET_DEST (PATTERN (temp))),
1695 val, const0_rtx);
1696 rtx ultimate;
1697
1698 if (cond == const_true_rtx)
1699 ultimate = XEXP (choice, 1);
1700 else if (cond == const0_rtx)
1701 ultimate = XEXP (choice, 2);
1702 else
1703 ultimate = 0;
1704
1705 if (ultimate == pc_rtx)
1706 ultimate = get_label_after (temp1);
1707 else if (ultimate && GET_CODE (ultimate) != RETURN)
1708 ultimate = XEXP (ultimate, 0);
1709
1710 if (ultimate && JUMP_LABEL(insn) != ultimate)
1711 changed |= redirect_jump (insn, ultimate);
1712 }
1713 }
1714 #endif
1715
1716 #if 0
1717 /* @@ This needs a bit of work before it will be right.
1718
1719 Any type of comparison can be accepted for the first and
1720 second compare. When rewriting the first jump, we must
1721 compute the what conditions can reach label3, and use the
1722 appropriate code. We can not simply reverse/swap the code
1723 of the first jump. In some cases, the second jump must be
1724 rewritten also.
1725
1726 For example,
1727 < == converts to > ==
1728 < != converts to == >
1729 etc.
1730
1731 If the code is written to only accept an '==' test for the second
1732 compare, then all that needs to be done is to swap the condition
1733 of the first branch.
1734
1735 It is questionable whether we want this optimization anyways,
1736 since if the user wrote code like this because he/she knew that
1737 the jump to label1 is taken most of the time, then rewriting
1738 this gives slower code. */
1739 /* @@ This should call get_condition to find the values being
1740 compared, instead of looking for a COMPARE insn when HAVE_cc0
1741 is not defined. This would allow it to work on the m88k. */
1742 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1743 is not defined and the condition is tested by a separate compare
1744 insn. This is because the code below assumes that the result
1745 of the compare dies in the following branch. */
1746
1747 /* Simplify test a ~= b
1748 condjump label1;
1749 test a == b
1750 condjump label2;
1751 jump label3;
1752 label1:
1753
1754 rewriting as
1755 test a ~~= b
1756 condjump label3
1757 test a == b
1758 condjump label2
1759 label1:
1760
1761 where ~= is an inequality, e.g. >, and ~~= is the swapped
1762 inequality, e.g. <.
1763
1764 We recognize this case scanning backwards.
1765
1766 TEMP is the conditional jump to `label2';
1767 TEMP1 is the test for `a == b';
1768 TEMP2 is the conditional jump to `label1';
1769 TEMP3 is the test for `a ~= b'. */
1770 else if (this_is_simplejump
1771 && (temp = prev_active_insn (insn))
1772 && no_labels_between_p (temp, insn)
1773 && condjump_p (temp)
1774 && (temp1 = prev_active_insn (temp))
1775 && no_labels_between_p (temp1, temp)
1776 && GET_CODE (temp1) == INSN
1777 && GET_CODE (PATTERN (temp1)) == SET
1778 #ifdef HAVE_cc0
1779 && sets_cc0_p (PATTERN (temp1)) == 1
1780 #else
1781 && GET_CODE (SET_SRC (PATTERN (temp1))) == COMPARE
1782 && GET_CODE (SET_DEST (PATTERN (temp1))) == REG
1783 && (temp == find_next_ref (SET_DEST (PATTERN (temp1)), temp1))
1784 #endif
1785 && (temp2 = prev_active_insn (temp1))
1786 && no_labels_between_p (temp2, temp1)
1787 && condjump_p (temp2)
1788 && JUMP_LABEL (temp2) == next_nonnote_insn (NEXT_INSN (insn))
1789 && (temp3 = prev_active_insn (temp2))
1790 && no_labels_between_p (temp3, temp2)
1791 && GET_CODE (PATTERN (temp3)) == SET
1792 && rtx_equal_p (SET_DEST (PATTERN (temp3)),
1793 SET_DEST (PATTERN (temp1)))
1794 && rtx_equal_p (SET_SRC (PATTERN (temp1)),
1795 SET_SRC (PATTERN (temp3)))
1796 && ! inequality_comparisons_p (PATTERN (temp))
1797 && inequality_comparisons_p (PATTERN (temp2)))
1798 {
1799 rtx fallthrough_label = JUMP_LABEL (temp2);
1800
1801 ++LABEL_NUSES (fallthrough_label);
1802 if (swap_jump (temp2, JUMP_LABEL (insn)))
1803 {
1804 delete_insn (insn);
1805 changed = 1;
1806 }
1807
1808 if (--LABEL_NUSES (fallthrough_label) == 0)
1809 delete_insn (fallthrough_label);
1810 }
1811 #endif
1812 /* Simplify if (...) {... x = 1;} if (x) ...
1813
1814 We recognize this case backwards.
1815
1816 TEMP is the test of `x';
1817 TEMP1 is the assignment to `x' at the end of the
1818 previous statement. */
1819 /* @@ This should call get_condition to find the values being
1820 compared, instead of looking for a COMPARE insn when HAVE_cc0
1821 is not defined. This would allow it to work on the m88k. */
1822 /* @@ This optimization is only safe before cse is run if HAVE_cc0
1823 is not defined and the condition is tested by a separate compare
1824 insn. This is because the code below assumes that the result
1825 of the compare dies in the following branch. */
1826
1827 /* ??? This has to be turned off. The problem is that the
1828 unconditional jump might indirectly end up branching to the
1829 label between TEMP1 and TEMP. We can't detect this, in general,
1830 since it may become a jump to there after further optimizations.
1831 If that jump is done, it will be deleted, so we will retry
1832 this optimization in the next pass, thus an infinite loop.
1833
1834 The present code prevents this by putting the jump after the
1835 label, but this is not logically correct. */
1836 #if 0
1837 else if (this_is_condjump
1838 /* Safe to skip USE and CLOBBER insns here
1839 since they will not be deleted. */
1840 && (temp = prev_active_insn (insn))
1841 && no_labels_between_p (temp, insn)
1842 && GET_CODE (temp) == INSN
1843 && GET_CODE (PATTERN (temp)) == SET
1844 #ifdef HAVE_cc0
1845 && sets_cc0_p (PATTERN (temp)) == 1
1846 && GET_CODE (SET_SRC (PATTERN (temp))) == REG
1847 #else
1848 /* Temp must be a compare insn, we can not accept a register
1849 to register move here, since it may not be simply a
1850 tst insn. */
1851 && GET_CODE (SET_SRC (PATTERN (temp))) == COMPARE
1852 && XEXP (SET_SRC (PATTERN (temp)), 1) == const0_rtx
1853 && GET_CODE (XEXP (SET_SRC (PATTERN (temp)), 0)) == REG
1854 && GET_CODE (SET_DEST (PATTERN (temp))) == REG
1855 && insn == find_next_ref (SET_DEST (PATTERN (temp)), temp)
1856 #endif
1857 /* May skip USE or CLOBBER insns here
1858 for checking for opportunity, since we
1859 take care of them later. */
1860 && (temp1 = prev_active_insn (temp))
1861 && GET_CODE (temp1) == INSN
1862 && GET_CODE (PATTERN (temp1)) == SET
1863 #ifdef HAVE_cc0
1864 && SET_SRC (PATTERN (temp)) == SET_DEST (PATTERN (temp1))
1865 #else
1866 && (XEXP (SET_SRC (PATTERN (temp)), 0)
1867 == SET_DEST (PATTERN (temp1)))
1868 #endif
1869 && CONSTANT_P (SET_SRC (PATTERN (temp1)))
1870 /* If this isn't true, cse will do the job. */
1871 && ! no_labels_between_p (temp1, temp))
1872 {
1873 /* Get the if_then_else from the condjump. */
1874 rtx choice = SET_SRC (PATTERN (insn));
1875 if (GET_CODE (choice) == IF_THEN_ELSE
1876 && (GET_CODE (XEXP (choice, 0)) == EQ
1877 || GET_CODE (XEXP (choice, 0)) == NE))
1878 {
1879 int want_nonzero = (GET_CODE (XEXP (choice, 0)) == NE);
1880 rtx last_insn;
1881 rtx ultimate;
1882 rtx p;
1883
1884 /* Get the place that condjump will jump to
1885 if it is reached from here. */
1886 if ((SET_SRC (PATTERN (temp1)) != const0_rtx)
1887 == want_nonzero)
1888 ultimate = XEXP (choice, 1);
1889 else
1890 ultimate = XEXP (choice, 2);
1891 /* Get it as a CODE_LABEL. */
1892 if (ultimate == pc_rtx)
1893 ultimate = get_label_after (insn);
1894 else
1895 /* Get the label out of the LABEL_REF. */
1896 ultimate = XEXP (ultimate, 0);
1897
1898 /* Insert the jump immediately before TEMP, specifically
1899 after the label that is between TEMP1 and TEMP. */
1900 last_insn = PREV_INSN (temp);
1901
1902 /* If we would be branching to the next insn, the jump
1903 would immediately be deleted and the re-inserted in
1904 a subsequent pass over the code. So don't do anything
1905 in that case. */
1906 if (next_active_insn (last_insn)
1907 != next_active_insn (ultimate))
1908 {
1909 emit_barrier_after (last_insn);
1910 p = emit_jump_insn_after (gen_jump (ultimate),
1911 last_insn);
1912 JUMP_LABEL (p) = ultimate;
1913 ++LABEL_NUSES (ultimate);
1914 if (INSN_UID (ultimate) < max_jump_chain
1915 && INSN_CODE (p) < max_jump_chain)
1916 {
1917 jump_chain[INSN_UID (p)]
1918 = jump_chain[INSN_UID (ultimate)];
1919 jump_chain[INSN_UID (ultimate)] = p;
1920 }
1921 changed = 1;
1922 continue;
1923 }
1924 }
1925 }
1926 #endif
1927 /* Detect a conditional jump going to the same place
1928 as an immediately following unconditional jump. */
1929 else if (this_is_condjump
1930 && (temp = next_active_insn (insn)) != 0
1931 && simplejump_p (temp)
1932 && (next_active_insn (JUMP_LABEL (insn))
1933 == next_active_insn (JUMP_LABEL (temp))))
1934 {
1935 rtx tem = temp;
1936
1937 /* ??? Optional. Disables some optimizations, but makes
1938 gcov output more accurate with -O. */
1939 if (flag_test_coverage && !reload_completed)
1940 for (tem = insn; tem != temp; tem = NEXT_INSN (tem))
1941 if (GET_CODE (tem) == NOTE && NOTE_LINE_NUMBER (tem) > 0)
1942 break;
1943
1944 if (tem == temp)
1945 {
1946 delete_jump (insn);
1947 changed = 1;
1948 continue;
1949 }
1950 }
1951 #ifdef HAVE_trap
1952 /* Detect a conditional jump jumping over an unconditional trap. */
1953 else if (HAVE_trap
1954 && this_is_condjump && ! this_is_simplejump
1955 && reallabelprev != 0
1956 && GET_CODE (reallabelprev) == INSN
1957 && GET_CODE (PATTERN (reallabelprev)) == TRAP_IF
1958 && TRAP_CONDITION (PATTERN (reallabelprev)) == const_true_rtx
1959 && prev_active_insn (reallabelprev) == insn
1960 && no_labels_between_p (insn, reallabelprev)
1961 && (temp2 = get_condition (insn, &temp4))
1962 && can_reverse_comparison_p (temp2, insn))
1963 {
1964 rtx new = gen_cond_trap (reverse_condition (GET_CODE (temp2)),
1965 XEXP (temp2, 0), XEXP (temp2, 1),
1966 TRAP_CODE (PATTERN (reallabelprev)));
1967
1968 if (new)
1969 {
1970 emit_insn_before (new, temp4);
1971 delete_insn (reallabelprev);
1972 delete_jump (insn);
1973 changed = 1;
1974 continue;
1975 }
1976 }
1977 /* Detect a jump jumping to an unconditional trap. */
1978 else if (HAVE_trap && this_is_condjump
1979 && (temp = next_active_insn (JUMP_LABEL (insn)))
1980 && GET_CODE (temp) == INSN
1981 && GET_CODE (PATTERN (temp)) == TRAP_IF
1982 && (this_is_simplejump
1983 || (temp2 = get_condition (insn, &temp4))))
1984 {
1985 rtx tc = TRAP_CONDITION (PATTERN (temp));
1986
1987 if (tc == const_true_rtx
1988 || (! this_is_simplejump && rtx_equal_p (temp2, tc)))
1989 {
1990 rtx new;
1991 /* Replace an unconditional jump to a trap with a trap. */
1992 if (this_is_simplejump)
1993 {
1994 emit_barrier_after (emit_insn_before (gen_trap (), insn));
1995 delete_jump (insn);
1996 changed = 1;
1997 continue;
1998 }
1999 new = gen_cond_trap (GET_CODE (temp2), XEXP (temp2, 0),
2000 XEXP (temp2, 1),
2001 TRAP_CODE (PATTERN (temp)));
2002 if (new)
2003 {
2004 emit_insn_before (new, temp4);
2005 delete_jump (insn);
2006 changed = 1;
2007 continue;
2008 }
2009 }
2010 /* If the trap condition and jump condition are mutually
2011 exclusive, redirect the jump to the following insn. */
2012 else if (GET_RTX_CLASS (GET_CODE (tc)) == '<'
2013 && ! this_is_simplejump
2014 && swap_condition (GET_CODE (temp2)) == GET_CODE (tc)
2015 && rtx_equal_p (XEXP (tc, 0), XEXP (temp2, 0))
2016 && rtx_equal_p (XEXP (tc, 1), XEXP (temp2, 1))
2017 && redirect_jump (insn, get_label_after (temp)))
2018 {
2019 changed = 1;
2020 continue;
2021 }
2022 }
2023 #endif
2024
2025 /* Detect a conditional jump jumping over an unconditional jump. */
2026
2027 else if ((this_is_condjump || this_is_condjump_in_parallel)
2028 && ! this_is_simplejump
2029 && reallabelprev != 0
2030 && GET_CODE (reallabelprev) == JUMP_INSN
2031 && prev_active_insn (reallabelprev) == insn
2032 && no_labels_between_p (insn, reallabelprev)
2033 && simplejump_p (reallabelprev))
2034 {
2035 /* When we invert the unconditional jump, we will be
2036 decrementing the usage count of its old label.
2037 Make sure that we don't delete it now because that
2038 might cause the following code to be deleted. */
2039 rtx prev_uses = prev_nonnote_insn (reallabelprev);
2040 rtx prev_label = JUMP_LABEL (insn);
2041
2042 if (prev_label)
2043 ++LABEL_NUSES (prev_label);
2044
2045 if (invert_jump (insn, JUMP_LABEL (reallabelprev)))
2046 {
2047 /* It is very likely that if there are USE insns before
2048 this jump, they hold REG_DEAD notes. These REG_DEAD
2049 notes are no longer valid due to this optimization,
2050 and will cause the life-analysis that following passes
2051 (notably delayed-branch scheduling) to think that
2052 these registers are dead when they are not.
2053
2054 To prevent this trouble, we just remove the USE insns
2055 from the insn chain. */
2056
2057 while (prev_uses && GET_CODE (prev_uses) == INSN
2058 && GET_CODE (PATTERN (prev_uses)) == USE)
2059 {
2060 rtx useless = prev_uses;
2061 prev_uses = prev_nonnote_insn (prev_uses);
2062 delete_insn (useless);
2063 }
2064
2065 delete_insn (reallabelprev);
2066 next = insn;
2067 changed = 1;
2068 }
2069
2070 /* We can now safely delete the label if it is unreferenced
2071 since the delete_insn above has deleted the BARRIER. */
2072 if (prev_label && --LABEL_NUSES (prev_label) == 0)
2073 delete_insn (prev_label);
2074 continue;
2075 }
2076 else
2077 {
2078 /* Detect a jump to a jump. */
2079
2080 nlabel = follow_jumps (JUMP_LABEL (insn));
2081 if (nlabel != JUMP_LABEL (insn)
2082 && redirect_jump (insn, nlabel))
2083 {
2084 changed = 1;
2085 next = insn;
2086 }
2087
2088 /* Look for if (foo) bar; else break; */
2089 /* The insns look like this:
2090 insn = condjump label1;
2091 ...range1 (some insns)...
2092 jump label2;
2093 label1:
2094 ...range2 (some insns)...
2095 jump somewhere unconditionally
2096 label2: */
2097 {
2098 rtx label1 = next_label (insn);
2099 rtx range1end = label1 ? prev_active_insn (label1) : 0;
2100 /* Don't do this optimization on the first round, so that
2101 jump-around-a-jump gets simplified before we ask here
2102 whether a jump is unconditional.
2103
2104 Also don't do it when we are called after reload since
2105 it will confuse reorg. */
2106 if (! first
2107 && (reload_completed ? ! flag_delayed_branch : 1)
2108 /* Make sure INSN is something we can invert. */
2109 && condjump_p (insn)
2110 && label1 != 0
2111 && JUMP_LABEL (insn) == label1
2112 && LABEL_NUSES (label1) == 1
2113 && GET_CODE (range1end) == JUMP_INSN
2114 && simplejump_p (range1end))
2115 {
2116 rtx label2 = next_label (label1);
2117 rtx range2end = label2 ? prev_active_insn (label2) : 0;
2118 if (range1end != range2end
2119 && JUMP_LABEL (range1end) == label2
2120 && GET_CODE (range2end) == JUMP_INSN
2121 && GET_CODE (NEXT_INSN (range2end)) == BARRIER
2122 /* Invert the jump condition, so we
2123 still execute the same insns in each case. */
2124 && invert_jump (insn, label1))
2125 {
2126 rtx range1beg = next_active_insn (insn);
2127 rtx range2beg = next_active_insn (label1);
2128 rtx range1after, range2after;
2129 rtx range1before, range2before;
2130 rtx rangenext;
2131
2132 /* Include in each range any notes before it, to be
2133 sure that we get the line number note if any, even
2134 if there are other notes here. */
2135 while (PREV_INSN (range1beg)
2136 && GET_CODE (PREV_INSN (range1beg)) == NOTE)
2137 range1beg = PREV_INSN (range1beg);
2138
2139 while (PREV_INSN (range2beg)
2140 && GET_CODE (PREV_INSN (range2beg)) == NOTE)
2141 range2beg = PREV_INSN (range2beg);
2142
2143 /* Don't move NOTEs for blocks or loops; shift them
2144 outside the ranges, where they'll stay put. */
2145 range1beg = squeeze_notes (range1beg, range1end);
2146 range2beg = squeeze_notes (range2beg, range2end);
2147
2148 /* Get current surrounds of the 2 ranges. */
2149 range1before = PREV_INSN (range1beg);
2150 range2before = PREV_INSN (range2beg);
2151 range1after = NEXT_INSN (range1end);
2152 range2after = NEXT_INSN (range2end);
2153
2154 /* Splice range2 where range1 was. */
2155 NEXT_INSN (range1before) = range2beg;
2156 PREV_INSN (range2beg) = range1before;
2157 NEXT_INSN (range2end) = range1after;
2158 PREV_INSN (range1after) = range2end;
2159 /* Splice range1 where range2 was. */
2160 NEXT_INSN (range2before) = range1beg;
2161 PREV_INSN (range1beg) = range2before;
2162 NEXT_INSN (range1end) = range2after;
2163 PREV_INSN (range2after) = range1end;
2164
2165 /* Check for a loop end note between the end of
2166 range2, and the next code label. If there is one,
2167 then what we have really seen is
2168 if (foo) break; end_of_loop;
2169 and moved the break sequence outside the loop.
2170 We must move the LOOP_END note to where the
2171 loop really ends now, or we will confuse loop
2172 optimization. Stop if we find a LOOP_BEG note
2173 first, since we don't want to move the LOOP_END
2174 note in that case. */
2175 for (;range2after != label2; range2after = rangenext)
2176 {
2177 rangenext = NEXT_INSN (range2after);
2178 if (GET_CODE (range2after) == NOTE)
2179 {
2180 if (NOTE_LINE_NUMBER (range2after)
2181 == NOTE_INSN_LOOP_END)
2182 {
2183 NEXT_INSN (PREV_INSN (range2after))
2184 = rangenext;
2185 PREV_INSN (rangenext)
2186 = PREV_INSN (range2after);
2187 PREV_INSN (range2after)
2188 = PREV_INSN (range1beg);
2189 NEXT_INSN (range2after) = range1beg;
2190 NEXT_INSN (PREV_INSN (range1beg))
2191 = range2after;
2192 PREV_INSN (range1beg) = range2after;
2193 }
2194 else if (NOTE_LINE_NUMBER (range2after)
2195 == NOTE_INSN_LOOP_BEG)
2196 break;
2197 }
2198 }
2199 changed = 1;
2200 continue;
2201 }
2202 }
2203 }
2204
2205 /* Now that the jump has been tensioned,
2206 try cross jumping: check for identical code
2207 before the jump and before its target label. */
2208
2209 /* First, cross jumping of conditional jumps: */
2210
2211 if (cross_jump && condjump_p (insn))
2212 {
2213 rtx newjpos, newlpos;
2214 rtx x = prev_real_insn (JUMP_LABEL (insn));
2215
2216 /* A conditional jump may be crossjumped
2217 only if the place it jumps to follows
2218 an opposing jump that comes back here. */
2219
2220 if (x != 0 && ! jump_back_p (x, insn))
2221 /* We have no opposing jump;
2222 cannot cross jump this insn. */
2223 x = 0;
2224
2225 newjpos = 0;
2226 /* TARGET is nonzero if it is ok to cross jump
2227 to code before TARGET. If so, see if matches. */
2228 if (x != 0)
2229 find_cross_jump (insn, x, 2,
2230 &newjpos, &newlpos);
2231
2232 if (newjpos != 0)
2233 {
2234 do_cross_jump (insn, newjpos, newlpos);
2235 /* Make the old conditional jump
2236 into an unconditional one. */
2237 SET_SRC (PATTERN (insn))
2238 = gen_rtx_LABEL_REF (VOIDmode, JUMP_LABEL (insn));
2239 INSN_CODE (insn) = -1;
2240 emit_barrier_after (insn);
2241 /* Add to jump_chain unless this is a new label
2242 whose UID is too large. */
2243 if (INSN_UID (JUMP_LABEL (insn)) < max_jump_chain)
2244 {
2245 jump_chain[INSN_UID (insn)]
2246 = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2247 jump_chain[INSN_UID (JUMP_LABEL (insn))] = insn;
2248 }
2249 changed = 1;
2250 next = insn;
2251 }
2252 }
2253
2254 /* Cross jumping of unconditional jumps:
2255 a few differences. */
2256
2257 if (cross_jump && simplejump_p (insn))
2258 {
2259 rtx newjpos, newlpos;
2260 rtx target;
2261
2262 newjpos = 0;
2263
2264 /* TARGET is nonzero if it is ok to cross jump
2265 to code before TARGET. If so, see if matches. */
2266 find_cross_jump (insn, JUMP_LABEL (insn), 1,
2267 &newjpos, &newlpos);
2268
2269 /* If cannot cross jump to code before the label,
2270 see if we can cross jump to another jump to
2271 the same label. */
2272 /* Try each other jump to this label. */
2273 if (INSN_UID (JUMP_LABEL (insn)) < max_uid)
2274 for (target = jump_chain[INSN_UID (JUMP_LABEL (insn))];
2275 target != 0 && newjpos == 0;
2276 target = jump_chain[INSN_UID (target)])
2277 if (target != insn
2278 && JUMP_LABEL (target) == JUMP_LABEL (insn)
2279 /* Ignore TARGET if it's deleted. */
2280 && ! INSN_DELETED_P (target))
2281 find_cross_jump (insn, target, 2,
2282 &newjpos, &newlpos);
2283
2284 if (newjpos != 0)
2285 {
2286 do_cross_jump (insn, newjpos, newlpos);
2287 changed = 1;
2288 next = insn;
2289 }
2290 }
2291
2292 /* This code was dead in the previous jump.c! */
2293 if (cross_jump && GET_CODE (PATTERN (insn)) == RETURN)
2294 {
2295 /* Return insns all "jump to the same place"
2296 so we can cross-jump between any two of them. */
2297
2298 rtx newjpos, newlpos, target;
2299
2300 newjpos = 0;
2301
2302 /* If cannot cross jump to code before the label,
2303 see if we can cross jump to another jump to
2304 the same label. */
2305 /* Try each other jump to this label. */
2306 for (target = jump_chain[0];
2307 target != 0 && newjpos == 0;
2308 target = jump_chain[INSN_UID (target)])
2309 if (target != insn
2310 && ! INSN_DELETED_P (target)
2311 && GET_CODE (PATTERN (target)) == RETURN)
2312 find_cross_jump (insn, target, 2,
2313 &newjpos, &newlpos);
2314
2315 if (newjpos != 0)
2316 {
2317 do_cross_jump (insn, newjpos, newlpos);
2318 changed = 1;
2319 next = insn;
2320 }
2321 }
2322 }
2323 }
2324
2325 first = 0;
2326 }
2327
2328 /* Delete extraneous line number notes.
2329 Note that two consecutive notes for different lines are not really
2330 extraneous. There should be some indication where that line belonged,
2331 even if it became empty. */
2332
2333 {
2334 rtx last_note = 0;
2335
2336 for (insn = f; insn; insn = NEXT_INSN (insn))
2337 if (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0)
2338 {
2339 /* Delete this note if it is identical to previous note. */
2340 if (last_note
2341 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last_note)
2342 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last_note))
2343 {
2344 delete_insn (insn);
2345 continue;
2346 }
2347
2348 last_note = insn;
2349 }
2350 }
2351
2352 #ifdef HAVE_return
2353 if (HAVE_return)
2354 {
2355 /* If we fall through to the epilogue, see if we can insert a RETURN insn
2356 in front of it. If the machine allows it at this point (we might be
2357 after reload for a leaf routine), it will improve optimization for it
2358 to be there. We do this both here and at the start of this pass since
2359 the RETURN might have been deleted by some of our optimizations. */
2360 insn = get_last_insn ();
2361 while (insn && GET_CODE (insn) == NOTE)
2362 insn = PREV_INSN (insn);
2363
2364 if (insn && GET_CODE (insn) != BARRIER)
2365 {
2366 emit_jump_insn (gen_return ());
2367 emit_barrier ();
2368 }
2369 }
2370 #endif
2371
2372 /* See if there is still a NOTE_INSN_FUNCTION_END in this function.
2373 If so, delete it, and record that this function can drop off the end. */
2374
2375 insn = last_insn;
2376 {
2377 int n_labels = 1;
2378 while (insn
2379 /* One label can follow the end-note: the return label. */
2380 && ((GET_CODE (insn) == CODE_LABEL && n_labels-- > 0)
2381 /* Ordinary insns can follow it if returning a structure. */
2382 || GET_CODE (insn) == INSN
2383 /* If machine uses explicit RETURN insns, no epilogue,
2384 then one of them follows the note. */
2385 || (GET_CODE (insn) == JUMP_INSN
2386 && GET_CODE (PATTERN (insn)) == RETURN)
2387 /* A barrier can follow the return insn. */
2388 || GET_CODE (insn) == BARRIER
2389 /* Other kinds of notes can follow also. */
2390 || (GET_CODE (insn) == NOTE
2391 && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)))
2392 insn = PREV_INSN (insn);
2393 }
2394
2395 /* Report if control can fall through at the end of the function. */
2396 if (insn && GET_CODE (insn) == NOTE
2397 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
2398 {
2399 can_reach_end = 1;
2400 delete_insn (insn);
2401 }
2402
2403 /* Show JUMP_CHAIN no longer valid. */
2404 jump_chain = 0;
2405 }
2406 \f
2407 /* LOOP_START is a NOTE_INSN_LOOP_BEG note that is followed by an unconditional
2408 jump. Assume that this unconditional jump is to the exit test code. If
2409 the code is sufficiently simple, make a copy of it before INSN,
2410 followed by a jump to the exit of the loop. Then delete the unconditional
2411 jump after INSN.
2412
2413 Return 1 if we made the change, else 0.
2414
2415 This is only safe immediately after a regscan pass because it uses the
2416 values of regno_first_uid and regno_last_uid. */
2417
2418 static int
2419 duplicate_loop_exit_test (loop_start)
2420 rtx loop_start;
2421 {
2422 rtx insn, set, reg, p, link;
2423 rtx copy = 0;
2424 int num_insns = 0;
2425 rtx exitcode = NEXT_INSN (JUMP_LABEL (next_nonnote_insn (loop_start)));
2426 rtx lastexit;
2427 int max_reg = max_reg_num ();
2428 rtx *reg_map = 0;
2429
2430 /* Scan the exit code. We do not perform this optimization if any insn:
2431
2432 is a CALL_INSN
2433 is a CODE_LABEL
2434 has a REG_RETVAL or REG_LIBCALL note (hard to adjust)
2435 is a NOTE_INSN_LOOP_BEG because this means we have a nested loop
2436 is a NOTE_INSN_BLOCK_{BEG,END} because duplicating these notes
2437 is not valid.
2438
2439 We also do not do this if we find an insn with ASM_OPERANDS. While
2440 this restriction should not be necessary, copying an insn with
2441 ASM_OPERANDS can confuse asm_noperands in some cases.
2442
2443 Also, don't do this if the exit code is more than 20 insns. */
2444
2445 for (insn = exitcode;
2446 insn
2447 && ! (GET_CODE (insn) == NOTE
2448 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
2449 insn = NEXT_INSN (insn))
2450 {
2451 switch (GET_CODE (insn))
2452 {
2453 case CODE_LABEL:
2454 case CALL_INSN:
2455 return 0;
2456 case NOTE:
2457 /* We could be in front of the wrong NOTE_INSN_LOOP_END if there is
2458 a jump immediately after the loop start that branches outside
2459 the loop but within an outer loop, near the exit test.
2460 If we copied this exit test and created a phony
2461 NOTE_INSN_LOOP_VTOP, this could make instructions immediately
2462 before the exit test look like these could be safely moved
2463 out of the loop even if they actually may be never executed.
2464 This can be avoided by checking here for NOTE_INSN_LOOP_CONT. */
2465
2466 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2467 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT)
2468 return 0;
2469
2470 if (optimize < 2
2471 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2472 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END))
2473 /* If we were to duplicate this code, we would not move
2474 the BLOCK notes, and so debugging the moved code would
2475 be difficult. Thus, we only move the code with -O2 or
2476 higher. */
2477 return 0;
2478
2479 break;
2480 case JUMP_INSN:
2481 case INSN:
2482 /* The code below would grossly mishandle REG_WAS_0 notes,
2483 so get rid of them here. */
2484 while ((p = find_reg_note (insn, REG_WAS_0, NULL_RTX)) != 0)
2485 remove_note (insn, p);
2486 if (++num_insns > 20
2487 || find_reg_note (insn, REG_RETVAL, NULL_RTX)
2488 || find_reg_note (insn, REG_LIBCALL, NULL_RTX)
2489 || asm_noperands (PATTERN (insn)) > 0)
2490 return 0;
2491 break;
2492 default:
2493 break;
2494 }
2495 }
2496
2497 /* Unless INSN is zero, we can do the optimization. */
2498 if (insn == 0)
2499 return 0;
2500
2501 lastexit = insn;
2502
2503 /* See if any insn sets a register only used in the loop exit code and
2504 not a user variable. If so, replace it with a new register. */
2505 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2506 if (GET_CODE (insn) == INSN
2507 && (set = single_set (insn)) != 0
2508 && ((reg = SET_DEST (set), GET_CODE (reg) == REG)
2509 || (GET_CODE (reg) == SUBREG
2510 && (reg = SUBREG_REG (reg), GET_CODE (reg) == REG)))
2511 && REGNO (reg) >= FIRST_PSEUDO_REGISTER
2512 && REGNO_FIRST_UID (REGNO (reg)) == INSN_UID (insn))
2513 {
2514 for (p = NEXT_INSN (insn); p != lastexit; p = NEXT_INSN (p))
2515 if (REGNO_LAST_UID (REGNO (reg)) == INSN_UID (p))
2516 break;
2517
2518 if (p != lastexit)
2519 {
2520 /* We can do the replacement. Allocate reg_map if this is the
2521 first replacement we found. */
2522 if (reg_map == 0)
2523 {
2524 reg_map = (rtx *) alloca (max_reg * sizeof (rtx));
2525 bzero ((char *) reg_map, max_reg * sizeof (rtx));
2526 }
2527
2528 REG_LOOP_TEST_P (reg) = 1;
2529
2530 reg_map[REGNO (reg)] = gen_reg_rtx (GET_MODE (reg));
2531 }
2532 }
2533
2534 /* Now copy each insn. */
2535 for (insn = exitcode; insn != lastexit; insn = NEXT_INSN (insn))
2536 switch (GET_CODE (insn))
2537 {
2538 case BARRIER:
2539 copy = emit_barrier_before (loop_start);
2540 break;
2541 case NOTE:
2542 /* Only copy line-number notes. */
2543 if (NOTE_LINE_NUMBER (insn) >= 0)
2544 {
2545 copy = emit_note_before (NOTE_LINE_NUMBER (insn), loop_start);
2546 NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
2547 }
2548 break;
2549
2550 case INSN:
2551 copy = emit_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2552 if (reg_map)
2553 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2554
2555 mark_jump_label (PATTERN (copy), copy, 0);
2556
2557 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
2558 make them. */
2559 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
2560 if (REG_NOTE_KIND (link) != REG_LABEL)
2561 REG_NOTES (copy)
2562 = copy_rtx (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
2563 XEXP (link, 0),
2564 REG_NOTES (copy)));
2565 if (reg_map && REG_NOTES (copy))
2566 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2567 break;
2568
2569 case JUMP_INSN:
2570 copy = emit_jump_insn_before (copy_rtx (PATTERN (insn)), loop_start);
2571 if (reg_map)
2572 replace_regs (PATTERN (copy), reg_map, max_reg, 1);
2573 mark_jump_label (PATTERN (copy), copy, 0);
2574 if (REG_NOTES (insn))
2575 {
2576 REG_NOTES (copy) = copy_rtx (REG_NOTES (insn));
2577 if (reg_map)
2578 replace_regs (REG_NOTES (copy), reg_map, max_reg, 1);
2579 }
2580
2581 /* If this is a simple jump, add it to the jump chain. */
2582
2583 if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy)
2584 && simplejump_p (copy))
2585 {
2586 jump_chain[INSN_UID (copy)]
2587 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2588 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2589 }
2590 break;
2591
2592 default:
2593 abort ();
2594 }
2595
2596 /* Now clean up by emitting a jump to the end label and deleting the jump
2597 at the start of the loop. */
2598 if (! copy || GET_CODE (copy) != BARRIER)
2599 {
2600 copy = emit_jump_insn_before (gen_jump (get_label_after (insn)),
2601 loop_start);
2602 mark_jump_label (PATTERN (copy), copy, 0);
2603 if (INSN_UID (copy) < max_jump_chain
2604 && INSN_UID (JUMP_LABEL (copy)) < max_jump_chain)
2605 {
2606 jump_chain[INSN_UID (copy)]
2607 = jump_chain[INSN_UID (JUMP_LABEL (copy))];
2608 jump_chain[INSN_UID (JUMP_LABEL (copy))] = copy;
2609 }
2610 emit_barrier_before (loop_start);
2611 }
2612
2613 /* Mark the exit code as the virtual top of the converted loop. */
2614 emit_note_before (NOTE_INSN_LOOP_VTOP, exitcode);
2615
2616 delete_insn (next_nonnote_insn (loop_start));
2617
2618 return 1;
2619 }
2620 \f
2621 /* Move all block-beg, block-end, loop-beg, loop-cont, loop-vtop, and
2622 loop-end notes between START and END out before START. Assume that
2623 END is not such a note. START may be such a note. Returns the value
2624 of the new starting insn, which may be different if the original start
2625 was such a note. */
2626
2627 rtx
2628 squeeze_notes (start, end)
2629 rtx start, end;
2630 {
2631 rtx insn;
2632 rtx next;
2633
2634 for (insn = start; insn != end; insn = next)
2635 {
2636 next = NEXT_INSN (insn);
2637 if (GET_CODE (insn) == NOTE
2638 && (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END
2639 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2640 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG
2641 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END
2642 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_CONT
2643 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP))
2644 {
2645 if (insn == start)
2646 start = next;
2647 else
2648 {
2649 rtx prev = PREV_INSN (insn);
2650 PREV_INSN (insn) = PREV_INSN (start);
2651 NEXT_INSN (insn) = start;
2652 NEXT_INSN (PREV_INSN (insn)) = insn;
2653 PREV_INSN (NEXT_INSN (insn)) = insn;
2654 NEXT_INSN (prev) = next;
2655 PREV_INSN (next) = prev;
2656 }
2657 }
2658 }
2659
2660 return start;
2661 }
2662 \f
2663 /* Compare the instructions before insn E1 with those before E2
2664 to find an opportunity for cross jumping.
2665 (This means detecting identical sequences of insns followed by
2666 jumps to the same place, or followed by a label and a jump
2667 to that label, and replacing one with a jump to the other.)
2668
2669 Assume E1 is a jump that jumps to label E2
2670 (that is not always true but it might as well be).
2671 Find the longest possible equivalent sequences
2672 and store the first insns of those sequences into *F1 and *F2.
2673 Store zero there if no equivalent preceding instructions are found.
2674
2675 We give up if we find a label in stream 1.
2676 Actually we could transfer that label into stream 2. */
2677
2678 static void
2679 find_cross_jump (e1, e2, minimum, f1, f2)
2680 rtx e1, e2;
2681 int minimum;
2682 rtx *f1, *f2;
2683 {
2684 register rtx i1 = e1, i2 = e2;
2685 register rtx p1, p2;
2686 int lose = 0;
2687
2688 rtx last1 = 0, last2 = 0;
2689 rtx afterlast1 = 0, afterlast2 = 0;
2690
2691 *f1 = 0;
2692 *f2 = 0;
2693
2694 while (1)
2695 {
2696 i1 = prev_nonnote_insn (i1);
2697
2698 i2 = PREV_INSN (i2);
2699 while (i2 && (GET_CODE (i2) == NOTE || GET_CODE (i2) == CODE_LABEL))
2700 i2 = PREV_INSN (i2);
2701
2702 if (i1 == 0)
2703 break;
2704
2705 /* Don't allow the range of insns preceding E1 or E2
2706 to include the other (E2 or E1). */
2707 if (i2 == e1 || i1 == e2)
2708 break;
2709
2710 /* If we will get to this code by jumping, those jumps will be
2711 tensioned to go directly to the new label (before I2),
2712 so this cross-jumping won't cost extra. So reduce the minimum. */
2713 if (GET_CODE (i1) == CODE_LABEL)
2714 {
2715 --minimum;
2716 break;
2717 }
2718
2719 if (i2 == 0 || GET_CODE (i1) != GET_CODE (i2))
2720 break;
2721
2722 p1 = PATTERN (i1);
2723 p2 = PATTERN (i2);
2724
2725 /* If this is a CALL_INSN, compare register usage information.
2726 If we don't check this on stack register machines, the two
2727 CALL_INSNs might be merged leaving reg-stack.c with mismatching
2728 numbers of stack registers in the same basic block.
2729 If we don't check this on machines with delay slots, a delay slot may
2730 be filled that clobbers a parameter expected by the subroutine.
2731
2732 ??? We take the simple route for now and assume that if they're
2733 equal, they were constructed identically. */
2734
2735 if (GET_CODE (i1) == CALL_INSN
2736 && ! rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
2737 CALL_INSN_FUNCTION_USAGE (i2)))
2738 lose = 1;
2739
2740 #ifdef STACK_REGS
2741 /* If cross_jump_death_matters is not 0, the insn's mode
2742 indicates whether or not the insn contains any stack-like
2743 regs. */
2744
2745 if (!lose && cross_jump_death_matters && GET_MODE (i1) == QImode)
2746 {
2747 /* If register stack conversion has already been done, then
2748 death notes must also be compared before it is certain that
2749 the two instruction streams match. */
2750
2751 rtx note;
2752 HARD_REG_SET i1_regset, i2_regset;
2753
2754 CLEAR_HARD_REG_SET (i1_regset);
2755 CLEAR_HARD_REG_SET (i2_regset);
2756
2757 for (note = REG_NOTES (i1); note; note = XEXP (note, 1))
2758 if (REG_NOTE_KIND (note) == REG_DEAD
2759 && STACK_REG_P (XEXP (note, 0)))
2760 SET_HARD_REG_BIT (i1_regset, REGNO (XEXP (note, 0)));
2761
2762 for (note = REG_NOTES (i2); note; note = XEXP (note, 1))
2763 if (REG_NOTE_KIND (note) == REG_DEAD
2764 && STACK_REG_P (XEXP (note, 0)))
2765 SET_HARD_REG_BIT (i2_regset, REGNO (XEXP (note, 0)));
2766
2767 GO_IF_HARD_REG_EQUAL (i1_regset, i2_regset, done);
2768
2769 lose = 1;
2770
2771 done:
2772 ;
2773 }
2774 #endif
2775
2776 /* Don't allow old-style asm or volatile extended asms to be accepted
2777 for cross jumping purposes. It is conceptually correct to allow
2778 them, since cross-jumping preserves the dynamic instruction order
2779 even though it is changing the static instruction order. However,
2780 if an asm is being used to emit an assembler pseudo-op, such as
2781 the MIPS `.set reorder' pseudo-op, then the static instruction order
2782 matters and it must be preserved. */
2783 if (GET_CODE (p1) == ASM_INPUT || GET_CODE (p2) == ASM_INPUT
2784 || (GET_CODE (p1) == ASM_OPERANDS && MEM_VOLATILE_P (p1))
2785 || (GET_CODE (p2) == ASM_OPERANDS && MEM_VOLATILE_P (p2)))
2786 lose = 1;
2787
2788 if (lose || GET_CODE (p1) != GET_CODE (p2)
2789 || ! rtx_renumbered_equal_p (p1, p2))
2790 {
2791 /* The following code helps take care of G++ cleanups. */
2792 rtx equiv1;
2793 rtx equiv2;
2794
2795 if (!lose && GET_CODE (p1) == GET_CODE (p2)
2796 && ((equiv1 = find_reg_note (i1, REG_EQUAL, NULL_RTX)) != 0
2797 || (equiv1 = find_reg_note (i1, REG_EQUIV, NULL_RTX)) != 0)
2798 && ((equiv2 = find_reg_note (i2, REG_EQUAL, NULL_RTX)) != 0
2799 || (equiv2 = find_reg_note (i2, REG_EQUIV, NULL_RTX)) != 0)
2800 /* If the equivalences are not to a constant, they may
2801 reference pseudos that no longer exist, so we can't
2802 use them. */
2803 && CONSTANT_P (XEXP (equiv1, 0))
2804 && rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
2805 {
2806 rtx s1 = single_set (i1);
2807 rtx s2 = single_set (i2);
2808 if (s1 != 0 && s2 != 0
2809 && rtx_renumbered_equal_p (SET_DEST (s1), SET_DEST (s2)))
2810 {
2811 validate_change (i1, &SET_SRC (s1), XEXP (equiv1, 0), 1);
2812 validate_change (i2, &SET_SRC (s2), XEXP (equiv2, 0), 1);
2813 if (! rtx_renumbered_equal_p (p1, p2))
2814 cancel_changes (0);
2815 else if (apply_change_group ())
2816 goto win;
2817 }
2818 }
2819
2820 /* Insns fail to match; cross jumping is limited to the following
2821 insns. */
2822
2823 #ifdef HAVE_cc0
2824 /* Don't allow the insn after a compare to be shared by
2825 cross-jumping unless the compare is also shared.
2826 Here, if either of these non-matching insns is a compare,
2827 exclude the following insn from possible cross-jumping. */
2828 if (sets_cc0_p (p1) || sets_cc0_p (p2))
2829 last1 = afterlast1, last2 = afterlast2, ++minimum;
2830 #endif
2831
2832 /* If cross-jumping here will feed a jump-around-jump
2833 optimization, this jump won't cost extra, so reduce
2834 the minimum. */
2835 if (GET_CODE (i1) == JUMP_INSN
2836 && JUMP_LABEL (i1)
2837 && prev_real_insn (JUMP_LABEL (i1)) == e1)
2838 --minimum;
2839 break;
2840 }
2841
2842 win:
2843 if (GET_CODE (p1) != USE && GET_CODE (p1) != CLOBBER)
2844 {
2845 /* Ok, this insn is potentially includable in a cross-jump here. */
2846 afterlast1 = last1, afterlast2 = last2;
2847 last1 = i1, last2 = i2, --minimum;
2848 }
2849 }
2850
2851 if (minimum <= 0 && last1 != 0 && last1 != e1)
2852 *f1 = last1, *f2 = last2;
2853 }
2854
2855 static void
2856 do_cross_jump (insn, newjpos, newlpos)
2857 rtx insn, newjpos, newlpos;
2858 {
2859 /* Find an existing label at this point
2860 or make a new one if there is none. */
2861 register rtx label = get_label_before (newlpos);
2862
2863 /* Make the same jump insn jump to the new point. */
2864 if (GET_CODE (PATTERN (insn)) == RETURN)
2865 {
2866 /* Remove from jump chain of returns. */
2867 delete_from_jump_chain (insn);
2868 /* Change the insn. */
2869 PATTERN (insn) = gen_jump (label);
2870 INSN_CODE (insn) = -1;
2871 JUMP_LABEL (insn) = label;
2872 LABEL_NUSES (label)++;
2873 /* Add to new the jump chain. */
2874 if (INSN_UID (label) < max_jump_chain
2875 && INSN_UID (insn) < max_jump_chain)
2876 {
2877 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (label)];
2878 jump_chain[INSN_UID (label)] = insn;
2879 }
2880 }
2881 else
2882 redirect_jump (insn, label);
2883
2884 /* Delete the matching insns before the jump. Also, remove any REG_EQUAL
2885 or REG_EQUIV note in the NEWLPOS stream that isn't also present in
2886 the NEWJPOS stream. */
2887
2888 while (newjpos != insn)
2889 {
2890 rtx lnote;
2891
2892 for (lnote = REG_NOTES (newlpos); lnote; lnote = XEXP (lnote, 1))
2893 if ((REG_NOTE_KIND (lnote) == REG_EQUAL
2894 || REG_NOTE_KIND (lnote) == REG_EQUIV)
2895 && ! find_reg_note (newjpos, REG_EQUAL, XEXP (lnote, 0))
2896 && ! find_reg_note (newjpos, REG_EQUIV, XEXP (lnote, 0)))
2897 remove_note (newlpos, lnote);
2898
2899 delete_insn (newjpos);
2900 newjpos = next_real_insn (newjpos);
2901 newlpos = next_real_insn (newlpos);
2902 }
2903 }
2904 \f
2905 /* Return the label before INSN, or put a new label there. */
2906
2907 rtx
2908 get_label_before (insn)
2909 rtx insn;
2910 {
2911 rtx label;
2912
2913 /* Find an existing label at this point
2914 or make a new one if there is none. */
2915 label = prev_nonnote_insn (insn);
2916
2917 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2918 {
2919 rtx prev = PREV_INSN (insn);
2920
2921 label = gen_label_rtx ();
2922 emit_label_after (label, prev);
2923 LABEL_NUSES (label) = 0;
2924 }
2925 return label;
2926 }
2927
2928 /* Return the label after INSN, or put a new label there. */
2929
2930 rtx
2931 get_label_after (insn)
2932 rtx insn;
2933 {
2934 rtx label;
2935
2936 /* Find an existing label at this point
2937 or make a new one if there is none. */
2938 label = next_nonnote_insn (insn);
2939
2940 if (label == 0 || GET_CODE (label) != CODE_LABEL)
2941 {
2942 label = gen_label_rtx ();
2943 emit_label_after (label, insn);
2944 LABEL_NUSES (label) = 0;
2945 }
2946 return label;
2947 }
2948 \f
2949 /* Return 1 if INSN is a jump that jumps to right after TARGET
2950 only on the condition that TARGET itself would drop through.
2951 Assumes that TARGET is a conditional jump. */
2952
2953 static int
2954 jump_back_p (insn, target)
2955 rtx insn, target;
2956 {
2957 rtx cinsn, ctarget;
2958 enum rtx_code codei, codet;
2959
2960 if (simplejump_p (insn) || ! condjump_p (insn)
2961 || simplejump_p (target)
2962 || target != prev_real_insn (JUMP_LABEL (insn)))
2963 return 0;
2964
2965 cinsn = XEXP (SET_SRC (PATTERN (insn)), 0);
2966 ctarget = XEXP (SET_SRC (PATTERN (target)), 0);
2967
2968 codei = GET_CODE (cinsn);
2969 codet = GET_CODE (ctarget);
2970
2971 if (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx)
2972 {
2973 if (! can_reverse_comparison_p (cinsn, insn))
2974 return 0;
2975 codei = reverse_condition (codei);
2976 }
2977
2978 if (XEXP (SET_SRC (PATTERN (target)), 2) == pc_rtx)
2979 {
2980 if (! can_reverse_comparison_p (ctarget, target))
2981 return 0;
2982 codet = reverse_condition (codet);
2983 }
2984
2985 return (codei == codet
2986 && rtx_renumbered_equal_p (XEXP (cinsn, 0), XEXP (ctarget, 0))
2987 && rtx_renumbered_equal_p (XEXP (cinsn, 1), XEXP (ctarget, 1)));
2988 }
2989 \f
2990 /* Given a comparison, COMPARISON, inside a conditional jump insn, INSN,
2991 return non-zero if it is safe to reverse this comparison. It is if our
2992 floating-point is not IEEE, if this is an NE or EQ comparison, or if
2993 this is known to be an integer comparison. */
2994
2995 int
2996 can_reverse_comparison_p (comparison, insn)
2997 rtx comparison;
2998 rtx insn;
2999 {
3000 rtx arg0;
3001
3002 /* If this is not actually a comparison, we can't reverse it. */
3003 if (GET_RTX_CLASS (GET_CODE (comparison)) != '<')
3004 return 0;
3005
3006 if (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3007 /* If this is an NE comparison, it is safe to reverse it to an EQ
3008 comparison and vice versa, even for floating point. If no operands
3009 are NaNs, the reversal is valid. If some operand is a NaN, EQ is
3010 always false and NE is always true, so the reversal is also valid. */
3011 || flag_fast_math
3012 || GET_CODE (comparison) == NE
3013 || GET_CODE (comparison) == EQ)
3014 return 1;
3015
3016 arg0 = XEXP (comparison, 0);
3017
3018 /* Make sure ARG0 is one of the actual objects being compared. If we
3019 can't do this, we can't be sure the comparison can be reversed.
3020
3021 Handle cc0 and a MODE_CC register. */
3022 if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC)
3023 #ifdef HAVE_cc0
3024 || arg0 == cc0_rtx
3025 #endif
3026 )
3027 {
3028 rtx prev = prev_nonnote_insn (insn);
3029 rtx set = single_set (prev);
3030
3031 if (set == 0 || SET_DEST (set) != arg0)
3032 return 0;
3033
3034 arg0 = SET_SRC (set);
3035
3036 if (GET_CODE (arg0) == COMPARE)
3037 arg0 = XEXP (arg0, 0);
3038 }
3039
3040 /* We can reverse this if ARG0 is a CONST_INT or if its mode is
3041 not VOIDmode and neither a MODE_CC nor MODE_FLOAT type. */
3042 return (GET_CODE (arg0) == CONST_INT
3043 || (GET_MODE (arg0) != VOIDmode
3044 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_CC
3045 && GET_MODE_CLASS (GET_MODE (arg0)) != MODE_FLOAT));
3046 }
3047
3048 /* Given an rtx-code for a comparison, return the code
3049 for the negated comparison.
3050 WATCH OUT! reverse_condition is not safe to use on a jump
3051 that might be acting on the results of an IEEE floating point comparison,
3052 because of the special treatment of non-signaling nans in comparisons.
3053 Use can_reverse_comparison_p to be sure. */
3054
3055 enum rtx_code
3056 reverse_condition (code)
3057 enum rtx_code code;
3058 {
3059 switch (code)
3060 {
3061 case EQ:
3062 return NE;
3063
3064 case NE:
3065 return EQ;
3066
3067 case GT:
3068 return LE;
3069
3070 case GE:
3071 return LT;
3072
3073 case LT:
3074 return GE;
3075
3076 case LE:
3077 return GT;
3078
3079 case GTU:
3080 return LEU;
3081
3082 case GEU:
3083 return LTU;
3084
3085 case LTU:
3086 return GEU;
3087
3088 case LEU:
3089 return GTU;
3090
3091 default:
3092 abort ();
3093 return UNKNOWN;
3094 }
3095 }
3096
3097 /* Similar, but return the code when two operands of a comparison are swapped.
3098 This IS safe for IEEE floating-point. */
3099
3100 enum rtx_code
3101 swap_condition (code)
3102 enum rtx_code code;
3103 {
3104 switch (code)
3105 {
3106 case EQ:
3107 case NE:
3108 return code;
3109
3110 case GT:
3111 return LT;
3112
3113 case GE:
3114 return LE;
3115
3116 case LT:
3117 return GT;
3118
3119 case LE:
3120 return GE;
3121
3122 case GTU:
3123 return LTU;
3124
3125 case GEU:
3126 return LEU;
3127
3128 case LTU:
3129 return GTU;
3130
3131 case LEU:
3132 return GEU;
3133
3134 default:
3135 abort ();
3136 return UNKNOWN;
3137 }
3138 }
3139
3140 /* Given a comparison CODE, return the corresponding unsigned comparison.
3141 If CODE is an equality comparison or already an unsigned comparison,
3142 CODE is returned. */
3143
3144 enum rtx_code
3145 unsigned_condition (code)
3146 enum rtx_code code;
3147 {
3148 switch (code)
3149 {
3150 case EQ:
3151 case NE:
3152 case GTU:
3153 case GEU:
3154 case LTU:
3155 case LEU:
3156 return code;
3157
3158 case GT:
3159 return GTU;
3160
3161 case GE:
3162 return GEU;
3163
3164 case LT:
3165 return LTU;
3166
3167 case LE:
3168 return LEU;
3169
3170 default:
3171 abort ();
3172 }
3173 }
3174
3175 /* Similarly, return the signed version of a comparison. */
3176
3177 enum rtx_code
3178 signed_condition (code)
3179 enum rtx_code code;
3180 {
3181 switch (code)
3182 {
3183 case EQ:
3184 case NE:
3185 case GT:
3186 case GE:
3187 case LT:
3188 case LE:
3189 return code;
3190
3191 case GTU:
3192 return GT;
3193
3194 case GEU:
3195 return GE;
3196
3197 case LTU:
3198 return LT;
3199
3200 case LEU:
3201 return LE;
3202
3203 default:
3204 abort ();
3205 }
3206 }
3207 \f
3208 /* Return non-zero if CODE1 is more strict than CODE2, i.e., if the
3209 truth of CODE1 implies the truth of CODE2. */
3210
3211 int
3212 comparison_dominates_p (code1, code2)
3213 enum rtx_code code1, code2;
3214 {
3215 if (code1 == code2)
3216 return 1;
3217
3218 switch (code1)
3219 {
3220 case EQ:
3221 if (code2 == LE || code2 == LEU || code2 == GE || code2 == GEU)
3222 return 1;
3223 break;
3224
3225 case LT:
3226 if (code2 == LE || code2 == NE)
3227 return 1;
3228 break;
3229
3230 case GT:
3231 if (code2 == GE || code2 == NE)
3232 return 1;
3233 break;
3234
3235 case LTU:
3236 if (code2 == LEU || code2 == NE)
3237 return 1;
3238 break;
3239
3240 case GTU:
3241 if (code2 == GEU || code2 == NE)
3242 return 1;
3243 break;
3244
3245 default:
3246 break;
3247 }
3248
3249 return 0;
3250 }
3251 \f
3252 /* Return 1 if INSN is an unconditional jump and nothing else. */
3253
3254 int
3255 simplejump_p (insn)
3256 rtx insn;
3257 {
3258 return (GET_CODE (insn) == JUMP_INSN
3259 && GET_CODE (PATTERN (insn)) == SET
3260 && GET_CODE (SET_DEST (PATTERN (insn))) == PC
3261 && GET_CODE (SET_SRC (PATTERN (insn))) == LABEL_REF);
3262 }
3263
3264 /* Return nonzero if INSN is a (possibly) conditional jump
3265 and nothing more. */
3266
3267 int
3268 condjump_p (insn)
3269 rtx insn;
3270 {
3271 register rtx x = PATTERN (insn);
3272 if (GET_CODE (x) != SET)
3273 return 0;
3274 if (GET_CODE (SET_DEST (x)) != PC)
3275 return 0;
3276 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3277 return 1;
3278 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3279 return 0;
3280 if (XEXP (SET_SRC (x), 2) == pc_rtx
3281 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3282 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3283 return 1;
3284 if (XEXP (SET_SRC (x), 1) == pc_rtx
3285 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3286 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3287 return 1;
3288 return 0;
3289 }
3290
3291 /* Return nonzero if INSN is a (possibly) conditional jump
3292 and nothing more. */
3293
3294 int
3295 condjump_in_parallel_p (insn)
3296 rtx insn;
3297 {
3298 register rtx x = PATTERN (insn);
3299
3300 if (GET_CODE (x) != PARALLEL)
3301 return 0;
3302 else
3303 x = XVECEXP (x, 0, 0);
3304
3305 if (GET_CODE (x) != SET)
3306 return 0;
3307 if (GET_CODE (SET_DEST (x)) != PC)
3308 return 0;
3309 if (GET_CODE (SET_SRC (x)) == LABEL_REF)
3310 return 1;
3311 if (GET_CODE (SET_SRC (x)) != IF_THEN_ELSE)
3312 return 0;
3313 if (XEXP (SET_SRC (x), 2) == pc_rtx
3314 && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
3315 || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
3316 return 1;
3317 if (XEXP (SET_SRC (x), 1) == pc_rtx
3318 && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
3319 || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
3320 return 1;
3321 return 0;
3322 }
3323
3324 /* Return 1 if X is an RTX that does nothing but set the condition codes
3325 and CLOBBER or USE registers.
3326 Return -1 if X does explicitly set the condition codes,
3327 but also does other things. */
3328
3329 int
3330 sets_cc0_p (x)
3331 rtx x ATTRIBUTE_UNUSED;
3332 {
3333 #ifdef HAVE_cc0
3334 if (GET_CODE (x) == SET && SET_DEST (x) == cc0_rtx)
3335 return 1;
3336 if (GET_CODE (x) == PARALLEL)
3337 {
3338 int i;
3339 int sets_cc0 = 0;
3340 int other_things = 0;
3341 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
3342 {
3343 if (GET_CODE (XVECEXP (x, 0, i)) == SET
3344 && SET_DEST (XVECEXP (x, 0, i)) == cc0_rtx)
3345 sets_cc0 = 1;
3346 else if (GET_CODE (XVECEXP (x, 0, i)) == SET)
3347 other_things = 1;
3348 }
3349 return ! sets_cc0 ? 0 : other_things ? -1 : 1;
3350 }
3351 return 0;
3352 #else
3353 abort ();
3354 #endif
3355 }
3356 \f
3357 /* Follow any unconditional jump at LABEL;
3358 return the ultimate label reached by any such chain of jumps.
3359 If LABEL is not followed by a jump, return LABEL.
3360 If the chain loops or we can't find end, return LABEL,
3361 since that tells caller to avoid changing the insn.
3362
3363 If RELOAD_COMPLETED is 0, we do not chain across a NOTE_INSN_LOOP_BEG or
3364 a USE or CLOBBER. */
3365
3366 rtx
3367 follow_jumps (label)
3368 rtx label;
3369 {
3370 register rtx insn;
3371 register rtx next;
3372 register rtx value = label;
3373 register int depth;
3374
3375 for (depth = 0;
3376 (depth < 10
3377 && (insn = next_active_insn (value)) != 0
3378 && GET_CODE (insn) == JUMP_INSN
3379 && ((JUMP_LABEL (insn) != 0 && simplejump_p (insn))
3380 || GET_CODE (PATTERN (insn)) == RETURN)
3381 && (next = NEXT_INSN (insn))
3382 && GET_CODE (next) == BARRIER);
3383 depth++)
3384 {
3385 /* Don't chain through the insn that jumps into a loop
3386 from outside the loop,
3387 since that would create multiple loop entry jumps
3388 and prevent loop optimization. */
3389 rtx tem;
3390 if (!reload_completed)
3391 for (tem = value; tem != insn; tem = NEXT_INSN (tem))
3392 if (GET_CODE (tem) == NOTE
3393 && (NOTE_LINE_NUMBER (tem) == NOTE_INSN_LOOP_BEG
3394 /* ??? Optional. Disables some optimizations, but makes
3395 gcov output more accurate with -O. */
3396 || (flag_test_coverage && NOTE_LINE_NUMBER (tem) > 0)))
3397 return value;
3398
3399 /* If we have found a cycle, make the insn jump to itself. */
3400 if (JUMP_LABEL (insn) == label)
3401 return label;
3402
3403 tem = next_active_insn (JUMP_LABEL (insn));
3404 if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
3405 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
3406 break;
3407
3408 value = JUMP_LABEL (insn);
3409 }
3410 if (depth == 10)
3411 return label;
3412 return value;
3413 }
3414
3415 /* Assuming that field IDX of X is a vector of label_refs,
3416 replace each of them by the ultimate label reached by it.
3417 Return nonzero if a change is made.
3418 If IGNORE_LOOPS is 0, we do not chain across a NOTE_INSN_LOOP_BEG. */
3419
3420 static int
3421 tension_vector_labels (x, idx)
3422 register rtx x;
3423 register int idx;
3424 {
3425 int changed = 0;
3426 register int i;
3427 for (i = XVECLEN (x, idx) - 1; i >= 0; i--)
3428 {
3429 register rtx olabel = XEXP (XVECEXP (x, idx, i), 0);
3430 register rtx nlabel = follow_jumps (olabel);
3431 if (nlabel && nlabel != olabel)
3432 {
3433 XEXP (XVECEXP (x, idx, i), 0) = nlabel;
3434 ++LABEL_NUSES (nlabel);
3435 if (--LABEL_NUSES (olabel) == 0)
3436 delete_insn (olabel);
3437 changed = 1;
3438 }
3439 }
3440 return changed;
3441 }
3442 \f
3443 /* Find all CODE_LABELs referred to in X, and increment their use counts.
3444 If INSN is a JUMP_INSN and there is at least one CODE_LABEL referenced
3445 in INSN, then store one of them in JUMP_LABEL (INSN).
3446 If INSN is an INSN or a CALL_INSN and there is at least one CODE_LABEL
3447 referenced in INSN, add a REG_LABEL note containing that label to INSN.
3448 Also, when there are consecutive labels, canonicalize on the last of them.
3449
3450 Note that two labels separated by a loop-beginning note
3451 must be kept distinct if we have not yet done loop-optimization,
3452 because the gap between them is where loop-optimize
3453 will want to move invariant code to. CROSS_JUMP tells us
3454 that loop-optimization is done with.
3455
3456 Once reload has completed (CROSS_JUMP non-zero), we need not consider
3457 two labels distinct if they are separated by only USE or CLOBBER insns. */
3458
3459 static void
3460 mark_jump_label (x, insn, cross_jump)
3461 register rtx x;
3462 rtx insn;
3463 int cross_jump;
3464 {
3465 register RTX_CODE code = GET_CODE (x);
3466 register int i;
3467 register char *fmt;
3468
3469 switch (code)
3470 {
3471 case PC:
3472 case CC0:
3473 case REG:
3474 case SUBREG:
3475 case CONST_INT:
3476 case SYMBOL_REF:
3477 case CONST_DOUBLE:
3478 case CLOBBER:
3479 case CALL:
3480 return;
3481
3482 case MEM:
3483 /* If this is a constant-pool reference, see if it is a label. */
3484 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF
3485 && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
3486 mark_jump_label (get_pool_constant (XEXP (x, 0)), insn, cross_jump);
3487 break;
3488
3489 case LABEL_REF:
3490 {
3491 rtx label = XEXP (x, 0);
3492 rtx olabel = label;
3493 rtx note;
3494 rtx next;
3495
3496 if (GET_CODE (label) != CODE_LABEL)
3497 abort ();
3498
3499 /* Ignore references to labels of containing functions. */
3500 if (LABEL_REF_NONLOCAL_P (x))
3501 break;
3502
3503 /* If there are other labels following this one,
3504 replace it with the last of the consecutive labels. */
3505 for (next = NEXT_INSN (label); next; next = NEXT_INSN (next))
3506 {
3507 if (GET_CODE (next) == CODE_LABEL)
3508 label = next;
3509 else if (cross_jump && GET_CODE (next) == INSN
3510 && (GET_CODE (PATTERN (next)) == USE
3511 || GET_CODE (PATTERN (next)) == CLOBBER))
3512 continue;
3513 else if (GET_CODE (next) != NOTE)
3514 break;
3515 else if (! cross_jump
3516 && (NOTE_LINE_NUMBER (next) == NOTE_INSN_LOOP_BEG
3517 || NOTE_LINE_NUMBER (next) == NOTE_INSN_FUNCTION_END
3518 /* ??? Optional. Disables some optimizations, but
3519 makes gcov output more accurate with -O. */
3520 || (flag_test_coverage && NOTE_LINE_NUMBER (next) > 0)))
3521 break;
3522 }
3523
3524 XEXP (x, 0) = label;
3525 if (! insn || ! INSN_DELETED_P (insn))
3526 ++LABEL_NUSES (label);
3527
3528 if (insn)
3529 {
3530 if (GET_CODE (insn) == JUMP_INSN)
3531 JUMP_LABEL (insn) = label;
3532
3533 /* If we've changed OLABEL and we had a REG_LABEL note
3534 for it, update it as well. */
3535 else if (label != olabel
3536 && (note = find_reg_note (insn, REG_LABEL, olabel)) != 0)
3537 XEXP (note, 0) = label;
3538
3539 /* Otherwise, add a REG_LABEL note for LABEL unless there already
3540 is one. */
3541 else if (! find_reg_note (insn, REG_LABEL, label))
3542 {
3543 /* This code used to ignore labels which refered to dispatch
3544 tables to avoid flow.c generating worse code.
3545
3546 However, in the presense of global optimizations like
3547 gcse which call find_basic_blocks without calling
3548 life_analysis, not recording such labels will lead
3549 to compiler aborts because of inconsistencies in the
3550 flow graph. So we go ahead and record the label.
3551
3552 It may also be the case that the optimization argument
3553 is no longer valid because of the more accurate cfg
3554 we build in find_basic_blocks -- it no longer pessimizes
3555 code when it finds a REG_LABEL note. */
3556 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_LABEL, label,
3557 REG_NOTES (insn));
3558 }
3559 }
3560 return;
3561 }
3562
3563 /* Do walk the labels in a vector, but not the first operand of an
3564 ADDR_DIFF_VEC. Don't set the JUMP_LABEL of a vector. */
3565 case ADDR_VEC:
3566 case ADDR_DIFF_VEC:
3567 if (! INSN_DELETED_P (insn))
3568 {
3569 int eltnum = code == ADDR_DIFF_VEC ? 1 : 0;
3570
3571 for (i = 0; i < XVECLEN (x, eltnum); i++)
3572 mark_jump_label (XVECEXP (x, eltnum, i), NULL_RTX, cross_jump);
3573 }
3574 return;
3575
3576 default:
3577 break;
3578 }
3579
3580 fmt = GET_RTX_FORMAT (code);
3581 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3582 {
3583 if (fmt[i] == 'e')
3584 mark_jump_label (XEXP (x, i), insn, cross_jump);
3585 else if (fmt[i] == 'E')
3586 {
3587 register int j;
3588 for (j = 0; j < XVECLEN (x, i); j++)
3589 mark_jump_label (XVECEXP (x, i, j), insn, cross_jump);
3590 }
3591 }
3592 }
3593
3594 /* If all INSN does is set the pc, delete it,
3595 and delete the insn that set the condition codes for it
3596 if that's what the previous thing was. */
3597
3598 void
3599 delete_jump (insn)
3600 rtx insn;
3601 {
3602 register rtx set = single_set (insn);
3603
3604 if (set && GET_CODE (SET_DEST (set)) == PC)
3605 delete_computation (insn);
3606 }
3607
3608 /* Delete INSN and recursively delete insns that compute values used only
3609 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3610 If we are running before flow.c, we need do nothing since flow.c will
3611 delete dead code. We also can't know if the registers being used are
3612 dead or not at this point.
3613
3614 Otherwise, look at all our REG_DEAD notes. If a previous insn does
3615 nothing other than set a register that dies in this insn, we can delete
3616 that insn as well.
3617
3618 On machines with CC0, if CC0 is used in this insn, we may be able to
3619 delete the insn that set it. */
3620
3621 static void
3622 delete_computation (insn)
3623 rtx insn;
3624 {
3625 rtx note, next;
3626
3627 #ifdef HAVE_cc0
3628 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3629 {
3630 rtx prev = prev_nonnote_insn (insn);
3631 /* We assume that at this stage
3632 CC's are always set explicitly
3633 and always immediately before the jump that
3634 will use them. So if the previous insn
3635 exists to set the CC's, delete it
3636 (unless it performs auto-increments, etc.). */
3637 if (prev && GET_CODE (prev) == INSN
3638 && sets_cc0_p (PATTERN (prev)))
3639 {
3640 if (sets_cc0_p (PATTERN (prev)) > 0
3641 && !FIND_REG_INC_NOTE (prev, NULL_RTX))
3642 delete_computation (prev);
3643 else
3644 /* Otherwise, show that cc0 won't be used. */
3645 REG_NOTES (prev) = gen_rtx_EXPR_LIST (REG_UNUSED,
3646 cc0_rtx, REG_NOTES (prev));
3647 }
3648 }
3649 #endif
3650
3651 for (note = REG_NOTES (insn); note; note = next)
3652 {
3653 rtx our_prev;
3654
3655 next = XEXP (note, 1);
3656
3657 if (REG_NOTE_KIND (note) != REG_DEAD
3658 /* Verify that the REG_NOTE is legitimate. */
3659 || GET_CODE (XEXP (note, 0)) != REG)
3660 continue;
3661
3662 for (our_prev = prev_nonnote_insn (insn);
3663 our_prev && GET_CODE (our_prev) == INSN;
3664 our_prev = prev_nonnote_insn (our_prev))
3665 {
3666 /* If we reach a SEQUENCE, it is too complex to try to
3667 do anything with it, so give up. */
3668 if (GET_CODE (PATTERN (our_prev)) == SEQUENCE)
3669 break;
3670
3671 if (GET_CODE (PATTERN (our_prev)) == USE
3672 && GET_CODE (XEXP (PATTERN (our_prev), 0)) == INSN)
3673 /* reorg creates USEs that look like this. We leave them
3674 alone because reorg needs them for its own purposes. */
3675 break;
3676
3677 if (reg_set_p (XEXP (note, 0), PATTERN (our_prev)))
3678 {
3679 if (FIND_REG_INC_NOTE (our_prev, NULL_RTX))
3680 break;
3681
3682 if (GET_CODE (PATTERN (our_prev)) == PARALLEL)
3683 {
3684 /* If we find a SET of something else, we can't
3685 delete the insn. */
3686
3687 int i;
3688
3689 for (i = 0; i < XVECLEN (PATTERN (our_prev), 0); i++)
3690 {
3691 rtx part = XVECEXP (PATTERN (our_prev), 0, i);
3692
3693 if (GET_CODE (part) == SET
3694 && SET_DEST (part) != XEXP (note, 0))
3695 break;
3696 }
3697
3698 if (i == XVECLEN (PATTERN (our_prev), 0))
3699 delete_computation (our_prev);
3700 }
3701 else if (GET_CODE (PATTERN (our_prev)) == SET
3702 && SET_DEST (PATTERN (our_prev)) == XEXP (note, 0))
3703 delete_computation (our_prev);
3704
3705 break;
3706 }
3707
3708 /* If OUR_PREV references the register that dies here, it is an
3709 additional use. Hence any prior SET isn't dead. However, this
3710 insn becomes the new place for the REG_DEAD note. */
3711 if (reg_overlap_mentioned_p (XEXP (note, 0),
3712 PATTERN (our_prev)))
3713 {
3714 XEXP (note, 1) = REG_NOTES (our_prev);
3715 REG_NOTES (our_prev) = note;
3716 break;
3717 }
3718 }
3719 }
3720
3721 delete_insn (insn);
3722 }
3723 \f
3724 /* Delete insn INSN from the chain of insns and update label ref counts.
3725 May delete some following insns as a consequence; may even delete
3726 a label elsewhere and insns that follow it.
3727
3728 Returns the first insn after INSN that was not deleted. */
3729
3730 rtx
3731 delete_insn (insn)
3732 register rtx insn;
3733 {
3734 register rtx next = NEXT_INSN (insn);
3735 register rtx prev = PREV_INSN (insn);
3736 register int was_code_label = (GET_CODE (insn) == CODE_LABEL);
3737 register int dont_really_delete = 0;
3738
3739 while (next && INSN_DELETED_P (next))
3740 next = NEXT_INSN (next);
3741
3742 /* This insn is already deleted => return first following nondeleted. */
3743 if (INSN_DELETED_P (insn))
3744 return next;
3745
3746 /* Don't delete user-declared labels. Convert them to special NOTEs
3747 instead. */
3748 if (was_code_label && LABEL_NAME (insn) != 0
3749 && optimize && ! dont_really_delete)
3750 {
3751 PUT_CODE (insn, NOTE);
3752 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED_LABEL;
3753 NOTE_SOURCE_FILE (insn) = 0;
3754 dont_really_delete = 1;
3755 }
3756 else
3757 /* Mark this insn as deleted. */
3758 INSN_DELETED_P (insn) = 1;
3759
3760 /* If this is an unconditional jump, delete it from the jump chain. */
3761 if (simplejump_p (insn))
3762 delete_from_jump_chain (insn);
3763
3764 /* If instruction is followed by a barrier,
3765 delete the barrier too. */
3766
3767 if (next != 0 && GET_CODE (next) == BARRIER)
3768 {
3769 INSN_DELETED_P (next) = 1;
3770 next = NEXT_INSN (next);
3771 }
3772
3773 /* Patch out INSN (and the barrier if any) */
3774
3775 if (optimize && ! dont_really_delete)
3776 {
3777 if (prev)
3778 {
3779 NEXT_INSN (prev) = next;
3780 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3781 NEXT_INSN (XVECEXP (PATTERN (prev), 0,
3782 XVECLEN (PATTERN (prev), 0) - 1)) = next;
3783 }
3784
3785 if (next)
3786 {
3787 PREV_INSN (next) = prev;
3788 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3789 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3790 }
3791
3792 if (prev && NEXT_INSN (prev) == 0)
3793 set_last_insn (prev);
3794 }
3795
3796 /* If deleting a jump, decrement the count of the label,
3797 and delete the label if it is now unused. */
3798
3799 if (GET_CODE (insn) == JUMP_INSN && JUMP_LABEL (insn))
3800 if (--LABEL_NUSES (JUMP_LABEL (insn)) == 0)
3801 {
3802 /* This can delete NEXT or PREV,
3803 either directly if NEXT is JUMP_LABEL (INSN),
3804 or indirectly through more levels of jumps. */
3805 delete_insn (JUMP_LABEL (insn));
3806 /* I feel a little doubtful about this loop,
3807 but I see no clean and sure alternative way
3808 to find the first insn after INSN that is not now deleted.
3809 I hope this works. */
3810 while (next && INSN_DELETED_P (next))
3811 next = NEXT_INSN (next);
3812 return next;
3813 }
3814
3815 /* Likewise if we're deleting a dispatch table. */
3816
3817 if (GET_CODE (insn) == JUMP_INSN
3818 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3819 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3820 {
3821 rtx pat = PATTERN (insn);
3822 int i, diff_vec_p = GET_CODE (pat) == ADDR_DIFF_VEC;
3823 int len = XVECLEN (pat, diff_vec_p);
3824
3825 for (i = 0; i < len; i++)
3826 if (--LABEL_NUSES (XEXP (XVECEXP (pat, diff_vec_p, i), 0)) == 0)
3827 delete_insn (XEXP (XVECEXP (pat, diff_vec_p, i), 0));
3828 while (next && INSN_DELETED_P (next))
3829 next = NEXT_INSN (next);
3830 return next;
3831 }
3832
3833 while (prev && (INSN_DELETED_P (prev) || GET_CODE (prev) == NOTE))
3834 prev = PREV_INSN (prev);
3835
3836 /* If INSN was a label and a dispatch table follows it,
3837 delete the dispatch table. The tablejump must have gone already.
3838 It isn't useful to fall through into a table. */
3839
3840 if (was_code_label
3841 && NEXT_INSN (insn) != 0
3842 && GET_CODE (NEXT_INSN (insn)) == JUMP_INSN
3843 && (GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_VEC
3844 || GET_CODE (PATTERN (NEXT_INSN (insn))) == ADDR_DIFF_VEC))
3845 next = delete_insn (NEXT_INSN (insn));
3846
3847 /* If INSN was a label, delete insns following it if now unreachable. */
3848
3849 if (was_code_label && prev && GET_CODE (prev) == BARRIER)
3850 {
3851 register RTX_CODE code;
3852 while (next != 0
3853 && (GET_RTX_CLASS (code = GET_CODE (next)) == 'i'
3854 || code == NOTE || code == BARRIER
3855 || (code == CODE_LABEL && INSN_DELETED_P (next))))
3856 {
3857 if (code == NOTE
3858 && NOTE_LINE_NUMBER (next) != NOTE_INSN_FUNCTION_END)
3859 next = NEXT_INSN (next);
3860 /* Keep going past other deleted labels to delete what follows. */
3861 else if (code == CODE_LABEL && INSN_DELETED_P (next))
3862 next = NEXT_INSN (next);
3863 else
3864 /* Note: if this deletes a jump, it can cause more
3865 deletion of unreachable code, after a different label.
3866 As long as the value from this recursive call is correct,
3867 this invocation functions correctly. */
3868 next = delete_insn (next);
3869 }
3870 }
3871
3872 return next;
3873 }
3874
3875 /* Advance from INSN till reaching something not deleted
3876 then return that. May return INSN itself. */
3877
3878 rtx
3879 next_nondeleted_insn (insn)
3880 rtx insn;
3881 {
3882 while (INSN_DELETED_P (insn))
3883 insn = NEXT_INSN (insn);
3884 return insn;
3885 }
3886 \f
3887 /* Delete a range of insns from FROM to TO, inclusive.
3888 This is for the sake of peephole optimization, so assume
3889 that whatever these insns do will still be done by a new
3890 peephole insn that will replace them. */
3891
3892 void
3893 delete_for_peephole (from, to)
3894 register rtx from, to;
3895 {
3896 register rtx insn = from;
3897
3898 while (1)
3899 {
3900 register rtx next = NEXT_INSN (insn);
3901 register rtx prev = PREV_INSN (insn);
3902
3903 if (GET_CODE (insn) != NOTE)
3904 {
3905 INSN_DELETED_P (insn) = 1;
3906
3907 /* Patch this insn out of the chain. */
3908 /* We don't do this all at once, because we
3909 must preserve all NOTEs. */
3910 if (prev)
3911 NEXT_INSN (prev) = next;
3912
3913 if (next)
3914 PREV_INSN (next) = prev;
3915 }
3916
3917 if (insn == to)
3918 break;
3919 insn = next;
3920 }
3921
3922 /* Note that if TO is an unconditional jump
3923 we *do not* delete the BARRIER that follows,
3924 since the peephole that replaces this sequence
3925 is also an unconditional jump in that case. */
3926 }
3927 \f
3928 /* Invert the condition of the jump JUMP, and make it jump
3929 to label NLABEL instead of where it jumps now. */
3930
3931 int
3932 invert_jump (jump, nlabel)
3933 rtx jump, nlabel;
3934 {
3935 /* We have to either invert the condition and change the label or
3936 do neither. Either operation could fail. We first try to invert
3937 the jump. If that succeeds, we try changing the label. If that fails,
3938 we invert the jump back to what it was. */
3939
3940 if (! invert_exp (PATTERN (jump), jump))
3941 return 0;
3942
3943 if (redirect_jump (jump, nlabel))
3944 {
3945 if (flag_branch_probabilities)
3946 {
3947 rtx note = find_reg_note (jump, REG_BR_PROB, 0);
3948
3949 /* An inverted jump means that a probability taken becomes a
3950 probability not taken. Subtract the branch probability from the
3951 probability base to convert it back to a taken probability.
3952 (We don't flip the probability on a branch that's never taken. */
3953 if (note && XINT (XEXP (note, 0), 0) >= 0)
3954 XINT (XEXP (note, 0), 0) = REG_BR_PROB_BASE - XINT (XEXP (note, 0), 0);
3955 }
3956
3957 return 1;
3958 }
3959
3960 if (! invert_exp (PATTERN (jump), jump))
3961 /* This should just be putting it back the way it was. */
3962 abort ();
3963
3964 return 0;
3965 }
3966
3967 /* Invert the jump condition of rtx X contained in jump insn, INSN.
3968
3969 Return 1 if we can do so, 0 if we cannot find a way to do so that
3970 matches a pattern. */
3971
3972 int
3973 invert_exp (x, insn)
3974 rtx x;
3975 rtx insn;
3976 {
3977 register RTX_CODE code;
3978 register int i;
3979 register char *fmt;
3980
3981 code = GET_CODE (x);
3982
3983 if (code == IF_THEN_ELSE)
3984 {
3985 register rtx comp = XEXP (x, 0);
3986 register rtx tem;
3987
3988 /* We can do this in two ways: The preferable way, which can only
3989 be done if this is not an integer comparison, is to reverse
3990 the comparison code. Otherwise, swap the THEN-part and ELSE-part
3991 of the IF_THEN_ELSE. If we can't do either, fail. */
3992
3993 if (can_reverse_comparison_p (comp, insn)
3994 && validate_change (insn, &XEXP (x, 0),
3995 gen_rtx_fmt_ee (reverse_condition (GET_CODE (comp)),
3996 GET_MODE (comp), XEXP (comp, 0),
3997 XEXP (comp, 1)), 0))
3998 return 1;
3999
4000 tem = XEXP (x, 1);
4001 validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1);
4002 validate_change (insn, &XEXP (x, 2), tem, 1);
4003 return apply_change_group ();
4004 }
4005
4006 fmt = GET_RTX_FORMAT (code);
4007 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4008 {
4009 if (fmt[i] == 'e')
4010 if (! invert_exp (XEXP (x, i), insn))
4011 return 0;
4012 if (fmt[i] == 'E')
4013 {
4014 register int j;
4015 for (j = 0; j < XVECLEN (x, i); j++)
4016 if (!invert_exp (XVECEXP (x, i, j), insn))
4017 return 0;
4018 }
4019 }
4020
4021 return 1;
4022 }
4023 \f
4024 /* Make jump JUMP jump to label NLABEL instead of where it jumps now.
4025 If the old jump target label is unused as a result,
4026 it and the code following it may be deleted.
4027
4028 If NLABEL is zero, we are to turn the jump into a (possibly conditional)
4029 RETURN insn.
4030
4031 The return value will be 1 if the change was made, 0 if it wasn't (this
4032 can only occur for NLABEL == 0). */
4033
4034 int
4035 redirect_jump (jump, nlabel)
4036 rtx jump, nlabel;
4037 {
4038 register rtx olabel = JUMP_LABEL (jump);
4039
4040 if (nlabel == olabel)
4041 return 1;
4042
4043 if (! redirect_exp (&PATTERN (jump), olabel, nlabel, jump))
4044 return 0;
4045
4046 /* If this is an unconditional branch, delete it from the jump_chain of
4047 OLABEL and add it to the jump_chain of NLABEL (assuming both labels
4048 have UID's in range and JUMP_CHAIN is valid). */
4049 if (jump_chain && (simplejump_p (jump)
4050 || GET_CODE (PATTERN (jump)) == RETURN))
4051 {
4052 int label_index = nlabel ? INSN_UID (nlabel) : 0;
4053
4054 delete_from_jump_chain (jump);
4055 if (label_index < max_jump_chain
4056 && INSN_UID (jump) < max_jump_chain)
4057 {
4058 jump_chain[INSN_UID (jump)] = jump_chain[label_index];
4059 jump_chain[label_index] = jump;
4060 }
4061 }
4062
4063 JUMP_LABEL (jump) = nlabel;
4064 if (nlabel)
4065 ++LABEL_NUSES (nlabel);
4066
4067 if (olabel && --LABEL_NUSES (olabel) == 0)
4068 delete_insn (olabel);
4069
4070 return 1;
4071 }
4072
4073 /* Delete the instruction JUMP from any jump chain it might be on. */
4074
4075 static void
4076 delete_from_jump_chain (jump)
4077 rtx jump;
4078 {
4079 int index;
4080 rtx olabel = JUMP_LABEL (jump);
4081
4082 /* Handle unconditional jumps. */
4083 if (jump_chain && olabel != 0
4084 && INSN_UID (olabel) < max_jump_chain
4085 && simplejump_p (jump))
4086 index = INSN_UID (olabel);
4087 /* Handle return insns. */
4088 else if (jump_chain && GET_CODE (PATTERN (jump)) == RETURN)
4089 index = 0;
4090 else return;
4091
4092 if (jump_chain[index] == jump)
4093 jump_chain[index] = jump_chain[INSN_UID (jump)];
4094 else
4095 {
4096 rtx insn;
4097
4098 for (insn = jump_chain[index];
4099 insn != 0;
4100 insn = jump_chain[INSN_UID (insn)])
4101 if (jump_chain[INSN_UID (insn)] == jump)
4102 {
4103 jump_chain[INSN_UID (insn)] = jump_chain[INSN_UID (jump)];
4104 break;
4105 }
4106 }
4107 }
4108
4109 /* If NLABEL is nonzero, throughout the rtx at LOC,
4110 alter (LABEL_REF OLABEL) to (LABEL_REF NLABEL). If OLABEL is
4111 zero, alter (RETURN) to (LABEL_REF NLABEL).
4112
4113 If NLABEL is zero, alter (LABEL_REF OLABEL) to (RETURN) and check
4114 validity with validate_change. Convert (set (pc) (label_ref olabel))
4115 to (return).
4116
4117 Return 0 if we found a change we would like to make but it is invalid.
4118 Otherwise, return 1. */
4119
4120 int
4121 redirect_exp (loc, olabel, nlabel, insn)
4122 rtx *loc;
4123 rtx olabel, nlabel;
4124 rtx insn;
4125 {
4126 register rtx x = *loc;
4127 register RTX_CODE code = GET_CODE (x);
4128 register int i;
4129 register char *fmt;
4130
4131 if (code == LABEL_REF)
4132 {
4133 if (XEXP (x, 0) == olabel)
4134 {
4135 if (nlabel)
4136 XEXP (x, 0) = nlabel;
4137 else
4138 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4139 return 1;
4140 }
4141 }
4142 else if (code == RETURN && olabel == 0)
4143 {
4144 x = gen_rtx_LABEL_REF (VOIDmode, nlabel);
4145 if (loc == &PATTERN (insn))
4146 x = gen_rtx_SET (VOIDmode, pc_rtx, x);
4147 return validate_change (insn, loc, x, 0);
4148 }
4149
4150 if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
4151 && GET_CODE (SET_SRC (x)) == LABEL_REF
4152 && XEXP (SET_SRC (x), 0) == olabel)
4153 return validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 0);
4154
4155 fmt = GET_RTX_FORMAT (code);
4156 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4157 {
4158 if (fmt[i] == 'e')
4159 if (! redirect_exp (&XEXP (x, i), olabel, nlabel, insn))
4160 return 0;
4161 if (fmt[i] == 'E')
4162 {
4163 register int j;
4164 for (j = 0; j < XVECLEN (x, i); j++)
4165 if (! redirect_exp (&XVECEXP (x, i, j), olabel, nlabel, insn))
4166 return 0;
4167 }
4168 }
4169
4170 return 1;
4171 }
4172 \f
4173 /* Make jump JUMP jump to label NLABEL, assuming it used to be a tablejump.
4174
4175 If the old jump target label (before the dispatch table) becomes unused,
4176 it and the dispatch table may be deleted. In that case, find the insn
4177 before the jump references that label and delete it and logical successors
4178 too. */
4179
4180 static void
4181 redirect_tablejump (jump, nlabel)
4182 rtx jump, nlabel;
4183 {
4184 register rtx olabel = JUMP_LABEL (jump);
4185
4186 /* Add this jump to the jump_chain of NLABEL. */
4187 if (jump_chain && INSN_UID (nlabel) < max_jump_chain
4188 && INSN_UID (jump) < max_jump_chain)
4189 {
4190 jump_chain[INSN_UID (jump)] = jump_chain[INSN_UID (nlabel)];
4191 jump_chain[INSN_UID (nlabel)] = jump;
4192 }
4193
4194 PATTERN (jump) = gen_jump (nlabel);
4195 JUMP_LABEL (jump) = nlabel;
4196 ++LABEL_NUSES (nlabel);
4197 INSN_CODE (jump) = -1;
4198
4199 if (--LABEL_NUSES (olabel) == 0)
4200 {
4201 delete_labelref_insn (jump, olabel, 0);
4202 delete_insn (olabel);
4203 }
4204 }
4205
4206 /* Find the insn referencing LABEL that is a logical predecessor of INSN.
4207 If we found one, delete it and then delete this insn if DELETE_THIS is
4208 non-zero. Return non-zero if INSN or a predecessor references LABEL. */
4209
4210 static int
4211 delete_labelref_insn (insn, label, delete_this)
4212 rtx insn, label;
4213 int delete_this;
4214 {
4215 int deleted = 0;
4216 rtx link;
4217
4218 if (GET_CODE (insn) != NOTE
4219 && reg_mentioned_p (label, PATTERN (insn)))
4220 {
4221 if (delete_this)
4222 {
4223 delete_insn (insn);
4224 deleted = 1;
4225 }
4226 else
4227 return 1;
4228 }
4229
4230 for (link = LOG_LINKS (insn); link; link = XEXP (link, 1))
4231 if (delete_labelref_insn (XEXP (link, 0), label, 1))
4232 {
4233 if (delete_this)
4234 {
4235 delete_insn (insn);
4236 deleted = 1;
4237 }
4238 else
4239 return 1;
4240 }
4241
4242 return deleted;
4243 }
4244 \f
4245 /* Like rtx_equal_p except that it considers two REGs as equal
4246 if they renumber to the same value and considers two commutative
4247 operations to be the same if the order of the operands has been
4248 reversed.
4249
4250 ??? Addition is not commutative on the PA due to the weird implicit
4251 space register selection rules for memory addresses. Therefore, we
4252 don't consider a + b == b + a.
4253
4254 We could/should make this test a little tighter. Possibly only
4255 disabling it on the PA via some backend macro or only disabling this
4256 case when the PLUS is inside a MEM. */
4257
4258 int
4259 rtx_renumbered_equal_p (x, y)
4260 rtx x, y;
4261 {
4262 register int i;
4263 register RTX_CODE code = GET_CODE (x);
4264 register char *fmt;
4265
4266 if (x == y)
4267 return 1;
4268
4269 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
4270 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
4271 && GET_CODE (SUBREG_REG (y)) == REG)))
4272 {
4273 int reg_x = -1, reg_y = -1;
4274 int word_x = 0, word_y = 0;
4275
4276 if (GET_MODE (x) != GET_MODE (y))
4277 return 0;
4278
4279 /* If we haven't done any renumbering, don't
4280 make any assumptions. */
4281 if (reg_renumber == 0)
4282 return rtx_equal_p (x, y);
4283
4284 if (code == SUBREG)
4285 {
4286 reg_x = REGNO (SUBREG_REG (x));
4287 word_x = SUBREG_WORD (x);
4288
4289 if (reg_renumber[reg_x] >= 0)
4290 {
4291 reg_x = reg_renumber[reg_x] + word_x;
4292 word_x = 0;
4293 }
4294 }
4295
4296 else
4297 {
4298 reg_x = REGNO (x);
4299 if (reg_renumber[reg_x] >= 0)
4300 reg_x = reg_renumber[reg_x];
4301 }
4302
4303 if (GET_CODE (y) == SUBREG)
4304 {
4305 reg_y = REGNO (SUBREG_REG (y));
4306 word_y = SUBREG_WORD (y);
4307
4308 if (reg_renumber[reg_y] >= 0)
4309 {
4310 reg_y = reg_renumber[reg_y];
4311 word_y = 0;
4312 }
4313 }
4314
4315 else
4316 {
4317 reg_y = REGNO (y);
4318 if (reg_renumber[reg_y] >= 0)
4319 reg_y = reg_renumber[reg_y];
4320 }
4321
4322 return reg_x >= 0 && reg_x == reg_y && word_x == word_y;
4323 }
4324
4325 /* Now we have disposed of all the cases
4326 in which different rtx codes can match. */
4327 if (code != GET_CODE (y))
4328 return 0;
4329
4330 switch (code)
4331 {
4332 case PC:
4333 case CC0:
4334 case ADDR_VEC:
4335 case ADDR_DIFF_VEC:
4336 return 0;
4337
4338 case CONST_INT:
4339 return INTVAL (x) == INTVAL (y);
4340
4341 case LABEL_REF:
4342 /* We can't assume nonlocal labels have their following insns yet. */
4343 if (LABEL_REF_NONLOCAL_P (x) || LABEL_REF_NONLOCAL_P (y))
4344 return XEXP (x, 0) == XEXP (y, 0);
4345
4346 /* Two label-refs are equivalent if they point at labels
4347 in the same position in the instruction stream. */
4348 return (next_real_insn (XEXP (x, 0))
4349 == next_real_insn (XEXP (y, 0)));
4350
4351 case SYMBOL_REF:
4352 return XSTR (x, 0) == XSTR (y, 0);
4353
4354 default:
4355 break;
4356 }
4357
4358 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
4359
4360 if (GET_MODE (x) != GET_MODE (y))
4361 return 0;
4362
4363 /* For commutative operations, the RTX match if the operand match in any
4364 order. Also handle the simple binary and unary cases without a loop.
4365
4366 ??? Don't consider PLUS a commutative operator; see comments above. */
4367 if ((code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4368 && code != PLUS)
4369 return ((rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4370 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)))
4371 || (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 1))
4372 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 0))));
4373 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4374 return (rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0))
4375 && rtx_renumbered_equal_p (XEXP (x, 1), XEXP (y, 1)));
4376 else if (GET_RTX_CLASS (code) == '1')
4377 return rtx_renumbered_equal_p (XEXP (x, 0), XEXP (y, 0));
4378
4379 /* Compare the elements. If any pair of corresponding elements
4380 fail to match, return 0 for the whole things. */
4381
4382 fmt = GET_RTX_FORMAT (code);
4383 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4384 {
4385 register int j;
4386 switch (fmt[i])
4387 {
4388 case 'w':
4389 if (XWINT (x, i) != XWINT (y, i))
4390 return 0;
4391 break;
4392
4393 case 'i':
4394 if (XINT (x, i) != XINT (y, i))
4395 return 0;
4396 break;
4397
4398 case 's':
4399 if (strcmp (XSTR (x, i), XSTR (y, i)))
4400 return 0;
4401 break;
4402
4403 case 'e':
4404 if (! rtx_renumbered_equal_p (XEXP (x, i), XEXP (y, i)))
4405 return 0;
4406 break;
4407
4408 case 'u':
4409 if (XEXP (x, i) != XEXP (y, i))
4410 return 0;
4411 /* fall through. */
4412 case '0':
4413 break;
4414
4415 case 'E':
4416 if (XVECLEN (x, i) != XVECLEN (y, i))
4417 return 0;
4418 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
4419 if (!rtx_renumbered_equal_p (XVECEXP (x, i, j), XVECEXP (y, i, j)))
4420 return 0;
4421 break;
4422
4423 default:
4424 abort ();
4425 }
4426 }
4427 return 1;
4428 }
4429 \f
4430 /* If X is a hard register or equivalent to one or a subregister of one,
4431 return the hard register number. If X is a pseudo register that was not
4432 assigned a hard register, return the pseudo register number. Otherwise,
4433 return -1. Any rtx is valid for X. */
4434
4435 int
4436 true_regnum (x)
4437 rtx x;
4438 {
4439 if (GET_CODE (x) == REG)
4440 {
4441 if (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_renumber[REGNO (x)] >= 0)
4442 return reg_renumber[REGNO (x)];
4443 return REGNO (x);
4444 }
4445 if (GET_CODE (x) == SUBREG)
4446 {
4447 int base = true_regnum (SUBREG_REG (x));
4448 if (base >= 0 && base < FIRST_PSEUDO_REGISTER)
4449 return SUBREG_WORD (x) + base;
4450 }
4451 return -1;
4452 }
4453 \f
4454 /* Optimize code of the form:
4455
4456 for (x = a[i]; x; ...)
4457 ...
4458 for (x = a[i]; x; ...)
4459 ...
4460 foo:
4461
4462 Loop optimize will change the above code into
4463
4464 if (x = a[i])
4465 for (;;)
4466 { ...; if (! (x = ...)) break; }
4467 if (x = a[i])
4468 for (;;)
4469 { ...; if (! (x = ...)) break; }
4470 foo:
4471
4472 In general, if the first test fails, the program can branch
4473 directly to `foo' and skip the second try which is doomed to fail.
4474 We run this after loop optimization and before flow analysis. */
4475
4476 /* When comparing the insn patterns, we track the fact that different
4477 pseudo-register numbers may have been used in each computation.
4478 The following array stores an equivalence -- same_regs[I] == J means
4479 that pseudo register I was used in the first set of tests in a context
4480 where J was used in the second set. We also count the number of such
4481 pending equivalences. If nonzero, the expressions really aren't the
4482 same. */
4483
4484 static int *same_regs;
4485
4486 static int num_same_regs;
4487
4488 /* Track any registers modified between the target of the first jump and
4489 the second jump. They never compare equal. */
4490
4491 static char *modified_regs;
4492
4493 /* Record if memory was modified. */
4494
4495 static int modified_mem;
4496
4497 /* Called via note_stores on each insn between the target of the first
4498 branch and the second branch. It marks any changed registers. */
4499
4500 static void
4501 mark_modified_reg (dest, x)
4502 rtx dest;
4503 rtx x ATTRIBUTE_UNUSED;
4504 {
4505 int regno, i;
4506
4507 if (GET_CODE (dest) == SUBREG)
4508 dest = SUBREG_REG (dest);
4509
4510 if (GET_CODE (dest) == MEM)
4511 modified_mem = 1;
4512
4513 if (GET_CODE (dest) != REG)
4514 return;
4515
4516 regno = REGNO (dest);
4517 if (regno >= FIRST_PSEUDO_REGISTER)
4518 modified_regs[regno] = 1;
4519 else
4520 for (i = 0; i < HARD_REGNO_NREGS (regno, GET_MODE (dest)); i++)
4521 modified_regs[regno + i] = 1;
4522 }
4523
4524 /* F is the first insn in the chain of insns. */
4525
4526 void
4527 thread_jumps (f, max_reg, flag_before_loop)
4528 rtx f;
4529 int max_reg;
4530 int flag_before_loop;
4531 {
4532 /* Basic algorithm is to find a conditional branch,
4533 the label it may branch to, and the branch after
4534 that label. If the two branches test the same condition,
4535 walk back from both branch paths until the insn patterns
4536 differ, or code labels are hit. If we make it back to
4537 the target of the first branch, then we know that the first branch
4538 will either always succeed or always fail depending on the relative
4539 senses of the two branches. So adjust the first branch accordingly
4540 in this case. */
4541
4542 rtx label, b1, b2, t1, t2;
4543 enum rtx_code code1, code2;
4544 rtx b1op0, b1op1, b2op0, b2op1;
4545 int changed = 1;
4546 int i;
4547 int *all_reset;
4548
4549 /* Allocate register tables and quick-reset table. */
4550 modified_regs = (char *) alloca (max_reg * sizeof (char));
4551 same_regs = (int *) alloca (max_reg * sizeof (int));
4552 all_reset = (int *) alloca (max_reg * sizeof (int));
4553 for (i = 0; i < max_reg; i++)
4554 all_reset[i] = -1;
4555
4556 while (changed)
4557 {
4558 changed = 0;
4559
4560 for (b1 = f; b1; b1 = NEXT_INSN (b1))
4561 {
4562 /* Get to a candidate branch insn. */
4563 if (GET_CODE (b1) != JUMP_INSN
4564 || ! condjump_p (b1) || simplejump_p (b1)
4565 || JUMP_LABEL (b1) == 0)
4566 continue;
4567
4568 bzero (modified_regs, max_reg * sizeof (char));
4569 modified_mem = 0;
4570
4571 bcopy ((char *) all_reset, (char *) same_regs,
4572 max_reg * sizeof (int));
4573 num_same_regs = 0;
4574
4575 label = JUMP_LABEL (b1);
4576
4577 /* Look for a branch after the target. Record any registers and
4578 memory modified between the target and the branch. Stop when we
4579 get to a label since we can't know what was changed there. */
4580 for (b2 = NEXT_INSN (label); b2; b2 = NEXT_INSN (b2))
4581 {
4582 if (GET_CODE (b2) == CODE_LABEL)
4583 break;
4584
4585 else if (GET_CODE (b2) == JUMP_INSN)
4586 {
4587 /* If this is an unconditional jump and is the only use of
4588 its target label, we can follow it. */
4589 if (simplejump_p (b2)
4590 && JUMP_LABEL (b2) != 0
4591 && LABEL_NUSES (JUMP_LABEL (b2)) == 1)
4592 {
4593 b2 = JUMP_LABEL (b2);
4594 continue;
4595 }
4596 else
4597 break;
4598 }
4599
4600 if (GET_CODE (b2) != CALL_INSN && GET_CODE (b2) != INSN)
4601 continue;
4602
4603 if (GET_CODE (b2) == CALL_INSN)
4604 {
4605 modified_mem = 1;
4606 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4607 if (call_used_regs[i] && ! fixed_regs[i]
4608 && i != STACK_POINTER_REGNUM
4609 && i != FRAME_POINTER_REGNUM
4610 && i != HARD_FRAME_POINTER_REGNUM
4611 && i != ARG_POINTER_REGNUM)
4612 modified_regs[i] = 1;
4613 }
4614
4615 note_stores (PATTERN (b2), mark_modified_reg);
4616 }
4617
4618 /* Check the next candidate branch insn from the label
4619 of the first. */
4620 if (b2 == 0
4621 || GET_CODE (b2) != JUMP_INSN
4622 || b2 == b1
4623 || ! condjump_p (b2)
4624 || simplejump_p (b2))
4625 continue;
4626
4627 /* Get the comparison codes and operands, reversing the
4628 codes if appropriate. If we don't have comparison codes,
4629 we can't do anything. */
4630 b1op0 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 0);
4631 b1op1 = XEXP (XEXP (SET_SRC (PATTERN (b1)), 0), 1);
4632 code1 = GET_CODE (XEXP (SET_SRC (PATTERN (b1)), 0));
4633 if (XEXP (SET_SRC (PATTERN (b1)), 1) == pc_rtx)
4634 code1 = reverse_condition (code1);
4635
4636 b2op0 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 0);
4637 b2op1 = XEXP (XEXP (SET_SRC (PATTERN (b2)), 0), 1);
4638 code2 = GET_CODE (XEXP (SET_SRC (PATTERN (b2)), 0));
4639 if (XEXP (SET_SRC (PATTERN (b2)), 1) == pc_rtx)
4640 code2 = reverse_condition (code2);
4641
4642 /* If they test the same things and knowing that B1 branches
4643 tells us whether or not B2 branches, check if we
4644 can thread the branch. */
4645 if (rtx_equal_for_thread_p (b1op0, b2op0, b2)
4646 && rtx_equal_for_thread_p (b1op1, b2op1, b2)
4647 && (comparison_dominates_p (code1, code2)
4648 || (comparison_dominates_p (code1, reverse_condition (code2))
4649 && can_reverse_comparison_p (XEXP (SET_SRC (PATTERN (b1)),
4650 0),
4651 b1))))
4652 {
4653 t1 = prev_nonnote_insn (b1);
4654 t2 = prev_nonnote_insn (b2);
4655
4656 while (t1 != 0 && t2 != 0)
4657 {
4658 if (t2 == label)
4659 {
4660 /* We have reached the target of the first branch.
4661 If there are no pending register equivalents,
4662 we know that this branch will either always
4663 succeed (if the senses of the two branches are
4664 the same) or always fail (if not). */
4665 rtx new_label;
4666
4667 if (num_same_regs != 0)
4668 break;
4669
4670 if (comparison_dominates_p (code1, code2))
4671 new_label = JUMP_LABEL (b2);
4672 else
4673 new_label = get_label_after (b2);
4674
4675 if (JUMP_LABEL (b1) != new_label)
4676 {
4677 rtx prev = PREV_INSN (new_label);
4678
4679 if (flag_before_loop
4680 && GET_CODE (prev) == NOTE
4681 && NOTE_LINE_NUMBER (prev) == NOTE_INSN_LOOP_BEG)
4682 {
4683 /* Don't thread to the loop label. If a loop
4684 label is reused, loop optimization will
4685 be disabled for that loop. */
4686 new_label = gen_label_rtx ();
4687 emit_label_after (new_label, PREV_INSN (prev));
4688 }
4689 changed |= redirect_jump (b1, new_label);
4690 }
4691 break;
4692 }
4693
4694 /* If either of these is not a normal insn (it might be
4695 a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs
4696 have already been skipped above.) Similarly, fail
4697 if the insns are different. */
4698 if (GET_CODE (t1) != INSN || GET_CODE (t2) != INSN
4699 || recog_memoized (t1) != recog_memoized (t2)
4700 || ! rtx_equal_for_thread_p (PATTERN (t1),
4701 PATTERN (t2), t2))
4702 break;
4703
4704 t1 = prev_nonnote_insn (t1);
4705 t2 = prev_nonnote_insn (t2);
4706 }
4707 }
4708 }
4709 }
4710 }
4711 \f
4712 /* This is like RTX_EQUAL_P except that it knows about our handling of
4713 possibly equivalent registers and knows to consider volatile and
4714 modified objects as not equal.
4715
4716 YINSN is the insn containing Y. */
4717
4718 int
4719 rtx_equal_for_thread_p (x, y, yinsn)
4720 rtx x, y;
4721 rtx yinsn;
4722 {
4723 register int i;
4724 register int j;
4725 register enum rtx_code code;
4726 register char *fmt;
4727
4728 code = GET_CODE (x);
4729 /* Rtx's of different codes cannot be equal. */
4730 if (code != GET_CODE (y))
4731 return 0;
4732
4733 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
4734 (REG:SI x) and (REG:HI x) are NOT equivalent. */
4735
4736 if (GET_MODE (x) != GET_MODE (y))
4737 return 0;
4738
4739 /* For floating-point, consider everything unequal. This is a bit
4740 pessimistic, but this pass would only rarely do anything for FP
4741 anyway. */
4742 if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
4743 && FLOAT_MODE_P (GET_MODE (x)) && ! flag_fast_math)
4744 return 0;
4745
4746 /* For commutative operations, the RTX match if the operand match in any
4747 order. Also handle the simple binary and unary cases without a loop. */
4748 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4749 return ((rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4750 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn))
4751 || (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 1), yinsn)
4752 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 0), yinsn)));
4753 else if (GET_RTX_CLASS (code) == '<' || GET_RTX_CLASS (code) == '2')
4754 return (rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn)
4755 && rtx_equal_for_thread_p (XEXP (x, 1), XEXP (y, 1), yinsn));
4756 else if (GET_RTX_CLASS (code) == '1')
4757 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4758
4759 /* Handle special-cases first. */
4760 switch (code)
4761 {
4762 case REG:
4763 if (REGNO (x) == REGNO (y) && ! modified_regs[REGNO (x)])
4764 return 1;
4765
4766 /* If neither is user variable or hard register, check for possible
4767 equivalence. */
4768 if (REG_USERVAR_P (x) || REG_USERVAR_P (y)
4769 || REGNO (x) < FIRST_PSEUDO_REGISTER
4770 || REGNO (y) < FIRST_PSEUDO_REGISTER)
4771 return 0;
4772
4773 if (same_regs[REGNO (x)] == -1)
4774 {
4775 same_regs[REGNO (x)] = REGNO (y);
4776 num_same_regs++;
4777
4778 /* If this is the first time we are seeing a register on the `Y'
4779 side, see if it is the last use. If not, we can't thread the
4780 jump, so mark it as not equivalent. */
4781 if (REGNO_LAST_UID (REGNO (y)) != INSN_UID (yinsn))
4782 return 0;
4783
4784 return 1;
4785 }
4786 else
4787 return (same_regs[REGNO (x)] == REGNO (y));
4788
4789 break;
4790
4791 case MEM:
4792 /* If memory modified or either volatile, not equivalent.
4793 Else, check address. */
4794 if (modified_mem || MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4795 return 0;
4796
4797 return rtx_equal_for_thread_p (XEXP (x, 0), XEXP (y, 0), yinsn);
4798
4799 case ASM_INPUT:
4800 if (MEM_VOLATILE_P (x) || MEM_VOLATILE_P (y))
4801 return 0;
4802
4803 break;
4804
4805 case SET:
4806 /* Cancel a pending `same_regs' if setting equivalenced registers.
4807 Then process source. */
4808 if (GET_CODE (SET_DEST (x)) == REG
4809 && GET_CODE (SET_DEST (y)) == REG)
4810 {
4811 if (same_regs[REGNO (SET_DEST (x))] == REGNO (SET_DEST (y)))
4812 {
4813 same_regs[REGNO (SET_DEST (x))] = -1;
4814 num_same_regs--;
4815 }
4816 else if (REGNO (SET_DEST (x)) != REGNO (SET_DEST (y)))
4817 return 0;
4818 }
4819 else
4820 if (rtx_equal_for_thread_p (SET_DEST (x), SET_DEST (y), yinsn) == 0)
4821 return 0;
4822
4823 return rtx_equal_for_thread_p (SET_SRC (x), SET_SRC (y), yinsn);
4824
4825 case LABEL_REF:
4826 return XEXP (x, 0) == XEXP (y, 0);
4827
4828 case SYMBOL_REF:
4829 return XSTR (x, 0) == XSTR (y, 0);
4830
4831 default:
4832 break;
4833 }
4834
4835 if (x == y)
4836 return 1;
4837
4838 fmt = GET_RTX_FORMAT (code);
4839 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4840 {
4841 switch (fmt[i])
4842 {
4843 case 'w':
4844 if (XWINT (x, i) != XWINT (y, i))
4845 return 0;
4846 break;
4847
4848 case 'n':
4849 case 'i':
4850 if (XINT (x, i) != XINT (y, i))
4851 return 0;
4852 break;
4853
4854 case 'V':
4855 case 'E':
4856 /* Two vectors must have the same length. */
4857 if (XVECLEN (x, i) != XVECLEN (y, i))
4858 return 0;
4859
4860 /* And the corresponding elements must match. */
4861 for (j = 0; j < XVECLEN (x, i); j++)
4862 if (rtx_equal_for_thread_p (XVECEXP (x, i, j),
4863 XVECEXP (y, i, j), yinsn) == 0)
4864 return 0;
4865 break;
4866
4867 case 'e':
4868 if (rtx_equal_for_thread_p (XEXP (x, i), XEXP (y, i), yinsn) == 0)
4869 return 0;
4870 break;
4871
4872 case 'S':
4873 case 's':
4874 if (strcmp (XSTR (x, i), XSTR (y, i)))
4875 return 0;
4876 break;
4877
4878 case 'u':
4879 /* These are just backpointers, so they don't matter. */
4880 break;
4881
4882 case '0':
4883 break;
4884
4885 /* It is believed that rtx's at this level will never
4886 contain anything but integers and other rtx's,
4887 except for within LABEL_REFs and SYMBOL_REFs. */
4888 default:
4889 abort ();
4890 }
4891 }
4892 return 1;
4893 }
4894 \f
4895
4896 #ifndef HAVE_cc0
4897 /* Return the insn that NEW can be safely inserted in front of starting at
4898 the jump insn INSN. Return 0 if it is not safe to do this jump
4899 optimization. Note that NEW must contain a single set. */
4900
4901 static rtx
4902 find_insert_position (insn, new)
4903 rtx insn;
4904 rtx new;
4905 {
4906 int i;
4907 rtx prev;
4908
4909 /* If NEW does not clobber, it is safe to insert NEW before INSN. */
4910 if (GET_CODE (PATTERN (new)) != PARALLEL)
4911 return insn;
4912
4913 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4914 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4915 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4916 insn))
4917 break;
4918
4919 if (i < 0)
4920 return insn;
4921
4922 /* There is a good chance that the previous insn PREV sets the thing
4923 being clobbered (often the CC in a hard reg). If PREV does not
4924 use what NEW sets, we can insert NEW before PREV. */
4925
4926 prev = prev_active_insn (insn);
4927 for (i = XVECLEN (PATTERN (new), 0) - 1; i >= 0; i--)
4928 if (GET_CODE (XVECEXP (PATTERN (new), 0, i)) == CLOBBER
4929 && reg_overlap_mentioned_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4930 insn)
4931 && ! modified_in_p (XEXP (XVECEXP (PATTERN (new), 0, i), 0),
4932 prev))
4933 return 0;
4934
4935 return reg_mentioned_p (SET_DEST (single_set (new)), prev) ? 0 : prev;
4936 }
4937 #endif /* !HAVE_cc0 */