1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx
*loop_comparison_value
;
101 rtx
*loop_start_value
;
102 enum rtx_code
*loop_comparison_code
;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor
;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid
;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx
*loop_number_exit_labels
;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count
;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations
;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call
;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile
;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue
;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set
;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used
;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize
;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once
;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems
[NUM_STORES
];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx
;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered
;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables
;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets
;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed
;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop
;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack
;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack
*rtl_obstack
;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn
; /* A movable insn */
239 rtx set_src
; /* The expression this reg is set from. */
240 rtx set_dest
; /* The destination of this SET. */
241 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec
; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno
; /* The register it sets */
246 short lifetime
; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings
; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond
: 1; /* 1 if only conditionally movable */
253 unsigned int force
: 1; /* 1 means MUST move this insn */
254 unsigned int global
: 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done
: 1; /* 1 inhibits further processing of this */
260 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable
*match
; /* First entry for same value */
270 struct movable
*forces
; /* An insn that must be moved if this is */
271 struct movable
*next
;
274 FILE *loop_dump_stream
;
276 /* Forward declarations. */
278 static void find_and_verify_loops ();
279 static void mark_loop_jump ();
280 static void prescan_loop ();
281 static int reg_in_basic_block_p ();
282 static int consec_sets_invariant_p ();
283 static rtx
libcall_other_reg ();
284 static int labels_in_range_p ();
285 static void count_loop_regs_set ();
286 static void note_addr_stored ();
287 static int loop_reg_used_before_p ();
288 static void scan_loop ();
289 static void replace_call_address ();
290 static rtx
skip_consec_insns ();
291 static int libcall_benefit ();
292 static void ignore_some_movables ();
293 static void force_movables ();
294 static void combine_movables ();
295 static int rtx_equal_for_loop_p ();
296 static void move_movables ();
297 static void strength_reduce ();
298 static int valid_initial_value_p ();
299 static void find_mem_givs ();
300 static void record_biv ();
301 static void check_final_value ();
302 static void record_giv ();
303 static void update_giv_derive ();
304 static int basic_induction_var ();
305 static rtx
simplify_giv_expr ();
306 static int general_induction_var ();
307 static int consec_sets_giv ();
308 static int check_dbra_loop ();
309 static rtx
express_from ();
310 static int combine_givs_p ();
311 static void combine_givs ();
312 static int product_cheap_p ();
313 static int maybe_eliminate_biv ();
314 static int maybe_eliminate_biv_1 ();
315 static int last_use_this_basic_block ();
316 static void record_initial ();
317 static void update_reg_last_use ();
320 /* This is extern from unroll.c */
321 void iteration_info ();
323 /* Two main functions for implementing bct:
324 first - to be called before loop unrolling, and the second - after */
325 static void analyze_loop_iterations ();
326 static void insert_bct ();
328 /* Auxiliary function that inserts the bct pattern into the loop */
329 static void instrument_loop_bct ();
335 /* Indirect_jump_in_function is computed once per function. */
336 int indirect_jump_in_function
= 0;
337 static int indirect_jump_in_function_p ();
340 /* Relative gain of eliminating various kinds of operations. */
347 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
348 copy the value of the strength reduced giv to its original register. */
354 char *free_point
= (char *) oballoc (1);
355 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
357 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
359 /* We multiply by 2 to reconcile the difference in scale between
360 these two ways of computing costs. Otherwise the cost of a copy
361 will be far less than the cost of an add. */
365 /* Free the objects we just allocated. */
368 /* Initialize the obstack used for rtl in product_cheap_p. */
369 gcc_obstack_init (&temp_obstack
);
372 /* Entry point of this file. Perform loop optimization
373 on the current function. F is the first insn of the function
374 and DUMPFILE is a stream for output of a trace of actions taken
375 (or 0 if none should be output). */
378 loop_optimize (f
, dumpfile
)
379 /* f is the first instruction of a chain of insns for one function */
387 loop_dump_stream
= dumpfile
;
389 init_recog_no_volatile ();
390 init_alias_analysis ();
392 max_reg_before_loop
= max_reg_num ();
394 moved_once
= (char *) alloca (max_reg_before_loop
);
395 bzero (moved_once
, max_reg_before_loop
);
399 /* Count the number of loops. */
402 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
404 if (GET_CODE (insn
) == NOTE
405 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
409 /* Don't waste time if no loops. */
410 if (max_loop_num
== 0)
413 /* Get size to use for tables indexed by uids.
414 Leave some space for labels allocated by find_and_verify_loops. */
415 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
417 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
418 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
420 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
421 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
423 /* Allocate tables for recording each loop. We set each entry, so they need
425 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
426 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
427 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
428 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
429 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
430 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
432 /* This is initialized by the unrolling code, so we go ahead
433 and clear them just in case we are not performing loop
435 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
436 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
439 /* Allocate for BCT optimization */
440 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
441 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
443 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
444 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
446 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
447 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
448 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
449 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
450 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
451 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
454 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
455 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
458 /* Find and process each loop.
459 First, find them, and record them in order of their beginnings. */
460 find_and_verify_loops (f
);
462 /* Now find all register lifetimes. This must be done after
463 find_and_verify_loops, because it might reorder the insns in the
465 reg_scan (f
, max_reg_num (), 1);
467 /* See if we went too far. */
468 if (get_max_uid () > max_uid_for_loop
)
471 /* Compute the mapping from uids to luids.
472 LUIDs are numbers assigned to insns, like uids,
473 except that luids increase monotonically through the code.
474 Don't assign luids to line-number NOTEs, so that the distance in luids
475 between two insns is not affected by -g. */
477 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
480 if (GET_CODE (insn
) != NOTE
481 || NOTE_LINE_NUMBER (insn
) <= 0)
482 uid_luid
[INSN_UID (insn
)] = ++i
;
484 /* Give a line number note the same luid as preceding insn. */
485 uid_luid
[INSN_UID (insn
)] = i
;
490 /* Don't leave gaps in uid_luid for insns that have been
491 deleted. It is possible that the first or last insn
492 using some register has been deleted by cross-jumping.
493 Make sure that uid_luid for that former insn's uid
494 points to the general area where that insn used to be. */
495 for (i
= 0; i
< max_uid_for_loop
; i
++)
497 uid_luid
[0] = uid_luid
[i
];
498 if (uid_luid
[0] != 0)
501 for (i
= 0; i
< max_uid_for_loop
; i
++)
502 if (uid_luid
[i
] == 0)
503 uid_luid
[i
] = uid_luid
[i
- 1];
505 /* Create a mapping from loops to BLOCK tree nodes. */
506 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
507 find_loop_tree_blocks ();
509 /* Determine if the function has indirect jump. On some systems
510 this prevents low overhead loop instructions from being used. */
511 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
513 /* Now scan the loops, last ones first, since this means inner ones are done
514 before outer ones. */
515 for (i
= max_loop_num
-1; i
>= 0; i
--)
516 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
517 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
520 /* If debugging and unrolling loops, we must replicate the tree nodes
521 corresponding to the blocks inside the loop, so that the original one
522 to one mapping will remain. */
523 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
524 unroll_block_trees ();
527 /* Optimize one loop whose start is LOOP_START and end is END.
528 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
529 NOTE_INSN_LOOP_END. */
531 /* ??? Could also move memory writes out of loops if the destination address
532 is invariant, the source is invariant, the memory write is not volatile,
533 and if we can prove that no read inside the loop can read this address
534 before the write occurs. If there is a read of this address after the
535 write, then we can also mark the memory read as invariant. */
538 scan_loop (loop_start
, end
, nregs
)
544 /* 1 if we are scanning insns that could be executed zero times. */
546 /* 1 if we are scanning insns that might never be executed
547 due to a subroutine call which might exit before they are reached. */
549 /* For a rotated loop that is entered near the bottom,
550 this is the label at the top. Otherwise it is zero. */
552 /* Jump insn that enters the loop, or 0 if control drops in. */
553 rtx loop_entry_jump
= 0;
554 /* Place in the loop where control enters. */
556 /* Number of insns in the loop. */
561 /* The SET from an insn, if it is the only SET in the insn. */
563 /* Chain describing insns movable in current loop. */
564 struct movable
*movables
= 0;
565 /* Last element in `movables' -- so we can add elements at the end. */
566 struct movable
*last_movable
= 0;
567 /* Ratio of extra register life span we can justify
568 for saving an instruction. More if loop doesn't call subroutines
569 since in that case saving an insn makes more difference
570 and more registers are available. */
572 /* If we have calls, contains the insn in which a register was used
573 if it was used exactly once; contains const0_rtx if it was used more
575 rtx
*reg_single_usage
= 0;
576 /* Nonzero if we are scanning instructions in a sub-loop. */
579 n_times_set
= (int *) alloca (nregs
* sizeof (int));
580 n_times_used
= (int *) alloca (nregs
* sizeof (int));
581 may_not_optimize
= (char *) alloca (nregs
);
583 /* Determine whether this loop starts with a jump down to a test at
584 the end. This will occur for a small number of loops with a test
585 that is too complex to duplicate in front of the loop.
587 We search for the first insn or label in the loop, skipping NOTEs.
588 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
589 (because we might have a loop executed only once that contains a
590 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
591 (in case we have a degenerate loop).
593 Note that if we mistakenly think that a loop is entered at the top
594 when, in fact, it is entered at the exit test, the only effect will be
595 slightly poorer optimization. Making the opposite error can generate
596 incorrect code. Since very few loops now start with a jump to the
597 exit test, the code here to detect that case is very conservative. */
599 for (p
= NEXT_INSN (loop_start
);
601 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
602 && (GET_CODE (p
) != NOTE
603 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
604 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
610 /* Set up variables describing this loop. */
611 prescan_loop (loop_start
, end
);
612 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
614 /* If loop has a jump before the first label,
615 the true entry is the target of that jump.
616 Start scan from there.
617 But record in LOOP_TOP the place where the end-test jumps
618 back to so we can scan that after the end of the loop. */
619 if (GET_CODE (p
) == JUMP_INSN
)
623 /* Loop entry must be unconditional jump (and not a RETURN) */
625 && JUMP_LABEL (p
) != 0
626 /* Check to see whether the jump actually
627 jumps out of the loop (meaning it's no loop).
628 This case can happen for things like
629 do {..} while (0). If this label was generated previously
630 by loop, we can't tell anything about it and have to reject
632 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
633 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
634 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
636 loop_top
= next_label (scan_start
);
637 scan_start
= JUMP_LABEL (p
);
641 /* If SCAN_START was an insn created by loop, we don't know its luid
642 as required by loop_reg_used_before_p. So skip such loops. (This
643 test may never be true, but it's best to play it safe.)
645 Also, skip loops where we do not start scanning at a label. This
646 test also rejects loops starting with a JUMP_INSN that failed the
649 if (INSN_UID (scan_start
) >= max_uid_for_loop
650 || GET_CODE (scan_start
) != CODE_LABEL
)
652 if (loop_dump_stream
)
653 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
654 INSN_UID (loop_start
), INSN_UID (end
));
658 /* Count number of times each reg is set during this loop.
659 Set may_not_optimize[I] if it is not safe to move out
660 the setting of register I. If this loop has calls, set
661 reg_single_usage[I]. */
663 bzero ((char *) n_times_set
, nregs
* sizeof (int));
664 bzero (may_not_optimize
, nregs
);
668 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
669 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
672 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
673 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
675 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
676 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
677 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
679 if (loop_dump_stream
)
681 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
682 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
684 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
685 INSN_UID (loop_continue
));
688 /* Scan through the loop finding insns that are safe to move.
689 Set n_times_set negative for the reg being set, so that
690 this reg will be considered invariant for subsequent insns.
691 We consider whether subsequent insns use the reg
692 in deciding whether it is worth actually moving.
694 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
695 and therefore it is possible that the insns we are scanning
696 would never be executed. At such times, we must make sure
697 that it is safe to execute the insn once instead of zero times.
698 When MAYBE_NEVER is 0, all insns will be executed at least once
699 so that is not a problem. */
705 /* At end of a straight-in loop, we are done.
706 At end of a loop entered at the bottom, scan the top. */
719 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
720 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
722 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
723 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
726 if (GET_CODE (p
) == INSN
727 && (set
= single_set (p
))
728 && GET_CODE (SET_DEST (set
)) == REG
729 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
734 rtx src
= SET_SRC (set
);
735 rtx dependencies
= 0;
737 /* Figure out what to use as a source of this insn. If a REG_EQUIV
738 note is given or if a REG_EQUAL note with a constant operand is
739 specified, use it as the source and mark that we should move
740 this insn by calling emit_move_insn rather that duplicating the
743 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
745 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
747 src
= XEXP (temp
, 0), move_insn
= 1;
750 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
751 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
752 src
= XEXP (temp
, 0), move_insn
= 1;
753 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
755 src
= XEXP (temp
, 0);
756 /* A libcall block can use regs that don't appear in
757 the equivalent expression. To move the libcall,
758 we must move those regs too. */
759 dependencies
= libcall_other_reg (p
, src
);
763 /* Don't try to optimize a register that was made
764 by loop-optimization for an inner loop.
765 We don't know its life-span, so we can't compute the benefit. */
766 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
768 /* In order to move a register, we need to have one of three cases:
769 (1) it is used only in the same basic block as the set
770 (2) it is not a user variable and it is not used in the
771 exit test (this can cause the variable to be used
772 before it is set just like a user-variable).
773 (3) the set is guaranteed to be executed once the loop starts,
774 and the reg is not used until after that. */
775 else if (! ((! maybe_never
776 && ! loop_reg_used_before_p (set
, p
, loop_start
,
778 || (! REG_USERVAR_P (SET_DEST (set
))
779 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
780 || reg_in_basic_block_p (p
, SET_DEST (set
))))
782 else if ((tem
= invariant_p (src
))
783 && (dependencies
== 0
784 || (tem2
= invariant_p (dependencies
)) != 0)
785 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
787 = consec_sets_invariant_p (SET_DEST (set
),
788 n_times_set
[REGNO (SET_DEST (set
))],
790 /* If the insn can cause a trap (such as divide by zero),
791 can't move it unless it's guaranteed to be executed
792 once loop is entered. Even a function call might
793 prevent the trap insn from being reached
794 (since it might exit!) */
795 && ! ((maybe_never
|| call_passed
)
796 && may_trap_p (src
)))
798 register struct movable
*m
;
799 register int regno
= REGNO (SET_DEST (set
));
801 /* A potential lossage is where we have a case where two insns
802 can be combined as long as they are both in the loop, but
803 we move one of them outside the loop. For large loops,
804 this can lose. The most common case of this is the address
805 of a function being called.
807 Therefore, if this register is marked as being used exactly
808 once if we are in a loop with calls (a "large loop"), see if
809 we can replace the usage of this register with the source
810 of this SET. If we can, delete this insn.
812 Don't do this if P has a REG_RETVAL note or if we have
813 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
815 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
816 && reg_single_usage
[regno
] != const0_rtx
817 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
818 && (REGNO_LAST_UID (regno
)
819 == INSN_UID (reg_single_usage
[regno
]))
820 && n_times_set
[REGNO (SET_DEST (set
))] == 1
821 && ! side_effects_p (SET_SRC (set
))
822 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
823 #ifdef SMALL_REGISTER_CLASSES
824 && ! (SMALL_REGISTER_CLASSES
825 && GET_CODE (SET_SRC (set
)) == REG
826 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
828 /* This test is not redundant; SET_SRC (set) might be
829 a call-clobbered register and the life of REGNO
830 might span a call. */
831 && ! modified_between_p (SET_SRC (set
), p
,
832 reg_single_usage
[regno
])
833 && no_labels_between_p (p
, reg_single_usage
[regno
])
834 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
835 reg_single_usage
[regno
]))
837 /* Replace any usage in a REG_EQUAL note. Must copy the
838 new source, so that we don't get rtx sharing between the
839 SET_SOURCE and REG_NOTES of insn p. */
840 REG_NOTES (reg_single_usage
[regno
])
841 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
842 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
845 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
846 NOTE_SOURCE_FILE (p
) = 0;
847 n_times_set
[regno
] = 0;
851 m
= (struct movable
*) alloca (sizeof (struct movable
));
855 m
->dependencies
= dependencies
;
856 m
->set_dest
= SET_DEST (set
);
858 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
862 m
->move_insn
= move_insn
;
863 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
864 m
->savemode
= VOIDmode
;
866 /* Set M->cond if either invariant_p or consec_sets_invariant_p
867 returned 2 (only conditionally invariant). */
868 m
->cond
= ((tem
| tem1
| tem2
) > 1);
869 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
870 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
872 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
873 - uid_luid
[REGNO_FIRST_UID (regno
)]);
874 m
->savings
= n_times_used
[regno
];
875 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
876 m
->savings
+= libcall_benefit (p
);
877 n_times_set
[regno
] = move_insn
? -2 : -1;
878 /* Add M to the end of the chain MOVABLES. */
882 last_movable
->next
= m
;
887 /* Skip this insn, not checking REG_LIBCALL notes. */
888 p
= next_nonnote_insn (p
);
889 /* Skip the consecutive insns, if there are any. */
890 p
= skip_consec_insns (p
, m
->consec
);
891 /* Back up to the last insn of the consecutive group. */
892 p
= prev_nonnote_insn (p
);
894 /* We must now reset m->move_insn, m->is_equiv, and possibly
895 m->set_src to correspond to the effects of all the
897 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
899 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
902 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
903 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
904 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
909 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
912 /* If this register is always set within a STRICT_LOW_PART
913 or set to zero, then its high bytes are constant.
914 So clear them outside the loop and within the loop
915 just load the low bytes.
916 We must check that the machine has an instruction to do so.
917 Also, if the value loaded into the register
918 depends on the same register, this cannot be done. */
919 else if (SET_SRC (set
) == const0_rtx
920 && GET_CODE (NEXT_INSN (p
)) == INSN
921 && (set1
= single_set (NEXT_INSN (p
)))
922 && GET_CODE (set1
) == SET
923 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
924 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
925 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
927 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
929 register int regno
= REGNO (SET_DEST (set
));
930 if (n_times_set
[regno
] == 2)
932 register struct movable
*m
;
933 m
= (struct movable
*) alloca (sizeof (struct movable
));
936 m
->set_dest
= SET_DEST (set
);
944 /* If the insn may not be executed on some cycles,
945 we can't clear the whole reg; clear just high part.
946 Not even if the reg is used only within this loop.
953 Clearing x before the inner loop could clobber a value
954 being saved from the last time around the outer loop.
955 However, if the reg is not used outside this loop
956 and all uses of the register are in the same
957 basic block as the store, there is no problem.
959 If this insn was made by loop, we don't know its
960 INSN_LUID and hence must make a conservative
962 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
963 || (uid_luid
[REGNO_LAST_UID (regno
)]
965 || (uid_luid
[REGNO_FIRST_UID (regno
)]
967 || (labels_in_range_p
968 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
969 if (maybe_never
&& m
->global
)
970 m
->savemode
= GET_MODE (SET_SRC (set1
));
972 m
->savemode
= VOIDmode
;
976 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
977 - uid_luid
[REGNO_FIRST_UID (regno
)]);
979 n_times_set
[regno
] = -1;
980 /* Add M to the end of the chain MOVABLES. */
984 last_movable
->next
= m
;
989 /* Past a call insn, we get to insns which might not be executed
990 because the call might exit. This matters for insns that trap.
991 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
992 so they don't count. */
993 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
995 /* Past a label or a jump, we get to insns for which we
996 can't count on whether or how many times they will be
997 executed during each iteration. Therefore, we can
998 only move out sets of trivial variables
999 (those not used after the loop). */
1000 /* Similar code appears twice in strength_reduce. */
1001 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1002 /* If we enter the loop in the middle, and scan around to the
1003 beginning, don't set maybe_never for that. This must be an
1004 unconditional jump, otherwise the code at the top of the
1005 loop might never be executed. Unconditional jumps are
1006 followed a by barrier then loop end. */
1007 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1008 && NEXT_INSN (NEXT_INSN (p
)) == end
1009 && simplejump_p (p
)))
1011 else if (GET_CODE (p
) == NOTE
)
1013 /* At the virtual top of a converted loop, insns are again known to
1014 be executed: logically, the loop begins here even though the exit
1015 code has been duplicated. */
1016 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1017 maybe_never
= call_passed
= 0;
1018 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1020 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1025 /* If one movable subsumes another, ignore that other. */
1027 ignore_some_movables (movables
);
1029 /* For each movable insn, see if the reg that it loads
1030 leads when it dies right into another conditionally movable insn.
1031 If so, record that the second insn "forces" the first one,
1032 since the second can be moved only if the first is. */
1034 force_movables (movables
);
1036 /* See if there are multiple movable insns that load the same value.
1037 If there are, make all but the first point at the first one
1038 through the `match' field, and add the priorities of them
1039 all together as the priority of the first. */
1041 combine_movables (movables
, nregs
);
1043 /* Now consider each movable insn to decide whether it is worth moving.
1044 Store 0 in n_times_set for each reg that is moved. */
1046 move_movables (movables
, threshold
,
1047 insn_count
, loop_start
, end
, nregs
);
1049 /* Now candidates that still are negative are those not moved.
1050 Change n_times_set to indicate that those are not actually invariant. */
1051 for (i
= 0; i
< nregs
; i
++)
1052 if (n_times_set
[i
] < 0)
1053 n_times_set
[i
] = n_times_used
[i
];
1055 if (flag_strength_reduce
)
1056 strength_reduce (scan_start
, end
, loop_top
,
1057 insn_count
, loop_start
, end
);
1060 /* Add elements to *OUTPUT to record all the pseudo-regs
1061 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1064 record_excess_regs (in_this
, not_in_this
, output
)
1065 rtx in_this
, not_in_this
;
1072 code
= GET_CODE (in_this
);
1086 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1087 && ! reg_mentioned_p (in_this
, not_in_this
))
1088 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1092 fmt
= GET_RTX_FORMAT (code
);
1093 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1100 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1101 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1105 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1111 /* Check what regs are referred to in the libcall block ending with INSN,
1112 aside from those mentioned in the equivalent value.
1113 If there are none, return 0.
1114 If there are one or more, return an EXPR_LIST containing all of them. */
1117 libcall_other_reg (insn
, equiv
)
1120 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1121 rtx p
= XEXP (note
, 0);
1124 /* First, find all the regs used in the libcall block
1125 that are not mentioned as inputs to the result. */
1129 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1130 || GET_CODE (p
) == CALL_INSN
)
1131 record_excess_regs (PATTERN (p
), equiv
, &output
);
1138 /* Return 1 if all uses of REG
1139 are between INSN and the end of the basic block. */
1142 reg_in_basic_block_p (insn
, reg
)
1145 int regno
= REGNO (reg
);
1148 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1151 /* Search this basic block for the already recorded last use of the reg. */
1152 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1154 switch (GET_CODE (p
))
1161 /* Ordinary insn: if this is the last use, we win. */
1162 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1167 /* Jump insn: if this is the last use, we win. */
1168 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1170 /* Otherwise, it's the end of the basic block, so we lose. */
1175 /* It's the end of the basic block, so we lose. */
1180 /* The "last use" doesn't follow the "first use"?? */
1184 /* Compute the benefit of eliminating the insns in the block whose
1185 last insn is LAST. This may be a group of insns used to compute a
1186 value directly or can contain a library call. */
1189 libcall_benefit (last
)
1195 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1196 insn
!= last
; insn
= NEXT_INSN (insn
))
1198 if (GET_CODE (insn
) == CALL_INSN
)
1199 benefit
+= 10; /* Assume at least this many insns in a library
1201 else if (GET_CODE (insn
) == INSN
1202 && GET_CODE (PATTERN (insn
)) != USE
1203 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1210 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1213 skip_consec_insns (insn
, count
)
1217 for (; count
> 0; count
--)
1221 /* If first insn of libcall sequence, skip to end. */
1222 /* Do this at start of loop, since INSN is guaranteed to
1224 if (GET_CODE (insn
) != NOTE
1225 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1226 insn
= XEXP (temp
, 0);
1228 do insn
= NEXT_INSN (insn
);
1229 while (GET_CODE (insn
) == NOTE
);
1235 /* Ignore any movable whose insn falls within a libcall
1236 which is part of another movable.
1237 We make use of the fact that the movable for the libcall value
1238 was made later and so appears later on the chain. */
1241 ignore_some_movables (movables
)
1242 struct movable
*movables
;
1244 register struct movable
*m
, *m1
;
1246 for (m
= movables
; m
; m
= m
->next
)
1248 /* Is this a movable for the value of a libcall? */
1249 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1253 /* Check for earlier movables inside that range,
1254 and mark them invalid. We cannot use LUIDs here because
1255 insns created by loop.c for prior loops don't have LUIDs.
1256 Rather than reject all such insns from movables, we just
1257 explicitly check each insn in the libcall (since invariant
1258 libcalls aren't that common). */
1259 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1260 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1261 if (m1
->insn
== insn
)
1267 /* For each movable insn, see if the reg that it loads
1268 leads when it dies right into another conditionally movable insn.
1269 If so, record that the second insn "forces" the first one,
1270 since the second can be moved only if the first is. */
1273 force_movables (movables
)
1274 struct movable
*movables
;
1276 register struct movable
*m
, *m1
;
1277 for (m1
= movables
; m1
; m1
= m1
->next
)
1278 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1279 if (!m1
->partial
&& !m1
->done
)
1281 int regno
= m1
->regno
;
1282 for (m
= m1
->next
; m
; m
= m
->next
)
1283 /* ??? Could this be a bug? What if CSE caused the
1284 register of M1 to be used after this insn?
1285 Since CSE does not update regno_last_uid,
1286 this insn M->insn might not be where it dies.
1287 But very likely this doesn't matter; what matters is
1288 that M's reg is computed from M1's reg. */
1289 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1292 if (m
!= 0 && m
->set_src
== m1
->set_dest
1293 /* If m->consec, m->set_src isn't valid. */
1297 /* Increase the priority of the moving the first insn
1298 since it permits the second to be moved as well. */
1302 m1
->lifetime
+= m
->lifetime
;
1303 m1
->savings
+= m1
->savings
;
1308 /* Find invariant expressions that are equal and can be combined into
1312 combine_movables (movables
, nregs
)
1313 struct movable
*movables
;
1316 register struct movable
*m
;
1317 char *matched_regs
= (char *) alloca (nregs
);
1318 enum machine_mode mode
;
1320 /* Regs that are set more than once are not allowed to match
1321 or be matched. I'm no longer sure why not. */
1322 /* Perhaps testing m->consec_sets would be more appropriate here? */
1324 for (m
= movables
; m
; m
= m
->next
)
1325 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1327 register struct movable
*m1
;
1328 int regno
= m
->regno
;
1330 bzero (matched_regs
, nregs
);
1331 matched_regs
[regno
] = 1;
1333 /* We want later insns to match the first one. Don't make the first
1334 one match any later ones. So start this loop at m->next. */
1335 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1336 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1337 /* A reg used outside the loop mustn't be eliminated. */
1339 /* A reg used for zero-extending mustn't be eliminated. */
1341 && (matched_regs
[m1
->regno
]
1344 /* Can combine regs with different modes loaded from the
1345 same constant only if the modes are the same or
1346 if both are integer modes with M wider or the same
1347 width as M1. The check for integer is redundant, but
1348 safe, since the only case of differing destination
1349 modes with equal sources is when both sources are
1350 VOIDmode, i.e., CONST_INT. */
1351 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1352 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1353 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1354 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1355 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1356 /* See if the source of M1 says it matches M. */
1357 && ((GET_CODE (m1
->set_src
) == REG
1358 && matched_regs
[REGNO (m1
->set_src
)])
1359 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1361 && ((m
->dependencies
== m1
->dependencies
)
1362 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1364 m
->lifetime
+= m1
->lifetime
;
1365 m
->savings
+= m1
->savings
;
1368 matched_regs
[m1
->regno
] = 1;
1372 /* Now combine the regs used for zero-extension.
1373 This can be done for those not marked `global'
1374 provided their lives don't overlap. */
1376 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1377 mode
= GET_MODE_WIDER_MODE (mode
))
1379 register struct movable
*m0
= 0;
1381 /* Combine all the registers for extension from mode MODE.
1382 Don't combine any that are used outside this loop. */
1383 for (m
= movables
; m
; m
= m
->next
)
1384 if (m
->partial
&& ! m
->global
1385 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1387 register struct movable
*m1
;
1388 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1389 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1393 /* First one: don't check for overlap, just record it. */
1398 /* Make sure they extend to the same mode.
1399 (Almost always true.) */
1400 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1403 /* We already have one: check for overlap with those
1404 already combined together. */
1405 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1406 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1407 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1408 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1411 /* No overlap: we can combine this with the others. */
1412 m0
->lifetime
+= m
->lifetime
;
1413 m0
->savings
+= m
->savings
;
1422 /* Return 1 if regs X and Y will become the same if moved. */
1425 regs_match_p (x
, y
, movables
)
1427 struct movable
*movables
;
1431 struct movable
*mx
, *my
;
1433 for (mx
= movables
; mx
; mx
= mx
->next
)
1434 if (mx
->regno
== xn
)
1437 for (my
= movables
; my
; my
= my
->next
)
1438 if (my
->regno
== yn
)
1442 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1444 || mx
== my
->match
));
1447 /* Return 1 if X and Y are identical-looking rtx's.
1448 This is the Lisp function EQUAL for rtx arguments.
1450 If two registers are matching movables or a movable register and an
1451 equivalent constant, consider them equal. */
1454 rtx_equal_for_loop_p (x
, y
, movables
)
1456 struct movable
*movables
;
1460 register struct movable
*m
;
1461 register enum rtx_code code
;
1466 if (x
== 0 || y
== 0)
1469 code
= GET_CODE (x
);
1471 /* If we have a register and a constant, they may sometimes be
1473 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1475 for (m
= movables
; m
; m
= m
->next
)
1476 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1477 && rtx_equal_p (m
->set_src
, y
))
1480 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1482 for (m
= movables
; m
; m
= m
->next
)
1483 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1484 && rtx_equal_p (m
->set_src
, x
))
1487 /* Otherwise, rtx's of different codes cannot be equal. */
1488 if (code
!= GET_CODE (y
))
1491 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1492 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1494 if (GET_MODE (x
) != GET_MODE (y
))
1497 /* These three types of rtx's can be compared nonrecursively. */
1499 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1501 if (code
== LABEL_REF
)
1502 return XEXP (x
, 0) == XEXP (y
, 0);
1503 if (code
== SYMBOL_REF
)
1504 return XSTR (x
, 0) == XSTR (y
, 0);
1506 /* Compare the elements. If any pair of corresponding elements
1507 fail to match, return 0 for the whole things. */
1509 fmt
= GET_RTX_FORMAT (code
);
1510 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1515 if (XWINT (x
, i
) != XWINT (y
, i
))
1520 if (XINT (x
, i
) != XINT (y
, i
))
1525 /* Two vectors must have the same length. */
1526 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1529 /* And the corresponding elements must match. */
1530 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1531 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1536 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1541 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1546 /* These are just backpointers, so they don't matter. */
1552 /* It is believed that rtx's at this level will never
1553 contain anything but integers and other rtx's,
1554 except for within LABEL_REFs and SYMBOL_REFs. */
1562 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1563 insns in INSNS which use thet reference. */
1566 add_label_notes (x
, insns
)
1570 enum rtx_code code
= GET_CODE (x
);
1575 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1577 rtx next
= next_real_insn (XEXP (x
, 0));
1579 /* Don't record labels that refer to dispatch tables.
1580 This is not necessary, since the tablejump references the same label.
1581 And if we did record them, flow.c would make worse code. */
1583 || ! (GET_CODE (next
) == JUMP_INSN
1584 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1585 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1587 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1588 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1589 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1595 fmt
= GET_RTX_FORMAT (code
);
1596 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1599 add_label_notes (XEXP (x
, i
), insns
);
1600 else if (fmt
[i
] == 'E')
1601 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1602 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1606 /* Scan MOVABLES, and move the insns that deserve to be moved.
1607 If two matching movables are combined, replace one reg with the
1608 other throughout. */
1611 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1612 struct movable
*movables
;
1620 register struct movable
*m
;
1622 /* Map of pseudo-register replacements to handle combining
1623 when we move several insns that load the same value
1624 into different pseudo-registers. */
1625 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1626 char *already_moved
= (char *) alloca (nregs
);
1628 bzero (already_moved
, nregs
);
1629 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1633 for (m
= movables
; m
; m
= m
->next
)
1635 /* Describe this movable insn. */
1637 if (loop_dump_stream
)
1639 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1640 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1642 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1644 fprintf (loop_dump_stream
, "cond ");
1646 fprintf (loop_dump_stream
, "force ");
1648 fprintf (loop_dump_stream
, "global ");
1650 fprintf (loop_dump_stream
, "done ");
1652 fprintf (loop_dump_stream
, "move-insn ");
1654 fprintf (loop_dump_stream
, "matches %d ",
1655 INSN_UID (m
->match
->insn
));
1657 fprintf (loop_dump_stream
, "forces %d ",
1658 INSN_UID (m
->forces
->insn
));
1661 /* Count movables. Value used in heuristics in strength_reduce. */
1664 /* Ignore the insn if it's already done (it matched something else).
1665 Otherwise, see if it is now safe to move. */
1669 || (1 == invariant_p (m
->set_src
)
1670 && (m
->dependencies
== 0
1671 || 1 == invariant_p (m
->dependencies
))
1673 || 1 == consec_sets_invariant_p (m
->set_dest
,
1676 && (! m
->forces
|| m
->forces
->done
))
1680 int savings
= m
->savings
;
1682 /* We have an insn that is safe to move.
1683 Compute its desirability. */
1688 if (loop_dump_stream
)
1689 fprintf (loop_dump_stream
, "savings %d ", savings
);
1691 if (moved_once
[regno
])
1695 if (loop_dump_stream
)
1696 fprintf (loop_dump_stream
, "halved since already moved ");
1699 /* An insn MUST be moved if we already moved something else
1700 which is safe only if this one is moved too: that is,
1701 if already_moved[REGNO] is nonzero. */
1703 /* An insn is desirable to move if the new lifetime of the
1704 register is no more than THRESHOLD times the old lifetime.
1705 If it's not desirable, it means the loop is so big
1706 that moving won't speed things up much,
1707 and it is liable to make register usage worse. */
1709 /* It is also desirable to move if it can be moved at no
1710 extra cost because something else was already moved. */
1712 if (already_moved
[regno
]
1713 || flag_move_all_movables
1714 || (threshold
* savings
* m
->lifetime
) >= insn_count
1715 || (m
->forces
&& m
->forces
->done
1716 && n_times_used
[m
->forces
->regno
] == 1))
1719 register struct movable
*m1
;
1722 /* Now move the insns that set the reg. */
1724 if (m
->partial
&& m
->match
)
1728 /* Find the end of this chain of matching regs.
1729 Thus, we load each reg in the chain from that one reg.
1730 And that reg is loaded with 0 directly,
1731 since it has ->match == 0. */
1732 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1733 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1734 SET_DEST (PATTERN (m1
->insn
)));
1735 i1
= emit_insn_before (newpat
, loop_start
);
1737 /* Mark the moved, invariant reg as being allowed to
1738 share a hard reg with the other matching invariant. */
1739 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1740 r1
= SET_DEST (PATTERN (m
->insn
));
1741 r2
= SET_DEST (PATTERN (m1
->insn
));
1742 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1743 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1745 delete_insn (m
->insn
);
1750 if (loop_dump_stream
)
1751 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1753 /* If we are to re-generate the item being moved with a
1754 new move insn, first delete what we have and then emit
1755 the move insn before the loop. */
1756 else if (m
->move_insn
)
1760 for (count
= m
->consec
; count
>= 0; count
--)
1762 /* If this is the first insn of a library call sequence,
1764 if (GET_CODE (p
) != NOTE
1765 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1768 /* If this is the last insn of a libcall sequence, then
1769 delete every insn in the sequence except the last.
1770 The last insn is handled in the normal manner. */
1771 if (GET_CODE (p
) != NOTE
1772 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1774 temp
= XEXP (temp
, 0);
1776 temp
= delete_insn (temp
);
1779 p
= delete_insn (p
);
1780 while (p
&& GET_CODE (p
) == NOTE
)
1785 emit_move_insn (m
->set_dest
, m
->set_src
);
1786 temp
= get_insns ();
1789 add_label_notes (m
->set_src
, temp
);
1791 i1
= emit_insns_before (temp
, loop_start
);
1792 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1794 = gen_rtx (EXPR_LIST
,
1795 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1796 m
->set_src
, REG_NOTES (i1
));
1798 if (loop_dump_stream
)
1799 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1801 /* The more regs we move, the less we like moving them. */
1806 for (count
= m
->consec
; count
>= 0; count
--)
1810 /* If first insn of libcall sequence, skip to end. */
1811 /* Do this at start of loop, since p is guaranteed to
1813 if (GET_CODE (p
) != NOTE
1814 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1817 /* If last insn of libcall sequence, move all
1818 insns except the last before the loop. The last
1819 insn is handled in the normal manner. */
1820 if (GET_CODE (p
) != NOTE
1821 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1825 rtx fn_address_insn
= 0;
1828 for (temp
= XEXP (temp
, 0); temp
!= p
;
1829 temp
= NEXT_INSN (temp
))
1835 if (GET_CODE (temp
) == NOTE
)
1838 body
= PATTERN (temp
);
1840 /* Find the next insn after TEMP,
1841 not counting USE or NOTE insns. */
1842 for (next
= NEXT_INSN (temp
); next
!= p
;
1843 next
= NEXT_INSN (next
))
1844 if (! (GET_CODE (next
) == INSN
1845 && GET_CODE (PATTERN (next
)) == USE
)
1846 && GET_CODE (next
) != NOTE
)
1849 /* If that is the call, this may be the insn
1850 that loads the function address.
1852 Extract the function address from the insn
1853 that loads it into a register.
1854 If this insn was cse'd, we get incorrect code.
1856 So emit a new move insn that copies the
1857 function address into the register that the
1858 call insn will use. flow.c will delete any
1859 redundant stores that we have created. */
1860 if (GET_CODE (next
) == CALL_INSN
1861 && GET_CODE (body
) == SET
1862 && GET_CODE (SET_DEST (body
)) == REG
1863 && (n
= find_reg_note (temp
, REG_EQUAL
,
1866 fn_reg
= SET_SRC (body
);
1867 if (GET_CODE (fn_reg
) != REG
)
1868 fn_reg
= SET_DEST (body
);
1869 fn_address
= XEXP (n
, 0);
1870 fn_address_insn
= temp
;
1872 /* We have the call insn.
1873 If it uses the register we suspect it might,
1874 load it with the correct address directly. */
1875 if (GET_CODE (temp
) == CALL_INSN
1877 && reg_referenced_p (fn_reg
, body
))
1878 emit_insn_after (gen_move_insn (fn_reg
,
1882 if (GET_CODE (temp
) == CALL_INSN
)
1884 i1
= emit_call_insn_before (body
, loop_start
);
1885 /* Because the USAGE information potentially
1886 contains objects other than hard registers
1887 we need to copy it. */
1888 if (CALL_INSN_FUNCTION_USAGE (temp
))
1889 CALL_INSN_FUNCTION_USAGE (i1
)
1890 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1893 i1
= emit_insn_before (body
, loop_start
);
1896 if (temp
== fn_address_insn
)
1897 fn_address_insn
= i1
;
1898 REG_NOTES (i1
) = REG_NOTES (temp
);
1902 if (m
->savemode
!= VOIDmode
)
1904 /* P sets REG to zero; but we should clear only
1905 the bits that are not covered by the mode
1907 rtx reg
= m
->set_dest
;
1913 (GET_MODE (reg
), and_optab
, reg
,
1914 GEN_INT ((((HOST_WIDE_INT
) 1
1915 << GET_MODE_BITSIZE (m
->savemode
)))
1917 reg
, 1, OPTAB_LIB_WIDEN
);
1921 emit_move_insn (reg
, tem
);
1922 sequence
= gen_sequence ();
1924 i1
= emit_insn_before (sequence
, loop_start
);
1926 else if (GET_CODE (p
) == CALL_INSN
)
1928 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1929 /* Because the USAGE information potentially
1930 contains objects other than hard registers
1931 we need to copy it. */
1932 if (CALL_INSN_FUNCTION_USAGE (p
))
1933 CALL_INSN_FUNCTION_USAGE (i1
)
1934 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1937 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1939 REG_NOTES (i1
) = REG_NOTES (p
);
1941 /* If there is a REG_EQUAL note present whose value is
1942 not loop invariant, then delete it, since it may
1943 cause problems with later optimization passes.
1944 It is possible for cse to create such notes
1945 like this as a result of record_jump_cond. */
1947 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1948 && ! invariant_p (XEXP (temp
, 0)))
1949 remove_note (i1
, temp
);
1954 if (loop_dump_stream
)
1955 fprintf (loop_dump_stream
, " moved to %d",
1959 /* This isn't needed because REG_NOTES is copied
1960 below and is wrong since P might be a PARALLEL. */
1961 if (REG_NOTES (i1
) == 0
1962 && ! m
->partial
/* But not if it's a zero-extend clr. */
1963 && ! m
->global
/* and not if used outside the loop
1964 (since it might get set outside). */
1965 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1967 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1968 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1971 /* If library call, now fix the REG_NOTES that contain
1972 insn pointers, namely REG_LIBCALL on FIRST
1973 and REG_RETVAL on I1. */
1974 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1976 XEXP (temp
, 0) = first
;
1977 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1978 XEXP (temp
, 0) = i1
;
1982 do p
= NEXT_INSN (p
);
1983 while (p
&& GET_CODE (p
) == NOTE
);
1986 /* The more regs we move, the less we like moving them. */
1990 /* Any other movable that loads the same register
1992 already_moved
[regno
] = 1;
1994 /* This reg has been moved out of one loop. */
1995 moved_once
[regno
] = 1;
1997 /* The reg set here is now invariant. */
1999 n_times_set
[regno
] = 0;
2003 /* Change the length-of-life info for the register
2004 to say it lives at least the full length of this loop.
2005 This will help guide optimizations in outer loops. */
2007 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2008 /* This is the old insn before all the moved insns.
2009 We can't use the moved insn because it is out of range
2010 in uid_luid. Only the old insns have luids. */
2011 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2012 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2013 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2015 /* Combine with this moved insn any other matching movables. */
2018 for (m1
= movables
; m1
; m1
= m1
->next
)
2023 /* Schedule the reg loaded by M1
2024 for replacement so that shares the reg of M.
2025 If the modes differ (only possible in restricted
2026 circumstances, make a SUBREG. */
2027 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2028 reg_map
[m1
->regno
] = m
->set_dest
;
2031 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2034 /* Get rid of the matching insn
2035 and prevent further processing of it. */
2038 /* if library call, delete all insn except last, which
2040 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2043 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2044 temp
= NEXT_INSN (temp
))
2047 delete_insn (m1
->insn
);
2049 /* Any other movable that loads the same register
2051 already_moved
[m1
->regno
] = 1;
2053 /* The reg merged here is now invariant,
2054 if the reg it matches is invariant. */
2056 n_times_set
[m1
->regno
] = 0;
2059 else if (loop_dump_stream
)
2060 fprintf (loop_dump_stream
, "not desirable");
2062 else if (loop_dump_stream
&& !m
->match
)
2063 fprintf (loop_dump_stream
, "not safe");
2065 if (loop_dump_stream
)
2066 fprintf (loop_dump_stream
, "\n");
2070 new_start
= loop_start
;
2072 /* Go through all the instructions in the loop, making
2073 all the register substitutions scheduled in REG_MAP. */
2074 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2075 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2076 || GET_CODE (p
) == CALL_INSN
)
2078 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2079 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2085 /* Scan X and replace the address of any MEM in it with ADDR.
2086 REG is the address that MEM should have before the replacement. */
2089 replace_call_address (x
, reg
, addr
)
2092 register enum rtx_code code
;
2098 code
= GET_CODE (x
);
2112 /* Short cut for very common case. */
2113 replace_call_address (XEXP (x
, 1), reg
, addr
);
2117 /* Short cut for very common case. */
2118 replace_call_address (XEXP (x
, 0), reg
, addr
);
2122 /* If this MEM uses a reg other than the one we expected,
2123 something is wrong. */
2124 if (XEXP (x
, 0) != reg
)
2130 fmt
= GET_RTX_FORMAT (code
);
2131 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2134 replace_call_address (XEXP (x
, i
), reg
, addr
);
2138 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2139 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2145 /* Return the number of memory refs to addresses that vary
2149 count_nonfixed_reads (x
)
2152 register enum rtx_code code
;
2160 code
= GET_CODE (x
);
2174 return ((invariant_p (XEXP (x
, 0)) != 1)
2175 + count_nonfixed_reads (XEXP (x
, 0)));
2179 fmt
= GET_RTX_FORMAT (code
);
2180 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2183 value
+= count_nonfixed_reads (XEXP (x
, i
));
2187 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2188 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2196 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2197 Replace it with an instruction to load just the low bytes
2198 if the machine supports such an instruction,
2199 and insert above LOOP_START an instruction to clear the register. */
2202 constant_high_bytes (p
, loop_start
)
2206 register int insn_code_number
;
2208 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2209 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2211 new = gen_rtx (SET
, VOIDmode
,
2212 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2213 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2214 SET_DEST (PATTERN (p
)),
2216 XEXP (SET_SRC (PATTERN (p
)), 0));
2217 insn_code_number
= recog (new, p
);
2219 if (insn_code_number
)
2223 /* Clear destination register before the loop. */
2224 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2225 SET_DEST (PATTERN (p
)),
2229 /* Inside the loop, just load the low part. */
2235 /* Scan a loop setting the variables `unknown_address_altered',
2236 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2237 and `loop_has_volatile'.
2238 Also, fill in the array `loop_store_mems'. */
2241 prescan_loop (start
, end
)
2244 register int level
= 1;
2247 unknown_address_altered
= 0;
2249 loop_has_volatile
= 0;
2250 loop_store_mems_idx
= 0;
2256 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2257 insn
= NEXT_INSN (insn
))
2259 if (GET_CODE (insn
) == NOTE
)
2261 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2264 /* Count number of loops contained in this one. */
2267 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2276 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2279 loop_continue
= insn
;
2282 else if (GET_CODE (insn
) == CALL_INSN
)
2284 if (! CONST_CALL_P (insn
))
2285 unknown_address_altered
= 1;
2290 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2292 if (volatile_refs_p (PATTERN (insn
)))
2293 loop_has_volatile
= 1;
2295 note_stores (PATTERN (insn
), note_addr_stored
);
2301 /* Scan the function looking for loops. Record the start and end of each loop.
2302 Also mark as invalid loops any loops that contain a setjmp or are branched
2303 to from outside the loop. */
2306 find_and_verify_loops (f
)
2310 int current_loop
= -1;
2314 /* If there are jumps to undefined labels,
2315 treat them as jumps out of any/all loops.
2316 This also avoids writing past end of tables when there are no loops. */
2317 uid_loop_num
[0] = -1;
2319 /* Find boundaries of loops, mark which loops are contained within
2320 loops, and invalidate loops that have setjmp. */
2322 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2324 if (GET_CODE (insn
) == NOTE
)
2325 switch (NOTE_LINE_NUMBER (insn
))
2327 case NOTE_INSN_LOOP_BEG
:
2328 loop_number_loop_starts
[++next_loop
] = insn
;
2329 loop_number_loop_ends
[next_loop
] = 0;
2330 loop_outer_loop
[next_loop
] = current_loop
;
2331 loop_invalid
[next_loop
] = 0;
2332 loop_number_exit_labels
[next_loop
] = 0;
2333 loop_number_exit_count
[next_loop
] = 0;
2334 current_loop
= next_loop
;
2337 case NOTE_INSN_SETJMP
:
2338 /* In this case, we must invalidate our current loop and any
2340 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2342 loop_invalid
[loop
] = 1;
2343 if (loop_dump_stream
)
2344 fprintf (loop_dump_stream
,
2345 "\nLoop at %d ignored due to setjmp.\n",
2346 INSN_UID (loop_number_loop_starts
[loop
]));
2350 case NOTE_INSN_LOOP_END
:
2351 if (current_loop
== -1)
2354 loop_number_loop_ends
[current_loop
] = insn
;
2355 current_loop
= loop_outer_loop
[current_loop
];
2360 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2361 enclosing loop, but this doesn't matter. */
2362 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2365 /* Any loop containing a label used in an initializer must be invalidated,
2366 because it can be jumped into from anywhere. */
2368 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2372 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2374 loop_num
= loop_outer_loop
[loop_num
])
2375 loop_invalid
[loop_num
] = 1;
2378 /* Any loop containing a label used for an exception handler must be
2379 invalidated, because it can be jumped into from anywhere. */
2381 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2385 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2387 loop_num
= loop_outer_loop
[loop_num
])
2388 loop_invalid
[loop_num
] = 1;
2391 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2392 loop that it is not contained within, that loop is marked invalid.
2393 If any INSN or CALL_INSN uses a label's address, then the loop containing
2394 that label is marked invalid, because it could be jumped into from
2397 Also look for blocks of code ending in an unconditional branch that
2398 exits the loop. If such a block is surrounded by a conditional
2399 branch around the block, move the block elsewhere (see below) and
2400 invert the jump to point to the code block. This may eliminate a
2401 label in our loop and will simplify processing by both us and a
2402 possible second cse pass. */
2404 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2405 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2407 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2409 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2411 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2416 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2418 loop_num
= loop_outer_loop
[loop_num
])
2419 loop_invalid
[loop_num
] = 1;
2423 if (GET_CODE (insn
) != JUMP_INSN
)
2426 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2428 /* See if this is an unconditional branch outside the loop. */
2429 if (this_loop_num
!= -1
2430 && (GET_CODE (PATTERN (insn
)) == RETURN
2431 || (simplejump_p (insn
)
2432 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2434 && get_max_uid () < max_uid_for_loop
)
2437 rtx our_next
= next_real_insn (insn
);
2439 int outer_loop
= -1;
2441 /* Go backwards until we reach the start of the loop, a label,
2443 for (p
= PREV_INSN (insn
);
2444 GET_CODE (p
) != CODE_LABEL
2445 && ! (GET_CODE (p
) == NOTE
2446 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2447 && GET_CODE (p
) != JUMP_INSN
;
2451 /* Check for the case where we have a jump to an inner nested
2452 loop, and do not perform the optimization in that case. */
2454 if (JUMP_LABEL (insn
))
2456 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2457 if (dest_loop
!= -1)
2459 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2460 outer_loop
= loop_outer_loop
[outer_loop
])
2461 if (outer_loop
== this_loop_num
)
2466 /* Make sure that the target of P is within the current loop. */
2468 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2469 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2470 outer_loop
= this_loop_num
;
2472 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2473 we have a block of code to try to move.
2475 We look backward and then forward from the target of INSN
2476 to find a BARRIER at the same loop depth as the target.
2477 If we find such a BARRIER, we make a new label for the start
2478 of the block, invert the jump in P and point it to that label,
2479 and move the block of code to the spot we found. */
2481 if (outer_loop
== -1
2482 && GET_CODE (p
) == JUMP_INSN
2483 && JUMP_LABEL (p
) != 0
2484 /* Just ignore jumps to labels that were never emitted.
2485 These always indicate compilation errors. */
2486 && INSN_UID (JUMP_LABEL (p
)) != 0
2488 && ! simplejump_p (p
)
2489 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2492 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2493 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2496 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2497 if (GET_CODE (loc
) == BARRIER
2498 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2502 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2503 if (GET_CODE (loc
) == BARRIER
2504 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2509 rtx cond_label
= JUMP_LABEL (p
);
2510 rtx new_label
= get_label_after (p
);
2512 /* Ensure our label doesn't go away. */
2513 LABEL_NUSES (cond_label
)++;
2515 /* Verify that uid_loop_num is large enough and that
2517 if (invert_jump (p
, new_label
))
2521 /* Include the BARRIER after INSN and copy the
2523 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2524 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2526 /* All those insns are now in TARGET_LOOP_NUM. */
2527 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2529 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2531 /* The label jumped to by INSN is no longer a loop exit.
2532 Unless INSN does not have a label (e.g., it is a
2533 RETURN insn), search loop_number_exit_labels to find
2534 its label_ref, and remove it. Also turn off
2535 LABEL_OUTSIDE_LOOP_P bit. */
2536 if (JUMP_LABEL (insn
))
2541 r
= loop_number_exit_labels
[this_loop_num
];
2542 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2543 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2545 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2547 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2549 loop_number_exit_labels
[this_loop_num
]
2550 = LABEL_NEXTREF (r
);
2554 for (loop_num
= this_loop_num
;
2555 loop_num
!= -1 && loop_num
!= target_loop_num
;
2556 loop_num
= loop_outer_loop
[loop_num
])
2557 loop_number_exit_count
[loop_num
]--;
2559 /* If we didn't find it, then something is wrong. */
2564 /* P is now a jump outside the loop, so it must be put
2565 in loop_number_exit_labels, and marked as such.
2566 The easiest way to do this is to just call
2567 mark_loop_jump again for P. */
2568 mark_loop_jump (PATTERN (p
), this_loop_num
);
2570 /* If INSN now jumps to the insn after it,
2572 if (JUMP_LABEL (insn
) != 0
2573 && (next_real_insn (JUMP_LABEL (insn
))
2574 == next_real_insn (insn
)))
2578 /* Continue the loop after where the conditional
2579 branch used to jump, since the only branch insn
2580 in the block (if it still remains) is an inter-loop
2581 branch and hence needs no processing. */
2582 insn
= NEXT_INSN (cond_label
);
2584 if (--LABEL_NUSES (cond_label
) == 0)
2585 delete_insn (cond_label
);
2587 /* This loop will be continued with NEXT_INSN (insn). */
2588 insn
= PREV_INSN (insn
);
2595 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2596 loops it is contained in, mark the target loop invalid.
2598 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2601 mark_loop_jump (x
, loop_num
)
2609 switch (GET_CODE (x
))
2622 /* There could be a label reference in here. */
2623 mark_loop_jump (XEXP (x
, 0), loop_num
);
2629 mark_loop_jump (XEXP (x
, 0), loop_num
);
2630 mark_loop_jump (XEXP (x
, 1), loop_num
);
2635 mark_loop_jump (XEXP (x
, 0), loop_num
);
2639 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2641 /* Link together all labels that branch outside the loop. This
2642 is used by final_[bg]iv_value and the loop unrolling code. Also
2643 mark this LABEL_REF so we know that this branch should predict
2646 /* A check to make sure the label is not in an inner nested loop,
2647 since this does not count as a loop exit. */
2648 if (dest_loop
!= -1)
2650 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2651 outer_loop
= loop_outer_loop
[outer_loop
])
2652 if (outer_loop
== loop_num
)
2658 if (loop_num
!= -1 && outer_loop
== -1)
2660 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2661 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2662 loop_number_exit_labels
[loop_num
] = x
;
2664 for (outer_loop
= loop_num
;
2665 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2666 outer_loop
= loop_outer_loop
[outer_loop
])
2667 loop_number_exit_count
[outer_loop
]++;
2670 /* If this is inside a loop, but not in the current loop or one enclosed
2671 by it, it invalidates at least one loop. */
2673 if (dest_loop
== -1)
2676 /* We must invalidate every nested loop containing the target of this
2677 label, except those that also contain the jump insn. */
2679 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2681 /* Stop when we reach a loop that also contains the jump insn. */
2682 for (outer_loop
= loop_num
; outer_loop
!= -1;
2683 outer_loop
= loop_outer_loop
[outer_loop
])
2684 if (dest_loop
== outer_loop
)
2687 /* If we get here, we know we need to invalidate a loop. */
2688 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2689 fprintf (loop_dump_stream
,
2690 "\nLoop at %d ignored due to multiple entry points.\n",
2691 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2693 loop_invalid
[dest_loop
] = 1;
2698 /* If this is not setting pc, ignore. */
2699 if (SET_DEST (x
) == pc_rtx
)
2700 mark_loop_jump (SET_SRC (x
), loop_num
);
2704 mark_loop_jump (XEXP (x
, 1), loop_num
);
2705 mark_loop_jump (XEXP (x
, 2), loop_num
);
2710 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2711 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2715 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2716 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2720 /* Treat anything else (such as a symbol_ref)
2721 as a branch out of this loop, but not into any loop. */
2726 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2727 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2730 loop_number_exit_labels
[loop_num
] = x
;
2732 for (outer_loop
= loop_num
; outer_loop
!= -1;
2733 outer_loop
= loop_outer_loop
[outer_loop
])
2734 loop_number_exit_count
[outer_loop
]++;
2740 /* Return nonzero if there is a label in the range from
2741 insn INSN to and including the insn whose luid is END
2742 INSN must have an assigned luid (i.e., it must not have
2743 been previously created by loop.c). */
2746 labels_in_range_p (insn
, end
)
2750 while (insn
&& INSN_LUID (insn
) <= end
)
2752 if (GET_CODE (insn
) == CODE_LABEL
)
2754 insn
= NEXT_INSN (insn
);
2760 /* Record that a memory reference X is being set. */
2763 note_addr_stored (x
)
2768 if (x
== 0 || GET_CODE (x
) != MEM
)
2771 /* Count number of memory writes.
2772 This affects heuristics in strength_reduce. */
2775 /* BLKmode MEM means all memory is clobbered. */
2776 if (GET_MODE (x
) == BLKmode
)
2777 unknown_address_altered
= 1;
2779 if (unknown_address_altered
)
2782 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2783 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2784 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2786 /* We are storing at the same address as previously noted. Save the
2788 if (GET_MODE_SIZE (GET_MODE (x
))
2789 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2790 loop_store_mems
[i
] = x
;
2794 if (i
== NUM_STORES
)
2795 unknown_address_altered
= 1;
2797 else if (i
== loop_store_mems_idx
)
2798 loop_store_mems
[loop_store_mems_idx
++] = x
;
2801 /* Return nonzero if the rtx X is invariant over the current loop.
2803 The value is 2 if we refer to something only conditionally invariant.
2805 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2806 Otherwise, a memory ref is invariant if it does not conflict with
2807 anything stored in `loop_store_mems'. */
2814 register enum rtx_code code
;
2816 int conditional
= 0;
2820 code
= GET_CODE (x
);
2830 /* A LABEL_REF is normally invariant, however, if we are unrolling
2831 loops, and this label is inside the loop, then it isn't invariant.
2832 This is because each unrolled copy of the loop body will have
2833 a copy of this label. If this was invariant, then an insn loading
2834 the address of this label into a register might get moved outside
2835 the loop, and then each loop body would end up using the same label.
2837 We don't know the loop bounds here though, so just fail for all
2839 if (flag_unroll_loops
)
2846 case UNSPEC_VOLATILE
:
2850 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2851 since the reg might be set by initialization within the loop. */
2853 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2854 || x
== arg_pointer_rtx
)
2855 && ! current_function_has_nonlocal_goto
)
2859 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2862 if (n_times_set
[REGNO (x
)] < 0)
2865 return n_times_set
[REGNO (x
)] == 0;
2868 /* Volatile memory references must be rejected. Do this before
2869 checking for read-only items, so that volatile read-only items
2870 will be rejected also. */
2871 if (MEM_VOLATILE_P (x
))
2874 /* Read-only items (such as constants in a constant pool) are
2875 invariant if their address is. */
2876 if (RTX_UNCHANGING_P (x
))
2879 /* If we filled the table (or had a subroutine call), any location
2880 in memory could have been clobbered. */
2881 if (unknown_address_altered
)
2884 /* See if there is any dependence between a store and this load. */
2885 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2886 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2889 /* It's not invalidated by a store in memory
2890 but we must still verify the address is invariant. */
2894 /* Don't mess with insns declared volatile. */
2895 if (MEM_VOLATILE_P (x
))
2899 fmt
= GET_RTX_FORMAT (code
);
2900 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2904 int tem
= invariant_p (XEXP (x
, i
));
2910 else if (fmt
[i
] == 'E')
2913 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2915 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2925 return 1 + conditional
;
2929 /* Return nonzero if all the insns in the loop that set REG
2930 are INSN and the immediately following insns,
2931 and if each of those insns sets REG in an invariant way
2932 (not counting uses of REG in them).
2934 The value is 2 if some of these insns are only conditionally invariant.
2936 We assume that INSN itself is the first set of REG
2937 and that its source is invariant. */
2940 consec_sets_invariant_p (reg
, n_sets
, insn
)
2944 register rtx p
= insn
;
2945 register int regno
= REGNO (reg
);
2947 /* Number of sets we have to insist on finding after INSN. */
2948 int count
= n_sets
- 1;
2949 int old
= n_times_set
[regno
];
2953 /* If N_SETS hit the limit, we can't rely on its value. */
2957 n_times_set
[regno
] = 0;
2961 register enum rtx_code code
;
2965 code
= GET_CODE (p
);
2967 /* If library call, skip to end of of it. */
2968 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2973 && (set
= single_set (p
))
2974 && GET_CODE (SET_DEST (set
)) == REG
2975 && REGNO (SET_DEST (set
)) == regno
)
2977 this = invariant_p (SET_SRC (set
));
2980 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2982 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2983 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2985 this = (CONSTANT_P (XEXP (temp
, 0))
2986 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
2987 && invariant_p (XEXP (temp
, 0))));
2994 else if (code
!= NOTE
)
2996 n_times_set
[regno
] = old
;
3001 n_times_set
[regno
] = old
;
3002 /* If invariant_p ever returned 2, we return 2. */
3003 return 1 + (value
& 2);
3007 /* I don't think this condition is sufficient to allow INSN
3008 to be moved, so we no longer test it. */
3010 /* Return 1 if all insns in the basic block of INSN and following INSN
3011 that set REG are invariant according to TABLE. */
3014 all_sets_invariant_p (reg
, insn
, table
)
3018 register rtx p
= insn
;
3019 register int regno
= REGNO (reg
);
3023 register enum rtx_code code
;
3025 code
= GET_CODE (p
);
3026 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3028 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3029 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3030 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3032 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3039 /* Look at all uses (not sets) of registers in X. For each, if it is
3040 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3041 a different insn, set USAGE[REGNO] to const0_rtx. */
3044 find_single_use_in_loop (insn
, x
, usage
)
3049 enum rtx_code code
= GET_CODE (x
);
3050 char *fmt
= GET_RTX_FORMAT (code
);
3055 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3056 ? const0_rtx
: insn
;
3058 else if (code
== SET
)
3060 /* Don't count SET_DEST if it is a REG; otherwise count things
3061 in SET_DEST because if a register is partially modified, it won't
3062 show up as a potential movable so we don't care how USAGE is set
3064 if (GET_CODE (SET_DEST (x
)) != REG
)
3065 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3066 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3069 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3071 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3072 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3073 else if (fmt
[i
] == 'E')
3074 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3075 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3079 /* Increment N_TIMES_SET at the index of each register
3080 that is modified by an insn between FROM and TO.
3081 If the value of an element of N_TIMES_SET becomes 127 or more,
3082 stop incrementing it, to avoid overflow.
3084 Store in SINGLE_USAGE[I] the single insn in which register I is
3085 used, if it is only used once. Otherwise, it is set to 0 (for no
3086 uses) or const0_rtx for more than one use. This parameter may be zero,
3087 in which case this processing is not done.
3089 Store in *COUNT_PTR the number of actual instruction
3090 in the loop. We use this to decide what is worth moving out. */
3092 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3093 In that case, it is the insn that last set reg n. */
3096 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3097 register rtx from
, to
;
3103 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3105 register int count
= 0;
3108 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3109 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3111 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3115 /* If requested, record registers that have exactly one use. */
3118 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3120 /* Include uses in REG_EQUAL notes. */
3121 if (REG_NOTES (insn
))
3122 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3125 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3126 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3127 /* Don't move a reg that has an explicit clobber.
3128 We might do so sometimes, but it's not worth the pain. */
3129 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3131 if (GET_CODE (PATTERN (insn
)) == SET
3132 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3134 dest
= SET_DEST (PATTERN (insn
));
3135 while (GET_CODE (dest
) == SUBREG
3136 || GET_CODE (dest
) == ZERO_EXTRACT
3137 || GET_CODE (dest
) == SIGN_EXTRACT
3138 || GET_CODE (dest
) == STRICT_LOW_PART
)
3139 dest
= XEXP (dest
, 0);
3140 if (GET_CODE (dest
) == REG
)
3142 register int regno
= REGNO (dest
);
3143 /* If this is the first setting of this reg
3144 in current basic block, and it was set before,
3145 it must be set in two basic blocks, so it cannot
3146 be moved out of the loop. */
3147 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3148 may_not_move
[regno
] = 1;
3149 /* If this is not first setting in current basic block,
3150 see if reg was used in between previous one and this.
3151 If so, neither one can be moved. */
3152 if (last_set
[regno
] != 0
3153 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3154 may_not_move
[regno
] = 1;
3155 if (n_times_set
[regno
] < 127)
3156 ++n_times_set
[regno
];
3157 last_set
[regno
] = insn
;
3160 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3163 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3165 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3166 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3167 /* Don't move a reg that has an explicit clobber.
3168 It's not worth the pain to try to do it correctly. */
3169 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3171 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3173 dest
= SET_DEST (x
);
3174 while (GET_CODE (dest
) == SUBREG
3175 || GET_CODE (dest
) == ZERO_EXTRACT
3176 || GET_CODE (dest
) == SIGN_EXTRACT
3177 || GET_CODE (dest
) == STRICT_LOW_PART
)
3178 dest
= XEXP (dest
, 0);
3179 if (GET_CODE (dest
) == REG
)
3181 register int regno
= REGNO (dest
);
3182 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3183 may_not_move
[regno
] = 1;
3184 if (last_set
[regno
] != 0
3185 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3186 may_not_move
[regno
] = 1;
3187 if (n_times_set
[regno
] < 127)
3188 ++n_times_set
[regno
];
3189 last_set
[regno
] = insn
;
3196 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3197 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3202 /* Given a loop that is bounded by LOOP_START and LOOP_END
3203 and that is entered at SCAN_START,
3204 return 1 if the register set in SET contained in insn INSN is used by
3205 any insn that precedes INSN in cyclic order starting
3206 from the loop entry point.
3208 We don't want to use INSN_LUID here because if we restrict INSN to those
3209 that have a valid INSN_LUID, it means we cannot move an invariant out
3210 from an inner loop past two loops. */
3213 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3214 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3216 rtx reg
= SET_DEST (set
);
3219 /* Scan forward checking for register usage. If we hit INSN, we
3220 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3221 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3223 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3224 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3234 /* A "basic induction variable" or biv is a pseudo reg that is set
3235 (within this loop) only by incrementing or decrementing it. */
3236 /* A "general induction variable" or giv is a pseudo reg whose
3237 value is a linear function of a biv. */
3239 /* Bivs are recognized by `basic_induction_var';
3240 Givs by `general_induct_var'. */
3242 /* Indexed by register number, indicates whether or not register is an
3243 induction variable, and if so what type. */
3245 enum iv_mode
*reg_iv_type
;
3247 /* Indexed by register number, contains pointer to `struct induction'
3248 if register is an induction variable. This holds general info for
3249 all induction variables. */
3251 struct induction
**reg_iv_info
;
3253 /* Indexed by register number, contains pointer to `struct iv_class'
3254 if register is a basic induction variable. This holds info describing
3255 the class (a related group) of induction variables that the biv belongs
3258 struct iv_class
**reg_biv_class
;
3260 /* The head of a list which links together (via the next field)
3261 every iv class for the current loop. */
3263 struct iv_class
*loop_iv_list
;
3265 /* Communication with routines called via `note_stores'. */
3267 static rtx note_insn
;
3269 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3271 static rtx addr_placeholder
;
3273 /* ??? Unfinished optimizations, and possible future optimizations,
3274 for the strength reduction code. */
3276 /* ??? There is one more optimization you might be interested in doing: to
3277 allocate pseudo registers for frequently-accessed memory locations.
3278 If the same memory location is referenced each time around, it might
3279 be possible to copy it into a register before and out after.
3280 This is especially useful when the memory location is a variable which
3281 is in a stack slot because somewhere its address is taken. If the
3282 loop doesn't contain a function call and the variable isn't volatile,
3283 it is safe to keep the value in a register for the duration of the
3284 loop. One tricky thing is that the copying of the value back from the
3285 register has to be done on all exits from the loop. You need to check that
3286 all the exits from the loop go to the same place. */
3288 /* ??? The interaction of biv elimination, and recognition of 'constant'
3289 bivs, may cause problems. */
3291 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3292 performance problems.
3294 Perhaps don't eliminate things that can be combined with an addressing
3295 mode. Find all givs that have the same biv, mult_val, and add_val;
3296 then for each giv, check to see if its only use dies in a following
3297 memory address. If so, generate a new memory address and check to see
3298 if it is valid. If it is valid, then store the modified memory address,
3299 otherwise, mark the giv as not done so that it will get its own iv. */
3301 /* ??? Could try to optimize branches when it is known that a biv is always
3304 /* ??? When replace a biv in a compare insn, we should replace with closest
3305 giv so that an optimized branch can still be recognized by the combiner,
3306 e.g. the VAX acb insn. */
3308 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3309 was rerun in loop_optimize whenever a register was added or moved.
3310 Also, some of the optimizations could be a little less conservative. */
3312 /* Perform strength reduction and induction variable elimination. */
3314 /* Pseudo registers created during this function will be beyond the last
3315 valid index in several tables including n_times_set and regno_last_uid.
3316 This does not cause a problem here, because the added registers cannot be
3317 givs outside of their loop, and hence will never be reconsidered.
3318 But scan_loop must check regnos to make sure they are in bounds. */
3321 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3322 loop_start
, loop_end
)
3335 /* This is 1 if current insn is not executed at least once for every loop
3337 int not_every_iteration
= 0;
3338 /* This is 1 if current insn may be executed more than once for every
3340 int maybe_multiple
= 0;
3341 /* Temporary list pointers for traversing loop_iv_list. */
3342 struct iv_class
*bl
, **backbl
;
3343 /* Ratio of extra register life span we can justify
3344 for saving an instruction. More if loop doesn't call subroutines
3345 since in that case saving an insn makes more difference
3346 and more registers are available. */
3347 /* ??? could set this to last value of threshold in move_movables */
3348 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3349 /* Map of pseudo-register replacements. */
3353 rtx end_insert_before
;
3356 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3357 * sizeof (enum iv_mode
*));
3358 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3359 reg_iv_info
= (struct induction
**)
3360 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3361 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3362 * sizeof (struct induction
*)));
3363 reg_biv_class
= (struct iv_class
**)
3364 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3365 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3366 * sizeof (struct iv_class
*)));
3369 addr_placeholder
= gen_reg_rtx (Pmode
);
3371 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3372 must be put before this insn, so that they will appear in the right
3373 order (i.e. loop order).
3375 If loop_end is the end of the current function, then emit a
3376 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3378 if (NEXT_INSN (loop_end
) != 0)
3379 end_insert_before
= NEXT_INSN (loop_end
);
3381 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3383 /* Scan through loop to find all possible bivs. */
3389 /* At end of a straight-in loop, we are done.
3390 At end of a loop entered at the bottom, scan the top. */
3391 if (p
== scan_start
)
3399 if (p
== scan_start
)
3403 if (GET_CODE (p
) == INSN
3404 && (set
= single_set (p
))
3405 && GET_CODE (SET_DEST (set
)) == REG
)
3407 dest_reg
= SET_DEST (set
);
3408 if (REGNO (dest_reg
) < max_reg_before_loop
3409 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3410 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3412 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3413 dest_reg
, p
, &inc_val
, &mult_val
))
3415 /* It is a possible basic induction variable.
3416 Create and initialize an induction structure for it. */
3419 = (struct induction
*) alloca (sizeof (struct induction
));
3421 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3422 not_every_iteration
, maybe_multiple
);
3423 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3425 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3426 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3430 /* Past CODE_LABEL, we get to insns that may be executed multiple
3431 times. The only way we can be sure that they can't is if every
3432 every jump insn between here and the end of the loop either
3433 returns, exits the loop, is a forward jump, or is a jump
3434 to the loop start. */
3436 if (GET_CODE (p
) == CODE_LABEL
)
3444 insn
= NEXT_INSN (insn
);
3445 if (insn
== scan_start
)
3453 if (insn
== scan_start
)
3457 if (GET_CODE (insn
) == JUMP_INSN
3458 && GET_CODE (PATTERN (insn
)) != RETURN
3459 && (! condjump_p (insn
)
3460 || (JUMP_LABEL (insn
) != 0
3461 && JUMP_LABEL (insn
) != scan_start
3462 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3463 || INSN_UID (insn
) >= max_uid_for_loop
3464 || (INSN_LUID (JUMP_LABEL (insn
))
3465 < INSN_LUID (insn
))))))
3473 /* Past a jump, we get to insns for which we can't count
3474 on whether they will be executed during each iteration. */
3475 /* This code appears twice in strength_reduce. There is also similar
3476 code in scan_loop. */
3477 if (GET_CODE (p
) == JUMP_INSN
3478 /* If we enter the loop in the middle, and scan around to the
3479 beginning, don't set not_every_iteration for that.
3480 This can be any kind of jump, since we want to know if insns
3481 will be executed if the loop is executed. */
3482 && ! (JUMP_LABEL (p
) == loop_top
3483 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3484 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3488 /* If this is a jump outside the loop, then it also doesn't
3489 matter. Check to see if the target of this branch is on the
3490 loop_number_exits_labels list. */
3492 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3494 label
= LABEL_NEXTREF (label
))
3495 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3499 not_every_iteration
= 1;
3502 else if (GET_CODE (p
) == NOTE
)
3504 /* At the virtual top of a converted loop, insns are again known to
3505 be executed each iteration: logically, the loop begins here
3506 even though the exit code has been duplicated. */
3507 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3508 not_every_iteration
= 0;
3509 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3511 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3515 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3516 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3517 or not an insn is known to be executed each iteration of the
3518 loop, whether or not any iterations are known to occur.
3520 Therefore, if we have just passed a label and have no more labels
3521 between here and the test insn of the loop, we know these insns
3522 will be executed each iteration. */
3524 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3525 && no_labels_between_p (p
, loop_end
))
3526 not_every_iteration
= 0;
3529 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3530 Make a sanity check against n_times_set. */
3531 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3533 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3534 /* Above happens if register modified by subreg, etc. */
3535 /* Make sure it is not recognized as a basic induction var: */
3536 || n_times_set
[bl
->regno
] != bl
->biv_count
3537 /* If never incremented, it is invariant that we decided not to
3538 move. So leave it alone. */
3539 || ! bl
->incremented
)
3541 if (loop_dump_stream
)
3542 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3544 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3545 ? "not induction variable"
3546 : (! bl
->incremented
? "never incremented"
3549 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3556 if (loop_dump_stream
)
3557 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3561 /* Exit if there are no bivs. */
3564 /* Can still unroll the loop anyways, but indicate that there is no
3565 strength reduction info available. */
3566 if (flag_unroll_loops
)
3567 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3572 /* Find initial value for each biv by searching backwards from loop_start,
3573 halting at first label. Also record any test condition. */
3576 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3580 if (GET_CODE (p
) == CALL_INSN
)
3583 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3584 || GET_CODE (p
) == CALL_INSN
)
3585 note_stores (PATTERN (p
), record_initial
);
3587 /* Record any test of a biv that branches around the loop if no store
3588 between it and the start of loop. We only care about tests with
3589 constants and registers and only certain of those. */
3590 if (GET_CODE (p
) == JUMP_INSN
3591 && JUMP_LABEL (p
) != 0
3592 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3593 && (test
= get_condition_for_loop (p
)) != 0
3594 && GET_CODE (XEXP (test
, 0)) == REG
3595 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3596 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3597 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3598 && bl
->init_insn
== 0)
3600 /* If an NE test, we have an initial value! */
3601 if (GET_CODE (test
) == NE
)
3604 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3605 XEXP (test
, 0), XEXP (test
, 1));
3608 bl
->initial_test
= test
;
3612 /* Look at the each biv and see if we can say anything better about its
3613 initial value from any initializing insns set up above. (This is done
3614 in two passes to avoid missing SETs in a PARALLEL.) */
3615 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3619 if (! bl
->init_insn
)
3622 src
= SET_SRC (bl
->init_set
);
3624 if (loop_dump_stream
)
3625 fprintf (loop_dump_stream
,
3626 "Biv %d initialized at insn %d: initial value ",
3627 bl
->regno
, INSN_UID (bl
->init_insn
));
3629 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3630 || GET_MODE (src
) == VOIDmode
)
3631 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3633 bl
->initial_value
= src
;
3635 if (loop_dump_stream
)
3637 if (GET_CODE (src
) == CONST_INT
)
3638 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3641 print_rtl (loop_dump_stream
, src
);
3642 fprintf (loop_dump_stream
, "\n");
3648 /* Biv initial value is not simple move,
3649 so let it keep initial value of "itself". */
3651 if (loop_dump_stream
)
3652 fprintf (loop_dump_stream
, "is complex\n");
3656 /* Search the loop for general induction variables. */
3658 /* A register is a giv if: it is only set once, it is a function of a
3659 biv and a constant (or invariant), and it is not a biv. */
3661 not_every_iteration
= 0;
3667 /* At end of a straight-in loop, we are done.
3668 At end of a loop entered at the bottom, scan the top. */
3669 if (p
== scan_start
)
3677 if (p
== scan_start
)
3681 /* Look for a general induction variable in a register. */
3682 if (GET_CODE (p
) == INSN
3683 && (set
= single_set (p
))
3684 && GET_CODE (SET_DEST (set
)) == REG
3685 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3693 dest_reg
= SET_DEST (set
);
3694 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3697 if (/* SET_SRC is a giv. */
3698 ((benefit
= general_induction_var (SET_SRC (set
),
3701 /* Equivalent expression is a giv. */
3702 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3703 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3705 &add_val
, &mult_val
))))
3706 /* Don't try to handle any regs made by loop optimization.
3707 We have nothing on them in regno_first_uid, etc. */
3708 && REGNO (dest_reg
) < max_reg_before_loop
3709 /* Don't recognize a BASIC_INDUCT_VAR here. */
3710 && dest_reg
!= src_reg
3711 /* This must be the only place where the register is set. */
3712 && (n_times_set
[REGNO (dest_reg
)] == 1
3713 /* or all sets must be consecutive and make a giv. */
3714 || (benefit
= consec_sets_giv (benefit
, p
,
3716 &add_val
, &mult_val
))))
3720 = (struct induction
*) alloca (sizeof (struct induction
));
3723 /* If this is a library call, increase benefit. */
3724 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3725 benefit
+= libcall_benefit (p
);
3727 /* Skip the consecutive insns, if there are any. */
3728 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3731 /* If first insn of libcall sequence, skip to end.
3732 Do this at start of loop, since INSN is guaranteed to
3734 if (GET_CODE (p
) != NOTE
3735 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3738 do p
= NEXT_INSN (p
);
3739 while (GET_CODE (p
) == NOTE
);
3742 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3743 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3749 #ifndef DONT_REDUCE_ADDR
3750 /* Look for givs which are memory addresses. */
3751 /* This resulted in worse code on a VAX 8600. I wonder if it
3753 if (GET_CODE (p
) == INSN
)
3754 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3758 /* Update the status of whether giv can derive other givs. This can
3759 change when we pass a label or an insn that updates a biv. */
3760 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3761 || GET_CODE (p
) == CODE_LABEL
)
3762 update_giv_derive (p
);
3764 /* Past a jump, we get to insns for which we can't count
3765 on whether they will be executed during each iteration. */
3766 /* This code appears twice in strength_reduce. There is also similar
3767 code in scan_loop. */
3768 if (GET_CODE (p
) == JUMP_INSN
3769 /* If we enter the loop in the middle, and scan around to the
3770 beginning, don't set not_every_iteration for that.
3771 This can be any kind of jump, since we want to know if insns
3772 will be executed if the loop is executed. */
3773 && ! (JUMP_LABEL (p
) == loop_top
3774 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3775 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3779 /* If this is a jump outside the loop, then it also doesn't
3780 matter. Check to see if the target of this branch is on the
3781 loop_number_exits_labels list. */
3783 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3785 label
= LABEL_NEXTREF (label
))
3786 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3790 not_every_iteration
= 1;
3793 else if (GET_CODE (p
) == NOTE
)
3795 /* At the virtual top of a converted loop, insns are again known to
3796 be executed each iteration: logically, the loop begins here
3797 even though the exit code has been duplicated. */
3798 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3799 not_every_iteration
= 0;
3800 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3802 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3806 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3807 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3808 or not an insn is known to be executed each iteration of the
3809 loop, whether or not any iterations are known to occur.
3811 Therefore, if we have just passed a label and have no more labels
3812 between here and the test insn of the loop, we know these insns
3813 will be executed each iteration. */
3815 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3816 && no_labels_between_p (p
, loop_end
))
3817 not_every_iteration
= 0;
3820 /* Try to calculate and save the number of loop iterations. This is
3821 set to zero if the actual number can not be calculated. This must
3822 be called after all giv's have been identified, since otherwise it may
3823 fail if the iteration variable is a giv. */
3825 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3827 /* Now for each giv for which we still don't know whether or not it is
3828 replaceable, check to see if it is replaceable because its final value
3829 can be calculated. This must be done after loop_iterations is called,
3830 so that final_giv_value will work correctly. */
3832 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3834 struct induction
*v
;
3836 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3837 if (! v
->replaceable
&& ! v
->not_replaceable
)
3838 check_final_value (v
, loop_start
, loop_end
);
3841 /* Try to prove that the loop counter variable (if any) is always
3842 nonnegative; if so, record that fact with a REG_NONNEG note
3843 so that "decrement and branch until zero" insn can be used. */
3844 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3847 /* record loop-variables relevant for BCT optimization before unrolling
3848 the loop. Unrolling may update part of this information, and the
3849 correct data will be used for generating the BCT. */
3850 #ifdef HAVE_decrement_and_branch_on_count
3851 if (HAVE_decrement_and_branch_on_count
)
3852 analyze_loop_iterations (loop_start
, loop_end
);
3856 /* Create reg_map to hold substitutions for replaceable giv regs. */
3857 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3858 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3860 /* Examine each iv class for feasibility of strength reduction/induction
3861 variable elimination. */
3863 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3865 struct induction
*v
;
3868 rtx final_value
= 0;
3870 /* Test whether it will be possible to eliminate this biv
3871 provided all givs are reduced. This is possible if either
3872 the reg is not used outside the loop, or we can compute
3873 what its final value will be.
3875 For architectures with a decrement_and_branch_until_zero insn,
3876 don't do this if we put a REG_NONNEG note on the endtest for
3879 /* Compare against bl->init_insn rather than loop_start.
3880 We aren't concerned with any uses of the biv between
3881 init_insn and loop_start since these won't be affected
3882 by the value of the biv elsewhere in the function, so
3883 long as init_insn doesn't use the biv itself.
3884 March 14, 1989 -- self@bayes.arc.nasa.gov */
3886 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3888 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3889 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3890 #ifdef HAVE_decrement_and_branch_until_zero
3893 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3894 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3895 #ifdef HAVE_decrement_and_branch_until_zero
3899 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3900 threshold
, insn_count
);
3903 if (loop_dump_stream
)
3905 fprintf (loop_dump_stream
,
3906 "Cannot eliminate biv %d.\n",
3908 fprintf (loop_dump_stream
,
3909 "First use: insn %d, last use: insn %d.\n",
3910 REGNO_FIRST_UID (bl
->regno
),
3911 REGNO_LAST_UID (bl
->regno
));
3915 /* Combine all giv's for this iv_class. */
3918 /* This will be true at the end, if all givs which depend on this
3919 biv have been strength reduced.
3920 We can't (currently) eliminate the biv unless this is so. */
3923 /* Check each giv in this class to see if we will benefit by reducing
3924 it. Skip giv's combined with others. */
3925 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3927 struct induction
*tv
;
3929 if (v
->ignore
|| v
->same
)
3932 benefit
= v
->benefit
;
3934 /* Reduce benefit if not replaceable, since we will insert
3935 a move-insn to replace the insn that calculates this giv.
3936 Don't do this unless the giv is a user variable, since it
3937 will often be marked non-replaceable because of the duplication
3938 of the exit code outside the loop. In such a case, the copies
3939 we insert are dead and will be deleted. So they don't have
3940 a cost. Similar situations exist. */
3941 /* ??? The new final_[bg]iv_value code does a much better job
3942 of finding replaceable giv's, and hence this code may no longer
3944 if (! v
->replaceable
&& ! bl
->eliminable
3945 && REG_USERVAR_P (v
->dest_reg
))
3946 benefit
-= copy_cost
;
3948 /* Decrease the benefit to count the add-insns that we will
3949 insert to increment the reduced reg for the giv. */
3950 benefit
-= add_cost
* bl
->biv_count
;
3952 /* Decide whether to strength-reduce this giv or to leave the code
3953 unchanged (recompute it from the biv each time it is used).
3954 This decision can be made independently for each giv. */
3957 /* Attempt to guess whether autoincrement will handle some of the
3958 new add insns; if so, increase BENEFIT (undo the subtraction of
3959 add_cost that was done above). */
3960 if (v
->giv_type
== DEST_ADDR
3961 && GET_CODE (v
->mult_val
) == CONST_INT
)
3963 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3964 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3965 benefit
+= add_cost
* bl
->biv_count
;
3967 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3968 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3969 benefit
+= add_cost
* bl
->biv_count
;
3974 /* If an insn is not to be strength reduced, then set its ignore
3975 flag, and clear all_reduced. */
3977 /* A giv that depends on a reversed biv must be reduced if it is
3978 used after the loop exit, otherwise, it would have the wrong
3979 value after the loop exit. To make it simple, just reduce all
3980 of such giv's whether or not we know they are used after the loop
3983 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
3986 if (loop_dump_stream
)
3987 fprintf (loop_dump_stream
,
3988 "giv of insn %d not worth while, %d vs %d.\n",
3990 v
->lifetime
* threshold
* benefit
, insn_count
);
3996 /* Check that we can increment the reduced giv without a
3997 multiply insn. If not, reject it. */
3999 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4000 if (tv
->mult_val
== const1_rtx
4001 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4003 if (loop_dump_stream
)
4004 fprintf (loop_dump_stream
,
4005 "giv of insn %d: would need a multiply.\n",
4006 INSN_UID (v
->insn
));
4014 /* Reduce each giv that we decided to reduce. */
4016 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4018 struct induction
*tv
;
4019 if (! v
->ignore
&& v
->same
== 0)
4021 int auto_inc_opt
= 0;
4023 v
->new_reg
= gen_reg_rtx (v
->mode
);
4026 /* If the target has auto-increment addressing modes, and
4027 this is an address giv, then try to put the increment
4028 immediately after its use, so that flow can create an
4029 auto-increment addressing mode. */
4030 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4031 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4032 /* We don't handle reversed biv's because bl->biv->insn
4033 does not have a valid INSN_LUID. */
4035 && v
->always_executed
&& ! v
->maybe_multiple
)
4037 /* If other giv's have been combined with this one, then
4038 this will work only if all uses of the other giv's occur
4039 before this giv's insn. This is difficult to check.
4041 We simplify this by looking for the common case where
4042 there is one DEST_REG giv, and this giv's insn is the
4043 last use of the dest_reg of that DEST_REG giv. If the
4044 the increment occurs after the address giv, then we can
4045 perform the optimization. (Otherwise, the increment
4046 would have to go before other_giv, and we would not be
4047 able to combine it with the address giv to get an
4048 auto-inc address.) */
4049 if (v
->combined_with
)
4051 struct induction
*other_giv
= 0;
4053 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4061 if (! tv
&& other_giv
4062 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4063 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4064 == INSN_UID (v
->insn
))
4065 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4068 /* Check for case where increment is before the the address
4070 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
4079 /* We can't put an insn immediately after one setting
4080 cc0, or immediately before one using cc0. */
4081 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4082 || (auto_inc_opt
== -1
4083 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4084 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4085 && sets_cc0_p (PATTERN (prev
))))
4091 v
->auto_inc_opt
= 1;
4095 /* For each place where the biv is incremented, add an insn
4096 to increment the new, reduced reg for the giv. */
4097 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4102 insert_before
= tv
->insn
;
4103 else if (auto_inc_opt
== 1)
4104 insert_before
= NEXT_INSN (v
->insn
);
4106 insert_before
= v
->insn
;
4108 if (tv
->mult_val
== const1_rtx
)
4109 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4110 v
->new_reg
, v
->new_reg
, insert_before
);
4111 else /* tv->mult_val == const0_rtx */
4112 /* A multiply is acceptable here
4113 since this is presumed to be seldom executed. */
4114 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4115 v
->add_val
, v
->new_reg
, insert_before
);
4118 /* Add code at loop start to initialize giv's reduced reg. */
4120 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4121 v
->add_val
, v
->new_reg
, loop_start
);
4125 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4128 For each giv register that can be reduced now: if replaceable,
4129 substitute reduced reg wherever the old giv occurs;
4130 else add new move insn "giv_reg = reduced_reg".
4132 Also check for givs whose first use is their definition and whose
4133 last use is the definition of another giv. If so, it is likely
4134 dead and should not be used to eliminate a biv. */
4135 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4137 if (v
->same
&& v
->same
->ignore
)
4143 if (v
->giv_type
== DEST_REG
4144 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4146 struct induction
*v1
;
4148 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4149 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4153 /* Update expression if this was combined, in case other giv was
4156 v
->new_reg
= replace_rtx (v
->new_reg
,
4157 v
->same
->dest_reg
, v
->same
->new_reg
);
4159 if (v
->giv_type
== DEST_ADDR
)
4160 /* Store reduced reg as the address in the memref where we found
4162 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4163 else if (v
->replaceable
)
4165 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4168 /* I can no longer duplicate the original problem. Perhaps
4169 this is unnecessary now? */
4171 /* Replaceable; it isn't strictly necessary to delete the old
4172 insn and emit a new one, because v->dest_reg is now dead.
4174 However, especially when unrolling loops, the special
4175 handling for (set REG0 REG1) in the second cse pass may
4176 make v->dest_reg live again. To avoid this problem, emit
4177 an insn to set the original giv reg from the reduced giv.
4178 We can not delete the original insn, since it may be part
4179 of a LIBCALL, and the code in flow that eliminates dead
4180 libcalls will fail if it is deleted. */
4181 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4187 /* Not replaceable; emit an insn to set the original giv reg from
4188 the reduced giv, same as above. */
4189 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4193 /* When a loop is reversed, givs which depend on the reversed
4194 biv, and which are live outside the loop, must be set to their
4195 correct final value. This insn is only needed if the giv is
4196 not replaceable. The correct final value is the same as the
4197 value that the giv starts the reversed loop with. */
4198 if (bl
->reversed
&& ! v
->replaceable
)
4199 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4200 v
->add_val
, v
->dest_reg
, end_insert_before
);
4201 else if (v
->final_value
)
4205 /* If the loop has multiple exits, emit the insn before the
4206 loop to ensure that it will always be executed no matter
4207 how the loop exits. Otherwise, emit the insn after the loop,
4208 since this is slightly more efficient. */
4209 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4210 insert_before
= loop_start
;
4212 insert_before
= end_insert_before
;
4213 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4217 /* If the insn to set the final value of the giv was emitted
4218 before the loop, then we must delete the insn inside the loop
4219 that sets it. If this is a LIBCALL, then we must delete
4220 every insn in the libcall. Note, however, that
4221 final_giv_value will only succeed when there are multiple
4222 exits if the giv is dead at each exit, hence it does not
4223 matter that the original insn remains because it is dead
4225 /* Delete the insn inside the loop that sets the giv since
4226 the giv is now set before (or after) the loop. */
4227 delete_insn (v
->insn
);
4231 if (loop_dump_stream
)
4233 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4234 INSN_UID (v
->insn
));
4235 print_rtl (loop_dump_stream
, v
->new_reg
);
4236 fprintf (loop_dump_stream
, "\n");
4240 /* All the givs based on the biv bl have been reduced if they
4243 /* For each giv not marked as maybe dead that has been combined with a
4244 second giv, clear any "maybe dead" mark on that second giv.
4245 v->new_reg will either be or refer to the register of the giv it
4248 Doing this clearing avoids problems in biv elimination where a
4249 giv's new_reg is a complex value that can't be put in the insn but
4250 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4251 Since the register will be used in either case, we'd prefer it be
4252 used from the simpler giv. */
4254 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4255 if (! v
->maybe_dead
&& v
->same
)
4256 v
->same
->maybe_dead
= 0;
4258 /* Try to eliminate the biv, if it is a candidate.
4259 This won't work if ! all_reduced,
4260 since the givs we planned to use might not have been reduced.
4262 We have to be careful that we didn't initially think we could eliminate
4263 this biv because of a giv that we now think may be dead and shouldn't
4264 be used as a biv replacement.
4266 Also, there is the possibility that we may have a giv that looks
4267 like it can be used to eliminate a biv, but the resulting insn
4268 isn't valid. This can happen, for example, on the 88k, where a
4269 JUMP_INSN can compare a register only with zero. Attempts to
4270 replace it with a compare with a constant will fail.
4272 Note that in cases where this call fails, we may have replaced some
4273 of the occurrences of the biv with a giv, but no harm was done in
4274 doing so in the rare cases where it can occur. */
4276 if (all_reduced
== 1 && bl
->eliminable
4277 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4278 threshold
, insn_count
))
4281 /* ?? If we created a new test to bypass the loop entirely,
4282 or otherwise drop straight in, based on this test, then
4283 we might want to rewrite it also. This way some later
4284 pass has more hope of removing the initialization of this
4287 /* If final_value != 0, then the biv may be used after loop end
4288 and we must emit an insn to set it just in case.
4290 Reversed bivs already have an insn after the loop setting their
4291 value, so we don't need another one. We can't calculate the
4292 proper final value for such a biv here anyways. */
4293 if (final_value
!= 0 && ! bl
->reversed
)
4297 /* If the loop has multiple exits, emit the insn before the
4298 loop to ensure that it will always be executed no matter
4299 how the loop exits. Otherwise, emit the insn after the
4300 loop, since this is slightly more efficient. */
4301 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4302 insert_before
= loop_start
;
4304 insert_before
= end_insert_before
;
4306 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4311 /* Delete all of the instructions inside the loop which set
4312 the biv, as they are all dead. If is safe to delete them,
4313 because an insn setting a biv will never be part of a libcall. */
4314 /* However, deleting them will invalidate the regno_last_uid info,
4315 so keeping them around is more convenient. Final_biv_value
4316 will only succeed when there are multiple exits if the biv
4317 is dead at each exit, hence it does not matter that the original
4318 insn remains, because it is dead anyways. */
4319 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4320 delete_insn (v
->insn
);
4323 if (loop_dump_stream
)
4324 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4329 /* Go through all the instructions in the loop, making all the
4330 register substitutions scheduled in REG_MAP. */
4332 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4333 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4334 || GET_CODE (p
) == CALL_INSN
)
4336 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4337 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4341 /* Unroll loops from within strength reduction so that we can use the
4342 induction variable information that strength_reduce has already
4345 if (flag_unroll_loops
)
4346 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4349 /* instrument the loop with bct insn */
4350 #ifdef HAVE_decrement_and_branch_on_count
4351 if (HAVE_decrement_and_branch_on_count
)
4352 insert_bct (loop_start
, loop_end
);
4356 if (loop_dump_stream
)
4357 fprintf (loop_dump_stream
, "\n");
4360 /* Return 1 if X is a valid source for an initial value (or as value being
4361 compared against in an initial test).
4363 X must be either a register or constant and must not be clobbered between
4364 the current insn and the start of the loop.
4366 INSN is the insn containing X. */
4369 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4378 /* Only consider pseudos we know about initialized in insns whose luids
4380 if (GET_CODE (x
) != REG
4381 || REGNO (x
) >= max_reg_before_loop
)
4384 /* Don't use call-clobbered registers across a call which clobbers it. On
4385 some machines, don't use any hard registers at all. */
4386 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4388 #ifdef SMALL_REGISTER_CLASSES
4389 SMALL_REGISTER_CLASSES
4393 || (call_used_regs
[REGNO (x
)] && call_seen
))
4397 /* Don't use registers that have been clobbered before the start of the
4399 if (reg_set_between_p (x
, insn
, loop_start
))
4405 /* Scan X for memory refs and check each memory address
4406 as a possible giv. INSN is the insn whose pattern X comes from.
4407 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4408 every loop iteration. */
4411 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4414 int not_every_iteration
;
4415 rtx loop_start
, loop_end
;
4418 register enum rtx_code code
;
4424 code
= GET_CODE (x
);
4448 benefit
= general_induction_var (XEXP (x
, 0),
4449 &src_reg
, &add_val
, &mult_val
);
4451 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4452 Such a giv isn't useful. */
4453 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4455 /* Found one; record it. */
4457 = (struct induction
*) oballoc (sizeof (struct induction
));
4459 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4460 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4461 &XEXP (x
, 0), loop_start
, loop_end
);
4463 v
->mem_mode
= GET_MODE (x
);
4469 /* Recursively scan the subexpressions for other mem refs. */
4471 fmt
= GET_RTX_FORMAT (code
);
4472 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4474 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4476 else if (fmt
[i
] == 'E')
4477 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4478 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4479 loop_start
, loop_end
);
4482 /* Fill in the data about one biv update.
4483 V is the `struct induction' in which we record the biv. (It is
4484 allocated by the caller, with alloca.)
4485 INSN is the insn that sets it.
4486 DEST_REG is the biv's reg.
4488 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4489 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4490 being set to INC_VAL.
4492 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4493 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4494 can be executed more than once per iteration. If MAYBE_MULTIPLE
4495 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4496 executed exactly once per iteration. */
4499 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4500 not_every_iteration
, maybe_multiple
)
4501 struct induction
*v
;
4506 int not_every_iteration
;
4509 struct iv_class
*bl
;
4512 v
->src_reg
= dest_reg
;
4513 v
->dest_reg
= dest_reg
;
4514 v
->mult_val
= mult_val
;
4515 v
->add_val
= inc_val
;
4516 v
->mode
= GET_MODE (dest_reg
);
4517 v
->always_computable
= ! not_every_iteration
;
4518 v
->always_executed
= ! not_every_iteration
;
4519 v
->maybe_multiple
= maybe_multiple
;
4521 /* Add this to the reg's iv_class, creating a class
4522 if this is the first incrementation of the reg. */
4524 bl
= reg_biv_class
[REGNO (dest_reg
)];
4527 /* Create and initialize new iv_class. */
4529 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4531 bl
->regno
= REGNO (dest_reg
);
4537 /* Set initial value to the reg itself. */
4538 bl
->initial_value
= dest_reg
;
4539 /* We haven't seen the initializing insn yet */
4542 bl
->initial_test
= 0;
4543 bl
->incremented
= 0;
4547 bl
->total_benefit
= 0;
4549 /* Add this class to loop_iv_list. */
4550 bl
->next
= loop_iv_list
;
4553 /* Put it in the array of biv register classes. */
4554 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4557 /* Update IV_CLASS entry for this biv. */
4558 v
->next_iv
= bl
->biv
;
4561 if (mult_val
== const1_rtx
)
4562 bl
->incremented
= 1;
4564 if (loop_dump_stream
)
4566 fprintf (loop_dump_stream
,
4567 "Insn %d: possible biv, reg %d,",
4568 INSN_UID (insn
), REGNO (dest_reg
));
4569 if (GET_CODE (inc_val
) == CONST_INT
)
4570 fprintf (loop_dump_stream
, " const = %d\n",
4574 fprintf (loop_dump_stream
, " const = ");
4575 print_rtl (loop_dump_stream
, inc_val
);
4576 fprintf (loop_dump_stream
, "\n");
4581 /* Fill in the data about one giv.
4582 V is the `struct induction' in which we record the giv. (It is
4583 allocated by the caller, with alloca.)
4584 INSN is the insn that sets it.
4585 BENEFIT estimates the savings from deleting this insn.
4586 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4587 into a register or is used as a memory address.
4589 SRC_REG is the biv reg which the giv is computed from.
4590 DEST_REG is the giv's reg (if the giv is stored in a reg).
4591 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4592 LOCATION points to the place where this giv's value appears in INSN. */
4595 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4596 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4597 struct induction
*v
;
4601 rtx mult_val
, add_val
;
4604 int not_every_iteration
;
4606 rtx loop_start
, loop_end
;
4608 struct induction
*b
;
4609 struct iv_class
*bl
;
4610 rtx set
= single_set (insn
);
4614 v
->src_reg
= src_reg
;
4616 v
->dest_reg
= dest_reg
;
4617 v
->mult_val
= mult_val
;
4618 v
->add_val
= add_val
;
4619 v
->benefit
= benefit
;
4620 v
->location
= location
;
4622 v
->combined_with
= 0;
4623 v
->maybe_multiple
= 0;
4625 v
->derive_adjustment
= 0;
4631 v
->auto_inc_opt
= 0;
4635 /* The v->always_computable field is used in update_giv_derive, to
4636 determine whether a giv can be used to derive another giv. For a
4637 DEST_REG giv, INSN computes a new value for the giv, so its value
4638 isn't computable if INSN insn't executed every iteration.
4639 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4640 it does not compute a new value. Hence the value is always computable
4641 regardless of whether INSN is executed each iteration. */
4643 if (type
== DEST_ADDR
)
4644 v
->always_computable
= 1;
4646 v
->always_computable
= ! not_every_iteration
;
4648 v
->always_executed
= ! not_every_iteration
;
4650 if (type
== DEST_ADDR
)
4652 v
->mode
= GET_MODE (*location
);
4656 else /* type == DEST_REG */
4658 v
->mode
= GET_MODE (SET_DEST (set
));
4660 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4661 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4663 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4665 /* If the lifetime is zero, it means that this register is
4666 really a dead store. So mark this as a giv that can be
4667 ignored. This will not prevent the biv from being eliminated. */
4668 if (v
->lifetime
== 0)
4671 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4672 reg_iv_info
[REGNO (dest_reg
)] = v
;
4675 /* Add the giv to the class of givs computed from one biv. */
4677 bl
= reg_biv_class
[REGNO (src_reg
)];
4680 v
->next_iv
= bl
->giv
;
4682 /* Don't count DEST_ADDR. This is supposed to count the number of
4683 insns that calculate givs. */
4684 if (type
== DEST_REG
)
4686 bl
->total_benefit
+= benefit
;
4689 /* Fatal error, biv missing for this giv? */
4692 if (type
== DEST_ADDR
)
4696 /* The giv can be replaced outright by the reduced register only if all
4697 of the following conditions are true:
4698 - the insn that sets the giv is always executed on any iteration
4699 on which the giv is used at all
4700 (there are two ways to deduce this:
4701 either the insn is executed on every iteration,
4702 or all uses follow that insn in the same basic block),
4703 - the giv is not used outside the loop
4704 - no assignments to the biv occur during the giv's lifetime. */
4706 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4707 /* Previous line always fails if INSN was moved by loop opt. */
4708 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4709 && (! not_every_iteration
4710 || last_use_this_basic_block (dest_reg
, insn
)))
4712 /* Now check that there are no assignments to the biv within the
4713 giv's lifetime. This requires two separate checks. */
4715 /* Check each biv update, and fail if any are between the first
4716 and last use of the giv.
4718 If this loop contains an inner loop that was unrolled, then
4719 the insn modifying the biv may have been emitted by the loop
4720 unrolling code, and hence does not have a valid luid. Just
4721 mark the biv as not replaceable in this case. It is not very
4722 useful as a biv, because it is used in two different loops.
4723 It is very unlikely that we would be able to optimize the giv
4724 using this biv anyways. */
4727 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4729 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4730 || ((uid_luid
[INSN_UID (b
->insn
)]
4731 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4732 && (uid_luid
[INSN_UID (b
->insn
)]
4733 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4736 v
->not_replaceable
= 1;
4741 /* If there are any backwards branches that go from after the
4742 biv update to before it, then this giv is not replaceable. */
4744 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4745 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4748 v
->not_replaceable
= 1;
4754 /* May still be replaceable, we don't have enough info here to
4757 v
->not_replaceable
= 0;
4761 if (loop_dump_stream
)
4763 if (type
== DEST_REG
)
4764 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4765 INSN_UID (insn
), REGNO (dest_reg
));
4767 fprintf (loop_dump_stream
, "Insn %d: dest address",
4770 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4771 REGNO (src_reg
), v
->benefit
);
4772 fprintf (loop_dump_stream
, " used %d lifetime %d",
4773 v
->times_used
, v
->lifetime
);
4776 fprintf (loop_dump_stream
, " replaceable");
4778 if (GET_CODE (mult_val
) == CONST_INT
)
4779 fprintf (loop_dump_stream
, " mult %d",
4783 fprintf (loop_dump_stream
, " mult ");
4784 print_rtl (loop_dump_stream
, mult_val
);
4787 if (GET_CODE (add_val
) == CONST_INT
)
4788 fprintf (loop_dump_stream
, " add %d",
4792 fprintf (loop_dump_stream
, " add ");
4793 print_rtl (loop_dump_stream
, add_val
);
4797 if (loop_dump_stream
)
4798 fprintf (loop_dump_stream
, "\n");
4803 /* All this does is determine whether a giv can be made replaceable because
4804 its final value can be calculated. This code can not be part of record_giv
4805 above, because final_giv_value requires that the number of loop iterations
4806 be known, and that can not be accurately calculated until after all givs
4807 have been identified. */
4810 check_final_value (v
, loop_start
, loop_end
)
4811 struct induction
*v
;
4812 rtx loop_start
, loop_end
;
4814 struct iv_class
*bl
;
4815 rtx final_value
= 0;
4817 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4819 /* DEST_ADDR givs will never reach here, because they are always marked
4820 replaceable above in record_giv. */
4822 /* The giv can be replaced outright by the reduced register only if all
4823 of the following conditions are true:
4824 - the insn that sets the giv is always executed on any iteration
4825 on which the giv is used at all
4826 (there are two ways to deduce this:
4827 either the insn is executed on every iteration,
4828 or all uses follow that insn in the same basic block),
4829 - its final value can be calculated (this condition is different
4830 than the one above in record_giv)
4831 - no assignments to the biv occur during the giv's lifetime. */
4834 /* This is only called now when replaceable is known to be false. */
4835 /* Clear replaceable, so that it won't confuse final_giv_value. */
4839 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4840 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4842 int biv_increment_seen
= 0;
4848 /* When trying to determine whether or not a biv increment occurs
4849 during the lifetime of the giv, we can ignore uses of the variable
4850 outside the loop because final_value is true. Hence we can not
4851 use regno_last_uid and regno_first_uid as above in record_giv. */
4853 /* Search the loop to determine whether any assignments to the
4854 biv occur during the giv's lifetime. Start with the insn
4855 that sets the giv, and search around the loop until we come
4856 back to that insn again.
4858 Also fail if there is a jump within the giv's lifetime that jumps
4859 to somewhere outside the lifetime but still within the loop. This
4860 catches spaghetti code where the execution order is not linear, and
4861 hence the above test fails. Here we assume that the giv lifetime
4862 does not extend from one iteration of the loop to the next, so as
4863 to make the test easier. Since the lifetime isn't known yet,
4864 this requires two loops. See also record_giv above. */
4866 last_giv_use
= v
->insn
;
4872 p
= NEXT_INSN (loop_start
);
4876 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4877 || GET_CODE (p
) == CALL_INSN
)
4879 if (biv_increment_seen
)
4881 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4884 v
->not_replaceable
= 1;
4888 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4889 biv_increment_seen
= 1;
4890 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4895 /* Now that the lifetime of the giv is known, check for branches
4896 from within the lifetime to outside the lifetime if it is still
4906 p
= NEXT_INSN (loop_start
);
4907 if (p
== last_giv_use
)
4910 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4911 && LABEL_NAME (JUMP_LABEL (p
))
4912 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4913 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4914 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4915 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4916 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4917 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4918 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4921 v
->not_replaceable
= 1;
4923 if (loop_dump_stream
)
4924 fprintf (loop_dump_stream
,
4925 "Found branch outside giv lifetime.\n");
4932 /* If it is replaceable, then save the final value. */
4934 v
->final_value
= final_value
;
4937 if (loop_dump_stream
&& v
->replaceable
)
4938 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4939 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4942 /* Update the status of whether a giv can derive other givs.
4944 We need to do something special if there is or may be an update to the biv
4945 between the time the giv is defined and the time it is used to derive
4948 In addition, a giv that is only conditionally set is not allowed to
4949 derive another giv once a label has been passed.
4951 The cases we look at are when a label or an update to a biv is passed. */
4954 update_giv_derive (p
)
4957 struct iv_class
*bl
;
4958 struct induction
*biv
, *giv
;
4962 /* Search all IV classes, then all bivs, and finally all givs.
4964 There are three cases we are concerned with. First we have the situation
4965 of a giv that is only updated conditionally. In that case, it may not
4966 derive any givs after a label is passed.
4968 The second case is when a biv update occurs, or may occur, after the
4969 definition of a giv. For certain biv updates (see below) that are
4970 known to occur between the giv definition and use, we can adjust the
4971 giv definition. For others, or when the biv update is conditional,
4972 we must prevent the giv from deriving any other givs. There are two
4973 sub-cases within this case.
4975 If this is a label, we are concerned with any biv update that is done
4976 conditionally, since it may be done after the giv is defined followed by
4977 a branch here (actually, we need to pass both a jump and a label, but
4978 this extra tracking doesn't seem worth it).
4980 If this is a jump, we are concerned about any biv update that may be
4981 executed multiple times. We are actually only concerned about
4982 backward jumps, but it is probably not worth performing the test
4983 on the jump again here.
4985 If this is a biv update, we must adjust the giv status to show that a
4986 subsequent biv update was performed. If this adjustment cannot be done,
4987 the giv cannot derive further givs. */
4989 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4990 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
4991 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
4994 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
4996 /* If cant_derive is already true, there is no point in
4997 checking all of these conditions again. */
4998 if (giv
->cant_derive
)
5001 /* If this giv is conditionally set and we have passed a label,
5002 it cannot derive anything. */
5003 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5004 giv
->cant_derive
= 1;
5006 /* Skip givs that have mult_val == 0, since
5007 they are really invariants. Also skip those that are
5008 replaceable, since we know their lifetime doesn't contain
5010 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5013 /* The only way we can allow this giv to derive another
5014 is if this is a biv increment and we can form the product
5015 of biv->add_val and giv->mult_val. In this case, we will
5016 be able to compute a compensation. */
5017 else if (biv
->insn
== p
)
5021 if (biv
->mult_val
== const1_rtx
)
5022 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
5027 if (tem
&& giv
->derive_adjustment
)
5028 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
5029 giv
->derive_adjustment
),
5032 giv
->derive_adjustment
= tem
;
5034 giv
->cant_derive
= 1;
5036 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5037 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5038 giv
->cant_derive
= 1;
5043 /* Check whether an insn is an increment legitimate for a basic induction var.
5044 X is the source of insn P, or a part of it.
5045 MODE is the mode in which X should be interpreted.
5047 DEST_REG is the putative biv, also the destination of the insn.
5048 We accept patterns of these forms:
5049 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5050 REG = INVARIANT + REG
5052 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5053 and store the additive term into *INC_VAL.
5055 If X is an assignment of an invariant into DEST_REG, we set
5056 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5058 We also want to detect a BIV when it corresponds to a variable
5059 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5060 of the variable may be a PLUS that adds a SUBREG of that variable to
5061 an invariant and then sign- or zero-extends the result of the PLUS
5064 Most GIVs in such cases will be in the promoted mode, since that is the
5065 probably the natural computation mode (and almost certainly the mode
5066 used for addresses) on the machine. So we view the pseudo-reg containing
5067 the variable as the BIV, as if it were simply incremented.
5069 Note that treating the entire pseudo as a BIV will result in making
5070 simple increments to any GIVs based on it. However, if the variable
5071 overflows in its declared mode but not its promoted mode, the result will
5072 be incorrect. This is acceptable if the variable is signed, since
5073 overflows in such cases are undefined, but not if it is unsigned, since
5074 those overflows are defined. So we only check for SIGN_EXTEND and
5077 If we cannot find a biv, we return 0. */
5080 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5082 enum machine_mode mode
;
5088 register enum rtx_code code
;
5092 code
= GET_CODE (x
);
5096 if (XEXP (x
, 0) == dest_reg
5097 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5098 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5099 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5101 else if (XEXP (x
, 1) == dest_reg
5102 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5103 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5104 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5109 if (invariant_p (arg
) != 1)
5112 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5113 *mult_val
= const1_rtx
;
5117 /* If this is a SUBREG for a promoted variable, check the inner
5119 if (SUBREG_PROMOTED_VAR_P (x
))
5120 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5121 dest_reg
, p
, inc_val
, mult_val
);
5125 /* If this register is assigned in the previous insn, look at its
5126 source, but don't go outside the loop or past a label. */
5128 for (insn
= PREV_INSN (p
);
5129 (insn
&& GET_CODE (insn
) == NOTE
5130 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5131 insn
= PREV_INSN (insn
))
5135 set
= single_set (insn
);
5138 && (SET_DEST (set
) == x
5139 || (GET_CODE (SET_DEST (set
)) == SUBREG
5140 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5142 && SUBREG_REG (SET_DEST (set
)) == x
)))
5143 return basic_induction_var (SET_SRC (set
),
5144 (GET_MODE (SET_SRC (set
)) == VOIDmode
5146 : GET_MODE (SET_SRC (set
))),
5149 /* ... fall through ... */
5151 /* Can accept constant setting of biv only when inside inner most loop.
5152 Otherwise, a biv of an inner loop may be incorrectly recognized
5153 as a biv of the outer loop,
5154 causing code to be moved INTO the inner loop. */
5156 if (invariant_p (x
) != 1)
5161 if (loops_enclosed
== 1)
5163 /* Possible bug here? Perhaps we don't know the mode of X. */
5164 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5165 *mult_val
= const0_rtx
;
5172 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5173 dest_reg
, p
, inc_val
, mult_val
);
5175 /* Similar, since this can be a sign extension. */
5176 for (insn
= PREV_INSN (p
);
5177 (insn
&& GET_CODE (insn
) == NOTE
5178 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5179 insn
= PREV_INSN (insn
))
5183 set
= single_set (insn
);
5185 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5186 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5187 && INTVAL (XEXP (x
, 1)) >= 0
5188 && GET_CODE (SET_SRC (set
)) == ASHIFT
5189 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5190 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5191 GET_MODE (XEXP (x
, 0)),
5192 dest_reg
, insn
, inc_val
, mult_val
);
5200 /* A general induction variable (giv) is any quantity that is a linear
5201 function of a basic induction variable,
5202 i.e. giv = biv * mult_val + add_val.
5203 The coefficients can be any loop invariant quantity.
5204 A giv need not be computed directly from the biv;
5205 it can be computed by way of other givs. */
5207 /* Determine whether X computes a giv.
5208 If it does, return a nonzero value
5209 which is the benefit from eliminating the computation of X;
5210 set *SRC_REG to the register of the biv that it is computed from;
5211 set *ADD_VAL and *MULT_VAL to the coefficients,
5212 such that the value of X is biv * mult + add; */
5215 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5225 /* If this is an invariant, forget it, it isn't a giv. */
5226 if (invariant_p (x
) == 1)
5229 /* See if the expression could be a giv and get its form.
5230 Mark our place on the obstack in case we don't find a giv. */
5231 storage
= (char *) oballoc (0);
5232 x
= simplify_giv_expr (x
, &benefit
);
5239 switch (GET_CODE (x
))
5243 /* Since this is now an invariant and wasn't before, it must be a giv
5244 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5246 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5247 *mult_val
= const0_rtx
;
5252 /* This is equivalent to a BIV. */
5254 *mult_val
= const1_rtx
;
5255 *add_val
= const0_rtx
;
5259 /* Either (plus (biv) (invar)) or
5260 (plus (mult (biv) (invar_1)) (invar_2)). */
5261 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5263 *src_reg
= XEXP (XEXP (x
, 0), 0);
5264 *mult_val
= XEXP (XEXP (x
, 0), 1);
5268 *src_reg
= XEXP (x
, 0);
5269 *mult_val
= const1_rtx
;
5271 *add_val
= XEXP (x
, 1);
5275 /* ADD_VAL is zero. */
5276 *src_reg
= XEXP (x
, 0);
5277 *mult_val
= XEXP (x
, 1);
5278 *add_val
= const0_rtx
;
5285 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5286 unless they are CONST_INT). */
5287 if (GET_CODE (*add_val
) == USE
)
5288 *add_val
= XEXP (*add_val
, 0);
5289 if (GET_CODE (*mult_val
) == USE
)
5290 *mult_val
= XEXP (*mult_val
, 0);
5292 benefit
+= rtx_cost (orig_x
, SET
);
5294 /* Always return some benefit if this is a giv so it will be detected
5295 as such. This allows elimination of bivs that might otherwise
5296 not be eliminated. */
5297 return benefit
== 0 ? 1 : benefit
;
5300 /* Given an expression, X, try to form it as a linear function of a biv.
5301 We will canonicalize it to be of the form
5302 (plus (mult (BIV) (invar_1))
5304 with possible degeneracies.
5306 The invariant expressions must each be of a form that can be used as a
5307 machine operand. We surround then with a USE rtx (a hack, but localized
5308 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5309 routine; it is the caller's responsibility to strip them.
5311 If no such canonicalization is possible (i.e., two biv's are used or an
5312 expression that is neither invariant nor a biv or giv), this routine
5315 For a non-zero return, the result will have a code of CONST_INT, USE,
5316 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5318 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5321 simplify_giv_expr (x
, benefit
)
5325 enum machine_mode mode
= GET_MODE (x
);
5329 /* If this is not an integer mode, or if we cannot do arithmetic in this
5330 mode, this can't be a giv. */
5331 if (mode
!= VOIDmode
5332 && (GET_MODE_CLASS (mode
) != MODE_INT
5333 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5336 switch (GET_CODE (x
))
5339 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5340 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5341 if (arg0
== 0 || arg1
== 0)
5344 /* Put constant last, CONST_INT last if both constant. */
5345 if ((GET_CODE (arg0
) == USE
5346 || GET_CODE (arg0
) == CONST_INT
)
5347 && GET_CODE (arg1
) != CONST_INT
)
5348 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5350 /* Handle addition of zero, then addition of an invariant. */
5351 if (arg1
== const0_rtx
)
5353 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5354 switch (GET_CODE (arg0
))
5358 /* Both invariant. Only valid if sum is machine operand.
5359 First strip off possible USE on first operand. */
5360 if (GET_CODE (arg0
) == USE
)
5361 arg0
= XEXP (arg0
, 0);
5364 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5366 tem
= plus_constant (arg0
, INTVAL (arg1
));
5367 if (GET_CODE (tem
) != CONST_INT
)
5368 tem
= gen_rtx (USE
, mode
, tem
);
5375 /* biv + invar or mult + invar. Return sum. */
5376 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5379 /* (a + invar_1) + invar_2. Associate. */
5380 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5382 gen_rtx (PLUS
, mode
,
5383 XEXP (arg0
, 1), arg1
)),
5390 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5391 MULT to reduce cases. */
5392 if (GET_CODE (arg0
) == REG
)
5393 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5394 if (GET_CODE (arg1
) == REG
)
5395 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5397 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5398 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5399 Recurse to associate the second PLUS. */
5400 if (GET_CODE (arg1
) == MULT
)
5401 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5403 if (GET_CODE (arg1
) == PLUS
)
5404 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5405 gen_rtx (PLUS
, mode
,
5406 arg0
, XEXP (arg1
, 0)),
5410 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5411 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5414 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5417 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5419 gen_rtx (PLUS
, mode
,
5425 /* Handle "a - b" as "a + b * (-1)". */
5426 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5428 gen_rtx (MULT
, mode
,
5429 XEXP (x
, 1), constm1_rtx
)),
5433 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5434 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5435 if (arg0
== 0 || arg1
== 0)
5438 /* Put constant last, CONST_INT last if both constant. */
5439 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5440 && GET_CODE (arg1
) != CONST_INT
)
5441 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5443 /* If second argument is not now constant, not giv. */
5444 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5447 /* Handle multiply by 0 or 1. */
5448 if (arg1
== const0_rtx
)
5451 else if (arg1
== const1_rtx
)
5454 switch (GET_CODE (arg0
))
5457 /* biv * invar. Done. */
5458 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5461 /* Product of two constants. */
5462 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5465 /* invar * invar. Not giv. */
5469 /* (a * invar_1) * invar_2. Associate. */
5470 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5472 gen_rtx (MULT
, mode
,
5473 XEXP (arg0
, 1), arg1
)),
5477 /* (a + invar_1) * invar_2. Distribute. */
5478 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5479 gen_rtx (MULT
, mode
,
5480 XEXP (arg0
, 0), arg1
),
5481 gen_rtx (MULT
, mode
,
5482 XEXP (arg0
, 1), arg1
)),
5490 /* Shift by constant is multiply by power of two. */
5491 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5494 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5496 GEN_INT ((HOST_WIDE_INT
) 1
5497 << INTVAL (XEXP (x
, 1)))),
5501 /* "-a" is "a * (-1)" */
5502 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5506 /* "~a" is "-a - 1". Silly, but easy. */
5507 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5508 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5513 /* Already in proper form for invariant. */
5517 /* If this is a new register, we can't deal with it. */
5518 if (REGNO (x
) >= max_reg_before_loop
)
5521 /* Check for biv or giv. */
5522 switch (reg_iv_type
[REGNO (x
)])
5526 case GENERAL_INDUCT
:
5528 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5530 /* Form expression from giv and add benefit. Ensure this giv
5531 can derive another and subtract any needed adjustment if so. */
5532 *benefit
+= v
->benefit
;
5536 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5537 v
->src_reg
, v
->mult_val
),
5539 if (v
->derive_adjustment
)
5540 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5541 return simplify_giv_expr (tem
, benefit
);
5545 /* Fall through to general case. */
5547 /* If invariant, return as USE (unless CONST_INT).
5548 Otherwise, not giv. */
5549 if (GET_CODE (x
) == USE
)
5552 if (invariant_p (x
) == 1)
5554 if (GET_CODE (x
) == CONST_INT
)
5557 return gen_rtx (USE
, mode
, x
);
5564 /* Help detect a giv that is calculated by several consecutive insns;
5568 The caller has already identified the first insn P as having a giv as dest;
5569 we check that all other insns that set the same register follow
5570 immediately after P, that they alter nothing else,
5571 and that the result of the last is still a giv.
5573 The value is 0 if the reg set in P is not really a giv.
5574 Otherwise, the value is the amount gained by eliminating
5575 all the consecutive insns that compute the value.
5577 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5578 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5580 The coefficients of the ultimate giv value are stored in
5581 *MULT_VAL and *ADD_VAL. */
5584 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5599 /* Indicate that this is a giv so that we can update the value produced in
5600 each insn of the multi-insn sequence.
5602 This induction structure will be used only by the call to
5603 general_induction_var below, so we can allocate it on our stack.
5604 If this is a giv, our caller will replace the induct var entry with
5605 a new induction structure. */
5607 = (struct induction
*) alloca (sizeof (struct induction
));
5608 v
->src_reg
= src_reg
;
5609 v
->mult_val
= *mult_val
;
5610 v
->add_val
= *add_val
;
5611 v
->benefit
= first_benefit
;
5613 v
->derive_adjustment
= 0;
5615 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5616 reg_iv_info
[REGNO (dest_reg
)] = v
;
5618 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5623 code
= GET_CODE (p
);
5625 /* If libcall, skip to end of call sequence. */
5626 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5630 && (set
= single_set (p
))
5631 && GET_CODE (SET_DEST (set
)) == REG
5632 && SET_DEST (set
) == dest_reg
5633 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5635 /* Giv created by equivalent expression. */
5636 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5637 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5638 add_val
, mult_val
))))
5639 && src_reg
== v
->src_reg
)
5641 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5642 benefit
+= libcall_benefit (p
);
5645 v
->mult_val
= *mult_val
;
5646 v
->add_val
= *add_val
;
5647 v
->benefit
= benefit
;
5649 else if (code
!= NOTE
)
5651 /* Allow insns that set something other than this giv to a
5652 constant. Such insns are needed on machines which cannot
5653 include long constants and should not disqualify a giv. */
5655 && (set
= single_set (p
))
5656 && SET_DEST (set
) != dest_reg
5657 && CONSTANT_P (SET_SRC (set
)))
5660 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5668 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5669 represented by G1. If no such expression can be found, or it is clear that
5670 it cannot possibly be a valid address, 0 is returned.
5672 To perform the computation, we note that
5675 where `v' is the biv.
5677 So G2 = (c/a) * G1 + (d - b*c/a) */
5681 express_from (g1
, g2
)
5682 struct induction
*g1
, *g2
;
5686 /* The value that G1 will be multiplied by must be a constant integer. Also,
5687 the only chance we have of getting a valid address is if b*c/a (see above
5688 for notation) is also an integer. */
5689 if (GET_CODE (g1
->mult_val
) != CONST_INT
5690 || GET_CODE (g2
->mult_val
) != CONST_INT
5691 || GET_CODE (g1
->add_val
) != CONST_INT
5692 || g1
->mult_val
== const0_rtx
5693 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5696 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5697 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5699 /* Form simplified final result. */
5700 if (mult
== const0_rtx
)
5702 else if (mult
== const1_rtx
)
5703 mult
= g1
->dest_reg
;
5705 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5707 if (add
== const0_rtx
)
5710 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5714 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5715 (either directly or via an address expression) a register used to represent
5716 G1. Set g2->new_reg to a represtation of G1 (normally just
5720 combine_givs_p (g1
, g2
)
5721 struct induction
*g1
, *g2
;
5725 /* If these givs are identical, they can be combined. */
5726 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5727 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5729 g2
->new_reg
= g1
->dest_reg
;
5734 /* If G2 can be expressed as a function of G1 and that function is valid
5735 as an address and no more expensive than using a register for G2,
5736 the expression of G2 in terms of G1 can be used. */
5737 if (g2
->giv_type
== DEST_ADDR
5738 && (tem
= express_from (g1
, g2
)) != 0
5739 && memory_address_p (g2
->mem_mode
, tem
)
5740 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5750 #ifdef GIV_SORT_CRITERION
5751 /* Compare two givs and sort the most desirable one for combinations first.
5752 This is used only in one qsort call below. */
5756 struct induction
**x
, **y
;
5758 GIV_SORT_CRITERION (*x
, *y
);
5764 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5765 any other. If so, point SAME to the giv combined with and set NEW_REG to
5766 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5767 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5771 struct iv_class
*bl
;
5773 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5774 int i
, j
, giv_count
, pass
;
5776 /* Count givs, because bl->giv_count is incorrect here. */
5778 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5782 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5784 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5785 giv_array
[i
++] = g1
;
5787 #ifdef GIV_SORT_CRITERION
5788 /* Sort the givs if GIV_SORT_CRITERION is defined.
5789 This is usually defined for processors which lack
5790 negative register offsets so more givs may be combined. */
5792 if (loop_dump_stream
)
5793 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5795 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5798 for (i
= 0; i
< giv_count
; i
++)
5801 for (pass
= 0; pass
<= 1; pass
++)
5802 for (j
= 0; j
< giv_count
; j
++)
5806 /* First try to combine with replaceable givs, then all givs. */
5807 && (g1
->replaceable
|| pass
== 1)
5808 /* If either has already been combined or is to be ignored, can't
5810 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5811 /* If something has been based on G2, G2 cannot itself be based
5812 on something else. */
5813 && ! g2
->combined_with
5814 && combine_givs_p (g1
, g2
))
5816 /* g2->new_reg set by `combine_givs_p' */
5818 g1
->combined_with
= 1;
5820 /* If one of these givs is a DEST_REG that was only used
5821 once, by the other giv, this is actually a single use.
5822 The DEST_REG has the correct cost, while the other giv
5823 counts the REG use too often. */
5824 if (g2
->giv_type
== DEST_REG
5825 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5826 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5827 g1
->benefit
= g2
->benefit
;
5828 else if (g1
->giv_type
!= DEST_REG
5829 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5830 || ! reg_mentioned_p (g1
->dest_reg
,
5831 PATTERN (g2
->insn
)))
5833 g1
->benefit
+= g2
->benefit
;
5834 g1
->times_used
+= g2
->times_used
;
5836 /* ??? The new final_[bg]iv_value code does a much better job
5837 of finding replaceable giv's, and hence this code may no
5838 longer be necessary. */
5839 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5840 g1
->benefit
-= copy_cost
;
5841 g1
->lifetime
+= g2
->lifetime
;
5843 if (loop_dump_stream
)
5844 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5845 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5851 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5854 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5855 rtx b
; /* initial value of basic induction variable */
5856 rtx m
; /* multiplicative constant */
5857 rtx a
; /* additive constant */
5858 rtx reg
; /* destination register */
5864 /* Prevent unexpected sharing of these rtx. */
5868 /* Increase the lifetime of any invariants moved further in code. */
5869 update_reg_last_use (a
, insert_before
);
5870 update_reg_last_use (b
, insert_before
);
5871 update_reg_last_use (m
, insert_before
);
5874 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5876 emit_move_insn (reg
, result
);
5877 seq
= gen_sequence ();
5880 emit_insn_before (seq
, insert_before
);
5882 record_base_value (REGNO (reg
), b
);
5885 /* Test whether A * B can be computed without
5886 an actual multiply insn. Value is 1 if so. */
5889 product_cheap_p (a
, b
)
5895 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5896 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5899 /* If only one is constant, make it B. */
5900 if (GET_CODE (a
) == CONST_INT
)
5901 tmp
= a
, a
= b
, b
= tmp
;
5903 /* If first constant, both constant, so don't need multiply. */
5904 if (GET_CODE (a
) == CONST_INT
)
5907 /* If second not constant, neither is constant, so would need multiply. */
5908 if (GET_CODE (b
) != CONST_INT
)
5911 /* One operand is constant, so might not need multiply insn. Generate the
5912 code for the multiply and see if a call or multiply, or long sequence
5913 of insns is generated. */
5915 rtl_obstack
= &temp_obstack
;
5917 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5918 tmp
= gen_sequence ();
5921 if (GET_CODE (tmp
) == SEQUENCE
)
5923 if (XVEC (tmp
, 0) == 0)
5925 else if (XVECLEN (tmp
, 0) > 3)
5928 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5930 rtx insn
= XVECEXP (tmp
, 0, i
);
5932 if (GET_CODE (insn
) != INSN
5933 || (GET_CODE (PATTERN (insn
)) == SET
5934 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5935 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5936 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5937 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5944 else if (GET_CODE (tmp
) == SET
5945 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5947 else if (GET_CODE (tmp
) == PARALLEL
5948 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5949 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5952 /* Free any storage we obtained in generating this multiply and restore rtl
5953 allocation to its normal obstack. */
5954 obstack_free (&temp_obstack
, storage
);
5955 rtl_obstack
= old_rtl_obstack
;
5960 /* Check to see if loop can be terminated by a "decrement and branch until
5961 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5962 Also try reversing an increment loop to a decrement loop
5963 to see if the optimization can be performed.
5964 Value is nonzero if optimization was performed. */
5966 /* This is useful even if the architecture doesn't have such an insn,
5967 because it might change a loops which increments from 0 to n to a loop
5968 which decrements from n to 0. A loop that decrements to zero is usually
5969 faster than one that increments from zero. */
5971 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5972 such as approx_final_value, biv_total_increment, loop_iterations, and
5973 final_[bg]iv_value. */
5976 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5981 struct iv_class
*bl
;
5988 rtx before_comparison
;
5991 /* If last insn is a conditional branch, and the insn before tests a
5992 register value, try to optimize it. Otherwise, we can't do anything. */
5994 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
5995 if (comparison
== 0)
5998 /* Check all of the bivs to see if the compare uses one of them.
5999 Skip biv's set more than once because we can't guarantee that
6000 it will be zero on the last iteration. Also skip if the biv is
6001 used between its update and the test insn. */
6003 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6005 if (bl
->biv_count
== 1
6006 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6007 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6008 PREV_INSN (PREV_INSN (loop_end
))))
6015 /* Look for the case where the basic induction variable is always
6016 nonnegative, and equals zero on the last iteration.
6017 In this case, add a reg_note REG_NONNEG, which allows the
6018 m68k DBRA instruction to be used. */
6020 if (((GET_CODE (comparison
) == GT
6021 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6022 && INTVAL (XEXP (comparison
, 1)) == -1)
6023 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6024 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6025 && INTVAL (bl
->biv
->add_val
) < 0)
6027 /* Initial value must be greater than 0,
6028 init_val % -dec_value == 0 to ensure that it equals zero on
6029 the last iteration */
6031 if (GET_CODE (bl
->initial_value
) == CONST_INT
6032 && INTVAL (bl
->initial_value
) > 0
6033 && (INTVAL (bl
->initial_value
)
6034 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6036 /* register always nonnegative, add REG_NOTE to branch */
6037 REG_NOTES (PREV_INSN (loop_end
))
6038 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6039 REG_NOTES (PREV_INSN (loop_end
)));
6045 /* If the decrement is 1 and the value was tested as >= 0 before
6046 the loop, then we can safely optimize. */
6047 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6049 if (GET_CODE (p
) == CODE_LABEL
)
6051 if (GET_CODE (p
) != JUMP_INSN
)
6054 before_comparison
= get_condition_for_loop (p
);
6055 if (before_comparison
6056 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6057 && GET_CODE (before_comparison
) == LT
6058 && XEXP (before_comparison
, 1) == const0_rtx
6059 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6060 && INTVAL (bl
->biv
->add_val
) == -1)
6062 REG_NOTES (PREV_INSN (loop_end
))
6063 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6064 REG_NOTES (PREV_INSN (loop_end
)));
6071 else if (num_mem_sets
<= 1)
6073 /* Try to change inc to dec, so can apply above optimization. */
6075 all registers modified are induction variables or invariant,
6076 all memory references have non-overlapping addresses
6077 (obviously true if only one write)
6078 allow 2 insns for the compare/jump at the end of the loop. */
6079 /* Also, we must avoid any instructions which use both the reversed
6080 biv and another biv. Such instructions will fail if the loop is
6081 reversed. We meet this condition by requiring that either
6082 no_use_except_counting is true, or else that there is only
6084 int num_nonfixed_reads
= 0;
6085 /* 1 if the iteration var is used only to count iterations. */
6086 int no_use_except_counting
= 0;
6087 /* 1 if the loop has no memory store, or it has a single memory store
6088 which is reversible. */
6089 int reversible_mem_store
= 1;
6091 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6092 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6093 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6095 if (bl
->giv_count
== 0
6096 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6098 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6100 /* If there are no givs for this biv, and the only exit is the
6101 fall through at the end of the the loop, then
6102 see if perhaps there are no uses except to count. */
6103 no_use_except_counting
= 1;
6104 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6105 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6107 rtx set
= single_set (p
);
6109 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6110 && REGNO (SET_DEST (set
)) == bl
->regno
)
6111 /* An insn that sets the biv is okay. */
6113 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6114 || p
== prev_nonnote_insn (loop_end
))
6115 /* Don't bother about the end test. */
6117 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6118 /* Any other use of the biv is no good. */
6120 no_use_except_counting
= 0;
6126 /* If the loop has a single store, and the destination address is
6127 invariant, then we can't reverse the loop, because this address
6128 might then have the wrong value at loop exit.
6129 This would work if the source was invariant also, however, in that
6130 case, the insn should have been moved out of the loop. */
6132 if (num_mem_sets
== 1)
6133 reversible_mem_store
6134 = (! unknown_address_altered
6135 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6137 /* This code only acts for innermost loops. Also it simplifies
6138 the memory address check by only reversing loops with
6139 zero or one memory access.
6140 Two memory accesses could involve parts of the same array,
6141 and that can't be reversed. */
6143 if (num_nonfixed_reads
<= 1
6145 && !loop_has_volatile
6146 && reversible_mem_store
6147 && (no_use_except_counting
6148 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6149 + num_movables
+ 2 == insn_count
)
6150 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6154 /* Loop can be reversed. */
6155 if (loop_dump_stream
)
6156 fprintf (loop_dump_stream
, "Can reverse loop\n");
6158 /* Now check other conditions:
6159 initial_value must be zero,
6160 final_value % add_val == 0, so that when reversed, the
6161 biv will be zero on the last iteration.
6163 This test can probably be improved since +/- 1 in the constant
6164 can be obtained by changing LT to LE and vice versa; this is
6167 if (comparison
&& bl
->initial_value
== const0_rtx
6168 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6169 /* LE gets turned into LT */
6170 && GET_CODE (comparison
) == LT
6171 && (INTVAL (XEXP (comparison
, 1))
6172 % INTVAL (bl
->biv
->add_val
)) == 0)
6174 /* Register will always be nonnegative, with value
6175 0 on last iteration if loop reversed */
6177 /* Save some info needed to produce the new insns. */
6178 reg
= bl
->biv
->dest_reg
;
6179 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6180 if (jump_label
== pc_rtx
)
6181 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6182 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6184 final_value
= XEXP (comparison
, 1);
6185 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6186 - INTVAL (bl
->biv
->add_val
));
6188 /* Initialize biv to start_value before loop start.
6189 The old initializing insn will be deleted as a
6190 dead store by flow.c. */
6191 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6193 /* Add insn to decrement register, and delete insn
6194 that incremented the register. */
6195 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6197 delete_insn (bl
->biv
->insn
);
6199 /* Update biv info to reflect its new status. */
6201 bl
->initial_value
= start_value
;
6202 bl
->biv
->add_val
= new_add_val
;
6204 /* Inc LABEL_NUSES so that delete_insn will
6205 not delete the label. */
6206 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6208 /* Emit an insn after the end of the loop to set the biv's
6209 proper exit value if it is used anywhere outside the loop. */
6210 if ((REGNO_LAST_UID (bl
->regno
)
6211 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6213 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6214 emit_insn_after (gen_move_insn (reg
, final_value
),
6217 /* Delete compare/branch at end of loop. */
6218 delete_insn (PREV_INSN (loop_end
));
6219 delete_insn (PREV_INSN (loop_end
));
6221 /* Add new compare/branch insn at end of loop. */
6223 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6224 GET_MODE (reg
), 0, 0);
6225 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6226 tem
= gen_sequence ();
6228 emit_jump_insn_before (tem
, loop_end
);
6230 for (tem
= PREV_INSN (loop_end
);
6231 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6235 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6237 /* Increment of LABEL_NUSES done above. */
6238 /* Register is now always nonnegative,
6239 so add REG_NONNEG note to the branch. */
6240 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6246 /* Mark that this biv has been reversed. Each giv which depends
6247 on this biv, and which is also live past the end of the loop
6248 will have to be fixed up. */
6252 if (loop_dump_stream
)
6253 fprintf (loop_dump_stream
,
6254 "Reversed loop and added reg_nonneg\n");
6264 /* Verify whether the biv BL appears to be eliminable,
6265 based on the insns in the loop that refer to it.
6266 LOOP_START is the first insn of the loop, and END is the end insn.
6268 If ELIMINATE_P is non-zero, actually do the elimination.
6270 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6271 determine whether invariant insns should be placed inside or at the
6272 start of the loop. */
6275 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6276 struct iv_class
*bl
;
6280 int threshold
, insn_count
;
6282 rtx reg
= bl
->biv
->dest_reg
;
6285 /* Scan all insns in the loop, stopping if we find one that uses the
6286 biv in a way that we cannot eliminate. */
6288 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6290 enum rtx_code code
= GET_CODE (p
);
6291 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6293 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6294 && reg_mentioned_p (reg
, PATTERN (p
))
6295 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6297 if (loop_dump_stream
)
6298 fprintf (loop_dump_stream
,
6299 "Cannot eliminate biv %d: biv used in insn %d.\n",
6300 bl
->regno
, INSN_UID (p
));
6307 if (loop_dump_stream
)
6308 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6309 bl
->regno
, eliminate_p
? "was" : "can be");
6316 /* If BL appears in X (part of the pattern of INSN), see if we can
6317 eliminate its use. If so, return 1. If not, return 0.
6319 If BIV does not appear in X, return 1.
6321 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6322 where extra insns should be added. Depending on how many items have been
6323 moved out of the loop, it will either be before INSN or at the start of
6327 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6329 struct iv_class
*bl
;
6333 enum rtx_code code
= GET_CODE (x
);
6334 rtx reg
= bl
->biv
->dest_reg
;
6335 enum machine_mode mode
= GET_MODE (reg
);
6336 struct induction
*v
;
6345 /* If we haven't already been able to do something with this BIV,
6346 we can't eliminate it. */
6352 /* If this sets the BIV, it is not a problem. */
6353 if (SET_DEST (x
) == reg
)
6356 /* If this is an insn that defines a giv, it is also ok because
6357 it will go away when the giv is reduced. */
6358 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6359 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6363 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6365 /* Can replace with any giv that was reduced and
6366 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6367 Require a constant for MULT_VAL, so we know it's nonzero.
6368 ??? We disable this optimization to avoid potential
6371 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6372 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6373 && v
->add_val
== const0_rtx
6374 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6378 /* If the giv V had the auto-inc address optimization applied
6379 to it, and INSN occurs between the giv insn and the biv
6380 insn, then we must adjust the value used here.
6381 This is rare, so we don't bother to do so. */
6383 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6384 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6385 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6386 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6392 /* If the giv has the opposite direction of change,
6393 then reverse the comparison. */
6394 if (INTVAL (v
->mult_val
) < 0)
6395 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6396 const0_rtx
, v
->new_reg
);
6400 /* We can probably test that giv's reduced reg. */
6401 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6405 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6406 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6407 Require a constant for MULT_VAL, so we know it's nonzero.
6408 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6409 overflow problem. */
6411 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6412 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6413 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6415 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6416 || GET_CODE (v
->add_val
) == LABEL_REF
6417 || GET_CODE (v
->add_val
) == CONST
6418 || (GET_CODE (v
->add_val
) == REG
6419 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6421 /* If the giv V had the auto-inc address optimization applied
6422 to it, and INSN occurs between the giv insn and the biv
6423 insn, then we must adjust the value used here.
6424 This is rare, so we don't bother to do so. */
6426 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6427 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6428 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6429 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6435 /* If the giv has the opposite direction of change,
6436 then reverse the comparison. */
6437 if (INTVAL (v
->mult_val
) < 0)
6438 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6441 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6442 copy_rtx (v
->add_val
));
6444 /* Replace biv with the giv's reduced register. */
6445 update_reg_last_use (v
->add_val
, insn
);
6446 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6449 /* Insn doesn't support that constant or invariant. Copy it
6450 into a register (it will be a loop invariant.) */
6451 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6453 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6456 /* Substitute the new register for its invariant value in
6457 the compare expression. */
6458 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6459 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6468 case GT
: case GE
: case GTU
: case GEU
:
6469 case LT
: case LE
: case LTU
: case LEU
:
6470 /* See if either argument is the biv. */
6471 if (XEXP (x
, 0) == reg
)
6472 arg
= XEXP (x
, 1), arg_operand
= 1;
6473 else if (XEXP (x
, 1) == reg
)
6474 arg
= XEXP (x
, 0), arg_operand
= 0;
6478 if (CONSTANT_P (arg
))
6480 /* First try to replace with any giv that has constant positive
6481 mult_val and constant add_val. We might be able to support
6482 negative mult_val, but it seems complex to do it in general. */
6484 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6485 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6486 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6487 || GET_CODE (v
->add_val
) == LABEL_REF
6488 || GET_CODE (v
->add_val
) == CONST
6489 || (GET_CODE (v
->add_val
) == REG
6490 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6491 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6494 /* If the giv V had the auto-inc address optimization applied
6495 to it, and INSN occurs between the giv insn and the biv
6496 insn, then we must adjust the value used here.
6497 This is rare, so we don't bother to do so. */
6499 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6500 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6501 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6502 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6508 /* Replace biv with the giv's reduced reg. */
6509 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6511 /* If all constants are actually constant integers and
6512 the derived constant can be directly placed in the COMPARE,
6514 if (GET_CODE (arg
) == CONST_INT
6515 && GET_CODE (v
->mult_val
) == CONST_INT
6516 && GET_CODE (v
->add_val
) == CONST_INT
6517 && validate_change (insn
, &XEXP (x
, arg_operand
),
6518 GEN_INT (INTVAL (arg
)
6519 * INTVAL (v
->mult_val
)
6520 + INTVAL (v
->add_val
)), 0))
6523 /* Otherwise, load it into a register. */
6524 tem
= gen_reg_rtx (mode
);
6525 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6526 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6529 /* If that failed, put back the change we made above. */
6530 XEXP (x
, 1-arg_operand
) = reg
;
6533 /* Look for giv with positive constant mult_val and nonconst add_val.
6534 Insert insns to calculate new compare value.
6535 ??? Turn this off due to possible overflow. */
6537 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6538 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6539 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6545 /* If the giv V had the auto-inc address optimization applied
6546 to it, and INSN occurs between the giv insn and the biv
6547 insn, then we must adjust the value used here.
6548 This is rare, so we don't bother to do so. */
6550 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6551 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6552 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6553 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6559 tem
= gen_reg_rtx (mode
);
6561 /* Replace biv with giv's reduced register. */
6562 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6565 /* Compute value to compare against. */
6566 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6567 /* Use it in this insn. */
6568 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6569 if (apply_change_group ())
6573 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6575 if (invariant_p (arg
) == 1)
6577 /* Look for giv with constant positive mult_val and nonconst
6578 add_val. Insert insns to compute new compare value.
6579 ??? Turn this off due to possible overflow. */
6581 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6582 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6583 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6589 /* If the giv V had the auto-inc address optimization applied
6590 to it, and INSN occurs between the giv insn and the biv
6591 insn, then we must adjust the value used here.
6592 This is rare, so we don't bother to do so. */
6594 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6595 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6596 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6597 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6603 tem
= gen_reg_rtx (mode
);
6605 /* Replace biv with giv's reduced register. */
6606 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6609 /* Compute value to compare against. */
6610 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6612 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6613 if (apply_change_group ())
6618 /* This code has problems. Basically, you can't know when
6619 seeing if we will eliminate BL, whether a particular giv
6620 of ARG will be reduced. If it isn't going to be reduced,
6621 we can't eliminate BL. We can try forcing it to be reduced,
6622 but that can generate poor code.
6624 The problem is that the benefit of reducing TV, below should
6625 be increased if BL can actually be eliminated, but this means
6626 we might have to do a topological sort of the order in which
6627 we try to process biv. It doesn't seem worthwhile to do
6628 this sort of thing now. */
6631 /* Otherwise the reg compared with had better be a biv. */
6632 if (GET_CODE (arg
) != REG
6633 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6636 /* Look for a pair of givs, one for each biv,
6637 with identical coefficients. */
6638 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6640 struct induction
*tv
;
6642 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6645 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6646 if (! tv
->ignore
&& ! tv
->maybe_dead
6647 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6648 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6649 && tv
->mode
== mode
)
6651 /* If the giv V had the auto-inc address optimization applied
6652 to it, and INSN occurs between the giv insn and the biv
6653 insn, then we must adjust the value used here.
6654 This is rare, so we don't bother to do so. */
6656 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6657 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6658 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6659 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6665 /* Replace biv with its giv's reduced reg. */
6666 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6667 /* Replace other operand with the other giv's
6669 XEXP (x
, arg_operand
) = tv
->new_reg
;
6676 /* If we get here, the biv can't be eliminated. */
6680 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6681 biv is used in it, since it will be replaced. */
6682 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6683 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6688 /* See if any subexpression fails elimination. */
6689 fmt
= GET_RTX_FORMAT (code
);
6690 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6695 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6696 eliminate_p
, where
))
6701 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6702 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6703 eliminate_p
, where
))
6712 /* Return nonzero if the last use of REG
6713 is in an insn following INSN in the same basic block. */
6716 last_use_this_basic_block (reg
, insn
)
6722 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6725 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6731 /* Called via `note_stores' to record the initial value of a biv. Here we
6732 just record the location of the set and process it later. */
6735 record_initial (dest
, set
)
6739 struct iv_class
*bl
;
6741 if (GET_CODE (dest
) != REG
6742 || REGNO (dest
) >= max_reg_before_loop
6743 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6746 bl
= reg_biv_class
[REGNO (dest
)];
6748 /* If this is the first set found, record it. */
6749 if (bl
->init_insn
== 0)
6751 bl
->init_insn
= note_insn
;
6756 /* If any of the registers in X are "old" and currently have a last use earlier
6757 than INSN, update them to have a last use of INSN. Their actual last use
6758 will be the previous insn but it will not have a valid uid_luid so we can't
6762 update_reg_last_use (x
, insn
)
6766 /* Check for the case where INSN does not have a valid luid. In this case,
6767 there is no need to modify the regno_last_uid, as this can only happen
6768 when code is inserted after the loop_end to set a pseudo's final value,
6769 and hence this insn will never be the last use of x. */
6770 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6771 && INSN_UID (insn
) < max_uid_for_loop
6772 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6773 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6777 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6778 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6781 update_reg_last_use (XEXP (x
, i
), insn
);
6782 else if (fmt
[i
] == 'E')
6783 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6784 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6789 /* Given a jump insn JUMP, return the condition that will cause it to branch
6790 to its JUMP_LABEL. If the condition cannot be understood, or is an
6791 inequality floating-point comparison which needs to be reversed, 0 will
6794 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6795 insn used in locating the condition was found. If a replacement test
6796 of the condition is desired, it should be placed in front of that
6797 insn and we will be sure that the inputs are still valid.
6799 The condition will be returned in a canonical form to simplify testing by
6800 callers. Specifically:
6802 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6803 (2) Both operands will be machine operands; (cc0) will have been replaced.
6804 (3) If an operand is a constant, it will be the second operand.
6805 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6806 for GE, GEU, and LEU. */
6809 get_condition (jump
, earliest
)
6818 int reverse_code
= 0;
6819 int did_reverse_condition
= 0;
6821 /* If this is not a standard conditional jump, we can't parse it. */
6822 if (GET_CODE (jump
) != JUMP_INSN
6823 || ! condjump_p (jump
) || simplejump_p (jump
))
6826 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6827 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6828 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6833 /* If this branches to JUMP_LABEL when the condition is false, reverse
6835 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6836 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6837 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6839 /* If we are comparing a register with zero, see if the register is set
6840 in the previous insn to a COMPARE or a comparison operation. Perform
6841 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6844 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6846 /* Set non-zero when we find something of interest. */
6850 /* If comparison with cc0, import actual comparison from compare
6854 if ((prev
= prev_nonnote_insn (prev
)) == 0
6855 || GET_CODE (prev
) != INSN
6856 || (set
= single_set (prev
)) == 0
6857 || SET_DEST (set
) != cc0_rtx
)
6860 op0
= SET_SRC (set
);
6861 op1
= CONST0_RTX (GET_MODE (op0
));
6867 /* If this is a COMPARE, pick up the two things being compared. */
6868 if (GET_CODE (op0
) == COMPARE
)
6870 op1
= XEXP (op0
, 1);
6871 op0
= XEXP (op0
, 0);
6874 else if (GET_CODE (op0
) != REG
)
6877 /* Go back to the previous insn. Stop if it is not an INSN. We also
6878 stop if it isn't a single set or if it has a REG_INC note because
6879 we don't want to bother dealing with it. */
6881 if ((prev
= prev_nonnote_insn (prev
)) == 0
6882 || GET_CODE (prev
) != INSN
6883 || FIND_REG_INC_NOTE (prev
, 0)
6884 || (set
= single_set (prev
)) == 0)
6887 /* If this is setting OP0, get what it sets it to if it looks
6889 if (rtx_equal_p (SET_DEST (set
), op0
))
6891 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6893 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6896 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6897 && (GET_MODE_BITSIZE (inner_mode
)
6898 <= HOST_BITS_PER_WIDE_INT
)
6899 && (STORE_FLAG_VALUE
6900 & ((HOST_WIDE_INT
) 1
6901 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6902 #ifdef FLOAT_STORE_FLAG_VALUE
6904 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6905 && FLOAT_STORE_FLAG_VALUE
< 0)
6908 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6910 else if (((code
== EQ
6912 && (GET_MODE_BITSIZE (inner_mode
)
6913 <= HOST_BITS_PER_WIDE_INT
)
6914 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6915 && (STORE_FLAG_VALUE
6916 & ((HOST_WIDE_INT
) 1
6917 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6918 #ifdef FLOAT_STORE_FLAG_VALUE
6920 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6921 && FLOAT_STORE_FLAG_VALUE
< 0)
6924 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6926 /* We might have reversed a LT to get a GE here. But this wasn't
6927 actually the comparison of data, so we don't flag that we
6928 have had to reverse the condition. */
6929 did_reverse_condition
^= 1;
6937 else if (reg_set_p (op0
, prev
))
6938 /* If this sets OP0, but not directly, we have to give up. */
6943 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6944 code
= GET_CODE (x
);
6947 code
= reverse_condition (code
);
6948 did_reverse_condition
^= 1;
6952 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6958 /* If constant is first, put it last. */
6959 if (CONSTANT_P (op0
))
6960 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6962 /* If OP0 is the result of a comparison, we weren't able to find what
6963 was really being compared, so fail. */
6964 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6967 /* Canonicalize any ordered comparison with integers involving equality
6968 if we can do computations in the relevant mode and we do not
6971 if (GET_CODE (op1
) == CONST_INT
6972 && GET_MODE (op0
) != VOIDmode
6973 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
6975 HOST_WIDE_INT const_val
= INTVAL (op1
);
6976 unsigned HOST_WIDE_INT uconst_val
= const_val
;
6977 unsigned HOST_WIDE_INT max_val
6978 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
6983 if (const_val
!= max_val
>> 1)
6984 code
= LT
, op1
= GEN_INT (const_val
+ 1);
6989 != (((HOST_WIDE_INT
) 1
6990 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
6991 code
= GT
, op1
= GEN_INT (const_val
- 1);
6995 if (uconst_val
!= max_val
)
6996 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7000 if (uconst_val
!= 0)
7001 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7006 /* If this was floating-point and we reversed anything other than an
7007 EQ or NE, return zero. */
7008 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7009 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7011 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7015 /* Never return CC0; return zero instead. */
7020 return gen_rtx (code
, VOIDmode
, op0
, op1
);
7023 /* Similar to above routine, except that we also put an invariant last
7024 unless both operands are invariants. */
7027 get_condition_for_loop (x
)
7030 rtx comparison
= get_condition (x
, NULL_PTR
);
7033 || ! invariant_p (XEXP (comparison
, 0))
7034 || invariant_p (XEXP (comparison
, 1)))
7037 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7038 XEXP (comparison
, 1), XEXP (comparison
, 0));
7042 /* Analyze a loop in order to instrument it with the use of count register.
7043 loop_start and loop_end are the first and last insns of the loop.
7044 This function works in cooperation with insert_bct ().
7045 loop_can_insert_bct[loop_num] is set according to whether the optimization
7046 is applicable to the loop. When it is applicable, the following variables
7048 loop_start_value[loop_num]
7049 loop_comparison_value[loop_num]
7050 loop_increment[loop_num]
7051 loop_comparison_code[loop_num] */
7054 void analyze_loop_iterations (loop_start
, loop_end
)
7055 rtx loop_start
, loop_end
;
7057 rtx comparison
, comparison_value
;
7058 rtx iteration_var
, initial_value
, increment
;
7059 enum rtx_code comparison_code
;
7065 /* loop_variable mode */
7066 enum machine_mode original_mode
;
7068 /* find the number of the loop */
7069 int loop_num
= loop_number (loop_start
, loop_end
);
7071 /* we change our mind only when we are sure that loop will be instrumented */
7072 loop_can_insert_bct
[loop_num
] = 0;
7074 /* is the optimization suppressed. */
7075 if ( !flag_branch_on_count_reg
)
7078 /* make sure that count-reg is not in use */
7079 if (loop_used_count_register
[loop_num
]){
7080 if (loop_dump_stream
)
7081 fprintf (loop_dump_stream
,
7082 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7087 /* make sure that the function has no indirect jumps. */
7088 if (indirect_jump_in_function
){
7089 if (loop_dump_stream
)
7090 fprintf (loop_dump_stream
,
7091 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7096 /* make sure that the last loop insn is a conditional jump */
7097 last_loop_insn
= PREV_INSN (loop_end
);
7098 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7099 if (loop_dump_stream
)
7100 fprintf (loop_dump_stream
,
7101 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7106 /* First find the iteration variable. If the last insn is a conditional
7107 branch, and the insn preceding it tests a register value, make that
7108 register the iteration variable. */
7110 /* We used to use prev_nonnote_insn here, but that fails because it might
7111 accidentally get the branch for a contained loop if the branch for this
7112 loop was deleted. We can only trust branches immediately before the
7115 comparison
= get_condition_for_loop (last_loop_insn
);
7116 /* ??? Get_condition may switch position of induction variable and
7117 invariant register when it canonicalizes the comparison. */
7119 if (comparison
== 0) {
7120 if (loop_dump_stream
)
7121 fprintf (loop_dump_stream
,
7122 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7127 comparison_code
= GET_CODE (comparison
);
7128 iteration_var
= XEXP (comparison
, 0);
7129 comparison_value
= XEXP (comparison
, 1);
7131 original_mode
= GET_MODE (iteration_var
);
7132 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7133 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7134 if (loop_dump_stream
)
7135 fprintf (loop_dump_stream
,
7136 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7141 /* get info about loop bounds and increment */
7142 iteration_info (iteration_var
, &initial_value
, &increment
,
7143 loop_start
, loop_end
);
7145 /* make sure that all required loop data were found */
7146 if (!(initial_value
&& increment
&& comparison_value
7147 && invariant_p (comparison_value
) && invariant_p (increment
)
7148 && ! indirect_jump_in_function
))
7150 if (loop_dump_stream
) {
7151 fprintf (loop_dump_stream
,
7152 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7153 if (!(initial_value
&& increment
&& comparison_value
)) {
7154 fprintf (loop_dump_stream
, "\tbounds not available: ");
7155 if ( ! initial_value
)
7156 fprintf (loop_dump_stream
, "initial ");
7158 fprintf (loop_dump_stream
, "increment ");
7159 if ( ! comparison_value
)
7160 fprintf (loop_dump_stream
, "comparison ");
7161 fprintf (loop_dump_stream
, "\n");
7163 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7164 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7169 /* make sure that the increment is constant */
7170 if (GET_CODE (increment
) != CONST_INT
) {
7171 if (loop_dump_stream
)
7172 fprintf (loop_dump_stream
,
7173 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7178 /* make sure that the loop contains neither function call, nor jump on table.
7179 (the count register might be altered by the called function, and might
7180 be used for a branch on table). */
7181 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7182 if (GET_CODE (insn
) == CALL_INSN
){
7183 if (loop_dump_stream
)
7184 fprintf (loop_dump_stream
,
7185 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7190 if (GET_CODE (insn
) == JUMP_INSN
7191 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7192 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7193 if (loop_dump_stream
)
7194 fprintf (loop_dump_stream
,
7195 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7201 /* At this point, we are sure that the loop can be instrumented with BCT.
7202 Some of the loops, however, will not be instrumented - the final decision
7203 is taken by insert_bct () */
7204 if (loop_dump_stream
)
7205 fprintf (loop_dump_stream
,
7206 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7209 /* mark all enclosing loops that they cannot use count register */
7210 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7211 marking here may prevent instrumenting an enclosing loop that could
7212 actually be instrumented. But since this is rare, it is safer to mark
7213 here in case the order of calling (analyze/insert)_bct would be changed. */
7214 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7215 loop_used_count_register
[i
] = 1;
7217 /* Set data structures which will be used by the instrumentation phase */
7218 loop_start_value
[loop_num
] = initial_value
;
7219 loop_comparison_value
[loop_num
] = comparison_value
;
7220 loop_increment
[loop_num
] = increment
;
7221 loop_comparison_code
[loop_num
] = comparison_code
;
7222 loop_can_insert_bct
[loop_num
] = 1;
7226 /* instrument loop for insertion of bct instruction. We distinguish between
7227 loops with compile-time bounds, to those with run-time bounds. The loop
7228 behaviour is analized according to the following characteristics/variables:
7230 ; comparison-value: the value to which the iteration counter is compared.
7231 ; initial-value: iteration-counter initial value.
7232 ; increment: iteration-counter increment.
7233 ; Computed variables:
7234 ; increment-direction: the sign of the increment.
7235 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7236 ; range-direction: sign (comparison-value - initial-value)
7237 We give up on the following cases:
7238 ; loop variable overflow.
7239 ; run-time loop bounds with comparison code NE.
7243 insert_bct (loop_start
, loop_end
)
7244 rtx loop_start
, loop_end
;
7246 rtx initial_value
, comparison_value
, increment
;
7247 enum rtx_code comparison_code
;
7249 int increment_direction
, compare_direction
;
7252 /* if the loop condition is <= or >=, the number of iteration
7253 is 1 more than the range of the bounds of the loop */
7254 int add_iteration
= 0;
7256 /* the only machine mode we work with - is the integer of the size that the
7258 enum machine_mode loop_var_mode
= SImode
;
7260 int loop_num
= loop_number (loop_start
, loop_end
);
7262 /* get loop-variables. No need to check that these are valid - already
7263 checked in analyze_loop_iterations (). */
7264 comparison_code
= loop_comparison_code
[loop_num
];
7265 initial_value
= loop_start_value
[loop_num
];
7266 comparison_value
= loop_comparison_value
[loop_num
];
7267 increment
= loop_increment
[loop_num
];
7269 /* check analyze_loop_iterations decision for this loop. */
7270 if (! loop_can_insert_bct
[loop_num
]){
7271 if (loop_dump_stream
)
7272 fprintf (loop_dump_stream
,
7273 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7278 /* It's impossible to instrument a competely unrolled loop. */
7279 if (loop_unroll_factor
[loop_num
] == -1)
7282 /* make sure that the last loop insn is a conditional jump .
7283 This check is repeated from analyze_loop_iterations (),
7284 because unrolling might have changed that. */
7285 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7286 || !condjump_p (PREV_INSN (loop_end
))) {
7287 if (loop_dump_stream
)
7288 fprintf (loop_dump_stream
,
7289 "insert_bct: not instrumenting BCT because of invalid branch\n");
7293 /* fix increment in case loop was unrolled. */
7294 if (loop_unroll_factor
[loop_num
] > 1)
7295 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7297 /* determine properties and directions of the loop */
7298 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7299 switch ( comparison_code
) {
7304 compare_direction
= 1;
7311 compare_direction
= -1;
7315 /* in this case we cannot know the number of iterations */
7316 if (loop_dump_stream
)
7317 fprintf (loop_dump_stream
,
7318 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7325 compare_direction
= 1;
7331 compare_direction
= -1;
7334 compare_direction
= 0;
7341 /* make sure that the loop does not end by an overflow */
7342 if (compare_direction
!= increment_direction
) {
7343 if (loop_dump_stream
)
7344 fprintf (loop_dump_stream
,
7345 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7350 /* try to instrument the loop. */
7352 /* Handle the simpler case, where the bounds are known at compile time. */
7353 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7356 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7358 /* check the relation between compare-val and initial-val */
7359 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7360 int range_direction
= (difference
> 0) ? 1 : -1;
7362 /* make sure the loop executes enough iterations to gain from BCT */
7363 if (difference
> -3 && difference
< 3) {
7364 if (loop_dump_stream
)
7365 fprintf (loop_dump_stream
,
7366 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7371 /* make sure that the loop executes at least once */
7372 if ((range_direction
== 1 && compare_direction
== -1)
7373 || (range_direction
== -1 && compare_direction
== 1))
7375 if (loop_dump_stream
)
7376 fprintf (loop_dump_stream
,
7377 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7382 /* make sure that the loop does not end by an overflow (in compile time
7383 bounds we must have an additional check for overflow, because here
7384 we also support the compare code of 'NE'. */
7385 if (comparison_code
== NE
7386 && increment_direction
!= range_direction
) {
7387 if (loop_dump_stream
)
7388 fprintf (loop_dump_stream
,
7389 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7394 /* Determine the number of iterations by:
7396 ; compare-val - initial-val + (increment -1) + additional-iteration
7397 ; num_iterations = -----------------------------------------------------------------
7400 difference
= (range_direction
> 0) ? difference
: -difference
;
7402 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7403 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7404 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7405 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7406 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7409 if (increment_value_abs
== 0) {
7410 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7413 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7414 / increment_value_abs
;
7417 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7419 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7421 /* Done with this loop. */
7425 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7426 /* In this case we generate run_time calculation of the number of iterations */
7428 /* With runtime bounds, if the compare is of the form '!=' we give up */
7429 if (comparison_code
== NE
) {
7430 if (loop_dump_stream
)
7431 fprintf (loop_dump_stream
,
7432 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7438 /* We rely on the existence of run-time guard to ensure that the
7439 loop executes at least once. */
7441 rtx iterations_num_reg
;
7443 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7445 /* make sure that the increment is a power of two, otherwise (an
7446 expensive) divide is needed. */
7447 if (exact_log2 (increment_value_abs
) == -1)
7449 if (loop_dump_stream
)
7450 fprintf (loop_dump_stream
,
7451 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7455 /* compute the number of iterations */
7458 /* CYGNUS LOCAL: HAIFA bug fix */
7461 /* Again, the number of iterations is calculated by:
7463 ; compare-val - initial-val + (increment -1) + additional-iteration
7464 ; num_iterations = -----------------------------------------------------------------
7467 /* ??? Do we have to call copy_rtx here before passing rtx to
7469 if (compare_direction
> 0) {
7470 /* <, <= :the loop variable is increasing */
7471 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7472 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7475 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7476 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7479 if (increment_value_abs
- 1 + add_iteration
!= 0)
7480 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7481 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7482 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7484 if (increment_value_abs
!= 1)
7486 /* ??? This will generate an expensive divide instruction for
7487 most targets. The original authors apparently expected this
7488 to be a shift, since they test for power-of-2 divisors above,
7489 but just naively generating a divide instruction will not give
7490 a shift. It happens to work for the PowerPC target because
7491 the rs6000.md file has a divide pattern that emits shifts.
7492 It will probably not work for any other target. */
7493 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7495 GEN_INT (increment_value_abs
),
7496 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7499 iterations_num_reg
= temp_reg
;
7500 /* END CYGNUS LOCAL: HAIFA bug fix */
7502 sequence
= gen_sequence ();
7504 emit_insn_before (sequence
, loop_start
);
7505 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7509 /* instrument loop by inserting a bct in it. This is done in the following way:
7510 1. A new register is created and assigned the hard register number of the count
7512 2. In the head of the loop the new variable is initialized by the value passed in the
7513 loop_num_iterations parameter.
7514 3. At the end of the loop, comparison of the register with 0 is generated.
7515 The created comparison follows the pattern defined for the
7516 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7518 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7519 not used elsewhere, it will be eliminated by data-flow analisys. */
7522 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7523 rtx loop_start
, loop_end
;
7524 rtx loop_num_iterations
;
7526 rtx temp_reg1
, temp_reg2
;
7530 enum machine_mode loop_var_mode
= SImode
;
7532 #ifdef HAVE_decrement_and_branch_on_count
7533 if (HAVE_decrement_and_branch_on_count
)
7535 if (loop_dump_stream
)
7536 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7538 /* eliminate the check on the old variable */
7539 delete_insn (PREV_INSN (loop_end
));
7540 delete_insn (PREV_INSN (loop_end
));
7542 /* insert the label which will delimit the start of the loop */
7543 start_label
= gen_label_rtx ();
7544 emit_label_after (start_label
, loop_start
);
7546 /* insert initialization of the count register into the loop header */
7548 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7549 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7551 /* this will be count register */
7552 temp_reg2
= gen_rtx (REG
, loop_var_mode
, COUNT_REGISTER_REGNUM
);
7553 /* we have to move the value to the count register from an GPR
7554 because rtx pointed to by loop_num_iterations could contain
7555 expression which cannot be moved into count register */
7556 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7558 sequence
= gen_sequence ();
7560 emit_insn_after (sequence
, loop_start
);
7562 /* insert new comparison on the count register instead of the
7563 old one, generating the needed BCT pattern (that will be
7564 later recognized by assembly generation phase). */
7565 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7567 LABEL_NUSES (start_label
)++;
7570 #endif /* HAVE_decrement_and_branch_on_count */
7573 /* calculate the uid of the given loop */
7575 loop_number (loop_start
, loop_end
)
7576 rtx loop_start
, loop_end
;
7580 /* assume that this insn contains the LOOP_START
7581 note, so it will not be changed by the loop unrolling */
7582 loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7583 /* sanity check - should never happen */
7591 /* Scan the function and determine whether it has indirect (computed) jumps.
7593 This is taken mostly from flow.c; similar code exists elsewhere
7594 in the compiler. It may be useful to put this into rtlanal.c. */
7596 indirect_jump_in_function_p (start
)
7600 int is_indirect_jump
= 0;
7602 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
7603 if (computed_jump_p (insn
))
7606 /* END CYGNUS LOCAL haifa */