1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* For each loop, remember its unrolling factor (if at all).
95 contents of the array:
97 -1: completely unrolled - no further instrumentation is needed.
98 >1: holds the exact amount of unrolling. */
100 int *loop_unroll_factor
;
101 int *loop_unroll_iter
;
103 /* loop parameters for arithmetic loops. These loops have a loop variable
104 which is initialized to loop_start_value, incremented in each iteration
105 by "loop_increment". At the end of the iteration the loop variable is
106 compared to the loop_comparison_value (using loop_comparison_code). */
109 rtx
*loop_comparison_value
;
110 rtx
*loop_start_value
;
111 enum rtx_code
*loop_comparison_code
;
115 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
116 really a loop (an insn outside the loop branches into it). */
118 static char *loop_invalid
;
120 /* Indexed by loop number, links together all LABEL_REFs which refer to
121 code labels outside the loop. Used by routines that need to know all
122 loop exits, such as final_biv_value and final_giv_value.
124 This does not include loop exits due to return instructions. This is
125 because all bivs and givs are pseudos, and hence must be dead after a
126 return, so the presense of a return does not affect any of the
127 optimizations that use this info. It is simpler to just not include return
128 instructions on this list. */
130 rtx
*loop_number_exit_labels
;
132 /* Indexed by loop number, counts the number of LABEL_REFs on
133 loop_number_exit_labels for this loop and all loops nested inside it. */
135 int *loop_number_exit_count
;
137 /* Holds the number of loop iterations. It is zero if the number could not be
138 calculated. Must be unsigned since the number of iterations can
139 be as high as 2^wordsize-1. For loops with a wider iterator, this number
140 will will be zero if the number of loop iterations is too large for an
141 unsigned integer to hold. */
143 unsigned HOST_WIDE_INT loop_n_iterations
;
145 /* Nonzero if there is a subroutine call in the current loop. */
147 static int loop_has_call
;
149 /* Nonzero if there is a volatile memory reference in the current
152 static int loop_has_volatile
;
154 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
155 current loop. A continue statement will generate a branch to
156 NEXT_INSN (loop_continue). */
158 static rtx loop_continue
;
160 /* Indexed by register number, contains the number of times the reg
161 is set during the loop being scanned.
162 During code motion, a negative value indicates a reg that has been
163 made a candidate; in particular -2 means that it is an candidate that
164 we know is equal to a constant and -1 means that it is an candidate
165 not known equal to a constant.
166 After code motion, regs moved have 0 (which is accurate now)
167 while the failed candidates have the original number of times set.
169 Therefore, at all times, == 0 indicates an invariant register;
170 < 0 a conditionally invariant one. */
172 static int *n_times_set
;
174 /* Original value of n_times_set; same except that this value
175 is not set negative for a reg whose sets have been made candidates
176 and not set to 0 for a reg that is moved. */
178 static int *n_times_used
;
180 /* Index by register number, 1 indicates that the register
181 cannot be moved or strength reduced. */
183 static char *may_not_optimize
;
185 /* Nonzero means reg N has already been moved out of one loop.
186 This reduces the desire to move it out of another. */
188 static char *moved_once
;
190 /* Array of MEMs that are stored in this loop. If there are too many to fit
191 here, we just turn on unknown_address_altered. */
193 #define NUM_STORES 30
194 static rtx loop_store_mems
[NUM_STORES
];
196 /* Index of first available slot in above array. */
197 static int loop_store_mems_idx
;
199 /* Nonzero if we don't know what MEMs were changed in the current loop.
200 This happens if the loop contains a call (in which case `loop_has_call'
201 will also be set) or if we store into more than NUM_STORES MEMs. */
203 static int unknown_address_altered
;
205 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
206 static int num_movables
;
208 /* Count of memory write instructions discovered in the loop. */
209 static int num_mem_sets
;
211 /* Number of loops contained within the current one, including itself. */
212 static int loops_enclosed
;
214 /* Bound on pseudo register number before loop optimization.
215 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
216 int max_reg_before_loop
;
218 /* This obstack is used in product_cheap_p to allocate its rtl. It
219 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
220 If we used the same obstack that it did, we would be deallocating
223 static struct obstack temp_obstack
;
225 /* This is where the pointer to the obstack being used for RTL is stored. */
227 extern struct obstack
*rtl_obstack
;
229 #define obstack_chunk_alloc xmalloc
230 #define obstack_chunk_free free
232 extern char *oballoc ();
234 /* During the analysis of a loop, a chain of `struct movable's
235 is made to record all the movable insns found.
236 Then the entire chain can be scanned to decide which to move. */
240 rtx insn
; /* A movable insn */
241 rtx set_src
; /* The expression this reg is set from. */
242 rtx set_dest
; /* The destination of this SET. */
243 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
244 of any registers used within the LIBCALL. */
245 int consec
; /* Number of consecutive following insns
246 that must be moved with this one. */
247 int regno
; /* The register it sets */
248 short lifetime
; /* lifetime of that register;
249 may be adjusted when matching movables
250 that load the same value are found. */
251 short savings
; /* Number of insns we can move for this reg,
252 including other movables that force this
253 or match this one. */
254 unsigned int cond
: 1; /* 1 if only conditionally movable */
255 unsigned int force
: 1; /* 1 means MUST move this insn */
256 unsigned int global
: 1; /* 1 means reg is live outside this loop */
257 /* If PARTIAL is 1, GLOBAL means something different:
258 that the reg is live outside the range from where it is set
259 to the following label. */
260 unsigned int done
: 1; /* 1 inhibits further processing of this */
262 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
263 In particular, moving it does not make it
265 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
266 load SRC, rather than copying INSN. */
267 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
268 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
269 that we should avoid changing when clearing
270 the rest of the reg. */
271 struct movable
*match
; /* First entry for same value */
272 struct movable
*forces
; /* An insn that must be moved if this is */
273 struct movable
*next
;
276 FILE *loop_dump_stream
;
278 /* Forward declarations. */
280 static void find_and_verify_loops ();
281 static void mark_loop_jump ();
282 static void prescan_loop ();
283 static int reg_in_basic_block_p ();
284 static int consec_sets_invariant_p ();
285 static rtx
libcall_other_reg ();
286 static int labels_in_range_p ();
287 static void count_loop_regs_set ();
288 static void note_addr_stored ();
289 static int loop_reg_used_before_p ();
290 static void scan_loop ();
291 static void replace_call_address ();
292 static rtx
skip_consec_insns ();
293 static int libcall_benefit ();
294 static void ignore_some_movables ();
295 static void force_movables ();
296 static void combine_movables ();
297 static int rtx_equal_for_loop_p ();
298 static void move_movables ();
299 static void strength_reduce ();
300 static int valid_initial_value_p ();
301 static void find_mem_givs ();
302 static void record_biv ();
303 static void check_final_value ();
304 static void record_giv ();
305 static void update_giv_derive ();
306 static int basic_induction_var ();
307 static rtx
simplify_giv_expr ();
308 static int general_induction_var ();
309 static int consec_sets_giv ();
310 static int check_dbra_loop ();
311 static rtx
express_from ();
312 static int combine_givs_p ();
313 static void combine_givs ();
314 static int product_cheap_p ();
315 static int maybe_eliminate_biv ();
316 static int maybe_eliminate_biv_1 ();
317 static int last_use_this_basic_block ();
318 static void record_initial ();
319 static void update_reg_last_use ();
322 /* This is extern from unroll.c */
323 void iteration_info ();
325 /* Two main functions for implementing bct:
326 first - to be called before loop unrolling, and the second - after */
327 static void analyze_loop_iterations ();
328 static void insert_bct ();
330 /* Auxiliary function that inserts the bct pattern into the loop */
331 static void instrument_loop_bct ();
337 /* Indirect_jump_in_function is computed once per function. */
338 int indirect_jump_in_function
= 0;
339 static int indirect_jump_in_function_p ();
342 /* Relative gain of eliminating various kinds of operations. */
349 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
350 copy the value of the strength reduced giv to its original register. */
356 char *free_point
= (char *) oballoc (1);
357 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
359 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
361 /* We multiply by 2 to reconcile the difference in scale between
362 these two ways of computing costs. Otherwise the cost of a copy
363 will be far less than the cost of an add. */
367 /* Free the objects we just allocated. */
370 /* Initialize the obstack used for rtl in product_cheap_p. */
371 gcc_obstack_init (&temp_obstack
);
374 /* Entry point of this file. Perform loop optimization
375 on the current function. F is the first insn of the function
376 and DUMPFILE is a stream for output of a trace of actions taken
377 (or 0 if none should be output). */
380 loop_optimize (f
, dumpfile
)
381 /* f is the first instruction of a chain of insns for one function */
389 loop_dump_stream
= dumpfile
;
391 init_recog_no_volatile ();
392 init_alias_analysis ();
394 max_reg_before_loop
= max_reg_num ();
396 moved_once
= (char *) alloca (max_reg_before_loop
);
397 bzero (moved_once
, max_reg_before_loop
);
401 /* Count the number of loops. */
404 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
406 if (GET_CODE (insn
) == NOTE
407 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
411 /* Don't waste time if no loops. */
412 if (max_loop_num
== 0)
415 /* Get size to use for tables indexed by uids.
416 Leave some space for labels allocated by find_and_verify_loops. */
417 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
419 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
420 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
422 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
423 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
425 /* Allocate tables for recording each loop. We set each entry, so they need
427 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
428 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
429 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
430 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
431 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
432 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
435 /* Allocate for BCT optimization */
436 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
437 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
439 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
440 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
442 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
443 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
445 loop_unroll_iter
= (int *) alloca (max_loop_num
*sizeof (int));
446 bzero ((char *) loop_unroll_iter
, max_loop_num
* sizeof (int));
448 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
449 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
450 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
451 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
452 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
453 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
456 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
457 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
460 /* Find and process each loop.
461 First, find them, and record them in order of their beginnings. */
462 find_and_verify_loops (f
);
464 /* Now find all register lifetimes. This must be done after
465 find_and_verify_loops, because it might reorder the insns in the
467 reg_scan (f
, max_reg_num (), 1);
469 /* See if we went too far. */
470 if (get_max_uid () > max_uid_for_loop
)
473 /* Compute the mapping from uids to luids.
474 LUIDs are numbers assigned to insns, like uids,
475 except that luids increase monotonically through the code.
476 Don't assign luids to line-number NOTEs, so that the distance in luids
477 between two insns is not affected by -g. */
479 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
482 if (GET_CODE (insn
) != NOTE
483 || NOTE_LINE_NUMBER (insn
) <= 0)
484 uid_luid
[INSN_UID (insn
)] = ++i
;
486 /* Give a line number note the same luid as preceding insn. */
487 uid_luid
[INSN_UID (insn
)] = i
;
492 /* Don't leave gaps in uid_luid for insns that have been
493 deleted. It is possible that the first or last insn
494 using some register has been deleted by cross-jumping.
495 Make sure that uid_luid for that former insn's uid
496 points to the general area where that insn used to be. */
497 for (i
= 0; i
< max_uid_for_loop
; i
++)
499 uid_luid
[0] = uid_luid
[i
];
500 if (uid_luid
[0] != 0)
503 for (i
= 0; i
< max_uid_for_loop
; i
++)
504 if (uid_luid
[i
] == 0)
505 uid_luid
[i
] = uid_luid
[i
- 1];
507 /* Create a mapping from loops to BLOCK tree nodes. */
508 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
509 find_loop_tree_blocks ();
511 /* Determine if the function has indirect jump. On some systems
512 this prevents low overhead loop instructions from being used. */
513 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
515 /* Now scan the loops, last ones first, since this means inner ones are done
516 before outer ones. */
517 for (i
= max_loop_num
-1; i
>= 0; i
--)
518 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
519 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
522 /* If debugging and unrolling loops, we must replicate the tree nodes
523 corresponding to the blocks inside the loop, so that the original one
524 to one mapping will remain. */
525 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
526 unroll_block_trees ();
529 /* Optimize one loop whose start is LOOP_START and end is END.
530 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
531 NOTE_INSN_LOOP_END. */
533 /* ??? Could also move memory writes out of loops if the destination address
534 is invariant, the source is invariant, the memory write is not volatile,
535 and if we can prove that no read inside the loop can read this address
536 before the write occurs. If there is a read of this address after the
537 write, then we can also mark the memory read as invariant. */
540 scan_loop (loop_start
, end
, nregs
)
546 /* 1 if we are scanning insns that could be executed zero times. */
548 /* 1 if we are scanning insns that might never be executed
549 due to a subroutine call which might exit before they are reached. */
551 /* For a rotated loop that is entered near the bottom,
552 this is the label at the top. Otherwise it is zero. */
554 /* Jump insn that enters the loop, or 0 if control drops in. */
555 rtx loop_entry_jump
= 0;
556 /* Place in the loop where control enters. */
558 /* Number of insns in the loop. */
563 /* The SET from an insn, if it is the only SET in the insn. */
565 /* Chain describing insns movable in current loop. */
566 struct movable
*movables
= 0;
567 /* Last element in `movables' -- so we can add elements at the end. */
568 struct movable
*last_movable
= 0;
569 /* Ratio of extra register life span we can justify
570 for saving an instruction. More if loop doesn't call subroutines
571 since in that case saving an insn makes more difference
572 and more registers are available. */
574 /* If we have calls, contains the insn in which a register was used
575 if it was used exactly once; contains const0_rtx if it was used more
577 rtx
*reg_single_usage
= 0;
578 /* Nonzero if we are scanning instructions in a sub-loop. */
581 n_times_set
= (int *) alloca (nregs
* sizeof (int));
582 n_times_used
= (int *) alloca (nregs
* sizeof (int));
583 may_not_optimize
= (char *) alloca (nregs
);
585 /* Determine whether this loop starts with a jump down to a test at
586 the end. This will occur for a small number of loops with a test
587 that is too complex to duplicate in front of the loop.
589 We search for the first insn or label in the loop, skipping NOTEs.
590 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
591 (because we might have a loop executed only once that contains a
592 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
593 (in case we have a degenerate loop).
595 Note that if we mistakenly think that a loop is entered at the top
596 when, in fact, it is entered at the exit test, the only effect will be
597 slightly poorer optimization. Making the opposite error can generate
598 incorrect code. Since very few loops now start with a jump to the
599 exit test, the code here to detect that case is very conservative. */
601 for (p
= NEXT_INSN (loop_start
);
603 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
604 && (GET_CODE (p
) != NOTE
605 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
606 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
612 /* Set up variables describing this loop. */
613 prescan_loop (loop_start
, end
);
614 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
616 /* If loop has a jump before the first label,
617 the true entry is the target of that jump.
618 Start scan from there.
619 But record in LOOP_TOP the place where the end-test jumps
620 back to so we can scan that after the end of the loop. */
621 if (GET_CODE (p
) == JUMP_INSN
)
625 /* Loop entry must be unconditional jump (and not a RETURN) */
627 && JUMP_LABEL (p
) != 0
628 /* Check to see whether the jump actually
629 jumps out of the loop (meaning it's no loop).
630 This case can happen for things like
631 do {..} while (0). If this label was generated previously
632 by loop, we can't tell anything about it and have to reject
634 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
635 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
636 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
638 loop_top
= next_label (scan_start
);
639 scan_start
= JUMP_LABEL (p
);
643 /* If SCAN_START was an insn created by loop, we don't know its luid
644 as required by loop_reg_used_before_p. So skip such loops. (This
645 test may never be true, but it's best to play it safe.)
647 Also, skip loops where we do not start scanning at a label. This
648 test also rejects loops starting with a JUMP_INSN that failed the
651 if (INSN_UID (scan_start
) >= max_uid_for_loop
652 || GET_CODE (scan_start
) != CODE_LABEL
)
654 if (loop_dump_stream
)
655 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
656 INSN_UID (loop_start
), INSN_UID (end
));
660 /* Count number of times each reg is set during this loop.
661 Set may_not_optimize[I] if it is not safe to move out
662 the setting of register I. If this loop has calls, set
663 reg_single_usage[I]. */
665 bzero ((char *) n_times_set
, nregs
* sizeof (int));
666 bzero (may_not_optimize
, nregs
);
670 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
671 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
674 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
675 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
677 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
678 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
679 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
681 if (loop_dump_stream
)
683 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
684 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
686 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
687 INSN_UID (loop_continue
));
690 /* Scan through the loop finding insns that are safe to move.
691 Set n_times_set negative for the reg being set, so that
692 this reg will be considered invariant for subsequent insns.
693 We consider whether subsequent insns use the reg
694 in deciding whether it is worth actually moving.
696 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
697 and therefore it is possible that the insns we are scanning
698 would never be executed. At such times, we must make sure
699 that it is safe to execute the insn once instead of zero times.
700 When MAYBE_NEVER is 0, all insns will be executed at least once
701 so that is not a problem. */
707 /* At end of a straight-in loop, we are done.
708 At end of a loop entered at the bottom, scan the top. */
721 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
722 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
724 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
725 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
728 if (GET_CODE (p
) == INSN
729 && (set
= single_set (p
))
730 && GET_CODE (SET_DEST (set
)) == REG
731 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
736 rtx src
= SET_SRC (set
);
737 rtx dependencies
= 0;
739 /* Figure out what to use as a source of this insn. If a REG_EQUIV
740 note is given or if a REG_EQUAL note with a constant operand is
741 specified, use it as the source and mark that we should move
742 this insn by calling emit_move_insn rather that duplicating the
745 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
747 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
749 src
= XEXP (temp
, 0), move_insn
= 1;
752 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
753 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
754 src
= XEXP (temp
, 0), move_insn
= 1;
755 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
757 src
= XEXP (temp
, 0);
758 /* A libcall block can use regs that don't appear in
759 the equivalent expression. To move the libcall,
760 we must move those regs too. */
761 dependencies
= libcall_other_reg (p
, src
);
765 /* Don't try to optimize a register that was made
766 by loop-optimization for an inner loop.
767 We don't know its life-span, so we can't compute the benefit. */
768 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
770 /* In order to move a register, we need to have one of three cases:
771 (1) it is used only in the same basic block as the set
772 (2) it is not a user variable and it is not used in the
773 exit test (this can cause the variable to be used
774 before it is set just like a user-variable).
775 (3) the set is guaranteed to be executed once the loop starts,
776 and the reg is not used until after that. */
777 else if (! ((! maybe_never
778 && ! loop_reg_used_before_p (set
, p
, loop_start
,
780 || (! REG_USERVAR_P (SET_DEST (set
))
781 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
782 || reg_in_basic_block_p (p
, SET_DEST (set
))))
784 else if ((tem
= invariant_p (src
))
785 && (dependencies
== 0
786 || (tem2
= invariant_p (dependencies
)) != 0)
787 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
789 = consec_sets_invariant_p (SET_DEST (set
),
790 n_times_set
[REGNO (SET_DEST (set
))],
792 /* If the insn can cause a trap (such as divide by zero),
793 can't move it unless it's guaranteed to be executed
794 once loop is entered. Even a function call might
795 prevent the trap insn from being reached
796 (since it might exit!) */
797 && ! ((maybe_never
|| call_passed
)
798 && may_trap_p (src
)))
800 register struct movable
*m
;
801 register int regno
= REGNO (SET_DEST (set
));
803 /* A potential lossage is where we have a case where two insns
804 can be combined as long as they are both in the loop, but
805 we move one of them outside the loop. For large loops,
806 this can lose. The most common case of this is the address
807 of a function being called.
809 Therefore, if this register is marked as being used exactly
810 once if we are in a loop with calls (a "large loop"), see if
811 we can replace the usage of this register with the source
812 of this SET. If we can, delete this insn.
814 Don't do this if P has a REG_RETVAL note or if we have
815 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
817 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
818 && reg_single_usage
[regno
] != const0_rtx
819 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
820 && (REGNO_LAST_UID (regno
)
821 == INSN_UID (reg_single_usage
[regno
]))
822 && n_times_set
[REGNO (SET_DEST (set
))] == 1
823 && ! side_effects_p (SET_SRC (set
))
824 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
825 #ifdef SMALL_REGISTER_CLASSES
826 && ! (SMALL_REGISTER_CLASSES
827 && GET_CODE (SET_SRC (set
)) == REG
828 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
830 /* This test is not redundant; SET_SRC (set) might be
831 a call-clobbered register and the life of REGNO
832 might span a call. */
833 && ! modified_between_p (SET_SRC (set
), p
,
834 reg_single_usage
[regno
])
835 && no_labels_between_p (p
, reg_single_usage
[regno
])
836 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
837 reg_single_usage
[regno
]))
839 /* Replace any usage in a REG_EQUAL note. Must copy the
840 new source, so that we don't get rtx sharing between the
841 SET_SOURCE and REG_NOTES of insn p. */
842 REG_NOTES (reg_single_usage
[regno
])
843 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
844 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
847 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
848 NOTE_SOURCE_FILE (p
) = 0;
849 n_times_set
[regno
] = 0;
853 m
= (struct movable
*) alloca (sizeof (struct movable
));
857 m
->dependencies
= dependencies
;
858 m
->set_dest
= SET_DEST (set
);
860 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
864 m
->move_insn
= move_insn
;
865 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
866 m
->savemode
= VOIDmode
;
868 /* Set M->cond if either invariant_p or consec_sets_invariant_p
869 returned 2 (only conditionally invariant). */
870 m
->cond
= ((tem
| tem1
| tem2
) > 1);
871 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
872 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
874 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
875 - uid_luid
[REGNO_FIRST_UID (regno
)]);
876 m
->savings
= n_times_used
[regno
];
877 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
878 m
->savings
+= libcall_benefit (p
);
879 n_times_set
[regno
] = move_insn
? -2 : -1;
880 /* Add M to the end of the chain MOVABLES. */
884 last_movable
->next
= m
;
889 /* Skip this insn, not checking REG_LIBCALL notes. */
890 p
= next_nonnote_insn (p
);
891 /* Skip the consecutive insns, if there are any. */
892 p
= skip_consec_insns (p
, m
->consec
);
893 /* Back up to the last insn of the consecutive group. */
894 p
= prev_nonnote_insn (p
);
896 /* We must now reset m->move_insn, m->is_equiv, and possibly
897 m->set_src to correspond to the effects of all the
899 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
901 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
904 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
905 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
906 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
911 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
914 /* If this register is always set within a STRICT_LOW_PART
915 or set to zero, then its high bytes are constant.
916 So clear them outside the loop and within the loop
917 just load the low bytes.
918 We must check that the machine has an instruction to do so.
919 Also, if the value loaded into the register
920 depends on the same register, this cannot be done. */
921 else if (SET_SRC (set
) == const0_rtx
922 && GET_CODE (NEXT_INSN (p
)) == INSN
923 && (set1
= single_set (NEXT_INSN (p
)))
924 && GET_CODE (set1
) == SET
925 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
926 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
927 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
929 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
931 register int regno
= REGNO (SET_DEST (set
));
932 if (n_times_set
[regno
] == 2)
934 register struct movable
*m
;
935 m
= (struct movable
*) alloca (sizeof (struct movable
));
938 m
->set_dest
= SET_DEST (set
);
946 /* If the insn may not be executed on some cycles,
947 we can't clear the whole reg; clear just high part.
948 Not even if the reg is used only within this loop.
955 Clearing x before the inner loop could clobber a value
956 being saved from the last time around the outer loop.
957 However, if the reg is not used outside this loop
958 and all uses of the register are in the same
959 basic block as the store, there is no problem.
961 If this insn was made by loop, we don't know its
962 INSN_LUID and hence must make a conservative
964 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
965 || (uid_luid
[REGNO_LAST_UID (regno
)]
967 || (uid_luid
[REGNO_FIRST_UID (regno
)]
969 || (labels_in_range_p
970 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
971 if (maybe_never
&& m
->global
)
972 m
->savemode
= GET_MODE (SET_SRC (set1
));
974 m
->savemode
= VOIDmode
;
978 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
979 - uid_luid
[REGNO_FIRST_UID (regno
)]);
981 n_times_set
[regno
] = -1;
982 /* Add M to the end of the chain MOVABLES. */
986 last_movable
->next
= m
;
991 /* Past a call insn, we get to insns which might not be executed
992 because the call might exit. This matters for insns that trap.
993 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
994 so they don't count. */
995 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
997 /* Past a label or a jump, we get to insns for which we
998 can't count on whether or how many times they will be
999 executed during each iteration. Therefore, we can
1000 only move out sets of trivial variables
1001 (those not used after the loop). */
1002 /* Similar code appears twice in strength_reduce. */
1003 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1004 /* If we enter the loop in the middle, and scan around to the
1005 beginning, don't set maybe_never for that. This must be an
1006 unconditional jump, otherwise the code at the top of the
1007 loop might never be executed. Unconditional jumps are
1008 followed a by barrier then loop end. */
1009 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1010 && NEXT_INSN (NEXT_INSN (p
)) == end
1011 && simplejump_p (p
)))
1013 else if (GET_CODE (p
) == NOTE
)
1015 /* At the virtual top of a converted loop, insns are again known to
1016 be executed: logically, the loop begins here even though the exit
1017 code has been duplicated. */
1018 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1019 maybe_never
= call_passed
= 0;
1020 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1022 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1027 /* If one movable subsumes another, ignore that other. */
1029 ignore_some_movables (movables
);
1031 /* For each movable insn, see if the reg that it loads
1032 leads when it dies right into another conditionally movable insn.
1033 If so, record that the second insn "forces" the first one,
1034 since the second can be moved only if the first is. */
1036 force_movables (movables
);
1038 /* See if there are multiple movable insns that load the same value.
1039 If there are, make all but the first point at the first one
1040 through the `match' field, and add the priorities of them
1041 all together as the priority of the first. */
1043 combine_movables (movables
, nregs
);
1045 /* Now consider each movable insn to decide whether it is worth moving.
1046 Store 0 in n_times_set for each reg that is moved. */
1048 move_movables (movables
, threshold
,
1049 insn_count
, loop_start
, end
, nregs
);
1051 /* Now candidates that still are negative are those not moved.
1052 Change n_times_set to indicate that those are not actually invariant. */
1053 for (i
= 0; i
< nregs
; i
++)
1054 if (n_times_set
[i
] < 0)
1055 n_times_set
[i
] = n_times_used
[i
];
1057 if (flag_strength_reduce
)
1058 strength_reduce (scan_start
, end
, loop_top
,
1059 insn_count
, loop_start
, end
);
1062 /* Add elements to *OUTPUT to record all the pseudo-regs
1063 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1066 record_excess_regs (in_this
, not_in_this
, output
)
1067 rtx in_this
, not_in_this
;
1074 code
= GET_CODE (in_this
);
1088 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1089 && ! reg_mentioned_p (in_this
, not_in_this
))
1090 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1094 fmt
= GET_RTX_FORMAT (code
);
1095 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1102 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1103 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1107 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1113 /* Check what regs are referred to in the libcall block ending with INSN,
1114 aside from those mentioned in the equivalent value.
1115 If there are none, return 0.
1116 If there are one or more, return an EXPR_LIST containing all of them. */
1119 libcall_other_reg (insn
, equiv
)
1122 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1123 rtx p
= XEXP (note
, 0);
1126 /* First, find all the regs used in the libcall block
1127 that are not mentioned as inputs to the result. */
1131 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1132 || GET_CODE (p
) == CALL_INSN
)
1133 record_excess_regs (PATTERN (p
), equiv
, &output
);
1140 /* Return 1 if all uses of REG
1141 are between INSN and the end of the basic block. */
1144 reg_in_basic_block_p (insn
, reg
)
1147 int regno
= REGNO (reg
);
1150 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1153 /* Search this basic block for the already recorded last use of the reg. */
1154 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1156 switch (GET_CODE (p
))
1163 /* Ordinary insn: if this is the last use, we win. */
1164 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1169 /* Jump insn: if this is the last use, we win. */
1170 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1172 /* Otherwise, it's the end of the basic block, so we lose. */
1177 /* It's the end of the basic block, so we lose. */
1182 /* The "last use" doesn't follow the "first use"?? */
1186 /* Compute the benefit of eliminating the insns in the block whose
1187 last insn is LAST. This may be a group of insns used to compute a
1188 value directly or can contain a library call. */
1191 libcall_benefit (last
)
1197 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1198 insn
!= last
; insn
= NEXT_INSN (insn
))
1200 if (GET_CODE (insn
) == CALL_INSN
)
1201 benefit
+= 10; /* Assume at least this many insns in a library
1203 else if (GET_CODE (insn
) == INSN
1204 && GET_CODE (PATTERN (insn
)) != USE
1205 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1212 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1215 skip_consec_insns (insn
, count
)
1219 for (; count
> 0; count
--)
1223 /* If first insn of libcall sequence, skip to end. */
1224 /* Do this at start of loop, since INSN is guaranteed to
1226 if (GET_CODE (insn
) != NOTE
1227 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1228 insn
= XEXP (temp
, 0);
1230 do insn
= NEXT_INSN (insn
);
1231 while (GET_CODE (insn
) == NOTE
);
1237 /* Ignore any movable whose insn falls within a libcall
1238 which is part of another movable.
1239 We make use of the fact that the movable for the libcall value
1240 was made later and so appears later on the chain. */
1243 ignore_some_movables (movables
)
1244 struct movable
*movables
;
1246 register struct movable
*m
, *m1
;
1248 for (m
= movables
; m
; m
= m
->next
)
1250 /* Is this a movable for the value of a libcall? */
1251 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1255 /* Check for earlier movables inside that range,
1256 and mark them invalid. We cannot use LUIDs here because
1257 insns created by loop.c for prior loops don't have LUIDs.
1258 Rather than reject all such insns from movables, we just
1259 explicitly check each insn in the libcall (since invariant
1260 libcalls aren't that common). */
1261 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1262 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1263 if (m1
->insn
== insn
)
1269 /* For each movable insn, see if the reg that it loads
1270 leads when it dies right into another conditionally movable insn.
1271 If so, record that the second insn "forces" the first one,
1272 since the second can be moved only if the first is. */
1275 force_movables (movables
)
1276 struct movable
*movables
;
1278 register struct movable
*m
, *m1
;
1279 for (m1
= movables
; m1
; m1
= m1
->next
)
1280 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1281 if (!m1
->partial
&& !m1
->done
)
1283 int regno
= m1
->regno
;
1284 for (m
= m1
->next
; m
; m
= m
->next
)
1285 /* ??? Could this be a bug? What if CSE caused the
1286 register of M1 to be used after this insn?
1287 Since CSE does not update regno_last_uid,
1288 this insn M->insn might not be where it dies.
1289 But very likely this doesn't matter; what matters is
1290 that M's reg is computed from M1's reg. */
1291 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1294 if (m
!= 0 && m
->set_src
== m1
->set_dest
1295 /* If m->consec, m->set_src isn't valid. */
1299 /* Increase the priority of the moving the first insn
1300 since it permits the second to be moved as well. */
1304 m1
->lifetime
+= m
->lifetime
;
1305 m1
->savings
+= m1
->savings
;
1310 /* Find invariant expressions that are equal and can be combined into
1314 combine_movables (movables
, nregs
)
1315 struct movable
*movables
;
1318 register struct movable
*m
;
1319 char *matched_regs
= (char *) alloca (nregs
);
1320 enum machine_mode mode
;
1322 /* Regs that are set more than once are not allowed to match
1323 or be matched. I'm no longer sure why not. */
1324 /* Perhaps testing m->consec_sets would be more appropriate here? */
1326 for (m
= movables
; m
; m
= m
->next
)
1327 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1329 register struct movable
*m1
;
1330 int regno
= m
->regno
;
1332 bzero (matched_regs
, nregs
);
1333 matched_regs
[regno
] = 1;
1335 /* We want later insns to match the first one. Don't make the first
1336 one match any later ones. So start this loop at m->next. */
1337 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1338 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1339 /* A reg used outside the loop mustn't be eliminated. */
1341 /* A reg used for zero-extending mustn't be eliminated. */
1343 && (matched_regs
[m1
->regno
]
1346 /* Can combine regs with different modes loaded from the
1347 same constant only if the modes are the same or
1348 if both are integer modes with M wider or the same
1349 width as M1. The check for integer is redundant, but
1350 safe, since the only case of differing destination
1351 modes with equal sources is when both sources are
1352 VOIDmode, i.e., CONST_INT. */
1353 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1354 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1355 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1356 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1357 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1358 /* See if the source of M1 says it matches M. */
1359 && ((GET_CODE (m1
->set_src
) == REG
1360 && matched_regs
[REGNO (m1
->set_src
)])
1361 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1363 && ((m
->dependencies
== m1
->dependencies
)
1364 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1366 m
->lifetime
+= m1
->lifetime
;
1367 m
->savings
+= m1
->savings
;
1370 matched_regs
[m1
->regno
] = 1;
1374 /* Now combine the regs used for zero-extension.
1375 This can be done for those not marked `global'
1376 provided their lives don't overlap. */
1378 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1379 mode
= GET_MODE_WIDER_MODE (mode
))
1381 register struct movable
*m0
= 0;
1383 /* Combine all the registers for extension from mode MODE.
1384 Don't combine any that are used outside this loop. */
1385 for (m
= movables
; m
; m
= m
->next
)
1386 if (m
->partial
&& ! m
->global
1387 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1389 register struct movable
*m1
;
1390 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1391 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1395 /* First one: don't check for overlap, just record it. */
1400 /* Make sure they extend to the same mode.
1401 (Almost always true.) */
1402 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1405 /* We already have one: check for overlap with those
1406 already combined together. */
1407 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1408 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1409 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1410 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1413 /* No overlap: we can combine this with the others. */
1414 m0
->lifetime
+= m
->lifetime
;
1415 m0
->savings
+= m
->savings
;
1424 /* Return 1 if regs X and Y will become the same if moved. */
1427 regs_match_p (x
, y
, movables
)
1429 struct movable
*movables
;
1433 struct movable
*mx
, *my
;
1435 for (mx
= movables
; mx
; mx
= mx
->next
)
1436 if (mx
->regno
== xn
)
1439 for (my
= movables
; my
; my
= my
->next
)
1440 if (my
->regno
== yn
)
1444 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1446 || mx
== my
->match
));
1449 /* Return 1 if X and Y are identical-looking rtx's.
1450 This is the Lisp function EQUAL for rtx arguments.
1452 If two registers are matching movables or a movable register and an
1453 equivalent constant, consider them equal. */
1456 rtx_equal_for_loop_p (x
, y
, movables
)
1458 struct movable
*movables
;
1462 register struct movable
*m
;
1463 register enum rtx_code code
;
1468 if (x
== 0 || y
== 0)
1471 code
= GET_CODE (x
);
1473 /* If we have a register and a constant, they may sometimes be
1475 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1477 for (m
= movables
; m
; m
= m
->next
)
1478 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1479 && rtx_equal_p (m
->set_src
, y
))
1482 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1484 for (m
= movables
; m
; m
= m
->next
)
1485 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1486 && rtx_equal_p (m
->set_src
, x
))
1489 /* Otherwise, rtx's of different codes cannot be equal. */
1490 if (code
!= GET_CODE (y
))
1493 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1494 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1496 if (GET_MODE (x
) != GET_MODE (y
))
1499 /* These three types of rtx's can be compared nonrecursively. */
1501 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1503 if (code
== LABEL_REF
)
1504 return XEXP (x
, 0) == XEXP (y
, 0);
1505 if (code
== SYMBOL_REF
)
1506 return XSTR (x
, 0) == XSTR (y
, 0);
1508 /* Compare the elements. If any pair of corresponding elements
1509 fail to match, return 0 for the whole things. */
1511 fmt
= GET_RTX_FORMAT (code
);
1512 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1517 if (XWINT (x
, i
) != XWINT (y
, i
))
1522 if (XINT (x
, i
) != XINT (y
, i
))
1527 /* Two vectors must have the same length. */
1528 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1531 /* And the corresponding elements must match. */
1532 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1533 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1538 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1543 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1548 /* These are just backpointers, so they don't matter. */
1554 /* It is believed that rtx's at this level will never
1555 contain anything but integers and other rtx's,
1556 except for within LABEL_REFs and SYMBOL_REFs. */
1564 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1565 insns in INSNS which use thet reference. */
1568 add_label_notes (x
, insns
)
1572 enum rtx_code code
= GET_CODE (x
);
1577 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1579 rtx next
= next_real_insn (XEXP (x
, 0));
1581 /* Don't record labels that refer to dispatch tables.
1582 This is not necessary, since the tablejump references the same label.
1583 And if we did record them, flow.c would make worse code. */
1585 || ! (GET_CODE (next
) == JUMP_INSN
1586 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1587 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1589 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1590 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1591 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1597 fmt
= GET_RTX_FORMAT (code
);
1598 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1601 add_label_notes (XEXP (x
, i
), insns
);
1602 else if (fmt
[i
] == 'E')
1603 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1604 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1608 /* Scan MOVABLES, and move the insns that deserve to be moved.
1609 If two matching movables are combined, replace one reg with the
1610 other throughout. */
1613 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1614 struct movable
*movables
;
1622 register struct movable
*m
;
1624 /* Map of pseudo-register replacements to handle combining
1625 when we move several insns that load the same value
1626 into different pseudo-registers. */
1627 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1628 char *already_moved
= (char *) alloca (nregs
);
1630 bzero (already_moved
, nregs
);
1631 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1635 for (m
= movables
; m
; m
= m
->next
)
1637 /* Describe this movable insn. */
1639 if (loop_dump_stream
)
1641 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1642 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1644 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1646 fprintf (loop_dump_stream
, "cond ");
1648 fprintf (loop_dump_stream
, "force ");
1650 fprintf (loop_dump_stream
, "global ");
1652 fprintf (loop_dump_stream
, "done ");
1654 fprintf (loop_dump_stream
, "move-insn ");
1656 fprintf (loop_dump_stream
, "matches %d ",
1657 INSN_UID (m
->match
->insn
));
1659 fprintf (loop_dump_stream
, "forces %d ",
1660 INSN_UID (m
->forces
->insn
));
1663 /* Count movables. Value used in heuristics in strength_reduce. */
1666 /* Ignore the insn if it's already done (it matched something else).
1667 Otherwise, see if it is now safe to move. */
1671 || (1 == invariant_p (m
->set_src
)
1672 && (m
->dependencies
== 0
1673 || 1 == invariant_p (m
->dependencies
))
1675 || 1 == consec_sets_invariant_p (m
->set_dest
,
1678 && (! m
->forces
|| m
->forces
->done
))
1682 int savings
= m
->savings
;
1684 /* We have an insn that is safe to move.
1685 Compute its desirability. */
1690 if (loop_dump_stream
)
1691 fprintf (loop_dump_stream
, "savings %d ", savings
);
1693 if (moved_once
[regno
])
1697 if (loop_dump_stream
)
1698 fprintf (loop_dump_stream
, "halved since already moved ");
1701 /* An insn MUST be moved if we already moved something else
1702 which is safe only if this one is moved too: that is,
1703 if already_moved[REGNO] is nonzero. */
1705 /* An insn is desirable to move if the new lifetime of the
1706 register is no more than THRESHOLD times the old lifetime.
1707 If it's not desirable, it means the loop is so big
1708 that moving won't speed things up much,
1709 and it is liable to make register usage worse. */
1711 /* It is also desirable to move if it can be moved at no
1712 extra cost because something else was already moved. */
1714 if (already_moved
[regno
]
1715 || flag_move_all_movables
1716 || (threshold
* savings
* m
->lifetime
) >= insn_count
1717 || (m
->forces
&& m
->forces
->done
1718 && n_times_used
[m
->forces
->regno
] == 1))
1721 register struct movable
*m1
;
1724 /* Now move the insns that set the reg. */
1726 if (m
->partial
&& m
->match
)
1730 /* Find the end of this chain of matching regs.
1731 Thus, we load each reg in the chain from that one reg.
1732 And that reg is loaded with 0 directly,
1733 since it has ->match == 0. */
1734 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1735 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1736 SET_DEST (PATTERN (m1
->insn
)));
1737 i1
= emit_insn_before (newpat
, loop_start
);
1739 /* Mark the moved, invariant reg as being allowed to
1740 share a hard reg with the other matching invariant. */
1741 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1742 r1
= SET_DEST (PATTERN (m
->insn
));
1743 r2
= SET_DEST (PATTERN (m1
->insn
));
1744 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1745 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1747 delete_insn (m
->insn
);
1752 if (loop_dump_stream
)
1753 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1755 /* If we are to re-generate the item being moved with a
1756 new move insn, first delete what we have and then emit
1757 the move insn before the loop. */
1758 else if (m
->move_insn
)
1762 for (count
= m
->consec
; count
>= 0; count
--)
1764 /* If this is the first insn of a library call sequence,
1766 if (GET_CODE (p
) != NOTE
1767 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1770 /* If this is the last insn of a libcall sequence, then
1771 delete every insn in the sequence except the last.
1772 The last insn is handled in the normal manner. */
1773 if (GET_CODE (p
) != NOTE
1774 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1776 temp
= XEXP (temp
, 0);
1778 temp
= delete_insn (temp
);
1781 p
= delete_insn (p
);
1782 while (p
&& GET_CODE (p
) == NOTE
)
1787 emit_move_insn (m
->set_dest
, m
->set_src
);
1788 temp
= get_insns ();
1791 add_label_notes (m
->set_src
, temp
);
1793 i1
= emit_insns_before (temp
, loop_start
);
1794 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1796 = gen_rtx (EXPR_LIST
,
1797 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1798 m
->set_src
, REG_NOTES (i1
));
1800 if (loop_dump_stream
)
1801 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1803 /* The more regs we move, the less we like moving them. */
1808 for (count
= m
->consec
; count
>= 0; count
--)
1812 /* If first insn of libcall sequence, skip to end. */
1813 /* Do this at start of loop, since p is guaranteed to
1815 if (GET_CODE (p
) != NOTE
1816 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1819 /* If last insn of libcall sequence, move all
1820 insns except the last before the loop. The last
1821 insn is handled in the normal manner. */
1822 if (GET_CODE (p
) != NOTE
1823 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1827 rtx fn_address_insn
= 0;
1830 for (temp
= XEXP (temp
, 0); temp
!= p
;
1831 temp
= NEXT_INSN (temp
))
1837 if (GET_CODE (temp
) == NOTE
)
1840 body
= PATTERN (temp
);
1842 /* Find the next insn after TEMP,
1843 not counting USE or NOTE insns. */
1844 for (next
= NEXT_INSN (temp
); next
!= p
;
1845 next
= NEXT_INSN (next
))
1846 if (! (GET_CODE (next
) == INSN
1847 && GET_CODE (PATTERN (next
)) == USE
)
1848 && GET_CODE (next
) != NOTE
)
1851 /* If that is the call, this may be the insn
1852 that loads the function address.
1854 Extract the function address from the insn
1855 that loads it into a register.
1856 If this insn was cse'd, we get incorrect code.
1858 So emit a new move insn that copies the
1859 function address into the register that the
1860 call insn will use. flow.c will delete any
1861 redundant stores that we have created. */
1862 if (GET_CODE (next
) == CALL_INSN
1863 && GET_CODE (body
) == SET
1864 && GET_CODE (SET_DEST (body
)) == REG
1865 && (n
= find_reg_note (temp
, REG_EQUAL
,
1868 fn_reg
= SET_SRC (body
);
1869 if (GET_CODE (fn_reg
) != REG
)
1870 fn_reg
= SET_DEST (body
);
1871 fn_address
= XEXP (n
, 0);
1872 fn_address_insn
= temp
;
1874 /* We have the call insn.
1875 If it uses the register we suspect it might,
1876 load it with the correct address directly. */
1877 if (GET_CODE (temp
) == CALL_INSN
1879 && reg_referenced_p (fn_reg
, body
))
1880 emit_insn_after (gen_move_insn (fn_reg
,
1884 if (GET_CODE (temp
) == CALL_INSN
)
1886 i1
= emit_call_insn_before (body
, loop_start
);
1887 /* Because the USAGE information potentially
1888 contains objects other than hard registers
1889 we need to copy it. */
1890 if (CALL_INSN_FUNCTION_USAGE (temp
))
1891 CALL_INSN_FUNCTION_USAGE (i1
)
1892 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1895 i1
= emit_insn_before (body
, loop_start
);
1898 if (temp
== fn_address_insn
)
1899 fn_address_insn
= i1
;
1900 REG_NOTES (i1
) = REG_NOTES (temp
);
1904 if (m
->savemode
!= VOIDmode
)
1906 /* P sets REG to zero; but we should clear only
1907 the bits that are not covered by the mode
1909 rtx reg
= m
->set_dest
;
1915 (GET_MODE (reg
), and_optab
, reg
,
1916 GEN_INT ((((HOST_WIDE_INT
) 1
1917 << GET_MODE_BITSIZE (m
->savemode
)))
1919 reg
, 1, OPTAB_LIB_WIDEN
);
1923 emit_move_insn (reg
, tem
);
1924 sequence
= gen_sequence ();
1926 i1
= emit_insn_before (sequence
, loop_start
);
1928 else if (GET_CODE (p
) == CALL_INSN
)
1930 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1931 /* Because the USAGE information potentially
1932 contains objects other than hard registers
1933 we need to copy it. */
1934 if (CALL_INSN_FUNCTION_USAGE (p
))
1935 CALL_INSN_FUNCTION_USAGE (i1
)
1936 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1939 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1941 REG_NOTES (i1
) = REG_NOTES (p
);
1943 /* If there is a REG_EQUAL note present whose value is
1944 not loop invariant, then delete it, since it may
1945 cause problems with later optimization passes.
1946 It is possible for cse to create such notes
1947 like this as a result of record_jump_cond. */
1949 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1950 && ! invariant_p (XEXP (temp
, 0)))
1951 remove_note (i1
, temp
);
1956 if (loop_dump_stream
)
1957 fprintf (loop_dump_stream
, " moved to %d",
1961 /* This isn't needed because REG_NOTES is copied
1962 below and is wrong since P might be a PARALLEL. */
1963 if (REG_NOTES (i1
) == 0
1964 && ! m
->partial
/* But not if it's a zero-extend clr. */
1965 && ! m
->global
/* and not if used outside the loop
1966 (since it might get set outside). */
1967 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1969 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1970 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1973 /* If library call, now fix the REG_NOTES that contain
1974 insn pointers, namely REG_LIBCALL on FIRST
1975 and REG_RETVAL on I1. */
1976 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1978 XEXP (temp
, 0) = first
;
1979 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1980 XEXP (temp
, 0) = i1
;
1984 do p
= NEXT_INSN (p
);
1985 while (p
&& GET_CODE (p
) == NOTE
);
1988 /* The more regs we move, the less we like moving them. */
1992 /* Any other movable that loads the same register
1994 already_moved
[regno
] = 1;
1996 /* This reg has been moved out of one loop. */
1997 moved_once
[regno
] = 1;
1999 /* The reg set here is now invariant. */
2001 n_times_set
[regno
] = 0;
2005 /* Change the length-of-life info for the register
2006 to say it lives at least the full length of this loop.
2007 This will help guide optimizations in outer loops. */
2009 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2010 /* This is the old insn before all the moved insns.
2011 We can't use the moved insn because it is out of range
2012 in uid_luid. Only the old insns have luids. */
2013 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2014 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2015 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2017 /* Combine with this moved insn any other matching movables. */
2020 for (m1
= movables
; m1
; m1
= m1
->next
)
2025 /* Schedule the reg loaded by M1
2026 for replacement so that shares the reg of M.
2027 If the modes differ (only possible in restricted
2028 circumstances, make a SUBREG. */
2029 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2030 reg_map
[m1
->regno
] = m
->set_dest
;
2033 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2036 /* Get rid of the matching insn
2037 and prevent further processing of it. */
2040 /* if library call, delete all insn except last, which
2042 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2045 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2046 temp
= NEXT_INSN (temp
))
2049 delete_insn (m1
->insn
);
2051 /* Any other movable that loads the same register
2053 already_moved
[m1
->regno
] = 1;
2055 /* The reg merged here is now invariant,
2056 if the reg it matches is invariant. */
2058 n_times_set
[m1
->regno
] = 0;
2061 else if (loop_dump_stream
)
2062 fprintf (loop_dump_stream
, "not desirable");
2064 else if (loop_dump_stream
&& !m
->match
)
2065 fprintf (loop_dump_stream
, "not safe");
2067 if (loop_dump_stream
)
2068 fprintf (loop_dump_stream
, "\n");
2072 new_start
= loop_start
;
2074 /* Go through all the instructions in the loop, making
2075 all the register substitutions scheduled in REG_MAP. */
2076 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2077 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2078 || GET_CODE (p
) == CALL_INSN
)
2080 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2081 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2087 /* Scan X and replace the address of any MEM in it with ADDR.
2088 REG is the address that MEM should have before the replacement. */
2091 replace_call_address (x
, reg
, addr
)
2094 register enum rtx_code code
;
2100 code
= GET_CODE (x
);
2114 /* Short cut for very common case. */
2115 replace_call_address (XEXP (x
, 1), reg
, addr
);
2119 /* Short cut for very common case. */
2120 replace_call_address (XEXP (x
, 0), reg
, addr
);
2124 /* If this MEM uses a reg other than the one we expected,
2125 something is wrong. */
2126 if (XEXP (x
, 0) != reg
)
2132 fmt
= GET_RTX_FORMAT (code
);
2133 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2136 replace_call_address (XEXP (x
, i
), reg
, addr
);
2140 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2141 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2147 /* Return the number of memory refs to addresses that vary
2151 count_nonfixed_reads (x
)
2154 register enum rtx_code code
;
2162 code
= GET_CODE (x
);
2176 return ((invariant_p (XEXP (x
, 0)) != 1)
2177 + count_nonfixed_reads (XEXP (x
, 0)));
2181 fmt
= GET_RTX_FORMAT (code
);
2182 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2185 value
+= count_nonfixed_reads (XEXP (x
, i
));
2189 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2190 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2198 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2199 Replace it with an instruction to load just the low bytes
2200 if the machine supports such an instruction,
2201 and insert above LOOP_START an instruction to clear the register. */
2204 constant_high_bytes (p
, loop_start
)
2208 register int insn_code_number
;
2210 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2211 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2213 new = gen_rtx (SET
, VOIDmode
,
2214 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2215 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2216 SET_DEST (PATTERN (p
)),
2218 XEXP (SET_SRC (PATTERN (p
)), 0));
2219 insn_code_number
= recog (new, p
);
2221 if (insn_code_number
)
2225 /* Clear destination register before the loop. */
2226 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2227 SET_DEST (PATTERN (p
)),
2231 /* Inside the loop, just load the low part. */
2237 /* Scan a loop setting the variables `unknown_address_altered',
2238 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2239 and `loop_has_volatile'.
2240 Also, fill in the array `loop_store_mems'. */
2243 prescan_loop (start
, end
)
2246 register int level
= 1;
2249 unknown_address_altered
= 0;
2251 loop_has_volatile
= 0;
2252 loop_store_mems_idx
= 0;
2258 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2259 insn
= NEXT_INSN (insn
))
2261 if (GET_CODE (insn
) == NOTE
)
2263 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2266 /* Count number of loops contained in this one. */
2269 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2278 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2281 loop_continue
= insn
;
2284 else if (GET_CODE (insn
) == CALL_INSN
)
2286 if (! CONST_CALL_P (insn
))
2287 unknown_address_altered
= 1;
2292 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2294 if (volatile_refs_p (PATTERN (insn
)))
2295 loop_has_volatile
= 1;
2297 note_stores (PATTERN (insn
), note_addr_stored
);
2303 /* Scan the function looking for loops. Record the start and end of each loop.
2304 Also mark as invalid loops any loops that contain a setjmp or are branched
2305 to from outside the loop. */
2308 find_and_verify_loops (f
)
2312 int current_loop
= -1;
2316 /* If there are jumps to undefined labels,
2317 treat them as jumps out of any/all loops.
2318 This also avoids writing past end of tables when there are no loops. */
2319 uid_loop_num
[0] = -1;
2321 /* Find boundaries of loops, mark which loops are contained within
2322 loops, and invalidate loops that have setjmp. */
2324 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2326 if (GET_CODE (insn
) == NOTE
)
2327 switch (NOTE_LINE_NUMBER (insn
))
2329 case NOTE_INSN_LOOP_BEG
:
2330 loop_number_loop_starts
[++next_loop
] = insn
;
2331 loop_number_loop_ends
[next_loop
] = 0;
2332 loop_outer_loop
[next_loop
] = current_loop
;
2333 loop_invalid
[next_loop
] = 0;
2334 loop_number_exit_labels
[next_loop
] = 0;
2335 loop_number_exit_count
[next_loop
] = 0;
2336 current_loop
= next_loop
;
2339 case NOTE_INSN_SETJMP
:
2340 /* In this case, we must invalidate our current loop and any
2342 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2344 loop_invalid
[loop
] = 1;
2345 if (loop_dump_stream
)
2346 fprintf (loop_dump_stream
,
2347 "\nLoop at %d ignored due to setjmp.\n",
2348 INSN_UID (loop_number_loop_starts
[loop
]));
2352 case NOTE_INSN_LOOP_END
:
2353 if (current_loop
== -1)
2356 loop_number_loop_ends
[current_loop
] = insn
;
2357 current_loop
= loop_outer_loop
[current_loop
];
2362 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2363 enclosing loop, but this doesn't matter. */
2364 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2367 /* Any loop containing a label used in an initializer must be invalidated,
2368 because it can be jumped into from anywhere. */
2370 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2374 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2376 loop_num
= loop_outer_loop
[loop_num
])
2377 loop_invalid
[loop_num
] = 1;
2380 /* Any loop containing a label used for an exception handler must be
2381 invalidated, because it can be jumped into from anywhere. */
2383 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2387 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2389 loop_num
= loop_outer_loop
[loop_num
])
2390 loop_invalid
[loop_num
] = 1;
2393 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2394 loop that it is not contained within, that loop is marked invalid.
2395 If any INSN or CALL_INSN uses a label's address, then the loop containing
2396 that label is marked invalid, because it could be jumped into from
2399 Also look for blocks of code ending in an unconditional branch that
2400 exits the loop. If such a block is surrounded by a conditional
2401 branch around the block, move the block elsewhere (see below) and
2402 invert the jump to point to the code block. This may eliminate a
2403 label in our loop and will simplify processing by both us and a
2404 possible second cse pass. */
2406 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2407 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2409 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2411 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2413 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2418 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2420 loop_num
= loop_outer_loop
[loop_num
])
2421 loop_invalid
[loop_num
] = 1;
2425 if (GET_CODE (insn
) != JUMP_INSN
)
2428 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2430 /* See if this is an unconditional branch outside the loop. */
2431 if (this_loop_num
!= -1
2432 && (GET_CODE (PATTERN (insn
)) == RETURN
2433 || (simplejump_p (insn
)
2434 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2436 && get_max_uid () < max_uid_for_loop
)
2439 rtx our_next
= next_real_insn (insn
);
2441 int outer_loop
= -1;
2443 /* Go backwards until we reach the start of the loop, a label,
2445 for (p
= PREV_INSN (insn
);
2446 GET_CODE (p
) != CODE_LABEL
2447 && ! (GET_CODE (p
) == NOTE
2448 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2449 && GET_CODE (p
) != JUMP_INSN
;
2453 /* Check for the case where we have a jump to an inner nested
2454 loop, and do not perform the optimization in that case. */
2456 if (JUMP_LABEL (insn
))
2458 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2459 if (dest_loop
!= -1)
2461 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2462 outer_loop
= loop_outer_loop
[outer_loop
])
2463 if (outer_loop
== this_loop_num
)
2468 /* Make sure that the target of P is within the current loop. */
2470 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2471 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2472 outer_loop
= this_loop_num
;
2474 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2475 we have a block of code to try to move.
2477 We look backward and then forward from the target of INSN
2478 to find a BARRIER at the same loop depth as the target.
2479 If we find such a BARRIER, we make a new label for the start
2480 of the block, invert the jump in P and point it to that label,
2481 and move the block of code to the spot we found. */
2483 if (outer_loop
== -1
2484 && GET_CODE (p
) == JUMP_INSN
2485 && JUMP_LABEL (p
) != 0
2486 /* Just ignore jumps to labels that were never emitted.
2487 These always indicate compilation errors. */
2488 && INSN_UID (JUMP_LABEL (p
)) != 0
2490 && ! simplejump_p (p
)
2491 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2494 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2495 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2498 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2499 if (GET_CODE (loc
) == BARRIER
2500 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2504 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2505 if (GET_CODE (loc
) == BARRIER
2506 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2511 rtx cond_label
= JUMP_LABEL (p
);
2512 rtx new_label
= get_label_after (p
);
2514 /* Ensure our label doesn't go away. */
2515 LABEL_NUSES (cond_label
)++;
2517 /* Verify that uid_loop_num is large enough and that
2519 if (invert_jump (p
, new_label
))
2523 /* Include the BARRIER after INSN and copy the
2525 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2526 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2528 /* All those insns are now in TARGET_LOOP_NUM. */
2529 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2531 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2533 /* The label jumped to by INSN is no longer a loop exit.
2534 Unless INSN does not have a label (e.g., it is a
2535 RETURN insn), search loop_number_exit_labels to find
2536 its label_ref, and remove it. Also turn off
2537 LABEL_OUTSIDE_LOOP_P bit. */
2538 if (JUMP_LABEL (insn
))
2543 r
= loop_number_exit_labels
[this_loop_num
];
2544 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2545 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2547 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2549 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2551 loop_number_exit_labels
[this_loop_num
]
2552 = LABEL_NEXTREF (r
);
2556 for (loop_num
= this_loop_num
;
2557 loop_num
!= -1 && loop_num
!= target_loop_num
;
2558 loop_num
= loop_outer_loop
[loop_num
])
2559 loop_number_exit_count
[loop_num
]--;
2561 /* If we didn't find it, then something is wrong. */
2566 /* P is now a jump outside the loop, so it must be put
2567 in loop_number_exit_labels, and marked as such.
2568 The easiest way to do this is to just call
2569 mark_loop_jump again for P. */
2570 mark_loop_jump (PATTERN (p
), this_loop_num
);
2572 /* If INSN now jumps to the insn after it,
2574 if (JUMP_LABEL (insn
) != 0
2575 && (next_real_insn (JUMP_LABEL (insn
))
2576 == next_real_insn (insn
)))
2580 /* Continue the loop after where the conditional
2581 branch used to jump, since the only branch insn
2582 in the block (if it still remains) is an inter-loop
2583 branch and hence needs no processing. */
2584 insn
= NEXT_INSN (cond_label
);
2586 if (--LABEL_NUSES (cond_label
) == 0)
2587 delete_insn (cond_label
);
2589 /* This loop will be continued with NEXT_INSN (insn). */
2590 insn
= PREV_INSN (insn
);
2597 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2598 loops it is contained in, mark the target loop invalid.
2600 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2603 mark_loop_jump (x
, loop_num
)
2611 switch (GET_CODE (x
))
2624 /* There could be a label reference in here. */
2625 mark_loop_jump (XEXP (x
, 0), loop_num
);
2631 mark_loop_jump (XEXP (x
, 0), loop_num
);
2632 mark_loop_jump (XEXP (x
, 1), loop_num
);
2637 mark_loop_jump (XEXP (x
, 0), loop_num
);
2641 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2643 /* Link together all labels that branch outside the loop. This
2644 is used by final_[bg]iv_value and the loop unrolling code. Also
2645 mark this LABEL_REF so we know that this branch should predict
2648 /* A check to make sure the label is not in an inner nested loop,
2649 since this does not count as a loop exit. */
2650 if (dest_loop
!= -1)
2652 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2653 outer_loop
= loop_outer_loop
[outer_loop
])
2654 if (outer_loop
== loop_num
)
2660 if (loop_num
!= -1 && outer_loop
== -1)
2662 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2663 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2664 loop_number_exit_labels
[loop_num
] = x
;
2666 for (outer_loop
= loop_num
;
2667 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2668 outer_loop
= loop_outer_loop
[outer_loop
])
2669 loop_number_exit_count
[outer_loop
]++;
2672 /* If this is inside a loop, but not in the current loop or one enclosed
2673 by it, it invalidates at least one loop. */
2675 if (dest_loop
== -1)
2678 /* We must invalidate every nested loop containing the target of this
2679 label, except those that also contain the jump insn. */
2681 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2683 /* Stop when we reach a loop that also contains the jump insn. */
2684 for (outer_loop
= loop_num
; outer_loop
!= -1;
2685 outer_loop
= loop_outer_loop
[outer_loop
])
2686 if (dest_loop
== outer_loop
)
2689 /* If we get here, we know we need to invalidate a loop. */
2690 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2691 fprintf (loop_dump_stream
,
2692 "\nLoop at %d ignored due to multiple entry points.\n",
2693 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2695 loop_invalid
[dest_loop
] = 1;
2700 /* If this is not setting pc, ignore. */
2701 if (SET_DEST (x
) == pc_rtx
)
2702 mark_loop_jump (SET_SRC (x
), loop_num
);
2706 mark_loop_jump (XEXP (x
, 1), loop_num
);
2707 mark_loop_jump (XEXP (x
, 2), loop_num
);
2712 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2713 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2717 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2718 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2722 /* Treat anything else (such as a symbol_ref)
2723 as a branch out of this loop, but not into any loop. */
2728 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2729 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2732 loop_number_exit_labels
[loop_num
] = x
;
2734 for (outer_loop
= loop_num
; outer_loop
!= -1;
2735 outer_loop
= loop_outer_loop
[outer_loop
])
2736 loop_number_exit_count
[outer_loop
]++;
2742 /* Return nonzero if there is a label in the range from
2743 insn INSN to and including the insn whose luid is END
2744 INSN must have an assigned luid (i.e., it must not have
2745 been previously created by loop.c). */
2748 labels_in_range_p (insn
, end
)
2752 while (insn
&& INSN_LUID (insn
) <= end
)
2754 if (GET_CODE (insn
) == CODE_LABEL
)
2756 insn
= NEXT_INSN (insn
);
2762 /* Record that a memory reference X is being set. */
2765 note_addr_stored (x
)
2770 if (x
== 0 || GET_CODE (x
) != MEM
)
2773 /* Count number of memory writes.
2774 This affects heuristics in strength_reduce. */
2777 /* BLKmode MEM means all memory is clobbered. */
2778 if (GET_MODE (x
) == BLKmode
)
2779 unknown_address_altered
= 1;
2781 if (unknown_address_altered
)
2784 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2785 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2786 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2788 /* We are storing at the same address as previously noted. Save the
2790 if (GET_MODE_SIZE (GET_MODE (x
))
2791 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2792 loop_store_mems
[i
] = x
;
2796 if (i
== NUM_STORES
)
2797 unknown_address_altered
= 1;
2799 else if (i
== loop_store_mems_idx
)
2800 loop_store_mems
[loop_store_mems_idx
++] = x
;
2803 /* Return nonzero if the rtx X is invariant over the current loop.
2805 The value is 2 if we refer to something only conditionally invariant.
2807 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2808 Otherwise, a memory ref is invariant if it does not conflict with
2809 anything stored in `loop_store_mems'. */
2816 register enum rtx_code code
;
2818 int conditional
= 0;
2822 code
= GET_CODE (x
);
2832 /* A LABEL_REF is normally invariant, however, if we are unrolling
2833 loops, and this label is inside the loop, then it isn't invariant.
2834 This is because each unrolled copy of the loop body will have
2835 a copy of this label. If this was invariant, then an insn loading
2836 the address of this label into a register might get moved outside
2837 the loop, and then each loop body would end up using the same label.
2839 We don't know the loop bounds here though, so just fail for all
2841 if (flag_unroll_loops
)
2848 case UNSPEC_VOLATILE
:
2852 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2853 since the reg might be set by initialization within the loop. */
2855 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2856 || x
== arg_pointer_rtx
)
2857 && ! current_function_has_nonlocal_goto
)
2861 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2864 if (n_times_set
[REGNO (x
)] < 0)
2867 return n_times_set
[REGNO (x
)] == 0;
2870 /* Volatile memory references must be rejected. Do this before
2871 checking for read-only items, so that volatile read-only items
2872 will be rejected also. */
2873 if (MEM_VOLATILE_P (x
))
2876 /* Read-only items (such as constants in a constant pool) are
2877 invariant if their address is. */
2878 if (RTX_UNCHANGING_P (x
))
2881 /* If we filled the table (or had a subroutine call), any location
2882 in memory could have been clobbered. */
2883 if (unknown_address_altered
)
2886 /* See if there is any dependence between a store and this load. */
2887 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2888 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2891 /* It's not invalidated by a store in memory
2892 but we must still verify the address is invariant. */
2896 /* Don't mess with insns declared volatile. */
2897 if (MEM_VOLATILE_P (x
))
2901 fmt
= GET_RTX_FORMAT (code
);
2902 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2906 int tem
= invariant_p (XEXP (x
, i
));
2912 else if (fmt
[i
] == 'E')
2915 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2917 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2927 return 1 + conditional
;
2931 /* Return nonzero if all the insns in the loop that set REG
2932 are INSN and the immediately following insns,
2933 and if each of those insns sets REG in an invariant way
2934 (not counting uses of REG in them).
2936 The value is 2 if some of these insns are only conditionally invariant.
2938 We assume that INSN itself is the first set of REG
2939 and that its source is invariant. */
2942 consec_sets_invariant_p (reg
, n_sets
, insn
)
2946 register rtx p
= insn
;
2947 register int regno
= REGNO (reg
);
2949 /* Number of sets we have to insist on finding after INSN. */
2950 int count
= n_sets
- 1;
2951 int old
= n_times_set
[regno
];
2955 /* If N_SETS hit the limit, we can't rely on its value. */
2959 n_times_set
[regno
] = 0;
2963 register enum rtx_code code
;
2967 code
= GET_CODE (p
);
2969 /* If library call, skip to end of of it. */
2970 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2975 && (set
= single_set (p
))
2976 && GET_CODE (SET_DEST (set
)) == REG
2977 && REGNO (SET_DEST (set
)) == regno
)
2979 this = invariant_p (SET_SRC (set
));
2982 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2984 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2985 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2987 this = (CONSTANT_P (XEXP (temp
, 0))
2988 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
2989 && invariant_p (XEXP (temp
, 0))));
2996 else if (code
!= NOTE
)
2998 n_times_set
[regno
] = old
;
3003 n_times_set
[regno
] = old
;
3004 /* If invariant_p ever returned 2, we return 2. */
3005 return 1 + (value
& 2);
3009 /* I don't think this condition is sufficient to allow INSN
3010 to be moved, so we no longer test it. */
3012 /* Return 1 if all insns in the basic block of INSN and following INSN
3013 that set REG are invariant according to TABLE. */
3016 all_sets_invariant_p (reg
, insn
, table
)
3020 register rtx p
= insn
;
3021 register int regno
= REGNO (reg
);
3025 register enum rtx_code code
;
3027 code
= GET_CODE (p
);
3028 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3030 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3031 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3032 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3034 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3041 /* Look at all uses (not sets) of registers in X. For each, if it is
3042 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3043 a different insn, set USAGE[REGNO] to const0_rtx. */
3046 find_single_use_in_loop (insn
, x
, usage
)
3051 enum rtx_code code
= GET_CODE (x
);
3052 char *fmt
= GET_RTX_FORMAT (code
);
3057 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3058 ? const0_rtx
: insn
;
3060 else if (code
== SET
)
3062 /* Don't count SET_DEST if it is a REG; otherwise count things
3063 in SET_DEST because if a register is partially modified, it won't
3064 show up as a potential movable so we don't care how USAGE is set
3066 if (GET_CODE (SET_DEST (x
)) != REG
)
3067 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3068 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3071 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3073 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3074 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3075 else if (fmt
[i
] == 'E')
3076 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3077 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3081 /* Increment N_TIMES_SET at the index of each register
3082 that is modified by an insn between FROM and TO.
3083 If the value of an element of N_TIMES_SET becomes 127 or more,
3084 stop incrementing it, to avoid overflow.
3086 Store in SINGLE_USAGE[I] the single insn in which register I is
3087 used, if it is only used once. Otherwise, it is set to 0 (for no
3088 uses) or const0_rtx for more than one use. This parameter may be zero,
3089 in which case this processing is not done.
3091 Store in *COUNT_PTR the number of actual instruction
3092 in the loop. We use this to decide what is worth moving out. */
3094 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3095 In that case, it is the insn that last set reg n. */
3098 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3099 register rtx from
, to
;
3105 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3107 register int count
= 0;
3110 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3111 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3113 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3117 /* If requested, record registers that have exactly one use. */
3120 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3122 /* Include uses in REG_EQUAL notes. */
3123 if (REG_NOTES (insn
))
3124 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3127 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3128 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3129 /* Don't move a reg that has an explicit clobber.
3130 We might do so sometimes, but it's not worth the pain. */
3131 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3133 if (GET_CODE (PATTERN (insn
)) == SET
3134 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3136 dest
= SET_DEST (PATTERN (insn
));
3137 while (GET_CODE (dest
) == SUBREG
3138 || GET_CODE (dest
) == ZERO_EXTRACT
3139 || GET_CODE (dest
) == SIGN_EXTRACT
3140 || GET_CODE (dest
) == STRICT_LOW_PART
)
3141 dest
= XEXP (dest
, 0);
3142 if (GET_CODE (dest
) == REG
)
3144 register int regno
= REGNO (dest
);
3145 /* If this is the first setting of this reg
3146 in current basic block, and it was set before,
3147 it must be set in two basic blocks, so it cannot
3148 be moved out of the loop. */
3149 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3150 may_not_move
[regno
] = 1;
3151 /* If this is not first setting in current basic block,
3152 see if reg was used in between previous one and this.
3153 If so, neither one can be moved. */
3154 if (last_set
[regno
] != 0
3155 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3156 may_not_move
[regno
] = 1;
3157 if (n_times_set
[regno
] < 127)
3158 ++n_times_set
[regno
];
3159 last_set
[regno
] = insn
;
3162 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3165 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3167 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3168 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3169 /* Don't move a reg that has an explicit clobber.
3170 It's not worth the pain to try to do it correctly. */
3171 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3173 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3175 dest
= SET_DEST (x
);
3176 while (GET_CODE (dest
) == SUBREG
3177 || GET_CODE (dest
) == ZERO_EXTRACT
3178 || GET_CODE (dest
) == SIGN_EXTRACT
3179 || GET_CODE (dest
) == STRICT_LOW_PART
)
3180 dest
= XEXP (dest
, 0);
3181 if (GET_CODE (dest
) == REG
)
3183 register int regno
= REGNO (dest
);
3184 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3185 may_not_move
[regno
] = 1;
3186 if (last_set
[regno
] != 0
3187 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3188 may_not_move
[regno
] = 1;
3189 if (n_times_set
[regno
] < 127)
3190 ++n_times_set
[regno
];
3191 last_set
[regno
] = insn
;
3198 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3199 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3204 /* Given a loop that is bounded by LOOP_START and LOOP_END
3205 and that is entered at SCAN_START,
3206 return 1 if the register set in SET contained in insn INSN is used by
3207 any insn that precedes INSN in cyclic order starting
3208 from the loop entry point.
3210 We don't want to use INSN_LUID here because if we restrict INSN to those
3211 that have a valid INSN_LUID, it means we cannot move an invariant out
3212 from an inner loop past two loops. */
3215 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3216 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3218 rtx reg
= SET_DEST (set
);
3221 /* Scan forward checking for register usage. If we hit INSN, we
3222 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3223 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3225 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3226 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3236 /* A "basic induction variable" or biv is a pseudo reg that is set
3237 (within this loop) only by incrementing or decrementing it. */
3238 /* A "general induction variable" or giv is a pseudo reg whose
3239 value is a linear function of a biv. */
3241 /* Bivs are recognized by `basic_induction_var';
3242 Givs by `general_induct_var'. */
3244 /* Indexed by register number, indicates whether or not register is an
3245 induction variable, and if so what type. */
3247 enum iv_mode
*reg_iv_type
;
3249 /* Indexed by register number, contains pointer to `struct induction'
3250 if register is an induction variable. This holds general info for
3251 all induction variables. */
3253 struct induction
**reg_iv_info
;
3255 /* Indexed by register number, contains pointer to `struct iv_class'
3256 if register is a basic induction variable. This holds info describing
3257 the class (a related group) of induction variables that the biv belongs
3260 struct iv_class
**reg_biv_class
;
3262 /* The head of a list which links together (via the next field)
3263 every iv class for the current loop. */
3265 struct iv_class
*loop_iv_list
;
3267 /* Communication with routines called via `note_stores'. */
3269 static rtx note_insn
;
3271 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3273 static rtx addr_placeholder
;
3275 /* ??? Unfinished optimizations, and possible future optimizations,
3276 for the strength reduction code. */
3278 /* ??? There is one more optimization you might be interested in doing: to
3279 allocate pseudo registers for frequently-accessed memory locations.
3280 If the same memory location is referenced each time around, it might
3281 be possible to copy it into a register before and out after.
3282 This is especially useful when the memory location is a variable which
3283 is in a stack slot because somewhere its address is taken. If the
3284 loop doesn't contain a function call and the variable isn't volatile,
3285 it is safe to keep the value in a register for the duration of the
3286 loop. One tricky thing is that the copying of the value back from the
3287 register has to be done on all exits from the loop. You need to check that
3288 all the exits from the loop go to the same place. */
3290 /* ??? The interaction of biv elimination, and recognition of 'constant'
3291 bivs, may cause problems. */
3293 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3294 performance problems.
3296 Perhaps don't eliminate things that can be combined with an addressing
3297 mode. Find all givs that have the same biv, mult_val, and add_val;
3298 then for each giv, check to see if its only use dies in a following
3299 memory address. If so, generate a new memory address and check to see
3300 if it is valid. If it is valid, then store the modified memory address,
3301 otherwise, mark the giv as not done so that it will get its own iv. */
3303 /* ??? Could try to optimize branches when it is known that a biv is always
3306 /* ??? When replace a biv in a compare insn, we should replace with closest
3307 giv so that an optimized branch can still be recognized by the combiner,
3308 e.g. the VAX acb insn. */
3310 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3311 was rerun in loop_optimize whenever a register was added or moved.
3312 Also, some of the optimizations could be a little less conservative. */
3314 /* Perform strength reduction and induction variable elimination. */
3316 /* Pseudo registers created during this function will be beyond the last
3317 valid index in several tables including n_times_set and regno_last_uid.
3318 This does not cause a problem here, because the added registers cannot be
3319 givs outside of their loop, and hence will never be reconsidered.
3320 But scan_loop must check regnos to make sure they are in bounds. */
3323 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3324 loop_start
, loop_end
)
3337 /* This is 1 if current insn is not executed at least once for every loop
3339 int not_every_iteration
= 0;
3340 /* This is 1 if current insn may be executed more than once for every
3342 int maybe_multiple
= 0;
3343 /* Temporary list pointers for traversing loop_iv_list. */
3344 struct iv_class
*bl
, **backbl
;
3345 /* Ratio of extra register life span we can justify
3346 for saving an instruction. More if loop doesn't call subroutines
3347 since in that case saving an insn makes more difference
3348 and more registers are available. */
3349 /* ??? could set this to last value of threshold in move_movables */
3350 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3351 /* Map of pseudo-register replacements. */
3355 rtx end_insert_before
;
3358 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3359 * sizeof (enum iv_mode
*));
3360 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3361 reg_iv_info
= (struct induction
**)
3362 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3363 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3364 * sizeof (struct induction
*)));
3365 reg_biv_class
= (struct iv_class
**)
3366 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3367 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3368 * sizeof (struct iv_class
*)));
3371 addr_placeholder
= gen_reg_rtx (Pmode
);
3373 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3374 must be put before this insn, so that they will appear in the right
3375 order (i.e. loop order).
3377 If loop_end is the end of the current function, then emit a
3378 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3380 if (NEXT_INSN (loop_end
) != 0)
3381 end_insert_before
= NEXT_INSN (loop_end
);
3383 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3385 /* Scan through loop to find all possible bivs. */
3391 /* At end of a straight-in loop, we are done.
3392 At end of a loop entered at the bottom, scan the top. */
3393 if (p
== scan_start
)
3401 if (p
== scan_start
)
3405 if (GET_CODE (p
) == INSN
3406 && (set
= single_set (p
))
3407 && GET_CODE (SET_DEST (set
)) == REG
)
3409 dest_reg
= SET_DEST (set
);
3410 if (REGNO (dest_reg
) < max_reg_before_loop
3411 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3412 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3414 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3415 dest_reg
, p
, &inc_val
, &mult_val
))
3417 /* It is a possible basic induction variable.
3418 Create and initialize an induction structure for it. */
3421 = (struct induction
*) alloca (sizeof (struct induction
));
3423 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3424 not_every_iteration
, maybe_multiple
);
3425 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3427 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3428 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3432 /* Past CODE_LABEL, we get to insns that may be executed multiple
3433 times. The only way we can be sure that they can't is if every
3434 every jump insn between here and the end of the loop either
3435 returns, exits the loop, is a forward jump, or is a jump
3436 to the loop start. */
3438 if (GET_CODE (p
) == CODE_LABEL
)
3446 insn
= NEXT_INSN (insn
);
3447 if (insn
== scan_start
)
3455 if (insn
== scan_start
)
3459 if (GET_CODE (insn
) == JUMP_INSN
3460 && GET_CODE (PATTERN (insn
)) != RETURN
3461 && (! condjump_p (insn
)
3462 || (JUMP_LABEL (insn
) != 0
3463 && JUMP_LABEL (insn
) != scan_start
3464 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3465 || INSN_UID (insn
) >= max_uid_for_loop
3466 || (INSN_LUID (JUMP_LABEL (insn
))
3467 < INSN_LUID (insn
))))))
3475 /* Past a jump, we get to insns for which we can't count
3476 on whether they will be executed during each iteration. */
3477 /* This code appears twice in strength_reduce. There is also similar
3478 code in scan_loop. */
3479 if (GET_CODE (p
) == JUMP_INSN
3480 /* If we enter the loop in the middle, and scan around to the
3481 beginning, don't set not_every_iteration for that.
3482 This can be any kind of jump, since we want to know if insns
3483 will be executed if the loop is executed. */
3484 && ! (JUMP_LABEL (p
) == loop_top
3485 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3486 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3490 /* If this is a jump outside the loop, then it also doesn't
3491 matter. Check to see if the target of this branch is on the
3492 loop_number_exits_labels list. */
3494 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3496 label
= LABEL_NEXTREF (label
))
3497 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3501 not_every_iteration
= 1;
3504 else if (GET_CODE (p
) == NOTE
)
3506 /* At the virtual top of a converted loop, insns are again known to
3507 be executed each iteration: logically, the loop begins here
3508 even though the exit code has been duplicated. */
3509 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3510 not_every_iteration
= 0;
3511 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3513 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3517 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3518 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3519 or not an insn is known to be executed each iteration of the
3520 loop, whether or not any iterations are known to occur.
3522 Therefore, if we have just passed a label and have no more labels
3523 between here and the test insn of the loop, we know these insns
3524 will be executed each iteration. */
3526 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3527 && no_labels_between_p (p
, loop_end
))
3528 not_every_iteration
= 0;
3531 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3532 Make a sanity check against n_times_set. */
3533 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3535 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3536 /* Above happens if register modified by subreg, etc. */
3537 /* Make sure it is not recognized as a basic induction var: */
3538 || n_times_set
[bl
->regno
] != bl
->biv_count
3539 /* If never incremented, it is invariant that we decided not to
3540 move. So leave it alone. */
3541 || ! bl
->incremented
)
3543 if (loop_dump_stream
)
3544 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3546 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3547 ? "not induction variable"
3548 : (! bl
->incremented
? "never incremented"
3551 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3558 if (loop_dump_stream
)
3559 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3563 /* Exit if there are no bivs. */
3566 /* Can still unroll the loop anyways, but indicate that there is no
3567 strength reduction info available. */
3568 if (flag_unroll_loops
)
3569 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3574 /* Find initial value for each biv by searching backwards from loop_start,
3575 halting at first label. Also record any test condition. */
3578 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3582 if (GET_CODE (p
) == CALL_INSN
)
3585 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3586 || GET_CODE (p
) == CALL_INSN
)
3587 note_stores (PATTERN (p
), record_initial
);
3589 /* Record any test of a biv that branches around the loop if no store
3590 between it and the start of loop. We only care about tests with
3591 constants and registers and only certain of those. */
3592 if (GET_CODE (p
) == JUMP_INSN
3593 && JUMP_LABEL (p
) != 0
3594 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3595 && (test
= get_condition_for_loop (p
)) != 0
3596 && GET_CODE (XEXP (test
, 0)) == REG
3597 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3598 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3599 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3600 && bl
->init_insn
== 0)
3602 /* If an NE test, we have an initial value! */
3603 if (GET_CODE (test
) == NE
)
3606 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3607 XEXP (test
, 0), XEXP (test
, 1));
3610 bl
->initial_test
= test
;
3614 /* Look at the each biv and see if we can say anything better about its
3615 initial value from any initializing insns set up above. (This is done
3616 in two passes to avoid missing SETs in a PARALLEL.) */
3617 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3621 if (! bl
->init_insn
)
3624 src
= SET_SRC (bl
->init_set
);
3626 if (loop_dump_stream
)
3627 fprintf (loop_dump_stream
,
3628 "Biv %d initialized at insn %d: initial value ",
3629 bl
->regno
, INSN_UID (bl
->init_insn
));
3631 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3632 || GET_MODE (src
) == VOIDmode
)
3633 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3635 bl
->initial_value
= src
;
3637 if (loop_dump_stream
)
3639 if (GET_CODE (src
) == CONST_INT
)
3640 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3643 print_rtl (loop_dump_stream
, src
);
3644 fprintf (loop_dump_stream
, "\n");
3650 /* Biv initial value is not simple move,
3651 so let it keep initial value of "itself". */
3653 if (loop_dump_stream
)
3654 fprintf (loop_dump_stream
, "is complex\n");
3658 /* Search the loop for general induction variables. */
3660 /* A register is a giv if: it is only set once, it is a function of a
3661 biv and a constant (or invariant), and it is not a biv. */
3663 not_every_iteration
= 0;
3669 /* At end of a straight-in loop, we are done.
3670 At end of a loop entered at the bottom, scan the top. */
3671 if (p
== scan_start
)
3679 if (p
== scan_start
)
3683 /* Look for a general induction variable in a register. */
3684 if (GET_CODE (p
) == INSN
3685 && (set
= single_set (p
))
3686 && GET_CODE (SET_DEST (set
)) == REG
3687 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3695 dest_reg
= SET_DEST (set
);
3696 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3699 if (/* SET_SRC is a giv. */
3700 ((benefit
= general_induction_var (SET_SRC (set
),
3703 /* Equivalent expression is a giv. */
3704 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3705 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3707 &add_val
, &mult_val
))))
3708 /* Don't try to handle any regs made by loop optimization.
3709 We have nothing on them in regno_first_uid, etc. */
3710 && REGNO (dest_reg
) < max_reg_before_loop
3711 /* Don't recognize a BASIC_INDUCT_VAR here. */
3712 && dest_reg
!= src_reg
3713 /* This must be the only place where the register is set. */
3714 && (n_times_set
[REGNO (dest_reg
)] == 1
3715 /* or all sets must be consecutive and make a giv. */
3716 || (benefit
= consec_sets_giv (benefit
, p
,
3718 &add_val
, &mult_val
))))
3722 = (struct induction
*) alloca (sizeof (struct induction
));
3725 /* If this is a library call, increase benefit. */
3726 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3727 benefit
+= libcall_benefit (p
);
3729 /* Skip the consecutive insns, if there are any. */
3730 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3733 /* If first insn of libcall sequence, skip to end.
3734 Do this at start of loop, since INSN is guaranteed to
3736 if (GET_CODE (p
) != NOTE
3737 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3740 do p
= NEXT_INSN (p
);
3741 while (GET_CODE (p
) == NOTE
);
3744 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3745 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3751 #ifndef DONT_REDUCE_ADDR
3752 /* Look for givs which are memory addresses. */
3753 /* This resulted in worse code on a VAX 8600. I wonder if it
3755 if (GET_CODE (p
) == INSN
)
3756 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3760 /* Update the status of whether giv can derive other givs. This can
3761 change when we pass a label or an insn that updates a biv. */
3762 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3763 || GET_CODE (p
) == CODE_LABEL
)
3764 update_giv_derive (p
);
3766 /* Past a jump, we get to insns for which we can't count
3767 on whether they will be executed during each iteration. */
3768 /* This code appears twice in strength_reduce. There is also similar
3769 code in scan_loop. */
3770 if (GET_CODE (p
) == JUMP_INSN
3771 /* If we enter the loop in the middle, and scan around to the
3772 beginning, don't set not_every_iteration for that.
3773 This can be any kind of jump, since we want to know if insns
3774 will be executed if the loop is executed. */
3775 && ! (JUMP_LABEL (p
) == loop_top
3776 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3777 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3781 /* If this is a jump outside the loop, then it also doesn't
3782 matter. Check to see if the target of this branch is on the
3783 loop_number_exits_labels list. */
3785 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3787 label
= LABEL_NEXTREF (label
))
3788 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3792 not_every_iteration
= 1;
3795 else if (GET_CODE (p
) == NOTE
)
3797 /* At the virtual top of a converted loop, insns are again known to
3798 be executed each iteration: logically, the loop begins here
3799 even though the exit code has been duplicated. */
3800 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3801 not_every_iteration
= 0;
3802 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3804 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3808 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3809 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3810 or not an insn is known to be executed each iteration of the
3811 loop, whether or not any iterations are known to occur.
3813 Therefore, if we have just passed a label and have no more labels
3814 between here and the test insn of the loop, we know these insns
3815 will be executed each iteration. */
3817 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3818 && no_labels_between_p (p
, loop_end
))
3819 not_every_iteration
= 0;
3822 /* Try to calculate and save the number of loop iterations. This is
3823 set to zero if the actual number can not be calculated. This must
3824 be called after all giv's have been identified, since otherwise it may
3825 fail if the iteration variable is a giv. */
3827 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3829 /* Now for each giv for which we still don't know whether or not it is
3830 replaceable, check to see if it is replaceable because its final value
3831 can be calculated. This must be done after loop_iterations is called,
3832 so that final_giv_value will work correctly. */
3834 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3836 struct induction
*v
;
3838 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3839 if (! v
->replaceable
&& ! v
->not_replaceable
)
3840 check_final_value (v
, loop_start
, loop_end
);
3843 /* Try to prove that the loop counter variable (if any) is always
3844 nonnegative; if so, record that fact with a REG_NONNEG note
3845 so that "decrement and branch until zero" insn can be used. */
3846 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3849 /* record loop-variables relevant for BCT optimization before unrolling
3850 the loop. Unrolling may update part of this information, and the
3851 correct data will be used for generating the BCT. */
3852 #ifdef HAVE_decrement_and_branch_on_count
3853 if (HAVE_decrement_and_branch_on_count
)
3854 analyze_loop_iterations (loop_start
, loop_end
);
3858 /* Create reg_map to hold substitutions for replaceable giv regs. */
3859 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3860 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3862 /* Examine each iv class for feasibility of strength reduction/induction
3863 variable elimination. */
3865 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3867 struct induction
*v
;
3870 rtx final_value
= 0;
3872 /* Test whether it will be possible to eliminate this biv
3873 provided all givs are reduced. This is possible if either
3874 the reg is not used outside the loop, or we can compute
3875 what its final value will be.
3877 For architectures with a decrement_and_branch_until_zero insn,
3878 don't do this if we put a REG_NONNEG note on the endtest for
3881 /* Compare against bl->init_insn rather than loop_start.
3882 We aren't concerned with any uses of the biv between
3883 init_insn and loop_start since these won't be affected
3884 by the value of the biv elsewhere in the function, so
3885 long as init_insn doesn't use the biv itself.
3886 March 14, 1989 -- self@bayes.arc.nasa.gov */
3888 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3890 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3891 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3892 #ifdef HAVE_decrement_and_branch_until_zero
3895 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3896 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3897 #ifdef HAVE_decrement_and_branch_until_zero
3901 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3902 threshold
, insn_count
);
3905 if (loop_dump_stream
)
3907 fprintf (loop_dump_stream
,
3908 "Cannot eliminate biv %d.\n",
3910 fprintf (loop_dump_stream
,
3911 "First use: insn %d, last use: insn %d.\n",
3912 REGNO_FIRST_UID (bl
->regno
),
3913 REGNO_LAST_UID (bl
->regno
));
3917 /* Combine all giv's for this iv_class. */
3920 /* This will be true at the end, if all givs which depend on this
3921 biv have been strength reduced.
3922 We can't (currently) eliminate the biv unless this is so. */
3925 /* Check each giv in this class to see if we will benefit by reducing
3926 it. Skip giv's combined with others. */
3927 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3929 struct induction
*tv
;
3931 if (v
->ignore
|| v
->same
)
3934 benefit
= v
->benefit
;
3936 /* Reduce benefit if not replaceable, since we will insert
3937 a move-insn to replace the insn that calculates this giv.
3938 Don't do this unless the giv is a user variable, since it
3939 will often be marked non-replaceable because of the duplication
3940 of the exit code outside the loop. In such a case, the copies
3941 we insert are dead and will be deleted. So they don't have
3942 a cost. Similar situations exist. */
3943 /* ??? The new final_[bg]iv_value code does a much better job
3944 of finding replaceable giv's, and hence this code may no longer
3946 if (! v
->replaceable
&& ! bl
->eliminable
3947 && REG_USERVAR_P (v
->dest_reg
))
3948 benefit
-= copy_cost
;
3950 /* Decrease the benefit to count the add-insns that we will
3951 insert to increment the reduced reg for the giv. */
3952 benefit
-= add_cost
* bl
->biv_count
;
3954 /* Decide whether to strength-reduce this giv or to leave the code
3955 unchanged (recompute it from the biv each time it is used).
3956 This decision can be made independently for each giv. */
3959 /* Attempt to guess whether autoincrement will handle some of the
3960 new add insns; if so, increase BENEFIT (undo the subtraction of
3961 add_cost that was done above). */
3962 if (v
->giv_type
== DEST_ADDR
3963 && GET_CODE (v
->mult_val
) == CONST_INT
)
3965 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3966 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3967 benefit
+= add_cost
* bl
->biv_count
;
3969 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3970 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3971 benefit
+= add_cost
* bl
->biv_count
;
3976 /* If an insn is not to be strength reduced, then set its ignore
3977 flag, and clear all_reduced. */
3979 /* A giv that depends on a reversed biv must be reduced if it is
3980 used after the loop exit, otherwise, it would have the wrong
3981 value after the loop exit. To make it simple, just reduce all
3982 of such giv's whether or not we know they are used after the loop
3985 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
3988 if (loop_dump_stream
)
3989 fprintf (loop_dump_stream
,
3990 "giv of insn %d not worth while, %d vs %d.\n",
3992 v
->lifetime
* threshold
* benefit
, insn_count
);
3998 /* Check that we can increment the reduced giv without a
3999 multiply insn. If not, reject it. */
4001 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4002 if (tv
->mult_val
== const1_rtx
4003 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4005 if (loop_dump_stream
)
4006 fprintf (loop_dump_stream
,
4007 "giv of insn %d: would need a multiply.\n",
4008 INSN_UID (v
->insn
));
4016 /* Reduce each giv that we decided to reduce. */
4018 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4020 struct induction
*tv
;
4021 if (! v
->ignore
&& v
->same
== 0)
4023 int auto_inc_opt
= 0;
4025 v
->new_reg
= gen_reg_rtx (v
->mode
);
4028 /* If the target has auto-increment addressing modes, and
4029 this is an address giv, then try to put the increment
4030 immediately after its use, so that flow can create an
4031 auto-increment addressing mode. */
4032 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4033 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4034 /* We don't handle reversed biv's because bl->biv->insn
4035 does not have a valid INSN_LUID. */
4037 && v
->always_executed
&& ! v
->maybe_multiple
)
4039 /* If other giv's have been combined with this one, then
4040 this will work only if all uses of the other giv's occur
4041 before this giv's insn. This is difficult to check.
4043 We simplify this by looking for the common case where
4044 there is one DEST_REG giv, and this giv's insn is the
4045 last use of the dest_reg of that DEST_REG giv. If the
4046 the increment occurs after the address giv, then we can
4047 perform the optimization. (Otherwise, the increment
4048 would have to go before other_giv, and we would not be
4049 able to combine it with the address giv to get an
4050 auto-inc address.) */
4051 if (v
->combined_with
)
4053 struct induction
*other_giv
= 0;
4055 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4063 if (! tv
&& other_giv
4064 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4065 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4066 == INSN_UID (v
->insn
))
4067 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4070 /* Check for case where increment is before the the address
4072 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
4081 /* We can't put an insn immediately after one setting
4082 cc0, or immediately before one using cc0. */
4083 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4084 || (auto_inc_opt
== -1
4085 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4086 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4087 && sets_cc0_p (PATTERN (prev
))))
4093 v
->auto_inc_opt
= 1;
4097 /* For each place where the biv is incremented, add an insn
4098 to increment the new, reduced reg for the giv. */
4099 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4104 insert_before
= tv
->insn
;
4105 else if (auto_inc_opt
== 1)
4106 insert_before
= NEXT_INSN (v
->insn
);
4108 insert_before
= v
->insn
;
4110 if (tv
->mult_val
== const1_rtx
)
4111 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4112 v
->new_reg
, v
->new_reg
, insert_before
);
4113 else /* tv->mult_val == const0_rtx */
4114 /* A multiply is acceptable here
4115 since this is presumed to be seldom executed. */
4116 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4117 v
->add_val
, v
->new_reg
, insert_before
);
4120 /* Add code at loop start to initialize giv's reduced reg. */
4122 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4123 v
->add_val
, v
->new_reg
, loop_start
);
4127 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4130 For each giv register that can be reduced now: if replaceable,
4131 substitute reduced reg wherever the old giv occurs;
4132 else add new move insn "giv_reg = reduced_reg".
4134 Also check for givs whose first use is their definition and whose
4135 last use is the definition of another giv. If so, it is likely
4136 dead and should not be used to eliminate a biv. */
4137 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4139 if (v
->same
&& v
->same
->ignore
)
4145 if (v
->giv_type
== DEST_REG
4146 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4148 struct induction
*v1
;
4150 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4151 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4155 /* Update expression if this was combined, in case other giv was
4158 v
->new_reg
= replace_rtx (v
->new_reg
,
4159 v
->same
->dest_reg
, v
->same
->new_reg
);
4161 if (v
->giv_type
== DEST_ADDR
)
4162 /* Store reduced reg as the address in the memref where we found
4164 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4165 else if (v
->replaceable
)
4167 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4170 /* I can no longer duplicate the original problem. Perhaps
4171 this is unnecessary now? */
4173 /* Replaceable; it isn't strictly necessary to delete the old
4174 insn and emit a new one, because v->dest_reg is now dead.
4176 However, especially when unrolling loops, the special
4177 handling for (set REG0 REG1) in the second cse pass may
4178 make v->dest_reg live again. To avoid this problem, emit
4179 an insn to set the original giv reg from the reduced giv.
4180 We can not delete the original insn, since it may be part
4181 of a LIBCALL, and the code in flow that eliminates dead
4182 libcalls will fail if it is deleted. */
4183 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4189 /* Not replaceable; emit an insn to set the original giv reg from
4190 the reduced giv, same as above. */
4191 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4195 /* When a loop is reversed, givs which depend on the reversed
4196 biv, and which are live outside the loop, must be set to their
4197 correct final value. This insn is only needed if the giv is
4198 not replaceable. The correct final value is the same as the
4199 value that the giv starts the reversed loop with. */
4200 if (bl
->reversed
&& ! v
->replaceable
)
4201 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4202 v
->add_val
, v
->dest_reg
, end_insert_before
);
4203 else if (v
->final_value
)
4207 /* If the loop has multiple exits, emit the insn before the
4208 loop to ensure that it will always be executed no matter
4209 how the loop exits. Otherwise, emit the insn after the loop,
4210 since this is slightly more efficient. */
4211 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4212 insert_before
= loop_start
;
4214 insert_before
= end_insert_before
;
4215 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4219 /* If the insn to set the final value of the giv was emitted
4220 before the loop, then we must delete the insn inside the loop
4221 that sets it. If this is a LIBCALL, then we must delete
4222 every insn in the libcall. Note, however, that
4223 final_giv_value will only succeed when there are multiple
4224 exits if the giv is dead at each exit, hence it does not
4225 matter that the original insn remains because it is dead
4227 /* Delete the insn inside the loop that sets the giv since
4228 the giv is now set before (or after) the loop. */
4229 delete_insn (v
->insn
);
4233 if (loop_dump_stream
)
4235 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4236 INSN_UID (v
->insn
));
4237 print_rtl (loop_dump_stream
, v
->new_reg
);
4238 fprintf (loop_dump_stream
, "\n");
4242 /* All the givs based on the biv bl have been reduced if they
4245 /* For each giv not marked as maybe dead that has been combined with a
4246 second giv, clear any "maybe dead" mark on that second giv.
4247 v->new_reg will either be or refer to the register of the giv it
4250 Doing this clearing avoids problems in biv elimination where a
4251 giv's new_reg is a complex value that can't be put in the insn but
4252 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4253 Since the register will be used in either case, we'd prefer it be
4254 used from the simpler giv. */
4256 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4257 if (! v
->maybe_dead
&& v
->same
)
4258 v
->same
->maybe_dead
= 0;
4260 /* Try to eliminate the biv, if it is a candidate.
4261 This won't work if ! all_reduced,
4262 since the givs we planned to use might not have been reduced.
4264 We have to be careful that we didn't initially think we could eliminate
4265 this biv because of a giv that we now think may be dead and shouldn't
4266 be used as a biv replacement.
4268 Also, there is the possibility that we may have a giv that looks
4269 like it can be used to eliminate a biv, but the resulting insn
4270 isn't valid. This can happen, for example, on the 88k, where a
4271 JUMP_INSN can compare a register only with zero. Attempts to
4272 replace it with a compare with a constant will fail.
4274 Note that in cases where this call fails, we may have replaced some
4275 of the occurrences of the biv with a giv, but no harm was done in
4276 doing so in the rare cases where it can occur. */
4278 if (all_reduced
== 1 && bl
->eliminable
4279 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4280 threshold
, insn_count
))
4283 /* ?? If we created a new test to bypass the loop entirely,
4284 or otherwise drop straight in, based on this test, then
4285 we might want to rewrite it also. This way some later
4286 pass has more hope of removing the initialization of this
4289 /* If final_value != 0, then the biv may be used after loop end
4290 and we must emit an insn to set it just in case.
4292 Reversed bivs already have an insn after the loop setting their
4293 value, so we don't need another one. We can't calculate the
4294 proper final value for such a biv here anyways. */
4295 if (final_value
!= 0 && ! bl
->reversed
)
4299 /* If the loop has multiple exits, emit the insn before the
4300 loop to ensure that it will always be executed no matter
4301 how the loop exits. Otherwise, emit the insn after the
4302 loop, since this is slightly more efficient. */
4303 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4304 insert_before
= loop_start
;
4306 insert_before
= end_insert_before
;
4308 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4313 /* Delete all of the instructions inside the loop which set
4314 the biv, as they are all dead. If is safe to delete them,
4315 because an insn setting a biv will never be part of a libcall. */
4316 /* However, deleting them will invalidate the regno_last_uid info,
4317 so keeping them around is more convenient. Final_biv_value
4318 will only succeed when there are multiple exits if the biv
4319 is dead at each exit, hence it does not matter that the original
4320 insn remains, because it is dead anyways. */
4321 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4322 delete_insn (v
->insn
);
4325 if (loop_dump_stream
)
4326 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4331 /* Go through all the instructions in the loop, making all the
4332 register substitutions scheduled in REG_MAP. */
4334 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4335 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4336 || GET_CODE (p
) == CALL_INSN
)
4338 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4339 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4343 /* Unroll loops from within strength reduction so that we can use the
4344 induction variable information that strength_reduce has already
4347 if (flag_unroll_loops
)
4348 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4351 /* instrument the loop with bct insn */
4352 #ifdef HAVE_decrement_and_branch_on_count
4353 if (HAVE_decrement_and_branch_on_count
)
4354 insert_bct (loop_start
, loop_end
);
4358 if (loop_dump_stream
)
4359 fprintf (loop_dump_stream
, "\n");
4362 /* Return 1 if X is a valid source for an initial value (or as value being
4363 compared against in an initial test).
4365 X must be either a register or constant and must not be clobbered between
4366 the current insn and the start of the loop.
4368 INSN is the insn containing X. */
4371 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4380 /* Only consider pseudos we know about initialized in insns whose luids
4382 if (GET_CODE (x
) != REG
4383 || REGNO (x
) >= max_reg_before_loop
)
4386 /* Don't use call-clobbered registers across a call which clobbers it. On
4387 some machines, don't use any hard registers at all. */
4388 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4390 #ifdef SMALL_REGISTER_CLASSES
4391 SMALL_REGISTER_CLASSES
4395 || (call_used_regs
[REGNO (x
)] && call_seen
))
4399 /* Don't use registers that have been clobbered before the start of the
4401 if (reg_set_between_p (x
, insn
, loop_start
))
4407 /* Scan X for memory refs and check each memory address
4408 as a possible giv. INSN is the insn whose pattern X comes from.
4409 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4410 every loop iteration. */
4413 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4416 int not_every_iteration
;
4417 rtx loop_start
, loop_end
;
4420 register enum rtx_code code
;
4426 code
= GET_CODE (x
);
4450 benefit
= general_induction_var (XEXP (x
, 0),
4451 &src_reg
, &add_val
, &mult_val
);
4453 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4454 Such a giv isn't useful. */
4455 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4457 /* Found one; record it. */
4459 = (struct induction
*) oballoc (sizeof (struct induction
));
4461 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4462 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4463 &XEXP (x
, 0), loop_start
, loop_end
);
4465 v
->mem_mode
= GET_MODE (x
);
4471 /* Recursively scan the subexpressions for other mem refs. */
4473 fmt
= GET_RTX_FORMAT (code
);
4474 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4476 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4478 else if (fmt
[i
] == 'E')
4479 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4480 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4481 loop_start
, loop_end
);
4484 /* Fill in the data about one biv update.
4485 V is the `struct induction' in which we record the biv. (It is
4486 allocated by the caller, with alloca.)
4487 INSN is the insn that sets it.
4488 DEST_REG is the biv's reg.
4490 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4491 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4492 being set to INC_VAL.
4494 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4495 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4496 can be executed more than once per iteration. If MAYBE_MULTIPLE
4497 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4498 executed exactly once per iteration. */
4501 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4502 not_every_iteration
, maybe_multiple
)
4503 struct induction
*v
;
4508 int not_every_iteration
;
4511 struct iv_class
*bl
;
4514 v
->src_reg
= dest_reg
;
4515 v
->dest_reg
= dest_reg
;
4516 v
->mult_val
= mult_val
;
4517 v
->add_val
= inc_val
;
4518 v
->mode
= GET_MODE (dest_reg
);
4519 v
->always_computable
= ! not_every_iteration
;
4520 v
->always_executed
= ! not_every_iteration
;
4521 v
->maybe_multiple
= maybe_multiple
;
4523 /* Add this to the reg's iv_class, creating a class
4524 if this is the first incrementation of the reg. */
4526 bl
= reg_biv_class
[REGNO (dest_reg
)];
4529 /* Create and initialize new iv_class. */
4531 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4533 bl
->regno
= REGNO (dest_reg
);
4539 /* Set initial value to the reg itself. */
4540 bl
->initial_value
= dest_reg
;
4541 /* We haven't seen the initializing insn yet */
4544 bl
->initial_test
= 0;
4545 bl
->incremented
= 0;
4549 bl
->total_benefit
= 0;
4551 /* Add this class to loop_iv_list. */
4552 bl
->next
= loop_iv_list
;
4555 /* Put it in the array of biv register classes. */
4556 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4559 /* Update IV_CLASS entry for this biv. */
4560 v
->next_iv
= bl
->biv
;
4563 if (mult_val
== const1_rtx
)
4564 bl
->incremented
= 1;
4566 if (loop_dump_stream
)
4568 fprintf (loop_dump_stream
,
4569 "Insn %d: possible biv, reg %d,",
4570 INSN_UID (insn
), REGNO (dest_reg
));
4571 if (GET_CODE (inc_val
) == CONST_INT
)
4572 fprintf (loop_dump_stream
, " const = %d\n",
4576 fprintf (loop_dump_stream
, " const = ");
4577 print_rtl (loop_dump_stream
, inc_val
);
4578 fprintf (loop_dump_stream
, "\n");
4583 /* Fill in the data about one giv.
4584 V is the `struct induction' in which we record the giv. (It is
4585 allocated by the caller, with alloca.)
4586 INSN is the insn that sets it.
4587 BENEFIT estimates the savings from deleting this insn.
4588 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4589 into a register or is used as a memory address.
4591 SRC_REG is the biv reg which the giv is computed from.
4592 DEST_REG is the giv's reg (if the giv is stored in a reg).
4593 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4594 LOCATION points to the place where this giv's value appears in INSN. */
4597 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4598 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4599 struct induction
*v
;
4603 rtx mult_val
, add_val
;
4606 int not_every_iteration
;
4608 rtx loop_start
, loop_end
;
4610 struct induction
*b
;
4611 struct iv_class
*bl
;
4612 rtx set
= single_set (insn
);
4616 v
->src_reg
= src_reg
;
4618 v
->dest_reg
= dest_reg
;
4619 v
->mult_val
= mult_val
;
4620 v
->add_val
= add_val
;
4621 v
->benefit
= benefit
;
4622 v
->location
= location
;
4624 v
->combined_with
= 0;
4625 v
->maybe_multiple
= 0;
4627 v
->derive_adjustment
= 0;
4633 v
->auto_inc_opt
= 0;
4637 /* The v->always_computable field is used in update_giv_derive, to
4638 determine whether a giv can be used to derive another giv. For a
4639 DEST_REG giv, INSN computes a new value for the giv, so its value
4640 isn't computable if INSN insn't executed every iteration.
4641 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4642 it does not compute a new value. Hence the value is always computable
4643 regardless of whether INSN is executed each iteration. */
4645 if (type
== DEST_ADDR
)
4646 v
->always_computable
= 1;
4648 v
->always_computable
= ! not_every_iteration
;
4650 v
->always_executed
= ! not_every_iteration
;
4652 if (type
== DEST_ADDR
)
4654 v
->mode
= GET_MODE (*location
);
4658 else /* type == DEST_REG */
4660 v
->mode
= GET_MODE (SET_DEST (set
));
4662 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4663 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4665 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4667 /* If the lifetime is zero, it means that this register is
4668 really a dead store. So mark this as a giv that can be
4669 ignored. This will not prevent the biv from being eliminated. */
4670 if (v
->lifetime
== 0)
4673 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4674 reg_iv_info
[REGNO (dest_reg
)] = v
;
4677 /* Add the giv to the class of givs computed from one biv. */
4679 bl
= reg_biv_class
[REGNO (src_reg
)];
4682 v
->next_iv
= bl
->giv
;
4684 /* Don't count DEST_ADDR. This is supposed to count the number of
4685 insns that calculate givs. */
4686 if (type
== DEST_REG
)
4688 bl
->total_benefit
+= benefit
;
4691 /* Fatal error, biv missing for this giv? */
4694 if (type
== DEST_ADDR
)
4698 /* The giv can be replaced outright by the reduced register only if all
4699 of the following conditions are true:
4700 - the insn that sets the giv is always executed on any iteration
4701 on which the giv is used at all
4702 (there are two ways to deduce this:
4703 either the insn is executed on every iteration,
4704 or all uses follow that insn in the same basic block),
4705 - the giv is not used outside the loop
4706 - no assignments to the biv occur during the giv's lifetime. */
4708 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4709 /* Previous line always fails if INSN was moved by loop opt. */
4710 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4711 && (! not_every_iteration
4712 || last_use_this_basic_block (dest_reg
, insn
)))
4714 /* Now check that there are no assignments to the biv within the
4715 giv's lifetime. This requires two separate checks. */
4717 /* Check each biv update, and fail if any are between the first
4718 and last use of the giv.
4720 If this loop contains an inner loop that was unrolled, then
4721 the insn modifying the biv may have been emitted by the loop
4722 unrolling code, and hence does not have a valid luid. Just
4723 mark the biv as not replaceable in this case. It is not very
4724 useful as a biv, because it is used in two different loops.
4725 It is very unlikely that we would be able to optimize the giv
4726 using this biv anyways. */
4729 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4731 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4732 || ((uid_luid
[INSN_UID (b
->insn
)]
4733 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4734 && (uid_luid
[INSN_UID (b
->insn
)]
4735 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4738 v
->not_replaceable
= 1;
4743 /* If there are any backwards branches that go from after the
4744 biv update to before it, then this giv is not replaceable. */
4746 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4747 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4750 v
->not_replaceable
= 1;
4756 /* May still be replaceable, we don't have enough info here to
4759 v
->not_replaceable
= 0;
4763 if (loop_dump_stream
)
4765 if (type
== DEST_REG
)
4766 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4767 INSN_UID (insn
), REGNO (dest_reg
));
4769 fprintf (loop_dump_stream
, "Insn %d: dest address",
4772 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4773 REGNO (src_reg
), v
->benefit
);
4774 fprintf (loop_dump_stream
, " used %d lifetime %d",
4775 v
->times_used
, v
->lifetime
);
4778 fprintf (loop_dump_stream
, " replaceable");
4780 if (GET_CODE (mult_val
) == CONST_INT
)
4781 fprintf (loop_dump_stream
, " mult %d",
4785 fprintf (loop_dump_stream
, " mult ");
4786 print_rtl (loop_dump_stream
, mult_val
);
4789 if (GET_CODE (add_val
) == CONST_INT
)
4790 fprintf (loop_dump_stream
, " add %d",
4794 fprintf (loop_dump_stream
, " add ");
4795 print_rtl (loop_dump_stream
, add_val
);
4799 if (loop_dump_stream
)
4800 fprintf (loop_dump_stream
, "\n");
4805 /* All this does is determine whether a giv can be made replaceable because
4806 its final value can be calculated. This code can not be part of record_giv
4807 above, because final_giv_value requires that the number of loop iterations
4808 be known, and that can not be accurately calculated until after all givs
4809 have been identified. */
4812 check_final_value (v
, loop_start
, loop_end
)
4813 struct induction
*v
;
4814 rtx loop_start
, loop_end
;
4816 struct iv_class
*bl
;
4817 rtx final_value
= 0;
4819 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4821 /* DEST_ADDR givs will never reach here, because they are always marked
4822 replaceable above in record_giv. */
4824 /* The giv can be replaced outright by the reduced register only if all
4825 of the following conditions are true:
4826 - the insn that sets the giv is always executed on any iteration
4827 on which the giv is used at all
4828 (there are two ways to deduce this:
4829 either the insn is executed on every iteration,
4830 or all uses follow that insn in the same basic block),
4831 - its final value can be calculated (this condition is different
4832 than the one above in record_giv)
4833 - no assignments to the biv occur during the giv's lifetime. */
4836 /* This is only called now when replaceable is known to be false. */
4837 /* Clear replaceable, so that it won't confuse final_giv_value. */
4841 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4842 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4844 int biv_increment_seen
= 0;
4850 /* When trying to determine whether or not a biv increment occurs
4851 during the lifetime of the giv, we can ignore uses of the variable
4852 outside the loop because final_value is true. Hence we can not
4853 use regno_last_uid and regno_first_uid as above in record_giv. */
4855 /* Search the loop to determine whether any assignments to the
4856 biv occur during the giv's lifetime. Start with the insn
4857 that sets the giv, and search around the loop until we come
4858 back to that insn again.
4860 Also fail if there is a jump within the giv's lifetime that jumps
4861 to somewhere outside the lifetime but still within the loop. This
4862 catches spaghetti code where the execution order is not linear, and
4863 hence the above test fails. Here we assume that the giv lifetime
4864 does not extend from one iteration of the loop to the next, so as
4865 to make the test easier. Since the lifetime isn't known yet,
4866 this requires two loops. See also record_giv above. */
4868 last_giv_use
= v
->insn
;
4874 p
= NEXT_INSN (loop_start
);
4878 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4879 || GET_CODE (p
) == CALL_INSN
)
4881 if (biv_increment_seen
)
4883 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4886 v
->not_replaceable
= 1;
4890 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4891 biv_increment_seen
= 1;
4892 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4897 /* Now that the lifetime of the giv is known, check for branches
4898 from within the lifetime to outside the lifetime if it is still
4908 p
= NEXT_INSN (loop_start
);
4909 if (p
== last_giv_use
)
4912 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4913 && LABEL_NAME (JUMP_LABEL (p
))
4914 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4915 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4916 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4917 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4918 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4919 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4920 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4923 v
->not_replaceable
= 1;
4925 if (loop_dump_stream
)
4926 fprintf (loop_dump_stream
,
4927 "Found branch outside giv lifetime.\n");
4934 /* If it is replaceable, then save the final value. */
4936 v
->final_value
= final_value
;
4939 if (loop_dump_stream
&& v
->replaceable
)
4940 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4941 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4944 /* Update the status of whether a giv can derive other givs.
4946 We need to do something special if there is or may be an update to the biv
4947 between the time the giv is defined and the time it is used to derive
4950 In addition, a giv that is only conditionally set is not allowed to
4951 derive another giv once a label has been passed.
4953 The cases we look at are when a label or an update to a biv is passed. */
4956 update_giv_derive (p
)
4959 struct iv_class
*bl
;
4960 struct induction
*biv
, *giv
;
4964 /* Search all IV classes, then all bivs, and finally all givs.
4966 There are three cases we are concerned with. First we have the situation
4967 of a giv that is only updated conditionally. In that case, it may not
4968 derive any givs after a label is passed.
4970 The second case is when a biv update occurs, or may occur, after the
4971 definition of a giv. For certain biv updates (see below) that are
4972 known to occur between the giv definition and use, we can adjust the
4973 giv definition. For others, or when the biv update is conditional,
4974 we must prevent the giv from deriving any other givs. There are two
4975 sub-cases within this case.
4977 If this is a label, we are concerned with any biv update that is done
4978 conditionally, since it may be done after the giv is defined followed by
4979 a branch here (actually, we need to pass both a jump and a label, but
4980 this extra tracking doesn't seem worth it).
4982 If this is a jump, we are concerned about any biv update that may be
4983 executed multiple times. We are actually only concerned about
4984 backward jumps, but it is probably not worth performing the test
4985 on the jump again here.
4987 If this is a biv update, we must adjust the giv status to show that a
4988 subsequent biv update was performed. If this adjustment cannot be done,
4989 the giv cannot derive further givs. */
4991 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4992 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
4993 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
4996 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
4998 /* If cant_derive is already true, there is no point in
4999 checking all of these conditions again. */
5000 if (giv
->cant_derive
)
5003 /* If this giv is conditionally set and we have passed a label,
5004 it cannot derive anything. */
5005 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5006 giv
->cant_derive
= 1;
5008 /* Skip givs that have mult_val == 0, since
5009 they are really invariants. Also skip those that are
5010 replaceable, since we know their lifetime doesn't contain
5012 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5015 /* The only way we can allow this giv to derive another
5016 is if this is a biv increment and we can form the product
5017 of biv->add_val and giv->mult_val. In this case, we will
5018 be able to compute a compensation. */
5019 else if (biv
->insn
== p
)
5023 if (biv
->mult_val
== const1_rtx
)
5024 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
5029 if (tem
&& giv
->derive_adjustment
)
5030 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
5031 giv
->derive_adjustment
),
5034 giv
->derive_adjustment
= tem
;
5036 giv
->cant_derive
= 1;
5038 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5039 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5040 giv
->cant_derive
= 1;
5045 /* Check whether an insn is an increment legitimate for a basic induction var.
5046 X is the source of insn P, or a part of it.
5047 MODE is the mode in which X should be interpreted.
5049 DEST_REG is the putative biv, also the destination of the insn.
5050 We accept patterns of these forms:
5051 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5052 REG = INVARIANT + REG
5054 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5055 and store the additive term into *INC_VAL.
5057 If X is an assignment of an invariant into DEST_REG, we set
5058 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5060 We also want to detect a BIV when it corresponds to a variable
5061 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5062 of the variable may be a PLUS that adds a SUBREG of that variable to
5063 an invariant and then sign- or zero-extends the result of the PLUS
5066 Most GIVs in such cases will be in the promoted mode, since that is the
5067 probably the natural computation mode (and almost certainly the mode
5068 used for addresses) on the machine. So we view the pseudo-reg containing
5069 the variable as the BIV, as if it were simply incremented.
5071 Note that treating the entire pseudo as a BIV will result in making
5072 simple increments to any GIVs based on it. However, if the variable
5073 overflows in its declared mode but not its promoted mode, the result will
5074 be incorrect. This is acceptable if the variable is signed, since
5075 overflows in such cases are undefined, but not if it is unsigned, since
5076 those overflows are defined. So we only check for SIGN_EXTEND and
5079 If we cannot find a biv, we return 0. */
5082 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5084 enum machine_mode mode
;
5090 register enum rtx_code code
;
5094 code
= GET_CODE (x
);
5098 if (XEXP (x
, 0) == dest_reg
5099 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5100 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5101 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5103 else if (XEXP (x
, 1) == dest_reg
5104 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5105 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5106 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5111 if (invariant_p (arg
) != 1)
5114 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5115 *mult_val
= const1_rtx
;
5119 /* If this is a SUBREG for a promoted variable, check the inner
5121 if (SUBREG_PROMOTED_VAR_P (x
))
5122 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5123 dest_reg
, p
, inc_val
, mult_val
);
5127 /* If this register is assigned in the previous insn, look at its
5128 source, but don't go outside the loop or past a label. */
5130 for (insn
= PREV_INSN (p
);
5131 (insn
&& GET_CODE (insn
) == NOTE
5132 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5133 insn
= PREV_INSN (insn
))
5137 set
= single_set (insn
);
5140 && (SET_DEST (set
) == x
5141 || (GET_CODE (SET_DEST (set
)) == SUBREG
5142 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5144 && SUBREG_REG (SET_DEST (set
)) == x
)))
5145 return basic_induction_var (SET_SRC (set
),
5146 (GET_MODE (SET_SRC (set
)) == VOIDmode
5148 : GET_MODE (SET_SRC (set
))),
5151 /* ... fall through ... */
5153 /* Can accept constant setting of biv only when inside inner most loop.
5154 Otherwise, a biv of an inner loop may be incorrectly recognized
5155 as a biv of the outer loop,
5156 causing code to be moved INTO the inner loop. */
5158 if (invariant_p (x
) != 1)
5163 if (loops_enclosed
== 1)
5165 /* Possible bug here? Perhaps we don't know the mode of X. */
5166 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5167 *mult_val
= const0_rtx
;
5174 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5175 dest_reg
, p
, inc_val
, mult_val
);
5177 /* Similar, since this can be a sign extension. */
5178 for (insn
= PREV_INSN (p
);
5179 (insn
&& GET_CODE (insn
) == NOTE
5180 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5181 insn
= PREV_INSN (insn
))
5185 set
= single_set (insn
);
5187 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5188 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5189 && INTVAL (XEXP (x
, 1)) >= 0
5190 && GET_CODE (SET_SRC (set
)) == ASHIFT
5191 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5192 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5193 GET_MODE (XEXP (x
, 0)),
5194 dest_reg
, insn
, inc_val
, mult_val
);
5202 /* A general induction variable (giv) is any quantity that is a linear
5203 function of a basic induction variable,
5204 i.e. giv = biv * mult_val + add_val.
5205 The coefficients can be any loop invariant quantity.
5206 A giv need not be computed directly from the biv;
5207 it can be computed by way of other givs. */
5209 /* Determine whether X computes a giv.
5210 If it does, return a nonzero value
5211 which is the benefit from eliminating the computation of X;
5212 set *SRC_REG to the register of the biv that it is computed from;
5213 set *ADD_VAL and *MULT_VAL to the coefficients,
5214 such that the value of X is biv * mult + add; */
5217 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5227 /* If this is an invariant, forget it, it isn't a giv. */
5228 if (invariant_p (x
) == 1)
5231 /* See if the expression could be a giv and get its form.
5232 Mark our place on the obstack in case we don't find a giv. */
5233 storage
= (char *) oballoc (0);
5234 x
= simplify_giv_expr (x
, &benefit
);
5241 switch (GET_CODE (x
))
5245 /* Since this is now an invariant and wasn't before, it must be a giv
5246 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5248 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5249 *mult_val
= const0_rtx
;
5254 /* This is equivalent to a BIV. */
5256 *mult_val
= const1_rtx
;
5257 *add_val
= const0_rtx
;
5261 /* Either (plus (biv) (invar)) or
5262 (plus (mult (biv) (invar_1)) (invar_2)). */
5263 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5265 *src_reg
= XEXP (XEXP (x
, 0), 0);
5266 *mult_val
= XEXP (XEXP (x
, 0), 1);
5270 *src_reg
= XEXP (x
, 0);
5271 *mult_val
= const1_rtx
;
5273 *add_val
= XEXP (x
, 1);
5277 /* ADD_VAL is zero. */
5278 *src_reg
= XEXP (x
, 0);
5279 *mult_val
= XEXP (x
, 1);
5280 *add_val
= const0_rtx
;
5287 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5288 unless they are CONST_INT). */
5289 if (GET_CODE (*add_val
) == USE
)
5290 *add_val
= XEXP (*add_val
, 0);
5291 if (GET_CODE (*mult_val
) == USE
)
5292 *mult_val
= XEXP (*mult_val
, 0);
5294 benefit
+= rtx_cost (orig_x
, SET
);
5296 /* Always return some benefit if this is a giv so it will be detected
5297 as such. This allows elimination of bivs that might otherwise
5298 not be eliminated. */
5299 return benefit
== 0 ? 1 : benefit
;
5302 /* Given an expression, X, try to form it as a linear function of a biv.
5303 We will canonicalize it to be of the form
5304 (plus (mult (BIV) (invar_1))
5306 with possible degeneracies.
5308 The invariant expressions must each be of a form that can be used as a
5309 machine operand. We surround then with a USE rtx (a hack, but localized
5310 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5311 routine; it is the caller's responsibility to strip them.
5313 If no such canonicalization is possible (i.e., two biv's are used or an
5314 expression that is neither invariant nor a biv or giv), this routine
5317 For a non-zero return, the result will have a code of CONST_INT, USE,
5318 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5320 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5323 simplify_giv_expr (x
, benefit
)
5327 enum machine_mode mode
= GET_MODE (x
);
5331 /* If this is not an integer mode, or if we cannot do arithmetic in this
5332 mode, this can't be a giv. */
5333 if (mode
!= VOIDmode
5334 && (GET_MODE_CLASS (mode
) != MODE_INT
5335 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5338 switch (GET_CODE (x
))
5341 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5342 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5343 if (arg0
== 0 || arg1
== 0)
5346 /* Put constant last, CONST_INT last if both constant. */
5347 if ((GET_CODE (arg0
) == USE
5348 || GET_CODE (arg0
) == CONST_INT
)
5349 && GET_CODE (arg1
) != CONST_INT
)
5350 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5352 /* Handle addition of zero, then addition of an invariant. */
5353 if (arg1
== const0_rtx
)
5355 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5356 switch (GET_CODE (arg0
))
5360 /* Both invariant. Only valid if sum is machine operand.
5361 First strip off possible USE on first operand. */
5362 if (GET_CODE (arg0
) == USE
)
5363 arg0
= XEXP (arg0
, 0);
5366 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5368 tem
= plus_constant (arg0
, INTVAL (arg1
));
5369 if (GET_CODE (tem
) != CONST_INT
)
5370 tem
= gen_rtx (USE
, mode
, tem
);
5377 /* biv + invar or mult + invar. Return sum. */
5378 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5381 /* (a + invar_1) + invar_2. Associate. */
5382 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5384 gen_rtx (PLUS
, mode
,
5385 XEXP (arg0
, 1), arg1
)),
5392 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5393 MULT to reduce cases. */
5394 if (GET_CODE (arg0
) == REG
)
5395 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5396 if (GET_CODE (arg1
) == REG
)
5397 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5399 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5400 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5401 Recurse to associate the second PLUS. */
5402 if (GET_CODE (arg1
) == MULT
)
5403 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5405 if (GET_CODE (arg1
) == PLUS
)
5406 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5407 gen_rtx (PLUS
, mode
,
5408 arg0
, XEXP (arg1
, 0)),
5412 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5413 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5416 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5419 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5421 gen_rtx (PLUS
, mode
,
5427 /* Handle "a - b" as "a + b * (-1)". */
5428 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5430 gen_rtx (MULT
, mode
,
5431 XEXP (x
, 1), constm1_rtx
)),
5435 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5436 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5437 if (arg0
== 0 || arg1
== 0)
5440 /* Put constant last, CONST_INT last if both constant. */
5441 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5442 && GET_CODE (arg1
) != CONST_INT
)
5443 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5445 /* If second argument is not now constant, not giv. */
5446 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5449 /* Handle multiply by 0 or 1. */
5450 if (arg1
== const0_rtx
)
5453 else if (arg1
== const1_rtx
)
5456 switch (GET_CODE (arg0
))
5459 /* biv * invar. Done. */
5460 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5463 /* Product of two constants. */
5464 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5467 /* invar * invar. Not giv. */
5471 /* (a * invar_1) * invar_2. Associate. */
5472 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5474 gen_rtx (MULT
, mode
,
5475 XEXP (arg0
, 1), arg1
)),
5479 /* (a + invar_1) * invar_2. Distribute. */
5480 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5481 gen_rtx (MULT
, mode
,
5482 XEXP (arg0
, 0), arg1
),
5483 gen_rtx (MULT
, mode
,
5484 XEXP (arg0
, 1), arg1
)),
5492 /* Shift by constant is multiply by power of two. */
5493 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5496 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5498 GEN_INT ((HOST_WIDE_INT
) 1
5499 << INTVAL (XEXP (x
, 1)))),
5503 /* "-a" is "a * (-1)" */
5504 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5508 /* "~a" is "-a - 1". Silly, but easy. */
5509 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5510 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5515 /* Already in proper form for invariant. */
5519 /* If this is a new register, we can't deal with it. */
5520 if (REGNO (x
) >= max_reg_before_loop
)
5523 /* Check for biv or giv. */
5524 switch (reg_iv_type
[REGNO (x
)])
5528 case GENERAL_INDUCT
:
5530 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5532 /* Form expression from giv and add benefit. Ensure this giv
5533 can derive another and subtract any needed adjustment if so. */
5534 *benefit
+= v
->benefit
;
5538 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5539 v
->src_reg
, v
->mult_val
),
5541 if (v
->derive_adjustment
)
5542 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5543 return simplify_giv_expr (tem
, benefit
);
5547 /* Fall through to general case. */
5549 /* If invariant, return as USE (unless CONST_INT).
5550 Otherwise, not giv. */
5551 if (GET_CODE (x
) == USE
)
5554 if (invariant_p (x
) == 1)
5556 if (GET_CODE (x
) == CONST_INT
)
5559 return gen_rtx (USE
, mode
, x
);
5566 /* Help detect a giv that is calculated by several consecutive insns;
5570 The caller has already identified the first insn P as having a giv as dest;
5571 we check that all other insns that set the same register follow
5572 immediately after P, that they alter nothing else,
5573 and that the result of the last is still a giv.
5575 The value is 0 if the reg set in P is not really a giv.
5576 Otherwise, the value is the amount gained by eliminating
5577 all the consecutive insns that compute the value.
5579 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5580 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5582 The coefficients of the ultimate giv value are stored in
5583 *MULT_VAL and *ADD_VAL. */
5586 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5601 /* Indicate that this is a giv so that we can update the value produced in
5602 each insn of the multi-insn sequence.
5604 This induction structure will be used only by the call to
5605 general_induction_var below, so we can allocate it on our stack.
5606 If this is a giv, our caller will replace the induct var entry with
5607 a new induction structure. */
5609 = (struct induction
*) alloca (sizeof (struct induction
));
5610 v
->src_reg
= src_reg
;
5611 v
->mult_val
= *mult_val
;
5612 v
->add_val
= *add_val
;
5613 v
->benefit
= first_benefit
;
5615 v
->derive_adjustment
= 0;
5617 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5618 reg_iv_info
[REGNO (dest_reg
)] = v
;
5620 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5625 code
= GET_CODE (p
);
5627 /* If libcall, skip to end of call sequence. */
5628 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5632 && (set
= single_set (p
))
5633 && GET_CODE (SET_DEST (set
)) == REG
5634 && SET_DEST (set
) == dest_reg
5635 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5637 /* Giv created by equivalent expression. */
5638 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5639 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5640 add_val
, mult_val
))))
5641 && src_reg
== v
->src_reg
)
5643 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5644 benefit
+= libcall_benefit (p
);
5647 v
->mult_val
= *mult_val
;
5648 v
->add_val
= *add_val
;
5649 v
->benefit
= benefit
;
5651 else if (code
!= NOTE
)
5653 /* Allow insns that set something other than this giv to a
5654 constant. Such insns are needed on machines which cannot
5655 include long constants and should not disqualify a giv. */
5657 && (set
= single_set (p
))
5658 && SET_DEST (set
) != dest_reg
5659 && CONSTANT_P (SET_SRC (set
)))
5662 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5670 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5671 represented by G1. If no such expression can be found, or it is clear that
5672 it cannot possibly be a valid address, 0 is returned.
5674 To perform the computation, we note that
5677 where `v' is the biv.
5679 So G2 = (c/a) * G1 + (d - b*c/a) */
5683 express_from (g1
, g2
)
5684 struct induction
*g1
, *g2
;
5688 /* The value that G1 will be multiplied by must be a constant integer. Also,
5689 the only chance we have of getting a valid address is if b*c/a (see above
5690 for notation) is also an integer. */
5691 if (GET_CODE (g1
->mult_val
) != CONST_INT
5692 || GET_CODE (g2
->mult_val
) != CONST_INT
5693 || GET_CODE (g1
->add_val
) != CONST_INT
5694 || g1
->mult_val
== const0_rtx
5695 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5698 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5699 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5701 /* Form simplified final result. */
5702 if (mult
== const0_rtx
)
5704 else if (mult
== const1_rtx
)
5705 mult
= g1
->dest_reg
;
5707 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5709 if (add
== const0_rtx
)
5712 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5716 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5717 (either directly or via an address expression) a register used to represent
5718 G1. Set g2->new_reg to a represtation of G1 (normally just
5722 combine_givs_p (g1
, g2
)
5723 struct induction
*g1
, *g2
;
5727 /* If these givs are identical, they can be combined. */
5728 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5729 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5731 g2
->new_reg
= g1
->dest_reg
;
5736 /* If G2 can be expressed as a function of G1 and that function is valid
5737 as an address and no more expensive than using a register for G2,
5738 the expression of G2 in terms of G1 can be used. */
5739 if (g2
->giv_type
== DEST_ADDR
5740 && (tem
= express_from (g1
, g2
)) != 0
5741 && memory_address_p (g2
->mem_mode
, tem
)
5742 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5752 #ifdef GIV_SORT_CRITERION
5753 /* Compare two givs and sort the most desirable one for combinations first.
5754 This is used only in one qsort call below. */
5758 struct induction
**x
, **y
;
5760 GIV_SORT_CRITERION (*x
, *y
);
5766 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5767 any other. If so, point SAME to the giv combined with and set NEW_REG to
5768 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5769 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5773 struct iv_class
*bl
;
5775 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5776 int i
, j
, giv_count
, pass
;
5778 /* Count givs, because bl->giv_count is incorrect here. */
5780 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5784 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5786 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5787 giv_array
[i
++] = g1
;
5789 #ifdef GIV_SORT_CRITERION
5790 /* Sort the givs if GIV_SORT_CRITERION is defined.
5791 This is usually defined for processors which lack
5792 negative register offsets so more givs may be combined. */
5794 if (loop_dump_stream
)
5795 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5797 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5800 for (i
= 0; i
< giv_count
; i
++)
5803 for (pass
= 0; pass
<= 1; pass
++)
5804 for (j
= 0; j
< giv_count
; j
++)
5808 /* First try to combine with replaceable givs, then all givs. */
5809 && (g1
->replaceable
|| pass
== 1)
5810 /* If either has already been combined or is to be ignored, can't
5812 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5813 /* If something has been based on G2, G2 cannot itself be based
5814 on something else. */
5815 && ! g2
->combined_with
5816 && combine_givs_p (g1
, g2
))
5818 /* g2->new_reg set by `combine_givs_p' */
5820 g1
->combined_with
= 1;
5822 /* If one of these givs is a DEST_REG that was only used
5823 once, by the other giv, this is actually a single use.
5824 The DEST_REG has the correct cost, while the other giv
5825 counts the REG use too often. */
5826 if (g2
->giv_type
== DEST_REG
5827 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5828 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5829 g1
->benefit
= g2
->benefit
;
5830 else if (g1
->giv_type
!= DEST_REG
5831 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5832 || ! reg_mentioned_p (g1
->dest_reg
,
5833 PATTERN (g2
->insn
)))
5835 g1
->benefit
+= g2
->benefit
;
5836 g1
->times_used
+= g2
->times_used
;
5838 /* ??? The new final_[bg]iv_value code does a much better job
5839 of finding replaceable giv's, and hence this code may no
5840 longer be necessary. */
5841 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5842 g1
->benefit
-= copy_cost
;
5843 g1
->lifetime
+= g2
->lifetime
;
5845 if (loop_dump_stream
)
5846 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5847 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5853 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5856 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5857 rtx b
; /* initial value of basic induction variable */
5858 rtx m
; /* multiplicative constant */
5859 rtx a
; /* additive constant */
5860 rtx reg
; /* destination register */
5866 /* Prevent unexpected sharing of these rtx. */
5870 /* Increase the lifetime of any invariants moved further in code. */
5871 update_reg_last_use (a
, insert_before
);
5872 update_reg_last_use (b
, insert_before
);
5873 update_reg_last_use (m
, insert_before
);
5876 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5878 emit_move_insn (reg
, result
);
5879 seq
= gen_sequence ();
5882 emit_insn_before (seq
, insert_before
);
5884 record_base_value (REGNO (reg
), b
);
5887 /* Test whether A * B can be computed without
5888 an actual multiply insn. Value is 1 if so. */
5891 product_cheap_p (a
, b
)
5897 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5898 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5901 /* If only one is constant, make it B. */
5902 if (GET_CODE (a
) == CONST_INT
)
5903 tmp
= a
, a
= b
, b
= tmp
;
5905 /* If first constant, both constant, so don't need multiply. */
5906 if (GET_CODE (a
) == CONST_INT
)
5909 /* If second not constant, neither is constant, so would need multiply. */
5910 if (GET_CODE (b
) != CONST_INT
)
5913 /* One operand is constant, so might not need multiply insn. Generate the
5914 code for the multiply and see if a call or multiply, or long sequence
5915 of insns is generated. */
5917 rtl_obstack
= &temp_obstack
;
5919 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5920 tmp
= gen_sequence ();
5923 if (GET_CODE (tmp
) == SEQUENCE
)
5925 if (XVEC (tmp
, 0) == 0)
5927 else if (XVECLEN (tmp
, 0) > 3)
5930 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5932 rtx insn
= XVECEXP (tmp
, 0, i
);
5934 if (GET_CODE (insn
) != INSN
5935 || (GET_CODE (PATTERN (insn
)) == SET
5936 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5937 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5938 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5939 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5946 else if (GET_CODE (tmp
) == SET
5947 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5949 else if (GET_CODE (tmp
) == PARALLEL
5950 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5951 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5954 /* Free any storage we obtained in generating this multiply and restore rtl
5955 allocation to its normal obstack. */
5956 obstack_free (&temp_obstack
, storage
);
5957 rtl_obstack
= old_rtl_obstack
;
5962 /* Check to see if loop can be terminated by a "decrement and branch until
5963 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5964 Also try reversing an increment loop to a decrement loop
5965 to see if the optimization can be performed.
5966 Value is nonzero if optimization was performed. */
5968 /* This is useful even if the architecture doesn't have such an insn,
5969 because it might change a loops which increments from 0 to n to a loop
5970 which decrements from n to 0. A loop that decrements to zero is usually
5971 faster than one that increments from zero. */
5973 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5974 such as approx_final_value, biv_total_increment, loop_iterations, and
5975 final_[bg]iv_value. */
5978 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5983 struct iv_class
*bl
;
5990 rtx before_comparison
;
5993 /* If last insn is a conditional branch, and the insn before tests a
5994 register value, try to optimize it. Otherwise, we can't do anything. */
5996 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
5997 if (comparison
== 0)
6000 /* Check all of the bivs to see if the compare uses one of them.
6001 Skip biv's set more than once because we can't guarantee that
6002 it will be zero on the last iteration. Also skip if the biv is
6003 used between its update and the test insn. */
6005 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6007 if (bl
->biv_count
== 1
6008 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6009 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6010 PREV_INSN (PREV_INSN (loop_end
))))
6017 /* Look for the case where the basic induction variable is always
6018 nonnegative, and equals zero on the last iteration.
6019 In this case, add a reg_note REG_NONNEG, which allows the
6020 m68k DBRA instruction to be used. */
6022 if (((GET_CODE (comparison
) == GT
6023 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6024 && INTVAL (XEXP (comparison
, 1)) == -1)
6025 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6026 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6027 && INTVAL (bl
->biv
->add_val
) < 0)
6029 /* Initial value must be greater than 0,
6030 init_val % -dec_value == 0 to ensure that it equals zero on
6031 the last iteration */
6033 if (GET_CODE (bl
->initial_value
) == CONST_INT
6034 && INTVAL (bl
->initial_value
) > 0
6035 && (INTVAL (bl
->initial_value
)
6036 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6038 /* register always nonnegative, add REG_NOTE to branch */
6039 REG_NOTES (PREV_INSN (loop_end
))
6040 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6041 REG_NOTES (PREV_INSN (loop_end
)));
6047 /* If the decrement is 1 and the value was tested as >= 0 before
6048 the loop, then we can safely optimize. */
6049 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6051 if (GET_CODE (p
) == CODE_LABEL
)
6053 if (GET_CODE (p
) != JUMP_INSN
)
6056 before_comparison
= get_condition_for_loop (p
);
6057 if (before_comparison
6058 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6059 && GET_CODE (before_comparison
) == LT
6060 && XEXP (before_comparison
, 1) == const0_rtx
6061 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6062 && INTVAL (bl
->biv
->add_val
) == -1)
6064 REG_NOTES (PREV_INSN (loop_end
))
6065 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6066 REG_NOTES (PREV_INSN (loop_end
)));
6073 else if (num_mem_sets
<= 1)
6075 /* Try to change inc to dec, so can apply above optimization. */
6077 all registers modified are induction variables or invariant,
6078 all memory references have non-overlapping addresses
6079 (obviously true if only one write)
6080 allow 2 insns for the compare/jump at the end of the loop. */
6081 /* Also, we must avoid any instructions which use both the reversed
6082 biv and another biv. Such instructions will fail if the loop is
6083 reversed. We meet this condition by requiring that either
6084 no_use_except_counting is true, or else that there is only
6086 int num_nonfixed_reads
= 0;
6087 /* 1 if the iteration var is used only to count iterations. */
6088 int no_use_except_counting
= 0;
6089 /* 1 if the loop has no memory store, or it has a single memory store
6090 which is reversible. */
6091 int reversible_mem_store
= 1;
6093 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6094 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6095 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6097 if (bl
->giv_count
== 0
6098 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6100 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6102 /* If there are no givs for this biv, and the only exit is the
6103 fall through at the end of the the loop, then
6104 see if perhaps there are no uses except to count. */
6105 no_use_except_counting
= 1;
6106 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6107 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6109 rtx set
= single_set (p
);
6111 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6112 && REGNO (SET_DEST (set
)) == bl
->regno
)
6113 /* An insn that sets the biv is okay. */
6115 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6116 || p
== prev_nonnote_insn (loop_end
))
6117 /* Don't bother about the end test. */
6119 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6120 /* Any other use of the biv is no good. */
6122 no_use_except_counting
= 0;
6128 /* If the loop has a single store, and the destination address is
6129 invariant, then we can't reverse the loop, because this address
6130 might then have the wrong value at loop exit.
6131 This would work if the source was invariant also, however, in that
6132 case, the insn should have been moved out of the loop. */
6134 if (num_mem_sets
== 1)
6135 reversible_mem_store
6136 = (! unknown_address_altered
6137 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6139 /* This code only acts for innermost loops. Also it simplifies
6140 the memory address check by only reversing loops with
6141 zero or one memory access.
6142 Two memory accesses could involve parts of the same array,
6143 and that can't be reversed. */
6145 if (num_nonfixed_reads
<= 1
6147 && !loop_has_volatile
6148 && reversible_mem_store
6149 && (no_use_except_counting
6150 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6151 + num_movables
+ 2 == insn_count
)
6152 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6156 /* Loop can be reversed. */
6157 if (loop_dump_stream
)
6158 fprintf (loop_dump_stream
, "Can reverse loop\n");
6160 /* Now check other conditions:
6161 initial_value must be zero,
6162 final_value % add_val == 0, so that when reversed, the
6163 biv will be zero on the last iteration.
6165 This test can probably be improved since +/- 1 in the constant
6166 can be obtained by changing LT to LE and vice versa; this is
6169 if (comparison
&& bl
->initial_value
== const0_rtx
6170 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6171 /* LE gets turned into LT */
6172 && GET_CODE (comparison
) == LT
6173 && (INTVAL (XEXP (comparison
, 1))
6174 % INTVAL (bl
->biv
->add_val
)) == 0)
6176 /* Register will always be nonnegative, with value
6177 0 on last iteration if loop reversed */
6179 /* Save some info needed to produce the new insns. */
6180 reg
= bl
->biv
->dest_reg
;
6181 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6182 if (jump_label
== pc_rtx
)
6183 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6184 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6186 final_value
= XEXP (comparison
, 1);
6187 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6188 - INTVAL (bl
->biv
->add_val
));
6190 /* Initialize biv to start_value before loop start.
6191 The old initializing insn will be deleted as a
6192 dead store by flow.c. */
6193 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6195 /* Add insn to decrement register, and delete insn
6196 that incremented the register. */
6197 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6199 delete_insn (bl
->biv
->insn
);
6201 /* Update biv info to reflect its new status. */
6203 bl
->initial_value
= start_value
;
6204 bl
->biv
->add_val
= new_add_val
;
6206 /* Inc LABEL_NUSES so that delete_insn will
6207 not delete the label. */
6208 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6210 /* Emit an insn after the end of the loop to set the biv's
6211 proper exit value if it is used anywhere outside the loop. */
6212 if ((REGNO_LAST_UID (bl
->regno
)
6213 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6215 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6216 emit_insn_after (gen_move_insn (reg
, final_value
),
6219 /* Delete compare/branch at end of loop. */
6220 delete_insn (PREV_INSN (loop_end
));
6221 delete_insn (PREV_INSN (loop_end
));
6223 /* Add new compare/branch insn at end of loop. */
6225 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6226 GET_MODE (reg
), 0, 0);
6227 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6228 tem
= gen_sequence ();
6230 emit_jump_insn_before (tem
, loop_end
);
6232 for (tem
= PREV_INSN (loop_end
);
6233 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6237 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6239 /* Increment of LABEL_NUSES done above. */
6240 /* Register is now always nonnegative,
6241 so add REG_NONNEG note to the branch. */
6242 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6248 /* Mark that this biv has been reversed. Each giv which depends
6249 on this biv, and which is also live past the end of the loop
6250 will have to be fixed up. */
6254 if (loop_dump_stream
)
6255 fprintf (loop_dump_stream
,
6256 "Reversed loop and added reg_nonneg\n");
6266 /* Verify whether the biv BL appears to be eliminable,
6267 based on the insns in the loop that refer to it.
6268 LOOP_START is the first insn of the loop, and END is the end insn.
6270 If ELIMINATE_P is non-zero, actually do the elimination.
6272 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6273 determine whether invariant insns should be placed inside or at the
6274 start of the loop. */
6277 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6278 struct iv_class
*bl
;
6282 int threshold
, insn_count
;
6284 rtx reg
= bl
->biv
->dest_reg
;
6287 /* Scan all insns in the loop, stopping if we find one that uses the
6288 biv in a way that we cannot eliminate. */
6290 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6292 enum rtx_code code
= GET_CODE (p
);
6293 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6295 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6296 && reg_mentioned_p (reg
, PATTERN (p
))
6297 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6299 if (loop_dump_stream
)
6300 fprintf (loop_dump_stream
,
6301 "Cannot eliminate biv %d: biv used in insn %d.\n",
6302 bl
->regno
, INSN_UID (p
));
6309 if (loop_dump_stream
)
6310 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6311 bl
->regno
, eliminate_p
? "was" : "can be");
6318 /* If BL appears in X (part of the pattern of INSN), see if we can
6319 eliminate its use. If so, return 1. If not, return 0.
6321 If BIV does not appear in X, return 1.
6323 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6324 where extra insns should be added. Depending on how many items have been
6325 moved out of the loop, it will either be before INSN or at the start of
6329 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6331 struct iv_class
*bl
;
6335 enum rtx_code code
= GET_CODE (x
);
6336 rtx reg
= bl
->biv
->dest_reg
;
6337 enum machine_mode mode
= GET_MODE (reg
);
6338 struct induction
*v
;
6347 /* If we haven't already been able to do something with this BIV,
6348 we can't eliminate it. */
6354 /* If this sets the BIV, it is not a problem. */
6355 if (SET_DEST (x
) == reg
)
6358 /* If this is an insn that defines a giv, it is also ok because
6359 it will go away when the giv is reduced. */
6360 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6361 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6365 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6367 /* Can replace with any giv that was reduced and
6368 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6369 Require a constant for MULT_VAL, so we know it's nonzero.
6370 ??? We disable this optimization to avoid potential
6373 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6374 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6375 && v
->add_val
== const0_rtx
6376 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6380 /* If the giv V had the auto-inc address optimization applied
6381 to it, and INSN occurs between the giv insn and the biv
6382 insn, then we must adjust the value used here.
6383 This is rare, so we don't bother to do so. */
6385 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6386 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6387 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6388 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6394 /* If the giv has the opposite direction of change,
6395 then reverse the comparison. */
6396 if (INTVAL (v
->mult_val
) < 0)
6397 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6398 const0_rtx
, v
->new_reg
);
6402 /* We can probably test that giv's reduced reg. */
6403 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6407 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6408 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6409 Require a constant for MULT_VAL, so we know it's nonzero.
6410 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6411 overflow problem. */
6413 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6414 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6415 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6417 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6418 || GET_CODE (v
->add_val
) == LABEL_REF
6419 || GET_CODE (v
->add_val
) == CONST
6420 || (GET_CODE (v
->add_val
) == REG
6421 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6423 /* If the giv V had the auto-inc address optimization applied
6424 to it, and INSN occurs between the giv insn and the biv
6425 insn, then we must adjust the value used here.
6426 This is rare, so we don't bother to do so. */
6428 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6429 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6430 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6431 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6437 /* If the giv has the opposite direction of change,
6438 then reverse the comparison. */
6439 if (INTVAL (v
->mult_val
) < 0)
6440 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6443 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6444 copy_rtx (v
->add_val
));
6446 /* Replace biv with the giv's reduced register. */
6447 update_reg_last_use (v
->add_val
, insn
);
6448 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6451 /* Insn doesn't support that constant or invariant. Copy it
6452 into a register (it will be a loop invariant.) */
6453 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6455 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6458 /* Substitute the new register for its invariant value in
6459 the compare expression. */
6460 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6461 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6470 case GT
: case GE
: case GTU
: case GEU
:
6471 case LT
: case LE
: case LTU
: case LEU
:
6472 /* See if either argument is the biv. */
6473 if (XEXP (x
, 0) == reg
)
6474 arg
= XEXP (x
, 1), arg_operand
= 1;
6475 else if (XEXP (x
, 1) == reg
)
6476 arg
= XEXP (x
, 0), arg_operand
= 0;
6480 if (CONSTANT_P (arg
))
6482 /* First try to replace with any giv that has constant positive
6483 mult_val and constant add_val. We might be able to support
6484 negative mult_val, but it seems complex to do it in general. */
6486 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6487 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6488 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6489 || GET_CODE (v
->add_val
) == LABEL_REF
6490 || GET_CODE (v
->add_val
) == CONST
6491 || (GET_CODE (v
->add_val
) == REG
6492 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6493 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6496 /* If the giv V had the auto-inc address optimization applied
6497 to it, and INSN occurs between the giv insn and the biv
6498 insn, then we must adjust the value used here.
6499 This is rare, so we don't bother to do so. */
6501 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6502 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6503 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6504 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6510 /* Replace biv with the giv's reduced reg. */
6511 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6513 /* If all constants are actually constant integers and
6514 the derived constant can be directly placed in the COMPARE,
6516 if (GET_CODE (arg
) == CONST_INT
6517 && GET_CODE (v
->mult_val
) == CONST_INT
6518 && GET_CODE (v
->add_val
) == CONST_INT
6519 && validate_change (insn
, &XEXP (x
, arg_operand
),
6520 GEN_INT (INTVAL (arg
)
6521 * INTVAL (v
->mult_val
)
6522 + INTVAL (v
->add_val
)), 0))
6525 /* Otherwise, load it into a register. */
6526 tem
= gen_reg_rtx (mode
);
6527 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6528 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6531 /* If that failed, put back the change we made above. */
6532 XEXP (x
, 1-arg_operand
) = reg
;
6535 /* Look for giv with positive constant mult_val and nonconst add_val.
6536 Insert insns to calculate new compare value.
6537 ??? Turn this off due to possible overflow. */
6539 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6540 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6541 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6547 /* If the giv V had the auto-inc address optimization applied
6548 to it, and INSN occurs between the giv insn and the biv
6549 insn, then we must adjust the value used here.
6550 This is rare, so we don't bother to do so. */
6552 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6553 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6554 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6555 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6561 tem
= gen_reg_rtx (mode
);
6563 /* Replace biv with giv's reduced register. */
6564 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6567 /* Compute value to compare against. */
6568 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6569 /* Use it in this insn. */
6570 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6571 if (apply_change_group ())
6575 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6577 if (invariant_p (arg
) == 1)
6579 /* Look for giv with constant positive mult_val and nonconst
6580 add_val. Insert insns to compute new compare value.
6581 ??? Turn this off due to possible overflow. */
6583 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6584 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6585 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6591 /* If the giv V had the auto-inc address optimization applied
6592 to it, and INSN occurs between the giv insn and the biv
6593 insn, then we must adjust the value used here.
6594 This is rare, so we don't bother to do so. */
6596 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6597 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6598 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6599 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6605 tem
= gen_reg_rtx (mode
);
6607 /* Replace biv with giv's reduced register. */
6608 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6611 /* Compute value to compare against. */
6612 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6614 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6615 if (apply_change_group ())
6620 /* This code has problems. Basically, you can't know when
6621 seeing if we will eliminate BL, whether a particular giv
6622 of ARG will be reduced. If it isn't going to be reduced,
6623 we can't eliminate BL. We can try forcing it to be reduced,
6624 but that can generate poor code.
6626 The problem is that the benefit of reducing TV, below should
6627 be increased if BL can actually be eliminated, but this means
6628 we might have to do a topological sort of the order in which
6629 we try to process biv. It doesn't seem worthwhile to do
6630 this sort of thing now. */
6633 /* Otherwise the reg compared with had better be a biv. */
6634 if (GET_CODE (arg
) != REG
6635 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6638 /* Look for a pair of givs, one for each biv,
6639 with identical coefficients. */
6640 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6642 struct induction
*tv
;
6644 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6647 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6648 if (! tv
->ignore
&& ! tv
->maybe_dead
6649 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6650 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6651 && tv
->mode
== mode
)
6653 /* If the giv V had the auto-inc address optimization applied
6654 to it, and INSN occurs between the giv insn and the biv
6655 insn, then we must adjust the value used here.
6656 This is rare, so we don't bother to do so. */
6658 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6659 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6660 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6661 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6667 /* Replace biv with its giv's reduced reg. */
6668 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6669 /* Replace other operand with the other giv's
6671 XEXP (x
, arg_operand
) = tv
->new_reg
;
6678 /* If we get here, the biv can't be eliminated. */
6682 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6683 biv is used in it, since it will be replaced. */
6684 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6685 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6690 /* See if any subexpression fails elimination. */
6691 fmt
= GET_RTX_FORMAT (code
);
6692 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6697 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6698 eliminate_p
, where
))
6703 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6704 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6705 eliminate_p
, where
))
6714 /* Return nonzero if the last use of REG
6715 is in an insn following INSN in the same basic block. */
6718 last_use_this_basic_block (reg
, insn
)
6724 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6727 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6733 /* Called via `note_stores' to record the initial value of a biv. Here we
6734 just record the location of the set and process it later. */
6737 record_initial (dest
, set
)
6741 struct iv_class
*bl
;
6743 if (GET_CODE (dest
) != REG
6744 || REGNO (dest
) >= max_reg_before_loop
6745 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6748 bl
= reg_biv_class
[REGNO (dest
)];
6750 /* If this is the first set found, record it. */
6751 if (bl
->init_insn
== 0)
6753 bl
->init_insn
= note_insn
;
6758 /* If any of the registers in X are "old" and currently have a last use earlier
6759 than INSN, update them to have a last use of INSN. Their actual last use
6760 will be the previous insn but it will not have a valid uid_luid so we can't
6764 update_reg_last_use (x
, insn
)
6768 /* Check for the case where INSN does not have a valid luid. In this case,
6769 there is no need to modify the regno_last_uid, as this can only happen
6770 when code is inserted after the loop_end to set a pseudo's final value,
6771 and hence this insn will never be the last use of x. */
6772 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6773 && INSN_UID (insn
) < max_uid_for_loop
6774 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6775 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6779 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6780 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6783 update_reg_last_use (XEXP (x
, i
), insn
);
6784 else if (fmt
[i
] == 'E')
6785 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6786 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6791 /* Given a jump insn JUMP, return the condition that will cause it to branch
6792 to its JUMP_LABEL. If the condition cannot be understood, or is an
6793 inequality floating-point comparison which needs to be reversed, 0 will
6796 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6797 insn used in locating the condition was found. If a replacement test
6798 of the condition is desired, it should be placed in front of that
6799 insn and we will be sure that the inputs are still valid.
6801 The condition will be returned in a canonical form to simplify testing by
6802 callers. Specifically:
6804 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6805 (2) Both operands will be machine operands; (cc0) will have been replaced.
6806 (3) If an operand is a constant, it will be the second operand.
6807 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6808 for GE, GEU, and LEU. */
6811 get_condition (jump
, earliest
)
6820 int reverse_code
= 0;
6821 int did_reverse_condition
= 0;
6823 /* If this is not a standard conditional jump, we can't parse it. */
6824 if (GET_CODE (jump
) != JUMP_INSN
6825 || ! condjump_p (jump
) || simplejump_p (jump
))
6828 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6829 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6830 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6835 /* If this branches to JUMP_LABEL when the condition is false, reverse
6837 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6838 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6839 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6841 /* If we are comparing a register with zero, see if the register is set
6842 in the previous insn to a COMPARE or a comparison operation. Perform
6843 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6846 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6848 /* Set non-zero when we find something of interest. */
6852 /* If comparison with cc0, import actual comparison from compare
6856 if ((prev
= prev_nonnote_insn (prev
)) == 0
6857 || GET_CODE (prev
) != INSN
6858 || (set
= single_set (prev
)) == 0
6859 || SET_DEST (set
) != cc0_rtx
)
6862 op0
= SET_SRC (set
);
6863 op1
= CONST0_RTX (GET_MODE (op0
));
6869 /* If this is a COMPARE, pick up the two things being compared. */
6870 if (GET_CODE (op0
) == COMPARE
)
6872 op1
= XEXP (op0
, 1);
6873 op0
= XEXP (op0
, 0);
6876 else if (GET_CODE (op0
) != REG
)
6879 /* Go back to the previous insn. Stop if it is not an INSN. We also
6880 stop if it isn't a single set or if it has a REG_INC note because
6881 we don't want to bother dealing with it. */
6883 if ((prev
= prev_nonnote_insn (prev
)) == 0
6884 || GET_CODE (prev
) != INSN
6885 || FIND_REG_INC_NOTE (prev
, 0)
6886 || (set
= single_set (prev
)) == 0)
6889 /* If this is setting OP0, get what it sets it to if it looks
6891 if (rtx_equal_p (SET_DEST (set
), op0
))
6893 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6895 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6898 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6899 && (GET_MODE_BITSIZE (inner_mode
)
6900 <= HOST_BITS_PER_WIDE_INT
)
6901 && (STORE_FLAG_VALUE
6902 & ((HOST_WIDE_INT
) 1
6903 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6904 #ifdef FLOAT_STORE_FLAG_VALUE
6906 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6907 && FLOAT_STORE_FLAG_VALUE
< 0)
6910 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6912 else if (((code
== EQ
6914 && (GET_MODE_BITSIZE (inner_mode
)
6915 <= HOST_BITS_PER_WIDE_INT
)
6916 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6917 && (STORE_FLAG_VALUE
6918 & ((HOST_WIDE_INT
) 1
6919 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6920 #ifdef FLOAT_STORE_FLAG_VALUE
6922 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6923 && FLOAT_STORE_FLAG_VALUE
< 0)
6926 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6928 /* We might have reversed a LT to get a GE here. But this wasn't
6929 actually the comparison of data, so we don't flag that we
6930 have had to reverse the condition. */
6931 did_reverse_condition
^= 1;
6939 else if (reg_set_p (op0
, prev
))
6940 /* If this sets OP0, but not directly, we have to give up. */
6945 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6946 code
= GET_CODE (x
);
6949 code
= reverse_condition (code
);
6950 did_reverse_condition
^= 1;
6954 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6960 /* If constant is first, put it last. */
6961 if (CONSTANT_P (op0
))
6962 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6964 /* If OP0 is the result of a comparison, we weren't able to find what
6965 was really being compared, so fail. */
6966 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6969 /* Canonicalize any ordered comparison with integers involving equality
6970 if we can do computations in the relevant mode and we do not
6973 if (GET_CODE (op1
) == CONST_INT
6974 && GET_MODE (op0
) != VOIDmode
6975 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
6977 HOST_WIDE_INT const_val
= INTVAL (op1
);
6978 unsigned HOST_WIDE_INT uconst_val
= const_val
;
6979 unsigned HOST_WIDE_INT max_val
6980 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
6985 if (const_val
!= max_val
>> 1)
6986 code
= LT
, op1
= GEN_INT (const_val
+ 1);
6991 != (((HOST_WIDE_INT
) 1
6992 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
6993 code
= GT
, op1
= GEN_INT (const_val
- 1);
6997 if (uconst_val
!= max_val
)
6998 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7002 if (uconst_val
!= 0)
7003 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7008 /* If this was floating-point and we reversed anything other than an
7009 EQ or NE, return zero. */
7010 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7011 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7013 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7017 /* Never return CC0; return zero instead. */
7022 return gen_rtx (code
, VOIDmode
, op0
, op1
);
7025 /* Similar to above routine, except that we also put an invariant last
7026 unless both operands are invariants. */
7029 get_condition_for_loop (x
)
7032 rtx comparison
= get_condition (x
, NULL_PTR
);
7035 || ! invariant_p (XEXP (comparison
, 0))
7036 || invariant_p (XEXP (comparison
, 1)))
7039 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7040 XEXP (comparison
, 1), XEXP (comparison
, 0));
7044 /* Analyze a loop in order to instrument it with the use of count register.
7045 loop_start and loop_end are the first and last insns of the loop.
7046 This function works in cooperation with insert_bct ().
7047 loop_can_insert_bct[loop_num] is set according to whether the optimization
7048 is applicable to the loop. When it is applicable, the following variables
7050 loop_start_value[loop_num]
7051 loop_comparison_value[loop_num]
7052 loop_increment[loop_num]
7053 loop_comparison_code[loop_num] */
7056 void analyze_loop_iterations (loop_start
, loop_end
)
7057 rtx loop_start
, loop_end
;
7059 rtx comparison
, comparison_value
;
7060 rtx iteration_var
, initial_value
, increment
;
7061 enum rtx_code comparison_code
;
7067 /* loop_variable mode */
7068 enum machine_mode original_mode
;
7070 /* find the number of the loop */
7071 int loop_num
= loop_number (loop_start
, loop_end
);
7073 /* we change our mind only when we are sure that loop will be instrumented */
7074 loop_can_insert_bct
[loop_num
] = 0;
7076 /* is the optimization suppressed. */
7077 if ( !flag_branch_on_count_reg
)
7080 /* make sure that count-reg is not in use */
7081 if (loop_used_count_register
[loop_num
]){
7082 if (loop_dump_stream
)
7083 fprintf (loop_dump_stream
,
7084 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7089 /* make sure that the function has no indirect jumps. */
7090 if (indirect_jump_in_function
){
7091 if (loop_dump_stream
)
7092 fprintf (loop_dump_stream
,
7093 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7098 /* make sure that the last loop insn is a conditional jump */
7099 last_loop_insn
= PREV_INSN (loop_end
);
7100 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7101 if (loop_dump_stream
)
7102 fprintf (loop_dump_stream
,
7103 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7108 /* First find the iteration variable. If the last insn is a conditional
7109 branch, and the insn preceding it tests a register value, make that
7110 register the iteration variable. */
7112 /* We used to use prev_nonnote_insn here, but that fails because it might
7113 accidentally get the branch for a contained loop if the branch for this
7114 loop was deleted. We can only trust branches immediately before the
7117 comparison
= get_condition_for_loop (last_loop_insn
);
7118 /* ??? Get_condition may switch position of induction variable and
7119 invariant register when it canonicalizes the comparison. */
7121 if (comparison
== 0) {
7122 if (loop_dump_stream
)
7123 fprintf (loop_dump_stream
,
7124 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7129 comparison_code
= GET_CODE (comparison
);
7130 iteration_var
= XEXP (comparison
, 0);
7131 comparison_value
= XEXP (comparison
, 1);
7133 original_mode
= GET_MODE (iteration_var
);
7134 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7135 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7136 if (loop_dump_stream
)
7137 fprintf (loop_dump_stream
,
7138 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7143 /* get info about loop bounds and increment */
7144 iteration_info (iteration_var
, &initial_value
, &increment
,
7145 loop_start
, loop_end
);
7147 /* make sure that all required loop data were found */
7148 if (!(initial_value
&& increment
&& comparison_value
7149 && invariant_p (comparison_value
) && invariant_p (increment
)
7150 && ! indirect_jump_in_function
))
7152 if (loop_dump_stream
) {
7153 fprintf (loop_dump_stream
,
7154 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7155 if (!(initial_value
&& increment
&& comparison_value
)) {
7156 fprintf (loop_dump_stream
, "\tbounds not available: ");
7157 if ( ! initial_value
)
7158 fprintf (loop_dump_stream
, "initial ");
7160 fprintf (loop_dump_stream
, "increment ");
7161 if ( ! comparison_value
)
7162 fprintf (loop_dump_stream
, "comparison ");
7163 fprintf (loop_dump_stream
, "\n");
7165 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7166 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7171 /* make sure that the increment is constant */
7172 if (GET_CODE (increment
) != CONST_INT
) {
7173 if (loop_dump_stream
)
7174 fprintf (loop_dump_stream
,
7175 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7180 /* make sure that the loop contains neither function call, nor jump on table.
7181 (the count register might be altered by the called function, and might
7182 be used for a branch on table). */
7183 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7184 if (GET_CODE (insn
) == CALL_INSN
){
7185 if (loop_dump_stream
)
7186 fprintf (loop_dump_stream
,
7187 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7192 if (GET_CODE (insn
) == JUMP_INSN
7193 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7194 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7195 if (loop_dump_stream
)
7196 fprintf (loop_dump_stream
,
7197 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7203 /* At this point, we are sure that the loop can be instrumented with BCT.
7204 Some of the loops, however, will not be instrumented - the final decision
7205 is taken by insert_bct () */
7206 if (loop_dump_stream
)
7207 fprintf (loop_dump_stream
,
7208 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7211 /* mark all enclosing loops that they cannot use count register */
7212 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7213 marking here may prevent instrumenting an enclosing loop that could
7214 actually be instrumented. But since this is rare, it is safer to mark
7215 here in case the order of calling (analyze/insert)_bct would be changed. */
7216 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7217 loop_used_count_register
[i
] = 1;
7219 /* Set data structures which will be used by the instrumentation phase */
7220 loop_start_value
[loop_num
] = initial_value
;
7221 loop_comparison_value
[loop_num
] = comparison_value
;
7222 loop_increment
[loop_num
] = increment
;
7223 loop_comparison_code
[loop_num
] = comparison_code
;
7224 loop_can_insert_bct
[loop_num
] = 1;
7228 /* instrument loop for insertion of bct instruction. We distinguish between
7229 loops with compile-time bounds, to those with run-time bounds. The loop
7230 behaviour is analized according to the following characteristics/variables:
7232 ; comparison-value: the value to which the iteration counter is compared.
7233 ; initial-value: iteration-counter initial value.
7234 ; increment: iteration-counter increment.
7235 ; Computed variables:
7236 ; increment-direction: the sign of the increment.
7237 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7238 ; range-direction: sign (comparison-value - initial-value)
7239 We give up on the following cases:
7240 ; loop variable overflow.
7241 ; run-time loop bounds with comparison code NE.
7245 insert_bct (loop_start
, loop_end
)
7246 rtx loop_start
, loop_end
;
7248 rtx initial_value
, comparison_value
, increment
;
7249 enum rtx_code comparison_code
;
7251 int increment_direction
, compare_direction
;
7254 /* if the loop condition is <= or >=, the number of iteration
7255 is 1 more than the range of the bounds of the loop */
7256 int add_iteration
= 0;
7258 /* the only machine mode we work with - is the integer of the size that the
7260 enum machine_mode loop_var_mode
= SImode
;
7262 int loop_num
= loop_number (loop_start
, loop_end
);
7264 /* get loop-variables. No need to check that these are valid - already
7265 checked in analyze_loop_iterations (). */
7266 comparison_code
= loop_comparison_code
[loop_num
];
7267 initial_value
= loop_start_value
[loop_num
];
7268 comparison_value
= loop_comparison_value
[loop_num
];
7269 increment
= loop_increment
[loop_num
];
7271 /* check analyze_loop_iterations decision for this loop. */
7272 if (! loop_can_insert_bct
[loop_num
]){
7273 if (loop_dump_stream
)
7274 fprintf (loop_dump_stream
,
7275 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7280 /* make sure that the loop was not fully unrolled. */
7281 if (loop_unroll_factor
[loop_num
] == -1){
7282 if (loop_dump_stream
)
7283 fprintf (loop_dump_stream
, "insert_bct %d: was completely unrolled\n", loop_num
);
7287 /* make sure that the last loop insn is a conditional jump .
7288 This check is repeated from analyze_loop_iterations (),
7289 because unrolling might have changed that. */
7290 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7291 || !condjump_p (PREV_INSN (loop_end
))) {
7292 if (loop_dump_stream
)
7293 fprintf (loop_dump_stream
,
7294 "insert_bct: not instrumenting BCT because of invalid branch\n");
7298 /* fix increment in case loop was unrolled. */
7299 if (loop_unroll_factor
[loop_num
] > 1)
7300 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7302 /* determine properties and directions of the loop */
7303 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7304 switch ( comparison_code
) {
7309 compare_direction
= 1;
7316 compare_direction
= -1;
7320 /* in this case we cannot know the number of iterations */
7321 if (loop_dump_stream
)
7322 fprintf (loop_dump_stream
,
7323 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7330 compare_direction
= 1;
7336 compare_direction
= -1;
7339 compare_direction
= 0;
7346 /* make sure that the loop does not end by an overflow */
7347 if (compare_direction
!= increment_direction
) {
7348 if (loop_dump_stream
)
7349 fprintf (loop_dump_stream
,
7350 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7355 /* try to instrument the loop. */
7357 /* Handle the simpler case, where the bounds are known at compile time. */
7358 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7361 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7363 /* check the relation between compare-val and initial-val */
7364 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7365 int range_direction
= (difference
> 0) ? 1 : -1;
7367 /* make sure the loop executes enough iterations to gain from BCT */
7368 if (difference
> -3 && difference
< 3) {
7369 if (loop_dump_stream
)
7370 fprintf (loop_dump_stream
,
7371 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7376 /* make sure that the loop executes at least once */
7377 if ((range_direction
== 1 && compare_direction
== -1)
7378 || (range_direction
== -1 && compare_direction
== 1))
7380 if (loop_dump_stream
)
7381 fprintf (loop_dump_stream
,
7382 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7387 /* make sure that the loop does not end by an overflow (in compile time
7388 bounds we must have an additional check for overflow, because here
7389 we also support the compare code of 'NE'. */
7390 if (comparison_code
== NE
7391 && increment_direction
!= range_direction
) {
7392 if (loop_dump_stream
)
7393 fprintf (loop_dump_stream
,
7394 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7399 /* Determine the number of iterations by:
7401 ; compare-val - initial-val + (increment -1) + additional-iteration
7402 ; num_iterations = -----------------------------------------------------------------
7405 difference
= (range_direction
> 0) ? difference
: -difference
;
7407 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7408 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7409 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7410 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7411 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7414 if (increment_value_abs
== 0) {
7415 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7418 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7419 / increment_value_abs
;
7422 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7424 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7426 /* Done with this loop. */
7430 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7431 /* In this case we generate run_time calculation of the number of iterations */
7433 /* With runtime bounds, if the compare is of the form '!=' we give up */
7434 if (comparison_code
== NE
) {
7435 if (loop_dump_stream
)
7436 fprintf (loop_dump_stream
,
7437 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7443 /* We rely on the existence of run-time guard to ensure that the
7444 loop executes at least once. */
7446 rtx iterations_num_reg
;
7448 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7450 /* make sure that the increment is a power of two, otherwise (an
7451 expensive) divide is needed. */
7452 if (exact_log2 (increment_value_abs
) == -1)
7454 if (loop_dump_stream
)
7455 fprintf (loop_dump_stream
,
7456 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7460 /* compute the number of iterations */
7463 /* CYGNUS LOCAL: HAIFA bug fix */
7466 /* Again, the number of iterations is calculated by:
7468 ; compare-val - initial-val + (increment -1) + additional-iteration
7469 ; num_iterations = -----------------------------------------------------------------
7472 /* ??? Do we have to call copy_rtx here before passing rtx to
7474 if (compare_direction
> 0) {
7475 /* <, <= :the loop variable is increasing */
7476 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7477 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7480 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7481 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7484 if (increment_value_abs
- 1 + add_iteration
!= 0)
7485 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7486 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7487 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7489 if (increment_value_abs
!= 1)
7491 /* ??? This will generate an expensive divide instruction for
7492 most targets. The original authors apparently expected this
7493 to be a shift, since they test for power-of-2 divisors above,
7494 but just naively generating a divide instruction will not give
7495 a shift. It happens to work for the PowerPC target because
7496 the rs6000.md file has a divide pattern that emits shifts.
7497 It will probably not work for any other target. */
7498 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7500 GEN_INT (increment_value_abs
),
7501 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7504 iterations_num_reg
= temp_reg
;
7505 /* END CYGNUS LOCAL: HAIFA bug fix */
7507 sequence
= gen_sequence ();
7509 emit_insn_before (sequence
, loop_start
);
7510 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7514 /* instrument loop by inserting a bct in it. This is done in the following way:
7515 1. A new register is created and assigned the hard register number of the count
7517 2. In the head of the loop the new variable is initialized by the value passed in the
7518 loop_num_iterations parameter.
7519 3. At the end of the loop, comparison of the register with 0 is generated.
7520 The created comparison follows the pattern defined for the
7521 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7523 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7524 not used elsewhere, it will be eliminated by data-flow analisys. */
7527 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7528 rtx loop_start
, loop_end
;
7529 rtx loop_num_iterations
;
7531 rtx temp_reg1
, temp_reg2
;
7535 enum machine_mode loop_var_mode
= SImode
;
7537 #ifdef HAVE_decrement_and_branch_on_count
7538 if (HAVE_decrement_and_branch_on_count
)
7540 if (loop_dump_stream
)
7541 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7543 /* eliminate the check on the old variable */
7544 delete_insn (PREV_INSN (loop_end
));
7545 delete_insn (PREV_INSN (loop_end
));
7547 /* insert the label which will delimit the start of the loop */
7548 start_label
= gen_label_rtx ();
7549 emit_label_after (start_label
, loop_start
);
7551 /* insert initialization of the count register into the loop header */
7553 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7554 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7556 /* this will be count register */
7557 temp_reg2
= gen_rtx (REG
, loop_var_mode
, COUNT_REGISTER_REGNUM
);
7558 /* we have to move the value to the count register from an GPR
7559 because rtx pointed to by loop_num_iterations could contain
7560 expression which cannot be moved into count register */
7561 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7563 sequence
= gen_sequence ();
7565 emit_insn_after (sequence
, loop_start
);
7567 /* insert new comparison on the count register instead of the
7568 old one, generating the needed BCT pattern (that will be
7569 later recognized by assembly generation phase). */
7570 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7572 LABEL_NUSES (start_label
)++;
7575 #endif /* HAVE_decrement_and_branch_on_count */
7578 /* calculate the uid of the given loop */
7580 loop_number (loop_start
, loop_end
)
7581 rtx loop_start
, loop_end
;
7585 /* assume that this insn contains the LOOP_START
7586 note, so it will not be changed by the loop unrolling */
7587 loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7588 /* sanity check - should never happen */
7596 /* Scan the function and determine whether it has indirect (computed) jumps.
7598 This is taken mostly from flow.c; similar code exists elsewhere
7599 in the compiler. It may be useful to put this into rtlanal.c. */
7601 indirect_jump_in_function_p (start
)
7605 int is_indirect_jump
= 0;
7607 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
7608 if (computed_jump_p (insn
))
7611 /* END CYGNUS LOCAL haifa */