1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* For each loop, remember its unrolling factor (if at all).
95 contents of the array:
97 -1: completely unrolled - no further instrumentation is needed.
98 >1: holds the exact amount of unrolling. */
100 int *loop_unroll_factor
;
101 int *loop_unroll_iter
;
103 /* loop parameters for arithmetic loops. These loops have a loop variable
104 which is initialized to loop_start_value, incremented in each iteration
105 by "loop_increment". At the end of the iteration the loop variable is
106 compared to the loop_comparison_value (using loop_comparison_code). */
109 rtx
*loop_comparison_value
;
110 rtx
*loop_start_value
;
111 enum rtx_code
*loop_comparison_code
;
115 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
116 really a loop (an insn outside the loop branches into it). */
118 static char *loop_invalid
;
120 /* Indexed by loop number, links together all LABEL_REFs which refer to
121 code labels outside the loop. Used by routines that need to know all
122 loop exits, such as final_biv_value and final_giv_value.
124 This does not include loop exits due to return instructions. This is
125 because all bivs and givs are pseudos, and hence must be dead after a
126 return, so the presense of a return does not affect any of the
127 optimizations that use this info. It is simpler to just not include return
128 instructions on this list. */
130 rtx
*loop_number_exit_labels
;
132 /* Indexed by loop number, counts the number of LABEL_REFs on
133 loop_number_exit_labels for this loop and all loops nested inside it. */
135 int *loop_number_exit_count
;
137 /* Holds the number of loop iterations. It is zero if the number could not be
138 calculated. Must be unsigned since the number of iterations can
139 be as high as 2^wordsize-1. For loops with a wider iterator, this number
140 will will be zero if the number of loop iterations is too large for an
141 unsigned integer to hold. */
143 unsigned HOST_WIDE_INT loop_n_iterations
;
145 /* Nonzero if there is a subroutine call in the current loop. */
147 static int loop_has_call
;
149 /* Nonzero if there is a volatile memory reference in the current
152 static int loop_has_volatile
;
154 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
155 current loop. A continue statement will generate a branch to
156 NEXT_INSN (loop_continue). */
158 static rtx loop_continue
;
160 /* Indexed by register number, contains the number of times the reg
161 is set during the loop being scanned.
162 During code motion, a negative value indicates a reg that has been
163 made a candidate; in particular -2 means that it is an candidate that
164 we know is equal to a constant and -1 means that it is an candidate
165 not known equal to a constant.
166 After code motion, regs moved have 0 (which is accurate now)
167 while the failed candidates have the original number of times set.
169 Therefore, at all times, == 0 indicates an invariant register;
170 < 0 a conditionally invariant one. */
172 static int *n_times_set
;
174 /* Original value of n_times_set; same except that this value
175 is not set negative for a reg whose sets have been made candidates
176 and not set to 0 for a reg that is moved. */
178 static int *n_times_used
;
180 /* Index by register number, 1 indicates that the register
181 cannot be moved or strength reduced. */
183 static char *may_not_optimize
;
185 /* Nonzero means reg N has already been moved out of one loop.
186 This reduces the desire to move it out of another. */
188 static char *moved_once
;
190 /* Array of MEMs that are stored in this loop. If there are too many to fit
191 here, we just turn on unknown_address_altered. */
193 #define NUM_STORES 30
194 static rtx loop_store_mems
[NUM_STORES
];
196 /* Index of first available slot in above array. */
197 static int loop_store_mems_idx
;
199 /* Nonzero if we don't know what MEMs were changed in the current loop.
200 This happens if the loop contains a call (in which case `loop_has_call'
201 will also be set) or if we store into more than NUM_STORES MEMs. */
203 static int unknown_address_altered
;
205 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
206 static int num_movables
;
208 /* Count of memory write instructions discovered in the loop. */
209 static int num_mem_sets
;
211 /* Number of loops contained within the current one, including itself. */
212 static int loops_enclosed
;
214 /* Bound on pseudo register number before loop optimization.
215 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
216 int max_reg_before_loop
;
218 /* This obstack is used in product_cheap_p to allocate its rtl. It
219 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
220 If we used the same obstack that it did, we would be deallocating
223 static struct obstack temp_obstack
;
225 /* This is where the pointer to the obstack being used for RTL is stored. */
227 extern struct obstack
*rtl_obstack
;
229 #define obstack_chunk_alloc xmalloc
230 #define obstack_chunk_free free
232 extern char *oballoc ();
234 /* During the analysis of a loop, a chain of `struct movable's
235 is made to record all the movable insns found.
236 Then the entire chain can be scanned to decide which to move. */
240 rtx insn
; /* A movable insn */
241 rtx set_src
; /* The expression this reg is set from. */
242 rtx set_dest
; /* The destination of this SET. */
243 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
244 of any registers used within the LIBCALL. */
245 int consec
; /* Number of consecutive following insns
246 that must be moved with this one. */
247 int regno
; /* The register it sets */
248 short lifetime
; /* lifetime of that register;
249 may be adjusted when matching movables
250 that load the same value are found. */
251 short savings
; /* Number of insns we can move for this reg,
252 including other movables that force this
253 or match this one. */
254 unsigned int cond
: 1; /* 1 if only conditionally movable */
255 unsigned int force
: 1; /* 1 means MUST move this insn */
256 unsigned int global
: 1; /* 1 means reg is live outside this loop */
257 /* If PARTIAL is 1, GLOBAL means something different:
258 that the reg is live outside the range from where it is set
259 to the following label. */
260 unsigned int done
: 1; /* 1 inhibits further processing of this */
262 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
263 In particular, moving it does not make it
265 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
266 load SRC, rather than copying INSN. */
267 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
268 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
269 that we should avoid changing when clearing
270 the rest of the reg. */
271 struct movable
*match
; /* First entry for same value */
272 struct movable
*forces
; /* An insn that must be moved if this is */
273 struct movable
*next
;
276 FILE *loop_dump_stream
;
278 /* Forward declarations. */
280 static void find_and_verify_loops ();
281 static void mark_loop_jump ();
282 static void prescan_loop ();
283 static int reg_in_basic_block_p ();
284 static int consec_sets_invariant_p ();
285 static rtx
libcall_other_reg ();
286 static int labels_in_range_p ();
287 static void count_loop_regs_set ();
288 static void note_addr_stored ();
289 static int loop_reg_used_before_p ();
290 static void scan_loop ();
291 static void replace_call_address ();
292 static rtx
skip_consec_insns ();
293 static int libcall_benefit ();
294 static void ignore_some_movables ();
295 static void force_movables ();
296 static void combine_movables ();
297 static int rtx_equal_for_loop_p ();
298 static void move_movables ();
299 static void strength_reduce ();
300 static int valid_initial_value_p ();
301 static void find_mem_givs ();
302 static void record_biv ();
303 static void check_final_value ();
304 static void record_giv ();
305 static void update_giv_derive ();
306 static int basic_induction_var ();
307 static rtx
simplify_giv_expr ();
308 static int general_induction_var ();
309 static int consec_sets_giv ();
310 static int check_dbra_loop ();
311 static rtx
express_from ();
312 static int combine_givs_p ();
313 static void combine_givs ();
314 static int product_cheap_p ();
315 static int maybe_eliminate_biv ();
316 static int maybe_eliminate_biv_1 ();
317 static int last_use_this_basic_block ();
318 static void record_initial ();
319 static void update_reg_last_use ();
322 /* This is extern from unroll.c */
323 void iteration_info ();
325 /* Two main functions for implementing bct:
326 first - to be called before loop unrolling, and the second - after */
327 static void analyze_loop_iterations ();
328 static void insert_bct ();
330 /* Auxiliary function that inserts the bct pattern into the loop */
331 static void instrument_loop_bct ();
333 /* Indirect_jump_in_function is computed once per function. */
334 int indirect_jump_in_function
= 0;
335 static int indirect_jump_in_function_p ();
341 /* Relative gain of eliminating various kinds of operations. */
348 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
349 copy the value of the strength reduced giv to its original register. */
355 char *free_point
= (char *) oballoc (1);
356 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
358 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
360 /* We multiply by 2 to reconcile the difference in scale between
361 these two ways of computing costs. Otherwise the cost of a copy
362 will be far less than the cost of an add. */
366 /* Free the objects we just allocated. */
369 /* Initialize the obstack used for rtl in product_cheap_p. */
370 gcc_obstack_init (&temp_obstack
);
373 /* Entry point of this file. Perform loop optimization
374 on the current function. F is the first insn of the function
375 and DUMPFILE is a stream for output of a trace of actions taken
376 (or 0 if none should be output). */
379 loop_optimize (f
, dumpfile
)
380 /* f is the first instruction of a chain of insns for one function */
388 loop_dump_stream
= dumpfile
;
390 init_recog_no_volatile ();
391 init_alias_analysis ();
393 max_reg_before_loop
= max_reg_num ();
395 moved_once
= (char *) alloca (max_reg_before_loop
);
396 bzero (moved_once
, max_reg_before_loop
);
400 /* Count the number of loops. */
403 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
405 if (GET_CODE (insn
) == NOTE
406 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
410 /* Don't waste time if no loops. */
411 if (max_loop_num
== 0)
414 /* Get size to use for tables indexed by uids.
415 Leave some space for labels allocated by find_and_verify_loops. */
416 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
418 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
419 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
421 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
422 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
424 /* Allocate tables for recording each loop. We set each entry, so they need
426 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
427 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
428 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
429 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
430 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
431 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
434 /* Allocate for BCT optimization */
435 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
436 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
438 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
439 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
441 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
442 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
444 loop_unroll_iter
= (int *) alloca (max_loop_num
*sizeof (int));
445 bzero ((char *) loop_unroll_iter
, max_loop_num
* sizeof (int));
447 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
448 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
449 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
450 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
451 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
452 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
455 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
456 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
459 /* Find and process each loop.
460 First, find them, and record them in order of their beginnings. */
461 find_and_verify_loops (f
);
463 /* Now find all register lifetimes. This must be done after
464 find_and_verify_loops, because it might reorder the insns in the
466 reg_scan (f
, max_reg_num (), 1);
468 /* See if we went too far. */
469 if (get_max_uid () > max_uid_for_loop
)
472 /* Compute the mapping from uids to luids.
473 LUIDs are numbers assigned to insns, like uids,
474 except that luids increase monotonically through the code.
475 Don't assign luids to line-number NOTEs, so that the distance in luids
476 between two insns is not affected by -g. */
478 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
481 if (GET_CODE (insn
) != NOTE
482 || NOTE_LINE_NUMBER (insn
) <= 0)
483 uid_luid
[INSN_UID (insn
)] = ++i
;
485 /* Give a line number note the same luid as preceding insn. */
486 uid_luid
[INSN_UID (insn
)] = i
;
491 /* Don't leave gaps in uid_luid for insns that have been
492 deleted. It is possible that the first or last insn
493 using some register has been deleted by cross-jumping.
494 Make sure that uid_luid for that former insn's uid
495 points to the general area where that insn used to be. */
496 for (i
= 0; i
< max_uid_for_loop
; i
++)
498 uid_luid
[0] = uid_luid
[i
];
499 if (uid_luid
[0] != 0)
502 for (i
= 0; i
< max_uid_for_loop
; i
++)
503 if (uid_luid
[i
] == 0)
504 uid_luid
[i
] = uid_luid
[i
- 1];
506 /* Create a mapping from loops to BLOCK tree nodes. */
507 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
508 find_loop_tree_blocks ();
511 /* determine if the function has indirect jump. If it does,
512 we cannot instrument loops in this function with bct */
513 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
516 /* Now scan the loops, last ones first, since this means inner ones are done
517 before outer ones. */
518 for (i
= max_loop_num
-1; i
>= 0; i
--)
519 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
520 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
523 /* If debugging and unrolling loops, we must replicate the tree nodes
524 corresponding to the blocks inside the loop, so that the original one
525 to one mapping will remain. */
526 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
527 unroll_block_trees ();
530 /* Optimize one loop whose start is LOOP_START and end is END.
531 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
532 NOTE_INSN_LOOP_END. */
534 /* ??? Could also move memory writes out of loops if the destination address
535 is invariant, the source is invariant, the memory write is not volatile,
536 and if we can prove that no read inside the loop can read this address
537 before the write occurs. If there is a read of this address after the
538 write, then we can also mark the memory read as invariant. */
541 scan_loop (loop_start
, end
, nregs
)
547 /* 1 if we are scanning insns that could be executed zero times. */
549 /* 1 if we are scanning insns that might never be executed
550 due to a subroutine call which might exit before they are reached. */
552 /* For a rotated loop that is entered near the bottom,
553 this is the label at the top. Otherwise it is zero. */
555 /* Jump insn that enters the loop, or 0 if control drops in. */
556 rtx loop_entry_jump
= 0;
557 /* Place in the loop where control enters. */
559 /* Number of insns in the loop. */
564 /* The SET from an insn, if it is the only SET in the insn. */
566 /* Chain describing insns movable in current loop. */
567 struct movable
*movables
= 0;
568 /* Last element in `movables' -- so we can add elements at the end. */
569 struct movable
*last_movable
= 0;
570 /* Ratio of extra register life span we can justify
571 for saving an instruction. More if loop doesn't call subroutines
572 since in that case saving an insn makes more difference
573 and more registers are available. */
575 /* If we have calls, contains the insn in which a register was used
576 if it was used exactly once; contains const0_rtx if it was used more
578 rtx
*reg_single_usage
= 0;
579 /* Nonzero if we are scanning instructions in a sub-loop. */
582 n_times_set
= (int *) alloca (nregs
* sizeof (int));
583 n_times_used
= (int *) alloca (nregs
* sizeof (int));
584 may_not_optimize
= (char *) alloca (nregs
);
586 /* Determine whether this loop starts with a jump down to a test at
587 the end. This will occur for a small number of loops with a test
588 that is too complex to duplicate in front of the loop.
590 We search for the first insn or label in the loop, skipping NOTEs.
591 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
592 (because we might have a loop executed only once that contains a
593 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
594 (in case we have a degenerate loop).
596 Note that if we mistakenly think that a loop is entered at the top
597 when, in fact, it is entered at the exit test, the only effect will be
598 slightly poorer optimization. Making the opposite error can generate
599 incorrect code. Since very few loops now start with a jump to the
600 exit test, the code here to detect that case is very conservative. */
602 for (p
= NEXT_INSN (loop_start
);
604 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
605 && (GET_CODE (p
) != NOTE
606 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
607 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
613 /* Set up variables describing this loop. */
614 prescan_loop (loop_start
, end
);
615 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
617 /* If loop has a jump before the first label,
618 the true entry is the target of that jump.
619 Start scan from there.
620 But record in LOOP_TOP the place where the end-test jumps
621 back to so we can scan that after the end of the loop. */
622 if (GET_CODE (p
) == JUMP_INSN
)
626 /* Loop entry must be unconditional jump (and not a RETURN) */
628 && JUMP_LABEL (p
) != 0
629 /* Check to see whether the jump actually
630 jumps out of the loop (meaning it's no loop).
631 This case can happen for things like
632 do {..} while (0). If this label was generated previously
633 by loop, we can't tell anything about it and have to reject
635 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
636 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
637 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
639 loop_top
= next_label (scan_start
);
640 scan_start
= JUMP_LABEL (p
);
644 /* If SCAN_START was an insn created by loop, we don't know its luid
645 as required by loop_reg_used_before_p. So skip such loops. (This
646 test may never be true, but it's best to play it safe.)
648 Also, skip loops where we do not start scanning at a label. This
649 test also rejects loops starting with a JUMP_INSN that failed the
652 if (INSN_UID (scan_start
) >= max_uid_for_loop
653 || GET_CODE (scan_start
) != CODE_LABEL
)
655 if (loop_dump_stream
)
656 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
657 INSN_UID (loop_start
), INSN_UID (end
));
661 /* Count number of times each reg is set during this loop.
662 Set may_not_optimize[I] if it is not safe to move out
663 the setting of register I. If this loop has calls, set
664 reg_single_usage[I]. */
666 bzero ((char *) n_times_set
, nregs
* sizeof (int));
667 bzero (may_not_optimize
, nregs
);
671 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
672 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
675 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
676 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
678 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
679 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
680 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
682 if (loop_dump_stream
)
684 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
685 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
687 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
688 INSN_UID (loop_continue
));
691 /* Scan through the loop finding insns that are safe to move.
692 Set n_times_set negative for the reg being set, so that
693 this reg will be considered invariant for subsequent insns.
694 We consider whether subsequent insns use the reg
695 in deciding whether it is worth actually moving.
697 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
698 and therefore it is possible that the insns we are scanning
699 would never be executed. At such times, we must make sure
700 that it is safe to execute the insn once instead of zero times.
701 When MAYBE_NEVER is 0, all insns will be executed at least once
702 so that is not a problem. */
708 /* At end of a straight-in loop, we are done.
709 At end of a loop entered at the bottom, scan the top. */
722 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
723 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
725 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
726 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
729 if (GET_CODE (p
) == INSN
730 && (set
= single_set (p
))
731 && GET_CODE (SET_DEST (set
)) == REG
732 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
737 rtx src
= SET_SRC (set
);
738 rtx dependencies
= 0;
740 /* Figure out what to use as a source of this insn. If a REG_EQUIV
741 note is given or if a REG_EQUAL note with a constant operand is
742 specified, use it as the source and mark that we should move
743 this insn by calling emit_move_insn rather that duplicating the
746 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
748 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
750 src
= XEXP (temp
, 0), move_insn
= 1;
753 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
754 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
755 src
= XEXP (temp
, 0), move_insn
= 1;
756 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
758 src
= XEXP (temp
, 0);
759 /* A libcall block can use regs that don't appear in
760 the equivalent expression. To move the libcall,
761 we must move those regs too. */
762 dependencies
= libcall_other_reg (p
, src
);
766 /* Don't try to optimize a register that was made
767 by loop-optimization for an inner loop.
768 We don't know its life-span, so we can't compute the benefit. */
769 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
771 /* In order to move a register, we need to have one of three cases:
772 (1) it is used only in the same basic block as the set
773 (2) it is not a user variable and it is not used in the
774 exit test (this can cause the variable to be used
775 before it is set just like a user-variable).
776 (3) the set is guaranteed to be executed once the loop starts,
777 and the reg is not used until after that. */
778 else if (! ((! maybe_never
779 && ! loop_reg_used_before_p (set
, p
, loop_start
,
781 || (! REG_USERVAR_P (SET_DEST (set
))
782 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
783 || reg_in_basic_block_p (p
, SET_DEST (set
))))
785 else if ((tem
= invariant_p (src
))
786 && (dependencies
== 0
787 || (tem2
= invariant_p (dependencies
)) != 0)
788 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
790 = consec_sets_invariant_p (SET_DEST (set
),
791 n_times_set
[REGNO (SET_DEST (set
))],
793 /* If the insn can cause a trap (such as divide by zero),
794 can't move it unless it's guaranteed to be executed
795 once loop is entered. Even a function call might
796 prevent the trap insn from being reached
797 (since it might exit!) */
798 && ! ((maybe_never
|| call_passed
)
799 && may_trap_p (src
)))
801 register struct movable
*m
;
802 register int regno
= REGNO (SET_DEST (set
));
804 /* A potential lossage is where we have a case where two insns
805 can be combined as long as they are both in the loop, but
806 we move one of them outside the loop. For large loops,
807 this can lose. The most common case of this is the address
808 of a function being called.
810 Therefore, if this register is marked as being used exactly
811 once if we are in a loop with calls (a "large loop"), see if
812 we can replace the usage of this register with the source
813 of this SET. If we can, delete this insn.
815 Don't do this if P has a REG_RETVAL note or if we have
816 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
818 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
819 && reg_single_usage
[regno
] != const0_rtx
820 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
821 && (REGNO_LAST_UID (regno
)
822 == INSN_UID (reg_single_usage
[regno
]))
823 && n_times_set
[REGNO (SET_DEST (set
))] == 1
824 && ! side_effects_p (SET_SRC (set
))
825 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
826 #ifdef SMALL_REGISTER_CLASSES
827 && ! (SMALL_REGISTER_CLASSES
828 && GET_CODE (SET_SRC (set
)) == REG
829 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
831 /* This test is not redundant; SET_SRC (set) might be
832 a call-clobbered register and the life of REGNO
833 might span a call. */
834 && ! modified_between_p (SET_SRC (set
), p
,
835 reg_single_usage
[regno
])
836 && no_labels_between_p (p
, reg_single_usage
[regno
])
837 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
838 reg_single_usage
[regno
]))
840 /* Replace any usage in a REG_EQUAL note. Must copy the
841 new source, so that we don't get rtx sharing between the
842 SET_SOURCE and REG_NOTES of insn p. */
843 REG_NOTES (reg_single_usage
[regno
])
844 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
845 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
848 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
849 NOTE_SOURCE_FILE (p
) = 0;
850 n_times_set
[regno
] = 0;
854 m
= (struct movable
*) alloca (sizeof (struct movable
));
858 m
->dependencies
= dependencies
;
859 m
->set_dest
= SET_DEST (set
);
861 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
865 m
->move_insn
= move_insn
;
866 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
867 m
->savemode
= VOIDmode
;
869 /* Set M->cond if either invariant_p or consec_sets_invariant_p
870 returned 2 (only conditionally invariant). */
871 m
->cond
= ((tem
| tem1
| tem2
) > 1);
872 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
873 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
875 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
876 - uid_luid
[REGNO_FIRST_UID (regno
)]);
877 m
->savings
= n_times_used
[regno
];
878 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
879 m
->savings
+= libcall_benefit (p
);
880 n_times_set
[regno
] = move_insn
? -2 : -1;
881 /* Add M to the end of the chain MOVABLES. */
885 last_movable
->next
= m
;
890 /* Skip this insn, not checking REG_LIBCALL notes. */
891 p
= next_nonnote_insn (p
);
892 /* Skip the consecutive insns, if there are any. */
893 p
= skip_consec_insns (p
, m
->consec
);
894 /* Back up to the last insn of the consecutive group. */
895 p
= prev_nonnote_insn (p
);
897 /* We must now reset m->move_insn, m->is_equiv, and possibly
898 m->set_src to correspond to the effects of all the
900 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
902 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
905 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
906 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
907 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
912 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
915 /* If this register is always set within a STRICT_LOW_PART
916 or set to zero, then its high bytes are constant.
917 So clear them outside the loop and within the loop
918 just load the low bytes.
919 We must check that the machine has an instruction to do so.
920 Also, if the value loaded into the register
921 depends on the same register, this cannot be done. */
922 else if (SET_SRC (set
) == const0_rtx
923 && GET_CODE (NEXT_INSN (p
)) == INSN
924 && (set1
= single_set (NEXT_INSN (p
)))
925 && GET_CODE (set1
) == SET
926 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
927 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
928 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
930 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
932 register int regno
= REGNO (SET_DEST (set
));
933 if (n_times_set
[regno
] == 2)
935 register struct movable
*m
;
936 m
= (struct movable
*) alloca (sizeof (struct movable
));
939 m
->set_dest
= SET_DEST (set
);
947 /* If the insn may not be executed on some cycles,
948 we can't clear the whole reg; clear just high part.
949 Not even if the reg is used only within this loop.
956 Clearing x before the inner loop could clobber a value
957 being saved from the last time around the outer loop.
958 However, if the reg is not used outside this loop
959 and all uses of the register are in the same
960 basic block as the store, there is no problem.
962 If this insn was made by loop, we don't know its
963 INSN_LUID and hence must make a conservative
965 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
966 || (uid_luid
[REGNO_LAST_UID (regno
)]
968 || (uid_luid
[REGNO_FIRST_UID (regno
)]
970 || (labels_in_range_p
971 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
972 if (maybe_never
&& m
->global
)
973 m
->savemode
= GET_MODE (SET_SRC (set1
));
975 m
->savemode
= VOIDmode
;
979 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
980 - uid_luid
[REGNO_FIRST_UID (regno
)]);
982 n_times_set
[regno
] = -1;
983 /* Add M to the end of the chain MOVABLES. */
987 last_movable
->next
= m
;
992 /* Past a call insn, we get to insns which might not be executed
993 because the call might exit. This matters for insns that trap.
994 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
995 so they don't count. */
996 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
998 /* Past a label or a jump, we get to insns for which we
999 can't count on whether or how many times they will be
1000 executed during each iteration. Therefore, we can
1001 only move out sets of trivial variables
1002 (those not used after the loop). */
1003 /* Similar code appears twice in strength_reduce. */
1004 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1005 /* If we enter the loop in the middle, and scan around to the
1006 beginning, don't set maybe_never for that. This must be an
1007 unconditional jump, otherwise the code at the top of the
1008 loop might never be executed. Unconditional jumps are
1009 followed a by barrier then loop end. */
1010 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1011 && NEXT_INSN (NEXT_INSN (p
)) == end
1012 && simplejump_p (p
)))
1014 else if (GET_CODE (p
) == NOTE
)
1016 /* At the virtual top of a converted loop, insns are again known to
1017 be executed: logically, the loop begins here even though the exit
1018 code has been duplicated. */
1019 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1020 maybe_never
= call_passed
= 0;
1021 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1023 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1028 /* If one movable subsumes another, ignore that other. */
1030 ignore_some_movables (movables
);
1032 /* For each movable insn, see if the reg that it loads
1033 leads when it dies right into another conditionally movable insn.
1034 If so, record that the second insn "forces" the first one,
1035 since the second can be moved only if the first is. */
1037 force_movables (movables
);
1039 /* See if there are multiple movable insns that load the same value.
1040 If there are, make all but the first point at the first one
1041 through the `match' field, and add the priorities of them
1042 all together as the priority of the first. */
1044 combine_movables (movables
, nregs
);
1046 /* Now consider each movable insn to decide whether it is worth moving.
1047 Store 0 in n_times_set for each reg that is moved. */
1049 move_movables (movables
, threshold
,
1050 insn_count
, loop_start
, end
, nregs
);
1052 /* Now candidates that still are negative are those not moved.
1053 Change n_times_set to indicate that those are not actually invariant. */
1054 for (i
= 0; i
< nregs
; i
++)
1055 if (n_times_set
[i
] < 0)
1056 n_times_set
[i
] = n_times_used
[i
];
1058 if (flag_strength_reduce
)
1059 strength_reduce (scan_start
, end
, loop_top
,
1060 insn_count
, loop_start
, end
);
1063 /* Add elements to *OUTPUT to record all the pseudo-regs
1064 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1067 record_excess_regs (in_this
, not_in_this
, output
)
1068 rtx in_this
, not_in_this
;
1075 code
= GET_CODE (in_this
);
1089 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1090 && ! reg_mentioned_p (in_this
, not_in_this
))
1091 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1095 fmt
= GET_RTX_FORMAT (code
);
1096 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1103 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1104 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1108 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1114 /* Check what regs are referred to in the libcall block ending with INSN,
1115 aside from those mentioned in the equivalent value.
1116 If there are none, return 0.
1117 If there are one or more, return an EXPR_LIST containing all of them. */
1120 libcall_other_reg (insn
, equiv
)
1123 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1124 rtx p
= XEXP (note
, 0);
1127 /* First, find all the regs used in the libcall block
1128 that are not mentioned as inputs to the result. */
1132 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1133 || GET_CODE (p
) == CALL_INSN
)
1134 record_excess_regs (PATTERN (p
), equiv
, &output
);
1141 /* Return 1 if all uses of REG
1142 are between INSN and the end of the basic block. */
1145 reg_in_basic_block_p (insn
, reg
)
1148 int regno
= REGNO (reg
);
1151 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1154 /* Search this basic block for the already recorded last use of the reg. */
1155 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1157 switch (GET_CODE (p
))
1164 /* Ordinary insn: if this is the last use, we win. */
1165 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1170 /* Jump insn: if this is the last use, we win. */
1171 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1173 /* Otherwise, it's the end of the basic block, so we lose. */
1178 /* It's the end of the basic block, so we lose. */
1183 /* The "last use" doesn't follow the "first use"?? */
1187 /* Compute the benefit of eliminating the insns in the block whose
1188 last insn is LAST. This may be a group of insns used to compute a
1189 value directly or can contain a library call. */
1192 libcall_benefit (last
)
1198 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1199 insn
!= last
; insn
= NEXT_INSN (insn
))
1201 if (GET_CODE (insn
) == CALL_INSN
)
1202 benefit
+= 10; /* Assume at least this many insns in a library
1204 else if (GET_CODE (insn
) == INSN
1205 && GET_CODE (PATTERN (insn
)) != USE
1206 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1213 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1216 skip_consec_insns (insn
, count
)
1220 for (; count
> 0; count
--)
1224 /* If first insn of libcall sequence, skip to end. */
1225 /* Do this at start of loop, since INSN is guaranteed to
1227 if (GET_CODE (insn
) != NOTE
1228 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1229 insn
= XEXP (temp
, 0);
1231 do insn
= NEXT_INSN (insn
);
1232 while (GET_CODE (insn
) == NOTE
);
1238 /* Ignore any movable whose insn falls within a libcall
1239 which is part of another movable.
1240 We make use of the fact that the movable for the libcall value
1241 was made later and so appears later on the chain. */
1244 ignore_some_movables (movables
)
1245 struct movable
*movables
;
1247 register struct movable
*m
, *m1
;
1249 for (m
= movables
; m
; m
= m
->next
)
1251 /* Is this a movable for the value of a libcall? */
1252 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1256 /* Check for earlier movables inside that range,
1257 and mark them invalid. We cannot use LUIDs here because
1258 insns created by loop.c for prior loops don't have LUIDs.
1259 Rather than reject all such insns from movables, we just
1260 explicitly check each insn in the libcall (since invariant
1261 libcalls aren't that common). */
1262 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1263 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1264 if (m1
->insn
== insn
)
1270 /* For each movable insn, see if the reg that it loads
1271 leads when it dies right into another conditionally movable insn.
1272 If so, record that the second insn "forces" the first one,
1273 since the second can be moved only if the first is. */
1276 force_movables (movables
)
1277 struct movable
*movables
;
1279 register struct movable
*m
, *m1
;
1280 for (m1
= movables
; m1
; m1
= m1
->next
)
1281 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1282 if (!m1
->partial
&& !m1
->done
)
1284 int regno
= m1
->regno
;
1285 for (m
= m1
->next
; m
; m
= m
->next
)
1286 /* ??? Could this be a bug? What if CSE caused the
1287 register of M1 to be used after this insn?
1288 Since CSE does not update regno_last_uid,
1289 this insn M->insn might not be where it dies.
1290 But very likely this doesn't matter; what matters is
1291 that M's reg is computed from M1's reg. */
1292 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1295 if (m
!= 0 && m
->set_src
== m1
->set_dest
1296 /* If m->consec, m->set_src isn't valid. */
1300 /* Increase the priority of the moving the first insn
1301 since it permits the second to be moved as well. */
1305 m1
->lifetime
+= m
->lifetime
;
1306 m1
->savings
+= m1
->savings
;
1311 /* Find invariant expressions that are equal and can be combined into
1315 combine_movables (movables
, nregs
)
1316 struct movable
*movables
;
1319 register struct movable
*m
;
1320 char *matched_regs
= (char *) alloca (nregs
);
1321 enum machine_mode mode
;
1323 /* Regs that are set more than once are not allowed to match
1324 or be matched. I'm no longer sure why not. */
1325 /* Perhaps testing m->consec_sets would be more appropriate here? */
1327 for (m
= movables
; m
; m
= m
->next
)
1328 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1330 register struct movable
*m1
;
1331 int regno
= m
->regno
;
1333 bzero (matched_regs
, nregs
);
1334 matched_regs
[regno
] = 1;
1336 /* We want later insns to match the first one. Don't make the first
1337 one match any later ones. So start this loop at m->next. */
1338 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1339 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1340 /* A reg used outside the loop mustn't be eliminated. */
1342 /* A reg used for zero-extending mustn't be eliminated. */
1344 && (matched_regs
[m1
->regno
]
1347 /* Can combine regs with different modes loaded from the
1348 same constant only if the modes are the same or
1349 if both are integer modes with M wider or the same
1350 width as M1. The check for integer is redundant, but
1351 safe, since the only case of differing destination
1352 modes with equal sources is when both sources are
1353 VOIDmode, i.e., CONST_INT. */
1354 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1355 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1356 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1357 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1358 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1359 /* See if the source of M1 says it matches M. */
1360 && ((GET_CODE (m1
->set_src
) == REG
1361 && matched_regs
[REGNO (m1
->set_src
)])
1362 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1364 && ((m
->dependencies
== m1
->dependencies
)
1365 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1367 m
->lifetime
+= m1
->lifetime
;
1368 m
->savings
+= m1
->savings
;
1371 matched_regs
[m1
->regno
] = 1;
1375 /* Now combine the regs used for zero-extension.
1376 This can be done for those not marked `global'
1377 provided their lives don't overlap. */
1379 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1380 mode
= GET_MODE_WIDER_MODE (mode
))
1382 register struct movable
*m0
= 0;
1384 /* Combine all the registers for extension from mode MODE.
1385 Don't combine any that are used outside this loop. */
1386 for (m
= movables
; m
; m
= m
->next
)
1387 if (m
->partial
&& ! m
->global
1388 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1390 register struct movable
*m1
;
1391 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1392 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1396 /* First one: don't check for overlap, just record it. */
1401 /* Make sure they extend to the same mode.
1402 (Almost always true.) */
1403 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1406 /* We already have one: check for overlap with those
1407 already combined together. */
1408 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1409 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1410 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1411 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1414 /* No overlap: we can combine this with the others. */
1415 m0
->lifetime
+= m
->lifetime
;
1416 m0
->savings
+= m
->savings
;
1425 /* Return 1 if regs X and Y will become the same if moved. */
1428 regs_match_p (x
, y
, movables
)
1430 struct movable
*movables
;
1434 struct movable
*mx
, *my
;
1436 for (mx
= movables
; mx
; mx
= mx
->next
)
1437 if (mx
->regno
== xn
)
1440 for (my
= movables
; my
; my
= my
->next
)
1441 if (my
->regno
== yn
)
1445 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1447 || mx
== my
->match
));
1450 /* Return 1 if X and Y are identical-looking rtx's.
1451 This is the Lisp function EQUAL for rtx arguments.
1453 If two registers are matching movables or a movable register and an
1454 equivalent constant, consider them equal. */
1457 rtx_equal_for_loop_p (x
, y
, movables
)
1459 struct movable
*movables
;
1463 register struct movable
*m
;
1464 register enum rtx_code code
;
1469 if (x
== 0 || y
== 0)
1472 code
= GET_CODE (x
);
1474 /* If we have a register and a constant, they may sometimes be
1476 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1478 for (m
= movables
; m
; m
= m
->next
)
1479 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1480 && rtx_equal_p (m
->set_src
, y
))
1483 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1485 for (m
= movables
; m
; m
= m
->next
)
1486 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1487 && rtx_equal_p (m
->set_src
, x
))
1490 /* Otherwise, rtx's of different codes cannot be equal. */
1491 if (code
!= GET_CODE (y
))
1494 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1495 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1497 if (GET_MODE (x
) != GET_MODE (y
))
1500 /* These three types of rtx's can be compared nonrecursively. */
1502 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1504 if (code
== LABEL_REF
)
1505 return XEXP (x
, 0) == XEXP (y
, 0);
1506 if (code
== SYMBOL_REF
)
1507 return XSTR (x
, 0) == XSTR (y
, 0);
1509 /* Compare the elements. If any pair of corresponding elements
1510 fail to match, return 0 for the whole things. */
1512 fmt
= GET_RTX_FORMAT (code
);
1513 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1518 if (XWINT (x
, i
) != XWINT (y
, i
))
1523 if (XINT (x
, i
) != XINT (y
, i
))
1528 /* Two vectors must have the same length. */
1529 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1532 /* And the corresponding elements must match. */
1533 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1534 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1539 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1544 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1549 /* These are just backpointers, so they don't matter. */
1555 /* It is believed that rtx's at this level will never
1556 contain anything but integers and other rtx's,
1557 except for within LABEL_REFs and SYMBOL_REFs. */
1565 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1566 insns in INSNS which use thet reference. */
1569 add_label_notes (x
, insns
)
1573 enum rtx_code code
= GET_CODE (x
);
1578 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1580 rtx next
= next_real_insn (XEXP (x
, 0));
1582 /* Don't record labels that refer to dispatch tables.
1583 This is not necessary, since the tablejump references the same label.
1584 And if we did record them, flow.c would make worse code. */
1586 || ! (GET_CODE (next
) == JUMP_INSN
1587 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1588 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1590 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1591 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1592 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1598 fmt
= GET_RTX_FORMAT (code
);
1599 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1602 add_label_notes (XEXP (x
, i
), insns
);
1603 else if (fmt
[i
] == 'E')
1604 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1605 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1609 /* Scan MOVABLES, and move the insns that deserve to be moved.
1610 If two matching movables are combined, replace one reg with the
1611 other throughout. */
1614 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1615 struct movable
*movables
;
1623 register struct movable
*m
;
1625 /* Map of pseudo-register replacements to handle combining
1626 when we move several insns that load the same value
1627 into different pseudo-registers. */
1628 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1629 char *already_moved
= (char *) alloca (nregs
);
1631 bzero (already_moved
, nregs
);
1632 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1636 for (m
= movables
; m
; m
= m
->next
)
1638 /* Describe this movable insn. */
1640 if (loop_dump_stream
)
1642 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1643 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1645 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1647 fprintf (loop_dump_stream
, "cond ");
1649 fprintf (loop_dump_stream
, "force ");
1651 fprintf (loop_dump_stream
, "global ");
1653 fprintf (loop_dump_stream
, "done ");
1655 fprintf (loop_dump_stream
, "move-insn ");
1657 fprintf (loop_dump_stream
, "matches %d ",
1658 INSN_UID (m
->match
->insn
));
1660 fprintf (loop_dump_stream
, "forces %d ",
1661 INSN_UID (m
->forces
->insn
));
1664 /* Count movables. Value used in heuristics in strength_reduce. */
1667 /* Ignore the insn if it's already done (it matched something else).
1668 Otherwise, see if it is now safe to move. */
1672 || (1 == invariant_p (m
->set_src
)
1673 && (m
->dependencies
== 0
1674 || 1 == invariant_p (m
->dependencies
))
1676 || 1 == consec_sets_invariant_p (m
->set_dest
,
1679 && (! m
->forces
|| m
->forces
->done
))
1683 int savings
= m
->savings
;
1685 /* We have an insn that is safe to move.
1686 Compute its desirability. */
1691 if (loop_dump_stream
)
1692 fprintf (loop_dump_stream
, "savings %d ", savings
);
1694 if (moved_once
[regno
])
1698 if (loop_dump_stream
)
1699 fprintf (loop_dump_stream
, "halved since already moved ");
1702 /* An insn MUST be moved if we already moved something else
1703 which is safe only if this one is moved too: that is,
1704 if already_moved[REGNO] is nonzero. */
1706 /* An insn is desirable to move if the new lifetime of the
1707 register is no more than THRESHOLD times the old lifetime.
1708 If it's not desirable, it means the loop is so big
1709 that moving won't speed things up much,
1710 and it is liable to make register usage worse. */
1712 /* It is also desirable to move if it can be moved at no
1713 extra cost because something else was already moved. */
1715 if (already_moved
[regno
]
1716 || flag_move_all_movables
1717 || (threshold
* savings
* m
->lifetime
) >= insn_count
1718 || (m
->forces
&& m
->forces
->done
1719 && n_times_used
[m
->forces
->regno
] == 1))
1722 register struct movable
*m1
;
1725 /* Now move the insns that set the reg. */
1727 if (m
->partial
&& m
->match
)
1731 /* Find the end of this chain of matching regs.
1732 Thus, we load each reg in the chain from that one reg.
1733 And that reg is loaded with 0 directly,
1734 since it has ->match == 0. */
1735 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1736 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1737 SET_DEST (PATTERN (m1
->insn
)));
1738 i1
= emit_insn_before (newpat
, loop_start
);
1740 /* Mark the moved, invariant reg as being allowed to
1741 share a hard reg with the other matching invariant. */
1742 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1743 r1
= SET_DEST (PATTERN (m
->insn
));
1744 r2
= SET_DEST (PATTERN (m1
->insn
));
1745 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1746 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1748 delete_insn (m
->insn
);
1753 if (loop_dump_stream
)
1754 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1756 /* If we are to re-generate the item being moved with a
1757 new move insn, first delete what we have and then emit
1758 the move insn before the loop. */
1759 else if (m
->move_insn
)
1763 for (count
= m
->consec
; count
>= 0; count
--)
1765 /* If this is the first insn of a library call sequence,
1767 if (GET_CODE (p
) != NOTE
1768 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1771 /* If this is the last insn of a libcall sequence, then
1772 delete every insn in the sequence except the last.
1773 The last insn is handled in the normal manner. */
1774 if (GET_CODE (p
) != NOTE
1775 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1777 temp
= XEXP (temp
, 0);
1779 temp
= delete_insn (temp
);
1782 p
= delete_insn (p
);
1783 while (p
&& GET_CODE (p
) == NOTE
)
1788 emit_move_insn (m
->set_dest
, m
->set_src
);
1789 temp
= get_insns ();
1792 add_label_notes (m
->set_src
, temp
);
1794 i1
= emit_insns_before (temp
, loop_start
);
1795 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1797 = gen_rtx (EXPR_LIST
,
1798 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1799 m
->set_src
, REG_NOTES (i1
));
1801 if (loop_dump_stream
)
1802 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1804 /* The more regs we move, the less we like moving them. */
1809 for (count
= m
->consec
; count
>= 0; count
--)
1813 /* If first insn of libcall sequence, skip to end. */
1814 /* Do this at start of loop, since p is guaranteed to
1816 if (GET_CODE (p
) != NOTE
1817 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1820 /* If last insn of libcall sequence, move all
1821 insns except the last before the loop. The last
1822 insn is handled in the normal manner. */
1823 if (GET_CODE (p
) != NOTE
1824 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1828 rtx fn_address_insn
= 0;
1831 for (temp
= XEXP (temp
, 0); temp
!= p
;
1832 temp
= NEXT_INSN (temp
))
1838 if (GET_CODE (temp
) == NOTE
)
1841 body
= PATTERN (temp
);
1843 /* Find the next insn after TEMP,
1844 not counting USE or NOTE insns. */
1845 for (next
= NEXT_INSN (temp
); next
!= p
;
1846 next
= NEXT_INSN (next
))
1847 if (! (GET_CODE (next
) == INSN
1848 && GET_CODE (PATTERN (next
)) == USE
)
1849 && GET_CODE (next
) != NOTE
)
1852 /* If that is the call, this may be the insn
1853 that loads the function address.
1855 Extract the function address from the insn
1856 that loads it into a register.
1857 If this insn was cse'd, we get incorrect code.
1859 So emit a new move insn that copies the
1860 function address into the register that the
1861 call insn will use. flow.c will delete any
1862 redundant stores that we have created. */
1863 if (GET_CODE (next
) == CALL_INSN
1864 && GET_CODE (body
) == SET
1865 && GET_CODE (SET_DEST (body
)) == REG
1866 && (n
= find_reg_note (temp
, REG_EQUAL
,
1869 fn_reg
= SET_SRC (body
);
1870 if (GET_CODE (fn_reg
) != REG
)
1871 fn_reg
= SET_DEST (body
);
1872 fn_address
= XEXP (n
, 0);
1873 fn_address_insn
= temp
;
1875 /* We have the call insn.
1876 If it uses the register we suspect it might,
1877 load it with the correct address directly. */
1878 if (GET_CODE (temp
) == CALL_INSN
1880 && reg_referenced_p (fn_reg
, body
))
1881 emit_insn_after (gen_move_insn (fn_reg
,
1885 if (GET_CODE (temp
) == CALL_INSN
)
1887 i1
= emit_call_insn_before (body
, loop_start
);
1888 /* Because the USAGE information potentially
1889 contains objects other than hard registers
1890 we need to copy it. */
1891 if (CALL_INSN_FUNCTION_USAGE (temp
))
1892 CALL_INSN_FUNCTION_USAGE (i1
)
1893 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1896 i1
= emit_insn_before (body
, loop_start
);
1899 if (temp
== fn_address_insn
)
1900 fn_address_insn
= i1
;
1901 REG_NOTES (i1
) = REG_NOTES (temp
);
1905 if (m
->savemode
!= VOIDmode
)
1907 /* P sets REG to zero; but we should clear only
1908 the bits that are not covered by the mode
1910 rtx reg
= m
->set_dest
;
1916 (GET_MODE (reg
), and_optab
, reg
,
1917 GEN_INT ((((HOST_WIDE_INT
) 1
1918 << GET_MODE_BITSIZE (m
->savemode
)))
1920 reg
, 1, OPTAB_LIB_WIDEN
);
1924 emit_move_insn (reg
, tem
);
1925 sequence
= gen_sequence ();
1927 i1
= emit_insn_before (sequence
, loop_start
);
1929 else if (GET_CODE (p
) == CALL_INSN
)
1931 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1932 /* Because the USAGE information potentially
1933 contains objects other than hard registers
1934 we need to copy it. */
1935 if (CALL_INSN_FUNCTION_USAGE (p
))
1936 CALL_INSN_FUNCTION_USAGE (i1
)
1937 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1940 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1942 REG_NOTES (i1
) = REG_NOTES (p
);
1944 /* If there is a REG_EQUAL note present whose value is
1945 not loop invariant, then delete it, since it may
1946 cause problems with later optimization passes.
1947 It is possible for cse to create such notes
1948 like this as a result of record_jump_cond. */
1950 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1951 && ! invariant_p (XEXP (temp
, 0)))
1952 remove_note (i1
, temp
);
1957 if (loop_dump_stream
)
1958 fprintf (loop_dump_stream
, " moved to %d",
1962 /* This isn't needed because REG_NOTES is copied
1963 below and is wrong since P might be a PARALLEL. */
1964 if (REG_NOTES (i1
) == 0
1965 && ! m
->partial
/* But not if it's a zero-extend clr. */
1966 && ! m
->global
/* and not if used outside the loop
1967 (since it might get set outside). */
1968 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1970 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1971 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1974 /* If library call, now fix the REG_NOTES that contain
1975 insn pointers, namely REG_LIBCALL on FIRST
1976 and REG_RETVAL on I1. */
1977 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1979 XEXP (temp
, 0) = first
;
1980 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1981 XEXP (temp
, 0) = i1
;
1985 do p
= NEXT_INSN (p
);
1986 while (p
&& GET_CODE (p
) == NOTE
);
1989 /* The more regs we move, the less we like moving them. */
1993 /* Any other movable that loads the same register
1995 already_moved
[regno
] = 1;
1997 /* This reg has been moved out of one loop. */
1998 moved_once
[regno
] = 1;
2000 /* The reg set here is now invariant. */
2002 n_times_set
[regno
] = 0;
2006 /* Change the length-of-life info for the register
2007 to say it lives at least the full length of this loop.
2008 This will help guide optimizations in outer loops. */
2010 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2011 /* This is the old insn before all the moved insns.
2012 We can't use the moved insn because it is out of range
2013 in uid_luid. Only the old insns have luids. */
2014 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2015 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2016 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2018 /* Combine with this moved insn any other matching movables. */
2021 for (m1
= movables
; m1
; m1
= m1
->next
)
2026 /* Schedule the reg loaded by M1
2027 for replacement so that shares the reg of M.
2028 If the modes differ (only possible in restricted
2029 circumstances, make a SUBREG. */
2030 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2031 reg_map
[m1
->regno
] = m
->set_dest
;
2034 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2037 /* Get rid of the matching insn
2038 and prevent further processing of it. */
2041 /* if library call, delete all insn except last, which
2043 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2046 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2047 temp
= NEXT_INSN (temp
))
2050 delete_insn (m1
->insn
);
2052 /* Any other movable that loads the same register
2054 already_moved
[m1
->regno
] = 1;
2056 /* The reg merged here is now invariant,
2057 if the reg it matches is invariant. */
2059 n_times_set
[m1
->regno
] = 0;
2062 else if (loop_dump_stream
)
2063 fprintf (loop_dump_stream
, "not desirable");
2065 else if (loop_dump_stream
&& !m
->match
)
2066 fprintf (loop_dump_stream
, "not safe");
2068 if (loop_dump_stream
)
2069 fprintf (loop_dump_stream
, "\n");
2073 new_start
= loop_start
;
2075 /* Go through all the instructions in the loop, making
2076 all the register substitutions scheduled in REG_MAP. */
2077 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2078 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2079 || GET_CODE (p
) == CALL_INSN
)
2081 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2082 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2088 /* Scan X and replace the address of any MEM in it with ADDR.
2089 REG is the address that MEM should have before the replacement. */
2092 replace_call_address (x
, reg
, addr
)
2095 register enum rtx_code code
;
2101 code
= GET_CODE (x
);
2115 /* Short cut for very common case. */
2116 replace_call_address (XEXP (x
, 1), reg
, addr
);
2120 /* Short cut for very common case. */
2121 replace_call_address (XEXP (x
, 0), reg
, addr
);
2125 /* If this MEM uses a reg other than the one we expected,
2126 something is wrong. */
2127 if (XEXP (x
, 0) != reg
)
2133 fmt
= GET_RTX_FORMAT (code
);
2134 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2137 replace_call_address (XEXP (x
, i
), reg
, addr
);
2141 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2142 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2148 /* Return the number of memory refs to addresses that vary
2152 count_nonfixed_reads (x
)
2155 register enum rtx_code code
;
2163 code
= GET_CODE (x
);
2177 return ((invariant_p (XEXP (x
, 0)) != 1)
2178 + count_nonfixed_reads (XEXP (x
, 0)));
2182 fmt
= GET_RTX_FORMAT (code
);
2183 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2186 value
+= count_nonfixed_reads (XEXP (x
, i
));
2190 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2191 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2199 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2200 Replace it with an instruction to load just the low bytes
2201 if the machine supports such an instruction,
2202 and insert above LOOP_START an instruction to clear the register. */
2205 constant_high_bytes (p
, loop_start
)
2209 register int insn_code_number
;
2211 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2212 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2214 new = gen_rtx (SET
, VOIDmode
,
2215 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2216 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2217 SET_DEST (PATTERN (p
)),
2219 XEXP (SET_SRC (PATTERN (p
)), 0));
2220 insn_code_number
= recog (new, p
);
2222 if (insn_code_number
)
2226 /* Clear destination register before the loop. */
2227 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2228 SET_DEST (PATTERN (p
)),
2232 /* Inside the loop, just load the low part. */
2238 /* Scan a loop setting the variables `unknown_address_altered',
2239 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2240 and `loop_has_volatile'.
2241 Also, fill in the array `loop_store_mems'. */
2244 prescan_loop (start
, end
)
2247 register int level
= 1;
2250 unknown_address_altered
= 0;
2252 loop_has_volatile
= 0;
2253 loop_store_mems_idx
= 0;
2259 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2260 insn
= NEXT_INSN (insn
))
2262 if (GET_CODE (insn
) == NOTE
)
2264 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2267 /* Count number of loops contained in this one. */
2270 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2279 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2282 loop_continue
= insn
;
2285 else if (GET_CODE (insn
) == CALL_INSN
)
2287 if (! CONST_CALL_P (insn
))
2288 unknown_address_altered
= 1;
2293 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2295 if (volatile_refs_p (PATTERN (insn
)))
2296 loop_has_volatile
= 1;
2298 note_stores (PATTERN (insn
), note_addr_stored
);
2304 /* Scan the function looking for loops. Record the start and end of each loop.
2305 Also mark as invalid loops any loops that contain a setjmp or are branched
2306 to from outside the loop. */
2309 find_and_verify_loops (f
)
2313 int current_loop
= -1;
2317 /* If there are jumps to undefined labels,
2318 treat them as jumps out of any/all loops.
2319 This also avoids writing past end of tables when there are no loops. */
2320 uid_loop_num
[0] = -1;
2322 /* Find boundaries of loops, mark which loops are contained within
2323 loops, and invalidate loops that have setjmp. */
2325 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2327 if (GET_CODE (insn
) == NOTE
)
2328 switch (NOTE_LINE_NUMBER (insn
))
2330 case NOTE_INSN_LOOP_BEG
:
2331 loop_number_loop_starts
[++next_loop
] = insn
;
2332 loop_number_loop_ends
[next_loop
] = 0;
2333 loop_outer_loop
[next_loop
] = current_loop
;
2334 loop_invalid
[next_loop
] = 0;
2335 loop_number_exit_labels
[next_loop
] = 0;
2336 loop_number_exit_count
[next_loop
] = 0;
2337 current_loop
= next_loop
;
2340 case NOTE_INSN_SETJMP
:
2341 /* In this case, we must invalidate our current loop and any
2343 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2345 loop_invalid
[loop
] = 1;
2346 if (loop_dump_stream
)
2347 fprintf (loop_dump_stream
,
2348 "\nLoop at %d ignored due to setjmp.\n",
2349 INSN_UID (loop_number_loop_starts
[loop
]));
2353 case NOTE_INSN_LOOP_END
:
2354 if (current_loop
== -1)
2357 loop_number_loop_ends
[current_loop
] = insn
;
2358 current_loop
= loop_outer_loop
[current_loop
];
2363 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2364 enclosing loop, but this doesn't matter. */
2365 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2368 /* Any loop containing a label used in an initializer must be invalidated,
2369 because it can be jumped into from anywhere. */
2371 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2375 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2377 loop_num
= loop_outer_loop
[loop_num
])
2378 loop_invalid
[loop_num
] = 1;
2381 /* Any loop containing a label used for an exception handler must be
2382 invalidated, because it can be jumped into from anywhere. */
2384 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2388 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2390 loop_num
= loop_outer_loop
[loop_num
])
2391 loop_invalid
[loop_num
] = 1;
2394 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2395 loop that it is not contained within, that loop is marked invalid.
2396 If any INSN or CALL_INSN uses a label's address, then the loop containing
2397 that label is marked invalid, because it could be jumped into from
2400 Also look for blocks of code ending in an unconditional branch that
2401 exits the loop. If such a block is surrounded by a conditional
2402 branch around the block, move the block elsewhere (see below) and
2403 invert the jump to point to the code block. This may eliminate a
2404 label in our loop and will simplify processing by both us and a
2405 possible second cse pass. */
2407 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2408 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2410 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2412 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2414 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2419 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2421 loop_num
= loop_outer_loop
[loop_num
])
2422 loop_invalid
[loop_num
] = 1;
2426 if (GET_CODE (insn
) != JUMP_INSN
)
2429 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2431 /* See if this is an unconditional branch outside the loop. */
2432 if (this_loop_num
!= -1
2433 && (GET_CODE (PATTERN (insn
)) == RETURN
2434 || (simplejump_p (insn
)
2435 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2437 && get_max_uid () < max_uid_for_loop
)
2440 rtx our_next
= next_real_insn (insn
);
2442 int outer_loop
= -1;
2444 /* Go backwards until we reach the start of the loop, a label,
2446 for (p
= PREV_INSN (insn
);
2447 GET_CODE (p
) != CODE_LABEL
2448 && ! (GET_CODE (p
) == NOTE
2449 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2450 && GET_CODE (p
) != JUMP_INSN
;
2454 /* Check for the case where we have a jump to an inner nested
2455 loop, and do not perform the optimization in that case. */
2457 if (JUMP_LABEL (insn
))
2459 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2460 if (dest_loop
!= -1)
2462 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2463 outer_loop
= loop_outer_loop
[outer_loop
])
2464 if (outer_loop
== this_loop_num
)
2469 /* Make sure that the target of P is within the current loop. */
2471 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2472 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2473 outer_loop
= this_loop_num
;
2475 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2476 we have a block of code to try to move.
2478 We look backward and then forward from the target of INSN
2479 to find a BARRIER at the same loop depth as the target.
2480 If we find such a BARRIER, we make a new label for the start
2481 of the block, invert the jump in P and point it to that label,
2482 and move the block of code to the spot we found. */
2484 if (outer_loop
== -1
2485 && GET_CODE (p
) == JUMP_INSN
2486 && JUMP_LABEL (p
) != 0
2487 /* Just ignore jumps to labels that were never emitted.
2488 These always indicate compilation errors. */
2489 && INSN_UID (JUMP_LABEL (p
)) != 0
2491 && ! simplejump_p (p
)
2492 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2495 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2496 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2499 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2500 if (GET_CODE (loc
) == BARRIER
2501 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2505 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2506 if (GET_CODE (loc
) == BARRIER
2507 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2512 rtx cond_label
= JUMP_LABEL (p
);
2513 rtx new_label
= get_label_after (p
);
2515 /* Ensure our label doesn't go away. */
2516 LABEL_NUSES (cond_label
)++;
2518 /* Verify that uid_loop_num is large enough and that
2520 if (invert_jump (p
, new_label
))
2524 /* Include the BARRIER after INSN and copy the
2526 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2527 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2529 /* All those insns are now in TARGET_LOOP_NUM. */
2530 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2532 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2534 /* The label jumped to by INSN is no longer a loop exit.
2535 Unless INSN does not have a label (e.g., it is a
2536 RETURN insn), search loop_number_exit_labels to find
2537 its label_ref, and remove it. Also turn off
2538 LABEL_OUTSIDE_LOOP_P bit. */
2539 if (JUMP_LABEL (insn
))
2544 r
= loop_number_exit_labels
[this_loop_num
];
2545 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2546 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2548 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2550 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2552 loop_number_exit_labels
[this_loop_num
]
2553 = LABEL_NEXTREF (r
);
2557 for (loop_num
= this_loop_num
;
2558 loop_num
!= -1 && loop_num
!= target_loop_num
;
2559 loop_num
= loop_outer_loop
[loop_num
])
2560 loop_number_exit_count
[loop_num
]--;
2562 /* If we didn't find it, then something is wrong. */
2567 /* P is now a jump outside the loop, so it must be put
2568 in loop_number_exit_labels, and marked as such.
2569 The easiest way to do this is to just call
2570 mark_loop_jump again for P. */
2571 mark_loop_jump (PATTERN (p
), this_loop_num
);
2573 /* If INSN now jumps to the insn after it,
2575 if (JUMP_LABEL (insn
) != 0
2576 && (next_real_insn (JUMP_LABEL (insn
))
2577 == next_real_insn (insn
)))
2581 /* Continue the loop after where the conditional
2582 branch used to jump, since the only branch insn
2583 in the block (if it still remains) is an inter-loop
2584 branch and hence needs no processing. */
2585 insn
= NEXT_INSN (cond_label
);
2587 if (--LABEL_NUSES (cond_label
) == 0)
2588 delete_insn (cond_label
);
2590 /* This loop will be continued with NEXT_INSN (insn). */
2591 insn
= PREV_INSN (insn
);
2598 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2599 loops it is contained in, mark the target loop invalid.
2601 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2604 mark_loop_jump (x
, loop_num
)
2612 switch (GET_CODE (x
))
2625 /* There could be a label reference in here. */
2626 mark_loop_jump (XEXP (x
, 0), loop_num
);
2632 mark_loop_jump (XEXP (x
, 0), loop_num
);
2633 mark_loop_jump (XEXP (x
, 1), loop_num
);
2638 mark_loop_jump (XEXP (x
, 0), loop_num
);
2642 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2644 /* Link together all labels that branch outside the loop. This
2645 is used by final_[bg]iv_value and the loop unrolling code. Also
2646 mark this LABEL_REF so we know that this branch should predict
2649 /* A check to make sure the label is not in an inner nested loop,
2650 since this does not count as a loop exit. */
2651 if (dest_loop
!= -1)
2653 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2654 outer_loop
= loop_outer_loop
[outer_loop
])
2655 if (outer_loop
== loop_num
)
2661 if (loop_num
!= -1 && outer_loop
== -1)
2663 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2664 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2665 loop_number_exit_labels
[loop_num
] = x
;
2667 for (outer_loop
= loop_num
;
2668 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2669 outer_loop
= loop_outer_loop
[outer_loop
])
2670 loop_number_exit_count
[outer_loop
]++;
2673 /* If this is inside a loop, but not in the current loop or one enclosed
2674 by it, it invalidates at least one loop. */
2676 if (dest_loop
== -1)
2679 /* We must invalidate every nested loop containing the target of this
2680 label, except those that also contain the jump insn. */
2682 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2684 /* Stop when we reach a loop that also contains the jump insn. */
2685 for (outer_loop
= loop_num
; outer_loop
!= -1;
2686 outer_loop
= loop_outer_loop
[outer_loop
])
2687 if (dest_loop
== outer_loop
)
2690 /* If we get here, we know we need to invalidate a loop. */
2691 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2692 fprintf (loop_dump_stream
,
2693 "\nLoop at %d ignored due to multiple entry points.\n",
2694 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2696 loop_invalid
[dest_loop
] = 1;
2701 /* If this is not setting pc, ignore. */
2702 if (SET_DEST (x
) == pc_rtx
)
2703 mark_loop_jump (SET_SRC (x
), loop_num
);
2707 mark_loop_jump (XEXP (x
, 1), loop_num
);
2708 mark_loop_jump (XEXP (x
, 2), loop_num
);
2713 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2714 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2718 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2719 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2723 /* Treat anything else (such as a symbol_ref)
2724 as a branch out of this loop, but not into any loop. */
2729 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2730 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2733 loop_number_exit_labels
[loop_num
] = x
;
2735 for (outer_loop
= loop_num
; outer_loop
!= -1;
2736 outer_loop
= loop_outer_loop
[outer_loop
])
2737 loop_number_exit_count
[outer_loop
]++;
2743 /* Return nonzero if there is a label in the range from
2744 insn INSN to and including the insn whose luid is END
2745 INSN must have an assigned luid (i.e., it must not have
2746 been previously created by loop.c). */
2749 labels_in_range_p (insn
, end
)
2753 while (insn
&& INSN_LUID (insn
) <= end
)
2755 if (GET_CODE (insn
) == CODE_LABEL
)
2757 insn
= NEXT_INSN (insn
);
2763 /* Record that a memory reference X is being set. */
2766 note_addr_stored (x
)
2771 if (x
== 0 || GET_CODE (x
) != MEM
)
2774 /* Count number of memory writes.
2775 This affects heuristics in strength_reduce. */
2778 /* BLKmode MEM means all memory is clobbered. */
2779 if (GET_MODE (x
) == BLKmode
)
2780 unknown_address_altered
= 1;
2782 if (unknown_address_altered
)
2785 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2786 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2787 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2789 /* We are storing at the same address as previously noted. Save the
2791 if (GET_MODE_SIZE (GET_MODE (x
))
2792 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2793 loop_store_mems
[i
] = x
;
2797 if (i
== NUM_STORES
)
2798 unknown_address_altered
= 1;
2800 else if (i
== loop_store_mems_idx
)
2801 loop_store_mems
[loop_store_mems_idx
++] = x
;
2804 /* Return nonzero if the rtx X is invariant over the current loop.
2806 The value is 2 if we refer to something only conditionally invariant.
2808 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2809 Otherwise, a memory ref is invariant if it does not conflict with
2810 anything stored in `loop_store_mems'. */
2817 register enum rtx_code code
;
2819 int conditional
= 0;
2823 code
= GET_CODE (x
);
2833 /* A LABEL_REF is normally invariant, however, if we are unrolling
2834 loops, and this label is inside the loop, then it isn't invariant.
2835 This is because each unrolled copy of the loop body will have
2836 a copy of this label. If this was invariant, then an insn loading
2837 the address of this label into a register might get moved outside
2838 the loop, and then each loop body would end up using the same label.
2840 We don't know the loop bounds here though, so just fail for all
2842 if (flag_unroll_loops
)
2849 case UNSPEC_VOLATILE
:
2853 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2854 since the reg might be set by initialization within the loop. */
2856 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2857 || x
== arg_pointer_rtx
)
2858 && ! current_function_has_nonlocal_goto
)
2862 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2865 if (n_times_set
[REGNO (x
)] < 0)
2868 return n_times_set
[REGNO (x
)] == 0;
2871 /* Volatile memory references must be rejected. Do this before
2872 checking for read-only items, so that volatile read-only items
2873 will be rejected also. */
2874 if (MEM_VOLATILE_P (x
))
2877 /* Read-only items (such as constants in a constant pool) are
2878 invariant if their address is. */
2879 if (RTX_UNCHANGING_P (x
))
2882 /* If we filled the table (or had a subroutine call), any location
2883 in memory could have been clobbered. */
2884 if (unknown_address_altered
)
2887 /* See if there is any dependence between a store and this load. */
2888 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2889 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2892 /* It's not invalidated by a store in memory
2893 but we must still verify the address is invariant. */
2897 /* Don't mess with insns declared volatile. */
2898 if (MEM_VOLATILE_P (x
))
2902 fmt
= GET_RTX_FORMAT (code
);
2903 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2907 int tem
= invariant_p (XEXP (x
, i
));
2913 else if (fmt
[i
] == 'E')
2916 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2918 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2928 return 1 + conditional
;
2932 /* Return nonzero if all the insns in the loop that set REG
2933 are INSN and the immediately following insns,
2934 and if each of those insns sets REG in an invariant way
2935 (not counting uses of REG in them).
2937 The value is 2 if some of these insns are only conditionally invariant.
2939 We assume that INSN itself is the first set of REG
2940 and that its source is invariant. */
2943 consec_sets_invariant_p (reg
, n_sets
, insn
)
2947 register rtx p
= insn
;
2948 register int regno
= REGNO (reg
);
2950 /* Number of sets we have to insist on finding after INSN. */
2951 int count
= n_sets
- 1;
2952 int old
= n_times_set
[regno
];
2956 /* If N_SETS hit the limit, we can't rely on its value. */
2960 n_times_set
[regno
] = 0;
2964 register enum rtx_code code
;
2968 code
= GET_CODE (p
);
2970 /* If library call, skip to end of of it. */
2971 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2976 && (set
= single_set (p
))
2977 && GET_CODE (SET_DEST (set
)) == REG
2978 && REGNO (SET_DEST (set
)) == regno
)
2980 this = invariant_p (SET_SRC (set
));
2983 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2985 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2986 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2988 this = (CONSTANT_P (XEXP (temp
, 0))
2989 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
2990 && invariant_p (XEXP (temp
, 0))));
2997 else if (code
!= NOTE
)
2999 n_times_set
[regno
] = old
;
3004 n_times_set
[regno
] = old
;
3005 /* If invariant_p ever returned 2, we return 2. */
3006 return 1 + (value
& 2);
3010 /* I don't think this condition is sufficient to allow INSN
3011 to be moved, so we no longer test it. */
3013 /* Return 1 if all insns in the basic block of INSN and following INSN
3014 that set REG are invariant according to TABLE. */
3017 all_sets_invariant_p (reg
, insn
, table
)
3021 register rtx p
= insn
;
3022 register int regno
= REGNO (reg
);
3026 register enum rtx_code code
;
3028 code
= GET_CODE (p
);
3029 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3031 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3032 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3033 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3035 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3042 /* Look at all uses (not sets) of registers in X. For each, if it is
3043 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3044 a different insn, set USAGE[REGNO] to const0_rtx. */
3047 find_single_use_in_loop (insn
, x
, usage
)
3052 enum rtx_code code
= GET_CODE (x
);
3053 char *fmt
= GET_RTX_FORMAT (code
);
3058 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3059 ? const0_rtx
: insn
;
3061 else if (code
== SET
)
3063 /* Don't count SET_DEST if it is a REG; otherwise count things
3064 in SET_DEST because if a register is partially modified, it won't
3065 show up as a potential movable so we don't care how USAGE is set
3067 if (GET_CODE (SET_DEST (x
)) != REG
)
3068 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3069 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3072 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3074 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3075 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3076 else if (fmt
[i
] == 'E')
3077 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3078 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3082 /* Increment N_TIMES_SET at the index of each register
3083 that is modified by an insn between FROM and TO.
3084 If the value of an element of N_TIMES_SET becomes 127 or more,
3085 stop incrementing it, to avoid overflow.
3087 Store in SINGLE_USAGE[I] the single insn in which register I is
3088 used, if it is only used once. Otherwise, it is set to 0 (for no
3089 uses) or const0_rtx for more than one use. This parameter may be zero,
3090 in which case this processing is not done.
3092 Store in *COUNT_PTR the number of actual instruction
3093 in the loop. We use this to decide what is worth moving out. */
3095 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3096 In that case, it is the insn that last set reg n. */
3099 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3100 register rtx from
, to
;
3106 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3108 register int count
= 0;
3111 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3112 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3114 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3118 /* If requested, record registers that have exactly one use. */
3121 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3123 /* Include uses in REG_EQUAL notes. */
3124 if (REG_NOTES (insn
))
3125 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3128 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3129 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3130 /* Don't move a reg that has an explicit clobber.
3131 We might do so sometimes, but it's not worth the pain. */
3132 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3134 if (GET_CODE (PATTERN (insn
)) == SET
3135 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3137 dest
= SET_DEST (PATTERN (insn
));
3138 while (GET_CODE (dest
) == SUBREG
3139 || GET_CODE (dest
) == ZERO_EXTRACT
3140 || GET_CODE (dest
) == SIGN_EXTRACT
3141 || GET_CODE (dest
) == STRICT_LOW_PART
)
3142 dest
= XEXP (dest
, 0);
3143 if (GET_CODE (dest
) == REG
)
3145 register int regno
= REGNO (dest
);
3146 /* If this is the first setting of this reg
3147 in current basic block, and it was set before,
3148 it must be set in two basic blocks, so it cannot
3149 be moved out of the loop. */
3150 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3151 may_not_move
[regno
] = 1;
3152 /* If this is not first setting in current basic block,
3153 see if reg was used in between previous one and this.
3154 If so, neither one can be moved. */
3155 if (last_set
[regno
] != 0
3156 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3157 may_not_move
[regno
] = 1;
3158 if (n_times_set
[regno
] < 127)
3159 ++n_times_set
[regno
];
3160 last_set
[regno
] = insn
;
3163 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3166 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3168 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3169 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3170 /* Don't move a reg that has an explicit clobber.
3171 It's not worth the pain to try to do it correctly. */
3172 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3174 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3176 dest
= SET_DEST (x
);
3177 while (GET_CODE (dest
) == SUBREG
3178 || GET_CODE (dest
) == ZERO_EXTRACT
3179 || GET_CODE (dest
) == SIGN_EXTRACT
3180 || GET_CODE (dest
) == STRICT_LOW_PART
)
3181 dest
= XEXP (dest
, 0);
3182 if (GET_CODE (dest
) == REG
)
3184 register int regno
= REGNO (dest
);
3185 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3186 may_not_move
[regno
] = 1;
3187 if (last_set
[regno
] != 0
3188 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3189 may_not_move
[regno
] = 1;
3190 if (n_times_set
[regno
] < 127)
3191 ++n_times_set
[regno
];
3192 last_set
[regno
] = insn
;
3199 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3200 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3205 /* Given a loop that is bounded by LOOP_START and LOOP_END
3206 and that is entered at SCAN_START,
3207 return 1 if the register set in SET contained in insn INSN is used by
3208 any insn that precedes INSN in cyclic order starting
3209 from the loop entry point.
3211 We don't want to use INSN_LUID here because if we restrict INSN to those
3212 that have a valid INSN_LUID, it means we cannot move an invariant out
3213 from an inner loop past two loops. */
3216 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3217 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3219 rtx reg
= SET_DEST (set
);
3222 /* Scan forward checking for register usage. If we hit INSN, we
3223 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3224 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3226 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3227 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3237 /* A "basic induction variable" or biv is a pseudo reg that is set
3238 (within this loop) only by incrementing or decrementing it. */
3239 /* A "general induction variable" or giv is a pseudo reg whose
3240 value is a linear function of a biv. */
3242 /* Bivs are recognized by `basic_induction_var';
3243 Givs by `general_induct_var'. */
3245 /* Indexed by register number, indicates whether or not register is an
3246 induction variable, and if so what type. */
3248 enum iv_mode
*reg_iv_type
;
3250 /* Indexed by register number, contains pointer to `struct induction'
3251 if register is an induction variable. This holds general info for
3252 all induction variables. */
3254 struct induction
**reg_iv_info
;
3256 /* Indexed by register number, contains pointer to `struct iv_class'
3257 if register is a basic induction variable. This holds info describing
3258 the class (a related group) of induction variables that the biv belongs
3261 struct iv_class
**reg_biv_class
;
3263 /* The head of a list which links together (via the next field)
3264 every iv class for the current loop. */
3266 struct iv_class
*loop_iv_list
;
3268 /* Communication with routines called via `note_stores'. */
3270 static rtx note_insn
;
3272 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3274 static rtx addr_placeholder
;
3276 /* ??? Unfinished optimizations, and possible future optimizations,
3277 for the strength reduction code. */
3279 /* ??? There is one more optimization you might be interested in doing: to
3280 allocate pseudo registers for frequently-accessed memory locations.
3281 If the same memory location is referenced each time around, it might
3282 be possible to copy it into a register before and out after.
3283 This is especially useful when the memory location is a variable which
3284 is in a stack slot because somewhere its address is taken. If the
3285 loop doesn't contain a function call and the variable isn't volatile,
3286 it is safe to keep the value in a register for the duration of the
3287 loop. One tricky thing is that the copying of the value back from the
3288 register has to be done on all exits from the loop. You need to check that
3289 all the exits from the loop go to the same place. */
3291 /* ??? The interaction of biv elimination, and recognition of 'constant'
3292 bivs, may cause problems. */
3294 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3295 performance problems.
3297 Perhaps don't eliminate things that can be combined with an addressing
3298 mode. Find all givs that have the same biv, mult_val, and add_val;
3299 then for each giv, check to see if its only use dies in a following
3300 memory address. If so, generate a new memory address and check to see
3301 if it is valid. If it is valid, then store the modified memory address,
3302 otherwise, mark the giv as not done so that it will get its own iv. */
3304 /* ??? Could try to optimize branches when it is known that a biv is always
3307 /* ??? When replace a biv in a compare insn, we should replace with closest
3308 giv so that an optimized branch can still be recognized by the combiner,
3309 e.g. the VAX acb insn. */
3311 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3312 was rerun in loop_optimize whenever a register was added or moved.
3313 Also, some of the optimizations could be a little less conservative. */
3315 /* Perform strength reduction and induction variable elimination. */
3317 /* Pseudo registers created during this function will be beyond the last
3318 valid index in several tables including n_times_set and regno_last_uid.
3319 This does not cause a problem here, because the added registers cannot be
3320 givs outside of their loop, and hence will never be reconsidered.
3321 But scan_loop must check regnos to make sure they are in bounds. */
3324 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3325 loop_start
, loop_end
)
3338 /* This is 1 if current insn is not executed at least once for every loop
3340 int not_every_iteration
= 0;
3341 /* This is 1 if current insn may be executed more than once for every
3343 int maybe_multiple
= 0;
3344 /* Temporary list pointers for traversing loop_iv_list. */
3345 struct iv_class
*bl
, **backbl
;
3346 /* Ratio of extra register life span we can justify
3347 for saving an instruction. More if loop doesn't call subroutines
3348 since in that case saving an insn makes more difference
3349 and more registers are available. */
3350 /* ??? could set this to last value of threshold in move_movables */
3351 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3352 /* Map of pseudo-register replacements. */
3356 rtx end_insert_before
;
3359 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3360 * sizeof (enum iv_mode
*));
3361 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3362 reg_iv_info
= (struct induction
**)
3363 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3364 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3365 * sizeof (struct induction
*)));
3366 reg_biv_class
= (struct iv_class
**)
3367 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3368 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3369 * sizeof (struct iv_class
*)));
3372 addr_placeholder
= gen_reg_rtx (Pmode
);
3374 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3375 must be put before this insn, so that they will appear in the right
3376 order (i.e. loop order).
3378 If loop_end is the end of the current function, then emit a
3379 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3381 if (NEXT_INSN (loop_end
) != 0)
3382 end_insert_before
= NEXT_INSN (loop_end
);
3384 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3386 /* Scan through loop to find all possible bivs. */
3392 /* At end of a straight-in loop, we are done.
3393 At end of a loop entered at the bottom, scan the top. */
3394 if (p
== scan_start
)
3402 if (p
== scan_start
)
3406 if (GET_CODE (p
) == INSN
3407 && (set
= single_set (p
))
3408 && GET_CODE (SET_DEST (set
)) == REG
)
3410 dest_reg
= SET_DEST (set
);
3411 if (REGNO (dest_reg
) < max_reg_before_loop
3412 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3413 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3415 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3416 dest_reg
, p
, &inc_val
, &mult_val
))
3418 /* It is a possible basic induction variable.
3419 Create and initialize an induction structure for it. */
3422 = (struct induction
*) alloca (sizeof (struct induction
));
3424 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3425 not_every_iteration
, maybe_multiple
);
3426 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3428 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3429 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3433 /* Past CODE_LABEL, we get to insns that may be executed multiple
3434 times. The only way we can be sure that they can't is if every
3435 every jump insn between here and the end of the loop either
3436 returns, exits the loop, is a forward jump, or is a jump
3437 to the loop start. */
3439 if (GET_CODE (p
) == CODE_LABEL
)
3447 insn
= NEXT_INSN (insn
);
3448 if (insn
== scan_start
)
3456 if (insn
== scan_start
)
3460 if (GET_CODE (insn
) == JUMP_INSN
3461 && GET_CODE (PATTERN (insn
)) != RETURN
3462 && (! condjump_p (insn
)
3463 || (JUMP_LABEL (insn
) != 0
3464 && JUMP_LABEL (insn
) != scan_start
3465 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3466 || INSN_UID (insn
) >= max_uid_for_loop
3467 || (INSN_LUID (JUMP_LABEL (insn
))
3468 < INSN_LUID (insn
))))))
3476 /* Past a jump, we get to insns for which we can't count
3477 on whether they will be executed during each iteration. */
3478 /* This code appears twice in strength_reduce. There is also similar
3479 code in scan_loop. */
3480 if (GET_CODE (p
) == JUMP_INSN
3481 /* If we enter the loop in the middle, and scan around to the
3482 beginning, don't set not_every_iteration for that.
3483 This can be any kind of jump, since we want to know if insns
3484 will be executed if the loop is executed. */
3485 && ! (JUMP_LABEL (p
) == loop_top
3486 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3487 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3491 /* If this is a jump outside the loop, then it also doesn't
3492 matter. Check to see if the target of this branch is on the
3493 loop_number_exits_labels list. */
3495 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3497 label
= LABEL_NEXTREF (label
))
3498 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3502 not_every_iteration
= 1;
3505 else if (GET_CODE (p
) == NOTE
)
3507 /* At the virtual top of a converted loop, insns are again known to
3508 be executed each iteration: logically, the loop begins here
3509 even though the exit code has been duplicated. */
3510 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3511 not_every_iteration
= 0;
3512 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3514 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3518 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3519 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3520 or not an insn is known to be executed each iteration of the
3521 loop, whether or not any iterations are known to occur.
3523 Therefore, if we have just passed a label and have no more labels
3524 between here and the test insn of the loop, we know these insns
3525 will be executed each iteration. */
3527 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3528 && no_labels_between_p (p
, loop_end
))
3529 not_every_iteration
= 0;
3532 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3533 Make a sanity check against n_times_set. */
3534 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3536 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3537 /* Above happens if register modified by subreg, etc. */
3538 /* Make sure it is not recognized as a basic induction var: */
3539 || n_times_set
[bl
->regno
] != bl
->biv_count
3540 /* If never incremented, it is invariant that we decided not to
3541 move. So leave it alone. */
3542 || ! bl
->incremented
)
3544 if (loop_dump_stream
)
3545 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3547 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3548 ? "not induction variable"
3549 : (! bl
->incremented
? "never incremented"
3552 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3559 if (loop_dump_stream
)
3560 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3564 /* Exit if there are no bivs. */
3567 /* Can still unroll the loop anyways, but indicate that there is no
3568 strength reduction info available. */
3569 if (flag_unroll_loops
)
3570 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3575 /* Find initial value for each biv by searching backwards from loop_start,
3576 halting at first label. Also record any test condition. */
3579 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3583 if (GET_CODE (p
) == CALL_INSN
)
3586 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3587 || GET_CODE (p
) == CALL_INSN
)
3588 note_stores (PATTERN (p
), record_initial
);
3590 /* Record any test of a biv that branches around the loop if no store
3591 between it and the start of loop. We only care about tests with
3592 constants and registers and only certain of those. */
3593 if (GET_CODE (p
) == JUMP_INSN
3594 && JUMP_LABEL (p
) != 0
3595 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3596 && (test
= get_condition_for_loop (p
)) != 0
3597 && GET_CODE (XEXP (test
, 0)) == REG
3598 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3599 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3600 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3601 && bl
->init_insn
== 0)
3603 /* If an NE test, we have an initial value! */
3604 if (GET_CODE (test
) == NE
)
3607 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3608 XEXP (test
, 0), XEXP (test
, 1));
3611 bl
->initial_test
= test
;
3615 /* Look at the each biv and see if we can say anything better about its
3616 initial value from any initializing insns set up above. (This is done
3617 in two passes to avoid missing SETs in a PARALLEL.) */
3618 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3622 if (! bl
->init_insn
)
3625 src
= SET_SRC (bl
->init_set
);
3627 if (loop_dump_stream
)
3628 fprintf (loop_dump_stream
,
3629 "Biv %d initialized at insn %d: initial value ",
3630 bl
->regno
, INSN_UID (bl
->init_insn
));
3632 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3633 || GET_MODE (src
) == VOIDmode
)
3634 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3636 bl
->initial_value
= src
;
3638 if (loop_dump_stream
)
3640 if (GET_CODE (src
) == CONST_INT
)
3641 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3644 print_rtl (loop_dump_stream
, src
);
3645 fprintf (loop_dump_stream
, "\n");
3651 /* Biv initial value is not simple move,
3652 so let it keep initial value of "itself". */
3654 if (loop_dump_stream
)
3655 fprintf (loop_dump_stream
, "is complex\n");
3659 /* Search the loop for general induction variables. */
3661 /* A register is a giv if: it is only set once, it is a function of a
3662 biv and a constant (or invariant), and it is not a biv. */
3664 not_every_iteration
= 0;
3670 /* At end of a straight-in loop, we are done.
3671 At end of a loop entered at the bottom, scan the top. */
3672 if (p
== scan_start
)
3680 if (p
== scan_start
)
3684 /* Look for a general induction variable in a register. */
3685 if (GET_CODE (p
) == INSN
3686 && (set
= single_set (p
))
3687 && GET_CODE (SET_DEST (set
)) == REG
3688 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3696 dest_reg
= SET_DEST (set
);
3697 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3700 if (/* SET_SRC is a giv. */
3701 ((benefit
= general_induction_var (SET_SRC (set
),
3704 /* Equivalent expression is a giv. */
3705 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3706 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3708 &add_val
, &mult_val
))))
3709 /* Don't try to handle any regs made by loop optimization.
3710 We have nothing on them in regno_first_uid, etc. */
3711 && REGNO (dest_reg
) < max_reg_before_loop
3712 /* Don't recognize a BASIC_INDUCT_VAR here. */
3713 && dest_reg
!= src_reg
3714 /* This must be the only place where the register is set. */
3715 && (n_times_set
[REGNO (dest_reg
)] == 1
3716 /* or all sets must be consecutive and make a giv. */
3717 || (benefit
= consec_sets_giv (benefit
, p
,
3719 &add_val
, &mult_val
))))
3723 = (struct induction
*) alloca (sizeof (struct induction
));
3726 /* If this is a library call, increase benefit. */
3727 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3728 benefit
+= libcall_benefit (p
);
3730 /* Skip the consecutive insns, if there are any. */
3731 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3734 /* If first insn of libcall sequence, skip to end.
3735 Do this at start of loop, since INSN is guaranteed to
3737 if (GET_CODE (p
) != NOTE
3738 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3741 do p
= NEXT_INSN (p
);
3742 while (GET_CODE (p
) == NOTE
);
3745 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3746 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3752 #ifndef DONT_REDUCE_ADDR
3753 /* Look for givs which are memory addresses. */
3754 /* This resulted in worse code on a VAX 8600. I wonder if it
3756 if (GET_CODE (p
) == INSN
)
3757 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3761 /* Update the status of whether giv can derive other givs. This can
3762 change when we pass a label or an insn that updates a biv. */
3763 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3764 || GET_CODE (p
) == CODE_LABEL
)
3765 update_giv_derive (p
);
3767 /* Past a jump, we get to insns for which we can't count
3768 on whether they will be executed during each iteration. */
3769 /* This code appears twice in strength_reduce. There is also similar
3770 code in scan_loop. */
3771 if (GET_CODE (p
) == JUMP_INSN
3772 /* If we enter the loop in the middle, and scan around to the
3773 beginning, don't set not_every_iteration for that.
3774 This can be any kind of jump, since we want to know if insns
3775 will be executed if the loop is executed. */
3776 && ! (JUMP_LABEL (p
) == loop_top
3777 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3778 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3782 /* If this is a jump outside the loop, then it also doesn't
3783 matter. Check to see if the target of this branch is on the
3784 loop_number_exits_labels list. */
3786 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3788 label
= LABEL_NEXTREF (label
))
3789 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3793 not_every_iteration
= 1;
3796 else if (GET_CODE (p
) == NOTE
)
3798 /* At the virtual top of a converted loop, insns are again known to
3799 be executed each iteration: logically, the loop begins here
3800 even though the exit code has been duplicated. */
3801 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3802 not_every_iteration
= 0;
3803 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3805 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3809 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3810 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3811 or not an insn is known to be executed each iteration of the
3812 loop, whether or not any iterations are known to occur.
3814 Therefore, if we have just passed a label and have no more labels
3815 between here and the test insn of the loop, we know these insns
3816 will be executed each iteration. */
3818 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3819 && no_labels_between_p (p
, loop_end
))
3820 not_every_iteration
= 0;
3823 /* Try to calculate and save the number of loop iterations. This is
3824 set to zero if the actual number can not be calculated. This must
3825 be called after all giv's have been identified, since otherwise it may
3826 fail if the iteration variable is a giv. */
3828 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3830 /* Now for each giv for which we still don't know whether or not it is
3831 replaceable, check to see if it is replaceable because its final value
3832 can be calculated. This must be done after loop_iterations is called,
3833 so that final_giv_value will work correctly. */
3835 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3837 struct induction
*v
;
3839 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3840 if (! v
->replaceable
&& ! v
->not_replaceable
)
3841 check_final_value (v
, loop_start
, loop_end
);
3844 /* Try to prove that the loop counter variable (if any) is always
3845 nonnegative; if so, record that fact with a REG_NONNEG note
3846 so that "decrement and branch until zero" insn can be used. */
3847 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3850 /* record loop-variables relevant for BCT optimization before unrolling
3851 the loop. Unrolling may update part of this information, and the
3852 correct data will be used for generating the BCT. */
3853 #ifdef HAVE_decrement_and_branch_on_count
3854 if (HAVE_decrement_and_branch_on_count
)
3855 analyze_loop_iterations (loop_start
, loop_end
);
3859 /* Create reg_map to hold substitutions for replaceable giv regs. */
3860 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3861 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3863 /* Examine each iv class for feasibility of strength reduction/induction
3864 variable elimination. */
3866 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3868 struct induction
*v
;
3871 rtx final_value
= 0;
3873 /* Test whether it will be possible to eliminate this biv
3874 provided all givs are reduced. This is possible if either
3875 the reg is not used outside the loop, or we can compute
3876 what its final value will be.
3878 For architectures with a decrement_and_branch_until_zero insn,
3879 don't do this if we put a REG_NONNEG note on the endtest for
3882 /* Compare against bl->init_insn rather than loop_start.
3883 We aren't concerned with any uses of the biv between
3884 init_insn and loop_start since these won't be affected
3885 by the value of the biv elsewhere in the function, so
3886 long as init_insn doesn't use the biv itself.
3887 March 14, 1989 -- self@bayes.arc.nasa.gov */
3889 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3891 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3892 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3893 #ifdef HAVE_decrement_and_branch_until_zero
3896 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3897 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3898 #ifdef HAVE_decrement_and_branch_until_zero
3902 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3903 threshold
, insn_count
);
3906 if (loop_dump_stream
)
3908 fprintf (loop_dump_stream
,
3909 "Cannot eliminate biv %d.\n",
3911 fprintf (loop_dump_stream
,
3912 "First use: insn %d, last use: insn %d.\n",
3913 REGNO_FIRST_UID (bl
->regno
),
3914 REGNO_LAST_UID (bl
->regno
));
3918 /* Combine all giv's for this iv_class. */
3921 /* This will be true at the end, if all givs which depend on this
3922 biv have been strength reduced.
3923 We can't (currently) eliminate the biv unless this is so. */
3926 /* Check each giv in this class to see if we will benefit by reducing
3927 it. Skip giv's combined with others. */
3928 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3930 struct induction
*tv
;
3932 if (v
->ignore
|| v
->same
)
3935 benefit
= v
->benefit
;
3937 /* Reduce benefit if not replaceable, since we will insert
3938 a move-insn to replace the insn that calculates this giv.
3939 Don't do this unless the giv is a user variable, since it
3940 will often be marked non-replaceable because of the duplication
3941 of the exit code outside the loop. In such a case, the copies
3942 we insert are dead and will be deleted. So they don't have
3943 a cost. Similar situations exist. */
3944 /* ??? The new final_[bg]iv_value code does a much better job
3945 of finding replaceable giv's, and hence this code may no longer
3947 if (! v
->replaceable
&& ! bl
->eliminable
3948 && REG_USERVAR_P (v
->dest_reg
))
3949 benefit
-= copy_cost
;
3951 /* Decrease the benefit to count the add-insns that we will
3952 insert to increment the reduced reg for the giv. */
3953 benefit
-= add_cost
* bl
->biv_count
;
3955 /* Decide whether to strength-reduce this giv or to leave the code
3956 unchanged (recompute it from the biv each time it is used).
3957 This decision can be made independently for each giv. */
3960 /* Attempt to guess whether autoincrement will handle some of the
3961 new add insns; if so, increase BENEFIT (undo the subtraction of
3962 add_cost that was done above). */
3963 if (v
->giv_type
== DEST_ADDR
3964 && GET_CODE (v
->mult_val
) == CONST_INT
)
3966 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3967 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3968 benefit
+= add_cost
* bl
->biv_count
;
3970 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3971 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3972 benefit
+= add_cost
* bl
->biv_count
;
3977 /* If an insn is not to be strength reduced, then set its ignore
3978 flag, and clear all_reduced. */
3980 /* A giv that depends on a reversed biv must be reduced if it is
3981 used after the loop exit, otherwise, it would have the wrong
3982 value after the loop exit. To make it simple, just reduce all
3983 of such giv's whether or not we know they are used after the loop
3986 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
3989 if (loop_dump_stream
)
3990 fprintf (loop_dump_stream
,
3991 "giv of insn %d not worth while, %d vs %d.\n",
3993 v
->lifetime
* threshold
* benefit
, insn_count
);
3999 /* Check that we can increment the reduced giv without a
4000 multiply insn. If not, reject it. */
4002 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4003 if (tv
->mult_val
== const1_rtx
4004 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4006 if (loop_dump_stream
)
4007 fprintf (loop_dump_stream
,
4008 "giv of insn %d: would need a multiply.\n",
4009 INSN_UID (v
->insn
));
4017 /* Reduce each giv that we decided to reduce. */
4019 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4021 struct induction
*tv
;
4022 if (! v
->ignore
&& v
->same
== 0)
4024 int auto_inc_opt
= 0;
4026 v
->new_reg
= gen_reg_rtx (v
->mode
);
4029 /* If the target has auto-increment addressing modes, and
4030 this is an address giv, then try to put the increment
4031 immediately after its use, so that flow can create an
4032 auto-increment addressing mode. */
4033 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4034 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4035 /* We don't handle reversed biv's because bl->biv->insn
4036 does not have a valid INSN_LUID. */
4038 && v
->always_executed
&& ! v
->maybe_multiple
)
4040 /* If other giv's have been combined with this one, then
4041 this will work only if all uses of the other giv's occur
4042 before this giv's insn. This is difficult to check.
4044 We simplify this by looking for the common case where
4045 there is one DEST_REG giv, and this giv's insn is the
4046 last use of the dest_reg of that DEST_REG giv. If the
4047 the increment occurs after the address giv, then we can
4048 perform the optimization. (Otherwise, the increment
4049 would have to go before other_giv, and we would not be
4050 able to combine it with the address giv to get an
4051 auto-inc address.) */
4052 if (v
->combined_with
)
4054 struct induction
*other_giv
= 0;
4056 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4064 if (! tv
&& other_giv
4065 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4066 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4067 == INSN_UID (v
->insn
))
4068 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4071 /* Check for case where increment is before the the address
4073 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
4082 /* We can't put an insn immediately after one setting
4083 cc0, or immediately before one using cc0. */
4084 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4085 || (auto_inc_opt
== -1
4086 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4087 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4088 && sets_cc0_p (PATTERN (prev
))))
4094 v
->auto_inc_opt
= 1;
4098 /* For each place where the biv is incremented, add an insn
4099 to increment the new, reduced reg for the giv. */
4100 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4105 insert_before
= tv
->insn
;
4106 else if (auto_inc_opt
== 1)
4107 insert_before
= NEXT_INSN (v
->insn
);
4109 insert_before
= v
->insn
;
4111 if (tv
->mult_val
== const1_rtx
)
4112 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4113 v
->new_reg
, v
->new_reg
, insert_before
);
4114 else /* tv->mult_val == const0_rtx */
4115 /* A multiply is acceptable here
4116 since this is presumed to be seldom executed. */
4117 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4118 v
->add_val
, v
->new_reg
, insert_before
);
4121 /* Add code at loop start to initialize giv's reduced reg. */
4123 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4124 v
->add_val
, v
->new_reg
, loop_start
);
4128 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4131 For each giv register that can be reduced now: if replaceable,
4132 substitute reduced reg wherever the old giv occurs;
4133 else add new move insn "giv_reg = reduced_reg".
4135 Also check for givs whose first use is their definition and whose
4136 last use is the definition of another giv. If so, it is likely
4137 dead and should not be used to eliminate a biv. */
4138 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4140 if (v
->same
&& v
->same
->ignore
)
4146 if (v
->giv_type
== DEST_REG
4147 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4149 struct induction
*v1
;
4151 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4152 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4156 /* Update expression if this was combined, in case other giv was
4159 v
->new_reg
= replace_rtx (v
->new_reg
,
4160 v
->same
->dest_reg
, v
->same
->new_reg
);
4162 if (v
->giv_type
== DEST_ADDR
)
4163 /* Store reduced reg as the address in the memref where we found
4165 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4166 else if (v
->replaceable
)
4168 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4171 /* I can no longer duplicate the original problem. Perhaps
4172 this is unnecessary now? */
4174 /* Replaceable; it isn't strictly necessary to delete the old
4175 insn and emit a new one, because v->dest_reg is now dead.
4177 However, especially when unrolling loops, the special
4178 handling for (set REG0 REG1) in the second cse pass may
4179 make v->dest_reg live again. To avoid this problem, emit
4180 an insn to set the original giv reg from the reduced giv.
4181 We can not delete the original insn, since it may be part
4182 of a LIBCALL, and the code in flow that eliminates dead
4183 libcalls will fail if it is deleted. */
4184 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4190 /* Not replaceable; emit an insn to set the original giv reg from
4191 the reduced giv, same as above. */
4192 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4196 /* When a loop is reversed, givs which depend on the reversed
4197 biv, and which are live outside the loop, must be set to their
4198 correct final value. This insn is only needed if the giv is
4199 not replaceable. The correct final value is the same as the
4200 value that the giv starts the reversed loop with. */
4201 if (bl
->reversed
&& ! v
->replaceable
)
4202 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4203 v
->add_val
, v
->dest_reg
, end_insert_before
);
4204 else if (v
->final_value
)
4208 /* If the loop has multiple exits, emit the insn before the
4209 loop to ensure that it will always be executed no matter
4210 how the loop exits. Otherwise, emit the insn after the loop,
4211 since this is slightly more efficient. */
4212 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4213 insert_before
= loop_start
;
4215 insert_before
= end_insert_before
;
4216 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4220 /* If the insn to set the final value of the giv was emitted
4221 before the loop, then we must delete the insn inside the loop
4222 that sets it. If this is a LIBCALL, then we must delete
4223 every insn in the libcall. Note, however, that
4224 final_giv_value will only succeed when there are multiple
4225 exits if the giv is dead at each exit, hence it does not
4226 matter that the original insn remains because it is dead
4228 /* Delete the insn inside the loop that sets the giv since
4229 the giv is now set before (or after) the loop. */
4230 delete_insn (v
->insn
);
4234 if (loop_dump_stream
)
4236 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4237 INSN_UID (v
->insn
));
4238 print_rtl (loop_dump_stream
, v
->new_reg
);
4239 fprintf (loop_dump_stream
, "\n");
4243 /* All the givs based on the biv bl have been reduced if they
4246 /* For each giv not marked as maybe dead that has been combined with a
4247 second giv, clear any "maybe dead" mark on that second giv.
4248 v->new_reg will either be or refer to the register of the giv it
4251 Doing this clearing avoids problems in biv elimination where a
4252 giv's new_reg is a complex value that can't be put in the insn but
4253 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4254 Since the register will be used in either case, we'd prefer it be
4255 used from the simpler giv. */
4257 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4258 if (! v
->maybe_dead
&& v
->same
)
4259 v
->same
->maybe_dead
= 0;
4261 /* Try to eliminate the biv, if it is a candidate.
4262 This won't work if ! all_reduced,
4263 since the givs we planned to use might not have been reduced.
4265 We have to be careful that we didn't initially think we could eliminate
4266 this biv because of a giv that we now think may be dead and shouldn't
4267 be used as a biv replacement.
4269 Also, there is the possibility that we may have a giv that looks
4270 like it can be used to eliminate a biv, but the resulting insn
4271 isn't valid. This can happen, for example, on the 88k, where a
4272 JUMP_INSN can compare a register only with zero. Attempts to
4273 replace it with a compare with a constant will fail.
4275 Note that in cases where this call fails, we may have replaced some
4276 of the occurrences of the biv with a giv, but no harm was done in
4277 doing so in the rare cases where it can occur. */
4279 if (all_reduced
== 1 && bl
->eliminable
4280 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4281 threshold
, insn_count
))
4284 /* ?? If we created a new test to bypass the loop entirely,
4285 or otherwise drop straight in, based on this test, then
4286 we might want to rewrite it also. This way some later
4287 pass has more hope of removing the initialization of this
4290 /* If final_value != 0, then the biv may be used after loop end
4291 and we must emit an insn to set it just in case.
4293 Reversed bivs already have an insn after the loop setting their
4294 value, so we don't need another one. We can't calculate the
4295 proper final value for such a biv here anyways. */
4296 if (final_value
!= 0 && ! bl
->reversed
)
4300 /* If the loop has multiple exits, emit the insn before the
4301 loop to ensure that it will always be executed no matter
4302 how the loop exits. Otherwise, emit the insn after the
4303 loop, since this is slightly more efficient. */
4304 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4305 insert_before
= loop_start
;
4307 insert_before
= end_insert_before
;
4309 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4314 /* Delete all of the instructions inside the loop which set
4315 the biv, as they are all dead. If is safe to delete them,
4316 because an insn setting a biv will never be part of a libcall. */
4317 /* However, deleting them will invalidate the regno_last_uid info,
4318 so keeping them around is more convenient. Final_biv_value
4319 will only succeed when there are multiple exits if the biv
4320 is dead at each exit, hence it does not matter that the original
4321 insn remains, because it is dead anyways. */
4322 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4323 delete_insn (v
->insn
);
4326 if (loop_dump_stream
)
4327 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4332 /* Go through all the instructions in the loop, making all the
4333 register substitutions scheduled in REG_MAP. */
4335 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4336 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4337 || GET_CODE (p
) == CALL_INSN
)
4339 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4340 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4344 /* Unroll loops from within strength reduction so that we can use the
4345 induction variable information that strength_reduce has already
4348 if (flag_unroll_loops
)
4349 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4352 /* instrument the loop with bct insn */
4353 #ifdef HAVE_decrement_and_branch_on_count
4354 if (HAVE_decrement_and_branch_on_count
)
4355 insert_bct (loop_start
, loop_end
);
4359 if (loop_dump_stream
)
4360 fprintf (loop_dump_stream
, "\n");
4363 /* Return 1 if X is a valid source for an initial value (or as value being
4364 compared against in an initial test).
4366 X must be either a register or constant and must not be clobbered between
4367 the current insn and the start of the loop.
4369 INSN is the insn containing X. */
4372 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4381 /* Only consider pseudos we know about initialized in insns whose luids
4383 if (GET_CODE (x
) != REG
4384 || REGNO (x
) >= max_reg_before_loop
)
4387 /* Don't use call-clobbered registers across a call which clobbers it. On
4388 some machines, don't use any hard registers at all. */
4389 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4391 #ifdef SMALL_REGISTER_CLASSES
4392 SMALL_REGISTER_CLASSES
4396 || (call_used_regs
[REGNO (x
)] && call_seen
))
4400 /* Don't use registers that have been clobbered before the start of the
4402 if (reg_set_between_p (x
, insn
, loop_start
))
4408 /* Scan X for memory refs and check each memory address
4409 as a possible giv. INSN is the insn whose pattern X comes from.
4410 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4411 every loop iteration. */
4414 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4417 int not_every_iteration
;
4418 rtx loop_start
, loop_end
;
4421 register enum rtx_code code
;
4427 code
= GET_CODE (x
);
4451 benefit
= general_induction_var (XEXP (x
, 0),
4452 &src_reg
, &add_val
, &mult_val
);
4454 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4455 Such a giv isn't useful. */
4456 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4458 /* Found one; record it. */
4460 = (struct induction
*) oballoc (sizeof (struct induction
));
4462 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4463 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4464 &XEXP (x
, 0), loop_start
, loop_end
);
4466 v
->mem_mode
= GET_MODE (x
);
4472 /* Recursively scan the subexpressions for other mem refs. */
4474 fmt
= GET_RTX_FORMAT (code
);
4475 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4477 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4479 else if (fmt
[i
] == 'E')
4480 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4481 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4482 loop_start
, loop_end
);
4485 /* Fill in the data about one biv update.
4486 V is the `struct induction' in which we record the biv. (It is
4487 allocated by the caller, with alloca.)
4488 INSN is the insn that sets it.
4489 DEST_REG is the biv's reg.
4491 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4492 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4493 being set to INC_VAL.
4495 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4496 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4497 can be executed more than once per iteration. If MAYBE_MULTIPLE
4498 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4499 executed exactly once per iteration. */
4502 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4503 not_every_iteration
, maybe_multiple
)
4504 struct induction
*v
;
4509 int not_every_iteration
;
4512 struct iv_class
*bl
;
4515 v
->src_reg
= dest_reg
;
4516 v
->dest_reg
= dest_reg
;
4517 v
->mult_val
= mult_val
;
4518 v
->add_val
= inc_val
;
4519 v
->mode
= GET_MODE (dest_reg
);
4520 v
->always_computable
= ! not_every_iteration
;
4521 v
->always_executed
= ! not_every_iteration
;
4522 v
->maybe_multiple
= maybe_multiple
;
4524 /* Add this to the reg's iv_class, creating a class
4525 if this is the first incrementation of the reg. */
4527 bl
= reg_biv_class
[REGNO (dest_reg
)];
4530 /* Create and initialize new iv_class. */
4532 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4534 bl
->regno
= REGNO (dest_reg
);
4540 /* Set initial value to the reg itself. */
4541 bl
->initial_value
= dest_reg
;
4542 /* We haven't seen the initializing insn yet */
4545 bl
->initial_test
= 0;
4546 bl
->incremented
= 0;
4550 bl
->total_benefit
= 0;
4552 /* Add this class to loop_iv_list. */
4553 bl
->next
= loop_iv_list
;
4556 /* Put it in the array of biv register classes. */
4557 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4560 /* Update IV_CLASS entry for this biv. */
4561 v
->next_iv
= bl
->biv
;
4564 if (mult_val
== const1_rtx
)
4565 bl
->incremented
= 1;
4567 if (loop_dump_stream
)
4569 fprintf (loop_dump_stream
,
4570 "Insn %d: possible biv, reg %d,",
4571 INSN_UID (insn
), REGNO (dest_reg
));
4572 if (GET_CODE (inc_val
) == CONST_INT
)
4573 fprintf (loop_dump_stream
, " const = %d\n",
4577 fprintf (loop_dump_stream
, " const = ");
4578 print_rtl (loop_dump_stream
, inc_val
);
4579 fprintf (loop_dump_stream
, "\n");
4584 /* Fill in the data about one giv.
4585 V is the `struct induction' in which we record the giv. (It is
4586 allocated by the caller, with alloca.)
4587 INSN is the insn that sets it.
4588 BENEFIT estimates the savings from deleting this insn.
4589 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4590 into a register or is used as a memory address.
4592 SRC_REG is the biv reg which the giv is computed from.
4593 DEST_REG is the giv's reg (if the giv is stored in a reg).
4594 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4595 LOCATION points to the place where this giv's value appears in INSN. */
4598 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4599 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4600 struct induction
*v
;
4604 rtx mult_val
, add_val
;
4607 int not_every_iteration
;
4609 rtx loop_start
, loop_end
;
4611 struct induction
*b
;
4612 struct iv_class
*bl
;
4613 rtx set
= single_set (insn
);
4617 v
->src_reg
= src_reg
;
4619 v
->dest_reg
= dest_reg
;
4620 v
->mult_val
= mult_val
;
4621 v
->add_val
= add_val
;
4622 v
->benefit
= benefit
;
4623 v
->location
= location
;
4625 v
->combined_with
= 0;
4626 v
->maybe_multiple
= 0;
4628 v
->derive_adjustment
= 0;
4634 v
->auto_inc_opt
= 0;
4638 /* The v->always_computable field is used in update_giv_derive, to
4639 determine whether a giv can be used to derive another giv. For a
4640 DEST_REG giv, INSN computes a new value for the giv, so its value
4641 isn't computable if INSN insn't executed every iteration.
4642 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4643 it does not compute a new value. Hence the value is always computable
4644 regardless of whether INSN is executed each iteration. */
4646 if (type
== DEST_ADDR
)
4647 v
->always_computable
= 1;
4649 v
->always_computable
= ! not_every_iteration
;
4651 v
->always_executed
= ! not_every_iteration
;
4653 if (type
== DEST_ADDR
)
4655 v
->mode
= GET_MODE (*location
);
4659 else /* type == DEST_REG */
4661 v
->mode
= GET_MODE (SET_DEST (set
));
4663 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4664 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4666 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4668 /* If the lifetime is zero, it means that this register is
4669 really a dead store. So mark this as a giv that can be
4670 ignored. This will not prevent the biv from being eliminated. */
4671 if (v
->lifetime
== 0)
4674 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4675 reg_iv_info
[REGNO (dest_reg
)] = v
;
4678 /* Add the giv to the class of givs computed from one biv. */
4680 bl
= reg_biv_class
[REGNO (src_reg
)];
4683 v
->next_iv
= bl
->giv
;
4685 /* Don't count DEST_ADDR. This is supposed to count the number of
4686 insns that calculate givs. */
4687 if (type
== DEST_REG
)
4689 bl
->total_benefit
+= benefit
;
4692 /* Fatal error, biv missing for this giv? */
4695 if (type
== DEST_ADDR
)
4699 /* The giv can be replaced outright by the reduced register only if all
4700 of the following conditions are true:
4701 - the insn that sets the giv is always executed on any iteration
4702 on which the giv is used at all
4703 (there are two ways to deduce this:
4704 either the insn is executed on every iteration,
4705 or all uses follow that insn in the same basic block),
4706 - the giv is not used outside the loop
4707 - no assignments to the biv occur during the giv's lifetime. */
4709 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4710 /* Previous line always fails if INSN was moved by loop opt. */
4711 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4712 && (! not_every_iteration
4713 || last_use_this_basic_block (dest_reg
, insn
)))
4715 /* Now check that there are no assignments to the biv within the
4716 giv's lifetime. This requires two separate checks. */
4718 /* Check each biv update, and fail if any are between the first
4719 and last use of the giv.
4721 If this loop contains an inner loop that was unrolled, then
4722 the insn modifying the biv may have been emitted by the loop
4723 unrolling code, and hence does not have a valid luid. Just
4724 mark the biv as not replaceable in this case. It is not very
4725 useful as a biv, because it is used in two different loops.
4726 It is very unlikely that we would be able to optimize the giv
4727 using this biv anyways. */
4730 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4732 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4733 || ((uid_luid
[INSN_UID (b
->insn
)]
4734 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4735 && (uid_luid
[INSN_UID (b
->insn
)]
4736 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4739 v
->not_replaceable
= 1;
4744 /* If there are any backwards branches that go from after the
4745 biv update to before it, then this giv is not replaceable. */
4747 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4748 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4751 v
->not_replaceable
= 1;
4757 /* May still be replaceable, we don't have enough info here to
4760 v
->not_replaceable
= 0;
4764 if (loop_dump_stream
)
4766 if (type
== DEST_REG
)
4767 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4768 INSN_UID (insn
), REGNO (dest_reg
));
4770 fprintf (loop_dump_stream
, "Insn %d: dest address",
4773 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4774 REGNO (src_reg
), v
->benefit
);
4775 fprintf (loop_dump_stream
, " used %d lifetime %d",
4776 v
->times_used
, v
->lifetime
);
4779 fprintf (loop_dump_stream
, " replaceable");
4781 if (GET_CODE (mult_val
) == CONST_INT
)
4782 fprintf (loop_dump_stream
, " mult %d",
4786 fprintf (loop_dump_stream
, " mult ");
4787 print_rtl (loop_dump_stream
, mult_val
);
4790 if (GET_CODE (add_val
) == CONST_INT
)
4791 fprintf (loop_dump_stream
, " add %d",
4795 fprintf (loop_dump_stream
, " add ");
4796 print_rtl (loop_dump_stream
, add_val
);
4800 if (loop_dump_stream
)
4801 fprintf (loop_dump_stream
, "\n");
4806 /* All this does is determine whether a giv can be made replaceable because
4807 its final value can be calculated. This code can not be part of record_giv
4808 above, because final_giv_value requires that the number of loop iterations
4809 be known, and that can not be accurately calculated until after all givs
4810 have been identified. */
4813 check_final_value (v
, loop_start
, loop_end
)
4814 struct induction
*v
;
4815 rtx loop_start
, loop_end
;
4817 struct iv_class
*bl
;
4818 rtx final_value
= 0;
4820 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4822 /* DEST_ADDR givs will never reach here, because they are always marked
4823 replaceable above in record_giv. */
4825 /* The giv can be replaced outright by the reduced register only if all
4826 of the following conditions are true:
4827 - the insn that sets the giv is always executed on any iteration
4828 on which the giv is used at all
4829 (there are two ways to deduce this:
4830 either the insn is executed on every iteration,
4831 or all uses follow that insn in the same basic block),
4832 - its final value can be calculated (this condition is different
4833 than the one above in record_giv)
4834 - no assignments to the biv occur during the giv's lifetime. */
4837 /* This is only called now when replaceable is known to be false. */
4838 /* Clear replaceable, so that it won't confuse final_giv_value. */
4842 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4843 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4845 int biv_increment_seen
= 0;
4851 /* When trying to determine whether or not a biv increment occurs
4852 during the lifetime of the giv, we can ignore uses of the variable
4853 outside the loop because final_value is true. Hence we can not
4854 use regno_last_uid and regno_first_uid as above in record_giv. */
4856 /* Search the loop to determine whether any assignments to the
4857 biv occur during the giv's lifetime. Start with the insn
4858 that sets the giv, and search around the loop until we come
4859 back to that insn again.
4861 Also fail if there is a jump within the giv's lifetime that jumps
4862 to somewhere outside the lifetime but still within the loop. This
4863 catches spaghetti code where the execution order is not linear, and
4864 hence the above test fails. Here we assume that the giv lifetime
4865 does not extend from one iteration of the loop to the next, so as
4866 to make the test easier. Since the lifetime isn't known yet,
4867 this requires two loops. See also record_giv above. */
4869 last_giv_use
= v
->insn
;
4875 p
= NEXT_INSN (loop_start
);
4879 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4880 || GET_CODE (p
) == CALL_INSN
)
4882 if (biv_increment_seen
)
4884 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4887 v
->not_replaceable
= 1;
4891 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4892 biv_increment_seen
= 1;
4893 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4898 /* Now that the lifetime of the giv is known, check for branches
4899 from within the lifetime to outside the lifetime if it is still
4909 p
= NEXT_INSN (loop_start
);
4910 if (p
== last_giv_use
)
4913 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4914 && LABEL_NAME (JUMP_LABEL (p
))
4915 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4916 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4917 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4918 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4919 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4920 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4921 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4924 v
->not_replaceable
= 1;
4926 if (loop_dump_stream
)
4927 fprintf (loop_dump_stream
,
4928 "Found branch outside giv lifetime.\n");
4935 /* If it is replaceable, then save the final value. */
4937 v
->final_value
= final_value
;
4940 if (loop_dump_stream
&& v
->replaceable
)
4941 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4942 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4945 /* Update the status of whether a giv can derive other givs.
4947 We need to do something special if there is or may be an update to the biv
4948 between the time the giv is defined and the time it is used to derive
4951 In addition, a giv that is only conditionally set is not allowed to
4952 derive another giv once a label has been passed.
4954 The cases we look at are when a label or an update to a biv is passed. */
4957 update_giv_derive (p
)
4960 struct iv_class
*bl
;
4961 struct induction
*biv
, *giv
;
4965 /* Search all IV classes, then all bivs, and finally all givs.
4967 There are three cases we are concerned with. First we have the situation
4968 of a giv that is only updated conditionally. In that case, it may not
4969 derive any givs after a label is passed.
4971 The second case is when a biv update occurs, or may occur, after the
4972 definition of a giv. For certain biv updates (see below) that are
4973 known to occur between the giv definition and use, we can adjust the
4974 giv definition. For others, or when the biv update is conditional,
4975 we must prevent the giv from deriving any other givs. There are two
4976 sub-cases within this case.
4978 If this is a label, we are concerned with any biv update that is done
4979 conditionally, since it may be done after the giv is defined followed by
4980 a branch here (actually, we need to pass both a jump and a label, but
4981 this extra tracking doesn't seem worth it).
4983 If this is a jump, we are concerned about any biv update that may be
4984 executed multiple times. We are actually only concerned about
4985 backward jumps, but it is probably not worth performing the test
4986 on the jump again here.
4988 If this is a biv update, we must adjust the giv status to show that a
4989 subsequent biv update was performed. If this adjustment cannot be done,
4990 the giv cannot derive further givs. */
4992 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4993 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
4994 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
4997 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
4999 /* If cant_derive is already true, there is no point in
5000 checking all of these conditions again. */
5001 if (giv
->cant_derive
)
5004 /* If this giv is conditionally set and we have passed a label,
5005 it cannot derive anything. */
5006 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5007 giv
->cant_derive
= 1;
5009 /* Skip givs that have mult_val == 0, since
5010 they are really invariants. Also skip those that are
5011 replaceable, since we know their lifetime doesn't contain
5013 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5016 /* The only way we can allow this giv to derive another
5017 is if this is a biv increment and we can form the product
5018 of biv->add_val and giv->mult_val. In this case, we will
5019 be able to compute a compensation. */
5020 else if (biv
->insn
== p
)
5024 if (biv
->mult_val
== const1_rtx
)
5025 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
5030 if (tem
&& giv
->derive_adjustment
)
5031 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
5032 giv
->derive_adjustment
),
5035 giv
->derive_adjustment
= tem
;
5037 giv
->cant_derive
= 1;
5039 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5040 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5041 giv
->cant_derive
= 1;
5046 /* Check whether an insn is an increment legitimate for a basic induction var.
5047 X is the source of insn P, or a part of it.
5048 MODE is the mode in which X should be interpreted.
5050 DEST_REG is the putative biv, also the destination of the insn.
5051 We accept patterns of these forms:
5052 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5053 REG = INVARIANT + REG
5055 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5056 and store the additive term into *INC_VAL.
5058 If X is an assignment of an invariant into DEST_REG, we set
5059 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5061 We also want to detect a BIV when it corresponds to a variable
5062 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5063 of the variable may be a PLUS that adds a SUBREG of that variable to
5064 an invariant and then sign- or zero-extends the result of the PLUS
5067 Most GIVs in such cases will be in the promoted mode, since that is the
5068 probably the natural computation mode (and almost certainly the mode
5069 used for addresses) on the machine. So we view the pseudo-reg containing
5070 the variable as the BIV, as if it were simply incremented.
5072 Note that treating the entire pseudo as a BIV will result in making
5073 simple increments to any GIVs based on it. However, if the variable
5074 overflows in its declared mode but not its promoted mode, the result will
5075 be incorrect. This is acceptable if the variable is signed, since
5076 overflows in such cases are undefined, but not if it is unsigned, since
5077 those overflows are defined. So we only check for SIGN_EXTEND and
5080 If we cannot find a biv, we return 0. */
5083 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5085 enum machine_mode mode
;
5091 register enum rtx_code code
;
5095 code
= GET_CODE (x
);
5099 if (XEXP (x
, 0) == dest_reg
5100 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5101 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5102 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5104 else if (XEXP (x
, 1) == dest_reg
5105 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5106 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5107 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5112 if (invariant_p (arg
) != 1)
5115 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5116 *mult_val
= const1_rtx
;
5120 /* If this is a SUBREG for a promoted variable, check the inner
5122 if (SUBREG_PROMOTED_VAR_P (x
))
5123 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5124 dest_reg
, p
, inc_val
, mult_val
);
5128 /* If this register is assigned in the previous insn, look at its
5129 source, but don't go outside the loop or past a label. */
5131 for (insn
= PREV_INSN (p
);
5132 (insn
&& GET_CODE (insn
) == NOTE
5133 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5134 insn
= PREV_INSN (insn
))
5138 set
= single_set (insn
);
5141 && (SET_DEST (set
) == x
5142 || (GET_CODE (SET_DEST (set
)) == SUBREG
5143 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5145 && SUBREG_REG (SET_DEST (set
)) == x
)))
5146 return basic_induction_var (SET_SRC (set
),
5147 (GET_MODE (SET_SRC (set
)) == VOIDmode
5149 : GET_MODE (SET_SRC (set
))),
5152 /* ... fall through ... */
5154 /* Can accept constant setting of biv only when inside inner most loop.
5155 Otherwise, a biv of an inner loop may be incorrectly recognized
5156 as a biv of the outer loop,
5157 causing code to be moved INTO the inner loop. */
5159 if (invariant_p (x
) != 1)
5164 if (loops_enclosed
== 1)
5166 /* Possible bug here? Perhaps we don't know the mode of X. */
5167 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5168 *mult_val
= const0_rtx
;
5175 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5176 dest_reg
, p
, inc_val
, mult_val
);
5178 /* Similar, since this can be a sign extension. */
5179 for (insn
= PREV_INSN (p
);
5180 (insn
&& GET_CODE (insn
) == NOTE
5181 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5182 insn
= PREV_INSN (insn
))
5186 set
= single_set (insn
);
5188 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5189 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5190 && INTVAL (XEXP (x
, 1)) >= 0
5191 && GET_CODE (SET_SRC (set
)) == ASHIFT
5192 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5193 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5194 GET_MODE (XEXP (x
, 0)),
5195 dest_reg
, insn
, inc_val
, mult_val
);
5203 /* A general induction variable (giv) is any quantity that is a linear
5204 function of a basic induction variable,
5205 i.e. giv = biv * mult_val + add_val.
5206 The coefficients can be any loop invariant quantity.
5207 A giv need not be computed directly from the biv;
5208 it can be computed by way of other givs. */
5210 /* Determine whether X computes a giv.
5211 If it does, return a nonzero value
5212 which is the benefit from eliminating the computation of X;
5213 set *SRC_REG to the register of the biv that it is computed from;
5214 set *ADD_VAL and *MULT_VAL to the coefficients,
5215 such that the value of X is biv * mult + add; */
5218 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5228 /* If this is an invariant, forget it, it isn't a giv. */
5229 if (invariant_p (x
) == 1)
5232 /* See if the expression could be a giv and get its form.
5233 Mark our place on the obstack in case we don't find a giv. */
5234 storage
= (char *) oballoc (0);
5235 x
= simplify_giv_expr (x
, &benefit
);
5242 switch (GET_CODE (x
))
5246 /* Since this is now an invariant and wasn't before, it must be a giv
5247 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5249 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5250 *mult_val
= const0_rtx
;
5255 /* This is equivalent to a BIV. */
5257 *mult_val
= const1_rtx
;
5258 *add_val
= const0_rtx
;
5262 /* Either (plus (biv) (invar)) or
5263 (plus (mult (biv) (invar_1)) (invar_2)). */
5264 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5266 *src_reg
= XEXP (XEXP (x
, 0), 0);
5267 *mult_val
= XEXP (XEXP (x
, 0), 1);
5271 *src_reg
= XEXP (x
, 0);
5272 *mult_val
= const1_rtx
;
5274 *add_val
= XEXP (x
, 1);
5278 /* ADD_VAL is zero. */
5279 *src_reg
= XEXP (x
, 0);
5280 *mult_val
= XEXP (x
, 1);
5281 *add_val
= const0_rtx
;
5288 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5289 unless they are CONST_INT). */
5290 if (GET_CODE (*add_val
) == USE
)
5291 *add_val
= XEXP (*add_val
, 0);
5292 if (GET_CODE (*mult_val
) == USE
)
5293 *mult_val
= XEXP (*mult_val
, 0);
5295 benefit
+= rtx_cost (orig_x
, SET
);
5297 /* Always return some benefit if this is a giv so it will be detected
5298 as such. This allows elimination of bivs that might otherwise
5299 not be eliminated. */
5300 return benefit
== 0 ? 1 : benefit
;
5303 /* Given an expression, X, try to form it as a linear function of a biv.
5304 We will canonicalize it to be of the form
5305 (plus (mult (BIV) (invar_1))
5307 with possible degeneracies.
5309 The invariant expressions must each be of a form that can be used as a
5310 machine operand. We surround then with a USE rtx (a hack, but localized
5311 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5312 routine; it is the caller's responsibility to strip them.
5314 If no such canonicalization is possible (i.e., two biv's are used or an
5315 expression that is neither invariant nor a biv or giv), this routine
5318 For a non-zero return, the result will have a code of CONST_INT, USE,
5319 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5321 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5324 simplify_giv_expr (x
, benefit
)
5328 enum machine_mode mode
= GET_MODE (x
);
5332 /* If this is not an integer mode, or if we cannot do arithmetic in this
5333 mode, this can't be a giv. */
5334 if (mode
!= VOIDmode
5335 && (GET_MODE_CLASS (mode
) != MODE_INT
5336 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5339 switch (GET_CODE (x
))
5342 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5343 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5344 if (arg0
== 0 || arg1
== 0)
5347 /* Put constant last, CONST_INT last if both constant. */
5348 if ((GET_CODE (arg0
) == USE
5349 || GET_CODE (arg0
) == CONST_INT
)
5350 && GET_CODE (arg1
) != CONST_INT
)
5351 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5353 /* Handle addition of zero, then addition of an invariant. */
5354 if (arg1
== const0_rtx
)
5356 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5357 switch (GET_CODE (arg0
))
5361 /* Both invariant. Only valid if sum is machine operand.
5362 First strip off possible USE on first operand. */
5363 if (GET_CODE (arg0
) == USE
)
5364 arg0
= XEXP (arg0
, 0);
5367 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5369 tem
= plus_constant (arg0
, INTVAL (arg1
));
5370 if (GET_CODE (tem
) != CONST_INT
)
5371 tem
= gen_rtx (USE
, mode
, tem
);
5378 /* biv + invar or mult + invar. Return sum. */
5379 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5382 /* (a + invar_1) + invar_2. Associate. */
5383 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5385 gen_rtx (PLUS
, mode
,
5386 XEXP (arg0
, 1), arg1
)),
5393 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5394 MULT to reduce cases. */
5395 if (GET_CODE (arg0
) == REG
)
5396 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5397 if (GET_CODE (arg1
) == REG
)
5398 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5400 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5401 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5402 Recurse to associate the second PLUS. */
5403 if (GET_CODE (arg1
) == MULT
)
5404 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5406 if (GET_CODE (arg1
) == PLUS
)
5407 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5408 gen_rtx (PLUS
, mode
,
5409 arg0
, XEXP (arg1
, 0)),
5413 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5414 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5417 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5420 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5422 gen_rtx (PLUS
, mode
,
5428 /* Handle "a - b" as "a + b * (-1)". */
5429 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5431 gen_rtx (MULT
, mode
,
5432 XEXP (x
, 1), constm1_rtx
)),
5436 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5437 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5438 if (arg0
== 0 || arg1
== 0)
5441 /* Put constant last, CONST_INT last if both constant. */
5442 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5443 && GET_CODE (arg1
) != CONST_INT
)
5444 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5446 /* If second argument is not now constant, not giv. */
5447 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5450 /* Handle multiply by 0 or 1. */
5451 if (arg1
== const0_rtx
)
5454 else if (arg1
== const1_rtx
)
5457 switch (GET_CODE (arg0
))
5460 /* biv * invar. Done. */
5461 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5464 /* Product of two constants. */
5465 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5468 /* invar * invar. Not giv. */
5472 /* (a * invar_1) * invar_2. Associate. */
5473 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5475 gen_rtx (MULT
, mode
,
5476 XEXP (arg0
, 1), arg1
)),
5480 /* (a + invar_1) * invar_2. Distribute. */
5481 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5482 gen_rtx (MULT
, mode
,
5483 XEXP (arg0
, 0), arg1
),
5484 gen_rtx (MULT
, mode
,
5485 XEXP (arg0
, 1), arg1
)),
5493 /* Shift by constant is multiply by power of two. */
5494 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5497 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5499 GEN_INT ((HOST_WIDE_INT
) 1
5500 << INTVAL (XEXP (x
, 1)))),
5504 /* "-a" is "a * (-1)" */
5505 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5509 /* "~a" is "-a - 1". Silly, but easy. */
5510 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5511 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5516 /* Already in proper form for invariant. */
5520 /* If this is a new register, we can't deal with it. */
5521 if (REGNO (x
) >= max_reg_before_loop
)
5524 /* Check for biv or giv. */
5525 switch (reg_iv_type
[REGNO (x
)])
5529 case GENERAL_INDUCT
:
5531 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5533 /* Form expression from giv and add benefit. Ensure this giv
5534 can derive another and subtract any needed adjustment if so. */
5535 *benefit
+= v
->benefit
;
5539 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5540 v
->src_reg
, v
->mult_val
),
5542 if (v
->derive_adjustment
)
5543 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5544 return simplify_giv_expr (tem
, benefit
);
5548 /* Fall through to general case. */
5550 /* If invariant, return as USE (unless CONST_INT).
5551 Otherwise, not giv. */
5552 if (GET_CODE (x
) == USE
)
5555 if (invariant_p (x
) == 1)
5557 if (GET_CODE (x
) == CONST_INT
)
5560 return gen_rtx (USE
, mode
, x
);
5567 /* Help detect a giv that is calculated by several consecutive insns;
5571 The caller has already identified the first insn P as having a giv as dest;
5572 we check that all other insns that set the same register follow
5573 immediately after P, that they alter nothing else,
5574 and that the result of the last is still a giv.
5576 The value is 0 if the reg set in P is not really a giv.
5577 Otherwise, the value is the amount gained by eliminating
5578 all the consecutive insns that compute the value.
5580 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5581 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5583 The coefficients of the ultimate giv value are stored in
5584 *MULT_VAL and *ADD_VAL. */
5587 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5602 /* Indicate that this is a giv so that we can update the value produced in
5603 each insn of the multi-insn sequence.
5605 This induction structure will be used only by the call to
5606 general_induction_var below, so we can allocate it on our stack.
5607 If this is a giv, our caller will replace the induct var entry with
5608 a new induction structure. */
5610 = (struct induction
*) alloca (sizeof (struct induction
));
5611 v
->src_reg
= src_reg
;
5612 v
->mult_val
= *mult_val
;
5613 v
->add_val
= *add_val
;
5614 v
->benefit
= first_benefit
;
5616 v
->derive_adjustment
= 0;
5618 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5619 reg_iv_info
[REGNO (dest_reg
)] = v
;
5621 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5626 code
= GET_CODE (p
);
5628 /* If libcall, skip to end of call sequence. */
5629 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5633 && (set
= single_set (p
))
5634 && GET_CODE (SET_DEST (set
)) == REG
5635 && SET_DEST (set
) == dest_reg
5636 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5638 /* Giv created by equivalent expression. */
5639 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5640 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5641 add_val
, mult_val
))))
5642 && src_reg
== v
->src_reg
)
5644 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5645 benefit
+= libcall_benefit (p
);
5648 v
->mult_val
= *mult_val
;
5649 v
->add_val
= *add_val
;
5650 v
->benefit
= benefit
;
5652 else if (code
!= NOTE
)
5654 /* Allow insns that set something other than this giv to a
5655 constant. Such insns are needed on machines which cannot
5656 include long constants and should not disqualify a giv. */
5658 && (set
= single_set (p
))
5659 && SET_DEST (set
) != dest_reg
5660 && CONSTANT_P (SET_SRC (set
)))
5663 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5671 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5672 represented by G1. If no such expression can be found, or it is clear that
5673 it cannot possibly be a valid address, 0 is returned.
5675 To perform the computation, we note that
5678 where `v' is the biv.
5680 So G2 = (c/a) * G1 + (d - b*c/a) */
5684 express_from (g1
, g2
)
5685 struct induction
*g1
, *g2
;
5689 /* The value that G1 will be multiplied by must be a constant integer. Also,
5690 the only chance we have of getting a valid address is if b*c/a (see above
5691 for notation) is also an integer. */
5692 if (GET_CODE (g1
->mult_val
) != CONST_INT
5693 || GET_CODE (g2
->mult_val
) != CONST_INT
5694 || GET_CODE (g1
->add_val
) != CONST_INT
5695 || g1
->mult_val
== const0_rtx
5696 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5699 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5700 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5702 /* Form simplified final result. */
5703 if (mult
== const0_rtx
)
5705 else if (mult
== const1_rtx
)
5706 mult
= g1
->dest_reg
;
5708 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5710 if (add
== const0_rtx
)
5713 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5717 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5718 (either directly or via an address expression) a register used to represent
5719 G1. Set g2->new_reg to a represtation of G1 (normally just
5723 combine_givs_p (g1
, g2
)
5724 struct induction
*g1
, *g2
;
5728 /* If these givs are identical, they can be combined. */
5729 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5730 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5732 g2
->new_reg
= g1
->dest_reg
;
5737 /* If G2 can be expressed as a function of G1 and that function is valid
5738 as an address and no more expensive than using a register for G2,
5739 the expression of G2 in terms of G1 can be used. */
5740 if (g2
->giv_type
== DEST_ADDR
5741 && (tem
= express_from (g1
, g2
)) != 0
5742 && memory_address_p (g2
->mem_mode
, tem
)
5743 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5753 #ifdef GIV_SORT_CRITERION
5754 /* Compare two givs and sort the most desirable one for combinations first.
5755 This is used only in one qsort call below. */
5759 struct induction
**x
, **y
;
5761 GIV_SORT_CRITERION (*x
, *y
);
5767 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5768 any other. If so, point SAME to the giv combined with and set NEW_REG to
5769 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5770 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5774 struct iv_class
*bl
;
5776 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5777 int i
, j
, giv_count
, pass
;
5779 /* Count givs, because bl->giv_count is incorrect here. */
5781 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5785 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5787 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5788 giv_array
[i
++] = g1
;
5790 #ifdef GIV_SORT_CRITERION
5791 /* Sort the givs if GIV_SORT_CRITERION is defined.
5792 This is usually defined for processors which lack
5793 negative register offsets so more givs may be combined. */
5795 if (loop_dump_stream
)
5796 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5798 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5801 for (i
= 0; i
< giv_count
; i
++)
5804 for (pass
= 0; pass
<= 1; pass
++)
5805 for (j
= 0; j
< giv_count
; j
++)
5809 /* First try to combine with replaceable givs, then all givs. */
5810 && (g1
->replaceable
|| pass
== 1)
5811 /* If either has already been combined or is to be ignored, can't
5813 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5814 /* If something has been based on G2, G2 cannot itself be based
5815 on something else. */
5816 && ! g2
->combined_with
5817 && combine_givs_p (g1
, g2
))
5819 /* g2->new_reg set by `combine_givs_p' */
5821 g1
->combined_with
= 1;
5823 /* If one of these givs is a DEST_REG that was only used
5824 once, by the other giv, this is actually a single use.
5825 The DEST_REG has the correct cost, while the other giv
5826 counts the REG use too often. */
5827 if (g2
->giv_type
== DEST_REG
5828 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5829 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5830 g1
->benefit
= g2
->benefit
;
5831 else if (g1
->giv_type
!= DEST_REG
5832 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5833 || ! reg_mentioned_p (g1
->dest_reg
,
5834 PATTERN (g2
->insn
)))
5836 g1
->benefit
+= g2
->benefit
;
5837 g1
->times_used
+= g2
->times_used
;
5839 /* ??? The new final_[bg]iv_value code does a much better job
5840 of finding replaceable giv's, and hence this code may no
5841 longer be necessary. */
5842 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5843 g1
->benefit
-= copy_cost
;
5844 g1
->lifetime
+= g2
->lifetime
;
5846 if (loop_dump_stream
)
5847 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5848 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5854 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5857 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5858 rtx b
; /* initial value of basic induction variable */
5859 rtx m
; /* multiplicative constant */
5860 rtx a
; /* additive constant */
5861 rtx reg
; /* destination register */
5867 /* Prevent unexpected sharing of these rtx. */
5871 /* Increase the lifetime of any invariants moved further in code. */
5872 update_reg_last_use (a
, insert_before
);
5873 update_reg_last_use (b
, insert_before
);
5874 update_reg_last_use (m
, insert_before
);
5877 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5879 emit_move_insn (reg
, result
);
5880 seq
= gen_sequence ();
5883 emit_insn_before (seq
, insert_before
);
5885 record_base_value (REGNO (reg
), b
);
5888 /* Test whether A * B can be computed without
5889 an actual multiply insn. Value is 1 if so. */
5892 product_cheap_p (a
, b
)
5898 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5899 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5902 /* If only one is constant, make it B. */
5903 if (GET_CODE (a
) == CONST_INT
)
5904 tmp
= a
, a
= b
, b
= tmp
;
5906 /* If first constant, both constant, so don't need multiply. */
5907 if (GET_CODE (a
) == CONST_INT
)
5910 /* If second not constant, neither is constant, so would need multiply. */
5911 if (GET_CODE (b
) != CONST_INT
)
5914 /* One operand is constant, so might not need multiply insn. Generate the
5915 code for the multiply and see if a call or multiply, or long sequence
5916 of insns is generated. */
5918 rtl_obstack
= &temp_obstack
;
5920 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5921 tmp
= gen_sequence ();
5924 if (GET_CODE (tmp
) == SEQUENCE
)
5926 if (XVEC (tmp
, 0) == 0)
5928 else if (XVECLEN (tmp
, 0) > 3)
5931 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5933 rtx insn
= XVECEXP (tmp
, 0, i
);
5935 if (GET_CODE (insn
) != INSN
5936 || (GET_CODE (PATTERN (insn
)) == SET
5937 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5938 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5939 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5940 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5947 else if (GET_CODE (tmp
) == SET
5948 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5950 else if (GET_CODE (tmp
) == PARALLEL
5951 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5952 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5955 /* Free any storage we obtained in generating this multiply and restore rtl
5956 allocation to its normal obstack. */
5957 obstack_free (&temp_obstack
, storage
);
5958 rtl_obstack
= old_rtl_obstack
;
5963 /* Check to see if loop can be terminated by a "decrement and branch until
5964 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5965 Also try reversing an increment loop to a decrement loop
5966 to see if the optimization can be performed.
5967 Value is nonzero if optimization was performed. */
5969 /* This is useful even if the architecture doesn't have such an insn,
5970 because it might change a loops which increments from 0 to n to a loop
5971 which decrements from n to 0. A loop that decrements to zero is usually
5972 faster than one that increments from zero. */
5974 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5975 such as approx_final_value, biv_total_increment, loop_iterations, and
5976 final_[bg]iv_value. */
5979 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5984 struct iv_class
*bl
;
5991 rtx before_comparison
;
5994 /* If last insn is a conditional branch, and the insn before tests a
5995 register value, try to optimize it. Otherwise, we can't do anything. */
5997 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
5998 if (comparison
== 0)
6001 /* Check all of the bivs to see if the compare uses one of them.
6002 Skip biv's set more than once because we can't guarantee that
6003 it will be zero on the last iteration. Also skip if the biv is
6004 used between its update and the test insn. */
6006 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6008 if (bl
->biv_count
== 1
6009 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6010 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6011 PREV_INSN (PREV_INSN (loop_end
))))
6018 /* Look for the case where the basic induction variable is always
6019 nonnegative, and equals zero on the last iteration.
6020 In this case, add a reg_note REG_NONNEG, which allows the
6021 m68k DBRA instruction to be used. */
6023 if (((GET_CODE (comparison
) == GT
6024 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6025 && INTVAL (XEXP (comparison
, 1)) == -1)
6026 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6027 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6028 && INTVAL (bl
->biv
->add_val
) < 0)
6030 /* Initial value must be greater than 0,
6031 init_val % -dec_value == 0 to ensure that it equals zero on
6032 the last iteration */
6034 if (GET_CODE (bl
->initial_value
) == CONST_INT
6035 && INTVAL (bl
->initial_value
) > 0
6036 && (INTVAL (bl
->initial_value
)
6037 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6039 /* register always nonnegative, add REG_NOTE to branch */
6040 REG_NOTES (PREV_INSN (loop_end
))
6041 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6042 REG_NOTES (PREV_INSN (loop_end
)));
6048 /* If the decrement is 1 and the value was tested as >= 0 before
6049 the loop, then we can safely optimize. */
6050 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6052 if (GET_CODE (p
) == CODE_LABEL
)
6054 if (GET_CODE (p
) != JUMP_INSN
)
6057 before_comparison
= get_condition_for_loop (p
);
6058 if (before_comparison
6059 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6060 && GET_CODE (before_comparison
) == LT
6061 && XEXP (before_comparison
, 1) == const0_rtx
6062 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6063 && INTVAL (bl
->biv
->add_val
) == -1)
6065 REG_NOTES (PREV_INSN (loop_end
))
6066 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6067 REG_NOTES (PREV_INSN (loop_end
)));
6074 else if (num_mem_sets
<= 1)
6076 /* Try to change inc to dec, so can apply above optimization. */
6078 all registers modified are induction variables or invariant,
6079 all memory references have non-overlapping addresses
6080 (obviously true if only one write)
6081 allow 2 insns for the compare/jump at the end of the loop. */
6082 /* Also, we must avoid any instructions which use both the reversed
6083 biv and another biv. Such instructions will fail if the loop is
6084 reversed. We meet this condition by requiring that either
6085 no_use_except_counting is true, or else that there is only
6087 int num_nonfixed_reads
= 0;
6088 /* 1 if the iteration var is used only to count iterations. */
6089 int no_use_except_counting
= 0;
6090 /* 1 if the loop has no memory store, or it has a single memory store
6091 which is reversible. */
6092 int reversible_mem_store
= 1;
6094 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6095 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6096 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6098 if (bl
->giv_count
== 0
6099 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6101 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6103 /* If there are no givs for this biv, and the only exit is the
6104 fall through at the end of the the loop, then
6105 see if perhaps there are no uses except to count. */
6106 no_use_except_counting
= 1;
6107 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6108 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6110 rtx set
= single_set (p
);
6112 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6113 && REGNO (SET_DEST (set
)) == bl
->regno
)
6114 /* An insn that sets the biv is okay. */
6116 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6117 || p
== prev_nonnote_insn (loop_end
))
6118 /* Don't bother about the end test. */
6120 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6121 /* Any other use of the biv is no good. */
6123 no_use_except_counting
= 0;
6129 /* If the loop has a single store, and the destination address is
6130 invariant, then we can't reverse the loop, because this address
6131 might then have the wrong value at loop exit.
6132 This would work if the source was invariant also, however, in that
6133 case, the insn should have been moved out of the loop. */
6135 if (num_mem_sets
== 1)
6136 reversible_mem_store
6137 = (! unknown_address_altered
6138 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6140 /* This code only acts for innermost loops. Also it simplifies
6141 the memory address check by only reversing loops with
6142 zero or one memory access.
6143 Two memory accesses could involve parts of the same array,
6144 and that can't be reversed. */
6146 if (num_nonfixed_reads
<= 1
6148 && !loop_has_volatile
6149 && reversible_mem_store
6150 && (no_use_except_counting
6151 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6152 + num_movables
+ 2 == insn_count
)
6153 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6157 /* Loop can be reversed. */
6158 if (loop_dump_stream
)
6159 fprintf (loop_dump_stream
, "Can reverse loop\n");
6161 /* Now check other conditions:
6162 initial_value must be zero,
6163 final_value % add_val == 0, so that when reversed, the
6164 biv will be zero on the last iteration.
6166 This test can probably be improved since +/- 1 in the constant
6167 can be obtained by changing LT to LE and vice versa; this is
6170 if (comparison
&& bl
->initial_value
== const0_rtx
6171 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6172 /* LE gets turned into LT */
6173 && GET_CODE (comparison
) == LT
6174 && (INTVAL (XEXP (comparison
, 1))
6175 % INTVAL (bl
->biv
->add_val
)) == 0)
6177 /* Register will always be nonnegative, with value
6178 0 on last iteration if loop reversed */
6180 /* Save some info needed to produce the new insns. */
6181 reg
= bl
->biv
->dest_reg
;
6182 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6183 if (jump_label
== pc_rtx
)
6184 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6185 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6187 final_value
= XEXP (comparison
, 1);
6188 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6189 - INTVAL (bl
->biv
->add_val
));
6191 /* Initialize biv to start_value before loop start.
6192 The old initializing insn will be deleted as a
6193 dead store by flow.c. */
6194 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6196 /* Add insn to decrement register, and delete insn
6197 that incremented the register. */
6198 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6200 delete_insn (bl
->biv
->insn
);
6202 /* Update biv info to reflect its new status. */
6204 bl
->initial_value
= start_value
;
6205 bl
->biv
->add_val
= new_add_val
;
6207 /* Inc LABEL_NUSES so that delete_insn will
6208 not delete the label. */
6209 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6211 /* Emit an insn after the end of the loop to set the biv's
6212 proper exit value if it is used anywhere outside the loop. */
6213 if ((REGNO_LAST_UID (bl
->regno
)
6214 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6216 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6217 emit_insn_after (gen_move_insn (reg
, final_value
),
6220 /* Delete compare/branch at end of loop. */
6221 delete_insn (PREV_INSN (loop_end
));
6222 delete_insn (PREV_INSN (loop_end
));
6224 /* Add new compare/branch insn at end of loop. */
6226 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6227 GET_MODE (reg
), 0, 0);
6228 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6229 tem
= gen_sequence ();
6231 emit_jump_insn_before (tem
, loop_end
);
6233 for (tem
= PREV_INSN (loop_end
);
6234 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6238 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6240 /* Increment of LABEL_NUSES done above. */
6241 /* Register is now always nonnegative,
6242 so add REG_NONNEG note to the branch. */
6243 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6249 /* Mark that this biv has been reversed. Each giv which depends
6250 on this biv, and which is also live past the end of the loop
6251 will have to be fixed up. */
6255 if (loop_dump_stream
)
6256 fprintf (loop_dump_stream
,
6257 "Reversed loop and added reg_nonneg\n");
6267 /* Verify whether the biv BL appears to be eliminable,
6268 based on the insns in the loop that refer to it.
6269 LOOP_START is the first insn of the loop, and END is the end insn.
6271 If ELIMINATE_P is non-zero, actually do the elimination.
6273 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6274 determine whether invariant insns should be placed inside or at the
6275 start of the loop. */
6278 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6279 struct iv_class
*bl
;
6283 int threshold
, insn_count
;
6285 rtx reg
= bl
->biv
->dest_reg
;
6288 /* Scan all insns in the loop, stopping if we find one that uses the
6289 biv in a way that we cannot eliminate. */
6291 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6293 enum rtx_code code
= GET_CODE (p
);
6294 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6296 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6297 && reg_mentioned_p (reg
, PATTERN (p
))
6298 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6300 if (loop_dump_stream
)
6301 fprintf (loop_dump_stream
,
6302 "Cannot eliminate biv %d: biv used in insn %d.\n",
6303 bl
->regno
, INSN_UID (p
));
6310 if (loop_dump_stream
)
6311 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6312 bl
->regno
, eliminate_p
? "was" : "can be");
6319 /* If BL appears in X (part of the pattern of INSN), see if we can
6320 eliminate its use. If so, return 1. If not, return 0.
6322 If BIV does not appear in X, return 1.
6324 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6325 where extra insns should be added. Depending on how many items have been
6326 moved out of the loop, it will either be before INSN or at the start of
6330 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6332 struct iv_class
*bl
;
6336 enum rtx_code code
= GET_CODE (x
);
6337 rtx reg
= bl
->biv
->dest_reg
;
6338 enum machine_mode mode
= GET_MODE (reg
);
6339 struct induction
*v
;
6348 /* If we haven't already been able to do something with this BIV,
6349 we can't eliminate it. */
6355 /* If this sets the BIV, it is not a problem. */
6356 if (SET_DEST (x
) == reg
)
6359 /* If this is an insn that defines a giv, it is also ok because
6360 it will go away when the giv is reduced. */
6361 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6362 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6366 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6368 /* Can replace with any giv that was reduced and
6369 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6370 Require a constant for MULT_VAL, so we know it's nonzero.
6371 ??? We disable this optimization to avoid potential
6374 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6375 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6376 && v
->add_val
== const0_rtx
6377 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6381 /* If the giv V had the auto-inc address optimization applied
6382 to it, and INSN occurs between the giv insn and the biv
6383 insn, then we must adjust the value used here.
6384 This is rare, so we don't bother to do so. */
6386 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6387 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6388 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6389 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6395 /* If the giv has the opposite direction of change,
6396 then reverse the comparison. */
6397 if (INTVAL (v
->mult_val
) < 0)
6398 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6399 const0_rtx
, v
->new_reg
);
6403 /* We can probably test that giv's reduced reg. */
6404 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6408 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6409 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6410 Require a constant for MULT_VAL, so we know it's nonzero.
6411 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6412 overflow problem. */
6414 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6415 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6416 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6418 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6419 || GET_CODE (v
->add_val
) == LABEL_REF
6420 || GET_CODE (v
->add_val
) == CONST
6421 || (GET_CODE (v
->add_val
) == REG
6422 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6424 /* If the giv V had the auto-inc address optimization applied
6425 to it, and INSN occurs between the giv insn and the biv
6426 insn, then we must adjust the value used here.
6427 This is rare, so we don't bother to do so. */
6429 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6430 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6431 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6432 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6438 /* If the giv has the opposite direction of change,
6439 then reverse the comparison. */
6440 if (INTVAL (v
->mult_val
) < 0)
6441 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6444 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6445 copy_rtx (v
->add_val
));
6447 /* Replace biv with the giv's reduced register. */
6448 update_reg_last_use (v
->add_val
, insn
);
6449 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6452 /* Insn doesn't support that constant or invariant. Copy it
6453 into a register (it will be a loop invariant.) */
6454 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6456 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6459 /* Substitute the new register for its invariant value in
6460 the compare expression. */
6461 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6462 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6471 case GT
: case GE
: case GTU
: case GEU
:
6472 case LT
: case LE
: case LTU
: case LEU
:
6473 /* See if either argument is the biv. */
6474 if (XEXP (x
, 0) == reg
)
6475 arg
= XEXP (x
, 1), arg_operand
= 1;
6476 else if (XEXP (x
, 1) == reg
)
6477 arg
= XEXP (x
, 0), arg_operand
= 0;
6481 if (CONSTANT_P (arg
))
6483 /* First try to replace with any giv that has constant positive
6484 mult_val and constant add_val. We might be able to support
6485 negative mult_val, but it seems complex to do it in general. */
6487 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6488 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6489 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6490 || GET_CODE (v
->add_val
) == LABEL_REF
6491 || GET_CODE (v
->add_val
) == CONST
6492 || (GET_CODE (v
->add_val
) == REG
6493 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6494 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6497 /* If the giv V had the auto-inc address optimization applied
6498 to it, and INSN occurs between the giv insn and the biv
6499 insn, then we must adjust the value used here.
6500 This is rare, so we don't bother to do so. */
6502 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6503 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6504 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6505 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6511 /* Replace biv with the giv's reduced reg. */
6512 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6514 /* If all constants are actually constant integers and
6515 the derived constant can be directly placed in the COMPARE,
6517 if (GET_CODE (arg
) == CONST_INT
6518 && GET_CODE (v
->mult_val
) == CONST_INT
6519 && GET_CODE (v
->add_val
) == CONST_INT
6520 && validate_change (insn
, &XEXP (x
, arg_operand
),
6521 GEN_INT (INTVAL (arg
)
6522 * INTVAL (v
->mult_val
)
6523 + INTVAL (v
->add_val
)), 0))
6526 /* Otherwise, load it into a register. */
6527 tem
= gen_reg_rtx (mode
);
6528 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6529 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6532 /* If that failed, put back the change we made above. */
6533 XEXP (x
, 1-arg_operand
) = reg
;
6536 /* Look for giv with positive constant mult_val and nonconst add_val.
6537 Insert insns to calculate new compare value.
6538 ??? Turn this off due to possible overflow. */
6540 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6541 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6542 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6548 /* If the giv V had the auto-inc address optimization applied
6549 to it, and INSN occurs between the giv insn and the biv
6550 insn, then we must adjust the value used here.
6551 This is rare, so we don't bother to do so. */
6553 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6554 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6555 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6556 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6562 tem
= gen_reg_rtx (mode
);
6564 /* Replace biv with giv's reduced register. */
6565 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6568 /* Compute value to compare against. */
6569 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6570 /* Use it in this insn. */
6571 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6572 if (apply_change_group ())
6576 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6578 if (invariant_p (arg
) == 1)
6580 /* Look for giv with constant positive mult_val and nonconst
6581 add_val. Insert insns to compute new compare value.
6582 ??? Turn this off due to possible overflow. */
6584 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6585 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6586 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6592 /* If the giv V had the auto-inc address optimization applied
6593 to it, and INSN occurs between the giv insn and the biv
6594 insn, then we must adjust the value used here.
6595 This is rare, so we don't bother to do so. */
6597 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6598 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6599 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6600 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6606 tem
= gen_reg_rtx (mode
);
6608 /* Replace biv with giv's reduced register. */
6609 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6612 /* Compute value to compare against. */
6613 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6615 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6616 if (apply_change_group ())
6621 /* This code has problems. Basically, you can't know when
6622 seeing if we will eliminate BL, whether a particular giv
6623 of ARG will be reduced. If it isn't going to be reduced,
6624 we can't eliminate BL. We can try forcing it to be reduced,
6625 but that can generate poor code.
6627 The problem is that the benefit of reducing TV, below should
6628 be increased if BL can actually be eliminated, but this means
6629 we might have to do a topological sort of the order in which
6630 we try to process biv. It doesn't seem worthwhile to do
6631 this sort of thing now. */
6634 /* Otherwise the reg compared with had better be a biv. */
6635 if (GET_CODE (arg
) != REG
6636 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6639 /* Look for a pair of givs, one for each biv,
6640 with identical coefficients. */
6641 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6643 struct induction
*tv
;
6645 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6648 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6649 if (! tv
->ignore
&& ! tv
->maybe_dead
6650 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6651 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6652 && tv
->mode
== mode
)
6654 /* If the giv V had the auto-inc address optimization applied
6655 to it, and INSN occurs between the giv insn and the biv
6656 insn, then we must adjust the value used here.
6657 This is rare, so we don't bother to do so. */
6659 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6660 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6661 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6662 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6668 /* Replace biv with its giv's reduced reg. */
6669 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6670 /* Replace other operand with the other giv's
6672 XEXP (x
, arg_operand
) = tv
->new_reg
;
6679 /* If we get here, the biv can't be eliminated. */
6683 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6684 biv is used in it, since it will be replaced. */
6685 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6686 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6691 /* See if any subexpression fails elimination. */
6692 fmt
= GET_RTX_FORMAT (code
);
6693 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6698 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6699 eliminate_p
, where
))
6704 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6705 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6706 eliminate_p
, where
))
6715 /* Return nonzero if the last use of REG
6716 is in an insn following INSN in the same basic block. */
6719 last_use_this_basic_block (reg
, insn
)
6725 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6728 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6734 /* Called via `note_stores' to record the initial value of a biv. Here we
6735 just record the location of the set and process it later. */
6738 record_initial (dest
, set
)
6742 struct iv_class
*bl
;
6744 if (GET_CODE (dest
) != REG
6745 || REGNO (dest
) >= max_reg_before_loop
6746 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6749 bl
= reg_biv_class
[REGNO (dest
)];
6751 /* If this is the first set found, record it. */
6752 if (bl
->init_insn
== 0)
6754 bl
->init_insn
= note_insn
;
6759 /* If any of the registers in X are "old" and currently have a last use earlier
6760 than INSN, update them to have a last use of INSN. Their actual last use
6761 will be the previous insn but it will not have a valid uid_luid so we can't
6765 update_reg_last_use (x
, insn
)
6769 /* Check for the case where INSN does not have a valid luid. In this case,
6770 there is no need to modify the regno_last_uid, as this can only happen
6771 when code is inserted after the loop_end to set a pseudo's final value,
6772 and hence this insn will never be the last use of x. */
6773 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6774 && INSN_UID (insn
) < max_uid_for_loop
6775 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6776 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6780 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6781 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6784 update_reg_last_use (XEXP (x
, i
), insn
);
6785 else if (fmt
[i
] == 'E')
6786 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6787 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6792 /* Given a jump insn JUMP, return the condition that will cause it to branch
6793 to its JUMP_LABEL. If the condition cannot be understood, or is an
6794 inequality floating-point comparison which needs to be reversed, 0 will
6797 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6798 insn used in locating the condition was found. If a replacement test
6799 of the condition is desired, it should be placed in front of that
6800 insn and we will be sure that the inputs are still valid.
6802 The condition will be returned in a canonical form to simplify testing by
6803 callers. Specifically:
6805 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6806 (2) Both operands will be machine operands; (cc0) will have been replaced.
6807 (3) If an operand is a constant, it will be the second operand.
6808 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6809 for GE, GEU, and LEU. */
6812 get_condition (jump
, earliest
)
6821 int reverse_code
= 0;
6822 int did_reverse_condition
= 0;
6824 /* If this is not a standard conditional jump, we can't parse it. */
6825 if (GET_CODE (jump
) != JUMP_INSN
6826 || ! condjump_p (jump
) || simplejump_p (jump
))
6829 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6830 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6831 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6836 /* If this branches to JUMP_LABEL when the condition is false, reverse
6838 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6839 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6840 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6842 /* If we are comparing a register with zero, see if the register is set
6843 in the previous insn to a COMPARE or a comparison operation. Perform
6844 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6847 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6849 /* Set non-zero when we find something of interest. */
6853 /* If comparison with cc0, import actual comparison from compare
6857 if ((prev
= prev_nonnote_insn (prev
)) == 0
6858 || GET_CODE (prev
) != INSN
6859 || (set
= single_set (prev
)) == 0
6860 || SET_DEST (set
) != cc0_rtx
)
6863 op0
= SET_SRC (set
);
6864 op1
= CONST0_RTX (GET_MODE (op0
));
6870 /* If this is a COMPARE, pick up the two things being compared. */
6871 if (GET_CODE (op0
) == COMPARE
)
6873 op1
= XEXP (op0
, 1);
6874 op0
= XEXP (op0
, 0);
6877 else if (GET_CODE (op0
) != REG
)
6880 /* Go back to the previous insn. Stop if it is not an INSN. We also
6881 stop if it isn't a single set or if it has a REG_INC note because
6882 we don't want to bother dealing with it. */
6884 if ((prev
= prev_nonnote_insn (prev
)) == 0
6885 || GET_CODE (prev
) != INSN
6886 || FIND_REG_INC_NOTE (prev
, 0)
6887 || (set
= single_set (prev
)) == 0)
6890 /* If this is setting OP0, get what it sets it to if it looks
6892 if (rtx_equal_p (SET_DEST (set
), op0
))
6894 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6896 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6899 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6900 && (GET_MODE_BITSIZE (inner_mode
)
6901 <= HOST_BITS_PER_WIDE_INT
)
6902 && (STORE_FLAG_VALUE
6903 & ((HOST_WIDE_INT
) 1
6904 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6905 #ifdef FLOAT_STORE_FLAG_VALUE
6907 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6908 && FLOAT_STORE_FLAG_VALUE
< 0)
6911 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6913 else if (((code
== EQ
6915 && (GET_MODE_BITSIZE (inner_mode
)
6916 <= HOST_BITS_PER_WIDE_INT
)
6917 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6918 && (STORE_FLAG_VALUE
6919 & ((HOST_WIDE_INT
) 1
6920 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6921 #ifdef FLOAT_STORE_FLAG_VALUE
6923 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6924 && FLOAT_STORE_FLAG_VALUE
< 0)
6927 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6929 /* We might have reversed a LT to get a GE here. But this wasn't
6930 actually the comparison of data, so we don't flag that we
6931 have had to reverse the condition. */
6932 did_reverse_condition
^= 1;
6940 else if (reg_set_p (op0
, prev
))
6941 /* If this sets OP0, but not directly, we have to give up. */
6946 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6947 code
= GET_CODE (x
);
6950 code
= reverse_condition (code
);
6951 did_reverse_condition
^= 1;
6955 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6961 /* If constant is first, put it last. */
6962 if (CONSTANT_P (op0
))
6963 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6965 /* If OP0 is the result of a comparison, we weren't able to find what
6966 was really being compared, so fail. */
6967 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6970 /* Canonicalize any ordered comparison with integers involving equality
6971 if we can do computations in the relevant mode and we do not
6974 if (GET_CODE (op1
) == CONST_INT
6975 && GET_MODE (op0
) != VOIDmode
6976 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
6978 HOST_WIDE_INT const_val
= INTVAL (op1
);
6979 unsigned HOST_WIDE_INT uconst_val
= const_val
;
6980 unsigned HOST_WIDE_INT max_val
6981 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
6986 if (const_val
!= max_val
>> 1)
6987 code
= LT
, op1
= GEN_INT (const_val
+ 1);
6992 != (((HOST_WIDE_INT
) 1
6993 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
6994 code
= GT
, op1
= GEN_INT (const_val
- 1);
6998 if (uconst_val
!= max_val
)
6999 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7003 if (uconst_val
!= 0)
7004 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7009 /* If this was floating-point and we reversed anything other than an
7010 EQ or NE, return zero. */
7011 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7012 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7014 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7018 /* Never return CC0; return zero instead. */
7023 return gen_rtx (code
, VOIDmode
, op0
, op1
);
7026 /* Similar to above routine, except that we also put an invariant last
7027 unless both operands are invariants. */
7030 get_condition_for_loop (x
)
7033 rtx comparison
= get_condition (x
, NULL_PTR
);
7036 || ! invariant_p (XEXP (comparison
, 0))
7037 || invariant_p (XEXP (comparison
, 1)))
7040 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7041 XEXP (comparison
, 1), XEXP (comparison
, 0));
7045 /* Analyze a loop in order to instrument it with the use of count register.
7046 loop_start and loop_end are the first and last insns of the loop.
7047 This function works in cooperation with insert_bct ().
7048 loop_can_insert_bct[loop_num] is set according to whether the optimization
7049 is applicable to the loop. When it is applicable, the following variables
7051 loop_start_value[loop_num]
7052 loop_comparison_value[loop_num]
7053 loop_increment[loop_num]
7054 loop_comparison_code[loop_num] */
7057 void analyze_loop_iterations (loop_start
, loop_end
)
7058 rtx loop_start
, loop_end
;
7060 rtx comparison
, comparison_value
;
7061 rtx iteration_var
, initial_value
, increment
;
7062 enum rtx_code comparison_code
;
7068 /* loop_variable mode */
7069 enum machine_mode original_mode
;
7071 /* find the number of the loop */
7072 int loop_num
= loop_number (loop_start
, loop_end
);
7074 /* we change our mind only when we are sure that loop will be instrumented */
7075 loop_can_insert_bct
[loop_num
] = 0;
7077 /* is the optimization suppressed. */
7078 if ( !flag_branch_on_count_reg
)
7081 /* make sure that count-reg is not in use */
7082 if (loop_used_count_register
[loop_num
]){
7083 if (loop_dump_stream
)
7084 fprintf (loop_dump_stream
,
7085 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7090 /* make sure that the function has no indirect jumps. */
7091 if (indirect_jump_in_function
){
7092 if (loop_dump_stream
)
7093 fprintf (loop_dump_stream
,
7094 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7099 /* make sure that the last loop insn is a conditional jump */
7100 last_loop_insn
= PREV_INSN (loop_end
);
7101 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7102 if (loop_dump_stream
)
7103 fprintf (loop_dump_stream
,
7104 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7109 /* First find the iteration variable. If the last insn is a conditional
7110 branch, and the insn preceding it tests a register value, make that
7111 register the iteration variable. */
7113 /* We used to use prev_nonnote_insn here, but that fails because it might
7114 accidentally get the branch for a contained loop if the branch for this
7115 loop was deleted. We can only trust branches immediately before the
7118 comparison
= get_condition_for_loop (last_loop_insn
);
7119 /* ??? Get_condition may switch position of induction variable and
7120 invariant register when it canonicalizes the comparison. */
7122 if (comparison
== 0) {
7123 if (loop_dump_stream
)
7124 fprintf (loop_dump_stream
,
7125 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7130 comparison_code
= GET_CODE (comparison
);
7131 iteration_var
= XEXP (comparison
, 0);
7132 comparison_value
= XEXP (comparison
, 1);
7134 original_mode
= GET_MODE (iteration_var
);
7135 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7136 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7137 if (loop_dump_stream
)
7138 fprintf (loop_dump_stream
,
7139 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7144 /* get info about loop bounds and increment */
7145 iteration_info (iteration_var
, &initial_value
, &increment
,
7146 loop_start
, loop_end
);
7148 /* make sure that all required loop data were found */
7149 if (!(initial_value
&& increment
&& comparison_value
7150 && invariant_p (comparison_value
) && invariant_p (increment
)
7151 && ! indirect_jump_in_function
))
7153 if (loop_dump_stream
) {
7154 fprintf (loop_dump_stream
,
7155 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7156 if (!(initial_value
&& increment
&& comparison_value
)) {
7157 fprintf (loop_dump_stream
, "\tbounds not available: ");
7158 if ( ! initial_value
)
7159 fprintf (loop_dump_stream
, "initial ");
7161 fprintf (loop_dump_stream
, "increment ");
7162 if ( ! comparison_value
)
7163 fprintf (loop_dump_stream
, "comparison ");
7164 fprintf (loop_dump_stream
, "\n");
7166 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7167 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7172 /* make sure that the increment is constant */
7173 if (GET_CODE (increment
) != CONST_INT
) {
7174 if (loop_dump_stream
)
7175 fprintf (loop_dump_stream
,
7176 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7181 /* make sure that the loop contains neither function call, nor jump on table.
7182 (the count register might be altered by the called function, and might
7183 be used for a branch on table). */
7184 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7185 if (GET_CODE (insn
) == CALL_INSN
){
7186 if (loop_dump_stream
)
7187 fprintf (loop_dump_stream
,
7188 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7193 if (GET_CODE (insn
) == JUMP_INSN
7194 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7195 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7196 if (loop_dump_stream
)
7197 fprintf (loop_dump_stream
,
7198 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7204 /* At this point, we are sure that the loop can be instrumented with BCT.
7205 Some of the loops, however, will not be instrumented - the final decision
7206 is taken by insert_bct () */
7207 if (loop_dump_stream
)
7208 fprintf (loop_dump_stream
,
7209 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7212 /* mark all enclosing loops that they cannot use count register */
7213 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7214 marking here may prevent instrumenting an enclosing loop that could
7215 actually be instrumented. But since this is rare, it is safer to mark
7216 here in case the order of calling (analyze/insert)_bct would be changed. */
7217 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7218 loop_used_count_register
[i
] = 1;
7220 /* Set data structures which will be used by the instrumentation phase */
7221 loop_start_value
[loop_num
] = initial_value
;
7222 loop_comparison_value
[loop_num
] = comparison_value
;
7223 loop_increment
[loop_num
] = increment
;
7224 loop_comparison_code
[loop_num
] = comparison_code
;
7225 loop_can_insert_bct
[loop_num
] = 1;
7229 /* instrument loop for insertion of bct instruction. We distinguish between
7230 loops with compile-time bounds, to those with run-time bounds. The loop
7231 behaviour is analized according to the following characteristics/variables:
7233 ; comparison-value: the value to which the iteration counter is compared.
7234 ; initial-value: iteration-counter initial value.
7235 ; increment: iteration-counter increment.
7236 ; Computed variables:
7237 ; increment-direction: the sign of the increment.
7238 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7239 ; range-direction: sign (comparison-value - initial-value)
7240 We give up on the following cases:
7241 ; loop variable overflow.
7242 ; run-time loop bounds with comparison code NE.
7246 insert_bct (loop_start
, loop_end
)
7247 rtx loop_start
, loop_end
;
7249 rtx initial_value
, comparison_value
, increment
;
7250 enum rtx_code comparison_code
;
7252 int increment_direction
, compare_direction
;
7255 /* if the loop condition is <= or >=, the number of iteration
7256 is 1 more than the range of the bounds of the loop */
7257 int add_iteration
= 0;
7259 /* the only machine mode we work with - is the integer of the size that the
7261 enum machine_mode loop_var_mode
= SImode
;
7263 int loop_num
= loop_number (loop_start
, loop_end
);
7265 /* get loop-variables. No need to check that these are valid - already
7266 checked in analyze_loop_iterations (). */
7267 comparison_code
= loop_comparison_code
[loop_num
];
7268 initial_value
= loop_start_value
[loop_num
];
7269 comparison_value
= loop_comparison_value
[loop_num
];
7270 increment
= loop_increment
[loop_num
];
7272 /* check analyze_loop_iterations decision for this loop. */
7273 if (! loop_can_insert_bct
[loop_num
]){
7274 if (loop_dump_stream
)
7275 fprintf (loop_dump_stream
,
7276 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7281 /* make sure that the loop was not fully unrolled. */
7282 if (loop_unroll_factor
[loop_num
] == -1){
7283 if (loop_dump_stream
)
7284 fprintf (loop_dump_stream
, "insert_bct %d: was completely unrolled\n", loop_num
);
7288 /* make sure that the last loop insn is a conditional jump .
7289 This check is repeated from analyze_loop_iterations (),
7290 because unrolling might have changed that. */
7291 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7292 || !condjump_p (PREV_INSN (loop_end
))) {
7293 if (loop_dump_stream
)
7294 fprintf (loop_dump_stream
,
7295 "insert_bct: not instrumenting BCT because of invalid branch\n");
7299 /* fix increment in case loop was unrolled. */
7300 if (loop_unroll_factor
[loop_num
] > 1)
7301 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7303 /* determine properties and directions of the loop */
7304 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7305 switch ( comparison_code
) {
7310 compare_direction
= 1;
7317 compare_direction
= -1;
7321 /* in this case we cannot know the number of iterations */
7322 if (loop_dump_stream
)
7323 fprintf (loop_dump_stream
,
7324 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7331 compare_direction
= 1;
7337 compare_direction
= -1;
7340 compare_direction
= 0;
7347 /* make sure that the loop does not end by an overflow */
7348 if (compare_direction
!= increment_direction
) {
7349 if (loop_dump_stream
)
7350 fprintf (loop_dump_stream
,
7351 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7356 /* try to instrument the loop. */
7358 /* Handle the simpler case, where the bounds are known at compile time. */
7359 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7362 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7364 /* check the relation between compare-val and initial-val */
7365 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7366 int range_direction
= (difference
> 0) ? 1 : -1;
7368 /* make sure the loop executes enough iterations to gain from BCT */
7369 if (difference
> -3 && difference
< 3) {
7370 if (loop_dump_stream
)
7371 fprintf (loop_dump_stream
,
7372 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7377 /* make sure that the loop executes at least once */
7378 if ((range_direction
== 1 && compare_direction
== -1)
7379 || (range_direction
== -1 && compare_direction
== 1))
7381 if (loop_dump_stream
)
7382 fprintf (loop_dump_stream
,
7383 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7388 /* make sure that the loop does not end by an overflow (in compile time
7389 bounds we must have an additional check for overflow, because here
7390 we also support the compare code of 'NE'. */
7391 if (comparison_code
== NE
7392 && increment_direction
!= range_direction
) {
7393 if (loop_dump_stream
)
7394 fprintf (loop_dump_stream
,
7395 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7400 /* Determine the number of iterations by:
7402 ; compare-val - initial-val + (increment -1) + additional-iteration
7403 ; num_iterations = -----------------------------------------------------------------
7406 difference
= (range_direction
> 0) ? difference
: -difference
;
7408 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7409 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7410 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7411 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7412 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7415 if (increment_value_abs
== 0) {
7416 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7419 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7420 / increment_value_abs
;
7423 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7425 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7427 /* Done with this loop. */
7431 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7432 /* In this case we generate run_time calculation of the number of iterations */
7434 /* With runtime bounds, if the compare is of the form '!=' we give up */
7435 if (comparison_code
== NE
) {
7436 if (loop_dump_stream
)
7437 fprintf (loop_dump_stream
,
7438 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7444 /* We rely on the existence of run-time guard to ensure that the
7445 loop executes at least once. */
7447 rtx iterations_num_reg
;
7449 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7451 /* make sure that the increment is a power of two, otherwise (an
7452 expensive) divide is needed. */
7453 if (exact_log2 (increment_value_abs
) == -1)
7455 if (loop_dump_stream
)
7456 fprintf (loop_dump_stream
,
7457 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7461 /* compute the number of iterations */
7464 /* CYGNUS LOCAL: HAIFA bug fix */
7467 /* Again, the number of iterations is calculated by:
7469 ; compare-val - initial-val + (increment -1) + additional-iteration
7470 ; num_iterations = -----------------------------------------------------------------
7473 /* ??? Do we have to call copy_rtx here before passing rtx to
7475 if (compare_direction
> 0) {
7476 /* <, <= :the loop variable is increasing */
7477 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7478 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7481 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7482 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7485 if (increment_value_abs
- 1 + add_iteration
!= 0)
7486 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7487 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7488 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7490 if (increment_value_abs
!= 1)
7492 /* ??? This will generate an expensive divide instruction for
7493 most targets. The original authors apparently expected this
7494 to be a shift, since they test for power-of-2 divisors above,
7495 but just naively generating a divide instruction will not give
7496 a shift. It happens to work for the PowerPC target because
7497 the rs6000.md file has a divide pattern that emits shifts.
7498 It will probably not work for any other target. */
7499 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7501 GEN_INT (increment_value_abs
),
7502 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7505 iterations_num_reg
= temp_reg
;
7506 /* END CYGNUS LOCAL: HAIFA bug fix */
7508 sequence
= gen_sequence ();
7510 emit_insn_before (sequence
, loop_start
);
7511 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7515 /* instrument loop by inserting a bct in it. This is done in the following way:
7516 1. A new register is created and assigned the hard register number of the count
7518 2. In the head of the loop the new variable is initialized by the value passed in the
7519 loop_num_iterations parameter.
7520 3. At the end of the loop, comparison of the register with 0 is generated.
7521 The created comparison follows the pattern defined for the
7522 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7524 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7525 not used elsewhere, it will be eliminated by data-flow analisys. */
7528 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7529 rtx loop_start
, loop_end
;
7530 rtx loop_num_iterations
;
7532 rtx temp_reg1
, temp_reg2
;
7536 enum machine_mode loop_var_mode
= SImode
;
7538 #ifdef HAVE_decrement_and_branch_on_count
7539 if (HAVE_decrement_and_branch_on_count
)
7541 if (loop_dump_stream
)
7542 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7544 /* eliminate the check on the old variable */
7545 delete_insn (PREV_INSN (loop_end
));
7546 delete_insn (PREV_INSN (loop_end
));
7548 /* insert the label which will delimit the start of the loop */
7549 start_label
= gen_label_rtx ();
7550 emit_label_after (start_label
, loop_start
);
7552 /* insert initialization of the count register into the loop header */
7554 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7555 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7557 /* this will be count register */
7558 temp_reg2
= gen_rtx (REG
, loop_var_mode
, COUNT_REGISTER_REGNUM
);
7559 /* we have to move the value to the count register from an GPR
7560 because rtx pointed to by loop_num_iterations could contain
7561 expression which cannot be moved into count register */
7562 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7564 sequence
= gen_sequence ();
7566 emit_insn_after (sequence
, loop_start
);
7568 /* insert new comparison on the count register instead of the
7569 old one, generating the needed BCT pattern (that will be
7570 later recognized by assembly generation phase). */
7571 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7573 LABEL_NUSES (start_label
)++;
7576 #endif /* HAVE_decrement_and_branch_on_count */
7579 /* calculate the uid of the given loop */
7581 loop_number (loop_start
, loop_end
)
7582 rtx loop_start
, loop_end
;
7586 /* assume that this insn contains the LOOP_START
7587 note, so it will not be changed by the loop unrolling */
7588 loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7589 /* sanity check - should never happen */
7596 /* scan the function and determine whether it has indirect (computed) jump */
7598 indirect_jump_in_function_p (start
)
7602 int is_indirect_jump
= 0;
7604 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
)) {
7605 if (GET_CODE (insn
) == JUMP_INSN
) {
7606 if (GET_CODE (PATTERN (insn
)) == SET
) {
7607 rtx insn_work_code
= XEXP (PATTERN (insn
), 1);
7609 if (GET_CODE (insn_work_code
) == LABEL_REF
)
7611 if (GET_CODE (insn_work_code
) == IF_THEN_ELSE
) {
7612 rtx jump_target
= XEXP (insn_work_code
, 1);
7614 if (jump_target
== pc_rtx
7615 || (GET_CODE (jump_target
) == (enum rtx_code
)LABEL_REF
))
7619 is_indirect_jump
= 1;
7622 return is_indirect_jump
;
7625 /* END CYGNUS LOCAL haifa */