1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-7, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx
*loop_comparison_value
;
101 rtx
*loop_start_value
;
102 enum rtx_code
*loop_comparison_code
;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor
;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid
;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx
*loop_number_exit_labels
;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count
;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations
;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call
;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile
;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue
;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set
;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used
;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize
;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once
;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems
[NUM_STORES
];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx
;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered
;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables
;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets
;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed
;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop
;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack
;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack
*rtl_obstack
;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn
; /* A movable insn */
239 rtx set_src
; /* The expression this reg is set from. */
240 rtx set_dest
; /* The destination of this SET. */
241 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec
; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno
; /* The register it sets */
246 short lifetime
; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings
; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond
: 1; /* 1 if only conditionally movable */
253 unsigned int force
: 1; /* 1 means MUST move this insn */
254 unsigned int global
: 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done
: 1; /* 1 inhibits further processing of this */
260 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable
*match
; /* First entry for same value */
270 struct movable
*forces
; /* An insn that must be moved if this is */
271 struct movable
*next
;
274 FILE *loop_dump_stream
;
276 /* Forward declarations. */
278 static void find_and_verify_loops ();
279 static void mark_loop_jump ();
280 static void prescan_loop ();
281 static int reg_in_basic_block_p ();
282 static int consec_sets_invariant_p ();
283 static rtx
libcall_other_reg ();
284 static int labels_in_range_p ();
285 static void count_loop_regs_set ();
286 static void note_addr_stored ();
287 static int loop_reg_used_before_p ();
288 static void scan_loop ();
290 static void replace_call_address ();
292 static rtx
skip_consec_insns ();
293 static int libcall_benefit ();
294 static void ignore_some_movables ();
295 static void force_movables ();
296 static void combine_movables ();
297 static int rtx_equal_for_loop_p ();
298 static void move_movables ();
299 static void strength_reduce ();
300 static int valid_initial_value_p ();
301 static void find_mem_givs ();
302 static void record_biv ();
303 static void check_final_value ();
304 static void record_giv ();
305 static void update_giv_derive ();
306 static int basic_induction_var ();
307 static rtx
simplify_giv_expr ();
308 static int general_induction_var ();
309 static int consec_sets_giv ();
310 static int check_dbra_loop ();
311 static rtx
express_from ();
312 static int combine_givs_p ();
313 static void combine_givs ();
314 static int product_cheap_p ();
315 static int maybe_eliminate_biv ();
316 static int maybe_eliminate_biv_1 ();
317 static int last_use_this_basic_block ();
318 static void record_initial ();
319 static void update_reg_last_use ();
322 /* This is extern from unroll.c */
323 void iteration_info ();
325 /* Two main functions for implementing bct:
326 first - to be called before loop unrolling, and the second - after */
327 static void analyze_loop_iterations ();
328 static void insert_bct ();
330 /* Auxiliary function that inserts the bct pattern into the loop */
331 static void instrument_loop_bct ();
334 /* Indirect_jump_in_function is computed once per function. */
335 int indirect_jump_in_function
= 0;
336 static int indirect_jump_in_function_p ();
339 /* Relative gain of eliminating various kinds of operations. */
346 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
347 copy the value of the strength reduced giv to its original register. */
353 char *free_point
= (char *) oballoc (1);
354 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
356 add_cost
= rtx_cost (gen_rtx_PLUS (word_mode
, reg
, reg
), SET
);
358 /* We multiply by 2 to reconcile the difference in scale between
359 these two ways of computing costs. Otherwise the cost of a copy
360 will be far less than the cost of an add. */
364 /* Free the objects we just allocated. */
367 /* Initialize the obstack used for rtl in product_cheap_p. */
368 gcc_obstack_init (&temp_obstack
);
371 /* Entry point of this file. Perform loop optimization
372 on the current function. F is the first insn of the function
373 and DUMPFILE is a stream for output of a trace of actions taken
374 (or 0 if none should be output). */
377 loop_optimize (f
, dumpfile
, unroll_p
)
378 /* f is the first instruction of a chain of insns for one function */
387 loop_dump_stream
= dumpfile
;
389 init_recog_no_volatile ();
390 init_alias_analysis ();
392 max_reg_before_loop
= max_reg_num ();
394 moved_once
= (char *) alloca (max_reg_before_loop
);
395 bzero (moved_once
, max_reg_before_loop
);
399 /* Count the number of loops. */
402 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
404 if (GET_CODE (insn
) == NOTE
405 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
409 /* Don't waste time if no loops. */
410 if (max_loop_num
== 0)
413 /* Get size to use for tables indexed by uids.
414 Leave some space for labels allocated by find_and_verify_loops. */
415 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
417 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
418 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
420 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
421 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
423 /* Allocate tables for recording each loop. We set each entry, so they need
425 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
426 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
427 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
428 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
429 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
430 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
432 /* This is initialized by the unrolling code, so we go ahead
433 and clear them just in case we are not performing loop
435 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
436 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
439 /* Allocate for BCT optimization */
440 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
441 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
443 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
444 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
446 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
447 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
448 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
449 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
450 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
451 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
454 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
455 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
458 /* Find and process each loop.
459 First, find them, and record them in order of their beginnings. */
460 find_and_verify_loops (f
);
462 /* Now find all register lifetimes. This must be done after
463 find_and_verify_loops, because it might reorder the insns in the
465 reg_scan (f
, max_reg_num (), 1);
467 /* See if we went too far. */
468 if (get_max_uid () > max_uid_for_loop
)
471 /* Compute the mapping from uids to luids.
472 LUIDs are numbers assigned to insns, like uids,
473 except that luids increase monotonically through the code.
474 Don't assign luids to line-number NOTEs, so that the distance in luids
475 between two insns is not affected by -g. */
477 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
480 if (GET_CODE (insn
) != NOTE
481 || NOTE_LINE_NUMBER (insn
) <= 0)
482 uid_luid
[INSN_UID (insn
)] = ++i
;
484 /* Give a line number note the same luid as preceding insn. */
485 uid_luid
[INSN_UID (insn
)] = i
;
490 /* Don't leave gaps in uid_luid for insns that have been
491 deleted. It is possible that the first or last insn
492 using some register has been deleted by cross-jumping.
493 Make sure that uid_luid for that former insn's uid
494 points to the general area where that insn used to be. */
495 for (i
= 0; i
< max_uid_for_loop
; i
++)
497 uid_luid
[0] = uid_luid
[i
];
498 if (uid_luid
[0] != 0)
501 for (i
= 0; i
< max_uid_for_loop
; i
++)
502 if (uid_luid
[i
] == 0)
503 uid_luid
[i
] = uid_luid
[i
- 1];
505 /* Create a mapping from loops to BLOCK tree nodes. */
506 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
507 find_loop_tree_blocks ();
509 /* Determine if the function has indirect jump. On some systems
510 this prevents low overhead loop instructions from being used. */
511 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
513 /* Now scan the loops, last ones first, since this means inner ones are done
514 before outer ones. */
515 for (i
= max_loop_num
-1; i
>= 0; i
--)
516 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
517 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
518 max_reg_num (), unroll_p
);
520 /* If debugging and unrolling loops, we must replicate the tree nodes
521 corresponding to the blocks inside the loop, so that the original one
522 to one mapping will remain. */
523 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
524 unroll_block_trees ();
527 /* Optimize one loop whose start is LOOP_START and end is END.
528 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
529 NOTE_INSN_LOOP_END. */
531 /* ??? Could also move memory writes out of loops if the destination address
532 is invariant, the source is invariant, the memory write is not volatile,
533 and if we can prove that no read inside the loop can read this address
534 before the write occurs. If there is a read of this address after the
535 write, then we can also mark the memory read as invariant. */
538 scan_loop (loop_start
, end
, nregs
, unroll_p
)
545 /* 1 if we are scanning insns that could be executed zero times. */
547 /* 1 if we are scanning insns that might never be executed
548 due to a subroutine call which might exit before they are reached. */
550 /* For a rotated loop that is entered near the bottom,
551 this is the label at the top. Otherwise it is zero. */
553 /* Jump insn that enters the loop, or 0 if control drops in. */
554 rtx loop_entry_jump
= 0;
555 /* Place in the loop where control enters. */
557 /* Number of insns in the loop. */
562 /* The SET from an insn, if it is the only SET in the insn. */
564 /* Chain describing insns movable in current loop. */
565 struct movable
*movables
= 0;
566 /* Last element in `movables' -- so we can add elements at the end. */
567 struct movable
*last_movable
= 0;
568 /* Ratio of extra register life span we can justify
569 for saving an instruction. More if loop doesn't call subroutines
570 since in that case saving an insn makes more difference
571 and more registers are available. */
573 /* If we have calls, contains the insn in which a register was used
574 if it was used exactly once; contains const0_rtx if it was used more
576 rtx
*reg_single_usage
= 0;
577 /* Nonzero if we are scanning instructions in a sub-loop. */
580 n_times_set
= (int *) alloca (nregs
* sizeof (int));
581 n_times_used
= (int *) alloca (nregs
* sizeof (int));
582 may_not_optimize
= (char *) alloca (nregs
);
584 /* Determine whether this loop starts with a jump down to a test at
585 the end. This will occur for a small number of loops with a test
586 that is too complex to duplicate in front of the loop.
588 We search for the first insn or label in the loop, skipping NOTEs.
589 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
590 (because we might have a loop executed only once that contains a
591 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
592 (in case we have a degenerate loop).
594 Note that if we mistakenly think that a loop is entered at the top
595 when, in fact, it is entered at the exit test, the only effect will be
596 slightly poorer optimization. Making the opposite error can generate
597 incorrect code. Since very few loops now start with a jump to the
598 exit test, the code here to detect that case is very conservative. */
600 for (p
= NEXT_INSN (loop_start
);
602 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
603 && (GET_CODE (p
) != NOTE
604 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
605 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
611 /* Set up variables describing this loop. */
612 prescan_loop (loop_start
, end
);
613 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
615 /* If loop has a jump before the first label,
616 the true entry is the target of that jump.
617 Start scan from there.
618 But record in LOOP_TOP the place where the end-test jumps
619 back to so we can scan that after the end of the loop. */
620 if (GET_CODE (p
) == JUMP_INSN
)
624 /* Loop entry must be unconditional jump (and not a RETURN) */
626 && JUMP_LABEL (p
) != 0
627 /* Check to see whether the jump actually
628 jumps out of the loop (meaning it's no loop).
629 This case can happen for things like
630 do {..} while (0). If this label was generated previously
631 by loop, we can't tell anything about it and have to reject
633 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
634 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
635 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
637 loop_top
= next_label (scan_start
);
638 scan_start
= JUMP_LABEL (p
);
642 /* If SCAN_START was an insn created by loop, we don't know its luid
643 as required by loop_reg_used_before_p. So skip such loops. (This
644 test may never be true, but it's best to play it safe.)
646 Also, skip loops where we do not start scanning at a label. This
647 test also rejects loops starting with a JUMP_INSN that failed the
650 if (INSN_UID (scan_start
) >= max_uid_for_loop
651 || GET_CODE (scan_start
) != CODE_LABEL
)
653 if (loop_dump_stream
)
654 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
655 INSN_UID (loop_start
), INSN_UID (end
));
659 /* Count number of times each reg is set during this loop.
660 Set may_not_optimize[I] if it is not safe to move out
661 the setting of register I. If this loop has calls, set
662 reg_single_usage[I]. */
664 bzero ((char *) n_times_set
, nregs
* sizeof (int));
665 bzero (may_not_optimize
, nregs
);
669 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
670 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
673 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
674 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
676 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
677 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
678 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
680 if (loop_dump_stream
)
682 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
683 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
685 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
686 INSN_UID (loop_continue
));
689 /* Scan through the loop finding insns that are safe to move.
690 Set n_times_set negative for the reg being set, so that
691 this reg will be considered invariant for subsequent insns.
692 We consider whether subsequent insns use the reg
693 in deciding whether it is worth actually moving.
695 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
696 and therefore it is possible that the insns we are scanning
697 would never be executed. At such times, we must make sure
698 that it is safe to execute the insn once instead of zero times.
699 When MAYBE_NEVER is 0, all insns will be executed at least once
700 so that is not a problem. */
706 /* At end of a straight-in loop, we are done.
707 At end of a loop entered at the bottom, scan the top. */
720 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
721 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
723 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
724 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
727 if (GET_CODE (p
) == INSN
728 && (set
= single_set (p
))
729 && GET_CODE (SET_DEST (set
)) == REG
730 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
735 rtx src
= SET_SRC (set
);
736 rtx dependencies
= 0;
738 /* Figure out what to use as a source of this insn. If a REG_EQUIV
739 note is given or if a REG_EQUAL note with a constant operand is
740 specified, use it as the source and mark that we should move
741 this insn by calling emit_move_insn rather that duplicating the
744 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
746 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
748 src
= XEXP (temp
, 0), move_insn
= 1;
751 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
752 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
753 src
= XEXP (temp
, 0), move_insn
= 1;
754 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
756 src
= XEXP (temp
, 0);
757 /* A libcall block can use regs that don't appear in
758 the equivalent expression. To move the libcall,
759 we must move those regs too. */
760 dependencies
= libcall_other_reg (p
, src
);
764 /* Don't try to optimize a register that was made
765 by loop-optimization for an inner loop.
766 We don't know its life-span, so we can't compute the benefit. */
767 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
769 /* In order to move a register, we need to have one of three cases:
770 (1) it is used only in the same basic block as the set
771 (2) it is not a user variable and it is not used in the
772 exit test (this can cause the variable to be used
773 before it is set just like a user-variable).
774 (3) the set is guaranteed to be executed once the loop starts,
775 and the reg is not used until after that. */
776 else if (! ((! maybe_never
777 && ! loop_reg_used_before_p (set
, p
, loop_start
,
779 || (! REG_USERVAR_P (SET_DEST (set
))
780 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
781 || reg_in_basic_block_p (p
, SET_DEST (set
))))
783 else if ((tem
= invariant_p (src
))
784 && (dependencies
== 0
785 || (tem2
= invariant_p (dependencies
)) != 0)
786 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
788 = consec_sets_invariant_p (SET_DEST (set
),
789 n_times_set
[REGNO (SET_DEST (set
))],
791 /* If the insn can cause a trap (such as divide by zero),
792 can't move it unless it's guaranteed to be executed
793 once loop is entered. Even a function call might
794 prevent the trap insn from being reached
795 (since it might exit!) */
796 && ! ((maybe_never
|| call_passed
)
797 && may_trap_p (src
)))
799 register struct movable
*m
;
800 register int regno
= REGNO (SET_DEST (set
));
802 /* A potential lossage is where we have a case where two insns
803 can be combined as long as they are both in the loop, but
804 we move one of them outside the loop. For large loops,
805 this can lose. The most common case of this is the address
806 of a function being called.
808 Therefore, if this register is marked as being used exactly
809 once if we are in a loop with calls (a "large loop"), see if
810 we can replace the usage of this register with the source
811 of this SET. If we can, delete this insn.
813 Don't do this if P has a REG_RETVAL note or if we have
814 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
816 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
817 && reg_single_usage
[regno
] != const0_rtx
818 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
819 && (REGNO_LAST_UID (regno
)
820 == INSN_UID (reg_single_usage
[regno
]))
821 && n_times_set
[REGNO (SET_DEST (set
))] == 1
822 && ! side_effects_p (SET_SRC (set
))
823 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
824 && (! SMALL_REGISTER_CLASSES
825 || (! (GET_CODE (SET_SRC (set
)) == REG
826 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
827 /* This test is not redundant; SET_SRC (set) might be
828 a call-clobbered register and the life of REGNO
829 might span a call. */
830 && ! modified_between_p (SET_SRC (set
), p
,
831 reg_single_usage
[regno
])
832 && no_labels_between_p (p
, reg_single_usage
[regno
])
833 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
834 reg_single_usage
[regno
]))
836 /* Replace any usage in a REG_EQUAL note. Must copy the
837 new source, so that we don't get rtx sharing between the
838 SET_SOURCE and REG_NOTES of insn p. */
839 REG_NOTES (reg_single_usage
[regno
])
840 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
841 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
844 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
845 NOTE_SOURCE_FILE (p
) = 0;
846 n_times_set
[regno
] = 0;
850 m
= (struct movable
*) alloca (sizeof (struct movable
));
854 m
->dependencies
= dependencies
;
855 m
->set_dest
= SET_DEST (set
);
857 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
861 m
->move_insn
= move_insn
;
862 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
863 m
->savemode
= VOIDmode
;
865 /* Set M->cond if either invariant_p or consec_sets_invariant_p
866 returned 2 (only conditionally invariant). */
867 m
->cond
= ((tem
| tem1
| tem2
) > 1);
868 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
869 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
871 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
872 - uid_luid
[REGNO_FIRST_UID (regno
)]);
873 m
->savings
= n_times_used
[regno
];
874 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
875 m
->savings
+= libcall_benefit (p
);
876 n_times_set
[regno
] = move_insn
? -2 : -1;
877 /* Add M to the end of the chain MOVABLES. */
881 last_movable
->next
= m
;
886 /* Skip this insn, not checking REG_LIBCALL notes. */
887 p
= next_nonnote_insn (p
);
888 /* Skip the consecutive insns, if there are any. */
889 p
= skip_consec_insns (p
, m
->consec
);
890 /* Back up to the last insn of the consecutive group. */
891 p
= prev_nonnote_insn (p
);
893 /* We must now reset m->move_insn, m->is_equiv, and possibly
894 m->set_src to correspond to the effects of all the
896 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
898 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
901 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
902 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
903 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
908 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
911 /* If this register is always set within a STRICT_LOW_PART
912 or set to zero, then its high bytes are constant.
913 So clear them outside the loop and within the loop
914 just load the low bytes.
915 We must check that the machine has an instruction to do so.
916 Also, if the value loaded into the register
917 depends on the same register, this cannot be done. */
918 else if (SET_SRC (set
) == const0_rtx
919 && GET_CODE (NEXT_INSN (p
)) == INSN
920 && (set1
= single_set (NEXT_INSN (p
)))
921 && GET_CODE (set1
) == SET
922 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
923 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
924 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
926 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
928 register int regno
= REGNO (SET_DEST (set
));
929 if (n_times_set
[regno
] == 2)
931 register struct movable
*m
;
932 m
= (struct movable
*) alloca (sizeof (struct movable
));
935 m
->set_dest
= SET_DEST (set
);
943 /* If the insn may not be executed on some cycles,
944 we can't clear the whole reg; clear just high part.
945 Not even if the reg is used only within this loop.
952 Clearing x before the inner loop could clobber a value
953 being saved from the last time around the outer loop.
954 However, if the reg is not used outside this loop
955 and all uses of the register are in the same
956 basic block as the store, there is no problem.
958 If this insn was made by loop, we don't know its
959 INSN_LUID and hence must make a conservative
961 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
962 || (uid_luid
[REGNO_LAST_UID (regno
)]
964 || (uid_luid
[REGNO_FIRST_UID (regno
)]
966 || (labels_in_range_p
967 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
968 if (maybe_never
&& m
->global
)
969 m
->savemode
= GET_MODE (SET_SRC (set1
));
971 m
->savemode
= VOIDmode
;
975 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
976 - uid_luid
[REGNO_FIRST_UID (regno
)]);
978 n_times_set
[regno
] = -1;
979 /* Add M to the end of the chain MOVABLES. */
983 last_movable
->next
= m
;
988 /* Past a call insn, we get to insns which might not be executed
989 because the call might exit. This matters for insns that trap.
990 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
991 so they don't count. */
992 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
994 /* Past a label or a jump, we get to insns for which we
995 can't count on whether or how many times they will be
996 executed during each iteration. Therefore, we can
997 only move out sets of trivial variables
998 (those not used after the loop). */
999 /* Similar code appears twice in strength_reduce. */
1000 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1001 /* If we enter the loop in the middle, and scan around to the
1002 beginning, don't set maybe_never for that. This must be an
1003 unconditional jump, otherwise the code at the top of the
1004 loop might never be executed. Unconditional jumps are
1005 followed a by barrier then loop end. */
1006 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1007 && NEXT_INSN (NEXT_INSN (p
)) == end
1008 && simplejump_p (p
)))
1010 else if (GET_CODE (p
) == NOTE
)
1012 /* At the virtual top of a converted loop, insns are again known to
1013 be executed: logically, the loop begins here even though the exit
1014 code has been duplicated. */
1015 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1016 maybe_never
= call_passed
= 0;
1017 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1019 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1024 /* If one movable subsumes another, ignore that other. */
1026 ignore_some_movables (movables
);
1028 /* For each movable insn, see if the reg that it loads
1029 leads when it dies right into another conditionally movable insn.
1030 If so, record that the second insn "forces" the first one,
1031 since the second can be moved only if the first is. */
1033 force_movables (movables
);
1035 /* See if there are multiple movable insns that load the same value.
1036 If there are, make all but the first point at the first one
1037 through the `match' field, and add the priorities of them
1038 all together as the priority of the first. */
1040 combine_movables (movables
, nregs
);
1042 /* Now consider each movable insn to decide whether it is worth moving.
1043 Store 0 in n_times_set for each reg that is moved. */
1045 move_movables (movables
, threshold
,
1046 insn_count
, loop_start
, end
, nregs
);
1048 /* Now candidates that still are negative are those not moved.
1049 Change n_times_set to indicate that those are not actually invariant. */
1050 for (i
= 0; i
< nregs
; i
++)
1051 if (n_times_set
[i
] < 0)
1052 n_times_set
[i
] = n_times_used
[i
];
1054 if (flag_strength_reduce
)
1055 strength_reduce (scan_start
, end
, loop_top
,
1056 insn_count
, loop_start
, end
, unroll_p
);
1059 /* Add elements to *OUTPUT to record all the pseudo-regs
1060 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1063 record_excess_regs (in_this
, not_in_this
, output
)
1064 rtx in_this
, not_in_this
;
1071 code
= GET_CODE (in_this
);
1085 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1086 && ! reg_mentioned_p (in_this
, not_in_this
))
1087 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1094 fmt
= GET_RTX_FORMAT (code
);
1095 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1102 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1103 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1107 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1113 /* Check what regs are referred to in the libcall block ending with INSN,
1114 aside from those mentioned in the equivalent value.
1115 If there are none, return 0.
1116 If there are one or more, return an EXPR_LIST containing all of them. */
1119 libcall_other_reg (insn
, equiv
)
1122 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1123 rtx p
= XEXP (note
, 0);
1126 /* First, find all the regs used in the libcall block
1127 that are not mentioned as inputs to the result. */
1131 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1132 || GET_CODE (p
) == CALL_INSN
)
1133 record_excess_regs (PATTERN (p
), equiv
, &output
);
1140 /* Return 1 if all uses of REG
1141 are between INSN and the end of the basic block. */
1144 reg_in_basic_block_p (insn
, reg
)
1147 int regno
= REGNO (reg
);
1150 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1153 /* Search this basic block for the already recorded last use of the reg. */
1154 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1156 switch (GET_CODE (p
))
1163 /* Ordinary insn: if this is the last use, we win. */
1164 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1169 /* Jump insn: if this is the last use, we win. */
1170 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1172 /* Otherwise, it's the end of the basic block, so we lose. */
1177 /* It's the end of the basic block, so we lose. */
1185 /* The "last use" doesn't follow the "first use"?? */
1189 /* Compute the benefit of eliminating the insns in the block whose
1190 last insn is LAST. This may be a group of insns used to compute a
1191 value directly or can contain a library call. */
1194 libcall_benefit (last
)
1200 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1201 insn
!= last
; insn
= NEXT_INSN (insn
))
1203 if (GET_CODE (insn
) == CALL_INSN
)
1204 benefit
+= 10; /* Assume at least this many insns in a library
1206 else if (GET_CODE (insn
) == INSN
1207 && GET_CODE (PATTERN (insn
)) != USE
1208 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1215 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1218 skip_consec_insns (insn
, count
)
1222 for (; count
> 0; count
--)
1226 /* If first insn of libcall sequence, skip to end. */
1227 /* Do this at start of loop, since INSN is guaranteed to
1229 if (GET_CODE (insn
) != NOTE
1230 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1231 insn
= XEXP (temp
, 0);
1233 do insn
= NEXT_INSN (insn
);
1234 while (GET_CODE (insn
) == NOTE
);
1240 /* Ignore any movable whose insn falls within a libcall
1241 which is part of another movable.
1242 We make use of the fact that the movable for the libcall value
1243 was made later and so appears later on the chain. */
1246 ignore_some_movables (movables
)
1247 struct movable
*movables
;
1249 register struct movable
*m
, *m1
;
1251 for (m
= movables
; m
; m
= m
->next
)
1253 /* Is this a movable for the value of a libcall? */
1254 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1258 /* Check for earlier movables inside that range,
1259 and mark them invalid. We cannot use LUIDs here because
1260 insns created by loop.c for prior loops don't have LUIDs.
1261 Rather than reject all such insns from movables, we just
1262 explicitly check each insn in the libcall (since invariant
1263 libcalls aren't that common). */
1264 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1265 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1266 if (m1
->insn
== insn
)
1272 /* For each movable insn, see if the reg that it loads
1273 leads when it dies right into another conditionally movable insn.
1274 If so, record that the second insn "forces" the first one,
1275 since the second can be moved only if the first is. */
1278 force_movables (movables
)
1279 struct movable
*movables
;
1281 register struct movable
*m
, *m1
;
1282 for (m1
= movables
; m1
; m1
= m1
->next
)
1283 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1284 if (!m1
->partial
&& !m1
->done
)
1286 int regno
= m1
->regno
;
1287 for (m
= m1
->next
; m
; m
= m
->next
)
1288 /* ??? Could this be a bug? What if CSE caused the
1289 register of M1 to be used after this insn?
1290 Since CSE does not update regno_last_uid,
1291 this insn M->insn might not be where it dies.
1292 But very likely this doesn't matter; what matters is
1293 that M's reg is computed from M1's reg. */
1294 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1297 if (m
!= 0 && m
->set_src
== m1
->set_dest
1298 /* If m->consec, m->set_src isn't valid. */
1302 /* Increase the priority of the moving the first insn
1303 since it permits the second to be moved as well. */
1307 m1
->lifetime
+= m
->lifetime
;
1308 m1
->savings
+= m
->savings
;
1313 /* Find invariant expressions that are equal and can be combined into
1317 combine_movables (movables
, nregs
)
1318 struct movable
*movables
;
1321 register struct movable
*m
;
1322 char *matched_regs
= (char *) alloca (nregs
);
1323 enum machine_mode mode
;
1325 /* Regs that are set more than once are not allowed to match
1326 or be matched. I'm no longer sure why not. */
1327 /* Perhaps testing m->consec_sets would be more appropriate here? */
1329 for (m
= movables
; m
; m
= m
->next
)
1330 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1332 register struct movable
*m1
;
1333 int regno
= m
->regno
;
1335 bzero (matched_regs
, nregs
);
1336 matched_regs
[regno
] = 1;
1338 /* We want later insns to match the first one. Don't make the first
1339 one match any later ones. So start this loop at m->next. */
1340 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1341 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1342 /* A reg used outside the loop mustn't be eliminated. */
1344 /* A reg used for zero-extending mustn't be eliminated. */
1346 && (matched_regs
[m1
->regno
]
1349 /* Can combine regs with different modes loaded from the
1350 same constant only if the modes are the same or
1351 if both are integer modes with M wider or the same
1352 width as M1. The check for integer is redundant, but
1353 safe, since the only case of differing destination
1354 modes with equal sources is when both sources are
1355 VOIDmode, i.e., CONST_INT. */
1356 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1357 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1358 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1359 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1360 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1361 /* See if the source of M1 says it matches M. */
1362 && ((GET_CODE (m1
->set_src
) == REG
1363 && matched_regs
[REGNO (m1
->set_src
)])
1364 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1366 && ((m
->dependencies
== m1
->dependencies
)
1367 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1369 m
->lifetime
+= m1
->lifetime
;
1370 m
->savings
+= m1
->savings
;
1373 matched_regs
[m1
->regno
] = 1;
1377 /* Now combine the regs used for zero-extension.
1378 This can be done for those not marked `global'
1379 provided their lives don't overlap. */
1381 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1382 mode
= GET_MODE_WIDER_MODE (mode
))
1384 register struct movable
*m0
= 0;
1386 /* Combine all the registers for extension from mode MODE.
1387 Don't combine any that are used outside this loop. */
1388 for (m
= movables
; m
; m
= m
->next
)
1389 if (m
->partial
&& ! m
->global
1390 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1392 register struct movable
*m1
;
1393 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1394 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1398 /* First one: don't check for overlap, just record it. */
1403 /* Make sure they extend to the same mode.
1404 (Almost always true.) */
1405 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1408 /* We already have one: check for overlap with those
1409 already combined together. */
1410 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1411 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1412 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1413 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1416 /* No overlap: we can combine this with the others. */
1417 m0
->lifetime
+= m
->lifetime
;
1418 m0
->savings
+= m
->savings
;
1427 /* Return 1 if regs X and Y will become the same if moved. */
1430 regs_match_p (x
, y
, movables
)
1432 struct movable
*movables
;
1436 struct movable
*mx
, *my
;
1438 for (mx
= movables
; mx
; mx
= mx
->next
)
1439 if (mx
->regno
== xn
)
1442 for (my
= movables
; my
; my
= my
->next
)
1443 if (my
->regno
== yn
)
1447 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1449 || mx
== my
->match
));
1452 /* Return 1 if X and Y are identical-looking rtx's.
1453 This is the Lisp function EQUAL for rtx arguments.
1455 If two registers are matching movables or a movable register and an
1456 equivalent constant, consider them equal. */
1459 rtx_equal_for_loop_p (x
, y
, movables
)
1461 struct movable
*movables
;
1465 register struct movable
*m
;
1466 register enum rtx_code code
;
1471 if (x
== 0 || y
== 0)
1474 code
= GET_CODE (x
);
1476 /* If we have a register and a constant, they may sometimes be
1478 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1481 for (m
= movables
; m
; m
= m
->next
)
1482 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1483 && rtx_equal_p (m
->set_src
, y
))
1486 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1489 for (m
= movables
; m
; m
= m
->next
)
1490 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1491 && rtx_equal_p (m
->set_src
, x
))
1495 /* Otherwise, rtx's of different codes cannot be equal. */
1496 if (code
!= GET_CODE (y
))
1499 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1500 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1502 if (GET_MODE (x
) != GET_MODE (y
))
1505 /* These three types of rtx's can be compared nonrecursively. */
1507 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1509 if (code
== LABEL_REF
)
1510 return XEXP (x
, 0) == XEXP (y
, 0);
1511 if (code
== SYMBOL_REF
)
1512 return XSTR (x
, 0) == XSTR (y
, 0);
1514 /* Compare the elements. If any pair of corresponding elements
1515 fail to match, return 0 for the whole things. */
1517 fmt
= GET_RTX_FORMAT (code
);
1518 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1523 if (XWINT (x
, i
) != XWINT (y
, i
))
1528 if (XINT (x
, i
) != XINT (y
, i
))
1533 /* Two vectors must have the same length. */
1534 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1537 /* And the corresponding elements must match. */
1538 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1539 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1544 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1549 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1554 /* These are just backpointers, so they don't matter. */
1560 /* It is believed that rtx's at this level will never
1561 contain anything but integers and other rtx's,
1562 except for within LABEL_REFs and SYMBOL_REFs. */
1570 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1571 insns in INSNS which use thet reference. */
1574 add_label_notes (x
, insns
)
1578 enum rtx_code code
= GET_CODE (x
);
1583 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1585 rtx next
= next_real_insn (XEXP (x
, 0));
1587 /* Don't record labels that refer to dispatch tables.
1588 This is not necessary, since the tablejump references the same label.
1589 And if we did record them, flow.c would make worse code. */
1591 || ! (GET_CODE (next
) == JUMP_INSN
1592 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1593 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1595 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1596 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1597 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1603 fmt
= GET_RTX_FORMAT (code
);
1604 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1607 add_label_notes (XEXP (x
, i
), insns
);
1608 else if (fmt
[i
] == 'E')
1609 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1610 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1614 /* Scan MOVABLES, and move the insns that deserve to be moved.
1615 If two matching movables are combined, replace one reg with the
1616 other throughout. */
1619 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1620 struct movable
*movables
;
1628 register struct movable
*m
;
1630 /* Map of pseudo-register replacements to handle combining
1631 when we move several insns that load the same value
1632 into different pseudo-registers. */
1633 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1634 char *already_moved
= (char *) alloca (nregs
);
1636 bzero (already_moved
, nregs
);
1637 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1641 for (m
= movables
; m
; m
= m
->next
)
1643 /* Describe this movable insn. */
1645 if (loop_dump_stream
)
1647 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1648 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1650 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1652 fprintf (loop_dump_stream
, "cond ");
1654 fprintf (loop_dump_stream
, "force ");
1656 fprintf (loop_dump_stream
, "global ");
1658 fprintf (loop_dump_stream
, "done ");
1660 fprintf (loop_dump_stream
, "move-insn ");
1662 fprintf (loop_dump_stream
, "matches %d ",
1663 INSN_UID (m
->match
->insn
));
1665 fprintf (loop_dump_stream
, "forces %d ",
1666 INSN_UID (m
->forces
->insn
));
1669 /* Count movables. Value used in heuristics in strength_reduce. */
1672 /* Ignore the insn if it's already done (it matched something else).
1673 Otherwise, see if it is now safe to move. */
1677 || (1 == invariant_p (m
->set_src
)
1678 && (m
->dependencies
== 0
1679 || 1 == invariant_p (m
->dependencies
))
1681 || 1 == consec_sets_invariant_p (m
->set_dest
,
1684 && (! m
->forces
|| m
->forces
->done
))
1688 int savings
= m
->savings
;
1690 /* We have an insn that is safe to move.
1691 Compute its desirability. */
1696 if (loop_dump_stream
)
1697 fprintf (loop_dump_stream
, "savings %d ", savings
);
1699 if (moved_once
[regno
])
1703 if (loop_dump_stream
)
1704 fprintf (loop_dump_stream
, "halved since already moved ");
1707 /* An insn MUST be moved if we already moved something else
1708 which is safe only if this one is moved too: that is,
1709 if already_moved[REGNO] is nonzero. */
1711 /* An insn is desirable to move if the new lifetime of the
1712 register is no more than THRESHOLD times the old lifetime.
1713 If it's not desirable, it means the loop is so big
1714 that moving won't speed things up much,
1715 and it is liable to make register usage worse. */
1717 /* It is also desirable to move if it can be moved at no
1718 extra cost because something else was already moved. */
1720 if (already_moved
[regno
]
1721 || flag_move_all_movables
1722 || (threshold
* savings
* m
->lifetime
) >= insn_count
1723 || (m
->forces
&& m
->forces
->done
1724 && n_times_used
[m
->forces
->regno
] == 1))
1727 register struct movable
*m1
;
1730 /* Now move the insns that set the reg. */
1732 if (m
->partial
&& m
->match
)
1736 /* Find the end of this chain of matching regs.
1737 Thus, we load each reg in the chain from that one reg.
1738 And that reg is loaded with 0 directly,
1739 since it has ->match == 0. */
1740 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1741 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1742 SET_DEST (PATTERN (m1
->insn
)));
1743 i1
= emit_insn_before (newpat
, loop_start
);
1745 /* Mark the moved, invariant reg as being allowed to
1746 share a hard reg with the other matching invariant. */
1747 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1748 r1
= SET_DEST (PATTERN (m
->insn
));
1749 r2
= SET_DEST (PATTERN (m1
->insn
));
1751 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1752 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1754 delete_insn (m
->insn
);
1759 if (loop_dump_stream
)
1760 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1762 /* If we are to re-generate the item being moved with a
1763 new move insn, first delete what we have and then emit
1764 the move insn before the loop. */
1765 else if (m
->move_insn
)
1769 for (count
= m
->consec
; count
>= 0; count
--)
1771 /* If this is the first insn of a library call sequence,
1773 if (GET_CODE (p
) != NOTE
1774 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1777 /* If this is the last insn of a libcall sequence, then
1778 delete every insn in the sequence except the last.
1779 The last insn is handled in the normal manner. */
1780 if (GET_CODE (p
) != NOTE
1781 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1783 temp
= XEXP (temp
, 0);
1785 temp
= delete_insn (temp
);
1788 p
= delete_insn (p
);
1789 while (p
&& GET_CODE (p
) == NOTE
)
1794 emit_move_insn (m
->set_dest
, m
->set_src
);
1795 temp
= get_insns ();
1798 add_label_notes (m
->set_src
, temp
);
1800 i1
= emit_insns_before (temp
, loop_start
);
1801 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1803 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1804 m
->set_src
, REG_NOTES (i1
));
1806 if (loop_dump_stream
)
1807 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1809 /* The more regs we move, the less we like moving them. */
1814 for (count
= m
->consec
; count
>= 0; count
--)
1818 /* If first insn of libcall sequence, skip to end. */
1819 /* Do this at start of loop, since p is guaranteed to
1821 if (GET_CODE (p
) != NOTE
1822 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1825 /* If last insn of libcall sequence, move all
1826 insns except the last before the loop. The last
1827 insn is handled in the normal manner. */
1828 if (GET_CODE (p
) != NOTE
1829 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1833 rtx fn_address_insn
= 0;
1836 for (temp
= XEXP (temp
, 0); temp
!= p
;
1837 temp
= NEXT_INSN (temp
))
1843 if (GET_CODE (temp
) == NOTE
)
1846 body
= PATTERN (temp
);
1848 /* Find the next insn after TEMP,
1849 not counting USE or NOTE insns. */
1850 for (next
= NEXT_INSN (temp
); next
!= p
;
1851 next
= NEXT_INSN (next
))
1852 if (! (GET_CODE (next
) == INSN
1853 && GET_CODE (PATTERN (next
)) == USE
)
1854 && GET_CODE (next
) != NOTE
)
1857 /* If that is the call, this may be the insn
1858 that loads the function address.
1860 Extract the function address from the insn
1861 that loads it into a register.
1862 If this insn was cse'd, we get incorrect code.
1864 So emit a new move insn that copies the
1865 function address into the register that the
1866 call insn will use. flow.c will delete any
1867 redundant stores that we have created. */
1868 if (GET_CODE (next
) == CALL_INSN
1869 && GET_CODE (body
) == SET
1870 && GET_CODE (SET_DEST (body
)) == REG
1871 && (n
= find_reg_note (temp
, REG_EQUAL
,
1874 fn_reg
= SET_SRC (body
);
1875 if (GET_CODE (fn_reg
) != REG
)
1876 fn_reg
= SET_DEST (body
);
1877 fn_address
= XEXP (n
, 0);
1878 fn_address_insn
= temp
;
1880 /* We have the call insn.
1881 If it uses the register we suspect it might,
1882 load it with the correct address directly. */
1883 if (GET_CODE (temp
) == CALL_INSN
1885 && reg_referenced_p (fn_reg
, body
))
1886 emit_insn_after (gen_move_insn (fn_reg
,
1890 if (GET_CODE (temp
) == CALL_INSN
)
1892 i1
= emit_call_insn_before (body
, loop_start
);
1893 /* Because the USAGE information potentially
1894 contains objects other than hard registers
1895 we need to copy it. */
1896 if (CALL_INSN_FUNCTION_USAGE (temp
))
1897 CALL_INSN_FUNCTION_USAGE (i1
)
1898 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1901 i1
= emit_insn_before (body
, loop_start
);
1904 if (temp
== fn_address_insn
)
1905 fn_address_insn
= i1
;
1906 REG_NOTES (i1
) = REG_NOTES (temp
);
1910 if (m
->savemode
!= VOIDmode
)
1912 /* P sets REG to zero; but we should clear only
1913 the bits that are not covered by the mode
1915 rtx reg
= m
->set_dest
;
1921 (GET_MODE (reg
), and_optab
, reg
,
1922 GEN_INT ((((HOST_WIDE_INT
) 1
1923 << GET_MODE_BITSIZE (m
->savemode
)))
1925 reg
, 1, OPTAB_LIB_WIDEN
);
1929 emit_move_insn (reg
, tem
);
1930 sequence
= gen_sequence ();
1932 i1
= emit_insn_before (sequence
, loop_start
);
1934 else if (GET_CODE (p
) == CALL_INSN
)
1936 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1937 /* Because the USAGE information potentially
1938 contains objects other than hard registers
1939 we need to copy it. */
1940 if (CALL_INSN_FUNCTION_USAGE (p
))
1941 CALL_INSN_FUNCTION_USAGE (i1
)
1942 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1945 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1947 REG_NOTES (i1
) = REG_NOTES (p
);
1949 /* If there is a REG_EQUAL note present whose value is
1950 not loop invariant, then delete it, since it may
1951 cause problems with later optimization passes.
1952 It is possible for cse to create such notes
1953 like this as a result of record_jump_cond. */
1955 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1956 && ! invariant_p (XEXP (temp
, 0)))
1957 remove_note (i1
, temp
);
1962 if (loop_dump_stream
)
1963 fprintf (loop_dump_stream
, " moved to %d",
1967 /* This isn't needed because REG_NOTES is copied
1968 below and is wrong since P might be a PARALLEL. */
1969 if (REG_NOTES (i1
) == 0
1970 && ! m
->partial
/* But not if it's a zero-extend clr. */
1971 && ! m
->global
/* and not if used outside the loop
1972 (since it might get set outside). */
1973 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1975 = gen_rtx_EXPR_LIST (REG_EQUAL
,
1976 SET_SRC (PATTERN (p
)),
1980 /* If library call, now fix the REG_NOTES that contain
1981 insn pointers, namely REG_LIBCALL on FIRST
1982 and REG_RETVAL on I1. */
1983 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1985 XEXP (temp
, 0) = first
;
1986 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1987 XEXP (temp
, 0) = i1
;
1991 do p
= NEXT_INSN (p
);
1992 while (p
&& GET_CODE (p
) == NOTE
);
1995 /* The more regs we move, the less we like moving them. */
1999 /* Any other movable that loads the same register
2001 already_moved
[regno
] = 1;
2003 /* This reg has been moved out of one loop. */
2004 moved_once
[regno
] = 1;
2006 /* The reg set here is now invariant. */
2008 n_times_set
[regno
] = 0;
2012 /* Change the length-of-life info for the register
2013 to say it lives at least the full length of this loop.
2014 This will help guide optimizations in outer loops. */
2016 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2017 /* This is the old insn before all the moved insns.
2018 We can't use the moved insn because it is out of range
2019 in uid_luid. Only the old insns have luids. */
2020 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2021 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2022 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2024 /* Combine with this moved insn any other matching movables. */
2027 for (m1
= movables
; m1
; m1
= m1
->next
)
2032 /* Schedule the reg loaded by M1
2033 for replacement so that shares the reg of M.
2034 If the modes differ (only possible in restricted
2035 circumstances, make a SUBREG. */
2036 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2037 reg_map
[m1
->regno
] = m
->set_dest
;
2040 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2043 /* Get rid of the matching insn
2044 and prevent further processing of it. */
2047 /* if library call, delete all insn except last, which
2049 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2052 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2053 temp
= NEXT_INSN (temp
))
2056 delete_insn (m1
->insn
);
2058 /* Any other movable that loads the same register
2060 already_moved
[m1
->regno
] = 1;
2062 /* The reg merged here is now invariant,
2063 if the reg it matches is invariant. */
2065 n_times_set
[m1
->regno
] = 0;
2068 else if (loop_dump_stream
)
2069 fprintf (loop_dump_stream
, "not desirable");
2071 else if (loop_dump_stream
&& !m
->match
)
2072 fprintf (loop_dump_stream
, "not safe");
2074 if (loop_dump_stream
)
2075 fprintf (loop_dump_stream
, "\n");
2079 new_start
= loop_start
;
2081 /* Go through all the instructions in the loop, making
2082 all the register substitutions scheduled in REG_MAP. */
2083 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2084 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2085 || GET_CODE (p
) == CALL_INSN
)
2087 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2088 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2094 /* Scan X and replace the address of any MEM in it with ADDR.
2095 REG is the address that MEM should have before the replacement. */
2098 replace_call_address (x
, reg
, addr
)
2101 register enum rtx_code code
;
2107 code
= GET_CODE (x
);
2121 /* Short cut for very common case. */
2122 replace_call_address (XEXP (x
, 1), reg
, addr
);
2126 /* Short cut for very common case. */
2127 replace_call_address (XEXP (x
, 0), reg
, addr
);
2131 /* If this MEM uses a reg other than the one we expected,
2132 something is wrong. */
2133 if (XEXP (x
, 0) != reg
)
2142 fmt
= GET_RTX_FORMAT (code
);
2143 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2146 replace_call_address (XEXP (x
, i
), reg
, addr
);
2150 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2151 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2157 /* Return the number of memory refs to addresses that vary
2161 count_nonfixed_reads (x
)
2164 register enum rtx_code code
;
2172 code
= GET_CODE (x
);
2186 return ((invariant_p (XEXP (x
, 0)) != 1)
2187 + count_nonfixed_reads (XEXP (x
, 0)));
2194 fmt
= GET_RTX_FORMAT (code
);
2195 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2198 value
+= count_nonfixed_reads (XEXP (x
, i
));
2202 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2203 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2211 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2212 Replace it with an instruction to load just the low bytes
2213 if the machine supports such an instruction,
2214 and insert above LOOP_START an instruction to clear the register. */
2217 constant_high_bytes (p
, loop_start
)
2221 register int insn_code_number
;
2223 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2224 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2226 new = gen_rtx_SET (VOIDmode
,
2227 gen_rtx_STRICT_LOW_PART (VOIDmode
,
2228 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2229 SET_DEST (PATTERN (p
)),
2231 XEXP (SET_SRC (PATTERN (p
)), 0));
2232 insn_code_number
= recog (new, p
);
2234 if (insn_code_number
)
2238 /* Clear destination register before the loop. */
2239 emit_insn_before (gen_rtx_SET (VOIDmode
, SET_DEST (PATTERN (p
)),
2243 /* Inside the loop, just load the low part. */
2249 /* Scan a loop setting the variables `unknown_address_altered',
2250 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2251 and `loop_has_volatile'.
2252 Also, fill in the array `loop_store_mems'. */
2255 prescan_loop (start
, end
)
2258 register int level
= 1;
2261 unknown_address_altered
= 0;
2263 loop_has_volatile
= 0;
2264 loop_store_mems_idx
= 0;
2270 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2271 insn
= NEXT_INSN (insn
))
2273 if (GET_CODE (insn
) == NOTE
)
2275 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2278 /* Count number of loops contained in this one. */
2281 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2290 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2293 loop_continue
= insn
;
2296 else if (GET_CODE (insn
) == CALL_INSN
)
2298 if (! CONST_CALL_P (insn
))
2299 unknown_address_altered
= 1;
2304 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2306 if (volatile_refs_p (PATTERN (insn
)))
2307 loop_has_volatile
= 1;
2309 note_stores (PATTERN (insn
), note_addr_stored
);
2315 /* Scan the function looking for loops. Record the start and end of each loop.
2316 Also mark as invalid loops any loops that contain a setjmp or are branched
2317 to from outside the loop. */
2320 find_and_verify_loops (f
)
2324 int current_loop
= -1;
2328 /* If there are jumps to undefined labels,
2329 treat them as jumps out of any/all loops.
2330 This also avoids writing past end of tables when there are no loops. */
2331 uid_loop_num
[0] = -1;
2333 /* Find boundaries of loops, mark which loops are contained within
2334 loops, and invalidate loops that have setjmp. */
2336 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2338 if (GET_CODE (insn
) == NOTE
)
2339 switch (NOTE_LINE_NUMBER (insn
))
2341 case NOTE_INSN_LOOP_BEG
:
2342 loop_number_loop_starts
[++next_loop
] = insn
;
2343 loop_number_loop_ends
[next_loop
] = 0;
2344 loop_outer_loop
[next_loop
] = current_loop
;
2345 loop_invalid
[next_loop
] = 0;
2346 loop_number_exit_labels
[next_loop
] = 0;
2347 loop_number_exit_count
[next_loop
] = 0;
2348 current_loop
= next_loop
;
2351 case NOTE_INSN_SETJMP
:
2352 /* In this case, we must invalidate our current loop and any
2354 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2356 loop_invalid
[loop
] = 1;
2357 if (loop_dump_stream
)
2358 fprintf (loop_dump_stream
,
2359 "\nLoop at %d ignored due to setjmp.\n",
2360 INSN_UID (loop_number_loop_starts
[loop
]));
2364 case NOTE_INSN_LOOP_END
:
2365 if (current_loop
== -1)
2368 loop_number_loop_ends
[current_loop
] = insn
;
2369 current_loop
= loop_outer_loop
[current_loop
];
2376 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2377 enclosing loop, but this doesn't matter. */
2378 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2381 /* Any loop containing a label used in an initializer must be invalidated,
2382 because it can be jumped into from anywhere. */
2384 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2388 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2390 loop_num
= loop_outer_loop
[loop_num
])
2391 loop_invalid
[loop_num
] = 1;
2394 /* Any loop containing a label used for an exception handler must be
2395 invalidated, because it can be jumped into from anywhere. */
2397 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2401 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2403 loop_num
= loop_outer_loop
[loop_num
])
2404 loop_invalid
[loop_num
] = 1;
2407 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2408 loop that it is not contained within, that loop is marked invalid.
2409 If any INSN or CALL_INSN uses a label's address, then the loop containing
2410 that label is marked invalid, because it could be jumped into from
2413 Also look for blocks of code ending in an unconditional branch that
2414 exits the loop. If such a block is surrounded by a conditional
2415 branch around the block, move the block elsewhere (see below) and
2416 invert the jump to point to the code block. This may eliminate a
2417 label in our loop and will simplify processing by both us and a
2418 possible second cse pass. */
2420 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2421 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2423 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2425 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2427 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2432 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2434 loop_num
= loop_outer_loop
[loop_num
])
2435 loop_invalid
[loop_num
] = 1;
2439 if (GET_CODE (insn
) != JUMP_INSN
)
2442 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2444 /* See if this is an unconditional branch outside the loop. */
2445 if (this_loop_num
!= -1
2446 && (GET_CODE (PATTERN (insn
)) == RETURN
2447 || (simplejump_p (insn
)
2448 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2450 && get_max_uid () < max_uid_for_loop
)
2453 rtx our_next
= next_real_insn (insn
);
2455 int outer_loop
= -1;
2457 /* Go backwards until we reach the start of the loop, a label,
2459 for (p
= PREV_INSN (insn
);
2460 GET_CODE (p
) != CODE_LABEL
2461 && ! (GET_CODE (p
) == NOTE
2462 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2463 && GET_CODE (p
) != JUMP_INSN
;
2467 /* Check for the case where we have a jump to an inner nested
2468 loop, and do not perform the optimization in that case. */
2470 if (JUMP_LABEL (insn
))
2472 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2473 if (dest_loop
!= -1)
2475 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2476 outer_loop
= loop_outer_loop
[outer_loop
])
2477 if (outer_loop
== this_loop_num
)
2482 /* Make sure that the target of P is within the current loop. */
2484 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2485 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2486 outer_loop
= this_loop_num
;
2488 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2489 we have a block of code to try to move.
2491 We look backward and then forward from the target of INSN
2492 to find a BARRIER at the same loop depth as the target.
2493 If we find such a BARRIER, we make a new label for the start
2494 of the block, invert the jump in P and point it to that label,
2495 and move the block of code to the spot we found. */
2497 if (outer_loop
== -1
2498 && GET_CODE (p
) == JUMP_INSN
2499 && JUMP_LABEL (p
) != 0
2500 /* Just ignore jumps to labels that were never emitted.
2501 These always indicate compilation errors. */
2502 && INSN_UID (JUMP_LABEL (p
)) != 0
2504 && ! simplejump_p (p
)
2505 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2508 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2509 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2512 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2513 if (GET_CODE (loc
) == BARRIER
2514 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2518 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2519 if (GET_CODE (loc
) == BARRIER
2520 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2525 rtx cond_label
= JUMP_LABEL (p
);
2526 rtx new_label
= get_label_after (p
);
2528 /* Ensure our label doesn't go away. */
2529 LABEL_NUSES (cond_label
)++;
2531 /* Verify that uid_loop_num is large enough and that
2533 if (invert_jump (p
, new_label
))
2537 /* If no suitable BARRIER was found, create a suitable
2538 one before TARGET. Since TARGET is a fall through
2539 path, we'll need to insert an jump around our block
2540 and a add a BARRIER before TARGET.
2542 This creates an extra unconditional jump outside
2543 the loop. However, the benefits of removing rarely
2544 executed instructions from inside the loop usually
2545 outweighs the cost of the extra unconditional jump
2546 outside the loop. */
2551 temp
= gen_jump (JUMP_LABEL (insn
));
2552 temp
= emit_jump_insn_before (temp
, target
);
2553 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2554 LABEL_NUSES (JUMP_LABEL (insn
))++;
2555 loc
= emit_barrier_before (target
);
2558 /* Include the BARRIER after INSN and copy the
2560 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2561 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2563 /* All those insns are now in TARGET_LOOP_NUM. */
2564 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2566 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2568 /* The label jumped to by INSN is no longer a loop exit.
2569 Unless INSN does not have a label (e.g., it is a
2570 RETURN insn), search loop_number_exit_labels to find
2571 its label_ref, and remove it. Also turn off
2572 LABEL_OUTSIDE_LOOP_P bit. */
2573 if (JUMP_LABEL (insn
))
2578 r
= loop_number_exit_labels
[this_loop_num
];
2579 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2580 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2582 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2584 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2586 loop_number_exit_labels
[this_loop_num
]
2587 = LABEL_NEXTREF (r
);
2591 for (loop_num
= this_loop_num
;
2592 loop_num
!= -1 && loop_num
!= target_loop_num
;
2593 loop_num
= loop_outer_loop
[loop_num
])
2594 loop_number_exit_count
[loop_num
]--;
2596 /* If we didn't find it, then something is wrong. */
2601 /* P is now a jump outside the loop, so it must be put
2602 in loop_number_exit_labels, and marked as such.
2603 The easiest way to do this is to just call
2604 mark_loop_jump again for P. */
2605 mark_loop_jump (PATTERN (p
), this_loop_num
);
2607 /* If INSN now jumps to the insn after it,
2609 if (JUMP_LABEL (insn
) != 0
2610 && (next_real_insn (JUMP_LABEL (insn
))
2611 == next_real_insn (insn
)))
2615 /* Continue the loop after where the conditional
2616 branch used to jump, since the only branch insn
2617 in the block (if it still remains) is an inter-loop
2618 branch and hence needs no processing. */
2619 insn
= NEXT_INSN (cond_label
);
2621 if (--LABEL_NUSES (cond_label
) == 0)
2622 delete_insn (cond_label
);
2624 /* This loop will be continued with NEXT_INSN (insn). */
2625 insn
= PREV_INSN (insn
);
2632 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2633 loops it is contained in, mark the target loop invalid.
2635 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2638 mark_loop_jump (x
, loop_num
)
2646 switch (GET_CODE (x
))
2659 /* There could be a label reference in here. */
2660 mark_loop_jump (XEXP (x
, 0), loop_num
);
2666 mark_loop_jump (XEXP (x
, 0), loop_num
);
2667 mark_loop_jump (XEXP (x
, 1), loop_num
);
2672 mark_loop_jump (XEXP (x
, 0), loop_num
);
2676 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2678 /* Link together all labels that branch outside the loop. This
2679 is used by final_[bg]iv_value and the loop unrolling code. Also
2680 mark this LABEL_REF so we know that this branch should predict
2683 /* A check to make sure the label is not in an inner nested loop,
2684 since this does not count as a loop exit. */
2685 if (dest_loop
!= -1)
2687 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2688 outer_loop
= loop_outer_loop
[outer_loop
])
2689 if (outer_loop
== loop_num
)
2695 if (loop_num
!= -1 && outer_loop
== -1)
2697 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2698 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2699 loop_number_exit_labels
[loop_num
] = x
;
2701 for (outer_loop
= loop_num
;
2702 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2703 outer_loop
= loop_outer_loop
[outer_loop
])
2704 loop_number_exit_count
[outer_loop
]++;
2707 /* If this is inside a loop, but not in the current loop or one enclosed
2708 by it, it invalidates at least one loop. */
2710 if (dest_loop
== -1)
2713 /* We must invalidate every nested loop containing the target of this
2714 label, except those that also contain the jump insn. */
2716 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2718 /* Stop when we reach a loop that also contains the jump insn. */
2719 for (outer_loop
= loop_num
; outer_loop
!= -1;
2720 outer_loop
= loop_outer_loop
[outer_loop
])
2721 if (dest_loop
== outer_loop
)
2724 /* If we get here, we know we need to invalidate a loop. */
2725 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2726 fprintf (loop_dump_stream
,
2727 "\nLoop at %d ignored due to multiple entry points.\n",
2728 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2730 loop_invalid
[dest_loop
] = 1;
2735 /* If this is not setting pc, ignore. */
2736 if (SET_DEST (x
) == pc_rtx
)
2737 mark_loop_jump (SET_SRC (x
), loop_num
);
2741 mark_loop_jump (XEXP (x
, 1), loop_num
);
2742 mark_loop_jump (XEXP (x
, 2), loop_num
);
2747 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2748 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2752 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2753 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2757 /* Treat anything else (such as a symbol_ref)
2758 as a branch out of this loop, but not into any loop. */
2763 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2764 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2767 loop_number_exit_labels
[loop_num
] = x
;
2769 for (outer_loop
= loop_num
; outer_loop
!= -1;
2770 outer_loop
= loop_outer_loop
[outer_loop
])
2771 loop_number_exit_count
[outer_loop
]++;
2777 /* Return nonzero if there is a label in the range from
2778 insn INSN to and including the insn whose luid is END
2779 INSN must have an assigned luid (i.e., it must not have
2780 been previously created by loop.c). */
2783 labels_in_range_p (insn
, end
)
2787 while (insn
&& INSN_LUID (insn
) <= end
)
2789 if (GET_CODE (insn
) == CODE_LABEL
)
2791 insn
= NEXT_INSN (insn
);
2797 /* Record that a memory reference X is being set. */
2800 note_addr_stored (x
)
2805 if (x
== 0 || GET_CODE (x
) != MEM
)
2808 /* Count number of memory writes.
2809 This affects heuristics in strength_reduce. */
2812 /* BLKmode MEM means all memory is clobbered. */
2813 if (GET_MODE (x
) == BLKmode
)
2814 unknown_address_altered
= 1;
2816 if (unknown_address_altered
)
2819 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2820 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2821 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2823 /* We are storing at the same address as previously noted. Save the
2825 if (GET_MODE_SIZE (GET_MODE (x
))
2826 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2827 loop_store_mems
[i
] = x
;
2831 if (i
== NUM_STORES
)
2832 unknown_address_altered
= 1;
2834 else if (i
== loop_store_mems_idx
)
2835 loop_store_mems
[loop_store_mems_idx
++] = x
;
2838 /* Return nonzero if the rtx X is invariant over the current loop.
2840 The value is 2 if we refer to something only conditionally invariant.
2842 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2843 Otherwise, a memory ref is invariant if it does not conflict with
2844 anything stored in `loop_store_mems'. */
2851 register enum rtx_code code
;
2853 int conditional
= 0;
2857 code
= GET_CODE (x
);
2867 /* A LABEL_REF is normally invariant, however, if we are unrolling
2868 loops, and this label is inside the loop, then it isn't invariant.
2869 This is because each unrolled copy of the loop body will have
2870 a copy of this label. If this was invariant, then an insn loading
2871 the address of this label into a register might get moved outside
2872 the loop, and then each loop body would end up using the same label.
2874 We don't know the loop bounds here though, so just fail for all
2876 if (flag_unroll_loops
)
2883 case UNSPEC_VOLATILE
:
2887 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2888 since the reg might be set by initialization within the loop. */
2890 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2891 || x
== arg_pointer_rtx
)
2892 && ! current_function_has_nonlocal_goto
)
2896 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2899 if (n_times_set
[REGNO (x
)] < 0)
2902 return n_times_set
[REGNO (x
)] == 0;
2905 /* Volatile memory references must be rejected. Do this before
2906 checking for read-only items, so that volatile read-only items
2907 will be rejected also. */
2908 if (MEM_VOLATILE_P (x
))
2911 /* Read-only items (such as constants in a constant pool) are
2912 invariant if their address is. */
2913 if (RTX_UNCHANGING_P (x
))
2916 /* If we filled the table (or had a subroutine call), any location
2917 in memory could have been clobbered. */
2918 if (unknown_address_altered
)
2921 /* See if there is any dependence between a store and this load. */
2922 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2923 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2926 /* It's not invalidated by a store in memory
2927 but we must still verify the address is invariant. */
2931 /* Don't mess with insns declared volatile. */
2932 if (MEM_VOLATILE_P (x
))
2940 fmt
= GET_RTX_FORMAT (code
);
2941 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2945 int tem
= invariant_p (XEXP (x
, i
));
2951 else if (fmt
[i
] == 'E')
2954 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2956 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2966 return 1 + conditional
;
2970 /* Return nonzero if all the insns in the loop that set REG
2971 are INSN and the immediately following insns,
2972 and if each of those insns sets REG in an invariant way
2973 (not counting uses of REG in them).
2975 The value is 2 if some of these insns are only conditionally invariant.
2977 We assume that INSN itself is the first set of REG
2978 and that its source is invariant. */
2981 consec_sets_invariant_p (reg
, n_sets
, insn
)
2985 register rtx p
= insn
;
2986 register int regno
= REGNO (reg
);
2988 /* Number of sets we have to insist on finding after INSN. */
2989 int count
= n_sets
- 1;
2990 int old
= n_times_set
[regno
];
2994 /* If N_SETS hit the limit, we can't rely on its value. */
2998 n_times_set
[regno
] = 0;
3002 register enum rtx_code code
;
3006 code
= GET_CODE (p
);
3008 /* If library call, skip to end of of it. */
3009 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3014 && (set
= single_set (p
))
3015 && GET_CODE (SET_DEST (set
)) == REG
3016 && REGNO (SET_DEST (set
)) == regno
)
3018 this = invariant_p (SET_SRC (set
));
3021 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3023 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3024 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3026 this = (CONSTANT_P (XEXP (temp
, 0))
3027 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3028 && invariant_p (XEXP (temp
, 0))));
3035 else if (code
!= NOTE
)
3037 n_times_set
[regno
] = old
;
3042 n_times_set
[regno
] = old
;
3043 /* If invariant_p ever returned 2, we return 2. */
3044 return 1 + (value
& 2);
3048 /* I don't think this condition is sufficient to allow INSN
3049 to be moved, so we no longer test it. */
3051 /* Return 1 if all insns in the basic block of INSN and following INSN
3052 that set REG are invariant according to TABLE. */
3055 all_sets_invariant_p (reg
, insn
, table
)
3059 register rtx p
= insn
;
3060 register int regno
= REGNO (reg
);
3064 register enum rtx_code code
;
3066 code
= GET_CODE (p
);
3067 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3069 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3070 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3071 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3073 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3080 /* Look at all uses (not sets) of registers in X. For each, if it is
3081 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3082 a different insn, set USAGE[REGNO] to const0_rtx. */
3085 find_single_use_in_loop (insn
, x
, usage
)
3090 enum rtx_code code
= GET_CODE (x
);
3091 char *fmt
= GET_RTX_FORMAT (code
);
3096 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3097 ? const0_rtx
: insn
;
3099 else if (code
== SET
)
3101 /* Don't count SET_DEST if it is a REG; otherwise count things
3102 in SET_DEST because if a register is partially modified, it won't
3103 show up as a potential movable so we don't care how USAGE is set
3105 if (GET_CODE (SET_DEST (x
)) != REG
)
3106 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3107 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3110 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3112 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3113 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3114 else if (fmt
[i
] == 'E')
3115 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3116 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3120 /* Increment N_TIMES_SET at the index of each register
3121 that is modified by an insn between FROM and TO.
3122 If the value of an element of N_TIMES_SET becomes 127 or more,
3123 stop incrementing it, to avoid overflow.
3125 Store in SINGLE_USAGE[I] the single insn in which register I is
3126 used, if it is only used once. Otherwise, it is set to 0 (for no
3127 uses) or const0_rtx for more than one use. This parameter may be zero,
3128 in which case this processing is not done.
3130 Store in *COUNT_PTR the number of actual instruction
3131 in the loop. We use this to decide what is worth moving out. */
3133 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3134 In that case, it is the insn that last set reg n. */
3137 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3138 register rtx from
, to
;
3144 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3146 register int count
= 0;
3149 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3150 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3152 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3156 /* If requested, record registers that have exactly one use. */
3159 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3161 /* Include uses in REG_EQUAL notes. */
3162 if (REG_NOTES (insn
))
3163 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3166 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3167 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3168 /* Don't move a reg that has an explicit clobber.
3169 We might do so sometimes, but it's not worth the pain. */
3170 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3172 if (GET_CODE (PATTERN (insn
)) == SET
3173 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3175 dest
= SET_DEST (PATTERN (insn
));
3176 while (GET_CODE (dest
) == SUBREG
3177 || GET_CODE (dest
) == ZERO_EXTRACT
3178 || GET_CODE (dest
) == SIGN_EXTRACT
3179 || GET_CODE (dest
) == STRICT_LOW_PART
)
3180 dest
= XEXP (dest
, 0);
3181 if (GET_CODE (dest
) == REG
)
3183 register int regno
= REGNO (dest
);
3184 /* If this is the first setting of this reg
3185 in current basic block, and it was set before,
3186 it must be set in two basic blocks, so it cannot
3187 be moved out of the loop. */
3188 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3189 may_not_move
[regno
] = 1;
3190 /* If this is not first setting in current basic block,
3191 see if reg was used in between previous one and this.
3192 If so, neither one can be moved. */
3193 if (last_set
[regno
] != 0
3194 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3195 may_not_move
[regno
] = 1;
3196 if (n_times_set
[regno
] < 127)
3197 ++n_times_set
[regno
];
3198 last_set
[regno
] = insn
;
3201 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3204 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3206 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3207 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3208 /* Don't move a reg that has an explicit clobber.
3209 It's not worth the pain to try to do it correctly. */
3210 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3212 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3214 dest
= SET_DEST (x
);
3215 while (GET_CODE (dest
) == SUBREG
3216 || GET_CODE (dest
) == ZERO_EXTRACT
3217 || GET_CODE (dest
) == SIGN_EXTRACT
3218 || GET_CODE (dest
) == STRICT_LOW_PART
)
3219 dest
= XEXP (dest
, 0);
3220 if (GET_CODE (dest
) == REG
)
3222 register int regno
= REGNO (dest
);
3223 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3224 may_not_move
[regno
] = 1;
3225 if (last_set
[regno
] != 0
3226 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3227 may_not_move
[regno
] = 1;
3228 if (n_times_set
[regno
] < 127)
3229 ++n_times_set
[regno
];
3230 last_set
[regno
] = insn
;
3237 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3238 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3243 /* Given a loop that is bounded by LOOP_START and LOOP_END
3244 and that is entered at SCAN_START,
3245 return 1 if the register set in SET contained in insn INSN is used by
3246 any insn that precedes INSN in cyclic order starting
3247 from the loop entry point.
3249 We don't want to use INSN_LUID here because if we restrict INSN to those
3250 that have a valid INSN_LUID, it means we cannot move an invariant out
3251 from an inner loop past two loops. */
3254 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3255 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3257 rtx reg
= SET_DEST (set
);
3260 /* Scan forward checking for register usage. If we hit INSN, we
3261 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3262 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3264 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3265 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3275 /* A "basic induction variable" or biv is a pseudo reg that is set
3276 (within this loop) only by incrementing or decrementing it. */
3277 /* A "general induction variable" or giv is a pseudo reg whose
3278 value is a linear function of a biv. */
3280 /* Bivs are recognized by `basic_induction_var';
3281 Givs by `general_induct_var'. */
3283 /* Indexed by register number, indicates whether or not register is an
3284 induction variable, and if so what type. */
3286 enum iv_mode
*reg_iv_type
;
3288 /* Indexed by register number, contains pointer to `struct induction'
3289 if register is an induction variable. This holds general info for
3290 all induction variables. */
3292 struct induction
**reg_iv_info
;
3294 /* Indexed by register number, contains pointer to `struct iv_class'
3295 if register is a basic induction variable. This holds info describing
3296 the class (a related group) of induction variables that the biv belongs
3299 struct iv_class
**reg_biv_class
;
3301 /* The head of a list which links together (via the next field)
3302 every iv class for the current loop. */
3304 struct iv_class
*loop_iv_list
;
3306 /* Communication with routines called via `note_stores'. */
3308 static rtx note_insn
;
3310 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3312 static rtx addr_placeholder
;
3314 /* ??? Unfinished optimizations, and possible future optimizations,
3315 for the strength reduction code. */
3317 /* ??? There is one more optimization you might be interested in doing: to
3318 allocate pseudo registers for frequently-accessed memory locations.
3319 If the same memory location is referenced each time around, it might
3320 be possible to copy it into a register before and out after.
3321 This is especially useful when the memory location is a variable which
3322 is in a stack slot because somewhere its address is taken. If the
3323 loop doesn't contain a function call and the variable isn't volatile,
3324 it is safe to keep the value in a register for the duration of the
3325 loop. One tricky thing is that the copying of the value back from the
3326 register has to be done on all exits from the loop. You need to check that
3327 all the exits from the loop go to the same place. */
3329 /* ??? The interaction of biv elimination, and recognition of 'constant'
3330 bivs, may cause problems. */
3332 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3333 performance problems.
3335 Perhaps don't eliminate things that can be combined with an addressing
3336 mode. Find all givs that have the same biv, mult_val, and add_val;
3337 then for each giv, check to see if its only use dies in a following
3338 memory address. If so, generate a new memory address and check to see
3339 if it is valid. If it is valid, then store the modified memory address,
3340 otherwise, mark the giv as not done so that it will get its own iv. */
3342 /* ??? Could try to optimize branches when it is known that a biv is always
3345 /* ??? When replace a biv in a compare insn, we should replace with closest
3346 giv so that an optimized branch can still be recognized by the combiner,
3347 e.g. the VAX acb insn. */
3349 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3350 was rerun in loop_optimize whenever a register was added or moved.
3351 Also, some of the optimizations could be a little less conservative. */
3353 /* Perform strength reduction and induction variable elimination. */
3355 /* Pseudo registers created during this function will be beyond the last
3356 valid index in several tables including n_times_set and regno_last_uid.
3357 This does not cause a problem here, because the added registers cannot be
3358 givs outside of their loop, and hence will never be reconsidered.
3359 But scan_loop must check regnos to make sure they are in bounds. */
3362 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3363 loop_start
, loop_end
, unroll_p
)
3377 /* This is 1 if current insn is not executed at least once for every loop
3379 int not_every_iteration
= 0;
3380 /* This is 1 if current insn may be executed more than once for every
3382 int maybe_multiple
= 0;
3383 /* Temporary list pointers for traversing loop_iv_list. */
3384 struct iv_class
*bl
, **backbl
;
3385 /* Ratio of extra register life span we can justify
3386 for saving an instruction. More if loop doesn't call subroutines
3387 since in that case saving an insn makes more difference
3388 and more registers are available. */
3389 /* ??? could set this to last value of threshold in move_movables */
3390 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3391 /* Map of pseudo-register replacements. */
3395 rtx end_insert_before
;
3398 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3399 * sizeof (enum iv_mode
*));
3400 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3401 reg_iv_info
= (struct induction
**)
3402 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3403 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3404 * sizeof (struct induction
*)));
3405 reg_biv_class
= (struct iv_class
**)
3406 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3407 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3408 * sizeof (struct iv_class
*)));
3411 addr_placeholder
= gen_reg_rtx (Pmode
);
3413 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3414 must be put before this insn, so that they will appear in the right
3415 order (i.e. loop order).
3417 If loop_end is the end of the current function, then emit a
3418 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3420 if (NEXT_INSN (loop_end
) != 0)
3421 end_insert_before
= NEXT_INSN (loop_end
);
3423 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3425 /* Scan through loop to find all possible bivs. */
3431 /* At end of a straight-in loop, we are done.
3432 At end of a loop entered at the bottom, scan the top. */
3433 if (p
== scan_start
)
3441 if (p
== scan_start
)
3445 if (GET_CODE (p
) == INSN
3446 && (set
= single_set (p
))
3447 && GET_CODE (SET_DEST (set
)) == REG
)
3449 dest_reg
= SET_DEST (set
);
3450 if (REGNO (dest_reg
) < max_reg_before_loop
3451 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3452 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3454 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3455 dest_reg
, p
, &inc_val
, &mult_val
))
3457 /* It is a possible basic induction variable.
3458 Create and initialize an induction structure for it. */
3461 = (struct induction
*) alloca (sizeof (struct induction
));
3463 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3464 not_every_iteration
, maybe_multiple
);
3465 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3467 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3468 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3472 /* Past CODE_LABEL, we get to insns that may be executed multiple
3473 times. The only way we can be sure that they can't is if every
3474 every jump insn between here and the end of the loop either
3475 returns, exits the loop, is a forward jump, or is a jump
3476 to the loop start. */
3478 if (GET_CODE (p
) == CODE_LABEL
)
3486 insn
= NEXT_INSN (insn
);
3487 if (insn
== scan_start
)
3495 if (insn
== scan_start
)
3499 if (GET_CODE (insn
) == JUMP_INSN
3500 && GET_CODE (PATTERN (insn
)) != RETURN
3501 && (! condjump_p (insn
)
3502 || (JUMP_LABEL (insn
) != 0
3503 && JUMP_LABEL (insn
) != scan_start
3504 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3505 || INSN_UID (insn
) >= max_uid_for_loop
3506 || (INSN_LUID (JUMP_LABEL (insn
))
3507 < INSN_LUID (insn
))))))
3515 /* Past a jump, we get to insns for which we can't count
3516 on whether they will be executed during each iteration. */
3517 /* This code appears twice in strength_reduce. There is also similar
3518 code in scan_loop. */
3519 if (GET_CODE (p
) == JUMP_INSN
3520 /* If we enter the loop in the middle, and scan around to the
3521 beginning, don't set not_every_iteration for that.
3522 This can be any kind of jump, since we want to know if insns
3523 will be executed if the loop is executed. */
3524 && ! (JUMP_LABEL (p
) == loop_top
3525 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3526 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3530 /* If this is a jump outside the loop, then it also doesn't
3531 matter. Check to see if the target of this branch is on the
3532 loop_number_exits_labels list. */
3534 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3536 label
= LABEL_NEXTREF (label
))
3537 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3541 not_every_iteration
= 1;
3544 else if (GET_CODE (p
) == NOTE
)
3546 /* At the virtual top of a converted loop, insns are again known to
3547 be executed each iteration: logically, the loop begins here
3548 even though the exit code has been duplicated. */
3549 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3550 not_every_iteration
= 0;
3551 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3553 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3557 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3558 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3559 or not an insn is known to be executed each iteration of the
3560 loop, whether or not any iterations are known to occur.
3562 Therefore, if we have just passed a label and have no more labels
3563 between here and the test insn of the loop, we know these insns
3564 will be executed each iteration. */
3566 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3567 && no_labels_between_p (p
, loop_end
))
3568 not_every_iteration
= 0;
3571 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3572 Make a sanity check against n_times_set. */
3573 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3575 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3576 /* Above happens if register modified by subreg, etc. */
3577 /* Make sure it is not recognized as a basic induction var: */
3578 || n_times_set
[bl
->regno
] != bl
->biv_count
3579 /* If never incremented, it is invariant that we decided not to
3580 move. So leave it alone. */
3581 || ! bl
->incremented
)
3583 if (loop_dump_stream
)
3584 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3586 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3587 ? "not induction variable"
3588 : (! bl
->incremented
? "never incremented"
3591 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3598 if (loop_dump_stream
)
3599 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3603 /* Exit if there are no bivs. */
3606 /* Can still unroll the loop anyways, but indicate that there is no
3607 strength reduction info available. */
3609 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3614 /* Find initial value for each biv by searching backwards from loop_start,
3615 halting at first label. Also record any test condition. */
3618 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3622 if (GET_CODE (p
) == CALL_INSN
)
3625 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3626 || GET_CODE (p
) == CALL_INSN
)
3627 note_stores (PATTERN (p
), record_initial
);
3629 /* Record any test of a biv that branches around the loop if no store
3630 between it and the start of loop. We only care about tests with
3631 constants and registers and only certain of those. */
3632 if (GET_CODE (p
) == JUMP_INSN
3633 && JUMP_LABEL (p
) != 0
3634 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3635 && (test
= get_condition_for_loop (p
)) != 0
3636 && GET_CODE (XEXP (test
, 0)) == REG
3637 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3638 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3639 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3640 && bl
->init_insn
== 0)
3642 /* If an NE test, we have an initial value! */
3643 if (GET_CODE (test
) == NE
)
3646 bl
->init_set
= gen_rtx_SET (VOIDmode
,
3647 XEXP (test
, 0), XEXP (test
, 1));
3650 bl
->initial_test
= test
;
3654 /* Look at the each biv and see if we can say anything better about its
3655 initial value from any initializing insns set up above. (This is done
3656 in two passes to avoid missing SETs in a PARALLEL.) */
3657 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3662 if (! bl
->init_insn
)
3665 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3666 is a constant, use the value of that. */
3667 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
3668 && CONSTANT_P (XEXP (note
, 0)))
3669 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
3670 && CONSTANT_P (XEXP (note
, 0))))
3671 src
= XEXP (note
, 0);
3673 src
= SET_SRC (bl
->init_set
);
3675 if (loop_dump_stream
)
3676 fprintf (loop_dump_stream
,
3677 "Biv %d initialized at insn %d: initial value ",
3678 bl
->regno
, INSN_UID (bl
->init_insn
));
3680 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3681 || GET_MODE (src
) == VOIDmode
)
3682 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3684 bl
->initial_value
= src
;
3686 if (loop_dump_stream
)
3688 if (GET_CODE (src
) == CONST_INT
)
3690 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (src
));
3691 fputc ('\n', loop_dump_stream
);
3695 print_rtl (loop_dump_stream
, src
);
3696 fprintf (loop_dump_stream
, "\n");
3702 /* Biv initial value is not simple move,
3703 so let it keep initial value of "itself". */
3705 if (loop_dump_stream
)
3706 fprintf (loop_dump_stream
, "is complex\n");
3710 /* Search the loop for general induction variables. */
3712 /* A register is a giv if: it is only set once, it is a function of a
3713 biv and a constant (or invariant), and it is not a biv. */
3715 not_every_iteration
= 0;
3721 /* At end of a straight-in loop, we are done.
3722 At end of a loop entered at the bottom, scan the top. */
3723 if (p
== scan_start
)
3731 if (p
== scan_start
)
3735 /* Look for a general induction variable in a register. */
3736 if (GET_CODE (p
) == INSN
3737 && (set
= single_set (p
))
3738 && GET_CODE (SET_DEST (set
)) == REG
3739 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3747 dest_reg
= SET_DEST (set
);
3748 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3751 if (/* SET_SRC is a giv. */
3752 ((benefit
= general_induction_var (SET_SRC (set
),
3755 /* Equivalent expression is a giv. */
3756 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3757 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3759 &add_val
, &mult_val
))))
3760 /* Don't try to handle any regs made by loop optimization.
3761 We have nothing on them in regno_first_uid, etc. */
3762 && REGNO (dest_reg
) < max_reg_before_loop
3763 /* Don't recognize a BASIC_INDUCT_VAR here. */
3764 && dest_reg
!= src_reg
3765 /* This must be the only place where the register is set. */
3766 && (n_times_set
[REGNO (dest_reg
)] == 1
3767 /* or all sets must be consecutive and make a giv. */
3768 || (benefit
= consec_sets_giv (benefit
, p
,
3770 &add_val
, &mult_val
))))
3774 = (struct induction
*) alloca (sizeof (struct induction
));
3777 /* If this is a library call, increase benefit. */
3778 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3779 benefit
+= libcall_benefit (p
);
3781 /* Skip the consecutive insns, if there are any. */
3782 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3785 /* If first insn of libcall sequence, skip to end.
3786 Do this at start of loop, since INSN is guaranteed to
3788 if (GET_CODE (p
) != NOTE
3789 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3792 do p
= NEXT_INSN (p
);
3793 while (GET_CODE (p
) == NOTE
);
3796 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3797 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3803 #ifndef DONT_REDUCE_ADDR
3804 /* Look for givs which are memory addresses. */
3805 /* This resulted in worse code on a VAX 8600. I wonder if it
3807 if (GET_CODE (p
) == INSN
)
3808 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3812 /* Update the status of whether giv can derive other givs. This can
3813 change when we pass a label or an insn that updates a biv. */
3814 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3815 || GET_CODE (p
) == CODE_LABEL
)
3816 update_giv_derive (p
);
3818 /* Past a jump, we get to insns for which we can't count
3819 on whether they will be executed during each iteration. */
3820 /* This code appears twice in strength_reduce. There is also similar
3821 code in scan_loop. */
3822 if (GET_CODE (p
) == JUMP_INSN
3823 /* If we enter the loop in the middle, and scan around to the
3824 beginning, don't set not_every_iteration for that.
3825 This can be any kind of jump, since we want to know if insns
3826 will be executed if the loop is executed. */
3827 && ! (JUMP_LABEL (p
) == loop_top
3828 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3829 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3833 /* If this is a jump outside the loop, then it also doesn't
3834 matter. Check to see if the target of this branch is on the
3835 loop_number_exits_labels list. */
3837 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3839 label
= LABEL_NEXTREF (label
))
3840 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3844 not_every_iteration
= 1;
3847 else if (GET_CODE (p
) == NOTE
)
3849 /* At the virtual top of a converted loop, insns are again known to
3850 be executed each iteration: logically, the loop begins here
3851 even though the exit code has been duplicated. */
3852 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3853 not_every_iteration
= 0;
3854 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3856 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3860 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3861 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3862 or not an insn is known to be executed each iteration of the
3863 loop, whether or not any iterations are known to occur.
3865 Therefore, if we have just passed a label and have no more labels
3866 between here and the test insn of the loop, we know these insns
3867 will be executed each iteration. */
3869 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3870 && no_labels_between_p (p
, loop_end
))
3871 not_every_iteration
= 0;
3874 /* Try to calculate and save the number of loop iterations. This is
3875 set to zero if the actual number can not be calculated. This must
3876 be called after all giv's have been identified, since otherwise it may
3877 fail if the iteration variable is a giv. */
3879 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3881 /* Now for each giv for which we still don't know whether or not it is
3882 replaceable, check to see if it is replaceable because its final value
3883 can be calculated. This must be done after loop_iterations is called,
3884 so that final_giv_value will work correctly. */
3886 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3888 struct induction
*v
;
3890 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3891 if (! v
->replaceable
&& ! v
->not_replaceable
)
3892 check_final_value (v
, loop_start
, loop_end
);
3895 /* Try to prove that the loop counter variable (if any) is always
3896 nonnegative; if so, record that fact with a REG_NONNEG note
3897 so that "decrement and branch until zero" insn can be used. */
3898 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3901 /* record loop-variables relevant for BCT optimization before unrolling
3902 the loop. Unrolling may update part of this information, and the
3903 correct data will be used for generating the BCT. */
3904 #ifdef HAVE_decrement_and_branch_on_count
3905 if (HAVE_decrement_and_branch_on_count
)
3906 analyze_loop_iterations (loop_start
, loop_end
);
3910 /* Create reg_map to hold substitutions for replaceable giv regs. */
3911 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3912 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3914 /* Examine each iv class for feasibility of strength reduction/induction
3915 variable elimination. */
3917 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3919 struct induction
*v
;
3922 rtx final_value
= 0;
3924 /* Test whether it will be possible to eliminate this biv
3925 provided all givs are reduced. This is possible if either
3926 the reg is not used outside the loop, or we can compute
3927 what its final value will be.
3929 For architectures with a decrement_and_branch_until_zero insn,
3930 don't do this if we put a REG_NONNEG note on the endtest for
3933 /* Compare against bl->init_insn rather than loop_start.
3934 We aren't concerned with any uses of the biv between
3935 init_insn and loop_start since these won't be affected
3936 by the value of the biv elsewhere in the function, so
3937 long as init_insn doesn't use the biv itself.
3938 March 14, 1989 -- self@bayes.arc.nasa.gov */
3940 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3942 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3943 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3944 #ifdef HAVE_decrement_and_branch_until_zero
3947 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3948 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3949 #ifdef HAVE_decrement_and_branch_until_zero
3953 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3954 threshold
, insn_count
);
3957 if (loop_dump_stream
)
3959 fprintf (loop_dump_stream
,
3960 "Cannot eliminate biv %d.\n",
3962 fprintf (loop_dump_stream
,
3963 "First use: insn %d, last use: insn %d.\n",
3964 REGNO_FIRST_UID (bl
->regno
),
3965 REGNO_LAST_UID (bl
->regno
));
3969 /* Combine all giv's for this iv_class. */
3972 /* This will be true at the end, if all givs which depend on this
3973 biv have been strength reduced.
3974 We can't (currently) eliminate the biv unless this is so. */
3977 /* Check each giv in this class to see if we will benefit by reducing
3978 it. Skip giv's combined with others. */
3979 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3981 struct induction
*tv
;
3983 if (v
->ignore
|| v
->same
)
3986 benefit
= v
->benefit
;
3988 /* Reduce benefit if not replaceable, since we will insert
3989 a move-insn to replace the insn that calculates this giv.
3990 Don't do this unless the giv is a user variable, since it
3991 will often be marked non-replaceable because of the duplication
3992 of the exit code outside the loop. In such a case, the copies
3993 we insert are dead and will be deleted. So they don't have
3994 a cost. Similar situations exist. */
3995 /* ??? The new final_[bg]iv_value code does a much better job
3996 of finding replaceable giv's, and hence this code may no longer
3998 if (! v
->replaceable
&& ! bl
->eliminable
3999 && REG_USERVAR_P (v
->dest_reg
))
4000 benefit
-= copy_cost
;
4002 /* Decrease the benefit to count the add-insns that we will
4003 insert to increment the reduced reg for the giv. */
4004 benefit
-= add_cost
* bl
->biv_count
;
4006 /* Decide whether to strength-reduce this giv or to leave the code
4007 unchanged (recompute it from the biv each time it is used).
4008 This decision can be made independently for each giv. */
4011 /* Attempt to guess whether autoincrement will handle some of the
4012 new add insns; if so, increase BENEFIT (undo the subtraction of
4013 add_cost that was done above). */
4014 if (v
->giv_type
== DEST_ADDR
4015 && GET_CODE (v
->mult_val
) == CONST_INT
)
4017 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
4018 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4019 benefit
+= add_cost
* bl
->biv_count
;
4021 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
4022 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4023 benefit
+= add_cost
* bl
->biv_count
;
4028 /* If an insn is not to be strength reduced, then set its ignore
4029 flag, and clear all_reduced. */
4031 /* A giv that depends on a reversed biv must be reduced if it is
4032 used after the loop exit, otherwise, it would have the wrong
4033 value after the loop exit. To make it simple, just reduce all
4034 of such giv's whether or not we know they are used after the loop
4037 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4040 if (loop_dump_stream
)
4041 fprintf (loop_dump_stream
,
4042 "giv of insn %d not worth while, %d vs %d.\n",
4044 v
->lifetime
* threshold
* benefit
, insn_count
);
4050 /* Check that we can increment the reduced giv without a
4051 multiply insn. If not, reject it. */
4053 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4054 if (tv
->mult_val
== const1_rtx
4055 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4057 if (loop_dump_stream
)
4058 fprintf (loop_dump_stream
,
4059 "giv of insn %d: would need a multiply.\n",
4060 INSN_UID (v
->insn
));
4068 /* Reduce each giv that we decided to reduce. */
4070 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4072 struct induction
*tv
;
4073 if (! v
->ignore
&& v
->same
== 0)
4075 int auto_inc_opt
= 0;
4077 v
->new_reg
= gen_reg_rtx (v
->mode
);
4080 /* If the target has auto-increment addressing modes, and
4081 this is an address giv, then try to put the increment
4082 immediately after its use, so that flow can create an
4083 auto-increment addressing mode. */
4084 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4085 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4086 /* We don't handle reversed biv's because bl->biv->insn
4087 does not have a valid INSN_LUID. */
4089 && v
->always_executed
&& ! v
->maybe_multiple
)
4091 /* If other giv's have been combined with this one, then
4092 this will work only if all uses of the other giv's occur
4093 before this giv's insn. This is difficult to check.
4095 We simplify this by looking for the common case where
4096 there is one DEST_REG giv, and this giv's insn is the
4097 last use of the dest_reg of that DEST_REG giv. If the
4098 the increment occurs after the address giv, then we can
4099 perform the optimization. (Otherwise, the increment
4100 would have to go before other_giv, and we would not be
4101 able to combine it with the address giv to get an
4102 auto-inc address.) */
4103 if (v
->combined_with
)
4105 struct induction
*other_giv
= 0;
4107 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4115 if (! tv
&& other_giv
4116 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4117 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4118 == INSN_UID (v
->insn
))
4119 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4122 /* Check for case where increment is before the the address
4123 giv. Do this test in "loop order". */
4124 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4125 && (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4126 || (INSN_LUID (bl
->biv
->insn
)
4127 > INSN_LUID (scan_start
))))
4128 || (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4129 && (INSN_LUID (scan_start
)
4130 < INSN_LUID (bl
->biv
->insn
))))
4139 /* We can't put an insn immediately after one setting
4140 cc0, or immediately before one using cc0. */
4141 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4142 || (auto_inc_opt
== -1
4143 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4144 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4145 && sets_cc0_p (PATTERN (prev
))))
4151 v
->auto_inc_opt
= 1;
4155 /* For each place where the biv is incremented, add an insn
4156 to increment the new, reduced reg for the giv. */
4157 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4162 insert_before
= tv
->insn
;
4163 else if (auto_inc_opt
== 1)
4164 insert_before
= NEXT_INSN (v
->insn
);
4166 insert_before
= v
->insn
;
4168 if (tv
->mult_val
== const1_rtx
)
4169 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4170 v
->new_reg
, v
->new_reg
, insert_before
);
4171 else /* tv->mult_val == const0_rtx */
4172 /* A multiply is acceptable here
4173 since this is presumed to be seldom executed. */
4174 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4175 v
->add_val
, v
->new_reg
, insert_before
);
4178 /* Add code at loop start to initialize giv's reduced reg. */
4180 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4181 v
->add_val
, v
->new_reg
, loop_start
);
4185 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4188 For each giv register that can be reduced now: if replaceable,
4189 substitute reduced reg wherever the old giv occurs;
4190 else add new move insn "giv_reg = reduced_reg".
4192 Also check for givs whose first use is their definition and whose
4193 last use is the definition of another giv. If so, it is likely
4194 dead and should not be used to eliminate a biv. */
4195 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4197 if (v
->same
&& v
->same
->ignore
)
4203 if (v
->giv_type
== DEST_REG
4204 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4206 struct induction
*v1
;
4208 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4209 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4213 /* Update expression if this was combined, in case other giv was
4216 v
->new_reg
= replace_rtx (v
->new_reg
,
4217 v
->same
->dest_reg
, v
->same
->new_reg
);
4219 if (v
->giv_type
== DEST_ADDR
)
4220 /* Store reduced reg as the address in the memref where we found
4222 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4223 else if (v
->replaceable
)
4225 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4228 /* I can no longer duplicate the original problem. Perhaps
4229 this is unnecessary now? */
4231 /* Replaceable; it isn't strictly necessary to delete the old
4232 insn and emit a new one, because v->dest_reg is now dead.
4234 However, especially when unrolling loops, the special
4235 handling for (set REG0 REG1) in the second cse pass may
4236 make v->dest_reg live again. To avoid this problem, emit
4237 an insn to set the original giv reg from the reduced giv.
4238 We can not delete the original insn, since it may be part
4239 of a LIBCALL, and the code in flow that eliminates dead
4240 libcalls will fail if it is deleted. */
4241 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4247 /* Not replaceable; emit an insn to set the original giv reg from
4248 the reduced giv, same as above. */
4249 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4253 /* When a loop is reversed, givs which depend on the reversed
4254 biv, and which are live outside the loop, must be set to their
4255 correct final value. This insn is only needed if the giv is
4256 not replaceable. The correct final value is the same as the
4257 value that the giv starts the reversed loop with. */
4258 if (bl
->reversed
&& ! v
->replaceable
)
4259 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4260 v
->add_val
, v
->dest_reg
, end_insert_before
);
4261 else if (v
->final_value
)
4265 /* If the loop has multiple exits, emit the insn before the
4266 loop to ensure that it will always be executed no matter
4267 how the loop exits. Otherwise, emit the insn after the loop,
4268 since this is slightly more efficient. */
4269 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4270 insert_before
= loop_start
;
4272 insert_before
= end_insert_before
;
4273 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4277 /* If the insn to set the final value of the giv was emitted
4278 before the loop, then we must delete the insn inside the loop
4279 that sets it. If this is a LIBCALL, then we must delete
4280 every insn in the libcall. Note, however, that
4281 final_giv_value will only succeed when there are multiple
4282 exits if the giv is dead at each exit, hence it does not
4283 matter that the original insn remains because it is dead
4285 /* Delete the insn inside the loop that sets the giv since
4286 the giv is now set before (or after) the loop. */
4287 delete_insn (v
->insn
);
4291 if (loop_dump_stream
)
4293 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4294 INSN_UID (v
->insn
));
4295 print_rtl (loop_dump_stream
, v
->new_reg
);
4296 fprintf (loop_dump_stream
, "\n");
4300 /* All the givs based on the biv bl have been reduced if they
4303 /* For each giv not marked as maybe dead that has been combined with a
4304 second giv, clear any "maybe dead" mark on that second giv.
4305 v->new_reg will either be or refer to the register of the giv it
4308 Doing this clearing avoids problems in biv elimination where a
4309 giv's new_reg is a complex value that can't be put in the insn but
4310 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4311 Since the register will be used in either case, we'd prefer it be
4312 used from the simpler giv. */
4314 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4315 if (! v
->maybe_dead
&& v
->same
)
4316 v
->same
->maybe_dead
= 0;
4318 /* Try to eliminate the biv, if it is a candidate.
4319 This won't work if ! all_reduced,
4320 since the givs we planned to use might not have been reduced.
4322 We have to be careful that we didn't initially think we could eliminate
4323 this biv because of a giv that we now think may be dead and shouldn't
4324 be used as a biv replacement.
4326 Also, there is the possibility that we may have a giv that looks
4327 like it can be used to eliminate a biv, but the resulting insn
4328 isn't valid. This can happen, for example, on the 88k, where a
4329 JUMP_INSN can compare a register only with zero. Attempts to
4330 replace it with a compare with a constant will fail.
4332 Note that in cases where this call fails, we may have replaced some
4333 of the occurrences of the biv with a giv, but no harm was done in
4334 doing so in the rare cases where it can occur. */
4336 if (all_reduced
== 1 && bl
->eliminable
4337 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4338 threshold
, insn_count
))
4341 /* ?? If we created a new test to bypass the loop entirely,
4342 or otherwise drop straight in, based on this test, then
4343 we might want to rewrite it also. This way some later
4344 pass has more hope of removing the initialization of this
4347 /* If final_value != 0, then the biv may be used after loop end
4348 and we must emit an insn to set it just in case.
4350 Reversed bivs already have an insn after the loop setting their
4351 value, so we don't need another one. We can't calculate the
4352 proper final value for such a biv here anyways. */
4353 if (final_value
!= 0 && ! bl
->reversed
)
4357 /* If the loop has multiple exits, emit the insn before the
4358 loop to ensure that it will always be executed no matter
4359 how the loop exits. Otherwise, emit the insn after the
4360 loop, since this is slightly more efficient. */
4361 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4362 insert_before
= loop_start
;
4364 insert_before
= end_insert_before
;
4366 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4371 /* Delete all of the instructions inside the loop which set
4372 the biv, as they are all dead. If is safe to delete them,
4373 because an insn setting a biv will never be part of a libcall. */
4374 /* However, deleting them will invalidate the regno_last_uid info,
4375 so keeping them around is more convenient. Final_biv_value
4376 will only succeed when there are multiple exits if the biv
4377 is dead at each exit, hence it does not matter that the original
4378 insn remains, because it is dead anyways. */
4379 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4380 delete_insn (v
->insn
);
4383 if (loop_dump_stream
)
4384 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4389 /* Go through all the instructions in the loop, making all the
4390 register substitutions scheduled in REG_MAP. */
4392 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4393 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4394 || GET_CODE (p
) == CALL_INSN
)
4396 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4397 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4401 /* Unroll loops from within strength reduction so that we can use the
4402 induction variable information that strength_reduce has already
4406 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4409 /* instrument the loop with bct insn */
4410 #ifdef HAVE_decrement_and_branch_on_count
4411 if (HAVE_decrement_and_branch_on_count
)
4412 insert_bct (loop_start
, loop_end
);
4416 if (loop_dump_stream
)
4417 fprintf (loop_dump_stream
, "\n");
4420 /* Return 1 if X is a valid source for an initial value (or as value being
4421 compared against in an initial test).
4423 X must be either a register or constant and must not be clobbered between
4424 the current insn and the start of the loop.
4426 INSN is the insn containing X. */
4429 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4438 /* Only consider pseudos we know about initialized in insns whose luids
4440 if (GET_CODE (x
) != REG
4441 || REGNO (x
) >= max_reg_before_loop
)
4444 /* Don't use call-clobbered registers across a call which clobbers it. On
4445 some machines, don't use any hard registers at all. */
4446 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4447 && (SMALL_REGISTER_CLASSES
4448 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4451 /* Don't use registers that have been clobbered before the start of the
4453 if (reg_set_between_p (x
, insn
, loop_start
))
4459 /* Scan X for memory refs and check each memory address
4460 as a possible giv. INSN is the insn whose pattern X comes from.
4461 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4462 every loop iteration. */
4465 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4468 int not_every_iteration
;
4469 rtx loop_start
, loop_end
;
4472 register enum rtx_code code
;
4478 code
= GET_CODE (x
);
4502 benefit
= general_induction_var (XEXP (x
, 0),
4503 &src_reg
, &add_val
, &mult_val
);
4505 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4506 Such a giv isn't useful. */
4507 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4509 /* Found one; record it. */
4511 = (struct induction
*) oballoc (sizeof (struct induction
));
4513 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4514 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4515 &XEXP (x
, 0), loop_start
, loop_end
);
4517 v
->mem_mode
= GET_MODE (x
);
4526 /* Recursively scan the subexpressions for other mem refs. */
4528 fmt
= GET_RTX_FORMAT (code
);
4529 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4531 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4533 else if (fmt
[i
] == 'E')
4534 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4535 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4536 loop_start
, loop_end
);
4539 /* Fill in the data about one biv update.
4540 V is the `struct induction' in which we record the biv. (It is
4541 allocated by the caller, with alloca.)
4542 INSN is the insn that sets it.
4543 DEST_REG is the biv's reg.
4545 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4546 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4547 being set to INC_VAL.
4549 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4550 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4551 can be executed more than once per iteration. If MAYBE_MULTIPLE
4552 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4553 executed exactly once per iteration. */
4556 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4557 not_every_iteration
, maybe_multiple
)
4558 struct induction
*v
;
4563 int not_every_iteration
;
4566 struct iv_class
*bl
;
4569 v
->src_reg
= dest_reg
;
4570 v
->dest_reg
= dest_reg
;
4571 v
->mult_val
= mult_val
;
4572 v
->add_val
= inc_val
;
4573 v
->mode
= GET_MODE (dest_reg
);
4574 v
->always_computable
= ! not_every_iteration
;
4575 v
->always_executed
= ! not_every_iteration
;
4576 v
->maybe_multiple
= maybe_multiple
;
4578 /* Add this to the reg's iv_class, creating a class
4579 if this is the first incrementation of the reg. */
4581 bl
= reg_biv_class
[REGNO (dest_reg
)];
4584 /* Create and initialize new iv_class. */
4586 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4588 bl
->regno
= REGNO (dest_reg
);
4594 /* Set initial value to the reg itself. */
4595 bl
->initial_value
= dest_reg
;
4596 /* We haven't seen the initializing insn yet */
4599 bl
->initial_test
= 0;
4600 bl
->incremented
= 0;
4604 bl
->total_benefit
= 0;
4606 /* Add this class to loop_iv_list. */
4607 bl
->next
= loop_iv_list
;
4610 /* Put it in the array of biv register classes. */
4611 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4614 /* Update IV_CLASS entry for this biv. */
4615 v
->next_iv
= bl
->biv
;
4618 if (mult_val
== const1_rtx
)
4619 bl
->incremented
= 1;
4621 if (loop_dump_stream
)
4623 fprintf (loop_dump_stream
,
4624 "Insn %d: possible biv, reg %d,",
4625 INSN_UID (insn
), REGNO (dest_reg
));
4626 if (GET_CODE (inc_val
) == CONST_INT
)
4628 fprintf (loop_dump_stream
, " const =");
4629 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (inc_val
));
4630 fputc ('\n', loop_dump_stream
);
4634 fprintf (loop_dump_stream
, " const = ");
4635 print_rtl (loop_dump_stream
, inc_val
);
4636 fprintf (loop_dump_stream
, "\n");
4641 /* Fill in the data about one giv.
4642 V is the `struct induction' in which we record the giv. (It is
4643 allocated by the caller, with alloca.)
4644 INSN is the insn that sets it.
4645 BENEFIT estimates the savings from deleting this insn.
4646 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4647 into a register or is used as a memory address.
4649 SRC_REG is the biv reg which the giv is computed from.
4650 DEST_REG is the giv's reg (if the giv is stored in a reg).
4651 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4652 LOCATION points to the place where this giv's value appears in INSN. */
4655 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4656 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4657 struct induction
*v
;
4661 rtx mult_val
, add_val
;
4664 int not_every_iteration
;
4666 rtx loop_start
, loop_end
;
4668 struct induction
*b
;
4669 struct iv_class
*bl
;
4670 rtx set
= single_set (insn
);
4673 v
->src_reg
= src_reg
;
4675 v
->dest_reg
= dest_reg
;
4676 v
->mult_val
= mult_val
;
4677 v
->add_val
= add_val
;
4678 v
->benefit
= benefit
;
4679 v
->location
= location
;
4681 v
->combined_with
= 0;
4682 v
->maybe_multiple
= 0;
4684 v
->derive_adjustment
= 0;
4690 v
->auto_inc_opt
= 0;
4694 /* The v->always_computable field is used in update_giv_derive, to
4695 determine whether a giv can be used to derive another giv. For a
4696 DEST_REG giv, INSN computes a new value for the giv, so its value
4697 isn't computable if INSN insn't executed every iteration.
4698 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4699 it does not compute a new value. Hence the value is always computable
4700 regardless of whether INSN is executed each iteration. */
4702 if (type
== DEST_ADDR
)
4703 v
->always_computable
= 1;
4705 v
->always_computable
= ! not_every_iteration
;
4707 v
->always_executed
= ! not_every_iteration
;
4709 if (type
== DEST_ADDR
)
4711 v
->mode
= GET_MODE (*location
);
4715 else /* type == DEST_REG */
4717 v
->mode
= GET_MODE (SET_DEST (set
));
4719 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4720 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4722 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4724 /* If the lifetime is zero, it means that this register is
4725 really a dead store. So mark this as a giv that can be
4726 ignored. This will not prevent the biv from being eliminated. */
4727 if (v
->lifetime
== 0)
4730 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4731 reg_iv_info
[REGNO (dest_reg
)] = v
;
4734 /* Add the giv to the class of givs computed from one biv. */
4736 bl
= reg_biv_class
[REGNO (src_reg
)];
4739 v
->next_iv
= bl
->giv
;
4741 /* Don't count DEST_ADDR. This is supposed to count the number of
4742 insns that calculate givs. */
4743 if (type
== DEST_REG
)
4745 bl
->total_benefit
+= benefit
;
4748 /* Fatal error, biv missing for this giv? */
4751 if (type
== DEST_ADDR
)
4755 /* The giv can be replaced outright by the reduced register only if all
4756 of the following conditions are true:
4757 - the insn that sets the giv is always executed on any iteration
4758 on which the giv is used at all
4759 (there are two ways to deduce this:
4760 either the insn is executed on every iteration,
4761 or all uses follow that insn in the same basic block),
4762 - the giv is not used outside the loop
4763 - no assignments to the biv occur during the giv's lifetime. */
4765 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4766 /* Previous line always fails if INSN was moved by loop opt. */
4767 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4768 && (! not_every_iteration
4769 || last_use_this_basic_block (dest_reg
, insn
)))
4771 /* Now check that there are no assignments to the biv within the
4772 giv's lifetime. This requires two separate checks. */
4774 /* Check each biv update, and fail if any are between the first
4775 and last use of the giv.
4777 If this loop contains an inner loop that was unrolled, then
4778 the insn modifying the biv may have been emitted by the loop
4779 unrolling code, and hence does not have a valid luid. Just
4780 mark the biv as not replaceable in this case. It is not very
4781 useful as a biv, because it is used in two different loops.
4782 It is very unlikely that we would be able to optimize the giv
4783 using this biv anyways. */
4786 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4788 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4789 || ((uid_luid
[INSN_UID (b
->insn
)]
4790 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4791 && (uid_luid
[INSN_UID (b
->insn
)]
4792 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4795 v
->not_replaceable
= 1;
4800 /* If there are any backwards branches that go from after the
4801 biv update to before it, then this giv is not replaceable. */
4803 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4804 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4807 v
->not_replaceable
= 1;
4813 /* May still be replaceable, we don't have enough info here to
4816 v
->not_replaceable
= 0;
4820 if (loop_dump_stream
)
4822 if (type
== DEST_REG
)
4823 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4824 INSN_UID (insn
), REGNO (dest_reg
));
4826 fprintf (loop_dump_stream
, "Insn %d: dest address",
4829 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4830 REGNO (src_reg
), v
->benefit
);
4831 fprintf (loop_dump_stream
, " used %d lifetime %d",
4832 v
->times_used
, v
->lifetime
);
4835 fprintf (loop_dump_stream
, " replaceable");
4837 if (GET_CODE (mult_val
) == CONST_INT
)
4839 fprintf (loop_dump_stream
, " mult ");
4840 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (mult_val
));
4844 fprintf (loop_dump_stream
, " mult ");
4845 print_rtl (loop_dump_stream
, mult_val
);
4848 if (GET_CODE (add_val
) == CONST_INT
)
4850 fprintf (loop_dump_stream
, " add ");
4851 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (add_val
));
4855 fprintf (loop_dump_stream
, " add ");
4856 print_rtl (loop_dump_stream
, add_val
);
4860 if (loop_dump_stream
)
4861 fprintf (loop_dump_stream
, "\n");
4866 /* All this does is determine whether a giv can be made replaceable because
4867 its final value can be calculated. This code can not be part of record_giv
4868 above, because final_giv_value requires that the number of loop iterations
4869 be known, and that can not be accurately calculated until after all givs
4870 have been identified. */
4873 check_final_value (v
, loop_start
, loop_end
)
4874 struct induction
*v
;
4875 rtx loop_start
, loop_end
;
4877 struct iv_class
*bl
;
4878 rtx final_value
= 0;
4880 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4882 /* DEST_ADDR givs will never reach here, because they are always marked
4883 replaceable above in record_giv. */
4885 /* The giv can be replaced outright by the reduced register only if all
4886 of the following conditions are true:
4887 - the insn that sets the giv is always executed on any iteration
4888 on which the giv is used at all
4889 (there are two ways to deduce this:
4890 either the insn is executed on every iteration,
4891 or all uses follow that insn in the same basic block),
4892 - its final value can be calculated (this condition is different
4893 than the one above in record_giv)
4894 - no assignments to the biv occur during the giv's lifetime. */
4897 /* This is only called now when replaceable is known to be false. */
4898 /* Clear replaceable, so that it won't confuse final_giv_value. */
4902 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4903 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4905 int biv_increment_seen
= 0;
4911 /* When trying to determine whether or not a biv increment occurs
4912 during the lifetime of the giv, we can ignore uses of the variable
4913 outside the loop because final_value is true. Hence we can not
4914 use regno_last_uid and regno_first_uid as above in record_giv. */
4916 /* Search the loop to determine whether any assignments to the
4917 biv occur during the giv's lifetime. Start with the insn
4918 that sets the giv, and search around the loop until we come
4919 back to that insn again.
4921 Also fail if there is a jump within the giv's lifetime that jumps
4922 to somewhere outside the lifetime but still within the loop. This
4923 catches spaghetti code where the execution order is not linear, and
4924 hence the above test fails. Here we assume that the giv lifetime
4925 does not extend from one iteration of the loop to the next, so as
4926 to make the test easier. Since the lifetime isn't known yet,
4927 this requires two loops. See also record_giv above. */
4929 last_giv_use
= v
->insn
;
4935 p
= NEXT_INSN (loop_start
);
4939 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4940 || GET_CODE (p
) == CALL_INSN
)
4942 if (biv_increment_seen
)
4944 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4947 v
->not_replaceable
= 1;
4951 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4952 biv_increment_seen
= 1;
4953 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4958 /* Now that the lifetime of the giv is known, check for branches
4959 from within the lifetime to outside the lifetime if it is still
4969 p
= NEXT_INSN (loop_start
);
4970 if (p
== last_giv_use
)
4973 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4974 && LABEL_NAME (JUMP_LABEL (p
))
4975 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4976 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4977 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4978 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4979 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4980 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4981 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4984 v
->not_replaceable
= 1;
4986 if (loop_dump_stream
)
4987 fprintf (loop_dump_stream
,
4988 "Found branch outside giv lifetime.\n");
4995 /* If it is replaceable, then save the final value. */
4997 v
->final_value
= final_value
;
5000 if (loop_dump_stream
&& v
->replaceable
)
5001 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5002 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5005 /* Update the status of whether a giv can derive other givs.
5007 We need to do something special if there is or may be an update to the biv
5008 between the time the giv is defined and the time it is used to derive
5011 In addition, a giv that is only conditionally set is not allowed to
5012 derive another giv once a label has been passed.
5014 The cases we look at are when a label or an update to a biv is passed. */
5017 update_giv_derive (p
)
5020 struct iv_class
*bl
;
5021 struct induction
*biv
, *giv
;
5025 /* Search all IV classes, then all bivs, and finally all givs.
5027 There are three cases we are concerned with. First we have the situation
5028 of a giv that is only updated conditionally. In that case, it may not
5029 derive any givs after a label is passed.
5031 The second case is when a biv update occurs, or may occur, after the
5032 definition of a giv. For certain biv updates (see below) that are
5033 known to occur between the giv definition and use, we can adjust the
5034 giv definition. For others, or when the biv update is conditional,
5035 we must prevent the giv from deriving any other givs. There are two
5036 sub-cases within this case.
5038 If this is a label, we are concerned with any biv update that is done
5039 conditionally, since it may be done after the giv is defined followed by
5040 a branch here (actually, we need to pass both a jump and a label, but
5041 this extra tracking doesn't seem worth it).
5043 If this is a jump, we are concerned about any biv update that may be
5044 executed multiple times. We are actually only concerned about
5045 backward jumps, but it is probably not worth performing the test
5046 on the jump again here.
5048 If this is a biv update, we must adjust the giv status to show that a
5049 subsequent biv update was performed. If this adjustment cannot be done,
5050 the giv cannot derive further givs. */
5052 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5053 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5054 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5057 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5059 /* If cant_derive is already true, there is no point in
5060 checking all of these conditions again. */
5061 if (giv
->cant_derive
)
5064 /* If this giv is conditionally set and we have passed a label,
5065 it cannot derive anything. */
5066 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5067 giv
->cant_derive
= 1;
5069 /* Skip givs that have mult_val == 0, since
5070 they are really invariants. Also skip those that are
5071 replaceable, since we know their lifetime doesn't contain
5073 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5076 /* The only way we can allow this giv to derive another
5077 is if this is a biv increment and we can form the product
5078 of biv->add_val and giv->mult_val. In this case, we will
5079 be able to compute a compensation. */
5080 else if (biv
->insn
== p
)
5084 if (biv
->mult_val
== const1_rtx
)
5085 tem
= simplify_giv_expr (gen_rtx_MULT (giv
->mode
,
5090 if (tem
&& giv
->derive_adjustment
)
5091 tem
= simplify_giv_expr (gen_rtx_PLUS (giv
->mode
, tem
,
5092 giv
->derive_adjustment
),
5095 giv
->derive_adjustment
= tem
;
5097 giv
->cant_derive
= 1;
5099 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5100 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5101 giv
->cant_derive
= 1;
5106 /* Check whether an insn is an increment legitimate for a basic induction var.
5107 X is the source of insn P, or a part of it.
5108 MODE is the mode in which X should be interpreted.
5110 DEST_REG is the putative biv, also the destination of the insn.
5111 We accept patterns of these forms:
5112 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5113 REG = INVARIANT + REG
5115 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5116 and store the additive term into *INC_VAL.
5118 If X is an assignment of an invariant into DEST_REG, we set
5119 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5121 We also want to detect a BIV when it corresponds to a variable
5122 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5123 of the variable may be a PLUS that adds a SUBREG of that variable to
5124 an invariant and then sign- or zero-extends the result of the PLUS
5127 Most GIVs in such cases will be in the promoted mode, since that is the
5128 probably the natural computation mode (and almost certainly the mode
5129 used for addresses) on the machine. So we view the pseudo-reg containing
5130 the variable as the BIV, as if it were simply incremented.
5132 Note that treating the entire pseudo as a BIV will result in making
5133 simple increments to any GIVs based on it. However, if the variable
5134 overflows in its declared mode but not its promoted mode, the result will
5135 be incorrect. This is acceptable if the variable is signed, since
5136 overflows in such cases are undefined, but not if it is unsigned, since
5137 those overflows are defined. So we only check for SIGN_EXTEND and
5140 If we cannot find a biv, we return 0. */
5143 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5145 enum machine_mode mode
;
5151 register enum rtx_code code
;
5155 code
= GET_CODE (x
);
5159 if (XEXP (x
, 0) == dest_reg
5160 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5161 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5162 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5164 else if (XEXP (x
, 1) == dest_reg
5165 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5166 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5167 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5172 if (invariant_p (arg
) != 1)
5175 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5176 *mult_val
= const1_rtx
;
5180 /* If this is a SUBREG for a promoted variable, check the inner
5182 if (SUBREG_PROMOTED_VAR_P (x
))
5183 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5184 dest_reg
, p
, inc_val
, mult_val
);
5188 /* If this register is assigned in the previous insn, look at its
5189 source, but don't go outside the loop or past a label. */
5191 for (insn
= PREV_INSN (p
);
5192 (insn
&& GET_CODE (insn
) == NOTE
5193 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5194 insn
= PREV_INSN (insn
))
5198 set
= single_set (insn
);
5201 && (SET_DEST (set
) == x
5202 || (GET_CODE (SET_DEST (set
)) == SUBREG
5203 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5205 && SUBREG_REG (SET_DEST (set
)) == x
)))
5206 return basic_induction_var (SET_SRC (set
),
5207 (GET_MODE (SET_SRC (set
)) == VOIDmode
5209 : GET_MODE (SET_SRC (set
))),
5212 /* ... fall through ... */
5214 /* Can accept constant setting of biv only when inside inner most loop.
5215 Otherwise, a biv of an inner loop may be incorrectly recognized
5216 as a biv of the outer loop,
5217 causing code to be moved INTO the inner loop. */
5219 if (invariant_p (x
) != 1)
5224 if (loops_enclosed
== 1)
5226 /* Possible bug here? Perhaps we don't know the mode of X. */
5227 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5228 *mult_val
= const0_rtx
;
5235 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5236 dest_reg
, p
, inc_val
, mult_val
);
5238 /* Similar, since this can be a sign extension. */
5239 for (insn
= PREV_INSN (p
);
5240 (insn
&& GET_CODE (insn
) == NOTE
5241 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5242 insn
= PREV_INSN (insn
))
5246 set
= single_set (insn
);
5248 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5249 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5250 && INTVAL (XEXP (x
, 1)) >= 0
5251 && GET_CODE (SET_SRC (set
)) == ASHIFT
5252 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5253 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5254 GET_MODE (XEXP (x
, 0)),
5255 dest_reg
, insn
, inc_val
, mult_val
);
5263 /* A general induction variable (giv) is any quantity that is a linear
5264 function of a basic induction variable,
5265 i.e. giv = biv * mult_val + add_val.
5266 The coefficients can be any loop invariant quantity.
5267 A giv need not be computed directly from the biv;
5268 it can be computed by way of other givs. */
5270 /* Determine whether X computes a giv.
5271 If it does, return a nonzero value
5272 which is the benefit from eliminating the computation of X;
5273 set *SRC_REG to the register of the biv that it is computed from;
5274 set *ADD_VAL and *MULT_VAL to the coefficients,
5275 such that the value of X is biv * mult + add; */
5278 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5288 /* If this is an invariant, forget it, it isn't a giv. */
5289 if (invariant_p (x
) == 1)
5292 /* See if the expression could be a giv and get its form.
5293 Mark our place on the obstack in case we don't find a giv. */
5294 storage
= (char *) oballoc (0);
5295 x
= simplify_giv_expr (x
, &benefit
);
5302 switch (GET_CODE (x
))
5306 /* Since this is now an invariant and wasn't before, it must be a giv
5307 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5309 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5310 *mult_val
= const0_rtx
;
5315 /* This is equivalent to a BIV. */
5317 *mult_val
= const1_rtx
;
5318 *add_val
= const0_rtx
;
5322 /* Either (plus (biv) (invar)) or
5323 (plus (mult (biv) (invar_1)) (invar_2)). */
5324 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5326 *src_reg
= XEXP (XEXP (x
, 0), 0);
5327 *mult_val
= XEXP (XEXP (x
, 0), 1);
5331 *src_reg
= XEXP (x
, 0);
5332 *mult_val
= const1_rtx
;
5334 *add_val
= XEXP (x
, 1);
5338 /* ADD_VAL is zero. */
5339 *src_reg
= XEXP (x
, 0);
5340 *mult_val
= XEXP (x
, 1);
5341 *add_val
= const0_rtx
;
5348 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5349 unless they are CONST_INT). */
5350 if (GET_CODE (*add_val
) == USE
)
5351 *add_val
= XEXP (*add_val
, 0);
5352 if (GET_CODE (*mult_val
) == USE
)
5353 *mult_val
= XEXP (*mult_val
, 0);
5355 benefit
+= rtx_cost (orig_x
, SET
);
5357 /* Always return some benefit if this is a giv so it will be detected
5358 as such. This allows elimination of bivs that might otherwise
5359 not be eliminated. */
5360 return benefit
== 0 ? 1 : benefit
;
5363 /* Given an expression, X, try to form it as a linear function of a biv.
5364 We will canonicalize it to be of the form
5365 (plus (mult (BIV) (invar_1))
5367 with possible degeneracies.
5369 The invariant expressions must each be of a form that can be used as a
5370 machine operand. We surround then with a USE rtx (a hack, but localized
5371 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5372 routine; it is the caller's responsibility to strip them.
5374 If no such canonicalization is possible (i.e., two biv's are used or an
5375 expression that is neither invariant nor a biv or giv), this routine
5378 For a non-zero return, the result will have a code of CONST_INT, USE,
5379 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5381 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5384 simplify_giv_expr (x
, benefit
)
5388 enum machine_mode mode
= GET_MODE (x
);
5392 /* If this is not an integer mode, or if we cannot do arithmetic in this
5393 mode, this can't be a giv. */
5394 if (mode
!= VOIDmode
5395 && (GET_MODE_CLASS (mode
) != MODE_INT
5396 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5399 switch (GET_CODE (x
))
5402 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5403 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5404 if (arg0
== 0 || arg1
== 0)
5407 /* Put constant last, CONST_INT last if both constant. */
5408 if ((GET_CODE (arg0
) == USE
5409 || GET_CODE (arg0
) == CONST_INT
)
5410 && GET_CODE (arg1
) != CONST_INT
)
5411 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5413 /* Handle addition of zero, then addition of an invariant. */
5414 if (arg1
== const0_rtx
)
5416 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5417 switch (GET_CODE (arg0
))
5421 /* Both invariant. Only valid if sum is machine operand.
5422 First strip off possible USE on the operands. */
5423 if (GET_CODE (arg0
) == USE
)
5424 arg0
= XEXP (arg0
, 0);
5426 if (GET_CODE (arg1
) == USE
)
5427 arg1
= XEXP (arg1
, 0);
5430 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5432 tem
= plus_constant (arg0
, INTVAL (arg1
));
5433 if (GET_CODE (tem
) != CONST_INT
)
5434 tem
= gen_rtx_USE (mode
, tem
);
5438 /* Adding two invariants must result in an invariant,
5439 so enclose addition operation inside a USE and
5441 tem
= gen_rtx_USE (mode
, gen_rtx_PLUS (mode
, arg0
, arg1
));
5448 /* biv + invar or mult + invar. Return sum. */
5449 return gen_rtx_PLUS (mode
, arg0
, arg1
);
5452 /* (a + invar_1) + invar_2. Associate. */
5453 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5456 XEXP (arg0
, 1), arg1
)),
5463 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5464 MULT to reduce cases. */
5465 if (GET_CODE (arg0
) == REG
)
5466 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
5467 if (GET_CODE (arg1
) == REG
)
5468 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
5470 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5471 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5472 Recurse to associate the second PLUS. */
5473 if (GET_CODE (arg1
) == MULT
)
5474 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5476 if (GET_CODE (arg1
) == PLUS
)
5477 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5478 gen_rtx_PLUS (mode
, arg0
,
5483 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5484 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5487 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5490 return simplify_giv_expr (gen_rtx_MULT (mode
,
5498 /* Handle "a - b" as "a + b * (-1)". */
5499 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5501 gen_rtx_MULT (mode
, XEXP (x
, 1),
5506 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5507 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5508 if (arg0
== 0 || arg1
== 0)
5511 /* Put constant last, CONST_INT last if both constant. */
5512 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5513 && GET_CODE (arg1
) != CONST_INT
)
5514 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5516 /* If second argument is not now constant, not giv. */
5517 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5520 /* Handle multiply by 0 or 1. */
5521 if (arg1
== const0_rtx
)
5524 else if (arg1
== const1_rtx
)
5527 switch (GET_CODE (arg0
))
5530 /* biv * invar. Done. */
5531 return gen_rtx_MULT (mode
, arg0
, arg1
);
5534 /* Product of two constants. */
5535 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5538 /* invar * invar. Not giv. */
5542 /* (a * invar_1) * invar_2. Associate. */
5543 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5550 /* (a + invar_1) * invar_2. Distribute. */
5551 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5565 /* Shift by constant is multiply by power of two. */
5566 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5569 return simplify_giv_expr (gen_rtx_MULT (mode
,
5571 GEN_INT ((HOST_WIDE_INT
) 1
5572 << INTVAL (XEXP (x
, 1)))),
5576 /* "-a" is "a * (-1)" */
5577 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
5581 /* "~a" is "-a - 1". Silly, but easy. */
5582 return simplify_giv_expr (gen_rtx_MINUS (mode
,
5583 gen_rtx_NEG (mode
, XEXP (x
, 0)),
5588 /* Already in proper form for invariant. */
5592 /* If this is a new register, we can't deal with it. */
5593 if (REGNO (x
) >= max_reg_before_loop
)
5596 /* Check for biv or giv. */
5597 switch (reg_iv_type
[REGNO (x
)])
5601 case GENERAL_INDUCT
:
5603 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5605 /* Form expression from giv and add benefit. Ensure this giv
5606 can derive another and subtract any needed adjustment if so. */
5607 *benefit
+= v
->benefit
;
5611 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
, v
->src_reg
,
5614 if (v
->derive_adjustment
)
5615 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
5616 return simplify_giv_expr (tem
, benefit
);
5623 /* Fall through to general case. */
5625 /* If invariant, return as USE (unless CONST_INT).
5626 Otherwise, not giv. */
5627 if (GET_CODE (x
) == USE
)
5630 if (invariant_p (x
) == 1)
5632 if (GET_CODE (x
) == CONST_INT
)
5635 return gen_rtx_USE (mode
, x
);
5642 /* Help detect a giv that is calculated by several consecutive insns;
5646 The caller has already identified the first insn P as having a giv as dest;
5647 we check that all other insns that set the same register follow
5648 immediately after P, that they alter nothing else,
5649 and that the result of the last is still a giv.
5651 The value is 0 if the reg set in P is not really a giv.
5652 Otherwise, the value is the amount gained by eliminating
5653 all the consecutive insns that compute the value.
5655 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5656 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5658 The coefficients of the ultimate giv value are stored in
5659 *MULT_VAL and *ADD_VAL. */
5662 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5677 /* Indicate that this is a giv so that we can update the value produced in
5678 each insn of the multi-insn sequence.
5680 This induction structure will be used only by the call to
5681 general_induction_var below, so we can allocate it on our stack.
5682 If this is a giv, our caller will replace the induct var entry with
5683 a new induction structure. */
5685 = (struct induction
*) alloca (sizeof (struct induction
));
5686 v
->src_reg
= src_reg
;
5687 v
->mult_val
= *mult_val
;
5688 v
->add_val
= *add_val
;
5689 v
->benefit
= first_benefit
;
5691 v
->derive_adjustment
= 0;
5693 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5694 reg_iv_info
[REGNO (dest_reg
)] = v
;
5696 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5701 code
= GET_CODE (p
);
5703 /* If libcall, skip to end of call sequence. */
5704 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5708 && (set
= single_set (p
))
5709 && GET_CODE (SET_DEST (set
)) == REG
5710 && SET_DEST (set
) == dest_reg
5711 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5713 /* Giv created by equivalent expression. */
5714 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5715 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5716 add_val
, mult_val
))))
5717 && src_reg
== v
->src_reg
)
5719 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5720 benefit
+= libcall_benefit (p
);
5723 v
->mult_val
= *mult_val
;
5724 v
->add_val
= *add_val
;
5725 v
->benefit
= benefit
;
5727 else if (code
!= NOTE
)
5729 /* Allow insns that set something other than this giv to a
5730 constant. Such insns are needed on machines which cannot
5731 include long constants and should not disqualify a giv. */
5733 && (set
= single_set (p
))
5734 && SET_DEST (set
) != dest_reg
5735 && CONSTANT_P (SET_SRC (set
)))
5738 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5746 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5747 represented by G1. If no such expression can be found, or it is clear that
5748 it cannot possibly be a valid address, 0 is returned.
5750 To perform the computation, we note that
5753 where `v' is the biv.
5755 So G2 = (c/a) * G1 + (d - b*c/a) */
5759 express_from (g1
, g2
)
5760 struct induction
*g1
, *g2
;
5764 /* The value that G1 will be multiplied by must be a constant integer. Also,
5765 the only chance we have of getting a valid address is if b*c/a (see above
5766 for notation) is also an integer. */
5767 if (GET_CODE (g1
->mult_val
) != CONST_INT
5768 || GET_CODE (g2
->mult_val
) != CONST_INT
5769 || GET_CODE (g1
->add_val
) != CONST_INT
5770 || g1
->mult_val
== const0_rtx
5771 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5774 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5775 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5777 /* Form simplified final result. */
5778 if (mult
== const0_rtx
)
5780 else if (mult
== const1_rtx
)
5781 mult
= g1
->dest_reg
;
5783 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
5785 if (add
== const0_rtx
)
5788 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
5792 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5793 (either directly or via an address expression) a register used to represent
5794 G1. Set g2->new_reg to a represtation of G1 (normally just
5798 combine_givs_p (g1
, g2
)
5799 struct induction
*g1
, *g2
;
5803 /* If these givs are identical, they can be combined. */
5804 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5805 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5807 g2
->new_reg
= g1
->dest_reg
;
5812 /* If G2 can be expressed as a function of G1 and that function is valid
5813 as an address and no more expensive than using a register for G2,
5814 the expression of G2 in terms of G1 can be used. */
5815 if (g2
->giv_type
== DEST_ADDR
5816 && (tem
= express_from (g1
, g2
)) != 0
5817 && memory_address_p (g2
->mem_mode
, tem
)
5818 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5828 #ifdef GIV_SORT_CRITERION
5829 /* Compare two givs and sort the most desirable one for combinations first.
5830 This is used only in one qsort call below. */
5834 struct induction
**x
, **y
;
5836 GIV_SORT_CRITERION (*x
, *y
);
5842 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5843 any other. If so, point SAME to the giv combined with and set NEW_REG to
5844 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5845 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5849 struct iv_class
*bl
;
5851 struct induction
*g1
, *g2
, **giv_array
;
5852 int i
, j
, giv_count
, pass
;
5854 /* Count givs, because bl->giv_count is incorrect here. */
5856 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5860 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5862 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5863 giv_array
[i
++] = g1
;
5865 #ifdef GIV_SORT_CRITERION
5866 /* Sort the givs if GIV_SORT_CRITERION is defined.
5867 This is usually defined for processors which lack
5868 negative register offsets so more givs may be combined. */
5870 if (loop_dump_stream
)
5871 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5873 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5876 for (i
= 0; i
< giv_count
; i
++)
5879 for (pass
= 0; pass
<= 1; pass
++)
5880 for (j
= 0; j
< giv_count
; j
++)
5884 /* First try to combine with replaceable givs, then all givs. */
5885 && (g1
->replaceable
|| pass
== 1)
5886 /* If either has already been combined or is to be ignored, can't
5888 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5889 /* If something has been based on G2, G2 cannot itself be based
5890 on something else. */
5891 && ! g2
->combined_with
5892 && combine_givs_p (g1
, g2
))
5894 /* g2->new_reg set by `combine_givs_p' */
5896 g1
->combined_with
= 1;
5898 /* If one of these givs is a DEST_REG that was only used
5899 once, by the other giv, this is actually a single use.
5900 The DEST_REG has the correct cost, while the other giv
5901 counts the REG use too often. */
5902 if (g2
->giv_type
== DEST_REG
5903 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5904 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5905 g1
->benefit
= g2
->benefit
;
5906 else if (g1
->giv_type
!= DEST_REG
5907 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5908 || ! reg_mentioned_p (g1
->dest_reg
,
5909 PATTERN (g2
->insn
)))
5911 g1
->benefit
+= g2
->benefit
;
5912 g1
->times_used
+= g2
->times_used
;
5914 /* ??? The new final_[bg]iv_value code does a much better job
5915 of finding replaceable giv's, and hence this code may no
5916 longer be necessary. */
5917 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5918 g1
->benefit
-= copy_cost
;
5919 g1
->lifetime
+= g2
->lifetime
;
5921 if (loop_dump_stream
)
5922 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5923 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5929 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5932 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5933 rtx b
; /* initial value of basic induction variable */
5934 rtx m
; /* multiplicative constant */
5935 rtx a
; /* additive constant */
5936 rtx reg
; /* destination register */
5942 /* Prevent unexpected sharing of these rtx. */
5946 /* Increase the lifetime of any invariants moved further in code. */
5947 update_reg_last_use (a
, insert_before
);
5948 update_reg_last_use (b
, insert_before
);
5949 update_reg_last_use (m
, insert_before
);
5952 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5954 emit_move_insn (reg
, result
);
5955 seq
= gen_sequence ();
5958 emit_insn_before (seq
, insert_before
);
5960 record_base_value (REGNO (reg
), b
);
5963 /* Test whether A * B can be computed without
5964 an actual multiply insn. Value is 1 if so. */
5967 product_cheap_p (a
, b
)
5973 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5974 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5977 /* If only one is constant, make it B. */
5978 if (GET_CODE (a
) == CONST_INT
)
5979 tmp
= a
, a
= b
, b
= tmp
;
5981 /* If first constant, both constant, so don't need multiply. */
5982 if (GET_CODE (a
) == CONST_INT
)
5985 /* If second not constant, neither is constant, so would need multiply. */
5986 if (GET_CODE (b
) != CONST_INT
)
5989 /* One operand is constant, so might not need multiply insn. Generate the
5990 code for the multiply and see if a call or multiply, or long sequence
5991 of insns is generated. */
5993 rtl_obstack
= &temp_obstack
;
5995 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5996 tmp
= gen_sequence ();
5999 if (GET_CODE (tmp
) == SEQUENCE
)
6001 if (XVEC (tmp
, 0) == 0)
6003 else if (XVECLEN (tmp
, 0) > 3)
6006 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
6008 rtx insn
= XVECEXP (tmp
, 0, i
);
6010 if (GET_CODE (insn
) != INSN
6011 || (GET_CODE (PATTERN (insn
)) == SET
6012 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
6013 || (GET_CODE (PATTERN (insn
)) == PARALLEL
6014 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
6015 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
6022 else if (GET_CODE (tmp
) == SET
6023 && GET_CODE (SET_SRC (tmp
)) == MULT
)
6025 else if (GET_CODE (tmp
) == PARALLEL
6026 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
6027 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
6030 /* Free any storage we obtained in generating this multiply and restore rtl
6031 allocation to its normal obstack. */
6032 obstack_free (&temp_obstack
, storage
);
6033 rtl_obstack
= old_rtl_obstack
;
6038 /* Check to see if loop can be terminated by a "decrement and branch until
6039 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6040 Also try reversing an increment loop to a decrement loop
6041 to see if the optimization can be performed.
6042 Value is nonzero if optimization was performed. */
6044 /* This is useful even if the architecture doesn't have such an insn,
6045 because it might change a loops which increments from 0 to n to a loop
6046 which decrements from n to 0. A loop that decrements to zero is usually
6047 faster than one that increments from zero. */
6049 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6050 such as approx_final_value, biv_total_increment, loop_iterations, and
6051 final_[bg]iv_value. */
6054 check_dbra_loop (loop_end
, insn_count
, loop_start
)
6059 struct iv_class
*bl
;
6066 rtx before_comparison
;
6069 /* If last insn is a conditional branch, and the insn before tests a
6070 register value, try to optimize it. Otherwise, we can't do anything. */
6072 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
6073 if (comparison
== 0)
6076 /* Check all of the bivs to see if the compare uses one of them.
6077 Skip biv's set more than once because we can't guarantee that
6078 it will be zero on the last iteration. Also skip if the biv is
6079 used between its update and the test insn. */
6081 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6083 if (bl
->biv_count
== 1
6084 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6085 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6086 PREV_INSN (PREV_INSN (loop_end
))))
6093 /* Look for the case where the basic induction variable is always
6094 nonnegative, and equals zero on the last iteration.
6095 In this case, add a reg_note REG_NONNEG, which allows the
6096 m68k DBRA instruction to be used. */
6098 if (((GET_CODE (comparison
) == GT
6099 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6100 && INTVAL (XEXP (comparison
, 1)) == -1)
6101 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6102 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6103 && INTVAL (bl
->biv
->add_val
) < 0)
6105 /* Initial value must be greater than 0,
6106 init_val % -dec_value == 0 to ensure that it equals zero on
6107 the last iteration */
6109 if (GET_CODE (bl
->initial_value
) == CONST_INT
6110 && INTVAL (bl
->initial_value
) > 0
6111 && (INTVAL (bl
->initial_value
)
6112 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6114 /* register always nonnegative, add REG_NOTE to branch */
6115 REG_NOTES (PREV_INSN (loop_end
))
6116 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6117 REG_NOTES (PREV_INSN (loop_end
)));
6123 /* If the decrement is 1 and the value was tested as >= 0 before
6124 the loop, then we can safely optimize. */
6125 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6127 if (GET_CODE (p
) == CODE_LABEL
)
6129 if (GET_CODE (p
) != JUMP_INSN
)
6132 before_comparison
= get_condition_for_loop (p
);
6133 if (before_comparison
6134 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6135 && GET_CODE (before_comparison
) == LT
6136 && XEXP (before_comparison
, 1) == const0_rtx
6137 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6138 && INTVAL (bl
->biv
->add_val
) == -1)
6140 REG_NOTES (PREV_INSN (loop_end
))
6141 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6142 REG_NOTES (PREV_INSN (loop_end
)));
6149 else if (num_mem_sets
<= 1)
6151 /* Try to change inc to dec, so can apply above optimization. */
6153 all registers modified are induction variables or invariant,
6154 all memory references have non-overlapping addresses
6155 (obviously true if only one write)
6156 allow 2 insns for the compare/jump at the end of the loop. */
6157 /* Also, we must avoid any instructions which use both the reversed
6158 biv and another biv. Such instructions will fail if the loop is
6159 reversed. We meet this condition by requiring that either
6160 no_use_except_counting is true, or else that there is only
6162 int num_nonfixed_reads
= 0;
6163 /* 1 if the iteration var is used only to count iterations. */
6164 int no_use_except_counting
= 0;
6165 /* 1 if the loop has no memory store, or it has a single memory store
6166 which is reversible. */
6167 int reversible_mem_store
= 1;
6169 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6170 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6171 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6173 if (bl
->giv_count
== 0
6174 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6176 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6178 /* If there are no givs for this biv, and the only exit is the
6179 fall through at the end of the the loop, then
6180 see if perhaps there are no uses except to count. */
6181 no_use_except_counting
= 1;
6182 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6183 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6185 rtx set
= single_set (p
);
6187 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6188 && REGNO (SET_DEST (set
)) == bl
->regno
)
6189 /* An insn that sets the biv is okay. */
6191 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6192 || p
== prev_nonnote_insn (loop_end
))
6193 /* Don't bother about the end test. */
6195 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6196 /* Any other use of the biv is no good. */
6198 no_use_except_counting
= 0;
6204 /* If the loop has a single store, and the destination address is
6205 invariant, then we can't reverse the loop, because this address
6206 might then have the wrong value at loop exit.
6207 This would work if the source was invariant also, however, in that
6208 case, the insn should have been moved out of the loop. */
6210 if (num_mem_sets
== 1)
6211 reversible_mem_store
6212 = (! unknown_address_altered
6213 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6215 /* This code only acts for innermost loops. Also it simplifies
6216 the memory address check by only reversing loops with
6217 zero or one memory access.
6218 Two memory accesses could involve parts of the same array,
6219 and that can't be reversed. */
6221 if (num_nonfixed_reads
<= 1
6223 && !loop_has_volatile
6224 && reversible_mem_store
6225 && (no_use_except_counting
6226 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6227 + num_movables
+ 2 == insn_count
)
6228 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6232 /* Loop can be reversed. */
6233 if (loop_dump_stream
)
6234 fprintf (loop_dump_stream
, "Can reverse loop\n");
6236 /* Now check other conditions:
6238 The increment must be a constant, as must the initial value,
6239 and the comparison code must be LT.
6241 This test can probably be improved since +/- 1 in the constant
6242 can be obtained by changing LT to LE and vice versa; this is
6246 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6247 /* LE gets turned into LT */
6248 && GET_CODE (comparison
) == LT
6249 && GET_CODE (bl
->initial_value
) == CONST_INT
)
6251 HOST_WIDE_INT add_val
, comparison_val
;
6254 add_val
= INTVAL (bl
->biv
->add_val
);
6255 comparison_val
= INTVAL (XEXP (comparison
, 1));
6256 initial_value
= bl
->initial_value
;
6258 /* Normalize the initial value if it is an integer and
6259 has no other use except as a counter. This will allow
6260 a few more loops to be reversed. */
6261 if (no_use_except_counting
6262 && GET_CODE (initial_value
) == CONST_INT
)
6264 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
6265 initial_value
= const0_rtx
;
6268 /* If the initial value is not zero, or if the comparison
6269 value is not an exact multiple of the increment, then we
6270 can not reverse this loop. */
6271 if (initial_value
!= const0_rtx
6272 || (comparison_val
% add_val
) != 0)
6275 /* Reset these in case we normalized the initial value
6276 and comparison value above. */
6277 bl
->initial_value
= initial_value
;
6278 XEXP (comparison
, 1) = GEN_INT (comparison_val
);
6280 /* Register will always be nonnegative, with value
6281 0 on last iteration if loop reversed */
6283 /* Save some info needed to produce the new insns. */
6284 reg
= bl
->biv
->dest_reg
;
6285 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6286 if (jump_label
== pc_rtx
)
6287 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6288 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6290 final_value
= XEXP (comparison
, 1);
6291 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6292 - INTVAL (bl
->biv
->add_val
));
6294 /* Initialize biv to start_value before loop start.
6295 The old initializing insn will be deleted as a
6296 dead store by flow.c. */
6297 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6299 /* Add insn to decrement register, and delete insn
6300 that incremented the register. */
6301 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6303 delete_insn (bl
->biv
->insn
);
6305 /* Update biv info to reflect its new status. */
6307 bl
->initial_value
= start_value
;
6308 bl
->biv
->add_val
= new_add_val
;
6310 /* Inc LABEL_NUSES so that delete_insn will
6311 not delete the label. */
6312 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6314 /* Emit an insn after the end of the loop to set the biv's
6315 proper exit value if it is used anywhere outside the loop. */
6316 if ((REGNO_LAST_UID (bl
->regno
)
6317 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6319 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6320 emit_insn_after (gen_move_insn (reg
, final_value
),
6323 /* Delete compare/branch at end of loop. */
6324 delete_insn (PREV_INSN (loop_end
));
6325 delete_insn (PREV_INSN (loop_end
));
6327 /* Add new compare/branch insn at end of loop. */
6329 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6330 GET_MODE (reg
), 0, 0);
6331 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6332 tem
= gen_sequence ();
6334 emit_jump_insn_before (tem
, loop_end
);
6336 for (tem
= PREV_INSN (loop_end
);
6337 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6341 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6343 /* Increment of LABEL_NUSES done above. */
6344 /* Register is now always nonnegative,
6345 so add REG_NONNEG note to the branch. */
6346 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6352 /* Mark that this biv has been reversed. Each giv which depends
6353 on this biv, and which is also live past the end of the loop
6354 will have to be fixed up. */
6358 if (loop_dump_stream
)
6359 fprintf (loop_dump_stream
,
6360 "Reversed loop and added reg_nonneg\n");
6370 /* Verify whether the biv BL appears to be eliminable,
6371 based on the insns in the loop that refer to it.
6372 LOOP_START is the first insn of the loop, and END is the end insn.
6374 If ELIMINATE_P is non-zero, actually do the elimination.
6376 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6377 determine whether invariant insns should be placed inside or at the
6378 start of the loop. */
6381 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6382 struct iv_class
*bl
;
6386 int threshold
, insn_count
;
6388 rtx reg
= bl
->biv
->dest_reg
;
6391 /* Scan all insns in the loop, stopping if we find one that uses the
6392 biv in a way that we cannot eliminate. */
6394 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6396 enum rtx_code code
= GET_CODE (p
);
6397 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6399 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6400 && reg_mentioned_p (reg
, PATTERN (p
))
6401 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6403 if (loop_dump_stream
)
6404 fprintf (loop_dump_stream
,
6405 "Cannot eliminate biv %d: biv used in insn %d.\n",
6406 bl
->regno
, INSN_UID (p
));
6413 if (loop_dump_stream
)
6414 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6415 bl
->regno
, eliminate_p
? "was" : "can be");
6422 /* If BL appears in X (part of the pattern of INSN), see if we can
6423 eliminate its use. If so, return 1. If not, return 0.
6425 If BIV does not appear in X, return 1.
6427 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6428 where extra insns should be added. Depending on how many items have been
6429 moved out of the loop, it will either be before INSN or at the start of
6433 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6435 struct iv_class
*bl
;
6439 enum rtx_code code
= GET_CODE (x
);
6440 rtx reg
= bl
->biv
->dest_reg
;
6441 enum machine_mode mode
= GET_MODE (reg
);
6442 struct induction
*v
;
6451 /* If we haven't already been able to do something with this BIV,
6452 we can't eliminate it. */
6458 /* If this sets the BIV, it is not a problem. */
6459 if (SET_DEST (x
) == reg
)
6462 /* If this is an insn that defines a giv, it is also ok because
6463 it will go away when the giv is reduced. */
6464 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6465 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6469 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6471 /* Can replace with any giv that was reduced and
6472 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6473 Require a constant for MULT_VAL, so we know it's nonzero.
6474 ??? We disable this optimization to avoid potential
6477 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6478 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6479 && v
->add_val
== const0_rtx
6480 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6484 /* If the giv V had the auto-inc address optimization applied
6485 to it, and INSN occurs between the giv insn and the biv
6486 insn, then we must adjust the value used here.
6487 This is rare, so we don't bother to do so. */
6489 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6490 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6491 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6492 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6498 /* If the giv has the opposite direction of change,
6499 then reverse the comparison. */
6500 if (INTVAL (v
->mult_val
) < 0)
6501 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
6502 const0_rtx
, v
->new_reg
);
6506 /* We can probably test that giv's reduced reg. */
6507 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6511 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6512 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6513 Require a constant for MULT_VAL, so we know it's nonzero.
6514 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6515 overflow problem. */
6517 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6518 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6519 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6521 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6522 || GET_CODE (v
->add_val
) == LABEL_REF
6523 || GET_CODE (v
->add_val
) == CONST
6524 || (GET_CODE (v
->add_val
) == REG
6525 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6527 /* If the giv V had the auto-inc address optimization applied
6528 to it, and INSN occurs between the giv insn and the biv
6529 insn, then we must adjust the value used here.
6530 This is rare, so we don't bother to do so. */
6532 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6533 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6534 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6535 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6541 /* If the giv has the opposite direction of change,
6542 then reverse the comparison. */
6543 if (INTVAL (v
->mult_val
) < 0)
6544 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
6547 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
6548 copy_rtx (v
->add_val
));
6550 /* Replace biv with the giv's reduced register. */
6551 update_reg_last_use (v
->add_val
, insn
);
6552 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6555 /* Insn doesn't support that constant or invariant. Copy it
6556 into a register (it will be a loop invariant.) */
6557 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6559 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6562 /* Substitute the new register for its invariant value in
6563 the compare expression. */
6564 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6565 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6574 case GT
: case GE
: case GTU
: case GEU
:
6575 case LT
: case LE
: case LTU
: case LEU
:
6576 /* See if either argument is the biv. */
6577 if (XEXP (x
, 0) == reg
)
6578 arg
= XEXP (x
, 1), arg_operand
= 1;
6579 else if (XEXP (x
, 1) == reg
)
6580 arg
= XEXP (x
, 0), arg_operand
= 0;
6584 if (CONSTANT_P (arg
))
6586 /* First try to replace with any giv that has constant positive
6587 mult_val and constant add_val. We might be able to support
6588 negative mult_val, but it seems complex to do it in general. */
6590 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6591 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6592 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6593 || GET_CODE (v
->add_val
) == LABEL_REF
6594 || GET_CODE (v
->add_val
) == CONST
6595 || (GET_CODE (v
->add_val
) == REG
6596 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6597 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6600 /* If the giv V had the auto-inc address optimization applied
6601 to it, and INSN occurs between the giv insn and the biv
6602 insn, then we must adjust the value used here.
6603 This is rare, so we don't bother to do so. */
6605 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6606 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6607 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6608 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6614 /* Replace biv with the giv's reduced reg. */
6615 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6617 /* If all constants are actually constant integers and
6618 the derived constant can be directly placed in the COMPARE,
6620 if (GET_CODE (arg
) == CONST_INT
6621 && GET_CODE (v
->mult_val
) == CONST_INT
6622 && GET_CODE (v
->add_val
) == CONST_INT
6623 && validate_change (insn
, &XEXP (x
, arg_operand
),
6624 GEN_INT (INTVAL (arg
)
6625 * INTVAL (v
->mult_val
)
6626 + INTVAL (v
->add_val
)), 0))
6629 /* Otherwise, load it into a register. */
6630 tem
= gen_reg_rtx (mode
);
6631 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6632 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6635 /* If that failed, put back the change we made above. */
6636 XEXP (x
, 1-arg_operand
) = reg
;
6639 /* Look for giv with positive constant mult_val and nonconst add_val.
6640 Insert insns to calculate new compare value.
6641 ??? Turn this off due to possible overflow. */
6643 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6644 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6645 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6651 /* If the giv V had the auto-inc address optimization applied
6652 to it, and INSN occurs between the giv insn and the biv
6653 insn, then we must adjust the value used here.
6654 This is rare, so we don't bother to do so. */
6656 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6657 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6658 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6659 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6665 tem
= gen_reg_rtx (mode
);
6667 /* Replace biv with giv's reduced register. */
6668 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6671 /* Compute value to compare against. */
6672 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6673 /* Use it in this insn. */
6674 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6675 if (apply_change_group ())
6679 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6681 if (invariant_p (arg
) == 1)
6683 /* Look for giv with constant positive mult_val and nonconst
6684 add_val. Insert insns to compute new compare value.
6685 ??? Turn this off due to possible overflow. */
6687 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6688 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6689 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6695 /* If the giv V had the auto-inc address optimization applied
6696 to it, and INSN occurs between the giv insn and the biv
6697 insn, then we must adjust the value used here.
6698 This is rare, so we don't bother to do so. */
6700 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6701 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6702 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6703 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6709 tem
= gen_reg_rtx (mode
);
6711 /* Replace biv with giv's reduced register. */
6712 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6715 /* Compute value to compare against. */
6716 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6718 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6719 if (apply_change_group ())
6724 /* This code has problems. Basically, you can't know when
6725 seeing if we will eliminate BL, whether a particular giv
6726 of ARG will be reduced. If it isn't going to be reduced,
6727 we can't eliminate BL. We can try forcing it to be reduced,
6728 but that can generate poor code.
6730 The problem is that the benefit of reducing TV, below should
6731 be increased if BL can actually be eliminated, but this means
6732 we might have to do a topological sort of the order in which
6733 we try to process biv. It doesn't seem worthwhile to do
6734 this sort of thing now. */
6737 /* Otherwise the reg compared with had better be a biv. */
6738 if (GET_CODE (arg
) != REG
6739 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6742 /* Look for a pair of givs, one for each biv,
6743 with identical coefficients. */
6744 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6746 struct induction
*tv
;
6748 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6751 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6752 if (! tv
->ignore
&& ! tv
->maybe_dead
6753 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6754 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6755 && tv
->mode
== mode
)
6757 /* If the giv V had the auto-inc address optimization applied
6758 to it, and INSN occurs between the giv insn and the biv
6759 insn, then we must adjust the value used here.
6760 This is rare, so we don't bother to do so. */
6762 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6763 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6764 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6765 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6771 /* Replace biv with its giv's reduced reg. */
6772 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6773 /* Replace other operand with the other giv's
6775 XEXP (x
, arg_operand
) = tv
->new_reg
;
6782 /* If we get here, the biv can't be eliminated. */
6786 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6787 biv is used in it, since it will be replaced. */
6788 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6789 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6797 /* See if any subexpression fails elimination. */
6798 fmt
= GET_RTX_FORMAT (code
);
6799 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6804 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6805 eliminate_p
, where
))
6810 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6811 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6812 eliminate_p
, where
))
6821 /* Return nonzero if the last use of REG
6822 is in an insn following INSN in the same basic block. */
6825 last_use_this_basic_block (reg
, insn
)
6831 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6834 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6840 /* Called via `note_stores' to record the initial value of a biv. Here we
6841 just record the location of the set and process it later. */
6844 record_initial (dest
, set
)
6848 struct iv_class
*bl
;
6850 if (GET_CODE (dest
) != REG
6851 || REGNO (dest
) >= max_reg_before_loop
6852 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6855 bl
= reg_biv_class
[REGNO (dest
)];
6857 /* If this is the first set found, record it. */
6858 if (bl
->init_insn
== 0)
6860 bl
->init_insn
= note_insn
;
6865 /* If any of the registers in X are "old" and currently have a last use earlier
6866 than INSN, update them to have a last use of INSN. Their actual last use
6867 will be the previous insn but it will not have a valid uid_luid so we can't
6871 update_reg_last_use (x
, insn
)
6875 /* Check for the case where INSN does not have a valid luid. In this case,
6876 there is no need to modify the regno_last_uid, as this can only happen
6877 when code is inserted after the loop_end to set a pseudo's final value,
6878 and hence this insn will never be the last use of x. */
6879 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6880 && INSN_UID (insn
) < max_uid_for_loop
6881 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6882 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6886 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6887 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6890 update_reg_last_use (XEXP (x
, i
), insn
);
6891 else if (fmt
[i
] == 'E')
6892 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6893 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6898 /* Given a jump insn JUMP, return the condition that will cause it to branch
6899 to its JUMP_LABEL. If the condition cannot be understood, or is an
6900 inequality floating-point comparison which needs to be reversed, 0 will
6903 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6904 insn used in locating the condition was found. If a replacement test
6905 of the condition is desired, it should be placed in front of that
6906 insn and we will be sure that the inputs are still valid.
6908 The condition will be returned in a canonical form to simplify testing by
6909 callers. Specifically:
6911 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6912 (2) Both operands will be machine operands; (cc0) will have been replaced.
6913 (3) If an operand is a constant, it will be the second operand.
6914 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6915 for GE, GEU, and LEU. */
6918 get_condition (jump
, earliest
)
6927 int reverse_code
= 0;
6928 int did_reverse_condition
= 0;
6930 /* If this is not a standard conditional jump, we can't parse it. */
6931 if (GET_CODE (jump
) != JUMP_INSN
6932 || ! condjump_p (jump
) || simplejump_p (jump
))
6935 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6936 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6937 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6942 /* If this branches to JUMP_LABEL when the condition is false, reverse
6944 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6945 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6946 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6948 /* If we are comparing a register with zero, see if the register is set
6949 in the previous insn to a COMPARE or a comparison operation. Perform
6950 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6953 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6955 /* Set non-zero when we find something of interest. */
6959 /* If comparison with cc0, import actual comparison from compare
6963 if ((prev
= prev_nonnote_insn (prev
)) == 0
6964 || GET_CODE (prev
) != INSN
6965 || (set
= single_set (prev
)) == 0
6966 || SET_DEST (set
) != cc0_rtx
)
6969 op0
= SET_SRC (set
);
6970 op1
= CONST0_RTX (GET_MODE (op0
));
6976 /* If this is a COMPARE, pick up the two things being compared. */
6977 if (GET_CODE (op0
) == COMPARE
)
6979 op1
= XEXP (op0
, 1);
6980 op0
= XEXP (op0
, 0);
6983 else if (GET_CODE (op0
) != REG
)
6986 /* Go back to the previous insn. Stop if it is not an INSN. We also
6987 stop if it isn't a single set or if it has a REG_INC note because
6988 we don't want to bother dealing with it. */
6990 if ((prev
= prev_nonnote_insn (prev
)) == 0
6991 || GET_CODE (prev
) != INSN
6992 || FIND_REG_INC_NOTE (prev
, 0)
6993 || (set
= single_set (prev
)) == 0)
6996 /* If this is setting OP0, get what it sets it to if it looks
6998 if (rtx_equal_p (SET_DEST (set
), op0
))
7000 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
7002 if ((GET_CODE (SET_SRC (set
)) == COMPARE
7005 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7006 && (GET_MODE_BITSIZE (inner_mode
)
7007 <= HOST_BITS_PER_WIDE_INT
)
7008 && (STORE_FLAG_VALUE
7009 & ((HOST_WIDE_INT
) 1
7010 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7011 #ifdef FLOAT_STORE_FLAG_VALUE
7013 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7014 && FLOAT_STORE_FLAG_VALUE
< 0)
7017 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
7019 else if (((code
== EQ
7021 && (GET_MODE_BITSIZE (inner_mode
)
7022 <= HOST_BITS_PER_WIDE_INT
)
7023 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7024 && (STORE_FLAG_VALUE
7025 & ((HOST_WIDE_INT
) 1
7026 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7027 #ifdef FLOAT_STORE_FLAG_VALUE
7029 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7030 && FLOAT_STORE_FLAG_VALUE
< 0)
7033 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
7035 /* We might have reversed a LT to get a GE here. But this wasn't
7036 actually the comparison of data, so we don't flag that we
7037 have had to reverse the condition. */
7038 did_reverse_condition
^= 1;
7046 else if (reg_set_p (op0
, prev
))
7047 /* If this sets OP0, but not directly, we have to give up. */
7052 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
7053 code
= GET_CODE (x
);
7056 code
= reverse_condition (code
);
7057 did_reverse_condition
^= 1;
7061 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
7067 /* If constant is first, put it last. */
7068 if (CONSTANT_P (op0
))
7069 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
7071 /* If OP0 is the result of a comparison, we weren't able to find what
7072 was really being compared, so fail. */
7073 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
7076 /* Canonicalize any ordered comparison with integers involving equality
7077 if we can do computations in the relevant mode and we do not
7080 if (GET_CODE (op1
) == CONST_INT
7081 && GET_MODE (op0
) != VOIDmode
7082 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
7084 HOST_WIDE_INT const_val
= INTVAL (op1
);
7085 unsigned HOST_WIDE_INT uconst_val
= const_val
;
7086 unsigned HOST_WIDE_INT max_val
7087 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
7092 if (const_val
!= max_val
>> 1)
7093 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7096 /* When cross-compiling, const_val might be sign-extended from
7097 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7099 if ((const_val
& max_val
)
7100 != (((HOST_WIDE_INT
) 1
7101 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7102 code
= GT
, op1
= GEN_INT (const_val
- 1);
7106 if (uconst_val
< max_val
)
7107 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7111 if (uconst_val
!= 0)
7112 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7120 /* If this was floating-point and we reversed anything other than an
7121 EQ or NE, return zero. */
7122 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7123 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7125 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7129 /* Never return CC0; return zero instead. */
7134 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
7137 /* Similar to above routine, except that we also put an invariant last
7138 unless both operands are invariants. */
7141 get_condition_for_loop (x
)
7144 rtx comparison
= get_condition (x
, NULL_PTR
);
7147 || ! invariant_p (XEXP (comparison
, 0))
7148 || invariant_p (XEXP (comparison
, 1)))
7151 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7152 XEXP (comparison
, 1), XEXP (comparison
, 0));
7156 /* Analyze a loop in order to instrument it with the use of count register.
7157 loop_start and loop_end are the first and last insns of the loop.
7158 This function works in cooperation with insert_bct ().
7159 loop_can_insert_bct[loop_num] is set according to whether the optimization
7160 is applicable to the loop. When it is applicable, the following variables
7162 loop_start_value[loop_num]
7163 loop_comparison_value[loop_num]
7164 loop_increment[loop_num]
7165 loop_comparison_code[loop_num] */
7168 void analyze_loop_iterations (loop_start
, loop_end
)
7169 rtx loop_start
, loop_end
;
7171 rtx comparison
, comparison_value
;
7172 rtx iteration_var
, initial_value
, increment
;
7173 enum rtx_code comparison_code
;
7179 /* loop_variable mode */
7180 enum machine_mode original_mode
;
7182 /* find the number of the loop */
7183 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7185 /* we change our mind only when we are sure that loop will be instrumented */
7186 loop_can_insert_bct
[loop_num
] = 0;
7188 /* is the optimization suppressed. */
7189 if ( !flag_branch_on_count_reg
)
7192 /* make sure that count-reg is not in use */
7193 if (loop_used_count_register
[loop_num
]){
7194 if (loop_dump_stream
)
7195 fprintf (loop_dump_stream
,
7196 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7201 /* make sure that the function has no indirect jumps. */
7202 if (indirect_jump_in_function
){
7203 if (loop_dump_stream
)
7204 fprintf (loop_dump_stream
,
7205 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7210 /* make sure that the last loop insn is a conditional jump */
7211 last_loop_insn
= PREV_INSN (loop_end
);
7212 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7213 if (loop_dump_stream
)
7214 fprintf (loop_dump_stream
,
7215 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7220 /* First find the iteration variable. If the last insn is a conditional
7221 branch, and the insn preceding it tests a register value, make that
7222 register the iteration variable. */
7224 /* We used to use prev_nonnote_insn here, but that fails because it might
7225 accidentally get the branch for a contained loop if the branch for this
7226 loop was deleted. We can only trust branches immediately before the
7229 comparison
= get_condition_for_loop (last_loop_insn
);
7230 /* ??? Get_condition may switch position of induction variable and
7231 invariant register when it canonicalizes the comparison. */
7233 if (comparison
== 0) {
7234 if (loop_dump_stream
)
7235 fprintf (loop_dump_stream
,
7236 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7241 comparison_code
= GET_CODE (comparison
);
7242 iteration_var
= XEXP (comparison
, 0);
7243 comparison_value
= XEXP (comparison
, 1);
7245 original_mode
= GET_MODE (iteration_var
);
7246 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7247 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7248 if (loop_dump_stream
)
7249 fprintf (loop_dump_stream
,
7250 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7255 /* get info about loop bounds and increment */
7256 iteration_info (iteration_var
, &initial_value
, &increment
,
7257 loop_start
, loop_end
);
7259 /* make sure that all required loop data were found */
7260 if (!(initial_value
&& increment
&& comparison_value
7261 && invariant_p (comparison_value
) && invariant_p (increment
)
7262 && ! indirect_jump_in_function
))
7264 if (loop_dump_stream
) {
7265 fprintf (loop_dump_stream
,
7266 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7267 if (!(initial_value
&& increment
&& comparison_value
)) {
7268 fprintf (loop_dump_stream
, "\tbounds not available: ");
7269 if ( ! initial_value
)
7270 fprintf (loop_dump_stream
, "initial ");
7272 fprintf (loop_dump_stream
, "increment ");
7273 if ( ! comparison_value
)
7274 fprintf (loop_dump_stream
, "comparison ");
7275 fprintf (loop_dump_stream
, "\n");
7277 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7278 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7283 /* make sure that the increment is constant */
7284 if (GET_CODE (increment
) != CONST_INT
) {
7285 if (loop_dump_stream
)
7286 fprintf (loop_dump_stream
,
7287 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7292 /* make sure that the loop contains neither function call, nor jump on table.
7293 (the count register might be altered by the called function, and might
7294 be used for a branch on table). */
7295 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7296 if (GET_CODE (insn
) == CALL_INSN
){
7297 if (loop_dump_stream
)
7298 fprintf (loop_dump_stream
,
7299 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7304 if (GET_CODE (insn
) == JUMP_INSN
7305 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7306 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7307 if (loop_dump_stream
)
7308 fprintf (loop_dump_stream
,
7309 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7315 /* At this point, we are sure that the loop can be instrumented with BCT.
7316 Some of the loops, however, will not be instrumented - the final decision
7317 is taken by insert_bct () */
7318 if (loop_dump_stream
)
7319 fprintf (loop_dump_stream
,
7320 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7323 /* mark all enclosing loops that they cannot use count register */
7324 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7325 marking here may prevent instrumenting an enclosing loop that could
7326 actually be instrumented. But since this is rare, it is safer to mark
7327 here in case the order of calling (analyze/insert)_bct would be changed. */
7328 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7329 loop_used_count_register
[i
] = 1;
7331 /* Set data structures which will be used by the instrumentation phase */
7332 loop_start_value
[loop_num
] = initial_value
;
7333 loop_comparison_value
[loop_num
] = comparison_value
;
7334 loop_increment
[loop_num
] = increment
;
7335 loop_comparison_code
[loop_num
] = comparison_code
;
7336 loop_can_insert_bct
[loop_num
] = 1;
7340 /* instrument loop for insertion of bct instruction. We distinguish between
7341 loops with compile-time bounds, to those with run-time bounds. The loop
7342 behaviour is analized according to the following characteristics/variables:
7344 ; comparison-value: the value to which the iteration counter is compared.
7345 ; initial-value: iteration-counter initial value.
7346 ; increment: iteration-counter increment.
7347 ; Computed variables:
7348 ; increment-direction: the sign of the increment.
7349 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7350 ; range-direction: sign (comparison-value - initial-value)
7351 We give up on the following cases:
7352 ; loop variable overflow.
7353 ; run-time loop bounds with comparison code NE.
7357 insert_bct (loop_start
, loop_end
)
7358 rtx loop_start
, loop_end
;
7360 rtx initial_value
, comparison_value
, increment
;
7361 enum rtx_code comparison_code
;
7363 int increment_direction
, compare_direction
;
7366 /* if the loop condition is <= or >=, the number of iteration
7367 is 1 more than the range of the bounds of the loop */
7368 int add_iteration
= 0;
7370 /* the only machine mode we work with - is the integer of the size that the
7372 enum machine_mode loop_var_mode
= SImode
;
7374 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7376 /* get loop-variables. No need to check that these are valid - already
7377 checked in analyze_loop_iterations (). */
7378 comparison_code
= loop_comparison_code
[loop_num
];
7379 initial_value
= loop_start_value
[loop_num
];
7380 comparison_value
= loop_comparison_value
[loop_num
];
7381 increment
= loop_increment
[loop_num
];
7383 /* check analyze_loop_iterations decision for this loop. */
7384 if (! loop_can_insert_bct
[loop_num
]){
7385 if (loop_dump_stream
)
7386 fprintf (loop_dump_stream
,
7387 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7392 /* It's impossible to instrument a competely unrolled loop. */
7393 if (loop_unroll_factor
[loop_num
] == -1)
7396 /* make sure that the last loop insn is a conditional jump .
7397 This check is repeated from analyze_loop_iterations (),
7398 because unrolling might have changed that. */
7399 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7400 || !condjump_p (PREV_INSN (loop_end
))) {
7401 if (loop_dump_stream
)
7402 fprintf (loop_dump_stream
,
7403 "insert_bct: not instrumenting BCT because of invalid branch\n");
7407 /* fix increment in case loop was unrolled. */
7408 if (loop_unroll_factor
[loop_num
] > 1)
7409 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7411 /* determine properties and directions of the loop */
7412 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7413 switch ( comparison_code
) {
7418 compare_direction
= 1;
7425 compare_direction
= -1;
7429 /* in this case we cannot know the number of iterations */
7430 if (loop_dump_stream
)
7431 fprintf (loop_dump_stream
,
7432 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7439 compare_direction
= 1;
7445 compare_direction
= -1;
7448 compare_direction
= 0;
7455 /* make sure that the loop does not end by an overflow */
7456 if (compare_direction
!= increment_direction
) {
7457 if (loop_dump_stream
)
7458 fprintf (loop_dump_stream
,
7459 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7464 /* try to instrument the loop. */
7466 /* Handle the simpler case, where the bounds are known at compile time. */
7467 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7470 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7472 /* check the relation between compare-val and initial-val */
7473 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7474 int range_direction
= (difference
> 0) ? 1 : -1;
7476 /* make sure the loop executes enough iterations to gain from BCT */
7477 if (difference
> -3 && difference
< 3) {
7478 if (loop_dump_stream
)
7479 fprintf (loop_dump_stream
,
7480 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7485 /* make sure that the loop executes at least once */
7486 if ((range_direction
== 1 && compare_direction
== -1)
7487 || (range_direction
== -1 && compare_direction
== 1))
7489 if (loop_dump_stream
)
7490 fprintf (loop_dump_stream
,
7491 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7496 /* make sure that the loop does not end by an overflow (in compile time
7497 bounds we must have an additional check for overflow, because here
7498 we also support the compare code of 'NE'. */
7499 if (comparison_code
== NE
7500 && increment_direction
!= range_direction
) {
7501 if (loop_dump_stream
)
7502 fprintf (loop_dump_stream
,
7503 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7508 /* Determine the number of iterations by:
7510 ; compare-val - initial-val + (increment -1) + additional-iteration
7511 ; num_iterations = -----------------------------------------------------------------
7514 difference
= (range_direction
> 0) ? difference
: -difference
;
7516 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7517 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7518 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7519 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7520 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7523 if (increment_value_abs
== 0) {
7524 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7527 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7528 / increment_value_abs
;
7531 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7533 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7535 /* Done with this loop. */
7539 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7540 /* In this case we generate run_time calculation of the number of iterations */
7542 /* With runtime bounds, if the compare is of the form '!=' we give up */
7543 if (comparison_code
== NE
) {
7544 if (loop_dump_stream
)
7545 fprintf (loop_dump_stream
,
7546 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7552 /* We rely on the existence of run-time guard to ensure that the
7553 loop executes at least once. */
7555 rtx iterations_num_reg
;
7557 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7559 /* make sure that the increment is a power of two, otherwise (an
7560 expensive) divide is needed. */
7561 if (exact_log2 (increment_value_abs
) == -1)
7563 if (loop_dump_stream
)
7564 fprintf (loop_dump_stream
,
7565 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7569 /* compute the number of iterations */
7574 /* Again, the number of iterations is calculated by:
7576 ; compare-val - initial-val + (increment -1) + additional-iteration
7577 ; num_iterations = -----------------------------------------------------------------
7580 /* ??? Do we have to call copy_rtx here before passing rtx to
7582 if (compare_direction
> 0) {
7583 /* <, <= :the loop variable is increasing */
7584 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7585 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7588 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7589 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7592 if (increment_value_abs
- 1 + add_iteration
!= 0)
7593 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7594 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7595 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7597 if (increment_value_abs
!= 1)
7599 /* ??? This will generate an expensive divide instruction for
7600 most targets. The original authors apparently expected this
7601 to be a shift, since they test for power-of-2 divisors above,
7602 but just naively generating a divide instruction will not give
7603 a shift. It happens to work for the PowerPC target because
7604 the rs6000.md file has a divide pattern that emits shifts.
7605 It will probably not work for any other target. */
7606 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7608 GEN_INT (increment_value_abs
),
7609 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7612 iterations_num_reg
= temp_reg
;
7614 sequence
= gen_sequence ();
7616 emit_insn_before (sequence
, loop_start
);
7617 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7621 /* instrument loop by inserting a bct in it. This is done in the following way:
7622 1. A new register is created and assigned the hard register number of the count
7624 2. In the head of the loop the new variable is initialized by the value passed in the
7625 loop_num_iterations parameter.
7626 3. At the end of the loop, comparison of the register with 0 is generated.
7627 The created comparison follows the pattern defined for the
7628 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7630 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7631 not used elsewhere, it will be eliminated by data-flow analisys. */
7634 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7635 rtx loop_start
, loop_end
;
7636 rtx loop_num_iterations
;
7638 rtx temp_reg1
, temp_reg2
;
7642 enum machine_mode loop_var_mode
= SImode
;
7644 #ifdef HAVE_decrement_and_branch_on_count
7645 if (HAVE_decrement_and_branch_on_count
)
7647 if (loop_dump_stream
)
7648 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7650 /* eliminate the check on the old variable */
7651 delete_insn (PREV_INSN (loop_end
));
7652 delete_insn (PREV_INSN (loop_end
));
7654 /* insert the label which will delimit the start of the loop */
7655 start_label
= gen_label_rtx ();
7656 emit_label_after (start_label
, loop_start
);
7658 /* insert initialization of the count register into the loop header */
7660 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7661 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7663 /* this will be count register */
7664 temp_reg2
= gen_rtx_REG (loop_var_mode
, COUNT_REGISTER_REGNUM
);
7665 /* we have to move the value to the count register from an GPR
7666 because rtx pointed to by loop_num_iterations could contain
7667 expression which cannot be moved into count register */
7668 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7670 sequence
= gen_sequence ();
7672 emit_insn_after (sequence
, loop_start
);
7674 /* insert new comparison on the count register instead of the
7675 old one, generating the needed BCT pattern (that will be
7676 later recognized by assembly generation phase). */
7677 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7679 LABEL_NUSES (start_label
)++;
7682 #endif /* HAVE_decrement_and_branch_on_count */
7686 /* Scan the function and determine whether it has indirect (computed) jumps.
7688 This is taken mostly from flow.c; similar code exists elsewhere
7689 in the compiler. It may be useful to put this into rtlanal.c. */
7691 indirect_jump_in_function_p (start
)
7696 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
7697 if (computed_jump_p (insn
))