1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num
;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
81 /* For each loop, gives the containing loop number, -1 if none. */
86 /* The main output of analyze_loop_iterations is placed here */
88 int *loop_can_insert_bct
;
90 /* For each loop, determines whether some of its inner loops has used
93 int *loop_used_count_register
;
95 /* loop parameters for arithmetic loops. These loops have a loop variable
96 which is initialized to loop_start_value, incremented in each iteration
97 by "loop_increment". At the end of the iteration the loop variable is
98 compared to the loop_comparison_value (using loop_comparison_code). */
101 rtx
*loop_comparison_value
;
102 rtx
*loop_start_value
;
103 enum rtx_code
*loop_comparison_code
;
106 /* For each loop, keep track of its unrolling factor.
110 -1: completely unrolled
111 >0: holds the unroll exact factor. */
112 int *loop_unroll_factor
;
114 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
115 really a loop (an insn outside the loop branches into it). */
117 static char *loop_invalid
;
119 /* Indexed by loop number, links together all LABEL_REFs which refer to
120 code labels outside the loop. Used by routines that need to know all
121 loop exits, such as final_biv_value and final_giv_value.
123 This does not include loop exits due to return instructions. This is
124 because all bivs and givs are pseudos, and hence must be dead after a
125 return, so the presense of a return does not affect any of the
126 optimizations that use this info. It is simpler to just not include return
127 instructions on this list. */
129 rtx
*loop_number_exit_labels
;
131 /* Indexed by loop number, counts the number of LABEL_REFs on
132 loop_number_exit_labels for this loop and all loops nested inside it. */
134 int *loop_number_exit_count
;
136 /* Holds the number of loop iterations. It is zero if the number could not be
137 calculated. Must be unsigned since the number of iterations can
138 be as high as 2^wordsize-1. For loops with a wider iterator, this number
139 will be zero if the number of loop iterations is too large for an
140 unsigned integer to hold. */
142 unsigned HOST_WIDE_INT loop_n_iterations
;
144 /* Nonzero if there is a subroutine call in the current loop. */
146 static int loop_has_call
;
148 /* Nonzero if there is a volatile memory reference in the current
151 static int loop_has_volatile
;
153 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
154 current loop. A continue statement will generate a branch to
155 NEXT_INSN (loop_continue). */
157 static rtx loop_continue
;
159 /* Indexed by register number, contains the number of times the reg
160 is set during the loop being scanned.
161 During code motion, a negative value indicates a reg that has been
162 made a candidate; in particular -2 means that it is an candidate that
163 we know is equal to a constant and -1 means that it is an candidate
164 not known equal to a constant.
165 After code motion, regs moved have 0 (which is accurate now)
166 while the failed candidates have the original number of times set.
168 Therefore, at all times, == 0 indicates an invariant register;
169 < 0 a conditionally invariant one. */
171 static int *n_times_set
;
173 /* Original value of n_times_set; same except that this value
174 is not set negative for a reg whose sets have been made candidates
175 and not set to 0 for a reg that is moved. */
177 static int *n_times_used
;
179 /* Index by register number, 1 indicates that the register
180 cannot be moved or strength reduced. */
182 static char *may_not_optimize
;
184 /* Nonzero means reg N has already been moved out of one loop.
185 This reduces the desire to move it out of another. */
187 static char *moved_once
;
189 /* Array of MEMs that are stored in this loop. If there are too many to fit
190 here, we just turn on unknown_address_altered. */
192 #define NUM_STORES 30
193 static rtx loop_store_mems
[NUM_STORES
];
195 /* Index of first available slot in above array. */
196 static int loop_store_mems_idx
;
198 /* Nonzero if we don't know what MEMs were changed in the current loop.
199 This happens if the loop contains a call (in which case `loop_has_call'
200 will also be set) or if we store into more than NUM_STORES MEMs. */
202 static int unknown_address_altered
;
204 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
205 static int num_movables
;
207 /* Count of memory write instructions discovered in the loop. */
208 static int num_mem_sets
;
210 /* Number of loops contained within the current one, including itself. */
211 static int loops_enclosed
;
213 /* Bound on pseudo register number before loop optimization.
214 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
215 int max_reg_before_loop
;
217 /* This obstack is used in product_cheap_p to allocate its rtl. It
218 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
219 If we used the same obstack that it did, we would be deallocating
222 static struct obstack temp_obstack
;
224 /* This is where the pointer to the obstack being used for RTL is stored. */
226 extern struct obstack
*rtl_obstack
;
228 #define obstack_chunk_alloc xmalloc
229 #define obstack_chunk_free free
231 /* During the analysis of a loop, a chain of `struct movable's
232 is made to record all the movable insns found.
233 Then the entire chain can be scanned to decide which to move. */
237 rtx insn
; /* A movable insn */
238 rtx set_src
; /* The expression this reg is set from. */
239 rtx set_dest
; /* The destination of this SET. */
240 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
241 of any registers used within the LIBCALL. */
242 int consec
; /* Number of consecutive following insns
243 that must be moved with this one. */
244 int regno
; /* The register it sets */
245 short lifetime
; /* lifetime of that register;
246 may be adjusted when matching movables
247 that load the same value are found. */
248 short savings
; /* Number of insns we can move for this reg,
249 including other movables that force this
250 or match this one. */
251 unsigned int cond
: 1; /* 1 if only conditionally movable */
252 unsigned int force
: 1; /* 1 means MUST move this insn */
253 unsigned int global
: 1; /* 1 means reg is live outside this loop */
254 /* If PARTIAL is 1, GLOBAL means something different:
255 that the reg is live outside the range from where it is set
256 to the following label. */
257 unsigned int done
: 1; /* 1 inhibits further processing of this */
259 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
260 In particular, moving it does not make it
262 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
263 load SRC, rather than copying INSN. */
264 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
265 first insn of a consecutive sets group. */
266 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
267 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
268 that we should avoid changing when clearing
269 the rest of the reg. */
270 struct movable
*match
; /* First entry for same value */
271 struct movable
*forces
; /* An insn that must be moved if this is */
272 struct movable
*next
;
275 static struct movable
*the_movables
;
277 FILE *loop_dump_stream
;
279 /* Forward declarations. */
281 static void find_and_verify_loops
PROTO((rtx
));
282 static void mark_loop_jump
PROTO((rtx
, int));
283 static void prescan_loop
PROTO((rtx
, rtx
));
284 static int reg_in_basic_block_p
PROTO((rtx
, rtx
));
285 static int consec_sets_invariant_p
PROTO((rtx
, int, rtx
));
286 static rtx libcall_other_reg
PROTO((rtx
, rtx
));
287 static int labels_in_range_p
PROTO((rtx
, int));
288 static void count_loop_regs_set
PROTO((rtx
, rtx
, char *, rtx
*, int *, int));
289 static void note_addr_stored
PROTO((rtx
, rtx
));
290 static int loop_reg_used_before_p
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
));
291 static void scan_loop
PROTO((rtx
, rtx
, int, int));
293 static void replace_call_address
PROTO((rtx
, rtx
, rtx
));
295 static rtx skip_consec_insns
PROTO((rtx
, int));
296 static int libcall_benefit
PROTO((rtx
));
297 static void ignore_some_movables
PROTO((struct movable
*));
298 static void force_movables
PROTO((struct movable
*));
299 static void combine_movables
PROTO((struct movable
*, int));
300 static int regs_match_p
PROTO((rtx
, rtx
, struct movable
*));
301 static int rtx_equal_for_loop_p
PROTO((rtx
, rtx
, struct movable
*));
302 static void add_label_notes
PROTO((rtx
, rtx
));
303 static void move_movables
PROTO((struct movable
*, int, int, rtx
, rtx
, int));
304 static int count_nonfixed_reads
PROTO((rtx
));
305 static void strength_reduce
PROTO((rtx
, rtx
, rtx
, int, rtx
, rtx
, int));
306 static void find_single_use_in_loop
PROTO((rtx
, rtx
, rtx
*));
307 static int valid_initial_value_p
PROTO((rtx
, rtx
, int, rtx
));
308 static void find_mem_givs
PROTO((rtx
, rtx
, int, rtx
, rtx
));
309 static void record_biv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, int, int));
310 static void check_final_value
PROTO((struct induction
*, rtx
, rtx
));
311 static void record_giv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
, int, enum g_types
, int, rtx
*, rtx
, rtx
));
312 static void update_giv_derive
PROTO((rtx
));
313 static int basic_induction_var
PROTO((rtx
, enum machine_mode
, rtx
, rtx
, rtx
*, rtx
*));
314 static rtx simplify_giv_expr
PROTO((rtx
, int *));
315 static int general_induction_var
PROTO((rtx
, rtx
*, rtx
*, rtx
*, int, int *));
316 static int consec_sets_giv
PROTO((int, rtx
, rtx
, rtx
, rtx
*, rtx
*));
317 static int check_dbra_loop
PROTO((rtx
, int, rtx
));
318 static rtx express_from_1
PROTO((rtx
, rtx
, rtx
));
319 static rtx express_from
PROTO((struct induction
*, struct induction
*));
320 static rtx combine_givs_p
PROTO((struct induction
*, struct induction
*));
321 static void combine_givs
PROTO((struct iv_class
*));
322 static int product_cheap_p
PROTO((rtx
, rtx
));
323 static int maybe_eliminate_biv
PROTO((struct iv_class
*, rtx
, rtx
, int, int, int));
324 static int maybe_eliminate_biv_1
PROTO((rtx
, rtx
, struct iv_class
*, int, rtx
));
325 static int last_use_this_basic_block
PROTO((rtx
, rtx
));
326 static void record_initial
PROTO((rtx
, rtx
));
327 static void update_reg_last_use
PROTO((rtx
, rtx
));
330 /* This is extern from unroll.c */
331 extern void iteration_info
PROTO((rtx
, rtx
*, rtx
*, rtx
, rtx
));
333 /* Two main functions for implementing bct:
334 first - to be called before loop unrolling, and the second - after */
335 #ifdef HAVE_decrement_and_branch_on_count
336 static void analyze_loop_iterations
PROTO((rtx
, rtx
));
337 static void insert_bct
PROTO((rtx
, rtx
));
339 /* Auxiliary function that inserts the bct pattern into the loop */
340 static void instrument_loop_bct
PROTO((rtx
, rtx
, rtx
));
341 #endif /* HAVE_decrement_and_branch_on_count */
344 /* Indirect_jump_in_function is computed once per function. */
345 int indirect_jump_in_function
= 0;
346 static int indirect_jump_in_function_p
PROTO((rtx
));
349 /* Relative gain of eliminating various kinds of operations. */
352 static int shift_cost
;
353 static int mult_cost
;
356 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
357 copy the value of the strength reduced giv to its original register. */
358 static int copy_cost
;
360 /* Cost of using a register, to normalize the benefits of a giv. */
361 static int reg_address_cost
;
367 char *free_point
= (char *) oballoc (1);
368 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
370 add_cost
= rtx_cost (gen_rtx_PLUS (word_mode
, reg
, reg
), SET
);
373 reg_address_cost
= ADDRESS_COST (reg
);
375 reg_address_cost
= rtx_cost (reg
, MEM
);
378 /* We multiply by 2 to reconcile the difference in scale between
379 these two ways of computing costs. Otherwise the cost of a copy
380 will be far less than the cost of an add. */
384 /* Free the objects we just allocated. */
387 /* Initialize the obstack used for rtl in product_cheap_p. */
388 gcc_obstack_init (&temp_obstack
);
391 /* Entry point of this file. Perform loop optimization
392 on the current function. F is the first insn of the function
393 and DUMPFILE is a stream for output of a trace of actions taken
394 (or 0 if none should be output). */
397 loop_optimize (f
, dumpfile
, unroll_p
)
398 /* f is the first instruction of a chain of insns for one function */
407 loop_dump_stream
= dumpfile
;
409 init_recog_no_volatile ();
411 max_reg_before_loop
= max_reg_num ();
413 moved_once
= (char *) alloca (max_reg_before_loop
);
414 bzero (moved_once
, max_reg_before_loop
);
418 /* Count the number of loops. */
421 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
423 if (GET_CODE (insn
) == NOTE
424 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
428 /* Don't waste time if no loops. */
429 if (max_loop_num
== 0)
432 /* Get size to use for tables indexed by uids.
433 Leave some space for labels allocated by find_and_verify_loops. */
434 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
436 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
437 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
439 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
440 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
442 /* Allocate tables for recording each loop. We set each entry, so they need
444 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
445 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
446 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
447 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
448 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
449 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
451 /* This is initialized by the unrolling code, so we go ahead
452 and clear them just in case we are not performing loop
454 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
455 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
458 /* Allocate for BCT optimization */
459 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
460 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
462 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
463 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
465 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
466 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
467 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
468 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
469 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
470 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
473 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
474 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
477 /* Find and process each loop.
478 First, find them, and record them in order of their beginnings. */
479 find_and_verify_loops (f
);
481 /* Now find all register lifetimes. This must be done after
482 find_and_verify_loops, because it might reorder the insns in the
484 reg_scan (f
, max_reg_num (), 1);
486 /* This must occur after reg_scan so that registers created by gcse
487 will have entries in the register tables.
489 We could have added a call to reg_scan after gcse_main in toplev.c,
490 but moving this call to init_alias_analysis is more efficient. */
491 init_alias_analysis ();
493 /* See if we went too far. */
494 if (get_max_uid () > max_uid_for_loop
)
496 /* Now reset it to the actual size we need. See above. */
497 max_uid_for_loop
= get_max_uid () + 1;
499 /* Compute the mapping from uids to luids.
500 LUIDs are numbers assigned to insns, like uids,
501 except that luids increase monotonically through the code.
502 Don't assign luids to line-number NOTEs, so that the distance in luids
503 between two insns is not affected by -g. */
505 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
508 if (GET_CODE (insn
) != NOTE
509 || NOTE_LINE_NUMBER (insn
) <= 0)
510 uid_luid
[INSN_UID (insn
)] = ++i
;
512 /* Give a line number note the same luid as preceding insn. */
513 uid_luid
[INSN_UID (insn
)] = i
;
518 /* Don't leave gaps in uid_luid for insns that have been
519 deleted. It is possible that the first or last insn
520 using some register has been deleted by cross-jumping.
521 Make sure that uid_luid for that former insn's uid
522 points to the general area where that insn used to be. */
523 for (i
= 0; i
< max_uid_for_loop
; i
++)
525 uid_luid
[0] = uid_luid
[i
];
526 if (uid_luid
[0] != 0)
529 for (i
= 0; i
< max_uid_for_loop
; i
++)
530 if (uid_luid
[i
] == 0)
531 uid_luid
[i
] = uid_luid
[i
- 1];
533 /* Create a mapping from loops to BLOCK tree nodes. */
534 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
535 find_loop_tree_blocks ();
537 /* Determine if the function has indirect jump. On some systems
538 this prevents low overhead loop instructions from being used. */
539 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
541 /* Now scan the loops, last ones first, since this means inner ones are done
542 before outer ones. */
543 for (i
= max_loop_num
-1; i
>= 0; i
--)
544 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
545 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
546 max_reg_num (), unroll_p
);
548 /* If debugging and unrolling loops, we must replicate the tree nodes
549 corresponding to the blocks inside the loop, so that the original one
550 to one mapping will remain. */
551 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
552 unroll_block_trees ();
554 end_alias_analysis ();
557 /* Optimize one loop whose start is LOOP_START and end is END.
558 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
559 NOTE_INSN_LOOP_END. */
561 /* ??? Could also move memory writes out of loops if the destination address
562 is invariant, the source is invariant, the memory write is not volatile,
563 and if we can prove that no read inside the loop can read this address
564 before the write occurs. If there is a read of this address after the
565 write, then we can also mark the memory read as invariant. */
568 scan_loop (loop_start
, end
, nregs
, unroll_p
)
575 /* 1 if we are scanning insns that could be executed zero times. */
577 /* 1 if we are scanning insns that might never be executed
578 due to a subroutine call which might exit before they are reached. */
580 /* For a rotated loop that is entered near the bottom,
581 this is the label at the top. Otherwise it is zero. */
583 /* Jump insn that enters the loop, or 0 if control drops in. */
584 rtx loop_entry_jump
= 0;
585 /* Place in the loop where control enters. */
587 /* Number of insns in the loop. */
592 /* The SET from an insn, if it is the only SET in the insn. */
594 /* Chain describing insns movable in current loop. */
595 struct movable
*movables
= 0;
596 /* Last element in `movables' -- so we can add elements at the end. */
597 struct movable
*last_movable
= 0;
598 /* Ratio of extra register life span we can justify
599 for saving an instruction. More if loop doesn't call subroutines
600 since in that case saving an insn makes more difference
601 and more registers are available. */
603 /* If we have calls, contains the insn in which a register was used
604 if it was used exactly once; contains const0_rtx if it was used more
606 rtx
*reg_single_usage
= 0;
607 /* Nonzero if we are scanning instructions in a sub-loop. */
610 n_times_set
= (int *) alloca (nregs
* sizeof (int));
611 n_times_used
= (int *) alloca (nregs
* sizeof (int));
612 may_not_optimize
= (char *) alloca (nregs
);
614 /* Determine whether this loop starts with a jump down to a test at
615 the end. This will occur for a small number of loops with a test
616 that is too complex to duplicate in front of the loop.
618 We search for the first insn or label in the loop, skipping NOTEs.
619 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
620 (because we might have a loop executed only once that contains a
621 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
622 (in case we have a degenerate loop).
624 Note that if we mistakenly think that a loop is entered at the top
625 when, in fact, it is entered at the exit test, the only effect will be
626 slightly poorer optimization. Making the opposite error can generate
627 incorrect code. Since very few loops now start with a jump to the
628 exit test, the code here to detect that case is very conservative. */
630 for (p
= NEXT_INSN (loop_start
);
632 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
633 && (GET_CODE (p
) != NOTE
634 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
635 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
641 /* Set up variables describing this loop. */
642 prescan_loop (loop_start
, end
);
643 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
645 /* If loop has a jump before the first label,
646 the true entry is the target of that jump.
647 Start scan from there.
648 But record in LOOP_TOP the place where the end-test jumps
649 back to so we can scan that after the end of the loop. */
650 if (GET_CODE (p
) == JUMP_INSN
)
654 /* Loop entry must be unconditional jump (and not a RETURN) */
656 && JUMP_LABEL (p
) != 0
657 /* Check to see whether the jump actually
658 jumps out of the loop (meaning it's no loop).
659 This case can happen for things like
660 do {..} while (0). If this label was generated previously
661 by loop, we can't tell anything about it and have to reject
663 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
664 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
665 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
667 loop_top
= next_label (scan_start
);
668 scan_start
= JUMP_LABEL (p
);
672 /* If SCAN_START was an insn created by loop, we don't know its luid
673 as required by loop_reg_used_before_p. So skip such loops. (This
674 test may never be true, but it's best to play it safe.)
676 Also, skip loops where we do not start scanning at a label. This
677 test also rejects loops starting with a JUMP_INSN that failed the
680 if (INSN_UID (scan_start
) >= max_uid_for_loop
681 || GET_CODE (scan_start
) != CODE_LABEL
)
683 if (loop_dump_stream
)
684 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
685 INSN_UID (loop_start
), INSN_UID (end
));
689 /* Count number of times each reg is set during this loop.
690 Set may_not_optimize[I] if it is not safe to move out
691 the setting of register I. If this loop has calls, set
692 reg_single_usage[I]. */
694 bzero ((char *) n_times_set
, nregs
* sizeof (int));
695 bzero (may_not_optimize
, nregs
);
699 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
700 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
703 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
704 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
706 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
707 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
708 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
710 if (loop_dump_stream
)
712 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
713 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
715 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
716 INSN_UID (loop_continue
));
719 /* Scan through the loop finding insns that are safe to move.
720 Set n_times_set negative for the reg being set, so that
721 this reg will be considered invariant for subsequent insns.
722 We consider whether subsequent insns use the reg
723 in deciding whether it is worth actually moving.
725 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
726 and therefore it is possible that the insns we are scanning
727 would never be executed. At such times, we must make sure
728 that it is safe to execute the insn once instead of zero times.
729 When MAYBE_NEVER is 0, all insns will be executed at least once
730 so that is not a problem. */
736 /* At end of a straight-in loop, we are done.
737 At end of a loop entered at the bottom, scan the top. */
750 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
751 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
753 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
754 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
757 if (GET_CODE (p
) == INSN
758 && (set
= single_set (p
))
759 && GET_CODE (SET_DEST (set
)) == REG
760 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
765 rtx src
= SET_SRC (set
);
766 rtx dependencies
= 0;
768 /* Figure out what to use as a source of this insn. If a REG_EQUIV
769 note is given or if a REG_EQUAL note with a constant operand is
770 specified, use it as the source and mark that we should move
771 this insn by calling emit_move_insn rather that duplicating the
774 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
776 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
778 src
= XEXP (temp
, 0), move_insn
= 1;
781 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
782 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
783 src
= XEXP (temp
, 0), move_insn
= 1;
784 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
786 src
= XEXP (temp
, 0);
787 /* A libcall block can use regs that don't appear in
788 the equivalent expression. To move the libcall,
789 we must move those regs too. */
790 dependencies
= libcall_other_reg (p
, src
);
794 /* Don't try to optimize a register that was made
795 by loop-optimization for an inner loop.
796 We don't know its life-span, so we can't compute the benefit. */
797 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
799 /* In order to move a register, we need to have one of three cases:
800 (1) it is used only in the same basic block as the set
801 (2) it is not a user variable and it is not used in the
802 exit test (this can cause the variable to be used
803 before it is set just like a user-variable).
804 (3) the set is guaranteed to be executed once the loop starts,
805 and the reg is not used until after that. */
806 else if (! ((! maybe_never
807 && ! loop_reg_used_before_p (set
, p
, loop_start
,
809 || (! REG_USERVAR_P (SET_DEST (set
))
810 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
811 || reg_in_basic_block_p (p
, SET_DEST (set
))))
813 else if ((tem
= invariant_p (src
))
814 && (dependencies
== 0
815 || (tem2
= invariant_p (dependencies
)) != 0)
816 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
818 = consec_sets_invariant_p (SET_DEST (set
),
819 n_times_set
[REGNO (SET_DEST (set
))],
821 /* If the insn can cause a trap (such as divide by zero),
822 can't move it unless it's guaranteed to be executed
823 once loop is entered. Even a function call might
824 prevent the trap insn from being reached
825 (since it might exit!) */
826 && ! ((maybe_never
|| call_passed
)
827 && may_trap_p (src
)))
829 register struct movable
*m
;
830 register int regno
= REGNO (SET_DEST (set
));
832 /* A potential lossage is where we have a case where two insns
833 can be combined as long as they are both in the loop, but
834 we move one of them outside the loop. For large loops,
835 this can lose. The most common case of this is the address
836 of a function being called.
838 Therefore, if this register is marked as being used exactly
839 once if we are in a loop with calls (a "large loop"), see if
840 we can replace the usage of this register with the source
841 of this SET. If we can, delete this insn.
843 Don't do this if P has a REG_RETVAL note or if we have
844 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
846 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
847 && reg_single_usage
[regno
] != const0_rtx
848 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
849 && (REGNO_LAST_UID (regno
)
850 == INSN_UID (reg_single_usage
[regno
]))
851 && n_times_set
[REGNO (SET_DEST (set
))] == 1
852 && ! side_effects_p (SET_SRC (set
))
853 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
854 && (! SMALL_REGISTER_CLASSES
855 || (! (GET_CODE (SET_SRC (set
)) == REG
856 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
857 /* This test is not redundant; SET_SRC (set) might be
858 a call-clobbered register and the life of REGNO
859 might span a call. */
860 && ! modified_between_p (SET_SRC (set
), p
,
861 reg_single_usage
[regno
])
862 && no_labels_between_p (p
, reg_single_usage
[regno
])
863 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
864 reg_single_usage
[regno
]))
866 /* Replace any usage in a REG_EQUAL note. Must copy the
867 new source, so that we don't get rtx sharing between the
868 SET_SOURCE and REG_NOTES of insn p. */
869 REG_NOTES (reg_single_usage
[regno
])
870 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
871 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
874 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
875 NOTE_SOURCE_FILE (p
) = 0;
876 n_times_set
[regno
] = 0;
880 m
= (struct movable
*) alloca (sizeof (struct movable
));
884 m
->dependencies
= dependencies
;
885 m
->set_dest
= SET_DEST (set
);
887 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
891 m
->move_insn
= move_insn
;
892 m
->move_insn_first
= 0;
893 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
894 m
->savemode
= VOIDmode
;
896 /* Set M->cond if either invariant_p or consec_sets_invariant_p
897 returned 2 (only conditionally invariant). */
898 m
->cond
= ((tem
| tem1
| tem2
) > 1);
899 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
900 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
902 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
903 - uid_luid
[REGNO_FIRST_UID (regno
)]);
904 m
->savings
= n_times_used
[regno
];
905 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
906 m
->savings
+= libcall_benefit (p
);
907 n_times_set
[regno
] = move_insn
? -2 : -1;
908 /* Add M to the end of the chain MOVABLES. */
912 last_movable
->next
= m
;
917 /* It is possible for the first instruction to have a
918 REG_EQUAL note but a non-invariant SET_SRC, so we must
919 remember the status of the first instruction in case
920 the last instruction doesn't have a REG_EQUAL note. */
921 m
->move_insn_first
= m
->move_insn
;
923 /* Skip this insn, not checking REG_LIBCALL notes. */
924 p
= next_nonnote_insn (p
);
925 /* Skip the consecutive insns, if there are any. */
926 p
= skip_consec_insns (p
, m
->consec
);
927 /* Back up to the last insn of the consecutive group. */
928 p
= prev_nonnote_insn (p
);
930 /* We must now reset m->move_insn, m->is_equiv, and possibly
931 m->set_src to correspond to the effects of all the
933 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
935 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
938 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
939 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
940 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
945 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
948 /* If this register is always set within a STRICT_LOW_PART
949 or set to zero, then its high bytes are constant.
950 So clear them outside the loop and within the loop
951 just load the low bytes.
952 We must check that the machine has an instruction to do so.
953 Also, if the value loaded into the register
954 depends on the same register, this cannot be done. */
955 else if (SET_SRC (set
) == const0_rtx
956 && GET_CODE (NEXT_INSN (p
)) == INSN
957 && (set1
= single_set (NEXT_INSN (p
)))
958 && GET_CODE (set1
) == SET
959 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
960 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
961 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
963 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
965 register int regno
= REGNO (SET_DEST (set
));
966 if (n_times_set
[regno
] == 2)
968 register struct movable
*m
;
969 m
= (struct movable
*) alloca (sizeof (struct movable
));
972 m
->set_dest
= SET_DEST (set
);
979 m
->move_insn_first
= 0;
981 /* If the insn may not be executed on some cycles,
982 we can't clear the whole reg; clear just high part.
983 Not even if the reg is used only within this loop.
990 Clearing x before the inner loop could clobber a value
991 being saved from the last time around the outer loop.
992 However, if the reg is not used outside this loop
993 and all uses of the register are in the same
994 basic block as the store, there is no problem.
996 If this insn was made by loop, we don't know its
997 INSN_LUID and hence must make a conservative
999 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1000 || (uid_luid
[REGNO_LAST_UID (regno
)]
1002 || (uid_luid
[REGNO_FIRST_UID (regno
)]
1004 || (labels_in_range_p
1005 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
1006 if (maybe_never
&& m
->global
)
1007 m
->savemode
= GET_MODE (SET_SRC (set1
));
1009 m
->savemode
= VOIDmode
;
1013 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
1014 - uid_luid
[REGNO_FIRST_UID (regno
)]);
1016 n_times_set
[regno
] = -1;
1017 /* Add M to the end of the chain MOVABLES. */
1021 last_movable
->next
= m
;
1026 /* Past a call insn, we get to insns which might not be executed
1027 because the call might exit. This matters for insns that trap.
1028 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1029 so they don't count. */
1030 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1032 /* Past a label or a jump, we get to insns for which we
1033 can't count on whether or how many times they will be
1034 executed during each iteration. Therefore, we can
1035 only move out sets of trivial variables
1036 (those not used after the loop). */
1037 /* Similar code appears twice in strength_reduce. */
1038 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1039 /* If we enter the loop in the middle, and scan around to the
1040 beginning, don't set maybe_never for that. This must be an
1041 unconditional jump, otherwise the code at the top of the
1042 loop might never be executed. Unconditional jumps are
1043 followed a by barrier then loop end. */
1044 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1045 && NEXT_INSN (NEXT_INSN (p
)) == end
1046 && simplejump_p (p
)))
1048 else if (GET_CODE (p
) == NOTE
)
1050 /* At the virtual top of a converted loop, insns are again known to
1051 be executed: logically, the loop begins here even though the exit
1052 code has been duplicated. */
1053 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1054 maybe_never
= call_passed
= 0;
1055 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1057 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1062 /* If one movable subsumes another, ignore that other. */
1064 ignore_some_movables (movables
);
1066 /* For each movable insn, see if the reg that it loads
1067 leads when it dies right into another conditionally movable insn.
1068 If so, record that the second insn "forces" the first one,
1069 since the second can be moved only if the first is. */
1071 force_movables (movables
);
1073 /* See if there are multiple movable insns that load the same value.
1074 If there are, make all but the first point at the first one
1075 through the `match' field, and add the priorities of them
1076 all together as the priority of the first. */
1078 combine_movables (movables
, nregs
);
1080 /* Now consider each movable insn to decide whether it is worth moving.
1081 Store 0 in n_times_set for each reg that is moved.
1083 Generally this increases code size, so do not move moveables when
1084 optimizing for code size. */
1086 if (! optimize_size
)
1087 move_movables (movables
, threshold
,
1088 insn_count
, loop_start
, end
, nregs
);
1090 /* Now candidates that still are negative are those not moved.
1091 Change n_times_set to indicate that those are not actually invariant. */
1092 for (i
= 0; i
< nregs
; i
++)
1093 if (n_times_set
[i
] < 0)
1094 n_times_set
[i
] = n_times_used
[i
];
1096 if (flag_strength_reduce
)
1098 the_movables
= movables
;
1099 strength_reduce (scan_start
, end
, loop_top
,
1100 insn_count
, loop_start
, end
, unroll_p
);
1104 /* Add elements to *OUTPUT to record all the pseudo-regs
1105 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1108 record_excess_regs (in_this
, not_in_this
, output
)
1109 rtx in_this
, not_in_this
;
1116 code
= GET_CODE (in_this
);
1130 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1131 && ! reg_mentioned_p (in_this
, not_in_this
))
1132 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1139 fmt
= GET_RTX_FORMAT (code
);
1140 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1147 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1148 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1152 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1158 /* Check what regs are referred to in the libcall block ending with INSN,
1159 aside from those mentioned in the equivalent value.
1160 If there are none, return 0.
1161 If there are one or more, return an EXPR_LIST containing all of them. */
1164 libcall_other_reg (insn
, equiv
)
1167 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1168 rtx p
= XEXP (note
, 0);
1171 /* First, find all the regs used in the libcall block
1172 that are not mentioned as inputs to the result. */
1176 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1177 || GET_CODE (p
) == CALL_INSN
)
1178 record_excess_regs (PATTERN (p
), equiv
, &output
);
1185 /* Return 1 if all uses of REG
1186 are between INSN and the end of the basic block. */
1189 reg_in_basic_block_p (insn
, reg
)
1192 int regno
= REGNO (reg
);
1195 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1198 /* Search this basic block for the already recorded last use of the reg. */
1199 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1201 switch (GET_CODE (p
))
1208 /* Ordinary insn: if this is the last use, we win. */
1209 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1214 /* Jump insn: if this is the last use, we win. */
1215 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1217 /* Otherwise, it's the end of the basic block, so we lose. */
1222 /* It's the end of the basic block, so we lose. */
1230 /* The "last use" doesn't follow the "first use"?? */
1234 /* Compute the benefit of eliminating the insns in the block whose
1235 last insn is LAST. This may be a group of insns used to compute a
1236 value directly or can contain a library call. */
1239 libcall_benefit (last
)
1245 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1246 insn
!= last
; insn
= NEXT_INSN (insn
))
1248 if (GET_CODE (insn
) == CALL_INSN
)
1249 benefit
+= 10; /* Assume at least this many insns in a library
1251 else if (GET_CODE (insn
) == INSN
1252 && GET_CODE (PATTERN (insn
)) != USE
1253 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1260 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1263 skip_consec_insns (insn
, count
)
1267 for (; count
> 0; count
--)
1271 /* If first insn of libcall sequence, skip to end. */
1272 /* Do this at start of loop, since INSN is guaranteed to
1274 if (GET_CODE (insn
) != NOTE
1275 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1276 insn
= XEXP (temp
, 0);
1278 do insn
= NEXT_INSN (insn
);
1279 while (GET_CODE (insn
) == NOTE
);
1285 /* Ignore any movable whose insn falls within a libcall
1286 which is part of another movable.
1287 We make use of the fact that the movable for the libcall value
1288 was made later and so appears later on the chain. */
1291 ignore_some_movables (movables
)
1292 struct movable
*movables
;
1294 register struct movable
*m
, *m1
;
1296 for (m
= movables
; m
; m
= m
->next
)
1298 /* Is this a movable for the value of a libcall? */
1299 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1303 /* Check for earlier movables inside that range,
1304 and mark them invalid. We cannot use LUIDs here because
1305 insns created by loop.c for prior loops don't have LUIDs.
1306 Rather than reject all such insns from movables, we just
1307 explicitly check each insn in the libcall (since invariant
1308 libcalls aren't that common). */
1309 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1310 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1311 if (m1
->insn
== insn
)
1317 /* For each movable insn, see if the reg that it loads
1318 leads when it dies right into another conditionally movable insn.
1319 If so, record that the second insn "forces" the first one,
1320 since the second can be moved only if the first is. */
1323 force_movables (movables
)
1324 struct movable
*movables
;
1326 register struct movable
*m
, *m1
;
1327 for (m1
= movables
; m1
; m1
= m1
->next
)
1328 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1329 if (!m1
->partial
&& !m1
->done
)
1331 int regno
= m1
->regno
;
1332 for (m
= m1
->next
; m
; m
= m
->next
)
1333 /* ??? Could this be a bug? What if CSE caused the
1334 register of M1 to be used after this insn?
1335 Since CSE does not update regno_last_uid,
1336 this insn M->insn might not be where it dies.
1337 But very likely this doesn't matter; what matters is
1338 that M's reg is computed from M1's reg. */
1339 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1342 if (m
!= 0 && m
->set_src
== m1
->set_dest
1343 /* If m->consec, m->set_src isn't valid. */
1347 /* Increase the priority of the moving the first insn
1348 since it permits the second to be moved as well. */
1352 m1
->lifetime
+= m
->lifetime
;
1353 m1
->savings
+= m
->savings
;
1358 /* Find invariant expressions that are equal and can be combined into
1362 combine_movables (movables
, nregs
)
1363 struct movable
*movables
;
1366 register struct movable
*m
;
1367 char *matched_regs
= (char *) alloca (nregs
);
1368 enum machine_mode mode
;
1370 /* Regs that are set more than once are not allowed to match
1371 or be matched. I'm no longer sure why not. */
1372 /* Perhaps testing m->consec_sets would be more appropriate here? */
1374 for (m
= movables
; m
; m
= m
->next
)
1375 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1377 register struct movable
*m1
;
1378 int regno
= m
->regno
;
1380 bzero (matched_regs
, nregs
);
1381 matched_regs
[regno
] = 1;
1383 /* We want later insns to match the first one. Don't make the first
1384 one match any later ones. So start this loop at m->next. */
1385 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1386 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1387 /* A reg used outside the loop mustn't be eliminated. */
1389 /* A reg used for zero-extending mustn't be eliminated. */
1391 && (matched_regs
[m1
->regno
]
1394 /* Can combine regs with different modes loaded from the
1395 same constant only if the modes are the same or
1396 if both are integer modes with M wider or the same
1397 width as M1. The check for integer is redundant, but
1398 safe, since the only case of differing destination
1399 modes with equal sources is when both sources are
1400 VOIDmode, i.e., CONST_INT. */
1401 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1402 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1403 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1404 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1405 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1406 /* See if the source of M1 says it matches M. */
1407 && ((GET_CODE (m1
->set_src
) == REG
1408 && matched_regs
[REGNO (m1
->set_src
)])
1409 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1411 && ((m
->dependencies
== m1
->dependencies
)
1412 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1414 m
->lifetime
+= m1
->lifetime
;
1415 m
->savings
+= m1
->savings
;
1418 matched_regs
[m1
->regno
] = 1;
1422 /* Now combine the regs used for zero-extension.
1423 This can be done for those not marked `global'
1424 provided their lives don't overlap. */
1426 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1427 mode
= GET_MODE_WIDER_MODE (mode
))
1429 register struct movable
*m0
= 0;
1431 /* Combine all the registers for extension from mode MODE.
1432 Don't combine any that are used outside this loop. */
1433 for (m
= movables
; m
; m
= m
->next
)
1434 if (m
->partial
&& ! m
->global
1435 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1437 register struct movable
*m1
;
1438 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1439 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1443 /* First one: don't check for overlap, just record it. */
1448 /* Make sure they extend to the same mode.
1449 (Almost always true.) */
1450 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1453 /* We already have one: check for overlap with those
1454 already combined together. */
1455 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1456 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1457 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1458 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1461 /* No overlap: we can combine this with the others. */
1462 m0
->lifetime
+= m
->lifetime
;
1463 m0
->savings
+= m
->savings
;
1472 /* Return 1 if regs X and Y will become the same if moved. */
1475 regs_match_p (x
, y
, movables
)
1477 struct movable
*movables
;
1481 struct movable
*mx
, *my
;
1483 for (mx
= movables
; mx
; mx
= mx
->next
)
1484 if (mx
->regno
== xn
)
1487 for (my
= movables
; my
; my
= my
->next
)
1488 if (my
->regno
== yn
)
1492 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1494 || mx
== my
->match
));
1497 /* Return 1 if X and Y are identical-looking rtx's.
1498 This is the Lisp function EQUAL for rtx arguments.
1500 If two registers are matching movables or a movable register and an
1501 equivalent constant, consider them equal. */
1504 rtx_equal_for_loop_p (x
, y
, movables
)
1506 struct movable
*movables
;
1510 register struct movable
*m
;
1511 register enum rtx_code code
;
1516 if (x
== 0 || y
== 0)
1519 code
= GET_CODE (x
);
1521 /* If we have a register and a constant, they may sometimes be
1523 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1526 for (m
= movables
; m
; m
= m
->next
)
1527 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1528 && rtx_equal_p (m
->set_src
, y
))
1531 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1534 for (m
= movables
; m
; m
= m
->next
)
1535 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1536 && rtx_equal_p (m
->set_src
, x
))
1540 /* Otherwise, rtx's of different codes cannot be equal. */
1541 if (code
!= GET_CODE (y
))
1544 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1545 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1547 if (GET_MODE (x
) != GET_MODE (y
))
1550 /* These three types of rtx's can be compared nonrecursively. */
1552 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1554 if (code
== LABEL_REF
)
1555 return XEXP (x
, 0) == XEXP (y
, 0);
1556 if (code
== SYMBOL_REF
)
1557 return XSTR (x
, 0) == XSTR (y
, 0);
1559 /* Compare the elements. If any pair of corresponding elements
1560 fail to match, return 0 for the whole things. */
1562 fmt
= GET_RTX_FORMAT (code
);
1563 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1568 if (XWINT (x
, i
) != XWINT (y
, i
))
1573 if (XINT (x
, i
) != XINT (y
, i
))
1578 /* Two vectors must have the same length. */
1579 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1582 /* And the corresponding elements must match. */
1583 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1584 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1589 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1594 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1599 /* These are just backpointers, so they don't matter. */
1605 /* It is believed that rtx's at this level will never
1606 contain anything but integers and other rtx's,
1607 except for within LABEL_REFs and SYMBOL_REFs. */
1615 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1616 insns in INSNS which use thet reference. */
1619 add_label_notes (x
, insns
)
1623 enum rtx_code code
= GET_CODE (x
);
1628 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1630 rtx next
= next_real_insn (XEXP (x
, 0));
1632 /* Don't record labels that refer to dispatch tables.
1633 This is not necessary, since the tablejump references the same label.
1634 And if we did record them, flow.c would make worse code. */
1636 || ! (GET_CODE (next
) == JUMP_INSN
1637 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1638 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1640 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1641 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1642 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1648 fmt
= GET_RTX_FORMAT (code
);
1649 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1652 add_label_notes (XEXP (x
, i
), insns
);
1653 else if (fmt
[i
] == 'E')
1654 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1655 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1659 /* Scan MOVABLES, and move the insns that deserve to be moved.
1660 If two matching movables are combined, replace one reg with the
1661 other throughout. */
1664 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1665 struct movable
*movables
;
1673 register struct movable
*m
;
1675 /* Map of pseudo-register replacements to handle combining
1676 when we move several insns that load the same value
1677 into different pseudo-registers. */
1678 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1679 char *already_moved
= (char *) alloca (nregs
);
1681 bzero (already_moved
, nregs
);
1682 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1686 for (m
= movables
; m
; m
= m
->next
)
1688 /* Describe this movable insn. */
1690 if (loop_dump_stream
)
1692 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1693 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1695 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1697 fprintf (loop_dump_stream
, "cond ");
1699 fprintf (loop_dump_stream
, "force ");
1701 fprintf (loop_dump_stream
, "global ");
1703 fprintf (loop_dump_stream
, "done ");
1705 fprintf (loop_dump_stream
, "move-insn ");
1707 fprintf (loop_dump_stream
, "matches %d ",
1708 INSN_UID (m
->match
->insn
));
1710 fprintf (loop_dump_stream
, "forces %d ",
1711 INSN_UID (m
->forces
->insn
));
1714 /* Count movables. Value used in heuristics in strength_reduce. */
1717 /* Ignore the insn if it's already done (it matched something else).
1718 Otherwise, see if it is now safe to move. */
1722 || (1 == invariant_p (m
->set_src
)
1723 && (m
->dependencies
== 0
1724 || 1 == invariant_p (m
->dependencies
))
1726 || 1 == consec_sets_invariant_p (m
->set_dest
,
1729 && (! m
->forces
|| m
->forces
->done
))
1733 int savings
= m
->savings
;
1735 /* We have an insn that is safe to move.
1736 Compute its desirability. */
1741 if (loop_dump_stream
)
1742 fprintf (loop_dump_stream
, "savings %d ", savings
);
1744 if (moved_once
[regno
])
1748 if (loop_dump_stream
)
1749 fprintf (loop_dump_stream
, "halved since already moved ");
1752 /* An insn MUST be moved if we already moved something else
1753 which is safe only if this one is moved too: that is,
1754 if already_moved[REGNO] is nonzero. */
1756 /* An insn is desirable to move if the new lifetime of the
1757 register is no more than THRESHOLD times the old lifetime.
1758 If it's not desirable, it means the loop is so big
1759 that moving won't speed things up much,
1760 and it is liable to make register usage worse. */
1762 /* It is also desirable to move if it can be moved at no
1763 extra cost because something else was already moved. */
1765 if (already_moved
[regno
]
1766 || flag_move_all_movables
1767 || (threshold
* savings
* m
->lifetime
) >= insn_count
1768 || (m
->forces
&& m
->forces
->done
1769 && n_times_used
[m
->forces
->regno
] == 1))
1772 register struct movable
*m1
;
1775 /* Now move the insns that set the reg. */
1777 if (m
->partial
&& m
->match
)
1781 /* Find the end of this chain of matching regs.
1782 Thus, we load each reg in the chain from that one reg.
1783 And that reg is loaded with 0 directly,
1784 since it has ->match == 0. */
1785 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1786 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1787 SET_DEST (PATTERN (m1
->insn
)));
1788 i1
= emit_insn_before (newpat
, loop_start
);
1790 /* Mark the moved, invariant reg as being allowed to
1791 share a hard reg with the other matching invariant. */
1792 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1793 r1
= SET_DEST (PATTERN (m
->insn
));
1794 r2
= SET_DEST (PATTERN (m1
->insn
));
1796 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1797 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1799 delete_insn (m
->insn
);
1804 if (loop_dump_stream
)
1805 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1807 /* If we are to re-generate the item being moved with a
1808 new move insn, first delete what we have and then emit
1809 the move insn before the loop. */
1810 else if (m
->move_insn
)
1814 for (count
= m
->consec
; count
>= 0; count
--)
1816 /* If this is the first insn of a library call sequence,
1818 if (GET_CODE (p
) != NOTE
1819 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1822 /* If this is the last insn of a libcall sequence, then
1823 delete every insn in the sequence except the last.
1824 The last insn is handled in the normal manner. */
1825 if (GET_CODE (p
) != NOTE
1826 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1828 temp
= XEXP (temp
, 0);
1830 temp
= delete_insn (temp
);
1833 p
= delete_insn (p
);
1834 while (p
&& GET_CODE (p
) == NOTE
)
1839 emit_move_insn (m
->set_dest
, m
->set_src
);
1840 temp
= get_insns ();
1843 add_label_notes (m
->set_src
, temp
);
1845 i1
= emit_insns_before (temp
, loop_start
);
1846 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1848 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1849 m
->set_src
, REG_NOTES (i1
));
1851 if (loop_dump_stream
)
1852 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1854 /* The more regs we move, the less we like moving them. */
1859 for (count
= m
->consec
; count
>= 0; count
--)
1863 /* If first insn of libcall sequence, skip to end. */
1864 /* Do this at start of loop, since p is guaranteed to
1866 if (GET_CODE (p
) != NOTE
1867 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1870 /* If last insn of libcall sequence, move all
1871 insns except the last before the loop. The last
1872 insn is handled in the normal manner. */
1873 if (GET_CODE (p
) != NOTE
1874 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1878 rtx fn_address_insn
= 0;
1881 for (temp
= XEXP (temp
, 0); temp
!= p
;
1882 temp
= NEXT_INSN (temp
))
1888 if (GET_CODE (temp
) == NOTE
)
1891 body
= PATTERN (temp
);
1893 /* Find the next insn after TEMP,
1894 not counting USE or NOTE insns. */
1895 for (next
= NEXT_INSN (temp
); next
!= p
;
1896 next
= NEXT_INSN (next
))
1897 if (! (GET_CODE (next
) == INSN
1898 && GET_CODE (PATTERN (next
)) == USE
)
1899 && GET_CODE (next
) != NOTE
)
1902 /* If that is the call, this may be the insn
1903 that loads the function address.
1905 Extract the function address from the insn
1906 that loads it into a register.
1907 If this insn was cse'd, we get incorrect code.
1909 So emit a new move insn that copies the
1910 function address into the register that the
1911 call insn will use. flow.c will delete any
1912 redundant stores that we have created. */
1913 if (GET_CODE (next
) == CALL_INSN
1914 && GET_CODE (body
) == SET
1915 && GET_CODE (SET_DEST (body
)) == REG
1916 && (n
= find_reg_note (temp
, REG_EQUAL
,
1919 fn_reg
= SET_SRC (body
);
1920 if (GET_CODE (fn_reg
) != REG
)
1921 fn_reg
= SET_DEST (body
);
1922 fn_address
= XEXP (n
, 0);
1923 fn_address_insn
= temp
;
1925 /* We have the call insn.
1926 If it uses the register we suspect it might,
1927 load it with the correct address directly. */
1928 if (GET_CODE (temp
) == CALL_INSN
1930 && reg_referenced_p (fn_reg
, body
))
1931 emit_insn_after (gen_move_insn (fn_reg
,
1935 if (GET_CODE (temp
) == CALL_INSN
)
1937 i1
= emit_call_insn_before (body
, loop_start
);
1938 /* Because the USAGE information potentially
1939 contains objects other than hard registers
1940 we need to copy it. */
1941 if (CALL_INSN_FUNCTION_USAGE (temp
))
1942 CALL_INSN_FUNCTION_USAGE (i1
)
1943 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1946 i1
= emit_insn_before (body
, loop_start
);
1949 if (temp
== fn_address_insn
)
1950 fn_address_insn
= i1
;
1951 REG_NOTES (i1
) = REG_NOTES (temp
);
1955 if (m
->savemode
!= VOIDmode
)
1957 /* P sets REG to zero; but we should clear only
1958 the bits that are not covered by the mode
1960 rtx reg
= m
->set_dest
;
1966 (GET_MODE (reg
), and_optab
, reg
,
1967 GEN_INT ((((HOST_WIDE_INT
) 1
1968 << GET_MODE_BITSIZE (m
->savemode
)))
1970 reg
, 1, OPTAB_LIB_WIDEN
);
1974 emit_move_insn (reg
, tem
);
1975 sequence
= gen_sequence ();
1977 i1
= emit_insn_before (sequence
, loop_start
);
1979 else if (GET_CODE (p
) == CALL_INSN
)
1981 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1982 /* Because the USAGE information potentially
1983 contains objects other than hard registers
1984 we need to copy it. */
1985 if (CALL_INSN_FUNCTION_USAGE (p
))
1986 CALL_INSN_FUNCTION_USAGE (i1
)
1987 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1989 else if (count
== m
->consec
&& m
->move_insn_first
)
1991 /* The SET_SRC might not be invariant, so we must
1992 use the REG_EQUAL note. */
1994 emit_move_insn (m
->set_dest
, m
->set_src
);
1995 temp
= get_insns ();
1998 add_label_notes (m
->set_src
, temp
);
2000 i1
= emit_insns_before (temp
, loop_start
);
2001 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2003 = gen_rtx_EXPR_LIST ((m
->is_equiv
? REG_EQUIV
2005 m
->set_src
, REG_NOTES (i1
));
2008 i1
= emit_insn_before (PATTERN (p
), loop_start
);
2010 if (REG_NOTES (i1
) == 0)
2012 REG_NOTES (i1
) = REG_NOTES (p
);
2014 /* If there is a REG_EQUAL note present whose value
2015 is not loop invariant, then delete it, since it
2016 may cause problems with later optimization passes.
2017 It is possible for cse to create such notes
2018 like this as a result of record_jump_cond. */
2020 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2021 && ! invariant_p (XEXP (temp
, 0)))
2022 remove_note (i1
, temp
);
2028 if (loop_dump_stream
)
2029 fprintf (loop_dump_stream
, " moved to %d",
2032 /* If library call, now fix the REG_NOTES that contain
2033 insn pointers, namely REG_LIBCALL on FIRST
2034 and REG_RETVAL on I1. */
2035 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2037 XEXP (temp
, 0) = first
;
2038 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2039 XEXP (temp
, 0) = i1
;
2043 do p
= NEXT_INSN (p
);
2044 while (p
&& GET_CODE (p
) == NOTE
);
2047 /* The more regs we move, the less we like moving them. */
2051 /* Any other movable that loads the same register
2053 already_moved
[regno
] = 1;
2055 /* This reg has been moved out of one loop. */
2056 moved_once
[regno
] = 1;
2058 /* The reg set here is now invariant. */
2060 n_times_set
[regno
] = 0;
2064 /* Change the length-of-life info for the register
2065 to say it lives at least the full length of this loop.
2066 This will help guide optimizations in outer loops. */
2068 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2069 /* This is the old insn before all the moved insns.
2070 We can't use the moved insn because it is out of range
2071 in uid_luid. Only the old insns have luids. */
2072 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2073 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2074 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2076 /* Combine with this moved insn any other matching movables. */
2079 for (m1
= movables
; m1
; m1
= m1
->next
)
2084 /* Schedule the reg loaded by M1
2085 for replacement so that shares the reg of M.
2086 If the modes differ (only possible in restricted
2087 circumstances, make a SUBREG. */
2088 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2089 reg_map
[m1
->regno
] = m
->set_dest
;
2092 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2095 /* Get rid of the matching insn
2096 and prevent further processing of it. */
2099 /* if library call, delete all insn except last, which
2101 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2104 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2105 temp
= NEXT_INSN (temp
))
2108 delete_insn (m1
->insn
);
2110 /* Any other movable that loads the same register
2112 already_moved
[m1
->regno
] = 1;
2114 /* The reg merged here is now invariant,
2115 if the reg it matches is invariant. */
2117 n_times_set
[m1
->regno
] = 0;
2120 else if (loop_dump_stream
)
2121 fprintf (loop_dump_stream
, "not desirable");
2123 else if (loop_dump_stream
&& !m
->match
)
2124 fprintf (loop_dump_stream
, "not safe");
2126 if (loop_dump_stream
)
2127 fprintf (loop_dump_stream
, "\n");
2131 new_start
= loop_start
;
2133 /* Go through all the instructions in the loop, making
2134 all the register substitutions scheduled in REG_MAP. */
2135 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2136 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2137 || GET_CODE (p
) == CALL_INSN
)
2139 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2140 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2146 /* Scan X and replace the address of any MEM in it with ADDR.
2147 REG is the address that MEM should have before the replacement. */
2150 replace_call_address (x
, reg
, addr
)
2153 register enum rtx_code code
;
2159 code
= GET_CODE (x
);
2173 /* Short cut for very common case. */
2174 replace_call_address (XEXP (x
, 1), reg
, addr
);
2178 /* Short cut for very common case. */
2179 replace_call_address (XEXP (x
, 0), reg
, addr
);
2183 /* If this MEM uses a reg other than the one we expected,
2184 something is wrong. */
2185 if (XEXP (x
, 0) != reg
)
2194 fmt
= GET_RTX_FORMAT (code
);
2195 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2198 replace_call_address (XEXP (x
, i
), reg
, addr
);
2202 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2203 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2209 /* Return the number of memory refs to addresses that vary
2213 count_nonfixed_reads (x
)
2216 register enum rtx_code code
;
2224 code
= GET_CODE (x
);
2238 return ((invariant_p (XEXP (x
, 0)) != 1)
2239 + count_nonfixed_reads (XEXP (x
, 0)));
2246 fmt
= GET_RTX_FORMAT (code
);
2247 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2250 value
+= count_nonfixed_reads (XEXP (x
, i
));
2254 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2255 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2263 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2264 Replace it with an instruction to load just the low bytes
2265 if the machine supports such an instruction,
2266 and insert above LOOP_START an instruction to clear the register. */
2269 constant_high_bytes (p
, loop_start
)
2273 register int insn_code_number
;
2275 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2276 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2278 new = gen_rtx_SET (VOIDmode
,
2279 gen_rtx_STRICT_LOW_PART (VOIDmode
,
2280 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2281 SET_DEST (PATTERN (p
)),
2283 XEXP (SET_SRC (PATTERN (p
)), 0));
2284 insn_code_number
= recog (new, p
);
2286 if (insn_code_number
)
2290 /* Clear destination register before the loop. */
2291 emit_insn_before (gen_rtx_SET (VOIDmode
, SET_DEST (PATTERN (p
)),
2295 /* Inside the loop, just load the low part. */
2301 /* Scan a loop setting the variables `unknown_address_altered',
2302 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2303 and `loop_has_volatile'.
2304 Also, fill in the array `loop_store_mems'. */
2307 prescan_loop (start
, end
)
2310 register int level
= 1;
2313 unknown_address_altered
= 0;
2315 loop_has_volatile
= 0;
2316 loop_store_mems_idx
= 0;
2322 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2323 insn
= NEXT_INSN (insn
))
2325 if (GET_CODE (insn
) == NOTE
)
2327 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2330 /* Count number of loops contained in this one. */
2333 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2342 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2345 loop_continue
= insn
;
2348 else if (GET_CODE (insn
) == CALL_INSN
)
2350 if (! CONST_CALL_P (insn
))
2351 unknown_address_altered
= 1;
2356 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2358 if (volatile_refs_p (PATTERN (insn
)))
2359 loop_has_volatile
= 1;
2361 note_stores (PATTERN (insn
), note_addr_stored
);
2367 /* Scan the function looking for loops. Record the start and end of each loop.
2368 Also mark as invalid loops any loops that contain a setjmp or are branched
2369 to from outside the loop. */
2372 find_and_verify_loops (f
)
2376 int current_loop
= -1;
2380 /* If there are jumps to undefined labels,
2381 treat them as jumps out of any/all loops.
2382 This also avoids writing past end of tables when there are no loops. */
2383 uid_loop_num
[0] = -1;
2385 /* Find boundaries of loops, mark which loops are contained within
2386 loops, and invalidate loops that have setjmp. */
2388 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2390 if (GET_CODE (insn
) == NOTE
)
2391 switch (NOTE_LINE_NUMBER (insn
))
2393 case NOTE_INSN_LOOP_BEG
:
2394 loop_number_loop_starts
[++next_loop
] = insn
;
2395 loop_number_loop_ends
[next_loop
] = 0;
2396 loop_outer_loop
[next_loop
] = current_loop
;
2397 loop_invalid
[next_loop
] = 0;
2398 loop_number_exit_labels
[next_loop
] = 0;
2399 loop_number_exit_count
[next_loop
] = 0;
2400 current_loop
= next_loop
;
2403 case NOTE_INSN_SETJMP
:
2404 /* In this case, we must invalidate our current loop and any
2406 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2408 loop_invalid
[loop
] = 1;
2409 if (loop_dump_stream
)
2410 fprintf (loop_dump_stream
,
2411 "\nLoop at %d ignored due to setjmp.\n",
2412 INSN_UID (loop_number_loop_starts
[loop
]));
2416 case NOTE_INSN_LOOP_END
:
2417 if (current_loop
== -1)
2420 loop_number_loop_ends
[current_loop
] = insn
;
2421 current_loop
= loop_outer_loop
[current_loop
];
2428 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2429 enclosing loop, but this doesn't matter. */
2430 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2433 /* Any loop containing a label used in an initializer must be invalidated,
2434 because it can be jumped into from anywhere. */
2436 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2440 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2442 loop_num
= loop_outer_loop
[loop_num
])
2443 loop_invalid
[loop_num
] = 1;
2446 /* Any loop containing a label used for an exception handler must be
2447 invalidated, because it can be jumped into from anywhere. */
2449 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2453 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2455 loop_num
= loop_outer_loop
[loop_num
])
2456 loop_invalid
[loop_num
] = 1;
2459 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2460 loop that it is not contained within, that loop is marked invalid.
2461 If any INSN or CALL_INSN uses a label's address, then the loop containing
2462 that label is marked invalid, because it could be jumped into from
2465 Also look for blocks of code ending in an unconditional branch that
2466 exits the loop. If such a block is surrounded by a conditional
2467 branch around the block, move the block elsewhere (see below) and
2468 invert the jump to point to the code block. This may eliminate a
2469 label in our loop and will simplify processing by both us and a
2470 possible second cse pass. */
2472 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2473 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2475 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2477 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2479 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2484 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2486 loop_num
= loop_outer_loop
[loop_num
])
2487 loop_invalid
[loop_num
] = 1;
2491 if (GET_CODE (insn
) != JUMP_INSN
)
2494 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2496 /* See if this is an unconditional branch outside the loop. */
2497 if (this_loop_num
!= -1
2498 && (GET_CODE (PATTERN (insn
)) == RETURN
2499 || (simplejump_p (insn
)
2500 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2502 && get_max_uid () < max_uid_for_loop
)
2505 rtx our_next
= next_real_insn (insn
);
2507 int outer_loop
= -1;
2509 /* Go backwards until we reach the start of the loop, a label,
2511 for (p
= PREV_INSN (insn
);
2512 GET_CODE (p
) != CODE_LABEL
2513 && ! (GET_CODE (p
) == NOTE
2514 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2515 && GET_CODE (p
) != JUMP_INSN
;
2519 /* Check for the case where we have a jump to an inner nested
2520 loop, and do not perform the optimization in that case. */
2522 if (JUMP_LABEL (insn
))
2524 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2525 if (dest_loop
!= -1)
2527 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2528 outer_loop
= loop_outer_loop
[outer_loop
])
2529 if (outer_loop
== this_loop_num
)
2534 /* Make sure that the target of P is within the current loop. */
2536 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2537 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2538 outer_loop
= this_loop_num
;
2540 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2541 we have a block of code to try to move.
2543 We look backward and then forward from the target of INSN
2544 to find a BARRIER at the same loop depth as the target.
2545 If we find such a BARRIER, we make a new label for the start
2546 of the block, invert the jump in P and point it to that label,
2547 and move the block of code to the spot we found. */
2549 if (outer_loop
== -1
2550 && GET_CODE (p
) == JUMP_INSN
2551 && JUMP_LABEL (p
) != 0
2552 /* Just ignore jumps to labels that were never emitted.
2553 These always indicate compilation errors. */
2554 && INSN_UID (JUMP_LABEL (p
)) != 0
2556 && ! simplejump_p (p
)
2557 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2560 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2561 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2564 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2565 if (GET_CODE (loc
) == BARRIER
2566 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2570 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2571 if (GET_CODE (loc
) == BARRIER
2572 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2577 rtx cond_label
= JUMP_LABEL (p
);
2578 rtx new_label
= get_label_after (p
);
2580 /* Ensure our label doesn't go away. */
2581 LABEL_NUSES (cond_label
)++;
2583 /* Verify that uid_loop_num is large enough and that
2585 if (invert_jump (p
, new_label
))
2589 /* If no suitable BARRIER was found, create a suitable
2590 one before TARGET. Since TARGET is a fall through
2591 path, we'll need to insert an jump around our block
2592 and a add a BARRIER before TARGET.
2594 This creates an extra unconditional jump outside
2595 the loop. However, the benefits of removing rarely
2596 executed instructions from inside the loop usually
2597 outweighs the cost of the extra unconditional jump
2598 outside the loop. */
2603 temp
= gen_jump (JUMP_LABEL (insn
));
2604 temp
= emit_jump_insn_before (temp
, target
);
2605 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2606 LABEL_NUSES (JUMP_LABEL (insn
))++;
2607 loc
= emit_barrier_before (target
);
2610 /* Include the BARRIER after INSN and copy the
2612 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2613 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2615 /* All those insns are now in TARGET_LOOP_NUM. */
2616 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2618 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2620 /* The label jumped to by INSN is no longer a loop exit.
2621 Unless INSN does not have a label (e.g., it is a
2622 RETURN insn), search loop_number_exit_labels to find
2623 its label_ref, and remove it. Also turn off
2624 LABEL_OUTSIDE_LOOP_P bit. */
2625 if (JUMP_LABEL (insn
))
2630 r
= loop_number_exit_labels
[this_loop_num
];
2631 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2632 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2634 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2636 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2638 loop_number_exit_labels
[this_loop_num
]
2639 = LABEL_NEXTREF (r
);
2643 for (loop_num
= this_loop_num
;
2644 loop_num
!= -1 && loop_num
!= target_loop_num
;
2645 loop_num
= loop_outer_loop
[loop_num
])
2646 loop_number_exit_count
[loop_num
]--;
2648 /* If we didn't find it, then something is wrong. */
2653 /* P is now a jump outside the loop, so it must be put
2654 in loop_number_exit_labels, and marked as such.
2655 The easiest way to do this is to just call
2656 mark_loop_jump again for P. */
2657 mark_loop_jump (PATTERN (p
), this_loop_num
);
2659 /* If INSN now jumps to the insn after it,
2661 if (JUMP_LABEL (insn
) != 0
2662 && (next_real_insn (JUMP_LABEL (insn
))
2663 == next_real_insn (insn
)))
2667 /* Continue the loop after where the conditional
2668 branch used to jump, since the only branch insn
2669 in the block (if it still remains) is an inter-loop
2670 branch and hence needs no processing. */
2671 insn
= NEXT_INSN (cond_label
);
2673 if (--LABEL_NUSES (cond_label
) == 0)
2674 delete_insn (cond_label
);
2676 /* This loop will be continued with NEXT_INSN (insn). */
2677 insn
= PREV_INSN (insn
);
2684 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2685 loops it is contained in, mark the target loop invalid.
2687 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2690 mark_loop_jump (x
, loop_num
)
2698 switch (GET_CODE (x
))
2711 /* There could be a label reference in here. */
2712 mark_loop_jump (XEXP (x
, 0), loop_num
);
2718 mark_loop_jump (XEXP (x
, 0), loop_num
);
2719 mark_loop_jump (XEXP (x
, 1), loop_num
);
2724 mark_loop_jump (XEXP (x
, 0), loop_num
);
2728 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2730 /* Link together all labels that branch outside the loop. This
2731 is used by final_[bg]iv_value and the loop unrolling code. Also
2732 mark this LABEL_REF so we know that this branch should predict
2735 /* A check to make sure the label is not in an inner nested loop,
2736 since this does not count as a loop exit. */
2737 if (dest_loop
!= -1)
2739 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2740 outer_loop
= loop_outer_loop
[outer_loop
])
2741 if (outer_loop
== loop_num
)
2747 if (loop_num
!= -1 && outer_loop
== -1)
2749 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2750 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2751 loop_number_exit_labels
[loop_num
] = x
;
2753 for (outer_loop
= loop_num
;
2754 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2755 outer_loop
= loop_outer_loop
[outer_loop
])
2756 loop_number_exit_count
[outer_loop
]++;
2759 /* If this is inside a loop, but not in the current loop or one enclosed
2760 by it, it invalidates at least one loop. */
2762 if (dest_loop
== -1)
2765 /* We must invalidate every nested loop containing the target of this
2766 label, except those that also contain the jump insn. */
2768 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2770 /* Stop when we reach a loop that also contains the jump insn. */
2771 for (outer_loop
= loop_num
; outer_loop
!= -1;
2772 outer_loop
= loop_outer_loop
[outer_loop
])
2773 if (dest_loop
== outer_loop
)
2776 /* If we get here, we know we need to invalidate a loop. */
2777 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2778 fprintf (loop_dump_stream
,
2779 "\nLoop at %d ignored due to multiple entry points.\n",
2780 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2782 loop_invalid
[dest_loop
] = 1;
2787 /* If this is not setting pc, ignore. */
2788 if (SET_DEST (x
) == pc_rtx
)
2789 mark_loop_jump (SET_SRC (x
), loop_num
);
2793 mark_loop_jump (XEXP (x
, 1), loop_num
);
2794 mark_loop_jump (XEXP (x
, 2), loop_num
);
2799 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2800 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2804 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2805 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2809 /* Treat anything else (such as a symbol_ref)
2810 as a branch out of this loop, but not into any loop. */
2815 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2816 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2819 loop_number_exit_labels
[loop_num
] = x
;
2821 for (outer_loop
= loop_num
; outer_loop
!= -1;
2822 outer_loop
= loop_outer_loop
[outer_loop
])
2823 loop_number_exit_count
[outer_loop
]++;
2829 /* Return nonzero if there is a label in the range from
2830 insn INSN to and including the insn whose luid is END
2831 INSN must have an assigned luid (i.e., it must not have
2832 been previously created by loop.c). */
2835 labels_in_range_p (insn
, end
)
2839 while (insn
&& INSN_LUID (insn
) <= end
)
2841 if (GET_CODE (insn
) == CODE_LABEL
)
2843 insn
= NEXT_INSN (insn
);
2849 /* Record that a memory reference X is being set. */
2852 note_addr_stored (x
, y
)
2854 rtx y ATTRIBUTE_UNUSED
;
2858 if (x
== 0 || GET_CODE (x
) != MEM
)
2861 /* Count number of memory writes.
2862 This affects heuristics in strength_reduce. */
2865 /* BLKmode MEM means all memory is clobbered. */
2866 if (GET_MODE (x
) == BLKmode
)
2867 unknown_address_altered
= 1;
2869 if (unknown_address_altered
)
2872 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2873 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2874 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2876 /* We are storing at the same address as previously noted. Save the
2878 if (GET_MODE_SIZE (GET_MODE (x
))
2879 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2880 loop_store_mems
[i
] = x
;
2884 if (i
== NUM_STORES
)
2885 unknown_address_altered
= 1;
2887 else if (i
== loop_store_mems_idx
)
2888 loop_store_mems
[loop_store_mems_idx
++] = x
;
2891 /* Return nonzero if the rtx X is invariant over the current loop.
2893 The value is 2 if we refer to something only conditionally invariant.
2895 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2896 Otherwise, a memory ref is invariant if it does not conflict with
2897 anything stored in `loop_store_mems'. */
2904 register enum rtx_code code
;
2906 int conditional
= 0;
2910 code
= GET_CODE (x
);
2920 /* A LABEL_REF is normally invariant, however, if we are unrolling
2921 loops, and this label is inside the loop, then it isn't invariant.
2922 This is because each unrolled copy of the loop body will have
2923 a copy of this label. If this was invariant, then an insn loading
2924 the address of this label into a register might get moved outside
2925 the loop, and then each loop body would end up using the same label.
2927 We don't know the loop bounds here though, so just fail for all
2929 if (flag_unroll_loops
)
2936 case UNSPEC_VOLATILE
:
2940 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2941 since the reg might be set by initialization within the loop. */
2943 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2944 || x
== arg_pointer_rtx
)
2945 && ! current_function_has_nonlocal_goto
)
2949 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2952 if (n_times_set
[REGNO (x
)] < 0)
2955 return n_times_set
[REGNO (x
)] == 0;
2958 /* Volatile memory references must be rejected. Do this before
2959 checking for read-only items, so that volatile read-only items
2960 will be rejected also. */
2961 if (MEM_VOLATILE_P (x
))
2964 /* Read-only items (such as constants in a constant pool) are
2965 invariant if their address is. */
2966 if (RTX_UNCHANGING_P (x
))
2969 /* If we filled the table (or had a subroutine call), any location
2970 in memory could have been clobbered. */
2971 if (unknown_address_altered
)
2974 /* See if there is any dependence between a store and this load. */
2975 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2976 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2979 /* It's not invalidated by a store in memory
2980 but we must still verify the address is invariant. */
2984 /* Don't mess with insns declared volatile. */
2985 if (MEM_VOLATILE_P (x
))
2993 fmt
= GET_RTX_FORMAT (code
);
2994 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2998 int tem
= invariant_p (XEXP (x
, i
));
3004 else if (fmt
[i
] == 'E')
3007 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3009 int tem
= invariant_p (XVECEXP (x
, i
, j
));
3019 return 1 + conditional
;
3023 /* Return nonzero if all the insns in the loop that set REG
3024 are INSN and the immediately following insns,
3025 and if each of those insns sets REG in an invariant way
3026 (not counting uses of REG in them).
3028 The value is 2 if some of these insns are only conditionally invariant.
3030 We assume that INSN itself is the first set of REG
3031 and that its source is invariant. */
3034 consec_sets_invariant_p (reg
, n_sets
, insn
)
3038 register rtx p
= insn
;
3039 register int regno
= REGNO (reg
);
3041 /* Number of sets we have to insist on finding after INSN. */
3042 int count
= n_sets
- 1;
3043 int old
= n_times_set
[regno
];
3047 /* If N_SETS hit the limit, we can't rely on its value. */
3051 n_times_set
[regno
] = 0;
3055 register enum rtx_code code
;
3059 code
= GET_CODE (p
);
3061 /* If library call, skip to end of it. */
3062 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3067 && (set
= single_set (p
))
3068 && GET_CODE (SET_DEST (set
)) == REG
3069 && REGNO (SET_DEST (set
)) == regno
)
3071 this = invariant_p (SET_SRC (set
));
3074 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3076 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3077 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3079 this = (CONSTANT_P (XEXP (temp
, 0))
3080 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3081 && invariant_p (XEXP (temp
, 0))));
3088 else if (code
!= NOTE
)
3090 n_times_set
[regno
] = old
;
3095 n_times_set
[regno
] = old
;
3096 /* If invariant_p ever returned 2, we return 2. */
3097 return 1 + (value
& 2);
3101 /* I don't think this condition is sufficient to allow INSN
3102 to be moved, so we no longer test it. */
3104 /* Return 1 if all insns in the basic block of INSN and following INSN
3105 that set REG are invariant according to TABLE. */
3108 all_sets_invariant_p (reg
, insn
, table
)
3112 register rtx p
= insn
;
3113 register int regno
= REGNO (reg
);
3117 register enum rtx_code code
;
3119 code
= GET_CODE (p
);
3120 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3122 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3123 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3124 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3126 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3133 /* Look at all uses (not sets) of registers in X. For each, if it is
3134 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3135 a different insn, set USAGE[REGNO] to const0_rtx. */
3138 find_single_use_in_loop (insn
, x
, usage
)
3143 enum rtx_code code
= GET_CODE (x
);
3144 char *fmt
= GET_RTX_FORMAT (code
);
3149 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3150 ? const0_rtx
: insn
;
3152 else if (code
== SET
)
3154 /* Don't count SET_DEST if it is a REG; otherwise count things
3155 in SET_DEST because if a register is partially modified, it won't
3156 show up as a potential movable so we don't care how USAGE is set
3158 if (GET_CODE (SET_DEST (x
)) != REG
)
3159 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3160 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3163 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3165 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3166 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3167 else if (fmt
[i
] == 'E')
3168 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3169 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3173 /* Increment N_TIMES_SET at the index of each register
3174 that is modified by an insn between FROM and TO.
3175 If the value of an element of N_TIMES_SET becomes 127 or more,
3176 stop incrementing it, to avoid overflow.
3178 Store in SINGLE_USAGE[I] the single insn in which register I is
3179 used, if it is only used once. Otherwise, it is set to 0 (for no
3180 uses) or const0_rtx for more than one use. This parameter may be zero,
3181 in which case this processing is not done.
3183 Store in *COUNT_PTR the number of actual instruction
3184 in the loop. We use this to decide what is worth moving out. */
3186 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3187 In that case, it is the insn that last set reg n. */
3190 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3191 register rtx from
, to
;
3197 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3199 register int count
= 0;
3202 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3203 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3205 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3209 /* If requested, record registers that have exactly one use. */
3212 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3214 /* Include uses in REG_EQUAL notes. */
3215 if (REG_NOTES (insn
))
3216 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3219 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3220 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3221 /* Don't move a reg that has an explicit clobber.
3222 We might do so sometimes, but it's not worth the pain. */
3223 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3225 if (GET_CODE (PATTERN (insn
)) == SET
3226 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3228 dest
= SET_DEST (PATTERN (insn
));
3229 while (GET_CODE (dest
) == SUBREG
3230 || GET_CODE (dest
) == ZERO_EXTRACT
3231 || GET_CODE (dest
) == SIGN_EXTRACT
3232 || GET_CODE (dest
) == STRICT_LOW_PART
)
3233 dest
= XEXP (dest
, 0);
3234 if (GET_CODE (dest
) == REG
)
3236 register int regno
= REGNO (dest
);
3237 /* If this is the first setting of this reg
3238 in current basic block, and it was set before,
3239 it must be set in two basic blocks, so it cannot
3240 be moved out of the loop. */
3241 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3242 may_not_move
[regno
] = 1;
3243 /* If this is not first setting in current basic block,
3244 see if reg was used in between previous one and this.
3245 If so, neither one can be moved. */
3246 if (last_set
[regno
] != 0
3247 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3248 may_not_move
[regno
] = 1;
3249 if (n_times_set
[regno
] < 127)
3250 ++n_times_set
[regno
];
3251 last_set
[regno
] = insn
;
3254 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3257 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3259 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3260 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3261 /* Don't move a reg that has an explicit clobber.
3262 It's not worth the pain to try to do it correctly. */
3263 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3265 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3267 dest
= SET_DEST (x
);
3268 while (GET_CODE (dest
) == SUBREG
3269 || GET_CODE (dest
) == ZERO_EXTRACT
3270 || GET_CODE (dest
) == SIGN_EXTRACT
3271 || GET_CODE (dest
) == STRICT_LOW_PART
)
3272 dest
= XEXP (dest
, 0);
3273 if (GET_CODE (dest
) == REG
)
3275 register int regno
= REGNO (dest
);
3276 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3277 may_not_move
[regno
] = 1;
3278 if (last_set
[regno
] != 0
3279 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3280 may_not_move
[regno
] = 1;
3281 if (n_times_set
[regno
] < 127)
3282 ++n_times_set
[regno
];
3283 last_set
[regno
] = insn
;
3290 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3291 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3296 /* Given a loop that is bounded by LOOP_START and LOOP_END
3297 and that is entered at SCAN_START,
3298 return 1 if the register set in SET contained in insn INSN is used by
3299 any insn that precedes INSN in cyclic order starting
3300 from the loop entry point.
3302 We don't want to use INSN_LUID here because if we restrict INSN to those
3303 that have a valid INSN_LUID, it means we cannot move an invariant out
3304 from an inner loop past two loops. */
3307 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3308 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3310 rtx reg
= SET_DEST (set
);
3313 /* Scan forward checking for register usage. If we hit INSN, we
3314 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3315 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3317 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3318 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3328 /* A "basic induction variable" or biv is a pseudo reg that is set
3329 (within this loop) only by incrementing or decrementing it. */
3330 /* A "general induction variable" or giv is a pseudo reg whose
3331 value is a linear function of a biv. */
3333 /* Bivs are recognized by `basic_induction_var';
3334 Givs by `general_induction_var'. */
3336 /* Indexed by register number, indicates whether or not register is an
3337 induction variable, and if so what type. */
3339 enum iv_mode
*reg_iv_type
;
3341 /* Indexed by register number, contains pointer to `struct induction'
3342 if register is an induction variable. This holds general info for
3343 all induction variables. */
3345 struct induction
**reg_iv_info
;
3347 /* Indexed by register number, contains pointer to `struct iv_class'
3348 if register is a basic induction variable. This holds info describing
3349 the class (a related group) of induction variables that the biv belongs
3352 struct iv_class
**reg_biv_class
;
3354 /* The head of a list which links together (via the next field)
3355 every iv class for the current loop. */
3357 struct iv_class
*loop_iv_list
;
3359 /* Communication with routines called via `note_stores'. */
3361 static rtx note_insn
;
3363 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3365 static rtx addr_placeholder
;
3367 /* ??? Unfinished optimizations, and possible future optimizations,
3368 for the strength reduction code. */
3370 /* ??? There is one more optimization you might be interested in doing: to
3371 allocate pseudo registers for frequently-accessed memory locations.
3372 If the same memory location is referenced each time around, it might
3373 be possible to copy it into a register before and out after.
3374 This is especially useful when the memory location is a variable which
3375 is in a stack slot because somewhere its address is taken. If the
3376 loop doesn't contain a function call and the variable isn't volatile,
3377 it is safe to keep the value in a register for the duration of the
3378 loop. One tricky thing is that the copying of the value back from the
3379 register has to be done on all exits from the loop. You need to check that
3380 all the exits from the loop go to the same place. */
3382 /* ??? The interaction of biv elimination, and recognition of 'constant'
3383 bivs, may cause problems. */
3385 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3386 performance problems.
3388 Perhaps don't eliminate things that can be combined with an addressing
3389 mode. Find all givs that have the same biv, mult_val, and add_val;
3390 then for each giv, check to see if its only use dies in a following
3391 memory address. If so, generate a new memory address and check to see
3392 if it is valid. If it is valid, then store the modified memory address,
3393 otherwise, mark the giv as not done so that it will get its own iv. */
3395 /* ??? Could try to optimize branches when it is known that a biv is always
3398 /* ??? When replace a biv in a compare insn, we should replace with closest
3399 giv so that an optimized branch can still be recognized by the combiner,
3400 e.g. the VAX acb insn. */
3402 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3403 was rerun in loop_optimize whenever a register was added or moved.
3404 Also, some of the optimizations could be a little less conservative. */
3406 /* Perform strength reduction and induction variable elimination. */
3408 /* Pseudo registers created during this function will be beyond the last
3409 valid index in several tables including n_times_set and regno_last_uid.
3410 This does not cause a problem here, because the added registers cannot be
3411 givs outside of their loop, and hence will never be reconsidered.
3412 But scan_loop must check regnos to make sure they are in bounds. */
3415 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3416 loop_start
, loop_end
, unroll_p
)
3430 /* This is 1 if current insn is not executed at least once for every loop
3432 int not_every_iteration
= 0;
3433 /* This is 1 if current insn may be executed more than once for every
3435 int maybe_multiple
= 0;
3436 /* Temporary list pointers for traversing loop_iv_list. */
3437 struct iv_class
*bl
, **backbl
;
3438 /* Ratio of extra register life span we can justify
3439 for saving an instruction. More if loop doesn't call subroutines
3440 since in that case saving an insn makes more difference
3441 and more registers are available. */
3442 /* ??? could set this to last value of threshold in move_movables */
3443 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3444 /* Map of pseudo-register replacements. */
3448 rtx end_insert_before
;
3451 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3452 * sizeof (enum iv_mode
*));
3453 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3454 reg_iv_info
= (struct induction
**)
3455 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3456 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3457 * sizeof (struct induction
*)));
3458 reg_biv_class
= (struct iv_class
**)
3459 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3460 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3461 * sizeof (struct iv_class
*)));
3464 addr_placeholder
= gen_reg_rtx (Pmode
);
3466 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3467 must be put before this insn, so that they will appear in the right
3468 order (i.e. loop order).
3470 If loop_end is the end of the current function, then emit a
3471 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3473 if (NEXT_INSN (loop_end
) != 0)
3474 end_insert_before
= NEXT_INSN (loop_end
);
3476 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3478 /* Scan through loop to find all possible bivs. */
3484 /* At end of a straight-in loop, we are done.
3485 At end of a loop entered at the bottom, scan the top. */
3486 if (p
== scan_start
)
3494 if (p
== scan_start
)
3498 if (GET_CODE (p
) == INSN
3499 && (set
= single_set (p
))
3500 && GET_CODE (SET_DEST (set
)) == REG
)
3502 dest_reg
= SET_DEST (set
);
3503 if (REGNO (dest_reg
) < max_reg_before_loop
3504 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3505 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3507 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3508 dest_reg
, p
, &inc_val
, &mult_val
))
3510 /* It is a possible basic induction variable.
3511 Create and initialize an induction structure for it. */
3514 = (struct induction
*) alloca (sizeof (struct induction
));
3516 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3517 not_every_iteration
, maybe_multiple
);
3518 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3520 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3521 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3525 /* Past CODE_LABEL, we get to insns that may be executed multiple
3526 times. The only way we can be sure that they can't is if every
3527 jump insn between here and the end of the loop either
3528 returns, exits the loop, is a forward jump, or is a jump
3529 to the loop start. */
3531 if (GET_CODE (p
) == CODE_LABEL
)
3539 insn
= NEXT_INSN (insn
);
3540 if (insn
== scan_start
)
3548 if (insn
== scan_start
)
3552 if (GET_CODE (insn
) == JUMP_INSN
3553 && GET_CODE (PATTERN (insn
)) != RETURN
3554 && (! condjump_p (insn
)
3555 || (JUMP_LABEL (insn
) != 0
3556 && JUMP_LABEL (insn
) != scan_start
3557 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3558 || INSN_UID (insn
) >= max_uid_for_loop
3559 || (INSN_LUID (JUMP_LABEL (insn
))
3560 < INSN_LUID (insn
))))))
3568 /* Past a jump, we get to insns for which we can't count
3569 on whether they will be executed during each iteration. */
3570 /* This code appears twice in strength_reduce. There is also similar
3571 code in scan_loop. */
3572 if (GET_CODE (p
) == JUMP_INSN
3573 /* If we enter the loop in the middle, and scan around to the
3574 beginning, don't set not_every_iteration for that.
3575 This can be any kind of jump, since we want to know if insns
3576 will be executed if the loop is executed. */
3577 && ! (JUMP_LABEL (p
) == loop_top
3578 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3579 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3583 /* If this is a jump outside the loop, then it also doesn't
3584 matter. Check to see if the target of this branch is on the
3585 loop_number_exits_labels list. */
3587 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3589 label
= LABEL_NEXTREF (label
))
3590 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3594 not_every_iteration
= 1;
3597 else if (GET_CODE (p
) == NOTE
)
3599 /* At the virtual top of a converted loop, insns are again known to
3600 be executed each iteration: logically, the loop begins here
3601 even though the exit code has been duplicated. */
3602 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3603 not_every_iteration
= 0;
3604 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3606 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3610 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3611 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3612 or not an insn is known to be executed each iteration of the
3613 loop, whether or not any iterations are known to occur.
3615 Therefore, if we have just passed a label and have no more labels
3616 between here and the test insn of the loop, we know these insns
3617 will be executed each iteration. */
3619 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3620 && no_labels_between_p (p
, loop_end
))
3621 not_every_iteration
= 0;
3624 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3625 Make a sanity check against n_times_set. */
3626 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3628 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3629 /* Above happens if register modified by subreg, etc. */
3630 /* Make sure it is not recognized as a basic induction var: */
3631 || n_times_set
[bl
->regno
] != bl
->biv_count
3632 /* If never incremented, it is invariant that we decided not to
3633 move. So leave it alone. */
3634 || ! bl
->incremented
)
3636 if (loop_dump_stream
)
3637 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3639 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3640 ? "not induction variable"
3641 : (! bl
->incremented
? "never incremented"
3644 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3651 if (loop_dump_stream
)
3652 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3656 /* Exit if there are no bivs. */
3659 /* Can still unroll the loop anyways, but indicate that there is no
3660 strength reduction info available. */
3662 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3667 /* Find initial value for each biv by searching backwards from loop_start,
3668 halting at first label. Also record any test condition. */
3671 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3675 if (GET_CODE (p
) == CALL_INSN
)
3678 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3679 || GET_CODE (p
) == CALL_INSN
)
3680 note_stores (PATTERN (p
), record_initial
);
3682 /* Record any test of a biv that branches around the loop if no store
3683 between it and the start of loop. We only care about tests with
3684 constants and registers and only certain of those. */
3685 if (GET_CODE (p
) == JUMP_INSN
3686 && JUMP_LABEL (p
) != 0
3687 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3688 && (test
= get_condition_for_loop (p
)) != 0
3689 && GET_CODE (XEXP (test
, 0)) == REG
3690 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3691 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3692 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3693 && bl
->init_insn
== 0)
3695 /* If an NE test, we have an initial value! */
3696 if (GET_CODE (test
) == NE
)
3699 bl
->init_set
= gen_rtx_SET (VOIDmode
,
3700 XEXP (test
, 0), XEXP (test
, 1));
3703 bl
->initial_test
= test
;
3707 /* Look at the each biv and see if we can say anything better about its
3708 initial value from any initializing insns set up above. (This is done
3709 in two passes to avoid missing SETs in a PARALLEL.) */
3710 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3715 if (! bl
->init_insn
)
3718 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3719 is a constant, use the value of that. */
3720 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
3721 && CONSTANT_P (XEXP (note
, 0)))
3722 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
3723 && CONSTANT_P (XEXP (note
, 0))))
3724 src
= XEXP (note
, 0);
3726 src
= SET_SRC (bl
->init_set
);
3728 if (loop_dump_stream
)
3729 fprintf (loop_dump_stream
,
3730 "Biv %d initialized at insn %d: initial value ",
3731 bl
->regno
, INSN_UID (bl
->init_insn
));
3733 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3734 || GET_MODE (src
) == VOIDmode
)
3735 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3737 bl
->initial_value
= src
;
3739 if (loop_dump_stream
)
3741 if (GET_CODE (src
) == CONST_INT
)
3743 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (src
));
3744 fputc ('\n', loop_dump_stream
);
3748 print_rtl (loop_dump_stream
, src
);
3749 fprintf (loop_dump_stream
, "\n");
3755 /* Biv initial value is not simple move,
3756 so let it keep initial value of "itself". */
3758 if (loop_dump_stream
)
3759 fprintf (loop_dump_stream
, "is complex\n");
3763 /* Search the loop for general induction variables. */
3765 /* A register is a giv if: it is only set once, it is a function of a
3766 biv and a constant (or invariant), and it is not a biv. */
3768 not_every_iteration
= 0;
3774 /* At end of a straight-in loop, we are done.
3775 At end of a loop entered at the bottom, scan the top. */
3776 if (p
== scan_start
)
3784 if (p
== scan_start
)
3788 /* Look for a general induction variable in a register. */
3789 if (GET_CODE (p
) == INSN
3790 && (set
= single_set (p
))
3791 && GET_CODE (SET_DEST (set
)) == REG
3792 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3800 dest_reg
= SET_DEST (set
);
3801 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3804 if (/* SET_SRC is a giv. */
3805 (general_induction_var (SET_SRC (set
), &src_reg
, &add_val
,
3806 &mult_val
, 0, &benefit
)
3807 /* Equivalent expression is a giv. */
3808 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3809 && general_induction_var (XEXP (regnote
, 0), &src_reg
,
3810 &add_val
, &mult_val
, 0,
3812 /* Don't try to handle any regs made by loop optimization.
3813 We have nothing on them in regno_first_uid, etc. */
3814 && REGNO (dest_reg
) < max_reg_before_loop
3815 /* Don't recognize a BASIC_INDUCT_VAR here. */
3816 && dest_reg
!= src_reg
3817 /* This must be the only place where the register is set. */
3818 && (n_times_set
[REGNO (dest_reg
)] == 1
3819 /* or all sets must be consecutive and make a giv. */
3820 || (benefit
= consec_sets_giv (benefit
, p
,
3822 &add_val
, &mult_val
))))
3826 = (struct induction
*) alloca (sizeof (struct induction
));
3829 /* If this is a library call, increase benefit. */
3830 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3831 benefit
+= libcall_benefit (p
);
3833 /* Skip the consecutive insns, if there are any. */
3834 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3837 /* If first insn of libcall sequence, skip to end.
3838 Do this at start of loop, since INSN is guaranteed to
3840 if (GET_CODE (p
) != NOTE
3841 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3844 do p
= NEXT_INSN (p
);
3845 while (GET_CODE (p
) == NOTE
);
3848 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3849 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3855 #ifndef DONT_REDUCE_ADDR
3856 /* Look for givs which are memory addresses. */
3857 /* This resulted in worse code on a VAX 8600. I wonder if it
3859 if (GET_CODE (p
) == INSN
)
3860 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3864 /* Update the status of whether giv can derive other givs. This can
3865 change when we pass a label or an insn that updates a biv. */
3866 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3867 || GET_CODE (p
) == CODE_LABEL
)
3868 update_giv_derive (p
);
3870 /* Past a jump, we get to insns for which we can't count
3871 on whether they will be executed during each iteration. */
3872 /* This code appears twice in strength_reduce. There is also similar
3873 code in scan_loop. */
3874 if (GET_CODE (p
) == JUMP_INSN
3875 /* If we enter the loop in the middle, and scan around to the
3876 beginning, don't set not_every_iteration for that.
3877 This can be any kind of jump, since we want to know if insns
3878 will be executed if the loop is executed. */
3879 && ! (JUMP_LABEL (p
) == loop_top
3880 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3881 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3885 /* If this is a jump outside the loop, then it also doesn't
3886 matter. Check to see if the target of this branch is on the
3887 loop_number_exits_labels list. */
3889 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3891 label
= LABEL_NEXTREF (label
))
3892 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3896 not_every_iteration
= 1;
3899 else if (GET_CODE (p
) == NOTE
)
3901 /* At the virtual top of a converted loop, insns are again known to
3902 be executed each iteration: logically, the loop begins here
3903 even though the exit code has been duplicated. */
3904 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3905 not_every_iteration
= 0;
3906 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3908 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3912 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3913 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3914 or not an insn is known to be executed each iteration of the
3915 loop, whether or not any iterations are known to occur.
3917 Therefore, if we have just passed a label and have no more labels
3918 between here and the test insn of the loop, we know these insns
3919 will be executed each iteration. */
3921 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3922 && no_labels_between_p (p
, loop_end
))
3923 not_every_iteration
= 0;
3926 /* Try to calculate and save the number of loop iterations. This is
3927 set to zero if the actual number can not be calculated. This must
3928 be called after all giv's have been identified, since otherwise it may
3929 fail if the iteration variable is a giv. */
3931 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3933 /* Now for each giv for which we still don't know whether or not it is
3934 replaceable, check to see if it is replaceable because its final value
3935 can be calculated. This must be done after loop_iterations is called,
3936 so that final_giv_value will work correctly. */
3938 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3940 struct induction
*v
;
3942 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3943 if (! v
->replaceable
&& ! v
->not_replaceable
)
3944 check_final_value (v
, loop_start
, loop_end
);
3947 /* Try to prove that the loop counter variable (if any) is always
3948 nonnegative; if so, record that fact with a REG_NONNEG note
3949 so that "decrement and branch until zero" insn can be used. */
3950 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3953 /* record loop-variables relevant for BCT optimization before unrolling
3954 the loop. Unrolling may update part of this information, and the
3955 correct data will be used for generating the BCT. */
3956 #ifdef HAVE_decrement_and_branch_on_count
3957 if (HAVE_decrement_and_branch_on_count
)
3958 analyze_loop_iterations (loop_start
, loop_end
);
3962 /* Create reg_map to hold substitutions for replaceable giv regs. */
3963 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3964 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3966 /* Examine each iv class for feasibility of strength reduction/induction
3967 variable elimination. */
3969 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3971 struct induction
*v
;
3974 rtx final_value
= 0;
3976 /* Test whether it will be possible to eliminate this biv
3977 provided all givs are reduced. This is possible if either
3978 the reg is not used outside the loop, or we can compute
3979 what its final value will be.
3981 For architectures with a decrement_and_branch_until_zero insn,
3982 don't do this if we put a REG_NONNEG note on the endtest for
3985 /* Compare against bl->init_insn rather than loop_start.
3986 We aren't concerned with any uses of the biv between
3987 init_insn and loop_start since these won't be affected
3988 by the value of the biv elsewhere in the function, so
3989 long as init_insn doesn't use the biv itself.
3990 March 14, 1989 -- self@bayes.arc.nasa.gov */
3992 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3994 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3995 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3996 #ifdef HAVE_decrement_and_branch_until_zero
3999 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4000 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
4001 #ifdef HAVE_decrement_and_branch_until_zero
4005 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
4006 threshold
, insn_count
);
4009 if (loop_dump_stream
)
4011 fprintf (loop_dump_stream
,
4012 "Cannot eliminate biv %d.\n",
4014 fprintf (loop_dump_stream
,
4015 "First use: insn %d, last use: insn %d.\n",
4016 REGNO_FIRST_UID (bl
->regno
),
4017 REGNO_LAST_UID (bl
->regno
));
4021 /* Combine all giv's for this iv_class. */
4024 /* This will be true at the end, if all givs which depend on this
4025 biv have been strength reduced.
4026 We can't (currently) eliminate the biv unless this is so. */
4029 /* Check each giv in this class to see if we will benefit by reducing
4030 it. Skip giv's combined with others. */
4031 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4033 struct induction
*tv
;
4035 if (v
->ignore
|| v
->same
)
4038 benefit
= v
->benefit
;
4040 /* Reduce benefit if not replaceable, since we will insert
4041 a move-insn to replace the insn that calculates this giv.
4042 Don't do this unless the giv is a user variable, since it
4043 will often be marked non-replaceable because of the duplication
4044 of the exit code outside the loop. In such a case, the copies
4045 we insert are dead and will be deleted. So they don't have
4046 a cost. Similar situations exist. */
4047 /* ??? The new final_[bg]iv_value code does a much better job
4048 of finding replaceable giv's, and hence this code may no longer
4050 if (! v
->replaceable
&& ! bl
->eliminable
4051 && REG_USERVAR_P (v
->dest_reg
))
4052 benefit
-= copy_cost
;
4054 /* Decrease the benefit to count the add-insns that we will
4055 insert to increment the reduced reg for the giv. */
4056 benefit
-= add_cost
* bl
->biv_count
;
4058 /* Decide whether to strength-reduce this giv or to leave the code
4059 unchanged (recompute it from the biv each time it is used).
4060 This decision can be made independently for each giv. */
4063 /* Attempt to guess whether autoincrement will handle some of the
4064 new add insns; if so, increase BENEFIT (undo the subtraction of
4065 add_cost that was done above). */
4066 if (v
->giv_type
== DEST_ADDR
4067 && GET_CODE (v
->mult_val
) == CONST_INT
)
4069 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
4070 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4071 benefit
+= add_cost
* bl
->biv_count
;
4073 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
4074 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4075 benefit
+= add_cost
* bl
->biv_count
;
4080 /* If an insn is not to be strength reduced, then set its ignore
4081 flag, and clear all_reduced. */
4083 /* A giv that depends on a reversed biv must be reduced if it is
4084 used after the loop exit, otherwise, it would have the wrong
4085 value after the loop exit. To make it simple, just reduce all
4086 of such giv's whether or not we know they are used after the loop
4089 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4092 if (loop_dump_stream
)
4093 fprintf (loop_dump_stream
,
4094 "giv of insn %d not worth while, %d vs %d.\n",
4096 v
->lifetime
* threshold
* benefit
, insn_count
);
4102 /* Check that we can increment the reduced giv without a
4103 multiply insn. If not, reject it. */
4105 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4106 if (tv
->mult_val
== const1_rtx
4107 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4109 if (loop_dump_stream
)
4110 fprintf (loop_dump_stream
,
4111 "giv of insn %d: would need a multiply.\n",
4112 INSN_UID (v
->insn
));
4120 /* Reduce each giv that we decided to reduce. */
4122 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4124 struct induction
*tv
;
4125 if (! v
->ignore
&& v
->same
== 0)
4127 int auto_inc_opt
= 0;
4129 v
->new_reg
= gen_reg_rtx (v
->mode
);
4132 /* If the target has auto-increment addressing modes, and
4133 this is an address giv, then try to put the increment
4134 immediately after its use, so that flow can create an
4135 auto-increment addressing mode. */
4136 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4137 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4138 /* We don't handle reversed biv's because bl->biv->insn
4139 does not have a valid INSN_LUID. */
4141 && v
->always_executed
&& ! v
->maybe_multiple
4142 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4144 /* If other giv's have been combined with this one, then
4145 this will work only if all uses of the other giv's occur
4146 before this giv's insn. This is difficult to check.
4148 We simplify this by looking for the common case where
4149 there is one DEST_REG giv, and this giv's insn is the
4150 last use of the dest_reg of that DEST_REG giv. If the
4151 increment occurs after the address giv, then we can
4152 perform the optimization. (Otherwise, the increment
4153 would have to go before other_giv, and we would not be
4154 able to combine it with the address giv to get an
4155 auto-inc address.) */
4156 if (v
->combined_with
)
4158 struct induction
*other_giv
= 0;
4160 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4168 if (! tv
&& other_giv
4169 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4170 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4171 == INSN_UID (v
->insn
))
4172 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4175 /* Check for case where increment is before the address
4176 giv. Do this test in "loop order". */
4177 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4178 && (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4179 || (INSN_LUID (bl
->biv
->insn
)
4180 > INSN_LUID (scan_start
))))
4181 || (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4182 && (INSN_LUID (scan_start
)
4183 < INSN_LUID (bl
->biv
->insn
))))
4192 /* We can't put an insn immediately after one setting
4193 cc0, or immediately before one using cc0. */
4194 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4195 || (auto_inc_opt
== -1
4196 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4197 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4198 && sets_cc0_p (PATTERN (prev
))))
4204 v
->auto_inc_opt
= 1;
4208 /* For each place where the biv is incremented, add an insn
4209 to increment the new, reduced reg for the giv. */
4210 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4215 insert_before
= tv
->insn
;
4216 else if (auto_inc_opt
== 1)
4217 insert_before
= NEXT_INSN (v
->insn
);
4219 insert_before
= v
->insn
;
4221 if (tv
->mult_val
== const1_rtx
)
4222 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4223 v
->new_reg
, v
->new_reg
, insert_before
);
4224 else /* tv->mult_val == const0_rtx */
4225 /* A multiply is acceptable here
4226 since this is presumed to be seldom executed. */
4227 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4228 v
->add_val
, v
->new_reg
, insert_before
);
4231 /* Add code at loop start to initialize giv's reduced reg. */
4233 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4234 v
->add_val
, v
->new_reg
, loop_start
);
4238 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4241 For each giv register that can be reduced now: if replaceable,
4242 substitute reduced reg wherever the old giv occurs;
4243 else add new move insn "giv_reg = reduced_reg".
4245 Also check for givs whose first use is their definition and whose
4246 last use is the definition of another giv. If so, it is likely
4247 dead and should not be used to eliminate a biv. */
4248 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4250 if (v
->same
&& v
->same
->ignore
)
4256 if (v
->giv_type
== DEST_REG
4257 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4259 struct induction
*v1
;
4261 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4262 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4266 /* Update expression if this was combined, in case other giv was
4269 v
->new_reg
= replace_rtx (v
->new_reg
,
4270 v
->same
->dest_reg
, v
->same
->new_reg
);
4272 if (v
->giv_type
== DEST_ADDR
)
4273 /* Store reduced reg as the address in the memref where we found
4275 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4276 else if (v
->replaceable
)
4278 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4281 /* I can no longer duplicate the original problem. Perhaps
4282 this is unnecessary now? */
4284 /* Replaceable; it isn't strictly necessary to delete the old
4285 insn and emit a new one, because v->dest_reg is now dead.
4287 However, especially when unrolling loops, the special
4288 handling for (set REG0 REG1) in the second cse pass may
4289 make v->dest_reg live again. To avoid this problem, emit
4290 an insn to set the original giv reg from the reduced giv.
4291 We can not delete the original insn, since it may be part
4292 of a LIBCALL, and the code in flow that eliminates dead
4293 libcalls will fail if it is deleted. */
4294 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4300 /* Not replaceable; emit an insn to set the original giv reg from
4301 the reduced giv, same as above. */
4302 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4306 /* When a loop is reversed, givs which depend on the reversed
4307 biv, and which are live outside the loop, must be set to their
4308 correct final value. This insn is only needed if the giv is
4309 not replaceable. The correct final value is the same as the
4310 value that the giv starts the reversed loop with. */
4311 if (bl
->reversed
&& ! v
->replaceable
)
4312 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4313 v
->add_val
, v
->dest_reg
, end_insert_before
);
4314 else if (v
->final_value
)
4318 /* If the loop has multiple exits, emit the insn before the
4319 loop to ensure that it will always be executed no matter
4320 how the loop exits. Otherwise, emit the insn after the loop,
4321 since this is slightly more efficient. */
4322 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4323 insert_before
= loop_start
;
4325 insert_before
= end_insert_before
;
4326 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4330 /* If the insn to set the final value of the giv was emitted
4331 before the loop, then we must delete the insn inside the loop
4332 that sets it. If this is a LIBCALL, then we must delete
4333 every insn in the libcall. Note, however, that
4334 final_giv_value will only succeed when there are multiple
4335 exits if the giv is dead at each exit, hence it does not
4336 matter that the original insn remains because it is dead
4338 /* Delete the insn inside the loop that sets the giv since
4339 the giv is now set before (or after) the loop. */
4340 delete_insn (v
->insn
);
4344 if (loop_dump_stream
)
4346 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4347 INSN_UID (v
->insn
));
4348 print_rtl (loop_dump_stream
, v
->new_reg
);
4349 fprintf (loop_dump_stream
, "\n");
4353 /* All the givs based on the biv bl have been reduced if they
4356 /* For each giv not marked as maybe dead that has been combined with a
4357 second giv, clear any "maybe dead" mark on that second giv.
4358 v->new_reg will either be or refer to the register of the giv it
4361 Doing this clearing avoids problems in biv elimination where a
4362 giv's new_reg is a complex value that can't be put in the insn but
4363 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4364 Since the register will be used in either case, we'd prefer it be
4365 used from the simpler giv. */
4367 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4368 if (! v
->maybe_dead
&& v
->same
)
4369 v
->same
->maybe_dead
= 0;
4371 /* Try to eliminate the biv, if it is a candidate.
4372 This won't work if ! all_reduced,
4373 since the givs we planned to use might not have been reduced.
4375 We have to be careful that we didn't initially think we could eliminate
4376 this biv because of a giv that we now think may be dead and shouldn't
4377 be used as a biv replacement.
4379 Also, there is the possibility that we may have a giv that looks
4380 like it can be used to eliminate a biv, but the resulting insn
4381 isn't valid. This can happen, for example, on the 88k, where a
4382 JUMP_INSN can compare a register only with zero. Attempts to
4383 replace it with a compare with a constant will fail.
4385 Note that in cases where this call fails, we may have replaced some
4386 of the occurrences of the biv with a giv, but no harm was done in
4387 doing so in the rare cases where it can occur. */
4389 if (all_reduced
== 1 && bl
->eliminable
4390 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4391 threshold
, insn_count
))
4394 /* ?? If we created a new test to bypass the loop entirely,
4395 or otherwise drop straight in, based on this test, then
4396 we might want to rewrite it also. This way some later
4397 pass has more hope of removing the initialization of this
4400 /* If final_value != 0, then the biv may be used after loop end
4401 and we must emit an insn to set it just in case.
4403 Reversed bivs already have an insn after the loop setting their
4404 value, so we don't need another one. We can't calculate the
4405 proper final value for such a biv here anyways. */
4406 if (final_value
!= 0 && ! bl
->reversed
)
4410 /* If the loop has multiple exits, emit the insn before the
4411 loop to ensure that it will always be executed no matter
4412 how the loop exits. Otherwise, emit the insn after the
4413 loop, since this is slightly more efficient. */
4414 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4415 insert_before
= loop_start
;
4417 insert_before
= end_insert_before
;
4419 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4424 /* Delete all of the instructions inside the loop which set
4425 the biv, as they are all dead. If is safe to delete them,
4426 because an insn setting a biv will never be part of a libcall. */
4427 /* However, deleting them will invalidate the regno_last_uid info,
4428 so keeping them around is more convenient. Final_biv_value
4429 will only succeed when there are multiple exits if the biv
4430 is dead at each exit, hence it does not matter that the original
4431 insn remains, because it is dead anyways. */
4432 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4433 delete_insn (v
->insn
);
4436 if (loop_dump_stream
)
4437 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4442 /* Go through all the instructions in the loop, making all the
4443 register substitutions scheduled in REG_MAP. */
4445 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4446 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4447 || GET_CODE (p
) == CALL_INSN
)
4449 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4450 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4454 /* Unroll loops from within strength reduction so that we can use the
4455 induction variable information that strength_reduce has already
4459 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4462 /* instrument the loop with bct insn */
4463 #ifdef HAVE_decrement_and_branch_on_count
4464 if (HAVE_decrement_and_branch_on_count
)
4465 insert_bct (loop_start
, loop_end
);
4469 if (loop_dump_stream
)
4470 fprintf (loop_dump_stream
, "\n");
4473 /* Return 1 if X is a valid source for an initial value (or as value being
4474 compared against in an initial test).
4476 X must be either a register or constant and must not be clobbered between
4477 the current insn and the start of the loop.
4479 INSN is the insn containing X. */
4482 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4491 /* Only consider pseudos we know about initialized in insns whose luids
4493 if (GET_CODE (x
) != REG
4494 || REGNO (x
) >= max_reg_before_loop
)
4497 /* Don't use call-clobbered registers across a call which clobbers it. On
4498 some machines, don't use any hard registers at all. */
4499 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4500 && (SMALL_REGISTER_CLASSES
4501 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4504 /* Don't use registers that have been clobbered before the start of the
4506 if (reg_set_between_p (x
, insn
, loop_start
))
4512 /* Scan X for memory refs and check each memory address
4513 as a possible giv. INSN is the insn whose pattern X comes from.
4514 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4515 every loop iteration. */
4518 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4521 int not_every_iteration
;
4522 rtx loop_start
, loop_end
;
4525 register enum rtx_code code
;
4531 code
= GET_CODE (x
);
4555 /* This code used to disable creating GIVs with mult_val == 1 and
4556 add_val == 0. However, this leads to lost optimizations when
4557 it comes time to combine a set of related DEST_ADDR GIVs, since
4558 this one would not be seen. */
4560 if (general_induction_var (XEXP (x
, 0), &src_reg
, &add_val
,
4561 &mult_val
, 1, &benefit
))
4563 /* Found one; record it. */
4565 = (struct induction
*) oballoc (sizeof (struct induction
));
4567 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4568 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4569 &XEXP (x
, 0), loop_start
, loop_end
);
4571 v
->mem_mode
= GET_MODE (x
);
4580 /* Recursively scan the subexpressions for other mem refs. */
4582 fmt
= GET_RTX_FORMAT (code
);
4583 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4585 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4587 else if (fmt
[i
] == 'E')
4588 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4589 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4590 loop_start
, loop_end
);
4593 /* Fill in the data about one biv update.
4594 V is the `struct induction' in which we record the biv. (It is
4595 allocated by the caller, with alloca.)
4596 INSN is the insn that sets it.
4597 DEST_REG is the biv's reg.
4599 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4600 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4601 being set to INC_VAL.
4603 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4604 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4605 can be executed more than once per iteration. If MAYBE_MULTIPLE
4606 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4607 executed exactly once per iteration. */
4610 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4611 not_every_iteration
, maybe_multiple
)
4612 struct induction
*v
;
4617 int not_every_iteration
;
4620 struct iv_class
*bl
;
4623 v
->src_reg
= dest_reg
;
4624 v
->dest_reg
= dest_reg
;
4625 v
->mult_val
= mult_val
;
4626 v
->add_val
= inc_val
;
4627 v
->mode
= GET_MODE (dest_reg
);
4628 v
->always_computable
= ! not_every_iteration
;
4629 v
->always_executed
= ! not_every_iteration
;
4630 v
->maybe_multiple
= maybe_multiple
;
4632 /* Add this to the reg's iv_class, creating a class
4633 if this is the first incrementation of the reg. */
4635 bl
= reg_biv_class
[REGNO (dest_reg
)];
4638 /* Create and initialize new iv_class. */
4640 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4642 bl
->regno
= REGNO (dest_reg
);
4648 /* Set initial value to the reg itself. */
4649 bl
->initial_value
= dest_reg
;
4650 /* We haven't seen the initializing insn yet */
4653 bl
->initial_test
= 0;
4654 bl
->incremented
= 0;
4658 bl
->total_benefit
= 0;
4660 /* Add this class to loop_iv_list. */
4661 bl
->next
= loop_iv_list
;
4664 /* Put it in the array of biv register classes. */
4665 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4668 /* Update IV_CLASS entry for this biv. */
4669 v
->next_iv
= bl
->biv
;
4672 if (mult_val
== const1_rtx
)
4673 bl
->incremented
= 1;
4675 if (loop_dump_stream
)
4677 fprintf (loop_dump_stream
,
4678 "Insn %d: possible biv, reg %d,",
4679 INSN_UID (insn
), REGNO (dest_reg
));
4680 if (GET_CODE (inc_val
) == CONST_INT
)
4682 fprintf (loop_dump_stream
, " const =");
4683 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (inc_val
));
4684 fputc ('\n', loop_dump_stream
);
4688 fprintf (loop_dump_stream
, " const = ");
4689 print_rtl (loop_dump_stream
, inc_val
);
4690 fprintf (loop_dump_stream
, "\n");
4695 /* Fill in the data about one giv.
4696 V is the `struct induction' in which we record the giv. (It is
4697 allocated by the caller, with alloca.)
4698 INSN is the insn that sets it.
4699 BENEFIT estimates the savings from deleting this insn.
4700 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4701 into a register or is used as a memory address.
4703 SRC_REG is the biv reg which the giv is computed from.
4704 DEST_REG is the giv's reg (if the giv is stored in a reg).
4705 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4706 LOCATION points to the place where this giv's value appears in INSN. */
4709 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4710 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4711 struct induction
*v
;
4715 rtx mult_val
, add_val
;
4718 int not_every_iteration
;
4720 rtx loop_start
, loop_end
;
4722 struct induction
*b
;
4723 struct iv_class
*bl
;
4724 rtx set
= single_set (insn
);
4727 v
->src_reg
= src_reg
;
4729 v
->dest_reg
= dest_reg
;
4730 v
->mult_val
= mult_val
;
4731 v
->add_val
= add_val
;
4732 v
->benefit
= benefit
;
4733 v
->location
= location
;
4735 v
->combined_with
= 0;
4736 v
->maybe_multiple
= 0;
4738 v
->derive_adjustment
= 0;
4744 v
->auto_inc_opt
= 0;
4748 /* The v->always_computable field is used in update_giv_derive, to
4749 determine whether a giv can be used to derive another giv. For a
4750 DEST_REG giv, INSN computes a new value for the giv, so its value
4751 isn't computable if INSN insn't executed every iteration.
4752 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4753 it does not compute a new value. Hence the value is always computable
4754 regardless of whether INSN is executed each iteration. */
4756 if (type
== DEST_ADDR
)
4757 v
->always_computable
= 1;
4759 v
->always_computable
= ! not_every_iteration
;
4761 v
->always_executed
= ! not_every_iteration
;
4763 if (type
== DEST_ADDR
)
4765 v
->mode
= GET_MODE (*location
);
4769 else /* type == DEST_REG */
4771 v
->mode
= GET_MODE (SET_DEST (set
));
4773 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4774 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4776 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4778 /* If the lifetime is zero, it means that this register is
4779 really a dead store. So mark this as a giv that can be
4780 ignored. This will not prevent the biv from being eliminated. */
4781 if (v
->lifetime
== 0)
4784 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4785 reg_iv_info
[REGNO (dest_reg
)] = v
;
4788 /* Add the giv to the class of givs computed from one biv. */
4790 bl
= reg_biv_class
[REGNO (src_reg
)];
4793 v
->next_iv
= bl
->giv
;
4795 /* Don't count DEST_ADDR. This is supposed to count the number of
4796 insns that calculate givs. */
4797 if (type
== DEST_REG
)
4799 bl
->total_benefit
+= benefit
;
4802 /* Fatal error, biv missing for this giv? */
4805 if (type
== DEST_ADDR
)
4809 /* The giv can be replaced outright by the reduced register only if all
4810 of the following conditions are true:
4811 - the insn that sets the giv is always executed on any iteration
4812 on which the giv is used at all
4813 (there are two ways to deduce this:
4814 either the insn is executed on every iteration,
4815 or all uses follow that insn in the same basic block),
4816 - the giv is not used outside the loop
4817 - no assignments to the biv occur during the giv's lifetime. */
4819 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4820 /* Previous line always fails if INSN was moved by loop opt. */
4821 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4822 && (! not_every_iteration
4823 || last_use_this_basic_block (dest_reg
, insn
)))
4825 /* Now check that there are no assignments to the biv within the
4826 giv's lifetime. This requires two separate checks. */
4828 /* Check each biv update, and fail if any are between the first
4829 and last use of the giv.
4831 If this loop contains an inner loop that was unrolled, then
4832 the insn modifying the biv may have been emitted by the loop
4833 unrolling code, and hence does not have a valid luid. Just
4834 mark the biv as not replaceable in this case. It is not very
4835 useful as a biv, because it is used in two different loops.
4836 It is very unlikely that we would be able to optimize the giv
4837 using this biv anyways. */
4840 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4842 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4843 || ((uid_luid
[INSN_UID (b
->insn
)]
4844 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4845 && (uid_luid
[INSN_UID (b
->insn
)]
4846 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4849 v
->not_replaceable
= 1;
4854 /* If there are any backwards branches that go from after the
4855 biv update to before it, then this giv is not replaceable. */
4857 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4858 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4861 v
->not_replaceable
= 1;
4867 /* May still be replaceable, we don't have enough info here to
4870 v
->not_replaceable
= 0;
4874 /* Record whether the add_val contains a const_int, for later use by
4879 v
->no_const_addval
= 1;
4880 if (tem
== const0_rtx
)
4882 else if (GET_CODE (tem
) == CONST_INT
)
4883 v
->no_const_addval
= 0;
4884 else if (GET_CODE (tem
) == PLUS
)
4888 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
4889 tem
= XEXP (tem
, 0);
4890 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
4891 tem
= XEXP (tem
, 1);
4895 if (GET_CODE (XEXP (tem
, 1)) == CONST_INT
)
4896 v
->no_const_addval
= 0;
4900 if (loop_dump_stream
)
4902 if (type
== DEST_REG
)
4903 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4904 INSN_UID (insn
), REGNO (dest_reg
));
4906 fprintf (loop_dump_stream
, "Insn %d: dest address",
4909 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4910 REGNO (src_reg
), v
->benefit
);
4911 fprintf (loop_dump_stream
, " used %d lifetime %d",
4912 v
->times_used
, v
->lifetime
);
4915 fprintf (loop_dump_stream
, " replaceable");
4917 if (v
->no_const_addval
)
4918 fprintf (loop_dump_stream
, " ncav");
4920 if (GET_CODE (mult_val
) == CONST_INT
)
4922 fprintf (loop_dump_stream
, " mult ");
4923 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (mult_val
));
4927 fprintf (loop_dump_stream
, " mult ");
4928 print_rtl (loop_dump_stream
, mult_val
);
4931 if (GET_CODE (add_val
) == CONST_INT
)
4933 fprintf (loop_dump_stream
, " add ");
4934 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (add_val
));
4938 fprintf (loop_dump_stream
, " add ");
4939 print_rtl (loop_dump_stream
, add_val
);
4943 if (loop_dump_stream
)
4944 fprintf (loop_dump_stream
, "\n");
4949 /* All this does is determine whether a giv can be made replaceable because
4950 its final value can be calculated. This code can not be part of record_giv
4951 above, because final_giv_value requires that the number of loop iterations
4952 be known, and that can not be accurately calculated until after all givs
4953 have been identified. */
4956 check_final_value (v
, loop_start
, loop_end
)
4957 struct induction
*v
;
4958 rtx loop_start
, loop_end
;
4960 struct iv_class
*bl
;
4961 rtx final_value
= 0;
4963 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4965 /* DEST_ADDR givs will never reach here, because they are always marked
4966 replaceable above in record_giv. */
4968 /* The giv can be replaced outright by the reduced register only if all
4969 of the following conditions are true:
4970 - the insn that sets the giv is always executed on any iteration
4971 on which the giv is used at all
4972 (there are two ways to deduce this:
4973 either the insn is executed on every iteration,
4974 or all uses follow that insn in the same basic block),
4975 - its final value can be calculated (this condition is different
4976 than the one above in record_giv)
4977 - no assignments to the biv occur during the giv's lifetime. */
4980 /* This is only called now when replaceable is known to be false. */
4981 /* Clear replaceable, so that it won't confuse final_giv_value. */
4985 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4986 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4988 int biv_increment_seen
= 0;
4994 /* When trying to determine whether or not a biv increment occurs
4995 during the lifetime of the giv, we can ignore uses of the variable
4996 outside the loop because final_value is true. Hence we can not
4997 use regno_last_uid and regno_first_uid as above in record_giv. */
4999 /* Search the loop to determine whether any assignments to the
5000 biv occur during the giv's lifetime. Start with the insn
5001 that sets the giv, and search around the loop until we come
5002 back to that insn again.
5004 Also fail if there is a jump within the giv's lifetime that jumps
5005 to somewhere outside the lifetime but still within the loop. This
5006 catches spaghetti code where the execution order is not linear, and
5007 hence the above test fails. Here we assume that the giv lifetime
5008 does not extend from one iteration of the loop to the next, so as
5009 to make the test easier. Since the lifetime isn't known yet,
5010 this requires two loops. See also record_giv above. */
5012 last_giv_use
= v
->insn
;
5018 p
= NEXT_INSN (loop_start
);
5022 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5023 || GET_CODE (p
) == CALL_INSN
)
5025 if (biv_increment_seen
)
5027 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5030 v
->not_replaceable
= 1;
5034 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
5035 biv_increment_seen
= 1;
5036 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5041 /* Now that the lifetime of the giv is known, check for branches
5042 from within the lifetime to outside the lifetime if it is still
5052 p
= NEXT_INSN (loop_start
);
5053 if (p
== last_giv_use
)
5056 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
5057 && LABEL_NAME (JUMP_LABEL (p
))
5058 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
5059 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
5060 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
5061 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
5062 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
5063 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
5064 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
5067 v
->not_replaceable
= 1;
5069 if (loop_dump_stream
)
5070 fprintf (loop_dump_stream
,
5071 "Found branch outside giv lifetime.\n");
5078 /* If it is replaceable, then save the final value. */
5080 v
->final_value
= final_value
;
5083 if (loop_dump_stream
&& v
->replaceable
)
5084 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5085 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5088 /* Update the status of whether a giv can derive other givs.
5090 We need to do something special if there is or may be an update to the biv
5091 between the time the giv is defined and the time it is used to derive
5094 In addition, a giv that is only conditionally set is not allowed to
5095 derive another giv once a label has been passed.
5097 The cases we look at are when a label or an update to a biv is passed. */
5100 update_giv_derive (p
)
5103 struct iv_class
*bl
;
5104 struct induction
*biv
, *giv
;
5108 /* Search all IV classes, then all bivs, and finally all givs.
5110 There are three cases we are concerned with. First we have the situation
5111 of a giv that is only updated conditionally. In that case, it may not
5112 derive any givs after a label is passed.
5114 The second case is when a biv update occurs, or may occur, after the
5115 definition of a giv. For certain biv updates (see below) that are
5116 known to occur between the giv definition and use, we can adjust the
5117 giv definition. For others, or when the biv update is conditional,
5118 we must prevent the giv from deriving any other givs. There are two
5119 sub-cases within this case.
5121 If this is a label, we are concerned with any biv update that is done
5122 conditionally, since it may be done after the giv is defined followed by
5123 a branch here (actually, we need to pass both a jump and a label, but
5124 this extra tracking doesn't seem worth it).
5126 If this is a jump, we are concerned about any biv update that may be
5127 executed multiple times. We are actually only concerned about
5128 backward jumps, but it is probably not worth performing the test
5129 on the jump again here.
5131 If this is a biv update, we must adjust the giv status to show that a
5132 subsequent biv update was performed. If this adjustment cannot be done,
5133 the giv cannot derive further givs. */
5135 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5136 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5137 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5140 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5142 /* If cant_derive is already true, there is no point in
5143 checking all of these conditions again. */
5144 if (giv
->cant_derive
)
5147 /* If this giv is conditionally set and we have passed a label,
5148 it cannot derive anything. */
5149 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5150 giv
->cant_derive
= 1;
5152 /* Skip givs that have mult_val == 0, since
5153 they are really invariants. Also skip those that are
5154 replaceable, since we know their lifetime doesn't contain
5156 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5159 /* The only way we can allow this giv to derive another
5160 is if this is a biv increment and we can form the product
5161 of biv->add_val and giv->mult_val. In this case, we will
5162 be able to compute a compensation. */
5163 else if (biv
->insn
== p
)
5167 if (biv
->mult_val
== const1_rtx
)
5168 tem
= simplify_giv_expr (gen_rtx_MULT (giv
->mode
,
5173 if (tem
&& giv
->derive_adjustment
)
5174 tem
= simplify_giv_expr (gen_rtx_PLUS (giv
->mode
, tem
,
5175 giv
->derive_adjustment
),
5178 giv
->derive_adjustment
= tem
;
5180 giv
->cant_derive
= 1;
5182 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5183 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5184 giv
->cant_derive
= 1;
5189 /* Check whether an insn is an increment legitimate for a basic induction var.
5190 X is the source of insn P, or a part of it.
5191 MODE is the mode in which X should be interpreted.
5193 DEST_REG is the putative biv, also the destination of the insn.
5194 We accept patterns of these forms:
5195 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5196 REG = INVARIANT + REG
5198 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5199 and store the additive term into *INC_VAL.
5201 If X is an assignment of an invariant into DEST_REG, we set
5202 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5204 We also want to detect a BIV when it corresponds to a variable
5205 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5206 of the variable may be a PLUS that adds a SUBREG of that variable to
5207 an invariant and then sign- or zero-extends the result of the PLUS
5210 Most GIVs in such cases will be in the promoted mode, since that is the
5211 probably the natural computation mode (and almost certainly the mode
5212 used for addresses) on the machine. So we view the pseudo-reg containing
5213 the variable as the BIV, as if it were simply incremented.
5215 Note that treating the entire pseudo as a BIV will result in making
5216 simple increments to any GIVs based on it. However, if the variable
5217 overflows in its declared mode but not its promoted mode, the result will
5218 be incorrect. This is acceptable if the variable is signed, since
5219 overflows in such cases are undefined, but not if it is unsigned, since
5220 those overflows are defined. So we only check for SIGN_EXTEND and
5223 If we cannot find a biv, we return 0. */
5226 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5228 enum machine_mode mode
;
5234 register enum rtx_code code
;
5238 code
= GET_CODE (x
);
5242 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
5243 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5244 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5245 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5247 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
5248 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5249 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5250 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5255 if (invariant_p (arg
) != 1)
5258 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5259 *mult_val
= const1_rtx
;
5263 /* If this is a SUBREG for a promoted variable, check the inner
5265 if (SUBREG_PROMOTED_VAR_P (x
))
5266 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5267 dest_reg
, p
, inc_val
, mult_val
);
5271 /* If this register is assigned in a previous insn, look at its
5272 source, but don't go outside the loop or past a label. */
5278 insn
= PREV_INSN (insn
);
5279 } while (insn
&& GET_CODE (insn
) == NOTE
5280 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5284 set
= single_set (insn
);
5288 if ((SET_DEST (set
) == x
5289 || (GET_CODE (SET_DEST (set
)) == SUBREG
5290 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5292 && SUBREG_REG (SET_DEST (set
)) == x
))
5293 && basic_induction_var (SET_SRC (set
),
5294 (GET_MODE (SET_SRC (set
)) == VOIDmode
5296 : GET_MODE (SET_SRC (set
))),
5301 /* ... fall through ... */
5303 /* Can accept constant setting of biv only when inside inner most loop.
5304 Otherwise, a biv of an inner loop may be incorrectly recognized
5305 as a biv of the outer loop,
5306 causing code to be moved INTO the inner loop. */
5308 if (invariant_p (x
) != 1)
5313 /* convert_modes aborts if we try to convert to or from CCmode, so just
5314 exclude that case. It is very unlikely that a condition code value
5315 would be a useful iterator anyways. */
5316 if (loops_enclosed
== 1
5317 && GET_MODE_CLASS (mode
) != MODE_CC
5318 && GET_MODE_CLASS (GET_MODE (dest_reg
)) != MODE_CC
)
5320 /* Possible bug here? Perhaps we don't know the mode of X. */
5321 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5322 *mult_val
= const0_rtx
;
5329 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5330 dest_reg
, p
, inc_val
, mult_val
);
5333 /* Similar, since this can be a sign extension. */
5334 for (insn
= PREV_INSN (p
);
5335 (insn
&& GET_CODE (insn
) == NOTE
5336 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5337 insn
= PREV_INSN (insn
))
5341 set
= single_set (insn
);
5343 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5344 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5345 && INTVAL (XEXP (x
, 1)) >= 0
5346 && GET_CODE (SET_SRC (set
)) == ASHIFT
5347 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5348 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5349 GET_MODE (XEXP (x
, 0)),
5350 dest_reg
, insn
, inc_val
, mult_val
);
5358 /* A general induction variable (giv) is any quantity that is a linear
5359 function of a basic induction variable,
5360 i.e. giv = biv * mult_val + add_val.
5361 The coefficients can be any loop invariant quantity.
5362 A giv need not be computed directly from the biv;
5363 it can be computed by way of other givs. */
5365 /* Determine whether X computes a giv.
5366 If it does, return a nonzero value
5367 which is the benefit from eliminating the computation of X;
5368 set *SRC_REG to the register of the biv that it is computed from;
5369 set *ADD_VAL and *MULT_VAL to the coefficients,
5370 such that the value of X is biv * mult + add; */
5373 general_induction_var (x
, src_reg
, add_val
, mult_val
, is_addr
, pbenefit
)
5384 /* If this is an invariant, forget it, it isn't a giv. */
5385 if (invariant_p (x
) == 1)
5388 /* See if the expression could be a giv and get its form.
5389 Mark our place on the obstack in case we don't find a giv. */
5390 storage
= (char *) oballoc (0);
5392 x
= simplify_giv_expr (x
, pbenefit
);
5399 switch (GET_CODE (x
))
5403 /* Since this is now an invariant and wasn't before, it must be a giv
5404 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5406 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5407 *mult_val
= const0_rtx
;
5412 /* This is equivalent to a BIV. */
5414 *mult_val
= const1_rtx
;
5415 *add_val
= const0_rtx
;
5419 /* Either (plus (biv) (invar)) or
5420 (plus (mult (biv) (invar_1)) (invar_2)). */
5421 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5423 *src_reg
= XEXP (XEXP (x
, 0), 0);
5424 *mult_val
= XEXP (XEXP (x
, 0), 1);
5428 *src_reg
= XEXP (x
, 0);
5429 *mult_val
= const1_rtx
;
5431 *add_val
= XEXP (x
, 1);
5435 /* ADD_VAL is zero. */
5436 *src_reg
= XEXP (x
, 0);
5437 *mult_val
= XEXP (x
, 1);
5438 *add_val
= const0_rtx
;
5445 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5446 unless they are CONST_INT). */
5447 if (GET_CODE (*add_val
) == USE
)
5448 *add_val
= XEXP (*add_val
, 0);
5449 if (GET_CODE (*mult_val
) == USE
)
5450 *mult_val
= XEXP (*mult_val
, 0);
5455 *pbenefit
+= ADDRESS_COST (orig_x
) - reg_address_cost
;
5457 *pbenefit
+= rtx_cost (orig_x
, MEM
) - reg_address_cost
;
5461 *pbenefit
+= rtx_cost (orig_x
, SET
);
5463 /* Always return true if this is a giv so it will be detected as such,
5464 even if the benefit is zero or negative. This allows elimination
5465 of bivs that might otherwise not be eliminated. */
5469 /* Given an expression, X, try to form it as a linear function of a biv.
5470 We will canonicalize it to be of the form
5471 (plus (mult (BIV) (invar_1))
5473 with possible degeneracies.
5475 The invariant expressions must each be of a form that can be used as a
5476 machine operand. We surround then with a USE rtx (a hack, but localized
5477 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5478 routine; it is the caller's responsibility to strip them.
5480 If no such canonicalization is possible (i.e., two biv's are used or an
5481 expression that is neither invariant nor a biv or giv), this routine
5484 For a non-zero return, the result will have a code of CONST_INT, USE,
5485 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5487 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5489 static rtx sge_plus
PROTO ((enum machine_mode
, rtx
, rtx
));
5490 static rtx sge_plus_constant
PROTO ((rtx
, rtx
));
5493 simplify_giv_expr (x
, benefit
)
5497 enum machine_mode mode
= GET_MODE (x
);
5501 /* If this is not an integer mode, or if we cannot do arithmetic in this
5502 mode, this can't be a giv. */
5503 if (mode
!= VOIDmode
5504 && (GET_MODE_CLASS (mode
) != MODE_INT
5505 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5508 switch (GET_CODE (x
))
5511 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5512 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5513 if (arg0
== 0 || arg1
== 0)
5516 /* Put constant last, CONST_INT last if both constant. */
5517 if ((GET_CODE (arg0
) == USE
5518 || GET_CODE (arg0
) == CONST_INT
)
5519 && ! ((GET_CODE (arg0
) == USE
5520 && GET_CODE (arg1
) == USE
)
5521 || GET_CODE (arg1
) == CONST_INT
))
5522 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5524 /* Handle addition of zero, then addition of an invariant. */
5525 if (arg1
== const0_rtx
)
5527 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5528 switch (GET_CODE (arg0
))
5532 /* Adding two invariants must result in an invariant, so enclose
5533 addition operation inside a USE and return it. */
5534 if (GET_CODE (arg0
) == USE
)
5535 arg0
= XEXP (arg0
, 0);
5536 if (GET_CODE (arg1
) == USE
)
5537 arg1
= XEXP (arg1
, 0);
5539 if (GET_CODE (arg0
) == CONST_INT
)
5540 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5541 if (GET_CODE (arg1
) == CONST_INT
)
5542 tem
= sge_plus_constant (arg0
, arg1
);
5544 tem
= sge_plus (mode
, arg0
, arg1
);
5546 if (GET_CODE (tem
) != CONST_INT
)
5547 tem
= gen_rtx_USE (mode
, tem
);
5552 /* biv + invar or mult + invar. Return sum. */
5553 return gen_rtx_PLUS (mode
, arg0
, arg1
);
5556 /* (a + invar_1) + invar_2. Associate. */
5557 return simplify_giv_expr (
5558 gen_rtx_PLUS (mode
, XEXP (arg0
, 0),
5559 gen_rtx_PLUS (mode
, XEXP (arg0
, 1), arg1
)),
5566 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5567 MULT to reduce cases. */
5568 if (GET_CODE (arg0
) == REG
)
5569 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
5570 if (GET_CODE (arg1
) == REG
)
5571 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
5573 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5574 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5575 Recurse to associate the second PLUS. */
5576 if (GET_CODE (arg1
) == MULT
)
5577 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5579 if (GET_CODE (arg1
) == PLUS
)
5580 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5581 gen_rtx_PLUS (mode
, arg0
,
5586 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5587 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5590 if (!rtx_equal_p (arg0
, arg1
))
5593 return simplify_giv_expr (gen_rtx_MULT (mode
,
5601 /* Handle "a - b" as "a + b * (-1)". */
5602 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5604 gen_rtx_MULT (mode
, XEXP (x
, 1),
5609 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5610 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5611 if (arg0
== 0 || arg1
== 0)
5614 /* Put constant last, CONST_INT last if both constant. */
5615 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5616 && GET_CODE (arg1
) != CONST_INT
)
5617 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5619 /* If second argument is not now constant, not giv. */
5620 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5623 /* Handle multiply by 0 or 1. */
5624 if (arg1
== const0_rtx
)
5627 else if (arg1
== const1_rtx
)
5630 switch (GET_CODE (arg0
))
5633 /* biv * invar. Done. */
5634 return gen_rtx_MULT (mode
, arg0
, arg1
);
5637 /* Product of two constants. */
5638 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5641 /* invar * invar. It is a giv, but very few of these will
5642 actually pay off, so limit to simple registers. */
5643 if (GET_CODE (arg1
) != CONST_INT
)
5646 arg0
= XEXP (arg0
, 0);
5647 if (GET_CODE (arg0
) == REG
)
5648 tem
= gen_rtx_MULT (mode
, arg0
, arg1
);
5649 else if (GET_CODE (arg0
) == MULT
5650 && GET_CODE (XEXP (arg0
, 0)) == REG
5651 && GET_CODE (XEXP (arg0
, 1)) == CONST_INT
)
5653 tem
= gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5654 GEN_INT (INTVAL (XEXP (arg0
, 1))
5659 return gen_rtx_USE (mode
, tem
);
5662 /* (a * invar_1) * invar_2. Associate. */
5663 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5670 /* (a + invar_1) * invar_2. Distribute. */
5671 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5685 /* Shift by constant is multiply by power of two. */
5686 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5689 return simplify_giv_expr (gen_rtx_MULT (mode
,
5691 GEN_INT ((HOST_WIDE_INT
) 1
5692 << INTVAL (XEXP (x
, 1)))),
5696 /* "-a" is "a * (-1)" */
5697 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
5701 /* "~a" is "-a - 1". Silly, but easy. */
5702 return simplify_giv_expr (gen_rtx_MINUS (mode
,
5703 gen_rtx_NEG (mode
, XEXP (x
, 0)),
5708 /* Already in proper form for invariant. */
5712 /* If this is a new register, we can't deal with it. */
5713 if (REGNO (x
) >= max_reg_before_loop
)
5716 /* Check for biv or giv. */
5717 switch (reg_iv_type
[REGNO (x
)])
5721 case GENERAL_INDUCT
:
5723 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5725 /* Form expression from giv and add benefit. Ensure this giv
5726 can derive another and subtract any needed adjustment if so. */
5727 *benefit
+= v
->benefit
;
5731 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
, v
->src_reg
,
5734 if (v
->derive_adjustment
)
5735 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
5736 return simplify_giv_expr (tem
, benefit
);
5740 /* If it isn't an induction variable, and it is invariant, we
5741 may be able to simplify things further by looking through
5742 the bits we just moved outside the loop. */
5743 if (invariant_p (x
) == 1)
5747 for (m
= the_movables
; m
; m
= m
->next
)
5748 if (rtx_equal_p (x
, m
->set_dest
))
5750 /* Ok, we found a match. Substitute and simplify. */
5752 /* If we match another movable, we must use that, as
5753 this one is going away. */
5755 return simplify_giv_expr (m
->match
->set_dest
, benefit
);
5757 /* If consec is non-zero, this is a member of a group of
5758 instructions that were moved together. We handle this
5759 case only to the point of seeking to the last insn and
5760 looking for a REG_EQUAL. Fail if we don't find one. */
5765 do { tem
= NEXT_INSN (tem
); } while (--i
> 0);
5767 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
5769 tem
= XEXP (tem
, 0);
5773 tem
= single_set (m
->insn
);
5775 tem
= SET_SRC (tem
);
5780 /* What we are most interested in is pointer
5781 arithmetic on invariants -- only take
5782 patterns we may be able to do something with. */
5783 if (GET_CODE (tem
) == PLUS
5784 || GET_CODE (tem
) == MULT
5785 || GET_CODE (tem
) == ASHIFT
5786 || GET_CODE (tem
) == CONST_INT
5787 || GET_CODE (tem
) == SYMBOL_REF
)
5789 tem
= simplify_giv_expr (tem
, benefit
);
5793 else if (GET_CODE (tem
) == CONST
5794 && GET_CODE (XEXP (tem
, 0)) == PLUS
5795 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
5796 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
5798 tem
= simplify_giv_expr (XEXP (tem
, 0), benefit
);
5809 /* Fall through to general case. */
5811 /* If invariant, return as USE (unless CONST_INT).
5812 Otherwise, not giv. */
5813 if (GET_CODE (x
) == USE
)
5816 if (invariant_p (x
) == 1)
5818 if (GET_CODE (x
) == CONST_INT
)
5820 if (GET_CODE (x
) == CONST
5821 && GET_CODE (XEXP (x
, 0)) == PLUS
5822 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
5823 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
5825 return gen_rtx_USE (mode
, x
);
5832 /* This routine folds invariants such that there is only ever one
5833 CONST_INT in the summation. It is only used by simplify_giv_expr. */
5836 sge_plus_constant (x
, c
)
5839 if (GET_CODE (x
) == CONST_INT
)
5840 return GEN_INT (INTVAL (x
) + INTVAL (c
));
5841 else if (GET_CODE (x
) != PLUS
)
5842 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
5843 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5845 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
5846 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
5848 else if (GET_CODE (XEXP (x
, 0)) == PLUS
5849 || GET_CODE (XEXP (x
, 1)) != PLUS
)
5851 return gen_rtx_PLUS (GET_MODE (x
),
5852 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
5856 return gen_rtx_PLUS (GET_MODE (x
),
5857 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
5862 sge_plus (mode
, x
, y
)
5863 enum machine_mode mode
;
5866 while (GET_CODE (y
) == PLUS
)
5868 rtx a
= XEXP (y
, 0);
5869 if (GET_CODE (a
) == CONST_INT
)
5870 x
= sge_plus_constant (x
, a
);
5872 x
= gen_rtx_PLUS (mode
, x
, a
);
5875 if (GET_CODE (y
) == CONST_INT
)
5876 x
= sge_plus_constant (x
, y
);
5878 x
= gen_rtx_PLUS (mode
, x
, y
);
5882 /* Help detect a giv that is calculated by several consecutive insns;
5886 The caller has already identified the first insn P as having a giv as dest;
5887 we check that all other insns that set the same register follow
5888 immediately after P, that they alter nothing else,
5889 and that the result of the last is still a giv.
5891 The value is 0 if the reg set in P is not really a giv.
5892 Otherwise, the value is the amount gained by eliminating
5893 all the consecutive insns that compute the value.
5895 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5896 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5898 The coefficients of the ultimate giv value are stored in
5899 *MULT_VAL and *ADD_VAL. */
5902 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5917 /* Indicate that this is a giv so that we can update the value produced in
5918 each insn of the multi-insn sequence.
5920 This induction structure will be used only by the call to
5921 general_induction_var below, so we can allocate it on our stack.
5922 If this is a giv, our caller will replace the induct var entry with
5923 a new induction structure. */
5925 = (struct induction
*) alloca (sizeof (struct induction
));
5926 v
->src_reg
= src_reg
;
5927 v
->mult_val
= *mult_val
;
5928 v
->add_val
= *add_val
;
5929 v
->benefit
= first_benefit
;
5931 v
->derive_adjustment
= 0;
5933 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5934 reg_iv_info
[REGNO (dest_reg
)] = v
;
5936 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5941 code
= GET_CODE (p
);
5943 /* If libcall, skip to end of call sequence. */
5944 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5948 && (set
= single_set (p
))
5949 && GET_CODE (SET_DEST (set
)) == REG
5950 && SET_DEST (set
) == dest_reg
5951 && (general_induction_var (SET_SRC (set
), &src_reg
,
5952 add_val
, mult_val
, 0, &benefit
)
5953 /* Giv created by equivalent expression. */
5954 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5955 && general_induction_var (XEXP (temp
, 0), &src_reg
,
5956 add_val
, mult_val
, 0, &benefit
)))
5957 && src_reg
== v
->src_reg
)
5959 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5960 benefit
+= libcall_benefit (p
);
5963 v
->mult_val
= *mult_val
;
5964 v
->add_val
= *add_val
;
5965 v
->benefit
= benefit
;
5967 else if (code
!= NOTE
)
5969 /* Allow insns that set something other than this giv to a
5970 constant. Such insns are needed on machines which cannot
5971 include long constants and should not disqualify a giv. */
5973 && (set
= single_set (p
))
5974 && SET_DEST (set
) != dest_reg
5975 && CONSTANT_P (SET_SRC (set
)))
5978 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5986 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5987 represented by G1. If no such expression can be found, or it is clear that
5988 it cannot possibly be a valid address, 0 is returned.
5990 To perform the computation, we note that
5993 where `v' is the biv.
5995 So G2 = (y/b) * G1 + (b - a*y/x).
5997 Note that MULT = y/x.
5999 Update: A and B are now allowed to be additive expressions such that
6000 B contains all variables in A. That is, computing B-A will not require
6001 subtracting variables. */
6004 express_from_1 (a
, b
, mult
)
6007 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6009 if (mult
== const0_rtx
)
6012 /* If MULT is not 1, we cannot handle A with non-constants, since we
6013 would then be required to subtract multiples of the registers in A.
6014 This is theoretically possible, and may even apply to some Fortran
6015 constructs, but it is a lot of work and we do not attempt it here. */
6017 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
6020 /* In general these structures are sorted top to bottom (down the PLUS
6021 chain), but not left to right across the PLUS. If B is a higher
6022 order giv than A, we can strip one level and recurse. If A is higher
6023 order, we'll eventually bail out, but won't know that until the end.
6024 If they are the same, we'll strip one level around this loop. */
6026 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
6028 rtx ra
, rb
, oa
, ob
, tmp
;
6030 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6031 if (GET_CODE (ra
) == PLUS
)
6032 tmp
= ra
, ra
= oa
, oa
= tmp
;
6034 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
6035 if (GET_CODE (rb
) == PLUS
)
6036 tmp
= rb
, rb
= ob
, ob
= tmp
;
6038 if (rtx_equal_p (ra
, rb
))
6039 /* We matched: remove one reg completely. */
6041 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
6042 /* An alternate match. */
6044 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
6045 /* An alternate match. */
6049 /* Indicates an extra register in B. Strip one level from B and
6050 recurse, hoping B was the higher order expression. */
6051 ob
= express_from_1 (a
, ob
, mult
);
6054 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
6058 /* Here we are at the last level of A, go through the cases hoping to
6059 get rid of everything but a constant. */
6061 if (GET_CODE (a
) == PLUS
)
6065 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6066 if (rtx_equal_p (oa
, b
))
6068 else if (!rtx_equal_p (ra
, b
))
6071 if (GET_CODE (oa
) != CONST_INT
)
6074 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
6076 else if (GET_CODE (a
) == CONST_INT
)
6078 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
6080 else if (GET_CODE (b
) == PLUS
)
6082 if (rtx_equal_p (a
, XEXP (b
, 0)))
6084 else if (rtx_equal_p (a
, XEXP (b
, 1)))
6089 else if (rtx_equal_p (a
, b
))
6096 express_from (g1
, g2
)
6097 struct induction
*g1
, *g2
;
6101 /* The value that G1 will be multiplied by must be a constant integer. Also,
6102 the only chance we have of getting a valid address is if b*c/a (see above
6103 for notation) is also an integer. */
6104 if (GET_CODE (g1
->mult_val
) == CONST_INT
6105 && GET_CODE (g2
->mult_val
) == CONST_INT
)
6107 if (g1
->mult_val
== const0_rtx
6108 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
6110 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
6112 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
6116 /* ??? Find out if the one is a multiple of the other? */
6120 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
6121 if (add
== NULL_RTX
)
6124 /* Form simplified final result. */
6125 if (mult
== const0_rtx
)
6127 else if (mult
== const1_rtx
)
6128 mult
= g1
->dest_reg
;
6130 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
6132 if (add
== const0_rtx
)
6135 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
6138 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
6139 (either directly or via an address expression) a register used to represent
6140 G1. Set g2->new_reg to a represtation of G1 (normally just
6144 combine_givs_p (g1
, g2
)
6145 struct induction
*g1
, *g2
;
6147 rtx tem
= express_from (g1
, g2
);
6149 /* If these givs are identical, they can be combined. We use the results
6150 of express_from because the addends are not in a canonical form, so
6151 rtx_equal_p is a weaker test. */
6152 if (tem
== const0_rtx
)
6154 return g1
->dest_reg
;
6157 /* If G2 can be expressed as a function of G1 and that function is valid
6158 as an address and no more expensive than using a register for G2,
6159 the expression of G2 in terms of G1 can be used. */
6161 && g2
->giv_type
== DEST_ADDR
6162 && memory_address_p (g2
->mem_mode
, tem
)
6163 /* ??? Looses, especially with -fforce-addr, where *g2->location
6164 will always be a register, and so anything more complicated
6168 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
6170 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
6181 struct combine_givs_stats
6188 cmp_combine_givs_stats (x
, y
)
6189 struct combine_givs_stats
*x
, *y
;
6192 d
= y
->total_benefit
- x
->total_benefit
;
6193 /* Stabilize the sort. */
6195 d
= x
->giv_number
- y
->giv_number
;
6199 /* If one of these givs is a DEST_REG that was only used once, by the
6200 other giv, this is actually a single use. Return 0 if this is not
6201 the case, -1 if g1 is the DEST_REG involved, and 1 if it was g2. */
6204 combine_givs_used_once (g1
, g2
)
6205 struct induction
*g1
, *g2
;
6207 if (g1
->giv_type
== DEST_REG
6208 && n_times_used
[REGNO (g1
->dest_reg
)] == 1
6209 && reg_mentioned_p (g1
->dest_reg
, PATTERN (g2
->insn
)))
6212 if (g2
->giv_type
== DEST_REG
6213 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
6214 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
6221 combine_givs_benefit_from (g1
, g2
)
6222 struct induction
*g1
, *g2
;
6224 int tmp
= combine_givs_used_once (g1
, g2
);
6228 return g2
->benefit
- g1
->benefit
;
6233 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6234 any other. If so, point SAME to the giv combined with and set NEW_REG to
6235 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6236 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6240 struct iv_class
*bl
;
6242 struct induction
*g1
, *g2
, **giv_array
;
6243 int i
, j
, k
, giv_count
;
6244 struct combine_givs_stats
*stats
;
6247 /* Count givs, because bl->giv_count is incorrect here. */
6249 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6254 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
6256 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6258 giv_array
[i
++] = g1
;
6260 stats
= (struct combine_givs_stats
*) alloca (giv_count
* sizeof (*stats
));
6261 bzero (stats
, giv_count
* sizeof (*stats
));
6263 can_combine
= (rtx
*) alloca (giv_count
* giv_count
* sizeof(rtx
));
6264 bzero (can_combine
, giv_count
* giv_count
* sizeof(rtx
));
6266 for (i
= 0; i
< giv_count
; i
++)
6272 this_benefit
= g1
->benefit
;
6273 /* Add an additional weight for zero addends. */
6274 if (g1
->no_const_addval
)
6276 for (j
= 0; j
< giv_count
; j
++)
6282 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
6284 can_combine
[i
*giv_count
+ j
] = this_combine
;
6285 this_benefit
+= combine_givs_benefit_from (g1
, g2
);
6286 /* Add an additional weight for being reused more times. */
6290 stats
[i
].giv_number
= i
;
6291 stats
[i
].total_benefit
= this_benefit
;
6294 /* Iterate, combining until we can't. */
6296 qsort (stats
, giv_count
, sizeof(*stats
), cmp_combine_givs_stats
);
6298 if (loop_dump_stream
)
6300 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
6301 for (k
= 0; k
< giv_count
; k
++)
6303 g1
= giv_array
[stats
[k
].giv_number
];
6304 if (!g1
->combined_with
&& !g1
->same
)
6305 fprintf (loop_dump_stream
, " {%d, %d}",
6306 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
6307 stats
[k
].total_benefit
);
6309 putc ('\n', loop_dump_stream
);
6312 for (k
= 0; k
< giv_count
; k
++)
6314 int g1_add_benefit
= 0;
6316 i
= stats
[k
].giv_number
;
6319 /* If it has already been combined, skip. */
6320 if (g1
->combined_with
|| g1
->same
)
6323 for (j
= 0; j
< giv_count
; j
++)
6326 if (g1
!= g2
&& can_combine
[i
*giv_count
+ j
]
6327 /* If it has already been combined, skip. */
6328 && ! g2
->same
&& ! g2
->combined_with
)
6332 g2
->new_reg
= can_combine
[i
*giv_count
+ j
];
6334 g1
->combined_with
= 1;
6335 if (!combine_givs_used_once (g1
, g2
))
6336 g1
->times_used
+= 1;
6337 g1
->lifetime
+= g2
->lifetime
;
6339 g1_add_benefit
+= combine_givs_benefit_from (g1
, g2
);
6341 /* ??? The new final_[bg]iv_value code does a much better job
6342 of finding replaceable giv's, and hence this code may no
6343 longer be necessary. */
6344 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
6345 g1_add_benefit
-= copy_cost
;
6347 /* To help optimize the next set of combinations, remove
6348 this giv from the benefits of other potential mates. */
6349 for (l
= 0; l
< giv_count
; ++l
)
6351 int m
= stats
[l
].giv_number
;
6352 if (can_combine
[m
*giv_count
+ j
])
6354 /* Remove additional weight for being reused. */
6355 stats
[l
].total_benefit
-= 3 +
6356 combine_givs_benefit_from (giv_array
[m
], g2
);
6360 if (loop_dump_stream
)
6361 fprintf (loop_dump_stream
,
6362 "giv at %d combined with giv at %d\n",
6363 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
6367 /* To help optimize the next set of combinations, remove
6368 this giv from the benefits of other potential mates. */
6369 if (g1
->combined_with
)
6371 for (j
= 0; j
< giv_count
; ++j
)
6373 int m
= stats
[j
].giv_number
;
6374 if (can_combine
[m
*giv_count
+ j
])
6376 /* Remove additional weight for being reused. */
6377 stats
[j
].total_benefit
-= 3 +
6378 combine_givs_benefit_from (giv_array
[m
], g1
);
6382 g1
->benefit
+= g1_add_benefit
;
6384 /* We've finished with this giv, and everything it touched.
6385 Restart the combination so that proper weights for the
6386 rest of the givs are properly taken into account. */
6387 /* ??? Ideally we would compact the arrays at this point, so
6388 as to not cover old ground. But sanely compacting
6389 can_combine is tricky. */
6395 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
6398 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
6399 rtx b
; /* initial value of basic induction variable */
6400 rtx m
; /* multiplicative constant */
6401 rtx a
; /* additive constant */
6402 rtx reg
; /* destination register */
6408 /* Prevent unexpected sharing of these rtx. */
6412 /* Increase the lifetime of any invariants moved further in code. */
6413 update_reg_last_use (a
, insert_before
);
6414 update_reg_last_use (b
, insert_before
);
6415 update_reg_last_use (m
, insert_before
);
6418 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
6420 emit_move_insn (reg
, result
);
6421 seq
= gen_sequence ();
6424 emit_insn_before (seq
, insert_before
);
6426 /* It is entirely possible that the expansion created lots of new
6427 registers. Iterate over the sequence we just created and
6430 if (GET_CODE (seq
) == SEQUENCE
)
6433 for (i
= 0; i
< XVECLEN (seq
, 0); ++i
)
6435 rtx set
= single_set (XVECEXP (seq
, 0, i
));
6436 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
6437 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
6440 else if (GET_CODE (seq
) == SET
6441 && GET_CODE (SET_DEST (seq
)) == REG
)
6442 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
6445 /* Test whether A * B can be computed without
6446 an actual multiply insn. Value is 1 if so. */
6449 product_cheap_p (a
, b
)
6455 struct obstack
*old_rtl_obstack
= rtl_obstack
;
6456 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
6459 /* If only one is constant, make it B. */
6460 if (GET_CODE (a
) == CONST_INT
)
6461 tmp
= a
, a
= b
, b
= tmp
;
6463 /* If first constant, both constant, so don't need multiply. */
6464 if (GET_CODE (a
) == CONST_INT
)
6467 /* If second not constant, neither is constant, so would need multiply. */
6468 if (GET_CODE (b
) != CONST_INT
)
6471 /* One operand is constant, so might not need multiply insn. Generate the
6472 code for the multiply and see if a call or multiply, or long sequence
6473 of insns is generated. */
6475 rtl_obstack
= &temp_obstack
;
6477 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
6478 tmp
= gen_sequence ();
6481 if (GET_CODE (tmp
) == SEQUENCE
)
6483 if (XVEC (tmp
, 0) == 0)
6485 else if (XVECLEN (tmp
, 0) > 3)
6488 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
6490 rtx insn
= XVECEXP (tmp
, 0, i
);
6492 if (GET_CODE (insn
) != INSN
6493 || (GET_CODE (PATTERN (insn
)) == SET
6494 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
6495 || (GET_CODE (PATTERN (insn
)) == PARALLEL
6496 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
6497 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
6504 else if (GET_CODE (tmp
) == SET
6505 && GET_CODE (SET_SRC (tmp
)) == MULT
)
6507 else if (GET_CODE (tmp
) == PARALLEL
6508 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
6509 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
6512 /* Free any storage we obtained in generating this multiply and restore rtl
6513 allocation to its normal obstack. */
6514 obstack_free (&temp_obstack
, storage
);
6515 rtl_obstack
= old_rtl_obstack
;
6520 /* Check to see if loop can be terminated by a "decrement and branch until
6521 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6522 Also try reversing an increment loop to a decrement loop
6523 to see if the optimization can be performed.
6524 Value is nonzero if optimization was performed. */
6526 /* This is useful even if the architecture doesn't have such an insn,
6527 because it might change a loops which increments from 0 to n to a loop
6528 which decrements from n to 0. A loop that decrements to zero is usually
6529 faster than one that increments from zero. */
6531 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6532 such as approx_final_value, biv_total_increment, loop_iterations, and
6533 final_[bg]iv_value. */
6536 check_dbra_loop (loop_end
, insn_count
, loop_start
)
6541 struct iv_class
*bl
;
6548 rtx before_comparison
;
6552 int compare_and_branch
;
6554 /* If last insn is a conditional branch, and the insn before tests a
6555 register value, try to optimize it. Otherwise, we can't do anything. */
6557 jump
= PREV_INSN (loop_end
);
6558 comparison
= get_condition_for_loop (jump
);
6559 if (comparison
== 0)
6562 /* Try to compute whether the compare/branch at the loop end is one or
6563 two instructions. */
6564 get_condition (jump
, &first_compare
);
6565 if (first_compare
== jump
)
6566 compare_and_branch
= 1;
6567 else if (first_compare
== prev_nonnote_insn (jump
))
6568 compare_and_branch
= 2;
6572 /* Check all of the bivs to see if the compare uses one of them.
6573 Skip biv's set more than once because we can't guarantee that
6574 it will be zero on the last iteration. Also skip if the biv is
6575 used between its update and the test insn. */
6577 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6579 if (bl
->biv_count
== 1
6580 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6581 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6589 /* Look for the case where the basic induction variable is always
6590 nonnegative, and equals zero on the last iteration.
6591 In this case, add a reg_note REG_NONNEG, which allows the
6592 m68k DBRA instruction to be used. */
6594 if (((GET_CODE (comparison
) == GT
6595 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6596 && INTVAL (XEXP (comparison
, 1)) == -1)
6597 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6598 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6599 && INTVAL (bl
->biv
->add_val
) < 0)
6601 /* Initial value must be greater than 0,
6602 init_val % -dec_value == 0 to ensure that it equals zero on
6603 the last iteration */
6605 if (GET_CODE (bl
->initial_value
) == CONST_INT
6606 && INTVAL (bl
->initial_value
) > 0
6607 && (INTVAL (bl
->initial_value
)
6608 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6610 /* register always nonnegative, add REG_NOTE to branch */
6611 REG_NOTES (PREV_INSN (loop_end
))
6612 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6613 REG_NOTES (PREV_INSN (loop_end
)));
6619 /* If the decrement is 1 and the value was tested as >= 0 before
6620 the loop, then we can safely optimize. */
6621 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6623 if (GET_CODE (p
) == CODE_LABEL
)
6625 if (GET_CODE (p
) != JUMP_INSN
)
6628 before_comparison
= get_condition_for_loop (p
);
6629 if (before_comparison
6630 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6631 && GET_CODE (before_comparison
) == LT
6632 && XEXP (before_comparison
, 1) == const0_rtx
6633 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6634 && INTVAL (bl
->biv
->add_val
) == -1)
6636 REG_NOTES (PREV_INSN (loop_end
))
6637 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6638 REG_NOTES (PREV_INSN (loop_end
)));
6645 else if (num_mem_sets
<= 1)
6647 /* Try to change inc to dec, so can apply above optimization. */
6649 all registers modified are induction variables or invariant,
6650 all memory references have non-overlapping addresses
6651 (obviously true if only one write)
6652 allow 2 insns for the compare/jump at the end of the loop. */
6653 /* Also, we must avoid any instructions which use both the reversed
6654 biv and another biv. Such instructions will fail if the loop is
6655 reversed. We meet this condition by requiring that either
6656 no_use_except_counting is true, or else that there is only
6658 int num_nonfixed_reads
= 0;
6659 /* 1 if the iteration var is used only to count iterations. */
6660 int no_use_except_counting
= 0;
6661 /* 1 if the loop has no memory store, or it has a single memory store
6662 which is reversible. */
6663 int reversible_mem_store
= 1;
6665 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6666 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6667 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6669 if (bl
->giv_count
== 0
6670 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6672 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6674 /* If there are no givs for this biv, and the only exit is the
6675 fall through at the end of the loop, then
6676 see if perhaps there are no uses except to count. */
6677 no_use_except_counting
= 1;
6678 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6679 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6681 rtx set
= single_set (p
);
6683 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6684 && REGNO (SET_DEST (set
)) == bl
->regno
)
6685 /* An insn that sets the biv is okay. */
6687 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6688 || p
== prev_nonnote_insn (loop_end
))
6689 /* Don't bother about the end test. */
6691 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6692 /* Any other use of the biv is no good. */
6694 no_use_except_counting
= 0;
6700 /* If the loop has a single store, and the destination address is
6701 invariant, then we can't reverse the loop, because this address
6702 might then have the wrong value at loop exit.
6703 This would work if the source was invariant also, however, in that
6704 case, the insn should have been moved out of the loop. */
6706 if (num_mem_sets
== 1)
6707 reversible_mem_store
6708 = (! unknown_address_altered
6709 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6711 /* This code only acts for innermost loops. Also it simplifies
6712 the memory address check by only reversing loops with
6713 zero or one memory access.
6714 Two memory accesses could involve parts of the same array,
6715 and that can't be reversed. */
6717 if (num_nonfixed_reads
<= 1
6719 && !loop_has_volatile
6720 && reversible_mem_store
6721 && (no_use_except_counting
6722 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6723 + num_movables
+ compare_and_branch
== insn_count
)
6724 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6728 /* Loop can be reversed. */
6729 if (loop_dump_stream
)
6730 fprintf (loop_dump_stream
, "Can reverse loop\n");
6732 /* Now check other conditions:
6734 The increment must be a constant, as must the initial value,
6735 and the comparison code must be LT.
6737 This test can probably be improved since +/- 1 in the constant
6738 can be obtained by changing LT to LE and vice versa; this is
6742 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6743 /* LE gets turned into LT */
6744 && GET_CODE (comparison
) == LT
6745 && GET_CODE (bl
->initial_value
) == CONST_INT
)
6747 HOST_WIDE_INT add_val
, comparison_val
;
6750 add_val
= INTVAL (bl
->biv
->add_val
);
6751 comparison_val
= INTVAL (XEXP (comparison
, 1));
6752 final_value
= XEXP (comparison
, 1);
6753 initial_value
= bl
->initial_value
;
6755 /* Normalize the initial value if it is an integer and
6756 has no other use except as a counter. This will allow
6757 a few more loops to be reversed. */
6758 if (no_use_except_counting
6759 && GET_CODE (initial_value
) == CONST_INT
)
6761 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
6762 /* Check for overflow. If comparison_val ends up as a
6763 negative value, then we can't reverse the loop. */
6764 if (comparison_val
>= 0)
6765 initial_value
= const0_rtx
;
6768 /* If the initial value is not zero, or if the comparison
6769 value is not an exact multiple of the increment, then we
6770 can not reverse this loop. */
6771 if (initial_value
!= const0_rtx
6772 || (comparison_val
% add_val
) != 0)
6775 /* Reset these in case we normalized the initial value
6776 and comparison value above. */
6777 bl
->initial_value
= initial_value
;
6778 XEXP (comparison
, 1) = GEN_INT (comparison_val
);
6780 /* Register will always be nonnegative, with value
6781 0 on last iteration if loop reversed */
6783 /* Save some info needed to produce the new insns. */
6784 reg
= bl
->biv
->dest_reg
;
6785 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6786 if (jump_label
== pc_rtx
)
6787 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6788 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6790 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6791 - INTVAL (bl
->biv
->add_val
));
6793 /* Initialize biv to start_value before loop start.
6794 The old initializing insn will be deleted as a
6795 dead store by flow.c. */
6796 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6798 /* Add insn to decrement register, and delete insn
6799 that incremented the register. */
6800 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6802 delete_insn (bl
->biv
->insn
);
6804 /* Update biv info to reflect its new status. */
6806 bl
->initial_value
= start_value
;
6807 bl
->biv
->add_val
= new_add_val
;
6809 /* Inc LABEL_NUSES so that delete_insn will
6810 not delete the label. */
6811 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6813 /* Emit an insn after the end of the loop to set the biv's
6814 proper exit value if it is used anywhere outside the loop. */
6815 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
6817 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6818 emit_insn_after (gen_move_insn (reg
, final_value
),
6821 /* Delete compare/branch at end of loop. */
6822 delete_insn (PREV_INSN (loop_end
));
6823 if (compare_and_branch
== 2)
6824 delete_insn (first_compare
);
6826 /* Add new compare/branch insn at end of loop. */
6828 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6829 GET_MODE (reg
), 0, 0);
6830 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6831 tem
= gen_sequence ();
6833 emit_jump_insn_before (tem
, loop_end
);
6835 for (tem
= PREV_INSN (loop_end
);
6836 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6840 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6842 /* Increment of LABEL_NUSES done above. */
6843 /* Register is now always nonnegative,
6844 so add REG_NONNEG note to the branch. */
6845 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6851 /* Mark that this biv has been reversed. Each giv which depends
6852 on this biv, and which is also live past the end of the loop
6853 will have to be fixed up. */
6857 if (loop_dump_stream
)
6858 fprintf (loop_dump_stream
,
6859 "Reversed loop and added reg_nonneg\n");
6869 /* Verify whether the biv BL appears to be eliminable,
6870 based on the insns in the loop that refer to it.
6871 LOOP_START is the first insn of the loop, and END is the end insn.
6873 If ELIMINATE_P is non-zero, actually do the elimination.
6875 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6876 determine whether invariant insns should be placed inside or at the
6877 start of the loop. */
6880 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6881 struct iv_class
*bl
;
6885 int threshold
, insn_count
;
6887 rtx reg
= bl
->biv
->dest_reg
;
6890 /* Scan all insns in the loop, stopping if we find one that uses the
6891 biv in a way that we cannot eliminate. */
6893 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6895 enum rtx_code code
= GET_CODE (p
);
6896 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6898 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6899 && reg_mentioned_p (reg
, PATTERN (p
))
6900 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6902 if (loop_dump_stream
)
6903 fprintf (loop_dump_stream
,
6904 "Cannot eliminate biv %d: biv used in insn %d.\n",
6905 bl
->regno
, INSN_UID (p
));
6912 if (loop_dump_stream
)
6913 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6914 bl
->regno
, eliminate_p
? "was" : "can be");
6921 /* If BL appears in X (part of the pattern of INSN), see if we can
6922 eliminate its use. If so, return 1. If not, return 0.
6924 If BIV does not appear in X, return 1.
6926 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6927 where extra insns should be added. Depending on how many items have been
6928 moved out of the loop, it will either be before INSN or at the start of
6932 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6934 struct iv_class
*bl
;
6938 enum rtx_code code
= GET_CODE (x
);
6939 rtx reg
= bl
->biv
->dest_reg
;
6940 enum machine_mode mode
= GET_MODE (reg
);
6941 struct induction
*v
;
6953 /* If we haven't already been able to do something with this BIV,
6954 we can't eliminate it. */
6960 /* If this sets the BIV, it is not a problem. */
6961 if (SET_DEST (x
) == reg
)
6964 /* If this is an insn that defines a giv, it is also ok because
6965 it will go away when the giv is reduced. */
6966 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6967 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6971 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6973 /* Can replace with any giv that was reduced and
6974 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6975 Require a constant for MULT_VAL, so we know it's nonzero.
6976 ??? We disable this optimization to avoid potential
6979 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6980 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6981 && v
->add_val
== const0_rtx
6982 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6986 /* If the giv V had the auto-inc address optimization applied
6987 to it, and INSN occurs between the giv insn and the biv
6988 insn, then we must adjust the value used here.
6989 This is rare, so we don't bother to do so. */
6991 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6992 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6993 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6994 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7000 /* If the giv has the opposite direction of change,
7001 then reverse the comparison. */
7002 if (INTVAL (v
->mult_val
) < 0)
7003 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
7004 const0_rtx
, v
->new_reg
);
7008 /* We can probably test that giv's reduced reg. */
7009 if (validate_change (insn
, &SET_SRC (x
), new, 0))
7013 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7014 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7015 Require a constant for MULT_VAL, so we know it's nonzero.
7016 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7017 overflow problem. */
7019 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7020 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
7021 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7023 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7024 || GET_CODE (v
->add_val
) == LABEL_REF
7025 || GET_CODE (v
->add_val
) == CONST
7026 || (GET_CODE (v
->add_val
) == REG
7027 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
7029 /* If the giv V had the auto-inc address optimization applied
7030 to it, and INSN occurs between the giv insn and the biv
7031 insn, then we must adjust the value used here.
7032 This is rare, so we don't bother to do so. */
7034 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7035 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7036 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7037 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7043 /* If the giv has the opposite direction of change,
7044 then reverse the comparison. */
7045 if (INTVAL (v
->mult_val
) < 0)
7046 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
7049 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
7050 copy_rtx (v
->add_val
));
7052 /* Replace biv with the giv's reduced register. */
7053 update_reg_last_use (v
->add_val
, insn
);
7054 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7057 /* Insn doesn't support that constant or invariant. Copy it
7058 into a register (it will be a loop invariant.) */
7059 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
7061 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
7064 /* Substitute the new register for its invariant value in
7065 the compare expression. */
7066 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
7067 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7076 case GT
: case GE
: case GTU
: case GEU
:
7077 case LT
: case LE
: case LTU
: case LEU
:
7078 /* See if either argument is the biv. */
7079 if (XEXP (x
, 0) == reg
)
7080 arg
= XEXP (x
, 1), arg_operand
= 1;
7081 else if (XEXP (x
, 1) == reg
)
7082 arg
= XEXP (x
, 0), arg_operand
= 0;
7086 if (CONSTANT_P (arg
))
7088 /* First try to replace with any giv that has constant positive
7089 mult_val and constant add_val. We might be able to support
7090 negative mult_val, but it seems complex to do it in general. */
7092 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7093 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7094 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7095 || GET_CODE (v
->add_val
) == LABEL_REF
7096 || GET_CODE (v
->add_val
) == CONST
7097 || (GET_CODE (v
->add_val
) == REG
7098 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
7099 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7102 /* If the giv V had the auto-inc address optimization applied
7103 to it, and INSN occurs between the giv insn and the biv
7104 insn, then we must adjust the value used here.
7105 This is rare, so we don't bother to do so. */
7107 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7108 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7109 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7110 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7116 /* Replace biv with the giv's reduced reg. */
7117 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
7119 /* If all constants are actually constant integers and
7120 the derived constant can be directly placed in the COMPARE,
7122 if (GET_CODE (arg
) == CONST_INT
7123 && GET_CODE (v
->mult_val
) == CONST_INT
7124 && GET_CODE (v
->add_val
) == CONST_INT
7125 && validate_change (insn
, &XEXP (x
, arg_operand
),
7126 GEN_INT (INTVAL (arg
)
7127 * INTVAL (v
->mult_val
)
7128 + INTVAL (v
->add_val
)), 0))
7131 /* Otherwise, load it into a register. */
7132 tem
= gen_reg_rtx (mode
);
7133 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
7134 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
7137 /* If that failed, put back the change we made above. */
7138 XEXP (x
, 1-arg_operand
) = reg
;
7141 /* Look for giv with positive constant mult_val and nonconst add_val.
7142 Insert insns to calculate new compare value.
7143 ??? Turn this off due to possible overflow. */
7145 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7146 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7147 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7153 /* If the giv V had the auto-inc address optimization applied
7154 to it, and INSN occurs between the giv insn and the biv
7155 insn, then we must adjust the value used here.
7156 This is rare, so we don't bother to do so. */
7158 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7159 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7160 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7161 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7167 tem
= gen_reg_rtx (mode
);
7169 /* Replace biv with giv's reduced register. */
7170 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
7173 /* Compute value to compare against. */
7174 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
7175 /* Use it in this insn. */
7176 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
7177 if (apply_change_group ())
7181 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
7183 if (invariant_p (arg
) == 1)
7185 /* Look for giv with constant positive mult_val and nonconst
7186 add_val. Insert insns to compute new compare value.
7187 ??? Turn this off due to possible overflow. */
7189 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7190 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7191 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7197 /* If the giv V had the auto-inc address optimization applied
7198 to it, and INSN occurs between the giv insn and the biv
7199 insn, then we must adjust the value used here.
7200 This is rare, so we don't bother to do so. */
7202 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7203 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7204 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7205 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7211 tem
= gen_reg_rtx (mode
);
7213 /* Replace biv with giv's reduced register. */
7214 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
7217 /* Compute value to compare against. */
7218 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
7220 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
7221 if (apply_change_group ())
7226 /* This code has problems. Basically, you can't know when
7227 seeing if we will eliminate BL, whether a particular giv
7228 of ARG will be reduced. If it isn't going to be reduced,
7229 we can't eliminate BL. We can try forcing it to be reduced,
7230 but that can generate poor code.
7232 The problem is that the benefit of reducing TV, below should
7233 be increased if BL can actually be eliminated, but this means
7234 we might have to do a topological sort of the order in which
7235 we try to process biv. It doesn't seem worthwhile to do
7236 this sort of thing now. */
7239 /* Otherwise the reg compared with had better be a biv. */
7240 if (GET_CODE (arg
) != REG
7241 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
7244 /* Look for a pair of givs, one for each biv,
7245 with identical coefficients. */
7246 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7248 struct induction
*tv
;
7250 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
7253 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
7254 if (! tv
->ignore
&& ! tv
->maybe_dead
7255 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
7256 && rtx_equal_p (tv
->add_val
, v
->add_val
)
7257 && tv
->mode
== mode
)
7259 /* If the giv V had the auto-inc address optimization applied
7260 to it, and INSN occurs between the giv insn and the biv
7261 insn, then we must adjust the value used here.
7262 This is rare, so we don't bother to do so. */
7264 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7265 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7266 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7267 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7273 /* Replace biv with its giv's reduced reg. */
7274 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
7275 /* Replace other operand with the other giv's
7277 XEXP (x
, arg_operand
) = tv
->new_reg
;
7284 /* If we get here, the biv can't be eliminated. */
7288 /* If this address is a DEST_ADDR giv, it doesn't matter if the
7289 biv is used in it, since it will be replaced. */
7290 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7291 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
7299 /* See if any subexpression fails elimination. */
7300 fmt
= GET_RTX_FORMAT (code
);
7301 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7306 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
7307 eliminate_p
, where
))
7312 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7313 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
7314 eliminate_p
, where
))
7323 /* Return nonzero if the last use of REG
7324 is in an insn following INSN in the same basic block. */
7327 last_use_this_basic_block (reg
, insn
)
7333 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
7336 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
7342 /* Called via `note_stores' to record the initial value of a biv. Here we
7343 just record the location of the set and process it later. */
7346 record_initial (dest
, set
)
7350 struct iv_class
*bl
;
7352 if (GET_CODE (dest
) != REG
7353 || REGNO (dest
) >= max_reg_before_loop
7354 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
7357 bl
= reg_biv_class
[REGNO (dest
)];
7359 /* If this is the first set found, record it. */
7360 if (bl
->init_insn
== 0)
7362 bl
->init_insn
= note_insn
;
7367 /* If any of the registers in X are "old" and currently have a last use earlier
7368 than INSN, update them to have a last use of INSN. Their actual last use
7369 will be the previous insn but it will not have a valid uid_luid so we can't
7373 update_reg_last_use (x
, insn
)
7377 /* Check for the case where INSN does not have a valid luid. In this case,
7378 there is no need to modify the regno_last_uid, as this can only happen
7379 when code is inserted after the loop_end to set a pseudo's final value,
7380 and hence this insn will never be the last use of x. */
7381 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
7382 && INSN_UID (insn
) < max_uid_for_loop
7383 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
7384 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
7388 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
7389 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
7392 update_reg_last_use (XEXP (x
, i
), insn
);
7393 else if (fmt
[i
] == 'E')
7394 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7395 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
7400 /* Given a jump insn JUMP, return the condition that will cause it to branch
7401 to its JUMP_LABEL. If the condition cannot be understood, or is an
7402 inequality floating-point comparison which needs to be reversed, 0 will
7405 If EARLIEST is non-zero, it is a pointer to a place where the earliest
7406 insn used in locating the condition was found. If a replacement test
7407 of the condition is desired, it should be placed in front of that
7408 insn and we will be sure that the inputs are still valid.
7410 The condition will be returned in a canonical form to simplify testing by
7411 callers. Specifically:
7413 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
7414 (2) Both operands will be machine operands; (cc0) will have been replaced.
7415 (3) If an operand is a constant, it will be the second operand.
7416 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
7417 for GE, GEU, and LEU. */
7420 get_condition (jump
, earliest
)
7429 int reverse_code
= 0;
7430 int did_reverse_condition
= 0;
7431 enum machine_mode mode
;
7433 /* If this is not a standard conditional jump, we can't parse it. */
7434 if (GET_CODE (jump
) != JUMP_INSN
7435 || ! condjump_p (jump
) || simplejump_p (jump
))
7438 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
7439 mode
= GET_MODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
7440 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
7441 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
7446 /* If this branches to JUMP_LABEL when the condition is false, reverse
7448 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
7449 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
7450 code
= reverse_condition (code
), did_reverse_condition
^= 1;
7452 /* If we are comparing a register with zero, see if the register is set
7453 in the previous insn to a COMPARE or a comparison operation. Perform
7454 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
7457 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
7459 /* Set non-zero when we find something of interest. */
7463 /* If comparison with cc0, import actual comparison from compare
7467 if ((prev
= prev_nonnote_insn (prev
)) == 0
7468 || GET_CODE (prev
) != INSN
7469 || (set
= single_set (prev
)) == 0
7470 || SET_DEST (set
) != cc0_rtx
)
7473 op0
= SET_SRC (set
);
7474 op1
= CONST0_RTX (GET_MODE (op0
));
7480 /* If this is a COMPARE, pick up the two things being compared. */
7481 if (GET_CODE (op0
) == COMPARE
)
7483 op1
= XEXP (op0
, 1);
7484 op0
= XEXP (op0
, 0);
7487 else if (GET_CODE (op0
) != REG
)
7490 /* Go back to the previous insn. Stop if it is not an INSN. We also
7491 stop if it isn't a single set or if it has a REG_INC note because
7492 we don't want to bother dealing with it. */
7494 if ((prev
= prev_nonnote_insn (prev
)) == 0
7495 || GET_CODE (prev
) != INSN
7496 || FIND_REG_INC_NOTE (prev
, 0)
7497 || (set
= single_set (prev
)) == 0)
7500 /* If this is setting OP0, get what it sets it to if it looks
7502 if (rtx_equal_p (SET_DEST (set
), op0
))
7504 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
7506 /* ??? We may not combine comparisons done in a CCmode with
7507 comparisons not done in a CCmode. This is to aid targets
7508 like Alpha that have an IEEE compliant EQ instruction, and
7509 a non-IEEE compliant BEQ instruction. The use of CCmode is
7510 actually artificial, simply to prevent the combination, but
7511 should not affect other platforms. */
7513 if ((GET_CODE (SET_SRC (set
)) == COMPARE
7516 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7517 && (GET_MODE_BITSIZE (inner_mode
)
7518 <= HOST_BITS_PER_WIDE_INT
)
7519 && (STORE_FLAG_VALUE
7520 & ((HOST_WIDE_INT
) 1
7521 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7522 #ifdef FLOAT_STORE_FLAG_VALUE
7524 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7525 && FLOAT_STORE_FLAG_VALUE
< 0)
7528 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
7529 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7530 != (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7532 else if (((code
== EQ
7534 && (GET_MODE_BITSIZE (inner_mode
)
7535 <= HOST_BITS_PER_WIDE_INT
)
7536 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7537 && (STORE_FLAG_VALUE
7538 & ((HOST_WIDE_INT
) 1
7539 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7540 #ifdef FLOAT_STORE_FLAG_VALUE
7542 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7543 && FLOAT_STORE_FLAG_VALUE
< 0)
7546 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
7547 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7548 != (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7550 /* We might have reversed a LT to get a GE here. But this wasn't
7551 actually the comparison of data, so we don't flag that we
7552 have had to reverse the condition. */
7553 did_reverse_condition
^= 1;
7561 else if (reg_set_p (op0
, prev
))
7562 /* If this sets OP0, but not directly, we have to give up. */
7567 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
7568 code
= GET_CODE (x
);
7571 code
= reverse_condition (code
);
7572 did_reverse_condition
^= 1;
7576 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
7582 /* If constant is first, put it last. */
7583 if (CONSTANT_P (op0
))
7584 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
7586 /* If OP0 is the result of a comparison, we weren't able to find what
7587 was really being compared, so fail. */
7588 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
7591 /* Canonicalize any ordered comparison with integers involving equality
7592 if we can do computations in the relevant mode and we do not
7595 if (GET_CODE (op1
) == CONST_INT
7596 && GET_MODE (op0
) != VOIDmode
7597 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
7599 HOST_WIDE_INT const_val
= INTVAL (op1
);
7600 unsigned HOST_WIDE_INT uconst_val
= const_val
;
7601 unsigned HOST_WIDE_INT max_val
7602 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
7607 if (const_val
!= max_val
>> 1)
7608 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7611 /* When cross-compiling, const_val might be sign-extended from
7612 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7614 if ((const_val
& max_val
)
7615 != (((HOST_WIDE_INT
) 1
7616 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7617 code
= GT
, op1
= GEN_INT (const_val
- 1);
7621 if (uconst_val
< max_val
)
7622 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7626 if (uconst_val
!= 0)
7627 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7635 /* If this was floating-point and we reversed anything other than an
7636 EQ or NE, return zero. */
7637 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7638 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7640 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7644 /* Never return CC0; return zero instead. */
7649 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
7652 /* Similar to above routine, except that we also put an invariant last
7653 unless both operands are invariants. */
7656 get_condition_for_loop (x
)
7659 rtx comparison
= get_condition (x
, NULL_PTR
);
7662 || ! invariant_p (XEXP (comparison
, 0))
7663 || invariant_p (XEXP (comparison
, 1)))
7666 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7667 XEXP (comparison
, 1), XEXP (comparison
, 0));
7671 /* Analyze a loop in order to instrument it with the use of count register.
7672 loop_start and loop_end are the first and last insns of the loop.
7673 This function works in cooperation with insert_bct ().
7674 loop_can_insert_bct[loop_num] is set according to whether the optimization
7675 is applicable to the loop. When it is applicable, the following variables
7677 loop_start_value[loop_num]
7678 loop_comparison_value[loop_num]
7679 loop_increment[loop_num]
7680 loop_comparison_code[loop_num] */
7682 #ifdef HAVE_decrement_and_branch_on_count
7684 analyze_loop_iterations (loop_start
, loop_end
)
7685 rtx loop_start
, loop_end
;
7687 rtx comparison
, comparison_value
;
7688 rtx iteration_var
, initial_value
, increment
;
7689 enum rtx_code comparison_code
;
7695 /* loop_variable mode */
7696 enum machine_mode original_mode
;
7698 /* find the number of the loop */
7699 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7701 /* we change our mind only when we are sure that loop will be instrumented */
7702 loop_can_insert_bct
[loop_num
] = 0;
7704 /* is the optimization suppressed. */
7705 if ( !flag_branch_on_count_reg
)
7708 /* make sure that count-reg is not in use */
7709 if (loop_used_count_register
[loop_num
]){
7710 if (loop_dump_stream
)
7711 fprintf (loop_dump_stream
,
7712 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7717 /* make sure that the function has no indirect jumps. */
7718 if (indirect_jump_in_function
){
7719 if (loop_dump_stream
)
7720 fprintf (loop_dump_stream
,
7721 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7726 /* make sure that the last loop insn is a conditional jump */
7727 last_loop_insn
= PREV_INSN (loop_end
);
7728 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7729 if (loop_dump_stream
)
7730 fprintf (loop_dump_stream
,
7731 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7736 /* First find the iteration variable. If the last insn is a conditional
7737 branch, and the insn preceding it tests a register value, make that
7738 register the iteration variable. */
7740 /* We used to use prev_nonnote_insn here, but that fails because it might
7741 accidentally get the branch for a contained loop if the branch for this
7742 loop was deleted. We can only trust branches immediately before the
7745 comparison
= get_condition_for_loop (last_loop_insn
);
7746 /* ??? Get_condition may switch position of induction variable and
7747 invariant register when it canonicalizes the comparison. */
7749 if (comparison
== 0) {
7750 if (loop_dump_stream
)
7751 fprintf (loop_dump_stream
,
7752 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7757 comparison_code
= GET_CODE (comparison
);
7758 iteration_var
= XEXP (comparison
, 0);
7759 comparison_value
= XEXP (comparison
, 1);
7761 original_mode
= GET_MODE (iteration_var
);
7762 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7763 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7764 if (loop_dump_stream
)
7765 fprintf (loop_dump_stream
,
7766 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7771 /* get info about loop bounds and increment */
7772 iteration_info (iteration_var
, &initial_value
, &increment
,
7773 loop_start
, loop_end
);
7775 /* make sure that all required loop data were found */
7776 if (!(initial_value
&& increment
&& comparison_value
7777 && invariant_p (comparison_value
) && invariant_p (increment
)
7778 && ! indirect_jump_in_function
))
7780 if (loop_dump_stream
) {
7781 fprintf (loop_dump_stream
,
7782 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7783 if (!(initial_value
&& increment
&& comparison_value
)) {
7784 fprintf (loop_dump_stream
, "\tbounds not available: ");
7785 if ( ! initial_value
)
7786 fprintf (loop_dump_stream
, "initial ");
7788 fprintf (loop_dump_stream
, "increment ");
7789 if ( ! comparison_value
)
7790 fprintf (loop_dump_stream
, "comparison ");
7791 fprintf (loop_dump_stream
, "\n");
7793 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7794 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7799 /* make sure that the increment is constant */
7800 if (GET_CODE (increment
) != CONST_INT
) {
7801 if (loop_dump_stream
)
7802 fprintf (loop_dump_stream
,
7803 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7808 /* make sure that the loop contains neither function call, nor jump on table.
7809 (the count register might be altered by the called function, and might
7810 be used for a branch on table). */
7811 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7812 if (GET_CODE (insn
) == CALL_INSN
){
7813 if (loop_dump_stream
)
7814 fprintf (loop_dump_stream
,
7815 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7820 if (GET_CODE (insn
) == JUMP_INSN
7821 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7822 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7823 if (loop_dump_stream
)
7824 fprintf (loop_dump_stream
,
7825 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7831 /* At this point, we are sure that the loop can be instrumented with BCT.
7832 Some of the loops, however, will not be instrumented - the final decision
7833 is taken by insert_bct () */
7834 if (loop_dump_stream
)
7835 fprintf (loop_dump_stream
,
7836 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7839 /* mark all enclosing loops that they cannot use count register */
7840 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7841 marking here may prevent instrumenting an enclosing loop that could
7842 actually be instrumented. But since this is rare, it is safer to mark
7843 here in case the order of calling (analyze/insert)_bct would be changed. */
7844 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7845 loop_used_count_register
[i
] = 1;
7847 /* Set data structures which will be used by the instrumentation phase */
7848 loop_start_value
[loop_num
] = initial_value
;
7849 loop_comparison_value
[loop_num
] = comparison_value
;
7850 loop_increment
[loop_num
] = increment
;
7851 loop_comparison_code
[loop_num
] = comparison_code
;
7852 loop_can_insert_bct
[loop_num
] = 1;
7856 /* instrument loop for insertion of bct instruction. We distinguish between
7857 loops with compile-time bounds, to those with run-time bounds. The loop
7858 behaviour is analized according to the following characteristics/variables:
7860 ; comparison-value: the value to which the iteration counter is compared.
7861 ; initial-value: iteration-counter initial value.
7862 ; increment: iteration-counter increment.
7863 ; Computed variables:
7864 ; increment-direction: the sign of the increment.
7865 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7866 ; range-direction: sign (comparison-value - initial-value)
7867 We give up on the following cases:
7868 ; loop variable overflow.
7869 ; run-time loop bounds with comparison code NE.
7873 insert_bct (loop_start
, loop_end
)
7874 rtx loop_start
, loop_end
;
7876 rtx initial_value
, comparison_value
, increment
;
7877 enum rtx_code comparison_code
;
7879 int increment_direction
, compare_direction
;
7882 /* if the loop condition is <= or >=, the number of iteration
7883 is 1 more than the range of the bounds of the loop */
7884 int add_iteration
= 0;
7886 /* the only machine mode we work with - is the integer of the size that the
7888 enum machine_mode loop_var_mode
= SImode
;
7890 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7892 /* get loop-variables. No need to check that these are valid - already
7893 checked in analyze_loop_iterations (). */
7894 comparison_code
= loop_comparison_code
[loop_num
];
7895 initial_value
= loop_start_value
[loop_num
];
7896 comparison_value
= loop_comparison_value
[loop_num
];
7897 increment
= loop_increment
[loop_num
];
7899 /* check analyze_loop_iterations decision for this loop. */
7900 if (! loop_can_insert_bct
[loop_num
]){
7901 if (loop_dump_stream
)
7902 fprintf (loop_dump_stream
,
7903 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7908 /* It's impossible to instrument a competely unrolled loop. */
7909 if (loop_unroll_factor
[loop_num
] == -1)
7912 /* make sure that the last loop insn is a conditional jump .
7913 This check is repeated from analyze_loop_iterations (),
7914 because unrolling might have changed that. */
7915 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7916 || !condjump_p (PREV_INSN (loop_end
))) {
7917 if (loop_dump_stream
)
7918 fprintf (loop_dump_stream
,
7919 "insert_bct: not instrumenting BCT because of invalid branch\n");
7923 /* fix increment in case loop was unrolled. */
7924 if (loop_unroll_factor
[loop_num
] > 1)
7925 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7927 /* determine properties and directions of the loop */
7928 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7929 switch ( comparison_code
) {
7934 compare_direction
= 1;
7941 compare_direction
= -1;
7945 /* in this case we cannot know the number of iterations */
7946 if (loop_dump_stream
)
7947 fprintf (loop_dump_stream
,
7948 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7955 compare_direction
= 1;
7961 compare_direction
= -1;
7964 compare_direction
= 0;
7971 /* make sure that the loop does not end by an overflow */
7972 if (compare_direction
!= increment_direction
) {
7973 if (loop_dump_stream
)
7974 fprintf (loop_dump_stream
,
7975 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7980 /* try to instrument the loop. */
7982 /* Handle the simpler case, where the bounds are known at compile time. */
7983 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7986 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7988 /* check the relation between compare-val and initial-val */
7989 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7990 int range_direction
= (difference
> 0) ? 1 : -1;
7992 /* make sure the loop executes enough iterations to gain from BCT */
7993 if (difference
> -3 && difference
< 3) {
7994 if (loop_dump_stream
)
7995 fprintf (loop_dump_stream
,
7996 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
8001 /* make sure that the loop executes at least once */
8002 if ((range_direction
== 1 && compare_direction
== -1)
8003 || (range_direction
== -1 && compare_direction
== 1))
8005 if (loop_dump_stream
)
8006 fprintf (loop_dump_stream
,
8007 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
8012 /* make sure that the loop does not end by an overflow (in compile time
8013 bounds we must have an additional check for overflow, because here
8014 we also support the compare code of 'NE'. */
8015 if (comparison_code
== NE
8016 && increment_direction
!= range_direction
) {
8017 if (loop_dump_stream
)
8018 fprintf (loop_dump_stream
,
8019 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
8024 /* Determine the number of iterations by:
8026 ; compare-val - initial-val + (increment -1) + additional-iteration
8027 ; num_iterations = -----------------------------------------------------------------
8030 difference
= (range_direction
> 0) ? difference
: -difference
;
8032 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
8033 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
8034 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
8035 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
8036 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
8039 if (increment_value_abs
== 0) {
8040 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
8043 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
8044 / increment_value_abs
;
8047 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
8049 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
8051 /* Done with this loop. */
8055 /* Handle the more complex case, that the bounds are NOT known at compile time. */
8056 /* In this case we generate run_time calculation of the number of iterations */
8058 /* With runtime bounds, if the compare is of the form '!=' we give up */
8059 if (comparison_code
== NE
) {
8060 if (loop_dump_stream
)
8061 fprintf (loop_dump_stream
,
8062 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
8068 /* We rely on the existence of run-time guard to ensure that the
8069 loop executes at least once. */
8071 rtx iterations_num_reg
;
8073 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
8075 /* make sure that the increment is a power of two, otherwise (an
8076 expensive) divide is needed. */
8077 if (exact_log2 (increment_value_abs
) == -1)
8079 if (loop_dump_stream
)
8080 fprintf (loop_dump_stream
,
8081 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
8085 /* compute the number of iterations */
8090 /* Again, the number of iterations is calculated by:
8092 ; compare-val - initial-val + (increment -1) + additional-iteration
8093 ; num_iterations = -----------------------------------------------------------------
8096 /* ??? Do we have to call copy_rtx here before passing rtx to
8098 if (compare_direction
> 0) {
8099 /* <, <= :the loop variable is increasing */
8100 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
8101 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8104 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
8105 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8108 if (increment_value_abs
- 1 + add_iteration
!= 0)
8109 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
8110 GEN_INT (increment_value_abs
- 1 + add_iteration
),
8111 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8113 if (increment_value_abs
!= 1)
8115 /* ??? This will generate an expensive divide instruction for
8116 most targets. The original authors apparently expected this
8117 to be a shift, since they test for power-of-2 divisors above,
8118 but just naively generating a divide instruction will not give
8119 a shift. It happens to work for the PowerPC target because
8120 the rs6000.md file has a divide pattern that emits shifts.
8121 It will probably not work for any other target. */
8122 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
8124 GEN_INT (increment_value_abs
),
8125 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8128 iterations_num_reg
= temp_reg
;
8130 sequence
= gen_sequence ();
8132 emit_insn_before (sequence
, loop_start
);
8133 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
8137 /* instrument loop by inserting a bct in it. This is done in the following way:
8138 1. A new register is created and assigned the hard register number of the count
8140 2. In the head of the loop the new variable is initialized by the value passed in the
8141 loop_num_iterations parameter.
8142 3. At the end of the loop, comparison of the register with 0 is generated.
8143 The created comparison follows the pattern defined for the
8144 decrement_and_branch_on_count insn, so this insn will be generated in assembly
8146 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
8147 not used elsewhere, it will be eliminated by data-flow analisys. */
8150 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
8151 rtx loop_start
, loop_end
;
8152 rtx loop_num_iterations
;
8154 rtx temp_reg1
, temp_reg2
;
8158 enum machine_mode loop_var_mode
= SImode
;
8160 if (HAVE_decrement_and_branch_on_count
)
8162 if (loop_dump_stream
)
8163 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
8165 /* eliminate the check on the old variable */
8166 delete_insn (PREV_INSN (loop_end
));
8167 delete_insn (PREV_INSN (loop_end
));
8169 /* insert the label which will delimit the start of the loop */
8170 start_label
= gen_label_rtx ();
8171 emit_label_after (start_label
, loop_start
);
8173 /* insert initialization of the count register into the loop header */
8175 temp_reg1
= gen_reg_rtx (loop_var_mode
);
8176 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
8178 /* this will be count register */
8179 temp_reg2
= gen_rtx_REG (loop_var_mode
, COUNT_REGISTER_REGNUM
);
8180 /* we have to move the value to the count register from an GPR
8181 because rtx pointed to by loop_num_iterations could contain
8182 expression which cannot be moved into count register */
8183 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
8185 sequence
= gen_sequence ();
8187 emit_insn_after (sequence
, loop_start
);
8189 /* insert new comparison on the count register instead of the
8190 old one, generating the needed BCT pattern (that will be
8191 later recognized by assembly generation phase). */
8192 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
8194 LABEL_NUSES (start_label
)++;
8198 #endif /* HAVE_decrement_and_branch_on_count */
8202 /* Scan the function and determine whether it has indirect (computed) jumps.
8204 This is taken mostly from flow.c; similar code exists elsewhere
8205 in the compiler. It may be useful to put this into rtlanal.c. */
8207 indirect_jump_in_function_p (start
)
8212 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
8213 if (computed_jump_p (insn
))