1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num
;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
81 /* For each loop, gives the containing loop number, -1 if none. */
86 /* The main output of analyze_loop_iterations is placed here */
88 int *loop_can_insert_bct
;
90 /* For each loop, determines whether some of its inner loops has used
93 int *loop_used_count_register
;
95 /* loop parameters for arithmetic loops. These loops have a loop variable
96 which is initialized to loop_start_value, incremented in each iteration
97 by "loop_increment". At the end of the iteration the loop variable is
98 compared to the loop_comparison_value (using loop_comparison_code). */
101 rtx
*loop_comparison_value
;
102 rtx
*loop_start_value
;
103 enum rtx_code
*loop_comparison_code
;
106 /* For each loop, keep track of its unrolling factor.
110 -1: completely unrolled
111 >0: holds the unroll exact factor. */
112 int *loop_unroll_factor
;
114 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
115 really a loop (an insn outside the loop branches into it). */
117 static char *loop_invalid
;
119 /* Indexed by loop number, links together all LABEL_REFs which refer to
120 code labels outside the loop. Used by routines that need to know all
121 loop exits, such as final_biv_value and final_giv_value.
123 This does not include loop exits due to return instructions. This is
124 because all bivs and givs are pseudos, and hence must be dead after a
125 return, so the presense of a return does not affect any of the
126 optimizations that use this info. It is simpler to just not include return
127 instructions on this list. */
129 rtx
*loop_number_exit_labels
;
131 /* Indexed by loop number, counts the number of LABEL_REFs on
132 loop_number_exit_labels for this loop and all loops nested inside it. */
134 int *loop_number_exit_count
;
136 /* Holds the number of loop iterations. It is zero if the number could not be
137 calculated. Must be unsigned since the number of iterations can
138 be as high as 2^wordsize-1. For loops with a wider iterator, this number
139 will be zero if the number of loop iterations is too large for an
140 unsigned integer to hold. */
142 unsigned HOST_WIDE_INT loop_n_iterations
;
144 /* Nonzero if there is a subroutine call in the current loop. */
146 static int loop_has_call
;
148 /* Nonzero if there is a volatile memory reference in the current
151 static int loop_has_volatile
;
153 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
154 current loop. A continue statement will generate a branch to
155 NEXT_INSN (loop_continue). */
157 static rtx loop_continue
;
159 /* Indexed by register number, contains the number of times the reg
160 is set during the loop being scanned.
161 During code motion, a negative value indicates a reg that has been
162 made a candidate; in particular -2 means that it is an candidate that
163 we know is equal to a constant and -1 means that it is an candidate
164 not known equal to a constant.
165 After code motion, regs moved have 0 (which is accurate now)
166 while the failed candidates have the original number of times set.
168 Therefore, at all times, == 0 indicates an invariant register;
169 < 0 a conditionally invariant one. */
171 static varray_type n_times_set
;
173 /* Original value of n_times_set; same except that this value
174 is not set negative for a reg whose sets have been made candidates
175 and not set to 0 for a reg that is moved. */
177 static varray_type n_times_used
;
179 /* Index by register number, 1 indicates that the register
180 cannot be moved or strength reduced. */
182 static varray_type may_not_optimize
;
184 /* Nonzero means reg N has already been moved out of one loop.
185 This reduces the desire to move it out of another. */
187 static char *moved_once
;
189 /* Array of MEMs that are stored in this loop. If there are too many to fit
190 here, we just turn on unknown_address_altered. */
192 #define NUM_STORES 30
193 static rtx loop_store_mems
[NUM_STORES
];
195 /* Index of first available slot in above array. */
196 static int loop_store_mems_idx
;
198 typedef struct loop_mem_info
{
199 rtx mem
; /* The MEM itself. */
200 rtx reg
; /* Corresponding pseudo, if any. */
201 int optimize
; /* Nonzero if we can optimize access to this MEM. */
204 /* Array of MEMs that are used (read or written) in this loop, but
205 cannot be aliased by anything in this loop, except perhaps
206 themselves. In other words, if loop_mems[i] is altered during the
207 loop, it is altered by an expression that is rtx_equal_p to it. */
209 static loop_mem_info
*loop_mems
;
211 /* The index of the next available slot in LOOP_MEMS. */
213 static int loop_mems_idx
;
215 /* The number of elements allocated in LOOP_MEMs. */
217 static int loop_mems_allocated
;
219 /* Nonzero if we don't know what MEMs were changed in the current loop.
220 This happens if the loop contains a call (in which case `loop_has_call'
221 will also be set) or if we store into more than NUM_STORES MEMs. */
223 static int unknown_address_altered
;
225 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
226 static int num_movables
;
228 /* Count of memory write instructions discovered in the loop. */
229 static int num_mem_sets
;
231 /* Number of loops contained within the current one, including itself. */
232 static int loops_enclosed
;
234 /* Bound on pseudo register number before loop optimization.
235 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
236 int max_reg_before_loop
;
238 /* This obstack is used in product_cheap_p to allocate its rtl. It
239 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
240 If we used the same obstack that it did, we would be deallocating
243 static struct obstack temp_obstack
;
245 /* This is where the pointer to the obstack being used for RTL is stored. */
247 extern struct obstack
*rtl_obstack
;
249 #define obstack_chunk_alloc xmalloc
250 #define obstack_chunk_free free
252 /* During the analysis of a loop, a chain of `struct movable's
253 is made to record all the movable insns found.
254 Then the entire chain can be scanned to decide which to move. */
258 rtx insn
; /* A movable insn */
259 rtx set_src
; /* The expression this reg is set from. */
260 rtx set_dest
; /* The destination of this SET. */
261 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
262 of any registers used within the LIBCALL. */
263 int consec
; /* Number of consecutive following insns
264 that must be moved with this one. */
265 int regno
; /* The register it sets */
266 short lifetime
; /* lifetime of that register;
267 may be adjusted when matching movables
268 that load the same value are found. */
269 short savings
; /* Number of insns we can move for this reg,
270 including other movables that force this
271 or match this one. */
272 unsigned int cond
: 1; /* 1 if only conditionally movable */
273 unsigned int force
: 1; /* 1 means MUST move this insn */
274 unsigned int global
: 1; /* 1 means reg is live outside this loop */
275 /* If PARTIAL is 1, GLOBAL means something different:
276 that the reg is live outside the range from where it is set
277 to the following label. */
278 unsigned int done
: 1; /* 1 inhibits further processing of this */
280 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
281 In particular, moving it does not make it
283 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
284 load SRC, rather than copying INSN. */
285 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
286 first insn of a consecutive sets group. */
287 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
288 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
289 that we should avoid changing when clearing
290 the rest of the reg. */
291 struct movable
*match
; /* First entry for same value */
292 struct movable
*forces
; /* An insn that must be moved if this is */
293 struct movable
*next
;
296 static struct movable
*the_movables
;
298 FILE *loop_dump_stream
;
300 /* Forward declarations. */
302 static void find_and_verify_loops
PROTO((rtx
));
303 static void mark_loop_jump
PROTO((rtx
, int));
304 static void prescan_loop
PROTO((rtx
, rtx
));
305 static int reg_in_basic_block_p
PROTO((rtx
, rtx
));
306 static int consec_sets_invariant_p
PROTO((rtx
, int, rtx
));
307 static rtx libcall_other_reg
PROTO((rtx
, rtx
));
308 static int labels_in_range_p
PROTO((rtx
, int));
309 static void count_loop_regs_set
PROTO((rtx
, rtx
, varray_type
, varray_type
,
311 static void note_addr_stored
PROTO((rtx
, rtx
));
312 static int loop_reg_used_before_p
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
));
313 static void scan_loop
PROTO((rtx
, rtx
, int));
315 static void replace_call_address
PROTO((rtx
, rtx
, rtx
));
317 static rtx skip_consec_insns
PROTO((rtx
, int));
318 static int libcall_benefit
PROTO((rtx
));
319 static void ignore_some_movables
PROTO((struct movable
*));
320 static void force_movables
PROTO((struct movable
*));
321 static void combine_movables
PROTO((struct movable
*, int));
322 static int regs_match_p
PROTO((rtx
, rtx
, struct movable
*));
323 static int rtx_equal_for_loop_p
PROTO((rtx
, rtx
, struct movable
*));
324 static void add_label_notes
PROTO((rtx
, rtx
));
325 static void move_movables
PROTO((struct movable
*, int, int, rtx
, rtx
, int));
326 static int count_nonfixed_reads
PROTO((rtx
));
327 static void strength_reduce
PROTO((rtx
, rtx
, rtx
, int, rtx
, rtx
, int));
328 static void find_single_use_in_loop
PROTO((rtx
, rtx
, varray_type
));
329 static int valid_initial_value_p
PROTO((rtx
, rtx
, int, rtx
));
330 static void find_mem_givs
PROTO((rtx
, rtx
, int, rtx
, rtx
));
331 static void record_biv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, int, int));
332 static void check_final_value
PROTO((struct induction
*, rtx
, rtx
));
333 static void record_giv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
, int, enum g_types
, int, rtx
*, rtx
, rtx
));
334 static void update_giv_derive
PROTO((rtx
));
335 static int basic_induction_var
PROTO((rtx
, enum machine_mode
, rtx
, rtx
, rtx
*, rtx
*));
336 static rtx simplify_giv_expr
PROTO((rtx
, int *));
337 static int general_induction_var
PROTO((rtx
, rtx
*, rtx
*, rtx
*, int, int *));
338 static int consec_sets_giv
PROTO((int, rtx
, rtx
, rtx
, rtx
*, rtx
*));
339 static int check_dbra_loop
PROTO((rtx
, int, rtx
));
340 static rtx express_from_1
PROTO((rtx
, rtx
, rtx
));
341 static rtx express_from
PROTO((struct induction
*, struct induction
*));
342 static rtx combine_givs_p
PROTO((struct induction
*, struct induction
*));
343 static void combine_givs
PROTO((struct iv_class
*));
344 static int product_cheap_p
PROTO((rtx
, rtx
));
345 static int maybe_eliminate_biv
PROTO((struct iv_class
*, rtx
, rtx
, int, int, int));
346 static int maybe_eliminate_biv_1
PROTO((rtx
, rtx
, struct iv_class
*, int, rtx
));
347 static int last_use_this_basic_block
PROTO((rtx
, rtx
));
348 static void record_initial
PROTO((rtx
, rtx
));
349 static void update_reg_last_use
PROTO((rtx
, rtx
));
350 static rtx next_insn_in_loop
PROTO((rtx
, rtx
, rtx
, rtx
));
351 static void load_mems_and_recount_loop_regs_set
PROTO((rtx
, rtx
, rtx
,
354 static void load_mems
PROTO((rtx
, rtx
, rtx
, rtx
));
355 static int insert_loop_mem
PROTO((rtx
*, void *));
356 static int replace_loop_mem
PROTO((rtx
*, void *));
357 static int replace_label
PROTO((rtx
*, void *));
359 typedef struct rtx_and_int
{
364 typedef struct rtx_pair
{
369 /* Nonzero iff INSN is between START and END, inclusive. */
370 #define INSN_IN_RANGE_P(INSN, START, END) \
371 (INSN_UID (INSN) < max_uid_for_loop \
372 && INSN_LUID (INSN) >= INSN_LUID (START) \
373 && INSN_LUID (INSN) <= INSN_LUID (END))
376 /* This is extern from unroll.c */
377 extern void iteration_info
PROTO((rtx
, rtx
*, rtx
*, rtx
, rtx
));
379 /* Two main functions for implementing bct:
380 first - to be called before loop unrolling, and the second - after */
381 #ifdef HAVE_decrement_and_branch_on_count
382 static void analyze_loop_iterations
PROTO((rtx
, rtx
));
383 static void insert_bct
PROTO((rtx
, rtx
));
385 /* Auxiliary function that inserts the bct pattern into the loop */
386 static void instrument_loop_bct
PROTO((rtx
, rtx
, rtx
));
387 #endif /* HAVE_decrement_and_branch_on_count */
390 /* Indirect_jump_in_function is computed once per function. */
391 int indirect_jump_in_function
= 0;
392 static int indirect_jump_in_function_p
PROTO((rtx
));
395 /* Relative gain of eliminating various kinds of operations. */
398 static int shift_cost
;
399 static int mult_cost
;
402 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
403 copy the value of the strength reduced giv to its original register. */
404 static int copy_cost
;
406 /* Cost of using a register, to normalize the benefits of a giv. */
407 static int reg_address_cost
;
413 char *free_point
= (char *) oballoc (1);
414 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
416 add_cost
= rtx_cost (gen_rtx_PLUS (word_mode
, reg
, reg
), SET
);
419 reg_address_cost
= ADDRESS_COST (reg
);
421 reg_address_cost
= rtx_cost (reg
, MEM
);
424 /* We multiply by 2 to reconcile the difference in scale between
425 these two ways of computing costs. Otherwise the cost of a copy
426 will be far less than the cost of an add. */
430 /* Free the objects we just allocated. */
433 /* Initialize the obstack used for rtl in product_cheap_p. */
434 gcc_obstack_init (&temp_obstack
);
437 /* Entry point of this file. Perform loop optimization
438 on the current function. F is the first insn of the function
439 and DUMPFILE is a stream for output of a trace of actions taken
440 (or 0 if none should be output). */
443 loop_optimize (f
, dumpfile
, unroll_p
)
444 /* f is the first instruction of a chain of insns for one function */
453 loop_dump_stream
= dumpfile
;
455 init_recog_no_volatile ();
457 max_reg_before_loop
= max_reg_num ();
459 moved_once
= (char *) alloca (max_reg_before_loop
);
460 bzero (moved_once
, max_reg_before_loop
);
464 /* Count the number of loops. */
467 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
469 if (GET_CODE (insn
) == NOTE
470 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
474 /* Don't waste time if no loops. */
475 if (max_loop_num
== 0)
478 /* Get size to use for tables indexed by uids.
479 Leave some space for labels allocated by find_and_verify_loops. */
480 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
482 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
483 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
485 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
486 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
488 /* Allocate tables for recording each loop. We set each entry, so they need
490 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
491 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
492 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
493 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
494 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
495 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
497 /* This is initialized by the unrolling code, so we go ahead
498 and clear them just in case we are not performing loop
500 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
501 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
504 /* Allocate for BCT optimization */
505 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
506 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
508 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
509 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
511 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
512 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
513 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
514 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
515 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
516 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
519 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
520 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
523 /* Find and process each loop.
524 First, find them, and record them in order of their beginnings. */
525 find_and_verify_loops (f
);
527 /* Now find all register lifetimes. This must be done after
528 find_and_verify_loops, because it might reorder the insns in the
530 reg_scan (f
, max_reg_num (), 1);
532 /* This must occur after reg_scan so that registers created by gcse
533 will have entries in the register tables.
535 We could have added a call to reg_scan after gcse_main in toplev.c,
536 but moving this call to init_alias_analysis is more efficient. */
537 init_alias_analysis ();
539 /* See if we went too far. */
540 if (get_max_uid () > max_uid_for_loop
)
542 /* Now reset it to the actual size we need. See above. */
543 max_uid_for_loop
= get_max_uid () + 1;
545 /* Compute the mapping from uids to luids.
546 LUIDs are numbers assigned to insns, like uids,
547 except that luids increase monotonically through the code.
548 Don't assign luids to line-number NOTEs, so that the distance in luids
549 between two insns is not affected by -g. */
551 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
554 if (GET_CODE (insn
) != NOTE
555 || NOTE_LINE_NUMBER (insn
) <= 0)
556 uid_luid
[INSN_UID (insn
)] = ++i
;
558 /* Give a line number note the same luid as preceding insn. */
559 uid_luid
[INSN_UID (insn
)] = i
;
564 /* Don't leave gaps in uid_luid for insns that have been
565 deleted. It is possible that the first or last insn
566 using some register has been deleted by cross-jumping.
567 Make sure that uid_luid for that former insn's uid
568 points to the general area where that insn used to be. */
569 for (i
= 0; i
< max_uid_for_loop
; i
++)
571 uid_luid
[0] = uid_luid
[i
];
572 if (uid_luid
[0] != 0)
575 for (i
= 0; i
< max_uid_for_loop
; i
++)
576 if (uid_luid
[i
] == 0)
577 uid_luid
[i
] = uid_luid
[i
- 1];
579 /* Create a mapping from loops to BLOCK tree nodes. */
580 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
581 find_loop_tree_blocks ();
583 /* Determine if the function has indirect jump. On some systems
584 this prevents low overhead loop instructions from being used. */
585 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
587 /* Now scan the loops, last ones first, since this means inner ones are done
588 before outer ones. */
589 for (i
= max_loop_num
-1; i
>= 0; i
--)
590 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
591 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
594 /* If debugging and unrolling loops, we must replicate the tree nodes
595 corresponding to the blocks inside the loop, so that the original one
596 to one mapping will remain. */
597 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
598 unroll_block_trees ();
600 end_alias_analysis ();
603 /* Returns the next insn, in execution order, after INSN. START and
604 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
605 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
606 insn-stream; it is used with loops that are entered near the
610 next_insn_in_loop (insn
, start
, end
, loop_top
)
616 insn
= NEXT_INSN (insn
);
621 /* Go to the top of the loop, and continue there. */
635 /* Optimize one loop whose start is LOOP_START and end is END.
636 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
637 NOTE_INSN_LOOP_END. */
639 /* ??? Could also move memory writes out of loops if the destination address
640 is invariant, the source is invariant, the memory write is not volatile,
641 and if we can prove that no read inside the loop can read this address
642 before the write occurs. If there is a read of this address after the
643 write, then we can also mark the memory read as invariant. */
646 scan_loop (loop_start
, end
, unroll_p
)
652 /* 1 if we are scanning insns that could be executed zero times. */
654 /* 1 if we are scanning insns that might never be executed
655 due to a subroutine call which might exit before they are reached. */
657 /* For a rotated loop that is entered near the bottom,
658 this is the label at the top. Otherwise it is zero. */
660 /* Jump insn that enters the loop, or 0 if control drops in. */
661 rtx loop_entry_jump
= 0;
662 /* Place in the loop where control enters. */
664 /* Number of insns in the loop. */
669 /* The SET from an insn, if it is the only SET in the insn. */
671 /* Chain describing insns movable in current loop. */
672 struct movable
*movables
= 0;
673 /* Last element in `movables' -- so we can add elements at the end. */
674 struct movable
*last_movable
= 0;
675 /* Ratio of extra register life span we can justify
676 for saving an instruction. More if loop doesn't call subroutines
677 since in that case saving an insn makes more difference
678 and more registers are available. */
680 /* If we have calls, contains the insn in which a register was used
681 if it was used exactly once; contains const0_rtx if it was used more
683 varray_type reg_single_usage
= 0;
684 /* Nonzero if we are scanning instructions in a sub-loop. */
688 /* Determine whether this loop starts with a jump down to a test at
689 the end. This will occur for a small number of loops with a test
690 that is too complex to duplicate in front of the loop.
692 We search for the first insn or label in the loop, skipping NOTEs.
693 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
694 (because we might have a loop executed only once that contains a
695 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
696 (in case we have a degenerate loop).
698 Note that if we mistakenly think that a loop is entered at the top
699 when, in fact, it is entered at the exit test, the only effect will be
700 slightly poorer optimization. Making the opposite error can generate
701 incorrect code. Since very few loops now start with a jump to the
702 exit test, the code here to detect that case is very conservative. */
704 for (p
= NEXT_INSN (loop_start
);
706 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
707 && (GET_CODE (p
) != NOTE
708 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
709 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
715 /* Set up variables describing this loop. */
716 prescan_loop (loop_start
, end
);
717 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
719 /* If loop has a jump before the first label,
720 the true entry is the target of that jump.
721 Start scan from there.
722 But record in LOOP_TOP the place where the end-test jumps
723 back to so we can scan that after the end of the loop. */
724 if (GET_CODE (p
) == JUMP_INSN
)
728 /* Loop entry must be unconditional jump (and not a RETURN) */
730 && JUMP_LABEL (p
) != 0
731 /* Check to see whether the jump actually
732 jumps out of the loop (meaning it's no loop).
733 This case can happen for things like
734 do {..} while (0). If this label was generated previously
735 by loop, we can't tell anything about it and have to reject
737 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, end
))
739 loop_top
= next_label (scan_start
);
740 scan_start
= JUMP_LABEL (p
);
744 /* If SCAN_START was an insn created by loop, we don't know its luid
745 as required by loop_reg_used_before_p. So skip such loops. (This
746 test may never be true, but it's best to play it safe.)
748 Also, skip loops where we do not start scanning at a label. This
749 test also rejects loops starting with a JUMP_INSN that failed the
752 if (INSN_UID (scan_start
) >= max_uid_for_loop
753 || GET_CODE (scan_start
) != CODE_LABEL
)
755 if (loop_dump_stream
)
756 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
757 INSN_UID (loop_start
), INSN_UID (end
));
761 /* Count number of times each reg is set during this loop.
762 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
763 the setting of register I. If this loop has calls, set
764 VARRAY_RTX (reg_single_usage, I). */
766 /* Allocate extra space for REGS that might be created by
767 load_mems. We allocate a little extra slop as well, in the hopes
768 that even after the moving of movables creates some new registers
769 we won't have to reallocate these arrays. However, we do grow
770 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
771 nregs
= max_reg_num () + loop_mems_idx
+ 16;
772 VARRAY_INT_INIT (n_times_set
, nregs
, "n_times_set");
773 VARRAY_INT_INIT (n_times_used
, nregs
, "n_times_used");
774 VARRAY_CHAR_INIT (may_not_optimize
, nregs
, "may_not_optimize");
777 VARRAY_RTX_INIT (reg_single_usage
, nregs
, "reg_single_usage");
779 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
780 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
782 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
784 VARRAY_CHAR (may_not_optimize
, i
) = 1;
785 VARRAY_INT (n_times_set
, i
) = 1;
788 #ifdef AVOID_CCMODE_COPIES
789 /* Don't try to move insns which set CC registers if we should not
790 create CCmode register copies. */
791 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
792 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
793 VARRAY_CHAR (may_not_optimize
, i
) = 1;
796 bcopy ((char *) &n_times_set
->data
,
797 (char *) &n_times_used
->data
, nregs
* sizeof (int));
799 if (loop_dump_stream
)
801 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
802 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
804 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
805 INSN_UID (loop_continue
));
808 /* Scan through the loop finding insns that are safe to move.
809 Set n_times_set negative for the reg being set, so that
810 this reg will be considered invariant for subsequent insns.
811 We consider whether subsequent insns use the reg
812 in deciding whether it is worth actually moving.
814 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
815 and therefore it is possible that the insns we are scanning
816 would never be executed. At such times, we must make sure
817 that it is safe to execute the insn once instead of zero times.
818 When MAYBE_NEVER is 0, all insns will be executed at least once
819 so that is not a problem. */
821 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
823 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
825 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
826 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
828 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
829 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
832 if (GET_CODE (p
) == INSN
833 && (set
= single_set (p
))
834 && GET_CODE (SET_DEST (set
)) == REG
835 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
840 rtx src
= SET_SRC (set
);
841 rtx dependencies
= 0;
843 /* Figure out what to use as a source of this insn. If a REG_EQUIV
844 note is given or if a REG_EQUAL note with a constant operand is
845 specified, use it as the source and mark that we should move
846 this insn by calling emit_move_insn rather that duplicating the
849 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
851 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
853 src
= XEXP (temp
, 0), move_insn
= 1;
856 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
857 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
858 src
= XEXP (temp
, 0), move_insn
= 1;
859 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
861 src
= XEXP (temp
, 0);
862 /* A libcall block can use regs that don't appear in
863 the equivalent expression. To move the libcall,
864 we must move those regs too. */
865 dependencies
= libcall_other_reg (p
, src
);
869 /* Don't try to optimize a register that was made
870 by loop-optimization for an inner loop.
871 We don't know its life-span, so we can't compute the benefit. */
872 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
874 /* In order to move a register, we need to have one of three cases:
875 (1) it is used only in the same basic block as the set
876 (2) it is not a user variable and it is not used in the
877 exit test (this can cause the variable to be used
878 before it is set just like a user-variable).
879 (3) the set is guaranteed to be executed once the loop starts,
880 and the reg is not used until after that. */
881 else if (! ((! maybe_never
882 && ! loop_reg_used_before_p (set
, p
, loop_start
,
884 || (! REG_USERVAR_P (SET_DEST (set
))
885 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
886 || reg_in_basic_block_p (p
, SET_DEST (set
))))
888 else if ((tem
= invariant_p (src
))
889 && (dependencies
== 0
890 || (tem2
= invariant_p (dependencies
)) != 0)
891 && (VARRAY_INT (n_times_set
,
892 REGNO (SET_DEST (set
))) == 1
894 = consec_sets_invariant_p
896 VARRAY_INT (n_times_set
, REGNO (SET_DEST (set
))),
898 /* If the insn can cause a trap (such as divide by zero),
899 can't move it unless it's guaranteed to be executed
900 once loop is entered. Even a function call might
901 prevent the trap insn from being reached
902 (since it might exit!) */
903 && ! ((maybe_never
|| call_passed
)
904 && may_trap_p (src
)))
906 register struct movable
*m
;
907 register int regno
= REGNO (SET_DEST (set
));
909 /* A potential lossage is where we have a case where two insns
910 can be combined as long as they are both in the loop, but
911 we move one of them outside the loop. For large loops,
912 this can lose. The most common case of this is the address
913 of a function being called.
915 Therefore, if this register is marked as being used exactly
916 once if we are in a loop with calls (a "large loop"), see if
917 we can replace the usage of this register with the source
918 of this SET. If we can, delete this insn.
920 Don't do this if P has a REG_RETVAL note or if we have
921 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
923 if (reg_single_usage
&& VARRAY_RTX (reg_single_usage
, regno
) != 0
924 && VARRAY_RTX (reg_single_usage
, regno
) != const0_rtx
925 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
926 && (REGNO_LAST_UID (regno
)
927 == INSN_UID (VARRAY_RTX (reg_single_usage
, regno
)))
928 && VARRAY_INT (n_times_set
, regno
) == 1
929 && ! side_effects_p (SET_SRC (set
))
930 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
931 && (! SMALL_REGISTER_CLASSES
932 || (! (GET_CODE (SET_SRC (set
)) == REG
933 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
934 /* This test is not redundant; SET_SRC (set) might be
935 a call-clobbered register and the life of REGNO
936 might span a call. */
937 && ! modified_between_p (SET_SRC (set
), p
,
939 (reg_single_usage
, regno
))
940 && no_labels_between_p (p
, VARRAY_RTX (reg_single_usage
, regno
))
941 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
943 (reg_single_usage
, regno
)))
945 /* Replace any usage in a REG_EQUAL note. Must copy the
946 new source, so that we don't get rtx sharing between the
947 SET_SOURCE and REG_NOTES of insn p. */
948 REG_NOTES (VARRAY_RTX (reg_single_usage
, regno
))
949 = replace_rtx (REG_NOTES (VARRAY_RTX
950 (reg_single_usage
, regno
)),
951 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
954 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
955 NOTE_SOURCE_FILE (p
) = 0;
956 VARRAY_INT (n_times_set
, regno
) = 0;
960 m
= (struct movable
*) alloca (sizeof (struct movable
));
964 m
->dependencies
= dependencies
;
965 m
->set_dest
= SET_DEST (set
);
967 m
->consec
= VARRAY_INT (n_times_set
,
968 REGNO (SET_DEST (set
))) - 1;
972 m
->move_insn
= move_insn
;
973 m
->move_insn_first
= 0;
974 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
975 m
->savemode
= VOIDmode
;
977 /* Set M->cond if either invariant_p or consec_sets_invariant_p
978 returned 2 (only conditionally invariant). */
979 m
->cond
= ((tem
| tem1
| tem2
) > 1);
980 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
981 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
983 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
984 - uid_luid
[REGNO_FIRST_UID (regno
)]);
985 m
->savings
= VARRAY_INT (n_times_used
, regno
);
986 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
987 m
->savings
+= libcall_benefit (p
);
988 VARRAY_INT (n_times_set
, regno
) = move_insn
? -2 : -1;
989 /* Add M to the end of the chain MOVABLES. */
993 last_movable
->next
= m
;
998 /* It is possible for the first instruction to have a
999 REG_EQUAL note but a non-invariant SET_SRC, so we must
1000 remember the status of the first instruction in case
1001 the last instruction doesn't have a REG_EQUAL note. */
1002 m
->move_insn_first
= m
->move_insn
;
1004 /* Skip this insn, not checking REG_LIBCALL notes. */
1005 p
= next_nonnote_insn (p
);
1006 /* Skip the consecutive insns, if there are any. */
1007 p
= skip_consec_insns (p
, m
->consec
);
1008 /* Back up to the last insn of the consecutive group. */
1009 p
= prev_nonnote_insn (p
);
1011 /* We must now reset m->move_insn, m->is_equiv, and possibly
1012 m->set_src to correspond to the effects of all the
1014 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
1016 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
1019 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
1020 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
1021 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
1026 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
1029 /* If this register is always set within a STRICT_LOW_PART
1030 or set to zero, then its high bytes are constant.
1031 So clear them outside the loop and within the loop
1032 just load the low bytes.
1033 We must check that the machine has an instruction to do so.
1034 Also, if the value loaded into the register
1035 depends on the same register, this cannot be done. */
1036 else if (SET_SRC (set
) == const0_rtx
1037 && GET_CODE (NEXT_INSN (p
)) == INSN
1038 && (set1
= single_set (NEXT_INSN (p
)))
1039 && GET_CODE (set1
) == SET
1040 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
1041 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
1042 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
1044 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
1046 register int regno
= REGNO (SET_DEST (set
));
1047 if (VARRAY_INT (n_times_set
, regno
) == 2)
1049 register struct movable
*m
;
1050 m
= (struct movable
*) alloca (sizeof (struct movable
));
1053 m
->set_dest
= SET_DEST (set
);
1054 m
->dependencies
= 0;
1060 m
->move_insn_first
= 0;
1062 /* If the insn may not be executed on some cycles,
1063 we can't clear the whole reg; clear just high part.
1064 Not even if the reg is used only within this loop.
1071 Clearing x before the inner loop could clobber a value
1072 being saved from the last time around the outer loop.
1073 However, if the reg is not used outside this loop
1074 and all uses of the register are in the same
1075 basic block as the store, there is no problem.
1077 If this insn was made by loop, we don't know its
1078 INSN_LUID and hence must make a conservative
1080 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1081 || (uid_luid
[REGNO_LAST_UID (regno
)]
1083 || (uid_luid
[REGNO_FIRST_UID (regno
)]
1085 || (labels_in_range_p
1086 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
1087 if (maybe_never
&& m
->global
)
1088 m
->savemode
= GET_MODE (SET_SRC (set1
));
1090 m
->savemode
= VOIDmode
;
1094 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
1095 - uid_luid
[REGNO_FIRST_UID (regno
)]);
1097 VARRAY_INT (n_times_set
, regno
) = -1;
1098 /* Add M to the end of the chain MOVABLES. */
1102 last_movable
->next
= m
;
1107 /* Past a call insn, we get to insns which might not be executed
1108 because the call might exit. This matters for insns that trap.
1109 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1110 so they don't count. */
1111 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1113 /* Past a label or a jump, we get to insns for which we
1114 can't count on whether or how many times they will be
1115 executed during each iteration. Therefore, we can
1116 only move out sets of trivial variables
1117 (those not used after the loop). */
1118 /* Similar code appears twice in strength_reduce. */
1119 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1120 /* If we enter the loop in the middle, and scan around to the
1121 beginning, don't set maybe_never for that. This must be an
1122 unconditional jump, otherwise the code at the top of the
1123 loop might never be executed. Unconditional jumps are
1124 followed a by barrier then loop end. */
1125 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1126 && NEXT_INSN (NEXT_INSN (p
)) == end
1127 && simplejump_p (p
)))
1129 else if (GET_CODE (p
) == NOTE
)
1131 /* At the virtual top of a converted loop, insns are again known to
1132 be executed: logically, the loop begins here even though the exit
1133 code has been duplicated. */
1134 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1135 maybe_never
= call_passed
= 0;
1136 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1138 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1143 /* If one movable subsumes another, ignore that other. */
1145 ignore_some_movables (movables
);
1147 /* For each movable insn, see if the reg that it loads
1148 leads when it dies right into another conditionally movable insn.
1149 If so, record that the second insn "forces" the first one,
1150 since the second can be moved only if the first is. */
1152 force_movables (movables
);
1154 /* See if there are multiple movable insns that load the same value.
1155 If there are, make all but the first point at the first one
1156 through the `match' field, and add the priorities of them
1157 all together as the priority of the first. */
1159 combine_movables (movables
, nregs
);
1161 /* Now consider each movable insn to decide whether it is worth moving.
1162 Store 0 in n_times_set for each reg that is moved.
1164 Generally this increases code size, so do not move moveables when
1165 optimizing for code size. */
1167 if (! optimize_size
)
1168 move_movables (movables
, threshold
,
1169 insn_count
, loop_start
, end
, nregs
);
1171 /* Now candidates that still are negative are those not moved.
1172 Change n_times_set to indicate that those are not actually invariant. */
1173 for (i
= 0; i
< nregs
; i
++)
1174 if (VARRAY_INT (n_times_set
, i
) < 0)
1175 VARRAY_INT (n_times_set
, i
) = VARRAY_INT (n_times_used
, i
);
1177 /* Now that we've moved some things out of the loop, we able to
1178 hoist even more memory references. There's no need to pass
1179 reg_single_usage this time, since we're done with it. */
1180 load_mems_and_recount_loop_regs_set (scan_start
, end
, loop_top
,
1184 if (flag_strength_reduce
)
1186 the_movables
= movables
;
1187 strength_reduce (scan_start
, end
, loop_top
,
1188 insn_count
, loop_start
, end
, unroll_p
);
1191 VARRAY_FREE (n_times_set
);
1192 VARRAY_FREE (n_times_used
);
1193 VARRAY_FREE (may_not_optimize
);
1194 VARRAY_FREE (reg_single_usage
);
1197 /* Add elements to *OUTPUT to record all the pseudo-regs
1198 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1201 record_excess_regs (in_this
, not_in_this
, output
)
1202 rtx in_this
, not_in_this
;
1209 code
= GET_CODE (in_this
);
1223 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1224 && ! reg_mentioned_p (in_this
, not_in_this
))
1225 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1232 fmt
= GET_RTX_FORMAT (code
);
1233 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1240 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1241 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1245 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1251 /* Check what regs are referred to in the libcall block ending with INSN,
1252 aside from those mentioned in the equivalent value.
1253 If there are none, return 0.
1254 If there are one or more, return an EXPR_LIST containing all of them. */
1257 libcall_other_reg (insn
, equiv
)
1260 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1261 rtx p
= XEXP (note
, 0);
1264 /* First, find all the regs used in the libcall block
1265 that are not mentioned as inputs to the result. */
1269 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1270 || GET_CODE (p
) == CALL_INSN
)
1271 record_excess_regs (PATTERN (p
), equiv
, &output
);
1278 /* Return 1 if all uses of REG
1279 are between INSN and the end of the basic block. */
1282 reg_in_basic_block_p (insn
, reg
)
1285 int regno
= REGNO (reg
);
1288 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1291 /* Search this basic block for the already recorded last use of the reg. */
1292 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1294 switch (GET_CODE (p
))
1301 /* Ordinary insn: if this is the last use, we win. */
1302 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1307 /* Jump insn: if this is the last use, we win. */
1308 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1310 /* Otherwise, it's the end of the basic block, so we lose. */
1315 /* It's the end of the basic block, so we lose. */
1323 /* The "last use" doesn't follow the "first use"?? */
1327 /* Compute the benefit of eliminating the insns in the block whose
1328 last insn is LAST. This may be a group of insns used to compute a
1329 value directly or can contain a library call. */
1332 libcall_benefit (last
)
1338 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1339 insn
!= last
; insn
= NEXT_INSN (insn
))
1341 if (GET_CODE (insn
) == CALL_INSN
)
1342 benefit
+= 10; /* Assume at least this many insns in a library
1344 else if (GET_CODE (insn
) == INSN
1345 && GET_CODE (PATTERN (insn
)) != USE
1346 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1353 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1356 skip_consec_insns (insn
, count
)
1360 for (; count
> 0; count
--)
1364 /* If first insn of libcall sequence, skip to end. */
1365 /* Do this at start of loop, since INSN is guaranteed to
1367 if (GET_CODE (insn
) != NOTE
1368 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1369 insn
= XEXP (temp
, 0);
1371 do insn
= NEXT_INSN (insn
);
1372 while (GET_CODE (insn
) == NOTE
);
1378 /* Ignore any movable whose insn falls within a libcall
1379 which is part of another movable.
1380 We make use of the fact that the movable for the libcall value
1381 was made later and so appears later on the chain. */
1384 ignore_some_movables (movables
)
1385 struct movable
*movables
;
1387 register struct movable
*m
, *m1
;
1389 for (m
= movables
; m
; m
= m
->next
)
1391 /* Is this a movable for the value of a libcall? */
1392 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1396 /* Check for earlier movables inside that range,
1397 and mark them invalid. We cannot use LUIDs here because
1398 insns created by loop.c for prior loops don't have LUIDs.
1399 Rather than reject all such insns from movables, we just
1400 explicitly check each insn in the libcall (since invariant
1401 libcalls aren't that common). */
1402 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1403 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1404 if (m1
->insn
== insn
)
1410 /* For each movable insn, see if the reg that it loads
1411 leads when it dies right into another conditionally movable insn.
1412 If so, record that the second insn "forces" the first one,
1413 since the second can be moved only if the first is. */
1416 force_movables (movables
)
1417 struct movable
*movables
;
1419 register struct movable
*m
, *m1
;
1420 for (m1
= movables
; m1
; m1
= m1
->next
)
1421 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1422 if (!m1
->partial
&& !m1
->done
)
1424 int regno
= m1
->regno
;
1425 for (m
= m1
->next
; m
; m
= m
->next
)
1426 /* ??? Could this be a bug? What if CSE caused the
1427 register of M1 to be used after this insn?
1428 Since CSE does not update regno_last_uid,
1429 this insn M->insn might not be where it dies.
1430 But very likely this doesn't matter; what matters is
1431 that M's reg is computed from M1's reg. */
1432 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1435 if (m
!= 0 && m
->set_src
== m1
->set_dest
1436 /* If m->consec, m->set_src isn't valid. */
1440 /* Increase the priority of the moving the first insn
1441 since it permits the second to be moved as well. */
1445 m1
->lifetime
+= m
->lifetime
;
1446 m1
->savings
+= m
->savings
;
1451 /* Find invariant expressions that are equal and can be combined into
1455 combine_movables (movables
, nregs
)
1456 struct movable
*movables
;
1459 register struct movable
*m
;
1460 char *matched_regs
= (char *) alloca (nregs
);
1461 enum machine_mode mode
;
1463 /* Regs that are set more than once are not allowed to match
1464 or be matched. I'm no longer sure why not. */
1465 /* Perhaps testing m->consec_sets would be more appropriate here? */
1467 for (m
= movables
; m
; m
= m
->next
)
1468 if (m
->match
== 0 && VARRAY_INT (n_times_used
, m
->regno
) == 1 && !m
->partial
)
1470 register struct movable
*m1
;
1471 int regno
= m
->regno
;
1473 bzero (matched_regs
, nregs
);
1474 matched_regs
[regno
] = 1;
1476 /* We want later insns to match the first one. Don't make the first
1477 one match any later ones. So start this loop at m->next. */
1478 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1479 if (m
!= m1
&& m1
->match
== 0 && VARRAY_INT (n_times_used
, m1
->regno
) == 1
1480 /* A reg used outside the loop mustn't be eliminated. */
1482 /* A reg used for zero-extending mustn't be eliminated. */
1484 && (matched_regs
[m1
->regno
]
1487 /* Can combine regs with different modes loaded from the
1488 same constant only if the modes are the same or
1489 if both are integer modes with M wider or the same
1490 width as M1. The check for integer is redundant, but
1491 safe, since the only case of differing destination
1492 modes with equal sources is when both sources are
1493 VOIDmode, i.e., CONST_INT. */
1494 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1495 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1496 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1497 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1498 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1499 /* See if the source of M1 says it matches M. */
1500 && ((GET_CODE (m1
->set_src
) == REG
1501 && matched_regs
[REGNO (m1
->set_src
)])
1502 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1504 && ((m
->dependencies
== m1
->dependencies
)
1505 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1507 m
->lifetime
+= m1
->lifetime
;
1508 m
->savings
+= m1
->savings
;
1511 matched_regs
[m1
->regno
] = 1;
1515 /* Now combine the regs used for zero-extension.
1516 This can be done for those not marked `global'
1517 provided their lives don't overlap. */
1519 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1520 mode
= GET_MODE_WIDER_MODE (mode
))
1522 register struct movable
*m0
= 0;
1524 /* Combine all the registers for extension from mode MODE.
1525 Don't combine any that are used outside this loop. */
1526 for (m
= movables
; m
; m
= m
->next
)
1527 if (m
->partial
&& ! m
->global
1528 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1530 register struct movable
*m1
;
1531 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1532 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1536 /* First one: don't check for overlap, just record it. */
1541 /* Make sure they extend to the same mode.
1542 (Almost always true.) */
1543 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1546 /* We already have one: check for overlap with those
1547 already combined together. */
1548 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1549 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1550 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1551 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1554 /* No overlap: we can combine this with the others. */
1555 m0
->lifetime
+= m
->lifetime
;
1556 m0
->savings
+= m
->savings
;
1565 /* Return 1 if regs X and Y will become the same if moved. */
1568 regs_match_p (x
, y
, movables
)
1570 struct movable
*movables
;
1574 struct movable
*mx
, *my
;
1576 for (mx
= movables
; mx
; mx
= mx
->next
)
1577 if (mx
->regno
== xn
)
1580 for (my
= movables
; my
; my
= my
->next
)
1581 if (my
->regno
== yn
)
1585 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1587 || mx
== my
->match
));
1590 /* Return 1 if X and Y are identical-looking rtx's.
1591 This is the Lisp function EQUAL for rtx arguments.
1593 If two registers are matching movables or a movable register and an
1594 equivalent constant, consider them equal. */
1597 rtx_equal_for_loop_p (x
, y
, movables
)
1599 struct movable
*movables
;
1603 register struct movable
*m
;
1604 register enum rtx_code code
;
1609 if (x
== 0 || y
== 0)
1612 code
= GET_CODE (x
);
1614 /* If we have a register and a constant, they may sometimes be
1616 if (GET_CODE (x
) == REG
&& VARRAY_INT (n_times_set
, REGNO (x
)) == -2
1619 for (m
= movables
; m
; m
= m
->next
)
1620 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1621 && rtx_equal_p (m
->set_src
, y
))
1624 else if (GET_CODE (y
) == REG
&& VARRAY_INT (n_times_set
, REGNO (y
)) == -2
1627 for (m
= movables
; m
; m
= m
->next
)
1628 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1629 && rtx_equal_p (m
->set_src
, x
))
1633 /* Otherwise, rtx's of different codes cannot be equal. */
1634 if (code
!= GET_CODE (y
))
1637 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1638 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1640 if (GET_MODE (x
) != GET_MODE (y
))
1643 /* These three types of rtx's can be compared nonrecursively. */
1645 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1647 if (code
== LABEL_REF
)
1648 return XEXP (x
, 0) == XEXP (y
, 0);
1649 if (code
== SYMBOL_REF
)
1650 return XSTR (x
, 0) == XSTR (y
, 0);
1652 /* Compare the elements. If any pair of corresponding elements
1653 fail to match, return 0 for the whole things. */
1655 fmt
= GET_RTX_FORMAT (code
);
1656 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1661 if (XWINT (x
, i
) != XWINT (y
, i
))
1666 if (XINT (x
, i
) != XINT (y
, i
))
1671 /* Two vectors must have the same length. */
1672 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1675 /* And the corresponding elements must match. */
1676 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1677 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1682 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1687 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1692 /* These are just backpointers, so they don't matter. */
1698 /* It is believed that rtx's at this level will never
1699 contain anything but integers and other rtx's,
1700 except for within LABEL_REFs and SYMBOL_REFs. */
1708 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1709 insns in INSNS which use thet reference. */
1712 add_label_notes (x
, insns
)
1716 enum rtx_code code
= GET_CODE (x
);
1721 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1723 /* This code used to ignore labels that referred to dispatch tables to
1724 avoid flow generating (slighly) worse code.
1726 We no longer ignore such label references (see LABEL_REF handling in
1727 mark_jump_label for additional information). */
1728 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1729 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1730 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1734 fmt
= GET_RTX_FORMAT (code
);
1735 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1738 add_label_notes (XEXP (x
, i
), insns
);
1739 else if (fmt
[i
] == 'E')
1740 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1741 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1745 /* Scan MOVABLES, and move the insns that deserve to be moved.
1746 If two matching movables are combined, replace one reg with the
1747 other throughout. */
1750 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1751 struct movable
*movables
;
1759 register struct movable
*m
;
1761 /* Map of pseudo-register replacements to handle combining
1762 when we move several insns that load the same value
1763 into different pseudo-registers. */
1764 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1765 char *already_moved
= (char *) alloca (nregs
);
1767 bzero (already_moved
, nregs
);
1768 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1772 for (m
= movables
; m
; m
= m
->next
)
1774 /* Describe this movable insn. */
1776 if (loop_dump_stream
)
1778 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1779 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1781 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1783 fprintf (loop_dump_stream
, "cond ");
1785 fprintf (loop_dump_stream
, "force ");
1787 fprintf (loop_dump_stream
, "global ");
1789 fprintf (loop_dump_stream
, "done ");
1791 fprintf (loop_dump_stream
, "move-insn ");
1793 fprintf (loop_dump_stream
, "matches %d ",
1794 INSN_UID (m
->match
->insn
));
1796 fprintf (loop_dump_stream
, "forces %d ",
1797 INSN_UID (m
->forces
->insn
));
1800 /* Count movables. Value used in heuristics in strength_reduce. */
1803 /* Ignore the insn if it's already done (it matched something else).
1804 Otherwise, see if it is now safe to move. */
1808 || (1 == invariant_p (m
->set_src
)
1809 && (m
->dependencies
== 0
1810 || 1 == invariant_p (m
->dependencies
))
1812 || 1 == consec_sets_invariant_p (m
->set_dest
,
1815 && (! m
->forces
|| m
->forces
->done
))
1819 int savings
= m
->savings
;
1821 /* We have an insn that is safe to move.
1822 Compute its desirability. */
1827 if (loop_dump_stream
)
1828 fprintf (loop_dump_stream
, "savings %d ", savings
);
1830 if (moved_once
[regno
])
1834 if (loop_dump_stream
)
1835 fprintf (loop_dump_stream
, "halved since already moved ");
1838 /* An insn MUST be moved if we already moved something else
1839 which is safe only if this one is moved too: that is,
1840 if already_moved[REGNO] is nonzero. */
1842 /* An insn is desirable to move if the new lifetime of the
1843 register is no more than THRESHOLD times the old lifetime.
1844 If it's not desirable, it means the loop is so big
1845 that moving won't speed things up much,
1846 and it is liable to make register usage worse. */
1848 /* It is also desirable to move if it can be moved at no
1849 extra cost because something else was already moved. */
1851 if (already_moved
[regno
]
1852 || flag_move_all_movables
1853 || (threshold
* savings
* m
->lifetime
) >= insn_count
1854 || (m
->forces
&& m
->forces
->done
1855 && VARRAY_INT (n_times_used
, m
->forces
->regno
) == 1))
1858 register struct movable
*m1
;
1861 /* Now move the insns that set the reg. */
1863 if (m
->partial
&& m
->match
)
1867 /* Find the end of this chain of matching regs.
1868 Thus, we load each reg in the chain from that one reg.
1869 And that reg is loaded with 0 directly,
1870 since it has ->match == 0. */
1871 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1872 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1873 SET_DEST (PATTERN (m1
->insn
)));
1874 i1
= emit_insn_before (newpat
, loop_start
);
1876 /* Mark the moved, invariant reg as being allowed to
1877 share a hard reg with the other matching invariant. */
1878 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1879 r1
= SET_DEST (PATTERN (m
->insn
));
1880 r2
= SET_DEST (PATTERN (m1
->insn
));
1882 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1883 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1885 delete_insn (m
->insn
);
1890 if (loop_dump_stream
)
1891 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1893 /* If we are to re-generate the item being moved with a
1894 new move insn, first delete what we have and then emit
1895 the move insn before the loop. */
1896 else if (m
->move_insn
)
1900 for (count
= m
->consec
; count
>= 0; count
--)
1902 /* If this is the first insn of a library call sequence,
1904 if (GET_CODE (p
) != NOTE
1905 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1908 /* If this is the last insn of a libcall sequence, then
1909 delete every insn in the sequence except the last.
1910 The last insn is handled in the normal manner. */
1911 if (GET_CODE (p
) != NOTE
1912 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1914 temp
= XEXP (temp
, 0);
1916 temp
= delete_insn (temp
);
1919 p
= delete_insn (p
);
1920 while (p
&& GET_CODE (p
) == NOTE
)
1925 emit_move_insn (m
->set_dest
, m
->set_src
);
1926 temp
= get_insns ();
1929 add_label_notes (m
->set_src
, temp
);
1931 i1
= emit_insns_before (temp
, loop_start
);
1932 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1934 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1935 m
->set_src
, REG_NOTES (i1
));
1937 if (loop_dump_stream
)
1938 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1940 /* The more regs we move, the less we like moving them. */
1945 for (count
= m
->consec
; count
>= 0; count
--)
1949 /* If first insn of libcall sequence, skip to end. */
1950 /* Do this at start of loop, since p is guaranteed to
1952 if (GET_CODE (p
) != NOTE
1953 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1956 /* If last insn of libcall sequence, move all
1957 insns except the last before the loop. The last
1958 insn is handled in the normal manner. */
1959 if (GET_CODE (p
) != NOTE
1960 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1964 rtx fn_address_insn
= 0;
1967 for (temp
= XEXP (temp
, 0); temp
!= p
;
1968 temp
= NEXT_INSN (temp
))
1974 if (GET_CODE (temp
) == NOTE
)
1977 body
= PATTERN (temp
);
1979 /* Find the next insn after TEMP,
1980 not counting USE or NOTE insns. */
1981 for (next
= NEXT_INSN (temp
); next
!= p
;
1982 next
= NEXT_INSN (next
))
1983 if (! (GET_CODE (next
) == INSN
1984 && GET_CODE (PATTERN (next
)) == USE
)
1985 && GET_CODE (next
) != NOTE
)
1988 /* If that is the call, this may be the insn
1989 that loads the function address.
1991 Extract the function address from the insn
1992 that loads it into a register.
1993 If this insn was cse'd, we get incorrect code.
1995 So emit a new move insn that copies the
1996 function address into the register that the
1997 call insn will use. flow.c will delete any
1998 redundant stores that we have created. */
1999 if (GET_CODE (next
) == CALL_INSN
2000 && GET_CODE (body
) == SET
2001 && GET_CODE (SET_DEST (body
)) == REG
2002 && (n
= find_reg_note (temp
, REG_EQUAL
,
2005 fn_reg
= SET_SRC (body
);
2006 if (GET_CODE (fn_reg
) != REG
)
2007 fn_reg
= SET_DEST (body
);
2008 fn_address
= XEXP (n
, 0);
2009 fn_address_insn
= temp
;
2011 /* We have the call insn.
2012 If it uses the register we suspect it might,
2013 load it with the correct address directly. */
2014 if (GET_CODE (temp
) == CALL_INSN
2016 && reg_referenced_p (fn_reg
, body
))
2017 emit_insn_after (gen_move_insn (fn_reg
,
2021 if (GET_CODE (temp
) == CALL_INSN
)
2023 i1
= emit_call_insn_before (body
, loop_start
);
2024 /* Because the USAGE information potentially
2025 contains objects other than hard registers
2026 we need to copy it. */
2027 if (CALL_INSN_FUNCTION_USAGE (temp
))
2028 CALL_INSN_FUNCTION_USAGE (i1
)
2029 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
2032 i1
= emit_insn_before (body
, loop_start
);
2035 if (temp
== fn_address_insn
)
2036 fn_address_insn
= i1
;
2037 REG_NOTES (i1
) = REG_NOTES (temp
);
2041 if (m
->savemode
!= VOIDmode
)
2043 /* P sets REG to zero; but we should clear only
2044 the bits that are not covered by the mode
2046 rtx reg
= m
->set_dest
;
2052 (GET_MODE (reg
), and_optab
, reg
,
2053 GEN_INT ((((HOST_WIDE_INT
) 1
2054 << GET_MODE_BITSIZE (m
->savemode
)))
2056 reg
, 1, OPTAB_LIB_WIDEN
);
2060 emit_move_insn (reg
, tem
);
2061 sequence
= gen_sequence ();
2063 i1
= emit_insn_before (sequence
, loop_start
);
2065 else if (GET_CODE (p
) == CALL_INSN
)
2067 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
2068 /* Because the USAGE information potentially
2069 contains objects other than hard registers
2070 we need to copy it. */
2071 if (CALL_INSN_FUNCTION_USAGE (p
))
2072 CALL_INSN_FUNCTION_USAGE (i1
)
2073 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2075 else if (count
== m
->consec
&& m
->move_insn_first
)
2077 /* The SET_SRC might not be invariant, so we must
2078 use the REG_EQUAL note. */
2080 emit_move_insn (m
->set_dest
, m
->set_src
);
2081 temp
= get_insns ();
2084 add_label_notes (m
->set_src
, temp
);
2086 i1
= emit_insns_before (temp
, loop_start
);
2087 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2089 = gen_rtx_EXPR_LIST ((m
->is_equiv
? REG_EQUIV
2091 m
->set_src
, REG_NOTES (i1
));
2094 i1
= emit_insn_before (PATTERN (p
), loop_start
);
2096 if (REG_NOTES (i1
) == 0)
2098 REG_NOTES (i1
) = REG_NOTES (p
);
2100 /* If there is a REG_EQUAL note present whose value
2101 is not loop invariant, then delete it, since it
2102 may cause problems with later optimization passes.
2103 It is possible for cse to create such notes
2104 like this as a result of record_jump_cond. */
2106 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2107 && ! invariant_p (XEXP (temp
, 0)))
2108 remove_note (i1
, temp
);
2114 if (loop_dump_stream
)
2115 fprintf (loop_dump_stream
, " moved to %d",
2118 /* If library call, now fix the REG_NOTES that contain
2119 insn pointers, namely REG_LIBCALL on FIRST
2120 and REG_RETVAL on I1. */
2121 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2123 XEXP (temp
, 0) = first
;
2124 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2125 XEXP (temp
, 0) = i1
;
2129 do p
= NEXT_INSN (p
);
2130 while (p
&& GET_CODE (p
) == NOTE
);
2133 /* The more regs we move, the less we like moving them. */
2137 /* Any other movable that loads the same register
2139 already_moved
[regno
] = 1;
2141 /* This reg has been moved out of one loop. */
2142 moved_once
[regno
] = 1;
2144 /* The reg set here is now invariant. */
2146 VARRAY_INT (n_times_set
, regno
) = 0;
2150 /* Change the length-of-life info for the register
2151 to say it lives at least the full length of this loop.
2152 This will help guide optimizations in outer loops. */
2154 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2155 /* This is the old insn before all the moved insns.
2156 We can't use the moved insn because it is out of range
2157 in uid_luid. Only the old insns have luids. */
2158 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2159 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2160 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2162 /* Combine with this moved insn any other matching movables. */
2165 for (m1
= movables
; m1
; m1
= m1
->next
)
2170 /* Schedule the reg loaded by M1
2171 for replacement so that shares the reg of M.
2172 If the modes differ (only possible in restricted
2173 circumstances, make a SUBREG. */
2174 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2175 reg_map
[m1
->regno
] = m
->set_dest
;
2178 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2181 /* Get rid of the matching insn
2182 and prevent further processing of it. */
2185 /* if library call, delete all insn except last, which
2187 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2190 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2191 temp
= NEXT_INSN (temp
))
2194 delete_insn (m1
->insn
);
2196 /* Any other movable that loads the same register
2198 already_moved
[m1
->regno
] = 1;
2200 /* The reg merged here is now invariant,
2201 if the reg it matches is invariant. */
2203 VARRAY_INT (n_times_set
, m1
->regno
) = 0;
2206 else if (loop_dump_stream
)
2207 fprintf (loop_dump_stream
, "not desirable");
2209 else if (loop_dump_stream
&& !m
->match
)
2210 fprintf (loop_dump_stream
, "not safe");
2212 if (loop_dump_stream
)
2213 fprintf (loop_dump_stream
, "\n");
2217 new_start
= loop_start
;
2219 /* Go through all the instructions in the loop, making
2220 all the register substitutions scheduled in REG_MAP. */
2221 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2222 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2223 || GET_CODE (p
) == CALL_INSN
)
2225 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2226 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2232 /* Scan X and replace the address of any MEM in it with ADDR.
2233 REG is the address that MEM should have before the replacement. */
2236 replace_call_address (x
, reg
, addr
)
2239 register enum rtx_code code
;
2245 code
= GET_CODE (x
);
2259 /* Short cut for very common case. */
2260 replace_call_address (XEXP (x
, 1), reg
, addr
);
2264 /* Short cut for very common case. */
2265 replace_call_address (XEXP (x
, 0), reg
, addr
);
2269 /* If this MEM uses a reg other than the one we expected,
2270 something is wrong. */
2271 if (XEXP (x
, 0) != reg
)
2280 fmt
= GET_RTX_FORMAT (code
);
2281 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2284 replace_call_address (XEXP (x
, i
), reg
, addr
);
2288 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2289 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2295 /* Return the number of memory refs to addresses that vary
2299 count_nonfixed_reads (x
)
2302 register enum rtx_code code
;
2310 code
= GET_CODE (x
);
2324 return ((invariant_p (XEXP (x
, 0)) != 1)
2325 + count_nonfixed_reads (XEXP (x
, 0)));
2332 fmt
= GET_RTX_FORMAT (code
);
2333 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2336 value
+= count_nonfixed_reads (XEXP (x
, i
));
2340 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2341 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2349 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2350 Replace it with an instruction to load just the low bytes
2351 if the machine supports such an instruction,
2352 and insert above LOOP_START an instruction to clear the register. */
2355 constant_high_bytes (p
, loop_start
)
2359 register int insn_code_number
;
2361 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2362 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2364 new = gen_rtx_SET (VOIDmode
,
2365 gen_rtx_STRICT_LOW_PART (VOIDmode
,
2366 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2367 SET_DEST (PATTERN (p
)),
2369 XEXP (SET_SRC (PATTERN (p
)), 0));
2370 insn_code_number
= recog (new, p
);
2372 if (insn_code_number
)
2376 /* Clear destination register before the loop. */
2377 emit_insn_before (gen_rtx_SET (VOIDmode
, SET_DEST (PATTERN (p
)),
2381 /* Inside the loop, just load the low part. */
2387 /* Scan a loop setting the variables `unknown_address_altered',
2388 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2389 and `loop_has_volatile'. Also, fill in the arrays `loop_mems' and
2390 `loop_store_mems'. */
2393 prescan_loop (start
, end
)
2396 register int level
= 1;
2398 int loop_has_multiple_exit_targets
= 0;
2399 /* The label after END. Jumping here is just like falling off the
2400 end of the loop. We use next_nonnote_insn instead of next_label
2401 as a hedge against the (pathological) case where some actual insn
2402 might end up between the two. */
2403 rtx exit_target
= next_nonnote_insn (end
);
2404 if (exit_target
== NULL_RTX
|| GET_CODE (exit_target
) != CODE_LABEL
)
2405 loop_has_multiple_exit_targets
= 1;
2407 unknown_address_altered
= 0;
2409 loop_has_volatile
= 0;
2410 loop_store_mems_idx
= 0;
2417 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2418 insn
= NEXT_INSN (insn
))
2420 if (GET_CODE (insn
) == NOTE
)
2422 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2425 /* Count number of loops contained in this one. */
2428 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2437 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2440 loop_continue
= insn
;
2443 else if (GET_CODE (insn
) == CALL_INSN
)
2445 if (! CONST_CALL_P (insn
))
2446 unknown_address_altered
= 1;
2449 else if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2451 rtx label1
= NULL_RTX
;
2452 rtx label2
= NULL_RTX
;
2454 if (volatile_refs_p (PATTERN (insn
)))
2455 loop_has_volatile
= 1;
2457 note_stores (PATTERN (insn
), note_addr_stored
);
2459 if (!loop_has_multiple_exit_targets
2460 && GET_CODE (insn
) == JUMP_INSN
2461 && GET_CODE (PATTERN (insn
)) == SET
2462 && SET_DEST (PATTERN (insn
)) == pc_rtx
)
2464 if (GET_CODE (SET_SRC (PATTERN (insn
))) == IF_THEN_ELSE
)
2466 label1
= XEXP (SET_SRC (PATTERN (insn
)), 1);
2467 label2
= XEXP (SET_SRC (PATTERN (insn
)), 2);
2471 label1
= SET_SRC (PATTERN (insn
));
2475 if (label1
&& label1
!= pc_rtx
)
2477 if (GET_CODE (label1
) != LABEL_REF
)
2479 /* Something tricky. */
2480 loop_has_multiple_exit_targets
= 1;
2483 else if (XEXP (label1
, 0) != exit_target
2484 && LABEL_OUTSIDE_LOOP_P (label1
))
2486 /* A jump outside the current loop. */
2487 loop_has_multiple_exit_targets
= 1;
2497 else if (GET_CODE (insn
) == RETURN
)
2498 loop_has_multiple_exit_targets
= 1;
2501 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2502 if (/* We can't tell what MEMs are aliased by what. */
2503 !unknown_address_altered
2504 /* An exception thrown by a called function might land us
2507 /* We don't want loads for MEMs moved to a location before the
2508 one at which their stack memory becomes allocated. (Note
2509 that this is not a problem for malloc, etc., since those
2510 require actual function calls. */
2511 && !current_function_calls_alloca
2512 /* There are ways to leave the loop other than falling off the
2514 && !loop_has_multiple_exit_targets
)
2515 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2516 insn
= NEXT_INSN (insn
))
2517 for_each_rtx (&insn
, insert_loop_mem
, 0);
2520 /* Scan the function looking for loops. Record the start and end of each loop.
2521 Also mark as invalid loops any loops that contain a setjmp or are branched
2522 to from outside the loop. */
2525 find_and_verify_loops (f
)
2529 int current_loop
= -1;
2533 /* If there are jumps to undefined labels,
2534 treat them as jumps out of any/all loops.
2535 This also avoids writing past end of tables when there are no loops. */
2536 uid_loop_num
[0] = -1;
2538 /* Find boundaries of loops, mark which loops are contained within
2539 loops, and invalidate loops that have setjmp. */
2541 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2543 if (GET_CODE (insn
) == NOTE
)
2544 switch (NOTE_LINE_NUMBER (insn
))
2546 case NOTE_INSN_LOOP_BEG
:
2547 loop_number_loop_starts
[++next_loop
] = insn
;
2548 loop_number_loop_ends
[next_loop
] = 0;
2549 loop_outer_loop
[next_loop
] = current_loop
;
2550 loop_invalid
[next_loop
] = 0;
2551 loop_number_exit_labels
[next_loop
] = 0;
2552 loop_number_exit_count
[next_loop
] = 0;
2553 current_loop
= next_loop
;
2556 case NOTE_INSN_SETJMP
:
2557 /* In this case, we must invalidate our current loop and any
2559 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2561 loop_invalid
[loop
] = 1;
2562 if (loop_dump_stream
)
2563 fprintf (loop_dump_stream
,
2564 "\nLoop at %d ignored due to setjmp.\n",
2565 INSN_UID (loop_number_loop_starts
[loop
]));
2569 case NOTE_INSN_LOOP_END
:
2570 if (current_loop
== -1)
2573 loop_number_loop_ends
[current_loop
] = insn
;
2574 current_loop
= loop_outer_loop
[current_loop
];
2581 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2582 enclosing loop, but this doesn't matter. */
2583 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2586 /* Any loop containing a label used in an initializer must be invalidated,
2587 because it can be jumped into from anywhere. */
2589 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2593 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2595 loop_num
= loop_outer_loop
[loop_num
])
2596 loop_invalid
[loop_num
] = 1;
2599 /* Any loop containing a label used for an exception handler must be
2600 invalidated, because it can be jumped into from anywhere. */
2602 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2606 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2608 loop_num
= loop_outer_loop
[loop_num
])
2609 loop_invalid
[loop_num
] = 1;
2612 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2613 loop that it is not contained within, that loop is marked invalid.
2614 If any INSN or CALL_INSN uses a label's address, then the loop containing
2615 that label is marked invalid, because it could be jumped into from
2618 Also look for blocks of code ending in an unconditional branch that
2619 exits the loop. If such a block is surrounded by a conditional
2620 branch around the block, move the block elsewhere (see below) and
2621 invert the jump to point to the code block. This may eliminate a
2622 label in our loop and will simplify processing by both us and a
2623 possible second cse pass. */
2625 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2626 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2628 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2630 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2632 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2637 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2639 loop_num
= loop_outer_loop
[loop_num
])
2640 loop_invalid
[loop_num
] = 1;
2644 if (GET_CODE (insn
) != JUMP_INSN
)
2647 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2649 /* See if this is an unconditional branch outside the loop. */
2650 if (this_loop_num
!= -1
2651 && (GET_CODE (PATTERN (insn
)) == RETURN
2652 || (simplejump_p (insn
)
2653 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2655 && get_max_uid () < max_uid_for_loop
)
2658 rtx our_next
= next_real_insn (insn
);
2660 int outer_loop
= -1;
2662 /* Go backwards until we reach the start of the loop, a label,
2664 for (p
= PREV_INSN (insn
);
2665 GET_CODE (p
) != CODE_LABEL
2666 && ! (GET_CODE (p
) == NOTE
2667 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2668 && GET_CODE (p
) != JUMP_INSN
;
2672 /* Check for the case where we have a jump to an inner nested
2673 loop, and do not perform the optimization in that case. */
2675 if (JUMP_LABEL (insn
))
2677 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2678 if (dest_loop
!= -1)
2680 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2681 outer_loop
= loop_outer_loop
[outer_loop
])
2682 if (outer_loop
== this_loop_num
)
2687 /* Make sure that the target of P is within the current loop. */
2689 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2690 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2691 outer_loop
= this_loop_num
;
2693 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2694 we have a block of code to try to move.
2696 We look backward and then forward from the target of INSN
2697 to find a BARRIER at the same loop depth as the target.
2698 If we find such a BARRIER, we make a new label for the start
2699 of the block, invert the jump in P and point it to that label,
2700 and move the block of code to the spot we found. */
2702 if (outer_loop
== -1
2703 && GET_CODE (p
) == JUMP_INSN
2704 && JUMP_LABEL (p
) != 0
2705 /* Just ignore jumps to labels that were never emitted.
2706 These always indicate compilation errors. */
2707 && INSN_UID (JUMP_LABEL (p
)) != 0
2709 && ! simplejump_p (p
)
2710 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2713 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2714 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2717 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2718 if (GET_CODE (loc
) == BARRIER
2719 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2723 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2724 if (GET_CODE (loc
) == BARRIER
2725 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2730 rtx cond_label
= JUMP_LABEL (p
);
2731 rtx new_label
= get_label_after (p
);
2733 /* Ensure our label doesn't go away. */
2734 LABEL_NUSES (cond_label
)++;
2736 /* Verify that uid_loop_num is large enough and that
2738 if (invert_jump (p
, new_label
))
2742 /* If no suitable BARRIER was found, create a suitable
2743 one before TARGET. Since TARGET is a fall through
2744 path, we'll need to insert an jump around our block
2745 and a add a BARRIER before TARGET.
2747 This creates an extra unconditional jump outside
2748 the loop. However, the benefits of removing rarely
2749 executed instructions from inside the loop usually
2750 outweighs the cost of the extra unconditional jump
2751 outside the loop. */
2756 temp
= gen_jump (JUMP_LABEL (insn
));
2757 temp
= emit_jump_insn_before (temp
, target
);
2758 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2759 LABEL_NUSES (JUMP_LABEL (insn
))++;
2760 loc
= emit_barrier_before (target
);
2763 /* Include the BARRIER after INSN and copy the
2765 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2766 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2768 /* All those insns are now in TARGET_LOOP_NUM. */
2769 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2771 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2773 /* The label jumped to by INSN is no longer a loop exit.
2774 Unless INSN does not have a label (e.g., it is a
2775 RETURN insn), search loop_number_exit_labels to find
2776 its label_ref, and remove it. Also turn off
2777 LABEL_OUTSIDE_LOOP_P bit. */
2778 if (JUMP_LABEL (insn
))
2783 r
= loop_number_exit_labels
[this_loop_num
];
2784 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2785 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2787 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2789 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2791 loop_number_exit_labels
[this_loop_num
]
2792 = LABEL_NEXTREF (r
);
2796 for (loop_num
= this_loop_num
;
2797 loop_num
!= -1 && loop_num
!= target_loop_num
;
2798 loop_num
= loop_outer_loop
[loop_num
])
2799 loop_number_exit_count
[loop_num
]--;
2801 /* If we didn't find it, then something is wrong. */
2806 /* P is now a jump outside the loop, so it must be put
2807 in loop_number_exit_labels, and marked as such.
2808 The easiest way to do this is to just call
2809 mark_loop_jump again for P. */
2810 mark_loop_jump (PATTERN (p
), this_loop_num
);
2812 /* If INSN now jumps to the insn after it,
2814 if (JUMP_LABEL (insn
) != 0
2815 && (next_real_insn (JUMP_LABEL (insn
))
2816 == next_real_insn (insn
)))
2820 /* Continue the loop after where the conditional
2821 branch used to jump, since the only branch insn
2822 in the block (if it still remains) is an inter-loop
2823 branch and hence needs no processing. */
2824 insn
= NEXT_INSN (cond_label
);
2826 if (--LABEL_NUSES (cond_label
) == 0)
2827 delete_insn (cond_label
);
2829 /* This loop will be continued with NEXT_INSN (insn). */
2830 insn
= PREV_INSN (insn
);
2837 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2838 loops it is contained in, mark the target loop invalid.
2840 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2843 mark_loop_jump (x
, loop_num
)
2851 switch (GET_CODE (x
))
2864 /* There could be a label reference in here. */
2865 mark_loop_jump (XEXP (x
, 0), loop_num
);
2871 mark_loop_jump (XEXP (x
, 0), loop_num
);
2872 mark_loop_jump (XEXP (x
, 1), loop_num
);
2877 mark_loop_jump (XEXP (x
, 0), loop_num
);
2881 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2883 /* Link together all labels that branch outside the loop. This
2884 is used by final_[bg]iv_value and the loop unrolling code. Also
2885 mark this LABEL_REF so we know that this branch should predict
2888 /* A check to make sure the label is not in an inner nested loop,
2889 since this does not count as a loop exit. */
2890 if (dest_loop
!= -1)
2892 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2893 outer_loop
= loop_outer_loop
[outer_loop
])
2894 if (outer_loop
== loop_num
)
2900 if (loop_num
!= -1 && outer_loop
== -1)
2902 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2903 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2904 loop_number_exit_labels
[loop_num
] = x
;
2906 for (outer_loop
= loop_num
;
2907 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2908 outer_loop
= loop_outer_loop
[outer_loop
])
2909 loop_number_exit_count
[outer_loop
]++;
2912 /* If this is inside a loop, but not in the current loop or one enclosed
2913 by it, it invalidates at least one loop. */
2915 if (dest_loop
== -1)
2918 /* We must invalidate every nested loop containing the target of this
2919 label, except those that also contain the jump insn. */
2921 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2923 /* Stop when we reach a loop that also contains the jump insn. */
2924 for (outer_loop
= loop_num
; outer_loop
!= -1;
2925 outer_loop
= loop_outer_loop
[outer_loop
])
2926 if (dest_loop
== outer_loop
)
2929 /* If we get here, we know we need to invalidate a loop. */
2930 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2931 fprintf (loop_dump_stream
,
2932 "\nLoop at %d ignored due to multiple entry points.\n",
2933 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2935 loop_invalid
[dest_loop
] = 1;
2940 /* If this is not setting pc, ignore. */
2941 if (SET_DEST (x
) == pc_rtx
)
2942 mark_loop_jump (SET_SRC (x
), loop_num
);
2946 mark_loop_jump (XEXP (x
, 1), loop_num
);
2947 mark_loop_jump (XEXP (x
, 2), loop_num
);
2952 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2953 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2957 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2958 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2962 /* Treat anything else (such as a symbol_ref)
2963 as a branch out of this loop, but not into any loop. */
2968 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2969 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2972 loop_number_exit_labels
[loop_num
] = x
;
2974 for (outer_loop
= loop_num
; outer_loop
!= -1;
2975 outer_loop
= loop_outer_loop
[outer_loop
])
2976 loop_number_exit_count
[outer_loop
]++;
2982 /* Return nonzero if there is a label in the range from
2983 insn INSN to and including the insn whose luid is END
2984 INSN must have an assigned luid (i.e., it must not have
2985 been previously created by loop.c). */
2988 labels_in_range_p (insn
, end
)
2992 while (insn
&& INSN_LUID (insn
) <= end
)
2994 if (GET_CODE (insn
) == CODE_LABEL
)
2996 insn
= NEXT_INSN (insn
);
3002 /* Record that a memory reference X is being set. */
3005 note_addr_stored (x
, y
)
3007 rtx y ATTRIBUTE_UNUSED
;
3011 if (x
== 0 || GET_CODE (x
) != MEM
)
3014 /* Count number of memory writes.
3015 This affects heuristics in strength_reduce. */
3018 /* BLKmode MEM means all memory is clobbered. */
3019 if (GET_MODE (x
) == BLKmode
)
3020 unknown_address_altered
= 1;
3022 if (unknown_address_altered
)
3025 for (i
= 0; i
< loop_store_mems_idx
; i
++)
3026 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
3027 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
3029 /* We are storing at the same address as previously noted. Save the
3031 if (GET_MODE_SIZE (GET_MODE (x
))
3032 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
3033 loop_store_mems
[i
] = x
;
3037 if (i
== NUM_STORES
)
3038 unknown_address_altered
= 1;
3040 else if (i
== loop_store_mems_idx
)
3041 loop_store_mems
[loop_store_mems_idx
++] = x
;
3044 /* Return nonzero if the rtx X is invariant over the current loop.
3046 The value is 2 if we refer to something only conditionally invariant.
3048 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3049 Otherwise, a memory ref is invariant if it does not conflict with
3050 anything stored in `loop_store_mems'. */
3057 register enum rtx_code code
;
3059 int conditional
= 0;
3063 code
= GET_CODE (x
);
3073 /* A LABEL_REF is normally invariant, however, if we are unrolling
3074 loops, and this label is inside the loop, then it isn't invariant.
3075 This is because each unrolled copy of the loop body will have
3076 a copy of this label. If this was invariant, then an insn loading
3077 the address of this label into a register might get moved outside
3078 the loop, and then each loop body would end up using the same label.
3080 We don't know the loop bounds here though, so just fail for all
3082 if (flag_unroll_loops
)
3089 case UNSPEC_VOLATILE
:
3093 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3094 since the reg might be set by initialization within the loop. */
3096 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3097 || x
== arg_pointer_rtx
)
3098 && ! current_function_has_nonlocal_goto
)
3102 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3105 if (VARRAY_INT (n_times_set
, REGNO (x
)) < 0)
3108 return VARRAY_INT (n_times_set
, REGNO (x
)) == 0;
3111 /* Volatile memory references must be rejected. Do this before
3112 checking for read-only items, so that volatile read-only items
3113 will be rejected also. */
3114 if (MEM_VOLATILE_P (x
))
3117 /* Read-only items (such as constants in a constant pool) are
3118 invariant if their address is. */
3119 if (RTX_UNCHANGING_P (x
))
3122 /* If we filled the table (or had a subroutine call), any location
3123 in memory could have been clobbered. */
3124 if (unknown_address_altered
)
3127 /* See if there is any dependence between a store and this load. */
3128 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
3129 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
3132 /* It's not invalidated by a store in memory
3133 but we must still verify the address is invariant. */
3137 /* Don't mess with insns declared volatile. */
3138 if (MEM_VOLATILE_P (x
))
3146 fmt
= GET_RTX_FORMAT (code
);
3147 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3151 int tem
= invariant_p (XEXP (x
, i
));
3157 else if (fmt
[i
] == 'E')
3160 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3162 int tem
= invariant_p (XVECEXP (x
, i
, j
));
3172 return 1 + conditional
;
3176 /* Return nonzero if all the insns in the loop that set REG
3177 are INSN and the immediately following insns,
3178 and if each of those insns sets REG in an invariant way
3179 (not counting uses of REG in them).
3181 The value is 2 if some of these insns are only conditionally invariant.
3183 We assume that INSN itself is the first set of REG
3184 and that its source is invariant. */
3187 consec_sets_invariant_p (reg
, n_sets
, insn
)
3191 register rtx p
= insn
;
3192 register int regno
= REGNO (reg
);
3194 /* Number of sets we have to insist on finding after INSN. */
3195 int count
= n_sets
- 1;
3196 int old
= VARRAY_INT (n_times_set
, regno
);
3200 /* If N_SETS hit the limit, we can't rely on its value. */
3204 VARRAY_INT (n_times_set
, regno
) = 0;
3208 register enum rtx_code code
;
3212 code
= GET_CODE (p
);
3214 /* If library call, skip to end of it. */
3215 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3220 && (set
= single_set (p
))
3221 && GET_CODE (SET_DEST (set
)) == REG
3222 && REGNO (SET_DEST (set
)) == regno
)
3224 this = invariant_p (SET_SRC (set
));
3227 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3229 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3230 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3232 this = (CONSTANT_P (XEXP (temp
, 0))
3233 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3234 && invariant_p (XEXP (temp
, 0))));
3241 else if (code
!= NOTE
)
3243 VARRAY_INT (n_times_set
, regno
) = old
;
3248 VARRAY_INT (n_times_set
, regno
) = old
;
3249 /* If invariant_p ever returned 2, we return 2. */
3250 return 1 + (value
& 2);
3254 /* I don't think this condition is sufficient to allow INSN
3255 to be moved, so we no longer test it. */
3257 /* Return 1 if all insns in the basic block of INSN and following INSN
3258 that set REG are invariant according to TABLE. */
3261 all_sets_invariant_p (reg
, insn
, table
)
3265 register rtx p
= insn
;
3266 register int regno
= REGNO (reg
);
3270 register enum rtx_code code
;
3272 code
= GET_CODE (p
);
3273 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3275 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3276 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3277 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3279 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3286 /* Look at all uses (not sets) of registers in X. For each, if it is
3287 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3288 a different insn, set USAGE[REGNO] to const0_rtx. */
3291 find_single_use_in_loop (insn
, x
, usage
)
3296 enum rtx_code code
= GET_CODE (x
);
3297 char *fmt
= GET_RTX_FORMAT (code
);
3301 VARRAY_RTX (usage
, REGNO (x
))
3302 = (VARRAY_RTX (usage
, REGNO (x
)) != 0
3303 && VARRAY_RTX (usage
, REGNO (x
)) != insn
)
3304 ? const0_rtx
: insn
;
3306 else if (code
== SET
)
3308 /* Don't count SET_DEST if it is a REG; otherwise count things
3309 in SET_DEST because if a register is partially modified, it won't
3310 show up as a potential movable so we don't care how USAGE is set
3312 if (GET_CODE (SET_DEST (x
)) != REG
)
3313 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3314 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3317 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3319 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3320 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3321 else if (fmt
[i
] == 'E')
3322 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3323 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3327 /* Increment N_TIMES_SET at the index of each register
3328 that is modified by an insn between FROM and TO.
3329 If the value of an element of N_TIMES_SET becomes 127 or more,
3330 stop incrementing it, to avoid overflow.
3332 Store in SINGLE_USAGE[I] the single insn in which register I is
3333 used, if it is only used once. Otherwise, it is set to 0 (for no
3334 uses) or const0_rtx for more than one use. This parameter may be zero,
3335 in which case this processing is not done.
3337 Store in *COUNT_PTR the number of actual instruction
3338 in the loop. We use this to decide what is worth moving out. */
3340 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3341 In that case, it is the insn that last set reg n. */
3344 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3345 register rtx from
, to
;
3346 varray_type may_not_move
;
3347 varray_type single_usage
;
3351 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3353 register int count
= 0;
3356 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3357 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3359 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3363 /* If requested, record registers that have exactly one use. */
3366 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3368 /* Include uses in REG_EQUAL notes. */
3369 if (REG_NOTES (insn
))
3370 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3373 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3374 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3375 /* Don't move a reg that has an explicit clobber.
3376 We might do so sometimes, but it's not worth the pain. */
3377 VARRAY_CHAR (may_not_move
, REGNO (XEXP (PATTERN (insn
), 0))) = 1;
3379 if (GET_CODE (PATTERN (insn
)) == SET
3380 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3382 dest
= SET_DEST (PATTERN (insn
));
3383 while (GET_CODE (dest
) == SUBREG
3384 || GET_CODE (dest
) == ZERO_EXTRACT
3385 || GET_CODE (dest
) == SIGN_EXTRACT
3386 || GET_CODE (dest
) == STRICT_LOW_PART
)
3387 dest
= XEXP (dest
, 0);
3388 if (GET_CODE (dest
) == REG
)
3390 register int regno
= REGNO (dest
);
3391 /* If this is the first setting of this reg
3392 in current basic block, and it was set before,
3393 it must be set in two basic blocks, so it cannot
3394 be moved out of the loop. */
3395 if (VARRAY_INT (n_times_set
, regno
) > 0
3396 && last_set
[regno
] == 0)
3397 VARRAY_CHAR (may_not_move
, regno
) = 1;
3398 /* If this is not first setting in current basic block,
3399 see if reg was used in between previous one and this.
3400 If so, neither one can be moved. */
3401 if (last_set
[regno
] != 0
3402 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3403 VARRAY_CHAR (may_not_move
, regno
) = 1;
3404 if (VARRAY_INT (n_times_set
, regno
) < 127)
3405 ++VARRAY_INT (n_times_set
, regno
);
3406 last_set
[regno
] = insn
;
3409 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3412 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3414 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3415 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3416 /* Don't move a reg that has an explicit clobber.
3417 It's not worth the pain to try to do it correctly. */
3418 VARRAY_CHAR (may_not_move
, REGNO (XEXP (x
, 0))) = 1;
3420 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3422 dest
= SET_DEST (x
);
3423 while (GET_CODE (dest
) == SUBREG
3424 || GET_CODE (dest
) == ZERO_EXTRACT
3425 || GET_CODE (dest
) == SIGN_EXTRACT
3426 || GET_CODE (dest
) == STRICT_LOW_PART
)
3427 dest
= XEXP (dest
, 0);
3428 if (GET_CODE (dest
) == REG
)
3430 register int regno
= REGNO (dest
);
3431 if (VARRAY_INT (n_times_set
, regno
) > 0
3432 && last_set
[regno
] == 0)
3433 VARRAY_CHAR (may_not_move
, regno
) = 1;
3434 if (last_set
[regno
] != 0
3435 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3436 VARRAY_CHAR (may_not_move
, regno
) = 1;
3437 if (VARRAY_INT (n_times_set
, regno
) < 127)
3438 ++VARRAY_INT (n_times_set
, regno
);
3439 last_set
[regno
] = insn
;
3446 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3447 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3452 /* Given a loop that is bounded by LOOP_START and LOOP_END
3453 and that is entered at SCAN_START,
3454 return 1 if the register set in SET contained in insn INSN is used by
3455 any insn that precedes INSN in cyclic order starting
3456 from the loop entry point.
3458 We don't want to use INSN_LUID here because if we restrict INSN to those
3459 that have a valid INSN_LUID, it means we cannot move an invariant out
3460 from an inner loop past two loops. */
3463 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3464 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3466 rtx reg
= SET_DEST (set
);
3469 /* Scan forward checking for register usage. If we hit INSN, we
3470 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3471 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3473 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3474 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3484 /* A "basic induction variable" or biv is a pseudo reg that is set
3485 (within this loop) only by incrementing or decrementing it. */
3486 /* A "general induction variable" or giv is a pseudo reg whose
3487 value is a linear function of a biv. */
3489 /* Bivs are recognized by `basic_induction_var';
3490 Givs by `general_induction_var'. */
3492 /* Indexed by register number, indicates whether or not register is an
3493 induction variable, and if so what type. */
3495 enum iv_mode
*reg_iv_type
;
3497 /* Indexed by register number, contains pointer to `struct induction'
3498 if register is an induction variable. This holds general info for
3499 all induction variables. */
3501 struct induction
**reg_iv_info
;
3503 /* Indexed by register number, contains pointer to `struct iv_class'
3504 if register is a basic induction variable. This holds info describing
3505 the class (a related group) of induction variables that the biv belongs
3508 struct iv_class
**reg_biv_class
;
3510 /* The head of a list which links together (via the next field)
3511 every iv class for the current loop. */
3513 struct iv_class
*loop_iv_list
;
3515 /* Communication with routines called via `note_stores'. */
3517 static rtx note_insn
;
3519 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3521 static rtx addr_placeholder
;
3523 /* ??? Unfinished optimizations, and possible future optimizations,
3524 for the strength reduction code. */
3526 /* ??? The interaction of biv elimination, and recognition of 'constant'
3527 bivs, may cause problems. */
3529 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3530 performance problems.
3532 Perhaps don't eliminate things that can be combined with an addressing
3533 mode. Find all givs that have the same biv, mult_val, and add_val;
3534 then for each giv, check to see if its only use dies in a following
3535 memory address. If so, generate a new memory address and check to see
3536 if it is valid. If it is valid, then store the modified memory address,
3537 otherwise, mark the giv as not done so that it will get its own iv. */
3539 /* ??? Could try to optimize branches when it is known that a biv is always
3542 /* ??? When replace a biv in a compare insn, we should replace with closest
3543 giv so that an optimized branch can still be recognized by the combiner,
3544 e.g. the VAX acb insn. */
3546 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3547 was rerun in loop_optimize whenever a register was added or moved.
3548 Also, some of the optimizations could be a little less conservative. */
3550 /* Perform strength reduction and induction variable elimination.
3552 Pseudo registers created during this function will be beyond the last
3553 valid index in several tables including n_times_set and regno_last_uid.
3554 This does not cause a problem here, because the added registers cannot be
3555 givs outside of their loop, and hence will never be reconsidered.
3556 But scan_loop must check regnos to make sure they are in bounds.
3558 SCAN_START is the first instruction in the loop, as the loop would
3559 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3560 the first instruction in the loop, as it is layed out in the
3561 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG. */
3564 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3565 loop_start
, loop_end
, unroll_p
)
3579 /* This is 1 if current insn is not executed at least once for every loop
3581 int not_every_iteration
= 0;
3582 /* This is 1 if current insn may be executed more than once for every
3584 int maybe_multiple
= 0;
3585 /* Temporary list pointers for traversing loop_iv_list. */
3586 struct iv_class
*bl
, **backbl
;
3587 /* Ratio of extra register life span we can justify
3588 for saving an instruction. More if loop doesn't call subroutines
3589 since in that case saving an insn makes more difference
3590 and more registers are available. */
3591 /* ??? could set this to last value of threshold in move_movables */
3592 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3593 /* Map of pseudo-register replacements. */
3597 rtx end_insert_before
;
3600 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3601 * sizeof (enum iv_mode
*));
3602 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3603 reg_iv_info
= (struct induction
**)
3604 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3605 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3606 * sizeof (struct induction
*)));
3607 reg_biv_class
= (struct iv_class
**)
3608 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3609 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3610 * sizeof (struct iv_class
*)));
3613 addr_placeholder
= gen_reg_rtx (Pmode
);
3615 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3616 must be put before this insn, so that they will appear in the right
3617 order (i.e. loop order).
3619 If loop_end is the end of the current function, then emit a
3620 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3622 if (NEXT_INSN (loop_end
) != 0)
3623 end_insert_before
= NEXT_INSN (loop_end
);
3625 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3627 /* Scan through loop to find all possible bivs. */
3629 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
3631 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
3633 if (GET_CODE (p
) == INSN
3634 && (set
= single_set (p
))
3635 && GET_CODE (SET_DEST (set
)) == REG
)
3637 dest_reg
= SET_DEST (set
);
3638 if (REGNO (dest_reg
) < max_reg_before_loop
3639 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3640 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3642 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3643 dest_reg
, p
, &inc_val
, &mult_val
))
3645 /* It is a possible basic induction variable.
3646 Create and initialize an induction structure for it. */
3649 = (struct induction
*) alloca (sizeof (struct induction
));
3651 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3652 not_every_iteration
, maybe_multiple
);
3653 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3655 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3656 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3660 /* Past CODE_LABEL, we get to insns that may be executed multiple
3661 times. The only way we can be sure that they can't is if every
3662 jump insn between here and the end of the loop either
3663 returns, exits the loop, is a forward jump, or is a jump
3664 to the loop start. */
3666 if (GET_CODE (p
) == CODE_LABEL
)
3674 insn
= NEXT_INSN (insn
);
3675 if (insn
== scan_start
)
3683 if (insn
== scan_start
)
3687 if (GET_CODE (insn
) == JUMP_INSN
3688 && GET_CODE (PATTERN (insn
)) != RETURN
3689 && (! condjump_p (insn
)
3690 || (JUMP_LABEL (insn
) != 0
3691 && JUMP_LABEL (insn
) != scan_start
3692 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3693 || INSN_UID (insn
) >= max_uid_for_loop
3694 || (INSN_LUID (JUMP_LABEL (insn
))
3695 < INSN_LUID (insn
))))))
3703 /* Past a jump, we get to insns for which we can't count
3704 on whether they will be executed during each iteration. */
3705 /* This code appears twice in strength_reduce. There is also similar
3706 code in scan_loop. */
3707 if (GET_CODE (p
) == JUMP_INSN
3708 /* If we enter the loop in the middle, and scan around to the
3709 beginning, don't set not_every_iteration for that.
3710 This can be any kind of jump, since we want to know if insns
3711 will be executed if the loop is executed. */
3712 && ! (JUMP_LABEL (p
) == loop_top
3713 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3714 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3718 /* If this is a jump outside the loop, then it also doesn't
3719 matter. Check to see if the target of this branch is on the
3720 loop_number_exits_labels list. */
3722 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3724 label
= LABEL_NEXTREF (label
))
3725 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3729 not_every_iteration
= 1;
3732 else if (GET_CODE (p
) == NOTE
)
3734 /* At the virtual top of a converted loop, insns are again known to
3735 be executed each iteration: logically, the loop begins here
3736 even though the exit code has been duplicated. */
3737 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3738 not_every_iteration
= 0;
3739 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3741 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3745 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3746 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3747 or not an insn is known to be executed each iteration of the
3748 loop, whether or not any iterations are known to occur.
3750 Therefore, if we have just passed a label and have no more labels
3751 between here and the test insn of the loop, we know these insns
3752 will be executed each iteration. */
3754 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3755 && no_labels_between_p (p
, loop_end
))
3756 not_every_iteration
= 0;
3759 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3760 Make a sanity check against n_times_set. */
3761 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3763 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3764 /* Above happens if register modified by subreg, etc. */
3765 /* Make sure it is not recognized as a basic induction var: */
3766 || VARRAY_INT (n_times_set
, bl
->regno
) != bl
->biv_count
3767 /* If never incremented, it is invariant that we decided not to
3768 move. So leave it alone. */
3769 || ! bl
->incremented
)
3771 if (loop_dump_stream
)
3772 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3774 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3775 ? "not induction variable"
3776 : (! bl
->incremented
? "never incremented"
3779 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3786 if (loop_dump_stream
)
3787 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3791 /* Exit if there are no bivs. */
3794 /* Can still unroll the loop anyways, but indicate that there is no
3795 strength reduction info available. */
3797 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3802 /* Find initial value for each biv by searching backwards from loop_start,
3803 halting at first label. Also record any test condition. */
3806 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3810 if (GET_CODE (p
) == CALL_INSN
)
3813 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3814 || GET_CODE (p
) == CALL_INSN
)
3815 note_stores (PATTERN (p
), record_initial
);
3817 /* Record any test of a biv that branches around the loop if no store
3818 between it and the start of loop. We only care about tests with
3819 constants and registers and only certain of those. */
3820 if (GET_CODE (p
) == JUMP_INSN
3821 && JUMP_LABEL (p
) != 0
3822 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3823 && (test
= get_condition_for_loop (p
)) != 0
3824 && GET_CODE (XEXP (test
, 0)) == REG
3825 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3826 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3827 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3828 && bl
->init_insn
== 0)
3830 /* If an NE test, we have an initial value! */
3831 if (GET_CODE (test
) == NE
)
3834 bl
->init_set
= gen_rtx_SET (VOIDmode
,
3835 XEXP (test
, 0), XEXP (test
, 1));
3838 bl
->initial_test
= test
;
3842 /* Look at the each biv and see if we can say anything better about its
3843 initial value from any initializing insns set up above. (This is done
3844 in two passes to avoid missing SETs in a PARALLEL.) */
3845 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3850 if (! bl
->init_insn
)
3853 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3854 is a constant, use the value of that. */
3855 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
3856 && CONSTANT_P (XEXP (note
, 0)))
3857 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
3858 && CONSTANT_P (XEXP (note
, 0))))
3859 src
= XEXP (note
, 0);
3861 src
= SET_SRC (bl
->init_set
);
3863 if (loop_dump_stream
)
3864 fprintf (loop_dump_stream
,
3865 "Biv %d initialized at insn %d: initial value ",
3866 bl
->regno
, INSN_UID (bl
->init_insn
));
3868 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3869 || GET_MODE (src
) == VOIDmode
)
3870 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3872 bl
->initial_value
= src
;
3874 if (loop_dump_stream
)
3876 if (GET_CODE (src
) == CONST_INT
)
3878 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (src
));
3879 fputc ('\n', loop_dump_stream
);
3883 print_rtl (loop_dump_stream
, src
);
3884 fprintf (loop_dump_stream
, "\n");
3890 /* Biv initial value is not simple move,
3891 so let it keep initial value of "itself". */
3893 if (loop_dump_stream
)
3894 fprintf (loop_dump_stream
, "is complex\n");
3898 /* Search the loop for general induction variables. */
3900 /* A register is a giv if: it is only set once, it is a function of a
3901 biv and a constant (or invariant), and it is not a biv. */
3903 not_every_iteration
= 0;
3909 /* At end of a straight-in loop, we are done.
3910 At end of a loop entered at the bottom, scan the top. */
3911 if (p
== scan_start
)
3919 if (p
== scan_start
)
3923 /* Look for a general induction variable in a register. */
3924 if (GET_CODE (p
) == INSN
3925 && (set
= single_set (p
))
3926 && GET_CODE (SET_DEST (set
)) == REG
3927 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
3935 dest_reg
= SET_DEST (set
);
3936 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3939 if (/* SET_SRC is a giv. */
3940 (general_induction_var (SET_SRC (set
), &src_reg
, &add_val
,
3941 &mult_val
, 0, &benefit
)
3942 /* Equivalent expression is a giv. */
3943 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3944 && general_induction_var (XEXP (regnote
, 0), &src_reg
,
3945 &add_val
, &mult_val
, 0,
3947 /* Don't try to handle any regs made by loop optimization.
3948 We have nothing on them in regno_first_uid, etc. */
3949 && REGNO (dest_reg
) < max_reg_before_loop
3950 /* Don't recognize a BASIC_INDUCT_VAR here. */
3951 && dest_reg
!= src_reg
3952 /* This must be the only place where the register is set. */
3953 && (VARRAY_INT (n_times_set
, REGNO (dest_reg
)) == 1
3954 /* or all sets must be consecutive and make a giv. */
3955 || (benefit
= consec_sets_giv (benefit
, p
,
3957 &add_val
, &mult_val
))))
3961 = (struct induction
*) alloca (sizeof (struct induction
));
3964 /* If this is a library call, increase benefit. */
3965 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3966 benefit
+= libcall_benefit (p
);
3968 /* Skip the consecutive insns, if there are any. */
3969 for (count
= VARRAY_INT (n_times_set
, REGNO (dest_reg
)) - 1;
3972 /* If first insn of libcall sequence, skip to end.
3973 Do this at start of loop, since INSN is guaranteed to
3975 if (GET_CODE (p
) != NOTE
3976 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3979 do p
= NEXT_INSN (p
);
3980 while (GET_CODE (p
) == NOTE
);
3983 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3984 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3990 #ifndef DONT_REDUCE_ADDR
3991 /* Look for givs which are memory addresses. */
3992 /* This resulted in worse code on a VAX 8600. I wonder if it
3994 if (GET_CODE (p
) == INSN
)
3995 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3999 /* Update the status of whether giv can derive other givs. This can
4000 change when we pass a label or an insn that updates a biv. */
4001 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4002 || GET_CODE (p
) == CODE_LABEL
)
4003 update_giv_derive (p
);
4005 /* Past a jump, we get to insns for which we can't count
4006 on whether they will be executed during each iteration. */
4007 /* This code appears twice in strength_reduce. There is also similar
4008 code in scan_loop. */
4009 if (GET_CODE (p
) == JUMP_INSN
4010 /* If we enter the loop in the middle, and scan around to the
4011 beginning, don't set not_every_iteration for that.
4012 This can be any kind of jump, since we want to know if insns
4013 will be executed if the loop is executed. */
4014 && ! (JUMP_LABEL (p
) == loop_top
4015 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
4016 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
4020 /* If this is a jump outside the loop, then it also doesn't
4021 matter. Check to see if the target of this branch is on the
4022 loop_number_exits_labels list. */
4024 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
4026 label
= LABEL_NEXTREF (label
))
4027 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4031 not_every_iteration
= 1;
4034 else if (GET_CODE (p
) == NOTE
)
4036 /* At the virtual top of a converted loop, insns are again known to
4037 be executed each iteration: logically, the loop begins here
4038 even though the exit code has been duplicated. */
4039 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
4040 not_every_iteration
= 0;
4041 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
4043 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
4047 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4048 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4049 or not an insn is known to be executed each iteration of the
4050 loop, whether or not any iterations are known to occur.
4052 Therefore, if we have just passed a label and have no more labels
4053 between here and the test insn of the loop, we know these insns
4054 will be executed each iteration. */
4056 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
4057 && no_labels_between_p (p
, loop_end
))
4058 not_every_iteration
= 0;
4061 /* Try to calculate and save the number of loop iterations. This is
4062 set to zero if the actual number can not be calculated. This must
4063 be called after all giv's have been identified, since otherwise it may
4064 fail if the iteration variable is a giv. */
4066 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
4068 /* Now for each giv for which we still don't know whether or not it is
4069 replaceable, check to see if it is replaceable because its final value
4070 can be calculated. This must be done after loop_iterations is called,
4071 so that final_giv_value will work correctly. */
4073 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4075 struct induction
*v
;
4077 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4078 if (! v
->replaceable
&& ! v
->not_replaceable
)
4079 check_final_value (v
, loop_start
, loop_end
);
4082 /* Try to prove that the loop counter variable (if any) is always
4083 nonnegative; if so, record that fact with a REG_NONNEG note
4084 so that "decrement and branch until zero" insn can be used. */
4085 check_dbra_loop (loop_end
, insn_count
, loop_start
);
4088 /* record loop-variables relevant for BCT optimization before unrolling
4089 the loop. Unrolling may update part of this information, and the
4090 correct data will be used for generating the BCT. */
4091 #ifdef HAVE_decrement_and_branch_on_count
4092 if (HAVE_decrement_and_branch_on_count
)
4093 analyze_loop_iterations (loop_start
, loop_end
);
4097 /* Create reg_map to hold substitutions for replaceable giv regs. */
4098 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
4099 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
4101 /* Examine each iv class for feasibility of strength reduction/induction
4102 variable elimination. */
4104 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4106 struct induction
*v
;
4109 rtx final_value
= 0;
4111 /* Test whether it will be possible to eliminate this biv
4112 provided all givs are reduced. This is possible if either
4113 the reg is not used outside the loop, or we can compute
4114 what its final value will be.
4116 For architectures with a decrement_and_branch_until_zero insn,
4117 don't do this if we put a REG_NONNEG note on the endtest for
4120 /* Compare against bl->init_insn rather than loop_start.
4121 We aren't concerned with any uses of the biv between
4122 init_insn and loop_start since these won't be affected
4123 by the value of the biv elsewhere in the function, so
4124 long as init_insn doesn't use the biv itself.
4125 March 14, 1989 -- self@bayes.arc.nasa.gov */
4127 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4129 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4130 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
4131 #ifdef HAVE_decrement_and_branch_until_zero
4134 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4135 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
4136 #ifdef HAVE_decrement_and_branch_until_zero
4140 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
4141 threshold
, insn_count
);
4144 if (loop_dump_stream
)
4146 fprintf (loop_dump_stream
,
4147 "Cannot eliminate biv %d.\n",
4149 fprintf (loop_dump_stream
,
4150 "First use: insn %d, last use: insn %d.\n",
4151 REGNO_FIRST_UID (bl
->regno
),
4152 REGNO_LAST_UID (bl
->regno
));
4156 /* Combine all giv's for this iv_class. */
4159 /* This will be true at the end, if all givs which depend on this
4160 biv have been strength reduced.
4161 We can't (currently) eliminate the biv unless this is so. */
4164 /* Check each giv in this class to see if we will benefit by reducing
4165 it. Skip giv's combined with others. */
4166 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4168 struct induction
*tv
;
4170 if (v
->ignore
|| v
->same
)
4173 benefit
= v
->benefit
;
4175 /* Reduce benefit if not replaceable, since we will insert
4176 a move-insn to replace the insn that calculates this giv.
4177 Don't do this unless the giv is a user variable, since it
4178 will often be marked non-replaceable because of the duplication
4179 of the exit code outside the loop. In such a case, the copies
4180 we insert are dead and will be deleted. So they don't have
4181 a cost. Similar situations exist. */
4182 /* ??? The new final_[bg]iv_value code does a much better job
4183 of finding replaceable giv's, and hence this code may no longer
4185 if (! v
->replaceable
&& ! bl
->eliminable
4186 && REG_USERVAR_P (v
->dest_reg
))
4187 benefit
-= copy_cost
;
4189 /* Decrease the benefit to count the add-insns that we will
4190 insert to increment the reduced reg for the giv. */
4191 benefit
-= add_cost
* bl
->biv_count
;
4193 /* Decide whether to strength-reduce this giv or to leave the code
4194 unchanged (recompute it from the biv each time it is used).
4195 This decision can be made independently for each giv. */
4198 /* Attempt to guess whether autoincrement will handle some of the
4199 new add insns; if so, increase BENEFIT (undo the subtraction of
4200 add_cost that was done above). */
4201 if (v
->giv_type
== DEST_ADDR
4202 && GET_CODE (v
->mult_val
) == CONST_INT
)
4204 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
4205 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4206 benefit
+= add_cost
* bl
->biv_count
;
4208 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
4209 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4210 benefit
+= add_cost
* bl
->biv_count
;
4215 /* If an insn is not to be strength reduced, then set its ignore
4216 flag, and clear all_reduced. */
4218 /* A giv that depends on a reversed biv must be reduced if it is
4219 used after the loop exit, otherwise, it would have the wrong
4220 value after the loop exit. To make it simple, just reduce all
4221 of such giv's whether or not we know they are used after the loop
4224 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4227 if (loop_dump_stream
)
4228 fprintf (loop_dump_stream
,
4229 "giv of insn %d not worth while, %d vs %d.\n",
4231 v
->lifetime
* threshold
* benefit
, insn_count
);
4237 /* Check that we can increment the reduced giv without a
4238 multiply insn. If not, reject it. */
4240 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4241 if (tv
->mult_val
== const1_rtx
4242 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4244 if (loop_dump_stream
)
4245 fprintf (loop_dump_stream
,
4246 "giv of insn %d: would need a multiply.\n",
4247 INSN_UID (v
->insn
));
4255 /* Reduce each giv that we decided to reduce. */
4257 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4259 struct induction
*tv
;
4260 if (! v
->ignore
&& v
->same
== 0)
4262 int auto_inc_opt
= 0;
4264 v
->new_reg
= gen_reg_rtx (v
->mode
);
4267 /* If the target has auto-increment addressing modes, and
4268 this is an address giv, then try to put the increment
4269 immediately after its use, so that flow can create an
4270 auto-increment addressing mode. */
4271 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4272 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4273 /* We don't handle reversed biv's because bl->biv->insn
4274 does not have a valid INSN_LUID. */
4276 && v
->always_executed
&& ! v
->maybe_multiple
4277 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4279 /* If other giv's have been combined with this one, then
4280 this will work only if all uses of the other giv's occur
4281 before this giv's insn. This is difficult to check.
4283 We simplify this by looking for the common case where
4284 there is one DEST_REG giv, and this giv's insn is the
4285 last use of the dest_reg of that DEST_REG giv. If the
4286 increment occurs after the address giv, then we can
4287 perform the optimization. (Otherwise, the increment
4288 would have to go before other_giv, and we would not be
4289 able to combine it with the address giv to get an
4290 auto-inc address.) */
4291 if (v
->combined_with
)
4293 struct induction
*other_giv
= 0;
4295 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4303 if (! tv
&& other_giv
4304 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4305 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4306 == INSN_UID (v
->insn
))
4307 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4310 /* Check for case where increment is before the address
4311 giv. Do this test in "loop order". */
4312 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4313 && (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4314 || (INSN_LUID (bl
->biv
->insn
)
4315 > INSN_LUID (scan_start
))))
4316 || (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4317 && (INSN_LUID (scan_start
)
4318 < INSN_LUID (bl
->biv
->insn
))))
4327 /* We can't put an insn immediately after one setting
4328 cc0, or immediately before one using cc0. */
4329 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4330 || (auto_inc_opt
== -1
4331 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4332 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4333 && sets_cc0_p (PATTERN (prev
))))
4339 v
->auto_inc_opt
= 1;
4343 /* For each place where the biv is incremented, add an insn
4344 to increment the new, reduced reg for the giv. */
4345 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4350 insert_before
= tv
->insn
;
4351 else if (auto_inc_opt
== 1)
4352 insert_before
= NEXT_INSN (v
->insn
);
4354 insert_before
= v
->insn
;
4356 if (tv
->mult_val
== const1_rtx
)
4357 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4358 v
->new_reg
, v
->new_reg
, insert_before
);
4359 else /* tv->mult_val == const0_rtx */
4360 /* A multiply is acceptable here
4361 since this is presumed to be seldom executed. */
4362 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4363 v
->add_val
, v
->new_reg
, insert_before
);
4366 /* Add code at loop start to initialize giv's reduced reg. */
4368 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4369 v
->add_val
, v
->new_reg
, loop_start
);
4373 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4376 For each giv register that can be reduced now: if replaceable,
4377 substitute reduced reg wherever the old giv occurs;
4378 else add new move insn "giv_reg = reduced_reg".
4380 Also check for givs whose first use is their definition and whose
4381 last use is the definition of another giv. If so, it is likely
4382 dead and should not be used to eliminate a biv. */
4383 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4385 if (v
->same
&& v
->same
->ignore
)
4391 if (v
->giv_type
== DEST_REG
4392 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4394 struct induction
*v1
;
4396 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4397 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4401 /* Update expression if this was combined, in case other giv was
4404 v
->new_reg
= replace_rtx (v
->new_reg
,
4405 v
->same
->dest_reg
, v
->same
->new_reg
);
4407 if (v
->giv_type
== DEST_ADDR
)
4408 /* Store reduced reg as the address in the memref where we found
4410 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4411 else if (v
->replaceable
)
4413 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4416 /* I can no longer duplicate the original problem. Perhaps
4417 this is unnecessary now? */
4419 /* Replaceable; it isn't strictly necessary to delete the old
4420 insn and emit a new one, because v->dest_reg is now dead.
4422 However, especially when unrolling loops, the special
4423 handling for (set REG0 REG1) in the second cse pass may
4424 make v->dest_reg live again. To avoid this problem, emit
4425 an insn to set the original giv reg from the reduced giv.
4426 We can not delete the original insn, since it may be part
4427 of a LIBCALL, and the code in flow that eliminates dead
4428 libcalls will fail if it is deleted. */
4429 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4435 /* Not replaceable; emit an insn to set the original giv reg from
4436 the reduced giv, same as above. */
4437 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4441 /* When a loop is reversed, givs which depend on the reversed
4442 biv, and which are live outside the loop, must be set to their
4443 correct final value. This insn is only needed if the giv is
4444 not replaceable. The correct final value is the same as the
4445 value that the giv starts the reversed loop with. */
4446 if (bl
->reversed
&& ! v
->replaceable
)
4447 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4448 v
->add_val
, v
->dest_reg
, end_insert_before
);
4449 else if (v
->final_value
)
4453 /* If the loop has multiple exits, emit the insn before the
4454 loop to ensure that it will always be executed no matter
4455 how the loop exits. Otherwise, emit the insn after the loop,
4456 since this is slightly more efficient. */
4457 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4458 insert_before
= loop_start
;
4460 insert_before
= end_insert_before
;
4461 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4465 /* If the insn to set the final value of the giv was emitted
4466 before the loop, then we must delete the insn inside the loop
4467 that sets it. If this is a LIBCALL, then we must delete
4468 every insn in the libcall. Note, however, that
4469 final_giv_value will only succeed when there are multiple
4470 exits if the giv is dead at each exit, hence it does not
4471 matter that the original insn remains because it is dead
4473 /* Delete the insn inside the loop that sets the giv since
4474 the giv is now set before (or after) the loop. */
4475 delete_insn (v
->insn
);
4479 if (loop_dump_stream
)
4481 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4482 INSN_UID (v
->insn
));
4483 print_rtl (loop_dump_stream
, v
->new_reg
);
4484 fprintf (loop_dump_stream
, "\n");
4488 /* All the givs based on the biv bl have been reduced if they
4491 /* For each giv not marked as maybe dead that has been combined with a
4492 second giv, clear any "maybe dead" mark on that second giv.
4493 v->new_reg will either be or refer to the register of the giv it
4496 Doing this clearing avoids problems in biv elimination where a
4497 giv's new_reg is a complex value that can't be put in the insn but
4498 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4499 Since the register will be used in either case, we'd prefer it be
4500 used from the simpler giv. */
4502 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4503 if (! v
->maybe_dead
&& v
->same
)
4504 v
->same
->maybe_dead
= 0;
4506 /* Try to eliminate the biv, if it is a candidate.
4507 This won't work if ! all_reduced,
4508 since the givs we planned to use might not have been reduced.
4510 We have to be careful that we didn't initially think we could eliminate
4511 this biv because of a giv that we now think may be dead and shouldn't
4512 be used as a biv replacement.
4514 Also, there is the possibility that we may have a giv that looks
4515 like it can be used to eliminate a biv, but the resulting insn
4516 isn't valid. This can happen, for example, on the 88k, where a
4517 JUMP_INSN can compare a register only with zero. Attempts to
4518 replace it with a compare with a constant will fail.
4520 Note that in cases where this call fails, we may have replaced some
4521 of the occurrences of the biv with a giv, but no harm was done in
4522 doing so in the rare cases where it can occur. */
4524 if (all_reduced
== 1 && bl
->eliminable
4525 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4526 threshold
, insn_count
))
4529 /* ?? If we created a new test to bypass the loop entirely,
4530 or otherwise drop straight in, based on this test, then
4531 we might want to rewrite it also. This way some later
4532 pass has more hope of removing the initialization of this
4535 /* If final_value != 0, then the biv may be used after loop end
4536 and we must emit an insn to set it just in case.
4538 Reversed bivs already have an insn after the loop setting their
4539 value, so we don't need another one. We can't calculate the
4540 proper final value for such a biv here anyways. */
4541 if (final_value
!= 0 && ! bl
->reversed
)
4545 /* If the loop has multiple exits, emit the insn before the
4546 loop to ensure that it will always be executed no matter
4547 how the loop exits. Otherwise, emit the insn after the
4548 loop, since this is slightly more efficient. */
4549 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4550 insert_before
= loop_start
;
4552 insert_before
= end_insert_before
;
4554 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4559 /* Delete all of the instructions inside the loop which set
4560 the biv, as they are all dead. If is safe to delete them,
4561 because an insn setting a biv will never be part of a libcall. */
4562 /* However, deleting them will invalidate the regno_last_uid info,
4563 so keeping them around is more convenient. Final_biv_value
4564 will only succeed when there are multiple exits if the biv
4565 is dead at each exit, hence it does not matter that the original
4566 insn remains, because it is dead anyways. */
4567 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4568 delete_insn (v
->insn
);
4571 if (loop_dump_stream
)
4572 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4577 /* Go through all the instructions in the loop, making all the
4578 register substitutions scheduled in REG_MAP. */
4580 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4581 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4582 || GET_CODE (p
) == CALL_INSN
)
4584 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4585 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4589 /* Unroll loops from within strength reduction so that we can use the
4590 induction variable information that strength_reduce has already
4594 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4597 /* instrument the loop with bct insn */
4598 #ifdef HAVE_decrement_and_branch_on_count
4599 if (HAVE_decrement_and_branch_on_count
)
4600 insert_bct (loop_start
, loop_end
);
4604 if (loop_dump_stream
)
4605 fprintf (loop_dump_stream
, "\n");
4608 /* Return 1 if X is a valid source for an initial value (or as value being
4609 compared against in an initial test).
4611 X must be either a register or constant and must not be clobbered between
4612 the current insn and the start of the loop.
4614 INSN is the insn containing X. */
4617 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4626 /* Only consider pseudos we know about initialized in insns whose luids
4628 if (GET_CODE (x
) != REG
4629 || REGNO (x
) >= max_reg_before_loop
)
4632 /* Don't use call-clobbered registers across a call which clobbers it. On
4633 some machines, don't use any hard registers at all. */
4634 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4635 && (SMALL_REGISTER_CLASSES
4636 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4639 /* Don't use registers that have been clobbered before the start of the
4641 if (reg_set_between_p (x
, insn
, loop_start
))
4647 /* Scan X for memory refs and check each memory address
4648 as a possible giv. INSN is the insn whose pattern X comes from.
4649 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4650 every loop iteration. */
4653 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4656 int not_every_iteration
;
4657 rtx loop_start
, loop_end
;
4660 register enum rtx_code code
;
4666 code
= GET_CODE (x
);
4690 /* This code used to disable creating GIVs with mult_val == 1 and
4691 add_val == 0. However, this leads to lost optimizations when
4692 it comes time to combine a set of related DEST_ADDR GIVs, since
4693 this one would not be seen. */
4695 if (general_induction_var (XEXP (x
, 0), &src_reg
, &add_val
,
4696 &mult_val
, 1, &benefit
))
4698 /* Found one; record it. */
4700 = (struct induction
*) oballoc (sizeof (struct induction
));
4702 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4703 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4704 &XEXP (x
, 0), loop_start
, loop_end
);
4706 v
->mem_mode
= GET_MODE (x
);
4715 /* Recursively scan the subexpressions for other mem refs. */
4717 fmt
= GET_RTX_FORMAT (code
);
4718 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4720 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4722 else if (fmt
[i
] == 'E')
4723 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4724 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4725 loop_start
, loop_end
);
4728 /* Fill in the data about one biv update.
4729 V is the `struct induction' in which we record the biv. (It is
4730 allocated by the caller, with alloca.)
4731 INSN is the insn that sets it.
4732 DEST_REG is the biv's reg.
4734 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4735 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4736 being set to INC_VAL.
4738 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4739 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4740 can be executed more than once per iteration. If MAYBE_MULTIPLE
4741 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4742 executed exactly once per iteration. */
4745 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4746 not_every_iteration
, maybe_multiple
)
4747 struct induction
*v
;
4752 int not_every_iteration
;
4755 struct iv_class
*bl
;
4758 v
->src_reg
= dest_reg
;
4759 v
->dest_reg
= dest_reg
;
4760 v
->mult_val
= mult_val
;
4761 v
->add_val
= inc_val
;
4762 v
->mode
= GET_MODE (dest_reg
);
4763 v
->always_computable
= ! not_every_iteration
;
4764 v
->always_executed
= ! not_every_iteration
;
4765 v
->maybe_multiple
= maybe_multiple
;
4767 /* Add this to the reg's iv_class, creating a class
4768 if this is the first incrementation of the reg. */
4770 bl
= reg_biv_class
[REGNO (dest_reg
)];
4773 /* Create and initialize new iv_class. */
4775 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4777 bl
->regno
= REGNO (dest_reg
);
4783 /* Set initial value to the reg itself. */
4784 bl
->initial_value
= dest_reg
;
4785 /* We haven't seen the initializing insn yet */
4788 bl
->initial_test
= 0;
4789 bl
->incremented
= 0;
4793 bl
->total_benefit
= 0;
4795 /* Add this class to loop_iv_list. */
4796 bl
->next
= loop_iv_list
;
4799 /* Put it in the array of biv register classes. */
4800 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4803 /* Update IV_CLASS entry for this biv. */
4804 v
->next_iv
= bl
->biv
;
4807 if (mult_val
== const1_rtx
)
4808 bl
->incremented
= 1;
4810 if (loop_dump_stream
)
4812 fprintf (loop_dump_stream
,
4813 "Insn %d: possible biv, reg %d,",
4814 INSN_UID (insn
), REGNO (dest_reg
));
4815 if (GET_CODE (inc_val
) == CONST_INT
)
4817 fprintf (loop_dump_stream
, " const =");
4818 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (inc_val
));
4819 fputc ('\n', loop_dump_stream
);
4823 fprintf (loop_dump_stream
, " const = ");
4824 print_rtl (loop_dump_stream
, inc_val
);
4825 fprintf (loop_dump_stream
, "\n");
4830 /* Fill in the data about one giv.
4831 V is the `struct induction' in which we record the giv. (It is
4832 allocated by the caller, with alloca.)
4833 INSN is the insn that sets it.
4834 BENEFIT estimates the savings from deleting this insn.
4835 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4836 into a register or is used as a memory address.
4838 SRC_REG is the biv reg which the giv is computed from.
4839 DEST_REG is the giv's reg (if the giv is stored in a reg).
4840 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4841 LOCATION points to the place where this giv's value appears in INSN. */
4844 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4845 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4846 struct induction
*v
;
4850 rtx mult_val
, add_val
;
4853 int not_every_iteration
;
4855 rtx loop_start
, loop_end
;
4857 struct induction
*b
;
4858 struct iv_class
*bl
;
4859 rtx set
= single_set (insn
);
4862 v
->src_reg
= src_reg
;
4864 v
->dest_reg
= dest_reg
;
4865 v
->mult_val
= mult_val
;
4866 v
->add_val
= add_val
;
4867 v
->benefit
= benefit
;
4868 v
->location
= location
;
4870 v
->combined_with
= 0;
4871 v
->maybe_multiple
= 0;
4873 v
->derive_adjustment
= 0;
4879 v
->auto_inc_opt
= 0;
4883 /* The v->always_computable field is used in update_giv_derive, to
4884 determine whether a giv can be used to derive another giv. For a
4885 DEST_REG giv, INSN computes a new value for the giv, so its value
4886 isn't computable if INSN insn't executed every iteration.
4887 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4888 it does not compute a new value. Hence the value is always computable
4889 regardless of whether INSN is executed each iteration. */
4891 if (type
== DEST_ADDR
)
4892 v
->always_computable
= 1;
4894 v
->always_computable
= ! not_every_iteration
;
4896 v
->always_executed
= ! not_every_iteration
;
4898 if (type
== DEST_ADDR
)
4900 v
->mode
= GET_MODE (*location
);
4904 else /* type == DEST_REG */
4906 v
->mode
= GET_MODE (SET_DEST (set
));
4908 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4909 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4911 v
->times_used
= VARRAY_INT (n_times_used
, REGNO (dest_reg
));
4913 /* If the lifetime is zero, it means that this register is
4914 really a dead store. So mark this as a giv that can be
4915 ignored. This will not prevent the biv from being eliminated. */
4916 if (v
->lifetime
== 0)
4919 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4920 reg_iv_info
[REGNO (dest_reg
)] = v
;
4923 /* Add the giv to the class of givs computed from one biv. */
4925 bl
= reg_biv_class
[REGNO (src_reg
)];
4928 v
->next_iv
= bl
->giv
;
4930 /* Don't count DEST_ADDR. This is supposed to count the number of
4931 insns that calculate givs. */
4932 if (type
== DEST_REG
)
4934 bl
->total_benefit
+= benefit
;
4937 /* Fatal error, biv missing for this giv? */
4940 if (type
== DEST_ADDR
)
4944 /* The giv can be replaced outright by the reduced register only if all
4945 of the following conditions are true:
4946 - the insn that sets the giv is always executed on any iteration
4947 on which the giv is used at all
4948 (there are two ways to deduce this:
4949 either the insn is executed on every iteration,
4950 or all uses follow that insn in the same basic block),
4951 - the giv is not used outside the loop
4952 - no assignments to the biv occur during the giv's lifetime. */
4954 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4955 /* Previous line always fails if INSN was moved by loop opt. */
4956 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4957 && (! not_every_iteration
4958 || last_use_this_basic_block (dest_reg
, insn
)))
4960 /* Now check that there are no assignments to the biv within the
4961 giv's lifetime. This requires two separate checks. */
4963 /* Check each biv update, and fail if any are between the first
4964 and last use of the giv.
4966 If this loop contains an inner loop that was unrolled, then
4967 the insn modifying the biv may have been emitted by the loop
4968 unrolling code, and hence does not have a valid luid. Just
4969 mark the biv as not replaceable in this case. It is not very
4970 useful as a biv, because it is used in two different loops.
4971 It is very unlikely that we would be able to optimize the giv
4972 using this biv anyways. */
4975 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4977 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4978 || ((uid_luid
[INSN_UID (b
->insn
)]
4979 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4980 && (uid_luid
[INSN_UID (b
->insn
)]
4981 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4984 v
->not_replaceable
= 1;
4989 /* If there are any backwards branches that go from after the
4990 biv update to before it, then this giv is not replaceable. */
4992 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4993 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4996 v
->not_replaceable
= 1;
5002 /* May still be replaceable, we don't have enough info here to
5005 v
->not_replaceable
= 0;
5009 /* Record whether the add_val contains a const_int, for later use by
5014 v
->no_const_addval
= 1;
5015 if (tem
== const0_rtx
)
5017 else if (GET_CODE (tem
) == CONST_INT
)
5018 v
->no_const_addval
= 0;
5019 else if (GET_CODE (tem
) == PLUS
)
5023 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
5024 tem
= XEXP (tem
, 0);
5025 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
5026 tem
= XEXP (tem
, 1);
5030 if (GET_CODE (XEXP (tem
, 1)) == CONST_INT
)
5031 v
->no_const_addval
= 0;
5035 if (loop_dump_stream
)
5037 if (type
== DEST_REG
)
5038 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
5039 INSN_UID (insn
), REGNO (dest_reg
));
5041 fprintf (loop_dump_stream
, "Insn %d: dest address",
5044 fprintf (loop_dump_stream
, " src reg %d benefit %d",
5045 REGNO (src_reg
), v
->benefit
);
5046 fprintf (loop_dump_stream
, " used %d lifetime %d",
5047 v
->times_used
, v
->lifetime
);
5050 fprintf (loop_dump_stream
, " replaceable");
5052 if (v
->no_const_addval
)
5053 fprintf (loop_dump_stream
, " ncav");
5055 if (GET_CODE (mult_val
) == CONST_INT
)
5057 fprintf (loop_dump_stream
, " mult ");
5058 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (mult_val
));
5062 fprintf (loop_dump_stream
, " mult ");
5063 print_rtl (loop_dump_stream
, mult_val
);
5066 if (GET_CODE (add_val
) == CONST_INT
)
5068 fprintf (loop_dump_stream
, " add ");
5069 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (add_val
));
5073 fprintf (loop_dump_stream
, " add ");
5074 print_rtl (loop_dump_stream
, add_val
);
5078 if (loop_dump_stream
)
5079 fprintf (loop_dump_stream
, "\n");
5084 /* All this does is determine whether a giv can be made replaceable because
5085 its final value can be calculated. This code can not be part of record_giv
5086 above, because final_giv_value requires that the number of loop iterations
5087 be known, and that can not be accurately calculated until after all givs
5088 have been identified. */
5091 check_final_value (v
, loop_start
, loop_end
)
5092 struct induction
*v
;
5093 rtx loop_start
, loop_end
;
5095 struct iv_class
*bl
;
5096 rtx final_value
= 0;
5098 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
5100 /* DEST_ADDR givs will never reach here, because they are always marked
5101 replaceable above in record_giv. */
5103 /* The giv can be replaced outright by the reduced register only if all
5104 of the following conditions are true:
5105 - the insn that sets the giv is always executed on any iteration
5106 on which the giv is used at all
5107 (there are two ways to deduce this:
5108 either the insn is executed on every iteration,
5109 or all uses follow that insn in the same basic block),
5110 - its final value can be calculated (this condition is different
5111 than the one above in record_giv)
5112 - no assignments to the biv occur during the giv's lifetime. */
5115 /* This is only called now when replaceable is known to be false. */
5116 /* Clear replaceable, so that it won't confuse final_giv_value. */
5120 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
5121 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
5123 int biv_increment_seen
= 0;
5129 /* When trying to determine whether or not a biv increment occurs
5130 during the lifetime of the giv, we can ignore uses of the variable
5131 outside the loop because final_value is true. Hence we can not
5132 use regno_last_uid and regno_first_uid as above in record_giv. */
5134 /* Search the loop to determine whether any assignments to the
5135 biv occur during the giv's lifetime. Start with the insn
5136 that sets the giv, and search around the loop until we come
5137 back to that insn again.
5139 Also fail if there is a jump within the giv's lifetime that jumps
5140 to somewhere outside the lifetime but still within the loop. This
5141 catches spaghetti code where the execution order is not linear, and
5142 hence the above test fails. Here we assume that the giv lifetime
5143 does not extend from one iteration of the loop to the next, so as
5144 to make the test easier. Since the lifetime isn't known yet,
5145 this requires two loops. See also record_giv above. */
5147 last_giv_use
= v
->insn
;
5153 p
= NEXT_INSN (loop_start
);
5157 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5158 || GET_CODE (p
) == CALL_INSN
)
5160 if (biv_increment_seen
)
5162 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5165 v
->not_replaceable
= 1;
5169 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
5170 biv_increment_seen
= 1;
5171 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5176 /* Now that the lifetime of the giv is known, check for branches
5177 from within the lifetime to outside the lifetime if it is still
5187 p
= NEXT_INSN (loop_start
);
5188 if (p
== last_giv_use
)
5191 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
5192 && LABEL_NAME (JUMP_LABEL (p
))
5193 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
5194 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
5195 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
5196 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
5197 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
5198 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
5199 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
5202 v
->not_replaceable
= 1;
5204 if (loop_dump_stream
)
5205 fprintf (loop_dump_stream
,
5206 "Found branch outside giv lifetime.\n");
5213 /* If it is replaceable, then save the final value. */
5215 v
->final_value
= final_value
;
5218 if (loop_dump_stream
&& v
->replaceable
)
5219 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5220 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5223 /* Update the status of whether a giv can derive other givs.
5225 We need to do something special if there is or may be an update to the biv
5226 between the time the giv is defined and the time it is used to derive
5229 In addition, a giv that is only conditionally set is not allowed to
5230 derive another giv once a label has been passed.
5232 The cases we look at are when a label or an update to a biv is passed. */
5235 update_giv_derive (p
)
5238 struct iv_class
*bl
;
5239 struct induction
*biv
, *giv
;
5243 /* Search all IV classes, then all bivs, and finally all givs.
5245 There are three cases we are concerned with. First we have the situation
5246 of a giv that is only updated conditionally. In that case, it may not
5247 derive any givs after a label is passed.
5249 The second case is when a biv update occurs, or may occur, after the
5250 definition of a giv. For certain biv updates (see below) that are
5251 known to occur between the giv definition and use, we can adjust the
5252 giv definition. For others, or when the biv update is conditional,
5253 we must prevent the giv from deriving any other givs. There are two
5254 sub-cases within this case.
5256 If this is a label, we are concerned with any biv update that is done
5257 conditionally, since it may be done after the giv is defined followed by
5258 a branch here (actually, we need to pass both a jump and a label, but
5259 this extra tracking doesn't seem worth it).
5261 If this is a jump, we are concerned about any biv update that may be
5262 executed multiple times. We are actually only concerned about
5263 backward jumps, but it is probably not worth performing the test
5264 on the jump again here.
5266 If this is a biv update, we must adjust the giv status to show that a
5267 subsequent biv update was performed. If this adjustment cannot be done,
5268 the giv cannot derive further givs. */
5270 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5271 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5272 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5275 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5277 /* If cant_derive is already true, there is no point in
5278 checking all of these conditions again. */
5279 if (giv
->cant_derive
)
5282 /* If this giv is conditionally set and we have passed a label,
5283 it cannot derive anything. */
5284 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5285 giv
->cant_derive
= 1;
5287 /* Skip givs that have mult_val == 0, since
5288 they are really invariants. Also skip those that are
5289 replaceable, since we know their lifetime doesn't contain
5291 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5294 /* The only way we can allow this giv to derive another
5295 is if this is a biv increment and we can form the product
5296 of biv->add_val and giv->mult_val. In this case, we will
5297 be able to compute a compensation. */
5298 else if (biv
->insn
== p
)
5302 if (biv
->mult_val
== const1_rtx
)
5303 tem
= simplify_giv_expr (gen_rtx_MULT (giv
->mode
,
5308 if (tem
&& giv
->derive_adjustment
)
5309 tem
= simplify_giv_expr (gen_rtx_PLUS (giv
->mode
, tem
,
5310 giv
->derive_adjustment
),
5313 giv
->derive_adjustment
= tem
;
5315 giv
->cant_derive
= 1;
5317 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5318 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5319 giv
->cant_derive
= 1;
5324 /* Check whether an insn is an increment legitimate for a basic induction var.
5325 X is the source of insn P, or a part of it.
5326 MODE is the mode in which X should be interpreted.
5328 DEST_REG is the putative biv, also the destination of the insn.
5329 We accept patterns of these forms:
5330 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5331 REG = INVARIANT + REG
5333 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5334 and store the additive term into *INC_VAL.
5336 If X is an assignment of an invariant into DEST_REG, we set
5337 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5339 We also want to detect a BIV when it corresponds to a variable
5340 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5341 of the variable may be a PLUS that adds a SUBREG of that variable to
5342 an invariant and then sign- or zero-extends the result of the PLUS
5345 Most GIVs in such cases will be in the promoted mode, since that is the
5346 probably the natural computation mode (and almost certainly the mode
5347 used for addresses) on the machine. So we view the pseudo-reg containing
5348 the variable as the BIV, as if it were simply incremented.
5350 Note that treating the entire pseudo as a BIV will result in making
5351 simple increments to any GIVs based on it. However, if the variable
5352 overflows in its declared mode but not its promoted mode, the result will
5353 be incorrect. This is acceptable if the variable is signed, since
5354 overflows in such cases are undefined, but not if it is unsigned, since
5355 those overflows are defined. So we only check for SIGN_EXTEND and
5358 If we cannot find a biv, we return 0. */
5361 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5363 enum machine_mode mode
;
5369 register enum rtx_code code
;
5373 code
= GET_CODE (x
);
5377 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
5378 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5379 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5380 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5382 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
5383 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5384 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5385 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5390 if (invariant_p (arg
) != 1)
5393 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5394 *mult_val
= const1_rtx
;
5398 /* If this is a SUBREG for a promoted variable, check the inner
5400 if (SUBREG_PROMOTED_VAR_P (x
))
5401 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5402 dest_reg
, p
, inc_val
, mult_val
);
5406 /* If this register is assigned in a previous insn, look at its
5407 source, but don't go outside the loop or past a label. */
5413 insn
= PREV_INSN (insn
);
5414 } while (insn
&& GET_CODE (insn
) == NOTE
5415 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5419 set
= single_set (insn
);
5423 if ((SET_DEST (set
) == x
5424 || (GET_CODE (SET_DEST (set
)) == SUBREG
5425 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5427 && SUBREG_REG (SET_DEST (set
)) == x
))
5428 && basic_induction_var (SET_SRC (set
),
5429 (GET_MODE (SET_SRC (set
)) == VOIDmode
5431 : GET_MODE (SET_SRC (set
))),
5436 /* ... fall through ... */
5438 /* Can accept constant setting of biv only when inside inner most loop.
5439 Otherwise, a biv of an inner loop may be incorrectly recognized
5440 as a biv of the outer loop,
5441 causing code to be moved INTO the inner loop. */
5443 if (invariant_p (x
) != 1)
5448 /* convert_modes aborts if we try to convert to or from CCmode, so just
5449 exclude that case. It is very unlikely that a condition code value
5450 would be a useful iterator anyways. */
5451 if (loops_enclosed
== 1
5452 && GET_MODE_CLASS (mode
) != MODE_CC
5453 && GET_MODE_CLASS (GET_MODE (dest_reg
)) != MODE_CC
)
5455 /* Possible bug here? Perhaps we don't know the mode of X. */
5456 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5457 *mult_val
= const0_rtx
;
5464 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5465 dest_reg
, p
, inc_val
, mult_val
);
5468 /* Similar, since this can be a sign extension. */
5469 for (insn
= PREV_INSN (p
);
5470 (insn
&& GET_CODE (insn
) == NOTE
5471 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5472 insn
= PREV_INSN (insn
))
5476 set
= single_set (insn
);
5478 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5479 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5480 && INTVAL (XEXP (x
, 1)) >= 0
5481 && GET_CODE (SET_SRC (set
)) == ASHIFT
5482 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5483 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5484 GET_MODE (XEXP (x
, 0)),
5485 dest_reg
, insn
, inc_val
, mult_val
);
5493 /* A general induction variable (giv) is any quantity that is a linear
5494 function of a basic induction variable,
5495 i.e. giv = biv * mult_val + add_val.
5496 The coefficients can be any loop invariant quantity.
5497 A giv need not be computed directly from the biv;
5498 it can be computed by way of other givs. */
5500 /* Determine whether X computes a giv.
5501 If it does, return a nonzero value
5502 which is the benefit from eliminating the computation of X;
5503 set *SRC_REG to the register of the biv that it is computed from;
5504 set *ADD_VAL and *MULT_VAL to the coefficients,
5505 such that the value of X is biv * mult + add; */
5508 general_induction_var (x
, src_reg
, add_val
, mult_val
, is_addr
, pbenefit
)
5519 /* If this is an invariant, forget it, it isn't a giv. */
5520 if (invariant_p (x
) == 1)
5523 /* See if the expression could be a giv and get its form.
5524 Mark our place on the obstack in case we don't find a giv. */
5525 storage
= (char *) oballoc (0);
5527 x
= simplify_giv_expr (x
, pbenefit
);
5534 switch (GET_CODE (x
))
5538 /* Since this is now an invariant and wasn't before, it must be a giv
5539 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5541 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5542 *mult_val
= const0_rtx
;
5547 /* This is equivalent to a BIV. */
5549 *mult_val
= const1_rtx
;
5550 *add_val
= const0_rtx
;
5554 /* Either (plus (biv) (invar)) or
5555 (plus (mult (biv) (invar_1)) (invar_2)). */
5556 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5558 *src_reg
= XEXP (XEXP (x
, 0), 0);
5559 *mult_val
= XEXP (XEXP (x
, 0), 1);
5563 *src_reg
= XEXP (x
, 0);
5564 *mult_val
= const1_rtx
;
5566 *add_val
= XEXP (x
, 1);
5570 /* ADD_VAL is zero. */
5571 *src_reg
= XEXP (x
, 0);
5572 *mult_val
= XEXP (x
, 1);
5573 *add_val
= const0_rtx
;
5580 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5581 unless they are CONST_INT). */
5582 if (GET_CODE (*add_val
) == USE
)
5583 *add_val
= XEXP (*add_val
, 0);
5584 if (GET_CODE (*mult_val
) == USE
)
5585 *mult_val
= XEXP (*mult_val
, 0);
5590 *pbenefit
+= ADDRESS_COST (orig_x
) - reg_address_cost
;
5592 *pbenefit
+= rtx_cost (orig_x
, MEM
) - reg_address_cost
;
5596 *pbenefit
+= rtx_cost (orig_x
, SET
);
5598 /* Always return true if this is a giv so it will be detected as such,
5599 even if the benefit is zero or negative. This allows elimination
5600 of bivs that might otherwise not be eliminated. */
5604 /* Given an expression, X, try to form it as a linear function of a biv.
5605 We will canonicalize it to be of the form
5606 (plus (mult (BIV) (invar_1))
5608 with possible degeneracies.
5610 The invariant expressions must each be of a form that can be used as a
5611 machine operand. We surround then with a USE rtx (a hack, but localized
5612 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5613 routine; it is the caller's responsibility to strip them.
5615 If no such canonicalization is possible (i.e., two biv's are used or an
5616 expression that is neither invariant nor a biv or giv), this routine
5619 For a non-zero return, the result will have a code of CONST_INT, USE,
5620 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5622 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5624 static rtx sge_plus
PROTO ((enum machine_mode
, rtx
, rtx
));
5625 static rtx sge_plus_constant
PROTO ((rtx
, rtx
));
5628 simplify_giv_expr (x
, benefit
)
5632 enum machine_mode mode
= GET_MODE (x
);
5636 /* If this is not an integer mode, or if we cannot do arithmetic in this
5637 mode, this can't be a giv. */
5638 if (mode
!= VOIDmode
5639 && (GET_MODE_CLASS (mode
) != MODE_INT
5640 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5643 switch (GET_CODE (x
))
5646 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5647 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5648 if (arg0
== 0 || arg1
== 0)
5651 /* Put constant last, CONST_INT last if both constant. */
5652 if ((GET_CODE (arg0
) == USE
5653 || GET_CODE (arg0
) == CONST_INT
)
5654 && ! ((GET_CODE (arg0
) == USE
5655 && GET_CODE (arg1
) == USE
)
5656 || GET_CODE (arg1
) == CONST_INT
))
5657 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5659 /* Handle addition of zero, then addition of an invariant. */
5660 if (arg1
== const0_rtx
)
5662 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5663 switch (GET_CODE (arg0
))
5667 /* Adding two invariants must result in an invariant, so enclose
5668 addition operation inside a USE and return it. */
5669 if (GET_CODE (arg0
) == USE
)
5670 arg0
= XEXP (arg0
, 0);
5671 if (GET_CODE (arg1
) == USE
)
5672 arg1
= XEXP (arg1
, 0);
5674 if (GET_CODE (arg0
) == CONST_INT
)
5675 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5676 if (GET_CODE (arg1
) == CONST_INT
)
5677 tem
= sge_plus_constant (arg0
, arg1
);
5679 tem
= sge_plus (mode
, arg0
, arg1
);
5681 if (GET_CODE (tem
) != CONST_INT
)
5682 tem
= gen_rtx_USE (mode
, tem
);
5687 /* biv + invar or mult + invar. Return sum. */
5688 return gen_rtx_PLUS (mode
, arg0
, arg1
);
5691 /* (a + invar_1) + invar_2. Associate. */
5692 return simplify_giv_expr (
5693 gen_rtx_PLUS (mode
, XEXP (arg0
, 0),
5694 gen_rtx_PLUS (mode
, XEXP (arg0
, 1), arg1
)),
5701 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5702 MULT to reduce cases. */
5703 if (GET_CODE (arg0
) == REG
)
5704 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
5705 if (GET_CODE (arg1
) == REG
)
5706 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
5708 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5709 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5710 Recurse to associate the second PLUS. */
5711 if (GET_CODE (arg1
) == MULT
)
5712 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5714 if (GET_CODE (arg1
) == PLUS
)
5715 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5716 gen_rtx_PLUS (mode
, arg0
,
5721 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5722 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5725 if (!rtx_equal_p (arg0
, arg1
))
5728 return simplify_giv_expr (gen_rtx_MULT (mode
,
5736 /* Handle "a - b" as "a + b * (-1)". */
5737 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5739 gen_rtx_MULT (mode
, XEXP (x
, 1),
5744 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5745 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5746 if (arg0
== 0 || arg1
== 0)
5749 /* Put constant last, CONST_INT last if both constant. */
5750 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5751 && GET_CODE (arg1
) != CONST_INT
)
5752 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5754 /* If second argument is not now constant, not giv. */
5755 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5758 /* Handle multiply by 0 or 1. */
5759 if (arg1
== const0_rtx
)
5762 else if (arg1
== const1_rtx
)
5765 switch (GET_CODE (arg0
))
5768 /* biv * invar. Done. */
5769 return gen_rtx_MULT (mode
, arg0
, arg1
);
5772 /* Product of two constants. */
5773 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5776 /* invar * invar. It is a giv, but very few of these will
5777 actually pay off, so limit to simple registers. */
5778 if (GET_CODE (arg1
) != CONST_INT
)
5781 arg0
= XEXP (arg0
, 0);
5782 if (GET_CODE (arg0
) == REG
)
5783 tem
= gen_rtx_MULT (mode
, arg0
, arg1
);
5784 else if (GET_CODE (arg0
) == MULT
5785 && GET_CODE (XEXP (arg0
, 0)) == REG
5786 && GET_CODE (XEXP (arg0
, 1)) == CONST_INT
)
5788 tem
= gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5789 GEN_INT (INTVAL (XEXP (arg0
, 1))
5794 return gen_rtx_USE (mode
, tem
);
5797 /* (a * invar_1) * invar_2. Associate. */
5798 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5805 /* (a + invar_1) * invar_2. Distribute. */
5806 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5820 /* Shift by constant is multiply by power of two. */
5821 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5824 return simplify_giv_expr (gen_rtx_MULT (mode
,
5826 GEN_INT ((HOST_WIDE_INT
) 1
5827 << INTVAL (XEXP (x
, 1)))),
5831 /* "-a" is "a * (-1)" */
5832 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
5836 /* "~a" is "-a - 1". Silly, but easy. */
5837 return simplify_giv_expr (gen_rtx_MINUS (mode
,
5838 gen_rtx_NEG (mode
, XEXP (x
, 0)),
5843 /* Already in proper form for invariant. */
5847 /* If this is a new register, we can't deal with it. */
5848 if (REGNO (x
) >= max_reg_before_loop
)
5851 /* Check for biv or giv. */
5852 switch (reg_iv_type
[REGNO (x
)])
5856 case GENERAL_INDUCT
:
5858 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5860 /* Form expression from giv and add benefit. Ensure this giv
5861 can derive another and subtract any needed adjustment if so. */
5862 *benefit
+= v
->benefit
;
5866 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
, v
->src_reg
,
5869 if (v
->derive_adjustment
)
5870 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
5871 return simplify_giv_expr (tem
, benefit
);
5875 /* If it isn't an induction variable, and it is invariant, we
5876 may be able to simplify things further by looking through
5877 the bits we just moved outside the loop. */
5878 if (invariant_p (x
) == 1)
5882 for (m
= the_movables
; m
; m
= m
->next
)
5883 if (rtx_equal_p (x
, m
->set_dest
))
5885 /* Ok, we found a match. Substitute and simplify. */
5887 /* If we match another movable, we must use that, as
5888 this one is going away. */
5890 return simplify_giv_expr (m
->match
->set_dest
, benefit
);
5892 /* If consec is non-zero, this is a member of a group of
5893 instructions that were moved together. We handle this
5894 case only to the point of seeking to the last insn and
5895 looking for a REG_EQUAL. Fail if we don't find one. */
5900 do { tem
= NEXT_INSN (tem
); } while (--i
> 0);
5902 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
5904 tem
= XEXP (tem
, 0);
5908 tem
= single_set (m
->insn
);
5910 tem
= SET_SRC (tem
);
5915 /* What we are most interested in is pointer
5916 arithmetic on invariants -- only take
5917 patterns we may be able to do something with. */
5918 if (GET_CODE (tem
) == PLUS
5919 || GET_CODE (tem
) == MULT
5920 || GET_CODE (tem
) == ASHIFT
5921 || GET_CODE (tem
) == CONST_INT
5922 || GET_CODE (tem
) == SYMBOL_REF
)
5924 tem
= simplify_giv_expr (tem
, benefit
);
5928 else if (GET_CODE (tem
) == CONST
5929 && GET_CODE (XEXP (tem
, 0)) == PLUS
5930 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
5931 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
5933 tem
= simplify_giv_expr (XEXP (tem
, 0), benefit
);
5944 /* Fall through to general case. */
5946 /* If invariant, return as USE (unless CONST_INT).
5947 Otherwise, not giv. */
5948 if (GET_CODE (x
) == USE
)
5951 if (invariant_p (x
) == 1)
5953 if (GET_CODE (x
) == CONST_INT
)
5955 if (GET_CODE (x
) == CONST
5956 && GET_CODE (XEXP (x
, 0)) == PLUS
5957 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
5958 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
5960 return gen_rtx_USE (mode
, x
);
5967 /* This routine folds invariants such that there is only ever one
5968 CONST_INT in the summation. It is only used by simplify_giv_expr. */
5971 sge_plus_constant (x
, c
)
5974 if (GET_CODE (x
) == CONST_INT
)
5975 return GEN_INT (INTVAL (x
) + INTVAL (c
));
5976 else if (GET_CODE (x
) != PLUS
)
5977 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
5978 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5980 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
5981 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
5983 else if (GET_CODE (XEXP (x
, 0)) == PLUS
5984 || GET_CODE (XEXP (x
, 1)) != PLUS
)
5986 return gen_rtx_PLUS (GET_MODE (x
),
5987 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
5991 return gen_rtx_PLUS (GET_MODE (x
),
5992 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
5997 sge_plus (mode
, x
, y
)
5998 enum machine_mode mode
;
6001 while (GET_CODE (y
) == PLUS
)
6003 rtx a
= XEXP (y
, 0);
6004 if (GET_CODE (a
) == CONST_INT
)
6005 x
= sge_plus_constant (x
, a
);
6007 x
= gen_rtx_PLUS (mode
, x
, a
);
6010 if (GET_CODE (y
) == CONST_INT
)
6011 x
= sge_plus_constant (x
, y
);
6013 x
= gen_rtx_PLUS (mode
, x
, y
);
6017 /* Help detect a giv that is calculated by several consecutive insns;
6021 The caller has already identified the first insn P as having a giv as dest;
6022 we check that all other insns that set the same register follow
6023 immediately after P, that they alter nothing else,
6024 and that the result of the last is still a giv.
6026 The value is 0 if the reg set in P is not really a giv.
6027 Otherwise, the value is the amount gained by eliminating
6028 all the consecutive insns that compute the value.
6030 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
6031 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
6033 The coefficients of the ultimate giv value are stored in
6034 *MULT_VAL and *ADD_VAL. */
6037 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
6052 /* Indicate that this is a giv so that we can update the value produced in
6053 each insn of the multi-insn sequence.
6055 This induction structure will be used only by the call to
6056 general_induction_var below, so we can allocate it on our stack.
6057 If this is a giv, our caller will replace the induct var entry with
6058 a new induction structure. */
6060 = (struct induction
*) alloca (sizeof (struct induction
));
6061 v
->src_reg
= src_reg
;
6062 v
->mult_val
= *mult_val
;
6063 v
->add_val
= *add_val
;
6064 v
->benefit
= first_benefit
;
6066 v
->derive_adjustment
= 0;
6068 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
6069 reg_iv_info
[REGNO (dest_reg
)] = v
;
6071 count
= VARRAY_INT (n_times_set
, REGNO (dest_reg
)) - 1;
6076 code
= GET_CODE (p
);
6078 /* If libcall, skip to end of call sequence. */
6079 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
6083 && (set
= single_set (p
))
6084 && GET_CODE (SET_DEST (set
)) == REG
6085 && SET_DEST (set
) == dest_reg
6086 && (general_induction_var (SET_SRC (set
), &src_reg
,
6087 add_val
, mult_val
, 0, &benefit
)
6088 /* Giv created by equivalent expression. */
6089 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
6090 && general_induction_var (XEXP (temp
, 0), &src_reg
,
6091 add_val
, mult_val
, 0, &benefit
)))
6092 && src_reg
== v
->src_reg
)
6094 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
6095 benefit
+= libcall_benefit (p
);
6098 v
->mult_val
= *mult_val
;
6099 v
->add_val
= *add_val
;
6100 v
->benefit
= benefit
;
6102 else if (code
!= NOTE
)
6104 /* Allow insns that set something other than this giv to a
6105 constant. Such insns are needed on machines which cannot
6106 include long constants and should not disqualify a giv. */
6108 && (set
= single_set (p
))
6109 && SET_DEST (set
) != dest_reg
6110 && CONSTANT_P (SET_SRC (set
)))
6113 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
6121 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6122 represented by G1. If no such expression can be found, or it is clear that
6123 it cannot possibly be a valid address, 0 is returned.
6125 To perform the computation, we note that
6128 where `v' is the biv.
6130 So G2 = (y/b) * G1 + (b - a*y/x).
6132 Note that MULT = y/x.
6134 Update: A and B are now allowed to be additive expressions such that
6135 B contains all variables in A. That is, computing B-A will not require
6136 subtracting variables. */
6139 express_from_1 (a
, b
, mult
)
6142 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6144 if (mult
== const0_rtx
)
6147 /* If MULT is not 1, we cannot handle A with non-constants, since we
6148 would then be required to subtract multiples of the registers in A.
6149 This is theoretically possible, and may even apply to some Fortran
6150 constructs, but it is a lot of work and we do not attempt it here. */
6152 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
6155 /* In general these structures are sorted top to bottom (down the PLUS
6156 chain), but not left to right across the PLUS. If B is a higher
6157 order giv than A, we can strip one level and recurse. If A is higher
6158 order, we'll eventually bail out, but won't know that until the end.
6159 If they are the same, we'll strip one level around this loop. */
6161 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
6163 rtx ra
, rb
, oa
, ob
, tmp
;
6165 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6166 if (GET_CODE (ra
) == PLUS
)
6167 tmp
= ra
, ra
= oa
, oa
= tmp
;
6169 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
6170 if (GET_CODE (rb
) == PLUS
)
6171 tmp
= rb
, rb
= ob
, ob
= tmp
;
6173 if (rtx_equal_p (ra
, rb
))
6174 /* We matched: remove one reg completely. */
6176 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
6177 /* An alternate match. */
6179 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
6180 /* An alternate match. */
6184 /* Indicates an extra register in B. Strip one level from B and
6185 recurse, hoping B was the higher order expression. */
6186 ob
= express_from_1 (a
, ob
, mult
);
6189 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
6193 /* Here we are at the last level of A, go through the cases hoping to
6194 get rid of everything but a constant. */
6196 if (GET_CODE (a
) == PLUS
)
6200 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6201 if (rtx_equal_p (oa
, b
))
6203 else if (!rtx_equal_p (ra
, b
))
6206 if (GET_CODE (oa
) != CONST_INT
)
6209 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
6211 else if (GET_CODE (a
) == CONST_INT
)
6213 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
6215 else if (GET_CODE (b
) == PLUS
)
6217 if (rtx_equal_p (a
, XEXP (b
, 0)))
6219 else if (rtx_equal_p (a
, XEXP (b
, 1)))
6224 else if (rtx_equal_p (a
, b
))
6231 express_from (g1
, g2
)
6232 struct induction
*g1
, *g2
;
6236 /* The value that G1 will be multiplied by must be a constant integer. Also,
6237 the only chance we have of getting a valid address is if b*c/a (see above
6238 for notation) is also an integer. */
6239 if (GET_CODE (g1
->mult_val
) == CONST_INT
6240 && GET_CODE (g2
->mult_val
) == CONST_INT
)
6242 if (g1
->mult_val
== const0_rtx
6243 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
6245 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
6247 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
6251 /* ??? Find out if the one is a multiple of the other? */
6255 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
6256 if (add
== NULL_RTX
)
6259 /* Form simplified final result. */
6260 if (mult
== const0_rtx
)
6262 else if (mult
== const1_rtx
)
6263 mult
= g1
->dest_reg
;
6265 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
6267 if (add
== const0_rtx
)
6270 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
6273 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
6274 (either directly or via an address expression) a register used to represent
6275 G1. Set g2->new_reg to a represtation of G1 (normally just
6279 combine_givs_p (g1
, g2
)
6280 struct induction
*g1
, *g2
;
6282 rtx tem
= express_from (g1
, g2
);
6284 /* If these givs are identical, they can be combined. We use the results
6285 of express_from because the addends are not in a canonical form, so
6286 rtx_equal_p is a weaker test. */
6287 if (tem
== const0_rtx
)
6289 return g1
->dest_reg
;
6292 /* If G2 can be expressed as a function of G1 and that function is valid
6293 as an address and no more expensive than using a register for G2,
6294 the expression of G2 in terms of G1 can be used. */
6296 && g2
->giv_type
== DEST_ADDR
6297 && memory_address_p (g2
->mem_mode
, tem
)
6298 /* ??? Looses, especially with -fforce-addr, where *g2->location
6299 will always be a register, and so anything more complicated
6303 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
6305 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
6316 struct combine_givs_stats
6323 cmp_combine_givs_stats (x
, y
)
6324 struct combine_givs_stats
*x
, *y
;
6327 d
= y
->total_benefit
- x
->total_benefit
;
6328 /* Stabilize the sort. */
6330 d
= x
->giv_number
- y
->giv_number
;
6334 /* If one of these givs is a DEST_REG that was only used once, by the
6335 other giv, this is actually a single use. Return 0 if this is not
6336 the case, -1 if g1 is the DEST_REG involved, and 1 if it was g2. */
6339 combine_givs_used_once (g1
, g2
)
6340 struct induction
*g1
, *g2
;
6342 if (g1
->giv_type
== DEST_REG
6343 && VARRAY_INT (n_times_used
, REGNO (g1
->dest_reg
)) == 1
6344 && reg_mentioned_p (g1
->dest_reg
, PATTERN (g2
->insn
)))
6347 if (g2
->giv_type
== DEST_REG
6348 && VARRAY_INT (n_times_used
, REGNO (g2
->dest_reg
)) == 1
6349 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
6356 combine_givs_benefit_from (g1
, g2
)
6357 struct induction
*g1
, *g2
;
6359 int tmp
= combine_givs_used_once (g1
, g2
);
6363 return g2
->benefit
- g1
->benefit
;
6368 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6369 any other. If so, point SAME to the giv combined with and set NEW_REG to
6370 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6371 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6375 struct iv_class
*bl
;
6377 struct induction
*g1
, *g2
, **giv_array
;
6378 int i
, j
, k
, giv_count
;
6379 struct combine_givs_stats
*stats
;
6382 /* Count givs, because bl->giv_count is incorrect here. */
6384 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6389 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
6391 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6393 giv_array
[i
++] = g1
;
6395 stats
= (struct combine_givs_stats
*) alloca (giv_count
* sizeof (*stats
));
6396 bzero ((char *) stats
, giv_count
* sizeof (*stats
));
6398 can_combine
= (rtx
*) alloca (giv_count
* giv_count
* sizeof(rtx
));
6399 bzero ((char *) can_combine
, giv_count
* giv_count
* sizeof(rtx
));
6401 for (i
= 0; i
< giv_count
; i
++)
6407 this_benefit
= g1
->benefit
;
6408 /* Add an additional weight for zero addends. */
6409 if (g1
->no_const_addval
)
6411 for (j
= 0; j
< giv_count
; j
++)
6417 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
6419 can_combine
[i
*giv_count
+ j
] = this_combine
;
6420 this_benefit
+= combine_givs_benefit_from (g1
, g2
);
6421 /* Add an additional weight for being reused more times. */
6425 stats
[i
].giv_number
= i
;
6426 stats
[i
].total_benefit
= this_benefit
;
6429 /* Iterate, combining until we can't. */
6431 qsort (stats
, giv_count
, sizeof(*stats
), cmp_combine_givs_stats
);
6433 if (loop_dump_stream
)
6435 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
6436 for (k
= 0; k
< giv_count
; k
++)
6438 g1
= giv_array
[stats
[k
].giv_number
];
6439 if (!g1
->combined_with
&& !g1
->same
)
6440 fprintf (loop_dump_stream
, " {%d, %d}",
6441 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
6442 stats
[k
].total_benefit
);
6444 putc ('\n', loop_dump_stream
);
6447 for (k
= 0; k
< giv_count
; k
++)
6449 int g1_add_benefit
= 0;
6451 i
= stats
[k
].giv_number
;
6454 /* If it has already been combined, skip. */
6455 if (g1
->combined_with
|| g1
->same
)
6458 for (j
= 0; j
< giv_count
; j
++)
6461 if (g1
!= g2
&& can_combine
[i
*giv_count
+ j
]
6462 /* If it has already been combined, skip. */
6463 && ! g2
->same
&& ! g2
->combined_with
)
6467 g2
->new_reg
= can_combine
[i
*giv_count
+ j
];
6469 g1
->combined_with
= 1;
6470 if (!combine_givs_used_once (g1
, g2
))
6471 g1
->times_used
+= 1;
6472 g1
->lifetime
+= g2
->lifetime
;
6474 g1_add_benefit
+= combine_givs_benefit_from (g1
, g2
);
6476 /* ??? The new final_[bg]iv_value code does a much better job
6477 of finding replaceable giv's, and hence this code may no
6478 longer be necessary. */
6479 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
6480 g1_add_benefit
-= copy_cost
;
6482 /* To help optimize the next set of combinations, remove
6483 this giv from the benefits of other potential mates. */
6484 for (l
= 0; l
< giv_count
; ++l
)
6486 int m
= stats
[l
].giv_number
;
6487 if (can_combine
[m
*giv_count
+ j
])
6489 /* Remove additional weight for being reused. */
6490 stats
[l
].total_benefit
-= 3 +
6491 combine_givs_benefit_from (giv_array
[m
], g2
);
6495 if (loop_dump_stream
)
6496 fprintf (loop_dump_stream
,
6497 "giv at %d combined with giv at %d\n",
6498 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
6502 /* To help optimize the next set of combinations, remove
6503 this giv from the benefits of other potential mates. */
6504 if (g1
->combined_with
)
6506 for (j
= 0; j
< giv_count
; ++j
)
6508 int m
= stats
[j
].giv_number
;
6509 if (can_combine
[m
*giv_count
+ j
])
6511 /* Remove additional weight for being reused. */
6512 stats
[j
].total_benefit
-= 3 +
6513 combine_givs_benefit_from (giv_array
[m
], g1
);
6517 g1
->benefit
+= g1_add_benefit
;
6519 /* We've finished with this giv, and everything it touched.
6520 Restart the combination so that proper weights for the
6521 rest of the givs are properly taken into account. */
6522 /* ??? Ideally we would compact the arrays at this point, so
6523 as to not cover old ground. But sanely compacting
6524 can_combine is tricky. */
6530 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
6533 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
6534 rtx b
; /* initial value of basic induction variable */
6535 rtx m
; /* multiplicative constant */
6536 rtx a
; /* additive constant */
6537 rtx reg
; /* destination register */
6543 /* Prevent unexpected sharing of these rtx. */
6547 /* Increase the lifetime of any invariants moved further in code. */
6548 update_reg_last_use (a
, insert_before
);
6549 update_reg_last_use (b
, insert_before
);
6550 update_reg_last_use (m
, insert_before
);
6553 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
6555 emit_move_insn (reg
, result
);
6556 seq
= gen_sequence ();
6559 emit_insn_before (seq
, insert_before
);
6561 /* It is entirely possible that the expansion created lots of new
6562 registers. Iterate over the sequence we just created and
6565 if (GET_CODE (seq
) == SEQUENCE
)
6568 for (i
= 0; i
< XVECLEN (seq
, 0); ++i
)
6570 rtx set
= single_set (XVECEXP (seq
, 0, i
));
6571 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
6572 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
6575 else if (GET_CODE (seq
) == SET
6576 && GET_CODE (SET_DEST (seq
)) == REG
)
6577 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
6580 /* Test whether A * B can be computed without
6581 an actual multiply insn. Value is 1 if so. */
6584 product_cheap_p (a
, b
)
6590 struct obstack
*old_rtl_obstack
= rtl_obstack
;
6591 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
6594 /* If only one is constant, make it B. */
6595 if (GET_CODE (a
) == CONST_INT
)
6596 tmp
= a
, a
= b
, b
= tmp
;
6598 /* If first constant, both constant, so don't need multiply. */
6599 if (GET_CODE (a
) == CONST_INT
)
6602 /* If second not constant, neither is constant, so would need multiply. */
6603 if (GET_CODE (b
) != CONST_INT
)
6606 /* One operand is constant, so might not need multiply insn. Generate the
6607 code for the multiply and see if a call or multiply, or long sequence
6608 of insns is generated. */
6610 rtl_obstack
= &temp_obstack
;
6612 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
6613 tmp
= gen_sequence ();
6616 if (GET_CODE (tmp
) == SEQUENCE
)
6618 if (XVEC (tmp
, 0) == 0)
6620 else if (XVECLEN (tmp
, 0) > 3)
6623 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
6625 rtx insn
= XVECEXP (tmp
, 0, i
);
6627 if (GET_CODE (insn
) != INSN
6628 || (GET_CODE (PATTERN (insn
)) == SET
6629 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
6630 || (GET_CODE (PATTERN (insn
)) == PARALLEL
6631 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
6632 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
6639 else if (GET_CODE (tmp
) == SET
6640 && GET_CODE (SET_SRC (tmp
)) == MULT
)
6642 else if (GET_CODE (tmp
) == PARALLEL
6643 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
6644 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
6647 /* Free any storage we obtained in generating this multiply and restore rtl
6648 allocation to its normal obstack. */
6649 obstack_free (&temp_obstack
, storage
);
6650 rtl_obstack
= old_rtl_obstack
;
6655 /* Check to see if loop can be terminated by a "decrement and branch until
6656 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6657 Also try reversing an increment loop to a decrement loop
6658 to see if the optimization can be performed.
6659 Value is nonzero if optimization was performed. */
6661 /* This is useful even if the architecture doesn't have such an insn,
6662 because it might change a loops which increments from 0 to n to a loop
6663 which decrements from n to 0. A loop that decrements to zero is usually
6664 faster than one that increments from zero. */
6666 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6667 such as approx_final_value, biv_total_increment, loop_iterations, and
6668 final_[bg]iv_value. */
6671 check_dbra_loop (loop_end
, insn_count
, loop_start
)
6676 struct iv_class
*bl
;
6683 rtx before_comparison
;
6687 int compare_and_branch
;
6689 /* If last insn is a conditional branch, and the insn before tests a
6690 register value, try to optimize it. Otherwise, we can't do anything. */
6692 jump
= PREV_INSN (loop_end
);
6693 comparison
= get_condition_for_loop (jump
);
6694 if (comparison
== 0)
6697 /* Try to compute whether the compare/branch at the loop end is one or
6698 two instructions. */
6699 get_condition (jump
, &first_compare
);
6700 if (first_compare
== jump
)
6701 compare_and_branch
= 1;
6702 else if (first_compare
== prev_nonnote_insn (jump
))
6703 compare_and_branch
= 2;
6707 /* Check all of the bivs to see if the compare uses one of them.
6708 Skip biv's set more than once because we can't guarantee that
6709 it will be zero on the last iteration. Also skip if the biv is
6710 used between its update and the test insn. */
6712 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6714 if (bl
->biv_count
== 1
6715 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6716 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6724 /* Look for the case where the basic induction variable is always
6725 nonnegative, and equals zero on the last iteration.
6726 In this case, add a reg_note REG_NONNEG, which allows the
6727 m68k DBRA instruction to be used. */
6729 if (((GET_CODE (comparison
) == GT
6730 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6731 && INTVAL (XEXP (comparison
, 1)) == -1)
6732 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6733 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6734 && INTVAL (bl
->biv
->add_val
) < 0)
6736 /* Initial value must be greater than 0,
6737 init_val % -dec_value == 0 to ensure that it equals zero on
6738 the last iteration */
6740 if (GET_CODE (bl
->initial_value
) == CONST_INT
6741 && INTVAL (bl
->initial_value
) > 0
6742 && (INTVAL (bl
->initial_value
)
6743 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6745 /* register always nonnegative, add REG_NOTE to branch */
6746 REG_NOTES (PREV_INSN (loop_end
))
6747 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6748 REG_NOTES (PREV_INSN (loop_end
)));
6754 /* If the decrement is 1 and the value was tested as >= 0 before
6755 the loop, then we can safely optimize. */
6756 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6758 if (GET_CODE (p
) == CODE_LABEL
)
6760 if (GET_CODE (p
) != JUMP_INSN
)
6763 before_comparison
= get_condition_for_loop (p
);
6764 if (before_comparison
6765 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6766 && GET_CODE (before_comparison
) == LT
6767 && XEXP (before_comparison
, 1) == const0_rtx
6768 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6769 && INTVAL (bl
->biv
->add_val
) == -1)
6771 REG_NOTES (PREV_INSN (loop_end
))
6772 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6773 REG_NOTES (PREV_INSN (loop_end
)));
6780 else if (INTVAL (bl
->biv
->add_val
) > 0)
6782 /* Try to change inc to dec, so can apply above optimization. */
6784 all registers modified are induction variables or invariant,
6785 all memory references have non-overlapping addresses
6786 (obviously true if only one write)
6787 allow 2 insns for the compare/jump at the end of the loop. */
6788 /* Also, we must avoid any instructions which use both the reversed
6789 biv and another biv. Such instructions will fail if the loop is
6790 reversed. We meet this condition by requiring that either
6791 no_use_except_counting is true, or else that there is only
6793 int num_nonfixed_reads
= 0;
6794 /* 1 if the iteration var is used only to count iterations. */
6795 int no_use_except_counting
= 0;
6796 /* 1 if the loop has no memory store, or it has a single memory store
6797 which is reversible. */
6798 int reversible_mem_store
= 1;
6800 if (bl
->giv_count
== 0
6801 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6803 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6805 /* If there are no givs for this biv, and the only exit is the
6806 fall through at the end of the loop, then
6807 see if perhaps there are no uses except to count. */
6808 no_use_except_counting
= 1;
6809 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6810 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6812 rtx set
= single_set (p
);
6814 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6815 && REGNO (SET_DEST (set
)) == bl
->regno
)
6816 /* An insn that sets the biv is okay. */
6818 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6819 || p
== prev_nonnote_insn (loop_end
))
6820 /* Don't bother about the end test. */
6822 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6824 no_use_except_counting
= 0;
6830 if (no_use_except_counting
)
6831 ; /* no need to worry about MEMs. */
6832 else if (num_mem_sets
<= 1)
6834 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6835 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6836 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6838 /* If the loop has a single store, and the destination address is
6839 invariant, then we can't reverse the loop, because this address
6840 might then have the wrong value at loop exit.
6841 This would work if the source was invariant also, however, in that
6842 case, the insn should have been moved out of the loop. */
6844 if (num_mem_sets
== 1)
6845 reversible_mem_store
6846 = (! unknown_address_altered
6847 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6852 /* This code only acts for innermost loops. Also it simplifies
6853 the memory address check by only reversing loops with
6854 zero or one memory access.
6855 Two memory accesses could involve parts of the same array,
6856 and that can't be reversed.
6857 If the biv is used only for counting, than we don't need to worry
6858 about all these things. */
6860 if ((num_nonfixed_reads
<= 1
6862 && !loop_has_volatile
6863 && reversible_mem_store
6864 && (bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6865 + num_movables
+ compare_and_branch
== insn_count
)
6866 && (bl
== loop_iv_list
&& bl
->next
== 0))
6867 || no_use_except_counting
)
6871 /* Loop can be reversed. */
6872 if (loop_dump_stream
)
6873 fprintf (loop_dump_stream
, "Can reverse loop\n");
6875 /* Now check other conditions:
6877 The increment must be a constant, as must the initial value,
6878 and the comparison code must be LT.
6880 This test can probably be improved since +/- 1 in the constant
6881 can be obtained by changing LT to LE and vice versa; this is
6885 /* for constants, LE gets turned into LT */
6886 && (GET_CODE (comparison
) == LT
6887 || (GET_CODE (comparison
) == LE
6888 && no_use_except_counting
)))
6890 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
;
6891 rtx initial_value
, comparison_value
;
6893 enum rtx_code cmp_code
;
6894 int comparison_const_width
;
6895 unsigned HOST_WIDE_INT comparison_sign_mask
;
6898 add_val
= INTVAL (bl
->biv
->add_val
);
6899 comparison_value
= XEXP (comparison
, 1);
6900 comparison_const_width
6901 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 1)));
6902 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
6903 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
6904 comparison_sign_mask
6905 = (unsigned HOST_WIDE_INT
)1 << (comparison_const_width
- 1);
6907 /* If the comparison value is not a loop invariant, then we
6908 can not reverse this loop.
6910 ??? If the insns which initialize the comparison value as
6911 a whole compute an invariant result, then we could move
6912 them out of the loop and proceed with loop reversal. */
6913 if (!invariant_p (comparison_value
))
6916 if (GET_CODE (comparison_value
) == CONST_INT
)
6917 comparison_val
= INTVAL (comparison_value
);
6918 initial_value
= bl
->initial_value
;
6920 /* Normalize the initial value if it is an integer and
6921 has no other use except as a counter. This will allow
6922 a few more loops to be reversed. */
6923 if (no_use_except_counting
6924 && GET_CODE (comparison_value
) == CONST_INT
6925 && GET_CODE (initial_value
) == CONST_INT
)
6927 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
6928 /* The code below requires comparison_val to be a multiple
6929 of add_val in order to do the loop reversal, so
6930 round up comparison_val to a multiple of add_val.
6931 Since comparison_value is constant, we know that the
6932 current comparison code is LT. */
6933 comparison_val
= comparison_val
+ add_val
- 1;
6935 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
6936 /* We postpone overflow checks for COMPARISON_VAL here;
6937 even if there is an overflow, we might still be able to
6938 reverse the loop, if converting the loop exit test to
6940 initial_value
= const0_rtx
;
6943 /* Check if there is a NOTE_INSN_LOOP_VTOP note. If there is,
6944 that means that this is a for or while style loop, with
6945 a loop exit test at the start. Thus, we can assume that
6946 the loop condition was true when the loop was entered.
6947 This allows us to change the loop exit condition to an
6949 We start at the end and search backwards for the previous
6950 NOTE. If there is no NOTE_INSN_LOOP_VTOP for this loop,
6951 the search will stop at the NOTE_INSN_LOOP_CONT. */
6954 vtop
= PREV_INSN (vtop
);
6955 while (GET_CODE (vtop
) != NOTE
6956 || NOTE_LINE_NUMBER (vtop
) > 0
6957 || NOTE_LINE_NUMBER (vtop
) == NOTE_REPEATED_LINE_NUMBER
6958 || NOTE_LINE_NUMBER (vtop
) == NOTE_INSN_DELETED
);
6959 if (NOTE_LINE_NUMBER (vtop
) != NOTE_INSN_LOOP_VTOP
)
6962 /* First check if we can do a vanilla loop reversal. */
6963 if (initial_value
== const0_rtx
6964 /* If we have a decrement_and_branch_on_count, prefer
6965 the NE test, since this will allow that instruction to
6967 #if ! defined (HAVE_decrement_and_branch_on_zero) && defined (HAVE_decrement_and_branch_on_count)
6968 && (add_val
!= 1 || ! vtop
)
6970 && GET_CODE (comparison_value
) == CONST_INT
6971 /* Now do postponed overflow checks on COMPARISON_VAL. */
6972 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
6973 & comparison_sign_mask
))
6975 /* Register will always be nonnegative, with value
6976 0 on last iteration */
6977 add_adjust
= add_val
;
6981 else if (add_val
== 1 && vtop
)
6989 if (GET_CODE (comparison
) == LE
)
6990 add_adjust
-= add_val
;
6992 /* If the initial value is not zero, or if the comparison
6993 value is not an exact multiple of the increment, then we
6994 can not reverse this loop. */
6995 if (initial_value
== const0_rtx
6996 && GET_CODE (comparison_value
) == CONST_INT
)
6998 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
7003 if (! no_use_except_counting
|| add_val
!= 1)
7007 final_value
= comparison_value
;
7009 /* Reset these in case we normalized the initial value
7010 and comparison value above. */
7011 if (GET_CODE (comparison_value
) == CONST_INT
7012 && GET_CODE (initial_value
) == CONST_INT
)
7014 comparison_value
= GEN_INT (comparison_val
);
7016 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
7018 bl
->initial_value
= initial_value
;
7020 /* Save some info needed to produce the new insns. */
7021 reg
= bl
->biv
->dest_reg
;
7022 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
7023 if (jump_label
== pc_rtx
)
7024 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
7025 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
7027 /* Set start_value; if this is not a CONST_INT, we need
7029 Initialize biv to start_value before loop start.
7030 The old initializing insn will be deleted as a
7031 dead store by flow.c. */
7032 if (initial_value
== const0_rtx
7033 && GET_CODE (comparison_value
) == CONST_INT
)
7035 start_value
= GEN_INT (comparison_val
- add_adjust
);
7036 emit_insn_before (gen_move_insn (reg
, start_value
),
7039 else if (GET_CODE (initial_value
) == CONST_INT
)
7041 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
7042 enum machine_mode mode
= GET_MODE (reg
);
7043 enum insn_code icode
7044 = add_optab
->handlers
[(int) mode
].insn_code
;
7045 if (! (*insn_operand_predicate
[icode
][0]) (reg
, mode
)
7046 || ! ((*insn_operand_predicate
[icode
][1])
7047 (comparison_value
, mode
))
7048 || ! (*insn_operand_predicate
[icode
][2]) (offset
, mode
))
7051 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
7052 emit_insn_before ((GEN_FCN (icode
)
7053 (reg
, comparison_value
, offset
)),
7055 if (GET_CODE (comparison
) == LE
)
7056 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
7059 else if (! add_adjust
)
7061 enum machine_mode mode
= GET_MODE (reg
);
7062 enum insn_code icode
7063 = sub_optab
->handlers
[(int) mode
].insn_code
;
7064 if (! (*insn_operand_predicate
[icode
][0]) (reg
, mode
)
7065 || ! ((*insn_operand_predicate
[icode
][1])
7066 (comparison_value
, mode
))
7067 || ! ((*insn_operand_predicate
[icode
][2])
7068 (initial_value
, mode
)))
7071 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
7072 emit_insn_before ((GEN_FCN (icode
)
7073 (reg
, comparison_value
, initial_value
)),
7077 /* We could handle the other cases too, but it'll be
7078 better to have a testcase first. */
7081 /* Add insn to decrement register, and delete insn
7082 that incremented the register. */
7083 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
7085 delete_insn (bl
->biv
->insn
);
7087 /* Update biv info to reflect its new status. */
7089 bl
->initial_value
= start_value
;
7090 bl
->biv
->add_val
= new_add_val
;
7092 /* Inc LABEL_NUSES so that delete_insn will
7093 not delete the label. */
7094 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
7096 /* Emit an insn after the end of the loop to set the biv's
7097 proper exit value if it is used anywhere outside the loop. */
7098 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
7100 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
7101 emit_insn_after (gen_move_insn (reg
, final_value
),
7104 /* Delete compare/branch at end of loop. */
7105 delete_insn (PREV_INSN (loop_end
));
7106 if (compare_and_branch
== 2)
7107 delete_insn (first_compare
);
7109 /* Add new compare/branch insn at end of loop. */
7111 emit_cmp_insn (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
7112 GET_MODE (reg
), 0, 0);
7113 emit_jump_insn ((*bcc_gen_fctn
[(int) cmp_code
])
7114 (XEXP (jump_label
, 0)));
7115 tem
= gen_sequence ();
7117 emit_jump_insn_before (tem
, loop_end
);
7121 for (tem
= PREV_INSN (loop_end
);
7122 tem
&& GET_CODE (tem
) != JUMP_INSN
;
7123 tem
= PREV_INSN (tem
))
7127 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
7129 /* Increment of LABEL_NUSES done above. */
7130 /* Register is now always nonnegative,
7131 so add REG_NONNEG note to the branch. */
7132 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
7138 /* Mark that this biv has been reversed. Each giv which depends
7139 on this biv, and which is also live past the end of the loop
7140 will have to be fixed up. */
7144 if (loop_dump_stream
)
7145 fprintf (loop_dump_stream
,
7146 "Reversed loop and added reg_nonneg\n");
7156 /* Verify whether the biv BL appears to be eliminable,
7157 based on the insns in the loop that refer to it.
7158 LOOP_START is the first insn of the loop, and END is the end insn.
7160 If ELIMINATE_P is non-zero, actually do the elimination.
7162 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7163 determine whether invariant insns should be placed inside or at the
7164 start of the loop. */
7167 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
7168 struct iv_class
*bl
;
7172 int threshold
, insn_count
;
7174 rtx reg
= bl
->biv
->dest_reg
;
7177 /* Scan all insns in the loop, stopping if we find one that uses the
7178 biv in a way that we cannot eliminate. */
7180 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
7182 enum rtx_code code
= GET_CODE (p
);
7183 rtx where
= threshold
>= insn_count
? loop_start
: p
;
7185 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
7186 && reg_mentioned_p (reg
, PATTERN (p
))
7187 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
7189 if (loop_dump_stream
)
7190 fprintf (loop_dump_stream
,
7191 "Cannot eliminate biv %d: biv used in insn %d.\n",
7192 bl
->regno
, INSN_UID (p
));
7199 if (loop_dump_stream
)
7200 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
7201 bl
->regno
, eliminate_p
? "was" : "can be");
7208 /* If BL appears in X (part of the pattern of INSN), see if we can
7209 eliminate its use. If so, return 1. If not, return 0.
7211 If BIV does not appear in X, return 1.
7213 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
7214 where extra insns should be added. Depending on how many items have been
7215 moved out of the loop, it will either be before INSN or at the start of
7219 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
7221 struct iv_class
*bl
;
7225 enum rtx_code code
= GET_CODE (x
);
7226 rtx reg
= bl
->biv
->dest_reg
;
7227 enum machine_mode mode
= GET_MODE (reg
);
7228 struct induction
*v
;
7240 /* If we haven't already been able to do something with this BIV,
7241 we can't eliminate it. */
7247 /* If this sets the BIV, it is not a problem. */
7248 if (SET_DEST (x
) == reg
)
7251 /* If this is an insn that defines a giv, it is also ok because
7252 it will go away when the giv is reduced. */
7253 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7254 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
7258 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
7260 /* Can replace with any giv that was reduced and
7261 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7262 Require a constant for MULT_VAL, so we know it's nonzero.
7263 ??? We disable this optimization to avoid potential
7266 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7267 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
7268 && v
->add_val
== const0_rtx
7269 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7273 /* If the giv V had the auto-inc address optimization applied
7274 to it, and INSN occurs between the giv insn and the biv
7275 insn, then we must adjust the value used here.
7276 This is rare, so we don't bother to do so. */
7278 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7279 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7280 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7281 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7287 /* If the giv has the opposite direction of change,
7288 then reverse the comparison. */
7289 if (INTVAL (v
->mult_val
) < 0)
7290 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
7291 const0_rtx
, v
->new_reg
);
7295 /* We can probably test that giv's reduced reg. */
7296 if (validate_change (insn
, &SET_SRC (x
), new, 0))
7300 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7301 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7302 Require a constant for MULT_VAL, so we know it's nonzero.
7303 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7304 overflow problem. */
7306 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7307 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
7308 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7310 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7311 || GET_CODE (v
->add_val
) == LABEL_REF
7312 || GET_CODE (v
->add_val
) == CONST
7313 || (GET_CODE (v
->add_val
) == REG
7314 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
7316 /* If the giv V had the auto-inc address optimization applied
7317 to it, and INSN occurs between the giv insn and the biv
7318 insn, then we must adjust the value used here.
7319 This is rare, so we don't bother to do so. */
7321 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7322 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7323 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7324 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7330 /* If the giv has the opposite direction of change,
7331 then reverse the comparison. */
7332 if (INTVAL (v
->mult_val
) < 0)
7333 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
7336 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
7337 copy_rtx (v
->add_val
));
7339 /* Replace biv with the giv's reduced register. */
7340 update_reg_last_use (v
->add_val
, insn
);
7341 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7344 /* Insn doesn't support that constant or invariant. Copy it
7345 into a register (it will be a loop invariant.) */
7346 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
7348 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
7351 /* Substitute the new register for its invariant value in
7352 the compare expression. */
7353 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
7354 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7363 case GT
: case GE
: case GTU
: case GEU
:
7364 case LT
: case LE
: case LTU
: case LEU
:
7365 /* See if either argument is the biv. */
7366 if (XEXP (x
, 0) == reg
)
7367 arg
= XEXP (x
, 1), arg_operand
= 1;
7368 else if (XEXP (x
, 1) == reg
)
7369 arg
= XEXP (x
, 0), arg_operand
= 0;
7373 if (CONSTANT_P (arg
))
7375 /* First try to replace with any giv that has constant positive
7376 mult_val and constant add_val. We might be able to support
7377 negative mult_val, but it seems complex to do it in general. */
7379 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7380 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7381 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7382 || GET_CODE (v
->add_val
) == LABEL_REF
7383 || GET_CODE (v
->add_val
) == CONST
7384 || (GET_CODE (v
->add_val
) == REG
7385 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
7386 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7389 /* If the giv V had the auto-inc address optimization applied
7390 to it, and INSN occurs between the giv insn and the biv
7391 insn, then we must adjust the value used here.
7392 This is rare, so we don't bother to do so. */
7394 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7395 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7396 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7397 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7403 /* Replace biv with the giv's reduced reg. */
7404 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
7406 /* If all constants are actually constant integers and
7407 the derived constant can be directly placed in the COMPARE,
7409 if (GET_CODE (arg
) == CONST_INT
7410 && GET_CODE (v
->mult_val
) == CONST_INT
7411 && GET_CODE (v
->add_val
) == CONST_INT
7412 && validate_change (insn
, &XEXP (x
, arg_operand
),
7413 GEN_INT (INTVAL (arg
)
7414 * INTVAL (v
->mult_val
)
7415 + INTVAL (v
->add_val
)), 0))
7418 /* Otherwise, load it into a register. */
7419 tem
= gen_reg_rtx (mode
);
7420 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
7421 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
7424 /* If that failed, put back the change we made above. */
7425 XEXP (x
, 1-arg_operand
) = reg
;
7428 /* Look for giv with positive constant mult_val and nonconst add_val.
7429 Insert insns to calculate new compare value.
7430 ??? Turn this off due to possible overflow. */
7432 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7433 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7434 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7440 /* If the giv V had the auto-inc address optimization applied
7441 to it, and INSN occurs between the giv insn and the biv
7442 insn, then we must adjust the value used here.
7443 This is rare, so we don't bother to do so. */
7445 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7446 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7447 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7448 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7454 tem
= gen_reg_rtx (mode
);
7456 /* Replace biv with giv's reduced register. */
7457 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
7460 /* Compute value to compare against. */
7461 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
7462 /* Use it in this insn. */
7463 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
7464 if (apply_change_group ())
7468 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
7470 if (invariant_p (arg
) == 1)
7472 /* Look for giv with constant positive mult_val and nonconst
7473 add_val. Insert insns to compute new compare value.
7474 ??? Turn this off due to possible overflow. */
7476 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7477 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7478 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7484 /* If the giv V had the auto-inc address optimization applied
7485 to it, and INSN occurs between the giv insn and the biv
7486 insn, then we must adjust the value used here.
7487 This is rare, so we don't bother to do so. */
7489 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7490 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7491 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7492 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7498 tem
= gen_reg_rtx (mode
);
7500 /* Replace biv with giv's reduced register. */
7501 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
7504 /* Compute value to compare against. */
7505 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
7507 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
7508 if (apply_change_group ())
7513 /* This code has problems. Basically, you can't know when
7514 seeing if we will eliminate BL, whether a particular giv
7515 of ARG will be reduced. If it isn't going to be reduced,
7516 we can't eliminate BL. We can try forcing it to be reduced,
7517 but that can generate poor code.
7519 The problem is that the benefit of reducing TV, below should
7520 be increased if BL can actually be eliminated, but this means
7521 we might have to do a topological sort of the order in which
7522 we try to process biv. It doesn't seem worthwhile to do
7523 this sort of thing now. */
7526 /* Otherwise the reg compared with had better be a biv. */
7527 if (GET_CODE (arg
) != REG
7528 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
7531 /* Look for a pair of givs, one for each biv,
7532 with identical coefficients. */
7533 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7535 struct induction
*tv
;
7537 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
7540 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
7541 if (! tv
->ignore
&& ! tv
->maybe_dead
7542 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
7543 && rtx_equal_p (tv
->add_val
, v
->add_val
)
7544 && tv
->mode
== mode
)
7546 /* If the giv V had the auto-inc address optimization applied
7547 to it, and INSN occurs between the giv insn and the biv
7548 insn, then we must adjust the value used here.
7549 This is rare, so we don't bother to do so. */
7551 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7552 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7553 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7554 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7560 /* Replace biv with its giv's reduced reg. */
7561 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
7562 /* Replace other operand with the other giv's
7564 XEXP (x
, arg_operand
) = tv
->new_reg
;
7571 /* If we get here, the biv can't be eliminated. */
7575 /* If this address is a DEST_ADDR giv, it doesn't matter if the
7576 biv is used in it, since it will be replaced. */
7577 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7578 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
7586 /* See if any subexpression fails elimination. */
7587 fmt
= GET_RTX_FORMAT (code
);
7588 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7593 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
7594 eliminate_p
, where
))
7599 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7600 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
7601 eliminate_p
, where
))
7610 /* Return nonzero if the last use of REG
7611 is in an insn following INSN in the same basic block. */
7614 last_use_this_basic_block (reg
, insn
)
7620 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
7623 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
7629 /* Called via `note_stores' to record the initial value of a biv. Here we
7630 just record the location of the set and process it later. */
7633 record_initial (dest
, set
)
7637 struct iv_class
*bl
;
7639 if (GET_CODE (dest
) != REG
7640 || REGNO (dest
) >= max_reg_before_loop
7641 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
7644 bl
= reg_biv_class
[REGNO (dest
)];
7646 /* If this is the first set found, record it. */
7647 if (bl
->init_insn
== 0)
7649 bl
->init_insn
= note_insn
;
7654 /* If any of the registers in X are "old" and currently have a last use earlier
7655 than INSN, update them to have a last use of INSN. Their actual last use
7656 will be the previous insn but it will not have a valid uid_luid so we can't
7660 update_reg_last_use (x
, insn
)
7664 /* Check for the case where INSN does not have a valid luid. In this case,
7665 there is no need to modify the regno_last_uid, as this can only happen
7666 when code is inserted after the loop_end to set a pseudo's final value,
7667 and hence this insn will never be the last use of x. */
7668 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
7669 && INSN_UID (insn
) < max_uid_for_loop
7670 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
7671 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
7675 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
7676 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
7679 update_reg_last_use (XEXP (x
, i
), insn
);
7680 else if (fmt
[i
] == 'E')
7681 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7682 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
7687 /* Given a jump insn JUMP, return the condition that will cause it to branch
7688 to its JUMP_LABEL. If the condition cannot be understood, or is an
7689 inequality floating-point comparison which needs to be reversed, 0 will
7692 If EARLIEST is non-zero, it is a pointer to a place where the earliest
7693 insn used in locating the condition was found. If a replacement test
7694 of the condition is desired, it should be placed in front of that
7695 insn and we will be sure that the inputs are still valid.
7697 The condition will be returned in a canonical form to simplify testing by
7698 callers. Specifically:
7700 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
7701 (2) Both operands will be machine operands; (cc0) will have been replaced.
7702 (3) If an operand is a constant, it will be the second operand.
7703 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
7704 for GE, GEU, and LEU. */
7707 get_condition (jump
, earliest
)
7716 int reverse_code
= 0;
7717 int did_reverse_condition
= 0;
7718 enum machine_mode mode
;
7720 /* If this is not a standard conditional jump, we can't parse it. */
7721 if (GET_CODE (jump
) != JUMP_INSN
7722 || ! condjump_p (jump
) || simplejump_p (jump
))
7725 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
7726 mode
= GET_MODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
7727 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
7728 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
7733 /* If this branches to JUMP_LABEL when the condition is false, reverse
7735 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
7736 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
7737 code
= reverse_condition (code
), did_reverse_condition
^= 1;
7739 /* If we are comparing a register with zero, see if the register is set
7740 in the previous insn to a COMPARE or a comparison operation. Perform
7741 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
7744 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
7746 /* Set non-zero when we find something of interest. */
7750 /* If comparison with cc0, import actual comparison from compare
7754 if ((prev
= prev_nonnote_insn (prev
)) == 0
7755 || GET_CODE (prev
) != INSN
7756 || (set
= single_set (prev
)) == 0
7757 || SET_DEST (set
) != cc0_rtx
)
7760 op0
= SET_SRC (set
);
7761 op1
= CONST0_RTX (GET_MODE (op0
));
7767 /* If this is a COMPARE, pick up the two things being compared. */
7768 if (GET_CODE (op0
) == COMPARE
)
7770 op1
= XEXP (op0
, 1);
7771 op0
= XEXP (op0
, 0);
7774 else if (GET_CODE (op0
) != REG
)
7777 /* Go back to the previous insn. Stop if it is not an INSN. We also
7778 stop if it isn't a single set or if it has a REG_INC note because
7779 we don't want to bother dealing with it. */
7781 if ((prev
= prev_nonnote_insn (prev
)) == 0
7782 || GET_CODE (prev
) != INSN
7783 || FIND_REG_INC_NOTE (prev
, 0)
7784 || (set
= single_set (prev
)) == 0)
7787 /* If this is setting OP0, get what it sets it to if it looks
7789 if (rtx_equal_p (SET_DEST (set
), op0
))
7791 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
7793 /* ??? We may not combine comparisons done in a CCmode with
7794 comparisons not done in a CCmode. This is to aid targets
7795 like Alpha that have an IEEE compliant EQ instruction, and
7796 a non-IEEE compliant BEQ instruction. The use of CCmode is
7797 actually artificial, simply to prevent the combination, but
7798 should not affect other platforms. */
7800 if ((GET_CODE (SET_SRC (set
)) == COMPARE
7803 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7804 && (GET_MODE_BITSIZE (inner_mode
)
7805 <= HOST_BITS_PER_WIDE_INT
)
7806 && (STORE_FLAG_VALUE
7807 & ((HOST_WIDE_INT
) 1
7808 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7809 #ifdef FLOAT_STORE_FLAG_VALUE
7811 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7812 && FLOAT_STORE_FLAG_VALUE
< 0)
7815 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
7816 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7817 != (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7819 else if (((code
== EQ
7821 && (GET_MODE_BITSIZE (inner_mode
)
7822 <= HOST_BITS_PER_WIDE_INT
)
7823 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7824 && (STORE_FLAG_VALUE
7825 & ((HOST_WIDE_INT
) 1
7826 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7827 #ifdef FLOAT_STORE_FLAG_VALUE
7829 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7830 && FLOAT_STORE_FLAG_VALUE
< 0)
7833 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
7834 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7835 != (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7837 /* We might have reversed a LT to get a GE here. But this wasn't
7838 actually the comparison of data, so we don't flag that we
7839 have had to reverse the condition. */
7840 did_reverse_condition
^= 1;
7848 else if (reg_set_p (op0
, prev
))
7849 /* If this sets OP0, but not directly, we have to give up. */
7854 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
7855 code
= GET_CODE (x
);
7858 code
= reverse_condition (code
);
7859 did_reverse_condition
^= 1;
7863 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
7869 /* If constant is first, put it last. */
7870 if (CONSTANT_P (op0
))
7871 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
7873 /* If OP0 is the result of a comparison, we weren't able to find what
7874 was really being compared, so fail. */
7875 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
7878 /* Canonicalize any ordered comparison with integers involving equality
7879 if we can do computations in the relevant mode and we do not
7882 if (GET_CODE (op1
) == CONST_INT
7883 && GET_MODE (op0
) != VOIDmode
7884 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
7886 HOST_WIDE_INT const_val
= INTVAL (op1
);
7887 unsigned HOST_WIDE_INT uconst_val
= const_val
;
7888 unsigned HOST_WIDE_INT max_val
7889 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
7894 if (const_val
!= max_val
>> 1)
7895 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7898 /* When cross-compiling, const_val might be sign-extended from
7899 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7901 if ((const_val
& max_val
)
7902 != (((HOST_WIDE_INT
) 1
7903 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7904 code
= GT
, op1
= GEN_INT (const_val
- 1);
7908 if (uconst_val
< max_val
)
7909 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7913 if (uconst_val
!= 0)
7914 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7922 /* If this was floating-point and we reversed anything other than an
7923 EQ or NE, return zero. */
7924 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7925 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7927 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7931 /* Never return CC0; return zero instead. */
7936 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
7939 /* Similar to above routine, except that we also put an invariant last
7940 unless both operands are invariants. */
7943 get_condition_for_loop (x
)
7946 rtx comparison
= get_condition (x
, NULL_PTR
);
7949 || ! invariant_p (XEXP (comparison
, 0))
7950 || invariant_p (XEXP (comparison
, 1)))
7953 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7954 XEXP (comparison
, 1), XEXP (comparison
, 0));
7958 /* Analyze a loop in order to instrument it with the use of count register.
7959 loop_start and loop_end are the first and last insns of the loop.
7960 This function works in cooperation with insert_bct ().
7961 loop_can_insert_bct[loop_num] is set according to whether the optimization
7962 is applicable to the loop. When it is applicable, the following variables
7964 loop_start_value[loop_num]
7965 loop_comparison_value[loop_num]
7966 loop_increment[loop_num]
7967 loop_comparison_code[loop_num] */
7969 #ifdef HAVE_decrement_and_branch_on_count
7971 analyze_loop_iterations (loop_start
, loop_end
)
7972 rtx loop_start
, loop_end
;
7974 rtx comparison
, comparison_value
;
7975 rtx iteration_var
, initial_value
, increment
;
7976 enum rtx_code comparison_code
;
7982 /* loop_variable mode */
7983 enum machine_mode original_mode
;
7985 /* find the number of the loop */
7986 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7988 /* we change our mind only when we are sure that loop will be instrumented */
7989 loop_can_insert_bct
[loop_num
] = 0;
7991 /* is the optimization suppressed. */
7992 if ( !flag_branch_on_count_reg
)
7995 /* make sure that count-reg is not in use */
7996 if (loop_used_count_register
[loop_num
]){
7997 if (loop_dump_stream
)
7998 fprintf (loop_dump_stream
,
7999 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
8004 /* make sure that the function has no indirect jumps. */
8005 if (indirect_jump_in_function
){
8006 if (loop_dump_stream
)
8007 fprintf (loop_dump_stream
,
8008 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
8013 /* make sure that the last loop insn is a conditional jump */
8014 last_loop_insn
= PREV_INSN (loop_end
);
8015 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
8016 if (loop_dump_stream
)
8017 fprintf (loop_dump_stream
,
8018 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
8023 /* First find the iteration variable. If the last insn is a conditional
8024 branch, and the insn preceding it tests a register value, make that
8025 register the iteration variable. */
8027 /* We used to use prev_nonnote_insn here, but that fails because it might
8028 accidentally get the branch for a contained loop if the branch for this
8029 loop was deleted. We can only trust branches immediately before the
8032 comparison
= get_condition_for_loop (last_loop_insn
);
8033 /* ??? Get_condition may switch position of induction variable and
8034 invariant register when it canonicalizes the comparison. */
8036 if (comparison
== 0) {
8037 if (loop_dump_stream
)
8038 fprintf (loop_dump_stream
,
8039 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
8044 comparison_code
= GET_CODE (comparison
);
8045 iteration_var
= XEXP (comparison
, 0);
8046 comparison_value
= XEXP (comparison
, 1);
8048 original_mode
= GET_MODE (iteration_var
);
8049 if (GET_MODE_CLASS (original_mode
) != MODE_INT
8050 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
8051 if (loop_dump_stream
)
8052 fprintf (loop_dump_stream
,
8053 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
8058 /* get info about loop bounds and increment */
8059 iteration_info (iteration_var
, &initial_value
, &increment
,
8060 loop_start
, loop_end
);
8062 /* make sure that all required loop data were found */
8063 if (!(initial_value
&& increment
&& comparison_value
8064 && invariant_p (comparison_value
) && invariant_p (increment
)
8065 && ! indirect_jump_in_function
))
8067 if (loop_dump_stream
) {
8068 fprintf (loop_dump_stream
,
8069 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
8070 if (!(initial_value
&& increment
&& comparison_value
)) {
8071 fprintf (loop_dump_stream
, "\tbounds not available: ");
8072 if ( ! initial_value
)
8073 fprintf (loop_dump_stream
, "initial ");
8075 fprintf (loop_dump_stream
, "increment ");
8076 if ( ! comparison_value
)
8077 fprintf (loop_dump_stream
, "comparison ");
8078 fprintf (loop_dump_stream
, "\n");
8080 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
8081 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
8086 /* make sure that the increment is constant */
8087 if (GET_CODE (increment
) != CONST_INT
) {
8088 if (loop_dump_stream
)
8089 fprintf (loop_dump_stream
,
8090 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
8095 /* make sure that the loop contains neither function call, nor jump on table.
8096 (the count register might be altered by the called function, and might
8097 be used for a branch on table). */
8098 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
8099 if (GET_CODE (insn
) == CALL_INSN
){
8100 if (loop_dump_stream
)
8101 fprintf (loop_dump_stream
,
8102 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
8107 if (GET_CODE (insn
) == JUMP_INSN
8108 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
8109 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
8110 if (loop_dump_stream
)
8111 fprintf (loop_dump_stream
,
8112 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
8118 /* At this point, we are sure that the loop can be instrumented with BCT.
8119 Some of the loops, however, will not be instrumented - the final decision
8120 is taken by insert_bct () */
8121 if (loop_dump_stream
)
8122 fprintf (loop_dump_stream
,
8123 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
8126 /* mark all enclosing loops that they cannot use count register */
8127 /* ???: In fact, since insert_bct may decide not to instrument this loop,
8128 marking here may prevent instrumenting an enclosing loop that could
8129 actually be instrumented. But since this is rare, it is safer to mark
8130 here in case the order of calling (analyze/insert)_bct would be changed. */
8131 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
8132 loop_used_count_register
[i
] = 1;
8134 /* Set data structures which will be used by the instrumentation phase */
8135 loop_start_value
[loop_num
] = initial_value
;
8136 loop_comparison_value
[loop_num
] = comparison_value
;
8137 loop_increment
[loop_num
] = increment
;
8138 loop_comparison_code
[loop_num
] = comparison_code
;
8139 loop_can_insert_bct
[loop_num
] = 1;
8143 /* instrument loop for insertion of bct instruction. We distinguish between
8144 loops with compile-time bounds, to those with run-time bounds. The loop
8145 behaviour is analized according to the following characteristics/variables:
8147 ; comparison-value: the value to which the iteration counter is compared.
8148 ; initial-value: iteration-counter initial value.
8149 ; increment: iteration-counter increment.
8150 ; Computed variables:
8151 ; increment-direction: the sign of the increment.
8152 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
8153 ; range-direction: sign (comparison-value - initial-value)
8154 We give up on the following cases:
8155 ; loop variable overflow.
8156 ; run-time loop bounds with comparison code NE.
8160 insert_bct (loop_start
, loop_end
)
8161 rtx loop_start
, loop_end
;
8163 rtx initial_value
, comparison_value
, increment
;
8164 enum rtx_code comparison_code
;
8166 int increment_direction
, compare_direction
;
8169 /* if the loop condition is <= or >=, the number of iteration
8170 is 1 more than the range of the bounds of the loop */
8171 int add_iteration
= 0;
8173 /* the only machine mode we work with - is the integer of the size that the
8175 enum machine_mode loop_var_mode
= SImode
;
8177 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
8179 /* get loop-variables. No need to check that these are valid - already
8180 checked in analyze_loop_iterations (). */
8181 comparison_code
= loop_comparison_code
[loop_num
];
8182 initial_value
= loop_start_value
[loop_num
];
8183 comparison_value
= loop_comparison_value
[loop_num
];
8184 increment
= loop_increment
[loop_num
];
8186 /* check analyze_loop_iterations decision for this loop. */
8187 if (! loop_can_insert_bct
[loop_num
]){
8188 if (loop_dump_stream
)
8189 fprintf (loop_dump_stream
,
8190 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
8195 /* It's impossible to instrument a competely unrolled loop. */
8196 if (loop_unroll_factor
[loop_num
] == -1)
8199 /* make sure that the last loop insn is a conditional jump .
8200 This check is repeated from analyze_loop_iterations (),
8201 because unrolling might have changed that. */
8202 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
8203 || !condjump_p (PREV_INSN (loop_end
))) {
8204 if (loop_dump_stream
)
8205 fprintf (loop_dump_stream
,
8206 "insert_bct: not instrumenting BCT because of invalid branch\n");
8210 /* fix increment in case loop was unrolled. */
8211 if (loop_unroll_factor
[loop_num
] > 1)
8212 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
8214 /* determine properties and directions of the loop */
8215 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
8216 switch ( comparison_code
) {
8221 compare_direction
= 1;
8228 compare_direction
= -1;
8232 /* in this case we cannot know the number of iterations */
8233 if (loop_dump_stream
)
8234 fprintf (loop_dump_stream
,
8235 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
8242 compare_direction
= 1;
8248 compare_direction
= -1;
8251 compare_direction
= 0;
8258 /* make sure that the loop does not end by an overflow */
8259 if (compare_direction
!= increment_direction
) {
8260 if (loop_dump_stream
)
8261 fprintf (loop_dump_stream
,
8262 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
8267 /* try to instrument the loop. */
8269 /* Handle the simpler case, where the bounds are known at compile time. */
8270 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
8273 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
8275 /* check the relation between compare-val and initial-val */
8276 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
8277 int range_direction
= (difference
> 0) ? 1 : -1;
8279 /* make sure the loop executes enough iterations to gain from BCT */
8280 if (difference
> -3 && difference
< 3) {
8281 if (loop_dump_stream
)
8282 fprintf (loop_dump_stream
,
8283 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
8288 /* make sure that the loop executes at least once */
8289 if ((range_direction
== 1 && compare_direction
== -1)
8290 || (range_direction
== -1 && compare_direction
== 1))
8292 if (loop_dump_stream
)
8293 fprintf (loop_dump_stream
,
8294 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
8299 /* make sure that the loop does not end by an overflow (in compile time
8300 bounds we must have an additional check for overflow, because here
8301 we also support the compare code of 'NE'. */
8302 if (comparison_code
== NE
8303 && increment_direction
!= range_direction
) {
8304 if (loop_dump_stream
)
8305 fprintf (loop_dump_stream
,
8306 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
8311 /* Determine the number of iterations by:
8313 ; compare-val - initial-val + (increment -1) + additional-iteration
8314 ; num_iterations = -----------------------------------------------------------------
8317 difference
= (range_direction
> 0) ? difference
: -difference
;
8319 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
8320 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
8321 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
8322 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
8323 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
8326 if (increment_value_abs
== 0) {
8327 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
8330 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
8331 / increment_value_abs
;
8334 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
8336 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
8338 /* Done with this loop. */
8342 /* Handle the more complex case, that the bounds are NOT known at compile time. */
8343 /* In this case we generate run_time calculation of the number of iterations */
8345 /* With runtime bounds, if the compare is of the form '!=' we give up */
8346 if (comparison_code
== NE
) {
8347 if (loop_dump_stream
)
8348 fprintf (loop_dump_stream
,
8349 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
8355 /* We rely on the existence of run-time guard to ensure that the
8356 loop executes at least once. */
8358 rtx iterations_num_reg
;
8360 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
8362 /* make sure that the increment is a power of two, otherwise (an
8363 expensive) divide is needed. */
8364 if (exact_log2 (increment_value_abs
) == -1)
8366 if (loop_dump_stream
)
8367 fprintf (loop_dump_stream
,
8368 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
8372 /* compute the number of iterations */
8377 /* Again, the number of iterations is calculated by:
8379 ; compare-val - initial-val + (increment -1) + additional-iteration
8380 ; num_iterations = -----------------------------------------------------------------
8383 /* ??? Do we have to call copy_rtx here before passing rtx to
8385 if (compare_direction
> 0) {
8386 /* <, <= :the loop variable is increasing */
8387 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
8388 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8391 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
8392 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8395 if (increment_value_abs
- 1 + add_iteration
!= 0)
8396 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
8397 GEN_INT (increment_value_abs
- 1 + add_iteration
),
8398 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8400 if (increment_value_abs
!= 1)
8402 /* ??? This will generate an expensive divide instruction for
8403 most targets. The original authors apparently expected this
8404 to be a shift, since they test for power-of-2 divisors above,
8405 but just naively generating a divide instruction will not give
8406 a shift. It happens to work for the PowerPC target because
8407 the rs6000.md file has a divide pattern that emits shifts.
8408 It will probably not work for any other target. */
8409 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
8411 GEN_INT (increment_value_abs
),
8412 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8415 iterations_num_reg
= temp_reg
;
8417 sequence
= gen_sequence ();
8419 emit_insn_before (sequence
, loop_start
);
8420 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
8424 /* instrument loop by inserting a bct in it. This is done in the following way:
8425 1. A new register is created and assigned the hard register number of the count
8427 2. In the head of the loop the new variable is initialized by the value passed in the
8428 loop_num_iterations parameter.
8429 3. At the end of the loop, comparison of the register with 0 is generated.
8430 The created comparison follows the pattern defined for the
8431 decrement_and_branch_on_count insn, so this insn will be generated in assembly
8433 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
8434 not used elsewhere, it will be eliminated by data-flow analisys. */
8437 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
8438 rtx loop_start
, loop_end
;
8439 rtx loop_num_iterations
;
8441 rtx temp_reg1
, temp_reg2
;
8445 enum machine_mode loop_var_mode
= SImode
;
8447 if (HAVE_decrement_and_branch_on_count
)
8449 if (loop_dump_stream
)
8450 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
8452 /* eliminate the check on the old variable */
8453 delete_insn (PREV_INSN (loop_end
));
8454 delete_insn (PREV_INSN (loop_end
));
8456 /* insert the label which will delimit the start of the loop */
8457 start_label
= gen_label_rtx ();
8458 emit_label_after (start_label
, loop_start
);
8460 /* insert initialization of the count register into the loop header */
8462 temp_reg1
= gen_reg_rtx (loop_var_mode
);
8463 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
8465 /* this will be count register */
8466 temp_reg2
= gen_rtx_REG (loop_var_mode
, COUNT_REGISTER_REGNUM
);
8467 /* we have to move the value to the count register from an GPR
8468 because rtx pointed to by loop_num_iterations could contain
8469 expression which cannot be moved into count register */
8470 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
8472 sequence
= gen_sequence ();
8474 emit_insn_after (sequence
, loop_start
);
8476 /* insert new comparison on the count register instead of the
8477 old one, generating the needed BCT pattern (that will be
8478 later recognized by assembly generation phase). */
8479 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
8481 LABEL_NUSES (start_label
)++;
8485 #endif /* HAVE_decrement_and_branch_on_count */
8489 /* Scan the function and determine whether it has indirect (computed) jumps.
8491 This is taken mostly from flow.c; similar code exists elsewhere
8492 in the compiler. It may be useful to put this into rtlanal.c. */
8494 indirect_jump_in_function_p (start
)
8499 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
8500 if (computed_jump_p (insn
))
8506 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8507 documentation for LOOP_MEMS for the definition of `appropriate'.
8508 This function is called from prescan_loop via for_each_rtx. */
8511 insert_loop_mem (mem
, data
)
8521 switch (GET_CODE (m
))
8527 /* We're not interested in the MEM associated with a
8528 CONST_DOUBLE, so there's no need to traverse into this. */
8532 /* This is not a MEM. */
8536 /* See if we've already seen this MEM. */
8537 for (i
= 0; i
< loop_mems_idx
; ++i
)
8538 if (rtx_equal_p (m
, loop_mems
[i
].mem
))
8540 if (GET_MODE (m
) != GET_MODE (loop_mems
[i
].mem
))
8541 /* The modes of the two memory accesses are different. If
8542 this happens, something tricky is going on, and we just
8543 don't optimize accesses to this MEM. */
8544 loop_mems
[i
].optimize
= 0;
8549 /* Resize the array, if necessary. */
8550 if (loop_mems_idx
== loop_mems_allocated
)
8552 if (loop_mems_allocated
!= 0)
8553 loop_mems_allocated
*= 2;
8555 loop_mems_allocated
= 32;
8557 loop_mems
= (loop_mem_info
*)
8558 xrealloc (loop_mems
,
8559 loop_mems_allocated
* sizeof (loop_mem_info
));
8562 /* Actually insert the MEM. */
8563 loop_mems
[loop_mems_idx
].mem
= m
;
8564 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8565 because we can't put it in a register. We still store it in the
8566 table, though, so that if we see the same address later, but in a
8567 non-BLK mode, we'll not think we can optimize it at that point. */
8568 loop_mems
[loop_mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
8569 loop_mems
[loop_mems_idx
].reg
= NULL_RTX
;
8575 /* Like load_mems, but also ensures that N_TIMES_SET,
8576 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
8577 values after load_mems. */
8580 load_mems_and_recount_loop_regs_set (scan_start
, end
, loop_top
, start
,
8581 reg_single_usage
, insn_count
)
8586 varray_type reg_single_usage
;
8589 int nregs
= max_reg_num ();
8591 load_mems (scan_start
, end
, loop_top
, start
);
8593 /* Recalculate n_times_set and friends since load_mems may have
8594 created new registers. */
8595 if (max_reg_num () > nregs
)
8601 nregs
= max_reg_num ();
8603 if (nregs
> n_times_set
->num_elements
)
8605 /* Grow all the arrays. */
8606 VARRAY_GROW (n_times_set
, nregs
);
8607 VARRAY_GROW (n_times_used
, nregs
);
8608 VARRAY_GROW (may_not_optimize
, nregs
);
8609 if (reg_single_usage
)
8610 VARRAY_GROW (reg_single_usage
, nregs
);
8612 /* Clear the arrays */
8613 bzero ((char *) &n_times_set
->data
, nregs
* sizeof (int));
8614 bzero ((char *) &may_not_optimize
->data
, nregs
* sizeof (char));
8615 if (reg_single_usage
)
8616 bzero ((char *) ®_single_usage
->data
, nregs
* sizeof (rtx
));
8618 count_loop_regs_set (loop_top
? loop_top
: start
, end
,
8619 may_not_optimize
, reg_single_usage
,
8622 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8624 VARRAY_CHAR (may_not_optimize
, i
) = 1;
8625 VARRAY_INT (n_times_set
, i
) = 1;
8628 #ifdef AVOID_CCMODE_COPIES
8629 /* Don't try to move insns which set CC registers if we should not
8630 create CCmode register copies. */
8631 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
8632 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
8633 VARRAY_CHAR (may_not_optimize
, i
) = 1;
8636 /* Set n_times_used for the new registers. */
8637 bcopy ((char *) (&n_times_set
->data
.i
[0] + old_nregs
),
8638 (char *) (&n_times_used
->data
.i
[0] + old_nregs
),
8639 (nregs
- old_nregs
) * sizeof (int));
8643 /* Move MEMs into registers for the duration of the loop. SCAN_START
8644 is the first instruction in the loop (as it is executed). The
8645 other parameters are as for next_insn_in_loop. */
8648 load_mems (scan_start
, end
, loop_top
, start
)
8654 int maybe_never
= 0;
8657 rtx label
= NULL_RTX
;
8660 if (loop_mems_idx
> 0)
8662 /* Nonzero if the next instruction may never be executed. */
8663 int next_maybe_never
= 0;
8665 /* Check to see if it's possible that some instructions in the
8666 loop are never executed. */
8667 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
8668 p
!= NULL_RTX
&& !maybe_never
;
8669 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
8671 if (GET_CODE (p
) == CODE_LABEL
)
8673 else if (GET_CODE (p
) == JUMP_INSN
8674 /* If we enter the loop in the middle, and scan
8675 around to the beginning, don't set maybe_never
8676 for that. This must be an unconditional jump,
8677 otherwise the code at the top of the loop might
8678 never be executed. Unconditional jumps are
8679 followed a by barrier then loop end. */
8680 && ! (GET_CODE (p
) == JUMP_INSN
8681 && JUMP_LABEL (p
) == loop_top
8682 && NEXT_INSN (NEXT_INSN (p
)) == end
8683 && simplejump_p (p
)))
8685 if (!condjump_p (p
))
8686 /* Something complicated. */
8689 /* If there are any more instructions in the loop, they
8690 might not be reached. */
8691 next_maybe_never
= 1;
8693 else if (next_maybe_never
)
8697 /* Actually move the MEMs. */
8698 for (i
= 0; i
< loop_mems_idx
; ++i
)
8703 rtx mem
= loop_mems
[i
].mem
;
8705 if (MEM_VOLATILE_P (mem
)
8706 || invariant_p (XEXP (mem
, 0)) != 1)
8707 /* There's no telling whether or not MEM is modified. */
8708 loop_mems
[i
].optimize
= 0;
8710 /* Go through the MEMs written to in the loop to see if this
8711 one is aliased by one of them. */
8712 for (j
= 0; j
< loop_store_mems_idx
; ++j
)
8714 if (rtx_equal_p (mem
, loop_store_mems
[j
]))
8716 else if (true_dependence (loop_store_mems
[j
], VOIDmode
,
8719 /* MEM is indeed aliased by this store. */
8720 loop_mems
[i
].optimize
= 0;
8725 /* If this MEM is written to, we must be sure that there
8726 are no reads from another MEM that aliases this one. */
8727 if (loop_mems
[i
].optimize
&& written
)
8731 for (j
= 0; j
< loop_mems_idx
; ++j
)
8735 else if (true_dependence (mem
,
8740 /* It's not safe to hoist loop_mems[i] out of
8741 the loop because writes to it might not be
8742 seen by reads from loop_mems[j]. */
8743 loop_mems
[i
].optimize
= 0;
8749 if (maybe_never
&& may_trap_p (mem
))
8750 /* We can't access the MEM outside the loop; it might
8751 cause a trap that wouldn't have happened otherwise. */
8752 loop_mems
[i
].optimize
= 0;
8754 if (!loop_mems
[i
].optimize
)
8755 /* We thought we were going to lift this MEM out of the
8756 loop, but later discovered that we could not. */
8759 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8760 order to keep scan_loop from moving stores to this MEM
8761 out of the loop just because this REG is neither a
8762 user-variable nor used in the loop test. */
8763 reg
= gen_reg_rtx (GET_MODE (mem
));
8764 REG_USERVAR_P (reg
) = 1;
8765 loop_mems
[i
].reg
= reg
;
8767 /* Now, replace all references to the MEM with the
8768 corresponding pesudos. */
8769 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
8771 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
8776 for_each_rtx (&p
, replace_loop_mem
, &ri
);
8779 if (!apply_change_group ())
8780 /* We couldn't replace all occurrences of the MEM. */
8781 loop_mems
[i
].optimize
= 0;
8786 /* Load the memory immediately before START, which is
8787 the NOTE_LOOP_BEG. */
8788 set
= gen_rtx_SET (GET_MODE (reg
), reg
, mem
);
8789 emit_insn_before (set
, start
);
8793 if (label
== NULL_RTX
)
8795 /* We must compute the former
8796 right-after-the-end label before we insert
8798 end_label
= next_label (end
);
8799 label
= gen_label_rtx ();
8800 emit_label_after (label
, end
);
8803 /* Store the memory immediately after END, which is
8804 the NOTE_LOOP_END. */
8805 set
= gen_rtx_SET (GET_MODE (reg
), mem
, reg
);
8806 emit_insn_after (set
, label
);
8809 if (loop_dump_stream
)
8811 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
8812 REGNO (reg
), (written
? "r/w" : "r/o"));
8813 print_rtl (loop_dump_stream
, mem
);
8814 fputc ('\n', loop_dump_stream
);
8820 if (label
!= NULL_RTX
)
8822 /* Now, we need to replace all references to the previous exit
8823 label with the new one. */
8828 for (p
= start
; p
!= end
; p
= NEXT_INSN (p
))
8830 for_each_rtx (&p
, replace_label
, &rr
);
8832 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
8833 field. This is not handled by for_each_rtx because it doesn't
8834 handle unprinted ('0') fields. We need to update JUMP_LABEL
8835 because the immediately following unroll pass will use it.
8836 replace_label would not work anyways, because that only handles
8838 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
8839 JUMP_LABEL (p
) = label
;
8844 /* Replace MEM with its associated pseudo register. This function is
8845 called from load_mems via for_each_rtx. DATA is actually an
8846 rtx_and_int * describing the instruction currently being scanned
8847 and the MEM we are currently replacing. */
8850 replace_loop_mem (mem
, data
)
8862 switch (GET_CODE (m
))
8868 /* We're not interested in the MEM associated with a
8869 CONST_DOUBLE, so there's no need to traverse into one. */
8873 /* This is not a MEM. */
8877 ri
= (rtx_and_int
*) data
;
8880 if (!rtx_equal_p (loop_mems
[i
].mem
, m
))
8881 /* This is not the MEM we are currently replacing. */
8886 /* Actually replace the MEM. */
8887 validate_change (insn
, mem
, loop_mems
[i
].reg
, 1);
8892 /* Replace occurrences of the old exit label for the loop with the new
8893 one. DATA is an rtx_pair containing the old and new labels,
8897 replace_label (x
, data
)
8902 rtx old_label
= ((rtx_pair
*) data
)->r1
;
8903 rtx new_label
= ((rtx_pair
*) data
)->r2
;
8908 if (GET_CODE (l
) != LABEL_REF
)
8911 if (XEXP (l
, 0) != old_label
)
8914 XEXP (l
, 0) = new_label
;
8915 ++LABEL_NUSES (new_label
);
8916 --LABEL_NUSES (old_label
);