1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx
*loop_comparison_value
;
101 rtx
*loop_start_value
;
102 enum rtx_code
*loop_comparison_code
;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor
;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid
;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx
*loop_number_exit_labels
;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count
;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations
;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call
;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile
;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue
;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set
;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used
;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize
;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once
;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems
[NUM_STORES
];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx
;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered
;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables
;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets
;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed
;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop
;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack
;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack
*rtl_obstack
;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn
; /* A movable insn */
239 rtx set_src
; /* The expression this reg is set from. */
240 rtx set_dest
; /* The destination of this SET. */
241 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec
; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno
; /* The register it sets */
246 short lifetime
; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings
; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond
: 1; /* 1 if only conditionally movable */
253 unsigned int force
: 1; /* 1 means MUST move this insn */
254 unsigned int global
: 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done
: 1; /* 1 inhibits further processing of this */
260 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable
*match
; /* First entry for same value */
270 struct movable
*forces
; /* An insn that must be moved if this is */
271 struct movable
*next
;
274 FILE *loop_dump_stream
;
276 /* Forward declarations. */
278 static void find_and_verify_loops ();
279 static void mark_loop_jump ();
280 static void prescan_loop ();
281 static int reg_in_basic_block_p ();
282 static int consec_sets_invariant_p ();
283 static rtx
libcall_other_reg ();
284 static int labels_in_range_p ();
285 static void count_loop_regs_set ();
286 static void note_addr_stored ();
287 static int loop_reg_used_before_p ();
288 static void scan_loop ();
290 static void replace_call_address ();
292 static rtx
skip_consec_insns ();
293 static int libcall_benefit ();
294 static void ignore_some_movables ();
295 static void force_movables ();
296 static void combine_movables ();
297 static int rtx_equal_for_loop_p ();
298 static void move_movables ();
299 static void strength_reduce ();
300 static int valid_initial_value_p ();
301 static void find_mem_givs ();
302 static void record_biv ();
303 static void check_final_value ();
304 static void record_giv ();
305 static void update_giv_derive ();
306 static int basic_induction_var ();
307 static rtx
simplify_giv_expr ();
308 static int general_induction_var ();
309 static int consec_sets_giv ();
310 static int check_dbra_loop ();
311 static rtx
express_from ();
312 static int combine_givs_p ();
313 static void combine_givs ();
314 static int product_cheap_p ();
315 static int maybe_eliminate_biv ();
316 static int maybe_eliminate_biv_1 ();
317 static int last_use_this_basic_block ();
318 static void record_initial ();
319 static void update_reg_last_use ();
322 /* This is extern from unroll.c */
323 void iteration_info ();
325 /* Two main functions for implementing bct:
326 first - to be called before loop unrolling, and the second - after */
327 static void analyze_loop_iterations ();
328 static void insert_bct ();
330 /* Auxiliary function that inserts the bct pattern into the loop */
331 static void instrument_loop_bct ();
334 /* Indirect_jump_in_function is computed once per function. */
335 int indirect_jump_in_function
= 0;
336 static int indirect_jump_in_function_p ();
339 /* Relative gain of eliminating various kinds of operations. */
346 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
347 copy the value of the strength reduced giv to its original register. */
353 char *free_point
= (char *) oballoc (1);
354 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
356 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
358 /* We multiply by 2 to reconcile the difference in scale between
359 these two ways of computing costs. Otherwise the cost of a copy
360 will be far less than the cost of an add. */
364 /* Free the objects we just allocated. */
367 /* Initialize the obstack used for rtl in product_cheap_p. */
368 gcc_obstack_init (&temp_obstack
);
371 /* Entry point of this file. Perform loop optimization
372 on the current function. F is the first insn of the function
373 and DUMPFILE is a stream for output of a trace of actions taken
374 (or 0 if none should be output). */
377 loop_optimize (f
, dumpfile
, unroll_p
)
378 /* f is the first instruction of a chain of insns for one function */
387 loop_dump_stream
= dumpfile
;
389 init_recog_no_volatile ();
390 init_alias_analysis ();
392 max_reg_before_loop
= max_reg_num ();
394 moved_once
= (char *) alloca (max_reg_before_loop
);
395 bzero (moved_once
, max_reg_before_loop
);
399 /* Count the number of loops. */
402 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
404 if (GET_CODE (insn
) == NOTE
405 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
409 /* Don't waste time if no loops. */
410 if (max_loop_num
== 0)
413 /* Get size to use for tables indexed by uids.
414 Leave some space for labels allocated by find_and_verify_loops. */
415 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
417 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
418 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
420 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
421 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
423 /* Allocate tables for recording each loop. We set each entry, so they need
425 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
426 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
427 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
428 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
429 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
430 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
432 /* This is initialized by the unrolling code, so we go ahead
433 and clear them just in case we are not performing loop
435 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
436 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
439 /* Allocate for BCT optimization */
440 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
441 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
443 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
444 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
446 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
447 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
448 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
449 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
450 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
451 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
454 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
455 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
458 /* Find and process each loop.
459 First, find them, and record them in order of their beginnings. */
460 find_and_verify_loops (f
);
462 /* Now find all register lifetimes. This must be done after
463 find_and_verify_loops, because it might reorder the insns in the
465 reg_scan (f
, max_reg_num (), 1);
467 /* See if we went too far. */
468 if (get_max_uid () > max_uid_for_loop
)
471 /* Compute the mapping from uids to luids.
472 LUIDs are numbers assigned to insns, like uids,
473 except that luids increase monotonically through the code.
474 Don't assign luids to line-number NOTEs, so that the distance in luids
475 between two insns is not affected by -g. */
477 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
480 if (GET_CODE (insn
) != NOTE
481 || NOTE_LINE_NUMBER (insn
) <= 0)
482 uid_luid
[INSN_UID (insn
)] = ++i
;
484 /* Give a line number note the same luid as preceding insn. */
485 uid_luid
[INSN_UID (insn
)] = i
;
490 /* Don't leave gaps in uid_luid for insns that have been
491 deleted. It is possible that the first or last insn
492 using some register has been deleted by cross-jumping.
493 Make sure that uid_luid for that former insn's uid
494 points to the general area where that insn used to be. */
495 for (i
= 0; i
< max_uid_for_loop
; i
++)
497 uid_luid
[0] = uid_luid
[i
];
498 if (uid_luid
[0] != 0)
501 for (i
= 0; i
< max_uid_for_loop
; i
++)
502 if (uid_luid
[i
] == 0)
503 uid_luid
[i
] = uid_luid
[i
- 1];
505 /* Create a mapping from loops to BLOCK tree nodes. */
506 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
507 find_loop_tree_blocks ();
509 /* Determine if the function has indirect jump. On some systems
510 this prevents low overhead loop instructions from being used. */
511 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
513 /* Now scan the loops, last ones first, since this means inner ones are done
514 before outer ones. */
515 for (i
= max_loop_num
-1; i
>= 0; i
--)
516 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
517 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
518 max_reg_num (), unroll_p
);
520 /* If debugging and unrolling loops, we must replicate the tree nodes
521 corresponding to the blocks inside the loop, so that the original one
522 to one mapping will remain. */
523 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
524 unroll_block_trees ();
527 /* Optimize one loop whose start is LOOP_START and end is END.
528 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
529 NOTE_INSN_LOOP_END. */
531 /* ??? Could also move memory writes out of loops if the destination address
532 is invariant, the source is invariant, the memory write is not volatile,
533 and if we can prove that no read inside the loop can read this address
534 before the write occurs. If there is a read of this address after the
535 write, then we can also mark the memory read as invariant. */
538 scan_loop (loop_start
, end
, nregs
, unroll_p
)
545 /* 1 if we are scanning insns that could be executed zero times. */
547 /* 1 if we are scanning insns that might never be executed
548 due to a subroutine call which might exit before they are reached. */
550 /* For a rotated loop that is entered near the bottom,
551 this is the label at the top. Otherwise it is zero. */
553 /* Jump insn that enters the loop, or 0 if control drops in. */
554 rtx loop_entry_jump
= 0;
555 /* Place in the loop where control enters. */
557 /* Number of insns in the loop. */
562 /* The SET from an insn, if it is the only SET in the insn. */
564 /* Chain describing insns movable in current loop. */
565 struct movable
*movables
= 0;
566 /* Last element in `movables' -- so we can add elements at the end. */
567 struct movable
*last_movable
= 0;
568 /* Ratio of extra register life span we can justify
569 for saving an instruction. More if loop doesn't call subroutines
570 since in that case saving an insn makes more difference
571 and more registers are available. */
573 /* If we have calls, contains the insn in which a register was used
574 if it was used exactly once; contains const0_rtx if it was used more
576 rtx
*reg_single_usage
= 0;
577 /* Nonzero if we are scanning instructions in a sub-loop. */
580 n_times_set
= (int *) alloca (nregs
* sizeof (int));
581 n_times_used
= (int *) alloca (nregs
* sizeof (int));
582 may_not_optimize
= (char *) alloca (nregs
);
584 /* Determine whether this loop starts with a jump down to a test at
585 the end. This will occur for a small number of loops with a test
586 that is too complex to duplicate in front of the loop.
588 We search for the first insn or label in the loop, skipping NOTEs.
589 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
590 (because we might have a loop executed only once that contains a
591 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
592 (in case we have a degenerate loop).
594 Note that if we mistakenly think that a loop is entered at the top
595 when, in fact, it is entered at the exit test, the only effect will be
596 slightly poorer optimization. Making the opposite error can generate
597 incorrect code. Since very few loops now start with a jump to the
598 exit test, the code here to detect that case is very conservative. */
600 for (p
= NEXT_INSN (loop_start
);
602 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
603 && (GET_CODE (p
) != NOTE
604 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
605 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
611 /* Set up variables describing this loop. */
612 prescan_loop (loop_start
, end
);
613 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
615 /* If loop has a jump before the first label,
616 the true entry is the target of that jump.
617 Start scan from there.
618 But record in LOOP_TOP the place where the end-test jumps
619 back to so we can scan that after the end of the loop. */
620 if (GET_CODE (p
) == JUMP_INSN
)
624 /* Loop entry must be unconditional jump (and not a RETURN) */
626 && JUMP_LABEL (p
) != 0
627 /* Check to see whether the jump actually
628 jumps out of the loop (meaning it's no loop).
629 This case can happen for things like
630 do {..} while (0). If this label was generated previously
631 by loop, we can't tell anything about it and have to reject
633 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
634 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
635 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
637 loop_top
= next_label (scan_start
);
638 scan_start
= JUMP_LABEL (p
);
642 /* If SCAN_START was an insn created by loop, we don't know its luid
643 as required by loop_reg_used_before_p. So skip such loops. (This
644 test may never be true, but it's best to play it safe.)
646 Also, skip loops where we do not start scanning at a label. This
647 test also rejects loops starting with a JUMP_INSN that failed the
650 if (INSN_UID (scan_start
) >= max_uid_for_loop
651 || GET_CODE (scan_start
) != CODE_LABEL
)
653 if (loop_dump_stream
)
654 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
655 INSN_UID (loop_start
), INSN_UID (end
));
659 /* Count number of times each reg is set during this loop.
660 Set may_not_optimize[I] if it is not safe to move out
661 the setting of register I. If this loop has calls, set
662 reg_single_usage[I]. */
664 bzero ((char *) n_times_set
, nregs
* sizeof (int));
665 bzero (may_not_optimize
, nregs
);
669 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
670 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
673 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
674 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
676 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
677 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
678 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
680 if (loop_dump_stream
)
682 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
683 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
685 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
686 INSN_UID (loop_continue
));
689 /* Scan through the loop finding insns that are safe to move.
690 Set n_times_set negative for the reg being set, so that
691 this reg will be considered invariant for subsequent insns.
692 We consider whether subsequent insns use the reg
693 in deciding whether it is worth actually moving.
695 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
696 and therefore it is possible that the insns we are scanning
697 would never be executed. At such times, we must make sure
698 that it is safe to execute the insn once instead of zero times.
699 When MAYBE_NEVER is 0, all insns will be executed at least once
700 so that is not a problem. */
706 /* At end of a straight-in loop, we are done.
707 At end of a loop entered at the bottom, scan the top. */
720 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
721 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
723 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
724 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
727 if (GET_CODE (p
) == INSN
728 && (set
= single_set (p
))
729 && GET_CODE (SET_DEST (set
)) == REG
730 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
735 rtx src
= SET_SRC (set
);
736 rtx dependencies
= 0;
738 /* Figure out what to use as a source of this insn. If a REG_EQUIV
739 note is given or if a REG_EQUAL note with a constant operand is
740 specified, use it as the source and mark that we should move
741 this insn by calling emit_move_insn rather that duplicating the
744 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
746 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
748 src
= XEXP (temp
, 0), move_insn
= 1;
751 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
752 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
753 src
= XEXP (temp
, 0), move_insn
= 1;
754 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
756 src
= XEXP (temp
, 0);
757 /* A libcall block can use regs that don't appear in
758 the equivalent expression. To move the libcall,
759 we must move those regs too. */
760 dependencies
= libcall_other_reg (p
, src
);
764 /* Don't try to optimize a register that was made
765 by loop-optimization for an inner loop.
766 We don't know its life-span, so we can't compute the benefit. */
767 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
769 /* In order to move a register, we need to have one of three cases:
770 (1) it is used only in the same basic block as the set
771 (2) it is not a user variable and it is not used in the
772 exit test (this can cause the variable to be used
773 before it is set just like a user-variable).
774 (3) the set is guaranteed to be executed once the loop starts,
775 and the reg is not used until after that. */
776 else if (! ((! maybe_never
777 && ! loop_reg_used_before_p (set
, p
, loop_start
,
779 || (! REG_USERVAR_P (SET_DEST (set
))
780 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
781 || reg_in_basic_block_p (p
, SET_DEST (set
))))
783 else if ((tem
= invariant_p (src
))
784 && (dependencies
== 0
785 || (tem2
= invariant_p (dependencies
)) != 0)
786 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
788 = consec_sets_invariant_p (SET_DEST (set
),
789 n_times_set
[REGNO (SET_DEST (set
))],
791 /* If the insn can cause a trap (such as divide by zero),
792 can't move it unless it's guaranteed to be executed
793 once loop is entered. Even a function call might
794 prevent the trap insn from being reached
795 (since it might exit!) */
796 && ! ((maybe_never
|| call_passed
)
797 && may_trap_p (src
)))
799 register struct movable
*m
;
800 register int regno
= REGNO (SET_DEST (set
));
802 /* A potential lossage is where we have a case where two insns
803 can be combined as long as they are both in the loop, but
804 we move one of them outside the loop. For large loops,
805 this can lose. The most common case of this is the address
806 of a function being called.
808 Therefore, if this register is marked as being used exactly
809 once if we are in a loop with calls (a "large loop"), see if
810 we can replace the usage of this register with the source
811 of this SET. If we can, delete this insn.
813 Don't do this if P has a REG_RETVAL note or if we have
814 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
816 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
817 && reg_single_usage
[regno
] != const0_rtx
818 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
819 && (REGNO_LAST_UID (regno
)
820 == INSN_UID (reg_single_usage
[regno
]))
821 && n_times_set
[REGNO (SET_DEST (set
))] == 1
822 && ! side_effects_p (SET_SRC (set
))
823 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
824 && (! SMALL_REGISTER_CLASSES
825 || (! (GET_CODE (SET_SRC (set
)) == REG
826 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
827 /* This test is not redundant; SET_SRC (set) might be
828 a call-clobbered register and the life of REGNO
829 might span a call. */
830 && ! modified_between_p (SET_SRC (set
), p
,
831 reg_single_usage
[regno
])
832 && no_labels_between_p (p
, reg_single_usage
[regno
])
833 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
834 reg_single_usage
[regno
]))
836 /* Replace any usage in a REG_EQUAL note. Must copy the
837 new source, so that we don't get rtx sharing between the
838 SET_SOURCE and REG_NOTES of insn p. */
839 REG_NOTES (reg_single_usage
[regno
])
840 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
841 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
844 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
845 NOTE_SOURCE_FILE (p
) = 0;
846 n_times_set
[regno
] = 0;
850 m
= (struct movable
*) alloca (sizeof (struct movable
));
854 m
->dependencies
= dependencies
;
855 m
->set_dest
= SET_DEST (set
);
857 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
861 m
->move_insn
= move_insn
;
862 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
863 m
->savemode
= VOIDmode
;
865 /* Set M->cond if either invariant_p or consec_sets_invariant_p
866 returned 2 (only conditionally invariant). */
867 m
->cond
= ((tem
| tem1
| tem2
) > 1);
868 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
869 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
871 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
872 - uid_luid
[REGNO_FIRST_UID (regno
)]);
873 m
->savings
= n_times_used
[regno
];
874 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
875 m
->savings
+= libcall_benefit (p
);
876 n_times_set
[regno
] = move_insn
? -2 : -1;
877 /* Add M to the end of the chain MOVABLES. */
881 last_movable
->next
= m
;
886 /* Skip this insn, not checking REG_LIBCALL notes. */
887 p
= next_nonnote_insn (p
);
888 /* Skip the consecutive insns, if there are any. */
889 p
= skip_consec_insns (p
, m
->consec
);
890 /* Back up to the last insn of the consecutive group. */
891 p
= prev_nonnote_insn (p
);
893 /* We must now reset m->move_insn, m->is_equiv, and possibly
894 m->set_src to correspond to the effects of all the
896 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
898 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
901 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
902 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
903 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
908 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
911 /* If this register is always set within a STRICT_LOW_PART
912 or set to zero, then its high bytes are constant.
913 So clear them outside the loop and within the loop
914 just load the low bytes.
915 We must check that the machine has an instruction to do so.
916 Also, if the value loaded into the register
917 depends on the same register, this cannot be done. */
918 else if (SET_SRC (set
) == const0_rtx
919 && GET_CODE (NEXT_INSN (p
)) == INSN
920 && (set1
= single_set (NEXT_INSN (p
)))
921 && GET_CODE (set1
) == SET
922 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
923 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
924 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
926 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
928 register int regno
= REGNO (SET_DEST (set
));
929 if (n_times_set
[regno
] == 2)
931 register struct movable
*m
;
932 m
= (struct movable
*) alloca (sizeof (struct movable
));
935 m
->set_dest
= SET_DEST (set
);
943 /* If the insn may not be executed on some cycles,
944 we can't clear the whole reg; clear just high part.
945 Not even if the reg is used only within this loop.
952 Clearing x before the inner loop could clobber a value
953 being saved from the last time around the outer loop.
954 However, if the reg is not used outside this loop
955 and all uses of the register are in the same
956 basic block as the store, there is no problem.
958 If this insn was made by loop, we don't know its
959 INSN_LUID and hence must make a conservative
961 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
962 || (uid_luid
[REGNO_LAST_UID (regno
)]
964 || (uid_luid
[REGNO_FIRST_UID (regno
)]
966 || (labels_in_range_p
967 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
968 if (maybe_never
&& m
->global
)
969 m
->savemode
= GET_MODE (SET_SRC (set1
));
971 m
->savemode
= VOIDmode
;
975 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
976 - uid_luid
[REGNO_FIRST_UID (regno
)]);
978 n_times_set
[regno
] = -1;
979 /* Add M to the end of the chain MOVABLES. */
983 last_movable
->next
= m
;
988 /* Past a call insn, we get to insns which might not be executed
989 because the call might exit. This matters for insns that trap.
990 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
991 so they don't count. */
992 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
994 /* Past a label or a jump, we get to insns for which we
995 can't count on whether or how many times they will be
996 executed during each iteration. Therefore, we can
997 only move out sets of trivial variables
998 (those not used after the loop). */
999 /* Similar code appears twice in strength_reduce. */
1000 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1001 /* If we enter the loop in the middle, and scan around to the
1002 beginning, don't set maybe_never for that. This must be an
1003 unconditional jump, otherwise the code at the top of the
1004 loop might never be executed. Unconditional jumps are
1005 followed a by barrier then loop end. */
1006 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1007 && NEXT_INSN (NEXT_INSN (p
)) == end
1008 && simplejump_p (p
)))
1010 else if (GET_CODE (p
) == NOTE
)
1012 /* At the virtual top of a converted loop, insns are again known to
1013 be executed: logically, the loop begins here even though the exit
1014 code has been duplicated. */
1015 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1016 maybe_never
= call_passed
= 0;
1017 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1019 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1024 /* If one movable subsumes another, ignore that other. */
1026 ignore_some_movables (movables
);
1028 /* For each movable insn, see if the reg that it loads
1029 leads when it dies right into another conditionally movable insn.
1030 If so, record that the second insn "forces" the first one,
1031 since the second can be moved only if the first is. */
1033 force_movables (movables
);
1035 /* See if there are multiple movable insns that load the same value.
1036 If there are, make all but the first point at the first one
1037 through the `match' field, and add the priorities of them
1038 all together as the priority of the first. */
1040 combine_movables (movables
, nregs
);
1042 /* Now consider each movable insn to decide whether it is worth moving.
1043 Store 0 in n_times_set for each reg that is moved. */
1045 move_movables (movables
, threshold
,
1046 insn_count
, loop_start
, end
, nregs
);
1048 /* Now candidates that still are negative are those not moved.
1049 Change n_times_set to indicate that those are not actually invariant. */
1050 for (i
= 0; i
< nregs
; i
++)
1051 if (n_times_set
[i
] < 0)
1052 n_times_set
[i
] = n_times_used
[i
];
1054 if (flag_strength_reduce
)
1055 strength_reduce (scan_start
, end
, loop_top
,
1056 insn_count
, loop_start
, end
, unroll_p
);
1059 /* Add elements to *OUTPUT to record all the pseudo-regs
1060 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1063 record_excess_regs (in_this
, not_in_this
, output
)
1064 rtx in_this
, not_in_this
;
1071 code
= GET_CODE (in_this
);
1085 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1086 && ! reg_mentioned_p (in_this
, not_in_this
))
1087 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1094 fmt
= GET_RTX_FORMAT (code
);
1095 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1102 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1103 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1107 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1113 /* Check what regs are referred to in the libcall block ending with INSN,
1114 aside from those mentioned in the equivalent value.
1115 If there are none, return 0.
1116 If there are one or more, return an EXPR_LIST containing all of them. */
1119 libcall_other_reg (insn
, equiv
)
1122 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1123 rtx p
= XEXP (note
, 0);
1126 /* First, find all the regs used in the libcall block
1127 that are not mentioned as inputs to the result. */
1131 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1132 || GET_CODE (p
) == CALL_INSN
)
1133 record_excess_regs (PATTERN (p
), equiv
, &output
);
1140 /* Return 1 if all uses of REG
1141 are between INSN and the end of the basic block. */
1144 reg_in_basic_block_p (insn
, reg
)
1147 int regno
= REGNO (reg
);
1150 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1153 /* Search this basic block for the already recorded last use of the reg. */
1154 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1156 switch (GET_CODE (p
))
1163 /* Ordinary insn: if this is the last use, we win. */
1164 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1169 /* Jump insn: if this is the last use, we win. */
1170 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1172 /* Otherwise, it's the end of the basic block, so we lose. */
1177 /* It's the end of the basic block, so we lose. */
1185 /* The "last use" doesn't follow the "first use"?? */
1189 /* Compute the benefit of eliminating the insns in the block whose
1190 last insn is LAST. This may be a group of insns used to compute a
1191 value directly or can contain a library call. */
1194 libcall_benefit (last
)
1200 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1201 insn
!= last
; insn
= NEXT_INSN (insn
))
1203 if (GET_CODE (insn
) == CALL_INSN
)
1204 benefit
+= 10; /* Assume at least this many insns in a library
1206 else if (GET_CODE (insn
) == INSN
1207 && GET_CODE (PATTERN (insn
)) != USE
1208 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1215 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1218 skip_consec_insns (insn
, count
)
1222 for (; count
> 0; count
--)
1226 /* If first insn of libcall sequence, skip to end. */
1227 /* Do this at start of loop, since INSN is guaranteed to
1229 if (GET_CODE (insn
) != NOTE
1230 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1231 insn
= XEXP (temp
, 0);
1233 do insn
= NEXT_INSN (insn
);
1234 while (GET_CODE (insn
) == NOTE
);
1240 /* Ignore any movable whose insn falls within a libcall
1241 which is part of another movable.
1242 We make use of the fact that the movable for the libcall value
1243 was made later and so appears later on the chain. */
1246 ignore_some_movables (movables
)
1247 struct movable
*movables
;
1249 register struct movable
*m
, *m1
;
1251 for (m
= movables
; m
; m
= m
->next
)
1253 /* Is this a movable for the value of a libcall? */
1254 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1258 /* Check for earlier movables inside that range,
1259 and mark them invalid. We cannot use LUIDs here because
1260 insns created by loop.c for prior loops don't have LUIDs.
1261 Rather than reject all such insns from movables, we just
1262 explicitly check each insn in the libcall (since invariant
1263 libcalls aren't that common). */
1264 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1265 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1266 if (m1
->insn
== insn
)
1272 /* For each movable insn, see if the reg that it loads
1273 leads when it dies right into another conditionally movable insn.
1274 If so, record that the second insn "forces" the first one,
1275 since the second can be moved only if the first is. */
1278 force_movables (movables
)
1279 struct movable
*movables
;
1281 register struct movable
*m
, *m1
;
1282 for (m1
= movables
; m1
; m1
= m1
->next
)
1283 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1284 if (!m1
->partial
&& !m1
->done
)
1286 int regno
= m1
->regno
;
1287 for (m
= m1
->next
; m
; m
= m
->next
)
1288 /* ??? Could this be a bug? What if CSE caused the
1289 register of M1 to be used after this insn?
1290 Since CSE does not update regno_last_uid,
1291 this insn M->insn might not be where it dies.
1292 But very likely this doesn't matter; what matters is
1293 that M's reg is computed from M1's reg. */
1294 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1297 if (m
!= 0 && m
->set_src
== m1
->set_dest
1298 /* If m->consec, m->set_src isn't valid. */
1302 /* Increase the priority of the moving the first insn
1303 since it permits the second to be moved as well. */
1307 m1
->lifetime
+= m
->lifetime
;
1308 m1
->savings
+= m1
->savings
;
1313 /* Find invariant expressions that are equal and can be combined into
1317 combine_movables (movables
, nregs
)
1318 struct movable
*movables
;
1321 register struct movable
*m
;
1322 char *matched_regs
= (char *) alloca (nregs
);
1323 enum machine_mode mode
;
1325 /* Regs that are set more than once are not allowed to match
1326 or be matched. I'm no longer sure why not. */
1327 /* Perhaps testing m->consec_sets would be more appropriate here? */
1329 for (m
= movables
; m
; m
= m
->next
)
1330 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1332 register struct movable
*m1
;
1333 int regno
= m
->regno
;
1335 bzero (matched_regs
, nregs
);
1336 matched_regs
[regno
] = 1;
1338 /* We want later insns to match the first one. Don't make the first
1339 one match any later ones. So start this loop at m->next. */
1340 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1341 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1342 /* A reg used outside the loop mustn't be eliminated. */
1344 /* A reg used for zero-extending mustn't be eliminated. */
1346 && (matched_regs
[m1
->regno
]
1349 /* Can combine regs with different modes loaded from the
1350 same constant only if the modes are the same or
1351 if both are integer modes with M wider or the same
1352 width as M1. The check for integer is redundant, but
1353 safe, since the only case of differing destination
1354 modes with equal sources is when both sources are
1355 VOIDmode, i.e., CONST_INT. */
1356 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1357 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1358 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1359 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1360 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1361 /* See if the source of M1 says it matches M. */
1362 && ((GET_CODE (m1
->set_src
) == REG
1363 && matched_regs
[REGNO (m1
->set_src
)])
1364 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1366 && ((m
->dependencies
== m1
->dependencies
)
1367 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1369 m
->lifetime
+= m1
->lifetime
;
1370 m
->savings
+= m1
->savings
;
1373 matched_regs
[m1
->regno
] = 1;
1377 /* Now combine the regs used for zero-extension.
1378 This can be done for those not marked `global'
1379 provided their lives don't overlap. */
1381 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1382 mode
= GET_MODE_WIDER_MODE (mode
))
1384 register struct movable
*m0
= 0;
1386 /* Combine all the registers for extension from mode MODE.
1387 Don't combine any that are used outside this loop. */
1388 for (m
= movables
; m
; m
= m
->next
)
1389 if (m
->partial
&& ! m
->global
1390 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1392 register struct movable
*m1
;
1393 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1394 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1398 /* First one: don't check for overlap, just record it. */
1403 /* Make sure they extend to the same mode.
1404 (Almost always true.) */
1405 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1408 /* We already have one: check for overlap with those
1409 already combined together. */
1410 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1411 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1412 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1413 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1416 /* No overlap: we can combine this with the others. */
1417 m0
->lifetime
+= m
->lifetime
;
1418 m0
->savings
+= m
->savings
;
1427 /* Return 1 if regs X and Y will become the same if moved. */
1430 regs_match_p (x
, y
, movables
)
1432 struct movable
*movables
;
1436 struct movable
*mx
, *my
;
1438 for (mx
= movables
; mx
; mx
= mx
->next
)
1439 if (mx
->regno
== xn
)
1442 for (my
= movables
; my
; my
= my
->next
)
1443 if (my
->regno
== yn
)
1447 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1449 || mx
== my
->match
));
1452 /* Return 1 if X and Y are identical-looking rtx's.
1453 This is the Lisp function EQUAL for rtx arguments.
1455 If two registers are matching movables or a movable register and an
1456 equivalent constant, consider them equal. */
1459 rtx_equal_for_loop_p (x
, y
, movables
)
1461 struct movable
*movables
;
1465 register struct movable
*m
;
1466 register enum rtx_code code
;
1471 if (x
== 0 || y
== 0)
1474 code
= GET_CODE (x
);
1476 /* If we have a register and a constant, they may sometimes be
1478 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1480 for (m
= movables
; m
; m
= m
->next
)
1481 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1482 && rtx_equal_p (m
->set_src
, y
))
1485 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1487 for (m
= movables
; m
; m
= m
->next
)
1488 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1489 && rtx_equal_p (m
->set_src
, x
))
1492 /* Otherwise, rtx's of different codes cannot be equal. */
1493 if (code
!= GET_CODE (y
))
1496 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1497 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1499 if (GET_MODE (x
) != GET_MODE (y
))
1502 /* These three types of rtx's can be compared nonrecursively. */
1504 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1506 if (code
== LABEL_REF
)
1507 return XEXP (x
, 0) == XEXP (y
, 0);
1508 if (code
== SYMBOL_REF
)
1509 return XSTR (x
, 0) == XSTR (y
, 0);
1511 /* Compare the elements. If any pair of corresponding elements
1512 fail to match, return 0 for the whole things. */
1514 fmt
= GET_RTX_FORMAT (code
);
1515 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1520 if (XWINT (x
, i
) != XWINT (y
, i
))
1525 if (XINT (x
, i
) != XINT (y
, i
))
1530 /* Two vectors must have the same length. */
1531 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1534 /* And the corresponding elements must match. */
1535 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1536 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1541 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1546 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1551 /* These are just backpointers, so they don't matter. */
1557 /* It is believed that rtx's at this level will never
1558 contain anything but integers and other rtx's,
1559 except for within LABEL_REFs and SYMBOL_REFs. */
1567 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1568 insns in INSNS which use thet reference. */
1571 add_label_notes (x
, insns
)
1575 enum rtx_code code
= GET_CODE (x
);
1580 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1582 rtx next
= next_real_insn (XEXP (x
, 0));
1584 /* Don't record labels that refer to dispatch tables.
1585 This is not necessary, since the tablejump references the same label.
1586 And if we did record them, flow.c would make worse code. */
1588 || ! (GET_CODE (next
) == JUMP_INSN
1589 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1590 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1592 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1593 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1594 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1600 fmt
= GET_RTX_FORMAT (code
);
1601 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1604 add_label_notes (XEXP (x
, i
), insns
);
1605 else if (fmt
[i
] == 'E')
1606 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1607 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1611 /* Scan MOVABLES, and move the insns that deserve to be moved.
1612 If two matching movables are combined, replace one reg with the
1613 other throughout. */
1616 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1617 struct movable
*movables
;
1625 register struct movable
*m
;
1627 /* Map of pseudo-register replacements to handle combining
1628 when we move several insns that load the same value
1629 into different pseudo-registers. */
1630 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1631 char *already_moved
= (char *) alloca (nregs
);
1633 bzero (already_moved
, nregs
);
1634 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1638 for (m
= movables
; m
; m
= m
->next
)
1640 /* Describe this movable insn. */
1642 if (loop_dump_stream
)
1644 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1645 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1647 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1649 fprintf (loop_dump_stream
, "cond ");
1651 fprintf (loop_dump_stream
, "force ");
1653 fprintf (loop_dump_stream
, "global ");
1655 fprintf (loop_dump_stream
, "done ");
1657 fprintf (loop_dump_stream
, "move-insn ");
1659 fprintf (loop_dump_stream
, "matches %d ",
1660 INSN_UID (m
->match
->insn
));
1662 fprintf (loop_dump_stream
, "forces %d ",
1663 INSN_UID (m
->forces
->insn
));
1666 /* Count movables. Value used in heuristics in strength_reduce. */
1669 /* Ignore the insn if it's already done (it matched something else).
1670 Otherwise, see if it is now safe to move. */
1674 || (1 == invariant_p (m
->set_src
)
1675 && (m
->dependencies
== 0
1676 || 1 == invariant_p (m
->dependencies
))
1678 || 1 == consec_sets_invariant_p (m
->set_dest
,
1681 && (! m
->forces
|| m
->forces
->done
))
1685 int savings
= m
->savings
;
1687 /* We have an insn that is safe to move.
1688 Compute its desirability. */
1693 if (loop_dump_stream
)
1694 fprintf (loop_dump_stream
, "savings %d ", savings
);
1696 if (moved_once
[regno
])
1700 if (loop_dump_stream
)
1701 fprintf (loop_dump_stream
, "halved since already moved ");
1704 /* An insn MUST be moved if we already moved something else
1705 which is safe only if this one is moved too: that is,
1706 if already_moved[REGNO] is nonzero. */
1708 /* An insn is desirable to move if the new lifetime of the
1709 register is no more than THRESHOLD times the old lifetime.
1710 If it's not desirable, it means the loop is so big
1711 that moving won't speed things up much,
1712 and it is liable to make register usage worse. */
1714 /* It is also desirable to move if it can be moved at no
1715 extra cost because something else was already moved. */
1717 if (already_moved
[regno
]
1718 || flag_move_all_movables
1719 || (threshold
* savings
* m
->lifetime
) >= insn_count
1720 || (m
->forces
&& m
->forces
->done
1721 && n_times_used
[m
->forces
->regno
] == 1))
1724 register struct movable
*m1
;
1727 /* Now move the insns that set the reg. */
1729 if (m
->partial
&& m
->match
)
1733 /* Find the end of this chain of matching regs.
1734 Thus, we load each reg in the chain from that one reg.
1735 And that reg is loaded with 0 directly,
1736 since it has ->match == 0. */
1737 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1738 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1739 SET_DEST (PATTERN (m1
->insn
)));
1740 i1
= emit_insn_before (newpat
, loop_start
);
1742 /* Mark the moved, invariant reg as being allowed to
1743 share a hard reg with the other matching invariant. */
1744 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1745 r1
= SET_DEST (PATTERN (m
->insn
));
1746 r2
= SET_DEST (PATTERN (m1
->insn
));
1747 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1748 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1750 delete_insn (m
->insn
);
1755 if (loop_dump_stream
)
1756 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1758 /* If we are to re-generate the item being moved with a
1759 new move insn, first delete what we have and then emit
1760 the move insn before the loop. */
1761 else if (m
->move_insn
)
1765 for (count
= m
->consec
; count
>= 0; count
--)
1767 /* If this is the first insn of a library call sequence,
1769 if (GET_CODE (p
) != NOTE
1770 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1773 /* If this is the last insn of a libcall sequence, then
1774 delete every insn in the sequence except the last.
1775 The last insn is handled in the normal manner. */
1776 if (GET_CODE (p
) != NOTE
1777 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1779 temp
= XEXP (temp
, 0);
1781 temp
= delete_insn (temp
);
1784 p
= delete_insn (p
);
1785 while (p
&& GET_CODE (p
) == NOTE
)
1790 emit_move_insn (m
->set_dest
, m
->set_src
);
1791 temp
= get_insns ();
1794 add_label_notes (m
->set_src
, temp
);
1796 i1
= emit_insns_before (temp
, loop_start
);
1797 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1799 = gen_rtx (EXPR_LIST
,
1800 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1801 m
->set_src
, REG_NOTES (i1
));
1803 if (loop_dump_stream
)
1804 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1806 /* The more regs we move, the less we like moving them. */
1811 for (count
= m
->consec
; count
>= 0; count
--)
1815 /* If first insn of libcall sequence, skip to end. */
1816 /* Do this at start of loop, since p is guaranteed to
1818 if (GET_CODE (p
) != NOTE
1819 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1822 /* If last insn of libcall sequence, move all
1823 insns except the last before the loop. The last
1824 insn is handled in the normal manner. */
1825 if (GET_CODE (p
) != NOTE
1826 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1830 rtx fn_address_insn
= 0;
1833 for (temp
= XEXP (temp
, 0); temp
!= p
;
1834 temp
= NEXT_INSN (temp
))
1840 if (GET_CODE (temp
) == NOTE
)
1843 body
= PATTERN (temp
);
1845 /* Find the next insn after TEMP,
1846 not counting USE or NOTE insns. */
1847 for (next
= NEXT_INSN (temp
); next
!= p
;
1848 next
= NEXT_INSN (next
))
1849 if (! (GET_CODE (next
) == INSN
1850 && GET_CODE (PATTERN (next
)) == USE
)
1851 && GET_CODE (next
) != NOTE
)
1854 /* If that is the call, this may be the insn
1855 that loads the function address.
1857 Extract the function address from the insn
1858 that loads it into a register.
1859 If this insn was cse'd, we get incorrect code.
1861 So emit a new move insn that copies the
1862 function address into the register that the
1863 call insn will use. flow.c will delete any
1864 redundant stores that we have created. */
1865 if (GET_CODE (next
) == CALL_INSN
1866 && GET_CODE (body
) == SET
1867 && GET_CODE (SET_DEST (body
)) == REG
1868 && (n
= find_reg_note (temp
, REG_EQUAL
,
1871 fn_reg
= SET_SRC (body
);
1872 if (GET_CODE (fn_reg
) != REG
)
1873 fn_reg
= SET_DEST (body
);
1874 fn_address
= XEXP (n
, 0);
1875 fn_address_insn
= temp
;
1877 /* We have the call insn.
1878 If it uses the register we suspect it might,
1879 load it with the correct address directly. */
1880 if (GET_CODE (temp
) == CALL_INSN
1882 && reg_referenced_p (fn_reg
, body
))
1883 emit_insn_after (gen_move_insn (fn_reg
,
1887 if (GET_CODE (temp
) == CALL_INSN
)
1889 i1
= emit_call_insn_before (body
, loop_start
);
1890 /* Because the USAGE information potentially
1891 contains objects other than hard registers
1892 we need to copy it. */
1893 if (CALL_INSN_FUNCTION_USAGE (temp
))
1894 CALL_INSN_FUNCTION_USAGE (i1
)
1895 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1898 i1
= emit_insn_before (body
, loop_start
);
1901 if (temp
== fn_address_insn
)
1902 fn_address_insn
= i1
;
1903 REG_NOTES (i1
) = REG_NOTES (temp
);
1907 if (m
->savemode
!= VOIDmode
)
1909 /* P sets REG to zero; but we should clear only
1910 the bits that are not covered by the mode
1912 rtx reg
= m
->set_dest
;
1918 (GET_MODE (reg
), and_optab
, reg
,
1919 GEN_INT ((((HOST_WIDE_INT
) 1
1920 << GET_MODE_BITSIZE (m
->savemode
)))
1922 reg
, 1, OPTAB_LIB_WIDEN
);
1926 emit_move_insn (reg
, tem
);
1927 sequence
= gen_sequence ();
1929 i1
= emit_insn_before (sequence
, loop_start
);
1931 else if (GET_CODE (p
) == CALL_INSN
)
1933 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1934 /* Because the USAGE information potentially
1935 contains objects other than hard registers
1936 we need to copy it. */
1937 if (CALL_INSN_FUNCTION_USAGE (p
))
1938 CALL_INSN_FUNCTION_USAGE (i1
)
1939 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1942 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1944 REG_NOTES (i1
) = REG_NOTES (p
);
1946 /* If there is a REG_EQUAL note present whose value is
1947 not loop invariant, then delete it, since it may
1948 cause problems with later optimization passes.
1949 It is possible for cse to create such notes
1950 like this as a result of record_jump_cond. */
1952 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1953 && ! invariant_p (XEXP (temp
, 0)))
1954 remove_note (i1
, temp
);
1959 if (loop_dump_stream
)
1960 fprintf (loop_dump_stream
, " moved to %d",
1964 /* This isn't needed because REG_NOTES is copied
1965 below and is wrong since P might be a PARALLEL. */
1966 if (REG_NOTES (i1
) == 0
1967 && ! m
->partial
/* But not if it's a zero-extend clr. */
1968 && ! m
->global
/* and not if used outside the loop
1969 (since it might get set outside). */
1970 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1972 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1973 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1976 /* If library call, now fix the REG_NOTES that contain
1977 insn pointers, namely REG_LIBCALL on FIRST
1978 and REG_RETVAL on I1. */
1979 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1981 XEXP (temp
, 0) = first
;
1982 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1983 XEXP (temp
, 0) = i1
;
1987 do p
= NEXT_INSN (p
);
1988 while (p
&& GET_CODE (p
) == NOTE
);
1991 /* The more regs we move, the less we like moving them. */
1995 /* Any other movable that loads the same register
1997 already_moved
[regno
] = 1;
1999 /* This reg has been moved out of one loop. */
2000 moved_once
[regno
] = 1;
2002 /* The reg set here is now invariant. */
2004 n_times_set
[regno
] = 0;
2008 /* Change the length-of-life info for the register
2009 to say it lives at least the full length of this loop.
2010 This will help guide optimizations in outer loops. */
2012 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2013 /* This is the old insn before all the moved insns.
2014 We can't use the moved insn because it is out of range
2015 in uid_luid. Only the old insns have luids. */
2016 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2017 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2018 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2020 /* Combine with this moved insn any other matching movables. */
2023 for (m1
= movables
; m1
; m1
= m1
->next
)
2028 /* Schedule the reg loaded by M1
2029 for replacement so that shares the reg of M.
2030 If the modes differ (only possible in restricted
2031 circumstances, make a SUBREG. */
2032 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2033 reg_map
[m1
->regno
] = m
->set_dest
;
2036 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2039 /* Get rid of the matching insn
2040 and prevent further processing of it. */
2043 /* if library call, delete all insn except last, which
2045 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2048 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2049 temp
= NEXT_INSN (temp
))
2052 delete_insn (m1
->insn
);
2054 /* Any other movable that loads the same register
2056 already_moved
[m1
->regno
] = 1;
2058 /* The reg merged here is now invariant,
2059 if the reg it matches is invariant. */
2061 n_times_set
[m1
->regno
] = 0;
2064 else if (loop_dump_stream
)
2065 fprintf (loop_dump_stream
, "not desirable");
2067 else if (loop_dump_stream
&& !m
->match
)
2068 fprintf (loop_dump_stream
, "not safe");
2070 if (loop_dump_stream
)
2071 fprintf (loop_dump_stream
, "\n");
2075 new_start
= loop_start
;
2077 /* Go through all the instructions in the loop, making
2078 all the register substitutions scheduled in REG_MAP. */
2079 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2080 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2081 || GET_CODE (p
) == CALL_INSN
)
2083 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2084 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2090 /* Scan X and replace the address of any MEM in it with ADDR.
2091 REG is the address that MEM should have before the replacement. */
2094 replace_call_address (x
, reg
, addr
)
2097 register enum rtx_code code
;
2103 code
= GET_CODE (x
);
2117 /* Short cut for very common case. */
2118 replace_call_address (XEXP (x
, 1), reg
, addr
);
2122 /* Short cut for very common case. */
2123 replace_call_address (XEXP (x
, 0), reg
, addr
);
2127 /* If this MEM uses a reg other than the one we expected,
2128 something is wrong. */
2129 if (XEXP (x
, 0) != reg
)
2138 fmt
= GET_RTX_FORMAT (code
);
2139 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2142 replace_call_address (XEXP (x
, i
), reg
, addr
);
2146 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2147 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2153 /* Return the number of memory refs to addresses that vary
2157 count_nonfixed_reads (x
)
2160 register enum rtx_code code
;
2168 code
= GET_CODE (x
);
2182 return ((invariant_p (XEXP (x
, 0)) != 1)
2183 + count_nonfixed_reads (XEXP (x
, 0)));
2190 fmt
= GET_RTX_FORMAT (code
);
2191 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2194 value
+= count_nonfixed_reads (XEXP (x
, i
));
2198 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2199 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2207 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2208 Replace it with an instruction to load just the low bytes
2209 if the machine supports such an instruction,
2210 and insert above LOOP_START an instruction to clear the register. */
2213 constant_high_bytes (p
, loop_start
)
2217 register int insn_code_number
;
2219 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2220 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2222 new = gen_rtx (SET
, VOIDmode
,
2223 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2224 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2225 SET_DEST (PATTERN (p
)),
2227 XEXP (SET_SRC (PATTERN (p
)), 0));
2228 insn_code_number
= recog (new, p
);
2230 if (insn_code_number
)
2234 /* Clear destination register before the loop. */
2235 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2236 SET_DEST (PATTERN (p
)),
2240 /* Inside the loop, just load the low part. */
2246 /* Scan a loop setting the variables `unknown_address_altered',
2247 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2248 and `loop_has_volatile'.
2249 Also, fill in the array `loop_store_mems'. */
2252 prescan_loop (start
, end
)
2255 register int level
= 1;
2258 unknown_address_altered
= 0;
2260 loop_has_volatile
= 0;
2261 loop_store_mems_idx
= 0;
2267 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2268 insn
= NEXT_INSN (insn
))
2270 if (GET_CODE (insn
) == NOTE
)
2272 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2275 /* Count number of loops contained in this one. */
2278 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2287 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2290 loop_continue
= insn
;
2293 else if (GET_CODE (insn
) == CALL_INSN
)
2295 if (! CONST_CALL_P (insn
))
2296 unknown_address_altered
= 1;
2301 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2303 if (volatile_refs_p (PATTERN (insn
)))
2304 loop_has_volatile
= 1;
2306 note_stores (PATTERN (insn
), note_addr_stored
);
2312 /* Scan the function looking for loops. Record the start and end of each loop.
2313 Also mark as invalid loops any loops that contain a setjmp or are branched
2314 to from outside the loop. */
2317 find_and_verify_loops (f
)
2321 int current_loop
= -1;
2325 /* If there are jumps to undefined labels,
2326 treat them as jumps out of any/all loops.
2327 This also avoids writing past end of tables when there are no loops. */
2328 uid_loop_num
[0] = -1;
2330 /* Find boundaries of loops, mark which loops are contained within
2331 loops, and invalidate loops that have setjmp. */
2333 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2335 if (GET_CODE (insn
) == NOTE
)
2336 switch (NOTE_LINE_NUMBER (insn
))
2338 case NOTE_INSN_LOOP_BEG
:
2339 loop_number_loop_starts
[++next_loop
] = insn
;
2340 loop_number_loop_ends
[next_loop
] = 0;
2341 loop_outer_loop
[next_loop
] = current_loop
;
2342 loop_invalid
[next_loop
] = 0;
2343 loop_number_exit_labels
[next_loop
] = 0;
2344 loop_number_exit_count
[next_loop
] = 0;
2345 current_loop
= next_loop
;
2348 case NOTE_INSN_SETJMP
:
2349 /* In this case, we must invalidate our current loop and any
2351 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2353 loop_invalid
[loop
] = 1;
2354 if (loop_dump_stream
)
2355 fprintf (loop_dump_stream
,
2356 "\nLoop at %d ignored due to setjmp.\n",
2357 INSN_UID (loop_number_loop_starts
[loop
]));
2361 case NOTE_INSN_LOOP_END
:
2362 if (current_loop
== -1)
2365 loop_number_loop_ends
[current_loop
] = insn
;
2366 current_loop
= loop_outer_loop
[current_loop
];
2373 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2374 enclosing loop, but this doesn't matter. */
2375 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2378 /* Any loop containing a label used in an initializer must be invalidated,
2379 because it can be jumped into from anywhere. */
2381 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2385 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2387 loop_num
= loop_outer_loop
[loop_num
])
2388 loop_invalid
[loop_num
] = 1;
2391 /* Any loop containing a label used for an exception handler must be
2392 invalidated, because it can be jumped into from anywhere. */
2394 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2398 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2400 loop_num
= loop_outer_loop
[loop_num
])
2401 loop_invalid
[loop_num
] = 1;
2404 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2405 loop that it is not contained within, that loop is marked invalid.
2406 If any INSN or CALL_INSN uses a label's address, then the loop containing
2407 that label is marked invalid, because it could be jumped into from
2410 Also look for blocks of code ending in an unconditional branch that
2411 exits the loop. If such a block is surrounded by a conditional
2412 branch around the block, move the block elsewhere (see below) and
2413 invert the jump to point to the code block. This may eliminate a
2414 label in our loop and will simplify processing by both us and a
2415 possible second cse pass. */
2417 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2418 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2420 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2422 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2424 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2429 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2431 loop_num
= loop_outer_loop
[loop_num
])
2432 loop_invalid
[loop_num
] = 1;
2436 if (GET_CODE (insn
) != JUMP_INSN
)
2439 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2441 /* See if this is an unconditional branch outside the loop. */
2442 if (this_loop_num
!= -1
2443 && (GET_CODE (PATTERN (insn
)) == RETURN
2444 || (simplejump_p (insn
)
2445 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2447 && get_max_uid () < max_uid_for_loop
)
2450 rtx our_next
= next_real_insn (insn
);
2452 int outer_loop
= -1;
2454 /* Go backwards until we reach the start of the loop, a label,
2456 for (p
= PREV_INSN (insn
);
2457 GET_CODE (p
) != CODE_LABEL
2458 && ! (GET_CODE (p
) == NOTE
2459 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2460 && GET_CODE (p
) != JUMP_INSN
;
2464 /* Check for the case where we have a jump to an inner nested
2465 loop, and do not perform the optimization in that case. */
2467 if (JUMP_LABEL (insn
))
2469 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2470 if (dest_loop
!= -1)
2472 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2473 outer_loop
= loop_outer_loop
[outer_loop
])
2474 if (outer_loop
== this_loop_num
)
2479 /* Make sure that the target of P is within the current loop. */
2481 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2482 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2483 outer_loop
= this_loop_num
;
2485 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2486 we have a block of code to try to move.
2488 We look backward and then forward from the target of INSN
2489 to find a BARRIER at the same loop depth as the target.
2490 If we find such a BARRIER, we make a new label for the start
2491 of the block, invert the jump in P and point it to that label,
2492 and move the block of code to the spot we found. */
2494 if (outer_loop
== -1
2495 && GET_CODE (p
) == JUMP_INSN
2496 && JUMP_LABEL (p
) != 0
2497 /* Just ignore jumps to labels that were never emitted.
2498 These always indicate compilation errors. */
2499 && INSN_UID (JUMP_LABEL (p
)) != 0
2501 && ! simplejump_p (p
)
2502 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2505 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2506 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2509 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2510 if (GET_CODE (loc
) == BARRIER
2511 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2515 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2516 if (GET_CODE (loc
) == BARRIER
2517 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2522 rtx cond_label
= JUMP_LABEL (p
);
2523 rtx new_label
= get_label_after (p
);
2525 /* Ensure our label doesn't go away. */
2526 LABEL_NUSES (cond_label
)++;
2528 /* Verify that uid_loop_num is large enough and that
2530 if (invert_jump (p
, new_label
))
2534 /* Include the BARRIER after INSN and copy the
2536 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2537 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2539 /* All those insns are now in TARGET_LOOP_NUM. */
2540 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2542 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2544 /* The label jumped to by INSN is no longer a loop exit.
2545 Unless INSN does not have a label (e.g., it is a
2546 RETURN insn), search loop_number_exit_labels to find
2547 its label_ref, and remove it. Also turn off
2548 LABEL_OUTSIDE_LOOP_P bit. */
2549 if (JUMP_LABEL (insn
))
2554 r
= loop_number_exit_labels
[this_loop_num
];
2555 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2556 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2558 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2560 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2562 loop_number_exit_labels
[this_loop_num
]
2563 = LABEL_NEXTREF (r
);
2567 for (loop_num
= this_loop_num
;
2568 loop_num
!= -1 && loop_num
!= target_loop_num
;
2569 loop_num
= loop_outer_loop
[loop_num
])
2570 loop_number_exit_count
[loop_num
]--;
2572 /* If we didn't find it, then something is wrong. */
2577 /* P is now a jump outside the loop, so it must be put
2578 in loop_number_exit_labels, and marked as such.
2579 The easiest way to do this is to just call
2580 mark_loop_jump again for P. */
2581 mark_loop_jump (PATTERN (p
), this_loop_num
);
2583 /* If INSN now jumps to the insn after it,
2585 if (JUMP_LABEL (insn
) != 0
2586 && (next_real_insn (JUMP_LABEL (insn
))
2587 == next_real_insn (insn
)))
2591 /* Continue the loop after where the conditional
2592 branch used to jump, since the only branch insn
2593 in the block (if it still remains) is an inter-loop
2594 branch and hence needs no processing. */
2595 insn
= NEXT_INSN (cond_label
);
2597 if (--LABEL_NUSES (cond_label
) == 0)
2598 delete_insn (cond_label
);
2600 /* This loop will be continued with NEXT_INSN (insn). */
2601 insn
= PREV_INSN (insn
);
2608 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2609 loops it is contained in, mark the target loop invalid.
2611 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2614 mark_loop_jump (x
, loop_num
)
2622 switch (GET_CODE (x
))
2635 /* There could be a label reference in here. */
2636 mark_loop_jump (XEXP (x
, 0), loop_num
);
2642 mark_loop_jump (XEXP (x
, 0), loop_num
);
2643 mark_loop_jump (XEXP (x
, 1), loop_num
);
2648 mark_loop_jump (XEXP (x
, 0), loop_num
);
2652 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2654 /* Link together all labels that branch outside the loop. This
2655 is used by final_[bg]iv_value and the loop unrolling code. Also
2656 mark this LABEL_REF so we know that this branch should predict
2659 /* A check to make sure the label is not in an inner nested loop,
2660 since this does not count as a loop exit. */
2661 if (dest_loop
!= -1)
2663 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2664 outer_loop
= loop_outer_loop
[outer_loop
])
2665 if (outer_loop
== loop_num
)
2671 if (loop_num
!= -1 && outer_loop
== -1)
2673 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2674 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2675 loop_number_exit_labels
[loop_num
] = x
;
2677 for (outer_loop
= loop_num
;
2678 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2679 outer_loop
= loop_outer_loop
[outer_loop
])
2680 loop_number_exit_count
[outer_loop
]++;
2683 /* If this is inside a loop, but not in the current loop or one enclosed
2684 by it, it invalidates at least one loop. */
2686 if (dest_loop
== -1)
2689 /* We must invalidate every nested loop containing the target of this
2690 label, except those that also contain the jump insn. */
2692 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2694 /* Stop when we reach a loop that also contains the jump insn. */
2695 for (outer_loop
= loop_num
; outer_loop
!= -1;
2696 outer_loop
= loop_outer_loop
[outer_loop
])
2697 if (dest_loop
== outer_loop
)
2700 /* If we get here, we know we need to invalidate a loop. */
2701 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2702 fprintf (loop_dump_stream
,
2703 "\nLoop at %d ignored due to multiple entry points.\n",
2704 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2706 loop_invalid
[dest_loop
] = 1;
2711 /* If this is not setting pc, ignore. */
2712 if (SET_DEST (x
) == pc_rtx
)
2713 mark_loop_jump (SET_SRC (x
), loop_num
);
2717 mark_loop_jump (XEXP (x
, 1), loop_num
);
2718 mark_loop_jump (XEXP (x
, 2), loop_num
);
2723 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2724 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2728 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2729 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2733 /* Treat anything else (such as a symbol_ref)
2734 as a branch out of this loop, but not into any loop. */
2739 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2740 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2743 loop_number_exit_labels
[loop_num
] = x
;
2745 for (outer_loop
= loop_num
; outer_loop
!= -1;
2746 outer_loop
= loop_outer_loop
[outer_loop
])
2747 loop_number_exit_count
[outer_loop
]++;
2753 /* Return nonzero if there is a label in the range from
2754 insn INSN to and including the insn whose luid is END
2755 INSN must have an assigned luid (i.e., it must not have
2756 been previously created by loop.c). */
2759 labels_in_range_p (insn
, end
)
2763 while (insn
&& INSN_LUID (insn
) <= end
)
2765 if (GET_CODE (insn
) == CODE_LABEL
)
2767 insn
= NEXT_INSN (insn
);
2773 /* Record that a memory reference X is being set. */
2776 note_addr_stored (x
)
2781 if (x
== 0 || GET_CODE (x
) != MEM
)
2784 /* Count number of memory writes.
2785 This affects heuristics in strength_reduce. */
2788 /* BLKmode MEM means all memory is clobbered. */
2789 if (GET_MODE (x
) == BLKmode
)
2790 unknown_address_altered
= 1;
2792 if (unknown_address_altered
)
2795 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2796 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2797 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2799 /* We are storing at the same address as previously noted. Save the
2801 if (GET_MODE_SIZE (GET_MODE (x
))
2802 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2803 loop_store_mems
[i
] = x
;
2807 if (i
== NUM_STORES
)
2808 unknown_address_altered
= 1;
2810 else if (i
== loop_store_mems_idx
)
2811 loop_store_mems
[loop_store_mems_idx
++] = x
;
2814 /* Return nonzero if the rtx X is invariant over the current loop.
2816 The value is 2 if we refer to something only conditionally invariant.
2818 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2819 Otherwise, a memory ref is invariant if it does not conflict with
2820 anything stored in `loop_store_mems'. */
2827 register enum rtx_code code
;
2829 int conditional
= 0;
2833 code
= GET_CODE (x
);
2843 /* A LABEL_REF is normally invariant, however, if we are unrolling
2844 loops, and this label is inside the loop, then it isn't invariant.
2845 This is because each unrolled copy of the loop body will have
2846 a copy of this label. If this was invariant, then an insn loading
2847 the address of this label into a register might get moved outside
2848 the loop, and then each loop body would end up using the same label.
2850 We don't know the loop bounds here though, so just fail for all
2852 if (flag_unroll_loops
)
2859 case UNSPEC_VOLATILE
:
2863 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2864 since the reg might be set by initialization within the loop. */
2866 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2867 || x
== arg_pointer_rtx
)
2868 && ! current_function_has_nonlocal_goto
)
2872 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2875 if (n_times_set
[REGNO (x
)] < 0)
2878 return n_times_set
[REGNO (x
)] == 0;
2881 /* Volatile memory references must be rejected. Do this before
2882 checking for read-only items, so that volatile read-only items
2883 will be rejected also. */
2884 if (MEM_VOLATILE_P (x
))
2887 /* Read-only items (such as constants in a constant pool) are
2888 invariant if their address is. */
2889 if (RTX_UNCHANGING_P (x
))
2892 /* If we filled the table (or had a subroutine call), any location
2893 in memory could have been clobbered. */
2894 if (unknown_address_altered
)
2897 /* See if there is any dependence between a store and this load. */
2898 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2899 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2902 /* It's not invalidated by a store in memory
2903 but we must still verify the address is invariant. */
2907 /* Don't mess with insns declared volatile. */
2908 if (MEM_VOLATILE_P (x
))
2916 fmt
= GET_RTX_FORMAT (code
);
2917 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2921 int tem
= invariant_p (XEXP (x
, i
));
2927 else if (fmt
[i
] == 'E')
2930 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2932 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2942 return 1 + conditional
;
2946 /* Return nonzero if all the insns in the loop that set REG
2947 are INSN and the immediately following insns,
2948 and if each of those insns sets REG in an invariant way
2949 (not counting uses of REG in them).
2951 The value is 2 if some of these insns are only conditionally invariant.
2953 We assume that INSN itself is the first set of REG
2954 and that its source is invariant. */
2957 consec_sets_invariant_p (reg
, n_sets
, insn
)
2961 register rtx p
= insn
;
2962 register int regno
= REGNO (reg
);
2964 /* Number of sets we have to insist on finding after INSN. */
2965 int count
= n_sets
- 1;
2966 int old
= n_times_set
[regno
];
2970 /* If N_SETS hit the limit, we can't rely on its value. */
2974 n_times_set
[regno
] = 0;
2978 register enum rtx_code code
;
2982 code
= GET_CODE (p
);
2984 /* If library call, skip to end of of it. */
2985 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2990 && (set
= single_set (p
))
2991 && GET_CODE (SET_DEST (set
)) == REG
2992 && REGNO (SET_DEST (set
)) == regno
)
2994 this = invariant_p (SET_SRC (set
));
2997 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2999 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3000 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3002 this = (CONSTANT_P (XEXP (temp
, 0))
3003 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3004 && invariant_p (XEXP (temp
, 0))));
3011 else if (code
!= NOTE
)
3013 n_times_set
[regno
] = old
;
3018 n_times_set
[regno
] = old
;
3019 /* If invariant_p ever returned 2, we return 2. */
3020 return 1 + (value
& 2);
3024 /* I don't think this condition is sufficient to allow INSN
3025 to be moved, so we no longer test it. */
3027 /* Return 1 if all insns in the basic block of INSN and following INSN
3028 that set REG are invariant according to TABLE. */
3031 all_sets_invariant_p (reg
, insn
, table
)
3035 register rtx p
= insn
;
3036 register int regno
= REGNO (reg
);
3040 register enum rtx_code code
;
3042 code
= GET_CODE (p
);
3043 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3045 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3046 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3047 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3049 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3056 /* Look at all uses (not sets) of registers in X. For each, if it is
3057 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3058 a different insn, set USAGE[REGNO] to const0_rtx. */
3061 find_single_use_in_loop (insn
, x
, usage
)
3066 enum rtx_code code
= GET_CODE (x
);
3067 char *fmt
= GET_RTX_FORMAT (code
);
3072 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3073 ? const0_rtx
: insn
;
3075 else if (code
== SET
)
3077 /* Don't count SET_DEST if it is a REG; otherwise count things
3078 in SET_DEST because if a register is partially modified, it won't
3079 show up as a potential movable so we don't care how USAGE is set
3081 if (GET_CODE (SET_DEST (x
)) != REG
)
3082 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3083 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3086 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3088 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3089 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3090 else if (fmt
[i
] == 'E')
3091 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3092 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3096 /* Increment N_TIMES_SET at the index of each register
3097 that is modified by an insn between FROM and TO.
3098 If the value of an element of N_TIMES_SET becomes 127 or more,
3099 stop incrementing it, to avoid overflow.
3101 Store in SINGLE_USAGE[I] the single insn in which register I is
3102 used, if it is only used once. Otherwise, it is set to 0 (for no
3103 uses) or const0_rtx for more than one use. This parameter may be zero,
3104 in which case this processing is not done.
3106 Store in *COUNT_PTR the number of actual instruction
3107 in the loop. We use this to decide what is worth moving out. */
3109 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3110 In that case, it is the insn that last set reg n. */
3113 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3114 register rtx from
, to
;
3120 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3122 register int count
= 0;
3125 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3126 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3128 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3132 /* If requested, record registers that have exactly one use. */
3135 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3137 /* Include uses in REG_EQUAL notes. */
3138 if (REG_NOTES (insn
))
3139 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3142 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3143 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3144 /* Don't move a reg that has an explicit clobber.
3145 We might do so sometimes, but it's not worth the pain. */
3146 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3148 if (GET_CODE (PATTERN (insn
)) == SET
3149 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3151 dest
= SET_DEST (PATTERN (insn
));
3152 while (GET_CODE (dest
) == SUBREG
3153 || GET_CODE (dest
) == ZERO_EXTRACT
3154 || GET_CODE (dest
) == SIGN_EXTRACT
3155 || GET_CODE (dest
) == STRICT_LOW_PART
)
3156 dest
= XEXP (dest
, 0);
3157 if (GET_CODE (dest
) == REG
)
3159 register int regno
= REGNO (dest
);
3160 /* If this is the first setting of this reg
3161 in current basic block, and it was set before,
3162 it must be set in two basic blocks, so it cannot
3163 be moved out of the loop. */
3164 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3165 may_not_move
[regno
] = 1;
3166 /* If this is not first setting in current basic block,
3167 see if reg was used in between previous one and this.
3168 If so, neither one can be moved. */
3169 if (last_set
[regno
] != 0
3170 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3171 may_not_move
[regno
] = 1;
3172 if (n_times_set
[regno
] < 127)
3173 ++n_times_set
[regno
];
3174 last_set
[regno
] = insn
;
3177 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3180 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3182 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3183 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3184 /* Don't move a reg that has an explicit clobber.
3185 It's not worth the pain to try to do it correctly. */
3186 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3188 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3190 dest
= SET_DEST (x
);
3191 while (GET_CODE (dest
) == SUBREG
3192 || GET_CODE (dest
) == ZERO_EXTRACT
3193 || GET_CODE (dest
) == SIGN_EXTRACT
3194 || GET_CODE (dest
) == STRICT_LOW_PART
)
3195 dest
= XEXP (dest
, 0);
3196 if (GET_CODE (dest
) == REG
)
3198 register int regno
= REGNO (dest
);
3199 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3200 may_not_move
[regno
] = 1;
3201 if (last_set
[regno
] != 0
3202 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3203 may_not_move
[regno
] = 1;
3204 if (n_times_set
[regno
] < 127)
3205 ++n_times_set
[regno
];
3206 last_set
[regno
] = insn
;
3213 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3214 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3219 /* Given a loop that is bounded by LOOP_START and LOOP_END
3220 and that is entered at SCAN_START,
3221 return 1 if the register set in SET contained in insn INSN is used by
3222 any insn that precedes INSN in cyclic order starting
3223 from the loop entry point.
3225 We don't want to use INSN_LUID here because if we restrict INSN to those
3226 that have a valid INSN_LUID, it means we cannot move an invariant out
3227 from an inner loop past two loops. */
3230 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3231 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3233 rtx reg
= SET_DEST (set
);
3236 /* Scan forward checking for register usage. If we hit INSN, we
3237 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3238 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3240 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3241 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3251 /* A "basic induction variable" or biv is a pseudo reg that is set
3252 (within this loop) only by incrementing or decrementing it. */
3253 /* A "general induction variable" or giv is a pseudo reg whose
3254 value is a linear function of a biv. */
3256 /* Bivs are recognized by `basic_induction_var';
3257 Givs by `general_induct_var'. */
3259 /* Indexed by register number, indicates whether or not register is an
3260 induction variable, and if so what type. */
3262 enum iv_mode
*reg_iv_type
;
3264 /* Indexed by register number, contains pointer to `struct induction'
3265 if register is an induction variable. This holds general info for
3266 all induction variables. */
3268 struct induction
**reg_iv_info
;
3270 /* Indexed by register number, contains pointer to `struct iv_class'
3271 if register is a basic induction variable. This holds info describing
3272 the class (a related group) of induction variables that the biv belongs
3275 struct iv_class
**reg_biv_class
;
3277 /* The head of a list which links together (via the next field)
3278 every iv class for the current loop. */
3280 struct iv_class
*loop_iv_list
;
3282 /* Communication with routines called via `note_stores'. */
3284 static rtx note_insn
;
3286 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3288 static rtx addr_placeholder
;
3290 /* ??? Unfinished optimizations, and possible future optimizations,
3291 for the strength reduction code. */
3293 /* ??? There is one more optimization you might be interested in doing: to
3294 allocate pseudo registers for frequently-accessed memory locations.
3295 If the same memory location is referenced each time around, it might
3296 be possible to copy it into a register before and out after.
3297 This is especially useful when the memory location is a variable which
3298 is in a stack slot because somewhere its address is taken. If the
3299 loop doesn't contain a function call and the variable isn't volatile,
3300 it is safe to keep the value in a register for the duration of the
3301 loop. One tricky thing is that the copying of the value back from the
3302 register has to be done on all exits from the loop. You need to check that
3303 all the exits from the loop go to the same place. */
3305 /* ??? The interaction of biv elimination, and recognition of 'constant'
3306 bivs, may cause problems. */
3308 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3309 performance problems.
3311 Perhaps don't eliminate things that can be combined with an addressing
3312 mode. Find all givs that have the same biv, mult_val, and add_val;
3313 then for each giv, check to see if its only use dies in a following
3314 memory address. If so, generate a new memory address and check to see
3315 if it is valid. If it is valid, then store the modified memory address,
3316 otherwise, mark the giv as not done so that it will get its own iv. */
3318 /* ??? Could try to optimize branches when it is known that a biv is always
3321 /* ??? When replace a biv in a compare insn, we should replace with closest
3322 giv so that an optimized branch can still be recognized by the combiner,
3323 e.g. the VAX acb insn. */
3325 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3326 was rerun in loop_optimize whenever a register was added or moved.
3327 Also, some of the optimizations could be a little less conservative. */
3329 /* Perform strength reduction and induction variable elimination. */
3331 /* Pseudo registers created during this function will be beyond the last
3332 valid index in several tables including n_times_set and regno_last_uid.
3333 This does not cause a problem here, because the added registers cannot be
3334 givs outside of their loop, and hence will never be reconsidered.
3335 But scan_loop must check regnos to make sure they are in bounds. */
3338 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3339 loop_start
, loop_end
, unroll_p
)
3353 /* This is 1 if current insn is not executed at least once for every loop
3355 int not_every_iteration
= 0;
3356 /* This is 1 if current insn may be executed more than once for every
3358 int maybe_multiple
= 0;
3359 /* Temporary list pointers for traversing loop_iv_list. */
3360 struct iv_class
*bl
, **backbl
;
3361 /* Ratio of extra register life span we can justify
3362 for saving an instruction. More if loop doesn't call subroutines
3363 since in that case saving an insn makes more difference
3364 and more registers are available. */
3365 /* ??? could set this to last value of threshold in move_movables */
3366 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3367 /* Map of pseudo-register replacements. */
3371 rtx end_insert_before
;
3374 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3375 * sizeof (enum iv_mode
*));
3376 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3377 reg_iv_info
= (struct induction
**)
3378 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3379 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3380 * sizeof (struct induction
*)));
3381 reg_biv_class
= (struct iv_class
**)
3382 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3383 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3384 * sizeof (struct iv_class
*)));
3387 addr_placeholder
= gen_reg_rtx (Pmode
);
3389 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3390 must be put before this insn, so that they will appear in the right
3391 order (i.e. loop order).
3393 If loop_end is the end of the current function, then emit a
3394 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3396 if (NEXT_INSN (loop_end
) != 0)
3397 end_insert_before
= NEXT_INSN (loop_end
);
3399 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3401 /* Scan through loop to find all possible bivs. */
3407 /* At end of a straight-in loop, we are done.
3408 At end of a loop entered at the bottom, scan the top. */
3409 if (p
== scan_start
)
3417 if (p
== scan_start
)
3421 if (GET_CODE (p
) == INSN
3422 && (set
= single_set (p
))
3423 && GET_CODE (SET_DEST (set
)) == REG
)
3425 dest_reg
= SET_DEST (set
);
3426 if (REGNO (dest_reg
) < max_reg_before_loop
3427 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3428 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3430 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3431 dest_reg
, p
, &inc_val
, &mult_val
))
3433 /* It is a possible basic induction variable.
3434 Create and initialize an induction structure for it. */
3437 = (struct induction
*) alloca (sizeof (struct induction
));
3439 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3440 not_every_iteration
, maybe_multiple
);
3441 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3443 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3444 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3448 /* Past CODE_LABEL, we get to insns that may be executed multiple
3449 times. The only way we can be sure that they can't is if every
3450 every jump insn between here and the end of the loop either
3451 returns, exits the loop, is a forward jump, or is a jump
3452 to the loop start. */
3454 if (GET_CODE (p
) == CODE_LABEL
)
3462 insn
= NEXT_INSN (insn
);
3463 if (insn
== scan_start
)
3471 if (insn
== scan_start
)
3475 if (GET_CODE (insn
) == JUMP_INSN
3476 && GET_CODE (PATTERN (insn
)) != RETURN
3477 && (! condjump_p (insn
)
3478 || (JUMP_LABEL (insn
) != 0
3479 && JUMP_LABEL (insn
) != scan_start
3480 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3481 || INSN_UID (insn
) >= max_uid_for_loop
3482 || (INSN_LUID (JUMP_LABEL (insn
))
3483 < INSN_LUID (insn
))))))
3491 /* Past a jump, we get to insns for which we can't count
3492 on whether they will be executed during each iteration. */
3493 /* This code appears twice in strength_reduce. There is also similar
3494 code in scan_loop. */
3495 if (GET_CODE (p
) == JUMP_INSN
3496 /* If we enter the loop in the middle, and scan around to the
3497 beginning, don't set not_every_iteration for that.
3498 This can be any kind of jump, since we want to know if insns
3499 will be executed if the loop is executed. */
3500 && ! (JUMP_LABEL (p
) == loop_top
3501 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3502 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3506 /* If this is a jump outside the loop, then it also doesn't
3507 matter. Check to see if the target of this branch is on the
3508 loop_number_exits_labels list. */
3510 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3512 label
= LABEL_NEXTREF (label
))
3513 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3517 not_every_iteration
= 1;
3520 else if (GET_CODE (p
) == NOTE
)
3522 /* At the virtual top of a converted loop, insns are again known to
3523 be executed each iteration: logically, the loop begins here
3524 even though the exit code has been duplicated. */
3525 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3526 not_every_iteration
= 0;
3527 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3529 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3533 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3534 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3535 or not an insn is known to be executed each iteration of the
3536 loop, whether or not any iterations are known to occur.
3538 Therefore, if we have just passed a label and have no more labels
3539 between here and the test insn of the loop, we know these insns
3540 will be executed each iteration. */
3542 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3543 && no_labels_between_p (p
, loop_end
))
3544 not_every_iteration
= 0;
3547 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3548 Make a sanity check against n_times_set. */
3549 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3551 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3552 /* Above happens if register modified by subreg, etc. */
3553 /* Make sure it is not recognized as a basic induction var: */
3554 || n_times_set
[bl
->regno
] != bl
->biv_count
3555 /* If never incremented, it is invariant that we decided not to
3556 move. So leave it alone. */
3557 || ! bl
->incremented
)
3559 if (loop_dump_stream
)
3560 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3562 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3563 ? "not induction variable"
3564 : (! bl
->incremented
? "never incremented"
3567 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3574 if (loop_dump_stream
)
3575 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3579 /* Exit if there are no bivs. */
3582 /* Can still unroll the loop anyways, but indicate that there is no
3583 strength reduction info available. */
3585 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3590 /* Find initial value for each biv by searching backwards from loop_start,
3591 halting at first label. Also record any test condition. */
3594 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3598 if (GET_CODE (p
) == CALL_INSN
)
3601 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3602 || GET_CODE (p
) == CALL_INSN
)
3603 note_stores (PATTERN (p
), record_initial
);
3605 /* Record any test of a biv that branches around the loop if no store
3606 between it and the start of loop. We only care about tests with
3607 constants and registers and only certain of those. */
3608 if (GET_CODE (p
) == JUMP_INSN
3609 && JUMP_LABEL (p
) != 0
3610 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3611 && (test
= get_condition_for_loop (p
)) != 0
3612 && GET_CODE (XEXP (test
, 0)) == REG
3613 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3614 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3615 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3616 && bl
->init_insn
== 0)
3618 /* If an NE test, we have an initial value! */
3619 if (GET_CODE (test
) == NE
)
3622 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3623 XEXP (test
, 0), XEXP (test
, 1));
3626 bl
->initial_test
= test
;
3630 /* Look at the each biv and see if we can say anything better about its
3631 initial value from any initializing insns set up above. (This is done
3632 in two passes to avoid missing SETs in a PARALLEL.) */
3633 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3637 if (! bl
->init_insn
)
3640 src
= SET_SRC (bl
->init_set
);
3642 if (loop_dump_stream
)
3643 fprintf (loop_dump_stream
,
3644 "Biv %d initialized at insn %d: initial value ",
3645 bl
->regno
, INSN_UID (bl
->init_insn
));
3647 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3648 || GET_MODE (src
) == VOIDmode
)
3649 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3651 bl
->initial_value
= src
;
3653 if (loop_dump_stream
)
3655 if (GET_CODE (src
) == CONST_INT
)
3656 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3659 print_rtl (loop_dump_stream
, src
);
3660 fprintf (loop_dump_stream
, "\n");
3666 /* Biv initial value is not simple move,
3667 so let it keep initial value of "itself". */
3669 if (loop_dump_stream
)
3670 fprintf (loop_dump_stream
, "is complex\n");
3674 /* Search the loop for general induction variables. */
3676 /* A register is a giv if: it is only set once, it is a function of a
3677 biv and a constant (or invariant), and it is not a biv. */
3679 not_every_iteration
= 0;
3685 /* At end of a straight-in loop, we are done.
3686 At end of a loop entered at the bottom, scan the top. */
3687 if (p
== scan_start
)
3695 if (p
== scan_start
)
3699 /* Look for a general induction variable in a register. */
3700 if (GET_CODE (p
) == INSN
3701 && (set
= single_set (p
))
3702 && GET_CODE (SET_DEST (set
)) == REG
3703 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3711 dest_reg
= SET_DEST (set
);
3712 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3715 if (/* SET_SRC is a giv. */
3716 ((benefit
= general_induction_var (SET_SRC (set
),
3719 /* Equivalent expression is a giv. */
3720 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3721 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3723 &add_val
, &mult_val
))))
3724 /* Don't try to handle any regs made by loop optimization.
3725 We have nothing on them in regno_first_uid, etc. */
3726 && REGNO (dest_reg
) < max_reg_before_loop
3727 /* Don't recognize a BASIC_INDUCT_VAR here. */
3728 && dest_reg
!= src_reg
3729 /* This must be the only place where the register is set. */
3730 && (n_times_set
[REGNO (dest_reg
)] == 1
3731 /* or all sets must be consecutive and make a giv. */
3732 || (benefit
= consec_sets_giv (benefit
, p
,
3734 &add_val
, &mult_val
))))
3738 = (struct induction
*) alloca (sizeof (struct induction
));
3741 /* If this is a library call, increase benefit. */
3742 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3743 benefit
+= libcall_benefit (p
);
3745 /* Skip the consecutive insns, if there are any. */
3746 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3749 /* If first insn of libcall sequence, skip to end.
3750 Do this at start of loop, since INSN is guaranteed to
3752 if (GET_CODE (p
) != NOTE
3753 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3756 do p
= NEXT_INSN (p
);
3757 while (GET_CODE (p
) == NOTE
);
3760 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3761 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3767 #ifndef DONT_REDUCE_ADDR
3768 /* Look for givs which are memory addresses. */
3769 /* This resulted in worse code on a VAX 8600. I wonder if it
3771 if (GET_CODE (p
) == INSN
)
3772 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3776 /* Update the status of whether giv can derive other givs. This can
3777 change when we pass a label or an insn that updates a biv. */
3778 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3779 || GET_CODE (p
) == CODE_LABEL
)
3780 update_giv_derive (p
);
3782 /* Past a jump, we get to insns for which we can't count
3783 on whether they will be executed during each iteration. */
3784 /* This code appears twice in strength_reduce. There is also similar
3785 code in scan_loop. */
3786 if (GET_CODE (p
) == JUMP_INSN
3787 /* If we enter the loop in the middle, and scan around to the
3788 beginning, don't set not_every_iteration for that.
3789 This can be any kind of jump, since we want to know if insns
3790 will be executed if the loop is executed. */
3791 && ! (JUMP_LABEL (p
) == loop_top
3792 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3793 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3797 /* If this is a jump outside the loop, then it also doesn't
3798 matter. Check to see if the target of this branch is on the
3799 loop_number_exits_labels list. */
3801 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3803 label
= LABEL_NEXTREF (label
))
3804 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3808 not_every_iteration
= 1;
3811 else if (GET_CODE (p
) == NOTE
)
3813 /* At the virtual top of a converted loop, insns are again known to
3814 be executed each iteration: logically, the loop begins here
3815 even though the exit code has been duplicated. */
3816 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3817 not_every_iteration
= 0;
3818 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3820 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3824 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3825 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3826 or not an insn is known to be executed each iteration of the
3827 loop, whether or not any iterations are known to occur.
3829 Therefore, if we have just passed a label and have no more labels
3830 between here and the test insn of the loop, we know these insns
3831 will be executed each iteration. */
3833 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3834 && no_labels_between_p (p
, loop_end
))
3835 not_every_iteration
= 0;
3838 /* Try to calculate and save the number of loop iterations. This is
3839 set to zero if the actual number can not be calculated. This must
3840 be called after all giv's have been identified, since otherwise it may
3841 fail if the iteration variable is a giv. */
3843 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3845 /* Now for each giv for which we still don't know whether or not it is
3846 replaceable, check to see if it is replaceable because its final value
3847 can be calculated. This must be done after loop_iterations is called,
3848 so that final_giv_value will work correctly. */
3850 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3852 struct induction
*v
;
3854 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3855 if (! v
->replaceable
&& ! v
->not_replaceable
)
3856 check_final_value (v
, loop_start
, loop_end
);
3859 /* Try to prove that the loop counter variable (if any) is always
3860 nonnegative; if so, record that fact with a REG_NONNEG note
3861 so that "decrement and branch until zero" insn can be used. */
3862 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3865 /* record loop-variables relevant for BCT optimization before unrolling
3866 the loop. Unrolling may update part of this information, and the
3867 correct data will be used for generating the BCT. */
3868 #ifdef HAVE_decrement_and_branch_on_count
3869 if (HAVE_decrement_and_branch_on_count
)
3870 analyze_loop_iterations (loop_start
, loop_end
);
3874 /* Create reg_map to hold substitutions for replaceable giv regs. */
3875 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3876 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3878 /* Examine each iv class for feasibility of strength reduction/induction
3879 variable elimination. */
3881 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3883 struct induction
*v
;
3886 rtx final_value
= 0;
3888 /* Test whether it will be possible to eliminate this biv
3889 provided all givs are reduced. This is possible if either
3890 the reg is not used outside the loop, or we can compute
3891 what its final value will be.
3893 For architectures with a decrement_and_branch_until_zero insn,
3894 don't do this if we put a REG_NONNEG note on the endtest for
3897 /* Compare against bl->init_insn rather than loop_start.
3898 We aren't concerned with any uses of the biv between
3899 init_insn and loop_start since these won't be affected
3900 by the value of the biv elsewhere in the function, so
3901 long as init_insn doesn't use the biv itself.
3902 March 14, 1989 -- self@bayes.arc.nasa.gov */
3904 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3906 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3907 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3908 #ifdef HAVE_decrement_and_branch_until_zero
3911 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3912 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3913 #ifdef HAVE_decrement_and_branch_until_zero
3917 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3918 threshold
, insn_count
);
3921 if (loop_dump_stream
)
3923 fprintf (loop_dump_stream
,
3924 "Cannot eliminate biv %d.\n",
3926 fprintf (loop_dump_stream
,
3927 "First use: insn %d, last use: insn %d.\n",
3928 REGNO_FIRST_UID (bl
->regno
),
3929 REGNO_LAST_UID (bl
->regno
));
3933 /* Combine all giv's for this iv_class. */
3936 /* This will be true at the end, if all givs which depend on this
3937 biv have been strength reduced.
3938 We can't (currently) eliminate the biv unless this is so. */
3941 /* Check each giv in this class to see if we will benefit by reducing
3942 it. Skip giv's combined with others. */
3943 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3945 struct induction
*tv
;
3947 if (v
->ignore
|| v
->same
)
3950 benefit
= v
->benefit
;
3952 /* Reduce benefit if not replaceable, since we will insert
3953 a move-insn to replace the insn that calculates this giv.
3954 Don't do this unless the giv is a user variable, since it
3955 will often be marked non-replaceable because of the duplication
3956 of the exit code outside the loop. In such a case, the copies
3957 we insert are dead and will be deleted. So they don't have
3958 a cost. Similar situations exist. */
3959 /* ??? The new final_[bg]iv_value code does a much better job
3960 of finding replaceable giv's, and hence this code may no longer
3962 if (! v
->replaceable
&& ! bl
->eliminable
3963 && REG_USERVAR_P (v
->dest_reg
))
3964 benefit
-= copy_cost
;
3966 /* Decrease the benefit to count the add-insns that we will
3967 insert to increment the reduced reg for the giv. */
3968 benefit
-= add_cost
* bl
->biv_count
;
3970 /* Decide whether to strength-reduce this giv or to leave the code
3971 unchanged (recompute it from the biv each time it is used).
3972 This decision can be made independently for each giv. */
3975 /* Attempt to guess whether autoincrement will handle some of the
3976 new add insns; if so, increase BENEFIT (undo the subtraction of
3977 add_cost that was done above). */
3978 if (v
->giv_type
== DEST_ADDR
3979 && GET_CODE (v
->mult_val
) == CONST_INT
)
3981 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3982 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3983 benefit
+= add_cost
* bl
->biv_count
;
3985 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3986 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3987 benefit
+= add_cost
* bl
->biv_count
;
3992 /* If an insn is not to be strength reduced, then set its ignore
3993 flag, and clear all_reduced. */
3995 /* A giv that depends on a reversed biv must be reduced if it is
3996 used after the loop exit, otherwise, it would have the wrong
3997 value after the loop exit. To make it simple, just reduce all
3998 of such giv's whether or not we know they are used after the loop
4001 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4004 if (loop_dump_stream
)
4005 fprintf (loop_dump_stream
,
4006 "giv of insn %d not worth while, %d vs %d.\n",
4008 v
->lifetime
* threshold
* benefit
, insn_count
);
4014 /* Check that we can increment the reduced giv without a
4015 multiply insn. If not, reject it. */
4017 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4018 if (tv
->mult_val
== const1_rtx
4019 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4021 if (loop_dump_stream
)
4022 fprintf (loop_dump_stream
,
4023 "giv of insn %d: would need a multiply.\n",
4024 INSN_UID (v
->insn
));
4032 /* Reduce each giv that we decided to reduce. */
4034 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4036 struct induction
*tv
;
4037 if (! v
->ignore
&& v
->same
== 0)
4039 int auto_inc_opt
= 0;
4041 v
->new_reg
= gen_reg_rtx (v
->mode
);
4044 /* If the target has auto-increment addressing modes, and
4045 this is an address giv, then try to put the increment
4046 immediately after its use, so that flow can create an
4047 auto-increment addressing mode. */
4048 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4049 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4050 /* We don't handle reversed biv's because bl->biv->insn
4051 does not have a valid INSN_LUID. */
4053 && v
->always_executed
&& ! v
->maybe_multiple
)
4055 /* If other giv's have been combined with this one, then
4056 this will work only if all uses of the other giv's occur
4057 before this giv's insn. This is difficult to check.
4059 We simplify this by looking for the common case where
4060 there is one DEST_REG giv, and this giv's insn is the
4061 last use of the dest_reg of that DEST_REG giv. If the
4062 the increment occurs after the address giv, then we can
4063 perform the optimization. (Otherwise, the increment
4064 would have to go before other_giv, and we would not be
4065 able to combine it with the address giv to get an
4066 auto-inc address.) */
4067 if (v
->combined_with
)
4069 struct induction
*other_giv
= 0;
4071 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4079 if (! tv
&& other_giv
4080 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4081 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4082 == INSN_UID (v
->insn
))
4083 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4086 /* Check for case where increment is before the the address
4088 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
4097 /* We can't put an insn immediately after one setting
4098 cc0, or immediately before one using cc0. */
4099 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4100 || (auto_inc_opt
== -1
4101 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4102 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4103 && sets_cc0_p (PATTERN (prev
))))
4109 v
->auto_inc_opt
= 1;
4113 /* For each place where the biv is incremented, add an insn
4114 to increment the new, reduced reg for the giv. */
4115 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4120 insert_before
= tv
->insn
;
4121 else if (auto_inc_opt
== 1)
4122 insert_before
= NEXT_INSN (v
->insn
);
4124 insert_before
= v
->insn
;
4126 if (tv
->mult_val
== const1_rtx
)
4127 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4128 v
->new_reg
, v
->new_reg
, insert_before
);
4129 else /* tv->mult_val == const0_rtx */
4130 /* A multiply is acceptable here
4131 since this is presumed to be seldom executed. */
4132 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4133 v
->add_val
, v
->new_reg
, insert_before
);
4136 /* Add code at loop start to initialize giv's reduced reg. */
4138 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4139 v
->add_val
, v
->new_reg
, loop_start
);
4143 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4146 For each giv register that can be reduced now: if replaceable,
4147 substitute reduced reg wherever the old giv occurs;
4148 else add new move insn "giv_reg = reduced_reg".
4150 Also check for givs whose first use is their definition and whose
4151 last use is the definition of another giv. If so, it is likely
4152 dead and should not be used to eliminate a biv. */
4153 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4155 if (v
->same
&& v
->same
->ignore
)
4161 if (v
->giv_type
== DEST_REG
4162 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4164 struct induction
*v1
;
4166 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4167 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4171 /* Update expression if this was combined, in case other giv was
4174 v
->new_reg
= replace_rtx (v
->new_reg
,
4175 v
->same
->dest_reg
, v
->same
->new_reg
);
4177 if (v
->giv_type
== DEST_ADDR
)
4178 /* Store reduced reg as the address in the memref where we found
4180 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4181 else if (v
->replaceable
)
4183 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4186 /* I can no longer duplicate the original problem. Perhaps
4187 this is unnecessary now? */
4189 /* Replaceable; it isn't strictly necessary to delete the old
4190 insn and emit a new one, because v->dest_reg is now dead.
4192 However, especially when unrolling loops, the special
4193 handling for (set REG0 REG1) in the second cse pass may
4194 make v->dest_reg live again. To avoid this problem, emit
4195 an insn to set the original giv reg from the reduced giv.
4196 We can not delete the original insn, since it may be part
4197 of a LIBCALL, and the code in flow that eliminates dead
4198 libcalls will fail if it is deleted. */
4199 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4205 /* Not replaceable; emit an insn to set the original giv reg from
4206 the reduced giv, same as above. */
4207 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4211 /* When a loop is reversed, givs which depend on the reversed
4212 biv, and which are live outside the loop, must be set to their
4213 correct final value. This insn is only needed if the giv is
4214 not replaceable. The correct final value is the same as the
4215 value that the giv starts the reversed loop with. */
4216 if (bl
->reversed
&& ! v
->replaceable
)
4217 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4218 v
->add_val
, v
->dest_reg
, end_insert_before
);
4219 else if (v
->final_value
)
4223 /* If the loop has multiple exits, emit the insn before the
4224 loop to ensure that it will always be executed no matter
4225 how the loop exits. Otherwise, emit the insn after the loop,
4226 since this is slightly more efficient. */
4227 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4228 insert_before
= loop_start
;
4230 insert_before
= end_insert_before
;
4231 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4235 /* If the insn to set the final value of the giv was emitted
4236 before the loop, then we must delete the insn inside the loop
4237 that sets it. If this is a LIBCALL, then we must delete
4238 every insn in the libcall. Note, however, that
4239 final_giv_value will only succeed when there are multiple
4240 exits if the giv is dead at each exit, hence it does not
4241 matter that the original insn remains because it is dead
4243 /* Delete the insn inside the loop that sets the giv since
4244 the giv is now set before (or after) the loop. */
4245 delete_insn (v
->insn
);
4249 if (loop_dump_stream
)
4251 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4252 INSN_UID (v
->insn
));
4253 print_rtl (loop_dump_stream
, v
->new_reg
);
4254 fprintf (loop_dump_stream
, "\n");
4258 /* All the givs based on the biv bl have been reduced if they
4261 /* For each giv not marked as maybe dead that has been combined with a
4262 second giv, clear any "maybe dead" mark on that second giv.
4263 v->new_reg will either be or refer to the register of the giv it
4266 Doing this clearing avoids problems in biv elimination where a
4267 giv's new_reg is a complex value that can't be put in the insn but
4268 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4269 Since the register will be used in either case, we'd prefer it be
4270 used from the simpler giv. */
4272 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4273 if (! v
->maybe_dead
&& v
->same
)
4274 v
->same
->maybe_dead
= 0;
4276 /* Try to eliminate the biv, if it is a candidate.
4277 This won't work if ! all_reduced,
4278 since the givs we planned to use might not have been reduced.
4280 We have to be careful that we didn't initially think we could eliminate
4281 this biv because of a giv that we now think may be dead and shouldn't
4282 be used as a biv replacement.
4284 Also, there is the possibility that we may have a giv that looks
4285 like it can be used to eliminate a biv, but the resulting insn
4286 isn't valid. This can happen, for example, on the 88k, where a
4287 JUMP_INSN can compare a register only with zero. Attempts to
4288 replace it with a compare with a constant will fail.
4290 Note that in cases where this call fails, we may have replaced some
4291 of the occurrences of the biv with a giv, but no harm was done in
4292 doing so in the rare cases where it can occur. */
4294 if (all_reduced
== 1 && bl
->eliminable
4295 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4296 threshold
, insn_count
))
4299 /* ?? If we created a new test to bypass the loop entirely,
4300 or otherwise drop straight in, based on this test, then
4301 we might want to rewrite it also. This way some later
4302 pass has more hope of removing the initialization of this
4305 /* If final_value != 0, then the biv may be used after loop end
4306 and we must emit an insn to set it just in case.
4308 Reversed bivs already have an insn after the loop setting their
4309 value, so we don't need another one. We can't calculate the
4310 proper final value for such a biv here anyways. */
4311 if (final_value
!= 0 && ! bl
->reversed
)
4315 /* If the loop has multiple exits, emit the insn before the
4316 loop to ensure that it will always be executed no matter
4317 how the loop exits. Otherwise, emit the insn after the
4318 loop, since this is slightly more efficient. */
4319 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4320 insert_before
= loop_start
;
4322 insert_before
= end_insert_before
;
4324 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4329 /* Delete all of the instructions inside the loop which set
4330 the biv, as they are all dead. If is safe to delete them,
4331 because an insn setting a biv will never be part of a libcall. */
4332 /* However, deleting them will invalidate the regno_last_uid info,
4333 so keeping them around is more convenient. Final_biv_value
4334 will only succeed when there are multiple exits if the biv
4335 is dead at each exit, hence it does not matter that the original
4336 insn remains, because it is dead anyways. */
4337 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4338 delete_insn (v
->insn
);
4341 if (loop_dump_stream
)
4342 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4347 /* Go through all the instructions in the loop, making all the
4348 register substitutions scheduled in REG_MAP. */
4350 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4351 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4352 || GET_CODE (p
) == CALL_INSN
)
4354 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4355 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4359 /* Unroll loops from within strength reduction so that we can use the
4360 induction variable information that strength_reduce has already
4364 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4367 /* instrument the loop with bct insn */
4368 #ifdef HAVE_decrement_and_branch_on_count
4369 if (HAVE_decrement_and_branch_on_count
)
4370 insert_bct (loop_start
, loop_end
);
4374 if (loop_dump_stream
)
4375 fprintf (loop_dump_stream
, "\n");
4378 /* Return 1 if X is a valid source for an initial value (or as value being
4379 compared against in an initial test).
4381 X must be either a register or constant and must not be clobbered between
4382 the current insn and the start of the loop.
4384 INSN is the insn containing X. */
4387 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4396 /* Only consider pseudos we know about initialized in insns whose luids
4398 if (GET_CODE (x
) != REG
4399 || REGNO (x
) >= max_reg_before_loop
)
4402 /* Don't use call-clobbered registers across a call which clobbers it. On
4403 some machines, don't use any hard registers at all. */
4404 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4405 && (SMALL_REGISTER_CLASSES
4406 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4409 /* Don't use registers that have been clobbered before the start of the
4411 if (reg_set_between_p (x
, insn
, loop_start
))
4417 /* Scan X for memory refs and check each memory address
4418 as a possible giv. INSN is the insn whose pattern X comes from.
4419 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4420 every loop iteration. */
4423 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4426 int not_every_iteration
;
4427 rtx loop_start
, loop_end
;
4430 register enum rtx_code code
;
4436 code
= GET_CODE (x
);
4460 benefit
= general_induction_var (XEXP (x
, 0),
4461 &src_reg
, &add_val
, &mult_val
);
4463 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4464 Such a giv isn't useful. */
4465 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4467 /* Found one; record it. */
4469 = (struct induction
*) oballoc (sizeof (struct induction
));
4471 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4472 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4473 &XEXP (x
, 0), loop_start
, loop_end
);
4475 v
->mem_mode
= GET_MODE (x
);
4484 /* Recursively scan the subexpressions for other mem refs. */
4486 fmt
= GET_RTX_FORMAT (code
);
4487 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4489 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4491 else if (fmt
[i
] == 'E')
4492 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4493 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4494 loop_start
, loop_end
);
4497 /* Fill in the data about one biv update.
4498 V is the `struct induction' in which we record the biv. (It is
4499 allocated by the caller, with alloca.)
4500 INSN is the insn that sets it.
4501 DEST_REG is the biv's reg.
4503 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4504 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4505 being set to INC_VAL.
4507 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4508 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4509 can be executed more than once per iteration. If MAYBE_MULTIPLE
4510 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4511 executed exactly once per iteration. */
4514 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4515 not_every_iteration
, maybe_multiple
)
4516 struct induction
*v
;
4521 int not_every_iteration
;
4524 struct iv_class
*bl
;
4527 v
->src_reg
= dest_reg
;
4528 v
->dest_reg
= dest_reg
;
4529 v
->mult_val
= mult_val
;
4530 v
->add_val
= inc_val
;
4531 v
->mode
= GET_MODE (dest_reg
);
4532 v
->always_computable
= ! not_every_iteration
;
4533 v
->always_executed
= ! not_every_iteration
;
4534 v
->maybe_multiple
= maybe_multiple
;
4536 /* Add this to the reg's iv_class, creating a class
4537 if this is the first incrementation of the reg. */
4539 bl
= reg_biv_class
[REGNO (dest_reg
)];
4542 /* Create and initialize new iv_class. */
4544 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4546 bl
->regno
= REGNO (dest_reg
);
4552 /* Set initial value to the reg itself. */
4553 bl
->initial_value
= dest_reg
;
4554 /* We haven't seen the initializing insn yet */
4557 bl
->initial_test
= 0;
4558 bl
->incremented
= 0;
4562 bl
->total_benefit
= 0;
4564 /* Add this class to loop_iv_list. */
4565 bl
->next
= loop_iv_list
;
4568 /* Put it in the array of biv register classes. */
4569 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4572 /* Update IV_CLASS entry for this biv. */
4573 v
->next_iv
= bl
->biv
;
4576 if (mult_val
== const1_rtx
)
4577 bl
->incremented
= 1;
4579 if (loop_dump_stream
)
4581 fprintf (loop_dump_stream
,
4582 "Insn %d: possible biv, reg %d,",
4583 INSN_UID (insn
), REGNO (dest_reg
));
4584 if (GET_CODE (inc_val
) == CONST_INT
)
4585 fprintf (loop_dump_stream
, " const = %d\n",
4589 fprintf (loop_dump_stream
, " const = ");
4590 print_rtl (loop_dump_stream
, inc_val
);
4591 fprintf (loop_dump_stream
, "\n");
4596 /* Fill in the data about one giv.
4597 V is the `struct induction' in which we record the giv. (It is
4598 allocated by the caller, with alloca.)
4599 INSN is the insn that sets it.
4600 BENEFIT estimates the savings from deleting this insn.
4601 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4602 into a register or is used as a memory address.
4604 SRC_REG is the biv reg which the giv is computed from.
4605 DEST_REG is the giv's reg (if the giv is stored in a reg).
4606 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4607 LOCATION points to the place where this giv's value appears in INSN. */
4610 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4611 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4612 struct induction
*v
;
4616 rtx mult_val
, add_val
;
4619 int not_every_iteration
;
4621 rtx loop_start
, loop_end
;
4623 struct induction
*b
;
4624 struct iv_class
*bl
;
4625 rtx set
= single_set (insn
);
4629 v
->src_reg
= src_reg
;
4631 v
->dest_reg
= dest_reg
;
4632 v
->mult_val
= mult_val
;
4633 v
->add_val
= add_val
;
4634 v
->benefit
= benefit
;
4635 v
->location
= location
;
4637 v
->combined_with
= 0;
4638 v
->maybe_multiple
= 0;
4640 v
->derive_adjustment
= 0;
4646 v
->auto_inc_opt
= 0;
4650 /* The v->always_computable field is used in update_giv_derive, to
4651 determine whether a giv can be used to derive another giv. For a
4652 DEST_REG giv, INSN computes a new value for the giv, so its value
4653 isn't computable if INSN insn't executed every iteration.
4654 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4655 it does not compute a new value. Hence the value is always computable
4656 regardless of whether INSN is executed each iteration. */
4658 if (type
== DEST_ADDR
)
4659 v
->always_computable
= 1;
4661 v
->always_computable
= ! not_every_iteration
;
4663 v
->always_executed
= ! not_every_iteration
;
4665 if (type
== DEST_ADDR
)
4667 v
->mode
= GET_MODE (*location
);
4671 else /* type == DEST_REG */
4673 v
->mode
= GET_MODE (SET_DEST (set
));
4675 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4676 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4678 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4680 /* If the lifetime is zero, it means that this register is
4681 really a dead store. So mark this as a giv that can be
4682 ignored. This will not prevent the biv from being eliminated. */
4683 if (v
->lifetime
== 0)
4686 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4687 reg_iv_info
[REGNO (dest_reg
)] = v
;
4690 /* Add the giv to the class of givs computed from one biv. */
4692 bl
= reg_biv_class
[REGNO (src_reg
)];
4695 v
->next_iv
= bl
->giv
;
4697 /* Don't count DEST_ADDR. This is supposed to count the number of
4698 insns that calculate givs. */
4699 if (type
== DEST_REG
)
4701 bl
->total_benefit
+= benefit
;
4704 /* Fatal error, biv missing for this giv? */
4707 if (type
== DEST_ADDR
)
4711 /* The giv can be replaced outright by the reduced register only if all
4712 of the following conditions are true:
4713 - the insn that sets the giv is always executed on any iteration
4714 on which the giv is used at all
4715 (there are two ways to deduce this:
4716 either the insn is executed on every iteration,
4717 or all uses follow that insn in the same basic block),
4718 - the giv is not used outside the loop
4719 - no assignments to the biv occur during the giv's lifetime. */
4721 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4722 /* Previous line always fails if INSN was moved by loop opt. */
4723 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4724 && (! not_every_iteration
4725 || last_use_this_basic_block (dest_reg
, insn
)))
4727 /* Now check that there are no assignments to the biv within the
4728 giv's lifetime. This requires two separate checks. */
4730 /* Check each biv update, and fail if any are between the first
4731 and last use of the giv.
4733 If this loop contains an inner loop that was unrolled, then
4734 the insn modifying the biv may have been emitted by the loop
4735 unrolling code, and hence does not have a valid luid. Just
4736 mark the biv as not replaceable in this case. It is not very
4737 useful as a biv, because it is used in two different loops.
4738 It is very unlikely that we would be able to optimize the giv
4739 using this biv anyways. */
4742 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4744 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4745 || ((uid_luid
[INSN_UID (b
->insn
)]
4746 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4747 && (uid_luid
[INSN_UID (b
->insn
)]
4748 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4751 v
->not_replaceable
= 1;
4756 /* If there are any backwards branches that go from after the
4757 biv update to before it, then this giv is not replaceable. */
4759 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4760 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4763 v
->not_replaceable
= 1;
4769 /* May still be replaceable, we don't have enough info here to
4772 v
->not_replaceable
= 0;
4776 if (loop_dump_stream
)
4778 if (type
== DEST_REG
)
4779 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4780 INSN_UID (insn
), REGNO (dest_reg
));
4782 fprintf (loop_dump_stream
, "Insn %d: dest address",
4785 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4786 REGNO (src_reg
), v
->benefit
);
4787 fprintf (loop_dump_stream
, " used %d lifetime %d",
4788 v
->times_used
, v
->lifetime
);
4791 fprintf (loop_dump_stream
, " replaceable");
4793 if (GET_CODE (mult_val
) == CONST_INT
)
4794 fprintf (loop_dump_stream
, " mult %d",
4798 fprintf (loop_dump_stream
, " mult ");
4799 print_rtl (loop_dump_stream
, mult_val
);
4802 if (GET_CODE (add_val
) == CONST_INT
)
4803 fprintf (loop_dump_stream
, " add %d",
4807 fprintf (loop_dump_stream
, " add ");
4808 print_rtl (loop_dump_stream
, add_val
);
4812 if (loop_dump_stream
)
4813 fprintf (loop_dump_stream
, "\n");
4818 /* All this does is determine whether a giv can be made replaceable because
4819 its final value can be calculated. This code can not be part of record_giv
4820 above, because final_giv_value requires that the number of loop iterations
4821 be known, and that can not be accurately calculated until after all givs
4822 have been identified. */
4825 check_final_value (v
, loop_start
, loop_end
)
4826 struct induction
*v
;
4827 rtx loop_start
, loop_end
;
4829 struct iv_class
*bl
;
4830 rtx final_value
= 0;
4832 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4834 /* DEST_ADDR givs will never reach here, because they are always marked
4835 replaceable above in record_giv. */
4837 /* The giv can be replaced outright by the reduced register only if all
4838 of the following conditions are true:
4839 - the insn that sets the giv is always executed on any iteration
4840 on which the giv is used at all
4841 (there are two ways to deduce this:
4842 either the insn is executed on every iteration,
4843 or all uses follow that insn in the same basic block),
4844 - its final value can be calculated (this condition is different
4845 than the one above in record_giv)
4846 - no assignments to the biv occur during the giv's lifetime. */
4849 /* This is only called now when replaceable is known to be false. */
4850 /* Clear replaceable, so that it won't confuse final_giv_value. */
4854 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4855 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4857 int biv_increment_seen
= 0;
4863 /* When trying to determine whether or not a biv increment occurs
4864 during the lifetime of the giv, we can ignore uses of the variable
4865 outside the loop because final_value is true. Hence we can not
4866 use regno_last_uid and regno_first_uid as above in record_giv. */
4868 /* Search the loop to determine whether any assignments to the
4869 biv occur during the giv's lifetime. Start with the insn
4870 that sets the giv, and search around the loop until we come
4871 back to that insn again.
4873 Also fail if there is a jump within the giv's lifetime that jumps
4874 to somewhere outside the lifetime but still within the loop. This
4875 catches spaghetti code where the execution order is not linear, and
4876 hence the above test fails. Here we assume that the giv lifetime
4877 does not extend from one iteration of the loop to the next, so as
4878 to make the test easier. Since the lifetime isn't known yet,
4879 this requires two loops. See also record_giv above. */
4881 last_giv_use
= v
->insn
;
4887 p
= NEXT_INSN (loop_start
);
4891 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4892 || GET_CODE (p
) == CALL_INSN
)
4894 if (biv_increment_seen
)
4896 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4899 v
->not_replaceable
= 1;
4903 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4904 biv_increment_seen
= 1;
4905 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4910 /* Now that the lifetime of the giv is known, check for branches
4911 from within the lifetime to outside the lifetime if it is still
4921 p
= NEXT_INSN (loop_start
);
4922 if (p
== last_giv_use
)
4925 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4926 && LABEL_NAME (JUMP_LABEL (p
))
4927 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4928 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4929 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4930 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4931 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4932 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4933 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4936 v
->not_replaceable
= 1;
4938 if (loop_dump_stream
)
4939 fprintf (loop_dump_stream
,
4940 "Found branch outside giv lifetime.\n");
4947 /* If it is replaceable, then save the final value. */
4949 v
->final_value
= final_value
;
4952 if (loop_dump_stream
&& v
->replaceable
)
4953 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4954 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4957 /* Update the status of whether a giv can derive other givs.
4959 We need to do something special if there is or may be an update to the biv
4960 between the time the giv is defined and the time it is used to derive
4963 In addition, a giv that is only conditionally set is not allowed to
4964 derive another giv once a label has been passed.
4966 The cases we look at are when a label or an update to a biv is passed. */
4969 update_giv_derive (p
)
4972 struct iv_class
*bl
;
4973 struct induction
*biv
, *giv
;
4977 /* Search all IV classes, then all bivs, and finally all givs.
4979 There are three cases we are concerned with. First we have the situation
4980 of a giv that is only updated conditionally. In that case, it may not
4981 derive any givs after a label is passed.
4983 The second case is when a biv update occurs, or may occur, after the
4984 definition of a giv. For certain biv updates (see below) that are
4985 known to occur between the giv definition and use, we can adjust the
4986 giv definition. For others, or when the biv update is conditional,
4987 we must prevent the giv from deriving any other givs. There are two
4988 sub-cases within this case.
4990 If this is a label, we are concerned with any biv update that is done
4991 conditionally, since it may be done after the giv is defined followed by
4992 a branch here (actually, we need to pass both a jump and a label, but
4993 this extra tracking doesn't seem worth it).
4995 If this is a jump, we are concerned about any biv update that may be
4996 executed multiple times. We are actually only concerned about
4997 backward jumps, but it is probably not worth performing the test
4998 on the jump again here.
5000 If this is a biv update, we must adjust the giv status to show that a
5001 subsequent biv update was performed. If this adjustment cannot be done,
5002 the giv cannot derive further givs. */
5004 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5005 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5006 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5009 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5011 /* If cant_derive is already true, there is no point in
5012 checking all of these conditions again. */
5013 if (giv
->cant_derive
)
5016 /* If this giv is conditionally set and we have passed a label,
5017 it cannot derive anything. */
5018 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5019 giv
->cant_derive
= 1;
5021 /* Skip givs that have mult_val == 0, since
5022 they are really invariants. Also skip those that are
5023 replaceable, since we know their lifetime doesn't contain
5025 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5028 /* The only way we can allow this giv to derive another
5029 is if this is a biv increment and we can form the product
5030 of biv->add_val and giv->mult_val. In this case, we will
5031 be able to compute a compensation. */
5032 else if (biv
->insn
== p
)
5036 if (biv
->mult_val
== const1_rtx
)
5037 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
5042 if (tem
&& giv
->derive_adjustment
)
5043 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
5044 giv
->derive_adjustment
),
5047 giv
->derive_adjustment
= tem
;
5049 giv
->cant_derive
= 1;
5051 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5052 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5053 giv
->cant_derive
= 1;
5058 /* Check whether an insn is an increment legitimate for a basic induction var.
5059 X is the source of insn P, or a part of it.
5060 MODE is the mode in which X should be interpreted.
5062 DEST_REG is the putative biv, also the destination of the insn.
5063 We accept patterns of these forms:
5064 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5065 REG = INVARIANT + REG
5067 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5068 and store the additive term into *INC_VAL.
5070 If X is an assignment of an invariant into DEST_REG, we set
5071 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5073 We also want to detect a BIV when it corresponds to a variable
5074 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5075 of the variable may be a PLUS that adds a SUBREG of that variable to
5076 an invariant and then sign- or zero-extends the result of the PLUS
5079 Most GIVs in such cases will be in the promoted mode, since that is the
5080 probably the natural computation mode (and almost certainly the mode
5081 used for addresses) on the machine. So we view the pseudo-reg containing
5082 the variable as the BIV, as if it were simply incremented.
5084 Note that treating the entire pseudo as a BIV will result in making
5085 simple increments to any GIVs based on it. However, if the variable
5086 overflows in its declared mode but not its promoted mode, the result will
5087 be incorrect. This is acceptable if the variable is signed, since
5088 overflows in such cases are undefined, but not if it is unsigned, since
5089 those overflows are defined. So we only check for SIGN_EXTEND and
5092 If we cannot find a biv, we return 0. */
5095 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5097 enum machine_mode mode
;
5103 register enum rtx_code code
;
5107 code
= GET_CODE (x
);
5111 if (XEXP (x
, 0) == dest_reg
5112 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5113 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5114 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5116 else if (XEXP (x
, 1) == dest_reg
5117 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5118 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5119 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5124 if (invariant_p (arg
) != 1)
5127 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5128 *mult_val
= const1_rtx
;
5132 /* If this is a SUBREG for a promoted variable, check the inner
5134 if (SUBREG_PROMOTED_VAR_P (x
))
5135 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5136 dest_reg
, p
, inc_val
, mult_val
);
5140 /* If this register is assigned in the previous insn, look at its
5141 source, but don't go outside the loop or past a label. */
5143 for (insn
= PREV_INSN (p
);
5144 (insn
&& GET_CODE (insn
) == NOTE
5145 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5146 insn
= PREV_INSN (insn
))
5150 set
= single_set (insn
);
5153 && (SET_DEST (set
) == x
5154 || (GET_CODE (SET_DEST (set
)) == SUBREG
5155 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5157 && SUBREG_REG (SET_DEST (set
)) == x
)))
5158 return basic_induction_var (SET_SRC (set
),
5159 (GET_MODE (SET_SRC (set
)) == VOIDmode
5161 : GET_MODE (SET_SRC (set
))),
5164 /* ... fall through ... */
5166 /* Can accept constant setting of biv only when inside inner most loop.
5167 Otherwise, a biv of an inner loop may be incorrectly recognized
5168 as a biv of the outer loop,
5169 causing code to be moved INTO the inner loop. */
5171 if (invariant_p (x
) != 1)
5176 if (loops_enclosed
== 1)
5178 /* Possible bug here? Perhaps we don't know the mode of X. */
5179 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5180 *mult_val
= const0_rtx
;
5187 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5188 dest_reg
, p
, inc_val
, mult_val
);
5190 /* Similar, since this can be a sign extension. */
5191 for (insn
= PREV_INSN (p
);
5192 (insn
&& GET_CODE (insn
) == NOTE
5193 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5194 insn
= PREV_INSN (insn
))
5198 set
= single_set (insn
);
5200 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5201 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5202 && INTVAL (XEXP (x
, 1)) >= 0
5203 && GET_CODE (SET_SRC (set
)) == ASHIFT
5204 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5205 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5206 GET_MODE (XEXP (x
, 0)),
5207 dest_reg
, insn
, inc_val
, mult_val
);
5215 /* A general induction variable (giv) is any quantity that is a linear
5216 function of a basic induction variable,
5217 i.e. giv = biv * mult_val + add_val.
5218 The coefficients can be any loop invariant quantity.
5219 A giv need not be computed directly from the biv;
5220 it can be computed by way of other givs. */
5222 /* Determine whether X computes a giv.
5223 If it does, return a nonzero value
5224 which is the benefit from eliminating the computation of X;
5225 set *SRC_REG to the register of the biv that it is computed from;
5226 set *ADD_VAL and *MULT_VAL to the coefficients,
5227 such that the value of X is biv * mult + add; */
5230 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5240 /* If this is an invariant, forget it, it isn't a giv. */
5241 if (invariant_p (x
) == 1)
5244 /* See if the expression could be a giv and get its form.
5245 Mark our place on the obstack in case we don't find a giv. */
5246 storage
= (char *) oballoc (0);
5247 x
= simplify_giv_expr (x
, &benefit
);
5254 switch (GET_CODE (x
))
5258 /* Since this is now an invariant and wasn't before, it must be a giv
5259 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5261 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5262 *mult_val
= const0_rtx
;
5267 /* This is equivalent to a BIV. */
5269 *mult_val
= const1_rtx
;
5270 *add_val
= const0_rtx
;
5274 /* Either (plus (biv) (invar)) or
5275 (plus (mult (biv) (invar_1)) (invar_2)). */
5276 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5278 *src_reg
= XEXP (XEXP (x
, 0), 0);
5279 *mult_val
= XEXP (XEXP (x
, 0), 1);
5283 *src_reg
= XEXP (x
, 0);
5284 *mult_val
= const1_rtx
;
5286 *add_val
= XEXP (x
, 1);
5290 /* ADD_VAL is zero. */
5291 *src_reg
= XEXP (x
, 0);
5292 *mult_val
= XEXP (x
, 1);
5293 *add_val
= const0_rtx
;
5300 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5301 unless they are CONST_INT). */
5302 if (GET_CODE (*add_val
) == USE
)
5303 *add_val
= XEXP (*add_val
, 0);
5304 if (GET_CODE (*mult_val
) == USE
)
5305 *mult_val
= XEXP (*mult_val
, 0);
5307 benefit
+= rtx_cost (orig_x
, SET
);
5309 /* Always return some benefit if this is a giv so it will be detected
5310 as such. This allows elimination of bivs that might otherwise
5311 not be eliminated. */
5312 return benefit
== 0 ? 1 : benefit
;
5315 /* Given an expression, X, try to form it as a linear function of a biv.
5316 We will canonicalize it to be of the form
5317 (plus (mult (BIV) (invar_1))
5319 with possible degeneracies.
5321 The invariant expressions must each be of a form that can be used as a
5322 machine operand. We surround then with a USE rtx (a hack, but localized
5323 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5324 routine; it is the caller's responsibility to strip them.
5326 If no such canonicalization is possible (i.e., two biv's are used or an
5327 expression that is neither invariant nor a biv or giv), this routine
5330 For a non-zero return, the result will have a code of CONST_INT, USE,
5331 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5333 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5336 simplify_giv_expr (x
, benefit
)
5340 enum machine_mode mode
= GET_MODE (x
);
5344 /* If this is not an integer mode, or if we cannot do arithmetic in this
5345 mode, this can't be a giv. */
5346 if (mode
!= VOIDmode
5347 && (GET_MODE_CLASS (mode
) != MODE_INT
5348 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5351 switch (GET_CODE (x
))
5354 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5355 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5356 if (arg0
== 0 || arg1
== 0)
5359 /* Put constant last, CONST_INT last if both constant. */
5360 if ((GET_CODE (arg0
) == USE
5361 || GET_CODE (arg0
) == CONST_INT
)
5362 && GET_CODE (arg1
) != CONST_INT
)
5363 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5365 /* Handle addition of zero, then addition of an invariant. */
5366 if (arg1
== const0_rtx
)
5368 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5369 switch (GET_CODE (arg0
))
5373 /* Both invariant. Only valid if sum is machine operand.
5374 First strip off possible USE on the operands. */
5375 if (GET_CODE (arg0
) == USE
)
5376 arg0
= XEXP (arg0
, 0);
5378 if (GET_CODE (arg1
) == USE
)
5379 arg1
= XEXP (arg1
, 0);
5382 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5384 tem
= plus_constant (arg0
, INTVAL (arg1
));
5385 if (GET_CODE (tem
) != CONST_INT
)
5386 tem
= gen_rtx (USE
, mode
, tem
);
5390 /* Adding two invariants must result in an invariant,
5391 so enclose addition operation inside a USE and
5393 tem
= gen_rtx (USE
, mode
, gen_rtx (PLUS
, mode
, arg0
, arg1
));
5400 /* biv + invar or mult + invar. Return sum. */
5401 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5404 /* (a + invar_1) + invar_2. Associate. */
5405 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5407 gen_rtx (PLUS
, mode
,
5408 XEXP (arg0
, 1), arg1
)),
5415 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5416 MULT to reduce cases. */
5417 if (GET_CODE (arg0
) == REG
)
5418 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5419 if (GET_CODE (arg1
) == REG
)
5420 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5422 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5423 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5424 Recurse to associate the second PLUS. */
5425 if (GET_CODE (arg1
) == MULT
)
5426 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5428 if (GET_CODE (arg1
) == PLUS
)
5429 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5430 gen_rtx (PLUS
, mode
,
5431 arg0
, XEXP (arg1
, 0)),
5435 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5436 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5439 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5442 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5444 gen_rtx (PLUS
, mode
,
5450 /* Handle "a - b" as "a + b * (-1)". */
5451 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5453 gen_rtx (MULT
, mode
,
5454 XEXP (x
, 1), constm1_rtx
)),
5458 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5459 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5460 if (arg0
== 0 || arg1
== 0)
5463 /* Put constant last, CONST_INT last if both constant. */
5464 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5465 && GET_CODE (arg1
) != CONST_INT
)
5466 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5468 /* If second argument is not now constant, not giv. */
5469 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5472 /* Handle multiply by 0 or 1. */
5473 if (arg1
== const0_rtx
)
5476 else if (arg1
== const1_rtx
)
5479 switch (GET_CODE (arg0
))
5482 /* biv * invar. Done. */
5483 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5486 /* Product of two constants. */
5487 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5490 /* invar * invar. Not giv. */
5494 /* (a * invar_1) * invar_2. Associate. */
5495 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5497 gen_rtx (MULT
, mode
,
5498 XEXP (arg0
, 1), arg1
)),
5502 /* (a + invar_1) * invar_2. Distribute. */
5503 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5504 gen_rtx (MULT
, mode
,
5505 XEXP (arg0
, 0), arg1
),
5506 gen_rtx (MULT
, mode
,
5507 XEXP (arg0
, 1), arg1
)),
5515 /* Shift by constant is multiply by power of two. */
5516 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5519 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5521 GEN_INT ((HOST_WIDE_INT
) 1
5522 << INTVAL (XEXP (x
, 1)))),
5526 /* "-a" is "a * (-1)" */
5527 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5531 /* "~a" is "-a - 1". Silly, but easy. */
5532 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5533 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5538 /* Already in proper form for invariant. */
5542 /* If this is a new register, we can't deal with it. */
5543 if (REGNO (x
) >= max_reg_before_loop
)
5546 /* Check for biv or giv. */
5547 switch (reg_iv_type
[REGNO (x
)])
5551 case GENERAL_INDUCT
:
5553 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5555 /* Form expression from giv and add benefit. Ensure this giv
5556 can derive another and subtract any needed adjustment if so. */
5557 *benefit
+= v
->benefit
;
5561 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5562 v
->src_reg
, v
->mult_val
),
5564 if (v
->derive_adjustment
)
5565 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5566 return simplify_giv_expr (tem
, benefit
);
5573 /* Fall through to general case. */
5575 /* If invariant, return as USE (unless CONST_INT).
5576 Otherwise, not giv. */
5577 if (GET_CODE (x
) == USE
)
5580 if (invariant_p (x
) == 1)
5582 if (GET_CODE (x
) == CONST_INT
)
5585 return gen_rtx (USE
, mode
, x
);
5592 /* Help detect a giv that is calculated by several consecutive insns;
5596 The caller has already identified the first insn P as having a giv as dest;
5597 we check that all other insns that set the same register follow
5598 immediately after P, that they alter nothing else,
5599 and that the result of the last is still a giv.
5601 The value is 0 if the reg set in P is not really a giv.
5602 Otherwise, the value is the amount gained by eliminating
5603 all the consecutive insns that compute the value.
5605 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5606 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5608 The coefficients of the ultimate giv value are stored in
5609 *MULT_VAL and *ADD_VAL. */
5612 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5627 /* Indicate that this is a giv so that we can update the value produced in
5628 each insn of the multi-insn sequence.
5630 This induction structure will be used only by the call to
5631 general_induction_var below, so we can allocate it on our stack.
5632 If this is a giv, our caller will replace the induct var entry with
5633 a new induction structure. */
5635 = (struct induction
*) alloca (sizeof (struct induction
));
5636 v
->src_reg
= src_reg
;
5637 v
->mult_val
= *mult_val
;
5638 v
->add_val
= *add_val
;
5639 v
->benefit
= first_benefit
;
5641 v
->derive_adjustment
= 0;
5643 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5644 reg_iv_info
[REGNO (dest_reg
)] = v
;
5646 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5651 code
= GET_CODE (p
);
5653 /* If libcall, skip to end of call sequence. */
5654 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5658 && (set
= single_set (p
))
5659 && GET_CODE (SET_DEST (set
)) == REG
5660 && SET_DEST (set
) == dest_reg
5661 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5663 /* Giv created by equivalent expression. */
5664 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5665 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5666 add_val
, mult_val
))))
5667 && src_reg
== v
->src_reg
)
5669 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5670 benefit
+= libcall_benefit (p
);
5673 v
->mult_val
= *mult_val
;
5674 v
->add_val
= *add_val
;
5675 v
->benefit
= benefit
;
5677 else if (code
!= NOTE
)
5679 /* Allow insns that set something other than this giv to a
5680 constant. Such insns are needed on machines which cannot
5681 include long constants and should not disqualify a giv. */
5683 && (set
= single_set (p
))
5684 && SET_DEST (set
) != dest_reg
5685 && CONSTANT_P (SET_SRC (set
)))
5688 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5696 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5697 represented by G1. If no such expression can be found, or it is clear that
5698 it cannot possibly be a valid address, 0 is returned.
5700 To perform the computation, we note that
5703 where `v' is the biv.
5705 So G2 = (c/a) * G1 + (d - b*c/a) */
5709 express_from (g1
, g2
)
5710 struct induction
*g1
, *g2
;
5714 /* The value that G1 will be multiplied by must be a constant integer. Also,
5715 the only chance we have of getting a valid address is if b*c/a (see above
5716 for notation) is also an integer. */
5717 if (GET_CODE (g1
->mult_val
) != CONST_INT
5718 || GET_CODE (g2
->mult_val
) != CONST_INT
5719 || GET_CODE (g1
->add_val
) != CONST_INT
5720 || g1
->mult_val
== const0_rtx
5721 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5724 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5725 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5727 /* Form simplified final result. */
5728 if (mult
== const0_rtx
)
5730 else if (mult
== const1_rtx
)
5731 mult
= g1
->dest_reg
;
5733 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5735 if (add
== const0_rtx
)
5738 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5742 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5743 (either directly or via an address expression) a register used to represent
5744 G1. Set g2->new_reg to a represtation of G1 (normally just
5748 combine_givs_p (g1
, g2
)
5749 struct induction
*g1
, *g2
;
5753 /* If these givs are identical, they can be combined. */
5754 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5755 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5757 g2
->new_reg
= g1
->dest_reg
;
5762 /* If G2 can be expressed as a function of G1 and that function is valid
5763 as an address and no more expensive than using a register for G2,
5764 the expression of G2 in terms of G1 can be used. */
5765 if (g2
->giv_type
== DEST_ADDR
5766 && (tem
= express_from (g1
, g2
)) != 0
5767 && memory_address_p (g2
->mem_mode
, tem
)
5768 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5778 #ifdef GIV_SORT_CRITERION
5779 /* Compare two givs and sort the most desirable one for combinations first.
5780 This is used only in one qsort call below. */
5784 struct induction
**x
, **y
;
5786 GIV_SORT_CRITERION (*x
, *y
);
5792 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5793 any other. If so, point SAME to the giv combined with and set NEW_REG to
5794 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5795 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5799 struct iv_class
*bl
;
5801 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5802 int i
, j
, giv_count
, pass
;
5804 /* Count givs, because bl->giv_count is incorrect here. */
5806 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5810 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5812 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5813 giv_array
[i
++] = g1
;
5815 #ifdef GIV_SORT_CRITERION
5816 /* Sort the givs if GIV_SORT_CRITERION is defined.
5817 This is usually defined for processors which lack
5818 negative register offsets so more givs may be combined. */
5820 if (loop_dump_stream
)
5821 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5823 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5826 for (i
= 0; i
< giv_count
; i
++)
5829 for (pass
= 0; pass
<= 1; pass
++)
5830 for (j
= 0; j
< giv_count
; j
++)
5834 /* First try to combine with replaceable givs, then all givs. */
5835 && (g1
->replaceable
|| pass
== 1)
5836 /* If either has already been combined or is to be ignored, can't
5838 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5839 /* If something has been based on G2, G2 cannot itself be based
5840 on something else. */
5841 && ! g2
->combined_with
5842 && combine_givs_p (g1
, g2
))
5844 /* g2->new_reg set by `combine_givs_p' */
5846 g1
->combined_with
= 1;
5848 /* If one of these givs is a DEST_REG that was only used
5849 once, by the other giv, this is actually a single use.
5850 The DEST_REG has the correct cost, while the other giv
5851 counts the REG use too often. */
5852 if (g2
->giv_type
== DEST_REG
5853 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5854 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5855 g1
->benefit
= g2
->benefit
;
5856 else if (g1
->giv_type
!= DEST_REG
5857 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5858 || ! reg_mentioned_p (g1
->dest_reg
,
5859 PATTERN (g2
->insn
)))
5861 g1
->benefit
+= g2
->benefit
;
5862 g1
->times_used
+= g2
->times_used
;
5864 /* ??? The new final_[bg]iv_value code does a much better job
5865 of finding replaceable giv's, and hence this code may no
5866 longer be necessary. */
5867 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5868 g1
->benefit
-= copy_cost
;
5869 g1
->lifetime
+= g2
->lifetime
;
5871 if (loop_dump_stream
)
5872 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5873 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5879 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5882 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5883 rtx b
; /* initial value of basic induction variable */
5884 rtx m
; /* multiplicative constant */
5885 rtx a
; /* additive constant */
5886 rtx reg
; /* destination register */
5892 /* Prevent unexpected sharing of these rtx. */
5896 /* Increase the lifetime of any invariants moved further in code. */
5897 update_reg_last_use (a
, insert_before
);
5898 update_reg_last_use (b
, insert_before
);
5899 update_reg_last_use (m
, insert_before
);
5902 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5904 emit_move_insn (reg
, result
);
5905 seq
= gen_sequence ();
5908 emit_insn_before (seq
, insert_before
);
5910 record_base_value (REGNO (reg
), b
);
5913 /* Test whether A * B can be computed without
5914 an actual multiply insn. Value is 1 if so. */
5917 product_cheap_p (a
, b
)
5923 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5924 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5927 /* If only one is constant, make it B. */
5928 if (GET_CODE (a
) == CONST_INT
)
5929 tmp
= a
, a
= b
, b
= tmp
;
5931 /* If first constant, both constant, so don't need multiply. */
5932 if (GET_CODE (a
) == CONST_INT
)
5935 /* If second not constant, neither is constant, so would need multiply. */
5936 if (GET_CODE (b
) != CONST_INT
)
5939 /* One operand is constant, so might not need multiply insn. Generate the
5940 code for the multiply and see if a call or multiply, or long sequence
5941 of insns is generated. */
5943 rtl_obstack
= &temp_obstack
;
5945 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5946 tmp
= gen_sequence ();
5949 if (GET_CODE (tmp
) == SEQUENCE
)
5951 if (XVEC (tmp
, 0) == 0)
5953 else if (XVECLEN (tmp
, 0) > 3)
5956 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5958 rtx insn
= XVECEXP (tmp
, 0, i
);
5960 if (GET_CODE (insn
) != INSN
5961 || (GET_CODE (PATTERN (insn
)) == SET
5962 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5963 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5964 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5965 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5972 else if (GET_CODE (tmp
) == SET
5973 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5975 else if (GET_CODE (tmp
) == PARALLEL
5976 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5977 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5980 /* Free any storage we obtained in generating this multiply and restore rtl
5981 allocation to its normal obstack. */
5982 obstack_free (&temp_obstack
, storage
);
5983 rtl_obstack
= old_rtl_obstack
;
5988 /* Check to see if loop can be terminated by a "decrement and branch until
5989 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5990 Also try reversing an increment loop to a decrement loop
5991 to see if the optimization can be performed.
5992 Value is nonzero if optimization was performed. */
5994 /* This is useful even if the architecture doesn't have such an insn,
5995 because it might change a loops which increments from 0 to n to a loop
5996 which decrements from n to 0. A loop that decrements to zero is usually
5997 faster than one that increments from zero. */
5999 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6000 such as approx_final_value, biv_total_increment, loop_iterations, and
6001 final_[bg]iv_value. */
6004 check_dbra_loop (loop_end
, insn_count
, loop_start
)
6009 struct iv_class
*bl
;
6016 rtx before_comparison
;
6019 /* If last insn is a conditional branch, and the insn before tests a
6020 register value, try to optimize it. Otherwise, we can't do anything. */
6022 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
6023 if (comparison
== 0)
6026 /* Check all of the bivs to see if the compare uses one of them.
6027 Skip biv's set more than once because we can't guarantee that
6028 it will be zero on the last iteration. Also skip if the biv is
6029 used between its update and the test insn. */
6031 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6033 if (bl
->biv_count
== 1
6034 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6035 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6036 PREV_INSN (PREV_INSN (loop_end
))))
6043 /* Look for the case where the basic induction variable is always
6044 nonnegative, and equals zero on the last iteration.
6045 In this case, add a reg_note REG_NONNEG, which allows the
6046 m68k DBRA instruction to be used. */
6048 if (((GET_CODE (comparison
) == GT
6049 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6050 && INTVAL (XEXP (comparison
, 1)) == -1)
6051 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6052 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6053 && INTVAL (bl
->biv
->add_val
) < 0)
6055 /* Initial value must be greater than 0,
6056 init_val % -dec_value == 0 to ensure that it equals zero on
6057 the last iteration */
6059 if (GET_CODE (bl
->initial_value
) == CONST_INT
6060 && INTVAL (bl
->initial_value
) > 0
6061 && (INTVAL (bl
->initial_value
)
6062 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6064 /* register always nonnegative, add REG_NOTE to branch */
6065 REG_NOTES (PREV_INSN (loop_end
))
6066 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6067 REG_NOTES (PREV_INSN (loop_end
)));
6073 /* If the decrement is 1 and the value was tested as >= 0 before
6074 the loop, then we can safely optimize. */
6075 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6077 if (GET_CODE (p
) == CODE_LABEL
)
6079 if (GET_CODE (p
) != JUMP_INSN
)
6082 before_comparison
= get_condition_for_loop (p
);
6083 if (before_comparison
6084 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6085 && GET_CODE (before_comparison
) == LT
6086 && XEXP (before_comparison
, 1) == const0_rtx
6087 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6088 && INTVAL (bl
->biv
->add_val
) == -1)
6090 REG_NOTES (PREV_INSN (loop_end
))
6091 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6092 REG_NOTES (PREV_INSN (loop_end
)));
6099 else if (num_mem_sets
<= 1)
6101 /* Try to change inc to dec, so can apply above optimization. */
6103 all registers modified are induction variables or invariant,
6104 all memory references have non-overlapping addresses
6105 (obviously true if only one write)
6106 allow 2 insns for the compare/jump at the end of the loop. */
6107 /* Also, we must avoid any instructions which use both the reversed
6108 biv and another biv. Such instructions will fail if the loop is
6109 reversed. We meet this condition by requiring that either
6110 no_use_except_counting is true, or else that there is only
6112 int num_nonfixed_reads
= 0;
6113 /* 1 if the iteration var is used only to count iterations. */
6114 int no_use_except_counting
= 0;
6115 /* 1 if the loop has no memory store, or it has a single memory store
6116 which is reversible. */
6117 int reversible_mem_store
= 1;
6119 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6120 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6121 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6123 if (bl
->giv_count
== 0
6124 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6126 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6128 /* If there are no givs for this biv, and the only exit is the
6129 fall through at the end of the the loop, then
6130 see if perhaps there are no uses except to count. */
6131 no_use_except_counting
= 1;
6132 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6133 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6135 rtx set
= single_set (p
);
6137 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6138 && REGNO (SET_DEST (set
)) == bl
->regno
)
6139 /* An insn that sets the biv is okay. */
6141 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6142 || p
== prev_nonnote_insn (loop_end
))
6143 /* Don't bother about the end test. */
6145 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6146 /* Any other use of the biv is no good. */
6148 no_use_except_counting
= 0;
6154 /* If the loop has a single store, and the destination address is
6155 invariant, then we can't reverse the loop, because this address
6156 might then have the wrong value at loop exit.
6157 This would work if the source was invariant also, however, in that
6158 case, the insn should have been moved out of the loop. */
6160 if (num_mem_sets
== 1)
6161 reversible_mem_store
6162 = (! unknown_address_altered
6163 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6165 /* This code only acts for innermost loops. Also it simplifies
6166 the memory address check by only reversing loops with
6167 zero or one memory access.
6168 Two memory accesses could involve parts of the same array,
6169 and that can't be reversed. */
6171 if (num_nonfixed_reads
<= 1
6173 && !loop_has_volatile
6174 && reversible_mem_store
6175 && (no_use_except_counting
6176 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6177 + num_movables
+ 2 == insn_count
)
6178 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6182 /* Loop can be reversed. */
6183 if (loop_dump_stream
)
6184 fprintf (loop_dump_stream
, "Can reverse loop\n");
6186 /* Now check other conditions:
6188 The increment must be a constant and the comparison code
6191 This test can probably be improved since +/- 1 in the constant
6192 can be obtained by changing LT to LE and vice versa; this is
6196 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6197 /* LE gets turned into LT */
6198 && GET_CODE (comparison
) == LT
)
6200 HOST_WIDE_INT add_val
, comparison_val
;
6203 add_val
= INTVAL (bl
->biv
->add_val
);
6204 comparison_val
= INTVAL (XEXP (comparison
, 1));
6205 initial_value
= bl
->initial_value
;
6207 /* Normalize the initial value if it has no other use
6208 except as a counter. This will allow a few more loops
6210 if (no_use_except_counting
)
6212 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
6213 initial_value
= const0_rtx
;
6216 /* If the initial value is not zero, or if the comparison
6217 value is not an exact multiple of the increment, then we
6218 can not reverse this loop. */
6219 if (initial_value
!= const0_rtx
6220 || (comparison_val
% add_val
) != 0)
6223 /* Reset these in case we normalized the initial value
6224 and comparison value above. */
6225 bl
->initial_value
= initial_value
;
6226 XEXP (comparison
, 1) = GEN_INT (comparison_val
);
6228 /* Register will always be nonnegative, with value
6229 0 on last iteration if loop reversed */
6231 /* Save some info needed to produce the new insns. */
6232 reg
= bl
->biv
->dest_reg
;
6233 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6234 if (jump_label
== pc_rtx
)
6235 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6236 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6238 final_value
= XEXP (comparison
, 1);
6239 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6240 - INTVAL (bl
->biv
->add_val
));
6242 /* Initialize biv to start_value before loop start.
6243 The old initializing insn will be deleted as a
6244 dead store by flow.c. */
6245 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6247 /* Add insn to decrement register, and delete insn
6248 that incremented the register. */
6249 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6251 delete_insn (bl
->biv
->insn
);
6253 /* Update biv info to reflect its new status. */
6255 bl
->initial_value
= start_value
;
6256 bl
->biv
->add_val
= new_add_val
;
6258 /* Inc LABEL_NUSES so that delete_insn will
6259 not delete the label. */
6260 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6262 /* Emit an insn after the end of the loop to set the biv's
6263 proper exit value if it is used anywhere outside the loop. */
6264 if ((REGNO_LAST_UID (bl
->regno
)
6265 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6267 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6268 emit_insn_after (gen_move_insn (reg
, final_value
),
6271 /* Delete compare/branch at end of loop. */
6272 delete_insn (PREV_INSN (loop_end
));
6273 delete_insn (PREV_INSN (loop_end
));
6275 /* Add new compare/branch insn at end of loop. */
6277 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6278 GET_MODE (reg
), 0, 0);
6279 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6280 tem
= gen_sequence ();
6282 emit_jump_insn_before (tem
, loop_end
);
6284 for (tem
= PREV_INSN (loop_end
);
6285 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6289 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6291 /* Increment of LABEL_NUSES done above. */
6292 /* Register is now always nonnegative,
6293 so add REG_NONNEG note to the branch. */
6294 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6300 /* Mark that this biv has been reversed. Each giv which depends
6301 on this biv, and which is also live past the end of the loop
6302 will have to be fixed up. */
6306 if (loop_dump_stream
)
6307 fprintf (loop_dump_stream
,
6308 "Reversed loop and added reg_nonneg\n");
6318 /* Verify whether the biv BL appears to be eliminable,
6319 based on the insns in the loop that refer to it.
6320 LOOP_START is the first insn of the loop, and END is the end insn.
6322 If ELIMINATE_P is non-zero, actually do the elimination.
6324 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6325 determine whether invariant insns should be placed inside or at the
6326 start of the loop. */
6329 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6330 struct iv_class
*bl
;
6334 int threshold
, insn_count
;
6336 rtx reg
= bl
->biv
->dest_reg
;
6339 /* Scan all insns in the loop, stopping if we find one that uses the
6340 biv in a way that we cannot eliminate. */
6342 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6344 enum rtx_code code
= GET_CODE (p
);
6345 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6347 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6348 && reg_mentioned_p (reg
, PATTERN (p
))
6349 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6351 if (loop_dump_stream
)
6352 fprintf (loop_dump_stream
,
6353 "Cannot eliminate biv %d: biv used in insn %d.\n",
6354 bl
->regno
, INSN_UID (p
));
6361 if (loop_dump_stream
)
6362 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6363 bl
->regno
, eliminate_p
? "was" : "can be");
6370 /* If BL appears in X (part of the pattern of INSN), see if we can
6371 eliminate its use. If so, return 1. If not, return 0.
6373 If BIV does not appear in X, return 1.
6375 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6376 where extra insns should be added. Depending on how many items have been
6377 moved out of the loop, it will either be before INSN or at the start of
6381 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6383 struct iv_class
*bl
;
6387 enum rtx_code code
= GET_CODE (x
);
6388 rtx reg
= bl
->biv
->dest_reg
;
6389 enum machine_mode mode
= GET_MODE (reg
);
6390 struct induction
*v
;
6399 /* If we haven't already been able to do something with this BIV,
6400 we can't eliminate it. */
6406 /* If this sets the BIV, it is not a problem. */
6407 if (SET_DEST (x
) == reg
)
6410 /* If this is an insn that defines a giv, it is also ok because
6411 it will go away when the giv is reduced. */
6412 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6413 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6417 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6419 /* Can replace with any giv that was reduced and
6420 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6421 Require a constant for MULT_VAL, so we know it's nonzero.
6422 ??? We disable this optimization to avoid potential
6425 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6426 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6427 && v
->add_val
== const0_rtx
6428 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6432 /* If the giv V had the auto-inc address optimization applied
6433 to it, and INSN occurs between the giv insn and the biv
6434 insn, then we must adjust the value used here.
6435 This is rare, so we don't bother to do so. */
6437 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6438 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6439 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6440 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6446 /* If the giv has the opposite direction of change,
6447 then reverse the comparison. */
6448 if (INTVAL (v
->mult_val
) < 0)
6449 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6450 const0_rtx
, v
->new_reg
);
6454 /* We can probably test that giv's reduced reg. */
6455 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6459 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6460 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6461 Require a constant for MULT_VAL, so we know it's nonzero.
6462 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6463 overflow problem. */
6465 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6466 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6467 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6469 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6470 || GET_CODE (v
->add_val
) == LABEL_REF
6471 || GET_CODE (v
->add_val
) == CONST
6472 || (GET_CODE (v
->add_val
) == REG
6473 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6475 /* If the giv V had the auto-inc address optimization applied
6476 to it, and INSN occurs between the giv insn and the biv
6477 insn, then we must adjust the value used here.
6478 This is rare, so we don't bother to do so. */
6480 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6481 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6482 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6483 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6489 /* If the giv has the opposite direction of change,
6490 then reverse the comparison. */
6491 if (INTVAL (v
->mult_val
) < 0)
6492 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6495 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6496 copy_rtx (v
->add_val
));
6498 /* Replace biv with the giv's reduced register. */
6499 update_reg_last_use (v
->add_val
, insn
);
6500 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6503 /* Insn doesn't support that constant or invariant. Copy it
6504 into a register (it will be a loop invariant.) */
6505 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6507 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6510 /* Substitute the new register for its invariant value in
6511 the compare expression. */
6512 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6513 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6522 case GT
: case GE
: case GTU
: case GEU
:
6523 case LT
: case LE
: case LTU
: case LEU
:
6524 /* See if either argument is the biv. */
6525 if (XEXP (x
, 0) == reg
)
6526 arg
= XEXP (x
, 1), arg_operand
= 1;
6527 else if (XEXP (x
, 1) == reg
)
6528 arg
= XEXP (x
, 0), arg_operand
= 0;
6532 if (CONSTANT_P (arg
))
6534 /* First try to replace with any giv that has constant positive
6535 mult_val and constant add_val. We might be able to support
6536 negative mult_val, but it seems complex to do it in general. */
6538 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6539 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6540 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6541 || GET_CODE (v
->add_val
) == LABEL_REF
6542 || GET_CODE (v
->add_val
) == CONST
6543 || (GET_CODE (v
->add_val
) == REG
6544 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6545 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6548 /* If the giv V had the auto-inc address optimization applied
6549 to it, and INSN occurs between the giv insn and the biv
6550 insn, then we must adjust the value used here.
6551 This is rare, so we don't bother to do so. */
6553 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6554 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6555 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6556 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6562 /* Replace biv with the giv's reduced reg. */
6563 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6565 /* If all constants are actually constant integers and
6566 the derived constant can be directly placed in the COMPARE,
6568 if (GET_CODE (arg
) == CONST_INT
6569 && GET_CODE (v
->mult_val
) == CONST_INT
6570 && GET_CODE (v
->add_val
) == CONST_INT
6571 && validate_change (insn
, &XEXP (x
, arg_operand
),
6572 GEN_INT (INTVAL (arg
)
6573 * INTVAL (v
->mult_val
)
6574 + INTVAL (v
->add_val
)), 0))
6577 /* Otherwise, load it into a register. */
6578 tem
= gen_reg_rtx (mode
);
6579 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6580 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6583 /* If that failed, put back the change we made above. */
6584 XEXP (x
, 1-arg_operand
) = reg
;
6587 /* Look for giv with positive constant mult_val and nonconst add_val.
6588 Insert insns to calculate new compare value.
6589 ??? Turn this off due to possible overflow. */
6591 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6592 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6593 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6599 /* If the giv V had the auto-inc address optimization applied
6600 to it, and INSN occurs between the giv insn and the biv
6601 insn, then we must adjust the value used here.
6602 This is rare, so we don't bother to do so. */
6604 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6605 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6606 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6607 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6613 tem
= gen_reg_rtx (mode
);
6615 /* Replace biv with giv's reduced register. */
6616 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6619 /* Compute value to compare against. */
6620 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6621 /* Use it in this insn. */
6622 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6623 if (apply_change_group ())
6627 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6629 if (invariant_p (arg
) == 1)
6631 /* Look for giv with constant positive mult_val and nonconst
6632 add_val. Insert insns to compute new compare value.
6633 ??? Turn this off due to possible overflow. */
6635 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6636 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6637 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6643 /* If the giv V had the auto-inc address optimization applied
6644 to it, and INSN occurs between the giv insn and the biv
6645 insn, then we must adjust the value used here.
6646 This is rare, so we don't bother to do so. */
6648 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6649 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6650 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6651 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6657 tem
= gen_reg_rtx (mode
);
6659 /* Replace biv with giv's reduced register. */
6660 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6663 /* Compute value to compare against. */
6664 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6666 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6667 if (apply_change_group ())
6672 /* This code has problems. Basically, you can't know when
6673 seeing if we will eliminate BL, whether a particular giv
6674 of ARG will be reduced. If it isn't going to be reduced,
6675 we can't eliminate BL. We can try forcing it to be reduced,
6676 but that can generate poor code.
6678 The problem is that the benefit of reducing TV, below should
6679 be increased if BL can actually be eliminated, but this means
6680 we might have to do a topological sort of the order in which
6681 we try to process biv. It doesn't seem worthwhile to do
6682 this sort of thing now. */
6685 /* Otherwise the reg compared with had better be a biv. */
6686 if (GET_CODE (arg
) != REG
6687 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6690 /* Look for a pair of givs, one for each biv,
6691 with identical coefficients. */
6692 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6694 struct induction
*tv
;
6696 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6699 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6700 if (! tv
->ignore
&& ! tv
->maybe_dead
6701 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6702 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6703 && tv
->mode
== mode
)
6705 /* If the giv V had the auto-inc address optimization applied
6706 to it, and INSN occurs between the giv insn and the biv
6707 insn, then we must adjust the value used here.
6708 This is rare, so we don't bother to do so. */
6710 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6711 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6712 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6713 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6719 /* Replace biv with its giv's reduced reg. */
6720 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6721 /* Replace other operand with the other giv's
6723 XEXP (x
, arg_operand
) = tv
->new_reg
;
6730 /* If we get here, the biv can't be eliminated. */
6734 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6735 biv is used in it, since it will be replaced. */
6736 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6737 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6745 /* See if any subexpression fails elimination. */
6746 fmt
= GET_RTX_FORMAT (code
);
6747 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6752 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6753 eliminate_p
, where
))
6758 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6759 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6760 eliminate_p
, where
))
6769 /* Return nonzero if the last use of REG
6770 is in an insn following INSN in the same basic block. */
6773 last_use_this_basic_block (reg
, insn
)
6779 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6782 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6788 /* Called via `note_stores' to record the initial value of a biv. Here we
6789 just record the location of the set and process it later. */
6792 record_initial (dest
, set
)
6796 struct iv_class
*bl
;
6798 if (GET_CODE (dest
) != REG
6799 || REGNO (dest
) >= max_reg_before_loop
6800 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6803 bl
= reg_biv_class
[REGNO (dest
)];
6805 /* If this is the first set found, record it. */
6806 if (bl
->init_insn
== 0)
6808 bl
->init_insn
= note_insn
;
6813 /* If any of the registers in X are "old" and currently have a last use earlier
6814 than INSN, update them to have a last use of INSN. Their actual last use
6815 will be the previous insn but it will not have a valid uid_luid so we can't
6819 update_reg_last_use (x
, insn
)
6823 /* Check for the case where INSN does not have a valid luid. In this case,
6824 there is no need to modify the regno_last_uid, as this can only happen
6825 when code is inserted after the loop_end to set a pseudo's final value,
6826 and hence this insn will never be the last use of x. */
6827 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6828 && INSN_UID (insn
) < max_uid_for_loop
6829 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6830 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6834 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6835 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6838 update_reg_last_use (XEXP (x
, i
), insn
);
6839 else if (fmt
[i
] == 'E')
6840 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6841 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6846 /* Given a jump insn JUMP, return the condition that will cause it to branch
6847 to its JUMP_LABEL. If the condition cannot be understood, or is an
6848 inequality floating-point comparison which needs to be reversed, 0 will
6851 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6852 insn used in locating the condition was found. If a replacement test
6853 of the condition is desired, it should be placed in front of that
6854 insn and we will be sure that the inputs are still valid.
6856 The condition will be returned in a canonical form to simplify testing by
6857 callers. Specifically:
6859 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6860 (2) Both operands will be machine operands; (cc0) will have been replaced.
6861 (3) If an operand is a constant, it will be the second operand.
6862 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6863 for GE, GEU, and LEU. */
6866 get_condition (jump
, earliest
)
6875 int reverse_code
= 0;
6876 int did_reverse_condition
= 0;
6878 /* If this is not a standard conditional jump, we can't parse it. */
6879 if (GET_CODE (jump
) != JUMP_INSN
6880 || ! condjump_p (jump
) || simplejump_p (jump
))
6883 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6884 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6885 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6890 /* If this branches to JUMP_LABEL when the condition is false, reverse
6892 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6893 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6894 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6896 /* If we are comparing a register with zero, see if the register is set
6897 in the previous insn to a COMPARE or a comparison operation. Perform
6898 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6901 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6903 /* Set non-zero when we find something of interest. */
6907 /* If comparison with cc0, import actual comparison from compare
6911 if ((prev
= prev_nonnote_insn (prev
)) == 0
6912 || GET_CODE (prev
) != INSN
6913 || (set
= single_set (prev
)) == 0
6914 || SET_DEST (set
) != cc0_rtx
)
6917 op0
= SET_SRC (set
);
6918 op1
= CONST0_RTX (GET_MODE (op0
));
6924 /* If this is a COMPARE, pick up the two things being compared. */
6925 if (GET_CODE (op0
) == COMPARE
)
6927 op1
= XEXP (op0
, 1);
6928 op0
= XEXP (op0
, 0);
6931 else if (GET_CODE (op0
) != REG
)
6934 /* Go back to the previous insn. Stop if it is not an INSN. We also
6935 stop if it isn't a single set or if it has a REG_INC note because
6936 we don't want to bother dealing with it. */
6938 if ((prev
= prev_nonnote_insn (prev
)) == 0
6939 || GET_CODE (prev
) != INSN
6940 || FIND_REG_INC_NOTE (prev
, 0)
6941 || (set
= single_set (prev
)) == 0)
6944 /* If this is setting OP0, get what it sets it to if it looks
6946 if (rtx_equal_p (SET_DEST (set
), op0
))
6948 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6950 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6953 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6954 && (GET_MODE_BITSIZE (inner_mode
)
6955 <= HOST_BITS_PER_WIDE_INT
)
6956 && (STORE_FLAG_VALUE
6957 & ((HOST_WIDE_INT
) 1
6958 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6959 #ifdef FLOAT_STORE_FLAG_VALUE
6961 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6962 && FLOAT_STORE_FLAG_VALUE
< 0)
6965 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6967 else if (((code
== EQ
6969 && (GET_MODE_BITSIZE (inner_mode
)
6970 <= HOST_BITS_PER_WIDE_INT
)
6971 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6972 && (STORE_FLAG_VALUE
6973 & ((HOST_WIDE_INT
) 1
6974 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6975 #ifdef FLOAT_STORE_FLAG_VALUE
6977 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6978 && FLOAT_STORE_FLAG_VALUE
< 0)
6981 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6983 /* We might have reversed a LT to get a GE here. But this wasn't
6984 actually the comparison of data, so we don't flag that we
6985 have had to reverse the condition. */
6986 did_reverse_condition
^= 1;
6994 else if (reg_set_p (op0
, prev
))
6995 /* If this sets OP0, but not directly, we have to give up. */
7000 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
7001 code
= GET_CODE (x
);
7004 code
= reverse_condition (code
);
7005 did_reverse_condition
^= 1;
7009 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
7015 /* If constant is first, put it last. */
7016 if (CONSTANT_P (op0
))
7017 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
7019 /* If OP0 is the result of a comparison, we weren't able to find what
7020 was really being compared, so fail. */
7021 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
7024 /* Canonicalize any ordered comparison with integers involving equality
7025 if we can do computations in the relevant mode and we do not
7028 if (GET_CODE (op1
) == CONST_INT
7029 && GET_MODE (op0
) != VOIDmode
7030 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
7032 HOST_WIDE_INT const_val
= INTVAL (op1
);
7033 unsigned HOST_WIDE_INT uconst_val
= const_val
;
7034 unsigned HOST_WIDE_INT max_val
7035 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
7040 if (const_val
!= max_val
>> 1)
7041 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7046 != (((HOST_WIDE_INT
) 1
7047 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7048 code
= GT
, op1
= GEN_INT (const_val
- 1);
7052 if (uconst_val
!= max_val
)
7053 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7057 if (uconst_val
!= 0)
7058 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7066 /* If this was floating-point and we reversed anything other than an
7067 EQ or NE, return zero. */
7068 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7069 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7071 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7075 /* Never return CC0; return zero instead. */
7080 return gen_rtx (code
, VOIDmode
, op0
, op1
);
7083 /* Similar to above routine, except that we also put an invariant last
7084 unless both operands are invariants. */
7087 get_condition_for_loop (x
)
7090 rtx comparison
= get_condition (x
, NULL_PTR
);
7093 || ! invariant_p (XEXP (comparison
, 0))
7094 || invariant_p (XEXP (comparison
, 1)))
7097 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7098 XEXP (comparison
, 1), XEXP (comparison
, 0));
7102 /* Analyze a loop in order to instrument it with the use of count register.
7103 loop_start and loop_end are the first and last insns of the loop.
7104 This function works in cooperation with insert_bct ().
7105 loop_can_insert_bct[loop_num] is set according to whether the optimization
7106 is applicable to the loop. When it is applicable, the following variables
7108 loop_start_value[loop_num]
7109 loop_comparison_value[loop_num]
7110 loop_increment[loop_num]
7111 loop_comparison_code[loop_num] */
7114 void analyze_loop_iterations (loop_start
, loop_end
)
7115 rtx loop_start
, loop_end
;
7117 rtx comparison
, comparison_value
;
7118 rtx iteration_var
, initial_value
, increment
;
7119 enum rtx_code comparison_code
;
7125 /* loop_variable mode */
7126 enum machine_mode original_mode
;
7128 /* find the number of the loop */
7129 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7131 /* we change our mind only when we are sure that loop will be instrumented */
7132 loop_can_insert_bct
[loop_num
] = 0;
7134 /* is the optimization suppressed. */
7135 if ( !flag_branch_on_count_reg
)
7138 /* make sure that count-reg is not in use */
7139 if (loop_used_count_register
[loop_num
]){
7140 if (loop_dump_stream
)
7141 fprintf (loop_dump_stream
,
7142 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7147 /* make sure that the function has no indirect jumps. */
7148 if (indirect_jump_in_function
){
7149 if (loop_dump_stream
)
7150 fprintf (loop_dump_stream
,
7151 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7156 /* make sure that the last loop insn is a conditional jump */
7157 last_loop_insn
= PREV_INSN (loop_end
);
7158 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7159 if (loop_dump_stream
)
7160 fprintf (loop_dump_stream
,
7161 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7166 /* First find the iteration variable. If the last insn is a conditional
7167 branch, and the insn preceding it tests a register value, make that
7168 register the iteration variable. */
7170 /* We used to use prev_nonnote_insn here, but that fails because it might
7171 accidentally get the branch for a contained loop if the branch for this
7172 loop was deleted. We can only trust branches immediately before the
7175 comparison
= get_condition_for_loop (last_loop_insn
);
7176 /* ??? Get_condition may switch position of induction variable and
7177 invariant register when it canonicalizes the comparison. */
7179 if (comparison
== 0) {
7180 if (loop_dump_stream
)
7181 fprintf (loop_dump_stream
,
7182 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7187 comparison_code
= GET_CODE (comparison
);
7188 iteration_var
= XEXP (comparison
, 0);
7189 comparison_value
= XEXP (comparison
, 1);
7191 original_mode
= GET_MODE (iteration_var
);
7192 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7193 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7194 if (loop_dump_stream
)
7195 fprintf (loop_dump_stream
,
7196 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7201 /* get info about loop bounds and increment */
7202 iteration_info (iteration_var
, &initial_value
, &increment
,
7203 loop_start
, loop_end
);
7205 /* make sure that all required loop data were found */
7206 if (!(initial_value
&& increment
&& comparison_value
7207 && invariant_p (comparison_value
) && invariant_p (increment
)
7208 && ! indirect_jump_in_function
))
7210 if (loop_dump_stream
) {
7211 fprintf (loop_dump_stream
,
7212 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7213 if (!(initial_value
&& increment
&& comparison_value
)) {
7214 fprintf (loop_dump_stream
, "\tbounds not available: ");
7215 if ( ! initial_value
)
7216 fprintf (loop_dump_stream
, "initial ");
7218 fprintf (loop_dump_stream
, "increment ");
7219 if ( ! comparison_value
)
7220 fprintf (loop_dump_stream
, "comparison ");
7221 fprintf (loop_dump_stream
, "\n");
7223 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7224 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7229 /* make sure that the increment is constant */
7230 if (GET_CODE (increment
) != CONST_INT
) {
7231 if (loop_dump_stream
)
7232 fprintf (loop_dump_stream
,
7233 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7238 /* make sure that the loop contains neither function call, nor jump on table.
7239 (the count register might be altered by the called function, and might
7240 be used for a branch on table). */
7241 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7242 if (GET_CODE (insn
) == CALL_INSN
){
7243 if (loop_dump_stream
)
7244 fprintf (loop_dump_stream
,
7245 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7250 if (GET_CODE (insn
) == JUMP_INSN
7251 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7252 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7253 if (loop_dump_stream
)
7254 fprintf (loop_dump_stream
,
7255 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7261 /* At this point, we are sure that the loop can be instrumented with BCT.
7262 Some of the loops, however, will not be instrumented - the final decision
7263 is taken by insert_bct () */
7264 if (loop_dump_stream
)
7265 fprintf (loop_dump_stream
,
7266 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7269 /* mark all enclosing loops that they cannot use count register */
7270 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7271 marking here may prevent instrumenting an enclosing loop that could
7272 actually be instrumented. But since this is rare, it is safer to mark
7273 here in case the order of calling (analyze/insert)_bct would be changed. */
7274 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7275 loop_used_count_register
[i
] = 1;
7277 /* Set data structures which will be used by the instrumentation phase */
7278 loop_start_value
[loop_num
] = initial_value
;
7279 loop_comparison_value
[loop_num
] = comparison_value
;
7280 loop_increment
[loop_num
] = increment
;
7281 loop_comparison_code
[loop_num
] = comparison_code
;
7282 loop_can_insert_bct
[loop_num
] = 1;
7286 /* instrument loop for insertion of bct instruction. We distinguish between
7287 loops with compile-time bounds, to those with run-time bounds. The loop
7288 behaviour is analized according to the following characteristics/variables:
7290 ; comparison-value: the value to which the iteration counter is compared.
7291 ; initial-value: iteration-counter initial value.
7292 ; increment: iteration-counter increment.
7293 ; Computed variables:
7294 ; increment-direction: the sign of the increment.
7295 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7296 ; range-direction: sign (comparison-value - initial-value)
7297 We give up on the following cases:
7298 ; loop variable overflow.
7299 ; run-time loop bounds with comparison code NE.
7303 insert_bct (loop_start
, loop_end
)
7304 rtx loop_start
, loop_end
;
7306 rtx initial_value
, comparison_value
, increment
;
7307 enum rtx_code comparison_code
;
7309 int increment_direction
, compare_direction
;
7312 /* if the loop condition is <= or >=, the number of iteration
7313 is 1 more than the range of the bounds of the loop */
7314 int add_iteration
= 0;
7316 /* the only machine mode we work with - is the integer of the size that the
7318 enum machine_mode loop_var_mode
= SImode
;
7320 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7322 /* get loop-variables. No need to check that these are valid - already
7323 checked in analyze_loop_iterations (). */
7324 comparison_code
= loop_comparison_code
[loop_num
];
7325 initial_value
= loop_start_value
[loop_num
];
7326 comparison_value
= loop_comparison_value
[loop_num
];
7327 increment
= loop_increment
[loop_num
];
7329 /* check analyze_loop_iterations decision for this loop. */
7330 if (! loop_can_insert_bct
[loop_num
]){
7331 if (loop_dump_stream
)
7332 fprintf (loop_dump_stream
,
7333 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7338 /* It's impossible to instrument a competely unrolled loop. */
7339 if (loop_unroll_factor
[loop_num
] == -1)
7342 /* make sure that the last loop insn is a conditional jump .
7343 This check is repeated from analyze_loop_iterations (),
7344 because unrolling might have changed that. */
7345 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7346 || !condjump_p (PREV_INSN (loop_end
))) {
7347 if (loop_dump_stream
)
7348 fprintf (loop_dump_stream
,
7349 "insert_bct: not instrumenting BCT because of invalid branch\n");
7353 /* fix increment in case loop was unrolled. */
7354 if (loop_unroll_factor
[loop_num
] > 1)
7355 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7357 /* determine properties and directions of the loop */
7358 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7359 switch ( comparison_code
) {
7364 compare_direction
= 1;
7371 compare_direction
= -1;
7375 /* in this case we cannot know the number of iterations */
7376 if (loop_dump_stream
)
7377 fprintf (loop_dump_stream
,
7378 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7385 compare_direction
= 1;
7391 compare_direction
= -1;
7394 compare_direction
= 0;
7401 /* make sure that the loop does not end by an overflow */
7402 if (compare_direction
!= increment_direction
) {
7403 if (loop_dump_stream
)
7404 fprintf (loop_dump_stream
,
7405 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7410 /* try to instrument the loop. */
7412 /* Handle the simpler case, where the bounds are known at compile time. */
7413 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7416 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7418 /* check the relation between compare-val and initial-val */
7419 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7420 int range_direction
= (difference
> 0) ? 1 : -1;
7422 /* make sure the loop executes enough iterations to gain from BCT */
7423 if (difference
> -3 && difference
< 3) {
7424 if (loop_dump_stream
)
7425 fprintf (loop_dump_stream
,
7426 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7431 /* make sure that the loop executes at least once */
7432 if ((range_direction
== 1 && compare_direction
== -1)
7433 || (range_direction
== -1 && compare_direction
== 1))
7435 if (loop_dump_stream
)
7436 fprintf (loop_dump_stream
,
7437 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7442 /* make sure that the loop does not end by an overflow (in compile time
7443 bounds we must have an additional check for overflow, because here
7444 we also support the compare code of 'NE'. */
7445 if (comparison_code
== NE
7446 && increment_direction
!= range_direction
) {
7447 if (loop_dump_stream
)
7448 fprintf (loop_dump_stream
,
7449 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7454 /* Determine the number of iterations by:
7456 ; compare-val - initial-val + (increment -1) + additional-iteration
7457 ; num_iterations = -----------------------------------------------------------------
7460 difference
= (range_direction
> 0) ? difference
: -difference
;
7462 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7463 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7464 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7465 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7466 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7469 if (increment_value_abs
== 0) {
7470 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7473 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7474 / increment_value_abs
;
7477 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7479 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7481 /* Done with this loop. */
7485 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7486 /* In this case we generate run_time calculation of the number of iterations */
7488 /* With runtime bounds, if the compare is of the form '!=' we give up */
7489 if (comparison_code
== NE
) {
7490 if (loop_dump_stream
)
7491 fprintf (loop_dump_stream
,
7492 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7498 /* We rely on the existence of run-time guard to ensure that the
7499 loop executes at least once. */
7501 rtx iterations_num_reg
;
7503 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7505 /* make sure that the increment is a power of two, otherwise (an
7506 expensive) divide is needed. */
7507 if (exact_log2 (increment_value_abs
) == -1)
7509 if (loop_dump_stream
)
7510 fprintf (loop_dump_stream
,
7511 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7515 /* compute the number of iterations */
7518 /* CYGNUS LOCAL: HAIFA bug fix */
7521 /* Again, the number of iterations is calculated by:
7523 ; compare-val - initial-val + (increment -1) + additional-iteration
7524 ; num_iterations = -----------------------------------------------------------------
7527 /* ??? Do we have to call copy_rtx here before passing rtx to
7529 if (compare_direction
> 0) {
7530 /* <, <= :the loop variable is increasing */
7531 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7532 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7535 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7536 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7539 if (increment_value_abs
- 1 + add_iteration
!= 0)
7540 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7541 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7542 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7544 if (increment_value_abs
!= 1)
7546 /* ??? This will generate an expensive divide instruction for
7547 most targets. The original authors apparently expected this
7548 to be a shift, since they test for power-of-2 divisors above,
7549 but just naively generating a divide instruction will not give
7550 a shift. It happens to work for the PowerPC target because
7551 the rs6000.md file has a divide pattern that emits shifts.
7552 It will probably not work for any other target. */
7553 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7555 GEN_INT (increment_value_abs
),
7556 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7559 iterations_num_reg
= temp_reg
;
7560 /* END CYGNUS LOCAL: HAIFA bug fix */
7562 sequence
= gen_sequence ();
7564 emit_insn_before (sequence
, loop_start
);
7565 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7569 /* instrument loop by inserting a bct in it. This is done in the following way:
7570 1. A new register is created and assigned the hard register number of the count
7572 2. In the head of the loop the new variable is initialized by the value passed in the
7573 loop_num_iterations parameter.
7574 3. At the end of the loop, comparison of the register with 0 is generated.
7575 The created comparison follows the pattern defined for the
7576 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7578 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7579 not used elsewhere, it will be eliminated by data-flow analisys. */
7582 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7583 rtx loop_start
, loop_end
;
7584 rtx loop_num_iterations
;
7586 rtx temp_reg1
, temp_reg2
;
7590 enum machine_mode loop_var_mode
= SImode
;
7592 #ifdef HAVE_decrement_and_branch_on_count
7593 if (HAVE_decrement_and_branch_on_count
)
7595 if (loop_dump_stream
)
7596 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7598 /* eliminate the check on the old variable */
7599 delete_insn (PREV_INSN (loop_end
));
7600 delete_insn (PREV_INSN (loop_end
));
7602 /* insert the label which will delimit the start of the loop */
7603 start_label
= gen_label_rtx ();
7604 emit_label_after (start_label
, loop_start
);
7606 /* insert initialization of the count register into the loop header */
7608 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7609 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7611 /* this will be count register */
7612 temp_reg2
= gen_rtx (REG
, loop_var_mode
, COUNT_REGISTER_REGNUM
);
7613 /* we have to move the value to the count register from an GPR
7614 because rtx pointed to by loop_num_iterations could contain
7615 expression which cannot be moved into count register */
7616 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7618 sequence
= gen_sequence ();
7620 emit_insn_after (sequence
, loop_start
);
7622 /* insert new comparison on the count register instead of the
7623 old one, generating the needed BCT pattern (that will be
7624 later recognized by assembly generation phase). */
7625 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7627 LABEL_NUSES (start_label
)++;
7630 #endif /* HAVE_decrement_and_branch_on_count */
7634 /* Scan the function and determine whether it has indirect (computed) jumps.
7636 This is taken mostly from flow.c; similar code exists elsewhere
7637 in the compiler. It may be useful to put this into rtlanal.c. */
7639 indirect_jump_in_function_p (start
)
7643 int is_indirect_jump
= 0;
7645 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
7646 if (computed_jump_p (insn
))