1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx
*loop_comparison_value
;
101 rtx
*loop_start_value
;
102 enum rtx_code
*loop_comparison_code
;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor
;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid
;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx
*loop_number_exit_labels
;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count
;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations
;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call
;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile
;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue
;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set
;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used
;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize
;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once
;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems
[NUM_STORES
];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx
;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered
;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables
;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets
;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed
;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop
;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack
;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack
*rtl_obstack
;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn
; /* A movable insn */
239 rtx set_src
; /* The expression this reg is set from. */
240 rtx set_dest
; /* The destination of this SET. */
241 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec
; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno
; /* The register it sets */
246 short lifetime
; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings
; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond
: 1; /* 1 if only conditionally movable */
253 unsigned int force
: 1; /* 1 means MUST move this insn */
254 unsigned int global
: 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done
: 1; /* 1 inhibits further processing of this */
260 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
266 first insn of a consecutive sets group. */
267 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
268 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
269 that we should avoid changing when clearing
270 the rest of the reg. */
271 struct movable
*match
; /* First entry for same value */
272 struct movable
*forces
; /* An insn that must be moved if this is */
273 struct movable
*next
;
276 FILE *loop_dump_stream
;
278 /* Forward declarations. */
280 static void find_and_verify_loops
PROTO((rtx
));
281 static void mark_loop_jump
PROTO((rtx
, int));
282 static void prescan_loop
PROTO((rtx
, rtx
));
283 static int reg_in_basic_block_p
PROTO((rtx
, rtx
));
284 static int consec_sets_invariant_p
PROTO((rtx
, int, rtx
));
285 static rtx libcall_other_reg
PROTO((rtx
, rtx
));
286 static int labels_in_range_p
PROTO((rtx
, int));
287 static void count_loop_regs_set
PROTO((rtx
, rtx
, char *, rtx
*, int *, int));
288 static void note_addr_stored
PROTO((rtx
, rtx
));
289 static int loop_reg_used_before_p
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
));
290 static void scan_loop
PROTO((rtx
, rtx
, int, int));
292 static void replace_call_address
PROTO(());
294 static rtx skip_consec_insns
PROTO((rtx
, int));
295 static int libcall_benefit
PROTO((rtx
));
296 static void ignore_some_movables
PROTO((struct movable
*));
297 static void force_movables
PROTO((struct movable
*));
298 static void combine_movables
PROTO((struct movable
*, int));
299 static int regs_match_p
PROTO((rtx
, rtx
, struct movable
*));
300 static int rtx_equal_for_loop_p
PROTO((rtx
, rtx
, struct movable
*));
301 static void add_label_notes
PROTO((rtx
, rtx
));
302 static void move_movables
PROTO((struct movable
*, int, int, rtx
, rtx
, int));
303 static int count_nonfixed_reads
PROTO((rtx
));
304 static void strength_reduce
PROTO((rtx
, rtx
, rtx
, int, rtx
, rtx
, int));
305 static void find_single_use_in_loop
PROTO((rtx
, rtx
, rtx
*));
306 static int valid_initial_value_p
PROTO((rtx
, rtx
, int, rtx
));
307 static void find_mem_givs
PROTO((rtx
, rtx
, int, rtx
, rtx
));
308 static void record_biv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, int, int));
309 static void check_final_value
PROTO((struct induction
*, rtx
, rtx
));
310 static void record_giv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
, int, enum g_types
, int, rtx
*, rtx
, rtx
));
311 static void update_giv_derive
PROTO((rtx
));
312 static int basic_induction_var
PROTO((rtx
, enum machine_mode
, rtx
, rtx
, rtx
*, rtx
*));
313 static rtx simplify_giv_expr
PROTO((rtx
, int *));
314 static int general_induction_var
PROTO((rtx
, rtx
*, rtx
*, rtx
*));
315 static int consec_sets_giv
PROTO((int, rtx
, rtx
, rtx
, rtx
*, rtx
*));
316 static int check_dbra_loop
PROTO((rtx
, int, rtx
));
318 static rtx express_from
PROTO((struct induction
*, struct induction
*));
320 static int combine_givs_p
PROTO((struct induction
*, struct induction
*));
321 #ifdef GIV_SORT_CRITERION
322 static int giv_sort
PROTO((struct induction
**, struct induction
**));
324 static void combine_givs
PROTO((struct iv_class
*));
325 static int product_cheap_p
PROTO((rtx
, rtx
));
326 static int maybe_eliminate_biv
PROTO((struct iv_class
*, rtx
, rtx
, int, int, int));
327 static int maybe_eliminate_biv_1
PROTO((rtx
, rtx
, struct iv_class
*, int, rtx
));
328 static int last_use_this_basic_block
PROTO((rtx
, rtx
));
329 static void record_initial
PROTO((rtx
, rtx
));
330 static void update_reg_last_use
PROTO((rtx
, rtx
));
333 /* This is extern from unroll.c */
334 extern void iteration_info
PROTO((rtx
, rtx
*, rtx
*, rtx
, rtx
));
336 /* Two main functions for implementing bct:
337 first - to be called before loop unrolling, and the second - after */
338 #ifdef HAVE_decrement_and_branch_on_count
339 static void analyze_loop_iterations
PROTO((rtx
, rtx
));
340 static void insert_bct
PROTO((rtx
, rtx
));
342 /* Auxiliary function that inserts the bct pattern into the loop */
343 static void instrument_loop_bct
PROTO((rtx
, rtx
, rtx
));
344 #endif /* HAVE_decrement_and_branch_on_count */
347 /* Indirect_jump_in_function is computed once per function. */
348 int indirect_jump_in_function
= 0;
349 static int indirect_jump_in_function_p
PROTO((rtx
));
352 /* Relative gain of eliminating various kinds of operations. */
359 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
360 copy the value of the strength reduced giv to its original register. */
366 char *free_point
= (char *) oballoc (1);
367 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
369 add_cost
= rtx_cost (gen_rtx_PLUS (word_mode
, reg
, reg
), SET
);
371 /* We multiply by 2 to reconcile the difference in scale between
372 these two ways of computing costs. Otherwise the cost of a copy
373 will be far less than the cost of an add. */
377 /* Free the objects we just allocated. */
380 /* Initialize the obstack used for rtl in product_cheap_p. */
381 gcc_obstack_init (&temp_obstack
);
384 /* Entry point of this file. Perform loop optimization
385 on the current function. F is the first insn of the function
386 and DUMPFILE is a stream for output of a trace of actions taken
387 (or 0 if none should be output). */
390 loop_optimize (f
, dumpfile
, unroll_p
)
391 /* f is the first instruction of a chain of insns for one function */
400 loop_dump_stream
= dumpfile
;
402 init_recog_no_volatile ();
403 init_alias_analysis ();
405 max_reg_before_loop
= max_reg_num ();
407 moved_once
= (char *) alloca (max_reg_before_loop
);
408 bzero (moved_once
, max_reg_before_loop
);
412 /* Count the number of loops. */
415 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
417 if (GET_CODE (insn
) == NOTE
418 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
422 /* Don't waste time if no loops. */
423 if (max_loop_num
== 0)
426 /* Get size to use for tables indexed by uids.
427 Leave some space for labels allocated by find_and_verify_loops. */
428 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
430 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
431 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
433 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
434 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
436 /* Allocate tables for recording each loop. We set each entry, so they need
438 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
439 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
440 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
441 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
442 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
443 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
445 /* This is initialized by the unrolling code, so we go ahead
446 and clear them just in case we are not performing loop
448 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
449 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
452 /* Allocate for BCT optimization */
453 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
454 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
456 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
457 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
459 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
460 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
461 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
462 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
463 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
464 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
467 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
468 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
471 /* Find and process each loop.
472 First, find them, and record them in order of their beginnings. */
473 find_and_verify_loops (f
);
475 /* Now find all register lifetimes. This must be done after
476 find_and_verify_loops, because it might reorder the insns in the
478 reg_scan (f
, max_reg_num (), 1);
480 /* See if we went too far. */
481 if (get_max_uid () > max_uid_for_loop
)
483 /* Now reset it to the actual size we need. See above. */
484 max_uid_for_loop
= get_max_uid () + 1;
486 /* Compute the mapping from uids to luids.
487 LUIDs are numbers assigned to insns, like uids,
488 except that luids increase monotonically through the code.
489 Don't assign luids to line-number NOTEs, so that the distance in luids
490 between two insns is not affected by -g. */
492 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
495 if (GET_CODE (insn
) != NOTE
496 || NOTE_LINE_NUMBER (insn
) <= 0)
497 uid_luid
[INSN_UID (insn
)] = ++i
;
499 /* Give a line number note the same luid as preceding insn. */
500 uid_luid
[INSN_UID (insn
)] = i
;
505 /* Don't leave gaps in uid_luid for insns that have been
506 deleted. It is possible that the first or last insn
507 using some register has been deleted by cross-jumping.
508 Make sure that uid_luid for that former insn's uid
509 points to the general area where that insn used to be. */
510 for (i
= 0; i
< max_uid_for_loop
; i
++)
512 uid_luid
[0] = uid_luid
[i
];
513 if (uid_luid
[0] != 0)
516 for (i
= 0; i
< max_uid_for_loop
; i
++)
517 if (uid_luid
[i
] == 0)
518 uid_luid
[i
] = uid_luid
[i
- 1];
520 /* Create a mapping from loops to BLOCK tree nodes. */
521 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
522 find_loop_tree_blocks ();
524 /* Determine if the function has indirect jump. On some systems
525 this prevents low overhead loop instructions from being used. */
526 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
528 /* Now scan the loops, last ones first, since this means inner ones are done
529 before outer ones. */
530 for (i
= max_loop_num
-1; i
>= 0; i
--)
531 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
532 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
533 max_reg_num (), unroll_p
);
535 /* If debugging and unrolling loops, we must replicate the tree nodes
536 corresponding to the blocks inside the loop, so that the original one
537 to one mapping will remain. */
538 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
539 unroll_block_trees ();
542 /* Optimize one loop whose start is LOOP_START and end is END.
543 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
544 NOTE_INSN_LOOP_END. */
546 /* ??? Could also move memory writes out of loops if the destination address
547 is invariant, the source is invariant, the memory write is not volatile,
548 and if we can prove that no read inside the loop can read this address
549 before the write occurs. If there is a read of this address after the
550 write, then we can also mark the memory read as invariant. */
553 scan_loop (loop_start
, end
, nregs
, unroll_p
)
560 /* 1 if we are scanning insns that could be executed zero times. */
562 /* 1 if we are scanning insns that might never be executed
563 due to a subroutine call which might exit before they are reached. */
565 /* For a rotated loop that is entered near the bottom,
566 this is the label at the top. Otherwise it is zero. */
568 /* Jump insn that enters the loop, or 0 if control drops in. */
569 rtx loop_entry_jump
= 0;
570 /* Place in the loop where control enters. */
572 /* Number of insns in the loop. */
577 /* The SET from an insn, if it is the only SET in the insn. */
579 /* Chain describing insns movable in current loop. */
580 struct movable
*movables
= 0;
581 /* Last element in `movables' -- so we can add elements at the end. */
582 struct movable
*last_movable
= 0;
583 /* Ratio of extra register life span we can justify
584 for saving an instruction. More if loop doesn't call subroutines
585 since in that case saving an insn makes more difference
586 and more registers are available. */
588 /* If we have calls, contains the insn in which a register was used
589 if it was used exactly once; contains const0_rtx if it was used more
591 rtx
*reg_single_usage
= 0;
592 /* Nonzero if we are scanning instructions in a sub-loop. */
595 n_times_set
= (int *) alloca (nregs
* sizeof (int));
596 n_times_used
= (int *) alloca (nregs
* sizeof (int));
597 may_not_optimize
= (char *) alloca (nregs
);
599 /* Determine whether this loop starts with a jump down to a test at
600 the end. This will occur for a small number of loops with a test
601 that is too complex to duplicate in front of the loop.
603 We search for the first insn or label in the loop, skipping NOTEs.
604 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
605 (because we might have a loop executed only once that contains a
606 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
607 (in case we have a degenerate loop).
609 Note that if we mistakenly think that a loop is entered at the top
610 when, in fact, it is entered at the exit test, the only effect will be
611 slightly poorer optimization. Making the opposite error can generate
612 incorrect code. Since very few loops now start with a jump to the
613 exit test, the code here to detect that case is very conservative. */
615 for (p
= NEXT_INSN (loop_start
);
617 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
618 && (GET_CODE (p
) != NOTE
619 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
620 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
626 /* Set up variables describing this loop. */
627 prescan_loop (loop_start
, end
);
628 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
630 /* If loop has a jump before the first label,
631 the true entry is the target of that jump.
632 Start scan from there.
633 But record in LOOP_TOP the place where the end-test jumps
634 back to so we can scan that after the end of the loop. */
635 if (GET_CODE (p
) == JUMP_INSN
)
639 /* Loop entry must be unconditional jump (and not a RETURN) */
641 && JUMP_LABEL (p
) != 0
642 /* Check to see whether the jump actually
643 jumps out of the loop (meaning it's no loop).
644 This case can happen for things like
645 do {..} while (0). If this label was generated previously
646 by loop, we can't tell anything about it and have to reject
648 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
649 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
650 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
652 loop_top
= next_label (scan_start
);
653 scan_start
= JUMP_LABEL (p
);
657 /* If SCAN_START was an insn created by loop, we don't know its luid
658 as required by loop_reg_used_before_p. So skip such loops. (This
659 test may never be true, but it's best to play it safe.)
661 Also, skip loops where we do not start scanning at a label. This
662 test also rejects loops starting with a JUMP_INSN that failed the
665 if (INSN_UID (scan_start
) >= max_uid_for_loop
666 || GET_CODE (scan_start
) != CODE_LABEL
)
668 if (loop_dump_stream
)
669 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
670 INSN_UID (loop_start
), INSN_UID (end
));
674 /* Count number of times each reg is set during this loop.
675 Set may_not_optimize[I] if it is not safe to move out
676 the setting of register I. If this loop has calls, set
677 reg_single_usage[I]. */
679 bzero ((char *) n_times_set
, nregs
* sizeof (int));
680 bzero (may_not_optimize
, nregs
);
684 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
685 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
688 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
689 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
691 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
692 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
693 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
695 if (loop_dump_stream
)
697 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
698 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
700 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
701 INSN_UID (loop_continue
));
704 /* Scan through the loop finding insns that are safe to move.
705 Set n_times_set negative for the reg being set, so that
706 this reg will be considered invariant for subsequent insns.
707 We consider whether subsequent insns use the reg
708 in deciding whether it is worth actually moving.
710 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
711 and therefore it is possible that the insns we are scanning
712 would never be executed. At such times, we must make sure
713 that it is safe to execute the insn once instead of zero times.
714 When MAYBE_NEVER is 0, all insns will be executed at least once
715 so that is not a problem. */
721 /* At end of a straight-in loop, we are done.
722 At end of a loop entered at the bottom, scan the top. */
735 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
736 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
738 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
739 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
742 if (GET_CODE (p
) == INSN
743 && (set
= single_set (p
))
744 && GET_CODE (SET_DEST (set
)) == REG
745 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
750 rtx src
= SET_SRC (set
);
751 rtx dependencies
= 0;
753 /* Figure out what to use as a source of this insn. If a REG_EQUIV
754 note is given or if a REG_EQUAL note with a constant operand is
755 specified, use it as the source and mark that we should move
756 this insn by calling emit_move_insn rather that duplicating the
759 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
761 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
763 src
= XEXP (temp
, 0), move_insn
= 1;
766 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
767 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
768 src
= XEXP (temp
, 0), move_insn
= 1;
769 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
771 src
= XEXP (temp
, 0);
772 /* A libcall block can use regs that don't appear in
773 the equivalent expression. To move the libcall,
774 we must move those regs too. */
775 dependencies
= libcall_other_reg (p
, src
);
779 /* Don't try to optimize a register that was made
780 by loop-optimization for an inner loop.
781 We don't know its life-span, so we can't compute the benefit. */
782 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
784 /* In order to move a register, we need to have one of three cases:
785 (1) it is used only in the same basic block as the set
786 (2) it is not a user variable and it is not used in the
787 exit test (this can cause the variable to be used
788 before it is set just like a user-variable).
789 (3) the set is guaranteed to be executed once the loop starts,
790 and the reg is not used until after that. */
791 else if (! ((! maybe_never
792 && ! loop_reg_used_before_p (set
, p
, loop_start
,
794 || (! REG_USERVAR_P (SET_DEST (set
))
795 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
796 || reg_in_basic_block_p (p
, SET_DEST (set
))))
798 else if ((tem
= invariant_p (src
))
799 && (dependencies
== 0
800 || (tem2
= invariant_p (dependencies
)) != 0)
801 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
803 = consec_sets_invariant_p (SET_DEST (set
),
804 n_times_set
[REGNO (SET_DEST (set
))],
806 /* If the insn can cause a trap (such as divide by zero),
807 can't move it unless it's guaranteed to be executed
808 once loop is entered. Even a function call might
809 prevent the trap insn from being reached
810 (since it might exit!) */
811 && ! ((maybe_never
|| call_passed
)
812 && may_trap_p (src
)))
814 register struct movable
*m
;
815 register int regno
= REGNO (SET_DEST (set
));
817 /* A potential lossage is where we have a case where two insns
818 can be combined as long as they are both in the loop, but
819 we move one of them outside the loop. For large loops,
820 this can lose. The most common case of this is the address
821 of a function being called.
823 Therefore, if this register is marked as being used exactly
824 once if we are in a loop with calls (a "large loop"), see if
825 we can replace the usage of this register with the source
826 of this SET. If we can, delete this insn.
828 Don't do this if P has a REG_RETVAL note or if we have
829 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
831 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
832 && reg_single_usage
[regno
] != const0_rtx
833 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
834 && (REGNO_LAST_UID (regno
)
835 == INSN_UID (reg_single_usage
[regno
]))
836 && n_times_set
[REGNO (SET_DEST (set
))] == 1
837 && ! side_effects_p (SET_SRC (set
))
838 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
839 && (! SMALL_REGISTER_CLASSES
840 || (! (GET_CODE (SET_SRC (set
)) == REG
841 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
842 /* This test is not redundant; SET_SRC (set) might be
843 a call-clobbered register and the life of REGNO
844 might span a call. */
845 && ! modified_between_p (SET_SRC (set
), p
,
846 reg_single_usage
[regno
])
847 && no_labels_between_p (p
, reg_single_usage
[regno
])
848 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
849 reg_single_usage
[regno
]))
851 /* Replace any usage in a REG_EQUAL note. Must copy the
852 new source, so that we don't get rtx sharing between the
853 SET_SOURCE and REG_NOTES of insn p. */
854 REG_NOTES (reg_single_usage
[regno
])
855 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
856 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
859 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
860 NOTE_SOURCE_FILE (p
) = 0;
861 n_times_set
[regno
] = 0;
865 m
= (struct movable
*) alloca (sizeof (struct movable
));
869 m
->dependencies
= dependencies
;
870 m
->set_dest
= SET_DEST (set
);
872 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
876 m
->move_insn
= move_insn
;
877 m
->move_insn_first
= 0;
878 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
879 m
->savemode
= VOIDmode
;
881 /* Set M->cond if either invariant_p or consec_sets_invariant_p
882 returned 2 (only conditionally invariant). */
883 m
->cond
= ((tem
| tem1
| tem2
) > 1);
884 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
885 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
887 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
888 - uid_luid
[REGNO_FIRST_UID (regno
)]);
889 m
->savings
= n_times_used
[regno
];
890 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
891 m
->savings
+= libcall_benefit (p
);
892 n_times_set
[regno
] = move_insn
? -2 : -1;
893 /* Add M to the end of the chain MOVABLES. */
897 last_movable
->next
= m
;
902 /* It is possible for the first instruction to have a
903 REG_EQUAL note but a non-invariant SET_SRC, so we must
904 remember the status of the first instruction in case
905 the last instruction doesn't have a REG_EQUAL note. */
906 m
->move_insn_first
= m
->move_insn
;
908 /* Skip this insn, not checking REG_LIBCALL notes. */
909 p
= next_nonnote_insn (p
);
910 /* Skip the consecutive insns, if there are any. */
911 p
= skip_consec_insns (p
, m
->consec
);
912 /* Back up to the last insn of the consecutive group. */
913 p
= prev_nonnote_insn (p
);
915 /* We must now reset m->move_insn, m->is_equiv, and possibly
916 m->set_src to correspond to the effects of all the
918 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
920 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
923 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
924 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
925 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
930 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
933 /* If this register is always set within a STRICT_LOW_PART
934 or set to zero, then its high bytes are constant.
935 So clear them outside the loop and within the loop
936 just load the low bytes.
937 We must check that the machine has an instruction to do so.
938 Also, if the value loaded into the register
939 depends on the same register, this cannot be done. */
940 else if (SET_SRC (set
) == const0_rtx
941 && GET_CODE (NEXT_INSN (p
)) == INSN
942 && (set1
= single_set (NEXT_INSN (p
)))
943 && GET_CODE (set1
) == SET
944 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
945 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
946 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
948 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
950 register int regno
= REGNO (SET_DEST (set
));
951 if (n_times_set
[regno
] == 2)
953 register struct movable
*m
;
954 m
= (struct movable
*) alloca (sizeof (struct movable
));
957 m
->set_dest
= SET_DEST (set
);
964 m
->move_insn_first
= 0;
966 /* If the insn may not be executed on some cycles,
967 we can't clear the whole reg; clear just high part.
968 Not even if the reg is used only within this loop.
975 Clearing x before the inner loop could clobber a value
976 being saved from the last time around the outer loop.
977 However, if the reg is not used outside this loop
978 and all uses of the register are in the same
979 basic block as the store, there is no problem.
981 If this insn was made by loop, we don't know its
982 INSN_LUID and hence must make a conservative
984 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
985 || (uid_luid
[REGNO_LAST_UID (regno
)]
987 || (uid_luid
[REGNO_FIRST_UID (regno
)]
989 || (labels_in_range_p
990 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
991 if (maybe_never
&& m
->global
)
992 m
->savemode
= GET_MODE (SET_SRC (set1
));
994 m
->savemode
= VOIDmode
;
998 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
999 - uid_luid
[REGNO_FIRST_UID (regno
)]);
1001 n_times_set
[regno
] = -1;
1002 /* Add M to the end of the chain MOVABLES. */
1006 last_movable
->next
= m
;
1011 /* Past a call insn, we get to insns which might not be executed
1012 because the call might exit. This matters for insns that trap.
1013 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1014 so they don't count. */
1015 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1017 /* Past a label or a jump, we get to insns for which we
1018 can't count on whether or how many times they will be
1019 executed during each iteration. Therefore, we can
1020 only move out sets of trivial variables
1021 (those not used after the loop). */
1022 /* Similar code appears twice in strength_reduce. */
1023 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1024 /* If we enter the loop in the middle, and scan around to the
1025 beginning, don't set maybe_never for that. This must be an
1026 unconditional jump, otherwise the code at the top of the
1027 loop might never be executed. Unconditional jumps are
1028 followed a by barrier then loop end. */
1029 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1030 && NEXT_INSN (NEXT_INSN (p
)) == end
1031 && simplejump_p (p
)))
1033 else if (GET_CODE (p
) == NOTE
)
1035 /* At the virtual top of a converted loop, insns are again known to
1036 be executed: logically, the loop begins here even though the exit
1037 code has been duplicated. */
1038 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1039 maybe_never
= call_passed
= 0;
1040 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1042 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1047 /* If one movable subsumes another, ignore that other. */
1049 ignore_some_movables (movables
);
1051 /* For each movable insn, see if the reg that it loads
1052 leads when it dies right into another conditionally movable insn.
1053 If so, record that the second insn "forces" the first one,
1054 since the second can be moved only if the first is. */
1056 force_movables (movables
);
1058 /* See if there are multiple movable insns that load the same value.
1059 If there are, make all but the first point at the first one
1060 through the `match' field, and add the priorities of them
1061 all together as the priority of the first. */
1063 combine_movables (movables
, nregs
);
1065 /* Now consider each movable insn to decide whether it is worth moving.
1066 Store 0 in n_times_set for each reg that is moved.
1068 Generally this increases code size, so do not move moveables when
1069 optimizing for code size. */
1071 if (! optimize_size
)
1072 move_movables (movables
, threshold
,
1073 insn_count
, loop_start
, end
, nregs
);
1075 /* Now candidates that still are negative are those not moved.
1076 Change n_times_set to indicate that those are not actually invariant. */
1077 for (i
= 0; i
< nregs
; i
++)
1078 if (n_times_set
[i
] < 0)
1079 n_times_set
[i
] = n_times_used
[i
];
1081 if (flag_strength_reduce
)
1082 strength_reduce (scan_start
, end
, loop_top
,
1083 insn_count
, loop_start
, end
, unroll_p
);
1086 /* Add elements to *OUTPUT to record all the pseudo-regs
1087 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1090 record_excess_regs (in_this
, not_in_this
, output
)
1091 rtx in_this
, not_in_this
;
1098 code
= GET_CODE (in_this
);
1112 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1113 && ! reg_mentioned_p (in_this
, not_in_this
))
1114 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1121 fmt
= GET_RTX_FORMAT (code
);
1122 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1129 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1130 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1134 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1140 /* Check what regs are referred to in the libcall block ending with INSN,
1141 aside from those mentioned in the equivalent value.
1142 If there are none, return 0.
1143 If there are one or more, return an EXPR_LIST containing all of them. */
1146 libcall_other_reg (insn
, equiv
)
1149 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1150 rtx p
= XEXP (note
, 0);
1153 /* First, find all the regs used in the libcall block
1154 that are not mentioned as inputs to the result. */
1158 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1159 || GET_CODE (p
) == CALL_INSN
)
1160 record_excess_regs (PATTERN (p
), equiv
, &output
);
1167 /* Return 1 if all uses of REG
1168 are between INSN and the end of the basic block. */
1171 reg_in_basic_block_p (insn
, reg
)
1174 int regno
= REGNO (reg
);
1177 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1180 /* Search this basic block for the already recorded last use of the reg. */
1181 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1183 switch (GET_CODE (p
))
1190 /* Ordinary insn: if this is the last use, we win. */
1191 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1196 /* Jump insn: if this is the last use, we win. */
1197 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1199 /* Otherwise, it's the end of the basic block, so we lose. */
1204 /* It's the end of the basic block, so we lose. */
1212 /* The "last use" doesn't follow the "first use"?? */
1216 /* Compute the benefit of eliminating the insns in the block whose
1217 last insn is LAST. This may be a group of insns used to compute a
1218 value directly or can contain a library call. */
1221 libcall_benefit (last
)
1227 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1228 insn
!= last
; insn
= NEXT_INSN (insn
))
1230 if (GET_CODE (insn
) == CALL_INSN
)
1231 benefit
+= 10; /* Assume at least this many insns in a library
1233 else if (GET_CODE (insn
) == INSN
1234 && GET_CODE (PATTERN (insn
)) != USE
1235 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1242 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1245 skip_consec_insns (insn
, count
)
1249 for (; count
> 0; count
--)
1253 /* If first insn of libcall sequence, skip to end. */
1254 /* Do this at start of loop, since INSN is guaranteed to
1256 if (GET_CODE (insn
) != NOTE
1257 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1258 insn
= XEXP (temp
, 0);
1260 do insn
= NEXT_INSN (insn
);
1261 while (GET_CODE (insn
) == NOTE
);
1267 /* Ignore any movable whose insn falls within a libcall
1268 which is part of another movable.
1269 We make use of the fact that the movable for the libcall value
1270 was made later and so appears later on the chain. */
1273 ignore_some_movables (movables
)
1274 struct movable
*movables
;
1276 register struct movable
*m
, *m1
;
1278 for (m
= movables
; m
; m
= m
->next
)
1280 /* Is this a movable for the value of a libcall? */
1281 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1285 /* Check for earlier movables inside that range,
1286 and mark them invalid. We cannot use LUIDs here because
1287 insns created by loop.c for prior loops don't have LUIDs.
1288 Rather than reject all such insns from movables, we just
1289 explicitly check each insn in the libcall (since invariant
1290 libcalls aren't that common). */
1291 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1292 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1293 if (m1
->insn
== insn
)
1299 /* For each movable insn, see if the reg that it loads
1300 leads when it dies right into another conditionally movable insn.
1301 If so, record that the second insn "forces" the first one,
1302 since the second can be moved only if the first is. */
1305 force_movables (movables
)
1306 struct movable
*movables
;
1308 register struct movable
*m
, *m1
;
1309 for (m1
= movables
; m1
; m1
= m1
->next
)
1310 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1311 if (!m1
->partial
&& !m1
->done
)
1313 int regno
= m1
->regno
;
1314 for (m
= m1
->next
; m
; m
= m
->next
)
1315 /* ??? Could this be a bug? What if CSE caused the
1316 register of M1 to be used after this insn?
1317 Since CSE does not update regno_last_uid,
1318 this insn M->insn might not be where it dies.
1319 But very likely this doesn't matter; what matters is
1320 that M's reg is computed from M1's reg. */
1321 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1324 if (m
!= 0 && m
->set_src
== m1
->set_dest
1325 /* If m->consec, m->set_src isn't valid. */
1329 /* Increase the priority of the moving the first insn
1330 since it permits the second to be moved as well. */
1334 m1
->lifetime
+= m
->lifetime
;
1335 m1
->savings
+= m
->savings
;
1340 /* Find invariant expressions that are equal and can be combined into
1344 combine_movables (movables
, nregs
)
1345 struct movable
*movables
;
1348 register struct movable
*m
;
1349 char *matched_regs
= (char *) alloca (nregs
);
1350 enum machine_mode mode
;
1352 /* Regs that are set more than once are not allowed to match
1353 or be matched. I'm no longer sure why not. */
1354 /* Perhaps testing m->consec_sets would be more appropriate here? */
1356 for (m
= movables
; m
; m
= m
->next
)
1357 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1359 register struct movable
*m1
;
1360 int regno
= m
->regno
;
1362 bzero (matched_regs
, nregs
);
1363 matched_regs
[regno
] = 1;
1365 /* We want later insns to match the first one. Don't make the first
1366 one match any later ones. So start this loop at m->next. */
1367 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1368 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1369 /* A reg used outside the loop mustn't be eliminated. */
1371 /* A reg used for zero-extending mustn't be eliminated. */
1373 && (matched_regs
[m1
->regno
]
1376 /* Can combine regs with different modes loaded from the
1377 same constant only if the modes are the same or
1378 if both are integer modes with M wider or the same
1379 width as M1. The check for integer is redundant, but
1380 safe, since the only case of differing destination
1381 modes with equal sources is when both sources are
1382 VOIDmode, i.e., CONST_INT. */
1383 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1384 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1385 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1386 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1387 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1388 /* See if the source of M1 says it matches M. */
1389 && ((GET_CODE (m1
->set_src
) == REG
1390 && matched_regs
[REGNO (m1
->set_src
)])
1391 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1393 && ((m
->dependencies
== m1
->dependencies
)
1394 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1396 m
->lifetime
+= m1
->lifetime
;
1397 m
->savings
+= m1
->savings
;
1400 matched_regs
[m1
->regno
] = 1;
1404 /* Now combine the regs used for zero-extension.
1405 This can be done for those not marked `global'
1406 provided their lives don't overlap. */
1408 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1409 mode
= GET_MODE_WIDER_MODE (mode
))
1411 register struct movable
*m0
= 0;
1413 /* Combine all the registers for extension from mode MODE.
1414 Don't combine any that are used outside this loop. */
1415 for (m
= movables
; m
; m
= m
->next
)
1416 if (m
->partial
&& ! m
->global
1417 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1419 register struct movable
*m1
;
1420 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1421 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1425 /* First one: don't check for overlap, just record it. */
1430 /* Make sure they extend to the same mode.
1431 (Almost always true.) */
1432 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1435 /* We already have one: check for overlap with those
1436 already combined together. */
1437 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1438 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1439 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1440 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1443 /* No overlap: we can combine this with the others. */
1444 m0
->lifetime
+= m
->lifetime
;
1445 m0
->savings
+= m
->savings
;
1454 /* Return 1 if regs X and Y will become the same if moved. */
1457 regs_match_p (x
, y
, movables
)
1459 struct movable
*movables
;
1463 struct movable
*mx
, *my
;
1465 for (mx
= movables
; mx
; mx
= mx
->next
)
1466 if (mx
->regno
== xn
)
1469 for (my
= movables
; my
; my
= my
->next
)
1470 if (my
->regno
== yn
)
1474 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1476 || mx
== my
->match
));
1479 /* Return 1 if X and Y are identical-looking rtx's.
1480 This is the Lisp function EQUAL for rtx arguments.
1482 If two registers are matching movables or a movable register and an
1483 equivalent constant, consider them equal. */
1486 rtx_equal_for_loop_p (x
, y
, movables
)
1488 struct movable
*movables
;
1492 register struct movable
*m
;
1493 register enum rtx_code code
;
1498 if (x
== 0 || y
== 0)
1501 code
= GET_CODE (x
);
1503 /* If we have a register and a constant, they may sometimes be
1505 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1508 for (m
= movables
; m
; m
= m
->next
)
1509 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1510 && rtx_equal_p (m
->set_src
, y
))
1513 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1516 for (m
= movables
; m
; m
= m
->next
)
1517 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1518 && rtx_equal_p (m
->set_src
, x
))
1522 /* Otherwise, rtx's of different codes cannot be equal. */
1523 if (code
!= GET_CODE (y
))
1526 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1527 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1529 if (GET_MODE (x
) != GET_MODE (y
))
1532 /* These three types of rtx's can be compared nonrecursively. */
1534 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1536 if (code
== LABEL_REF
)
1537 return XEXP (x
, 0) == XEXP (y
, 0);
1538 if (code
== SYMBOL_REF
)
1539 return XSTR (x
, 0) == XSTR (y
, 0);
1541 /* Compare the elements. If any pair of corresponding elements
1542 fail to match, return 0 for the whole things. */
1544 fmt
= GET_RTX_FORMAT (code
);
1545 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1550 if (XWINT (x
, i
) != XWINT (y
, i
))
1555 if (XINT (x
, i
) != XINT (y
, i
))
1560 /* Two vectors must have the same length. */
1561 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1564 /* And the corresponding elements must match. */
1565 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1566 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1571 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1576 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1581 /* These are just backpointers, so they don't matter. */
1587 /* It is believed that rtx's at this level will never
1588 contain anything but integers and other rtx's,
1589 except for within LABEL_REFs and SYMBOL_REFs. */
1597 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1598 insns in INSNS which use thet reference. */
1601 add_label_notes (x
, insns
)
1605 enum rtx_code code
= GET_CODE (x
);
1610 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1612 rtx next
= next_real_insn (XEXP (x
, 0));
1614 /* Don't record labels that refer to dispatch tables.
1615 This is not necessary, since the tablejump references the same label.
1616 And if we did record them, flow.c would make worse code. */
1618 || ! (GET_CODE (next
) == JUMP_INSN
1619 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1620 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1622 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1623 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1624 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1630 fmt
= GET_RTX_FORMAT (code
);
1631 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1634 add_label_notes (XEXP (x
, i
), insns
);
1635 else if (fmt
[i
] == 'E')
1636 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1637 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1641 /* Scan MOVABLES, and move the insns that deserve to be moved.
1642 If two matching movables are combined, replace one reg with the
1643 other throughout. */
1646 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1647 struct movable
*movables
;
1655 register struct movable
*m
;
1657 /* Map of pseudo-register replacements to handle combining
1658 when we move several insns that load the same value
1659 into different pseudo-registers. */
1660 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1661 char *already_moved
= (char *) alloca (nregs
);
1663 bzero (already_moved
, nregs
);
1664 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1668 for (m
= movables
; m
; m
= m
->next
)
1670 /* Describe this movable insn. */
1672 if (loop_dump_stream
)
1674 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1675 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1677 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1679 fprintf (loop_dump_stream
, "cond ");
1681 fprintf (loop_dump_stream
, "force ");
1683 fprintf (loop_dump_stream
, "global ");
1685 fprintf (loop_dump_stream
, "done ");
1687 fprintf (loop_dump_stream
, "move-insn ");
1689 fprintf (loop_dump_stream
, "matches %d ",
1690 INSN_UID (m
->match
->insn
));
1692 fprintf (loop_dump_stream
, "forces %d ",
1693 INSN_UID (m
->forces
->insn
));
1696 /* Count movables. Value used in heuristics in strength_reduce. */
1699 /* Ignore the insn if it's already done (it matched something else).
1700 Otherwise, see if it is now safe to move. */
1704 || (1 == invariant_p (m
->set_src
)
1705 && (m
->dependencies
== 0
1706 || 1 == invariant_p (m
->dependencies
))
1708 || 1 == consec_sets_invariant_p (m
->set_dest
,
1711 && (! m
->forces
|| m
->forces
->done
))
1715 int savings
= m
->savings
;
1717 /* We have an insn that is safe to move.
1718 Compute its desirability. */
1723 if (loop_dump_stream
)
1724 fprintf (loop_dump_stream
, "savings %d ", savings
);
1726 if (moved_once
[regno
])
1730 if (loop_dump_stream
)
1731 fprintf (loop_dump_stream
, "halved since already moved ");
1734 /* An insn MUST be moved if we already moved something else
1735 which is safe only if this one is moved too: that is,
1736 if already_moved[REGNO] is nonzero. */
1738 /* An insn is desirable to move if the new lifetime of the
1739 register is no more than THRESHOLD times the old lifetime.
1740 If it's not desirable, it means the loop is so big
1741 that moving won't speed things up much,
1742 and it is liable to make register usage worse. */
1744 /* It is also desirable to move if it can be moved at no
1745 extra cost because something else was already moved. */
1747 if (already_moved
[regno
]
1748 || flag_move_all_movables
1749 || (threshold
* savings
* m
->lifetime
) >= insn_count
1750 || (m
->forces
&& m
->forces
->done
1751 && n_times_used
[m
->forces
->regno
] == 1))
1754 register struct movable
*m1
;
1757 /* Now move the insns that set the reg. */
1759 if (m
->partial
&& m
->match
)
1763 /* Find the end of this chain of matching regs.
1764 Thus, we load each reg in the chain from that one reg.
1765 And that reg is loaded with 0 directly,
1766 since it has ->match == 0. */
1767 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1768 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1769 SET_DEST (PATTERN (m1
->insn
)));
1770 i1
= emit_insn_before (newpat
, loop_start
);
1772 /* Mark the moved, invariant reg as being allowed to
1773 share a hard reg with the other matching invariant. */
1774 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1775 r1
= SET_DEST (PATTERN (m
->insn
));
1776 r2
= SET_DEST (PATTERN (m1
->insn
));
1778 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1779 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1781 delete_insn (m
->insn
);
1786 if (loop_dump_stream
)
1787 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1789 /* If we are to re-generate the item being moved with a
1790 new move insn, first delete what we have and then emit
1791 the move insn before the loop. */
1792 else if (m
->move_insn
)
1796 for (count
= m
->consec
; count
>= 0; count
--)
1798 /* If this is the first insn of a library call sequence,
1800 if (GET_CODE (p
) != NOTE
1801 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1804 /* If this is the last insn of a libcall sequence, then
1805 delete every insn in the sequence except the last.
1806 The last insn is handled in the normal manner. */
1807 if (GET_CODE (p
) != NOTE
1808 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1810 temp
= XEXP (temp
, 0);
1812 temp
= delete_insn (temp
);
1815 p
= delete_insn (p
);
1816 while (p
&& GET_CODE (p
) == NOTE
)
1821 emit_move_insn (m
->set_dest
, m
->set_src
);
1822 temp
= get_insns ();
1825 add_label_notes (m
->set_src
, temp
);
1827 i1
= emit_insns_before (temp
, loop_start
);
1828 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1830 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1831 m
->set_src
, REG_NOTES (i1
));
1833 if (loop_dump_stream
)
1834 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1836 /* The more regs we move, the less we like moving them. */
1841 for (count
= m
->consec
; count
>= 0; count
--)
1845 /* If first insn of libcall sequence, skip to end. */
1846 /* Do this at start of loop, since p is guaranteed to
1848 if (GET_CODE (p
) != NOTE
1849 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1852 /* If last insn of libcall sequence, move all
1853 insns except the last before the loop. The last
1854 insn is handled in the normal manner. */
1855 if (GET_CODE (p
) != NOTE
1856 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1860 rtx fn_address_insn
= 0;
1863 for (temp
= XEXP (temp
, 0); temp
!= p
;
1864 temp
= NEXT_INSN (temp
))
1870 if (GET_CODE (temp
) == NOTE
)
1873 body
= PATTERN (temp
);
1875 /* Find the next insn after TEMP,
1876 not counting USE or NOTE insns. */
1877 for (next
= NEXT_INSN (temp
); next
!= p
;
1878 next
= NEXT_INSN (next
))
1879 if (! (GET_CODE (next
) == INSN
1880 && GET_CODE (PATTERN (next
)) == USE
)
1881 && GET_CODE (next
) != NOTE
)
1884 /* If that is the call, this may be the insn
1885 that loads the function address.
1887 Extract the function address from the insn
1888 that loads it into a register.
1889 If this insn was cse'd, we get incorrect code.
1891 So emit a new move insn that copies the
1892 function address into the register that the
1893 call insn will use. flow.c will delete any
1894 redundant stores that we have created. */
1895 if (GET_CODE (next
) == CALL_INSN
1896 && GET_CODE (body
) == SET
1897 && GET_CODE (SET_DEST (body
)) == REG
1898 && (n
= find_reg_note (temp
, REG_EQUAL
,
1901 fn_reg
= SET_SRC (body
);
1902 if (GET_CODE (fn_reg
) != REG
)
1903 fn_reg
= SET_DEST (body
);
1904 fn_address
= XEXP (n
, 0);
1905 fn_address_insn
= temp
;
1907 /* We have the call insn.
1908 If it uses the register we suspect it might,
1909 load it with the correct address directly. */
1910 if (GET_CODE (temp
) == CALL_INSN
1912 && reg_referenced_p (fn_reg
, body
))
1913 emit_insn_after (gen_move_insn (fn_reg
,
1917 if (GET_CODE (temp
) == CALL_INSN
)
1919 i1
= emit_call_insn_before (body
, loop_start
);
1920 /* Because the USAGE information potentially
1921 contains objects other than hard registers
1922 we need to copy it. */
1923 if (CALL_INSN_FUNCTION_USAGE (temp
))
1924 CALL_INSN_FUNCTION_USAGE (i1
)
1925 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1928 i1
= emit_insn_before (body
, loop_start
);
1931 if (temp
== fn_address_insn
)
1932 fn_address_insn
= i1
;
1933 REG_NOTES (i1
) = REG_NOTES (temp
);
1937 if (m
->savemode
!= VOIDmode
)
1939 /* P sets REG to zero; but we should clear only
1940 the bits that are not covered by the mode
1942 rtx reg
= m
->set_dest
;
1948 (GET_MODE (reg
), and_optab
, reg
,
1949 GEN_INT ((((HOST_WIDE_INT
) 1
1950 << GET_MODE_BITSIZE (m
->savemode
)))
1952 reg
, 1, OPTAB_LIB_WIDEN
);
1956 emit_move_insn (reg
, tem
);
1957 sequence
= gen_sequence ();
1959 i1
= emit_insn_before (sequence
, loop_start
);
1961 else if (GET_CODE (p
) == CALL_INSN
)
1963 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1964 /* Because the USAGE information potentially
1965 contains objects other than hard registers
1966 we need to copy it. */
1967 if (CALL_INSN_FUNCTION_USAGE (p
))
1968 CALL_INSN_FUNCTION_USAGE (i1
)
1969 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1971 else if (count
== m
->consec
&& m
->move_insn_first
)
1973 /* The SET_SRC might not be invariant, so we must
1974 use the REG_EQUAL note. */
1976 emit_move_insn (m
->set_dest
, m
->set_src
);
1977 temp
= get_insns ();
1980 add_label_notes (m
->set_src
, temp
);
1982 i1
= emit_insns_before (temp
, loop_start
);
1983 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1985 = gen_rtx_EXPR_LIST ((m
->is_equiv
? REG_EQUIV
1987 m
->set_src
, REG_NOTES (i1
));
1990 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1992 if (REG_NOTES (i1
) == 0)
1994 REG_NOTES (i1
) = REG_NOTES (p
);
1996 /* If there is a REG_EQUAL note present whose value
1997 is not loop invariant, then delete it, since it
1998 may cause problems with later optimization passes.
1999 It is possible for cse to create such notes
2000 like this as a result of record_jump_cond. */
2002 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2003 && ! invariant_p (XEXP (temp
, 0)))
2004 remove_note (i1
, temp
);
2010 if (loop_dump_stream
)
2011 fprintf (loop_dump_stream
, " moved to %d",
2014 /* If library call, now fix the REG_NOTES that contain
2015 insn pointers, namely REG_LIBCALL on FIRST
2016 and REG_RETVAL on I1. */
2017 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2019 XEXP (temp
, 0) = first
;
2020 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2021 XEXP (temp
, 0) = i1
;
2025 do p
= NEXT_INSN (p
);
2026 while (p
&& GET_CODE (p
) == NOTE
);
2029 /* The more regs we move, the less we like moving them. */
2033 /* Any other movable that loads the same register
2035 already_moved
[regno
] = 1;
2037 /* This reg has been moved out of one loop. */
2038 moved_once
[regno
] = 1;
2040 /* The reg set here is now invariant. */
2042 n_times_set
[regno
] = 0;
2046 /* Change the length-of-life info for the register
2047 to say it lives at least the full length of this loop.
2048 This will help guide optimizations in outer loops. */
2050 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2051 /* This is the old insn before all the moved insns.
2052 We can't use the moved insn because it is out of range
2053 in uid_luid. Only the old insns have luids. */
2054 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2055 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2056 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2058 /* Combine with this moved insn any other matching movables. */
2061 for (m1
= movables
; m1
; m1
= m1
->next
)
2066 /* Schedule the reg loaded by M1
2067 for replacement so that shares the reg of M.
2068 If the modes differ (only possible in restricted
2069 circumstances, make a SUBREG. */
2070 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2071 reg_map
[m1
->regno
] = m
->set_dest
;
2074 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2077 /* Get rid of the matching insn
2078 and prevent further processing of it. */
2081 /* if library call, delete all insn except last, which
2083 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2086 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2087 temp
= NEXT_INSN (temp
))
2090 delete_insn (m1
->insn
);
2092 /* Any other movable that loads the same register
2094 already_moved
[m1
->regno
] = 1;
2096 /* The reg merged here is now invariant,
2097 if the reg it matches is invariant. */
2099 n_times_set
[m1
->regno
] = 0;
2102 else if (loop_dump_stream
)
2103 fprintf (loop_dump_stream
, "not desirable");
2105 else if (loop_dump_stream
&& !m
->match
)
2106 fprintf (loop_dump_stream
, "not safe");
2108 if (loop_dump_stream
)
2109 fprintf (loop_dump_stream
, "\n");
2113 new_start
= loop_start
;
2115 /* Go through all the instructions in the loop, making
2116 all the register substitutions scheduled in REG_MAP. */
2117 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2118 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2119 || GET_CODE (p
) == CALL_INSN
)
2121 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2122 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2128 /* Scan X and replace the address of any MEM in it with ADDR.
2129 REG is the address that MEM should have before the replacement. */
2132 replace_call_address (x
, reg
, addr
)
2135 register enum rtx_code code
;
2141 code
= GET_CODE (x
);
2155 /* Short cut for very common case. */
2156 replace_call_address (XEXP (x
, 1), reg
, addr
);
2160 /* Short cut for very common case. */
2161 replace_call_address (XEXP (x
, 0), reg
, addr
);
2165 /* If this MEM uses a reg other than the one we expected,
2166 something is wrong. */
2167 if (XEXP (x
, 0) != reg
)
2176 fmt
= GET_RTX_FORMAT (code
);
2177 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2180 replace_call_address (XEXP (x
, i
), reg
, addr
);
2184 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2185 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2191 /* Return the number of memory refs to addresses that vary
2195 count_nonfixed_reads (x
)
2198 register enum rtx_code code
;
2206 code
= GET_CODE (x
);
2220 return ((invariant_p (XEXP (x
, 0)) != 1)
2221 + count_nonfixed_reads (XEXP (x
, 0)));
2228 fmt
= GET_RTX_FORMAT (code
);
2229 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2232 value
+= count_nonfixed_reads (XEXP (x
, i
));
2236 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2237 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2245 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2246 Replace it with an instruction to load just the low bytes
2247 if the machine supports such an instruction,
2248 and insert above LOOP_START an instruction to clear the register. */
2251 constant_high_bytes (p
, loop_start
)
2255 register int insn_code_number
;
2257 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2258 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2260 new = gen_rtx_SET (VOIDmode
,
2261 gen_rtx_STRICT_LOW_PART (VOIDmode
,
2262 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2263 SET_DEST (PATTERN (p
)),
2265 XEXP (SET_SRC (PATTERN (p
)), 0));
2266 insn_code_number
= recog (new, p
);
2268 if (insn_code_number
)
2272 /* Clear destination register before the loop. */
2273 emit_insn_before (gen_rtx_SET (VOIDmode
, SET_DEST (PATTERN (p
)),
2277 /* Inside the loop, just load the low part. */
2283 /* Scan a loop setting the variables `unknown_address_altered',
2284 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2285 and `loop_has_volatile'.
2286 Also, fill in the array `loop_store_mems'. */
2289 prescan_loop (start
, end
)
2292 register int level
= 1;
2295 unknown_address_altered
= 0;
2297 loop_has_volatile
= 0;
2298 loop_store_mems_idx
= 0;
2304 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2305 insn
= NEXT_INSN (insn
))
2307 if (GET_CODE (insn
) == NOTE
)
2309 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2312 /* Count number of loops contained in this one. */
2315 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2324 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2327 loop_continue
= insn
;
2330 else if (GET_CODE (insn
) == CALL_INSN
)
2332 if (! CONST_CALL_P (insn
))
2333 unknown_address_altered
= 1;
2338 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2340 if (volatile_refs_p (PATTERN (insn
)))
2341 loop_has_volatile
= 1;
2343 note_stores (PATTERN (insn
), note_addr_stored
);
2349 /* Scan the function looking for loops. Record the start and end of each loop.
2350 Also mark as invalid loops any loops that contain a setjmp or are branched
2351 to from outside the loop. */
2354 find_and_verify_loops (f
)
2358 int current_loop
= -1;
2362 /* If there are jumps to undefined labels,
2363 treat them as jumps out of any/all loops.
2364 This also avoids writing past end of tables when there are no loops. */
2365 uid_loop_num
[0] = -1;
2367 /* Find boundaries of loops, mark which loops are contained within
2368 loops, and invalidate loops that have setjmp. */
2370 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2372 if (GET_CODE (insn
) == NOTE
)
2373 switch (NOTE_LINE_NUMBER (insn
))
2375 case NOTE_INSN_LOOP_BEG
:
2376 loop_number_loop_starts
[++next_loop
] = insn
;
2377 loop_number_loop_ends
[next_loop
] = 0;
2378 loop_outer_loop
[next_loop
] = current_loop
;
2379 loop_invalid
[next_loop
] = 0;
2380 loop_number_exit_labels
[next_loop
] = 0;
2381 loop_number_exit_count
[next_loop
] = 0;
2382 current_loop
= next_loop
;
2385 case NOTE_INSN_SETJMP
:
2386 /* In this case, we must invalidate our current loop and any
2388 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2390 loop_invalid
[loop
] = 1;
2391 if (loop_dump_stream
)
2392 fprintf (loop_dump_stream
,
2393 "\nLoop at %d ignored due to setjmp.\n",
2394 INSN_UID (loop_number_loop_starts
[loop
]));
2398 case NOTE_INSN_LOOP_END
:
2399 if (current_loop
== -1)
2402 loop_number_loop_ends
[current_loop
] = insn
;
2403 current_loop
= loop_outer_loop
[current_loop
];
2410 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2411 enclosing loop, but this doesn't matter. */
2412 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2415 /* Any loop containing a label used in an initializer must be invalidated,
2416 because it can be jumped into from anywhere. */
2418 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2422 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2424 loop_num
= loop_outer_loop
[loop_num
])
2425 loop_invalid
[loop_num
] = 1;
2428 /* Any loop containing a label used for an exception handler must be
2429 invalidated, because it can be jumped into from anywhere. */
2431 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2435 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2437 loop_num
= loop_outer_loop
[loop_num
])
2438 loop_invalid
[loop_num
] = 1;
2441 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2442 loop that it is not contained within, that loop is marked invalid.
2443 If any INSN or CALL_INSN uses a label's address, then the loop containing
2444 that label is marked invalid, because it could be jumped into from
2447 Also look for blocks of code ending in an unconditional branch that
2448 exits the loop. If such a block is surrounded by a conditional
2449 branch around the block, move the block elsewhere (see below) and
2450 invert the jump to point to the code block. This may eliminate a
2451 label in our loop and will simplify processing by both us and a
2452 possible second cse pass. */
2454 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2455 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2457 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2459 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2461 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2466 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2468 loop_num
= loop_outer_loop
[loop_num
])
2469 loop_invalid
[loop_num
] = 1;
2473 if (GET_CODE (insn
) != JUMP_INSN
)
2476 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2478 /* See if this is an unconditional branch outside the loop. */
2479 if (this_loop_num
!= -1
2480 && (GET_CODE (PATTERN (insn
)) == RETURN
2481 || (simplejump_p (insn
)
2482 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2484 && get_max_uid () < max_uid_for_loop
)
2487 rtx our_next
= next_real_insn (insn
);
2489 int outer_loop
= -1;
2491 /* Go backwards until we reach the start of the loop, a label,
2493 for (p
= PREV_INSN (insn
);
2494 GET_CODE (p
) != CODE_LABEL
2495 && ! (GET_CODE (p
) == NOTE
2496 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2497 && GET_CODE (p
) != JUMP_INSN
;
2501 /* Check for the case where we have a jump to an inner nested
2502 loop, and do not perform the optimization in that case. */
2504 if (JUMP_LABEL (insn
))
2506 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2507 if (dest_loop
!= -1)
2509 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2510 outer_loop
= loop_outer_loop
[outer_loop
])
2511 if (outer_loop
== this_loop_num
)
2516 /* Make sure that the target of P is within the current loop. */
2518 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2519 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2520 outer_loop
= this_loop_num
;
2522 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2523 we have a block of code to try to move.
2525 We look backward and then forward from the target of INSN
2526 to find a BARRIER at the same loop depth as the target.
2527 If we find such a BARRIER, we make a new label for the start
2528 of the block, invert the jump in P and point it to that label,
2529 and move the block of code to the spot we found. */
2531 if (outer_loop
== -1
2532 && GET_CODE (p
) == JUMP_INSN
2533 && JUMP_LABEL (p
) != 0
2534 /* Just ignore jumps to labels that were never emitted.
2535 These always indicate compilation errors. */
2536 && INSN_UID (JUMP_LABEL (p
)) != 0
2538 && ! simplejump_p (p
)
2539 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2542 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2543 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2546 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2547 if (GET_CODE (loc
) == BARRIER
2548 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2552 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2553 if (GET_CODE (loc
) == BARRIER
2554 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2559 rtx cond_label
= JUMP_LABEL (p
);
2560 rtx new_label
= get_label_after (p
);
2562 /* Ensure our label doesn't go away. */
2563 LABEL_NUSES (cond_label
)++;
2565 /* Verify that uid_loop_num is large enough and that
2567 if (invert_jump (p
, new_label
))
2571 /* If no suitable BARRIER was found, create a suitable
2572 one before TARGET. Since TARGET is a fall through
2573 path, we'll need to insert an jump around our block
2574 and a add a BARRIER before TARGET.
2576 This creates an extra unconditional jump outside
2577 the loop. However, the benefits of removing rarely
2578 executed instructions from inside the loop usually
2579 outweighs the cost of the extra unconditional jump
2580 outside the loop. */
2585 temp
= gen_jump (JUMP_LABEL (insn
));
2586 temp
= emit_jump_insn_before (temp
, target
);
2587 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2588 LABEL_NUSES (JUMP_LABEL (insn
))++;
2589 loc
= emit_barrier_before (target
);
2592 /* Include the BARRIER after INSN and copy the
2594 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2595 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2597 /* All those insns are now in TARGET_LOOP_NUM. */
2598 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2600 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2602 /* The label jumped to by INSN is no longer a loop exit.
2603 Unless INSN does not have a label (e.g., it is a
2604 RETURN insn), search loop_number_exit_labels to find
2605 its label_ref, and remove it. Also turn off
2606 LABEL_OUTSIDE_LOOP_P bit. */
2607 if (JUMP_LABEL (insn
))
2612 r
= loop_number_exit_labels
[this_loop_num
];
2613 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2614 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2616 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2618 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2620 loop_number_exit_labels
[this_loop_num
]
2621 = LABEL_NEXTREF (r
);
2625 for (loop_num
= this_loop_num
;
2626 loop_num
!= -1 && loop_num
!= target_loop_num
;
2627 loop_num
= loop_outer_loop
[loop_num
])
2628 loop_number_exit_count
[loop_num
]--;
2630 /* If we didn't find it, then something is wrong. */
2635 /* P is now a jump outside the loop, so it must be put
2636 in loop_number_exit_labels, and marked as such.
2637 The easiest way to do this is to just call
2638 mark_loop_jump again for P. */
2639 mark_loop_jump (PATTERN (p
), this_loop_num
);
2641 /* If INSN now jumps to the insn after it,
2643 if (JUMP_LABEL (insn
) != 0
2644 && (next_real_insn (JUMP_LABEL (insn
))
2645 == next_real_insn (insn
)))
2649 /* Continue the loop after where the conditional
2650 branch used to jump, since the only branch insn
2651 in the block (if it still remains) is an inter-loop
2652 branch and hence needs no processing. */
2653 insn
= NEXT_INSN (cond_label
);
2655 if (--LABEL_NUSES (cond_label
) == 0)
2656 delete_insn (cond_label
);
2658 /* This loop will be continued with NEXT_INSN (insn). */
2659 insn
= PREV_INSN (insn
);
2666 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2667 loops it is contained in, mark the target loop invalid.
2669 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2672 mark_loop_jump (x
, loop_num
)
2680 switch (GET_CODE (x
))
2693 /* There could be a label reference in here. */
2694 mark_loop_jump (XEXP (x
, 0), loop_num
);
2700 mark_loop_jump (XEXP (x
, 0), loop_num
);
2701 mark_loop_jump (XEXP (x
, 1), loop_num
);
2706 mark_loop_jump (XEXP (x
, 0), loop_num
);
2710 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2712 /* Link together all labels that branch outside the loop. This
2713 is used by final_[bg]iv_value and the loop unrolling code. Also
2714 mark this LABEL_REF so we know that this branch should predict
2717 /* A check to make sure the label is not in an inner nested loop,
2718 since this does not count as a loop exit. */
2719 if (dest_loop
!= -1)
2721 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2722 outer_loop
= loop_outer_loop
[outer_loop
])
2723 if (outer_loop
== loop_num
)
2729 if (loop_num
!= -1 && outer_loop
== -1)
2731 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2732 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2733 loop_number_exit_labels
[loop_num
] = x
;
2735 for (outer_loop
= loop_num
;
2736 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2737 outer_loop
= loop_outer_loop
[outer_loop
])
2738 loop_number_exit_count
[outer_loop
]++;
2741 /* If this is inside a loop, but not in the current loop or one enclosed
2742 by it, it invalidates at least one loop. */
2744 if (dest_loop
== -1)
2747 /* We must invalidate every nested loop containing the target of this
2748 label, except those that also contain the jump insn. */
2750 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2752 /* Stop when we reach a loop that also contains the jump insn. */
2753 for (outer_loop
= loop_num
; outer_loop
!= -1;
2754 outer_loop
= loop_outer_loop
[outer_loop
])
2755 if (dest_loop
== outer_loop
)
2758 /* If we get here, we know we need to invalidate a loop. */
2759 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2760 fprintf (loop_dump_stream
,
2761 "\nLoop at %d ignored due to multiple entry points.\n",
2762 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2764 loop_invalid
[dest_loop
] = 1;
2769 /* If this is not setting pc, ignore. */
2770 if (SET_DEST (x
) == pc_rtx
)
2771 mark_loop_jump (SET_SRC (x
), loop_num
);
2775 mark_loop_jump (XEXP (x
, 1), loop_num
);
2776 mark_loop_jump (XEXP (x
, 2), loop_num
);
2781 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2782 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2786 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2787 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2791 /* Treat anything else (such as a symbol_ref)
2792 as a branch out of this loop, but not into any loop. */
2797 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2798 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2801 loop_number_exit_labels
[loop_num
] = x
;
2803 for (outer_loop
= loop_num
; outer_loop
!= -1;
2804 outer_loop
= loop_outer_loop
[outer_loop
])
2805 loop_number_exit_count
[outer_loop
]++;
2811 /* Return nonzero if there is a label in the range from
2812 insn INSN to and including the insn whose luid is END
2813 INSN must have an assigned luid (i.e., it must not have
2814 been previously created by loop.c). */
2817 labels_in_range_p (insn
, end
)
2821 while (insn
&& INSN_LUID (insn
) <= end
)
2823 if (GET_CODE (insn
) == CODE_LABEL
)
2825 insn
= NEXT_INSN (insn
);
2831 /* Record that a memory reference X is being set. */
2834 note_addr_stored (x
, y
)
2836 rtx y ATTRIBUTE_UNUSED
;
2840 if (x
== 0 || GET_CODE (x
) != MEM
)
2843 /* Count number of memory writes.
2844 This affects heuristics in strength_reduce. */
2847 /* BLKmode MEM means all memory is clobbered. */
2848 if (GET_MODE (x
) == BLKmode
)
2849 unknown_address_altered
= 1;
2851 if (unknown_address_altered
)
2854 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2855 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2856 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2858 /* We are storing at the same address as previously noted. Save the
2860 if (GET_MODE_SIZE (GET_MODE (x
))
2861 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2862 loop_store_mems
[i
] = x
;
2866 if (i
== NUM_STORES
)
2867 unknown_address_altered
= 1;
2869 else if (i
== loop_store_mems_idx
)
2870 loop_store_mems
[loop_store_mems_idx
++] = x
;
2873 /* Return nonzero if the rtx X is invariant over the current loop.
2875 The value is 2 if we refer to something only conditionally invariant.
2877 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2878 Otherwise, a memory ref is invariant if it does not conflict with
2879 anything stored in `loop_store_mems'. */
2886 register enum rtx_code code
;
2888 int conditional
= 0;
2892 code
= GET_CODE (x
);
2902 /* A LABEL_REF is normally invariant, however, if we are unrolling
2903 loops, and this label is inside the loop, then it isn't invariant.
2904 This is because each unrolled copy of the loop body will have
2905 a copy of this label. If this was invariant, then an insn loading
2906 the address of this label into a register might get moved outside
2907 the loop, and then each loop body would end up using the same label.
2909 We don't know the loop bounds here though, so just fail for all
2911 if (flag_unroll_loops
)
2918 case UNSPEC_VOLATILE
:
2922 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2923 since the reg might be set by initialization within the loop. */
2925 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2926 || x
== arg_pointer_rtx
)
2927 && ! current_function_has_nonlocal_goto
)
2931 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2934 if (n_times_set
[REGNO (x
)] < 0)
2937 return n_times_set
[REGNO (x
)] == 0;
2940 /* Volatile memory references must be rejected. Do this before
2941 checking for read-only items, so that volatile read-only items
2942 will be rejected also. */
2943 if (MEM_VOLATILE_P (x
))
2946 /* Read-only items (such as constants in a constant pool) are
2947 invariant if their address is. */
2948 if (RTX_UNCHANGING_P (x
))
2951 /* If we filled the table (or had a subroutine call), any location
2952 in memory could have been clobbered. */
2953 if (unknown_address_altered
)
2956 /* See if there is any dependence between a store and this load. */
2957 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2958 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2961 /* It's not invalidated by a store in memory
2962 but we must still verify the address is invariant. */
2966 /* Don't mess with insns declared volatile. */
2967 if (MEM_VOLATILE_P (x
))
2975 fmt
= GET_RTX_FORMAT (code
);
2976 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2980 int tem
= invariant_p (XEXP (x
, i
));
2986 else if (fmt
[i
] == 'E')
2989 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2991 int tem
= invariant_p (XVECEXP (x
, i
, j
));
3001 return 1 + conditional
;
3005 /* Return nonzero if all the insns in the loop that set REG
3006 are INSN and the immediately following insns,
3007 and if each of those insns sets REG in an invariant way
3008 (not counting uses of REG in them).
3010 The value is 2 if some of these insns are only conditionally invariant.
3012 We assume that INSN itself is the first set of REG
3013 and that its source is invariant. */
3016 consec_sets_invariant_p (reg
, n_sets
, insn
)
3020 register rtx p
= insn
;
3021 register int regno
= REGNO (reg
);
3023 /* Number of sets we have to insist on finding after INSN. */
3024 int count
= n_sets
- 1;
3025 int old
= n_times_set
[regno
];
3029 /* If N_SETS hit the limit, we can't rely on its value. */
3033 n_times_set
[regno
] = 0;
3037 register enum rtx_code code
;
3041 code
= GET_CODE (p
);
3043 /* If library call, skip to end of it. */
3044 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3049 && (set
= single_set (p
))
3050 && GET_CODE (SET_DEST (set
)) == REG
3051 && REGNO (SET_DEST (set
)) == regno
)
3053 this = invariant_p (SET_SRC (set
));
3056 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3058 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3059 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3061 this = (CONSTANT_P (XEXP (temp
, 0))
3062 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3063 && invariant_p (XEXP (temp
, 0))));
3070 else if (code
!= NOTE
)
3072 n_times_set
[regno
] = old
;
3077 n_times_set
[regno
] = old
;
3078 /* If invariant_p ever returned 2, we return 2. */
3079 return 1 + (value
& 2);
3083 /* I don't think this condition is sufficient to allow INSN
3084 to be moved, so we no longer test it. */
3086 /* Return 1 if all insns in the basic block of INSN and following INSN
3087 that set REG are invariant according to TABLE. */
3090 all_sets_invariant_p (reg
, insn
, table
)
3094 register rtx p
= insn
;
3095 register int regno
= REGNO (reg
);
3099 register enum rtx_code code
;
3101 code
= GET_CODE (p
);
3102 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3104 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3105 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3106 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3108 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3115 /* Look at all uses (not sets) of registers in X. For each, if it is
3116 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3117 a different insn, set USAGE[REGNO] to const0_rtx. */
3120 find_single_use_in_loop (insn
, x
, usage
)
3125 enum rtx_code code
= GET_CODE (x
);
3126 char *fmt
= GET_RTX_FORMAT (code
);
3131 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3132 ? const0_rtx
: insn
;
3134 else if (code
== SET
)
3136 /* Don't count SET_DEST if it is a REG; otherwise count things
3137 in SET_DEST because if a register is partially modified, it won't
3138 show up as a potential movable so we don't care how USAGE is set
3140 if (GET_CODE (SET_DEST (x
)) != REG
)
3141 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3142 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3145 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3147 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3148 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3149 else if (fmt
[i
] == 'E')
3150 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3151 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3155 /* Increment N_TIMES_SET at the index of each register
3156 that is modified by an insn between FROM and TO.
3157 If the value of an element of N_TIMES_SET becomes 127 or more,
3158 stop incrementing it, to avoid overflow.
3160 Store in SINGLE_USAGE[I] the single insn in which register I is
3161 used, if it is only used once. Otherwise, it is set to 0 (for no
3162 uses) or const0_rtx for more than one use. This parameter may be zero,
3163 in which case this processing is not done.
3165 Store in *COUNT_PTR the number of actual instruction
3166 in the loop. We use this to decide what is worth moving out. */
3168 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3169 In that case, it is the insn that last set reg n. */
3172 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3173 register rtx from
, to
;
3179 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3181 register int count
= 0;
3184 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3185 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3187 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3191 /* If requested, record registers that have exactly one use. */
3194 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3196 /* Include uses in REG_EQUAL notes. */
3197 if (REG_NOTES (insn
))
3198 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3201 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3202 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3203 /* Don't move a reg that has an explicit clobber.
3204 We might do so sometimes, but it's not worth the pain. */
3205 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3207 if (GET_CODE (PATTERN (insn
)) == SET
3208 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3210 dest
= SET_DEST (PATTERN (insn
));
3211 while (GET_CODE (dest
) == SUBREG
3212 || GET_CODE (dest
) == ZERO_EXTRACT
3213 || GET_CODE (dest
) == SIGN_EXTRACT
3214 || GET_CODE (dest
) == STRICT_LOW_PART
)
3215 dest
= XEXP (dest
, 0);
3216 if (GET_CODE (dest
) == REG
)
3218 register int regno
= REGNO (dest
);
3219 /* If this is the first setting of this reg
3220 in current basic block, and it was set before,
3221 it must be set in two basic blocks, so it cannot
3222 be moved out of the loop. */
3223 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3224 may_not_move
[regno
] = 1;
3225 /* If this is not first setting in current basic block,
3226 see if reg was used in between previous one and this.
3227 If so, neither one can be moved. */
3228 if (last_set
[regno
] != 0
3229 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3230 may_not_move
[regno
] = 1;
3231 if (n_times_set
[regno
] < 127)
3232 ++n_times_set
[regno
];
3233 last_set
[regno
] = insn
;
3236 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3239 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3241 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3242 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3243 /* Don't move a reg that has an explicit clobber.
3244 It's not worth the pain to try to do it correctly. */
3245 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3247 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3249 dest
= SET_DEST (x
);
3250 while (GET_CODE (dest
) == SUBREG
3251 || GET_CODE (dest
) == ZERO_EXTRACT
3252 || GET_CODE (dest
) == SIGN_EXTRACT
3253 || GET_CODE (dest
) == STRICT_LOW_PART
)
3254 dest
= XEXP (dest
, 0);
3255 if (GET_CODE (dest
) == REG
)
3257 register int regno
= REGNO (dest
);
3258 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3259 may_not_move
[regno
] = 1;
3260 if (last_set
[regno
] != 0
3261 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3262 may_not_move
[regno
] = 1;
3263 if (n_times_set
[regno
] < 127)
3264 ++n_times_set
[regno
];
3265 last_set
[regno
] = insn
;
3272 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3273 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3278 /* Given a loop that is bounded by LOOP_START and LOOP_END
3279 and that is entered at SCAN_START,
3280 return 1 if the register set in SET contained in insn INSN is used by
3281 any insn that precedes INSN in cyclic order starting
3282 from the loop entry point.
3284 We don't want to use INSN_LUID here because if we restrict INSN to those
3285 that have a valid INSN_LUID, it means we cannot move an invariant out
3286 from an inner loop past two loops. */
3289 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3290 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3292 rtx reg
= SET_DEST (set
);
3295 /* Scan forward checking for register usage. If we hit INSN, we
3296 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3297 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3299 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3300 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3310 /* A "basic induction variable" or biv is a pseudo reg that is set
3311 (within this loop) only by incrementing or decrementing it. */
3312 /* A "general induction variable" or giv is a pseudo reg whose
3313 value is a linear function of a biv. */
3315 /* Bivs are recognized by `basic_induction_var';
3316 Givs by `general_induct_var'. */
3318 /* Indexed by register number, indicates whether or not register is an
3319 induction variable, and if so what type. */
3321 enum iv_mode
*reg_iv_type
;
3323 /* Indexed by register number, contains pointer to `struct induction'
3324 if register is an induction variable. This holds general info for
3325 all induction variables. */
3327 struct induction
**reg_iv_info
;
3329 /* Indexed by register number, contains pointer to `struct iv_class'
3330 if register is a basic induction variable. This holds info describing
3331 the class (a related group) of induction variables that the biv belongs
3334 struct iv_class
**reg_biv_class
;
3336 /* The head of a list which links together (via the next field)
3337 every iv class for the current loop. */
3339 struct iv_class
*loop_iv_list
;
3341 /* Communication with routines called via `note_stores'. */
3343 static rtx note_insn
;
3345 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3347 static rtx addr_placeholder
;
3349 /* ??? Unfinished optimizations, and possible future optimizations,
3350 for the strength reduction code. */
3352 /* ??? There is one more optimization you might be interested in doing: to
3353 allocate pseudo registers for frequently-accessed memory locations.
3354 If the same memory location is referenced each time around, it might
3355 be possible to copy it into a register before and out after.
3356 This is especially useful when the memory location is a variable which
3357 is in a stack slot because somewhere its address is taken. If the
3358 loop doesn't contain a function call and the variable isn't volatile,
3359 it is safe to keep the value in a register for the duration of the
3360 loop. One tricky thing is that the copying of the value back from the
3361 register has to be done on all exits from the loop. You need to check that
3362 all the exits from the loop go to the same place. */
3364 /* ??? The interaction of biv elimination, and recognition of 'constant'
3365 bivs, may cause problems. */
3367 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3368 performance problems.
3370 Perhaps don't eliminate things that can be combined with an addressing
3371 mode. Find all givs that have the same biv, mult_val, and add_val;
3372 then for each giv, check to see if its only use dies in a following
3373 memory address. If so, generate a new memory address and check to see
3374 if it is valid. If it is valid, then store the modified memory address,
3375 otherwise, mark the giv as not done so that it will get its own iv. */
3377 /* ??? Could try to optimize branches when it is known that a biv is always
3380 /* ??? When replace a biv in a compare insn, we should replace with closest
3381 giv so that an optimized branch can still be recognized by the combiner,
3382 e.g. the VAX acb insn. */
3384 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3385 was rerun in loop_optimize whenever a register was added or moved.
3386 Also, some of the optimizations could be a little less conservative. */
3388 /* Perform strength reduction and induction variable elimination. */
3390 /* Pseudo registers created during this function will be beyond the last
3391 valid index in several tables including n_times_set and regno_last_uid.
3392 This does not cause a problem here, because the added registers cannot be
3393 givs outside of their loop, and hence will never be reconsidered.
3394 But scan_loop must check regnos to make sure they are in bounds. */
3397 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3398 loop_start
, loop_end
, unroll_p
)
3412 /* This is 1 if current insn is not executed at least once for every loop
3414 int not_every_iteration
= 0;
3415 /* This is 1 if current insn may be executed more than once for every
3417 int maybe_multiple
= 0;
3418 /* Temporary list pointers for traversing loop_iv_list. */
3419 struct iv_class
*bl
, **backbl
;
3420 /* Ratio of extra register life span we can justify
3421 for saving an instruction. More if loop doesn't call subroutines
3422 since in that case saving an insn makes more difference
3423 and more registers are available. */
3424 /* ??? could set this to last value of threshold in move_movables */
3425 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3426 /* Map of pseudo-register replacements. */
3430 rtx end_insert_before
;
3433 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3434 * sizeof (enum iv_mode
*));
3435 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3436 reg_iv_info
= (struct induction
**)
3437 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3438 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3439 * sizeof (struct induction
*)));
3440 reg_biv_class
= (struct iv_class
**)
3441 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3442 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3443 * sizeof (struct iv_class
*)));
3446 addr_placeholder
= gen_reg_rtx (Pmode
);
3448 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3449 must be put before this insn, so that they will appear in the right
3450 order (i.e. loop order).
3452 If loop_end is the end of the current function, then emit a
3453 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3455 if (NEXT_INSN (loop_end
) != 0)
3456 end_insert_before
= NEXT_INSN (loop_end
);
3458 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3460 /* Scan through loop to find all possible bivs. */
3466 /* At end of a straight-in loop, we are done.
3467 At end of a loop entered at the bottom, scan the top. */
3468 if (p
== scan_start
)
3476 if (p
== scan_start
)
3480 if (GET_CODE (p
) == INSN
3481 && (set
= single_set (p
))
3482 && GET_CODE (SET_DEST (set
)) == REG
)
3484 dest_reg
= SET_DEST (set
);
3485 if (REGNO (dest_reg
) < max_reg_before_loop
3486 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3487 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3489 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3490 dest_reg
, p
, &inc_val
, &mult_val
))
3492 /* It is a possible basic induction variable.
3493 Create and initialize an induction structure for it. */
3496 = (struct induction
*) alloca (sizeof (struct induction
));
3498 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3499 not_every_iteration
, maybe_multiple
);
3500 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3502 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3503 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3507 /* Past CODE_LABEL, we get to insns that may be executed multiple
3508 times. The only way we can be sure that they can't is if every
3509 jump insn between here and the end of the loop either
3510 returns, exits the loop, is a forward jump, or is a jump
3511 to the loop start. */
3513 if (GET_CODE (p
) == CODE_LABEL
)
3521 insn
= NEXT_INSN (insn
);
3522 if (insn
== scan_start
)
3530 if (insn
== scan_start
)
3534 if (GET_CODE (insn
) == JUMP_INSN
3535 && GET_CODE (PATTERN (insn
)) != RETURN
3536 && (! condjump_p (insn
)
3537 || (JUMP_LABEL (insn
) != 0
3538 && JUMP_LABEL (insn
) != scan_start
3539 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3540 || INSN_UID (insn
) >= max_uid_for_loop
3541 || (INSN_LUID (JUMP_LABEL (insn
))
3542 < INSN_LUID (insn
))))))
3550 /* Past a jump, we get to insns for which we can't count
3551 on whether they will be executed during each iteration. */
3552 /* This code appears twice in strength_reduce. There is also similar
3553 code in scan_loop. */
3554 if (GET_CODE (p
) == JUMP_INSN
3555 /* If we enter the loop in the middle, and scan around to the
3556 beginning, don't set not_every_iteration for that.
3557 This can be any kind of jump, since we want to know if insns
3558 will be executed if the loop is executed. */
3559 && ! (JUMP_LABEL (p
) == loop_top
3560 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3561 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3565 /* If this is a jump outside the loop, then it also doesn't
3566 matter. Check to see if the target of this branch is on the
3567 loop_number_exits_labels list. */
3569 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3571 label
= LABEL_NEXTREF (label
))
3572 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3576 not_every_iteration
= 1;
3579 else if (GET_CODE (p
) == NOTE
)
3581 /* At the virtual top of a converted loop, insns are again known to
3582 be executed each iteration: logically, the loop begins here
3583 even though the exit code has been duplicated. */
3584 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3585 not_every_iteration
= 0;
3586 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3588 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3592 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3593 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3594 or not an insn is known to be executed each iteration of the
3595 loop, whether or not any iterations are known to occur.
3597 Therefore, if we have just passed a label and have no more labels
3598 between here and the test insn of the loop, we know these insns
3599 will be executed each iteration. */
3601 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3602 && no_labels_between_p (p
, loop_end
))
3603 not_every_iteration
= 0;
3606 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3607 Make a sanity check against n_times_set. */
3608 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3610 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3611 /* Above happens if register modified by subreg, etc. */
3612 /* Make sure it is not recognized as a basic induction var: */
3613 || n_times_set
[bl
->regno
] != bl
->biv_count
3614 /* If never incremented, it is invariant that we decided not to
3615 move. So leave it alone. */
3616 || ! bl
->incremented
)
3618 if (loop_dump_stream
)
3619 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3621 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3622 ? "not induction variable"
3623 : (! bl
->incremented
? "never incremented"
3626 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3633 if (loop_dump_stream
)
3634 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3638 /* Exit if there are no bivs. */
3641 /* Can still unroll the loop anyways, but indicate that there is no
3642 strength reduction info available. */
3644 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3649 /* Find initial value for each biv by searching backwards from loop_start,
3650 halting at first label. Also record any test condition. */
3653 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3657 if (GET_CODE (p
) == CALL_INSN
)
3660 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3661 || GET_CODE (p
) == CALL_INSN
)
3662 note_stores (PATTERN (p
), record_initial
);
3664 /* Record any test of a biv that branches around the loop if no store
3665 between it and the start of loop. We only care about tests with
3666 constants and registers and only certain of those. */
3667 if (GET_CODE (p
) == JUMP_INSN
3668 && JUMP_LABEL (p
) != 0
3669 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3670 && (test
= get_condition_for_loop (p
)) != 0
3671 && GET_CODE (XEXP (test
, 0)) == REG
3672 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3673 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3674 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3675 && bl
->init_insn
== 0)
3677 /* If an NE test, we have an initial value! */
3678 if (GET_CODE (test
) == NE
)
3681 bl
->init_set
= gen_rtx_SET (VOIDmode
,
3682 XEXP (test
, 0), XEXP (test
, 1));
3685 bl
->initial_test
= test
;
3689 /* Look at the each biv and see if we can say anything better about its
3690 initial value from any initializing insns set up above. (This is done
3691 in two passes to avoid missing SETs in a PARALLEL.) */
3692 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3697 if (! bl
->init_insn
)
3700 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3701 is a constant, use the value of that. */
3702 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
3703 && CONSTANT_P (XEXP (note
, 0)))
3704 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
3705 && CONSTANT_P (XEXP (note
, 0))))
3706 src
= XEXP (note
, 0);
3708 src
= SET_SRC (bl
->init_set
);
3710 if (loop_dump_stream
)
3711 fprintf (loop_dump_stream
,
3712 "Biv %d initialized at insn %d: initial value ",
3713 bl
->regno
, INSN_UID (bl
->init_insn
));
3715 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3716 || GET_MODE (src
) == VOIDmode
)
3717 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3719 bl
->initial_value
= src
;
3721 if (loop_dump_stream
)
3723 if (GET_CODE (src
) == CONST_INT
)
3725 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (src
));
3726 fputc ('\n', loop_dump_stream
);
3730 print_rtl (loop_dump_stream
, src
);
3731 fprintf (loop_dump_stream
, "\n");
3737 /* Biv initial value is not simple move,
3738 so let it keep initial value of "itself". */
3740 if (loop_dump_stream
)
3741 fprintf (loop_dump_stream
, "is complex\n");
3745 /* Search the loop for general induction variables. */
3747 /* A register is a giv if: it is only set once, it is a function of a
3748 biv and a constant (or invariant), and it is not a biv. */
3750 not_every_iteration
= 0;
3756 /* At end of a straight-in loop, we are done.
3757 At end of a loop entered at the bottom, scan the top. */
3758 if (p
== scan_start
)
3766 if (p
== scan_start
)
3770 /* Look for a general induction variable in a register. */
3771 if (GET_CODE (p
) == INSN
3772 && (set
= single_set (p
))
3773 && GET_CODE (SET_DEST (set
)) == REG
3774 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3782 dest_reg
= SET_DEST (set
);
3783 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3786 if (/* SET_SRC is a giv. */
3787 ((benefit
= general_induction_var (SET_SRC (set
),
3790 /* Equivalent expression is a giv. */
3791 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3792 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3794 &add_val
, &mult_val
))))
3795 /* Don't try to handle any regs made by loop optimization.
3796 We have nothing on them in regno_first_uid, etc. */
3797 && REGNO (dest_reg
) < max_reg_before_loop
3798 /* Don't recognize a BASIC_INDUCT_VAR here. */
3799 && dest_reg
!= src_reg
3800 /* This must be the only place where the register is set. */
3801 && (n_times_set
[REGNO (dest_reg
)] == 1
3802 /* or all sets must be consecutive and make a giv. */
3803 || (benefit
= consec_sets_giv (benefit
, p
,
3805 &add_val
, &mult_val
))))
3809 = (struct induction
*) alloca (sizeof (struct induction
));
3812 /* If this is a library call, increase benefit. */
3813 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3814 benefit
+= libcall_benefit (p
);
3816 /* Skip the consecutive insns, if there are any. */
3817 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3820 /* If first insn of libcall sequence, skip to end.
3821 Do this at start of loop, since INSN is guaranteed to
3823 if (GET_CODE (p
) != NOTE
3824 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3827 do p
= NEXT_INSN (p
);
3828 while (GET_CODE (p
) == NOTE
);
3831 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3832 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3838 #ifndef DONT_REDUCE_ADDR
3839 /* Look for givs which are memory addresses. */
3840 /* This resulted in worse code on a VAX 8600. I wonder if it
3842 if (GET_CODE (p
) == INSN
)
3843 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3847 /* Update the status of whether giv can derive other givs. This can
3848 change when we pass a label or an insn that updates a biv. */
3849 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3850 || GET_CODE (p
) == CODE_LABEL
)
3851 update_giv_derive (p
);
3853 /* Past a jump, we get to insns for which we can't count
3854 on whether they will be executed during each iteration. */
3855 /* This code appears twice in strength_reduce. There is also similar
3856 code in scan_loop. */
3857 if (GET_CODE (p
) == JUMP_INSN
3858 /* If we enter the loop in the middle, and scan around to the
3859 beginning, don't set not_every_iteration for that.
3860 This can be any kind of jump, since we want to know if insns
3861 will be executed if the loop is executed. */
3862 && ! (JUMP_LABEL (p
) == loop_top
3863 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3864 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3868 /* If this is a jump outside the loop, then it also doesn't
3869 matter. Check to see if the target of this branch is on the
3870 loop_number_exits_labels list. */
3872 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3874 label
= LABEL_NEXTREF (label
))
3875 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3879 not_every_iteration
= 1;
3882 else if (GET_CODE (p
) == NOTE
)
3884 /* At the virtual top of a converted loop, insns are again known to
3885 be executed each iteration: logically, the loop begins here
3886 even though the exit code has been duplicated. */
3887 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3888 not_every_iteration
= 0;
3889 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3891 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3895 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3896 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3897 or not an insn is known to be executed each iteration of the
3898 loop, whether or not any iterations are known to occur.
3900 Therefore, if we have just passed a label and have no more labels
3901 between here and the test insn of the loop, we know these insns
3902 will be executed each iteration. */
3904 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3905 && no_labels_between_p (p
, loop_end
))
3906 not_every_iteration
= 0;
3909 /* Try to calculate and save the number of loop iterations. This is
3910 set to zero if the actual number can not be calculated. This must
3911 be called after all giv's have been identified, since otherwise it may
3912 fail if the iteration variable is a giv. */
3914 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3916 /* Now for each giv for which we still don't know whether or not it is
3917 replaceable, check to see if it is replaceable because its final value
3918 can be calculated. This must be done after loop_iterations is called,
3919 so that final_giv_value will work correctly. */
3921 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3923 struct induction
*v
;
3925 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3926 if (! v
->replaceable
&& ! v
->not_replaceable
)
3927 check_final_value (v
, loop_start
, loop_end
);
3930 /* Try to prove that the loop counter variable (if any) is always
3931 nonnegative; if so, record that fact with a REG_NONNEG note
3932 so that "decrement and branch until zero" insn can be used. */
3933 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3936 /* record loop-variables relevant for BCT optimization before unrolling
3937 the loop. Unrolling may update part of this information, and the
3938 correct data will be used for generating the BCT. */
3939 #ifdef HAVE_decrement_and_branch_on_count
3940 if (HAVE_decrement_and_branch_on_count
)
3941 analyze_loop_iterations (loop_start
, loop_end
);
3945 /* Create reg_map to hold substitutions for replaceable giv regs. */
3946 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3947 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3949 /* Examine each iv class for feasibility of strength reduction/induction
3950 variable elimination. */
3952 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3954 struct induction
*v
;
3957 rtx final_value
= 0;
3959 /* Test whether it will be possible to eliminate this biv
3960 provided all givs are reduced. This is possible if either
3961 the reg is not used outside the loop, or we can compute
3962 what its final value will be.
3964 For architectures with a decrement_and_branch_until_zero insn,
3965 don't do this if we put a REG_NONNEG note on the endtest for
3968 /* Compare against bl->init_insn rather than loop_start.
3969 We aren't concerned with any uses of the biv between
3970 init_insn and loop_start since these won't be affected
3971 by the value of the biv elsewhere in the function, so
3972 long as init_insn doesn't use the biv itself.
3973 March 14, 1989 -- self@bayes.arc.nasa.gov */
3975 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3977 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3978 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3979 #ifdef HAVE_decrement_and_branch_until_zero
3982 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3983 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3984 #ifdef HAVE_decrement_and_branch_until_zero
3988 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3989 threshold
, insn_count
);
3992 if (loop_dump_stream
)
3994 fprintf (loop_dump_stream
,
3995 "Cannot eliminate biv %d.\n",
3997 fprintf (loop_dump_stream
,
3998 "First use: insn %d, last use: insn %d.\n",
3999 REGNO_FIRST_UID (bl
->regno
),
4000 REGNO_LAST_UID (bl
->regno
));
4004 /* Combine all giv's for this iv_class. */
4007 /* This will be true at the end, if all givs which depend on this
4008 biv have been strength reduced.
4009 We can't (currently) eliminate the biv unless this is so. */
4012 /* Check each giv in this class to see if we will benefit by reducing
4013 it. Skip giv's combined with others. */
4014 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4016 struct induction
*tv
;
4018 if (v
->ignore
|| v
->same
)
4021 benefit
= v
->benefit
;
4023 /* Reduce benefit if not replaceable, since we will insert
4024 a move-insn to replace the insn that calculates this giv.
4025 Don't do this unless the giv is a user variable, since it
4026 will often be marked non-replaceable because of the duplication
4027 of the exit code outside the loop. In such a case, the copies
4028 we insert are dead and will be deleted. So they don't have
4029 a cost. Similar situations exist. */
4030 /* ??? The new final_[bg]iv_value code does a much better job
4031 of finding replaceable giv's, and hence this code may no longer
4033 if (! v
->replaceable
&& ! bl
->eliminable
4034 && REG_USERVAR_P (v
->dest_reg
))
4035 benefit
-= copy_cost
;
4037 /* Decrease the benefit to count the add-insns that we will
4038 insert to increment the reduced reg for the giv. */
4039 benefit
-= add_cost
* bl
->biv_count
;
4041 /* Decide whether to strength-reduce this giv or to leave the code
4042 unchanged (recompute it from the biv each time it is used).
4043 This decision can be made independently for each giv. */
4046 /* Attempt to guess whether autoincrement will handle some of the
4047 new add insns; if so, increase BENEFIT (undo the subtraction of
4048 add_cost that was done above). */
4049 if (v
->giv_type
== DEST_ADDR
4050 && GET_CODE (v
->mult_val
) == CONST_INT
)
4052 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
4053 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4054 benefit
+= add_cost
* bl
->biv_count
;
4056 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
4057 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4058 benefit
+= add_cost
* bl
->biv_count
;
4063 /* If an insn is not to be strength reduced, then set its ignore
4064 flag, and clear all_reduced. */
4066 /* A giv that depends on a reversed biv must be reduced if it is
4067 used after the loop exit, otherwise, it would have the wrong
4068 value after the loop exit. To make it simple, just reduce all
4069 of such giv's whether or not we know they are used after the loop
4072 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4075 if (loop_dump_stream
)
4076 fprintf (loop_dump_stream
,
4077 "giv of insn %d not worth while, %d vs %d.\n",
4079 v
->lifetime
* threshold
* benefit
, insn_count
);
4085 /* Check that we can increment the reduced giv without a
4086 multiply insn. If not, reject it. */
4088 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4089 if (tv
->mult_val
== const1_rtx
4090 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4092 if (loop_dump_stream
)
4093 fprintf (loop_dump_stream
,
4094 "giv of insn %d: would need a multiply.\n",
4095 INSN_UID (v
->insn
));
4103 /* Reduce each giv that we decided to reduce. */
4105 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4107 struct induction
*tv
;
4108 if (! v
->ignore
&& v
->same
== 0)
4110 int auto_inc_opt
= 0;
4112 v
->new_reg
= gen_reg_rtx (v
->mode
);
4115 /* If the target has auto-increment addressing modes, and
4116 this is an address giv, then try to put the increment
4117 immediately after its use, so that flow can create an
4118 auto-increment addressing mode. */
4119 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4120 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4121 /* We don't handle reversed biv's because bl->biv->insn
4122 does not have a valid INSN_LUID. */
4124 && v
->always_executed
&& ! v
->maybe_multiple
4125 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4127 /* If other giv's have been combined with this one, then
4128 this will work only if all uses of the other giv's occur
4129 before this giv's insn. This is difficult to check.
4131 We simplify this by looking for the common case where
4132 there is one DEST_REG giv, and this giv's insn is the
4133 last use of the dest_reg of that DEST_REG giv. If the
4134 increment occurs after the address giv, then we can
4135 perform the optimization. (Otherwise, the increment
4136 would have to go before other_giv, and we would not be
4137 able to combine it with the address giv to get an
4138 auto-inc address.) */
4139 if (v
->combined_with
)
4141 struct induction
*other_giv
= 0;
4143 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4151 if (! tv
&& other_giv
4152 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4153 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4154 == INSN_UID (v
->insn
))
4155 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4158 /* Check for case where increment is before the address
4159 giv. Do this test in "loop order". */
4160 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4161 && (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4162 || (INSN_LUID (bl
->biv
->insn
)
4163 > INSN_LUID (scan_start
))))
4164 || (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4165 && (INSN_LUID (scan_start
)
4166 < INSN_LUID (bl
->biv
->insn
))))
4175 /* We can't put an insn immediately after one setting
4176 cc0, or immediately before one using cc0. */
4177 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4178 || (auto_inc_opt
== -1
4179 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4180 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4181 && sets_cc0_p (PATTERN (prev
))))
4187 v
->auto_inc_opt
= 1;
4191 /* For each place where the biv is incremented, add an insn
4192 to increment the new, reduced reg for the giv. */
4193 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4198 insert_before
= tv
->insn
;
4199 else if (auto_inc_opt
== 1)
4200 insert_before
= NEXT_INSN (v
->insn
);
4202 insert_before
= v
->insn
;
4204 if (tv
->mult_val
== const1_rtx
)
4205 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4206 v
->new_reg
, v
->new_reg
, insert_before
);
4207 else /* tv->mult_val == const0_rtx */
4208 /* A multiply is acceptable here
4209 since this is presumed to be seldom executed. */
4210 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4211 v
->add_val
, v
->new_reg
, insert_before
);
4214 /* Add code at loop start to initialize giv's reduced reg. */
4216 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4217 v
->add_val
, v
->new_reg
, loop_start
);
4221 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4224 For each giv register that can be reduced now: if replaceable,
4225 substitute reduced reg wherever the old giv occurs;
4226 else add new move insn "giv_reg = reduced_reg".
4228 Also check for givs whose first use is their definition and whose
4229 last use is the definition of another giv. If so, it is likely
4230 dead and should not be used to eliminate a biv. */
4231 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4233 if (v
->same
&& v
->same
->ignore
)
4239 if (v
->giv_type
== DEST_REG
4240 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4242 struct induction
*v1
;
4244 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4245 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4249 /* Update expression if this was combined, in case other giv was
4252 v
->new_reg
= replace_rtx (v
->new_reg
,
4253 v
->same
->dest_reg
, v
->same
->new_reg
);
4255 if (v
->giv_type
== DEST_ADDR
)
4256 /* Store reduced reg as the address in the memref where we found
4258 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4259 else if (v
->replaceable
)
4261 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4264 /* I can no longer duplicate the original problem. Perhaps
4265 this is unnecessary now? */
4267 /* Replaceable; it isn't strictly necessary to delete the old
4268 insn and emit a new one, because v->dest_reg is now dead.
4270 However, especially when unrolling loops, the special
4271 handling for (set REG0 REG1) in the second cse pass may
4272 make v->dest_reg live again. To avoid this problem, emit
4273 an insn to set the original giv reg from the reduced giv.
4274 We can not delete the original insn, since it may be part
4275 of a LIBCALL, and the code in flow that eliminates dead
4276 libcalls will fail if it is deleted. */
4277 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4283 /* Not replaceable; emit an insn to set the original giv reg from
4284 the reduced giv, same as above. */
4285 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4289 /* When a loop is reversed, givs which depend on the reversed
4290 biv, and which are live outside the loop, must be set to their
4291 correct final value. This insn is only needed if the giv is
4292 not replaceable. The correct final value is the same as the
4293 value that the giv starts the reversed loop with. */
4294 if (bl
->reversed
&& ! v
->replaceable
)
4295 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4296 v
->add_val
, v
->dest_reg
, end_insert_before
);
4297 else if (v
->final_value
)
4301 /* If the loop has multiple exits, emit the insn before the
4302 loop to ensure that it will always be executed no matter
4303 how the loop exits. Otherwise, emit the insn after the loop,
4304 since this is slightly more efficient. */
4305 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4306 insert_before
= loop_start
;
4308 insert_before
= end_insert_before
;
4309 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4313 /* If the insn to set the final value of the giv was emitted
4314 before the loop, then we must delete the insn inside the loop
4315 that sets it. If this is a LIBCALL, then we must delete
4316 every insn in the libcall. Note, however, that
4317 final_giv_value will only succeed when there are multiple
4318 exits if the giv is dead at each exit, hence it does not
4319 matter that the original insn remains because it is dead
4321 /* Delete the insn inside the loop that sets the giv since
4322 the giv is now set before (or after) the loop. */
4323 delete_insn (v
->insn
);
4327 if (loop_dump_stream
)
4329 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4330 INSN_UID (v
->insn
));
4331 print_rtl (loop_dump_stream
, v
->new_reg
);
4332 fprintf (loop_dump_stream
, "\n");
4336 /* All the givs based on the biv bl have been reduced if they
4339 /* For each giv not marked as maybe dead that has been combined with a
4340 second giv, clear any "maybe dead" mark on that second giv.
4341 v->new_reg will either be or refer to the register of the giv it
4344 Doing this clearing avoids problems in biv elimination where a
4345 giv's new_reg is a complex value that can't be put in the insn but
4346 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4347 Since the register will be used in either case, we'd prefer it be
4348 used from the simpler giv. */
4350 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4351 if (! v
->maybe_dead
&& v
->same
)
4352 v
->same
->maybe_dead
= 0;
4354 /* Try to eliminate the biv, if it is a candidate.
4355 This won't work if ! all_reduced,
4356 since the givs we planned to use might not have been reduced.
4358 We have to be careful that we didn't initially think we could eliminate
4359 this biv because of a giv that we now think may be dead and shouldn't
4360 be used as a biv replacement.
4362 Also, there is the possibility that we may have a giv that looks
4363 like it can be used to eliminate a biv, but the resulting insn
4364 isn't valid. This can happen, for example, on the 88k, where a
4365 JUMP_INSN can compare a register only with zero. Attempts to
4366 replace it with a compare with a constant will fail.
4368 Note that in cases where this call fails, we may have replaced some
4369 of the occurrences of the biv with a giv, but no harm was done in
4370 doing so in the rare cases where it can occur. */
4372 if (all_reduced
== 1 && bl
->eliminable
4373 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4374 threshold
, insn_count
))
4377 /* ?? If we created a new test to bypass the loop entirely,
4378 or otherwise drop straight in, based on this test, then
4379 we might want to rewrite it also. This way some later
4380 pass has more hope of removing the initialization of this
4383 /* If final_value != 0, then the biv may be used after loop end
4384 and we must emit an insn to set it just in case.
4386 Reversed bivs already have an insn after the loop setting their
4387 value, so we don't need another one. We can't calculate the
4388 proper final value for such a biv here anyways. */
4389 if (final_value
!= 0 && ! bl
->reversed
)
4393 /* If the loop has multiple exits, emit the insn before the
4394 loop to ensure that it will always be executed no matter
4395 how the loop exits. Otherwise, emit the insn after the
4396 loop, since this is slightly more efficient. */
4397 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4398 insert_before
= loop_start
;
4400 insert_before
= end_insert_before
;
4402 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4407 /* Delete all of the instructions inside the loop which set
4408 the biv, as they are all dead. If is safe to delete them,
4409 because an insn setting a biv will never be part of a libcall. */
4410 /* However, deleting them will invalidate the regno_last_uid info,
4411 so keeping them around is more convenient. Final_biv_value
4412 will only succeed when there are multiple exits if the biv
4413 is dead at each exit, hence it does not matter that the original
4414 insn remains, because it is dead anyways. */
4415 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4416 delete_insn (v
->insn
);
4419 if (loop_dump_stream
)
4420 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4425 /* Go through all the instructions in the loop, making all the
4426 register substitutions scheduled in REG_MAP. */
4428 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4429 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4430 || GET_CODE (p
) == CALL_INSN
)
4432 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4433 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4437 /* Unroll loops from within strength reduction so that we can use the
4438 induction variable information that strength_reduce has already
4442 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4445 /* instrument the loop with bct insn */
4446 #ifdef HAVE_decrement_and_branch_on_count
4447 if (HAVE_decrement_and_branch_on_count
)
4448 insert_bct (loop_start
, loop_end
);
4452 if (loop_dump_stream
)
4453 fprintf (loop_dump_stream
, "\n");
4456 /* Return 1 if X is a valid source for an initial value (or as value being
4457 compared against in an initial test).
4459 X must be either a register or constant and must not be clobbered between
4460 the current insn and the start of the loop.
4462 INSN is the insn containing X. */
4465 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4474 /* Only consider pseudos we know about initialized in insns whose luids
4476 if (GET_CODE (x
) != REG
4477 || REGNO (x
) >= max_reg_before_loop
)
4480 /* Don't use call-clobbered registers across a call which clobbers it. On
4481 some machines, don't use any hard registers at all. */
4482 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4483 && (SMALL_REGISTER_CLASSES
4484 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4487 /* Don't use registers that have been clobbered before the start of the
4489 if (reg_set_between_p (x
, insn
, loop_start
))
4495 /* Scan X for memory refs and check each memory address
4496 as a possible giv. INSN is the insn whose pattern X comes from.
4497 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4498 every loop iteration. */
4501 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4504 int not_every_iteration
;
4505 rtx loop_start
, loop_end
;
4508 register enum rtx_code code
;
4514 code
= GET_CODE (x
);
4538 benefit
= general_induction_var (XEXP (x
, 0),
4539 &src_reg
, &add_val
, &mult_val
);
4541 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4542 Such a giv isn't useful. */
4543 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4545 /* Found one; record it. */
4547 = (struct induction
*) oballoc (sizeof (struct induction
));
4549 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4550 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4551 &XEXP (x
, 0), loop_start
, loop_end
);
4553 v
->mem_mode
= GET_MODE (x
);
4562 /* Recursively scan the subexpressions for other mem refs. */
4564 fmt
= GET_RTX_FORMAT (code
);
4565 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4567 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4569 else if (fmt
[i
] == 'E')
4570 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4571 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4572 loop_start
, loop_end
);
4575 /* Fill in the data about one biv update.
4576 V is the `struct induction' in which we record the biv. (It is
4577 allocated by the caller, with alloca.)
4578 INSN is the insn that sets it.
4579 DEST_REG is the biv's reg.
4581 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4582 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4583 being set to INC_VAL.
4585 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4586 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4587 can be executed more than once per iteration. If MAYBE_MULTIPLE
4588 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4589 executed exactly once per iteration. */
4592 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4593 not_every_iteration
, maybe_multiple
)
4594 struct induction
*v
;
4599 int not_every_iteration
;
4602 struct iv_class
*bl
;
4605 v
->src_reg
= dest_reg
;
4606 v
->dest_reg
= dest_reg
;
4607 v
->mult_val
= mult_val
;
4608 v
->add_val
= inc_val
;
4609 v
->mode
= GET_MODE (dest_reg
);
4610 v
->always_computable
= ! not_every_iteration
;
4611 v
->always_executed
= ! not_every_iteration
;
4612 v
->maybe_multiple
= maybe_multiple
;
4614 /* Add this to the reg's iv_class, creating a class
4615 if this is the first incrementation of the reg. */
4617 bl
= reg_biv_class
[REGNO (dest_reg
)];
4620 /* Create and initialize new iv_class. */
4622 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4624 bl
->regno
= REGNO (dest_reg
);
4630 /* Set initial value to the reg itself. */
4631 bl
->initial_value
= dest_reg
;
4632 /* We haven't seen the initializing insn yet */
4635 bl
->initial_test
= 0;
4636 bl
->incremented
= 0;
4640 bl
->total_benefit
= 0;
4642 /* Add this class to loop_iv_list. */
4643 bl
->next
= loop_iv_list
;
4646 /* Put it in the array of biv register classes. */
4647 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4650 /* Update IV_CLASS entry for this biv. */
4651 v
->next_iv
= bl
->biv
;
4654 if (mult_val
== const1_rtx
)
4655 bl
->incremented
= 1;
4657 if (loop_dump_stream
)
4659 fprintf (loop_dump_stream
,
4660 "Insn %d: possible biv, reg %d,",
4661 INSN_UID (insn
), REGNO (dest_reg
));
4662 if (GET_CODE (inc_val
) == CONST_INT
)
4664 fprintf (loop_dump_stream
, " const =");
4665 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (inc_val
));
4666 fputc ('\n', loop_dump_stream
);
4670 fprintf (loop_dump_stream
, " const = ");
4671 print_rtl (loop_dump_stream
, inc_val
);
4672 fprintf (loop_dump_stream
, "\n");
4677 /* Fill in the data about one giv.
4678 V is the `struct induction' in which we record the giv. (It is
4679 allocated by the caller, with alloca.)
4680 INSN is the insn that sets it.
4681 BENEFIT estimates the savings from deleting this insn.
4682 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4683 into a register or is used as a memory address.
4685 SRC_REG is the biv reg which the giv is computed from.
4686 DEST_REG is the giv's reg (if the giv is stored in a reg).
4687 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4688 LOCATION points to the place where this giv's value appears in INSN. */
4691 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4692 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4693 struct induction
*v
;
4697 rtx mult_val
, add_val
;
4700 int not_every_iteration
;
4702 rtx loop_start
, loop_end
;
4704 struct induction
*b
;
4705 struct iv_class
*bl
;
4706 rtx set
= single_set (insn
);
4709 v
->src_reg
= src_reg
;
4711 v
->dest_reg
= dest_reg
;
4712 v
->mult_val
= mult_val
;
4713 v
->add_val
= add_val
;
4714 v
->benefit
= benefit
;
4715 v
->location
= location
;
4717 v
->combined_with
= 0;
4718 v
->maybe_multiple
= 0;
4720 v
->derive_adjustment
= 0;
4726 v
->auto_inc_opt
= 0;
4730 /* The v->always_computable field is used in update_giv_derive, to
4731 determine whether a giv can be used to derive another giv. For a
4732 DEST_REG giv, INSN computes a new value for the giv, so its value
4733 isn't computable if INSN insn't executed every iteration.
4734 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4735 it does not compute a new value. Hence the value is always computable
4736 regardless of whether INSN is executed each iteration. */
4738 if (type
== DEST_ADDR
)
4739 v
->always_computable
= 1;
4741 v
->always_computable
= ! not_every_iteration
;
4743 v
->always_executed
= ! not_every_iteration
;
4745 if (type
== DEST_ADDR
)
4747 v
->mode
= GET_MODE (*location
);
4751 else /* type == DEST_REG */
4753 v
->mode
= GET_MODE (SET_DEST (set
));
4755 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4756 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4758 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4760 /* If the lifetime is zero, it means that this register is
4761 really a dead store. So mark this as a giv that can be
4762 ignored. This will not prevent the biv from being eliminated. */
4763 if (v
->lifetime
== 0)
4766 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4767 reg_iv_info
[REGNO (dest_reg
)] = v
;
4770 /* Add the giv to the class of givs computed from one biv. */
4772 bl
= reg_biv_class
[REGNO (src_reg
)];
4775 v
->next_iv
= bl
->giv
;
4777 /* Don't count DEST_ADDR. This is supposed to count the number of
4778 insns that calculate givs. */
4779 if (type
== DEST_REG
)
4781 bl
->total_benefit
+= benefit
;
4784 /* Fatal error, biv missing for this giv? */
4787 if (type
== DEST_ADDR
)
4791 /* The giv can be replaced outright by the reduced register only if all
4792 of the following conditions are true:
4793 - the insn that sets the giv is always executed on any iteration
4794 on which the giv is used at all
4795 (there are two ways to deduce this:
4796 either the insn is executed on every iteration,
4797 or all uses follow that insn in the same basic block),
4798 - the giv is not used outside the loop
4799 - no assignments to the biv occur during the giv's lifetime. */
4801 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4802 /* Previous line always fails if INSN was moved by loop opt. */
4803 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4804 && (! not_every_iteration
4805 || last_use_this_basic_block (dest_reg
, insn
)))
4807 /* Now check that there are no assignments to the biv within the
4808 giv's lifetime. This requires two separate checks. */
4810 /* Check each biv update, and fail if any are between the first
4811 and last use of the giv.
4813 If this loop contains an inner loop that was unrolled, then
4814 the insn modifying the biv may have been emitted by the loop
4815 unrolling code, and hence does not have a valid luid. Just
4816 mark the biv as not replaceable in this case. It is not very
4817 useful as a biv, because it is used in two different loops.
4818 It is very unlikely that we would be able to optimize the giv
4819 using this biv anyways. */
4822 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4824 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4825 || ((uid_luid
[INSN_UID (b
->insn
)]
4826 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4827 && (uid_luid
[INSN_UID (b
->insn
)]
4828 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4831 v
->not_replaceable
= 1;
4836 /* If there are any backwards branches that go from after the
4837 biv update to before it, then this giv is not replaceable. */
4839 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4840 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4843 v
->not_replaceable
= 1;
4849 /* May still be replaceable, we don't have enough info here to
4852 v
->not_replaceable
= 0;
4856 if (loop_dump_stream
)
4858 if (type
== DEST_REG
)
4859 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4860 INSN_UID (insn
), REGNO (dest_reg
));
4862 fprintf (loop_dump_stream
, "Insn %d: dest address",
4865 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4866 REGNO (src_reg
), v
->benefit
);
4867 fprintf (loop_dump_stream
, " used %d lifetime %d",
4868 v
->times_used
, v
->lifetime
);
4871 fprintf (loop_dump_stream
, " replaceable");
4873 if (GET_CODE (mult_val
) == CONST_INT
)
4875 fprintf (loop_dump_stream
, " mult ");
4876 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (mult_val
));
4880 fprintf (loop_dump_stream
, " mult ");
4881 print_rtl (loop_dump_stream
, mult_val
);
4884 if (GET_CODE (add_val
) == CONST_INT
)
4886 fprintf (loop_dump_stream
, " add ");
4887 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (add_val
));
4891 fprintf (loop_dump_stream
, " add ");
4892 print_rtl (loop_dump_stream
, add_val
);
4896 if (loop_dump_stream
)
4897 fprintf (loop_dump_stream
, "\n");
4902 /* All this does is determine whether a giv can be made replaceable because
4903 its final value can be calculated. This code can not be part of record_giv
4904 above, because final_giv_value requires that the number of loop iterations
4905 be known, and that can not be accurately calculated until after all givs
4906 have been identified. */
4909 check_final_value (v
, loop_start
, loop_end
)
4910 struct induction
*v
;
4911 rtx loop_start
, loop_end
;
4913 struct iv_class
*bl
;
4914 rtx final_value
= 0;
4916 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4918 /* DEST_ADDR givs will never reach here, because they are always marked
4919 replaceable above in record_giv. */
4921 /* The giv can be replaced outright by the reduced register only if all
4922 of the following conditions are true:
4923 - the insn that sets the giv is always executed on any iteration
4924 on which the giv is used at all
4925 (there are two ways to deduce this:
4926 either the insn is executed on every iteration,
4927 or all uses follow that insn in the same basic block),
4928 - its final value can be calculated (this condition is different
4929 than the one above in record_giv)
4930 - no assignments to the biv occur during the giv's lifetime. */
4933 /* This is only called now when replaceable is known to be false. */
4934 /* Clear replaceable, so that it won't confuse final_giv_value. */
4938 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4939 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4941 int biv_increment_seen
= 0;
4947 /* When trying to determine whether or not a biv increment occurs
4948 during the lifetime of the giv, we can ignore uses of the variable
4949 outside the loop because final_value is true. Hence we can not
4950 use regno_last_uid and regno_first_uid as above in record_giv. */
4952 /* Search the loop to determine whether any assignments to the
4953 biv occur during the giv's lifetime. Start with the insn
4954 that sets the giv, and search around the loop until we come
4955 back to that insn again.
4957 Also fail if there is a jump within the giv's lifetime that jumps
4958 to somewhere outside the lifetime but still within the loop. This
4959 catches spaghetti code where the execution order is not linear, and
4960 hence the above test fails. Here we assume that the giv lifetime
4961 does not extend from one iteration of the loop to the next, so as
4962 to make the test easier. Since the lifetime isn't known yet,
4963 this requires two loops. See also record_giv above. */
4965 last_giv_use
= v
->insn
;
4971 p
= NEXT_INSN (loop_start
);
4975 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4976 || GET_CODE (p
) == CALL_INSN
)
4978 if (biv_increment_seen
)
4980 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4983 v
->not_replaceable
= 1;
4987 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4988 biv_increment_seen
= 1;
4989 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4994 /* Now that the lifetime of the giv is known, check for branches
4995 from within the lifetime to outside the lifetime if it is still
5005 p
= NEXT_INSN (loop_start
);
5006 if (p
== last_giv_use
)
5009 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
5010 && LABEL_NAME (JUMP_LABEL (p
))
5011 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
5012 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
5013 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
5014 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
5015 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
5016 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
5017 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
5020 v
->not_replaceable
= 1;
5022 if (loop_dump_stream
)
5023 fprintf (loop_dump_stream
,
5024 "Found branch outside giv lifetime.\n");
5031 /* If it is replaceable, then save the final value. */
5033 v
->final_value
= final_value
;
5036 if (loop_dump_stream
&& v
->replaceable
)
5037 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5038 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5041 /* Update the status of whether a giv can derive other givs.
5043 We need to do something special if there is or may be an update to the biv
5044 between the time the giv is defined and the time it is used to derive
5047 In addition, a giv that is only conditionally set is not allowed to
5048 derive another giv once a label has been passed.
5050 The cases we look at are when a label or an update to a biv is passed. */
5053 update_giv_derive (p
)
5056 struct iv_class
*bl
;
5057 struct induction
*biv
, *giv
;
5061 /* Search all IV classes, then all bivs, and finally all givs.
5063 There are three cases we are concerned with. First we have the situation
5064 of a giv that is only updated conditionally. In that case, it may not
5065 derive any givs after a label is passed.
5067 The second case is when a biv update occurs, or may occur, after the
5068 definition of a giv. For certain biv updates (see below) that are
5069 known to occur between the giv definition and use, we can adjust the
5070 giv definition. For others, or when the biv update is conditional,
5071 we must prevent the giv from deriving any other givs. There are two
5072 sub-cases within this case.
5074 If this is a label, we are concerned with any biv update that is done
5075 conditionally, since it may be done after the giv is defined followed by
5076 a branch here (actually, we need to pass both a jump and a label, but
5077 this extra tracking doesn't seem worth it).
5079 If this is a jump, we are concerned about any biv update that may be
5080 executed multiple times. We are actually only concerned about
5081 backward jumps, but it is probably not worth performing the test
5082 on the jump again here.
5084 If this is a biv update, we must adjust the giv status to show that a
5085 subsequent biv update was performed. If this adjustment cannot be done,
5086 the giv cannot derive further givs. */
5088 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5089 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5090 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5093 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5095 /* If cant_derive is already true, there is no point in
5096 checking all of these conditions again. */
5097 if (giv
->cant_derive
)
5100 /* If this giv is conditionally set and we have passed a label,
5101 it cannot derive anything. */
5102 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5103 giv
->cant_derive
= 1;
5105 /* Skip givs that have mult_val == 0, since
5106 they are really invariants. Also skip those that are
5107 replaceable, since we know their lifetime doesn't contain
5109 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5112 /* The only way we can allow this giv to derive another
5113 is if this is a biv increment and we can form the product
5114 of biv->add_val and giv->mult_val. In this case, we will
5115 be able to compute a compensation. */
5116 else if (biv
->insn
== p
)
5120 if (biv
->mult_val
== const1_rtx
)
5121 tem
= simplify_giv_expr (gen_rtx_MULT (giv
->mode
,
5126 if (tem
&& giv
->derive_adjustment
)
5127 tem
= simplify_giv_expr (gen_rtx_PLUS (giv
->mode
, tem
,
5128 giv
->derive_adjustment
),
5131 giv
->derive_adjustment
= tem
;
5133 giv
->cant_derive
= 1;
5135 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5136 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5137 giv
->cant_derive
= 1;
5142 /* Check whether an insn is an increment legitimate for a basic induction var.
5143 X is the source of insn P, or a part of it.
5144 MODE is the mode in which X should be interpreted.
5146 DEST_REG is the putative biv, also the destination of the insn.
5147 We accept patterns of these forms:
5148 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5149 REG = INVARIANT + REG
5151 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5152 and store the additive term into *INC_VAL.
5154 If X is an assignment of an invariant into DEST_REG, we set
5155 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5157 We also want to detect a BIV when it corresponds to a variable
5158 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5159 of the variable may be a PLUS that adds a SUBREG of that variable to
5160 an invariant and then sign- or zero-extends the result of the PLUS
5163 Most GIVs in such cases will be in the promoted mode, since that is the
5164 probably the natural computation mode (and almost certainly the mode
5165 used for addresses) on the machine. So we view the pseudo-reg containing
5166 the variable as the BIV, as if it were simply incremented.
5168 Note that treating the entire pseudo as a BIV will result in making
5169 simple increments to any GIVs based on it. However, if the variable
5170 overflows in its declared mode but not its promoted mode, the result will
5171 be incorrect. This is acceptable if the variable is signed, since
5172 overflows in such cases are undefined, but not if it is unsigned, since
5173 those overflows are defined. So we only check for SIGN_EXTEND and
5176 If we cannot find a biv, we return 0. */
5179 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5181 enum machine_mode mode
;
5187 register enum rtx_code code
;
5191 code
= GET_CODE (x
);
5195 if (XEXP (x
, 0) == dest_reg
5196 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5197 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5198 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5200 else if (XEXP (x
, 1) == dest_reg
5201 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5202 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5203 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5208 if (invariant_p (arg
) != 1)
5211 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5212 *mult_val
= const1_rtx
;
5216 /* If this is a SUBREG for a promoted variable, check the inner
5218 if (SUBREG_PROMOTED_VAR_P (x
))
5219 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5220 dest_reg
, p
, inc_val
, mult_val
);
5224 /* If this register is assigned in the previous insn, look at its
5225 source, but don't go outside the loop or past a label. */
5227 for (insn
= PREV_INSN (p
);
5228 (insn
&& GET_CODE (insn
) == NOTE
5229 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5230 insn
= PREV_INSN (insn
))
5234 set
= single_set (insn
);
5237 && (SET_DEST (set
) == x
5238 || (GET_CODE (SET_DEST (set
)) == SUBREG
5239 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5241 && SUBREG_REG (SET_DEST (set
)) == x
)))
5242 return basic_induction_var (SET_SRC (set
),
5243 (GET_MODE (SET_SRC (set
)) == VOIDmode
5245 : GET_MODE (SET_SRC (set
))),
5248 /* ... fall through ... */
5250 /* Can accept constant setting of biv only when inside inner most loop.
5251 Otherwise, a biv of an inner loop may be incorrectly recognized
5252 as a biv of the outer loop,
5253 causing code to be moved INTO the inner loop. */
5255 if (invariant_p (x
) != 1)
5260 /* convert_modes aborts if we try to convert to or from CCmode, so just
5261 exclude that case. It is very unlikely that a condition code value
5262 would be a useful iterator anyways. */
5263 if (loops_enclosed
== 1
5264 && GET_MODE_CLASS (mode
) != MODE_CC
5265 && GET_MODE_CLASS (GET_MODE (dest_reg
)) != MODE_CC
)
5267 /* Possible bug here? Perhaps we don't know the mode of X. */
5268 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5269 *mult_val
= const0_rtx
;
5276 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5277 dest_reg
, p
, inc_val
, mult_val
);
5279 /* Similar, since this can be a sign extension. */
5280 for (insn
= PREV_INSN (p
);
5281 (insn
&& GET_CODE (insn
) == NOTE
5282 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5283 insn
= PREV_INSN (insn
))
5287 set
= single_set (insn
);
5289 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5290 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5291 && INTVAL (XEXP (x
, 1)) >= 0
5292 && GET_CODE (SET_SRC (set
)) == ASHIFT
5293 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5294 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5295 GET_MODE (XEXP (x
, 0)),
5296 dest_reg
, insn
, inc_val
, mult_val
);
5304 /* A general induction variable (giv) is any quantity that is a linear
5305 function of a basic induction variable,
5306 i.e. giv = biv * mult_val + add_val.
5307 The coefficients can be any loop invariant quantity.
5308 A giv need not be computed directly from the biv;
5309 it can be computed by way of other givs. */
5311 /* Determine whether X computes a giv.
5312 If it does, return a nonzero value
5313 which is the benefit from eliminating the computation of X;
5314 set *SRC_REG to the register of the biv that it is computed from;
5315 set *ADD_VAL and *MULT_VAL to the coefficients,
5316 such that the value of X is biv * mult + add; */
5319 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5329 /* If this is an invariant, forget it, it isn't a giv. */
5330 if (invariant_p (x
) == 1)
5333 /* See if the expression could be a giv and get its form.
5334 Mark our place on the obstack in case we don't find a giv. */
5335 storage
= (char *) oballoc (0);
5336 x
= simplify_giv_expr (x
, &benefit
);
5343 switch (GET_CODE (x
))
5347 /* Since this is now an invariant and wasn't before, it must be a giv
5348 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5350 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5351 *mult_val
= const0_rtx
;
5356 /* This is equivalent to a BIV. */
5358 *mult_val
= const1_rtx
;
5359 *add_val
= const0_rtx
;
5363 /* Either (plus (biv) (invar)) or
5364 (plus (mult (biv) (invar_1)) (invar_2)). */
5365 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5367 *src_reg
= XEXP (XEXP (x
, 0), 0);
5368 *mult_val
= XEXP (XEXP (x
, 0), 1);
5372 *src_reg
= XEXP (x
, 0);
5373 *mult_val
= const1_rtx
;
5375 *add_val
= XEXP (x
, 1);
5379 /* ADD_VAL is zero. */
5380 *src_reg
= XEXP (x
, 0);
5381 *mult_val
= XEXP (x
, 1);
5382 *add_val
= const0_rtx
;
5389 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5390 unless they are CONST_INT). */
5391 if (GET_CODE (*add_val
) == USE
)
5392 *add_val
= XEXP (*add_val
, 0);
5393 if (GET_CODE (*mult_val
) == USE
)
5394 *mult_val
= XEXP (*mult_val
, 0);
5396 benefit
+= rtx_cost (orig_x
, SET
);
5398 /* Always return some benefit if this is a giv so it will be detected
5399 as such. This allows elimination of bivs that might otherwise
5400 not be eliminated. */
5401 return benefit
== 0 ? 1 : benefit
;
5404 /* Given an expression, X, try to form it as a linear function of a biv.
5405 We will canonicalize it to be of the form
5406 (plus (mult (BIV) (invar_1))
5408 with possible degeneracies.
5410 The invariant expressions must each be of a form that can be used as a
5411 machine operand. We surround then with a USE rtx (a hack, but localized
5412 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5413 routine; it is the caller's responsibility to strip them.
5415 If no such canonicalization is possible (i.e., two biv's are used or an
5416 expression that is neither invariant nor a biv or giv), this routine
5419 For a non-zero return, the result will have a code of CONST_INT, USE,
5420 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5422 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5425 simplify_giv_expr (x
, benefit
)
5429 enum machine_mode mode
= GET_MODE (x
);
5433 /* If this is not an integer mode, or if we cannot do arithmetic in this
5434 mode, this can't be a giv. */
5435 if (mode
!= VOIDmode
5436 && (GET_MODE_CLASS (mode
) != MODE_INT
5437 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5440 switch (GET_CODE (x
))
5443 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5444 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5445 if (arg0
== 0 || arg1
== 0)
5448 /* Put constant last, CONST_INT last if both constant. */
5449 if ((GET_CODE (arg0
) == USE
5450 || GET_CODE (arg0
) == CONST_INT
)
5451 && GET_CODE (arg1
) != CONST_INT
)
5452 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5454 /* Handle addition of zero, then addition of an invariant. */
5455 if (arg1
== const0_rtx
)
5457 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5458 switch (GET_CODE (arg0
))
5462 /* Both invariant. Only valid if sum is machine operand.
5463 First strip off possible USE on the operands. */
5464 if (GET_CODE (arg0
) == USE
)
5465 arg0
= XEXP (arg0
, 0);
5467 if (GET_CODE (arg1
) == USE
)
5468 arg1
= XEXP (arg1
, 0);
5471 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5473 tem
= plus_constant (arg0
, INTVAL (arg1
));
5474 if (GET_CODE (tem
) != CONST_INT
)
5475 tem
= gen_rtx_USE (mode
, tem
);
5479 /* Adding two invariants must result in an invariant,
5480 so enclose addition operation inside a USE and
5482 tem
= gen_rtx_USE (mode
, gen_rtx_PLUS (mode
, arg0
, arg1
));
5489 /* biv + invar or mult + invar. Return sum. */
5490 return gen_rtx_PLUS (mode
, arg0
, arg1
);
5493 /* (a + invar_1) + invar_2. Associate. */
5494 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5497 XEXP (arg0
, 1), arg1
)),
5504 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5505 MULT to reduce cases. */
5506 if (GET_CODE (arg0
) == REG
)
5507 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
5508 if (GET_CODE (arg1
) == REG
)
5509 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
5511 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5512 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5513 Recurse to associate the second PLUS. */
5514 if (GET_CODE (arg1
) == MULT
)
5515 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5517 if (GET_CODE (arg1
) == PLUS
)
5518 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5519 gen_rtx_PLUS (mode
, arg0
,
5524 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5525 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5528 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5531 return simplify_giv_expr (gen_rtx_MULT (mode
,
5539 /* Handle "a - b" as "a + b * (-1)". */
5540 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5542 gen_rtx_MULT (mode
, XEXP (x
, 1),
5547 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5548 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5549 if (arg0
== 0 || arg1
== 0)
5552 /* Put constant last, CONST_INT last if both constant. */
5553 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5554 && GET_CODE (arg1
) != CONST_INT
)
5555 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5557 /* If second argument is not now constant, not giv. */
5558 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5561 /* Handle multiply by 0 or 1. */
5562 if (arg1
== const0_rtx
)
5565 else if (arg1
== const1_rtx
)
5568 switch (GET_CODE (arg0
))
5571 /* biv * invar. Done. */
5572 return gen_rtx_MULT (mode
, arg0
, arg1
);
5575 /* Product of two constants. */
5576 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5579 /* invar * invar. Not giv. */
5583 /* (a * invar_1) * invar_2. Associate. */
5584 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5591 /* (a + invar_1) * invar_2. Distribute. */
5592 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5606 /* Shift by constant is multiply by power of two. */
5607 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5610 return simplify_giv_expr (gen_rtx_MULT (mode
,
5612 GEN_INT ((HOST_WIDE_INT
) 1
5613 << INTVAL (XEXP (x
, 1)))),
5617 /* "-a" is "a * (-1)" */
5618 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
5622 /* "~a" is "-a - 1". Silly, but easy. */
5623 return simplify_giv_expr (gen_rtx_MINUS (mode
,
5624 gen_rtx_NEG (mode
, XEXP (x
, 0)),
5629 /* Already in proper form for invariant. */
5633 /* If this is a new register, we can't deal with it. */
5634 if (REGNO (x
) >= max_reg_before_loop
)
5637 /* Check for biv or giv. */
5638 switch (reg_iv_type
[REGNO (x
)])
5642 case GENERAL_INDUCT
:
5644 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5646 /* Form expression from giv and add benefit. Ensure this giv
5647 can derive another and subtract any needed adjustment if so. */
5648 *benefit
+= v
->benefit
;
5652 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
, v
->src_reg
,
5655 if (v
->derive_adjustment
)
5656 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
5657 return simplify_giv_expr (tem
, benefit
);
5664 /* Fall through to general case. */
5666 /* If invariant, return as USE (unless CONST_INT).
5667 Otherwise, not giv. */
5668 if (GET_CODE (x
) == USE
)
5671 if (invariant_p (x
) == 1)
5673 if (GET_CODE (x
) == CONST_INT
)
5676 return gen_rtx_USE (mode
, x
);
5683 /* Help detect a giv that is calculated by several consecutive insns;
5687 The caller has already identified the first insn P as having a giv as dest;
5688 we check that all other insns that set the same register follow
5689 immediately after P, that they alter nothing else,
5690 and that the result of the last is still a giv.
5692 The value is 0 if the reg set in P is not really a giv.
5693 Otherwise, the value is the amount gained by eliminating
5694 all the consecutive insns that compute the value.
5696 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5697 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5699 The coefficients of the ultimate giv value are stored in
5700 *MULT_VAL and *ADD_VAL. */
5703 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5718 /* Indicate that this is a giv so that we can update the value produced in
5719 each insn of the multi-insn sequence.
5721 This induction structure will be used only by the call to
5722 general_induction_var below, so we can allocate it on our stack.
5723 If this is a giv, our caller will replace the induct var entry with
5724 a new induction structure. */
5726 = (struct induction
*) alloca (sizeof (struct induction
));
5727 v
->src_reg
= src_reg
;
5728 v
->mult_val
= *mult_val
;
5729 v
->add_val
= *add_val
;
5730 v
->benefit
= first_benefit
;
5732 v
->derive_adjustment
= 0;
5734 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5735 reg_iv_info
[REGNO (dest_reg
)] = v
;
5737 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5742 code
= GET_CODE (p
);
5744 /* If libcall, skip to end of call sequence. */
5745 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5749 && (set
= single_set (p
))
5750 && GET_CODE (SET_DEST (set
)) == REG
5751 && SET_DEST (set
) == dest_reg
5752 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5754 /* Giv created by equivalent expression. */
5755 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5756 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5757 add_val
, mult_val
))))
5758 && src_reg
== v
->src_reg
)
5760 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5761 benefit
+= libcall_benefit (p
);
5764 v
->mult_val
= *mult_val
;
5765 v
->add_val
= *add_val
;
5766 v
->benefit
= benefit
;
5768 else if (code
!= NOTE
)
5770 /* Allow insns that set something other than this giv to a
5771 constant. Such insns are needed on machines which cannot
5772 include long constants and should not disqualify a giv. */
5774 && (set
= single_set (p
))
5775 && SET_DEST (set
) != dest_reg
5776 && CONSTANT_P (SET_SRC (set
)))
5779 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5787 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5788 represented by G1. If no such expression can be found, or it is clear that
5789 it cannot possibly be a valid address, 0 is returned.
5791 To perform the computation, we note that
5794 where `v' is the biv.
5796 So G2 = (c/a) * G1 + (d - b*c/a) */
5800 express_from (g1
, g2
)
5801 struct induction
*g1
, *g2
;
5805 /* The value that G1 will be multiplied by must be a constant integer. Also,
5806 the only chance we have of getting a valid address is if b*c/a (see above
5807 for notation) is also an integer. */
5808 if (GET_CODE (g1
->mult_val
) != CONST_INT
5809 || GET_CODE (g2
->mult_val
) != CONST_INT
5810 || GET_CODE (g1
->add_val
) != CONST_INT
5811 || g1
->mult_val
== const0_rtx
5812 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5815 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5816 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5818 /* Form simplified final result. */
5819 if (mult
== const0_rtx
)
5821 else if (mult
== const1_rtx
)
5822 mult
= g1
->dest_reg
;
5824 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
5826 if (add
== const0_rtx
)
5829 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
5833 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5834 (either directly or via an address expression) a register used to represent
5835 G1. Set g2->new_reg to a represtation of G1 (normally just
5839 combine_givs_p (g1
, g2
)
5840 struct induction
*g1
, *g2
;
5844 /* If these givs are identical, they can be combined. */
5845 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5846 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5848 g2
->new_reg
= g1
->dest_reg
;
5853 /* If G2 can be expressed as a function of G1 and that function is valid
5854 as an address and no more expensive than using a register for G2,
5855 the expression of G2 in terms of G1 can be used. */
5856 if (g2
->giv_type
== DEST_ADDR
5857 && (tem
= express_from (g1
, g2
)) != 0
5858 && memory_address_p (g2
->mem_mode
, tem
)
5859 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5869 #ifdef GIV_SORT_CRITERION
5870 /* Compare two givs and sort the most desirable one for combinations first.
5871 This is used only in one qsort call below. */
5875 struct induction
**x
, **y
;
5877 GIV_SORT_CRITERION (*x
, *y
);
5883 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5884 any other. If so, point SAME to the giv combined with and set NEW_REG to
5885 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5886 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5890 struct iv_class
*bl
;
5892 struct induction
*g1
, *g2
, **giv_array
;
5893 int i
, j
, giv_count
, pass
;
5895 /* Count givs, because bl->giv_count is incorrect here. */
5897 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5901 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5903 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5904 giv_array
[i
++] = g1
;
5906 #ifdef GIV_SORT_CRITERION
5907 /* Sort the givs if GIV_SORT_CRITERION is defined.
5908 This is usually defined for processors which lack
5909 negative register offsets so more givs may be combined. */
5911 if (loop_dump_stream
)
5912 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5914 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5917 for (i
= 0; i
< giv_count
; i
++)
5920 for (pass
= 0; pass
<= 1; pass
++)
5921 for (j
= 0; j
< giv_count
; j
++)
5925 /* First try to combine with replaceable givs, then all givs. */
5926 && (g1
->replaceable
|| pass
== 1)
5927 /* If either has already been combined or is to be ignored, can't
5929 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5930 /* If something has been based on G2, G2 cannot itself be based
5931 on something else. */
5932 && ! g2
->combined_with
5933 && combine_givs_p (g1
, g2
))
5935 /* g2->new_reg set by `combine_givs_p' */
5937 g1
->combined_with
= 1;
5939 /* If one of these givs is a DEST_REG that was only used
5940 once, by the other giv, this is actually a single use.
5941 The DEST_REG has the correct cost, while the other giv
5942 counts the REG use too often. */
5943 if (g2
->giv_type
== DEST_REG
5944 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5945 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5946 g1
->benefit
= g2
->benefit
;
5947 else if (g1
->giv_type
!= DEST_REG
5948 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5949 || ! reg_mentioned_p (g1
->dest_reg
,
5950 PATTERN (g2
->insn
)))
5952 g1
->benefit
+= g2
->benefit
;
5953 g1
->times_used
+= g2
->times_used
;
5955 /* ??? The new final_[bg]iv_value code does a much better job
5956 of finding replaceable giv's, and hence this code may no
5957 longer be necessary. */
5958 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5959 g1
->benefit
-= copy_cost
;
5960 g1
->lifetime
+= g2
->lifetime
;
5962 if (loop_dump_stream
)
5963 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5964 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5970 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5973 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5974 rtx b
; /* initial value of basic induction variable */
5975 rtx m
; /* multiplicative constant */
5976 rtx a
; /* additive constant */
5977 rtx reg
; /* destination register */
5983 /* Prevent unexpected sharing of these rtx. */
5987 /* Increase the lifetime of any invariants moved further in code. */
5988 update_reg_last_use (a
, insert_before
);
5989 update_reg_last_use (b
, insert_before
);
5990 update_reg_last_use (m
, insert_before
);
5993 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5995 emit_move_insn (reg
, result
);
5996 seq
= gen_sequence ();
5999 emit_insn_before (seq
, insert_before
);
6001 record_base_value (REGNO (reg
), b
, 0);
6004 /* Test whether A * B can be computed without
6005 an actual multiply insn. Value is 1 if so. */
6008 product_cheap_p (a
, b
)
6014 struct obstack
*old_rtl_obstack
= rtl_obstack
;
6015 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
6018 /* If only one is constant, make it B. */
6019 if (GET_CODE (a
) == CONST_INT
)
6020 tmp
= a
, a
= b
, b
= tmp
;
6022 /* If first constant, both constant, so don't need multiply. */
6023 if (GET_CODE (a
) == CONST_INT
)
6026 /* If second not constant, neither is constant, so would need multiply. */
6027 if (GET_CODE (b
) != CONST_INT
)
6030 /* One operand is constant, so might not need multiply insn. Generate the
6031 code for the multiply and see if a call or multiply, or long sequence
6032 of insns is generated. */
6034 rtl_obstack
= &temp_obstack
;
6036 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
6037 tmp
= gen_sequence ();
6040 if (GET_CODE (tmp
) == SEQUENCE
)
6042 if (XVEC (tmp
, 0) == 0)
6044 else if (XVECLEN (tmp
, 0) > 3)
6047 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
6049 rtx insn
= XVECEXP (tmp
, 0, i
);
6051 if (GET_CODE (insn
) != INSN
6052 || (GET_CODE (PATTERN (insn
)) == SET
6053 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
6054 || (GET_CODE (PATTERN (insn
)) == PARALLEL
6055 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
6056 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
6063 else if (GET_CODE (tmp
) == SET
6064 && GET_CODE (SET_SRC (tmp
)) == MULT
)
6066 else if (GET_CODE (tmp
) == PARALLEL
6067 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
6068 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
6071 /* Free any storage we obtained in generating this multiply and restore rtl
6072 allocation to its normal obstack. */
6073 obstack_free (&temp_obstack
, storage
);
6074 rtl_obstack
= old_rtl_obstack
;
6079 /* Check to see if loop can be terminated by a "decrement and branch until
6080 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6081 Also try reversing an increment loop to a decrement loop
6082 to see if the optimization can be performed.
6083 Value is nonzero if optimization was performed. */
6085 /* This is useful even if the architecture doesn't have such an insn,
6086 because it might change a loops which increments from 0 to n to a loop
6087 which decrements from n to 0. A loop that decrements to zero is usually
6088 faster than one that increments from zero. */
6090 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6091 such as approx_final_value, biv_total_increment, loop_iterations, and
6092 final_[bg]iv_value. */
6095 check_dbra_loop (loop_end
, insn_count
, loop_start
)
6100 struct iv_class
*bl
;
6107 rtx before_comparison
;
6111 int compare_and_branch
;
6113 /* If last insn is a conditional branch, and the insn before tests a
6114 register value, try to optimize it. Otherwise, we can't do anything. */
6116 jump
= PREV_INSN (loop_end
);
6117 comparison
= get_condition_for_loop (jump
);
6118 if (comparison
== 0)
6121 /* Try to compute whether the compare/branch at the loop end is one or
6122 two instructions. */
6123 get_condition (jump
, &first_compare
);
6124 if (first_compare
== jump
)
6125 compare_and_branch
= 1;
6126 else if (first_compare
== prev_nonnote_insn (jump
))
6127 compare_and_branch
= 2;
6131 /* Check all of the bivs to see if the compare uses one of them.
6132 Skip biv's set more than once because we can't guarantee that
6133 it will be zero on the last iteration. Also skip if the biv is
6134 used between its update and the test insn. */
6136 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6138 if (bl
->biv_count
== 1
6139 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6140 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6148 /* Look for the case where the basic induction variable is always
6149 nonnegative, and equals zero on the last iteration.
6150 In this case, add a reg_note REG_NONNEG, which allows the
6151 m68k DBRA instruction to be used. */
6153 if (((GET_CODE (comparison
) == GT
6154 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6155 && INTVAL (XEXP (comparison
, 1)) == -1)
6156 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6157 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6158 && INTVAL (bl
->biv
->add_val
) < 0)
6160 /* Initial value must be greater than 0,
6161 init_val % -dec_value == 0 to ensure that it equals zero on
6162 the last iteration */
6164 if (GET_CODE (bl
->initial_value
) == CONST_INT
6165 && INTVAL (bl
->initial_value
) > 0
6166 && (INTVAL (bl
->initial_value
)
6167 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6169 /* register always nonnegative, add REG_NOTE to branch */
6170 REG_NOTES (PREV_INSN (loop_end
))
6171 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6172 REG_NOTES (PREV_INSN (loop_end
)));
6178 /* If the decrement is 1 and the value was tested as >= 0 before
6179 the loop, then we can safely optimize. */
6180 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6182 if (GET_CODE (p
) == CODE_LABEL
)
6184 if (GET_CODE (p
) != JUMP_INSN
)
6187 before_comparison
= get_condition_for_loop (p
);
6188 if (before_comparison
6189 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6190 && GET_CODE (before_comparison
) == LT
6191 && XEXP (before_comparison
, 1) == const0_rtx
6192 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6193 && INTVAL (bl
->biv
->add_val
) == -1)
6195 REG_NOTES (PREV_INSN (loop_end
))
6196 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6197 REG_NOTES (PREV_INSN (loop_end
)));
6204 else if (num_mem_sets
<= 1)
6206 /* Try to change inc to dec, so can apply above optimization. */
6208 all registers modified are induction variables or invariant,
6209 all memory references have non-overlapping addresses
6210 (obviously true if only one write)
6211 allow 2 insns for the compare/jump at the end of the loop. */
6212 /* Also, we must avoid any instructions which use both the reversed
6213 biv and another biv. Such instructions will fail if the loop is
6214 reversed. We meet this condition by requiring that either
6215 no_use_except_counting is true, or else that there is only
6217 int num_nonfixed_reads
= 0;
6218 /* 1 if the iteration var is used only to count iterations. */
6219 int no_use_except_counting
= 0;
6220 /* 1 if the loop has no memory store, or it has a single memory store
6221 which is reversible. */
6222 int reversible_mem_store
= 1;
6224 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6225 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6226 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6228 if (bl
->giv_count
== 0
6229 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6231 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6233 /* If there are no givs for this biv, and the only exit is the
6234 fall through at the end of the loop, then
6235 see if perhaps there are no uses except to count. */
6236 no_use_except_counting
= 1;
6237 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6238 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6240 rtx set
= single_set (p
);
6242 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6243 && REGNO (SET_DEST (set
)) == bl
->regno
)
6244 /* An insn that sets the biv is okay. */
6246 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6247 || p
== prev_nonnote_insn (loop_end
))
6248 /* Don't bother about the end test. */
6250 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6251 /* Any other use of the biv is no good. */
6253 no_use_except_counting
= 0;
6259 /* If the loop has a single store, and the destination address is
6260 invariant, then we can't reverse the loop, because this address
6261 might then have the wrong value at loop exit.
6262 This would work if the source was invariant also, however, in that
6263 case, the insn should have been moved out of the loop. */
6265 if (num_mem_sets
== 1)
6266 reversible_mem_store
6267 = (! unknown_address_altered
6268 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6270 /* This code only acts for innermost loops. Also it simplifies
6271 the memory address check by only reversing loops with
6272 zero or one memory access.
6273 Two memory accesses could involve parts of the same array,
6274 and that can't be reversed. */
6276 if (num_nonfixed_reads
<= 1
6278 && !loop_has_volatile
6279 && reversible_mem_store
6280 && (no_use_except_counting
6281 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6282 + num_movables
+ compare_and_branch
== insn_count
)
6283 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6287 /* Loop can be reversed. */
6288 if (loop_dump_stream
)
6289 fprintf (loop_dump_stream
, "Can reverse loop\n");
6291 /* Now check other conditions:
6293 The increment must be a constant, as must the initial value,
6294 and the comparison code must be LT.
6296 This test can probably be improved since +/- 1 in the constant
6297 can be obtained by changing LT to LE and vice versa; this is
6301 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6302 /* LE gets turned into LT */
6303 && GET_CODE (comparison
) == LT
6304 && GET_CODE (bl
->initial_value
) == CONST_INT
)
6306 HOST_WIDE_INT add_val
, comparison_val
;
6309 add_val
= INTVAL (bl
->biv
->add_val
);
6310 comparison_val
= INTVAL (XEXP (comparison
, 1));
6311 initial_value
= bl
->initial_value
;
6313 /* Normalize the initial value if it is an integer and
6314 has no other use except as a counter. This will allow
6315 a few more loops to be reversed. */
6316 if (no_use_except_counting
6317 && GET_CODE (initial_value
) == CONST_INT
)
6319 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
6320 /* Check for overflow. If comparison_val ends up as a
6321 negative value, then we can't reverse the loop. */
6322 if (comparison_val
>= 0)
6323 initial_value
= const0_rtx
;
6326 /* If the initial value is not zero, or if the comparison
6327 value is not an exact multiple of the increment, then we
6328 can not reverse this loop. */
6329 if (initial_value
!= const0_rtx
6330 || (comparison_val
% add_val
) != 0)
6333 /* Reset these in case we normalized the initial value
6334 and comparison value above. */
6335 bl
->initial_value
= initial_value
;
6336 XEXP (comparison
, 1) = GEN_INT (comparison_val
);
6338 /* Register will always be nonnegative, with value
6339 0 on last iteration if loop reversed */
6341 /* Save some info needed to produce the new insns. */
6342 reg
= bl
->biv
->dest_reg
;
6343 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6344 if (jump_label
== pc_rtx
)
6345 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6346 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6348 final_value
= XEXP (comparison
, 1);
6349 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6350 - INTVAL (bl
->biv
->add_val
));
6352 /* Initialize biv to start_value before loop start.
6353 The old initializing insn will be deleted as a
6354 dead store by flow.c. */
6355 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6357 /* Add insn to decrement register, and delete insn
6358 that incremented the register. */
6359 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6361 delete_insn (bl
->biv
->insn
);
6363 /* Update biv info to reflect its new status. */
6365 bl
->initial_value
= start_value
;
6366 bl
->biv
->add_val
= new_add_val
;
6368 /* Inc LABEL_NUSES so that delete_insn will
6369 not delete the label. */
6370 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6372 /* Emit an insn after the end of the loop to set the biv's
6373 proper exit value if it is used anywhere outside the loop. */
6374 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
6376 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6377 emit_insn_after (gen_move_insn (reg
, final_value
),
6380 /* Delete compare/branch at end of loop. */
6381 delete_insn (PREV_INSN (loop_end
));
6382 if (compare_and_branch
== 2)
6383 delete_insn (first_compare
);
6385 /* Add new compare/branch insn at end of loop. */
6387 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6388 GET_MODE (reg
), 0, 0);
6389 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6390 tem
= gen_sequence ();
6392 emit_jump_insn_before (tem
, loop_end
);
6394 for (tem
= PREV_INSN (loop_end
);
6395 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6399 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6401 /* Increment of LABEL_NUSES done above. */
6402 /* Register is now always nonnegative,
6403 so add REG_NONNEG note to the branch. */
6404 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6410 /* Mark that this biv has been reversed. Each giv which depends
6411 on this biv, and which is also live past the end of the loop
6412 will have to be fixed up. */
6416 if (loop_dump_stream
)
6417 fprintf (loop_dump_stream
,
6418 "Reversed loop and added reg_nonneg\n");
6428 /* Verify whether the biv BL appears to be eliminable,
6429 based on the insns in the loop that refer to it.
6430 LOOP_START is the first insn of the loop, and END is the end insn.
6432 If ELIMINATE_P is non-zero, actually do the elimination.
6434 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6435 determine whether invariant insns should be placed inside or at the
6436 start of the loop. */
6439 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6440 struct iv_class
*bl
;
6444 int threshold
, insn_count
;
6446 rtx reg
= bl
->biv
->dest_reg
;
6449 /* Scan all insns in the loop, stopping if we find one that uses the
6450 biv in a way that we cannot eliminate. */
6452 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6454 enum rtx_code code
= GET_CODE (p
);
6455 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6457 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6458 && reg_mentioned_p (reg
, PATTERN (p
))
6459 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6461 if (loop_dump_stream
)
6462 fprintf (loop_dump_stream
,
6463 "Cannot eliminate biv %d: biv used in insn %d.\n",
6464 bl
->regno
, INSN_UID (p
));
6471 if (loop_dump_stream
)
6472 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6473 bl
->regno
, eliminate_p
? "was" : "can be");
6480 /* If BL appears in X (part of the pattern of INSN), see if we can
6481 eliminate its use. If so, return 1. If not, return 0.
6483 If BIV does not appear in X, return 1.
6485 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6486 where extra insns should be added. Depending on how many items have been
6487 moved out of the loop, it will either be before INSN or at the start of
6491 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6493 struct iv_class
*bl
;
6497 enum rtx_code code
= GET_CODE (x
);
6498 rtx reg
= bl
->biv
->dest_reg
;
6499 enum machine_mode mode
= GET_MODE (reg
);
6500 struct induction
*v
;
6512 /* If we haven't already been able to do something with this BIV,
6513 we can't eliminate it. */
6519 /* If this sets the BIV, it is not a problem. */
6520 if (SET_DEST (x
) == reg
)
6523 /* If this is an insn that defines a giv, it is also ok because
6524 it will go away when the giv is reduced. */
6525 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6526 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6530 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6532 /* Can replace with any giv that was reduced and
6533 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6534 Require a constant for MULT_VAL, so we know it's nonzero.
6535 ??? We disable this optimization to avoid potential
6538 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6539 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6540 && v
->add_val
== const0_rtx
6541 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6545 /* If the giv V had the auto-inc address optimization applied
6546 to it, and INSN occurs between the giv insn and the biv
6547 insn, then we must adjust the value used here.
6548 This is rare, so we don't bother to do so. */
6550 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6551 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6552 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6553 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6559 /* If the giv has the opposite direction of change,
6560 then reverse the comparison. */
6561 if (INTVAL (v
->mult_val
) < 0)
6562 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
6563 const0_rtx
, v
->new_reg
);
6567 /* We can probably test that giv's reduced reg. */
6568 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6572 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6573 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6574 Require a constant for MULT_VAL, so we know it's nonzero.
6575 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6576 overflow problem. */
6578 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6579 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6580 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6582 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6583 || GET_CODE (v
->add_val
) == LABEL_REF
6584 || GET_CODE (v
->add_val
) == CONST
6585 || (GET_CODE (v
->add_val
) == REG
6586 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6588 /* If the giv V had the auto-inc address optimization applied
6589 to it, and INSN occurs between the giv insn and the biv
6590 insn, then we must adjust the value used here.
6591 This is rare, so we don't bother to do so. */
6593 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6594 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6595 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6596 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6602 /* If the giv has the opposite direction of change,
6603 then reverse the comparison. */
6604 if (INTVAL (v
->mult_val
) < 0)
6605 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
6608 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
6609 copy_rtx (v
->add_val
));
6611 /* Replace biv with the giv's reduced register. */
6612 update_reg_last_use (v
->add_val
, insn
);
6613 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6616 /* Insn doesn't support that constant or invariant. Copy it
6617 into a register (it will be a loop invariant.) */
6618 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6620 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6623 /* Substitute the new register for its invariant value in
6624 the compare expression. */
6625 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6626 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6635 case GT
: case GE
: case GTU
: case GEU
:
6636 case LT
: case LE
: case LTU
: case LEU
:
6637 /* See if either argument is the biv. */
6638 if (XEXP (x
, 0) == reg
)
6639 arg
= XEXP (x
, 1), arg_operand
= 1;
6640 else if (XEXP (x
, 1) == reg
)
6641 arg
= XEXP (x
, 0), arg_operand
= 0;
6645 if (CONSTANT_P (arg
))
6647 /* First try to replace with any giv that has constant positive
6648 mult_val and constant add_val. We might be able to support
6649 negative mult_val, but it seems complex to do it in general. */
6651 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6652 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6653 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6654 || GET_CODE (v
->add_val
) == LABEL_REF
6655 || GET_CODE (v
->add_val
) == CONST
6656 || (GET_CODE (v
->add_val
) == REG
6657 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6658 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6661 /* If the giv V had the auto-inc address optimization applied
6662 to it, and INSN occurs between the giv insn and the biv
6663 insn, then we must adjust the value used here.
6664 This is rare, so we don't bother to do so. */
6666 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6667 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6668 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6669 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6675 /* Replace biv with the giv's reduced reg. */
6676 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6678 /* If all constants are actually constant integers and
6679 the derived constant can be directly placed in the COMPARE,
6681 if (GET_CODE (arg
) == CONST_INT
6682 && GET_CODE (v
->mult_val
) == CONST_INT
6683 && GET_CODE (v
->add_val
) == CONST_INT
6684 && validate_change (insn
, &XEXP (x
, arg_operand
),
6685 GEN_INT (INTVAL (arg
)
6686 * INTVAL (v
->mult_val
)
6687 + INTVAL (v
->add_val
)), 0))
6690 /* Otherwise, load it into a register. */
6691 tem
= gen_reg_rtx (mode
);
6692 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6693 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6696 /* If that failed, put back the change we made above. */
6697 XEXP (x
, 1-arg_operand
) = reg
;
6700 /* Look for giv with positive constant mult_val and nonconst add_val.
6701 Insert insns to calculate new compare value.
6702 ??? Turn this off due to possible overflow. */
6704 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6705 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6706 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6712 /* If the giv V had the auto-inc address optimization applied
6713 to it, and INSN occurs between the giv insn and the biv
6714 insn, then we must adjust the value used here.
6715 This is rare, so we don't bother to do so. */
6717 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6718 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6719 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6720 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6726 tem
= gen_reg_rtx (mode
);
6728 /* Replace biv with giv's reduced register. */
6729 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6732 /* Compute value to compare against. */
6733 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6734 /* Use it in this insn. */
6735 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6736 if (apply_change_group ())
6740 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6742 if (invariant_p (arg
) == 1)
6744 /* Look for giv with constant positive mult_val and nonconst
6745 add_val. Insert insns to compute new compare value.
6746 ??? Turn this off due to possible overflow. */
6748 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6749 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6750 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6756 /* If the giv V had the auto-inc address optimization applied
6757 to it, and INSN occurs between the giv insn and the biv
6758 insn, then we must adjust the value used here.
6759 This is rare, so we don't bother to do so. */
6761 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6762 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6763 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6764 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6770 tem
= gen_reg_rtx (mode
);
6772 /* Replace biv with giv's reduced register. */
6773 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6776 /* Compute value to compare against. */
6777 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6779 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6780 if (apply_change_group ())
6785 /* This code has problems. Basically, you can't know when
6786 seeing if we will eliminate BL, whether a particular giv
6787 of ARG will be reduced. If it isn't going to be reduced,
6788 we can't eliminate BL. We can try forcing it to be reduced,
6789 but that can generate poor code.
6791 The problem is that the benefit of reducing TV, below should
6792 be increased if BL can actually be eliminated, but this means
6793 we might have to do a topological sort of the order in which
6794 we try to process biv. It doesn't seem worthwhile to do
6795 this sort of thing now. */
6798 /* Otherwise the reg compared with had better be a biv. */
6799 if (GET_CODE (arg
) != REG
6800 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6803 /* Look for a pair of givs, one for each biv,
6804 with identical coefficients. */
6805 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6807 struct induction
*tv
;
6809 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6812 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6813 if (! tv
->ignore
&& ! tv
->maybe_dead
6814 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6815 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6816 && tv
->mode
== mode
)
6818 /* If the giv V had the auto-inc address optimization applied
6819 to it, and INSN occurs between the giv insn and the biv
6820 insn, then we must adjust the value used here.
6821 This is rare, so we don't bother to do so. */
6823 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6824 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6825 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6826 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6832 /* Replace biv with its giv's reduced reg. */
6833 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6834 /* Replace other operand with the other giv's
6836 XEXP (x
, arg_operand
) = tv
->new_reg
;
6843 /* If we get here, the biv can't be eliminated. */
6847 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6848 biv is used in it, since it will be replaced. */
6849 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6850 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6858 /* See if any subexpression fails elimination. */
6859 fmt
= GET_RTX_FORMAT (code
);
6860 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6865 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6866 eliminate_p
, where
))
6871 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6872 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6873 eliminate_p
, where
))
6882 /* Return nonzero if the last use of REG
6883 is in an insn following INSN in the same basic block. */
6886 last_use_this_basic_block (reg
, insn
)
6892 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6895 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6901 /* Called via `note_stores' to record the initial value of a biv. Here we
6902 just record the location of the set and process it later. */
6905 record_initial (dest
, set
)
6909 struct iv_class
*bl
;
6911 if (GET_CODE (dest
) != REG
6912 || REGNO (dest
) >= max_reg_before_loop
6913 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6916 bl
= reg_biv_class
[REGNO (dest
)];
6918 /* If this is the first set found, record it. */
6919 if (bl
->init_insn
== 0)
6921 bl
->init_insn
= note_insn
;
6926 /* If any of the registers in X are "old" and currently have a last use earlier
6927 than INSN, update them to have a last use of INSN. Their actual last use
6928 will be the previous insn but it will not have a valid uid_luid so we can't
6932 update_reg_last_use (x
, insn
)
6936 /* Check for the case where INSN does not have a valid luid. In this case,
6937 there is no need to modify the regno_last_uid, as this can only happen
6938 when code is inserted after the loop_end to set a pseudo's final value,
6939 and hence this insn will never be the last use of x. */
6940 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6941 && INSN_UID (insn
) < max_uid_for_loop
6942 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6943 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6947 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6948 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6951 update_reg_last_use (XEXP (x
, i
), insn
);
6952 else if (fmt
[i
] == 'E')
6953 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6954 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6959 /* Given a jump insn JUMP, return the condition that will cause it to branch
6960 to its JUMP_LABEL. If the condition cannot be understood, or is an
6961 inequality floating-point comparison which needs to be reversed, 0 will
6964 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6965 insn used in locating the condition was found. If a replacement test
6966 of the condition is desired, it should be placed in front of that
6967 insn and we will be sure that the inputs are still valid.
6969 The condition will be returned in a canonical form to simplify testing by
6970 callers. Specifically:
6972 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6973 (2) Both operands will be machine operands; (cc0) will have been replaced.
6974 (3) If an operand is a constant, it will be the second operand.
6975 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6976 for GE, GEU, and LEU. */
6979 get_condition (jump
, earliest
)
6988 int reverse_code
= 0;
6989 int did_reverse_condition
= 0;
6990 enum machine_mode mode
;
6992 /* If this is not a standard conditional jump, we can't parse it. */
6993 if (GET_CODE (jump
) != JUMP_INSN
6994 || ! condjump_p (jump
) || simplejump_p (jump
))
6997 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6998 mode
= GET_MODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6999 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
7000 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
7005 /* If this branches to JUMP_LABEL when the condition is false, reverse
7007 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
7008 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
7009 code
= reverse_condition (code
), did_reverse_condition
^= 1;
7011 /* If we are comparing a register with zero, see if the register is set
7012 in the previous insn to a COMPARE or a comparison operation. Perform
7013 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
7016 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
7018 /* Set non-zero when we find something of interest. */
7022 /* If comparison with cc0, import actual comparison from compare
7026 if ((prev
= prev_nonnote_insn (prev
)) == 0
7027 || GET_CODE (prev
) != INSN
7028 || (set
= single_set (prev
)) == 0
7029 || SET_DEST (set
) != cc0_rtx
)
7032 op0
= SET_SRC (set
);
7033 op1
= CONST0_RTX (GET_MODE (op0
));
7039 /* If this is a COMPARE, pick up the two things being compared. */
7040 if (GET_CODE (op0
) == COMPARE
)
7042 op1
= XEXP (op0
, 1);
7043 op0
= XEXP (op0
, 0);
7046 else if (GET_CODE (op0
) != REG
)
7049 /* Go back to the previous insn. Stop if it is not an INSN. We also
7050 stop if it isn't a single set or if it has a REG_INC note because
7051 we don't want to bother dealing with it. */
7053 if ((prev
= prev_nonnote_insn (prev
)) == 0
7054 || GET_CODE (prev
) != INSN
7055 || FIND_REG_INC_NOTE (prev
, 0)
7056 || (set
= single_set (prev
)) == 0)
7059 /* If this is setting OP0, get what it sets it to if it looks
7061 if (rtx_equal_p (SET_DEST (set
), op0
))
7063 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
7065 /* ??? We may not combine comparisons done in a CCmode with
7066 comparisons not done in a CCmode. This is to aid targets
7067 like Alpha that have an IEEE compliant EQ instruction, and
7068 a non-IEEE compliant BEQ instruction. The use of CCmode is
7069 actually artificial, simply to prevent the combination, but
7070 should not affect other platforms. */
7072 if ((GET_CODE (SET_SRC (set
)) == COMPARE
7075 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7076 && (GET_MODE_BITSIZE (inner_mode
)
7077 <= HOST_BITS_PER_WIDE_INT
)
7078 && (STORE_FLAG_VALUE
7079 & ((HOST_WIDE_INT
) 1
7080 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7081 #ifdef FLOAT_STORE_FLAG_VALUE
7083 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7084 && FLOAT_STORE_FLAG_VALUE
< 0)
7087 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
7088 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7089 != (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7091 else if (((code
== EQ
7093 && (GET_MODE_BITSIZE (inner_mode
)
7094 <= HOST_BITS_PER_WIDE_INT
)
7095 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7096 && (STORE_FLAG_VALUE
7097 & ((HOST_WIDE_INT
) 1
7098 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7099 #ifdef FLOAT_STORE_FLAG_VALUE
7101 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7102 && FLOAT_STORE_FLAG_VALUE
< 0)
7105 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
7106 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7107 != (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7109 /* We might have reversed a LT to get a GE here. But this wasn't
7110 actually the comparison of data, so we don't flag that we
7111 have had to reverse the condition. */
7112 did_reverse_condition
^= 1;
7120 else if (reg_set_p (op0
, prev
))
7121 /* If this sets OP0, but not directly, we have to give up. */
7126 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
7127 code
= GET_CODE (x
);
7130 code
= reverse_condition (code
);
7131 did_reverse_condition
^= 1;
7135 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
7141 /* If constant is first, put it last. */
7142 if (CONSTANT_P (op0
))
7143 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
7145 /* If OP0 is the result of a comparison, we weren't able to find what
7146 was really being compared, so fail. */
7147 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
7150 /* Canonicalize any ordered comparison with integers involving equality
7151 if we can do computations in the relevant mode and we do not
7154 if (GET_CODE (op1
) == CONST_INT
7155 && GET_MODE (op0
) != VOIDmode
7156 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
7158 HOST_WIDE_INT const_val
= INTVAL (op1
);
7159 unsigned HOST_WIDE_INT uconst_val
= const_val
;
7160 unsigned HOST_WIDE_INT max_val
7161 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
7166 if (const_val
!= max_val
>> 1)
7167 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7170 /* When cross-compiling, const_val might be sign-extended from
7171 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7173 if ((const_val
& max_val
)
7174 != (((HOST_WIDE_INT
) 1
7175 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7176 code
= GT
, op1
= GEN_INT (const_val
- 1);
7180 if (uconst_val
< max_val
)
7181 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7185 if (uconst_val
!= 0)
7186 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7194 /* If this was floating-point and we reversed anything other than an
7195 EQ or NE, return zero. */
7196 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7197 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7199 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7203 /* Never return CC0; return zero instead. */
7208 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
7211 /* Similar to above routine, except that we also put an invariant last
7212 unless both operands are invariants. */
7215 get_condition_for_loop (x
)
7218 rtx comparison
= get_condition (x
, NULL_PTR
);
7221 || ! invariant_p (XEXP (comparison
, 0))
7222 || invariant_p (XEXP (comparison
, 1)))
7225 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7226 XEXP (comparison
, 1), XEXP (comparison
, 0));
7230 /* Analyze a loop in order to instrument it with the use of count register.
7231 loop_start and loop_end are the first and last insns of the loop.
7232 This function works in cooperation with insert_bct ().
7233 loop_can_insert_bct[loop_num] is set according to whether the optimization
7234 is applicable to the loop. When it is applicable, the following variables
7236 loop_start_value[loop_num]
7237 loop_comparison_value[loop_num]
7238 loop_increment[loop_num]
7239 loop_comparison_code[loop_num] */
7241 #ifdef HAVE_decrement_and_branch_on_count
7243 void analyze_loop_iterations (loop_start
, loop_end
)
7244 rtx loop_start
, loop_end
;
7246 rtx comparison
, comparison_value
;
7247 rtx iteration_var
, initial_value
, increment
;
7248 enum rtx_code comparison_code
;
7254 /* loop_variable mode */
7255 enum machine_mode original_mode
;
7257 /* find the number of the loop */
7258 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7260 /* we change our mind only when we are sure that loop will be instrumented */
7261 loop_can_insert_bct
[loop_num
] = 0;
7263 /* is the optimization suppressed. */
7264 if ( !flag_branch_on_count_reg
)
7267 /* make sure that count-reg is not in use */
7268 if (loop_used_count_register
[loop_num
]){
7269 if (loop_dump_stream
)
7270 fprintf (loop_dump_stream
,
7271 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7276 /* make sure that the function has no indirect jumps. */
7277 if (indirect_jump_in_function
){
7278 if (loop_dump_stream
)
7279 fprintf (loop_dump_stream
,
7280 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7285 /* make sure that the last loop insn is a conditional jump */
7286 last_loop_insn
= PREV_INSN (loop_end
);
7287 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7288 if (loop_dump_stream
)
7289 fprintf (loop_dump_stream
,
7290 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7295 /* First find the iteration variable. If the last insn is a conditional
7296 branch, and the insn preceding it tests a register value, make that
7297 register the iteration variable. */
7299 /* We used to use prev_nonnote_insn here, but that fails because it might
7300 accidentally get the branch for a contained loop if the branch for this
7301 loop was deleted. We can only trust branches immediately before the
7304 comparison
= get_condition_for_loop (last_loop_insn
);
7305 /* ??? Get_condition may switch position of induction variable and
7306 invariant register when it canonicalizes the comparison. */
7308 if (comparison
== 0) {
7309 if (loop_dump_stream
)
7310 fprintf (loop_dump_stream
,
7311 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7316 comparison_code
= GET_CODE (comparison
);
7317 iteration_var
= XEXP (comparison
, 0);
7318 comparison_value
= XEXP (comparison
, 1);
7320 original_mode
= GET_MODE (iteration_var
);
7321 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7322 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7323 if (loop_dump_stream
)
7324 fprintf (loop_dump_stream
,
7325 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7330 /* get info about loop bounds and increment */
7331 iteration_info (iteration_var
, &initial_value
, &increment
,
7332 loop_start
, loop_end
);
7334 /* make sure that all required loop data were found */
7335 if (!(initial_value
&& increment
&& comparison_value
7336 && invariant_p (comparison_value
) && invariant_p (increment
)
7337 && ! indirect_jump_in_function
))
7339 if (loop_dump_stream
) {
7340 fprintf (loop_dump_stream
,
7341 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7342 if (!(initial_value
&& increment
&& comparison_value
)) {
7343 fprintf (loop_dump_stream
, "\tbounds not available: ");
7344 if ( ! initial_value
)
7345 fprintf (loop_dump_stream
, "initial ");
7347 fprintf (loop_dump_stream
, "increment ");
7348 if ( ! comparison_value
)
7349 fprintf (loop_dump_stream
, "comparison ");
7350 fprintf (loop_dump_stream
, "\n");
7352 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7353 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7358 /* make sure that the increment is constant */
7359 if (GET_CODE (increment
) != CONST_INT
) {
7360 if (loop_dump_stream
)
7361 fprintf (loop_dump_stream
,
7362 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7367 /* make sure that the loop contains neither function call, nor jump on table.
7368 (the count register might be altered by the called function, and might
7369 be used for a branch on table). */
7370 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7371 if (GET_CODE (insn
) == CALL_INSN
){
7372 if (loop_dump_stream
)
7373 fprintf (loop_dump_stream
,
7374 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7379 if (GET_CODE (insn
) == JUMP_INSN
7380 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7381 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7382 if (loop_dump_stream
)
7383 fprintf (loop_dump_stream
,
7384 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7390 /* At this point, we are sure that the loop can be instrumented with BCT.
7391 Some of the loops, however, will not be instrumented - the final decision
7392 is taken by insert_bct () */
7393 if (loop_dump_stream
)
7394 fprintf (loop_dump_stream
,
7395 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7398 /* mark all enclosing loops that they cannot use count register */
7399 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7400 marking here may prevent instrumenting an enclosing loop that could
7401 actually be instrumented. But since this is rare, it is safer to mark
7402 here in case the order of calling (analyze/insert)_bct would be changed. */
7403 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7404 loop_used_count_register
[i
] = 1;
7406 /* Set data structures which will be used by the instrumentation phase */
7407 loop_start_value
[loop_num
] = initial_value
;
7408 loop_comparison_value
[loop_num
] = comparison_value
;
7409 loop_increment
[loop_num
] = increment
;
7410 loop_comparison_code
[loop_num
] = comparison_code
;
7411 loop_can_insert_bct
[loop_num
] = 1;
7415 /* instrument loop for insertion of bct instruction. We distinguish between
7416 loops with compile-time bounds, to those with run-time bounds. The loop
7417 behaviour is analized according to the following characteristics/variables:
7419 ; comparison-value: the value to which the iteration counter is compared.
7420 ; initial-value: iteration-counter initial value.
7421 ; increment: iteration-counter increment.
7422 ; Computed variables:
7423 ; increment-direction: the sign of the increment.
7424 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7425 ; range-direction: sign (comparison-value - initial-value)
7426 We give up on the following cases:
7427 ; loop variable overflow.
7428 ; run-time loop bounds with comparison code NE.
7432 insert_bct (loop_start
, loop_end
)
7433 rtx loop_start
, loop_end
;
7435 rtx initial_value
, comparison_value
, increment
;
7436 enum rtx_code comparison_code
;
7438 int increment_direction
, compare_direction
;
7441 /* if the loop condition is <= or >=, the number of iteration
7442 is 1 more than the range of the bounds of the loop */
7443 int add_iteration
= 0;
7445 /* the only machine mode we work with - is the integer of the size that the
7447 enum machine_mode loop_var_mode
= SImode
;
7449 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7451 /* get loop-variables. No need to check that these are valid - already
7452 checked in analyze_loop_iterations (). */
7453 comparison_code
= loop_comparison_code
[loop_num
];
7454 initial_value
= loop_start_value
[loop_num
];
7455 comparison_value
= loop_comparison_value
[loop_num
];
7456 increment
= loop_increment
[loop_num
];
7458 /* check analyze_loop_iterations decision for this loop. */
7459 if (! loop_can_insert_bct
[loop_num
]){
7460 if (loop_dump_stream
)
7461 fprintf (loop_dump_stream
,
7462 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7467 /* It's impossible to instrument a competely unrolled loop. */
7468 if (loop_unroll_factor
[loop_num
] == -1)
7471 /* make sure that the last loop insn is a conditional jump .
7472 This check is repeated from analyze_loop_iterations (),
7473 because unrolling might have changed that. */
7474 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7475 || !condjump_p (PREV_INSN (loop_end
))) {
7476 if (loop_dump_stream
)
7477 fprintf (loop_dump_stream
,
7478 "insert_bct: not instrumenting BCT because of invalid branch\n");
7482 /* fix increment in case loop was unrolled. */
7483 if (loop_unroll_factor
[loop_num
] > 1)
7484 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7486 /* determine properties and directions of the loop */
7487 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7488 switch ( comparison_code
) {
7493 compare_direction
= 1;
7500 compare_direction
= -1;
7504 /* in this case we cannot know the number of iterations */
7505 if (loop_dump_stream
)
7506 fprintf (loop_dump_stream
,
7507 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7514 compare_direction
= 1;
7520 compare_direction
= -1;
7523 compare_direction
= 0;
7530 /* make sure that the loop does not end by an overflow */
7531 if (compare_direction
!= increment_direction
) {
7532 if (loop_dump_stream
)
7533 fprintf (loop_dump_stream
,
7534 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7539 /* try to instrument the loop. */
7541 /* Handle the simpler case, where the bounds are known at compile time. */
7542 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7545 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7547 /* check the relation between compare-val and initial-val */
7548 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7549 int range_direction
= (difference
> 0) ? 1 : -1;
7551 /* make sure the loop executes enough iterations to gain from BCT */
7552 if (difference
> -3 && difference
< 3) {
7553 if (loop_dump_stream
)
7554 fprintf (loop_dump_stream
,
7555 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7560 /* make sure that the loop executes at least once */
7561 if ((range_direction
== 1 && compare_direction
== -1)
7562 || (range_direction
== -1 && compare_direction
== 1))
7564 if (loop_dump_stream
)
7565 fprintf (loop_dump_stream
,
7566 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7571 /* make sure that the loop does not end by an overflow (in compile time
7572 bounds we must have an additional check for overflow, because here
7573 we also support the compare code of 'NE'. */
7574 if (comparison_code
== NE
7575 && increment_direction
!= range_direction
) {
7576 if (loop_dump_stream
)
7577 fprintf (loop_dump_stream
,
7578 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7583 /* Determine the number of iterations by:
7585 ; compare-val - initial-val + (increment -1) + additional-iteration
7586 ; num_iterations = -----------------------------------------------------------------
7589 difference
= (range_direction
> 0) ? difference
: -difference
;
7591 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7592 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7593 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7594 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7595 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7598 if (increment_value_abs
== 0) {
7599 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7602 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7603 / increment_value_abs
;
7606 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7608 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7610 /* Done with this loop. */
7614 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7615 /* In this case we generate run_time calculation of the number of iterations */
7617 /* With runtime bounds, if the compare is of the form '!=' we give up */
7618 if (comparison_code
== NE
) {
7619 if (loop_dump_stream
)
7620 fprintf (loop_dump_stream
,
7621 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7627 /* We rely on the existence of run-time guard to ensure that the
7628 loop executes at least once. */
7630 rtx iterations_num_reg
;
7632 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7634 /* make sure that the increment is a power of two, otherwise (an
7635 expensive) divide is needed. */
7636 if (exact_log2 (increment_value_abs
) == -1)
7638 if (loop_dump_stream
)
7639 fprintf (loop_dump_stream
,
7640 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7644 /* compute the number of iterations */
7649 /* Again, the number of iterations is calculated by:
7651 ; compare-val - initial-val + (increment -1) + additional-iteration
7652 ; num_iterations = -----------------------------------------------------------------
7655 /* ??? Do we have to call copy_rtx here before passing rtx to
7657 if (compare_direction
> 0) {
7658 /* <, <= :the loop variable is increasing */
7659 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7660 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7663 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7664 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7667 if (increment_value_abs
- 1 + add_iteration
!= 0)
7668 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7669 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7670 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7672 if (increment_value_abs
!= 1)
7674 /* ??? This will generate an expensive divide instruction for
7675 most targets. The original authors apparently expected this
7676 to be a shift, since they test for power-of-2 divisors above,
7677 but just naively generating a divide instruction will not give
7678 a shift. It happens to work for the PowerPC target because
7679 the rs6000.md file has a divide pattern that emits shifts.
7680 It will probably not work for any other target. */
7681 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7683 GEN_INT (increment_value_abs
),
7684 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7687 iterations_num_reg
= temp_reg
;
7689 sequence
= gen_sequence ();
7691 emit_insn_before (sequence
, loop_start
);
7692 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7696 /* instrument loop by inserting a bct in it. This is done in the following way:
7697 1. A new register is created and assigned the hard register number of the count
7699 2. In the head of the loop the new variable is initialized by the value passed in the
7700 loop_num_iterations parameter.
7701 3. At the end of the loop, comparison of the register with 0 is generated.
7702 The created comparison follows the pattern defined for the
7703 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7705 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7706 not used elsewhere, it will be eliminated by data-flow analisys. */
7709 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7710 rtx loop_start
, loop_end
;
7711 rtx loop_num_iterations
;
7713 rtx temp_reg1
, temp_reg2
;
7717 enum machine_mode loop_var_mode
= SImode
;
7719 if (HAVE_decrement_and_branch_on_count
)
7721 if (loop_dump_stream
)
7722 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7724 /* eliminate the check on the old variable */
7725 delete_insn (PREV_INSN (loop_end
));
7726 delete_insn (PREV_INSN (loop_end
));
7728 /* insert the label which will delimit the start of the loop */
7729 start_label
= gen_label_rtx ();
7730 emit_label_after (start_label
, loop_start
);
7732 /* insert initialization of the count register into the loop header */
7734 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7735 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7737 /* this will be count register */
7738 temp_reg2
= gen_rtx_REG (loop_var_mode
, COUNT_REGISTER_REGNUM
);
7739 /* we have to move the value to the count register from an GPR
7740 because rtx pointed to by loop_num_iterations could contain
7741 expression which cannot be moved into count register */
7742 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7744 sequence
= gen_sequence ();
7746 emit_insn_after (sequence
, loop_start
);
7748 /* insert new comparison on the count register instead of the
7749 old one, generating the needed BCT pattern (that will be
7750 later recognized by assembly generation phase). */
7751 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7753 LABEL_NUSES (start_label
)++;
7757 #endif /* HAVE_decrement_and_branch_on_count */
7761 /* Scan the function and determine whether it has indirect (computed) jumps.
7763 This is taken mostly from flow.c; similar code exists elsewhere
7764 in the compiler. It may be useful to put this into rtlanal.c. */
7766 indirect_jump_in_function_p (start
)
7771 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
7772 if (computed_jump_p (insn
))