1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* For each loop, remember its unrolling factor (if at all).
95 contents of the array:
97 -1: completely unrolled - no further instrumentation is needed.
98 >1: holds the exact amount of unrolling. */
100 int *loop_unroll_factor
;
101 int *loop_unroll_iter
;
103 /* loop parameters for arithmetic loops. These loops have a loop variable
104 which is initialized to loop_start_value, incremented in each iteration
105 by "loop_increment". At the end of the iteration the loop variable is
106 compared to the loop_comparison_value (using loop_comparison_code). */
109 rtx
*loop_comparison_value
;
110 rtx
*loop_start_value
;
111 enum rtx_code
*loop_comparison_code
;
113 /* for debugging: selects sub-range of loops for which the bct optimization
114 is invoked. The numbering is per compilation-unit. */
115 int dbg_bct_min
= -1;
116 int dbg_bct_max
= -1;
120 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
121 really a loop (an insn outside the loop branches into it). */
123 static char *loop_invalid
;
125 /* Indexed by loop number, links together all LABEL_REFs which refer to
126 code labels outside the loop. Used by routines that need to know all
127 loop exits, such as final_biv_value and final_giv_value.
129 This does not include loop exits due to return instructions. This is
130 because all bivs and givs are pseudos, and hence must be dead after a
131 return, so the presense of a return does not affect any of the
132 optimizations that use this info. It is simpler to just not include return
133 instructions on this list. */
135 rtx
*loop_number_exit_labels
;
137 /* Indexed by loop number, counts the number of LABEL_REFs on
138 loop_number_exit_labels for this loop and all loops nested inside it. */
140 int *loop_number_exit_count
;
142 /* Holds the number of loop iterations. It is zero if the number could not be
143 calculated. Must be unsigned since the number of iterations can
144 be as high as 2^wordsize-1. For loops with a wider iterator, this number
145 will will be zero if the number of loop iterations is too large for an
146 unsigned integer to hold. */
148 unsigned HOST_WIDE_INT loop_n_iterations
;
150 /* Nonzero if there is a subroutine call in the current loop. */
152 static int loop_has_call
;
154 /* Nonzero if there is a volatile memory reference in the current
157 static int loop_has_volatile
;
159 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
160 current loop. A continue statement will generate a branch to
161 NEXT_INSN (loop_continue). */
163 static rtx loop_continue
;
165 /* Indexed by register number, contains the number of times the reg
166 is set during the loop being scanned.
167 During code motion, a negative value indicates a reg that has been
168 made a candidate; in particular -2 means that it is an candidate that
169 we know is equal to a constant and -1 means that it is an candidate
170 not known equal to a constant.
171 After code motion, regs moved have 0 (which is accurate now)
172 while the failed candidates have the original number of times set.
174 Therefore, at all times, == 0 indicates an invariant register;
175 < 0 a conditionally invariant one. */
177 static int *n_times_set
;
179 /* Original value of n_times_set; same except that this value
180 is not set negative for a reg whose sets have been made candidates
181 and not set to 0 for a reg that is moved. */
183 static int *n_times_used
;
185 /* Index by register number, 1 indicates that the register
186 cannot be moved or strength reduced. */
188 static char *may_not_optimize
;
190 /* Nonzero means reg N has already been moved out of one loop.
191 This reduces the desire to move it out of another. */
193 static char *moved_once
;
195 /* Array of MEMs that are stored in this loop. If there are too many to fit
196 here, we just turn on unknown_address_altered. */
198 #define NUM_STORES 30
199 static rtx loop_store_mems
[NUM_STORES
];
201 /* Index of first available slot in above array. */
202 static int loop_store_mems_idx
;
204 /* Nonzero if we don't know what MEMs were changed in the current loop.
205 This happens if the loop contains a call (in which case `loop_has_call'
206 will also be set) or if we store into more than NUM_STORES MEMs. */
208 static int unknown_address_altered
;
210 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
211 static int num_movables
;
213 /* Count of memory write instructions discovered in the loop. */
214 static int num_mem_sets
;
216 /* Number of loops contained within the current one, including itself. */
217 static int loops_enclosed
;
219 /* Bound on pseudo register number before loop optimization.
220 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
221 int max_reg_before_loop
;
223 /* This obstack is used in product_cheap_p to allocate its rtl. It
224 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
225 If we used the same obstack that it did, we would be deallocating
228 static struct obstack temp_obstack
;
230 /* This is where the pointer to the obstack being used for RTL is stored. */
232 extern struct obstack
*rtl_obstack
;
234 #define obstack_chunk_alloc xmalloc
235 #define obstack_chunk_free free
237 extern char *oballoc ();
239 /* During the analysis of a loop, a chain of `struct movable's
240 is made to record all the movable insns found.
241 Then the entire chain can be scanned to decide which to move. */
245 rtx insn
; /* A movable insn */
246 rtx set_src
; /* The expression this reg is set from. */
247 rtx set_dest
; /* The destination of this SET. */
248 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
249 of any registers used within the LIBCALL. */
250 int consec
; /* Number of consecutive following insns
251 that must be moved with this one. */
252 int regno
; /* The register it sets */
253 short lifetime
; /* lifetime of that register;
254 may be adjusted when matching movables
255 that load the same value are found. */
256 short savings
; /* Number of insns we can move for this reg,
257 including other movables that force this
258 or match this one. */
259 unsigned int cond
: 1; /* 1 if only conditionally movable */
260 unsigned int force
: 1; /* 1 means MUST move this insn */
261 unsigned int global
: 1; /* 1 means reg is live outside this loop */
262 /* If PARTIAL is 1, GLOBAL means something different:
263 that the reg is live outside the range from where it is set
264 to the following label. */
265 unsigned int done
: 1; /* 1 inhibits further processing of this */
267 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
268 In particular, moving it does not make it
270 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
271 load SRC, rather than copying INSN. */
272 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
273 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
274 that we should avoid changing when clearing
275 the rest of the reg. */
276 struct movable
*match
; /* First entry for same value */
277 struct movable
*forces
; /* An insn that must be moved if this is */
278 struct movable
*next
;
281 FILE *loop_dump_stream
;
283 /* Forward declarations. */
285 static void find_and_verify_loops ();
286 static void mark_loop_jump ();
287 static void prescan_loop ();
288 static int reg_in_basic_block_p ();
289 static int consec_sets_invariant_p ();
290 static rtx
libcall_other_reg ();
291 static int labels_in_range_p ();
292 static void count_loop_regs_set ();
293 static void note_addr_stored ();
294 static int loop_reg_used_before_p ();
295 static void scan_loop ();
296 static void replace_call_address ();
297 static rtx
skip_consec_insns ();
298 static int libcall_benefit ();
299 static void ignore_some_movables ();
300 static void force_movables ();
301 static void combine_movables ();
302 static int rtx_equal_for_loop_p ();
303 static void move_movables ();
304 static void strength_reduce ();
305 static int valid_initial_value_p ();
306 static void find_mem_givs ();
307 static void record_biv ();
308 static void check_final_value ();
309 static void record_giv ();
310 static void update_giv_derive ();
311 static int basic_induction_var ();
312 static rtx
simplify_giv_expr ();
313 static int general_induction_var ();
314 static int consec_sets_giv ();
315 static int check_dbra_loop ();
316 static rtx
express_from ();
317 static int combine_givs_p ();
318 static void combine_givs ();
319 static int product_cheap_p ();
320 static int maybe_eliminate_biv ();
321 static int maybe_eliminate_biv_1 ();
322 static int last_use_this_basic_block ();
323 static void record_initial ();
324 static void update_reg_last_use ();
327 /* This is extern from unroll.c */
328 void iteration_info ();
330 /* Two main functions for implementing bct:
331 first - to be called before loop unrolling, and the second - after */
332 static void analyze_loop_iterations ();
333 static void insert_bct ();
335 /* Auxiliary function that inserts the bct pattern into the loop */
336 static void instrument_loop_bct ();
338 /* Indirect_jump_in_function is computed once per function. */
339 int indirect_jump_in_function
= 0;
340 static int indirect_jump_in_function_p ();
343 static int is_power_of_2();
344 static int is_conditional_branch ();
346 /* Debugging functions. */
347 int fix_bct_param ();
348 static int check_bct_param ();
352 /* Relative gain of eliminating various kinds of operations. */
359 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
360 copy the value of the strength reduced giv to its original register. */
366 char *free_point
= (char *) oballoc (1);
367 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
369 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
371 /* We multiply by 2 to reconcile the difference in scale between
372 these two ways of computing costs. Otherwise the cost of a copy
373 will be far less than the cost of an add. */
377 /* Free the objects we just allocated. */
380 /* Initialize the obstack used for rtl in product_cheap_p. */
381 gcc_obstack_init (&temp_obstack
);
384 /* Entry point of this file. Perform loop optimization
385 on the current function. F is the first insn of the function
386 and DUMPFILE is a stream for output of a trace of actions taken
387 (or 0 if none should be output). */
390 loop_optimize (f
, dumpfile
)
391 /* f is the first instruction of a chain of insns for one function */
399 loop_dump_stream
= dumpfile
;
401 init_recog_no_volatile ();
402 init_alias_analysis ();
404 max_reg_before_loop
= max_reg_num ();
406 moved_once
= (char *) alloca (max_reg_before_loop
);
407 bzero (moved_once
, max_reg_before_loop
);
411 /* Count the number of loops. */
414 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
416 if (GET_CODE (insn
) == NOTE
417 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
421 /* Don't waste time if no loops. */
422 if (max_loop_num
== 0)
425 /* Get size to use for tables indexed by uids.
426 Leave some space for labels allocated by find_and_verify_loops. */
427 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
429 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
430 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
432 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
433 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
435 /* Allocate tables for recording each loop. We set each entry, so they need
437 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
438 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
439 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
440 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
441 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
442 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
445 /* Allocate for BCT optimization */
446 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
447 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
449 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
450 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
452 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
453 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
455 loop_unroll_iter
= (int *) alloca (max_loop_num
*sizeof (int));
456 bzero ((char *) loop_unroll_iter
, max_loop_num
* sizeof (int));
458 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
459 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
460 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
461 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
462 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
463 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
466 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
467 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
470 /* Find and process each loop.
471 First, find them, and record them in order of their beginnings. */
472 find_and_verify_loops (f
);
474 /* Now find all register lifetimes. This must be done after
475 find_and_verify_loops, because it might reorder the insns in the
477 reg_scan (f
, max_reg_num (), 1);
479 /* See if we went too far. */
480 if (get_max_uid () > max_uid_for_loop
)
483 /* Compute the mapping from uids to luids.
484 LUIDs are numbers assigned to insns, like uids,
485 except that luids increase monotonically through the code.
486 Don't assign luids to line-number NOTEs, so that the distance in luids
487 between two insns is not affected by -g. */
489 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
492 if (GET_CODE (insn
) != NOTE
493 || NOTE_LINE_NUMBER (insn
) <= 0)
494 uid_luid
[INSN_UID (insn
)] = ++i
;
496 /* Give a line number note the same luid as preceding insn. */
497 uid_luid
[INSN_UID (insn
)] = i
;
502 /* Don't leave gaps in uid_luid for insns that have been
503 deleted. It is possible that the first or last insn
504 using some register has been deleted by cross-jumping.
505 Make sure that uid_luid for that former insn's uid
506 points to the general area where that insn used to be. */
507 for (i
= 0; i
< max_uid_for_loop
; i
++)
509 uid_luid
[0] = uid_luid
[i
];
510 if (uid_luid
[0] != 0)
513 for (i
= 0; i
< max_uid_for_loop
; i
++)
514 if (uid_luid
[i
] == 0)
515 uid_luid
[i
] = uid_luid
[i
- 1];
517 /* Create a mapping from loops to BLOCK tree nodes. */
518 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
519 find_loop_tree_blocks ();
522 /* determine if the function has indirect jump. If it does,
523 we cannot instrument loops in this function with bct */
524 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
527 /* Now scan the loops, last ones first, since this means inner ones are done
528 before outer ones. */
529 for (i
= max_loop_num
-1; i
>= 0; i
--)
530 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
531 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
534 /* If debugging and unrolling loops, we must replicate the tree nodes
535 corresponding to the blocks inside the loop, so that the original one
536 to one mapping will remain. */
537 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
538 unroll_block_trees ();
541 /* Optimize one loop whose start is LOOP_START and end is END.
542 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
543 NOTE_INSN_LOOP_END. */
545 /* ??? Could also move memory writes out of loops if the destination address
546 is invariant, the source is invariant, the memory write is not volatile,
547 and if we can prove that no read inside the loop can read this address
548 before the write occurs. If there is a read of this address after the
549 write, then we can also mark the memory read as invariant. */
552 scan_loop (loop_start
, end
, nregs
)
558 /* 1 if we are scanning insns that could be executed zero times. */
560 /* 1 if we are scanning insns that might never be executed
561 due to a subroutine call which might exit before they are reached. */
563 /* For a rotated loop that is entered near the bottom,
564 this is the label at the top. Otherwise it is zero. */
566 /* Jump insn that enters the loop, or 0 if control drops in. */
567 rtx loop_entry_jump
= 0;
568 /* Place in the loop where control enters. */
570 /* Number of insns in the loop. */
575 /* The SET from an insn, if it is the only SET in the insn. */
577 /* Chain describing insns movable in current loop. */
578 struct movable
*movables
= 0;
579 /* Last element in `movables' -- so we can add elements at the end. */
580 struct movable
*last_movable
= 0;
581 /* Ratio of extra register life span we can justify
582 for saving an instruction. More if loop doesn't call subroutines
583 since in that case saving an insn makes more difference
584 and more registers are available. */
586 /* If we have calls, contains the insn in which a register was used
587 if it was used exactly once; contains const0_rtx if it was used more
589 rtx
*reg_single_usage
= 0;
590 /* Nonzero if we are scanning instructions in a sub-loop. */
593 n_times_set
= (int *) alloca (nregs
* sizeof (int));
594 n_times_used
= (int *) alloca (nregs
* sizeof (int));
595 may_not_optimize
= (char *) alloca (nregs
);
597 /* Determine whether this loop starts with a jump down to a test at
598 the end. This will occur for a small number of loops with a test
599 that is too complex to duplicate in front of the loop.
601 We search for the first insn or label in the loop, skipping NOTEs.
602 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
603 (because we might have a loop executed only once that contains a
604 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
605 (in case we have a degenerate loop).
607 Note that if we mistakenly think that a loop is entered at the top
608 when, in fact, it is entered at the exit test, the only effect will be
609 slightly poorer optimization. Making the opposite error can generate
610 incorrect code. Since very few loops now start with a jump to the
611 exit test, the code here to detect that case is very conservative. */
613 for (p
= NEXT_INSN (loop_start
);
615 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
616 && (GET_CODE (p
) != NOTE
617 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
618 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
624 /* Set up variables describing this loop. */
625 prescan_loop (loop_start
, end
);
626 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
628 /* If loop has a jump before the first label,
629 the true entry is the target of that jump.
630 Start scan from there.
631 But record in LOOP_TOP the place where the end-test jumps
632 back to so we can scan that after the end of the loop. */
633 if (GET_CODE (p
) == JUMP_INSN
)
637 /* Loop entry must be unconditional jump (and not a RETURN) */
639 && JUMP_LABEL (p
) != 0
640 /* Check to see whether the jump actually
641 jumps out of the loop (meaning it's no loop).
642 This case can happen for things like
643 do {..} while (0). If this label was generated previously
644 by loop, we can't tell anything about it and have to reject
646 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
647 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
648 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
650 loop_top
= next_label (scan_start
);
651 scan_start
= JUMP_LABEL (p
);
655 /* If SCAN_START was an insn created by loop, we don't know its luid
656 as required by loop_reg_used_before_p. So skip such loops. (This
657 test may never be true, but it's best to play it safe.)
659 Also, skip loops where we do not start scanning at a label. This
660 test also rejects loops starting with a JUMP_INSN that failed the
663 if (INSN_UID (scan_start
) >= max_uid_for_loop
664 || GET_CODE (scan_start
) != CODE_LABEL
)
666 if (loop_dump_stream
)
667 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
668 INSN_UID (loop_start
), INSN_UID (end
));
672 /* Count number of times each reg is set during this loop.
673 Set may_not_optimize[I] if it is not safe to move out
674 the setting of register I. If this loop has calls, set
675 reg_single_usage[I]. */
677 bzero ((char *) n_times_set
, nregs
* sizeof (int));
678 bzero (may_not_optimize
, nregs
);
682 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
683 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
686 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
687 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
689 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
690 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
691 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
693 if (loop_dump_stream
)
695 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
696 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
698 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
699 INSN_UID (loop_continue
));
702 /* Scan through the loop finding insns that are safe to move.
703 Set n_times_set negative for the reg being set, so that
704 this reg will be considered invariant for subsequent insns.
705 We consider whether subsequent insns use the reg
706 in deciding whether it is worth actually moving.
708 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
709 and therefore it is possible that the insns we are scanning
710 would never be executed. At such times, we must make sure
711 that it is safe to execute the insn once instead of zero times.
712 When MAYBE_NEVER is 0, all insns will be executed at least once
713 so that is not a problem. */
719 /* At end of a straight-in loop, we are done.
720 At end of a loop entered at the bottom, scan the top. */
733 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
734 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
736 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
737 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
740 if (GET_CODE (p
) == INSN
741 && (set
= single_set (p
))
742 && GET_CODE (SET_DEST (set
)) == REG
743 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
748 rtx src
= SET_SRC (set
);
749 rtx dependencies
= 0;
751 /* Figure out what to use as a source of this insn. If a REG_EQUIV
752 note is given or if a REG_EQUAL note with a constant operand is
753 specified, use it as the source and mark that we should move
754 this insn by calling emit_move_insn rather that duplicating the
757 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
759 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
761 src
= XEXP (temp
, 0), move_insn
= 1;
764 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
765 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
766 src
= XEXP (temp
, 0), move_insn
= 1;
767 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
769 src
= XEXP (temp
, 0);
770 /* A libcall block can use regs that don't appear in
771 the equivalent expression. To move the libcall,
772 we must move those regs too. */
773 dependencies
= libcall_other_reg (p
, src
);
777 /* Don't try to optimize a register that was made
778 by loop-optimization for an inner loop.
779 We don't know its life-span, so we can't compute the benefit. */
780 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
782 /* In order to move a register, we need to have one of three cases:
783 (1) it is used only in the same basic block as the set
784 (2) it is not a user variable and it is not used in the
785 exit test (this can cause the variable to be used
786 before it is set just like a user-variable).
787 (3) the set is guaranteed to be executed once the loop starts,
788 and the reg is not used until after that. */
789 else if (! ((! maybe_never
790 && ! loop_reg_used_before_p (set
, p
, loop_start
,
792 || (! REG_USERVAR_P (SET_DEST (set
))
793 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
794 || reg_in_basic_block_p (p
, SET_DEST (set
))))
796 else if ((tem
= invariant_p (src
))
797 && (dependencies
== 0
798 || (tem2
= invariant_p (dependencies
)) != 0)
799 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
801 = consec_sets_invariant_p (SET_DEST (set
),
802 n_times_set
[REGNO (SET_DEST (set
))],
804 /* If the insn can cause a trap (such as divide by zero),
805 can't move it unless it's guaranteed to be executed
806 once loop is entered. Even a function call might
807 prevent the trap insn from being reached
808 (since it might exit!) */
809 && ! ((maybe_never
|| call_passed
)
810 && may_trap_p (src
)))
812 register struct movable
*m
;
813 register int regno
= REGNO (SET_DEST (set
));
815 /* A potential lossage is where we have a case where two insns
816 can be combined as long as they are both in the loop, but
817 we move one of them outside the loop. For large loops,
818 this can lose. The most common case of this is the address
819 of a function being called.
821 Therefore, if this register is marked as being used exactly
822 once if we are in a loop with calls (a "large loop"), see if
823 we can replace the usage of this register with the source
824 of this SET. If we can, delete this insn.
826 Don't do this if P has a REG_RETVAL note or if we have
827 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
829 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
830 && reg_single_usage
[regno
] != const0_rtx
831 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
832 && (REGNO_LAST_UID (regno
)
833 == INSN_UID (reg_single_usage
[regno
]))
834 && n_times_set
[REGNO (SET_DEST (set
))] == 1
835 && ! side_effects_p (SET_SRC (set
))
836 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
837 #ifdef SMALL_REGISTER_CLASSES
838 && ! (SMALL_REGISTER_CLASSES
839 && GET_CODE (SET_SRC (set
)) == REG
840 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
842 /* This test is not redundant; SET_SRC (set) might be
843 a call-clobbered register and the life of REGNO
844 might span a call. */
845 && ! modified_between_p (SET_SRC (set
), p
,
846 reg_single_usage
[regno
])
847 && no_labels_between_p (p
, reg_single_usage
[regno
])
848 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
849 reg_single_usage
[regno
]))
851 /* Replace any usage in a REG_EQUAL note. Must copy the
852 new source, so that we don't get rtx sharing between the
853 SET_SOURCE and REG_NOTES of insn p. */
854 REG_NOTES (reg_single_usage
[regno
])
855 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
856 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
859 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
860 NOTE_SOURCE_FILE (p
) = 0;
861 n_times_set
[regno
] = 0;
865 m
= (struct movable
*) alloca (sizeof (struct movable
));
869 m
->dependencies
= dependencies
;
870 m
->set_dest
= SET_DEST (set
);
872 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
876 m
->move_insn
= move_insn
;
877 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
878 m
->savemode
= VOIDmode
;
880 /* Set M->cond if either invariant_p or consec_sets_invariant_p
881 returned 2 (only conditionally invariant). */
882 m
->cond
= ((tem
| tem1
| tem2
) > 1);
883 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
884 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
886 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
887 - uid_luid
[REGNO_FIRST_UID (regno
)]);
888 m
->savings
= n_times_used
[regno
];
889 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
890 m
->savings
+= libcall_benefit (p
);
891 n_times_set
[regno
] = move_insn
? -2 : -1;
892 /* Add M to the end of the chain MOVABLES. */
896 last_movable
->next
= m
;
901 /* Skip this insn, not checking REG_LIBCALL notes. */
902 p
= next_nonnote_insn (p
);
903 /* Skip the consecutive insns, if there are any. */
904 p
= skip_consec_insns (p
, m
->consec
);
905 /* Back up to the last insn of the consecutive group. */
906 p
= prev_nonnote_insn (p
);
908 /* We must now reset m->move_insn, m->is_equiv, and possibly
909 m->set_src to correspond to the effects of all the
911 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
913 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
916 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
917 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
918 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
923 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
926 /* If this register is always set within a STRICT_LOW_PART
927 or set to zero, then its high bytes are constant.
928 So clear them outside the loop and within the loop
929 just load the low bytes.
930 We must check that the machine has an instruction to do so.
931 Also, if the value loaded into the register
932 depends on the same register, this cannot be done. */
933 else if (SET_SRC (set
) == const0_rtx
934 && GET_CODE (NEXT_INSN (p
)) == INSN
935 && (set1
= single_set (NEXT_INSN (p
)))
936 && GET_CODE (set1
) == SET
937 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
938 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
939 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
941 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
943 register int regno
= REGNO (SET_DEST (set
));
944 if (n_times_set
[regno
] == 2)
946 register struct movable
*m
;
947 m
= (struct movable
*) alloca (sizeof (struct movable
));
950 m
->set_dest
= SET_DEST (set
);
958 /* If the insn may not be executed on some cycles,
959 we can't clear the whole reg; clear just high part.
960 Not even if the reg is used only within this loop.
967 Clearing x before the inner loop could clobber a value
968 being saved from the last time around the outer loop.
969 However, if the reg is not used outside this loop
970 and all uses of the register are in the same
971 basic block as the store, there is no problem.
973 If this insn was made by loop, we don't know its
974 INSN_LUID and hence must make a conservative
976 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
977 || (uid_luid
[REGNO_LAST_UID (regno
)]
979 || (uid_luid
[REGNO_FIRST_UID (regno
)]
981 || (labels_in_range_p
982 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
983 if (maybe_never
&& m
->global
)
984 m
->savemode
= GET_MODE (SET_SRC (set1
));
986 m
->savemode
= VOIDmode
;
990 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
991 - uid_luid
[REGNO_FIRST_UID (regno
)]);
993 n_times_set
[regno
] = -1;
994 /* Add M to the end of the chain MOVABLES. */
998 last_movable
->next
= m
;
1003 /* Past a call insn, we get to insns which might not be executed
1004 because the call might exit. This matters for insns that trap.
1005 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1006 so they don't count. */
1007 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1009 /* Past a label or a jump, we get to insns for which we
1010 can't count on whether or how many times they will be
1011 executed during each iteration. Therefore, we can
1012 only move out sets of trivial variables
1013 (those not used after the loop). */
1014 /* Similar code appears twice in strength_reduce. */
1015 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1016 /* If we enter the loop in the middle, and scan around to the
1017 beginning, don't set maybe_never for that. This must be an
1018 unconditional jump, otherwise the code at the top of the
1019 loop might never be executed. Unconditional jumps are
1020 followed a by barrier then loop end. */
1021 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1022 && NEXT_INSN (NEXT_INSN (p
)) == end
1023 && simplejump_p (p
)))
1025 else if (GET_CODE (p
) == NOTE
)
1027 /* At the virtual top of a converted loop, insns are again known to
1028 be executed: logically, the loop begins here even though the exit
1029 code has been duplicated. */
1030 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1031 maybe_never
= call_passed
= 0;
1032 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1034 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1039 /* If one movable subsumes another, ignore that other. */
1041 ignore_some_movables (movables
);
1043 /* For each movable insn, see if the reg that it loads
1044 leads when it dies right into another conditionally movable insn.
1045 If so, record that the second insn "forces" the first one,
1046 since the second can be moved only if the first is. */
1048 force_movables (movables
);
1050 /* See if there are multiple movable insns that load the same value.
1051 If there are, make all but the first point at the first one
1052 through the `match' field, and add the priorities of them
1053 all together as the priority of the first. */
1055 combine_movables (movables
, nregs
);
1057 /* Now consider each movable insn to decide whether it is worth moving.
1058 Store 0 in n_times_set for each reg that is moved. */
1060 move_movables (movables
, threshold
,
1061 insn_count
, loop_start
, end
, nregs
);
1063 /* Now candidates that still are negative are those not moved.
1064 Change n_times_set to indicate that those are not actually invariant. */
1065 for (i
= 0; i
< nregs
; i
++)
1066 if (n_times_set
[i
] < 0)
1067 n_times_set
[i
] = n_times_used
[i
];
1069 if (flag_strength_reduce
)
1070 strength_reduce (scan_start
, end
, loop_top
,
1071 insn_count
, loop_start
, end
);
1074 /* Add elements to *OUTPUT to record all the pseudo-regs
1075 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1078 record_excess_regs (in_this
, not_in_this
, output
)
1079 rtx in_this
, not_in_this
;
1086 code
= GET_CODE (in_this
);
1100 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1101 && ! reg_mentioned_p (in_this
, not_in_this
))
1102 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1106 fmt
= GET_RTX_FORMAT (code
);
1107 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1114 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1115 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1119 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1125 /* Check what regs are referred to in the libcall block ending with INSN,
1126 aside from those mentioned in the equivalent value.
1127 If there are none, return 0.
1128 If there are one or more, return an EXPR_LIST containing all of them. */
1131 libcall_other_reg (insn
, equiv
)
1134 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1135 rtx p
= XEXP (note
, 0);
1138 /* First, find all the regs used in the libcall block
1139 that are not mentioned as inputs to the result. */
1143 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1144 || GET_CODE (p
) == CALL_INSN
)
1145 record_excess_regs (PATTERN (p
), equiv
, &output
);
1152 /* Return 1 if all uses of REG
1153 are between INSN and the end of the basic block. */
1156 reg_in_basic_block_p (insn
, reg
)
1159 int regno
= REGNO (reg
);
1162 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1165 /* Search this basic block for the already recorded last use of the reg. */
1166 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1168 switch (GET_CODE (p
))
1175 /* Ordinary insn: if this is the last use, we win. */
1176 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1181 /* Jump insn: if this is the last use, we win. */
1182 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1184 /* Otherwise, it's the end of the basic block, so we lose. */
1189 /* It's the end of the basic block, so we lose. */
1194 /* The "last use" doesn't follow the "first use"?? */
1198 /* Compute the benefit of eliminating the insns in the block whose
1199 last insn is LAST. This may be a group of insns used to compute a
1200 value directly or can contain a library call. */
1203 libcall_benefit (last
)
1209 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1210 insn
!= last
; insn
= NEXT_INSN (insn
))
1212 if (GET_CODE (insn
) == CALL_INSN
)
1213 benefit
+= 10; /* Assume at least this many insns in a library
1215 else if (GET_CODE (insn
) == INSN
1216 && GET_CODE (PATTERN (insn
)) != USE
1217 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1224 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1227 skip_consec_insns (insn
, count
)
1231 for (; count
> 0; count
--)
1235 /* If first insn of libcall sequence, skip to end. */
1236 /* Do this at start of loop, since INSN is guaranteed to
1238 if (GET_CODE (insn
) != NOTE
1239 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1240 insn
= XEXP (temp
, 0);
1242 do insn
= NEXT_INSN (insn
);
1243 while (GET_CODE (insn
) == NOTE
);
1249 /* Ignore any movable whose insn falls within a libcall
1250 which is part of another movable.
1251 We make use of the fact that the movable for the libcall value
1252 was made later and so appears later on the chain. */
1255 ignore_some_movables (movables
)
1256 struct movable
*movables
;
1258 register struct movable
*m
, *m1
;
1260 for (m
= movables
; m
; m
= m
->next
)
1262 /* Is this a movable for the value of a libcall? */
1263 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1267 /* Check for earlier movables inside that range,
1268 and mark them invalid. We cannot use LUIDs here because
1269 insns created by loop.c for prior loops don't have LUIDs.
1270 Rather than reject all such insns from movables, we just
1271 explicitly check each insn in the libcall (since invariant
1272 libcalls aren't that common). */
1273 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1274 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1275 if (m1
->insn
== insn
)
1281 /* For each movable insn, see if the reg that it loads
1282 leads when it dies right into another conditionally movable insn.
1283 If so, record that the second insn "forces" the first one,
1284 since the second can be moved only if the first is. */
1287 force_movables (movables
)
1288 struct movable
*movables
;
1290 register struct movable
*m
, *m1
;
1291 for (m1
= movables
; m1
; m1
= m1
->next
)
1292 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1293 if (!m1
->partial
&& !m1
->done
)
1295 int regno
= m1
->regno
;
1296 for (m
= m1
->next
; m
; m
= m
->next
)
1297 /* ??? Could this be a bug? What if CSE caused the
1298 register of M1 to be used after this insn?
1299 Since CSE does not update regno_last_uid,
1300 this insn M->insn might not be where it dies.
1301 But very likely this doesn't matter; what matters is
1302 that M's reg is computed from M1's reg. */
1303 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1306 if (m
!= 0 && m
->set_src
== m1
->set_dest
1307 /* If m->consec, m->set_src isn't valid. */
1311 /* Increase the priority of the moving the first insn
1312 since it permits the second to be moved as well. */
1316 m1
->lifetime
+= m
->lifetime
;
1317 m1
->savings
+= m1
->savings
;
1322 /* Find invariant expressions that are equal and can be combined into
1326 combine_movables (movables
, nregs
)
1327 struct movable
*movables
;
1330 register struct movable
*m
;
1331 char *matched_regs
= (char *) alloca (nregs
);
1332 enum machine_mode mode
;
1334 /* Regs that are set more than once are not allowed to match
1335 or be matched. I'm no longer sure why not. */
1336 /* Perhaps testing m->consec_sets would be more appropriate here? */
1338 for (m
= movables
; m
; m
= m
->next
)
1339 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1341 register struct movable
*m1
;
1342 int regno
= m
->regno
;
1344 bzero (matched_regs
, nregs
);
1345 matched_regs
[regno
] = 1;
1347 for (m1
= movables
; m1
; m1
= m1
->next
)
1348 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1349 /* A reg used outside the loop mustn't be eliminated. */
1351 /* A reg used for zero-extending mustn't be eliminated. */
1353 && (matched_regs
[m1
->regno
]
1356 /* Can combine regs with different modes loaded from the
1357 same constant only if the modes are the same or
1358 if both are integer modes with M wider or the same
1359 width as M1. The check for integer is redundant, but
1360 safe, since the only case of differing destination
1361 modes with equal sources is when both sources are
1362 VOIDmode, i.e., CONST_INT. */
1363 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1364 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1365 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1366 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1367 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1368 /* See if the source of M1 says it matches M. */
1369 && ((GET_CODE (m1
->set_src
) == REG
1370 && matched_regs
[REGNO (m1
->set_src
)])
1371 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1373 && ((m
->dependencies
== m1
->dependencies
)
1374 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1376 m
->lifetime
+= m1
->lifetime
;
1377 m
->savings
+= m1
->savings
;
1380 matched_regs
[m1
->regno
] = 1;
1384 /* Now combine the regs used for zero-extension.
1385 This can be done for those not marked `global'
1386 provided their lives don't overlap. */
1388 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1389 mode
= GET_MODE_WIDER_MODE (mode
))
1391 register struct movable
*m0
= 0;
1393 /* Combine all the registers for extension from mode MODE.
1394 Don't combine any that are used outside this loop. */
1395 for (m
= movables
; m
; m
= m
->next
)
1396 if (m
->partial
&& ! m
->global
1397 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1399 register struct movable
*m1
;
1400 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1401 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1405 /* First one: don't check for overlap, just record it. */
1410 /* Make sure they extend to the same mode.
1411 (Almost always true.) */
1412 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1415 /* We already have one: check for overlap with those
1416 already combined together. */
1417 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1418 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1419 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1420 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1423 /* No overlap: we can combine this with the others. */
1424 m0
->lifetime
+= m
->lifetime
;
1425 m0
->savings
+= m
->savings
;
1434 /* Return 1 if regs X and Y will become the same if moved. */
1437 regs_match_p (x
, y
, movables
)
1439 struct movable
*movables
;
1443 struct movable
*mx
, *my
;
1445 for (mx
= movables
; mx
; mx
= mx
->next
)
1446 if (mx
->regno
== xn
)
1449 for (my
= movables
; my
; my
= my
->next
)
1450 if (my
->regno
== yn
)
1454 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1456 || mx
== my
->match
));
1459 /* Return 1 if X and Y are identical-looking rtx's.
1460 This is the Lisp function EQUAL for rtx arguments.
1462 If two registers are matching movables or a movable register and an
1463 equivalent constant, consider them equal. */
1466 rtx_equal_for_loop_p (x
, y
, movables
)
1468 struct movable
*movables
;
1472 register struct movable
*m
;
1473 register enum rtx_code code
;
1478 if (x
== 0 || y
== 0)
1481 code
= GET_CODE (x
);
1483 /* If we have a register and a constant, they may sometimes be
1485 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1487 for (m
= movables
; m
; m
= m
->next
)
1488 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1489 && rtx_equal_p (m
->set_src
, y
))
1492 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1494 for (m
= movables
; m
; m
= m
->next
)
1495 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1496 && rtx_equal_p (m
->set_src
, x
))
1499 /* Otherwise, rtx's of different codes cannot be equal. */
1500 if (code
!= GET_CODE (y
))
1503 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1504 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1506 if (GET_MODE (x
) != GET_MODE (y
))
1509 /* These three types of rtx's can be compared nonrecursively. */
1511 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1513 if (code
== LABEL_REF
)
1514 return XEXP (x
, 0) == XEXP (y
, 0);
1515 if (code
== SYMBOL_REF
)
1516 return XSTR (x
, 0) == XSTR (y
, 0);
1518 /* Compare the elements. If any pair of corresponding elements
1519 fail to match, return 0 for the whole things. */
1521 fmt
= GET_RTX_FORMAT (code
);
1522 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1527 if (XWINT (x
, i
) != XWINT (y
, i
))
1532 if (XINT (x
, i
) != XINT (y
, i
))
1537 /* Two vectors must have the same length. */
1538 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1541 /* And the corresponding elements must match. */
1542 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1543 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1548 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1553 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1558 /* These are just backpointers, so they don't matter. */
1564 /* It is believed that rtx's at this level will never
1565 contain anything but integers and other rtx's,
1566 except for within LABEL_REFs and SYMBOL_REFs. */
1574 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1575 insns in INSNS which use thet reference. */
1578 add_label_notes (x
, insns
)
1582 enum rtx_code code
= GET_CODE (x
);
1587 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1589 rtx next
= next_real_insn (XEXP (x
, 0));
1591 /* Don't record labels that refer to dispatch tables.
1592 This is not necessary, since the tablejump references the same label.
1593 And if we did record them, flow.c would make worse code. */
1595 || ! (GET_CODE (next
) == JUMP_INSN
1596 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1597 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1599 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1600 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1601 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1607 fmt
= GET_RTX_FORMAT (code
);
1608 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1611 add_label_notes (XEXP (x
, i
), insns
);
1612 else if (fmt
[i
] == 'E')
1613 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1614 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1618 /* Scan MOVABLES, and move the insns that deserve to be moved.
1619 If two matching movables are combined, replace one reg with the
1620 other throughout. */
1623 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1624 struct movable
*movables
;
1632 register struct movable
*m
;
1634 /* Map of pseudo-register replacements to handle combining
1635 when we move several insns that load the same value
1636 into different pseudo-registers. */
1637 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1638 char *already_moved
= (char *) alloca (nregs
);
1640 bzero (already_moved
, nregs
);
1641 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1645 for (m
= movables
; m
; m
= m
->next
)
1647 /* Describe this movable insn. */
1649 if (loop_dump_stream
)
1651 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1652 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1654 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1656 fprintf (loop_dump_stream
, "cond ");
1658 fprintf (loop_dump_stream
, "force ");
1660 fprintf (loop_dump_stream
, "global ");
1662 fprintf (loop_dump_stream
, "done ");
1664 fprintf (loop_dump_stream
, "move-insn ");
1666 fprintf (loop_dump_stream
, "matches %d ",
1667 INSN_UID (m
->match
->insn
));
1669 fprintf (loop_dump_stream
, "forces %d ",
1670 INSN_UID (m
->forces
->insn
));
1673 /* Count movables. Value used in heuristics in strength_reduce. */
1676 /* Ignore the insn if it's already done (it matched something else).
1677 Otherwise, see if it is now safe to move. */
1681 || (1 == invariant_p (m
->set_src
)
1682 && (m
->dependencies
== 0
1683 || 1 == invariant_p (m
->dependencies
))
1685 || 1 == consec_sets_invariant_p (m
->set_dest
,
1688 && (! m
->forces
|| m
->forces
->done
))
1692 int savings
= m
->savings
;
1694 /* We have an insn that is safe to move.
1695 Compute its desirability. */
1700 if (loop_dump_stream
)
1701 fprintf (loop_dump_stream
, "savings %d ", savings
);
1703 if (moved_once
[regno
])
1707 if (loop_dump_stream
)
1708 fprintf (loop_dump_stream
, "halved since already moved ");
1711 /* An insn MUST be moved if we already moved something else
1712 which is safe only if this one is moved too: that is,
1713 if already_moved[REGNO] is nonzero. */
1715 /* An insn is desirable to move if the new lifetime of the
1716 register is no more than THRESHOLD times the old lifetime.
1717 If it's not desirable, it means the loop is so big
1718 that moving won't speed things up much,
1719 and it is liable to make register usage worse. */
1721 /* It is also desirable to move if it can be moved at no
1722 extra cost because something else was already moved. */
1724 if (already_moved
[regno
]
1725 || (threshold
* savings
* m
->lifetime
) >= insn_count
1726 || (m
->forces
&& m
->forces
->done
1727 && n_times_used
[m
->forces
->regno
] == 1))
1730 register struct movable
*m1
;
1733 /* Now move the insns that set the reg. */
1735 if (m
->partial
&& m
->match
)
1739 /* Find the end of this chain of matching regs.
1740 Thus, we load each reg in the chain from that one reg.
1741 And that reg is loaded with 0 directly,
1742 since it has ->match == 0. */
1743 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1744 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1745 SET_DEST (PATTERN (m1
->insn
)));
1746 i1
= emit_insn_before (newpat
, loop_start
);
1748 /* Mark the moved, invariant reg as being allowed to
1749 share a hard reg with the other matching invariant. */
1750 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1751 r1
= SET_DEST (PATTERN (m
->insn
));
1752 r2
= SET_DEST (PATTERN (m1
->insn
));
1753 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1754 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1756 delete_insn (m
->insn
);
1761 if (loop_dump_stream
)
1762 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1764 /* If we are to re-generate the item being moved with a
1765 new move insn, first delete what we have and then emit
1766 the move insn before the loop. */
1767 else if (m
->move_insn
)
1771 for (count
= m
->consec
; count
>= 0; count
--)
1773 /* If this is the first insn of a library call sequence,
1775 if (GET_CODE (p
) != NOTE
1776 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1779 /* If this is the last insn of a libcall sequence, then
1780 delete every insn in the sequence except the last.
1781 The last insn is handled in the normal manner. */
1782 if (GET_CODE (p
) != NOTE
1783 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1785 temp
= XEXP (temp
, 0);
1787 temp
= delete_insn (temp
);
1790 p
= delete_insn (p
);
1791 while (p
&& GET_CODE (p
) == NOTE
)
1796 emit_move_insn (m
->set_dest
, m
->set_src
);
1797 temp
= get_insns ();
1800 add_label_notes (m
->set_src
, temp
);
1802 i1
= emit_insns_before (temp
, loop_start
);
1803 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1805 = gen_rtx (EXPR_LIST
,
1806 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1807 m
->set_src
, REG_NOTES (i1
));
1809 if (loop_dump_stream
)
1810 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1812 /* The more regs we move, the less we like moving them. */
1817 for (count
= m
->consec
; count
>= 0; count
--)
1821 /* If first insn of libcall sequence, skip to end. */
1822 /* Do this at start of loop, since p is guaranteed to
1824 if (GET_CODE (p
) != NOTE
1825 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1828 /* If last insn of libcall sequence, move all
1829 insns except the last before the loop. The last
1830 insn is handled in the normal manner. */
1831 if (GET_CODE (p
) != NOTE
1832 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1836 rtx fn_address_insn
= 0;
1839 for (temp
= XEXP (temp
, 0); temp
!= p
;
1840 temp
= NEXT_INSN (temp
))
1846 if (GET_CODE (temp
) == NOTE
)
1849 body
= PATTERN (temp
);
1851 /* Find the next insn after TEMP,
1852 not counting USE or NOTE insns. */
1853 for (next
= NEXT_INSN (temp
); next
!= p
;
1854 next
= NEXT_INSN (next
))
1855 if (! (GET_CODE (next
) == INSN
1856 && GET_CODE (PATTERN (next
)) == USE
)
1857 && GET_CODE (next
) != NOTE
)
1860 /* If that is the call, this may be the insn
1861 that loads the function address.
1863 Extract the function address from the insn
1864 that loads it into a register.
1865 If this insn was cse'd, we get incorrect code.
1867 So emit a new move insn that copies the
1868 function address into the register that the
1869 call insn will use. flow.c will delete any
1870 redundant stores that we have created. */
1871 if (GET_CODE (next
) == CALL_INSN
1872 && GET_CODE (body
) == SET
1873 && GET_CODE (SET_DEST (body
)) == REG
1874 && (n
= find_reg_note (temp
, REG_EQUAL
,
1877 fn_reg
= SET_SRC (body
);
1878 if (GET_CODE (fn_reg
) != REG
)
1879 fn_reg
= SET_DEST (body
);
1880 fn_address
= XEXP (n
, 0);
1881 fn_address_insn
= temp
;
1883 /* We have the call insn.
1884 If it uses the register we suspect it might,
1885 load it with the correct address directly. */
1886 if (GET_CODE (temp
) == CALL_INSN
1888 && reg_referenced_p (fn_reg
, body
))
1889 emit_insn_after (gen_move_insn (fn_reg
,
1893 if (GET_CODE (temp
) == CALL_INSN
)
1895 i1
= emit_call_insn_before (body
, loop_start
);
1896 /* Because the USAGE information potentially
1897 contains objects other than hard registers
1898 we need to copy it. */
1899 if (CALL_INSN_FUNCTION_USAGE (temp
))
1900 CALL_INSN_FUNCTION_USAGE (i1
)
1901 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1904 i1
= emit_insn_before (body
, loop_start
);
1907 if (temp
== fn_address_insn
)
1908 fn_address_insn
= i1
;
1909 REG_NOTES (i1
) = REG_NOTES (temp
);
1913 if (m
->savemode
!= VOIDmode
)
1915 /* P sets REG to zero; but we should clear only
1916 the bits that are not covered by the mode
1918 rtx reg
= m
->set_dest
;
1924 (GET_MODE (reg
), and_optab
, reg
,
1925 GEN_INT ((((HOST_WIDE_INT
) 1
1926 << GET_MODE_BITSIZE (m
->savemode
)))
1928 reg
, 1, OPTAB_LIB_WIDEN
);
1932 emit_move_insn (reg
, tem
);
1933 sequence
= gen_sequence ();
1935 i1
= emit_insn_before (sequence
, loop_start
);
1937 else if (GET_CODE (p
) == CALL_INSN
)
1939 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1940 /* Because the USAGE information potentially
1941 contains objects other than hard registers
1942 we need to copy it. */
1943 if (CALL_INSN_FUNCTION_USAGE (p
))
1944 CALL_INSN_FUNCTION_USAGE (i1
)
1945 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1948 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1950 REG_NOTES (i1
) = REG_NOTES (p
);
1952 /* If there is a REG_EQUAL note present whose value is
1953 not loop invariant, then delete it, since it may
1954 cause problems with later optimization passes.
1955 It is possible for cse to create such notes
1956 like this as a result of record_jump_cond. */
1958 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1959 && ! invariant_p (XEXP (temp
, 0)))
1960 remove_note (i1
, temp
);
1965 if (loop_dump_stream
)
1966 fprintf (loop_dump_stream
, " moved to %d",
1970 /* This isn't needed because REG_NOTES is copied
1971 below and is wrong since P might be a PARALLEL. */
1972 if (REG_NOTES (i1
) == 0
1973 && ! m
->partial
/* But not if it's a zero-extend clr. */
1974 && ! m
->global
/* and not if used outside the loop
1975 (since it might get set outside). */
1976 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1978 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1979 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1982 /* If library call, now fix the REG_NOTES that contain
1983 insn pointers, namely REG_LIBCALL on FIRST
1984 and REG_RETVAL on I1. */
1985 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1987 XEXP (temp
, 0) = first
;
1988 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1989 XEXP (temp
, 0) = i1
;
1993 do p
= NEXT_INSN (p
);
1994 while (p
&& GET_CODE (p
) == NOTE
);
1997 /* The more regs we move, the less we like moving them. */
2001 /* Any other movable that loads the same register
2003 already_moved
[regno
] = 1;
2005 /* This reg has been moved out of one loop. */
2006 moved_once
[regno
] = 1;
2008 /* The reg set here is now invariant. */
2010 n_times_set
[regno
] = 0;
2014 /* Change the length-of-life info for the register
2015 to say it lives at least the full length of this loop.
2016 This will help guide optimizations in outer loops. */
2018 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2019 /* This is the old insn before all the moved insns.
2020 We can't use the moved insn because it is out of range
2021 in uid_luid. Only the old insns have luids. */
2022 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2023 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2024 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2026 /* Combine with this moved insn any other matching movables. */
2029 for (m1
= movables
; m1
; m1
= m1
->next
)
2034 /* Schedule the reg loaded by M1
2035 for replacement so that shares the reg of M.
2036 If the modes differ (only possible in restricted
2037 circumstances, make a SUBREG. */
2038 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2039 reg_map
[m1
->regno
] = m
->set_dest
;
2042 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2045 /* Get rid of the matching insn
2046 and prevent further processing of it. */
2049 /* if library call, delete all insn except last, which
2051 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2054 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2055 temp
= NEXT_INSN (temp
))
2058 delete_insn (m1
->insn
);
2060 /* Any other movable that loads the same register
2062 already_moved
[m1
->regno
] = 1;
2064 /* The reg merged here is now invariant,
2065 if the reg it matches is invariant. */
2067 n_times_set
[m1
->regno
] = 0;
2070 else if (loop_dump_stream
)
2071 fprintf (loop_dump_stream
, "not desirable");
2073 else if (loop_dump_stream
&& !m
->match
)
2074 fprintf (loop_dump_stream
, "not safe");
2076 if (loop_dump_stream
)
2077 fprintf (loop_dump_stream
, "\n");
2081 new_start
= loop_start
;
2083 /* Go through all the instructions in the loop, making
2084 all the register substitutions scheduled in REG_MAP. */
2085 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2086 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2087 || GET_CODE (p
) == CALL_INSN
)
2089 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2090 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2096 /* Scan X and replace the address of any MEM in it with ADDR.
2097 REG is the address that MEM should have before the replacement. */
2100 replace_call_address (x
, reg
, addr
)
2103 register enum rtx_code code
;
2109 code
= GET_CODE (x
);
2123 /* Short cut for very common case. */
2124 replace_call_address (XEXP (x
, 1), reg
, addr
);
2128 /* Short cut for very common case. */
2129 replace_call_address (XEXP (x
, 0), reg
, addr
);
2133 /* If this MEM uses a reg other than the one we expected,
2134 something is wrong. */
2135 if (XEXP (x
, 0) != reg
)
2141 fmt
= GET_RTX_FORMAT (code
);
2142 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2145 replace_call_address (XEXP (x
, i
), reg
, addr
);
2149 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2150 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2156 /* Return the number of memory refs to addresses that vary
2160 count_nonfixed_reads (x
)
2163 register enum rtx_code code
;
2171 code
= GET_CODE (x
);
2185 return ((invariant_p (XEXP (x
, 0)) != 1)
2186 + count_nonfixed_reads (XEXP (x
, 0)));
2190 fmt
= GET_RTX_FORMAT (code
);
2191 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2194 value
+= count_nonfixed_reads (XEXP (x
, i
));
2198 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2199 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2207 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2208 Replace it with an instruction to load just the low bytes
2209 if the machine supports such an instruction,
2210 and insert above LOOP_START an instruction to clear the register. */
2213 constant_high_bytes (p
, loop_start
)
2217 register int insn_code_number
;
2219 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2220 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2222 new = gen_rtx (SET
, VOIDmode
,
2223 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2224 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2225 SET_DEST (PATTERN (p
)),
2227 XEXP (SET_SRC (PATTERN (p
)), 0));
2228 insn_code_number
= recog (new, p
);
2230 if (insn_code_number
)
2234 /* Clear destination register before the loop. */
2235 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2236 SET_DEST (PATTERN (p
)),
2240 /* Inside the loop, just load the low part. */
2246 /* Scan a loop setting the variables `unknown_address_altered',
2247 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2248 and `loop_has_volatile'.
2249 Also, fill in the array `loop_store_mems'. */
2252 prescan_loop (start
, end
)
2255 register int level
= 1;
2258 unknown_address_altered
= 0;
2260 loop_has_volatile
= 0;
2261 loop_store_mems_idx
= 0;
2267 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2268 insn
= NEXT_INSN (insn
))
2270 if (GET_CODE (insn
) == NOTE
)
2272 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2275 /* Count number of loops contained in this one. */
2278 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2287 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2290 loop_continue
= insn
;
2293 else if (GET_CODE (insn
) == CALL_INSN
)
2295 if (! CONST_CALL_P (insn
))
2296 unknown_address_altered
= 1;
2301 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2303 if (volatile_refs_p (PATTERN (insn
)))
2304 loop_has_volatile
= 1;
2306 note_stores (PATTERN (insn
), note_addr_stored
);
2312 /* Scan the function looking for loops. Record the start and end of each loop.
2313 Also mark as invalid loops any loops that contain a setjmp or are branched
2314 to from outside the loop. */
2317 find_and_verify_loops (f
)
2321 int current_loop
= -1;
2325 /* If there are jumps to undefined labels,
2326 treat them as jumps out of any/all loops.
2327 This also avoids writing past end of tables when there are no loops. */
2328 uid_loop_num
[0] = -1;
2330 /* Find boundaries of loops, mark which loops are contained within
2331 loops, and invalidate loops that have setjmp. */
2333 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2335 if (GET_CODE (insn
) == NOTE
)
2336 switch (NOTE_LINE_NUMBER (insn
))
2338 case NOTE_INSN_LOOP_BEG
:
2339 loop_number_loop_starts
[++next_loop
] = insn
;
2340 loop_number_loop_ends
[next_loop
] = 0;
2341 loop_outer_loop
[next_loop
] = current_loop
;
2342 loop_invalid
[next_loop
] = 0;
2343 loop_number_exit_labels
[next_loop
] = 0;
2344 loop_number_exit_count
[next_loop
] = 0;
2345 current_loop
= next_loop
;
2348 case NOTE_INSN_SETJMP
:
2349 /* In this case, we must invalidate our current loop and any
2351 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2353 loop_invalid
[loop
] = 1;
2354 if (loop_dump_stream
)
2355 fprintf (loop_dump_stream
,
2356 "\nLoop at %d ignored due to setjmp.\n",
2357 INSN_UID (loop_number_loop_starts
[loop
]));
2361 case NOTE_INSN_LOOP_END
:
2362 if (current_loop
== -1)
2365 loop_number_loop_ends
[current_loop
] = insn
;
2366 current_loop
= loop_outer_loop
[current_loop
];
2371 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2372 enclosing loop, but this doesn't matter. */
2373 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2376 /* Any loop containing a label used in an initializer must be invalidated,
2377 because it can be jumped into from anywhere. */
2379 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2383 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2385 loop_num
= loop_outer_loop
[loop_num
])
2386 loop_invalid
[loop_num
] = 1;
2389 /* Any loop containing a label used for an exception handler must be
2390 invalidated, because it can be jumped into from anywhere. */
2392 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2396 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2398 loop_num
= loop_outer_loop
[loop_num
])
2399 loop_invalid
[loop_num
] = 1;
2402 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2403 loop that it is not contained within, that loop is marked invalid.
2404 If any INSN or CALL_INSN uses a label's address, then the loop containing
2405 that label is marked invalid, because it could be jumped into from
2408 Also look for blocks of code ending in an unconditional branch that
2409 exits the loop. If such a block is surrounded by a conditional
2410 branch around the block, move the block elsewhere (see below) and
2411 invert the jump to point to the code block. This may eliminate a
2412 label in our loop and will simplify processing by both us and a
2413 possible second cse pass. */
2415 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2416 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2418 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2420 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2422 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2427 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2429 loop_num
= loop_outer_loop
[loop_num
])
2430 loop_invalid
[loop_num
] = 1;
2434 if (GET_CODE (insn
) != JUMP_INSN
)
2437 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2439 /* See if this is an unconditional branch outside the loop. */
2440 if (this_loop_num
!= -1
2441 && (GET_CODE (PATTERN (insn
)) == RETURN
2442 || (simplejump_p (insn
)
2443 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2445 && get_max_uid () < max_uid_for_loop
)
2448 rtx our_next
= next_real_insn (insn
);
2450 int outer_loop
= -1;
2452 /* Go backwards until we reach the start of the loop, a label,
2454 for (p
= PREV_INSN (insn
);
2455 GET_CODE (p
) != CODE_LABEL
2456 && ! (GET_CODE (p
) == NOTE
2457 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2458 && GET_CODE (p
) != JUMP_INSN
;
2462 /* Check for the case where we have a jump to an inner nested
2463 loop, and do not perform the optimization in that case. */
2465 if (JUMP_LABEL (insn
))
2467 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2468 if (dest_loop
!= -1)
2470 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2471 outer_loop
= loop_outer_loop
[outer_loop
])
2472 if (outer_loop
== this_loop_num
)
2477 /* Make sure that the target of P is within the current loop. */
2479 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2480 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2481 outer_loop
= this_loop_num
;
2483 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2484 we have a block of code to try to move.
2486 We look backward and then forward from the target of INSN
2487 to find a BARRIER at the same loop depth as the target.
2488 If we find such a BARRIER, we make a new label for the start
2489 of the block, invert the jump in P and point it to that label,
2490 and move the block of code to the spot we found. */
2492 if (outer_loop
== -1
2493 && GET_CODE (p
) == JUMP_INSN
2494 && JUMP_LABEL (p
) != 0
2495 /* Just ignore jumps to labels that were never emitted.
2496 These always indicate compilation errors. */
2497 && INSN_UID (JUMP_LABEL (p
)) != 0
2499 && ! simplejump_p (p
)
2500 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2503 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2504 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2507 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2508 if (GET_CODE (loc
) == BARRIER
2509 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2513 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2514 if (GET_CODE (loc
) == BARRIER
2515 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2520 rtx cond_label
= JUMP_LABEL (p
);
2521 rtx new_label
= get_label_after (p
);
2523 /* Ensure our label doesn't go away. */
2524 LABEL_NUSES (cond_label
)++;
2526 /* Verify that uid_loop_num is large enough and that
2528 if (invert_jump (p
, new_label
))
2532 /* Include the BARRIER after INSN and copy the
2534 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2535 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2537 /* All those insns are now in TARGET_LOOP_NUM. */
2538 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2540 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2542 /* The label jumped to by INSN is no longer a loop exit.
2543 Unless INSN does not have a label (e.g., it is a
2544 RETURN insn), search loop_number_exit_labels to find
2545 its label_ref, and remove it. Also turn off
2546 LABEL_OUTSIDE_LOOP_P bit. */
2547 if (JUMP_LABEL (insn
))
2552 r
= loop_number_exit_labels
[this_loop_num
];
2553 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2554 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2556 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2558 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2560 loop_number_exit_labels
[this_loop_num
]
2561 = LABEL_NEXTREF (r
);
2565 for (loop_num
= this_loop_num
;
2566 loop_num
!= -1 && loop_num
!= target_loop_num
;
2567 loop_num
= loop_outer_loop
[loop_num
])
2568 loop_number_exit_count
[loop_num
]--;
2570 /* If we didn't find it, then something is wrong. */
2575 /* P is now a jump outside the loop, so it must be put
2576 in loop_number_exit_labels, and marked as such.
2577 The easiest way to do this is to just call
2578 mark_loop_jump again for P. */
2579 mark_loop_jump (PATTERN (p
), this_loop_num
);
2581 /* If INSN now jumps to the insn after it,
2583 if (JUMP_LABEL (insn
) != 0
2584 && (next_real_insn (JUMP_LABEL (insn
))
2585 == next_real_insn (insn
)))
2589 /* Continue the loop after where the conditional
2590 branch used to jump, since the only branch insn
2591 in the block (if it still remains) is an inter-loop
2592 branch and hence needs no processing. */
2593 insn
= NEXT_INSN (cond_label
);
2595 if (--LABEL_NUSES (cond_label
) == 0)
2596 delete_insn (cond_label
);
2598 /* This loop will be continued with NEXT_INSN (insn). */
2599 insn
= PREV_INSN (insn
);
2606 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2607 loops it is contained in, mark the target loop invalid.
2609 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2612 mark_loop_jump (x
, loop_num
)
2620 switch (GET_CODE (x
))
2633 /* There could be a label reference in here. */
2634 mark_loop_jump (XEXP (x
, 0), loop_num
);
2640 mark_loop_jump (XEXP (x
, 0), loop_num
);
2641 mark_loop_jump (XEXP (x
, 1), loop_num
);
2646 mark_loop_jump (XEXP (x
, 0), loop_num
);
2650 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2652 /* Link together all labels that branch outside the loop. This
2653 is used by final_[bg]iv_value and the loop unrolling code. Also
2654 mark this LABEL_REF so we know that this branch should predict
2657 /* A check to make sure the label is not in an inner nested loop,
2658 since this does not count as a loop exit. */
2659 if (dest_loop
!= -1)
2661 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2662 outer_loop
= loop_outer_loop
[outer_loop
])
2663 if (outer_loop
== loop_num
)
2669 if (loop_num
!= -1 && outer_loop
== -1)
2671 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2672 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2673 loop_number_exit_labels
[loop_num
] = x
;
2675 for (outer_loop
= loop_num
;
2676 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2677 outer_loop
= loop_outer_loop
[outer_loop
])
2678 loop_number_exit_count
[outer_loop
]++;
2681 /* If this is inside a loop, but not in the current loop or one enclosed
2682 by it, it invalidates at least one loop. */
2684 if (dest_loop
== -1)
2687 /* We must invalidate every nested loop containing the target of this
2688 label, except those that also contain the jump insn. */
2690 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2692 /* Stop when we reach a loop that also contains the jump insn. */
2693 for (outer_loop
= loop_num
; outer_loop
!= -1;
2694 outer_loop
= loop_outer_loop
[outer_loop
])
2695 if (dest_loop
== outer_loop
)
2698 /* If we get here, we know we need to invalidate a loop. */
2699 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2700 fprintf (loop_dump_stream
,
2701 "\nLoop at %d ignored due to multiple entry points.\n",
2702 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2704 loop_invalid
[dest_loop
] = 1;
2709 /* If this is not setting pc, ignore. */
2710 if (SET_DEST (x
) == pc_rtx
)
2711 mark_loop_jump (SET_SRC (x
), loop_num
);
2715 mark_loop_jump (XEXP (x
, 1), loop_num
);
2716 mark_loop_jump (XEXP (x
, 2), loop_num
);
2721 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2722 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2726 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2727 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2731 /* Treat anything else (such as a symbol_ref)
2732 as a branch out of this loop, but not into any loop. */
2737 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2738 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2741 loop_number_exit_labels
[loop_num
] = x
;
2743 for (outer_loop
= loop_num
; outer_loop
!= -1;
2744 outer_loop
= loop_outer_loop
[outer_loop
])
2745 loop_number_exit_count
[outer_loop
]++;
2751 /* Return nonzero if there is a label in the range from
2752 insn INSN to and including the insn whose luid is END
2753 INSN must have an assigned luid (i.e., it must not have
2754 been previously created by loop.c). */
2757 labels_in_range_p (insn
, end
)
2761 while (insn
&& INSN_LUID (insn
) <= end
)
2763 if (GET_CODE (insn
) == CODE_LABEL
)
2765 insn
= NEXT_INSN (insn
);
2771 /* Record that a memory reference X is being set. */
2774 note_addr_stored (x
)
2779 if (x
== 0 || GET_CODE (x
) != MEM
)
2782 /* Count number of memory writes.
2783 This affects heuristics in strength_reduce. */
2786 /* BLKmode MEM means all memory is clobbered. */
2787 if (GET_MODE (x
) == BLKmode
)
2788 unknown_address_altered
= 1;
2790 if (unknown_address_altered
)
2793 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2794 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2795 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2797 /* We are storing at the same address as previously noted. Save the
2799 if (GET_MODE_SIZE (GET_MODE (x
))
2800 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2801 loop_store_mems
[i
] = x
;
2805 if (i
== NUM_STORES
)
2806 unknown_address_altered
= 1;
2808 else if (i
== loop_store_mems_idx
)
2809 loop_store_mems
[loop_store_mems_idx
++] = x
;
2812 /* Return nonzero if the rtx X is invariant over the current loop.
2814 The value is 2 if we refer to something only conditionally invariant.
2816 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2817 Otherwise, a memory ref is invariant if it does not conflict with
2818 anything stored in `loop_store_mems'. */
2825 register enum rtx_code code
;
2827 int conditional
= 0;
2831 code
= GET_CODE (x
);
2841 /* A LABEL_REF is normally invariant, however, if we are unrolling
2842 loops, and this label is inside the loop, then it isn't invariant.
2843 This is because each unrolled copy of the loop body will have
2844 a copy of this label. If this was invariant, then an insn loading
2845 the address of this label into a register might get moved outside
2846 the loop, and then each loop body would end up using the same label.
2848 We don't know the loop bounds here though, so just fail for all
2850 if (flag_unroll_loops
)
2857 case UNSPEC_VOLATILE
:
2861 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2862 since the reg might be set by initialization within the loop. */
2864 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2865 || x
== arg_pointer_rtx
)
2866 && ! current_function_has_nonlocal_goto
)
2870 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2873 if (n_times_set
[REGNO (x
)] < 0)
2876 return n_times_set
[REGNO (x
)] == 0;
2879 /* Volatile memory references must be rejected. Do this before
2880 checking for read-only items, so that volatile read-only items
2881 will be rejected also. */
2882 if (MEM_VOLATILE_P (x
))
2885 /* Read-only items (such as constants in a constant pool) are
2886 invariant if their address is. */
2887 if (RTX_UNCHANGING_P (x
))
2890 /* If we filled the table (or had a subroutine call), any location
2891 in memory could have been clobbered. */
2892 if (unknown_address_altered
)
2895 /* See if there is any dependence between a store and this load. */
2896 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2897 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2900 /* It's not invalidated by a store in memory
2901 but we must still verify the address is invariant. */
2905 /* Don't mess with insns declared volatile. */
2906 if (MEM_VOLATILE_P (x
))
2910 fmt
= GET_RTX_FORMAT (code
);
2911 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2915 int tem
= invariant_p (XEXP (x
, i
));
2921 else if (fmt
[i
] == 'E')
2924 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2926 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2936 return 1 + conditional
;
2940 /* Return nonzero if all the insns in the loop that set REG
2941 are INSN and the immediately following insns,
2942 and if each of those insns sets REG in an invariant way
2943 (not counting uses of REG in them).
2945 The value is 2 if some of these insns are only conditionally invariant.
2947 We assume that INSN itself is the first set of REG
2948 and that its source is invariant. */
2951 consec_sets_invariant_p (reg
, n_sets
, insn
)
2955 register rtx p
= insn
;
2956 register int regno
= REGNO (reg
);
2958 /* Number of sets we have to insist on finding after INSN. */
2959 int count
= n_sets
- 1;
2960 int old
= n_times_set
[regno
];
2964 /* If N_SETS hit the limit, we can't rely on its value. */
2968 n_times_set
[regno
] = 0;
2972 register enum rtx_code code
;
2976 code
= GET_CODE (p
);
2978 /* If library call, skip to end of of it. */
2979 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2984 && (set
= single_set (p
))
2985 && GET_CODE (SET_DEST (set
)) == REG
2986 && REGNO (SET_DEST (set
)) == regno
)
2988 this = invariant_p (SET_SRC (set
));
2991 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2993 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2994 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2996 this = (CONSTANT_P (XEXP (temp
, 0))
2997 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
2998 && invariant_p (XEXP (temp
, 0))));
3005 else if (code
!= NOTE
)
3007 n_times_set
[regno
] = old
;
3012 n_times_set
[regno
] = old
;
3013 /* If invariant_p ever returned 2, we return 2. */
3014 return 1 + (value
& 2);
3018 /* I don't think this condition is sufficient to allow INSN
3019 to be moved, so we no longer test it. */
3021 /* Return 1 if all insns in the basic block of INSN and following INSN
3022 that set REG are invariant according to TABLE. */
3025 all_sets_invariant_p (reg
, insn
, table
)
3029 register rtx p
= insn
;
3030 register int regno
= REGNO (reg
);
3034 register enum rtx_code code
;
3036 code
= GET_CODE (p
);
3037 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3039 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3040 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3041 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3043 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3050 /* Look at all uses (not sets) of registers in X. For each, if it is
3051 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3052 a different insn, set USAGE[REGNO] to const0_rtx. */
3055 find_single_use_in_loop (insn
, x
, usage
)
3060 enum rtx_code code
= GET_CODE (x
);
3061 char *fmt
= GET_RTX_FORMAT (code
);
3066 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3067 ? const0_rtx
: insn
;
3069 else if (code
== SET
)
3071 /* Don't count SET_DEST if it is a REG; otherwise count things
3072 in SET_DEST because if a register is partially modified, it won't
3073 show up as a potential movable so we don't care how USAGE is set
3075 if (GET_CODE (SET_DEST (x
)) != REG
)
3076 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3077 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3080 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3082 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3083 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3084 else if (fmt
[i
] == 'E')
3085 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3086 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3090 /* Increment N_TIMES_SET at the index of each register
3091 that is modified by an insn between FROM and TO.
3092 If the value of an element of N_TIMES_SET becomes 127 or more,
3093 stop incrementing it, to avoid overflow.
3095 Store in SINGLE_USAGE[I] the single insn in which register I is
3096 used, if it is only used once. Otherwise, it is set to 0 (for no
3097 uses) or const0_rtx for more than one use. This parameter may be zero,
3098 in which case this processing is not done.
3100 Store in *COUNT_PTR the number of actual instruction
3101 in the loop. We use this to decide what is worth moving out. */
3103 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3104 In that case, it is the insn that last set reg n. */
3107 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3108 register rtx from
, to
;
3114 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3116 register int count
= 0;
3119 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3120 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3122 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3126 /* If requested, record registers that have exactly one use. */
3129 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3131 /* Include uses in REG_EQUAL notes. */
3132 if (REG_NOTES (insn
))
3133 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3136 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3137 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3138 /* Don't move a reg that has an explicit clobber.
3139 We might do so sometimes, but it's not worth the pain. */
3140 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3142 if (GET_CODE (PATTERN (insn
)) == SET
3143 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3145 dest
= SET_DEST (PATTERN (insn
));
3146 while (GET_CODE (dest
) == SUBREG
3147 || GET_CODE (dest
) == ZERO_EXTRACT
3148 || GET_CODE (dest
) == SIGN_EXTRACT
3149 || GET_CODE (dest
) == STRICT_LOW_PART
)
3150 dest
= XEXP (dest
, 0);
3151 if (GET_CODE (dest
) == REG
)
3153 register int regno
= REGNO (dest
);
3154 /* If this is the first setting of this reg
3155 in current basic block, and it was set before,
3156 it must be set in two basic blocks, so it cannot
3157 be moved out of the loop. */
3158 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3159 may_not_move
[regno
] = 1;
3160 /* If this is not first setting in current basic block,
3161 see if reg was used in between previous one and this.
3162 If so, neither one can be moved. */
3163 if (last_set
[regno
] != 0
3164 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3165 may_not_move
[regno
] = 1;
3166 if (n_times_set
[regno
] < 127)
3167 ++n_times_set
[regno
];
3168 last_set
[regno
] = insn
;
3171 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3174 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3176 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3177 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3178 /* Don't move a reg that has an explicit clobber.
3179 It's not worth the pain to try to do it correctly. */
3180 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3182 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3184 dest
= SET_DEST (x
);
3185 while (GET_CODE (dest
) == SUBREG
3186 || GET_CODE (dest
) == ZERO_EXTRACT
3187 || GET_CODE (dest
) == SIGN_EXTRACT
3188 || GET_CODE (dest
) == STRICT_LOW_PART
)
3189 dest
= XEXP (dest
, 0);
3190 if (GET_CODE (dest
) == REG
)
3192 register int regno
= REGNO (dest
);
3193 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3194 may_not_move
[regno
] = 1;
3195 if (last_set
[regno
] != 0
3196 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3197 may_not_move
[regno
] = 1;
3198 if (n_times_set
[regno
] < 127)
3199 ++n_times_set
[regno
];
3200 last_set
[regno
] = insn
;
3207 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3208 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3213 /* Given a loop that is bounded by LOOP_START and LOOP_END
3214 and that is entered at SCAN_START,
3215 return 1 if the register set in SET contained in insn INSN is used by
3216 any insn that precedes INSN in cyclic order starting
3217 from the loop entry point.
3219 We don't want to use INSN_LUID here because if we restrict INSN to those
3220 that have a valid INSN_LUID, it means we cannot move an invariant out
3221 from an inner loop past two loops. */
3224 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3225 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3227 rtx reg
= SET_DEST (set
);
3230 /* Scan forward checking for register usage. If we hit INSN, we
3231 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3232 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3234 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3235 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3245 /* A "basic induction variable" or biv is a pseudo reg that is set
3246 (within this loop) only by incrementing or decrementing it. */
3247 /* A "general induction variable" or giv is a pseudo reg whose
3248 value is a linear function of a biv. */
3250 /* Bivs are recognized by `basic_induction_var';
3251 Givs by `general_induct_var'. */
3253 /* Indexed by register number, indicates whether or not register is an
3254 induction variable, and if so what type. */
3256 enum iv_mode
*reg_iv_type
;
3258 /* Indexed by register number, contains pointer to `struct induction'
3259 if register is an induction variable. This holds general info for
3260 all induction variables. */
3262 struct induction
**reg_iv_info
;
3264 /* Indexed by register number, contains pointer to `struct iv_class'
3265 if register is a basic induction variable. This holds info describing
3266 the class (a related group) of induction variables that the biv belongs
3269 struct iv_class
**reg_biv_class
;
3271 /* The head of a list which links together (via the next field)
3272 every iv class for the current loop. */
3274 struct iv_class
*loop_iv_list
;
3276 /* Communication with routines called via `note_stores'. */
3278 static rtx note_insn
;
3280 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3282 static rtx addr_placeholder
;
3284 /* ??? Unfinished optimizations, and possible future optimizations,
3285 for the strength reduction code. */
3287 /* ??? There is one more optimization you might be interested in doing: to
3288 allocate pseudo registers for frequently-accessed memory locations.
3289 If the same memory location is referenced each time around, it might
3290 be possible to copy it into a register before and out after.
3291 This is especially useful when the memory location is a variable which
3292 is in a stack slot because somewhere its address is taken. If the
3293 loop doesn't contain a function call and the variable isn't volatile,
3294 it is safe to keep the value in a register for the duration of the
3295 loop. One tricky thing is that the copying of the value back from the
3296 register has to be done on all exits from the loop. You need to check that
3297 all the exits from the loop go to the same place. */
3299 /* ??? The interaction of biv elimination, and recognition of 'constant'
3300 bivs, may cause problems. */
3302 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3303 performance problems.
3305 Perhaps don't eliminate things that can be combined with an addressing
3306 mode. Find all givs that have the same biv, mult_val, and add_val;
3307 then for each giv, check to see if its only use dies in a following
3308 memory address. If so, generate a new memory address and check to see
3309 if it is valid. If it is valid, then store the modified memory address,
3310 otherwise, mark the giv as not done so that it will get its own iv. */
3312 /* ??? Could try to optimize branches when it is known that a biv is always
3315 /* ??? When replace a biv in a compare insn, we should replace with closest
3316 giv so that an optimized branch can still be recognized by the combiner,
3317 e.g. the VAX acb insn. */
3319 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3320 was rerun in loop_optimize whenever a register was added or moved.
3321 Also, some of the optimizations could be a little less conservative. */
3323 /* Perform strength reduction and induction variable elimination. */
3325 /* Pseudo registers created during this function will be beyond the last
3326 valid index in several tables including n_times_set and regno_last_uid.
3327 This does not cause a problem here, because the added registers cannot be
3328 givs outside of their loop, and hence will never be reconsidered.
3329 But scan_loop must check regnos to make sure they are in bounds. */
3332 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3333 loop_start
, loop_end
)
3346 /* This is 1 if current insn is not executed at least once for every loop
3348 int not_every_iteration
= 0;
3349 /* This is 1 if current insn may be executed more than once for every
3351 int maybe_multiple
= 0;
3352 /* Temporary list pointers for traversing loop_iv_list. */
3353 struct iv_class
*bl
, **backbl
;
3354 /* Ratio of extra register life span we can justify
3355 for saving an instruction. More if loop doesn't call subroutines
3356 since in that case saving an insn makes more difference
3357 and more registers are available. */
3358 /* ??? could set this to last value of threshold in move_movables */
3359 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3360 /* Map of pseudo-register replacements. */
3364 rtx end_insert_before
;
3367 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3368 * sizeof (enum iv_mode
*));
3369 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3370 reg_iv_info
= (struct induction
**)
3371 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3372 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3373 * sizeof (struct induction
*)));
3374 reg_biv_class
= (struct iv_class
**)
3375 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3376 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3377 * sizeof (struct iv_class
*)));
3380 addr_placeholder
= gen_reg_rtx (Pmode
);
3382 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3383 must be put before this insn, so that they will appear in the right
3384 order (i.e. loop order).
3386 If loop_end is the end of the current function, then emit a
3387 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3389 if (NEXT_INSN (loop_end
) != 0)
3390 end_insert_before
= NEXT_INSN (loop_end
);
3392 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3394 /* Scan through loop to find all possible bivs. */
3400 /* At end of a straight-in loop, we are done.
3401 At end of a loop entered at the bottom, scan the top. */
3402 if (p
== scan_start
)
3410 if (p
== scan_start
)
3414 if (GET_CODE (p
) == INSN
3415 && (set
= single_set (p
))
3416 && GET_CODE (SET_DEST (set
)) == REG
)
3418 dest_reg
= SET_DEST (set
);
3419 if (REGNO (dest_reg
) < max_reg_before_loop
3420 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3421 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3423 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3424 dest_reg
, p
, &inc_val
, &mult_val
))
3426 /* It is a possible basic induction variable.
3427 Create and initialize an induction structure for it. */
3430 = (struct induction
*) alloca (sizeof (struct induction
));
3432 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3433 not_every_iteration
, maybe_multiple
);
3434 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3436 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3437 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3441 /* Past CODE_LABEL, we get to insns that may be executed multiple
3442 times. The only way we can be sure that they can't is if every
3443 every jump insn between here and the end of the loop either
3444 returns, exits the loop, is a forward jump, or is a jump
3445 to the loop start. */
3447 if (GET_CODE (p
) == CODE_LABEL
)
3455 insn
= NEXT_INSN (insn
);
3456 if (insn
== scan_start
)
3464 if (insn
== scan_start
)
3468 if (GET_CODE (insn
) == JUMP_INSN
3469 && GET_CODE (PATTERN (insn
)) != RETURN
3470 && (! condjump_p (insn
)
3471 || (JUMP_LABEL (insn
) != 0
3472 && JUMP_LABEL (insn
) != scan_start
3473 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3474 || INSN_UID (insn
) >= max_uid_for_loop
3475 || (INSN_LUID (JUMP_LABEL (insn
))
3476 < INSN_LUID (insn
))))))
3484 /* Past a jump, we get to insns for which we can't count
3485 on whether they will be executed during each iteration. */
3486 /* This code appears twice in strength_reduce. There is also similar
3487 code in scan_loop. */
3488 if (GET_CODE (p
) == JUMP_INSN
3489 /* If we enter the loop in the middle, and scan around to the
3490 beginning, don't set not_every_iteration for that.
3491 This can be any kind of jump, since we want to know if insns
3492 will be executed if the loop is executed. */
3493 && ! (JUMP_LABEL (p
) == loop_top
3494 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3495 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3499 /* If this is a jump outside the loop, then it also doesn't
3500 matter. Check to see if the target of this branch is on the
3501 loop_number_exits_labels list. */
3503 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3505 label
= LABEL_NEXTREF (label
))
3506 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3510 not_every_iteration
= 1;
3513 else if (GET_CODE (p
) == NOTE
)
3515 /* At the virtual top of a converted loop, insns are again known to
3516 be executed each iteration: logically, the loop begins here
3517 even though the exit code has been duplicated. */
3518 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3519 not_every_iteration
= 0;
3520 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3522 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3526 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3527 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3528 or not an insn is known to be executed each iteration of the
3529 loop, whether or not any iterations are known to occur.
3531 Therefore, if we have just passed a label and have no more labels
3532 between here and the test insn of the loop, we know these insns
3533 will be executed each iteration. */
3535 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3536 && no_labels_between_p (p
, loop_end
))
3537 not_every_iteration
= 0;
3540 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3541 Make a sanity check against n_times_set. */
3542 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3544 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3545 /* Above happens if register modified by subreg, etc. */
3546 /* Make sure it is not recognized as a basic induction var: */
3547 || n_times_set
[bl
->regno
] != bl
->biv_count
3548 /* If never incremented, it is invariant that we decided not to
3549 move. So leave it alone. */
3550 || ! bl
->incremented
)
3552 if (loop_dump_stream
)
3553 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3555 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3556 ? "not induction variable"
3557 : (! bl
->incremented
? "never incremented"
3560 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3567 if (loop_dump_stream
)
3568 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3572 /* Exit if there are no bivs. */
3575 /* Can still unroll the loop anyways, but indicate that there is no
3576 strength reduction info available. */
3577 if (flag_unroll_loops
)
3578 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3583 /* Find initial value for each biv by searching backwards from loop_start,
3584 halting at first label. Also record any test condition. */
3587 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3591 if (GET_CODE (p
) == CALL_INSN
)
3594 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3595 || GET_CODE (p
) == CALL_INSN
)
3596 note_stores (PATTERN (p
), record_initial
);
3598 /* Record any test of a biv that branches around the loop if no store
3599 between it and the start of loop. We only care about tests with
3600 constants and registers and only certain of those. */
3601 if (GET_CODE (p
) == JUMP_INSN
3602 && JUMP_LABEL (p
) != 0
3603 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3604 && (test
= get_condition_for_loop (p
)) != 0
3605 && GET_CODE (XEXP (test
, 0)) == REG
3606 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3607 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3608 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3609 && bl
->init_insn
== 0)
3611 /* If an NE test, we have an initial value! */
3612 if (GET_CODE (test
) == NE
)
3615 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3616 XEXP (test
, 0), XEXP (test
, 1));
3619 bl
->initial_test
= test
;
3623 /* Look at the each biv and see if we can say anything better about its
3624 initial value from any initializing insns set up above. (This is done
3625 in two passes to avoid missing SETs in a PARALLEL.) */
3626 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3630 if (! bl
->init_insn
)
3633 src
= SET_SRC (bl
->init_set
);
3635 if (loop_dump_stream
)
3636 fprintf (loop_dump_stream
,
3637 "Biv %d initialized at insn %d: initial value ",
3638 bl
->regno
, INSN_UID (bl
->init_insn
));
3640 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3641 || GET_MODE (src
) == VOIDmode
)
3642 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3644 bl
->initial_value
= src
;
3646 if (loop_dump_stream
)
3648 if (GET_CODE (src
) == CONST_INT
)
3649 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3652 print_rtl (loop_dump_stream
, src
);
3653 fprintf (loop_dump_stream
, "\n");
3659 /* Biv initial value is not simple move,
3660 so let it keep initial value of "itself". */
3662 if (loop_dump_stream
)
3663 fprintf (loop_dump_stream
, "is complex\n");
3667 /* Search the loop for general induction variables. */
3669 /* A register is a giv if: it is only set once, it is a function of a
3670 biv and a constant (or invariant), and it is not a biv. */
3672 not_every_iteration
= 0;
3678 /* At end of a straight-in loop, we are done.
3679 At end of a loop entered at the bottom, scan the top. */
3680 if (p
== scan_start
)
3688 if (p
== scan_start
)
3692 /* Look for a general induction variable in a register. */
3693 if (GET_CODE (p
) == INSN
3694 && (set
= single_set (p
))
3695 && GET_CODE (SET_DEST (set
)) == REG
3696 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3704 dest_reg
= SET_DEST (set
);
3705 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3708 if (/* SET_SRC is a giv. */
3709 ((benefit
= general_induction_var (SET_SRC (set
),
3712 /* Equivalent expression is a giv. */
3713 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3714 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3716 &add_val
, &mult_val
))))
3717 /* Don't try to handle any regs made by loop optimization.
3718 We have nothing on them in regno_first_uid, etc. */
3719 && REGNO (dest_reg
) < max_reg_before_loop
3720 /* Don't recognize a BASIC_INDUCT_VAR here. */
3721 && dest_reg
!= src_reg
3722 /* This must be the only place where the register is set. */
3723 && (n_times_set
[REGNO (dest_reg
)] == 1
3724 /* or all sets must be consecutive and make a giv. */
3725 || (benefit
= consec_sets_giv (benefit
, p
,
3727 &add_val
, &mult_val
))))
3731 = (struct induction
*) alloca (sizeof (struct induction
));
3734 /* If this is a library call, increase benefit. */
3735 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3736 benefit
+= libcall_benefit (p
);
3738 /* Skip the consecutive insns, if there are any. */
3739 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3742 /* If first insn of libcall sequence, skip to end.
3743 Do this at start of loop, since INSN is guaranteed to
3745 if (GET_CODE (p
) != NOTE
3746 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3749 do p
= NEXT_INSN (p
);
3750 while (GET_CODE (p
) == NOTE
);
3753 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3754 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3760 #ifndef DONT_REDUCE_ADDR
3761 /* Look for givs which are memory addresses. */
3762 /* This resulted in worse code on a VAX 8600. I wonder if it
3764 if (GET_CODE (p
) == INSN
)
3765 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3769 /* Update the status of whether giv can derive other givs. This can
3770 change when we pass a label or an insn that updates a biv. */
3771 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3772 || GET_CODE (p
) == CODE_LABEL
)
3773 update_giv_derive (p
);
3775 /* Past a jump, we get to insns for which we can't count
3776 on whether they will be executed during each iteration. */
3777 /* This code appears twice in strength_reduce. There is also similar
3778 code in scan_loop. */
3779 if (GET_CODE (p
) == JUMP_INSN
3780 /* If we enter the loop in the middle, and scan around to the
3781 beginning, don't set not_every_iteration for that.
3782 This can be any kind of jump, since we want to know if insns
3783 will be executed if the loop is executed. */
3784 && ! (JUMP_LABEL (p
) == loop_top
3785 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3786 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3790 /* If this is a jump outside the loop, then it also doesn't
3791 matter. Check to see if the target of this branch is on the
3792 loop_number_exits_labels list. */
3794 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3796 label
= LABEL_NEXTREF (label
))
3797 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3801 not_every_iteration
= 1;
3804 else if (GET_CODE (p
) == NOTE
)
3806 /* At the virtual top of a converted loop, insns are again known to
3807 be executed each iteration: logically, the loop begins here
3808 even though the exit code has been duplicated. */
3809 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3810 not_every_iteration
= 0;
3811 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3813 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3817 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3818 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3819 or not an insn is known to be executed each iteration of the
3820 loop, whether or not any iterations are known to occur.
3822 Therefore, if we have just passed a label and have no more labels
3823 between here and the test insn of the loop, we know these insns
3824 will be executed each iteration. */
3826 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3827 && no_labels_between_p (p
, loop_end
))
3828 not_every_iteration
= 0;
3831 /* Try to calculate and save the number of loop iterations. This is
3832 set to zero if the actual number can not be calculated. This must
3833 be called after all giv's have been identified, since otherwise it may
3834 fail if the iteration variable is a giv. */
3836 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3838 /* Now for each giv for which we still don't know whether or not it is
3839 replaceable, check to see if it is replaceable because its final value
3840 can be calculated. This must be done after loop_iterations is called,
3841 so that final_giv_value will work correctly. */
3843 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3845 struct induction
*v
;
3847 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3848 if (! v
->replaceable
&& ! v
->not_replaceable
)
3849 check_final_value (v
, loop_start
, loop_end
);
3852 /* Try to prove that the loop counter variable (if any) is always
3853 nonnegative; if so, record that fact with a REG_NONNEG note
3854 so that "decrement and branch until zero" insn can be used. */
3855 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3858 /* record loop-variables relevant for BCT optimization before unrolling
3859 the loop. Unrolling may update part of this information, and the
3860 correct data will be used for generating the BCT. */
3861 #ifdef HAVE_decrement_and_branch_on_count
3862 if (HAVE_decrement_and_branch_on_count
)
3863 analyze_loop_iterations (loop_start
, loop_end
);
3867 /* Create reg_map to hold substitutions for replaceable giv regs. */
3868 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3869 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3871 /* Examine each iv class for feasibility of strength reduction/induction
3872 variable elimination. */
3874 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3876 struct induction
*v
;
3879 rtx final_value
= 0;
3881 /* Test whether it will be possible to eliminate this biv
3882 provided all givs are reduced. This is possible if either
3883 the reg is not used outside the loop, or we can compute
3884 what its final value will be.
3886 For architectures with a decrement_and_branch_until_zero insn,
3887 don't do this if we put a REG_NONNEG note on the endtest for
3890 /* Compare against bl->init_insn rather than loop_start.
3891 We aren't concerned with any uses of the biv between
3892 init_insn and loop_start since these won't be affected
3893 by the value of the biv elsewhere in the function, so
3894 long as init_insn doesn't use the biv itself.
3895 March 14, 1989 -- self@bayes.arc.nasa.gov */
3897 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3899 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3900 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3901 #ifdef HAVE_decrement_and_branch_until_zero
3904 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3905 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3906 #ifdef HAVE_decrement_and_branch_until_zero
3910 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3911 threshold
, insn_count
);
3914 if (loop_dump_stream
)
3916 fprintf (loop_dump_stream
,
3917 "Cannot eliminate biv %d.\n",
3919 fprintf (loop_dump_stream
,
3920 "First use: insn %d, last use: insn %d.\n",
3921 REGNO_FIRST_UID (bl
->regno
),
3922 REGNO_LAST_UID (bl
->regno
));
3926 /* Combine all giv's for this iv_class. */
3929 /* This will be true at the end, if all givs which depend on this
3930 biv have been strength reduced.
3931 We can't (currently) eliminate the biv unless this is so. */
3934 /* Check each giv in this class to see if we will benefit by reducing
3935 it. Skip giv's combined with others. */
3936 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3938 struct induction
*tv
;
3940 if (v
->ignore
|| v
->same
)
3943 benefit
= v
->benefit
;
3945 /* Reduce benefit if not replaceable, since we will insert
3946 a move-insn to replace the insn that calculates this giv.
3947 Don't do this unless the giv is a user variable, since it
3948 will often be marked non-replaceable because of the duplication
3949 of the exit code outside the loop. In such a case, the copies
3950 we insert are dead and will be deleted. So they don't have
3951 a cost. Similar situations exist. */
3952 /* ??? The new final_[bg]iv_value code does a much better job
3953 of finding replaceable giv's, and hence this code may no longer
3955 if (! v
->replaceable
&& ! bl
->eliminable
3956 && REG_USERVAR_P (v
->dest_reg
))
3957 benefit
-= copy_cost
;
3959 /* Decrease the benefit to count the add-insns that we will
3960 insert to increment the reduced reg for the giv. */
3961 benefit
-= add_cost
* bl
->biv_count
;
3963 /* Decide whether to strength-reduce this giv or to leave the code
3964 unchanged (recompute it from the biv each time it is used).
3965 This decision can be made independently for each giv. */
3968 /* Attempt to guess whether autoincrement will handle some of the
3969 new add insns; if so, increase BENEFIT (undo the subtraction of
3970 add_cost that was done above). */
3971 if (v
->giv_type
== DEST_ADDR
3972 && GET_CODE (v
->mult_val
) == CONST_INT
)
3974 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3975 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3976 benefit
+= add_cost
* bl
->biv_count
;
3978 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3979 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3980 benefit
+= add_cost
* bl
->biv_count
;
3985 /* If an insn is not to be strength reduced, then set its ignore
3986 flag, and clear all_reduced. */
3988 /* A giv that depends on a reversed biv must be reduced if it is
3989 used after the loop exit, otherwise, it would have the wrong
3990 value after the loop exit. To make it simple, just reduce all
3991 of such giv's whether or not we know they are used after the loop
3994 if (v
->lifetime
* threshold
* benefit
< insn_count
3997 if (loop_dump_stream
)
3998 fprintf (loop_dump_stream
,
3999 "giv of insn %d not worth while, %d vs %d.\n",
4001 v
->lifetime
* threshold
* benefit
, insn_count
);
4007 /* Check that we can increment the reduced giv without a
4008 multiply insn. If not, reject it. */
4010 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4011 if (tv
->mult_val
== const1_rtx
4012 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4014 if (loop_dump_stream
)
4015 fprintf (loop_dump_stream
,
4016 "giv of insn %d: would need a multiply.\n",
4017 INSN_UID (v
->insn
));
4025 /* Reduce each giv that we decided to reduce. */
4027 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4029 struct induction
*tv
;
4030 if (! v
->ignore
&& v
->same
== 0)
4032 int auto_inc_opt
= 0;
4034 v
->new_reg
= gen_reg_rtx (v
->mode
);
4037 /* If the target has auto-increment addressing modes, and
4038 this is an address giv, then try to put the increment
4039 immediately after its use, so that flow can create an
4040 auto-increment addressing mode. */
4041 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4042 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4043 /* We don't handle reversed biv's because bl->biv->insn
4044 does not have a valid INSN_LUID. */
4046 && v
->always_executed
&& ! v
->maybe_multiple
)
4048 /* If other giv's have been combined with this one, then
4049 this will work only if all uses of the other giv's occur
4050 before this giv's insn. This is difficult to check.
4052 We simplify this by looking for the common case where
4053 there is one DEST_REG giv, and this giv's insn is the
4054 last use of the dest_reg of that DEST_REG giv. If the
4055 the increment occurs after the address giv, then we can
4056 perform the optimization. (Otherwise, the increment
4057 would have to go before other_giv, and we would not be
4058 able to combine it with the address giv to get an
4059 auto-inc address.) */
4060 if (v
->combined_with
)
4062 struct induction
*other_giv
= 0;
4064 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4072 if (! tv
&& other_giv
4073 && REGNO (other_giv
->dest_reg
) <= max_reg_before_loop
4074 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4075 == INSN_UID (v
->insn
))
4076 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4079 /* Check for case where increment is before the the address
4081 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
4090 /* We can't put an insn immediately after one setting
4091 cc0, or immediately before one using cc0. */
4092 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4093 || (auto_inc_opt
== -1
4094 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4095 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4096 && sets_cc0_p (PATTERN (prev
))))
4102 v
->auto_inc_opt
= 1;
4106 /* For each place where the biv is incremented, add an insn
4107 to increment the new, reduced reg for the giv. */
4108 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4113 insert_before
= tv
->insn
;
4114 else if (auto_inc_opt
== 1)
4115 insert_before
= NEXT_INSN (v
->insn
);
4117 insert_before
= v
->insn
;
4119 if (tv
->mult_val
== const1_rtx
)
4120 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4121 v
->new_reg
, v
->new_reg
, insert_before
);
4122 else /* tv->mult_val == const0_rtx */
4123 /* A multiply is acceptable here
4124 since this is presumed to be seldom executed. */
4125 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4126 v
->add_val
, v
->new_reg
, insert_before
);
4129 /* Add code at loop start to initialize giv's reduced reg. */
4131 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4132 v
->add_val
, v
->new_reg
, loop_start
);
4136 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4139 For each giv register that can be reduced now: if replaceable,
4140 substitute reduced reg wherever the old giv occurs;
4141 else add new move insn "giv_reg = reduced_reg".
4143 Also check for givs whose first use is their definition and whose
4144 last use is the definition of another giv. If so, it is likely
4145 dead and should not be used to eliminate a biv. */
4146 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4148 if (v
->same
&& v
->same
->ignore
)
4154 if (v
->giv_type
== DEST_REG
4155 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4157 struct induction
*v1
;
4159 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4160 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4164 /* Update expression if this was combined, in case other giv was
4167 v
->new_reg
= replace_rtx (v
->new_reg
,
4168 v
->same
->dest_reg
, v
->same
->new_reg
);
4170 if (v
->giv_type
== DEST_ADDR
)
4171 /* Store reduced reg as the address in the memref where we found
4173 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4174 else if (v
->replaceable
)
4176 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4179 /* I can no longer duplicate the original problem. Perhaps
4180 this is unnecessary now? */
4182 /* Replaceable; it isn't strictly necessary to delete the old
4183 insn and emit a new one, because v->dest_reg is now dead.
4185 However, especially when unrolling loops, the special
4186 handling for (set REG0 REG1) in the second cse pass may
4187 make v->dest_reg live again. To avoid this problem, emit
4188 an insn to set the original giv reg from the reduced giv.
4189 We can not delete the original insn, since it may be part
4190 of a LIBCALL, and the code in flow that eliminates dead
4191 libcalls will fail if it is deleted. */
4192 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4198 /* Not replaceable; emit an insn to set the original giv reg from
4199 the reduced giv, same as above. */
4200 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4204 /* When a loop is reversed, givs which depend on the reversed
4205 biv, and which are live outside the loop, must be set to their
4206 correct final value. This insn is only needed if the giv is
4207 not replaceable. The correct final value is the same as the
4208 value that the giv starts the reversed loop with. */
4209 if (bl
->reversed
&& ! v
->replaceable
)
4210 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4211 v
->add_val
, v
->dest_reg
, end_insert_before
);
4212 else if (v
->final_value
)
4216 /* If the loop has multiple exits, emit the insn before the
4217 loop to ensure that it will always be executed no matter
4218 how the loop exits. Otherwise, emit the insn after the loop,
4219 since this is slightly more efficient. */
4220 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4221 insert_before
= loop_start
;
4223 insert_before
= end_insert_before
;
4224 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4228 /* If the insn to set the final value of the giv was emitted
4229 before the loop, then we must delete the insn inside the loop
4230 that sets it. If this is a LIBCALL, then we must delete
4231 every insn in the libcall. Note, however, that
4232 final_giv_value will only succeed when there are multiple
4233 exits if the giv is dead at each exit, hence it does not
4234 matter that the original insn remains because it is dead
4236 /* Delete the insn inside the loop that sets the giv since
4237 the giv is now set before (or after) the loop. */
4238 delete_insn (v
->insn
);
4242 if (loop_dump_stream
)
4244 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4245 INSN_UID (v
->insn
));
4246 print_rtl (loop_dump_stream
, v
->new_reg
);
4247 fprintf (loop_dump_stream
, "\n");
4251 /* All the givs based on the biv bl have been reduced if they
4254 /* For each giv not marked as maybe dead that has been combined with a
4255 second giv, clear any "maybe dead" mark on that second giv.
4256 v->new_reg will either be or refer to the register of the giv it
4259 Doing this clearing avoids problems in biv elimination where a
4260 giv's new_reg is a complex value that can't be put in the insn but
4261 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4262 Since the register will be used in either case, we'd prefer it be
4263 used from the simpler giv. */
4265 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4266 if (! v
->maybe_dead
&& v
->same
)
4267 v
->same
->maybe_dead
= 0;
4269 /* Try to eliminate the biv, if it is a candidate.
4270 This won't work if ! all_reduced,
4271 since the givs we planned to use might not have been reduced.
4273 We have to be careful that we didn't initially think we could eliminate
4274 this biv because of a giv that we now think may be dead and shouldn't
4275 be used as a biv replacement.
4277 Also, there is the possibility that we may have a giv that looks
4278 like it can be used to eliminate a biv, but the resulting insn
4279 isn't valid. This can happen, for example, on the 88k, where a
4280 JUMP_INSN can compare a register only with zero. Attempts to
4281 replace it with a compare with a constant will fail.
4283 Note that in cases where this call fails, we may have replaced some
4284 of the occurrences of the biv with a giv, but no harm was done in
4285 doing so in the rare cases where it can occur. */
4287 if (all_reduced
== 1 && bl
->eliminable
4288 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4289 threshold
, insn_count
))
4292 /* ?? If we created a new test to bypass the loop entirely,
4293 or otherwise drop straight in, based on this test, then
4294 we might want to rewrite it also. This way some later
4295 pass has more hope of removing the initialization of this
4298 /* If final_value != 0, then the biv may be used after loop end
4299 and we must emit an insn to set it just in case.
4301 Reversed bivs already have an insn after the loop setting their
4302 value, so we don't need another one. We can't calculate the
4303 proper final value for such a biv here anyways. */
4304 if (final_value
!= 0 && ! bl
->reversed
)
4308 /* If the loop has multiple exits, emit the insn before the
4309 loop to ensure that it will always be executed no matter
4310 how the loop exits. Otherwise, emit the insn after the
4311 loop, since this is slightly more efficient. */
4312 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4313 insert_before
= loop_start
;
4315 insert_before
= end_insert_before
;
4317 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4322 /* Delete all of the instructions inside the loop which set
4323 the biv, as they are all dead. If is safe to delete them,
4324 because an insn setting a biv will never be part of a libcall. */
4325 /* However, deleting them will invalidate the regno_last_uid info,
4326 so keeping them around is more convenient. Final_biv_value
4327 will only succeed when there are multiple exits if the biv
4328 is dead at each exit, hence it does not matter that the original
4329 insn remains, because it is dead anyways. */
4330 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4331 delete_insn (v
->insn
);
4334 if (loop_dump_stream
)
4335 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4340 /* Go through all the instructions in the loop, making all the
4341 register substitutions scheduled in REG_MAP. */
4343 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4344 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4345 || GET_CODE (p
) == CALL_INSN
)
4347 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4348 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4352 /* Unroll loops from within strength reduction so that we can use the
4353 induction variable information that strength_reduce has already
4356 if (flag_unroll_loops
)
4357 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4360 /* instrument the loop with bct insn */
4361 #ifdef HAVE_decrement_and_branch_on_count
4362 if (HAVE_decrement_and_branch_on_count
)
4363 insert_bct (loop_start
, loop_end
);
4367 if (loop_dump_stream
)
4368 fprintf (loop_dump_stream
, "\n");
4371 /* Return 1 if X is a valid source for an initial value (or as value being
4372 compared against in an initial test).
4374 X must be either a register or constant and must not be clobbered between
4375 the current insn and the start of the loop.
4377 INSN is the insn containing X. */
4380 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4389 /* Only consider pseudos we know about initialized in insns whose luids
4391 if (GET_CODE (x
) != REG
4392 || REGNO (x
) >= max_reg_before_loop
)
4395 /* Don't use call-clobbered registers across a call which clobbers it. On
4396 some machines, don't use any hard registers at all. */
4397 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4399 #ifdef SMALL_REGISTER_CLASSES
4400 SMALL_REGISTER_CLASSES
4404 || (call_used_regs
[REGNO (x
)] && call_seen
))
4408 /* Don't use registers that have been clobbered before the start of the
4410 if (reg_set_between_p (x
, insn
, loop_start
))
4416 /* Scan X for memory refs and check each memory address
4417 as a possible giv. INSN is the insn whose pattern X comes from.
4418 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4419 every loop iteration. */
4422 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4425 int not_every_iteration
;
4426 rtx loop_start
, loop_end
;
4429 register enum rtx_code code
;
4435 code
= GET_CODE (x
);
4459 benefit
= general_induction_var (XEXP (x
, 0),
4460 &src_reg
, &add_val
, &mult_val
);
4462 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4463 Such a giv isn't useful. */
4464 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4466 /* Found one; record it. */
4468 = (struct induction
*) oballoc (sizeof (struct induction
));
4470 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4471 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4472 &XEXP (x
, 0), loop_start
, loop_end
);
4474 v
->mem_mode
= GET_MODE (x
);
4480 /* Recursively scan the subexpressions for other mem refs. */
4482 fmt
= GET_RTX_FORMAT (code
);
4483 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4485 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4487 else if (fmt
[i
] == 'E')
4488 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4489 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4490 loop_start
, loop_end
);
4493 /* Fill in the data about one biv update.
4494 V is the `struct induction' in which we record the biv. (It is
4495 allocated by the caller, with alloca.)
4496 INSN is the insn that sets it.
4497 DEST_REG is the biv's reg.
4499 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4500 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4501 being set to INC_VAL.
4503 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4504 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4505 can be executed more than once per iteration. If MAYBE_MULTIPLE
4506 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4507 executed exactly once per iteration. */
4510 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4511 not_every_iteration
, maybe_multiple
)
4512 struct induction
*v
;
4517 int not_every_iteration
;
4520 struct iv_class
*bl
;
4523 v
->src_reg
= dest_reg
;
4524 v
->dest_reg
= dest_reg
;
4525 v
->mult_val
= mult_val
;
4526 v
->add_val
= inc_val
;
4527 v
->mode
= GET_MODE (dest_reg
);
4528 v
->always_computable
= ! not_every_iteration
;
4529 v
->always_executed
= ! not_every_iteration
;
4530 v
->maybe_multiple
= maybe_multiple
;
4532 /* Add this to the reg's iv_class, creating a class
4533 if this is the first incrementation of the reg. */
4535 bl
= reg_biv_class
[REGNO (dest_reg
)];
4538 /* Create and initialize new iv_class. */
4540 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4542 bl
->regno
= REGNO (dest_reg
);
4548 /* Set initial value to the reg itself. */
4549 bl
->initial_value
= dest_reg
;
4550 /* We haven't seen the initializing insn yet */
4553 bl
->initial_test
= 0;
4554 bl
->incremented
= 0;
4558 bl
->total_benefit
= 0;
4560 /* Add this class to loop_iv_list. */
4561 bl
->next
= loop_iv_list
;
4564 /* Put it in the array of biv register classes. */
4565 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4568 /* Update IV_CLASS entry for this biv. */
4569 v
->next_iv
= bl
->biv
;
4572 if (mult_val
== const1_rtx
)
4573 bl
->incremented
= 1;
4575 if (loop_dump_stream
)
4577 fprintf (loop_dump_stream
,
4578 "Insn %d: possible biv, reg %d,",
4579 INSN_UID (insn
), REGNO (dest_reg
));
4580 if (GET_CODE (inc_val
) == CONST_INT
)
4581 fprintf (loop_dump_stream
, " const = %d\n",
4585 fprintf (loop_dump_stream
, " const = ");
4586 print_rtl (loop_dump_stream
, inc_val
);
4587 fprintf (loop_dump_stream
, "\n");
4592 /* Fill in the data about one giv.
4593 V is the `struct induction' in which we record the giv. (It is
4594 allocated by the caller, with alloca.)
4595 INSN is the insn that sets it.
4596 BENEFIT estimates the savings from deleting this insn.
4597 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4598 into a register or is used as a memory address.
4600 SRC_REG is the biv reg which the giv is computed from.
4601 DEST_REG is the giv's reg (if the giv is stored in a reg).
4602 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4603 LOCATION points to the place where this giv's value appears in INSN. */
4606 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4607 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4608 struct induction
*v
;
4612 rtx mult_val
, add_val
;
4615 int not_every_iteration
;
4617 rtx loop_start
, loop_end
;
4619 struct induction
*b
;
4620 struct iv_class
*bl
;
4621 rtx set
= single_set (insn
);
4625 v
->src_reg
= src_reg
;
4627 v
->dest_reg
= dest_reg
;
4628 v
->mult_val
= mult_val
;
4629 v
->add_val
= add_val
;
4630 v
->benefit
= benefit
;
4631 v
->location
= location
;
4633 v
->combined_with
= 0;
4634 v
->maybe_multiple
= 0;
4636 v
->derive_adjustment
= 0;
4642 v
->auto_inc_opt
= 0;
4646 /* The v->always_computable field is used in update_giv_derive, to
4647 determine whether a giv can be used to derive another giv. For a
4648 DEST_REG giv, INSN computes a new value for the giv, so its value
4649 isn't computable if INSN insn't executed every iteration.
4650 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4651 it does not compute a new value. Hence the value is always computable
4652 regardless of whether INSN is executed each iteration. */
4654 if (type
== DEST_ADDR
)
4655 v
->always_computable
= 1;
4657 v
->always_computable
= ! not_every_iteration
;
4659 v
->always_executed
= ! not_every_iteration
;
4661 if (type
== DEST_ADDR
)
4663 v
->mode
= GET_MODE (*location
);
4667 else /* type == DEST_REG */
4669 v
->mode
= GET_MODE (SET_DEST (set
));
4671 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4672 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4674 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4676 /* If the lifetime is zero, it means that this register is
4677 really a dead store. So mark this as a giv that can be
4678 ignored. This will not prevent the biv from being eliminated. */
4679 if (v
->lifetime
== 0)
4682 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4683 reg_iv_info
[REGNO (dest_reg
)] = v
;
4686 /* Add the giv to the class of givs computed from one biv. */
4688 bl
= reg_biv_class
[REGNO (src_reg
)];
4691 v
->next_iv
= bl
->giv
;
4693 /* Don't count DEST_ADDR. This is supposed to count the number of
4694 insns that calculate givs. */
4695 if (type
== DEST_REG
)
4697 bl
->total_benefit
+= benefit
;
4700 /* Fatal error, biv missing for this giv? */
4703 if (type
== DEST_ADDR
)
4707 /* The giv can be replaced outright by the reduced register only if all
4708 of the following conditions are true:
4709 - the insn that sets the giv is always executed on any iteration
4710 on which the giv is used at all
4711 (there are two ways to deduce this:
4712 either the insn is executed on every iteration,
4713 or all uses follow that insn in the same basic block),
4714 - the giv is not used outside the loop
4715 - no assignments to the biv occur during the giv's lifetime. */
4717 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4718 /* Previous line always fails if INSN was moved by loop opt. */
4719 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4720 && (! not_every_iteration
4721 || last_use_this_basic_block (dest_reg
, insn
)))
4723 /* Now check that there are no assignments to the biv within the
4724 giv's lifetime. This requires two separate checks. */
4726 /* Check each biv update, and fail if any are between the first
4727 and last use of the giv.
4729 If this loop contains an inner loop that was unrolled, then
4730 the insn modifying the biv may have been emitted by the loop
4731 unrolling code, and hence does not have a valid luid. Just
4732 mark the biv as not replaceable in this case. It is not very
4733 useful as a biv, because it is used in two different loops.
4734 It is very unlikely that we would be able to optimize the giv
4735 using this biv anyways. */
4738 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4740 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4741 || ((uid_luid
[INSN_UID (b
->insn
)]
4742 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4743 && (uid_luid
[INSN_UID (b
->insn
)]
4744 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4747 v
->not_replaceable
= 1;
4752 /* If there are any backwards branches that go from after the
4753 biv update to before it, then this giv is not replaceable. */
4755 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4756 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4759 v
->not_replaceable
= 1;
4765 /* May still be replaceable, we don't have enough info here to
4768 v
->not_replaceable
= 0;
4772 if (loop_dump_stream
)
4774 if (type
== DEST_REG
)
4775 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4776 INSN_UID (insn
), REGNO (dest_reg
));
4778 fprintf (loop_dump_stream
, "Insn %d: dest address",
4781 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4782 REGNO (src_reg
), v
->benefit
);
4783 fprintf (loop_dump_stream
, " used %d lifetime %d",
4784 v
->times_used
, v
->lifetime
);
4787 fprintf (loop_dump_stream
, " replaceable");
4789 if (GET_CODE (mult_val
) == CONST_INT
)
4790 fprintf (loop_dump_stream
, " mult %d",
4794 fprintf (loop_dump_stream
, " mult ");
4795 print_rtl (loop_dump_stream
, mult_val
);
4798 if (GET_CODE (add_val
) == CONST_INT
)
4799 fprintf (loop_dump_stream
, " add %d",
4803 fprintf (loop_dump_stream
, " add ");
4804 print_rtl (loop_dump_stream
, add_val
);
4808 if (loop_dump_stream
)
4809 fprintf (loop_dump_stream
, "\n");
4814 /* All this does is determine whether a giv can be made replaceable because
4815 its final value can be calculated. This code can not be part of record_giv
4816 above, because final_giv_value requires that the number of loop iterations
4817 be known, and that can not be accurately calculated until after all givs
4818 have been identified. */
4821 check_final_value (v
, loop_start
, loop_end
)
4822 struct induction
*v
;
4823 rtx loop_start
, loop_end
;
4825 struct iv_class
*bl
;
4826 rtx final_value
= 0;
4828 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4830 /* DEST_ADDR givs will never reach here, because they are always marked
4831 replaceable above in record_giv. */
4833 /* The giv can be replaced outright by the reduced register only if all
4834 of the following conditions are true:
4835 - the insn that sets the giv is always executed on any iteration
4836 on which the giv is used at all
4837 (there are two ways to deduce this:
4838 either the insn is executed on every iteration,
4839 or all uses follow that insn in the same basic block),
4840 - its final value can be calculated (this condition is different
4841 than the one above in record_giv)
4842 - no assignments to the biv occur during the giv's lifetime. */
4845 /* This is only called now when replaceable is known to be false. */
4846 /* Clear replaceable, so that it won't confuse final_giv_value. */
4850 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4851 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4853 int biv_increment_seen
= 0;
4859 /* When trying to determine whether or not a biv increment occurs
4860 during the lifetime of the giv, we can ignore uses of the variable
4861 outside the loop because final_value is true. Hence we can not
4862 use regno_last_uid and regno_first_uid as above in record_giv. */
4864 /* Search the loop to determine whether any assignments to the
4865 biv occur during the giv's lifetime. Start with the insn
4866 that sets the giv, and search around the loop until we come
4867 back to that insn again.
4869 Also fail if there is a jump within the giv's lifetime that jumps
4870 to somewhere outside the lifetime but still within the loop. This
4871 catches spaghetti code where the execution order is not linear, and
4872 hence the above test fails. Here we assume that the giv lifetime
4873 does not extend from one iteration of the loop to the next, so as
4874 to make the test easier. Since the lifetime isn't known yet,
4875 this requires two loops. See also record_giv above. */
4877 last_giv_use
= v
->insn
;
4883 p
= NEXT_INSN (loop_start
);
4887 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4888 || GET_CODE (p
) == CALL_INSN
)
4890 if (biv_increment_seen
)
4892 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4895 v
->not_replaceable
= 1;
4899 else if (GET_CODE (PATTERN (p
)) == SET
4900 && SET_DEST (PATTERN (p
)) == v
->src_reg
)
4901 biv_increment_seen
= 1;
4902 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4907 /* Now that the lifetime of the giv is known, check for branches
4908 from within the lifetime to outside the lifetime if it is still
4918 p
= NEXT_INSN (loop_start
);
4919 if (p
== last_giv_use
)
4922 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4923 && LABEL_NAME (JUMP_LABEL (p
))
4924 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4925 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4926 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4927 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4928 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4929 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4930 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4933 v
->not_replaceable
= 1;
4935 if (loop_dump_stream
)
4936 fprintf (loop_dump_stream
,
4937 "Found branch outside giv lifetime.\n");
4944 /* If it is replaceable, then save the final value. */
4946 v
->final_value
= final_value
;
4949 if (loop_dump_stream
&& v
->replaceable
)
4950 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4951 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4954 /* Update the status of whether a giv can derive other givs.
4956 We need to do something special if there is or may be an update to the biv
4957 between the time the giv is defined and the time it is used to derive
4960 In addition, a giv that is only conditionally set is not allowed to
4961 derive another giv once a label has been passed.
4963 The cases we look at are when a label or an update to a biv is passed. */
4966 update_giv_derive (p
)
4969 struct iv_class
*bl
;
4970 struct induction
*biv
, *giv
;
4974 /* Search all IV classes, then all bivs, and finally all givs.
4976 There are three cases we are concerned with. First we have the situation
4977 of a giv that is only updated conditionally. In that case, it may not
4978 derive any givs after a label is passed.
4980 The second case is when a biv update occurs, or may occur, after the
4981 definition of a giv. For certain biv updates (see below) that are
4982 known to occur between the giv definition and use, we can adjust the
4983 giv definition. For others, or when the biv update is conditional,
4984 we must prevent the giv from deriving any other givs. There are two
4985 sub-cases within this case.
4987 If this is a label, we are concerned with any biv update that is done
4988 conditionally, since it may be done after the giv is defined followed by
4989 a branch here (actually, we need to pass both a jump and a label, but
4990 this extra tracking doesn't seem worth it).
4992 If this is a jump, we are concerned about any biv update that may be
4993 executed multiple times. We are actually only concerned about
4994 backward jumps, but it is probably not worth performing the test
4995 on the jump again here.
4997 If this is a biv update, we must adjust the giv status to show that a
4998 subsequent biv update was performed. If this adjustment cannot be done,
4999 the giv cannot derive further givs. */
5001 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5002 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5003 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5006 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5008 /* If cant_derive is already true, there is no point in
5009 checking all of these conditions again. */
5010 if (giv
->cant_derive
)
5013 /* If this giv is conditionally set and we have passed a label,
5014 it cannot derive anything. */
5015 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5016 giv
->cant_derive
= 1;
5018 /* Skip givs that have mult_val == 0, since
5019 they are really invariants. Also skip those that are
5020 replaceable, since we know their lifetime doesn't contain
5022 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5025 /* The only way we can allow this giv to derive another
5026 is if this is a biv increment and we can form the product
5027 of biv->add_val and giv->mult_val. In this case, we will
5028 be able to compute a compensation. */
5029 else if (biv
->insn
== p
)
5033 if (biv
->mult_val
== const1_rtx
)
5034 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
5039 if (tem
&& giv
->derive_adjustment
)
5040 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
5041 giv
->derive_adjustment
),
5044 giv
->derive_adjustment
= tem
;
5046 giv
->cant_derive
= 1;
5048 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5049 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5050 giv
->cant_derive
= 1;
5055 /* Check whether an insn is an increment legitimate for a basic induction var.
5056 X is the source of insn P, or a part of it.
5057 MODE is the mode in which X should be interpreted.
5059 DEST_REG is the putative biv, also the destination of the insn.
5060 We accept patterns of these forms:
5061 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5062 REG = INVARIANT + REG
5064 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5065 and store the additive term into *INC_VAL.
5067 If X is an assignment of an invariant into DEST_REG, we set
5068 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5070 We also want to detect a BIV when it corresponds to a variable
5071 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5072 of the variable may be a PLUS that adds a SUBREG of that variable to
5073 an invariant and then sign- or zero-extends the result of the PLUS
5076 Most GIVs in such cases will be in the promoted mode, since that is the
5077 probably the natural computation mode (and almost certainly the mode
5078 used for addresses) on the machine. So we view the pseudo-reg containing
5079 the variable as the BIV, as if it were simply incremented.
5081 Note that treating the entire pseudo as a BIV will result in making
5082 simple increments to any GIVs based on it. However, if the variable
5083 overflows in its declared mode but not its promoted mode, the result will
5084 be incorrect. This is acceptable if the variable is signed, since
5085 overflows in such cases are undefined, but not if it is unsigned, since
5086 those overflows are defined. So we only check for SIGN_EXTEND and
5089 If we cannot find a biv, we return 0. */
5092 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5094 enum machine_mode mode
;
5100 register enum rtx_code code
;
5104 code
= GET_CODE (x
);
5108 if (XEXP (x
, 0) == dest_reg
5109 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5110 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5111 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5113 else if (XEXP (x
, 1) == dest_reg
5114 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5115 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5116 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5121 if (invariant_p (arg
) != 1)
5124 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5125 *mult_val
= const1_rtx
;
5129 /* If this is a SUBREG for a promoted variable, check the inner
5131 if (SUBREG_PROMOTED_VAR_P (x
))
5132 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5133 dest_reg
, p
, inc_val
, mult_val
);
5137 /* If this register is assigned in the previous insn, look at its
5138 source, but don't go outside the loop or past a label. */
5140 for (insn
= PREV_INSN (p
);
5141 (insn
&& GET_CODE (insn
) == NOTE
5142 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5143 insn
= PREV_INSN (insn
))
5147 set
= single_set (insn
);
5150 && (SET_DEST (set
) == x
5151 || (GET_CODE (SET_DEST (set
)) == SUBREG
5152 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5154 && SUBREG_REG (SET_DEST (set
)) == x
)))
5155 return basic_induction_var (SET_SRC (set
),
5156 (GET_MODE (SET_SRC (set
)) == VOIDmode
5158 : GET_MODE (SET_SRC (set
))),
5161 /* ... fall through ... */
5163 /* Can accept constant setting of biv only when inside inner most loop.
5164 Otherwise, a biv of an inner loop may be incorrectly recognized
5165 as a biv of the outer loop,
5166 causing code to be moved INTO the inner loop. */
5168 if (invariant_p (x
) != 1)
5173 if (loops_enclosed
== 1)
5175 /* Possible bug here? Perhaps we don't know the mode of X. */
5176 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5177 *mult_val
= const0_rtx
;
5184 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5185 dest_reg
, p
, inc_val
, mult_val
);
5187 /* Similar, since this can be a sign extension. */
5188 for (insn
= PREV_INSN (p
);
5189 (insn
&& GET_CODE (insn
) == NOTE
5190 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5191 insn
= PREV_INSN (insn
))
5195 set
= single_set (insn
);
5197 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5198 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5199 && INTVAL (XEXP (x
, 1)) >= 0
5200 && GET_CODE (SET_SRC (set
)) == ASHIFT
5201 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5202 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5203 GET_MODE (XEXP (x
, 0)),
5204 dest_reg
, insn
, inc_val
, mult_val
);
5212 /* A general induction variable (giv) is any quantity that is a linear
5213 function of a basic induction variable,
5214 i.e. giv = biv * mult_val + add_val.
5215 The coefficients can be any loop invariant quantity.
5216 A giv need not be computed directly from the biv;
5217 it can be computed by way of other givs. */
5219 /* Determine whether X computes a giv.
5220 If it does, return a nonzero value
5221 which is the benefit from eliminating the computation of X;
5222 set *SRC_REG to the register of the biv that it is computed from;
5223 set *ADD_VAL and *MULT_VAL to the coefficients,
5224 such that the value of X is biv * mult + add; */
5227 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5237 /* If this is an invariant, forget it, it isn't a giv. */
5238 if (invariant_p (x
) == 1)
5241 /* See if the expression could be a giv and get its form.
5242 Mark our place on the obstack in case we don't find a giv. */
5243 storage
= (char *) oballoc (0);
5244 x
= simplify_giv_expr (x
, &benefit
);
5251 switch (GET_CODE (x
))
5255 /* Since this is now an invariant and wasn't before, it must be a giv
5256 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5258 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5259 *mult_val
= const0_rtx
;
5264 /* This is equivalent to a BIV. */
5266 *mult_val
= const1_rtx
;
5267 *add_val
= const0_rtx
;
5271 /* Either (plus (biv) (invar)) or
5272 (plus (mult (biv) (invar_1)) (invar_2)). */
5273 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5275 *src_reg
= XEXP (XEXP (x
, 0), 0);
5276 *mult_val
= XEXP (XEXP (x
, 0), 1);
5280 *src_reg
= XEXP (x
, 0);
5281 *mult_val
= const1_rtx
;
5283 *add_val
= XEXP (x
, 1);
5287 /* ADD_VAL is zero. */
5288 *src_reg
= XEXP (x
, 0);
5289 *mult_val
= XEXP (x
, 1);
5290 *add_val
= const0_rtx
;
5297 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5298 unless they are CONST_INT). */
5299 if (GET_CODE (*add_val
) == USE
)
5300 *add_val
= XEXP (*add_val
, 0);
5301 if (GET_CODE (*mult_val
) == USE
)
5302 *mult_val
= XEXP (*mult_val
, 0);
5304 benefit
+= rtx_cost (orig_x
, SET
);
5306 /* Always return some benefit if this is a giv so it will be detected
5307 as such. This allows elimination of bivs that might otherwise
5308 not be eliminated. */
5309 return benefit
== 0 ? 1 : benefit
;
5312 /* Given an expression, X, try to form it as a linear function of a biv.
5313 We will canonicalize it to be of the form
5314 (plus (mult (BIV) (invar_1))
5316 with possible degeneracies.
5318 The invariant expressions must each be of a form that can be used as a
5319 machine operand. We surround then with a USE rtx (a hack, but localized
5320 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5321 routine; it is the caller's responsibility to strip them.
5323 If no such canonicalization is possible (i.e., two biv's are used or an
5324 expression that is neither invariant nor a biv or giv), this routine
5327 For a non-zero return, the result will have a code of CONST_INT, USE,
5328 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5330 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5333 simplify_giv_expr (x
, benefit
)
5337 enum machine_mode mode
= GET_MODE (x
);
5341 /* If this is not an integer mode, or if we cannot do arithmetic in this
5342 mode, this can't be a giv. */
5343 if (mode
!= VOIDmode
5344 && (GET_MODE_CLASS (mode
) != MODE_INT
5345 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5348 switch (GET_CODE (x
))
5351 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5352 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5353 if (arg0
== 0 || arg1
== 0)
5356 /* Put constant last, CONST_INT last if both constant. */
5357 if ((GET_CODE (arg0
) == USE
5358 || GET_CODE (arg0
) == CONST_INT
)
5359 && GET_CODE (arg1
) != CONST_INT
)
5360 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5362 /* Handle addition of zero, then addition of an invariant. */
5363 if (arg1
== const0_rtx
)
5365 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5366 switch (GET_CODE (arg0
))
5370 /* Both invariant. Only valid if sum is machine operand.
5371 First strip off possible USE on first operand. */
5372 if (GET_CODE (arg0
) == USE
)
5373 arg0
= XEXP (arg0
, 0);
5376 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5378 tem
= plus_constant (arg0
, INTVAL (arg1
));
5379 if (GET_CODE (tem
) != CONST_INT
)
5380 tem
= gen_rtx (USE
, mode
, tem
);
5387 /* biv + invar or mult + invar. Return sum. */
5388 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5391 /* (a + invar_1) + invar_2. Associate. */
5392 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5394 gen_rtx (PLUS
, mode
,
5395 XEXP (arg0
, 1), arg1
)),
5402 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5403 MULT to reduce cases. */
5404 if (GET_CODE (arg0
) == REG
)
5405 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5406 if (GET_CODE (arg1
) == REG
)
5407 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5409 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5410 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5411 Recurse to associate the second PLUS. */
5412 if (GET_CODE (arg1
) == MULT
)
5413 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5415 if (GET_CODE (arg1
) == PLUS
)
5416 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5417 gen_rtx (PLUS
, mode
,
5418 arg0
, XEXP (arg1
, 0)),
5422 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5423 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5426 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5429 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5431 gen_rtx (PLUS
, mode
,
5437 /* Handle "a - b" as "a + b * (-1)". */
5438 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5440 gen_rtx (MULT
, mode
,
5441 XEXP (x
, 1), constm1_rtx
)),
5445 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5446 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5447 if (arg0
== 0 || arg1
== 0)
5450 /* Put constant last, CONST_INT last if both constant. */
5451 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5452 && GET_CODE (arg1
) != CONST_INT
)
5453 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5455 /* If second argument is not now constant, not giv. */
5456 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5459 /* Handle multiply by 0 or 1. */
5460 if (arg1
== const0_rtx
)
5463 else if (arg1
== const1_rtx
)
5466 switch (GET_CODE (arg0
))
5469 /* biv * invar. Done. */
5470 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5473 /* Product of two constants. */
5474 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5477 /* invar * invar. Not giv. */
5481 /* (a * invar_1) * invar_2. Associate. */
5482 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5484 gen_rtx (MULT
, mode
,
5485 XEXP (arg0
, 1), arg1
)),
5489 /* (a + invar_1) * invar_2. Distribute. */
5490 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5491 gen_rtx (MULT
, mode
,
5492 XEXP (arg0
, 0), arg1
),
5493 gen_rtx (MULT
, mode
,
5494 XEXP (arg0
, 1), arg1
)),
5502 /* Shift by constant is multiply by power of two. */
5503 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5506 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5508 GEN_INT ((HOST_WIDE_INT
) 1
5509 << INTVAL (XEXP (x
, 1)))),
5513 /* "-a" is "a * (-1)" */
5514 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5518 /* "~a" is "-a - 1". Silly, but easy. */
5519 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5520 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5525 /* Already in proper form for invariant. */
5529 /* If this is a new register, we can't deal with it. */
5530 if (REGNO (x
) >= max_reg_before_loop
)
5533 /* Check for biv or giv. */
5534 switch (reg_iv_type
[REGNO (x
)])
5538 case GENERAL_INDUCT
:
5540 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5542 /* Form expression from giv and add benefit. Ensure this giv
5543 can derive another and subtract any needed adjustment if so. */
5544 *benefit
+= v
->benefit
;
5548 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5549 v
->src_reg
, v
->mult_val
),
5551 if (v
->derive_adjustment
)
5552 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5553 return simplify_giv_expr (tem
, benefit
);
5557 /* Fall through to general case. */
5559 /* If invariant, return as USE (unless CONST_INT).
5560 Otherwise, not giv. */
5561 if (GET_CODE (x
) == USE
)
5564 if (invariant_p (x
) == 1)
5566 if (GET_CODE (x
) == CONST_INT
)
5569 return gen_rtx (USE
, mode
, x
);
5576 /* Help detect a giv that is calculated by several consecutive insns;
5580 The caller has already identified the first insn P as having a giv as dest;
5581 we check that all other insns that set the same register follow
5582 immediately after P, that they alter nothing else,
5583 and that the result of the last is still a giv.
5585 The value is 0 if the reg set in P is not really a giv.
5586 Otherwise, the value is the amount gained by eliminating
5587 all the consecutive insns that compute the value.
5589 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5590 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5592 The coefficients of the ultimate giv value are stored in
5593 *MULT_VAL and *ADD_VAL. */
5596 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5611 /* Indicate that this is a giv so that we can update the value produced in
5612 each insn of the multi-insn sequence.
5614 This induction structure will be used only by the call to
5615 general_induction_var below, so we can allocate it on our stack.
5616 If this is a giv, our caller will replace the induct var entry with
5617 a new induction structure. */
5619 = (struct induction
*) alloca (sizeof (struct induction
));
5620 v
->src_reg
= src_reg
;
5621 v
->mult_val
= *mult_val
;
5622 v
->add_val
= *add_val
;
5623 v
->benefit
= first_benefit
;
5625 v
->derive_adjustment
= 0;
5627 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5628 reg_iv_info
[REGNO (dest_reg
)] = v
;
5630 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5635 code
= GET_CODE (p
);
5637 /* If libcall, skip to end of call sequence. */
5638 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5642 && (set
= single_set (p
))
5643 && GET_CODE (SET_DEST (set
)) == REG
5644 && SET_DEST (set
) == dest_reg
5645 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5647 /* Giv created by equivalent expression. */
5648 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5649 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5650 add_val
, mult_val
))))
5651 && src_reg
== v
->src_reg
)
5653 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5654 benefit
+= libcall_benefit (p
);
5657 v
->mult_val
= *mult_val
;
5658 v
->add_val
= *add_val
;
5659 v
->benefit
= benefit
;
5661 else if (code
!= NOTE
)
5663 /* Allow insns that set something other than this giv to a
5664 constant. Such insns are needed on machines which cannot
5665 include long constants and should not disqualify a giv. */
5667 && (set
= single_set (p
))
5668 && SET_DEST (set
) != dest_reg
5669 && CONSTANT_P (SET_SRC (set
)))
5672 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5680 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5681 represented by G1. If no such expression can be found, or it is clear that
5682 it cannot possibly be a valid address, 0 is returned.
5684 To perform the computation, we note that
5687 where `v' is the biv.
5689 So G2 = (c/a) * G1 + (d - b*c/a) */
5693 express_from (g1
, g2
)
5694 struct induction
*g1
, *g2
;
5698 /* The value that G1 will be multiplied by must be a constant integer. Also,
5699 the only chance we have of getting a valid address is if b*c/a (see above
5700 for notation) is also an integer. */
5701 if (GET_CODE (g1
->mult_val
) != CONST_INT
5702 || GET_CODE (g2
->mult_val
) != CONST_INT
5703 || GET_CODE (g1
->add_val
) != CONST_INT
5704 || g1
->mult_val
== const0_rtx
5705 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5708 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5709 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5711 /* Form simplified final result. */
5712 if (mult
== const0_rtx
)
5714 else if (mult
== const1_rtx
)
5715 mult
= g1
->dest_reg
;
5717 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5719 if (add
== const0_rtx
)
5722 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5726 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5727 (either directly or via an address expression) a register used to represent
5728 G1. Set g2->new_reg to a represtation of G1 (normally just
5732 combine_givs_p (g1
, g2
)
5733 struct induction
*g1
, *g2
;
5737 /* If these givs are identical, they can be combined. */
5738 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5739 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5741 g2
->new_reg
= g1
->dest_reg
;
5746 /* If G2 can be expressed as a function of G1 and that function is valid
5747 as an address and no more expensive than using a register for G2,
5748 the expression of G2 in terms of G1 can be used. */
5749 if (g2
->giv_type
== DEST_ADDR
5750 && (tem
= express_from (g1
, g2
)) != 0
5751 && memory_address_p (g2
->mem_mode
, tem
)
5752 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5762 #ifdef GIV_SORT_CRITERION
5763 /* Compare two givs and sort the most desirable one for combinations first.
5764 This is used only in one qsort call below. */
5768 struct induction
**x
, **y
;
5770 GIV_SORT_CRITERION (*x
, *y
);
5776 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5777 any other. If so, point SAME to the giv combined with and set NEW_REG to
5778 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5779 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5783 struct iv_class
*bl
;
5785 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5786 int i
, j
, giv_count
, pass
;
5788 /* Count givs, because bl->giv_count is incorrect here. */
5790 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5794 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5796 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5797 giv_array
[i
++] = g1
;
5799 #ifdef GIV_SORT_CRITERION
5800 /* Sort the givs if GIV_SORT_CRITERION is defined.
5801 This is usually defined for processors which lack
5802 negative register offsets so more givs may be combined. */
5804 if (loop_dump_stream
)
5805 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5807 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5810 for (i
= 0; i
< giv_count
; i
++)
5813 for (pass
= 0; pass
<= 1; pass
++)
5814 for (j
= 0; j
< giv_count
; j
++)
5818 /* First try to combine with replaceable givs, then all givs. */
5819 && (g1
->replaceable
|| pass
== 1)
5820 /* If either has already been combined or is to be ignored, can't
5822 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5823 /* If something has been based on G2, G2 cannot itself be based
5824 on something else. */
5825 && ! g2
->combined_with
5826 && combine_givs_p (g1
, g2
))
5828 /* g2->new_reg set by `combine_givs_p' */
5830 g1
->combined_with
= 1;
5832 /* If one of these givs is a DEST_REG that was only used
5833 once, by the other giv, this is actually a single use.
5834 The DEST_REG has the correct cost, while the other giv
5835 counts the REG use too often. */
5836 if (g2
->giv_type
== DEST_REG
5837 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5838 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5839 g1
->benefit
= g2
->benefit
;
5840 else if (g1
->giv_type
!= DEST_REG
5841 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5842 || ! reg_mentioned_p (g1
->dest_reg
,
5843 PATTERN (g2
->insn
)))
5845 g1
->benefit
+= g2
->benefit
;
5846 g1
->times_used
+= g2
->times_used
;
5848 /* ??? The new final_[bg]iv_value code does a much better job
5849 of finding replaceable giv's, and hence this code may no
5850 longer be necessary. */
5851 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5852 g1
->benefit
-= copy_cost
;
5853 g1
->lifetime
+= g2
->lifetime
;
5855 if (loop_dump_stream
)
5856 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5857 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5863 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5866 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5867 rtx b
; /* initial value of basic induction variable */
5868 rtx m
; /* multiplicative constant */
5869 rtx a
; /* additive constant */
5870 rtx reg
; /* destination register */
5876 /* Prevent unexpected sharing of these rtx. */
5880 /* Increase the lifetime of any invariants moved further in code. */
5881 update_reg_last_use (a
, insert_before
);
5882 update_reg_last_use (b
, insert_before
);
5883 update_reg_last_use (m
, insert_before
);
5886 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5888 emit_move_insn (reg
, result
);
5889 seq
= gen_sequence ();
5892 emit_insn_before (seq
, insert_before
);
5894 record_base_value (REGNO (reg
), b
);
5897 /* Test whether A * B can be computed without
5898 an actual multiply insn. Value is 1 if so. */
5901 product_cheap_p (a
, b
)
5907 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5908 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5911 /* If only one is constant, make it B. */
5912 if (GET_CODE (a
) == CONST_INT
)
5913 tmp
= a
, a
= b
, b
= tmp
;
5915 /* If first constant, both constant, so don't need multiply. */
5916 if (GET_CODE (a
) == CONST_INT
)
5919 /* If second not constant, neither is constant, so would need multiply. */
5920 if (GET_CODE (b
) != CONST_INT
)
5923 /* One operand is constant, so might not need multiply insn. Generate the
5924 code for the multiply and see if a call or multiply, or long sequence
5925 of insns is generated. */
5927 rtl_obstack
= &temp_obstack
;
5929 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5930 tmp
= gen_sequence ();
5933 if (GET_CODE (tmp
) == SEQUENCE
)
5935 if (XVEC (tmp
, 0) == 0)
5937 else if (XVECLEN (tmp
, 0) > 3)
5940 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5942 rtx insn
= XVECEXP (tmp
, 0, i
);
5944 if (GET_CODE (insn
) != INSN
5945 || (GET_CODE (PATTERN (insn
)) == SET
5946 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5947 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5948 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5949 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5956 else if (GET_CODE (tmp
) == SET
5957 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5959 else if (GET_CODE (tmp
) == PARALLEL
5960 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5961 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5964 /* Free any storage we obtained in generating this multiply and restore rtl
5965 allocation to its normal obstack. */
5966 obstack_free (&temp_obstack
, storage
);
5967 rtl_obstack
= old_rtl_obstack
;
5972 /* Check to see if loop can be terminated by a "decrement and branch until
5973 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5974 Also try reversing an increment loop to a decrement loop
5975 to see if the optimization can be performed.
5976 Value is nonzero if optimization was performed. */
5978 /* This is useful even if the architecture doesn't have such an insn,
5979 because it might change a loops which increments from 0 to n to a loop
5980 which decrements from n to 0. A loop that decrements to zero is usually
5981 faster than one that increments from zero. */
5983 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5984 such as approx_final_value, biv_total_increment, loop_iterations, and
5985 final_[bg]iv_value. */
5988 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5993 struct iv_class
*bl
;
6000 rtx before_comparison
;
6003 /* If last insn is a conditional branch, and the insn before tests a
6004 register value, try to optimize it. Otherwise, we can't do anything. */
6006 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
6007 if (comparison
== 0)
6010 /* Check all of the bivs to see if the compare uses one of them.
6011 Skip biv's set more than once because we can't guarantee that
6012 it will be zero on the last iteration. Also skip if the biv is
6013 used between its update and the test insn. */
6015 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6017 if (bl
->biv_count
== 1
6018 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6019 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6020 PREV_INSN (PREV_INSN (loop_end
))))
6027 /* Look for the case where the basic induction variable is always
6028 nonnegative, and equals zero on the last iteration.
6029 In this case, add a reg_note REG_NONNEG, which allows the
6030 m68k DBRA instruction to be used. */
6032 if (((GET_CODE (comparison
) == GT
6033 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6034 && INTVAL (XEXP (comparison
, 1)) == -1)
6035 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6036 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6037 && INTVAL (bl
->biv
->add_val
) < 0)
6039 /* Initial value must be greater than 0,
6040 init_val % -dec_value == 0 to ensure that it equals zero on
6041 the last iteration */
6043 if (GET_CODE (bl
->initial_value
) == CONST_INT
6044 && INTVAL (bl
->initial_value
) > 0
6045 && (INTVAL (bl
->initial_value
)
6046 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6048 /* register always nonnegative, add REG_NOTE to branch */
6049 REG_NOTES (PREV_INSN (loop_end
))
6050 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6051 REG_NOTES (PREV_INSN (loop_end
)));
6057 /* If the decrement is 1 and the value was tested as >= 0 before
6058 the loop, then we can safely optimize. */
6059 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6061 if (GET_CODE (p
) == CODE_LABEL
)
6063 if (GET_CODE (p
) != JUMP_INSN
)
6066 before_comparison
= get_condition_for_loop (p
);
6067 if (before_comparison
6068 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6069 && GET_CODE (before_comparison
) == LT
6070 && XEXP (before_comparison
, 1) == const0_rtx
6071 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6072 && INTVAL (bl
->biv
->add_val
) == -1)
6074 REG_NOTES (PREV_INSN (loop_end
))
6075 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6076 REG_NOTES (PREV_INSN (loop_end
)));
6083 else if (num_mem_sets
<= 1)
6085 /* Try to change inc to dec, so can apply above optimization. */
6087 all registers modified are induction variables or invariant,
6088 all memory references have non-overlapping addresses
6089 (obviously true if only one write)
6090 allow 2 insns for the compare/jump at the end of the loop. */
6091 /* Also, we must avoid any instructions which use both the reversed
6092 biv and another biv. Such instructions will fail if the loop is
6093 reversed. We meet this condition by requiring that either
6094 no_use_except_counting is true, or else that there is only
6096 int num_nonfixed_reads
= 0;
6097 /* 1 if the iteration var is used only to count iterations. */
6098 int no_use_except_counting
= 0;
6099 /* 1 if the loop has no memory store, or it has a single memory store
6100 which is reversible. */
6101 int reversible_mem_store
= 1;
6103 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6104 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6105 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6107 if (bl
->giv_count
== 0
6108 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6110 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6112 /* If there are no givs for this biv, and the only exit is the
6113 fall through at the end of the the loop, then
6114 see if perhaps there are no uses except to count. */
6115 no_use_except_counting
= 1;
6116 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6117 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6119 rtx set
= single_set (p
);
6121 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6122 && REGNO (SET_DEST (set
)) == bl
->regno
)
6123 /* An insn that sets the biv is okay. */
6125 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6126 || p
== prev_nonnote_insn (loop_end
))
6127 /* Don't bother about the end test. */
6129 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6130 /* Any other use of the biv is no good. */
6132 no_use_except_counting
= 0;
6138 /* If the loop has a single store, and the destination address is
6139 invariant, then we can't reverse the loop, because this address
6140 might then have the wrong value at loop exit.
6141 This would work if the source was invariant also, however, in that
6142 case, the insn should have been moved out of the loop. */
6144 if (num_mem_sets
== 1)
6145 reversible_mem_store
6146 = (! unknown_address_altered
6147 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6149 /* This code only acts for innermost loops. Also it simplifies
6150 the memory address check by only reversing loops with
6151 zero or one memory access.
6152 Two memory accesses could involve parts of the same array,
6153 and that can't be reversed. */
6155 if (num_nonfixed_reads
<= 1
6157 && !loop_has_volatile
6158 && reversible_mem_store
6159 && (no_use_except_counting
6160 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6161 + num_movables
+ 2 == insn_count
)
6162 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6166 /* Loop can be reversed. */
6167 if (loop_dump_stream
)
6168 fprintf (loop_dump_stream
, "Can reverse loop\n");
6170 /* Now check other conditions:
6171 initial_value must be zero,
6172 final_value % add_val == 0, so that when reversed, the
6173 biv will be zero on the last iteration.
6175 This test can probably be improved since +/- 1 in the constant
6176 can be obtained by changing LT to LE and vice versa; this is
6179 if (comparison
&& bl
->initial_value
== const0_rtx
6180 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6181 /* LE gets turned into LT */
6182 && GET_CODE (comparison
) == LT
6183 && (INTVAL (XEXP (comparison
, 1))
6184 % INTVAL (bl
->biv
->add_val
)) == 0)
6186 /* Register will always be nonnegative, with value
6187 0 on last iteration if loop reversed */
6189 /* Save some info needed to produce the new insns. */
6190 reg
= bl
->biv
->dest_reg
;
6191 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6192 if (jump_label
== pc_rtx
)
6193 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6194 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6196 final_value
= XEXP (comparison
, 1);
6197 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6198 - INTVAL (bl
->biv
->add_val
));
6200 /* Initialize biv to start_value before loop start.
6201 The old initializing insn will be deleted as a
6202 dead store by flow.c. */
6203 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6205 /* Add insn to decrement register, and delete insn
6206 that incremented the register. */
6207 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6209 delete_insn (bl
->biv
->insn
);
6211 /* Update biv info to reflect its new status. */
6213 bl
->initial_value
= start_value
;
6214 bl
->biv
->add_val
= new_add_val
;
6216 /* Inc LABEL_NUSES so that delete_insn will
6217 not delete the label. */
6218 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6220 /* Emit an insn after the end of the loop to set the biv's
6221 proper exit value if it is used anywhere outside the loop. */
6222 if ((REGNO_LAST_UID (bl
->regno
)
6223 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6225 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6226 emit_insn_after (gen_move_insn (reg
, final_value
),
6229 /* Delete compare/branch at end of loop. */
6230 delete_insn (PREV_INSN (loop_end
));
6231 delete_insn (PREV_INSN (loop_end
));
6233 /* Add new compare/branch insn at end of loop. */
6235 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6236 GET_MODE (reg
), 0, 0);
6237 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6238 tem
= gen_sequence ();
6240 emit_jump_insn_before (tem
, loop_end
);
6242 for (tem
= PREV_INSN (loop_end
);
6243 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6247 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6249 /* Increment of LABEL_NUSES done above. */
6250 /* Register is now always nonnegative,
6251 so add REG_NONNEG note to the branch. */
6252 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6258 /* Mark that this biv has been reversed. Each giv which depends
6259 on this biv, and which is also live past the end of the loop
6260 will have to be fixed up. */
6264 if (loop_dump_stream
)
6265 fprintf (loop_dump_stream
,
6266 "Reversed loop and added reg_nonneg\n");
6276 /* Verify whether the biv BL appears to be eliminable,
6277 based on the insns in the loop that refer to it.
6278 LOOP_START is the first insn of the loop, and END is the end insn.
6280 If ELIMINATE_P is non-zero, actually do the elimination.
6282 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6283 determine whether invariant insns should be placed inside or at the
6284 start of the loop. */
6287 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6288 struct iv_class
*bl
;
6292 int threshold
, insn_count
;
6294 rtx reg
= bl
->biv
->dest_reg
;
6297 /* Scan all insns in the loop, stopping if we find one that uses the
6298 biv in a way that we cannot eliminate. */
6300 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6302 enum rtx_code code
= GET_CODE (p
);
6303 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6305 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6306 && reg_mentioned_p (reg
, PATTERN (p
))
6307 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6309 if (loop_dump_stream
)
6310 fprintf (loop_dump_stream
,
6311 "Cannot eliminate biv %d: biv used in insn %d.\n",
6312 bl
->regno
, INSN_UID (p
));
6319 if (loop_dump_stream
)
6320 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6321 bl
->regno
, eliminate_p
? "was" : "can be");
6328 /* If BL appears in X (part of the pattern of INSN), see if we can
6329 eliminate its use. If so, return 1. If not, return 0.
6331 If BIV does not appear in X, return 1.
6333 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6334 where extra insns should be added. Depending on how many items have been
6335 moved out of the loop, it will either be before INSN or at the start of
6339 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6341 struct iv_class
*bl
;
6345 enum rtx_code code
= GET_CODE (x
);
6346 rtx reg
= bl
->biv
->dest_reg
;
6347 enum machine_mode mode
= GET_MODE (reg
);
6348 struct induction
*v
;
6357 /* If we haven't already been able to do something with this BIV,
6358 we can't eliminate it. */
6364 /* If this sets the BIV, it is not a problem. */
6365 if (SET_DEST (x
) == reg
)
6368 /* If this is an insn that defines a giv, it is also ok because
6369 it will go away when the giv is reduced. */
6370 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6371 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6375 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6377 /* Can replace with any giv that was reduced and
6378 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6379 Require a constant for MULT_VAL, so we know it's nonzero.
6380 ??? We disable this optimization to avoid potential
6383 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6384 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6385 && v
->add_val
== const0_rtx
6386 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6390 /* If the giv V had the auto-inc address optimization applied
6391 to it, and INSN occurs between the giv insn and the biv
6392 insn, then we must adjust the value used here.
6393 This is rare, so we don't bother to do so. */
6395 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6396 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6397 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6398 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6404 /* If the giv has the opposite direction of change,
6405 then reverse the comparison. */
6406 if (INTVAL (v
->mult_val
) < 0)
6407 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6408 const0_rtx
, v
->new_reg
);
6412 /* We can probably test that giv's reduced reg. */
6413 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6417 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6418 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6419 Require a constant for MULT_VAL, so we know it's nonzero.
6420 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6421 overflow problem. */
6423 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6424 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6425 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6427 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6428 || GET_CODE (v
->add_val
) == LABEL_REF
6429 || GET_CODE (v
->add_val
) == CONST
6430 || (GET_CODE (v
->add_val
) == REG
6431 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6433 /* If the giv V had the auto-inc address optimization applied
6434 to it, and INSN occurs between the giv insn and the biv
6435 insn, then we must adjust the value used here.
6436 This is rare, so we don't bother to do so. */
6438 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6439 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6440 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6441 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6447 /* If the giv has the opposite direction of change,
6448 then reverse the comparison. */
6449 if (INTVAL (v
->mult_val
) < 0)
6450 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6453 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6454 copy_rtx (v
->add_val
));
6456 /* Replace biv with the giv's reduced register. */
6457 update_reg_last_use (v
->add_val
, insn
);
6458 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6461 /* Insn doesn't support that constant or invariant. Copy it
6462 into a register (it will be a loop invariant.) */
6463 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6465 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6468 /* Substitute the new register for its invariant value in
6469 the compare expression. */
6470 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6471 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6480 case GT
: case GE
: case GTU
: case GEU
:
6481 case LT
: case LE
: case LTU
: case LEU
:
6482 /* See if either argument is the biv. */
6483 if (XEXP (x
, 0) == reg
)
6484 arg
= XEXP (x
, 1), arg_operand
= 1;
6485 else if (XEXP (x
, 1) == reg
)
6486 arg
= XEXP (x
, 0), arg_operand
= 0;
6490 if (CONSTANT_P (arg
))
6492 /* First try to replace with any giv that has constant positive
6493 mult_val and constant add_val. We might be able to support
6494 negative mult_val, but it seems complex to do it in general. */
6496 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6497 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6498 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6499 || GET_CODE (v
->add_val
) == LABEL_REF
6500 || GET_CODE (v
->add_val
) == CONST
6501 || (GET_CODE (v
->add_val
) == REG
6502 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6503 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6506 /* If the giv V had the auto-inc address optimization applied
6507 to it, and INSN occurs between the giv insn and the biv
6508 insn, then we must adjust the value used here.
6509 This is rare, so we don't bother to do so. */
6511 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6512 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6513 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6514 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6520 /* Replace biv with the giv's reduced reg. */
6521 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6523 /* If all constants are actually constant integers and
6524 the derived constant can be directly placed in the COMPARE,
6526 if (GET_CODE (arg
) == CONST_INT
6527 && GET_CODE (v
->mult_val
) == CONST_INT
6528 && GET_CODE (v
->add_val
) == CONST_INT
6529 && validate_change (insn
, &XEXP (x
, arg_operand
),
6530 GEN_INT (INTVAL (arg
)
6531 * INTVAL (v
->mult_val
)
6532 + INTVAL (v
->add_val
)), 0))
6535 /* Otherwise, load it into a register. */
6536 tem
= gen_reg_rtx (mode
);
6537 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6538 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6541 /* If that failed, put back the change we made above. */
6542 XEXP (x
, 1-arg_operand
) = reg
;
6545 /* Look for giv with positive constant mult_val and nonconst add_val.
6546 Insert insns to calculate new compare value.
6547 ??? Turn this off due to possible overflow. */
6549 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6550 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6551 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6557 /* If the giv V had the auto-inc address optimization applied
6558 to it, and INSN occurs between the giv insn and the biv
6559 insn, then we must adjust the value used here.
6560 This is rare, so we don't bother to do so. */
6562 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6563 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6564 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6565 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6571 tem
= gen_reg_rtx (mode
);
6573 /* Replace biv with giv's reduced register. */
6574 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6577 /* Compute value to compare against. */
6578 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6579 /* Use it in this insn. */
6580 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6581 if (apply_change_group ())
6585 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6587 if (invariant_p (arg
) == 1)
6589 /* Look for giv with constant positive mult_val and nonconst
6590 add_val. Insert insns to compute new compare value.
6591 ??? Turn this off due to possible overflow. */
6593 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6594 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6595 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6601 /* If the giv V had the auto-inc address optimization applied
6602 to it, and INSN occurs between the giv insn and the biv
6603 insn, then we must adjust the value used here.
6604 This is rare, so we don't bother to do so. */
6606 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6607 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6608 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6609 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6615 tem
= gen_reg_rtx (mode
);
6617 /* Replace biv with giv's reduced register. */
6618 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6621 /* Compute value to compare against. */
6622 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6624 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6625 if (apply_change_group ())
6630 /* This code has problems. Basically, you can't know when
6631 seeing if we will eliminate BL, whether a particular giv
6632 of ARG will be reduced. If it isn't going to be reduced,
6633 we can't eliminate BL. We can try forcing it to be reduced,
6634 but that can generate poor code.
6636 The problem is that the benefit of reducing TV, below should
6637 be increased if BL can actually be eliminated, but this means
6638 we might have to do a topological sort of the order in which
6639 we try to process biv. It doesn't seem worthwhile to do
6640 this sort of thing now. */
6643 /* Otherwise the reg compared with had better be a biv. */
6644 if (GET_CODE (arg
) != REG
6645 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6648 /* Look for a pair of givs, one for each biv,
6649 with identical coefficients. */
6650 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6652 struct induction
*tv
;
6654 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6657 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6658 if (! tv
->ignore
&& ! tv
->maybe_dead
6659 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6660 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6661 && tv
->mode
== mode
)
6663 /* If the giv V had the auto-inc address optimization applied
6664 to it, and INSN occurs between the giv insn and the biv
6665 insn, then we must adjust the value used here.
6666 This is rare, so we don't bother to do so. */
6668 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6669 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6670 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6671 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6677 /* Replace biv with its giv's reduced reg. */
6678 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6679 /* Replace other operand with the other giv's
6681 XEXP (x
, arg_operand
) = tv
->new_reg
;
6688 /* If we get here, the biv can't be eliminated. */
6692 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6693 biv is used in it, since it will be replaced. */
6694 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6695 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6700 /* See if any subexpression fails elimination. */
6701 fmt
= GET_RTX_FORMAT (code
);
6702 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6707 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6708 eliminate_p
, where
))
6713 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6714 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6715 eliminate_p
, where
))
6724 /* Return nonzero if the last use of REG
6725 is in an insn following INSN in the same basic block. */
6728 last_use_this_basic_block (reg
, insn
)
6734 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6737 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6743 /* Called via `note_stores' to record the initial value of a biv. Here we
6744 just record the location of the set and process it later. */
6747 record_initial (dest
, set
)
6751 struct iv_class
*bl
;
6753 if (GET_CODE (dest
) != REG
6754 || REGNO (dest
) >= max_reg_before_loop
6755 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6758 bl
= reg_biv_class
[REGNO (dest
)];
6760 /* If this is the first set found, record it. */
6761 if (bl
->init_insn
== 0)
6763 bl
->init_insn
= note_insn
;
6768 /* If any of the registers in X are "old" and currently have a last use earlier
6769 than INSN, update them to have a last use of INSN. Their actual last use
6770 will be the previous insn but it will not have a valid uid_luid so we can't
6774 update_reg_last_use (x
, insn
)
6778 /* Check for the case where INSN does not have a valid luid. In this case,
6779 there is no need to modify the regno_last_uid, as this can only happen
6780 when code is inserted after the loop_end to set a pseudo's final value,
6781 and hence this insn will never be the last use of x. */
6782 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6783 && INSN_UID (insn
) < max_uid_for_loop
6784 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6785 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6789 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6790 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6793 update_reg_last_use (XEXP (x
, i
), insn
);
6794 else if (fmt
[i
] == 'E')
6795 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6796 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6801 /* Given a jump insn JUMP, return the condition that will cause it to branch
6802 to its JUMP_LABEL. If the condition cannot be understood, or is an
6803 inequality floating-point comparison which needs to be reversed, 0 will
6806 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6807 insn used in locating the condition was found. If a replacement test
6808 of the condition is desired, it should be placed in front of that
6809 insn and we will be sure that the inputs are still valid.
6811 The condition will be returned in a canonical form to simplify testing by
6812 callers. Specifically:
6814 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6815 (2) Both operands will be machine operands; (cc0) will have been replaced.
6816 (3) If an operand is a constant, it will be the second operand.
6817 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6818 for GE, GEU, and LEU. */
6821 get_condition (jump
, earliest
)
6830 int reverse_code
= 0;
6831 int did_reverse_condition
= 0;
6833 /* If this is not a standard conditional jump, we can't parse it. */
6834 if (GET_CODE (jump
) != JUMP_INSN
6835 || ! condjump_p (jump
) || simplejump_p (jump
))
6838 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6839 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6840 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6845 /* If this branches to JUMP_LABEL when the condition is false, reverse
6847 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6848 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6849 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6851 /* If we are comparing a register with zero, see if the register is set
6852 in the previous insn to a COMPARE or a comparison operation. Perform
6853 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6856 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6858 /* Set non-zero when we find something of interest. */
6862 /* If comparison with cc0, import actual comparison from compare
6866 if ((prev
= prev_nonnote_insn (prev
)) == 0
6867 || GET_CODE (prev
) != INSN
6868 || (set
= single_set (prev
)) == 0
6869 || SET_DEST (set
) != cc0_rtx
)
6872 op0
= SET_SRC (set
);
6873 op1
= CONST0_RTX (GET_MODE (op0
));
6879 /* If this is a COMPARE, pick up the two things being compared. */
6880 if (GET_CODE (op0
) == COMPARE
)
6882 op1
= XEXP (op0
, 1);
6883 op0
= XEXP (op0
, 0);
6886 else if (GET_CODE (op0
) != REG
)
6889 /* Go back to the previous insn. Stop if it is not an INSN. We also
6890 stop if it isn't a single set or if it has a REG_INC note because
6891 we don't want to bother dealing with it. */
6893 if ((prev
= prev_nonnote_insn (prev
)) == 0
6894 || GET_CODE (prev
) != INSN
6895 || FIND_REG_INC_NOTE (prev
, 0)
6896 || (set
= single_set (prev
)) == 0)
6899 /* If this is setting OP0, get what it sets it to if it looks
6901 if (rtx_equal_p (SET_DEST (set
), op0
))
6903 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6905 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6908 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6909 && (GET_MODE_BITSIZE (inner_mode
)
6910 <= HOST_BITS_PER_WIDE_INT
)
6911 && (STORE_FLAG_VALUE
6912 & ((HOST_WIDE_INT
) 1
6913 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6914 #ifdef FLOAT_STORE_FLAG_VALUE
6916 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6917 && FLOAT_STORE_FLAG_VALUE
< 0)
6920 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6922 else if (((code
== EQ
6924 && (GET_MODE_BITSIZE (inner_mode
)
6925 <= HOST_BITS_PER_WIDE_INT
)
6926 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6927 && (STORE_FLAG_VALUE
6928 & ((HOST_WIDE_INT
) 1
6929 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6930 #ifdef FLOAT_STORE_FLAG_VALUE
6932 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6933 && FLOAT_STORE_FLAG_VALUE
< 0)
6936 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6938 /* We might have reversed a LT to get a GE here. But this wasn't
6939 actually the comparison of data, so we don't flag that we
6940 have had to reverse the condition. */
6941 did_reverse_condition
^= 1;
6949 else if (reg_set_p (op0
, prev
))
6950 /* If this sets OP0, but not directly, we have to give up. */
6955 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6956 code
= GET_CODE (x
);
6959 code
= reverse_condition (code
);
6960 did_reverse_condition
^= 1;
6964 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6970 /* If constant is first, put it last. */
6971 if (CONSTANT_P (op0
))
6972 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6974 /* If OP0 is the result of a comparison, we weren't able to find what
6975 was really being compared, so fail. */
6976 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6979 /* Canonicalize any ordered comparison with integers involving equality
6980 if we can do computations in the relevant mode and we do not
6983 if (GET_CODE (op1
) == CONST_INT
6984 && GET_MODE (op0
) != VOIDmode
6985 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
6987 HOST_WIDE_INT const_val
= INTVAL (op1
);
6988 unsigned HOST_WIDE_INT uconst_val
= const_val
;
6989 unsigned HOST_WIDE_INT max_val
6990 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
6995 if (const_val
!= max_val
>> 1)
6996 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7001 != (((HOST_WIDE_INT
) 1
7002 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7003 code
= GT
, op1
= GEN_INT (const_val
- 1);
7007 if (uconst_val
!= max_val
)
7008 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7012 if (uconst_val
!= 0)
7013 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7018 /* If this was floating-point and we reversed anything other than an
7019 EQ or NE, return zero. */
7020 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7021 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7023 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7027 /* Never return CC0; return zero instead. */
7032 return gen_rtx (code
, VOIDmode
, op0
, op1
);
7035 /* Similar to above routine, except that we also put an invariant last
7036 unless both operands are invariants. */
7039 get_condition_for_loop (x
)
7042 rtx comparison
= get_condition (x
, NULL_PTR
);
7045 || ! invariant_p (XEXP (comparison
, 0))
7046 || invariant_p (XEXP (comparison
, 1)))
7049 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7050 XEXP (comparison
, 1), XEXP (comparison
, 0));
7054 /* Analyze a loop in order to instrument it with the use of count register.
7055 loop_start and loop_end are the first and last insns of the loop.
7056 This function works in cooperation with insert_bct ().
7057 loop_can_insert_bct[loop_num] is set according to whether the optimization
7058 is applicable to the loop. When it is applicable, the following variables
7060 loop_start_value[loop_num]
7061 loop_comparison_value[loop_num]
7062 loop_increment[loop_num]
7063 loop_comparison_code[loop_num] */
7066 void analyze_loop_iterations (loop_start
, loop_end
)
7067 rtx loop_start
, loop_end
;
7069 rtx comparison
, comparison_value
;
7070 rtx iteration_var
, initial_value
, increment
;
7071 enum rtx_code comparison_code
;
7077 /* loop_variable mode */
7078 enum machine_mode original_mode
;
7080 /* find the number of the loop */
7081 int loop_num
= loop_number (loop_start
, loop_end
);
7083 /* we change our mind only when we are sure that loop will be instrumented */
7084 loop_can_insert_bct
[loop_num
] = 0;
7086 /* debugging: do we wish to instrument this loop? */
7087 if ( !check_bct_param () )
7090 /* is the optimization suppressed. */
7091 if ( !flag_branch_on_count_reg
)
7094 /* make sure that count-reg is not in use */
7095 if (loop_used_count_register
[loop_num
]){
7096 if (loop_dump_stream
)
7097 fprintf (loop_dump_stream
,
7098 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7103 /* make sure that the function has no indirect jumps. */
7104 if (indirect_jump_in_function
){
7105 if (loop_dump_stream
)
7106 fprintf (loop_dump_stream
,
7107 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7112 /* make sure that the last loop insn is a conditional jump */
7113 last_loop_insn
= PREV_INSN (loop_end
);
7114 if (!is_conditional_branch (last_loop_insn
)) {
7115 if (loop_dump_stream
)
7116 fprintf (loop_dump_stream
,
7117 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7122 /* First find the iteration variable. If the last insn is a conditional
7123 branch, and the insn preceding it tests a register value, make that
7124 register the iteration variable. */
7126 /* We used to use prev_nonnote_insn here, but that fails because it might
7127 accidentally get the branch for a contained loop if the branch for this
7128 loop was deleted. We can only trust branches immediately before the
7131 comparison
= get_condition_for_loop (last_loop_insn
);
7132 /* ??? Get_condition may switch position of induction variable and
7133 invariant register when it canonicalizes the comparison. */
7135 if (comparison
== 0) {
7136 if (loop_dump_stream
)
7137 fprintf (loop_dump_stream
,
7138 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7143 comparison_code
= GET_CODE (comparison
);
7144 iteration_var
= XEXP (comparison
, 0);
7145 comparison_value
= XEXP (comparison
, 1);
7147 original_mode
= GET_MODE (iteration_var
);
7148 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7149 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7150 if (loop_dump_stream
)
7151 fprintf (loop_dump_stream
,
7152 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7157 /* get info about loop bounds and increment */
7158 iteration_info (iteration_var
, &initial_value
, &increment
,
7159 loop_start
, loop_end
);
7161 /* make sure that all required loop data were found */
7162 if (!(initial_value
&& increment
&& comparison_value
7163 && invariant_p (comparison_value
) && invariant_p (increment
)
7164 && ! indirect_jump_in_function
))
7166 if (loop_dump_stream
) {
7167 fprintf (loop_dump_stream
,
7168 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7169 if (!(initial_value
&& increment
&& comparison_value
)) {
7170 fprintf (loop_dump_stream
, "\tbounds not available: ");
7171 if ( ! initial_value
)
7172 fprintf (loop_dump_stream
, "initial ");
7174 fprintf (loop_dump_stream
, "increment ");
7175 if ( ! comparison_value
)
7176 fprintf (loop_dump_stream
, "comparison ");
7177 fprintf (loop_dump_stream
, "\n");
7179 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7180 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7185 /* make sure that the increment is constant */
7186 if (GET_CODE (increment
) != CONST_INT
) {
7187 if (loop_dump_stream
)
7188 fprintf (loop_dump_stream
,
7189 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7194 /* make sure that the loop contains neither function call, nor jump on table.
7195 (the count register might be altered by the called function, and might
7196 be used for a branch on table). */
7197 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7198 if (GET_CODE (insn
) == CALL_INSN
){
7199 if (loop_dump_stream
)
7200 fprintf (loop_dump_stream
,
7201 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7206 if (GET_CODE (insn
) == JUMP_INSN
7207 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7208 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7209 if (loop_dump_stream
)
7210 fprintf (loop_dump_stream
,
7211 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7217 /* At this point, we are sure that the loop can be instrumented with BCT.
7218 Some of the loops, however, will not be instrumented - the final decision
7219 is taken by insert_bct () */
7220 if (loop_dump_stream
)
7221 fprintf (loop_dump_stream
,
7222 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7225 /* mark all enclosing loops that they cannot use count register */
7226 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7227 marking here may prevent instrumenting an enclosing loop that could
7228 actually be instrumented. But since this is rare, it is safer to mark
7229 here in case the order of calling (analyze/insert)_bct would be changed. */
7230 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7231 loop_used_count_register
[i
] = 1;
7233 /* Set data structures which will be used by the instrumentation phase */
7234 loop_start_value
[loop_num
] = initial_value
;
7235 loop_comparison_value
[loop_num
] = comparison_value
;
7236 loop_increment
[loop_num
] = increment
;
7237 loop_comparison_code
[loop_num
] = comparison_code
;
7238 loop_can_insert_bct
[loop_num
] = 1;
7242 /* instrument loop for insertion of bct instruction. We distinguish between
7243 loops with compile-time bounds, to those with run-time bounds. The loop
7244 behaviour is analized according to the following characteristics/variables:
7246 ; comparison-value: the value to which the iteration counter is compared.
7247 ; initial-value: iteration-counter initial value.
7248 ; increment: iteration-counter increment.
7249 ; Computed variables:
7250 ; increment-direction: the sign of the increment.
7251 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7252 ; range-direction: sign (comparison-value - initial-value)
7253 We give up on the following cases:
7254 ; loop variable overflow.
7255 ; run-time loop bounds with comparison code NE.
7259 insert_bct (loop_start
, loop_end
)
7260 rtx loop_start
, loop_end
;
7262 rtx initial_value
, comparison_value
, increment
;
7263 enum rtx_code comparison_code
;
7265 int increment_direction
, compare_direction
;
7268 /* if the loop condition is <= or >=, the number of iteration
7269 is 1 more than the range of the bounds of the loop */
7270 int add_iteration
= 0;
7272 /* the only machine mode we work with - is the integer of the size that the
7274 enum machine_mode loop_var_mode
= SImode
;
7276 int loop_num
= loop_number (loop_start
, loop_end
);
7278 /* get loop-variables. No need to check that these are valid - already
7279 checked in analyze_loop_iterations (). */
7280 comparison_code
= loop_comparison_code
[loop_num
];
7281 initial_value
= loop_start_value
[loop_num
];
7282 comparison_value
= loop_comparison_value
[loop_num
];
7283 increment
= loop_increment
[loop_num
];
7285 /* check analyze_loop_iterations decision for this loop. */
7286 if (! loop_can_insert_bct
[loop_num
]){
7287 if (loop_dump_stream
)
7288 fprintf (loop_dump_stream
,
7289 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7294 /* make sure that the loop was not fully unrolled. */
7295 if (loop_unroll_factor
[loop_num
] == -1){
7296 if (loop_dump_stream
)
7297 fprintf (loop_dump_stream
, "insert_bct %d: was completely unrolled\n", loop_num
);
7301 /* make sure that the last loop insn is a conditional jump .
7302 This check is repeated from analyze_loop_iterations (),
7303 because unrolling might have changed that. */
7304 if (!is_conditional_branch (PREV_INSN (loop_end
))){
7305 if (loop_dump_stream
)
7306 fprintf (loop_dump_stream
,
7307 "insert_bct: not instrumenting BCT because of invalid branch\n");
7311 /* fix increment in case loop was unrolled. */
7312 if (loop_unroll_factor
[loop_num
] > 1)
7313 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7315 /* determine properties and directions of the loop */
7316 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7317 switch ( comparison_code
) {
7322 compare_direction
= 1;
7329 compare_direction
= -1;
7333 /* in this case we cannot know the number of iterations */
7334 if (loop_dump_stream
)
7335 fprintf (loop_dump_stream
,
7336 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7343 compare_direction
= 1;
7349 compare_direction
= -1;
7352 compare_direction
= 0;
7359 /* make sure that the loop does not end by an overflow */
7360 if (compare_direction
!= increment_direction
) {
7361 if (loop_dump_stream
)
7362 fprintf (loop_dump_stream
,
7363 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7368 /* try to instrument the loop. */
7370 /* Handle the simpler case, where the bounds are known at compile time. */
7371 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7374 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7376 /* check the relation between compare-val and initial-val */
7377 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7378 int range_direction
= (difference
> 0) ? 1 : -1;
7380 /* make sure the loop executes enough iterations to gain from BCT */
7381 if (difference
> -3 && difference
< 3) {
7382 if (loop_dump_stream
)
7383 fprintf (loop_dump_stream
,
7384 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7389 /* make sure that the loop executes at least once */
7390 if ((range_direction
== 1 && compare_direction
== -1)
7391 || (range_direction
== -1 && compare_direction
== 1))
7393 if (loop_dump_stream
)
7394 fprintf (loop_dump_stream
,
7395 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7400 /* make sure that the loop does not end by an overflow (in compile time
7401 bounds we must have an additional check for overflow, because here
7402 we also support the compare code of 'NE'. */
7403 if (comparison_code
== NE
7404 && increment_direction
!= range_direction
) {
7405 if (loop_dump_stream
)
7406 fprintf (loop_dump_stream
,
7407 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7412 /* Determine the number of iterations by:
7414 ; compare-val - initial-val + (increment -1) + additional-iteration
7415 ; num_iterations = -----------------------------------------------------------------
7418 difference
= (range_direction
> 0) ? difference
: -difference
;
7420 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7421 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7422 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7423 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7424 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7427 if (increment_value_abs
== 0) {
7428 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7431 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7432 / increment_value_abs
;
7435 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7437 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7439 /* Done with this loop. */
7443 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7444 /* In this case we generate run_time calculation of the number of iterations */
7446 /* With runtime bounds, if the compare is of the form '!=' we give up */
7447 if (comparison_code
== NE
) {
7448 if (loop_dump_stream
)
7449 fprintf (loop_dump_stream
,
7450 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7456 /* We rely on the existence of run-time guard to ensure that the
7457 loop executes at least once. */
7459 rtx iterations_num_reg
;
7461 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7463 /* make sure that the increment is a power of two, otherwise (an
7464 expensive) divide is needed. */
7465 if ( !is_power_of_2(increment_value_abs
) )
7467 if (loop_dump_stream
)
7468 fprintf (loop_dump_stream
,
7469 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7473 /* compute the number of iterations */
7476 /* CYGNUS LOCAL: HAIFA bug fix */
7479 /* Again, the number of iterations is calculated by:
7481 ; compare-val - initial-val + (increment -1) + additional-iteration
7482 ; num_iterations = -----------------------------------------------------------------
7485 /* ??? Do we have to call copy_rtx here before passing rtx to
7487 if (compare_direction
> 0) {
7488 /* <, <= :the loop variable is increasing */
7489 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7490 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7493 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7494 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7497 if (increment_value_abs
- 1 + add_iteration
!= 0)
7498 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7499 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7500 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7502 if (increment_value_abs
!= 1)
7504 /* ??? This will generate an expensive divide instruction for
7505 most targets. The original authors apparently expected this
7506 to be a shift, since they test for power-of-2 divisors above,
7507 but just naively generating a divide instruction will not give
7508 a shift. It happens to work for the PowerPC target because
7509 the rs6000.md file has a divide pattern that emits shifts.
7510 It will probably not work for any other target. */
7511 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7513 GEN_INT (increment_value_abs
),
7514 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7517 iterations_num_reg
= temp_reg
;
7518 /* END CYGNUS LOCAL: HAIFA bug fix */
7520 sequence
= gen_sequence ();
7522 emit_insn_before (sequence
, loop_start
);
7523 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7527 /* instrument loop by inserting a bct in it. This is done in the following way:
7528 1. A new register is created and assigned the hard register number of the count
7530 2. In the head of the loop the new variable is initialized by the value passed in the
7531 loop_num_iterations parameter.
7532 3. At the end of the loop, comparison of the register with 0 is generated.
7533 The created comparison follows the pattern defined for the
7534 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7536 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7537 not used elsewhere, it will be eliminated by data-flow analisys. */
7540 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7541 rtx loop_start
, loop_end
;
7542 rtx loop_num_iterations
;
7544 rtx temp_reg1
, temp_reg2
;
7548 enum machine_mode loop_var_mode
= SImode
;
7550 #ifdef HAVE_decrement_and_branch_on_count
7551 if (HAVE_decrement_and_branch_on_count
)
7553 if (loop_dump_stream
)
7554 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7556 /* eliminate the check on the old variable */
7557 delete_insn (PREV_INSN (loop_end
));
7558 delete_insn (PREV_INSN (loop_end
));
7560 /* insert the label which will delimit the start of the loop */
7561 start_label
= gen_label_rtx ();
7562 emit_label_after (start_label
, loop_start
);
7564 /* insert initialization of the count register into the loop header */
7566 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7567 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7569 /* this will be count register */
7570 temp_reg2
= gen_rtx (REG
, loop_var_mode
, COUNT_REGISTER_REGNUM
);
7571 /* we have to move the value to the count register from an GPR
7572 because rtx pointed to by loop_num_iterations could contain
7573 expression which cannot be moved into count register */
7574 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7576 sequence
= gen_sequence ();
7578 emit_insn_after (sequence
, loop_start
);
7580 /* insert new comparison on the count register instead of the
7581 old one, generating the needed BCT pattern (that will be
7582 later recognized by assembly generation phase). */
7583 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7585 LABEL_NUSES (start_label
)++;
7588 #endif /* HAVE_decrement_and_branch_on_count */
7591 /* calculate the uid of the given loop */
7593 loop_number (loop_start
, loop_end
)
7594 rtx loop_start
, loop_end
;
7598 /* assume that this insn contains the LOOP_START
7599 note, so it will not be changed by the loop unrolling */
7600 loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7601 /* sanity check - should never happen */
7608 /* scan the function and determine whether it has indirect (computed) jump */
7610 indirect_jump_in_function_p (start
)
7614 int is_indirect_jump
= 0;
7616 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
)) {
7617 if (GET_CODE (insn
) == JUMP_INSN
) {
7618 if (GET_CODE (PATTERN (insn
)) == SET
) {
7619 rtx insn_work_code
= XEXP (PATTERN (insn
), 1);
7621 if (GET_CODE (insn_work_code
) == LABEL_REF
)
7623 if (GET_CODE (insn_work_code
) == IF_THEN_ELSE
) {
7624 rtx jump_target
= XEXP (insn_work_code
, 1);
7626 if (jump_target
== pc_rtx
7627 || (GET_CODE (jump_target
) == (enum rtx_code
)LABEL_REF
))
7631 is_indirect_jump
= 1;
7634 return is_indirect_jump
;
7637 /* return 1 iff n is a power of 2 */
7642 return (n
& (n
-1)) == 0;
7645 /* return 1 iff insn is a conditional jump */
7646 is_conditional_branch (insn
)
7650 if (GET_CODE (insn
) != JUMP_INSN
)
7652 work_code
= PATTERN (insn
);
7653 if (GET_CODE (work_code
) != SET
)
7655 if (GET_CODE (XEXP (work_code
, 1)) != IF_THEN_ELSE
)
7660 /* debugging: fix_bct_param () is called from toplev.c upon detection
7661 of the -fbct-***-N options. */
7663 fix_bct_param (param
, val
)
7666 if ( !strcmp (param
, "max") )
7667 dbg_bct_max
= atoi (val
);
7668 else if ( !strcmp (param
, "min") )
7669 dbg_bct_min
= atoi (val
);
7672 /* debugging: return 1 if the loop should be instrumented,
7673 according to bct-min/max. */
7677 static int dbg_bct_num
= 0;
7680 if (dbg_bct_num
> dbg_bct_min
|| dbg_bct_min
== -1)
7681 if (dbg_bct_num
<= dbg_bct_max
|| dbg_bct_max
== -1)
7686 /* END CYGNUS LOCAL haifa */