1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
53 /* Vector mapping INSN_UIDs to luids.
54 The luids are like uids but increase monotonically always.
55 We use them to see whether a jump comes from outside a given loop. */
59 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
60 number the insn is contained in. */
64 /* 1 + largest uid of any insn. */
68 /* 1 + luid of last insn. */
72 /* Number of loops detected in current function. Used as index to the
75 static int max_loop_num
;
77 /* Indexed by loop number, contains the first and last insn of each loop. */
79 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
81 /* For each loop, gives the containing loop number, -1 if none. */
85 #ifdef HAVE_decrement_and_branch_on_count
86 /* Records whether resource in use by inner loop. */
88 int *loop_used_count_register
;
89 #endif /* HAVE_decrement_and_branch_on_count */
91 /* For each loop, keep track of its unrolling factor.
95 -1: completely unrolled
96 >0: holds the unroll exact factor. */
97 int *loop_unroll_factor
;
99 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
100 really a loop (an insn outside the loop branches into it). */
102 static char *loop_invalid
;
104 /* Indexed by loop number, links together all LABEL_REFs which refer to
105 code labels outside the loop. Used by routines that need to know all
106 loop exits, such as final_biv_value and final_giv_value.
108 This does not include loop exits due to return instructions. This is
109 because all bivs and givs are pseudos, and hence must be dead after a
110 return, so the presense of a return does not affect any of the
111 optimizations that use this info. It is simpler to just not include return
112 instructions on this list. */
114 rtx
*loop_number_exit_labels
;
116 /* Indexed by loop number, counts the number of LABEL_REFs on
117 loop_number_exit_labels for this loop and all loops nested inside it. */
119 int *loop_number_exit_count
;
121 /* Holds the number of loop iterations. It is zero if the number could not be
122 calculated. Must be unsigned since the number of iterations can
123 be as high as 2^wordsize-1. For loops with a wider iterator, this number
124 will be zero if the number of loop iterations is too large for an
125 unsigned integer to hold. */
127 unsigned HOST_WIDE_INT loop_n_iterations
;
129 /* Nonzero if there is a subroutine call in the current loop. */
131 static int loop_has_call
;
133 /* Nonzero if there is a volatile memory reference in the current
136 static int loop_has_volatile
;
138 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
139 current loop. A continue statement will generate a branch to
140 NEXT_INSN (loop_continue). */
142 static rtx loop_continue
;
144 /* Indexed by register number, contains the number of times the reg
145 is set during the loop being scanned.
146 During code motion, a negative value indicates a reg that has been
147 made a candidate; in particular -2 means that it is an candidate that
148 we know is equal to a constant and -1 means that it is an candidate
149 not known equal to a constant.
150 After code motion, regs moved have 0 (which is accurate now)
151 while the failed candidates have the original number of times set.
153 Therefore, at all times, == 0 indicates an invariant register;
154 < 0 a conditionally invariant one. */
156 static varray_type n_times_set
;
158 /* Original value of n_times_set; same except that this value
159 is not set negative for a reg whose sets have been made candidates
160 and not set to 0 for a reg that is moved. */
162 static varray_type n_times_used
;
164 /* Index by register number, 1 indicates that the register
165 cannot be moved or strength reduced. */
167 static varray_type may_not_optimize
;
169 /* Nonzero means reg N has already been moved out of one loop.
170 This reduces the desire to move it out of another. */
172 static char *moved_once
;
174 /* Array of MEMs that are stored in this loop. If there are too many to fit
175 here, we just turn on unknown_address_altered. */
177 #define NUM_STORES 30
178 static rtx loop_store_mems
[NUM_STORES
];
180 /* Index of first available slot in above array. */
181 static int loop_store_mems_idx
;
183 typedef struct loop_mem_info
{
184 rtx mem
; /* The MEM itself. */
185 rtx reg
; /* Corresponding pseudo, if any. */
186 int optimize
; /* Nonzero if we can optimize access to this MEM. */
189 /* Array of MEMs that are used (read or written) in this loop, but
190 cannot be aliased by anything in this loop, except perhaps
191 themselves. In other words, if loop_mems[i] is altered during the
192 loop, it is altered by an expression that is rtx_equal_p to it. */
194 static loop_mem_info
*loop_mems
;
196 /* The index of the next available slot in LOOP_MEMS. */
198 static int loop_mems_idx
;
200 /* The number of elements allocated in LOOP_MEMs. */
202 static int loop_mems_allocated
;
204 /* Nonzero if we don't know what MEMs were changed in the current loop.
205 This happens if the loop contains a call (in which case `loop_has_call'
206 will also be set) or if we store into more than NUM_STORES MEMs. */
208 static int unknown_address_altered
;
210 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
211 static int num_movables
;
213 /* Count of memory write instructions discovered in the loop. */
214 static int num_mem_sets
;
216 /* Number of loops contained within the current one, including itself. */
217 static int loops_enclosed
;
219 /* Bound on pseudo register number before loop optimization.
220 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
221 int max_reg_before_loop
;
223 /* This obstack is used in product_cheap_p to allocate its rtl. It
224 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
225 If we used the same obstack that it did, we would be deallocating
228 static struct obstack temp_obstack
;
230 /* This is where the pointer to the obstack being used for RTL is stored. */
232 extern struct obstack
*rtl_obstack
;
234 #define obstack_chunk_alloc xmalloc
235 #define obstack_chunk_free free
237 /* During the analysis of a loop, a chain of `struct movable's
238 is made to record all the movable insns found.
239 Then the entire chain can be scanned to decide which to move. */
243 rtx insn
; /* A movable insn */
244 rtx set_src
; /* The expression this reg is set from. */
245 rtx set_dest
; /* The destination of this SET. */
246 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
247 of any registers used within the LIBCALL. */
248 int consec
; /* Number of consecutive following insns
249 that must be moved with this one. */
250 int regno
; /* The register it sets */
251 short lifetime
; /* lifetime of that register;
252 may be adjusted when matching movables
253 that load the same value are found. */
254 short savings
; /* Number of insns we can move for this reg,
255 including other movables that force this
256 or match this one. */
257 unsigned int cond
: 1; /* 1 if only conditionally movable */
258 unsigned int force
: 1; /* 1 means MUST move this insn */
259 unsigned int global
: 1; /* 1 means reg is live outside this loop */
260 /* If PARTIAL is 1, GLOBAL means something different:
261 that the reg is live outside the range from where it is set
262 to the following label. */
263 unsigned int done
: 1; /* 1 inhibits further processing of this */
265 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
266 In particular, moving it does not make it
268 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
269 load SRC, rather than copying INSN. */
270 unsigned int move_insn_first
:1;/* Same as above, if this is necessary for the
271 first insn of a consecutive sets group. */
272 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
273 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
274 that we should avoid changing when clearing
275 the rest of the reg. */
276 struct movable
*match
; /* First entry for same value */
277 struct movable
*forces
; /* An insn that must be moved if this is */
278 struct movable
*next
;
281 static struct movable
*the_movables
;
283 FILE *loop_dump_stream
;
285 /* Forward declarations. */
287 static void find_and_verify_loops
PROTO((rtx
));
288 static void mark_loop_jump
PROTO((rtx
, int));
289 static void prescan_loop
PROTO((rtx
, rtx
));
290 static int reg_in_basic_block_p
PROTO((rtx
, rtx
));
291 static int consec_sets_invariant_p
PROTO((rtx
, int, rtx
));
292 static rtx libcall_other_reg
PROTO((rtx
, rtx
));
293 static int labels_in_range_p
PROTO((rtx
, int));
294 static void count_loop_regs_set
PROTO((rtx
, rtx
, varray_type
, varray_type
,
296 static void note_addr_stored
PROTO((rtx
, rtx
));
297 static int loop_reg_used_before_p
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
));
298 static void scan_loop
PROTO((rtx
, rtx
, int, int));
300 static void replace_call_address
PROTO((rtx
, rtx
, rtx
));
302 static rtx skip_consec_insns
PROTO((rtx
, int));
303 static int libcall_benefit
PROTO((rtx
));
304 static void ignore_some_movables
PROTO((struct movable
*));
305 static void force_movables
PROTO((struct movable
*));
306 static void combine_movables
PROTO((struct movable
*, int));
307 static int regs_match_p
PROTO((rtx
, rtx
, struct movable
*));
308 static int rtx_equal_for_loop_p
PROTO((rtx
, rtx
, struct movable
*));
309 static void add_label_notes
PROTO((rtx
, rtx
));
310 static void move_movables
PROTO((struct movable
*, int, int, rtx
, rtx
, int));
311 static int count_nonfixed_reads
PROTO((rtx
));
312 static void strength_reduce
PROTO((rtx
, rtx
, rtx
, int, rtx
, rtx
, int, int));
313 static void find_single_use_in_loop
PROTO((rtx
, rtx
, varray_type
));
314 static int valid_initial_value_p
PROTO((rtx
, rtx
, int, rtx
));
315 static void find_mem_givs
PROTO((rtx
, rtx
, int, rtx
, rtx
));
316 static void record_biv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, int, int));
317 static void check_final_value
PROTO((struct induction
*, rtx
, rtx
));
318 static void record_giv
PROTO((struct induction
*, rtx
, rtx
, rtx
, rtx
, rtx
, int, enum g_types
, int, rtx
*, rtx
, rtx
));
319 static void update_giv_derive
PROTO((rtx
));
320 static int basic_induction_var
PROTO((rtx
, enum machine_mode
, rtx
, rtx
, rtx
*, rtx
*));
321 static rtx simplify_giv_expr
PROTO((rtx
, int *));
322 static int general_induction_var
PROTO((rtx
, rtx
*, rtx
*, rtx
*, int, int *));
323 static int consec_sets_giv
PROTO((int, rtx
, rtx
, rtx
, rtx
*, rtx
*));
324 static int check_dbra_loop
PROTO((rtx
, int, rtx
));
325 static rtx express_from_1
PROTO((rtx
, rtx
, rtx
));
326 static rtx express_from
PROTO((struct induction
*, struct induction
*));
327 static rtx combine_givs_p
PROTO((struct induction
*, struct induction
*));
328 static void combine_givs
PROTO((struct iv_class
*));
329 static int product_cheap_p
PROTO((rtx
, rtx
));
330 static int maybe_eliminate_biv
PROTO((struct iv_class
*, rtx
, rtx
, int, int, int));
331 static int maybe_eliminate_biv_1
PROTO((rtx
, rtx
, struct iv_class
*, int, rtx
));
332 static int last_use_this_basic_block
PROTO((rtx
, rtx
));
333 static void record_initial
PROTO((rtx
, rtx
));
334 static void update_reg_last_use
PROTO((rtx
, rtx
));
335 static rtx next_insn_in_loop
PROTO((rtx
, rtx
, rtx
, rtx
));
336 static void load_mems_and_recount_loop_regs_set
PROTO((rtx
, rtx
, rtx
,
339 static void load_mems
PROTO((rtx
, rtx
, rtx
, rtx
));
340 static int insert_loop_mem
PROTO((rtx
*, void *));
341 static int replace_loop_mem
PROTO((rtx
*, void *));
342 static int replace_label
PROTO((rtx
*, void *));
344 typedef struct rtx_and_int
{
349 typedef struct rtx_pair
{
354 /* Nonzero iff INSN is between START and END, inclusive. */
355 #define INSN_IN_RANGE_P(INSN, START, END) \
356 (INSN_UID (INSN) < max_uid_for_loop \
357 && INSN_LUID (INSN) >= INSN_LUID (START) \
358 && INSN_LUID (INSN) <= INSN_LUID (END))
360 #ifdef HAVE_decrement_and_branch_on_count
361 /* Test whether BCT applicable and safe. */
362 static void insert_bct
PROTO((rtx
, rtx
));
364 /* Auxiliary function that inserts the BCT pattern into the loop. */
365 static void instrument_loop_bct
PROTO((rtx
, rtx
, rtx
));
366 #endif /* HAVE_decrement_and_branch_on_count */
368 /* Indirect_jump_in_function is computed once per function. */
369 int indirect_jump_in_function
= 0;
370 static int indirect_jump_in_function_p
PROTO((rtx
));
373 /* Relative gain of eliminating various kinds of operations. */
376 static int shift_cost
;
377 static int mult_cost
;
380 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
381 copy the value of the strength reduced giv to its original register. */
382 static int copy_cost
;
384 /* Cost of using a register, to normalize the benefits of a giv. */
385 static int reg_address_cost
;
391 char *free_point
= (char *) oballoc (1);
392 rtx reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
394 add_cost
= rtx_cost (gen_rtx_PLUS (word_mode
, reg
, reg
), SET
);
397 reg_address_cost
= ADDRESS_COST (reg
);
399 reg_address_cost
= rtx_cost (reg
, MEM
);
402 /* We multiply by 2 to reconcile the difference in scale between
403 these two ways of computing costs. Otherwise the cost of a copy
404 will be far less than the cost of an add. */
408 /* Free the objects we just allocated. */
411 /* Initialize the obstack used for rtl in product_cheap_p. */
412 gcc_obstack_init (&temp_obstack
);
415 /* Entry point of this file. Perform loop optimization
416 on the current function. F is the first insn of the function
417 and DUMPFILE is a stream for output of a trace of actions taken
418 (or 0 if none should be output). */
421 loop_optimize (f
, dumpfile
, unroll_p
, bct_p
)
422 /* f is the first instruction of a chain of insns for one function */
431 loop_dump_stream
= dumpfile
;
433 init_recog_no_volatile ();
435 max_reg_before_loop
= max_reg_num ();
437 moved_once
= (char *) alloca (max_reg_before_loop
);
438 bzero (moved_once
, max_reg_before_loop
);
442 /* Count the number of loops. */
445 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
447 if (GET_CODE (insn
) == NOTE
448 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
452 /* Don't waste time if no loops. */
453 if (max_loop_num
== 0)
456 /* Get size to use for tables indexed by uids.
457 Leave some space for labels allocated by find_and_verify_loops. */
458 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
460 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
461 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
463 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
464 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
466 /* Allocate tables for recording each loop. We set each entry, so they need
468 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
469 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
470 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
471 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
472 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
473 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
475 /* This is initialized by the unrolling code, so we go ahead
476 and clear them just in case we are not performing loop
478 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
479 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
481 #ifdef HAVE_decrement_and_branch_on_count
482 /* Allocate for BCT optimization */
483 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
484 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
485 #endif /* HAVE_decrement_and_branch_on_count */
487 /* Find and process each loop.
488 First, find them, and record them in order of their beginnings. */
489 find_and_verify_loops (f
);
491 /* Now find all register lifetimes. This must be done after
492 find_and_verify_loops, because it might reorder the insns in the
494 reg_scan (f
, max_reg_num (), 1);
496 /* This must occur after reg_scan so that registers created by gcse
497 will have entries in the register tables.
499 We could have added a call to reg_scan after gcse_main in toplev.c,
500 but moving this call to init_alias_analysis is more efficient. */
501 init_alias_analysis ();
503 /* See if we went too far. */
504 if (get_max_uid () > max_uid_for_loop
)
506 /* Now reset it to the actual size we need. See above. */
507 max_uid_for_loop
= get_max_uid () + 1;
509 /* Compute the mapping from uids to luids.
510 LUIDs are numbers assigned to insns, like uids,
511 except that luids increase monotonically through the code.
512 Don't assign luids to line-number NOTEs, so that the distance in luids
513 between two insns is not affected by -g. */
515 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
518 if (GET_CODE (insn
) != NOTE
519 || NOTE_LINE_NUMBER (insn
) <= 0)
520 uid_luid
[INSN_UID (insn
)] = ++i
;
522 /* Give a line number note the same luid as preceding insn. */
523 uid_luid
[INSN_UID (insn
)] = i
;
528 /* Don't leave gaps in uid_luid for insns that have been
529 deleted. It is possible that the first or last insn
530 using some register has been deleted by cross-jumping.
531 Make sure that uid_luid for that former insn's uid
532 points to the general area where that insn used to be. */
533 for (i
= 0; i
< max_uid_for_loop
; i
++)
535 uid_luid
[0] = uid_luid
[i
];
536 if (uid_luid
[0] != 0)
539 for (i
= 0; i
< max_uid_for_loop
; i
++)
540 if (uid_luid
[i
] == 0)
541 uid_luid
[i
] = uid_luid
[i
- 1];
543 /* Create a mapping from loops to BLOCK tree nodes. */
544 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
545 find_loop_tree_blocks ();
547 /* Determine if the function has indirect jump. On some systems
548 this prevents low overhead loop instructions from being used. */
549 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
551 /* Now scan the loops, last ones first, since this means inner ones are done
552 before outer ones. */
553 for (i
= max_loop_num
-1; i
>= 0; i
--)
554 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
555 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
558 /* If debugging and unrolling loops, we must replicate the tree nodes
559 corresponding to the blocks inside the loop, so that the original one
560 to one mapping will remain. */
561 if (unroll_p
&& write_symbols
!= NO_DEBUG
)
562 unroll_block_trees ();
564 end_alias_analysis ();
567 /* Returns the next insn, in execution order, after INSN. START and
568 END are the NOTE_INSN_LOOP_BEG and NOTE_INSN_LOOP_END for the loop,
569 respectively. LOOP_TOP, if non-NULL, is the top of the loop in the
570 insn-stream; it is used with loops that are entered near the
574 next_insn_in_loop (insn
, start
, end
, loop_top
)
580 insn
= NEXT_INSN (insn
);
585 /* Go to the top of the loop, and continue there. */
599 /* Optimize one loop whose start is LOOP_START and end is END.
600 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
601 NOTE_INSN_LOOP_END. */
603 /* ??? Could also move memory writes out of loops if the destination address
604 is invariant, the source is invariant, the memory write is not volatile,
605 and if we can prove that no read inside the loop can read this address
606 before the write occurs. If there is a read of this address after the
607 write, then we can also mark the memory read as invariant. */
610 scan_loop (loop_start
, end
, unroll_p
, bct_p
)
616 /* 1 if we are scanning insns that could be executed zero times. */
618 /* 1 if we are scanning insns that might never be executed
619 due to a subroutine call which might exit before they are reached. */
621 /* For a rotated loop that is entered near the bottom,
622 this is the label at the top. Otherwise it is zero. */
624 /* Jump insn that enters the loop, or 0 if control drops in. */
625 rtx loop_entry_jump
= 0;
626 /* Place in the loop where control enters. */
628 /* Number of insns in the loop. */
633 /* The SET from an insn, if it is the only SET in the insn. */
635 /* Chain describing insns movable in current loop. */
636 struct movable
*movables
= 0;
637 /* Last element in `movables' -- so we can add elements at the end. */
638 struct movable
*last_movable
= 0;
639 /* Ratio of extra register life span we can justify
640 for saving an instruction. More if loop doesn't call subroutines
641 since in that case saving an insn makes more difference
642 and more registers are available. */
644 /* If we have calls, contains the insn in which a register was used
645 if it was used exactly once; contains const0_rtx if it was used more
647 varray_type reg_single_usage
= 0;
648 /* Nonzero if we are scanning instructions in a sub-loop. */
652 /* Determine whether this loop starts with a jump down to a test at
653 the end. This will occur for a small number of loops with a test
654 that is too complex to duplicate in front of the loop.
656 We search for the first insn or label in the loop, skipping NOTEs.
657 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
658 (because we might have a loop executed only once that contains a
659 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
660 (in case we have a degenerate loop).
662 Note that if we mistakenly think that a loop is entered at the top
663 when, in fact, it is entered at the exit test, the only effect will be
664 slightly poorer optimization. Making the opposite error can generate
665 incorrect code. Since very few loops now start with a jump to the
666 exit test, the code here to detect that case is very conservative. */
668 for (p
= NEXT_INSN (loop_start
);
670 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
671 && (GET_CODE (p
) != NOTE
672 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
673 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
679 /* Set up variables describing this loop. */
680 prescan_loop (loop_start
, end
);
681 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
683 /* If loop has a jump before the first label,
684 the true entry is the target of that jump.
685 Start scan from there.
686 But record in LOOP_TOP the place where the end-test jumps
687 back to so we can scan that after the end of the loop. */
688 if (GET_CODE (p
) == JUMP_INSN
)
692 /* Loop entry must be unconditional jump (and not a RETURN) */
694 && JUMP_LABEL (p
) != 0
695 /* Check to see whether the jump actually
696 jumps out of the loop (meaning it's no loop).
697 This case can happen for things like
698 do {..} while (0). If this label was generated previously
699 by loop, we can't tell anything about it and have to reject
701 && INSN_IN_RANGE_P (JUMP_LABEL (p
), loop_start
, end
))
703 loop_top
= next_label (scan_start
);
704 scan_start
= JUMP_LABEL (p
);
708 /* If SCAN_START was an insn created by loop, we don't know its luid
709 as required by loop_reg_used_before_p. So skip such loops. (This
710 test may never be true, but it's best to play it safe.)
712 Also, skip loops where we do not start scanning at a label. This
713 test also rejects loops starting with a JUMP_INSN that failed the
716 if (INSN_UID (scan_start
) >= max_uid_for_loop
717 || GET_CODE (scan_start
) != CODE_LABEL
)
719 if (loop_dump_stream
)
720 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
721 INSN_UID (loop_start
), INSN_UID (end
));
725 /* Count number of times each reg is set during this loop.
726 Set VARRAY_CHAR (may_not_optimize, I) if it is not safe to move out
727 the setting of register I. If this loop has calls, set
728 VARRAY_RTX (reg_single_usage, I). */
730 /* Allocate extra space for REGS that might be created by
731 load_mems. We allocate a little extra slop as well, in the hopes
732 that even after the moving of movables creates some new registers
733 we won't have to reallocate these arrays. However, we do grow
734 the arrays, if necessary, in load_mems_recount_loop_regs_set. */
735 nregs
= max_reg_num () + loop_mems_idx
+ 16;
736 VARRAY_INT_INIT (n_times_set
, nregs
, "n_times_set");
737 VARRAY_INT_INIT (n_times_used
, nregs
, "n_times_used");
738 VARRAY_CHAR_INIT (may_not_optimize
, nregs
, "may_not_optimize");
741 VARRAY_RTX_INIT (reg_single_usage
, nregs
, "reg_single_usage");
743 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
744 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
746 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
748 VARRAY_CHAR (may_not_optimize
, i
) = 1;
749 VARRAY_INT (n_times_set
, i
) = 1;
752 #ifdef AVOID_CCMODE_COPIES
753 /* Don't try to move insns which set CC registers if we should not
754 create CCmode register copies. */
755 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
756 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
757 VARRAY_CHAR (may_not_optimize
, i
) = 1;
760 bcopy ((char *) &n_times_set
->data
,
761 (char *) &n_times_used
->data
, nregs
* sizeof (int));
763 if (loop_dump_stream
)
765 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
766 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
768 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
769 INSN_UID (loop_continue
));
772 /* Scan through the loop finding insns that are safe to move.
773 Set n_times_set negative for the reg being set, so that
774 this reg will be considered invariant for subsequent insns.
775 We consider whether subsequent insns use the reg
776 in deciding whether it is worth actually moving.
778 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
779 and therefore it is possible that the insns we are scanning
780 would never be executed. At such times, we must make sure
781 that it is safe to execute the insn once instead of zero times.
782 When MAYBE_NEVER is 0, all insns will be executed at least once
783 so that is not a problem. */
785 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
787 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
789 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
790 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
792 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
793 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
796 if (GET_CODE (p
) == INSN
797 && (set
= single_set (p
))
798 && GET_CODE (SET_DEST (set
)) == REG
799 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
804 rtx src
= SET_SRC (set
);
805 rtx dependencies
= 0;
807 /* Figure out what to use as a source of this insn. If a REG_EQUIV
808 note is given or if a REG_EQUAL note with a constant operand is
809 specified, use it as the source and mark that we should move
810 this insn by calling emit_move_insn rather that duplicating the
813 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
815 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
817 src
= XEXP (temp
, 0), move_insn
= 1;
820 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
821 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
822 src
= XEXP (temp
, 0), move_insn
= 1;
823 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
825 src
= XEXP (temp
, 0);
826 /* A libcall block can use regs that don't appear in
827 the equivalent expression. To move the libcall,
828 we must move those regs too. */
829 dependencies
= libcall_other_reg (p
, src
);
833 /* Don't try to optimize a register that was made
834 by loop-optimization for an inner loop.
835 We don't know its life-span, so we can't compute the benefit. */
836 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
838 else if (/* The set is a user-variable or it is used in
839 the exit test (this can cause the variable to be
840 used before it is set just like a
842 (REG_USERVAR_P (SET_DEST (set
))
843 || REG_LOOP_TEST_P (SET_DEST (set
)))
844 /* And the set is not guaranteed to be executed one
845 the loop starts, or the value before the set is
846 needed before the set occurs... */
848 || loop_reg_used_before_p (set
, p
, loop_start
,
850 /* And the register is used in basic blocks other
851 than the one where it is set (meaning that
852 something after this point in the loop might
853 depend on its value before the set). */
854 && !reg_in_basic_block_p (p
, SET_DEST (set
)))
855 /* It is unsafe to move the set. The fact that these
856 three conditions are considered in conjunction means
857 that we are assuming various conditions, such as:
859 o It's OK to move a set of a variable which was not
860 created by the user and is not used in an exit test
861 even if that point in the set would not be reached
862 during execution of the loop. */
864 else if ((tem
= invariant_p (src
))
865 && (dependencies
== 0
866 || (tem2
= invariant_p (dependencies
)) != 0)
867 && (VARRAY_INT (n_times_set
,
868 REGNO (SET_DEST (set
))) == 1
870 = consec_sets_invariant_p
872 VARRAY_INT (n_times_set
, REGNO (SET_DEST (set
))),
874 /* If the insn can cause a trap (such as divide by zero),
875 can't move it unless it's guaranteed to be executed
876 once loop is entered. Even a function call might
877 prevent the trap insn from being reached
878 (since it might exit!) */
879 && ! ((maybe_never
|| call_passed
)
880 && may_trap_p (src
)))
882 register struct movable
*m
;
883 register int regno
= REGNO (SET_DEST (set
));
885 /* A potential lossage is where we have a case where two insns
886 can be combined as long as they are both in the loop, but
887 we move one of them outside the loop. For large loops,
888 this can lose. The most common case of this is the address
889 of a function being called.
891 Therefore, if this register is marked as being used exactly
892 once if we are in a loop with calls (a "large loop"), see if
893 we can replace the usage of this register with the source
894 of this SET. If we can, delete this insn.
896 Don't do this if P has a REG_RETVAL note or if we have
897 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
899 if (reg_single_usage
&& VARRAY_RTX (reg_single_usage
, regno
) != 0
900 && VARRAY_RTX (reg_single_usage
, regno
) != const0_rtx
901 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
902 && (REGNO_LAST_UID (regno
)
903 == INSN_UID (VARRAY_RTX (reg_single_usage
, regno
)))
904 && VARRAY_INT (n_times_set
, regno
) == 1
905 && ! side_effects_p (SET_SRC (set
))
906 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
907 && (! SMALL_REGISTER_CLASSES
908 || (! (GET_CODE (SET_SRC (set
)) == REG
909 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
910 /* This test is not redundant; SET_SRC (set) might be
911 a call-clobbered register and the life of REGNO
912 might span a call. */
913 && ! modified_between_p (SET_SRC (set
), p
,
915 (reg_single_usage
, regno
))
916 && no_labels_between_p (p
, VARRAY_RTX (reg_single_usage
, regno
))
917 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
919 (reg_single_usage
, regno
)))
921 /* Replace any usage in a REG_EQUAL note. Must copy the
922 new source, so that we don't get rtx sharing between the
923 SET_SOURCE and REG_NOTES of insn p. */
924 REG_NOTES (VARRAY_RTX (reg_single_usage
, regno
))
925 = replace_rtx (REG_NOTES (VARRAY_RTX
926 (reg_single_usage
, regno
)),
927 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
930 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
931 NOTE_SOURCE_FILE (p
) = 0;
932 VARRAY_INT (n_times_set
, regno
) = 0;
936 m
= (struct movable
*) alloca (sizeof (struct movable
));
940 m
->dependencies
= dependencies
;
941 m
->set_dest
= SET_DEST (set
);
943 m
->consec
= VARRAY_INT (n_times_set
,
944 REGNO (SET_DEST (set
))) - 1;
948 m
->move_insn
= move_insn
;
949 m
->move_insn_first
= 0;
950 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
951 m
->savemode
= VOIDmode
;
953 /* Set M->cond if either invariant_p or consec_sets_invariant_p
954 returned 2 (only conditionally invariant). */
955 m
->cond
= ((tem
| tem1
| tem2
) > 1);
956 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
957 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
959 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
960 - uid_luid
[REGNO_FIRST_UID (regno
)]);
961 m
->savings
= VARRAY_INT (n_times_used
, regno
);
962 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
963 m
->savings
+= libcall_benefit (p
);
964 VARRAY_INT (n_times_set
, regno
) = move_insn
? -2 : -1;
965 /* Add M to the end of the chain MOVABLES. */
969 last_movable
->next
= m
;
974 /* It is possible for the first instruction to have a
975 REG_EQUAL note but a non-invariant SET_SRC, so we must
976 remember the status of the first instruction in case
977 the last instruction doesn't have a REG_EQUAL note. */
978 m
->move_insn_first
= m
->move_insn
;
980 /* Skip this insn, not checking REG_LIBCALL notes. */
981 p
= next_nonnote_insn (p
);
982 /* Skip the consecutive insns, if there are any. */
983 p
= skip_consec_insns (p
, m
->consec
);
984 /* Back up to the last insn of the consecutive group. */
985 p
= prev_nonnote_insn (p
);
987 /* We must now reset m->move_insn, m->is_equiv, and possibly
988 m->set_src to correspond to the effects of all the
990 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
992 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
995 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
996 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
997 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
1002 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
1005 /* If this register is always set within a STRICT_LOW_PART
1006 or set to zero, then its high bytes are constant.
1007 So clear them outside the loop and within the loop
1008 just load the low bytes.
1009 We must check that the machine has an instruction to do so.
1010 Also, if the value loaded into the register
1011 depends on the same register, this cannot be done. */
1012 else if (SET_SRC (set
) == const0_rtx
1013 && GET_CODE (NEXT_INSN (p
)) == INSN
1014 && (set1
= single_set (NEXT_INSN (p
)))
1015 && GET_CODE (set1
) == SET
1016 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
1017 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
1018 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
1020 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
1022 register int regno
= REGNO (SET_DEST (set
));
1023 if (VARRAY_INT (n_times_set
, regno
) == 2)
1025 register struct movable
*m
;
1026 m
= (struct movable
*) alloca (sizeof (struct movable
));
1029 m
->set_dest
= SET_DEST (set
);
1030 m
->dependencies
= 0;
1036 m
->move_insn_first
= 0;
1038 /* If the insn may not be executed on some cycles,
1039 we can't clear the whole reg; clear just high part.
1040 Not even if the reg is used only within this loop.
1047 Clearing x before the inner loop could clobber a value
1048 being saved from the last time around the outer loop.
1049 However, if the reg is not used outside this loop
1050 and all uses of the register are in the same
1051 basic block as the store, there is no problem.
1053 If this insn was made by loop, we don't know its
1054 INSN_LUID and hence must make a conservative
1056 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
1057 || (uid_luid
[REGNO_LAST_UID (regno
)]
1059 || (uid_luid
[REGNO_FIRST_UID (regno
)]
1061 || (labels_in_range_p
1062 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
1063 if (maybe_never
&& m
->global
)
1064 m
->savemode
= GET_MODE (SET_SRC (set1
));
1066 m
->savemode
= VOIDmode
;
1070 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
1071 - uid_luid
[REGNO_FIRST_UID (regno
)]);
1073 VARRAY_INT (n_times_set
, regno
) = -1;
1074 /* Add M to the end of the chain MOVABLES. */
1078 last_movable
->next
= m
;
1083 /* Past a call insn, we get to insns which might not be executed
1084 because the call might exit. This matters for insns that trap.
1085 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1086 so they don't count. */
1087 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1089 /* Past a label or a jump, we get to insns for which we
1090 can't count on whether or how many times they will be
1091 executed during each iteration. Therefore, we can
1092 only move out sets of trivial variables
1093 (those not used after the loop). */
1094 /* Similar code appears twice in strength_reduce. */
1095 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1096 /* If we enter the loop in the middle, and scan around to the
1097 beginning, don't set maybe_never for that. This must be an
1098 unconditional jump, otherwise the code at the top of the
1099 loop might never be executed. Unconditional jumps are
1100 followed a by barrier then loop end. */
1101 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1102 && NEXT_INSN (NEXT_INSN (p
)) == end
1103 && simplejump_p (p
)))
1105 else if (GET_CODE (p
) == NOTE
)
1107 /* At the virtual top of a converted loop, insns are again known to
1108 be executed: logically, the loop begins here even though the exit
1109 code has been duplicated. */
1110 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1111 maybe_never
= call_passed
= 0;
1112 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1114 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1119 /* If one movable subsumes another, ignore that other. */
1121 ignore_some_movables (movables
);
1123 /* For each movable insn, see if the reg that it loads
1124 leads when it dies right into another conditionally movable insn.
1125 If so, record that the second insn "forces" the first one,
1126 since the second can be moved only if the first is. */
1128 force_movables (movables
);
1130 /* See if there are multiple movable insns that load the same value.
1131 If there are, make all but the first point at the first one
1132 through the `match' field, and add the priorities of them
1133 all together as the priority of the first. */
1135 combine_movables (movables
, nregs
);
1137 /* Now consider each movable insn to decide whether it is worth moving.
1138 Store 0 in n_times_set for each reg that is moved.
1140 Generally this increases code size, so do not move moveables when
1141 optimizing for code size. */
1143 if (! optimize_size
)
1144 move_movables (movables
, threshold
,
1145 insn_count
, loop_start
, end
, nregs
);
1147 /* Now candidates that still are negative are those not moved.
1148 Change n_times_set to indicate that those are not actually invariant. */
1149 for (i
= 0; i
< nregs
; i
++)
1150 if (VARRAY_INT (n_times_set
, i
) < 0)
1151 VARRAY_INT (n_times_set
, i
) = VARRAY_INT (n_times_used
, i
);
1153 /* Now that we've moved some things out of the loop, we able to
1154 hoist even more memory references. There's no need to pass
1155 reg_single_usage this time, since we're done with it. */
1156 load_mems_and_recount_loop_regs_set (scan_start
, end
, loop_top
,
1160 if (flag_strength_reduce
)
1162 the_movables
= movables
;
1163 strength_reduce (scan_start
, end
, loop_top
,
1164 insn_count
, loop_start
, end
, unroll_p
, bct_p
);
1167 VARRAY_FREE (n_times_set
);
1168 VARRAY_FREE (n_times_used
);
1169 VARRAY_FREE (may_not_optimize
);
1170 VARRAY_FREE (reg_single_usage
);
1173 /* Add elements to *OUTPUT to record all the pseudo-regs
1174 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1177 record_excess_regs (in_this
, not_in_this
, output
)
1178 rtx in_this
, not_in_this
;
1185 code
= GET_CODE (in_this
);
1199 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1200 && ! reg_mentioned_p (in_this
, not_in_this
))
1201 *output
= gen_rtx_EXPR_LIST (VOIDmode
, in_this
, *output
);
1208 fmt
= GET_RTX_FORMAT (code
);
1209 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1216 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1217 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1221 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1227 /* Check what regs are referred to in the libcall block ending with INSN,
1228 aside from those mentioned in the equivalent value.
1229 If there are none, return 0.
1230 If there are one or more, return an EXPR_LIST containing all of them. */
1233 libcall_other_reg (insn
, equiv
)
1236 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1237 rtx p
= XEXP (note
, 0);
1240 /* First, find all the regs used in the libcall block
1241 that are not mentioned as inputs to the result. */
1245 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1246 || GET_CODE (p
) == CALL_INSN
)
1247 record_excess_regs (PATTERN (p
), equiv
, &output
);
1254 /* Return 1 if all uses of REG
1255 are between INSN and the end of the basic block. */
1258 reg_in_basic_block_p (insn
, reg
)
1261 int regno
= REGNO (reg
);
1264 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1267 /* Search this basic block for the already recorded last use of the reg. */
1268 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1270 switch (GET_CODE (p
))
1277 /* Ordinary insn: if this is the last use, we win. */
1278 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1283 /* Jump insn: if this is the last use, we win. */
1284 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1286 /* Otherwise, it's the end of the basic block, so we lose. */
1291 /* It's the end of the basic block, so we lose. */
1299 /* The "last use" doesn't follow the "first use"?? */
1303 /* Compute the benefit of eliminating the insns in the block whose
1304 last insn is LAST. This may be a group of insns used to compute a
1305 value directly or can contain a library call. */
1308 libcall_benefit (last
)
1314 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1315 insn
!= last
; insn
= NEXT_INSN (insn
))
1317 if (GET_CODE (insn
) == CALL_INSN
)
1318 benefit
+= 10; /* Assume at least this many insns in a library
1320 else if (GET_CODE (insn
) == INSN
1321 && GET_CODE (PATTERN (insn
)) != USE
1322 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1329 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1332 skip_consec_insns (insn
, count
)
1336 for (; count
> 0; count
--)
1340 /* If first insn of libcall sequence, skip to end. */
1341 /* Do this at start of loop, since INSN is guaranteed to
1343 if (GET_CODE (insn
) != NOTE
1344 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1345 insn
= XEXP (temp
, 0);
1347 do insn
= NEXT_INSN (insn
);
1348 while (GET_CODE (insn
) == NOTE
);
1354 /* Ignore any movable whose insn falls within a libcall
1355 which is part of another movable.
1356 We make use of the fact that the movable for the libcall value
1357 was made later and so appears later on the chain. */
1360 ignore_some_movables (movables
)
1361 struct movable
*movables
;
1363 register struct movable
*m
, *m1
;
1365 for (m
= movables
; m
; m
= m
->next
)
1367 /* Is this a movable for the value of a libcall? */
1368 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1372 /* Check for earlier movables inside that range,
1373 and mark them invalid. We cannot use LUIDs here because
1374 insns created by loop.c for prior loops don't have LUIDs.
1375 Rather than reject all such insns from movables, we just
1376 explicitly check each insn in the libcall (since invariant
1377 libcalls aren't that common). */
1378 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1379 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1380 if (m1
->insn
== insn
)
1386 /* For each movable insn, see if the reg that it loads
1387 leads when it dies right into another conditionally movable insn.
1388 If so, record that the second insn "forces" the first one,
1389 since the second can be moved only if the first is. */
1392 force_movables (movables
)
1393 struct movable
*movables
;
1395 register struct movable
*m
, *m1
;
1396 for (m1
= movables
; m1
; m1
= m1
->next
)
1397 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1398 if (!m1
->partial
&& !m1
->done
)
1400 int regno
= m1
->regno
;
1401 for (m
= m1
->next
; m
; m
= m
->next
)
1402 /* ??? Could this be a bug? What if CSE caused the
1403 register of M1 to be used after this insn?
1404 Since CSE does not update regno_last_uid,
1405 this insn M->insn might not be where it dies.
1406 But very likely this doesn't matter; what matters is
1407 that M's reg is computed from M1's reg. */
1408 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1411 if (m
!= 0 && m
->set_src
== m1
->set_dest
1412 /* If m->consec, m->set_src isn't valid. */
1416 /* Increase the priority of the moving the first insn
1417 since it permits the second to be moved as well. */
1421 m1
->lifetime
+= m
->lifetime
;
1422 m1
->savings
+= m
->savings
;
1427 /* Find invariant expressions that are equal and can be combined into
1431 combine_movables (movables
, nregs
)
1432 struct movable
*movables
;
1435 register struct movable
*m
;
1436 char *matched_regs
= (char *) alloca (nregs
);
1437 enum machine_mode mode
;
1439 /* Regs that are set more than once are not allowed to match
1440 or be matched. I'm no longer sure why not. */
1441 /* Perhaps testing m->consec_sets would be more appropriate here? */
1443 for (m
= movables
; m
; m
= m
->next
)
1444 if (m
->match
== 0 && VARRAY_INT (n_times_used
, m
->regno
) == 1 && !m
->partial
)
1446 register struct movable
*m1
;
1447 int regno
= m
->regno
;
1449 bzero (matched_regs
, nregs
);
1450 matched_regs
[regno
] = 1;
1452 /* We want later insns to match the first one. Don't make the first
1453 one match any later ones. So start this loop at m->next. */
1454 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1455 if (m
!= m1
&& m1
->match
== 0 && VARRAY_INT (n_times_used
, m1
->regno
) == 1
1456 /* A reg used outside the loop mustn't be eliminated. */
1458 /* A reg used for zero-extending mustn't be eliminated. */
1460 && (matched_regs
[m1
->regno
]
1463 /* Can combine regs with different modes loaded from the
1464 same constant only if the modes are the same or
1465 if both are integer modes with M wider or the same
1466 width as M1. The check for integer is redundant, but
1467 safe, since the only case of differing destination
1468 modes with equal sources is when both sources are
1469 VOIDmode, i.e., CONST_INT. */
1470 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1471 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1472 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1473 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1474 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1475 /* See if the source of M1 says it matches M. */
1476 && ((GET_CODE (m1
->set_src
) == REG
1477 && matched_regs
[REGNO (m1
->set_src
)])
1478 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1480 && ((m
->dependencies
== m1
->dependencies
)
1481 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1483 m
->lifetime
+= m1
->lifetime
;
1484 m
->savings
+= m1
->savings
;
1487 matched_regs
[m1
->regno
] = 1;
1491 /* Now combine the regs used for zero-extension.
1492 This can be done for those not marked `global'
1493 provided their lives don't overlap. */
1495 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1496 mode
= GET_MODE_WIDER_MODE (mode
))
1498 register struct movable
*m0
= 0;
1500 /* Combine all the registers for extension from mode MODE.
1501 Don't combine any that are used outside this loop. */
1502 for (m
= movables
; m
; m
= m
->next
)
1503 if (m
->partial
&& ! m
->global
1504 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1506 register struct movable
*m1
;
1507 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1508 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1512 /* First one: don't check for overlap, just record it. */
1517 /* Make sure they extend to the same mode.
1518 (Almost always true.) */
1519 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1522 /* We already have one: check for overlap with those
1523 already combined together. */
1524 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1525 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1526 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1527 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1530 /* No overlap: we can combine this with the others. */
1531 m0
->lifetime
+= m
->lifetime
;
1532 m0
->savings
+= m
->savings
;
1541 /* Return 1 if regs X and Y will become the same if moved. */
1544 regs_match_p (x
, y
, movables
)
1546 struct movable
*movables
;
1550 struct movable
*mx
, *my
;
1552 for (mx
= movables
; mx
; mx
= mx
->next
)
1553 if (mx
->regno
== xn
)
1556 for (my
= movables
; my
; my
= my
->next
)
1557 if (my
->regno
== yn
)
1561 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1563 || mx
== my
->match
));
1566 /* Return 1 if X and Y are identical-looking rtx's.
1567 This is the Lisp function EQUAL for rtx arguments.
1569 If two registers are matching movables or a movable register and an
1570 equivalent constant, consider them equal. */
1573 rtx_equal_for_loop_p (x
, y
, movables
)
1575 struct movable
*movables
;
1579 register struct movable
*m
;
1580 register enum rtx_code code
;
1585 if (x
== 0 || y
== 0)
1588 code
= GET_CODE (x
);
1590 /* If we have a register and a constant, they may sometimes be
1592 if (GET_CODE (x
) == REG
&& VARRAY_INT (n_times_set
, REGNO (x
)) == -2
1595 for (m
= movables
; m
; m
= m
->next
)
1596 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1597 && rtx_equal_p (m
->set_src
, y
))
1600 else if (GET_CODE (y
) == REG
&& VARRAY_INT (n_times_set
, REGNO (y
)) == -2
1603 for (m
= movables
; m
; m
= m
->next
)
1604 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1605 && rtx_equal_p (m
->set_src
, x
))
1609 /* Otherwise, rtx's of different codes cannot be equal. */
1610 if (code
!= GET_CODE (y
))
1613 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1614 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1616 if (GET_MODE (x
) != GET_MODE (y
))
1619 /* These three types of rtx's can be compared nonrecursively. */
1621 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1623 if (code
== LABEL_REF
)
1624 return XEXP (x
, 0) == XEXP (y
, 0);
1625 if (code
== SYMBOL_REF
)
1626 return XSTR (x
, 0) == XSTR (y
, 0);
1628 /* Compare the elements. If any pair of corresponding elements
1629 fail to match, return 0 for the whole things. */
1631 fmt
= GET_RTX_FORMAT (code
);
1632 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1637 if (XWINT (x
, i
) != XWINT (y
, i
))
1642 if (XINT (x
, i
) != XINT (y
, i
))
1647 /* Two vectors must have the same length. */
1648 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1651 /* And the corresponding elements must match. */
1652 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1653 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1658 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1663 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1668 /* These are just backpointers, so they don't matter. */
1674 /* It is believed that rtx's at this level will never
1675 contain anything but integers and other rtx's,
1676 except for within LABEL_REFs and SYMBOL_REFs. */
1684 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1685 insns in INSNS which use thet reference. */
1688 add_label_notes (x
, insns
)
1692 enum rtx_code code
= GET_CODE (x
);
1697 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1699 /* This code used to ignore labels that referred to dispatch tables to
1700 avoid flow generating (slighly) worse code.
1702 We no longer ignore such label references (see LABEL_REF handling in
1703 mark_jump_label for additional information). */
1704 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1705 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1706 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
, XEXP (x
, 0),
1710 fmt
= GET_RTX_FORMAT (code
);
1711 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1714 add_label_notes (XEXP (x
, i
), insns
);
1715 else if (fmt
[i
] == 'E')
1716 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1717 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1721 /* Scan MOVABLES, and move the insns that deserve to be moved.
1722 If two matching movables are combined, replace one reg with the
1723 other throughout. */
1726 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1727 struct movable
*movables
;
1735 register struct movable
*m
;
1737 /* Map of pseudo-register replacements to handle combining
1738 when we move several insns that load the same value
1739 into different pseudo-registers. */
1740 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1741 char *already_moved
= (char *) alloca (nregs
);
1743 bzero (already_moved
, nregs
);
1744 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1748 for (m
= movables
; m
; m
= m
->next
)
1750 /* Describe this movable insn. */
1752 if (loop_dump_stream
)
1754 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1755 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1757 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1759 fprintf (loop_dump_stream
, "cond ");
1761 fprintf (loop_dump_stream
, "force ");
1763 fprintf (loop_dump_stream
, "global ");
1765 fprintf (loop_dump_stream
, "done ");
1767 fprintf (loop_dump_stream
, "move-insn ");
1769 fprintf (loop_dump_stream
, "matches %d ",
1770 INSN_UID (m
->match
->insn
));
1772 fprintf (loop_dump_stream
, "forces %d ",
1773 INSN_UID (m
->forces
->insn
));
1776 /* Count movables. Value used in heuristics in strength_reduce. */
1779 /* Ignore the insn if it's already done (it matched something else).
1780 Otherwise, see if it is now safe to move. */
1784 || (1 == invariant_p (m
->set_src
)
1785 && (m
->dependencies
== 0
1786 || 1 == invariant_p (m
->dependencies
))
1788 || 1 == consec_sets_invariant_p (m
->set_dest
,
1791 && (! m
->forces
|| m
->forces
->done
))
1795 int savings
= m
->savings
;
1797 /* We have an insn that is safe to move.
1798 Compute its desirability. */
1803 if (loop_dump_stream
)
1804 fprintf (loop_dump_stream
, "savings %d ", savings
);
1806 if (moved_once
[regno
] && loop_dump_stream
)
1807 fprintf (loop_dump_stream
, "halved since already moved ");
1809 /* An insn MUST be moved if we already moved something else
1810 which is safe only if this one is moved too: that is,
1811 if already_moved[REGNO] is nonzero. */
1813 /* An insn is desirable to move if the new lifetime of the
1814 register is no more than THRESHOLD times the old lifetime.
1815 If it's not desirable, it means the loop is so big
1816 that moving won't speed things up much,
1817 and it is liable to make register usage worse. */
1819 /* It is also desirable to move if it can be moved at no
1820 extra cost because something else was already moved. */
1822 if (already_moved
[regno
]
1823 || flag_move_all_movables
1824 || (threshold
* savings
* m
->lifetime
) >=
1825 (moved_once
[regno
] ? insn_count
* 2 : insn_count
)
1826 || (m
->forces
&& m
->forces
->done
1827 && VARRAY_INT (n_times_used
, m
->forces
->regno
) == 1))
1830 register struct movable
*m1
;
1833 /* Now move the insns that set the reg. */
1835 if (m
->partial
&& m
->match
)
1839 /* Find the end of this chain of matching regs.
1840 Thus, we load each reg in the chain from that one reg.
1841 And that reg is loaded with 0 directly,
1842 since it has ->match == 0. */
1843 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1844 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1845 SET_DEST (PATTERN (m1
->insn
)));
1846 i1
= emit_insn_before (newpat
, loop_start
);
1848 /* Mark the moved, invariant reg as being allowed to
1849 share a hard reg with the other matching invariant. */
1850 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1851 r1
= SET_DEST (PATTERN (m
->insn
));
1852 r2
= SET_DEST (PATTERN (m1
->insn
));
1854 = gen_rtx_EXPR_LIST (VOIDmode
, r1
,
1855 gen_rtx_EXPR_LIST (VOIDmode
, r2
,
1857 delete_insn (m
->insn
);
1862 if (loop_dump_stream
)
1863 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1865 /* If we are to re-generate the item being moved with a
1866 new move insn, first delete what we have and then emit
1867 the move insn before the loop. */
1868 else if (m
->move_insn
)
1872 for (count
= m
->consec
; count
>= 0; count
--)
1874 /* If this is the first insn of a library call sequence,
1876 if (GET_CODE (p
) != NOTE
1877 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1880 /* If this is the last insn of a libcall sequence, then
1881 delete every insn in the sequence except the last.
1882 The last insn is handled in the normal manner. */
1883 if (GET_CODE (p
) != NOTE
1884 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1886 temp
= XEXP (temp
, 0);
1888 temp
= delete_insn (temp
);
1892 p
= delete_insn (p
);
1894 /* simplify_giv_expr expects that it can walk the insns
1895 at m->insn forwards and see this old sequence we are
1896 tossing here. delete_insn does preserve the next
1897 pointers, but when we skip over a NOTE we must fix
1898 it up. Otherwise that code walks into the non-deleted
1900 while (p
&& GET_CODE (p
) == NOTE
)
1901 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
1905 emit_move_insn (m
->set_dest
, m
->set_src
);
1906 temp
= get_insns ();
1909 add_label_notes (m
->set_src
, temp
);
1911 i1
= emit_insns_before (temp
, loop_start
);
1912 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1914 = gen_rtx_EXPR_LIST (m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1915 m
->set_src
, REG_NOTES (i1
));
1917 if (loop_dump_stream
)
1918 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1920 /* The more regs we move, the less we like moving them. */
1925 for (count
= m
->consec
; count
>= 0; count
--)
1929 /* If first insn of libcall sequence, skip to end. */
1930 /* Do this at start of loop, since p is guaranteed to
1932 if (GET_CODE (p
) != NOTE
1933 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1936 /* If last insn of libcall sequence, move all
1937 insns except the last before the loop. The last
1938 insn is handled in the normal manner. */
1939 if (GET_CODE (p
) != NOTE
1940 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1944 rtx fn_address_insn
= 0;
1947 for (temp
= XEXP (temp
, 0); temp
!= p
;
1948 temp
= NEXT_INSN (temp
))
1954 if (GET_CODE (temp
) == NOTE
)
1957 body
= PATTERN (temp
);
1959 /* Find the next insn after TEMP,
1960 not counting USE or NOTE insns. */
1961 for (next
= NEXT_INSN (temp
); next
!= p
;
1962 next
= NEXT_INSN (next
))
1963 if (! (GET_CODE (next
) == INSN
1964 && GET_CODE (PATTERN (next
)) == USE
)
1965 && GET_CODE (next
) != NOTE
)
1968 /* If that is the call, this may be the insn
1969 that loads the function address.
1971 Extract the function address from the insn
1972 that loads it into a register.
1973 If this insn was cse'd, we get incorrect code.
1975 So emit a new move insn that copies the
1976 function address into the register that the
1977 call insn will use. flow.c will delete any
1978 redundant stores that we have created. */
1979 if (GET_CODE (next
) == CALL_INSN
1980 && GET_CODE (body
) == SET
1981 && GET_CODE (SET_DEST (body
)) == REG
1982 && (n
= find_reg_note (temp
, REG_EQUAL
,
1985 fn_reg
= SET_SRC (body
);
1986 if (GET_CODE (fn_reg
) != REG
)
1987 fn_reg
= SET_DEST (body
);
1988 fn_address
= XEXP (n
, 0);
1989 fn_address_insn
= temp
;
1991 /* We have the call insn.
1992 If it uses the register we suspect it might,
1993 load it with the correct address directly. */
1994 if (GET_CODE (temp
) == CALL_INSN
1996 && reg_referenced_p (fn_reg
, body
))
1997 emit_insn_after (gen_move_insn (fn_reg
,
2001 if (GET_CODE (temp
) == CALL_INSN
)
2003 i1
= emit_call_insn_before (body
, loop_start
);
2004 /* Because the USAGE information potentially
2005 contains objects other than hard registers
2006 we need to copy it. */
2007 if (CALL_INSN_FUNCTION_USAGE (temp
))
2008 CALL_INSN_FUNCTION_USAGE (i1
)
2009 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
2012 i1
= emit_insn_before (body
, loop_start
);
2015 if (temp
== fn_address_insn
)
2016 fn_address_insn
= i1
;
2017 REG_NOTES (i1
) = REG_NOTES (temp
);
2021 if (m
->savemode
!= VOIDmode
)
2023 /* P sets REG to zero; but we should clear only
2024 the bits that are not covered by the mode
2026 rtx reg
= m
->set_dest
;
2032 (GET_MODE (reg
), and_optab
, reg
,
2033 GEN_INT ((((HOST_WIDE_INT
) 1
2034 << GET_MODE_BITSIZE (m
->savemode
)))
2036 reg
, 1, OPTAB_LIB_WIDEN
);
2040 emit_move_insn (reg
, tem
);
2041 sequence
= gen_sequence ();
2043 i1
= emit_insn_before (sequence
, loop_start
);
2045 else if (GET_CODE (p
) == CALL_INSN
)
2047 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
2048 /* Because the USAGE information potentially
2049 contains objects other than hard registers
2050 we need to copy it. */
2051 if (CALL_INSN_FUNCTION_USAGE (p
))
2052 CALL_INSN_FUNCTION_USAGE (i1
)
2053 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
2055 else if (count
== m
->consec
&& m
->move_insn_first
)
2057 /* The SET_SRC might not be invariant, so we must
2058 use the REG_EQUAL note. */
2060 emit_move_insn (m
->set_dest
, m
->set_src
);
2061 temp
= get_insns ();
2064 add_label_notes (m
->set_src
, temp
);
2066 i1
= emit_insns_before (temp
, loop_start
);
2067 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2069 = gen_rtx_EXPR_LIST ((m
->is_equiv
? REG_EQUIV
2071 m
->set_src
, REG_NOTES (i1
));
2074 i1
= emit_insn_before (PATTERN (p
), loop_start
);
2076 if (REG_NOTES (i1
) == 0)
2078 REG_NOTES (i1
) = REG_NOTES (p
);
2080 /* If there is a REG_EQUAL note present whose value
2081 is not loop invariant, then delete it, since it
2082 may cause problems with later optimization passes.
2083 It is possible for cse to create such notes
2084 like this as a result of record_jump_cond. */
2086 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
2087 && ! invariant_p (XEXP (temp
, 0)))
2088 remove_note (i1
, temp
);
2094 if (loop_dump_stream
)
2095 fprintf (loop_dump_stream
, " moved to %d",
2098 /* If library call, now fix the REG_NOTES that contain
2099 insn pointers, namely REG_LIBCALL on FIRST
2100 and REG_RETVAL on I1. */
2101 if ((temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
)))
2103 XEXP (temp
, 0) = first
;
2104 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
2105 XEXP (temp
, 0) = i1
;
2112 /* simplify_giv_expr expects that it can walk the insns
2113 at m->insn forwards and see this old sequence we are
2114 tossing here. delete_insn does preserve the next
2115 pointers, but when we skip over a NOTE we must fix
2116 it up. Otherwise that code walks into the non-deleted
2118 while (p
&& GET_CODE (p
) == NOTE
)
2119 p
= NEXT_INSN (temp
) = NEXT_INSN (p
);
2122 /* The more regs we move, the less we like moving them. */
2126 /* Any other movable that loads the same register
2128 already_moved
[regno
] = 1;
2130 /* This reg has been moved out of one loop. */
2131 moved_once
[regno
] = 1;
2133 /* The reg set here is now invariant. */
2135 VARRAY_INT (n_times_set
, regno
) = 0;
2139 /* Change the length-of-life info for the register
2140 to say it lives at least the full length of this loop.
2141 This will help guide optimizations in outer loops. */
2143 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2144 /* This is the old insn before all the moved insns.
2145 We can't use the moved insn because it is out of range
2146 in uid_luid. Only the old insns have luids. */
2147 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2148 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2149 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2151 /* Combine with this moved insn any other matching movables. */
2154 for (m1
= movables
; m1
; m1
= m1
->next
)
2159 /* Schedule the reg loaded by M1
2160 for replacement so that shares the reg of M.
2161 If the modes differ (only possible in restricted
2162 circumstances, make a SUBREG. */
2163 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2164 reg_map
[m1
->regno
] = m
->set_dest
;
2167 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2170 /* Get rid of the matching insn
2171 and prevent further processing of it. */
2174 /* if library call, delete all insn except last, which
2176 if ((temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2179 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2180 temp
= NEXT_INSN (temp
))
2183 delete_insn (m1
->insn
);
2185 /* Any other movable that loads the same register
2187 already_moved
[m1
->regno
] = 1;
2189 /* The reg merged here is now invariant,
2190 if the reg it matches is invariant. */
2192 VARRAY_INT (n_times_set
, m1
->regno
) = 0;
2195 else if (loop_dump_stream
)
2196 fprintf (loop_dump_stream
, "not desirable");
2198 else if (loop_dump_stream
&& !m
->match
)
2199 fprintf (loop_dump_stream
, "not safe");
2201 if (loop_dump_stream
)
2202 fprintf (loop_dump_stream
, "\n");
2206 new_start
= loop_start
;
2208 /* Go through all the instructions in the loop, making
2209 all the register substitutions scheduled in REG_MAP. */
2210 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2211 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2212 || GET_CODE (p
) == CALL_INSN
)
2214 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2215 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2221 /* Scan X and replace the address of any MEM in it with ADDR.
2222 REG is the address that MEM should have before the replacement. */
2225 replace_call_address (x
, reg
, addr
)
2228 register enum rtx_code code
;
2234 code
= GET_CODE (x
);
2248 /* Short cut for very common case. */
2249 replace_call_address (XEXP (x
, 1), reg
, addr
);
2253 /* Short cut for very common case. */
2254 replace_call_address (XEXP (x
, 0), reg
, addr
);
2258 /* If this MEM uses a reg other than the one we expected,
2259 something is wrong. */
2260 if (XEXP (x
, 0) != reg
)
2269 fmt
= GET_RTX_FORMAT (code
);
2270 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2273 replace_call_address (XEXP (x
, i
), reg
, addr
);
2277 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2278 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2284 /* Return the number of memory refs to addresses that vary
2288 count_nonfixed_reads (x
)
2291 register enum rtx_code code
;
2299 code
= GET_CODE (x
);
2313 return ((invariant_p (XEXP (x
, 0)) != 1)
2314 + count_nonfixed_reads (XEXP (x
, 0)));
2321 fmt
= GET_RTX_FORMAT (code
);
2322 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2325 value
+= count_nonfixed_reads (XEXP (x
, i
));
2329 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2330 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2338 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2339 Replace it with an instruction to load just the low bytes
2340 if the machine supports such an instruction,
2341 and insert above LOOP_START an instruction to clear the register. */
2344 constant_high_bytes (p
, loop_start
)
2348 register int insn_code_number
;
2350 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2351 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2353 new = gen_rtx_SET (VOIDmode
,
2354 gen_rtx_STRICT_LOW_PART (VOIDmode
,
2355 gen_rtx_SUBREG (GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2356 SET_DEST (PATTERN (p
)),
2358 XEXP (SET_SRC (PATTERN (p
)), 0));
2359 insn_code_number
= recog (new, p
);
2361 if (insn_code_number
)
2365 /* Clear destination register before the loop. */
2366 emit_insn_before (gen_rtx_SET (VOIDmode
, SET_DEST (PATTERN (p
)),
2370 /* Inside the loop, just load the low part. */
2376 /* Scan a loop setting the variables `unknown_address_altered',
2377 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2378 and `loop_has_volatile'. Also, fill in the arrays `loop_mems' and
2379 `loop_store_mems'. */
2382 prescan_loop (start
, end
)
2385 register int level
= 1;
2387 int loop_has_multiple_exit_targets
= 0;
2388 /* The label after END. Jumping here is just like falling off the
2389 end of the loop. We use next_nonnote_insn instead of next_label
2390 as a hedge against the (pathological) case where some actual insn
2391 might end up between the two. */
2392 rtx exit_target
= next_nonnote_insn (end
);
2393 if (exit_target
== NULL_RTX
|| GET_CODE (exit_target
) != CODE_LABEL
)
2394 loop_has_multiple_exit_targets
= 1;
2396 unknown_address_altered
= 0;
2398 loop_has_volatile
= 0;
2399 loop_store_mems_idx
= 0;
2406 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2407 insn
= NEXT_INSN (insn
))
2409 if (GET_CODE (insn
) == NOTE
)
2411 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2414 /* Count number of loops contained in this one. */
2417 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2426 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2429 loop_continue
= insn
;
2432 else if (GET_CODE (insn
) == CALL_INSN
)
2434 if (! CONST_CALL_P (insn
))
2435 unknown_address_altered
= 1;
2438 else if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2440 rtx label1
= NULL_RTX
;
2441 rtx label2
= NULL_RTX
;
2443 if (volatile_refs_p (PATTERN (insn
)))
2444 loop_has_volatile
= 1;
2446 note_stores (PATTERN (insn
), note_addr_stored
);
2448 if (!loop_has_multiple_exit_targets
2449 && GET_CODE (insn
) == JUMP_INSN
2450 && GET_CODE (PATTERN (insn
)) == SET
2451 && SET_DEST (PATTERN (insn
)) == pc_rtx
)
2453 if (GET_CODE (SET_SRC (PATTERN (insn
))) == IF_THEN_ELSE
)
2455 label1
= XEXP (SET_SRC (PATTERN (insn
)), 1);
2456 label2
= XEXP (SET_SRC (PATTERN (insn
)), 2);
2460 label1
= SET_SRC (PATTERN (insn
));
2464 if (label1
&& label1
!= pc_rtx
)
2466 if (GET_CODE (label1
) != LABEL_REF
)
2468 /* Something tricky. */
2469 loop_has_multiple_exit_targets
= 1;
2472 else if (XEXP (label1
, 0) != exit_target
2473 && LABEL_OUTSIDE_LOOP_P (label1
))
2475 /* A jump outside the current loop. */
2476 loop_has_multiple_exit_targets
= 1;
2486 else if (GET_CODE (insn
) == RETURN
)
2487 loop_has_multiple_exit_targets
= 1;
2490 /* Now, rescan the loop, setting up the LOOP_MEMS array. */
2491 if (/* We can't tell what MEMs are aliased by what. */
2492 !unknown_address_altered
2493 /* An exception thrown by a called function might land us
2496 /* We don't want loads for MEMs moved to a location before the
2497 one at which their stack memory becomes allocated. (Note
2498 that this is not a problem for malloc, etc., since those
2499 require actual function calls. */
2500 && !current_function_calls_alloca
2501 /* There are ways to leave the loop other than falling off the
2503 && !loop_has_multiple_exit_targets
)
2504 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2505 insn
= NEXT_INSN (insn
))
2506 for_each_rtx (&insn
, insert_loop_mem
, 0);
2509 /* Scan the function looking for loops. Record the start and end of each loop.
2510 Also mark as invalid loops any loops that contain a setjmp or are branched
2511 to from outside the loop. */
2514 find_and_verify_loops (f
)
2518 int current_loop
= -1;
2522 /* If there are jumps to undefined labels,
2523 treat them as jumps out of any/all loops.
2524 This also avoids writing past end of tables when there are no loops. */
2525 uid_loop_num
[0] = -1;
2527 /* Find boundaries of loops, mark which loops are contained within
2528 loops, and invalidate loops that have setjmp. */
2530 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2532 if (GET_CODE (insn
) == NOTE
)
2533 switch (NOTE_LINE_NUMBER (insn
))
2535 case NOTE_INSN_LOOP_BEG
:
2536 loop_number_loop_starts
[++next_loop
] = insn
;
2537 loop_number_loop_ends
[next_loop
] = 0;
2538 loop_outer_loop
[next_loop
] = current_loop
;
2539 loop_invalid
[next_loop
] = 0;
2540 loop_number_exit_labels
[next_loop
] = 0;
2541 loop_number_exit_count
[next_loop
] = 0;
2542 current_loop
= next_loop
;
2545 case NOTE_INSN_SETJMP
:
2546 /* In this case, we must invalidate our current loop and any
2548 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2550 loop_invalid
[loop
] = 1;
2551 if (loop_dump_stream
)
2552 fprintf (loop_dump_stream
,
2553 "\nLoop at %d ignored due to setjmp.\n",
2554 INSN_UID (loop_number_loop_starts
[loop
]));
2558 case NOTE_INSN_LOOP_END
:
2559 if (current_loop
== -1)
2562 loop_number_loop_ends
[current_loop
] = insn
;
2563 current_loop
= loop_outer_loop
[current_loop
];
2570 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2571 enclosing loop, but this doesn't matter. */
2572 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2575 /* Any loop containing a label used in an initializer must be invalidated,
2576 because it can be jumped into from anywhere. */
2578 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2582 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2584 loop_num
= loop_outer_loop
[loop_num
])
2585 loop_invalid
[loop_num
] = 1;
2588 /* Any loop containing a label used for an exception handler must be
2589 invalidated, because it can be jumped into from anywhere. */
2591 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2595 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2597 loop_num
= loop_outer_loop
[loop_num
])
2598 loop_invalid
[loop_num
] = 1;
2601 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2602 loop that it is not contained within, that loop is marked invalid.
2603 If any INSN or CALL_INSN uses a label's address, then the loop containing
2604 that label is marked invalid, because it could be jumped into from
2607 Also look for blocks of code ending in an unconditional branch that
2608 exits the loop. If such a block is surrounded by a conditional
2609 branch around the block, move the block elsewhere (see below) and
2610 invert the jump to point to the code block. This may eliminate a
2611 label in our loop and will simplify processing by both us and a
2612 possible second cse pass. */
2614 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2615 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2617 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2619 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2621 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2626 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2628 loop_num
= loop_outer_loop
[loop_num
])
2629 loop_invalid
[loop_num
] = 1;
2633 if (GET_CODE (insn
) != JUMP_INSN
)
2636 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2638 /* See if this is an unconditional branch outside the loop. */
2639 if (this_loop_num
!= -1
2640 && (GET_CODE (PATTERN (insn
)) == RETURN
2641 || (simplejump_p (insn
)
2642 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2644 && get_max_uid () < max_uid_for_loop
)
2647 rtx our_next
= next_real_insn (insn
);
2649 int outer_loop
= -1;
2651 /* Go backwards until we reach the start of the loop, a label,
2653 for (p
= PREV_INSN (insn
);
2654 GET_CODE (p
) != CODE_LABEL
2655 && ! (GET_CODE (p
) == NOTE
2656 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2657 && GET_CODE (p
) != JUMP_INSN
;
2661 /* Check for the case where we have a jump to an inner nested
2662 loop, and do not perform the optimization in that case. */
2664 if (JUMP_LABEL (insn
))
2666 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2667 if (dest_loop
!= -1)
2669 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2670 outer_loop
= loop_outer_loop
[outer_loop
])
2671 if (outer_loop
== this_loop_num
)
2676 /* Make sure that the target of P is within the current loop. */
2678 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2679 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2680 outer_loop
= this_loop_num
;
2682 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2683 we have a block of code to try to move.
2685 We look backward and then forward from the target of INSN
2686 to find a BARRIER at the same loop depth as the target.
2687 If we find such a BARRIER, we make a new label for the start
2688 of the block, invert the jump in P and point it to that label,
2689 and move the block of code to the spot we found. */
2691 if (outer_loop
== -1
2692 && GET_CODE (p
) == JUMP_INSN
2693 && JUMP_LABEL (p
) != 0
2694 /* Just ignore jumps to labels that were never emitted.
2695 These always indicate compilation errors. */
2696 && INSN_UID (JUMP_LABEL (p
)) != 0
2698 && ! simplejump_p (p
)
2699 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2702 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2703 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2706 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2707 if (GET_CODE (loc
) == BARRIER
2708 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2712 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2713 if (GET_CODE (loc
) == BARRIER
2714 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2719 rtx cond_label
= JUMP_LABEL (p
);
2720 rtx new_label
= get_label_after (p
);
2722 /* Ensure our label doesn't go away. */
2723 LABEL_NUSES (cond_label
)++;
2725 /* Verify that uid_loop_num is large enough and that
2727 if (invert_jump (p
, new_label
))
2731 /* If no suitable BARRIER was found, create a suitable
2732 one before TARGET. Since TARGET is a fall through
2733 path, we'll need to insert an jump around our block
2734 and a add a BARRIER before TARGET.
2736 This creates an extra unconditional jump outside
2737 the loop. However, the benefits of removing rarely
2738 executed instructions from inside the loop usually
2739 outweighs the cost of the extra unconditional jump
2740 outside the loop. */
2745 temp
= gen_jump (JUMP_LABEL (insn
));
2746 temp
= emit_jump_insn_before (temp
, target
);
2747 JUMP_LABEL (temp
) = JUMP_LABEL (insn
);
2748 LABEL_NUSES (JUMP_LABEL (insn
))++;
2749 loc
= emit_barrier_before (target
);
2752 /* Include the BARRIER after INSN and copy the
2754 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2755 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2757 /* All those insns are now in TARGET_LOOP_NUM. */
2758 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2760 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2762 /* The label jumped to by INSN is no longer a loop exit.
2763 Unless INSN does not have a label (e.g., it is a
2764 RETURN insn), search loop_number_exit_labels to find
2765 its label_ref, and remove it. Also turn off
2766 LABEL_OUTSIDE_LOOP_P bit. */
2767 if (JUMP_LABEL (insn
))
2772 r
= loop_number_exit_labels
[this_loop_num
];
2773 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2774 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2776 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2778 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2780 loop_number_exit_labels
[this_loop_num
]
2781 = LABEL_NEXTREF (r
);
2785 for (loop_num
= this_loop_num
;
2786 loop_num
!= -1 && loop_num
!= target_loop_num
;
2787 loop_num
= loop_outer_loop
[loop_num
])
2788 loop_number_exit_count
[loop_num
]--;
2790 /* If we didn't find it, then something is wrong. */
2795 /* P is now a jump outside the loop, so it must be put
2796 in loop_number_exit_labels, and marked as such.
2797 The easiest way to do this is to just call
2798 mark_loop_jump again for P. */
2799 mark_loop_jump (PATTERN (p
), this_loop_num
);
2801 /* If INSN now jumps to the insn after it,
2803 if (JUMP_LABEL (insn
) != 0
2804 && (next_real_insn (JUMP_LABEL (insn
))
2805 == next_real_insn (insn
)))
2809 /* Continue the loop after where the conditional
2810 branch used to jump, since the only branch insn
2811 in the block (if it still remains) is an inter-loop
2812 branch and hence needs no processing. */
2813 insn
= NEXT_INSN (cond_label
);
2815 if (--LABEL_NUSES (cond_label
) == 0)
2816 delete_insn (cond_label
);
2818 /* This loop will be continued with NEXT_INSN (insn). */
2819 insn
= PREV_INSN (insn
);
2826 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2827 loops it is contained in, mark the target loop invalid.
2829 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2832 mark_loop_jump (x
, loop_num
)
2840 switch (GET_CODE (x
))
2853 /* There could be a label reference in here. */
2854 mark_loop_jump (XEXP (x
, 0), loop_num
);
2860 mark_loop_jump (XEXP (x
, 0), loop_num
);
2861 mark_loop_jump (XEXP (x
, 1), loop_num
);
2866 mark_loop_jump (XEXP (x
, 0), loop_num
);
2870 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2872 /* Link together all labels that branch outside the loop. This
2873 is used by final_[bg]iv_value and the loop unrolling code. Also
2874 mark this LABEL_REF so we know that this branch should predict
2877 /* A check to make sure the label is not in an inner nested loop,
2878 since this does not count as a loop exit. */
2879 if (dest_loop
!= -1)
2881 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2882 outer_loop
= loop_outer_loop
[outer_loop
])
2883 if (outer_loop
== loop_num
)
2889 if (loop_num
!= -1 && outer_loop
== -1)
2891 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2892 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2893 loop_number_exit_labels
[loop_num
] = x
;
2895 for (outer_loop
= loop_num
;
2896 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2897 outer_loop
= loop_outer_loop
[outer_loop
])
2898 loop_number_exit_count
[outer_loop
]++;
2901 /* If this is inside a loop, but not in the current loop or one enclosed
2902 by it, it invalidates at least one loop. */
2904 if (dest_loop
== -1)
2907 /* We must invalidate every nested loop containing the target of this
2908 label, except those that also contain the jump insn. */
2910 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2912 /* Stop when we reach a loop that also contains the jump insn. */
2913 for (outer_loop
= loop_num
; outer_loop
!= -1;
2914 outer_loop
= loop_outer_loop
[outer_loop
])
2915 if (dest_loop
== outer_loop
)
2918 /* If we get here, we know we need to invalidate a loop. */
2919 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2920 fprintf (loop_dump_stream
,
2921 "\nLoop at %d ignored due to multiple entry points.\n",
2922 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2924 loop_invalid
[dest_loop
] = 1;
2929 /* If this is not setting pc, ignore. */
2930 if (SET_DEST (x
) == pc_rtx
)
2931 mark_loop_jump (SET_SRC (x
), loop_num
);
2935 mark_loop_jump (XEXP (x
, 1), loop_num
);
2936 mark_loop_jump (XEXP (x
, 2), loop_num
);
2941 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2942 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2946 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2947 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2951 /* Treat anything else (such as a symbol_ref)
2952 as a branch out of this loop, but not into any loop. */
2956 #ifdef HAVE_decrement_and_branch_on_count
2957 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2958 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2959 #endif /* HAVE_decrement_and_branch_on_count */
2961 loop_number_exit_labels
[loop_num
] = x
;
2963 for (outer_loop
= loop_num
; outer_loop
!= -1;
2964 outer_loop
= loop_outer_loop
[outer_loop
])
2965 loop_number_exit_count
[outer_loop
]++;
2971 /* Return nonzero if there is a label in the range from
2972 insn INSN to and including the insn whose luid is END
2973 INSN must have an assigned luid (i.e., it must not have
2974 been previously created by loop.c). */
2977 labels_in_range_p (insn
, end
)
2981 while (insn
&& INSN_LUID (insn
) <= end
)
2983 if (GET_CODE (insn
) == CODE_LABEL
)
2985 insn
= NEXT_INSN (insn
);
2991 /* Record that a memory reference X is being set. */
2994 note_addr_stored (x
, y
)
2996 rtx y ATTRIBUTE_UNUSED
;
3000 if (x
== 0 || GET_CODE (x
) != MEM
)
3003 /* Count number of memory writes.
3004 This affects heuristics in strength_reduce. */
3007 /* BLKmode MEM means all memory is clobbered. */
3008 if (GET_MODE (x
) == BLKmode
)
3009 unknown_address_altered
= 1;
3011 if (unknown_address_altered
)
3014 for (i
= 0; i
< loop_store_mems_idx
; i
++)
3015 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
3016 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
3018 /* We are storing at the same address as previously noted. Save the
3020 if (GET_MODE_SIZE (GET_MODE (x
))
3021 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
3022 loop_store_mems
[i
] = x
;
3026 if (i
== NUM_STORES
)
3027 unknown_address_altered
= 1;
3029 else if (i
== loop_store_mems_idx
)
3030 loop_store_mems
[loop_store_mems_idx
++] = x
;
3033 /* Return nonzero if the rtx X is invariant over the current loop.
3035 The value is 2 if we refer to something only conditionally invariant.
3037 If `unknown_address_altered' is nonzero, no memory ref is invariant.
3038 Otherwise, a memory ref is invariant if it does not conflict with
3039 anything stored in `loop_store_mems'. */
3046 register enum rtx_code code
;
3048 int conditional
= 0;
3052 code
= GET_CODE (x
);
3062 /* A LABEL_REF is normally invariant, however, if we are unrolling
3063 loops, and this label is inside the loop, then it isn't invariant.
3064 This is because each unrolled copy of the loop body will have
3065 a copy of this label. If this was invariant, then an insn loading
3066 the address of this label into a register might get moved outside
3067 the loop, and then each loop body would end up using the same label.
3069 We don't know the loop bounds here though, so just fail for all
3071 if (flag_unroll_loops
)
3078 case UNSPEC_VOLATILE
:
3082 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
3083 since the reg might be set by initialization within the loop. */
3085 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
3086 || x
== arg_pointer_rtx
)
3087 && ! current_function_has_nonlocal_goto
)
3091 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
3094 if (VARRAY_INT (n_times_set
, REGNO (x
)) < 0)
3097 return VARRAY_INT (n_times_set
, REGNO (x
)) == 0;
3100 /* Volatile memory references must be rejected. Do this before
3101 checking for read-only items, so that volatile read-only items
3102 will be rejected also. */
3103 if (MEM_VOLATILE_P (x
))
3106 /* Read-only items (such as constants in a constant pool) are
3107 invariant if their address is. */
3108 if (RTX_UNCHANGING_P (x
))
3111 /* If we filled the table (or had a subroutine call), any location
3112 in memory could have been clobbered. */
3113 if (unknown_address_altered
)
3116 /* See if there is any dependence between a store and this load. */
3117 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
3118 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
3121 /* It's not invalidated by a store in memory
3122 but we must still verify the address is invariant. */
3126 /* Don't mess with insns declared volatile. */
3127 if (MEM_VOLATILE_P (x
))
3135 fmt
= GET_RTX_FORMAT (code
);
3136 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3140 int tem
= invariant_p (XEXP (x
, i
));
3146 else if (fmt
[i
] == 'E')
3149 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
3151 int tem
= invariant_p (XVECEXP (x
, i
, j
));
3161 return 1 + conditional
;
3165 /* Return nonzero if all the insns in the loop that set REG
3166 are INSN and the immediately following insns,
3167 and if each of those insns sets REG in an invariant way
3168 (not counting uses of REG in them).
3170 The value is 2 if some of these insns are only conditionally invariant.
3172 We assume that INSN itself is the first set of REG
3173 and that its source is invariant. */
3176 consec_sets_invariant_p (reg
, n_sets
, insn
)
3180 register rtx p
= insn
;
3181 register int regno
= REGNO (reg
);
3183 /* Number of sets we have to insist on finding after INSN. */
3184 int count
= n_sets
- 1;
3185 int old
= VARRAY_INT (n_times_set
, regno
);
3189 /* If N_SETS hit the limit, we can't rely on its value. */
3193 VARRAY_INT (n_times_set
, regno
) = 0;
3197 register enum rtx_code code
;
3201 code
= GET_CODE (p
);
3203 /* If library call, skip to end of it. */
3204 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3209 && (set
= single_set (p
))
3210 && GET_CODE (SET_DEST (set
)) == REG
3211 && REGNO (SET_DEST (set
)) == regno
)
3213 this = invariant_p (SET_SRC (set
));
3216 else if ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
)))
3218 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
3219 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3221 this = (CONSTANT_P (XEXP (temp
, 0))
3222 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3223 && invariant_p (XEXP (temp
, 0))));
3230 else if (code
!= NOTE
)
3232 VARRAY_INT (n_times_set
, regno
) = old
;
3237 VARRAY_INT (n_times_set
, regno
) = old
;
3238 /* If invariant_p ever returned 2, we return 2. */
3239 return 1 + (value
& 2);
3243 /* I don't think this condition is sufficient to allow INSN
3244 to be moved, so we no longer test it. */
3246 /* Return 1 if all insns in the basic block of INSN and following INSN
3247 that set REG are invariant according to TABLE. */
3250 all_sets_invariant_p (reg
, insn
, table
)
3254 register rtx p
= insn
;
3255 register int regno
= REGNO (reg
);
3259 register enum rtx_code code
;
3261 code
= GET_CODE (p
);
3262 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3264 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3265 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3266 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3268 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3275 /* Look at all uses (not sets) of registers in X. For each, if it is
3276 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3277 a different insn, set USAGE[REGNO] to const0_rtx. */
3280 find_single_use_in_loop (insn
, x
, usage
)
3285 enum rtx_code code
= GET_CODE (x
);
3286 char *fmt
= GET_RTX_FORMAT (code
);
3290 VARRAY_RTX (usage
, REGNO (x
))
3291 = (VARRAY_RTX (usage
, REGNO (x
)) != 0
3292 && VARRAY_RTX (usage
, REGNO (x
)) != insn
)
3293 ? const0_rtx
: insn
;
3295 else if (code
== SET
)
3297 /* Don't count SET_DEST if it is a REG; otherwise count things
3298 in SET_DEST because if a register is partially modified, it won't
3299 show up as a potential movable so we don't care how USAGE is set
3301 if (GET_CODE (SET_DEST (x
)) != REG
)
3302 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3303 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3306 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3308 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3309 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3310 else if (fmt
[i
] == 'E')
3311 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3312 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3316 /* Count and record any set in X which is contained in INSN. Update
3317 MAY_NOT_MOVE and LAST_SET for any register set in X. */
3320 count_one_set (insn
, x
, may_not_move
, last_set
)
3322 varray_type may_not_move
;
3325 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3326 /* Don't move a reg that has an explicit clobber.
3327 It's not worth the pain to try to do it correctly. */
3328 VARRAY_CHAR (may_not_move
, REGNO (XEXP (x
, 0))) = 1;
3330 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3332 rtx dest
= SET_DEST (x
);
3333 while (GET_CODE (dest
) == SUBREG
3334 || GET_CODE (dest
) == ZERO_EXTRACT
3335 || GET_CODE (dest
) == SIGN_EXTRACT
3336 || GET_CODE (dest
) == STRICT_LOW_PART
)
3337 dest
= XEXP (dest
, 0);
3338 if (GET_CODE (dest
) == REG
)
3340 register int regno
= REGNO (dest
);
3341 /* If this is the first setting of this reg
3342 in current basic block, and it was set before,
3343 it must be set in two basic blocks, so it cannot
3344 be moved out of the loop. */
3345 if (VARRAY_INT (n_times_set
, regno
) > 0
3346 && last_set
[regno
] == 0)
3347 VARRAY_CHAR (may_not_move
, regno
) = 1;
3348 /* If this is not first setting in current basic block,
3349 see if reg was used in between previous one and this.
3350 If so, neither one can be moved. */
3351 if (last_set
[regno
] != 0
3352 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3353 VARRAY_CHAR (may_not_move
, regno
) = 1;
3354 if (VARRAY_INT (n_times_set
, regno
) < 127)
3355 ++VARRAY_INT (n_times_set
, regno
);
3356 last_set
[regno
] = insn
;
3361 /* Increment N_TIMES_SET at the index of each register
3362 that is modified by an insn between FROM and TO.
3363 If the value of an element of N_TIMES_SET becomes 127 or more,
3364 stop incrementing it, to avoid overflow.
3366 Store in SINGLE_USAGE[I] the single insn in which register I is
3367 used, if it is only used once. Otherwise, it is set to 0 (for no
3368 uses) or const0_rtx for more than one use. This parameter may be zero,
3369 in which case this processing is not done.
3371 Store in *COUNT_PTR the number of actual instruction
3372 in the loop. We use this to decide what is worth moving out. */
3374 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3375 In that case, it is the insn that last set reg n. */
3378 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3379 register rtx from
, to
;
3380 varray_type may_not_move
;
3381 varray_type single_usage
;
3385 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3387 register int count
= 0;
3390 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3391 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3393 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3397 /* If requested, record registers that have exactly one use. */
3400 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3402 /* Include uses in REG_EQUAL notes. */
3403 if (REG_NOTES (insn
))
3404 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3407 if (GET_CODE (PATTERN (insn
)) == SET
3408 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3409 count_one_set (insn
, PATTERN (insn
), may_not_move
, last_set
);
3410 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3413 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3414 count_one_set (insn
, XVECEXP (PATTERN (insn
), 0, i
),
3415 may_not_move
, last_set
);
3419 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3420 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3425 /* Given a loop that is bounded by LOOP_START and LOOP_END
3426 and that is entered at SCAN_START,
3427 return 1 if the register set in SET contained in insn INSN is used by
3428 any insn that precedes INSN in cyclic order starting
3429 from the loop entry point.
3431 We don't want to use INSN_LUID here because if we restrict INSN to those
3432 that have a valid INSN_LUID, it means we cannot move an invariant out
3433 from an inner loop past two loops. */
3436 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3437 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3439 rtx reg
= SET_DEST (set
);
3442 /* Scan forward checking for register usage. If we hit INSN, we
3443 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3444 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3446 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3447 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3457 /* A "basic induction variable" or biv is a pseudo reg that is set
3458 (within this loop) only by incrementing or decrementing it. */
3459 /* A "general induction variable" or giv is a pseudo reg whose
3460 value is a linear function of a biv. */
3462 /* Bivs are recognized by `basic_induction_var';
3463 Givs by `general_induction_var'. */
3465 /* Indexed by register number, indicates whether or not register is an
3466 induction variable, and if so what type. */
3468 enum iv_mode
*reg_iv_type
;
3470 /* Indexed by register number, contains pointer to `struct induction'
3471 if register is an induction variable. This holds general info for
3472 all induction variables. */
3474 struct induction
**reg_iv_info
;
3476 /* Indexed by register number, contains pointer to `struct iv_class'
3477 if register is a basic induction variable. This holds info describing
3478 the class (a related group) of induction variables that the biv belongs
3481 struct iv_class
**reg_biv_class
;
3483 /* The head of a list which links together (via the next field)
3484 every iv class for the current loop. */
3486 struct iv_class
*loop_iv_list
;
3488 /* Communication with routines called via `note_stores'. */
3490 static rtx note_insn
;
3492 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3494 static rtx addr_placeholder
;
3496 /* ??? Unfinished optimizations, and possible future optimizations,
3497 for the strength reduction code. */
3499 /* ??? The interaction of biv elimination, and recognition of 'constant'
3500 bivs, may cause problems. */
3502 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3503 performance problems.
3505 Perhaps don't eliminate things that can be combined with an addressing
3506 mode. Find all givs that have the same biv, mult_val, and add_val;
3507 then for each giv, check to see if its only use dies in a following
3508 memory address. If so, generate a new memory address and check to see
3509 if it is valid. If it is valid, then store the modified memory address,
3510 otherwise, mark the giv as not done so that it will get its own iv. */
3512 /* ??? Could try to optimize branches when it is known that a biv is always
3515 /* ??? When replace a biv in a compare insn, we should replace with closest
3516 giv so that an optimized branch can still be recognized by the combiner,
3517 e.g. the VAX acb insn. */
3519 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3520 was rerun in loop_optimize whenever a register was added or moved.
3521 Also, some of the optimizations could be a little less conservative. */
3523 /* Perform strength reduction and induction variable elimination.
3525 Pseudo registers created during this function will be beyond the last
3526 valid index in several tables including n_times_set and regno_last_uid.
3527 This does not cause a problem here, because the added registers cannot be
3528 givs outside of their loop, and hence will never be reconsidered.
3529 But scan_loop must check regnos to make sure they are in bounds.
3531 SCAN_START is the first instruction in the loop, as the loop would
3532 actually be executed. END is the NOTE_INSN_LOOP_END. LOOP_TOP is
3533 the first instruction in the loop, as it is layed out in the
3534 instruction stream. LOOP_START is the NOTE_INSN_LOOP_BEG. */
3537 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3538 loop_start
, loop_end
, unroll_p
, bct_p
)
3545 int unroll_p
, bct_p
;
3552 /* This is 1 if current insn is not executed at least once for every loop
3554 int not_every_iteration
= 0;
3555 /* This is 1 if current insn may be executed more than once for every
3557 int maybe_multiple
= 0;
3558 /* Temporary list pointers for traversing loop_iv_list. */
3559 struct iv_class
*bl
, **backbl
;
3560 /* Ratio of extra register life span we can justify
3561 for saving an instruction. More if loop doesn't call subroutines
3562 since in that case saving an insn makes more difference
3563 and more registers are available. */
3564 /* ??? could set this to last value of threshold in move_movables */
3565 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3566 /* Map of pseudo-register replacements. */
3570 rtx end_insert_before
;
3573 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3574 * sizeof (enum iv_mode
*));
3575 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3576 reg_iv_info
= (struct induction
**)
3577 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3578 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3579 * sizeof (struct induction
*)));
3580 reg_biv_class
= (struct iv_class
**)
3581 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3582 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3583 * sizeof (struct iv_class
*)));
3586 addr_placeholder
= gen_reg_rtx (Pmode
);
3588 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3589 must be put before this insn, so that they will appear in the right
3590 order (i.e. loop order).
3592 If loop_end is the end of the current function, then emit a
3593 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3595 if (NEXT_INSN (loop_end
) != 0)
3596 end_insert_before
= NEXT_INSN (loop_end
);
3598 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3600 /* Scan through loop to find all possible bivs. */
3602 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
3604 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
3606 if (GET_CODE (p
) == INSN
3607 && (set
= single_set (p
))
3608 && GET_CODE (SET_DEST (set
)) == REG
)
3610 dest_reg
= SET_DEST (set
);
3611 if (REGNO (dest_reg
) < max_reg_before_loop
3612 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3613 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3615 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3616 dest_reg
, p
, &inc_val
, &mult_val
))
3618 /* It is a possible basic induction variable.
3619 Create and initialize an induction structure for it. */
3622 = (struct induction
*) alloca (sizeof (struct induction
));
3624 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3625 not_every_iteration
, maybe_multiple
);
3626 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3628 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3629 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3633 /* Past CODE_LABEL, we get to insns that may be executed multiple
3634 times. The only way we can be sure that they can't is if every
3635 jump insn between here and the end of the loop either
3636 returns, exits the loop, is a forward jump, or is a jump
3637 to the loop start. */
3639 if (GET_CODE (p
) == CODE_LABEL
)
3647 insn
= NEXT_INSN (insn
);
3648 if (insn
== scan_start
)
3656 if (insn
== scan_start
)
3660 if (GET_CODE (insn
) == JUMP_INSN
3661 && GET_CODE (PATTERN (insn
)) != RETURN
3662 && (! condjump_p (insn
)
3663 || (JUMP_LABEL (insn
) != 0
3664 && JUMP_LABEL (insn
) != scan_start
3665 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3666 || INSN_UID (insn
) >= max_uid_for_loop
3667 || (INSN_LUID (JUMP_LABEL (insn
))
3668 < INSN_LUID (insn
))))))
3676 /* Past a jump, we get to insns for which we can't count
3677 on whether they will be executed during each iteration. */
3678 /* This code appears twice in strength_reduce. There is also similar
3679 code in scan_loop. */
3680 if (GET_CODE (p
) == JUMP_INSN
3681 /* If we enter the loop in the middle, and scan around to the
3682 beginning, don't set not_every_iteration for that.
3683 This can be any kind of jump, since we want to know if insns
3684 will be executed if the loop is executed. */
3685 && ! (JUMP_LABEL (p
) == loop_top
3686 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3687 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3691 /* If this is a jump outside the loop, then it also doesn't
3692 matter. Check to see if the target of this branch is on the
3693 loop_number_exits_labels list. */
3695 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3697 label
= LABEL_NEXTREF (label
))
3698 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3702 not_every_iteration
= 1;
3705 else if (GET_CODE (p
) == NOTE
)
3707 /* At the virtual top of a converted loop, insns are again known to
3708 be executed each iteration: logically, the loop begins here
3709 even though the exit code has been duplicated. */
3710 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3711 not_every_iteration
= 0;
3712 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3714 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3718 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3719 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3720 or not an insn is known to be executed each iteration of the
3721 loop, whether or not any iterations are known to occur.
3723 Therefore, if we have just passed a label and have no more labels
3724 between here and the test insn of the loop, we know these insns
3725 will be executed each iteration. */
3727 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3728 && no_labels_between_p (p
, loop_end
))
3729 not_every_iteration
= 0;
3732 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3733 Make a sanity check against n_times_set. */
3734 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3736 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3737 /* Above happens if register modified by subreg, etc. */
3738 /* Make sure it is not recognized as a basic induction var: */
3739 || VARRAY_INT (n_times_set
, bl
->regno
) != bl
->biv_count
3740 /* If never incremented, it is invariant that we decided not to
3741 move. So leave it alone. */
3742 || ! bl
->incremented
)
3744 if (loop_dump_stream
)
3745 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3747 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3748 ? "not induction variable"
3749 : (! bl
->incremented
? "never incremented"
3752 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3759 if (loop_dump_stream
)
3760 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3764 /* Exit if there are no bivs. */
3767 /* Can still unroll the loop anyways, but indicate that there is no
3768 strength reduction info available. */
3770 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3775 /* Find initial value for each biv by searching backwards from loop_start,
3776 halting at first label. Also record any test condition. */
3779 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3783 if (GET_CODE (p
) == CALL_INSN
)
3786 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3787 || GET_CODE (p
) == CALL_INSN
)
3788 note_stores (PATTERN (p
), record_initial
);
3790 /* Record any test of a biv that branches around the loop if no store
3791 between it and the start of loop. We only care about tests with
3792 constants and registers and only certain of those. */
3793 if (GET_CODE (p
) == JUMP_INSN
3794 && JUMP_LABEL (p
) != 0
3795 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3796 && (test
= get_condition_for_loop (p
)) != 0
3797 && GET_CODE (XEXP (test
, 0)) == REG
3798 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3799 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3800 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3801 && bl
->init_insn
== 0)
3803 /* If an NE test, we have an initial value! */
3804 if (GET_CODE (test
) == NE
)
3807 bl
->init_set
= gen_rtx_SET (VOIDmode
,
3808 XEXP (test
, 0), XEXP (test
, 1));
3811 bl
->initial_test
= test
;
3815 /* Look at the each biv and see if we can say anything better about its
3816 initial value from any initializing insns set up above. (This is done
3817 in two passes to avoid missing SETs in a PARALLEL.) */
3818 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3823 if (! bl
->init_insn
)
3826 /* IF INIT_INSN has a REG_EQUAL or REG_EQUIV note and the value
3827 is a constant, use the value of that. */
3828 if (((note
= find_reg_note (bl
->init_insn
, REG_EQUAL
, 0)) != NULL
3829 && CONSTANT_P (XEXP (note
, 0)))
3830 || ((note
= find_reg_note (bl
->init_insn
, REG_EQUIV
, 0)) != NULL
3831 && CONSTANT_P (XEXP (note
, 0))))
3832 src
= XEXP (note
, 0);
3834 src
= SET_SRC (bl
->init_set
);
3836 if (loop_dump_stream
)
3837 fprintf (loop_dump_stream
,
3838 "Biv %d initialized at insn %d: initial value ",
3839 bl
->regno
, INSN_UID (bl
->init_insn
));
3841 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3842 || GET_MODE (src
) == VOIDmode
)
3843 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3845 bl
->initial_value
= src
;
3847 if (loop_dump_stream
)
3849 if (GET_CODE (src
) == CONST_INT
)
3851 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (src
));
3852 fputc ('\n', loop_dump_stream
);
3856 print_rtl (loop_dump_stream
, src
);
3857 fprintf (loop_dump_stream
, "\n");
3863 /* Biv initial value is not simple move,
3864 so let it keep initial value of "itself". */
3866 if (loop_dump_stream
)
3867 fprintf (loop_dump_stream
, "is complex\n");
3871 /* Search the loop for general induction variables. */
3873 /* A register is a giv if: it is only set once, it is a function of a
3874 biv and a constant (or invariant), and it is not a biv. */
3876 not_every_iteration
= 0;
3882 /* At end of a straight-in loop, we are done.
3883 At end of a loop entered at the bottom, scan the top. */
3884 if (p
== scan_start
)
3892 if (p
== scan_start
)
3896 /* Look for a general induction variable in a register. */
3897 if (GET_CODE (p
) == INSN
3898 && (set
= single_set (p
))
3899 && GET_CODE (SET_DEST (set
)) == REG
3900 && ! VARRAY_CHAR (may_not_optimize
, REGNO (SET_DEST (set
))))
3908 dest_reg
= SET_DEST (set
);
3909 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3912 if (/* SET_SRC is a giv. */
3913 (general_induction_var (SET_SRC (set
), &src_reg
, &add_val
,
3914 &mult_val
, 0, &benefit
)
3915 /* Equivalent expression is a giv. */
3916 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3917 && general_induction_var (XEXP (regnote
, 0), &src_reg
,
3918 &add_val
, &mult_val
, 0,
3920 /* Don't try to handle any regs made by loop optimization.
3921 We have nothing on them in regno_first_uid, etc. */
3922 && REGNO (dest_reg
) < max_reg_before_loop
3923 /* Don't recognize a BASIC_INDUCT_VAR here. */
3924 && dest_reg
!= src_reg
3925 /* This must be the only place where the register is set. */
3926 && (VARRAY_INT (n_times_set
, REGNO (dest_reg
)) == 1
3927 /* or all sets must be consecutive and make a giv. */
3928 || (benefit
= consec_sets_giv (benefit
, p
,
3930 &add_val
, &mult_val
))))
3934 = (struct induction
*) alloca (sizeof (struct induction
));
3937 /* If this is a library call, increase benefit. */
3938 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3939 benefit
+= libcall_benefit (p
);
3941 /* Skip the consecutive insns, if there are any. */
3942 for (count
= VARRAY_INT (n_times_set
, REGNO (dest_reg
)) - 1;
3945 /* If first insn of libcall sequence, skip to end.
3946 Do this at start of loop, since INSN is guaranteed to
3948 if (GET_CODE (p
) != NOTE
3949 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3952 do p
= NEXT_INSN (p
);
3953 while (GET_CODE (p
) == NOTE
);
3956 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3957 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3963 #ifndef DONT_REDUCE_ADDR
3964 /* Look for givs which are memory addresses. */
3965 /* This resulted in worse code on a VAX 8600. I wonder if it
3967 if (GET_CODE (p
) == INSN
)
3968 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3972 /* Update the status of whether giv can derive other givs. This can
3973 change when we pass a label or an insn that updates a biv. */
3974 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3975 || GET_CODE (p
) == CODE_LABEL
)
3976 update_giv_derive (p
);
3978 /* Past a jump, we get to insns for which we can't count
3979 on whether they will be executed during each iteration. */
3980 /* This code appears twice in strength_reduce. There is also similar
3981 code in scan_loop. */
3982 if (GET_CODE (p
) == JUMP_INSN
3983 /* If we enter the loop in the middle, and scan around to the
3984 beginning, don't set not_every_iteration for that.
3985 This can be any kind of jump, since we want to know if insns
3986 will be executed if the loop is executed. */
3987 && ! (JUMP_LABEL (p
) == loop_top
3988 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3989 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3993 /* If this is a jump outside the loop, then it also doesn't
3994 matter. Check to see if the target of this branch is on the
3995 loop_number_exits_labels list. */
3997 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3999 label
= LABEL_NEXTREF (label
))
4000 if (XEXP (label
, 0) == JUMP_LABEL (p
))
4004 not_every_iteration
= 1;
4007 else if (GET_CODE (p
) == NOTE
)
4009 /* At the virtual top of a converted loop, insns are again known to
4010 be executed each iteration: logically, the loop begins here
4011 even though the exit code has been duplicated. */
4012 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
4013 not_every_iteration
= 0;
4014 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
4016 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
4020 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
4021 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
4022 or not an insn is known to be executed each iteration of the
4023 loop, whether or not any iterations are known to occur.
4025 Therefore, if we have just passed a label and have no more labels
4026 between here and the test insn of the loop, we know these insns
4027 will be executed each iteration. */
4029 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
4030 && no_labels_between_p (p
, loop_end
))
4031 not_every_iteration
= 0;
4034 /* Try to calculate and save the number of loop iterations. This is
4035 set to zero if the actual number can not be calculated. This must
4036 be called after all giv's have been identified, since otherwise it may
4037 fail if the iteration variable is a giv. */
4039 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
4041 /* Now for each giv for which we still don't know whether or not it is
4042 replaceable, check to see if it is replaceable because its final value
4043 can be calculated. This must be done after loop_iterations is called,
4044 so that final_giv_value will work correctly. */
4046 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4048 struct induction
*v
;
4050 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4051 if (! v
->replaceable
&& ! v
->not_replaceable
)
4052 check_final_value (v
, loop_start
, loop_end
);
4055 /* Try to prove that the loop counter variable (if any) is always
4056 nonnegative; if so, record that fact with a REG_NONNEG note
4057 so that "decrement and branch until zero" insn can be used. */
4058 check_dbra_loop (loop_end
, insn_count
, loop_start
);
4060 /* Create reg_map to hold substitutions for replaceable giv regs. */
4061 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
4062 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
4064 /* Examine each iv class for feasibility of strength reduction/induction
4065 variable elimination. */
4067 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4069 struct induction
*v
;
4072 rtx final_value
= 0;
4074 /* Test whether it will be possible to eliminate this biv
4075 provided all givs are reduced. This is possible if either
4076 the reg is not used outside the loop, or we can compute
4077 what its final value will be.
4079 For architectures with a decrement_and_branch_until_zero insn,
4080 don't do this if we put a REG_NONNEG note on the endtest for
4083 /* Compare against bl->init_insn rather than loop_start.
4084 We aren't concerned with any uses of the biv between
4085 init_insn and loop_start since these won't be affected
4086 by the value of the biv elsewhere in the function, so
4087 long as init_insn doesn't use the biv itself.
4088 March 14, 1989 -- self@bayes.arc.nasa.gov */
4090 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
4092 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
4093 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
4094 #ifdef HAVE_decrement_and_branch_until_zero
4097 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
4098 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
4099 #ifdef HAVE_decrement_and_branch_until_zero
4103 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
4104 threshold
, insn_count
);
4107 if (loop_dump_stream
)
4109 fprintf (loop_dump_stream
,
4110 "Cannot eliminate biv %d.\n",
4112 fprintf (loop_dump_stream
,
4113 "First use: insn %d, last use: insn %d.\n",
4114 REGNO_FIRST_UID (bl
->regno
),
4115 REGNO_LAST_UID (bl
->regno
));
4119 /* Combine all giv's for this iv_class. */
4122 /* This will be true at the end, if all givs which depend on this
4123 biv have been strength reduced.
4124 We can't (currently) eliminate the biv unless this is so. */
4127 /* Check each giv in this class to see if we will benefit by reducing
4128 it. Skip giv's combined with others. */
4129 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4131 struct induction
*tv
;
4133 if (v
->ignore
|| v
->same
)
4136 benefit
= v
->benefit
;
4138 /* Reduce benefit if not replaceable, since we will insert
4139 a move-insn to replace the insn that calculates this giv.
4140 Don't do this unless the giv is a user variable, since it
4141 will often be marked non-replaceable because of the duplication
4142 of the exit code outside the loop. In such a case, the copies
4143 we insert are dead and will be deleted. So they don't have
4144 a cost. Similar situations exist. */
4145 /* ??? The new final_[bg]iv_value code does a much better job
4146 of finding replaceable giv's, and hence this code may no longer
4148 if (! v
->replaceable
&& ! bl
->eliminable
4149 && REG_USERVAR_P (v
->dest_reg
))
4150 benefit
-= copy_cost
;
4152 /* Decrease the benefit to count the add-insns that we will
4153 insert to increment the reduced reg for the giv. */
4154 benefit
-= add_cost
* bl
->biv_count
;
4156 /* Decide whether to strength-reduce this giv or to leave the code
4157 unchanged (recompute it from the biv each time it is used).
4158 This decision can be made independently for each giv. */
4161 /* Attempt to guess whether autoincrement will handle some of the
4162 new add insns; if so, increase BENEFIT (undo the subtraction of
4163 add_cost that was done above). */
4164 if (v
->giv_type
== DEST_ADDR
4165 && GET_CODE (v
->mult_val
) == CONST_INT
)
4167 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
4168 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4169 benefit
+= add_cost
* bl
->biv_count
;
4171 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
4172 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
4173 benefit
+= add_cost
* bl
->biv_count
;
4178 /* If an insn is not to be strength reduced, then set its ignore
4179 flag, and clear all_reduced. */
4181 /* A giv that depends on a reversed biv must be reduced if it is
4182 used after the loop exit, otherwise, it would have the wrong
4183 value after the loop exit. To make it simple, just reduce all
4184 of such giv's whether or not we know they are used after the loop
4187 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4190 if (loop_dump_stream
)
4191 fprintf (loop_dump_stream
,
4192 "giv of insn %d not worth while, %d vs %d.\n",
4194 v
->lifetime
* threshold
* benefit
, insn_count
);
4200 /* Check that we can increment the reduced giv without a
4201 multiply insn. If not, reject it. */
4203 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4204 if (tv
->mult_val
== const1_rtx
4205 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4207 if (loop_dump_stream
)
4208 fprintf (loop_dump_stream
,
4209 "giv of insn %d: would need a multiply.\n",
4210 INSN_UID (v
->insn
));
4218 /* Reduce each giv that we decided to reduce. */
4220 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4222 struct induction
*tv
;
4223 if (! v
->ignore
&& v
->same
== 0)
4225 int auto_inc_opt
= 0;
4227 v
->new_reg
= gen_reg_rtx (v
->mode
);
4230 /* If the target has auto-increment addressing modes, and
4231 this is an address giv, then try to put the increment
4232 immediately after its use, so that flow can create an
4233 auto-increment addressing mode. */
4234 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4235 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4236 /* We don't handle reversed biv's because bl->biv->insn
4237 does not have a valid INSN_LUID. */
4239 && v
->always_executed
&& ! v
->maybe_multiple
4240 && INSN_UID (v
->insn
) < max_uid_for_loop
)
4242 /* If other giv's have been combined with this one, then
4243 this will work only if all uses of the other giv's occur
4244 before this giv's insn. This is difficult to check.
4246 We simplify this by looking for the common case where
4247 there is one DEST_REG giv, and this giv's insn is the
4248 last use of the dest_reg of that DEST_REG giv. If the
4249 increment occurs after the address giv, then we can
4250 perform the optimization. (Otherwise, the increment
4251 would have to go before other_giv, and we would not be
4252 able to combine it with the address giv to get an
4253 auto-inc address.) */
4254 if (v
->combined_with
)
4256 struct induction
*other_giv
= 0;
4258 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4266 if (! tv
&& other_giv
4267 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4268 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4269 == INSN_UID (v
->insn
))
4270 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4273 /* Check for case where increment is before the address
4274 giv. Do this test in "loop order". */
4275 else if ((INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
)
4276 && (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4277 || (INSN_LUID (bl
->biv
->insn
)
4278 > INSN_LUID (scan_start
))))
4279 || (INSN_LUID (v
->insn
) < INSN_LUID (scan_start
)
4280 && (INSN_LUID (scan_start
)
4281 < INSN_LUID (bl
->biv
->insn
))))
4290 /* We can't put an insn immediately after one setting
4291 cc0, or immediately before one using cc0. */
4292 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4293 || (auto_inc_opt
== -1
4294 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4295 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4296 && sets_cc0_p (PATTERN (prev
))))
4302 v
->auto_inc_opt
= 1;
4306 /* For each place where the biv is incremented, add an insn
4307 to increment the new, reduced reg for the giv. */
4308 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4313 insert_before
= tv
->insn
;
4314 else if (auto_inc_opt
== 1)
4315 insert_before
= NEXT_INSN (v
->insn
);
4317 insert_before
= v
->insn
;
4319 if (tv
->mult_val
== const1_rtx
)
4320 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4321 v
->new_reg
, v
->new_reg
, insert_before
);
4322 else /* tv->mult_val == const0_rtx */
4323 /* A multiply is acceptable here
4324 since this is presumed to be seldom executed. */
4325 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4326 v
->add_val
, v
->new_reg
, insert_before
);
4329 /* Add code at loop start to initialize giv's reduced reg. */
4331 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4332 v
->add_val
, v
->new_reg
, loop_start
);
4336 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4339 For each giv register that can be reduced now: if replaceable,
4340 substitute reduced reg wherever the old giv occurs;
4341 else add new move insn "giv_reg = reduced_reg".
4343 Also check for givs whose first use is their definition and whose
4344 last use is the definition of another giv. If so, it is likely
4345 dead and should not be used to eliminate a biv. */
4346 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4348 if (v
->same
&& v
->same
->ignore
)
4354 if (v
->giv_type
== DEST_REG
4355 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4357 struct induction
*v1
;
4359 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4360 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4364 /* Update expression if this was combined, in case other giv was
4367 v
->new_reg
= replace_rtx (v
->new_reg
,
4368 v
->same
->dest_reg
, v
->same
->new_reg
);
4370 if (v
->giv_type
== DEST_ADDR
)
4371 /* Store reduced reg as the address in the memref where we found
4373 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4374 else if (v
->replaceable
)
4376 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4379 /* I can no longer duplicate the original problem. Perhaps
4380 this is unnecessary now? */
4382 /* Replaceable; it isn't strictly necessary to delete the old
4383 insn and emit a new one, because v->dest_reg is now dead.
4385 However, especially when unrolling loops, the special
4386 handling for (set REG0 REG1) in the second cse pass may
4387 make v->dest_reg live again. To avoid this problem, emit
4388 an insn to set the original giv reg from the reduced giv.
4389 We can not delete the original insn, since it may be part
4390 of a LIBCALL, and the code in flow that eliminates dead
4391 libcalls will fail if it is deleted. */
4392 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4398 /* Not replaceable; emit an insn to set the original giv reg from
4399 the reduced giv, same as above. */
4400 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4404 /* When a loop is reversed, givs which depend on the reversed
4405 biv, and which are live outside the loop, must be set to their
4406 correct final value. This insn is only needed if the giv is
4407 not replaceable. The correct final value is the same as the
4408 value that the giv starts the reversed loop with. */
4409 if (bl
->reversed
&& ! v
->replaceable
)
4410 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4411 v
->add_val
, v
->dest_reg
, end_insert_before
);
4412 else if (v
->final_value
)
4416 /* If the loop has multiple exits, emit the insn before the
4417 loop to ensure that it will always be executed no matter
4418 how the loop exits. Otherwise, emit the insn after the loop,
4419 since this is slightly more efficient. */
4420 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4421 insert_before
= loop_start
;
4423 insert_before
= end_insert_before
;
4424 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4428 /* If the insn to set the final value of the giv was emitted
4429 before the loop, then we must delete the insn inside the loop
4430 that sets it. If this is a LIBCALL, then we must delete
4431 every insn in the libcall. Note, however, that
4432 final_giv_value will only succeed when there are multiple
4433 exits if the giv is dead at each exit, hence it does not
4434 matter that the original insn remains because it is dead
4436 /* Delete the insn inside the loop that sets the giv since
4437 the giv is now set before (or after) the loop. */
4438 delete_insn (v
->insn
);
4442 if (loop_dump_stream
)
4444 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4445 INSN_UID (v
->insn
));
4446 print_rtl (loop_dump_stream
, v
->new_reg
);
4447 fprintf (loop_dump_stream
, "\n");
4451 /* All the givs based on the biv bl have been reduced if they
4454 /* For each giv not marked as maybe dead that has been combined with a
4455 second giv, clear any "maybe dead" mark on that second giv.
4456 v->new_reg will either be or refer to the register of the giv it
4459 Doing this clearing avoids problems in biv elimination where a
4460 giv's new_reg is a complex value that can't be put in the insn but
4461 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4462 Since the register will be used in either case, we'd prefer it be
4463 used from the simpler giv. */
4465 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4466 if (! v
->maybe_dead
&& v
->same
)
4467 v
->same
->maybe_dead
= 0;
4469 /* Try to eliminate the biv, if it is a candidate.
4470 This won't work if ! all_reduced,
4471 since the givs we planned to use might not have been reduced.
4473 We have to be careful that we didn't initially think we could eliminate
4474 this biv because of a giv that we now think may be dead and shouldn't
4475 be used as a biv replacement.
4477 Also, there is the possibility that we may have a giv that looks
4478 like it can be used to eliminate a biv, but the resulting insn
4479 isn't valid. This can happen, for example, on the 88k, where a
4480 JUMP_INSN can compare a register only with zero. Attempts to
4481 replace it with a compare with a constant will fail.
4483 Note that in cases where this call fails, we may have replaced some
4484 of the occurrences of the biv with a giv, but no harm was done in
4485 doing so in the rare cases where it can occur. */
4487 if (all_reduced
== 1 && bl
->eliminable
4488 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4489 threshold
, insn_count
))
4492 /* ?? If we created a new test to bypass the loop entirely,
4493 or otherwise drop straight in, based on this test, then
4494 we might want to rewrite it also. This way some later
4495 pass has more hope of removing the initialization of this
4498 /* If final_value != 0, then the biv may be used after loop end
4499 and we must emit an insn to set it just in case.
4501 Reversed bivs already have an insn after the loop setting their
4502 value, so we don't need another one. We can't calculate the
4503 proper final value for such a biv here anyways. */
4504 if (final_value
!= 0 && ! bl
->reversed
)
4508 /* If the loop has multiple exits, emit the insn before the
4509 loop to ensure that it will always be executed no matter
4510 how the loop exits. Otherwise, emit the insn after the
4511 loop, since this is slightly more efficient. */
4512 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4513 insert_before
= loop_start
;
4515 insert_before
= end_insert_before
;
4517 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4522 /* Delete all of the instructions inside the loop which set
4523 the biv, as they are all dead. If is safe to delete them,
4524 because an insn setting a biv will never be part of a libcall. */
4525 /* However, deleting them will invalidate the regno_last_uid info,
4526 so keeping them around is more convenient. Final_biv_value
4527 will only succeed when there are multiple exits if the biv
4528 is dead at each exit, hence it does not matter that the original
4529 insn remains, because it is dead anyways. */
4530 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4531 delete_insn (v
->insn
);
4534 if (loop_dump_stream
)
4535 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4540 /* Go through all the instructions in the loop, making all the
4541 register substitutions scheduled in REG_MAP. */
4543 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4544 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4545 || GET_CODE (p
) == CALL_INSN
)
4547 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4548 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4552 /* Unroll loops from within strength reduction so that we can use the
4553 induction variable information that strength_reduce has already
4557 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4559 #ifdef HAVE_decrement_and_branch_on_count
4560 /* Instrument the loop with BCT insn. */
4561 if (HAVE_decrement_and_branch_on_count
&& bct_p
4562 && flag_branch_on_count_reg
)
4563 insert_bct (loop_start
, loop_end
);
4564 #endif /* HAVE_decrement_and_branch_on_count */
4566 if (loop_dump_stream
)
4567 fprintf (loop_dump_stream
, "\n");
4570 /* Return 1 if X is a valid source for an initial value (or as value being
4571 compared against in an initial test).
4573 X must be either a register or constant and must not be clobbered between
4574 the current insn and the start of the loop.
4576 INSN is the insn containing X. */
4579 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4588 /* Only consider pseudos we know about initialized in insns whose luids
4590 if (GET_CODE (x
) != REG
4591 || REGNO (x
) >= max_reg_before_loop
)
4594 /* Don't use call-clobbered registers across a call which clobbers it. On
4595 some machines, don't use any hard registers at all. */
4596 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4597 && (SMALL_REGISTER_CLASSES
4598 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4601 /* Don't use registers that have been clobbered before the start of the
4603 if (reg_set_between_p (x
, insn
, loop_start
))
4609 /* Scan X for memory refs and check each memory address
4610 as a possible giv. INSN is the insn whose pattern X comes from.
4611 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4612 every loop iteration. */
4615 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4618 int not_every_iteration
;
4619 rtx loop_start
, loop_end
;
4622 register enum rtx_code code
;
4628 code
= GET_CODE (x
);
4652 /* This code used to disable creating GIVs with mult_val == 1 and
4653 add_val == 0. However, this leads to lost optimizations when
4654 it comes time to combine a set of related DEST_ADDR GIVs, since
4655 this one would not be seen. */
4657 if (general_induction_var (XEXP (x
, 0), &src_reg
, &add_val
,
4658 &mult_val
, 1, &benefit
))
4660 /* Found one; record it. */
4662 = (struct induction
*) oballoc (sizeof (struct induction
));
4664 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4665 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4666 &XEXP (x
, 0), loop_start
, loop_end
);
4668 v
->mem_mode
= GET_MODE (x
);
4677 /* Recursively scan the subexpressions for other mem refs. */
4679 fmt
= GET_RTX_FORMAT (code
);
4680 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4682 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4684 else if (fmt
[i
] == 'E')
4685 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4686 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4687 loop_start
, loop_end
);
4690 /* Fill in the data about one biv update.
4691 V is the `struct induction' in which we record the biv. (It is
4692 allocated by the caller, with alloca.)
4693 INSN is the insn that sets it.
4694 DEST_REG is the biv's reg.
4696 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4697 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4698 being set to INC_VAL.
4700 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4701 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4702 can be executed more than once per iteration. If MAYBE_MULTIPLE
4703 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4704 executed exactly once per iteration. */
4707 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4708 not_every_iteration
, maybe_multiple
)
4709 struct induction
*v
;
4714 int not_every_iteration
;
4717 struct iv_class
*bl
;
4720 v
->src_reg
= dest_reg
;
4721 v
->dest_reg
= dest_reg
;
4722 v
->mult_val
= mult_val
;
4723 v
->add_val
= inc_val
;
4724 v
->mode
= GET_MODE (dest_reg
);
4725 v
->always_computable
= ! not_every_iteration
;
4726 v
->always_executed
= ! not_every_iteration
;
4727 v
->maybe_multiple
= maybe_multiple
;
4729 /* Add this to the reg's iv_class, creating a class
4730 if this is the first incrementation of the reg. */
4732 bl
= reg_biv_class
[REGNO (dest_reg
)];
4735 /* Create and initialize new iv_class. */
4737 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4739 bl
->regno
= REGNO (dest_reg
);
4745 /* Set initial value to the reg itself. */
4746 bl
->initial_value
= dest_reg
;
4747 /* We haven't seen the initializing insn yet */
4750 bl
->initial_test
= 0;
4751 bl
->incremented
= 0;
4755 bl
->total_benefit
= 0;
4757 /* Add this class to loop_iv_list. */
4758 bl
->next
= loop_iv_list
;
4761 /* Put it in the array of biv register classes. */
4762 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4765 /* Update IV_CLASS entry for this biv. */
4766 v
->next_iv
= bl
->biv
;
4769 if (mult_val
== const1_rtx
)
4770 bl
->incremented
= 1;
4772 if (loop_dump_stream
)
4774 fprintf (loop_dump_stream
,
4775 "Insn %d: possible biv, reg %d,",
4776 INSN_UID (insn
), REGNO (dest_reg
));
4777 if (GET_CODE (inc_val
) == CONST_INT
)
4779 fprintf (loop_dump_stream
, " const =");
4780 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (inc_val
));
4781 fputc ('\n', loop_dump_stream
);
4785 fprintf (loop_dump_stream
, " const = ");
4786 print_rtl (loop_dump_stream
, inc_val
);
4787 fprintf (loop_dump_stream
, "\n");
4792 /* Fill in the data about one giv.
4793 V is the `struct induction' in which we record the giv. (It is
4794 allocated by the caller, with alloca.)
4795 INSN is the insn that sets it.
4796 BENEFIT estimates the savings from deleting this insn.
4797 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4798 into a register or is used as a memory address.
4800 SRC_REG is the biv reg which the giv is computed from.
4801 DEST_REG is the giv's reg (if the giv is stored in a reg).
4802 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4803 LOCATION points to the place where this giv's value appears in INSN. */
4806 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4807 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4808 struct induction
*v
;
4812 rtx mult_val
, add_val
;
4815 int not_every_iteration
;
4817 rtx loop_start
, loop_end
;
4819 struct induction
*b
;
4820 struct iv_class
*bl
;
4821 rtx set
= single_set (insn
);
4824 v
->src_reg
= src_reg
;
4826 v
->dest_reg
= dest_reg
;
4827 v
->mult_val
= mult_val
;
4828 v
->add_val
= add_val
;
4829 v
->benefit
= benefit
;
4830 v
->location
= location
;
4832 v
->combined_with
= 0;
4833 v
->maybe_multiple
= 0;
4835 v
->derive_adjustment
= 0;
4841 v
->auto_inc_opt
= 0;
4845 /* The v->always_computable field is used in update_giv_derive, to
4846 determine whether a giv can be used to derive another giv. For a
4847 DEST_REG giv, INSN computes a new value for the giv, so its value
4848 isn't computable if INSN insn't executed every iteration.
4849 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4850 it does not compute a new value. Hence the value is always computable
4851 regardless of whether INSN is executed each iteration. */
4853 if (type
== DEST_ADDR
)
4854 v
->always_computable
= 1;
4856 v
->always_computable
= ! not_every_iteration
;
4858 v
->always_executed
= ! not_every_iteration
;
4860 if (type
== DEST_ADDR
)
4862 v
->mode
= GET_MODE (*location
);
4866 else /* type == DEST_REG */
4868 v
->mode
= GET_MODE (SET_DEST (set
));
4870 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4871 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4873 v
->times_used
= VARRAY_INT (n_times_used
, REGNO (dest_reg
));
4875 /* If the lifetime is zero, it means that this register is
4876 really a dead store. So mark this as a giv that can be
4877 ignored. This will not prevent the biv from being eliminated. */
4878 if (v
->lifetime
== 0)
4881 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4882 reg_iv_info
[REGNO (dest_reg
)] = v
;
4885 /* Add the giv to the class of givs computed from one biv. */
4887 bl
= reg_biv_class
[REGNO (src_reg
)];
4890 v
->next_iv
= bl
->giv
;
4892 /* Don't count DEST_ADDR. This is supposed to count the number of
4893 insns that calculate givs. */
4894 if (type
== DEST_REG
)
4896 bl
->total_benefit
+= benefit
;
4899 /* Fatal error, biv missing for this giv? */
4902 if (type
== DEST_ADDR
)
4906 /* The giv can be replaced outright by the reduced register only if all
4907 of the following conditions are true:
4908 - the insn that sets the giv is always executed on any iteration
4909 on which the giv is used at all
4910 (there are two ways to deduce this:
4911 either the insn is executed on every iteration,
4912 or all uses follow that insn in the same basic block),
4913 - the giv is not used outside the loop
4914 - no assignments to the biv occur during the giv's lifetime. */
4916 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4917 /* Previous line always fails if INSN was moved by loop opt. */
4918 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4919 && (! not_every_iteration
4920 || last_use_this_basic_block (dest_reg
, insn
)))
4922 /* Now check that there are no assignments to the biv within the
4923 giv's lifetime. This requires two separate checks. */
4925 /* Check each biv update, and fail if any are between the first
4926 and last use of the giv.
4928 If this loop contains an inner loop that was unrolled, then
4929 the insn modifying the biv may have been emitted by the loop
4930 unrolling code, and hence does not have a valid luid. Just
4931 mark the biv as not replaceable in this case. It is not very
4932 useful as a biv, because it is used in two different loops.
4933 It is very unlikely that we would be able to optimize the giv
4934 using this biv anyways. */
4937 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4939 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4940 || ((uid_luid
[INSN_UID (b
->insn
)]
4941 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4942 && (uid_luid
[INSN_UID (b
->insn
)]
4943 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4946 v
->not_replaceable
= 1;
4951 /* If there are any backwards branches that go from after the
4952 biv update to before it, then this giv is not replaceable. */
4954 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4955 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4958 v
->not_replaceable
= 1;
4964 /* May still be replaceable, we don't have enough info here to
4967 v
->not_replaceable
= 0;
4971 /* Record whether the add_val contains a const_int, for later use by
4976 v
->no_const_addval
= 1;
4977 if (tem
== const0_rtx
)
4979 else if (GET_CODE (tem
) == CONST_INT
)
4980 v
->no_const_addval
= 0;
4981 else if (GET_CODE (tem
) == PLUS
)
4985 if (GET_CODE (XEXP (tem
, 0)) == PLUS
)
4986 tem
= XEXP (tem
, 0);
4987 else if (GET_CODE (XEXP (tem
, 1)) == PLUS
)
4988 tem
= XEXP (tem
, 1);
4992 if (GET_CODE (XEXP (tem
, 1)) == CONST_INT
)
4993 v
->no_const_addval
= 0;
4997 if (loop_dump_stream
)
4999 if (type
== DEST_REG
)
5000 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
5001 INSN_UID (insn
), REGNO (dest_reg
));
5003 fprintf (loop_dump_stream
, "Insn %d: dest address",
5006 fprintf (loop_dump_stream
, " src reg %d benefit %d",
5007 REGNO (src_reg
), v
->benefit
);
5008 fprintf (loop_dump_stream
, " used %d lifetime %d",
5009 v
->times_used
, v
->lifetime
);
5012 fprintf (loop_dump_stream
, " replaceable");
5014 if (v
->no_const_addval
)
5015 fprintf (loop_dump_stream
, " ncav");
5017 if (GET_CODE (mult_val
) == CONST_INT
)
5019 fprintf (loop_dump_stream
, " mult ");
5020 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (mult_val
));
5024 fprintf (loop_dump_stream
, " mult ");
5025 print_rtl (loop_dump_stream
, mult_val
);
5028 if (GET_CODE (add_val
) == CONST_INT
)
5030 fprintf (loop_dump_stream
, " add ");
5031 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (add_val
));
5035 fprintf (loop_dump_stream
, " add ");
5036 print_rtl (loop_dump_stream
, add_val
);
5040 if (loop_dump_stream
)
5041 fprintf (loop_dump_stream
, "\n");
5046 /* All this does is determine whether a giv can be made replaceable because
5047 its final value can be calculated. This code can not be part of record_giv
5048 above, because final_giv_value requires that the number of loop iterations
5049 be known, and that can not be accurately calculated until after all givs
5050 have been identified. */
5053 check_final_value (v
, loop_start
, loop_end
)
5054 struct induction
*v
;
5055 rtx loop_start
, loop_end
;
5057 struct iv_class
*bl
;
5058 rtx final_value
= 0;
5060 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
5062 /* DEST_ADDR givs will never reach here, because they are always marked
5063 replaceable above in record_giv. */
5065 /* The giv can be replaced outright by the reduced register only if all
5066 of the following conditions are true:
5067 - the insn that sets the giv is always executed on any iteration
5068 on which the giv is used at all
5069 (there are two ways to deduce this:
5070 either the insn is executed on every iteration,
5071 or all uses follow that insn in the same basic block),
5072 - its final value can be calculated (this condition is different
5073 than the one above in record_giv)
5074 - no assignments to the biv occur during the giv's lifetime. */
5077 /* This is only called now when replaceable is known to be false. */
5078 /* Clear replaceable, so that it won't confuse final_giv_value. */
5082 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
5083 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
5085 int biv_increment_seen
= 0;
5091 /* When trying to determine whether or not a biv increment occurs
5092 during the lifetime of the giv, we can ignore uses of the variable
5093 outside the loop because final_value is true. Hence we can not
5094 use regno_last_uid and regno_first_uid as above in record_giv. */
5096 /* Search the loop to determine whether any assignments to the
5097 biv occur during the giv's lifetime. Start with the insn
5098 that sets the giv, and search around the loop until we come
5099 back to that insn again.
5101 Also fail if there is a jump within the giv's lifetime that jumps
5102 to somewhere outside the lifetime but still within the loop. This
5103 catches spaghetti code where the execution order is not linear, and
5104 hence the above test fails. Here we assume that the giv lifetime
5105 does not extend from one iteration of the loop to the next, so as
5106 to make the test easier. Since the lifetime isn't known yet,
5107 this requires two loops. See also record_giv above. */
5109 last_giv_use
= v
->insn
;
5115 p
= NEXT_INSN (loop_start
);
5119 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
5120 || GET_CODE (p
) == CALL_INSN
)
5122 if (biv_increment_seen
)
5124 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5127 v
->not_replaceable
= 1;
5131 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
5132 biv_increment_seen
= 1;
5133 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
5138 /* Now that the lifetime of the giv is known, check for branches
5139 from within the lifetime to outside the lifetime if it is still
5149 p
= NEXT_INSN (loop_start
);
5150 if (p
== last_giv_use
)
5153 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
5154 && LABEL_NAME (JUMP_LABEL (p
))
5155 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
5156 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
5157 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
5158 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
5159 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
5160 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
5161 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
5164 v
->not_replaceable
= 1;
5166 if (loop_dump_stream
)
5167 fprintf (loop_dump_stream
,
5168 "Found branch outside giv lifetime.\n");
5175 /* If it is replaceable, then save the final value. */
5177 v
->final_value
= final_value
;
5180 if (loop_dump_stream
&& v
->replaceable
)
5181 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
5182 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
5185 /* Update the status of whether a giv can derive other givs.
5187 We need to do something special if there is or may be an update to the biv
5188 between the time the giv is defined and the time it is used to derive
5191 In addition, a giv that is only conditionally set is not allowed to
5192 derive another giv once a label has been passed.
5194 The cases we look at are when a label or an update to a biv is passed. */
5197 update_giv_derive (p
)
5200 struct iv_class
*bl
;
5201 struct induction
*biv
, *giv
;
5205 /* Search all IV classes, then all bivs, and finally all givs.
5207 There are three cases we are concerned with. First we have the situation
5208 of a giv that is only updated conditionally. In that case, it may not
5209 derive any givs after a label is passed.
5211 The second case is when a biv update occurs, or may occur, after the
5212 definition of a giv. For certain biv updates (see below) that are
5213 known to occur between the giv definition and use, we can adjust the
5214 giv definition. For others, or when the biv update is conditional,
5215 we must prevent the giv from deriving any other givs. There are two
5216 sub-cases within this case.
5218 If this is a label, we are concerned with any biv update that is done
5219 conditionally, since it may be done after the giv is defined followed by
5220 a branch here (actually, we need to pass both a jump and a label, but
5221 this extra tracking doesn't seem worth it).
5223 If this is a jump, we are concerned about any biv update that may be
5224 executed multiple times. We are actually only concerned about
5225 backward jumps, but it is probably not worth performing the test
5226 on the jump again here.
5228 If this is a biv update, we must adjust the giv status to show that a
5229 subsequent biv update was performed. If this adjustment cannot be done,
5230 the giv cannot derive further givs. */
5232 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5233 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5234 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5237 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5239 /* If cant_derive is already true, there is no point in
5240 checking all of these conditions again. */
5241 if (giv
->cant_derive
)
5244 /* If this giv is conditionally set and we have passed a label,
5245 it cannot derive anything. */
5246 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5247 giv
->cant_derive
= 1;
5249 /* Skip givs that have mult_val == 0, since
5250 they are really invariants. Also skip those that are
5251 replaceable, since we know their lifetime doesn't contain
5253 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5256 /* The only way we can allow this giv to derive another
5257 is if this is a biv increment and we can form the product
5258 of biv->add_val and giv->mult_val. In this case, we will
5259 be able to compute a compensation. */
5260 else if (biv
->insn
== p
)
5264 if (biv
->mult_val
== const1_rtx
)
5265 tem
= simplify_giv_expr (gen_rtx_MULT (giv
->mode
,
5270 if (tem
&& giv
->derive_adjustment
)
5271 tem
= simplify_giv_expr (gen_rtx_PLUS (giv
->mode
, tem
,
5272 giv
->derive_adjustment
),
5275 giv
->derive_adjustment
= tem
;
5277 giv
->cant_derive
= 1;
5279 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5280 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5281 giv
->cant_derive
= 1;
5286 /* Check whether an insn is an increment legitimate for a basic induction var.
5287 X is the source of insn P, or a part of it.
5288 MODE is the mode in which X should be interpreted.
5290 DEST_REG is the putative biv, also the destination of the insn.
5291 We accept patterns of these forms:
5292 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5293 REG = INVARIANT + REG
5295 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5296 and store the additive term into *INC_VAL.
5298 If X is an assignment of an invariant into DEST_REG, we set
5299 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5301 We also want to detect a BIV when it corresponds to a variable
5302 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5303 of the variable may be a PLUS that adds a SUBREG of that variable to
5304 an invariant and then sign- or zero-extends the result of the PLUS
5307 Most GIVs in such cases will be in the promoted mode, since that is the
5308 probably the natural computation mode (and almost certainly the mode
5309 used for addresses) on the machine. So we view the pseudo-reg containing
5310 the variable as the BIV, as if it were simply incremented.
5312 Note that treating the entire pseudo as a BIV will result in making
5313 simple increments to any GIVs based on it. However, if the variable
5314 overflows in its declared mode but not its promoted mode, the result will
5315 be incorrect. This is acceptable if the variable is signed, since
5316 overflows in such cases are undefined, but not if it is unsigned, since
5317 those overflows are defined. So we only check for SIGN_EXTEND and
5320 If we cannot find a biv, we return 0. */
5323 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5325 enum machine_mode mode
;
5331 register enum rtx_code code
;
5335 code
= GET_CODE (x
);
5339 if (rtx_equal_p (XEXP (x
, 0), dest_reg
)
5340 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5341 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5342 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5344 else if (rtx_equal_p (XEXP (x
, 1), dest_reg
)
5345 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5346 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5347 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5352 if (invariant_p (arg
) != 1)
5355 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5356 *mult_val
= const1_rtx
;
5360 /* If this is a SUBREG for a promoted variable, check the inner
5362 if (SUBREG_PROMOTED_VAR_P (x
))
5363 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5364 dest_reg
, p
, inc_val
, mult_val
);
5368 /* If this register is assigned in a previous insn, look at its
5369 source, but don't go outside the loop or past a label. */
5375 insn
= PREV_INSN (insn
);
5376 } while (insn
&& GET_CODE (insn
) == NOTE
5377 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5381 set
= single_set (insn
);
5385 if ((SET_DEST (set
) == x
5386 || (GET_CODE (SET_DEST (set
)) == SUBREG
5387 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5389 && SUBREG_REG (SET_DEST (set
)) == x
))
5390 && basic_induction_var (SET_SRC (set
),
5391 (GET_MODE (SET_SRC (set
)) == VOIDmode
5393 : GET_MODE (SET_SRC (set
))),
5398 /* ... fall through ... */
5400 /* Can accept constant setting of biv only when inside inner most loop.
5401 Otherwise, a biv of an inner loop may be incorrectly recognized
5402 as a biv of the outer loop,
5403 causing code to be moved INTO the inner loop. */
5405 if (invariant_p (x
) != 1)
5410 /* convert_modes aborts if we try to convert to or from CCmode, so just
5411 exclude that case. It is very unlikely that a condition code value
5412 would be a useful iterator anyways. */
5413 if (loops_enclosed
== 1
5414 && GET_MODE_CLASS (mode
) != MODE_CC
5415 && GET_MODE_CLASS (GET_MODE (dest_reg
)) != MODE_CC
)
5417 /* Possible bug here? Perhaps we don't know the mode of X. */
5418 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5419 *mult_val
= const0_rtx
;
5426 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5427 dest_reg
, p
, inc_val
, mult_val
);
5430 /* Similar, since this can be a sign extension. */
5431 for (insn
= PREV_INSN (p
);
5432 (insn
&& GET_CODE (insn
) == NOTE
5433 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5434 insn
= PREV_INSN (insn
))
5438 set
= single_set (insn
);
5440 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5441 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5442 && INTVAL (XEXP (x
, 1)) >= 0
5443 && GET_CODE (SET_SRC (set
)) == ASHIFT
5444 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5445 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5446 GET_MODE (XEXP (x
, 0)),
5447 dest_reg
, insn
, inc_val
, mult_val
);
5455 /* A general induction variable (giv) is any quantity that is a linear
5456 function of a basic induction variable,
5457 i.e. giv = biv * mult_val + add_val.
5458 The coefficients can be any loop invariant quantity.
5459 A giv need not be computed directly from the biv;
5460 it can be computed by way of other givs. */
5462 /* Determine whether X computes a giv.
5463 If it does, return a nonzero value
5464 which is the benefit from eliminating the computation of X;
5465 set *SRC_REG to the register of the biv that it is computed from;
5466 set *ADD_VAL and *MULT_VAL to the coefficients,
5467 such that the value of X is biv * mult + add; */
5470 general_induction_var (x
, src_reg
, add_val
, mult_val
, is_addr
, pbenefit
)
5481 /* If this is an invariant, forget it, it isn't a giv. */
5482 if (invariant_p (x
) == 1)
5485 /* See if the expression could be a giv and get its form.
5486 Mark our place on the obstack in case we don't find a giv. */
5487 storage
= (char *) oballoc (0);
5489 x
= simplify_giv_expr (x
, pbenefit
);
5496 switch (GET_CODE (x
))
5500 /* Since this is now an invariant and wasn't before, it must be a giv
5501 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5503 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5504 *mult_val
= const0_rtx
;
5509 /* This is equivalent to a BIV. */
5511 *mult_val
= const1_rtx
;
5512 *add_val
= const0_rtx
;
5516 /* Either (plus (biv) (invar)) or
5517 (plus (mult (biv) (invar_1)) (invar_2)). */
5518 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5520 *src_reg
= XEXP (XEXP (x
, 0), 0);
5521 *mult_val
= XEXP (XEXP (x
, 0), 1);
5525 *src_reg
= XEXP (x
, 0);
5526 *mult_val
= const1_rtx
;
5528 *add_val
= XEXP (x
, 1);
5532 /* ADD_VAL is zero. */
5533 *src_reg
= XEXP (x
, 0);
5534 *mult_val
= XEXP (x
, 1);
5535 *add_val
= const0_rtx
;
5542 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5543 unless they are CONST_INT). */
5544 if (GET_CODE (*add_val
) == USE
)
5545 *add_val
= XEXP (*add_val
, 0);
5546 if (GET_CODE (*mult_val
) == USE
)
5547 *mult_val
= XEXP (*mult_val
, 0);
5552 *pbenefit
+= ADDRESS_COST (orig_x
) - reg_address_cost
;
5554 *pbenefit
+= rtx_cost (orig_x
, MEM
) - reg_address_cost
;
5558 *pbenefit
+= rtx_cost (orig_x
, SET
);
5560 /* Always return true if this is a giv so it will be detected as such,
5561 even if the benefit is zero or negative. This allows elimination
5562 of bivs that might otherwise not be eliminated. */
5566 /* Given an expression, X, try to form it as a linear function of a biv.
5567 We will canonicalize it to be of the form
5568 (plus (mult (BIV) (invar_1))
5570 with possible degeneracies.
5572 The invariant expressions must each be of a form that can be used as a
5573 machine operand. We surround then with a USE rtx (a hack, but localized
5574 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5575 routine; it is the caller's responsibility to strip them.
5577 If no such canonicalization is possible (i.e., two biv's are used or an
5578 expression that is neither invariant nor a biv or giv), this routine
5581 For a non-zero return, the result will have a code of CONST_INT, USE,
5582 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5584 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5586 static rtx sge_plus
PROTO ((enum machine_mode
, rtx
, rtx
));
5587 static rtx sge_plus_constant
PROTO ((rtx
, rtx
));
5590 simplify_giv_expr (x
, benefit
)
5594 enum machine_mode mode
= GET_MODE (x
);
5598 /* If this is not an integer mode, or if we cannot do arithmetic in this
5599 mode, this can't be a giv. */
5600 if (mode
!= VOIDmode
5601 && (GET_MODE_CLASS (mode
) != MODE_INT
5602 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5605 switch (GET_CODE (x
))
5608 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5609 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5610 if (arg0
== 0 || arg1
== 0)
5613 /* Put constant last, CONST_INT last if both constant. */
5614 if ((GET_CODE (arg0
) == USE
5615 || GET_CODE (arg0
) == CONST_INT
)
5616 && ! ((GET_CODE (arg0
) == USE
5617 && GET_CODE (arg1
) == USE
)
5618 || GET_CODE (arg1
) == CONST_INT
))
5619 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5621 /* Handle addition of zero, then addition of an invariant. */
5622 if (arg1
== const0_rtx
)
5624 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5625 switch (GET_CODE (arg0
))
5629 /* Adding two invariants must result in an invariant, so enclose
5630 addition operation inside a USE and return it. */
5631 if (GET_CODE (arg0
) == USE
)
5632 arg0
= XEXP (arg0
, 0);
5633 if (GET_CODE (arg1
) == USE
)
5634 arg1
= XEXP (arg1
, 0);
5636 if (GET_CODE (arg0
) == CONST_INT
)
5637 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5638 if (GET_CODE (arg1
) == CONST_INT
)
5639 tem
= sge_plus_constant (arg0
, arg1
);
5641 tem
= sge_plus (mode
, arg0
, arg1
);
5643 if (GET_CODE (tem
) != CONST_INT
)
5644 tem
= gen_rtx_USE (mode
, tem
);
5649 /* biv + invar or mult + invar. Return sum. */
5650 return gen_rtx_PLUS (mode
, arg0
, arg1
);
5653 /* (a + invar_1) + invar_2. Associate. */
5654 return simplify_giv_expr (
5655 gen_rtx_PLUS (mode
, XEXP (arg0
, 0),
5656 gen_rtx_PLUS (mode
, XEXP (arg0
, 1), arg1
)),
5663 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5664 MULT to reduce cases. */
5665 if (GET_CODE (arg0
) == REG
)
5666 arg0
= gen_rtx_MULT (mode
, arg0
, const1_rtx
);
5667 if (GET_CODE (arg1
) == REG
)
5668 arg1
= gen_rtx_MULT (mode
, arg1
, const1_rtx
);
5670 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5671 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5672 Recurse to associate the second PLUS. */
5673 if (GET_CODE (arg1
) == MULT
)
5674 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5676 if (GET_CODE (arg1
) == PLUS
)
5677 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5678 gen_rtx_PLUS (mode
, arg0
,
5683 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5684 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5687 if (!rtx_equal_p (arg0
, arg1
))
5690 return simplify_giv_expr (gen_rtx_MULT (mode
,
5698 /* Handle "a - b" as "a + b * (-1)". */
5699 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5701 gen_rtx_MULT (mode
, XEXP (x
, 1),
5706 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5707 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5708 if (arg0
== 0 || arg1
== 0)
5711 /* Put constant last, CONST_INT last if both constant. */
5712 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5713 && GET_CODE (arg1
) != CONST_INT
)
5714 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5716 /* If second argument is not now constant, not giv. */
5717 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5720 /* Handle multiply by 0 or 1. */
5721 if (arg1
== const0_rtx
)
5724 else if (arg1
== const1_rtx
)
5727 switch (GET_CODE (arg0
))
5730 /* biv * invar. Done. */
5731 return gen_rtx_MULT (mode
, arg0
, arg1
);
5734 /* Product of two constants. */
5735 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5738 /* invar * invar. It is a giv, but very few of these will
5739 actually pay off, so limit to simple registers. */
5740 if (GET_CODE (arg1
) != CONST_INT
)
5743 arg0
= XEXP (arg0
, 0);
5744 if (GET_CODE (arg0
) == REG
)
5745 tem
= gen_rtx_MULT (mode
, arg0
, arg1
);
5746 else if (GET_CODE (arg0
) == MULT
5747 && GET_CODE (XEXP (arg0
, 0)) == REG
5748 && GET_CODE (XEXP (arg0
, 1)) == CONST_INT
)
5750 tem
= gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5751 GEN_INT (INTVAL (XEXP (arg0
, 1))
5756 return gen_rtx_USE (mode
, tem
);
5759 /* (a * invar_1) * invar_2. Associate. */
5760 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (arg0
, 0),
5767 /* (a + invar_1) * invar_2. Distribute. */
5768 return simplify_giv_expr (gen_rtx_PLUS (mode
,
5782 /* Shift by constant is multiply by power of two. */
5783 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5786 return simplify_giv_expr (gen_rtx_MULT (mode
,
5788 GEN_INT ((HOST_WIDE_INT
) 1
5789 << INTVAL (XEXP (x
, 1)))),
5793 /* "-a" is "a * (-1)" */
5794 return simplify_giv_expr (gen_rtx_MULT (mode
, XEXP (x
, 0), constm1_rtx
),
5798 /* "~a" is "-a - 1". Silly, but easy. */
5799 return simplify_giv_expr (gen_rtx_MINUS (mode
,
5800 gen_rtx_NEG (mode
, XEXP (x
, 0)),
5805 /* Already in proper form for invariant. */
5809 /* If this is a new register, we can't deal with it. */
5810 if (REGNO (x
) >= max_reg_before_loop
)
5813 /* Check for biv or giv. */
5814 switch (reg_iv_type
[REGNO (x
)])
5818 case GENERAL_INDUCT
:
5820 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5822 /* Form expression from giv and add benefit. Ensure this giv
5823 can derive another and subtract any needed adjustment if so. */
5824 *benefit
+= v
->benefit
;
5828 tem
= gen_rtx_PLUS (mode
, gen_rtx_MULT (mode
, v
->src_reg
,
5831 if (v
->derive_adjustment
)
5832 tem
= gen_rtx_MINUS (mode
, tem
, v
->derive_adjustment
);
5833 return simplify_giv_expr (tem
, benefit
);
5837 /* If it isn't an induction variable, and it is invariant, we
5838 may be able to simplify things further by looking through
5839 the bits we just moved outside the loop. */
5840 if (invariant_p (x
) == 1)
5844 for (m
= the_movables
; m
; m
= m
->next
)
5845 if (rtx_equal_p (x
, m
->set_dest
))
5847 /* Ok, we found a match. Substitute and simplify. */
5849 /* If we match another movable, we must use that, as
5850 this one is going away. */
5852 return simplify_giv_expr (m
->match
->set_dest
, benefit
);
5854 /* If consec is non-zero, this is a member of a group of
5855 instructions that were moved together. We handle this
5856 case only to the point of seeking to the last insn and
5857 looking for a REG_EQUAL. Fail if we don't find one. */
5862 do { tem
= NEXT_INSN (tem
); } while (--i
> 0);
5864 tem
= find_reg_note (tem
, REG_EQUAL
, NULL_RTX
);
5866 tem
= XEXP (tem
, 0);
5870 tem
= single_set (m
->insn
);
5872 tem
= SET_SRC (tem
);
5877 /* What we are most interested in is pointer
5878 arithmetic on invariants -- only take
5879 patterns we may be able to do something with. */
5880 if (GET_CODE (tem
) == PLUS
5881 || GET_CODE (tem
) == MULT
5882 || GET_CODE (tem
) == ASHIFT
5883 || GET_CODE (tem
) == CONST_INT
5884 || GET_CODE (tem
) == SYMBOL_REF
)
5886 tem
= simplify_giv_expr (tem
, benefit
);
5890 else if (GET_CODE (tem
) == CONST
5891 && GET_CODE (XEXP (tem
, 0)) == PLUS
5892 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == SYMBOL_REF
5893 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)
5895 tem
= simplify_giv_expr (XEXP (tem
, 0), benefit
);
5906 /* Fall through to general case. */
5908 /* If invariant, return as USE (unless CONST_INT).
5909 Otherwise, not giv. */
5910 if (GET_CODE (x
) == USE
)
5913 if (invariant_p (x
) == 1)
5915 if (GET_CODE (x
) == CONST_INT
)
5917 if (GET_CODE (x
) == CONST
5918 && GET_CODE (XEXP (x
, 0)) == PLUS
5919 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
5920 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
5922 return gen_rtx_USE (mode
, x
);
5929 /* This routine folds invariants such that there is only ever one
5930 CONST_INT in the summation. It is only used by simplify_giv_expr. */
5933 sge_plus_constant (x
, c
)
5936 if (GET_CODE (x
) == CONST_INT
)
5937 return GEN_INT (INTVAL (x
) + INTVAL (c
));
5938 else if (GET_CODE (x
) != PLUS
)
5939 return gen_rtx_PLUS (GET_MODE (x
), x
, c
);
5940 else if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5942 return gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0),
5943 GEN_INT (INTVAL (XEXP (x
, 1)) + INTVAL (c
)));
5945 else if (GET_CODE (XEXP (x
, 0)) == PLUS
5946 || GET_CODE (XEXP (x
, 1)) != PLUS
)
5948 return gen_rtx_PLUS (GET_MODE (x
),
5949 sge_plus_constant (XEXP (x
, 0), c
), XEXP (x
, 1));
5953 return gen_rtx_PLUS (GET_MODE (x
),
5954 sge_plus_constant (XEXP (x
, 1), c
), XEXP (x
, 0));
5959 sge_plus (mode
, x
, y
)
5960 enum machine_mode mode
;
5963 while (GET_CODE (y
) == PLUS
)
5965 rtx a
= XEXP (y
, 0);
5966 if (GET_CODE (a
) == CONST_INT
)
5967 x
= sge_plus_constant (x
, a
);
5969 x
= gen_rtx_PLUS (mode
, x
, a
);
5972 if (GET_CODE (y
) == CONST_INT
)
5973 x
= sge_plus_constant (x
, y
);
5975 x
= gen_rtx_PLUS (mode
, x
, y
);
5979 /* Help detect a giv that is calculated by several consecutive insns;
5983 The caller has already identified the first insn P as having a giv as dest;
5984 we check that all other insns that set the same register follow
5985 immediately after P, that they alter nothing else,
5986 and that the result of the last is still a giv.
5988 The value is 0 if the reg set in P is not really a giv.
5989 Otherwise, the value is the amount gained by eliminating
5990 all the consecutive insns that compute the value.
5992 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5993 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5995 The coefficients of the ultimate giv value are stored in
5996 *MULT_VAL and *ADD_VAL. */
5999 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
6014 /* Indicate that this is a giv so that we can update the value produced in
6015 each insn of the multi-insn sequence.
6017 This induction structure will be used only by the call to
6018 general_induction_var below, so we can allocate it on our stack.
6019 If this is a giv, our caller will replace the induct var entry with
6020 a new induction structure. */
6022 = (struct induction
*) alloca (sizeof (struct induction
));
6023 v
->src_reg
= src_reg
;
6024 v
->mult_val
= *mult_val
;
6025 v
->add_val
= *add_val
;
6026 v
->benefit
= first_benefit
;
6028 v
->derive_adjustment
= 0;
6030 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
6031 reg_iv_info
[REGNO (dest_reg
)] = v
;
6033 count
= VARRAY_INT (n_times_set
, REGNO (dest_reg
)) - 1;
6038 code
= GET_CODE (p
);
6040 /* If libcall, skip to end of call sequence. */
6041 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
6045 && (set
= single_set (p
))
6046 && GET_CODE (SET_DEST (set
)) == REG
6047 && SET_DEST (set
) == dest_reg
6048 && (general_induction_var (SET_SRC (set
), &src_reg
,
6049 add_val
, mult_val
, 0, &benefit
)
6050 /* Giv created by equivalent expression. */
6051 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
6052 && general_induction_var (XEXP (temp
, 0), &src_reg
,
6053 add_val
, mult_val
, 0, &benefit
)))
6054 && src_reg
== v
->src_reg
)
6056 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
6057 benefit
+= libcall_benefit (p
);
6060 v
->mult_val
= *mult_val
;
6061 v
->add_val
= *add_val
;
6062 v
->benefit
= benefit
;
6064 else if (code
!= NOTE
)
6066 /* Allow insns that set something other than this giv to a
6067 constant. Such insns are needed on machines which cannot
6068 include long constants and should not disqualify a giv. */
6070 && (set
= single_set (p
))
6071 && SET_DEST (set
) != dest_reg
6072 && CONSTANT_P (SET_SRC (set
)))
6075 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
6083 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6084 represented by G1. If no such expression can be found, or it is clear that
6085 it cannot possibly be a valid address, 0 is returned.
6087 To perform the computation, we note that
6090 where `v' is the biv.
6092 So G2 = (y/b) * G1 + (b - a*y/x).
6094 Note that MULT = y/x.
6096 Update: A and B are now allowed to be additive expressions such that
6097 B contains all variables in A. That is, computing B-A will not require
6098 subtracting variables. */
6101 express_from_1 (a
, b
, mult
)
6104 /* If MULT is zero, then A*MULT is zero, and our expression is B. */
6106 if (mult
== const0_rtx
)
6109 /* If MULT is not 1, we cannot handle A with non-constants, since we
6110 would then be required to subtract multiples of the registers in A.
6111 This is theoretically possible, and may even apply to some Fortran
6112 constructs, but it is a lot of work and we do not attempt it here. */
6114 if (mult
!= const1_rtx
&& GET_CODE (a
) != CONST_INT
)
6117 /* In general these structures are sorted top to bottom (down the PLUS
6118 chain), but not left to right across the PLUS. If B is a higher
6119 order giv than A, we can strip one level and recurse. If A is higher
6120 order, we'll eventually bail out, but won't know that until the end.
6121 If they are the same, we'll strip one level around this loop. */
6123 while (GET_CODE (a
) == PLUS
&& GET_CODE (b
) == PLUS
)
6125 rtx ra
, rb
, oa
, ob
, tmp
;
6127 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6128 if (GET_CODE (ra
) == PLUS
)
6129 tmp
= ra
, ra
= oa
, oa
= tmp
;
6131 rb
= XEXP (b
, 0), ob
= XEXP (b
, 1);
6132 if (GET_CODE (rb
) == PLUS
)
6133 tmp
= rb
, rb
= ob
, ob
= tmp
;
6135 if (rtx_equal_p (ra
, rb
))
6136 /* We matched: remove one reg completely. */
6138 else if (GET_CODE (ob
) != PLUS
&& rtx_equal_p (ra
, ob
))
6139 /* An alternate match. */
6141 else if (GET_CODE (oa
) != PLUS
&& rtx_equal_p (oa
, rb
))
6142 /* An alternate match. */
6146 /* Indicates an extra register in B. Strip one level from B and
6147 recurse, hoping B was the higher order expression. */
6148 ob
= express_from_1 (a
, ob
, mult
);
6151 return gen_rtx_PLUS (GET_MODE (b
), rb
, ob
);
6155 /* Here we are at the last level of A, go through the cases hoping to
6156 get rid of everything but a constant. */
6158 if (GET_CODE (a
) == PLUS
)
6162 ra
= XEXP (a
, 0), oa
= XEXP (a
, 1);
6163 if (rtx_equal_p (oa
, b
))
6165 else if (!rtx_equal_p (ra
, b
))
6168 if (GET_CODE (oa
) != CONST_INT
)
6171 return GEN_INT (-INTVAL (oa
) * INTVAL (mult
));
6173 else if (GET_CODE (a
) == CONST_INT
)
6175 return plus_constant (b
, -INTVAL (a
) * INTVAL (mult
));
6177 else if (GET_CODE (b
) == PLUS
)
6179 if (rtx_equal_p (a
, XEXP (b
, 0)))
6181 else if (rtx_equal_p (a
, XEXP (b
, 1)))
6186 else if (rtx_equal_p (a
, b
))
6193 express_from (g1
, g2
)
6194 struct induction
*g1
, *g2
;
6198 /* The value that G1 will be multiplied by must be a constant integer. Also,
6199 the only chance we have of getting a valid address is if b*c/a (see above
6200 for notation) is also an integer. */
6201 if (GET_CODE (g1
->mult_val
) == CONST_INT
6202 && GET_CODE (g2
->mult_val
) == CONST_INT
)
6204 if (g1
->mult_val
== const0_rtx
6205 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
6207 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
6209 else if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
))
6213 /* ??? Find out if the one is a multiple of the other? */
6217 add
= express_from_1 (g1
->add_val
, g2
->add_val
, mult
);
6218 if (add
== NULL_RTX
)
6221 /* Form simplified final result. */
6222 if (mult
== const0_rtx
)
6224 else if (mult
== const1_rtx
)
6225 mult
= g1
->dest_reg
;
6227 mult
= gen_rtx_MULT (g2
->mode
, g1
->dest_reg
, mult
);
6229 if (add
== const0_rtx
)
6232 return gen_rtx_PLUS (g2
->mode
, mult
, add
);
6235 /* Return an rtx, if any, that expresses giv G2 as a function of the register
6236 represented by G1. This indicates that G2 should be combined with G1 and
6237 that G2 can use (either directly or via an address expression) a register
6238 used to represent G1. */
6241 combine_givs_p (g1
, g2
)
6242 struct induction
*g1
, *g2
;
6244 rtx tem
= express_from (g1
, g2
);
6246 /* If these givs are identical, they can be combined. We use the results
6247 of express_from because the addends are not in a canonical form, so
6248 rtx_equal_p is a weaker test. */
6249 if (tem
== g1
->dest_reg
)
6251 return g1
->dest_reg
;
6254 /* If G2 can be expressed as a function of G1 and that function is valid
6255 as an address and no more expensive than using a register for G2,
6256 the expression of G2 in terms of G1 can be used. */
6258 && g2
->giv_type
== DEST_ADDR
6259 && memory_address_p (g2
->mem_mode
, tem
)
6260 /* ??? Looses, especially with -fforce-addr, where *g2->location
6261 will always be a register, and so anything more complicated
6265 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
)
6267 && rtx_cost (tem
, MEM
) <= rtx_cost (*g2
->location
, MEM
)
6278 struct combine_givs_stats
6285 cmp_combine_givs_stats (x
, y
)
6286 struct combine_givs_stats
*x
, *y
;
6289 d
= y
->total_benefit
- x
->total_benefit
;
6290 /* Stabilize the sort. */
6292 d
= x
->giv_number
- y
->giv_number
;
6296 /* If one of these givs is a DEST_REG that was only used once, by the
6297 other giv, this is actually a single use. Return 0 if this is not
6298 the case, -1 if g1 is the DEST_REG involved, and 1 if it was g2. */
6301 combine_givs_used_once (g1
, g2
)
6302 struct induction
*g1
, *g2
;
6304 if (g1
->giv_type
== DEST_REG
6305 && VARRAY_INT (n_times_used
, REGNO (g1
->dest_reg
)) == 1
6306 && reg_mentioned_p (g1
->dest_reg
, PATTERN (g2
->insn
)))
6309 if (g2
->giv_type
== DEST_REG
6310 && VARRAY_INT (n_times_used
, REGNO (g2
->dest_reg
)) == 1
6311 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
6318 combine_givs_benefit_from (g1
, g2
)
6319 struct induction
*g1
, *g2
;
6321 int tmp
= combine_givs_used_once (g1
, g2
);
6325 return g2
->benefit
- g1
->benefit
;
6330 /* Check all pairs of givs for iv_class BL and see if any can be combined with
6331 any other. If so, point SAME to the giv combined with and set NEW_REG to
6332 be an expression (in terms of the other giv's DEST_REG) equivalent to the
6333 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
6337 struct iv_class
*bl
;
6339 struct induction
*g1
, *g2
, **giv_array
;
6340 int i
, j
, k
, giv_count
;
6341 struct combine_givs_stats
*stats
;
6344 /* Count givs, because bl->giv_count is incorrect here. */
6346 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6351 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
6353 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
6355 giv_array
[i
++] = g1
;
6357 stats
= (struct combine_givs_stats
*) alloca (giv_count
* sizeof (*stats
));
6358 bzero ((char *) stats
, giv_count
* sizeof (*stats
));
6360 can_combine
= (rtx
*) alloca (giv_count
* giv_count
* sizeof(rtx
));
6361 bzero ((char *) can_combine
, giv_count
* giv_count
* sizeof(rtx
));
6363 for (i
= 0; i
< giv_count
; i
++)
6369 this_benefit
= g1
->benefit
;
6370 /* Add an additional weight for zero addends. */
6371 if (g1
->no_const_addval
)
6373 for (j
= 0; j
< giv_count
; j
++)
6379 && (this_combine
= combine_givs_p (g1
, g2
)) != NULL_RTX
)
6381 can_combine
[i
*giv_count
+ j
] = this_combine
;
6382 this_benefit
+= combine_givs_benefit_from (g1
, g2
);
6383 /* Add an additional weight for being reused more times. */
6387 stats
[i
].giv_number
= i
;
6388 stats
[i
].total_benefit
= this_benefit
;
6391 /* Iterate, combining until we can't. */
6393 qsort (stats
, giv_count
, sizeof(*stats
), cmp_combine_givs_stats
);
6395 if (loop_dump_stream
)
6397 fprintf (loop_dump_stream
, "Sorted combine statistics:\n");
6398 for (k
= 0; k
< giv_count
; k
++)
6400 g1
= giv_array
[stats
[k
].giv_number
];
6401 if (!g1
->combined_with
&& !g1
->same
)
6402 fprintf (loop_dump_stream
, " {%d, %d}",
6403 INSN_UID (giv_array
[stats
[k
].giv_number
]->insn
),
6404 stats
[k
].total_benefit
);
6406 putc ('\n', loop_dump_stream
);
6409 for (k
= 0; k
< giv_count
; k
++)
6411 int g1_add_benefit
= 0;
6413 i
= stats
[k
].giv_number
;
6416 /* If it has already been combined, skip. */
6417 if (g1
->combined_with
|| g1
->same
)
6420 for (j
= 0; j
< giv_count
; j
++)
6423 if (g1
!= g2
&& can_combine
[i
*giv_count
+ j
]
6424 /* If it has already been combined, skip. */
6425 && ! g2
->same
&& ! g2
->combined_with
)
6429 g2
->new_reg
= can_combine
[i
*giv_count
+ j
];
6431 g1
->combined_with
= 1;
6432 if (!combine_givs_used_once (g1
, g2
))
6433 g1
->times_used
+= 1;
6434 g1
->lifetime
+= g2
->lifetime
;
6436 g1_add_benefit
+= combine_givs_benefit_from (g1
, g2
);
6438 /* ??? The new final_[bg]iv_value code does a much better job
6439 of finding replaceable giv's, and hence this code may no
6440 longer be necessary. */
6441 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
6442 g1_add_benefit
-= copy_cost
;
6444 /* To help optimize the next set of combinations, remove
6445 this giv from the benefits of other potential mates. */
6446 for (l
= 0; l
< giv_count
; ++l
)
6448 int m
= stats
[l
].giv_number
;
6449 if (can_combine
[m
*giv_count
+ j
])
6451 /* Remove additional weight for being reused. */
6452 stats
[l
].total_benefit
-= 3 +
6453 combine_givs_benefit_from (giv_array
[m
], g2
);
6457 if (loop_dump_stream
)
6458 fprintf (loop_dump_stream
,
6459 "giv at %d combined with giv at %d\n",
6460 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
6464 /* To help optimize the next set of combinations, remove
6465 this giv from the benefits of other potential mates. */
6466 if (g1
->combined_with
)
6468 for (j
= 0; j
< giv_count
; ++j
)
6470 int m
= stats
[j
].giv_number
;
6471 if (can_combine
[m
*giv_count
+ j
])
6473 /* Remove additional weight for being reused. */
6474 stats
[j
].total_benefit
-= 3 +
6475 combine_givs_benefit_from (giv_array
[m
], g1
);
6479 g1
->benefit
+= g1_add_benefit
;
6481 /* We've finished with this giv, and everything it touched.
6482 Restart the combination so that proper weights for the
6483 rest of the givs are properly taken into account. */
6484 /* ??? Ideally we would compact the arrays at this point, so
6485 as to not cover old ground. But sanely compacting
6486 can_combine is tricky. */
6492 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
6495 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
6496 rtx b
; /* initial value of basic induction variable */
6497 rtx m
; /* multiplicative constant */
6498 rtx a
; /* additive constant */
6499 rtx reg
; /* destination register */
6505 /* Prevent unexpected sharing of these rtx. */
6509 /* Increase the lifetime of any invariants moved further in code. */
6510 update_reg_last_use (a
, insert_before
);
6511 update_reg_last_use (b
, insert_before
);
6512 update_reg_last_use (m
, insert_before
);
6515 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
6517 emit_move_insn (reg
, result
);
6518 seq
= gen_sequence ();
6521 emit_insn_before (seq
, insert_before
);
6523 /* It is entirely possible that the expansion created lots of new
6524 registers. Iterate over the sequence we just created and
6527 if (GET_CODE (seq
) == SEQUENCE
)
6530 for (i
= 0; i
< XVECLEN (seq
, 0); ++i
)
6532 rtx set
= single_set (XVECEXP (seq
, 0, i
));
6533 if (set
&& GET_CODE (SET_DEST (set
)) == REG
)
6534 record_base_value (REGNO (SET_DEST (set
)), SET_SRC (set
), 0);
6537 else if (GET_CODE (seq
) == SET
6538 && GET_CODE (SET_DEST (seq
)) == REG
)
6539 record_base_value (REGNO (SET_DEST (seq
)), SET_SRC (seq
), 0);
6542 /* Test whether A * B can be computed without
6543 an actual multiply insn. Value is 1 if so. */
6546 product_cheap_p (a
, b
)
6552 struct obstack
*old_rtl_obstack
= rtl_obstack
;
6553 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
6556 /* If only one is constant, make it B. */
6557 if (GET_CODE (a
) == CONST_INT
)
6558 tmp
= a
, a
= b
, b
= tmp
;
6560 /* If first constant, both constant, so don't need multiply. */
6561 if (GET_CODE (a
) == CONST_INT
)
6564 /* If second not constant, neither is constant, so would need multiply. */
6565 if (GET_CODE (b
) != CONST_INT
)
6568 /* One operand is constant, so might not need multiply insn. Generate the
6569 code for the multiply and see if a call or multiply, or long sequence
6570 of insns is generated. */
6572 rtl_obstack
= &temp_obstack
;
6574 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
6575 tmp
= gen_sequence ();
6578 if (GET_CODE (tmp
) == SEQUENCE
)
6580 if (XVEC (tmp
, 0) == 0)
6582 else if (XVECLEN (tmp
, 0) > 3)
6585 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
6587 rtx insn
= XVECEXP (tmp
, 0, i
);
6589 if (GET_CODE (insn
) != INSN
6590 || (GET_CODE (PATTERN (insn
)) == SET
6591 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
6592 || (GET_CODE (PATTERN (insn
)) == PARALLEL
6593 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
6594 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
6601 else if (GET_CODE (tmp
) == SET
6602 && GET_CODE (SET_SRC (tmp
)) == MULT
)
6604 else if (GET_CODE (tmp
) == PARALLEL
6605 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
6606 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
6609 /* Free any storage we obtained in generating this multiply and restore rtl
6610 allocation to its normal obstack. */
6611 obstack_free (&temp_obstack
, storage
);
6612 rtl_obstack
= old_rtl_obstack
;
6617 /* Check to see if loop can be terminated by a "decrement and branch until
6618 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
6619 Also try reversing an increment loop to a decrement loop
6620 to see if the optimization can be performed.
6621 Value is nonzero if optimization was performed. */
6623 /* This is useful even if the architecture doesn't have such an insn,
6624 because it might change a loops which increments from 0 to n to a loop
6625 which decrements from n to 0. A loop that decrements to zero is usually
6626 faster than one that increments from zero. */
6628 /* ??? This could be rewritten to use some of the loop unrolling procedures,
6629 such as approx_final_value, biv_total_increment, loop_iterations, and
6630 final_[bg]iv_value. */
6633 check_dbra_loop (loop_end
, insn_count
, loop_start
)
6638 struct iv_class
*bl
;
6645 rtx before_comparison
;
6649 int compare_and_branch
;
6651 /* If last insn is a conditional branch, and the insn before tests a
6652 register value, try to optimize it. Otherwise, we can't do anything. */
6654 jump
= PREV_INSN (loop_end
);
6655 comparison
= get_condition_for_loop (jump
);
6656 if (comparison
== 0)
6659 /* Try to compute whether the compare/branch at the loop end is one or
6660 two instructions. */
6661 get_condition (jump
, &first_compare
);
6662 if (first_compare
== jump
)
6663 compare_and_branch
= 1;
6664 else if (first_compare
== prev_nonnote_insn (jump
))
6665 compare_and_branch
= 2;
6669 /* Check all of the bivs to see if the compare uses one of them.
6670 Skip biv's set more than once because we can't guarantee that
6671 it will be zero on the last iteration. Also skip if the biv is
6672 used between its update and the test insn. */
6674 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6676 if (bl
->biv_count
== 1
6677 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6678 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6686 /* Look for the case where the basic induction variable is always
6687 nonnegative, and equals zero on the last iteration.
6688 In this case, add a reg_note REG_NONNEG, which allows the
6689 m68k DBRA instruction to be used. */
6691 if (((GET_CODE (comparison
) == GT
6692 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6693 && INTVAL (XEXP (comparison
, 1)) == -1)
6694 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6695 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6696 && INTVAL (bl
->biv
->add_val
) < 0)
6698 /* Initial value must be greater than 0,
6699 init_val % -dec_value == 0 to ensure that it equals zero on
6700 the last iteration */
6702 if (GET_CODE (bl
->initial_value
) == CONST_INT
6703 && INTVAL (bl
->initial_value
) > 0
6704 && (INTVAL (bl
->initial_value
)
6705 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6707 /* register always nonnegative, add REG_NOTE to branch */
6708 REG_NOTES (PREV_INSN (loop_end
))
6709 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6710 REG_NOTES (PREV_INSN (loop_end
)));
6716 /* If the decrement is 1 and the value was tested as >= 0 before
6717 the loop, then we can safely optimize. */
6718 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6720 if (GET_CODE (p
) == CODE_LABEL
)
6722 if (GET_CODE (p
) != JUMP_INSN
)
6725 before_comparison
= get_condition_for_loop (p
);
6726 if (before_comparison
6727 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6728 && GET_CODE (before_comparison
) == LT
6729 && XEXP (before_comparison
, 1) == const0_rtx
6730 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6731 && INTVAL (bl
->biv
->add_val
) == -1)
6733 REG_NOTES (PREV_INSN (loop_end
))
6734 = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
6735 REG_NOTES (PREV_INSN (loop_end
)));
6742 else if (INTVAL (bl
->biv
->add_val
) > 0)
6744 /* Try to change inc to dec, so can apply above optimization. */
6746 all registers modified are induction variables or invariant,
6747 all memory references have non-overlapping addresses
6748 (obviously true if only one write)
6749 allow 2 insns for the compare/jump at the end of the loop. */
6750 /* Also, we must avoid any instructions which use both the reversed
6751 biv and another biv. Such instructions will fail if the loop is
6752 reversed. We meet this condition by requiring that either
6753 no_use_except_counting is true, or else that there is only
6755 int num_nonfixed_reads
= 0;
6756 /* 1 if the iteration var is used only to count iterations. */
6757 int no_use_except_counting
= 0;
6758 /* 1 if the loop has no memory store, or it has a single memory store
6759 which is reversible. */
6760 int reversible_mem_store
= 1;
6762 if (bl
->giv_count
== 0
6763 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6765 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6767 /* If there are no givs for this biv, and the only exit is the
6768 fall through at the end of the loop, then
6769 see if perhaps there are no uses except to count. */
6770 no_use_except_counting
= 1;
6771 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6772 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6774 rtx set
= single_set (p
);
6776 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6777 && REGNO (SET_DEST (set
)) == bl
->regno
)
6778 /* An insn that sets the biv is okay. */
6780 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6781 || p
== prev_nonnote_insn (loop_end
))
6782 /* Don't bother about the end test. */
6784 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6786 no_use_except_counting
= 0;
6792 if (no_use_except_counting
)
6793 ; /* no need to worry about MEMs. */
6794 else if (num_mem_sets
<= 1)
6796 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6797 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6798 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6800 /* If the loop has a single store, and the destination address is
6801 invariant, then we can't reverse the loop, because this address
6802 might then have the wrong value at loop exit.
6803 This would work if the source was invariant also, however, in that
6804 case, the insn should have been moved out of the loop. */
6806 if (num_mem_sets
== 1)
6807 reversible_mem_store
6808 = (! unknown_address_altered
6809 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6814 /* This code only acts for innermost loops. Also it simplifies
6815 the memory address check by only reversing loops with
6816 zero or one memory access.
6817 Two memory accesses could involve parts of the same array,
6818 and that can't be reversed.
6819 If the biv is used only for counting, than we don't need to worry
6820 about all these things. */
6822 if ((num_nonfixed_reads
<= 1
6824 && !loop_has_volatile
6825 && reversible_mem_store
6826 && (bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6827 + num_movables
+ compare_and_branch
== insn_count
)
6828 && (bl
== loop_iv_list
&& bl
->next
== 0))
6829 || no_use_except_counting
)
6833 /* Loop can be reversed. */
6834 if (loop_dump_stream
)
6835 fprintf (loop_dump_stream
, "Can reverse loop\n");
6837 /* Now check other conditions:
6839 The increment must be a constant, as must the initial value,
6840 and the comparison code must be LT.
6842 This test can probably be improved since +/- 1 in the constant
6843 can be obtained by changing LT to LE and vice versa; this is
6847 /* for constants, LE gets turned into LT */
6848 && (GET_CODE (comparison
) == LT
6849 || (GET_CODE (comparison
) == LE
6850 && no_use_except_counting
)))
6852 HOST_WIDE_INT add_val
, add_adjust
, comparison_val
;
6853 rtx initial_value
, comparison_value
;
6855 enum rtx_code cmp_code
;
6856 int comparison_const_width
;
6857 unsigned HOST_WIDE_INT comparison_sign_mask
;
6860 add_val
= INTVAL (bl
->biv
->add_val
);
6861 comparison_value
= XEXP (comparison
, 1);
6862 comparison_const_width
6863 = GET_MODE_BITSIZE (GET_MODE (XEXP (comparison
, 1)));
6864 if (comparison_const_width
> HOST_BITS_PER_WIDE_INT
)
6865 comparison_const_width
= HOST_BITS_PER_WIDE_INT
;
6866 comparison_sign_mask
6867 = (unsigned HOST_WIDE_INT
)1 << (comparison_const_width
- 1);
6869 /* If the comparison value is not a loop invariant, then we
6870 can not reverse this loop.
6872 ??? If the insns which initialize the comparison value as
6873 a whole compute an invariant result, then we could move
6874 them out of the loop and proceed with loop reversal. */
6875 if (!invariant_p (comparison_value
))
6878 if (GET_CODE (comparison_value
) == CONST_INT
)
6879 comparison_val
= INTVAL (comparison_value
);
6880 initial_value
= bl
->initial_value
;
6882 /* Normalize the initial value if it is an integer and
6883 has no other use except as a counter. This will allow
6884 a few more loops to be reversed. */
6885 if (no_use_except_counting
6886 && GET_CODE (comparison_value
) == CONST_INT
6887 && GET_CODE (initial_value
) == CONST_INT
)
6889 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
6890 /* The code below requires comparison_val to be a multiple
6891 of add_val in order to do the loop reversal, so
6892 round up comparison_val to a multiple of add_val.
6893 Since comparison_value is constant, we know that the
6894 current comparison code is LT. */
6895 comparison_val
= comparison_val
+ add_val
- 1;
6897 -= (unsigned HOST_WIDE_INT
) comparison_val
% add_val
;
6898 /* We postpone overflow checks for COMPARISON_VAL here;
6899 even if there is an overflow, we might still be able to
6900 reverse the loop, if converting the loop exit test to
6902 initial_value
= const0_rtx
;
6905 /* Check if there is a NOTE_INSN_LOOP_VTOP note. If there is,
6906 that means that this is a for or while style loop, with
6907 a loop exit test at the start. Thus, we can assume that
6908 the loop condition was true when the loop was entered.
6909 This allows us to change the loop exit condition to an
6911 We start at the end and search backwards for the previous
6912 NOTE. If there is no NOTE_INSN_LOOP_VTOP for this loop,
6913 the search will stop at the NOTE_INSN_LOOP_CONT. */
6916 vtop
= PREV_INSN (vtop
);
6917 while (GET_CODE (vtop
) != NOTE
6918 || NOTE_LINE_NUMBER (vtop
) > 0
6919 || NOTE_LINE_NUMBER (vtop
) == NOTE_REPEATED_LINE_NUMBER
6920 || NOTE_LINE_NUMBER (vtop
) == NOTE_INSN_DELETED
);
6921 if (NOTE_LINE_NUMBER (vtop
) != NOTE_INSN_LOOP_VTOP
)
6924 /* First check if we can do a vanilla loop reversal. */
6925 if (initial_value
== const0_rtx
6926 /* If we have a decrement_and_branch_on_count, prefer
6927 the NE test, since this will allow that instruction to
6928 be generated. Note that we must use a vanilla loop
6929 reversal if the biv is used to calculate a giv or has
6930 a non-counting use. */
6931 #if ! defined (HAVE_decrement_and_branch_until_zero) && defined (HAVE_decrement_and_branch_on_count)
6932 && (! (add_val
== 1 && vtop
6933 && (bl
->biv_count
== 0
6934 || no_use_except_counting
)))
6936 && GET_CODE (comparison_value
) == CONST_INT
6937 /* Now do postponed overflow checks on COMPARISON_VAL. */
6938 && ! (((comparison_val
- add_val
) ^ INTVAL (comparison_value
))
6939 & comparison_sign_mask
))
6941 /* Register will always be nonnegative, with value
6942 0 on last iteration */
6943 add_adjust
= add_val
;
6947 else if (add_val
== 1 && vtop
6948 && (bl
->biv_count
== 0
6949 || no_use_except_counting
))
6957 if (GET_CODE (comparison
) == LE
)
6958 add_adjust
-= add_val
;
6960 /* If the initial value is not zero, or if the comparison
6961 value is not an exact multiple of the increment, then we
6962 can not reverse this loop. */
6963 if (initial_value
== const0_rtx
6964 && GET_CODE (comparison_value
) == CONST_INT
)
6966 if (((unsigned HOST_WIDE_INT
) comparison_val
% add_val
) != 0)
6971 if (! no_use_except_counting
|| add_val
!= 1)
6975 final_value
= comparison_value
;
6977 /* Reset these in case we normalized the initial value
6978 and comparison value above. */
6979 if (GET_CODE (comparison_value
) == CONST_INT
6980 && GET_CODE (initial_value
) == CONST_INT
)
6982 comparison_value
= GEN_INT (comparison_val
);
6984 = GEN_INT (comparison_val
+ INTVAL (bl
->initial_value
));
6986 bl
->initial_value
= initial_value
;
6988 /* Save some info needed to produce the new insns. */
6989 reg
= bl
->biv
->dest_reg
;
6990 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6991 if (jump_label
== pc_rtx
)
6992 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6993 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6995 /* Set start_value; if this is not a CONST_INT, we need
6997 Initialize biv to start_value before loop start.
6998 The old initializing insn will be deleted as a
6999 dead store by flow.c. */
7000 if (initial_value
== const0_rtx
7001 && GET_CODE (comparison_value
) == CONST_INT
)
7003 start_value
= GEN_INT (comparison_val
- add_adjust
);
7004 emit_insn_before (gen_move_insn (reg
, start_value
),
7007 else if (GET_CODE (initial_value
) == CONST_INT
)
7009 rtx offset
= GEN_INT (-INTVAL (initial_value
) - add_adjust
);
7010 enum machine_mode mode
= GET_MODE (reg
);
7011 enum insn_code icode
7012 = add_optab
->handlers
[(int) mode
].insn_code
;
7013 if (! (*insn_operand_predicate
[icode
][0]) (reg
, mode
)
7014 || ! ((*insn_operand_predicate
[icode
][1])
7015 (comparison_value
, mode
))
7016 || ! (*insn_operand_predicate
[icode
][2]) (offset
, mode
))
7019 = gen_rtx_PLUS (mode
, comparison_value
, offset
);
7020 emit_insn_before ((GEN_FCN (icode
)
7021 (reg
, comparison_value
, offset
)),
7023 if (GET_CODE (comparison
) == LE
)
7024 final_value
= gen_rtx_PLUS (mode
, comparison_value
,
7027 else if (! add_adjust
)
7029 enum machine_mode mode
= GET_MODE (reg
);
7030 enum insn_code icode
7031 = sub_optab
->handlers
[(int) mode
].insn_code
;
7032 if (! (*insn_operand_predicate
[icode
][0]) (reg
, mode
)
7033 || ! ((*insn_operand_predicate
[icode
][1])
7034 (comparison_value
, mode
))
7035 || ! ((*insn_operand_predicate
[icode
][2])
7036 (initial_value
, mode
)))
7039 = gen_rtx_MINUS (mode
, comparison_value
, initial_value
);
7040 emit_insn_before ((GEN_FCN (icode
)
7041 (reg
, comparison_value
, initial_value
)),
7045 /* We could handle the other cases too, but it'll be
7046 better to have a testcase first. */
7049 /* Add insn to decrement register, and delete insn
7050 that incremented the register. */
7051 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
7053 delete_insn (bl
->biv
->insn
);
7055 /* Update biv info to reflect its new status. */
7057 bl
->initial_value
= start_value
;
7058 bl
->biv
->add_val
= new_add_val
;
7060 /* Inc LABEL_NUSES so that delete_insn will
7061 not delete the label. */
7062 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
7064 /* Emit an insn after the end of the loop to set the biv's
7065 proper exit value if it is used anywhere outside the loop. */
7066 if ((REGNO_LAST_UID (bl
->regno
) != INSN_UID (first_compare
))
7068 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
7069 emit_insn_after (gen_move_insn (reg
, final_value
),
7072 /* Delete compare/branch at end of loop. */
7073 delete_insn (PREV_INSN (loop_end
));
7074 if (compare_and_branch
== 2)
7075 delete_insn (first_compare
);
7077 /* Add new compare/branch insn at end of loop. */
7079 emit_cmp_insn (reg
, const0_rtx
, cmp_code
, NULL_RTX
,
7080 GET_MODE (reg
), 0, 0);
7081 emit_jump_insn ((*bcc_gen_fctn
[(int) cmp_code
])
7082 (XEXP (jump_label
, 0)));
7083 tem
= gen_sequence ();
7085 emit_jump_insn_before (tem
, loop_end
);
7089 for (tem
= PREV_INSN (loop_end
);
7090 tem
&& GET_CODE (tem
) != JUMP_INSN
;
7091 tem
= PREV_INSN (tem
))
7095 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
7097 /* Increment of LABEL_NUSES done above. */
7098 /* Register is now always nonnegative,
7099 so add REG_NONNEG note to the branch. */
7100 REG_NOTES (tem
) = gen_rtx_EXPR_LIST (REG_NONNEG
, NULL_RTX
,
7106 /* Mark that this biv has been reversed. Each giv which depends
7107 on this biv, and which is also live past the end of the loop
7108 will have to be fixed up. */
7112 if (loop_dump_stream
)
7113 fprintf (loop_dump_stream
,
7114 "Reversed loop and added reg_nonneg\n");
7124 /* Verify whether the biv BL appears to be eliminable,
7125 based on the insns in the loop that refer to it.
7126 LOOP_START is the first insn of the loop, and END is the end insn.
7128 If ELIMINATE_P is non-zero, actually do the elimination.
7130 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
7131 determine whether invariant insns should be placed inside or at the
7132 start of the loop. */
7135 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
7136 struct iv_class
*bl
;
7140 int threshold
, insn_count
;
7142 rtx reg
= bl
->biv
->dest_reg
;
7145 /* Scan all insns in the loop, stopping if we find one that uses the
7146 biv in a way that we cannot eliminate. */
7148 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
7150 enum rtx_code code
= GET_CODE (p
);
7151 rtx where
= threshold
>= insn_count
? loop_start
: p
;
7153 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
7154 && reg_mentioned_p (reg
, PATTERN (p
))
7155 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
7157 if (loop_dump_stream
)
7158 fprintf (loop_dump_stream
,
7159 "Cannot eliminate biv %d: biv used in insn %d.\n",
7160 bl
->regno
, INSN_UID (p
));
7167 if (loop_dump_stream
)
7168 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
7169 bl
->regno
, eliminate_p
? "was" : "can be");
7176 /* If BL appears in X (part of the pattern of INSN), see if we can
7177 eliminate its use. If so, return 1. If not, return 0.
7179 If BIV does not appear in X, return 1.
7181 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
7182 where extra insns should be added. Depending on how many items have been
7183 moved out of the loop, it will either be before INSN or at the start of
7187 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
7189 struct iv_class
*bl
;
7193 enum rtx_code code
= GET_CODE (x
);
7194 rtx reg
= bl
->biv
->dest_reg
;
7195 enum machine_mode mode
= GET_MODE (reg
);
7196 struct induction
*v
;
7208 /* If we haven't already been able to do something with this BIV,
7209 we can't eliminate it. */
7215 /* If this sets the BIV, it is not a problem. */
7216 if (SET_DEST (x
) == reg
)
7219 /* If this is an insn that defines a giv, it is also ok because
7220 it will go away when the giv is reduced. */
7221 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7222 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
7226 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
7228 /* Can replace with any giv that was reduced and
7229 that has (MULT_VAL != 0) and (ADD_VAL == 0).
7230 Require a constant for MULT_VAL, so we know it's nonzero.
7231 ??? We disable this optimization to avoid potential
7234 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7235 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
7236 && v
->add_val
== const0_rtx
7237 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7241 /* If the giv V had the auto-inc address optimization applied
7242 to it, and INSN occurs between the giv insn and the biv
7243 insn, then we must adjust the value used here.
7244 This is rare, so we don't bother to do so. */
7246 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7247 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7248 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7249 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7255 /* If the giv has the opposite direction of change,
7256 then reverse the comparison. */
7257 if (INTVAL (v
->mult_val
) < 0)
7258 new = gen_rtx_COMPARE (GET_MODE (v
->new_reg
),
7259 const0_rtx
, v
->new_reg
);
7263 /* We can probably test that giv's reduced reg. */
7264 if (validate_change (insn
, &SET_SRC (x
), new, 0))
7268 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
7269 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
7270 Require a constant for MULT_VAL, so we know it's nonzero.
7271 ??? Do this only if ADD_VAL is a pointer to avoid a potential
7272 overflow problem. */
7274 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7275 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
7276 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7278 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7279 || GET_CODE (v
->add_val
) == LABEL_REF
7280 || GET_CODE (v
->add_val
) == CONST
7281 || (GET_CODE (v
->add_val
) == REG
7282 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
7284 /* If the giv V had the auto-inc address optimization applied
7285 to it, and INSN occurs between the giv insn and the biv
7286 insn, then we must adjust the value used here.
7287 This is rare, so we don't bother to do so. */
7289 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7290 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7291 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7292 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7298 /* If the giv has the opposite direction of change,
7299 then reverse the comparison. */
7300 if (INTVAL (v
->mult_val
) < 0)
7301 new = gen_rtx_COMPARE (VOIDmode
, copy_rtx (v
->add_val
),
7304 new = gen_rtx_COMPARE (VOIDmode
, v
->new_reg
,
7305 copy_rtx (v
->add_val
));
7307 /* Replace biv with the giv's reduced register. */
7308 update_reg_last_use (v
->add_val
, insn
);
7309 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7312 /* Insn doesn't support that constant or invariant. Copy it
7313 into a register (it will be a loop invariant.) */
7314 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
7316 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
7319 /* Substitute the new register for its invariant value in
7320 the compare expression. */
7321 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
7322 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
7331 case GT
: case GE
: case GTU
: case GEU
:
7332 case LT
: case LE
: case LTU
: case LEU
:
7333 /* See if either argument is the biv. */
7334 if (XEXP (x
, 0) == reg
)
7335 arg
= XEXP (x
, 1), arg_operand
= 1;
7336 else if (XEXP (x
, 1) == reg
)
7337 arg
= XEXP (x
, 0), arg_operand
= 0;
7341 if (CONSTANT_P (arg
))
7343 /* First try to replace with any giv that has constant positive
7344 mult_val and constant add_val. We might be able to support
7345 negative mult_val, but it seems complex to do it in general. */
7347 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7348 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7349 && (GET_CODE (v
->add_val
) == SYMBOL_REF
7350 || GET_CODE (v
->add_val
) == LABEL_REF
7351 || GET_CODE (v
->add_val
) == CONST
7352 || (GET_CODE (v
->add_val
) == REG
7353 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
7354 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7357 /* If the giv V had the auto-inc address optimization applied
7358 to it, and INSN occurs between the giv insn and the biv
7359 insn, then we must adjust the value used here.
7360 This is rare, so we don't bother to do so. */
7362 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7363 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7364 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7365 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7371 /* Replace biv with the giv's reduced reg. */
7372 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
7374 /* If all constants are actually constant integers and
7375 the derived constant can be directly placed in the COMPARE,
7377 if (GET_CODE (arg
) == CONST_INT
7378 && GET_CODE (v
->mult_val
) == CONST_INT
7379 && GET_CODE (v
->add_val
) == CONST_INT
7380 && validate_change (insn
, &XEXP (x
, arg_operand
),
7381 GEN_INT (INTVAL (arg
)
7382 * INTVAL (v
->mult_val
)
7383 + INTVAL (v
->add_val
)), 0))
7386 /* Otherwise, load it into a register. */
7387 tem
= gen_reg_rtx (mode
);
7388 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
7389 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
7392 /* If that failed, put back the change we made above. */
7393 XEXP (x
, 1-arg_operand
) = reg
;
7396 /* Look for giv with positive constant mult_val and nonconst add_val.
7397 Insert insns to calculate new compare value.
7398 ??? Turn this off due to possible overflow. */
7400 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7401 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7402 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7408 /* If the giv V had the auto-inc address optimization applied
7409 to it, and INSN occurs between the giv insn and the biv
7410 insn, then we must adjust the value used here.
7411 This is rare, so we don't bother to do so. */
7413 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7414 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7415 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7416 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7422 tem
= gen_reg_rtx (mode
);
7424 /* Replace biv with giv's reduced register. */
7425 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
7428 /* Compute value to compare against. */
7429 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
7430 /* Use it in this insn. */
7431 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
7432 if (apply_change_group ())
7436 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
7438 if (invariant_p (arg
) == 1)
7440 /* Look for giv with constant positive mult_val and nonconst
7441 add_val. Insert insns to compute new compare value.
7442 ??? Turn this off due to possible overflow. */
7444 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7445 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
7446 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
7452 /* If the giv V had the auto-inc address optimization applied
7453 to it, and INSN occurs between the giv insn and the biv
7454 insn, then we must adjust the value used here.
7455 This is rare, so we don't bother to do so. */
7457 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7458 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7459 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7460 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7466 tem
= gen_reg_rtx (mode
);
7468 /* Replace biv with giv's reduced register. */
7469 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
7472 /* Compute value to compare against. */
7473 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
7475 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
7476 if (apply_change_group ())
7481 /* This code has problems. Basically, you can't know when
7482 seeing if we will eliminate BL, whether a particular giv
7483 of ARG will be reduced. If it isn't going to be reduced,
7484 we can't eliminate BL. We can try forcing it to be reduced,
7485 but that can generate poor code.
7487 The problem is that the benefit of reducing TV, below should
7488 be increased if BL can actually be eliminated, but this means
7489 we might have to do a topological sort of the order in which
7490 we try to process biv. It doesn't seem worthwhile to do
7491 this sort of thing now. */
7494 /* Otherwise the reg compared with had better be a biv. */
7495 if (GET_CODE (arg
) != REG
7496 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
7499 /* Look for a pair of givs, one for each biv,
7500 with identical coefficients. */
7501 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7503 struct induction
*tv
;
7505 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
7508 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
7509 if (! tv
->ignore
&& ! tv
->maybe_dead
7510 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
7511 && rtx_equal_p (tv
->add_val
, v
->add_val
)
7512 && tv
->mode
== mode
)
7514 /* If the giv V had the auto-inc address optimization applied
7515 to it, and INSN occurs between the giv insn and the biv
7516 insn, then we must adjust the value used here.
7517 This is rare, so we don't bother to do so. */
7519 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
7520 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
7521 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
7522 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
7528 /* Replace biv with its giv's reduced reg. */
7529 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
7530 /* Replace other operand with the other giv's
7532 XEXP (x
, arg_operand
) = tv
->new_reg
;
7539 /* If we get here, the biv can't be eliminated. */
7543 /* If this address is a DEST_ADDR giv, it doesn't matter if the
7544 biv is used in it, since it will be replaced. */
7545 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
7546 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
7554 /* See if any subexpression fails elimination. */
7555 fmt
= GET_RTX_FORMAT (code
);
7556 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7561 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
7562 eliminate_p
, where
))
7567 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7568 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
7569 eliminate_p
, where
))
7578 /* Return nonzero if the last use of REG
7579 is in an insn following INSN in the same basic block. */
7582 last_use_this_basic_block (reg
, insn
)
7588 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
7591 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
7597 /* Called via `note_stores' to record the initial value of a biv. Here we
7598 just record the location of the set and process it later. */
7601 record_initial (dest
, set
)
7605 struct iv_class
*bl
;
7607 if (GET_CODE (dest
) != REG
7608 || REGNO (dest
) >= max_reg_before_loop
7609 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
7612 bl
= reg_biv_class
[REGNO (dest
)];
7614 /* If this is the first set found, record it. */
7615 if (bl
->init_insn
== 0)
7617 bl
->init_insn
= note_insn
;
7622 /* If any of the registers in X are "old" and currently have a last use earlier
7623 than INSN, update them to have a last use of INSN. Their actual last use
7624 will be the previous insn but it will not have a valid uid_luid so we can't
7628 update_reg_last_use (x
, insn
)
7632 /* Check for the case where INSN does not have a valid luid. In this case,
7633 there is no need to modify the regno_last_uid, as this can only happen
7634 when code is inserted after the loop_end to set a pseudo's final value,
7635 and hence this insn will never be the last use of x. */
7636 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
7637 && INSN_UID (insn
) < max_uid_for_loop
7638 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
7639 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
7643 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
7644 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
7647 update_reg_last_use (XEXP (x
, i
), insn
);
7648 else if (fmt
[i
] == 'E')
7649 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7650 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
7655 /* Given a jump insn JUMP, return the condition that will cause it to branch
7656 to its JUMP_LABEL. If the condition cannot be understood, or is an
7657 inequality floating-point comparison which needs to be reversed, 0 will
7660 If EARLIEST is non-zero, it is a pointer to a place where the earliest
7661 insn used in locating the condition was found. If a replacement test
7662 of the condition is desired, it should be placed in front of that
7663 insn and we will be sure that the inputs are still valid.
7665 The condition will be returned in a canonical form to simplify testing by
7666 callers. Specifically:
7668 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
7669 (2) Both operands will be machine operands; (cc0) will have been replaced.
7670 (3) If an operand is a constant, it will be the second operand.
7671 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
7672 for GE, GEU, and LEU. */
7675 get_condition (jump
, earliest
)
7684 int reverse_code
= 0;
7685 int did_reverse_condition
= 0;
7686 enum machine_mode mode
;
7688 /* If this is not a standard conditional jump, we can't parse it. */
7689 if (GET_CODE (jump
) != JUMP_INSN
7690 || ! condjump_p (jump
) || simplejump_p (jump
))
7693 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
7694 mode
= GET_MODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
7695 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
7696 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
7701 /* If this branches to JUMP_LABEL when the condition is false, reverse
7703 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
7704 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
7705 code
= reverse_condition (code
), did_reverse_condition
^= 1;
7707 /* If we are comparing a register with zero, see if the register is set
7708 in the previous insn to a COMPARE or a comparison operation. Perform
7709 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
7712 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
7714 /* Set non-zero when we find something of interest. */
7718 /* If comparison with cc0, import actual comparison from compare
7722 if ((prev
= prev_nonnote_insn (prev
)) == 0
7723 || GET_CODE (prev
) != INSN
7724 || (set
= single_set (prev
)) == 0
7725 || SET_DEST (set
) != cc0_rtx
)
7728 op0
= SET_SRC (set
);
7729 op1
= CONST0_RTX (GET_MODE (op0
));
7735 /* If this is a COMPARE, pick up the two things being compared. */
7736 if (GET_CODE (op0
) == COMPARE
)
7738 op1
= XEXP (op0
, 1);
7739 op0
= XEXP (op0
, 0);
7742 else if (GET_CODE (op0
) != REG
)
7745 /* Go back to the previous insn. Stop if it is not an INSN. We also
7746 stop if it isn't a single set or if it has a REG_INC note because
7747 we don't want to bother dealing with it. */
7749 if ((prev
= prev_nonnote_insn (prev
)) == 0
7750 || GET_CODE (prev
) != INSN
7751 || FIND_REG_INC_NOTE (prev
, 0)
7752 || (set
= single_set (prev
)) == 0)
7755 /* If this is setting OP0, get what it sets it to if it looks
7757 if (rtx_equal_p (SET_DEST (set
), op0
))
7759 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
7761 /* ??? We may not combine comparisons done in a CCmode with
7762 comparisons not done in a CCmode. This is to aid targets
7763 like Alpha that have an IEEE compliant EQ instruction, and
7764 a non-IEEE compliant BEQ instruction. The use of CCmode is
7765 actually artificial, simply to prevent the combination, but
7766 should not affect other platforms. */
7768 if ((GET_CODE (SET_SRC (set
)) == COMPARE
7771 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7772 && (GET_MODE_BITSIZE (inner_mode
)
7773 <= HOST_BITS_PER_WIDE_INT
)
7774 && (STORE_FLAG_VALUE
7775 & ((HOST_WIDE_INT
) 1
7776 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7777 #ifdef FLOAT_STORE_FLAG_VALUE
7779 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7780 && FLOAT_STORE_FLAG_VALUE
< 0)
7783 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'))
7784 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7785 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7787 else if (((code
== EQ
7789 && (GET_MODE_BITSIZE (inner_mode
)
7790 <= HOST_BITS_PER_WIDE_INT
)
7791 && GET_MODE_CLASS (inner_mode
) == MODE_INT
7792 && (STORE_FLAG_VALUE
7793 & ((HOST_WIDE_INT
) 1
7794 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
7795 #ifdef FLOAT_STORE_FLAG_VALUE
7797 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
7798 && FLOAT_STORE_FLAG_VALUE
< 0)
7801 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<'
7802 && ((GET_MODE_CLASS (mode
) == MODE_CC
)
7803 == (GET_MODE_CLASS (inner_mode
) == MODE_CC
)))
7805 /* We might have reversed a LT to get a GE here. But this wasn't
7806 actually the comparison of data, so we don't flag that we
7807 have had to reverse the condition. */
7808 did_reverse_condition
^= 1;
7816 else if (reg_set_p (op0
, prev
))
7817 /* If this sets OP0, but not directly, we have to give up. */
7822 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
7823 code
= GET_CODE (x
);
7826 code
= reverse_condition (code
);
7827 did_reverse_condition
^= 1;
7831 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
7837 /* If constant is first, put it last. */
7838 if (CONSTANT_P (op0
))
7839 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
7841 /* If OP0 is the result of a comparison, we weren't able to find what
7842 was really being compared, so fail. */
7843 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
7846 /* Canonicalize any ordered comparison with integers involving equality
7847 if we can do computations in the relevant mode and we do not
7850 if (GET_CODE (op1
) == CONST_INT
7851 && GET_MODE (op0
) != VOIDmode
7852 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
7854 HOST_WIDE_INT const_val
= INTVAL (op1
);
7855 unsigned HOST_WIDE_INT uconst_val
= const_val
;
7856 unsigned HOST_WIDE_INT max_val
7857 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
7862 if (const_val
!= max_val
>> 1)
7863 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7866 /* When cross-compiling, const_val might be sign-extended from
7867 BITS_PER_WORD to HOST_BITS_PER_WIDE_INT */
7869 if ((const_val
& max_val
)
7870 != (((HOST_WIDE_INT
) 1
7871 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7872 code
= GT
, op1
= GEN_INT (const_val
- 1);
7876 if (uconst_val
< max_val
)
7877 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7881 if (uconst_val
!= 0)
7882 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7890 /* If this was floating-point and we reversed anything other than an
7891 EQ or NE, return zero. */
7892 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7893 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7895 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7899 /* Never return CC0; return zero instead. */
7904 return gen_rtx_fmt_ee (code
, VOIDmode
, op0
, op1
);
7907 /* Similar to above routine, except that we also put an invariant last
7908 unless both operands are invariants. */
7911 get_condition_for_loop (x
)
7914 rtx comparison
= get_condition (x
, NULL_PTR
);
7917 || ! invariant_p (XEXP (comparison
, 0))
7918 || invariant_p (XEXP (comparison
, 1)))
7921 return gen_rtx_fmt_ee (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7922 XEXP (comparison
, 1), XEXP (comparison
, 0));
7925 #ifdef HAVE_decrement_and_branch_on_count
7926 /* Instrument loop for insertion of bct instruction. We distinguish between
7927 loops with compile-time bounds and those with run-time bounds.
7928 Information from loop_iterations() is used to compute compile-time bounds.
7929 Run-time bounds should use loop preconditioning, but currently ignored.
7933 insert_bct (loop_start
, loop_end
)
7934 rtx loop_start
, loop_end
;
7937 unsigned HOST_WIDE_INT n_iterations
;
7940 int increment_direction
, compare_direction
;
7942 /* If the loop condition is <= or >=, the number of iteration
7943 is 1 more than the range of the bounds of the loop. */
7944 int add_iteration
= 0;
7946 enum machine_mode loop_var_mode
= word_mode
;
7948 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7950 /* It's impossible to instrument a competely unrolled loop. */
7951 if (loop_unroll_factor
[loop_num
] == -1)
7954 /* Make sure that the count register is not in use. */
7955 if (loop_used_count_register
[loop_num
])
7957 if (loop_dump_stream
)
7958 fprintf (loop_dump_stream
,
7959 "insert_bct %d: BCT instrumentation failed: count register already in use\n",
7964 /* Make sure that the function has no indirect jumps. */
7965 if (indirect_jump_in_function
)
7967 if (loop_dump_stream
)
7968 fprintf (loop_dump_stream
,
7969 "insert_bct %d: BCT instrumentation failed: indirect jump in function\n",
7974 /* Make sure that the last loop insn is a conditional jump. */
7975 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7976 || ! condjump_p (PREV_INSN (loop_end
))
7977 || simplejump_p (PREV_INSN (loop_end
)))
7979 if (loop_dump_stream
)
7980 fprintf (loop_dump_stream
,
7981 "insert_bct %d: BCT instrumentation failed: invalid jump at loop end\n",
7986 /* Make sure that the loop does not contain a function call
7987 (the count register might be altered by the called function). */
7990 if (loop_dump_stream
)
7991 fprintf (loop_dump_stream
,
7992 "insert_bct %d: BCT instrumentation failed: function call in loop\n",
7997 /* Make sure that the loop does not jump via a table.
7998 (the count register might be used to perform the branch on table). */
7999 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
))
8001 if (GET_CODE (insn
) == JUMP_INSN
8002 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
8003 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
))
8005 if (loop_dump_stream
)
8006 fprintf (loop_dump_stream
,
8007 "insert_bct %d: BCT instrumentation failed: computed branch in the loop\n",
8013 /* Account for loop unrolling in instrumented iteration count. */
8014 if (loop_unroll_factor
[loop_num
] > 1)
8015 n_iterations
= loop_n_iterations
/ loop_unroll_factor
[loop_num
];
8017 n_iterations
= loop_n_iterations
;
8019 if (n_iterations
!= 0 && n_iterations
< 3)
8021 /* Allow an enclosing outer loop to benefit if possible. */
8022 if (loop_dump_stream
)
8023 fprintf (loop_dump_stream
,
8024 "insert_bct %d: Too few iterations to benefit from BCT optimization\n",
8029 /* Try to instrument the loop. */
8031 /* Handle the simpler case, where the bounds are known at compile time. */
8032 if (n_iterations
> 0)
8034 /* Mark all enclosing loops that they cannot use count register. */
8035 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
8036 loop_used_count_register
[i
] = 1;
8037 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
8041 /* Handle the more complex case, that the bounds are NOT known
8042 at compile time. In this case we generate run_time calculation
8043 of the number of iterations. */
8045 if (GET_MODE_CLASS (GET_MODE (loop_iteration_var
)) != MODE_INT
8046 || GET_MODE_SIZE (GET_MODE (loop_iteration_var
)) != UNITS_PER_WORD
)
8048 if (loop_dump_stream
)
8049 fprintf (loop_dump_stream
,
8050 "insert_bct %d: BCT Instrumentation failed: loop variable not integer\n",
8055 /* With runtime bounds, if the compare is of the form '!=' we give up */
8056 if (loop_comparison_code
== NE
)
8058 if (loop_dump_stream
)
8059 fprintf (loop_dump_stream
,
8060 "insert_bct %d: runtime bounds with != comparison\n",
8064 /* Use common loop preconditioning code instead. */
8068 /* We rely on the existence of run-time guard to ensure that the
8069 loop executes at least once. */
8071 rtx iterations_num_reg
;
8073 unsigned HOST_WIDE_INT increment_value_abs
8074 = INTVAL (increment
) * increment_direction
;
8076 /* make sure that the increment is a power of two, otherwise (an
8077 expensive) divide is needed. */
8078 if (exact_log2 (increment_value_abs
) == -1)
8080 if (loop_dump_stream
)
8081 fprintf (loop_dump_stream
,
8082 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
8086 /* compute the number of iterations */
8091 /* Again, the number of iterations is calculated by:
8093 ; compare-val - initial-val + (increment -1) + additional-iteration
8094 ; num_iterations = -----------------------------------------------------------------
8097 /* ??? Do we have to call copy_rtx here before passing rtx to
8099 if (compare_direction
> 0)
8101 /* <, <= :the loop variable is increasing */
8102 temp_reg
= expand_binop (loop_var_mode
, sub_optab
,
8103 comparison_value
, initial_value
,
8104 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8108 temp_reg
= expand_binop (loop_var_mode
, sub_optab
,
8109 initial_value
, comparison_value
,
8110 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8113 if (increment_value_abs
- 1 + add_iteration
!= 0)
8114 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
8115 GEN_INT (increment_value_abs
- 1
8117 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8119 if (increment_value_abs
!= 1)
8121 /* ??? This will generate an expensive divide instruction for
8122 most targets. The original authors apparently expected this
8123 to be a shift, since they test for power-of-2 divisors above,
8124 but just naively generating a divide instruction will not give
8125 a shift. It happens to work for the PowerPC target because
8126 the rs6000.md file has a divide pattern that emits shifts.
8127 It will probably not work for any other target. */
8128 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
8130 GEN_INT (increment_value_abs
),
8131 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
8134 iterations_num_reg
= temp_reg
;
8136 sequence
= gen_sequence ();
8138 emit_insn_before (sequence
, loop_start
);
8139 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
8143 #endif /* Complex case */
8146 /* Instrument loop by inserting a bct in it as follows:
8147 1. A new counter register is created.
8148 2. In the head of the loop the new variable is initialized to the value
8149 passed in the loop_num_iterations parameter.
8150 3. At the end of the loop, comparison of the register with 0 is generated.
8151 The created comparison follows the pattern defined for the
8152 decrement_and_branch_on_count insn, so this insn will be generated.
8153 4. The branch on the old variable are deleted. The compare must remain
8154 because it might be used elsewhere. If the loop-variable or condition
8155 register are used elsewhere, they will be eliminated by flow. */
8158 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
8159 rtx loop_start
, loop_end
;
8160 rtx loop_num_iterations
;
8166 if (HAVE_decrement_and_branch_on_count
)
8168 if (loop_dump_stream
)
8170 fputs ("instrument_bct: Inserting BCT (", loop_dump_stream
);
8171 if (GET_CODE (loop_num_iterations
) == CONST_INT
)
8172 fprintf (loop_dump_stream
, HOST_WIDE_INT_PRINT_DEC
,
8173 INTVAL (loop_num_iterations
));
8175 fputs ("runtime", loop_dump_stream
);
8176 fputs (" iterations)", loop_dump_stream
);
8179 /* Discard original jump to continue loop. Original compare result
8180 may still be live, so it cannot be discarded explicitly. */
8181 delete_insn (PREV_INSN (loop_end
));
8183 /* Insert the label which will delimit the start of the loop. */
8184 start_label
= gen_label_rtx ();
8185 emit_label_after (start_label
, loop_start
);
8187 /* Insert initialization of the count register into the loop header. */
8189 counter_reg
= gen_reg_rtx (word_mode
);
8190 emit_insn (gen_move_insn (counter_reg
, loop_num_iterations
));
8191 sequence
= gen_sequence ();
8193 emit_insn_before (sequence
, loop_start
);
8195 /* Insert new comparison on the count register instead of the
8196 old one, generating the needed BCT pattern (that will be
8197 later recognized by assembly generation phase). */
8198 emit_jump_insn_before (gen_decrement_and_branch_on_count (counter_reg
,
8201 LABEL_NUSES (start_label
)++;
8205 #endif /* HAVE_decrement_and_branch_on_count */
8207 /* Scan the function and determine whether it has indirect (computed) jumps.
8209 This is taken mostly from flow.c; similar code exists elsewhere
8210 in the compiler. It may be useful to put this into rtlanal.c. */
8212 indirect_jump_in_function_p (start
)
8217 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
8218 if (computed_jump_p (insn
))
8224 /* Add MEM to the LOOP_MEMS array, if appropriate. See the
8225 documentation for LOOP_MEMS for the definition of `appropriate'.
8226 This function is called from prescan_loop via for_each_rtx. */
8229 insert_loop_mem (mem
, data
)
8239 switch (GET_CODE (m
))
8245 /* We're not interested in the MEM associated with a
8246 CONST_DOUBLE, so there's no need to traverse into this. */
8250 /* This is not a MEM. */
8254 /* See if we've already seen this MEM. */
8255 for (i
= 0; i
< loop_mems_idx
; ++i
)
8256 if (rtx_equal_p (m
, loop_mems
[i
].mem
))
8258 if (GET_MODE (m
) != GET_MODE (loop_mems
[i
].mem
))
8259 /* The modes of the two memory accesses are different. If
8260 this happens, something tricky is going on, and we just
8261 don't optimize accesses to this MEM. */
8262 loop_mems
[i
].optimize
= 0;
8267 /* Resize the array, if necessary. */
8268 if (loop_mems_idx
== loop_mems_allocated
)
8270 if (loop_mems_allocated
!= 0)
8271 loop_mems_allocated
*= 2;
8273 loop_mems_allocated
= 32;
8275 loop_mems
= (loop_mem_info
*)
8276 xrealloc (loop_mems
,
8277 loop_mems_allocated
* sizeof (loop_mem_info
));
8280 /* Actually insert the MEM. */
8281 loop_mems
[loop_mems_idx
].mem
= m
;
8282 /* We can't hoist this MEM out of the loop if it's a BLKmode MEM
8283 because we can't put it in a register. We still store it in the
8284 table, though, so that if we see the same address later, but in a
8285 non-BLK mode, we'll not think we can optimize it at that point. */
8286 loop_mems
[loop_mems_idx
].optimize
= (GET_MODE (m
) != BLKmode
);
8287 loop_mems
[loop_mems_idx
].reg
= NULL_RTX
;
8293 /* Like load_mems, but also ensures that N_TIMES_SET,
8294 MAY_NOT_OPTIMIZE, REG_SINGLE_USAGE, and INSN_COUNT have the correct
8295 values after load_mems. */
8298 load_mems_and_recount_loop_regs_set (scan_start
, end
, loop_top
, start
,
8299 reg_single_usage
, insn_count
)
8304 varray_type reg_single_usage
;
8307 int nregs
= max_reg_num ();
8309 load_mems (scan_start
, end
, loop_top
, start
);
8311 /* Recalculate n_times_set and friends since load_mems may have
8312 created new registers. */
8313 if (max_reg_num () > nregs
)
8319 nregs
= max_reg_num ();
8321 if (nregs
> n_times_set
->num_elements
)
8323 /* Grow all the arrays. */
8324 VARRAY_GROW (n_times_set
, nregs
);
8325 VARRAY_GROW (n_times_used
, nregs
);
8326 VARRAY_GROW (may_not_optimize
, nregs
);
8327 if (reg_single_usage
)
8328 VARRAY_GROW (reg_single_usage
, nregs
);
8330 /* Clear the arrays */
8331 bzero ((char *) &n_times_set
->data
, nregs
* sizeof (int));
8332 bzero ((char *) &may_not_optimize
->data
, nregs
* sizeof (char));
8333 if (reg_single_usage
)
8334 bzero ((char *) ®_single_usage
->data
, nregs
* sizeof (rtx
));
8336 count_loop_regs_set (loop_top
? loop_top
: start
, end
,
8337 may_not_optimize
, reg_single_usage
,
8340 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
8342 VARRAY_CHAR (may_not_optimize
, i
) = 1;
8343 VARRAY_INT (n_times_set
, i
) = 1;
8346 #ifdef AVOID_CCMODE_COPIES
8347 /* Don't try to move insns which set CC registers if we should not
8348 create CCmode register copies. */
8349 for (i
= max_reg_num () - 1; i
>= FIRST_PSEUDO_REGISTER
; i
--)
8350 if (GET_MODE_CLASS (GET_MODE (regno_reg_rtx
[i
])) == MODE_CC
)
8351 VARRAY_CHAR (may_not_optimize
, i
) = 1;
8354 /* Set n_times_used for the new registers. */
8355 bcopy ((char *) (&n_times_set
->data
.i
[0] + old_nregs
),
8356 (char *) (&n_times_used
->data
.i
[0] + old_nregs
),
8357 (nregs
- old_nregs
) * sizeof (int));
8361 /* Move MEMs into registers for the duration of the loop. SCAN_START
8362 is the first instruction in the loop (as it is executed). The
8363 other parameters are as for next_insn_in_loop. */
8366 load_mems (scan_start
, end
, loop_top
, start
)
8372 int maybe_never
= 0;
8375 rtx label
= NULL_RTX
;
8378 if (loop_mems_idx
> 0)
8380 /* Nonzero if the next instruction may never be executed. */
8381 int next_maybe_never
= 0;
8383 /* Check to see if it's possible that some instructions in the
8384 loop are never executed. */
8385 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
8386 p
!= NULL_RTX
&& !maybe_never
;
8387 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
8389 if (GET_CODE (p
) == CODE_LABEL
)
8391 else if (GET_CODE (p
) == JUMP_INSN
8392 /* If we enter the loop in the middle, and scan
8393 around to the beginning, don't set maybe_never
8394 for that. This must be an unconditional jump,
8395 otherwise the code at the top of the loop might
8396 never be executed. Unconditional jumps are
8397 followed a by barrier then loop end. */
8398 && ! (GET_CODE (p
) == JUMP_INSN
8399 && JUMP_LABEL (p
) == loop_top
8400 && NEXT_INSN (NEXT_INSN (p
)) == end
8401 && simplejump_p (p
)))
8403 if (!condjump_p (p
))
8404 /* Something complicated. */
8407 /* If there are any more instructions in the loop, they
8408 might not be reached. */
8409 next_maybe_never
= 1;
8411 else if (next_maybe_never
)
8415 /* Actually move the MEMs. */
8416 for (i
= 0; i
< loop_mems_idx
; ++i
)
8421 rtx mem
= loop_mems
[i
].mem
;
8423 if (MEM_VOLATILE_P (mem
)
8424 || invariant_p (XEXP (mem
, 0)) != 1)
8425 /* There's no telling whether or not MEM is modified. */
8426 loop_mems
[i
].optimize
= 0;
8428 /* Go through the MEMs written to in the loop to see if this
8429 one is aliased by one of them. */
8430 for (j
= 0; j
< loop_store_mems_idx
; ++j
)
8432 if (rtx_equal_p (mem
, loop_store_mems
[j
]))
8434 else if (true_dependence (loop_store_mems
[j
], VOIDmode
,
8437 /* MEM is indeed aliased by this store. */
8438 loop_mems
[i
].optimize
= 0;
8443 /* If this MEM is written to, we must be sure that there
8444 are no reads from another MEM that aliases this one. */
8445 if (loop_mems
[i
].optimize
&& written
)
8449 for (j
= 0; j
< loop_mems_idx
; ++j
)
8453 else if (true_dependence (mem
,
8458 /* It's not safe to hoist loop_mems[i] out of
8459 the loop because writes to it might not be
8460 seen by reads from loop_mems[j]. */
8461 loop_mems
[i
].optimize
= 0;
8467 if (maybe_never
&& may_trap_p (mem
))
8468 /* We can't access the MEM outside the loop; it might
8469 cause a trap that wouldn't have happened otherwise. */
8470 loop_mems
[i
].optimize
= 0;
8472 if (!loop_mems
[i
].optimize
)
8473 /* We thought we were going to lift this MEM out of the
8474 loop, but later discovered that we could not. */
8477 /* Allocate a pseudo for this MEM. We set REG_USERVAR_P in
8478 order to keep scan_loop from moving stores to this MEM
8479 out of the loop just because this REG is neither a
8480 user-variable nor used in the loop test. */
8481 reg
= gen_reg_rtx (GET_MODE (mem
));
8482 REG_USERVAR_P (reg
) = 1;
8483 loop_mems
[i
].reg
= reg
;
8485 /* Now, replace all references to the MEM with the
8486 corresponding pesudos. */
8487 for (p
= next_insn_in_loop (scan_start
, scan_start
, end
, loop_top
);
8489 p
= next_insn_in_loop (p
, scan_start
, end
, loop_top
))
8494 for_each_rtx (&p
, replace_loop_mem
, &ri
);
8497 if (!apply_change_group ())
8498 /* We couldn't replace all occurrences of the MEM. */
8499 loop_mems
[i
].optimize
= 0;
8504 /* Load the memory immediately before START, which is
8505 the NOTE_LOOP_BEG. */
8506 set
= gen_rtx_SET (GET_MODE (reg
), reg
, mem
);
8507 emit_insn_before (set
, start
);
8511 if (label
== NULL_RTX
)
8513 /* We must compute the former
8514 right-after-the-end label before we insert
8516 end_label
= next_label (end
);
8517 label
= gen_label_rtx ();
8518 emit_label_after (label
, end
);
8521 /* Store the memory immediately after END, which is
8522 the NOTE_LOOP_END. */
8523 set
= gen_rtx_SET (GET_MODE (reg
), copy_rtx (mem
), reg
);
8524 emit_insn_after (set
, label
);
8527 if (loop_dump_stream
)
8529 fprintf (loop_dump_stream
, "Hoisted regno %d %s from ",
8530 REGNO (reg
), (written
? "r/w" : "r/o"));
8531 print_rtl (loop_dump_stream
, mem
);
8532 fputc ('\n', loop_dump_stream
);
8538 if (label
!= NULL_RTX
)
8540 /* Now, we need to replace all references to the previous exit
8541 label with the new one. */
8546 for (p
= start
; p
!= end
; p
= NEXT_INSN (p
))
8548 for_each_rtx (&p
, replace_label
, &rr
);
8550 /* If this is a JUMP_INSN, then we also need to fix the JUMP_LABEL
8551 field. This is not handled by for_each_rtx because it doesn't
8552 handle unprinted ('0') fields. We need to update JUMP_LABEL
8553 because the immediately following unroll pass will use it.
8554 replace_label would not work anyways, because that only handles
8556 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == end_label
)
8557 JUMP_LABEL (p
) = label
;
8562 /* Replace MEM with its associated pseudo register. This function is
8563 called from load_mems via for_each_rtx. DATA is actually an
8564 rtx_and_int * describing the instruction currently being scanned
8565 and the MEM we are currently replacing. */
8568 replace_loop_mem (mem
, data
)
8580 switch (GET_CODE (m
))
8586 /* We're not interested in the MEM associated with a
8587 CONST_DOUBLE, so there's no need to traverse into one. */
8591 /* This is not a MEM. */
8595 ri
= (rtx_and_int
*) data
;
8598 if (!rtx_equal_p (loop_mems
[i
].mem
, m
))
8599 /* This is not the MEM we are currently replacing. */
8604 /* Actually replace the MEM. */
8605 validate_change (insn
, mem
, loop_mems
[i
].reg
, 1);
8610 /* Replace occurrences of the old exit label for the loop with the new
8611 one. DATA is an rtx_pair containing the old and new labels,
8615 replace_label (x
, data
)
8620 rtx old_label
= ((rtx_pair
*) data
)->r1
;
8621 rtx new_label
= ((rtx_pair
*) data
)->r2
;
8626 if (GET_CODE (l
) != LABEL_REF
)
8629 if (XEXP (l
, 0) != old_label
)
8632 XEXP (l
, 0) = new_label
;
8633 ++LABEL_NUSES (new_label
);
8634 --LABEL_NUSES (old_label
);