1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-5, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
84 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
85 really a loop (an insn outside the loop branches into it). */
87 static char *loop_invalid
;
89 /* Indexed by loop number, links together all LABEL_REFs which refer to
90 code labels outside the loop. Used by routines that need to know all
91 loop exits, such as final_biv_value and final_giv_value.
93 This does not include loop exits due to return instructions. This is
94 because all bivs and givs are pseudos, and hence must be dead after a
95 return, so the presense of a return does not affect any of the
96 optimizations that use this info. It is simpler to just not include return
97 instructions on this list. */
99 rtx
*loop_number_exit_labels
;
101 /* Indexed by loop number, counts the number of LABEL_REFs on
102 loop_number_exit_labels for this loop and all loops nested inside it. */
104 int *loop_number_exit_count
;
106 /* Holds the number of loop iterations. It is zero if the number could not be
107 calculated. Must be unsigned since the number of iterations can
108 be as high as 2^wordsize-1. For loops with a wider iterator, this number
109 will will be zero if the number of loop iterations is too large for an
110 unsigned integer to hold. */
112 unsigned HOST_WIDE_INT loop_n_iterations
;
114 /* Nonzero if there is a subroutine call in the current loop.
115 (unknown_address_altered is also nonzero in this case.) */
117 static int loop_has_call
;
119 /* Nonzero if there is a volatile memory reference in the current
122 static int loop_has_volatile
;
124 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
125 current loop. A continue statement will generate a branch to
126 NEXT_INSN (loop_continue). */
128 static rtx loop_continue
;
130 /* Indexed by register number, contains the number of times the reg
131 is set during the loop being scanned.
132 During code motion, a negative value indicates a reg that has been
133 made a candidate; in particular -2 means that it is an candidate that
134 we know is equal to a constant and -1 means that it is an candidate
135 not known equal to a constant.
136 After code motion, regs moved have 0 (which is accurate now)
137 while the failed candidates have the original number of times set.
139 Therefore, at all times, == 0 indicates an invariant register;
140 < 0 a conditionally invariant one. */
142 static short *n_times_set
;
144 /* Original value of n_times_set; same except that this value
145 is not set negative for a reg whose sets have been made candidates
146 and not set to 0 for a reg that is moved. */
148 static short *n_times_used
;
150 /* Index by register number, 1 indicates that the register
151 cannot be moved or strength reduced. */
153 static char *may_not_optimize
;
155 /* Nonzero means reg N has already been moved out of one loop.
156 This reduces the desire to move it out of another. */
158 static char *moved_once
;
160 /* Array of MEMs that are stored in this loop. If there are too many to fit
161 here, we just turn on unknown_address_altered. */
163 #define NUM_STORES 20
164 static rtx loop_store_mems
[NUM_STORES
];
166 /* Index of first available slot in above array. */
167 static int loop_store_mems_idx
;
169 /* Nonzero if we don't know what MEMs were changed in the current loop.
170 This happens if the loop contains a call (in which case `loop_has_call'
171 will also be set) or if we store into more than NUM_STORES MEMs. */
173 static int unknown_address_altered
;
175 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
176 static int num_movables
;
178 /* Count of memory write instructions discovered in the loop. */
179 static int num_mem_sets
;
181 /* Number of loops contained within the current one, including itself. */
182 static int loops_enclosed
;
184 /* Bound on pseudo register number before loop optimization.
185 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
186 int max_reg_before_loop
;
188 /* This obstack is used in product_cheap_p to allocate its rtl. It
189 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
190 If we used the same obstack that it did, we would be deallocating
193 static struct obstack temp_obstack
;
195 /* This is where the pointer to the obstack being used for RTL is stored. */
197 extern struct obstack
*rtl_obstack
;
199 #define obstack_chunk_alloc xmalloc
200 #define obstack_chunk_free free
202 extern char *oballoc ();
204 /* During the analysis of a loop, a chain of `struct movable's
205 is made to record all the movable insns found.
206 Then the entire chain can be scanned to decide which to move. */
210 rtx insn
; /* A movable insn */
211 rtx set_src
; /* The expression this reg is set from. */
212 rtx set_dest
; /* The destination of this SET. */
213 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
214 of any registers used within the LIBCALL. */
215 int consec
; /* Number of consecutive following insns
216 that must be moved with this one. */
217 int regno
; /* The register it sets */
218 short lifetime
; /* lifetime of that register;
219 may be adjusted when matching movables
220 that load the same value are found. */
221 short savings
; /* Number of insns we can move for this reg,
222 including other movables that force this
223 or match this one. */
224 unsigned int cond
: 1; /* 1 if only conditionally movable */
225 unsigned int force
: 1; /* 1 means MUST move this insn */
226 unsigned int global
: 1; /* 1 means reg is live outside this loop */
227 /* If PARTIAL is 1, GLOBAL means something different:
228 that the reg is live outside the range from where it is set
229 to the following label. */
230 unsigned int done
: 1; /* 1 inhibits further processing of this */
232 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
233 In particular, moving it does not make it
235 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
236 load SRC, rather than copying INSN. */
237 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
238 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
239 that we should avoid changing when clearing
240 the rest of the reg. */
241 struct movable
*match
; /* First entry for same value */
242 struct movable
*forces
; /* An insn that must be moved if this is */
243 struct movable
*next
;
246 FILE *loop_dump_stream
;
248 /* Forward declarations. */
250 static void find_and_verify_loops ();
251 static void mark_loop_jump ();
252 static void prescan_loop ();
253 static int reg_in_basic_block_p ();
254 static int consec_sets_invariant_p ();
255 static rtx
libcall_other_reg ();
256 static int labels_in_range_p ();
257 static void count_loop_regs_set ();
258 static void note_addr_stored ();
259 static int loop_reg_used_before_p ();
260 static void scan_loop ();
261 static void replace_call_address ();
262 static rtx
skip_consec_insns ();
263 static int libcall_benefit ();
264 static void ignore_some_movables ();
265 static void force_movables ();
266 static void combine_movables ();
267 static int rtx_equal_for_loop_p ();
268 static void move_movables ();
269 static void strength_reduce ();
270 static int valid_initial_value_p ();
271 static void find_mem_givs ();
272 static void record_biv ();
273 static void check_final_value ();
274 static void record_giv ();
275 static void update_giv_derive ();
276 static int basic_induction_var ();
277 static rtx
simplify_giv_expr ();
278 static int general_induction_var ();
279 static int consec_sets_giv ();
280 static int check_dbra_loop ();
281 static rtx
express_from ();
282 static int combine_givs_p ();
283 static void combine_givs ();
284 static int product_cheap_p ();
285 static int maybe_eliminate_biv ();
286 static int maybe_eliminate_biv_1 ();
287 static int last_use_this_basic_block ();
288 static void record_initial ();
289 static void update_reg_last_use ();
291 /* Relative gain of eliminating various kinds of operations. */
298 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
299 copy the value of the strength reduced giv to its original register. */
305 char *free_point
= (char *) oballoc (1);
306 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
308 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
310 /* We multiply by 2 to reconcile the difference in scale between
311 these two ways of computing costs. Otherwise the cost of a copy
312 will be far less than the cost of an add. */
316 /* Free the objects we just allocated. */
319 /* Initialize the obstack used for rtl in product_cheap_p. */
320 gcc_obstack_init (&temp_obstack
);
323 /* Entry point of this file. Perform loop optimization
324 on the current function. F is the first insn of the function
325 and DUMPFILE is a stream for output of a trace of actions taken
326 (or 0 if none should be output). */
329 loop_optimize (f
, dumpfile
)
330 /* f is the first instruction of a chain of insns for one function */
338 loop_dump_stream
= dumpfile
;
340 init_recog_no_volatile ();
341 init_alias_analysis ();
343 max_reg_before_loop
= max_reg_num ();
345 moved_once
= (char *) alloca (max_reg_before_loop
);
346 bzero (moved_once
, max_reg_before_loop
);
350 /* Count the number of loops. */
353 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
355 if (GET_CODE (insn
) == NOTE
356 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
360 /* Don't waste time if no loops. */
361 if (max_loop_num
== 0)
364 /* Get size to use for tables indexed by uids.
365 Leave some space for labels allocated by find_and_verify_loops. */
366 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
368 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
369 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
371 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
372 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
374 /* Allocate tables for recording each loop. We set each entry, so they need
376 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
377 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
378 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
379 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
380 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
381 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
383 /* Find and process each loop.
384 First, find them, and record them in order of their beginnings. */
385 find_and_verify_loops (f
);
387 /* Now find all register lifetimes. This must be done after
388 find_and_verify_loops, because it might reorder the insns in the
390 reg_scan (f
, max_reg_num (), 1);
392 /* See if we went too far. */
393 if (get_max_uid () > max_uid_for_loop
)
396 /* Compute the mapping from uids to luids.
397 LUIDs are numbers assigned to insns, like uids,
398 except that luids increase monotonically through the code.
399 Don't assign luids to line-number NOTEs, so that the distance in luids
400 between two insns is not affected by -g. */
402 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
405 if (GET_CODE (insn
) != NOTE
406 || NOTE_LINE_NUMBER (insn
) <= 0)
407 uid_luid
[INSN_UID (insn
)] = ++i
;
409 /* Give a line number note the same luid as preceding insn. */
410 uid_luid
[INSN_UID (insn
)] = i
;
415 /* Don't leave gaps in uid_luid for insns that have been
416 deleted. It is possible that the first or last insn
417 using some register has been deleted by cross-jumping.
418 Make sure that uid_luid for that former insn's uid
419 points to the general area where that insn used to be. */
420 for (i
= 0; i
< max_uid_for_loop
; i
++)
422 uid_luid
[0] = uid_luid
[i
];
423 if (uid_luid
[0] != 0)
426 for (i
= 0; i
< max_uid_for_loop
; i
++)
427 if (uid_luid
[i
] == 0)
428 uid_luid
[i
] = uid_luid
[i
- 1];
430 /* Create a mapping from loops to BLOCK tree nodes. */
431 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
432 find_loop_tree_blocks ();
434 /* Now scan the loops, last ones first, since this means inner ones are done
435 before outer ones. */
436 for (i
= max_loop_num
-1; i
>= 0; i
--)
437 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
438 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
441 /* If debugging and unrolling loops, we must replicate the tree nodes
442 corresponding to the blocks inside the loop, so that the original one
443 to one mapping will remain. */
444 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
445 unroll_block_trees ();
448 /* Optimize one loop whose start is LOOP_START and end is END.
449 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
450 NOTE_INSN_LOOP_END. */
452 /* ??? Could also move memory writes out of loops if the destination address
453 is invariant, the source is invariant, the memory write is not volatile,
454 and if we can prove that no read inside the loop can read this address
455 before the write occurs. If there is a read of this address after the
456 write, then we can also mark the memory read as invariant. */
459 scan_loop (loop_start
, end
, nregs
)
465 /* 1 if we are scanning insns that could be executed zero times. */
467 /* 1 if we are scanning insns that might never be executed
468 due to a subroutine call which might exit before they are reached. */
470 /* For a rotated loop that is entered near the bottom,
471 this is the label at the top. Otherwise it is zero. */
473 /* Jump insn that enters the loop, or 0 if control drops in. */
474 rtx loop_entry_jump
= 0;
475 /* Place in the loop where control enters. */
477 /* Number of insns in the loop. */
482 /* The SET from an insn, if it is the only SET in the insn. */
484 /* Chain describing insns movable in current loop. */
485 struct movable
*movables
= 0;
486 /* Last element in `movables' -- so we can add elements at the end. */
487 struct movable
*last_movable
= 0;
488 /* Ratio of extra register life span we can justify
489 for saving an instruction. More if loop doesn't call subroutines
490 since in that case saving an insn makes more difference
491 and more registers are available. */
493 /* If we have calls, contains the insn in which a register was used
494 if it was used exactly once; contains const0_rtx if it was used more
496 rtx
*reg_single_usage
= 0;
497 /* Nonzero if we are scanning instructions in a sub-loop. */
500 n_times_set
= (short *) alloca (nregs
* sizeof (short));
501 n_times_used
= (short *) alloca (nregs
* sizeof (short));
502 may_not_optimize
= (char *) alloca (nregs
);
504 /* Determine whether this loop starts with a jump down to a test at
505 the end. This will occur for a small number of loops with a test
506 that is too complex to duplicate in front of the loop.
508 We search for the first insn or label in the loop, skipping NOTEs.
509 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
510 (because we might have a loop executed only once that contains a
511 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
512 (in case we have a degenerate loop).
514 Note that if we mistakenly think that a loop is entered at the top
515 when, in fact, it is entered at the exit test, the only effect will be
516 slightly poorer optimization. Making the opposite error can generate
517 incorrect code. Since very few loops now start with a jump to the
518 exit test, the code here to detect that case is very conservative. */
520 for (p
= NEXT_INSN (loop_start
);
522 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
523 && (GET_CODE (p
) != NOTE
524 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
525 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
531 /* Set up variables describing this loop. */
532 prescan_loop (loop_start
, end
);
533 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
535 /* If loop has a jump before the first label,
536 the true entry is the target of that jump.
537 Start scan from there.
538 But record in LOOP_TOP the place where the end-test jumps
539 back to so we can scan that after the end of the loop. */
540 if (GET_CODE (p
) == JUMP_INSN
)
544 /* Loop entry must be unconditional jump (and not a RETURN) */
546 && JUMP_LABEL (p
) != 0
547 /* Check to see whether the jump actually
548 jumps out of the loop (meaning it's no loop).
549 This case can happen for things like
550 do {..} while (0). If this label was generated previously
551 by loop, we can't tell anything about it and have to reject
553 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
554 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
555 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
557 loop_top
= next_label (scan_start
);
558 scan_start
= JUMP_LABEL (p
);
562 /* If SCAN_START was an insn created by loop, we don't know its luid
563 as required by loop_reg_used_before_p. So skip such loops. (This
564 test may never be true, but it's best to play it safe.)
566 Also, skip loops where we do not start scanning at a label. This
567 test also rejects loops starting with a JUMP_INSN that failed the
570 if (INSN_UID (scan_start
) >= max_uid_for_loop
571 || GET_CODE (scan_start
) != CODE_LABEL
)
573 if (loop_dump_stream
)
574 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
575 INSN_UID (loop_start
), INSN_UID (end
));
579 /* Count number of times each reg is set during this loop.
580 Set may_not_optimize[I] if it is not safe to move out
581 the setting of register I. If this loop has calls, set
582 reg_single_usage[I]. */
584 bzero ((char *) n_times_set
, nregs
* sizeof (short));
585 bzero (may_not_optimize
, nregs
);
589 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
590 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
593 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
594 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
596 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
597 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
598 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (short));
600 if (loop_dump_stream
)
602 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
603 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
605 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
606 INSN_UID (loop_continue
));
609 /* Scan through the loop finding insns that are safe to move.
610 Set n_times_set negative for the reg being set, so that
611 this reg will be considered invariant for subsequent insns.
612 We consider whether subsequent insns use the reg
613 in deciding whether it is worth actually moving.
615 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
616 and therefore it is possible that the insns we are scanning
617 would never be executed. At such times, we must make sure
618 that it is safe to execute the insn once instead of zero times.
619 When MAYBE_NEVER is 0, all insns will be executed at least once
620 so that is not a problem. */
626 /* At end of a straight-in loop, we are done.
627 At end of a loop entered at the bottom, scan the top. */
640 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
641 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
643 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
644 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
647 if (GET_CODE (p
) == INSN
648 && (set
= single_set (p
))
649 && GET_CODE (SET_DEST (set
)) == REG
650 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
655 rtx src
= SET_SRC (set
);
656 rtx dependencies
= 0;
658 /* Figure out what to use as a source of this insn. If a REG_EQUIV
659 note is given or if a REG_EQUAL note with a constant operand is
660 specified, use it as the source and mark that we should move
661 this insn by calling emit_move_insn rather that duplicating the
664 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
666 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
668 src
= XEXP (temp
, 0), move_insn
= 1;
671 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
672 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
673 src
= XEXP (temp
, 0), move_insn
= 1;
674 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
676 src
= XEXP (temp
, 0);
677 /* A libcall block can use regs that don't appear in
678 the equivalent expression. To move the libcall,
679 we must move those regs too. */
680 dependencies
= libcall_other_reg (p
, src
);
684 /* Don't try to optimize a register that was made
685 by loop-optimization for an inner loop.
686 We don't know its life-span, so we can't compute the benefit. */
687 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
689 /* In order to move a register, we need to have one of three cases:
690 (1) it is used only in the same basic block as the set
691 (2) it is not a user variable and it is not used in the
692 exit test (this can cause the variable to be used
693 before it is set just like a user-variable).
694 (3) the set is guaranteed to be executed once the loop starts,
695 and the reg is not used until after that. */
696 else if (! ((! maybe_never
697 && ! loop_reg_used_before_p (set
, p
, loop_start
,
699 || (! REG_USERVAR_P (SET_DEST (set
))
700 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
701 || reg_in_basic_block_p (p
, SET_DEST (set
))))
703 else if ((tem
= invariant_p (src
))
704 && (dependencies
== 0
705 || (tem2
= invariant_p (dependencies
)) != 0)
706 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
708 = consec_sets_invariant_p (SET_DEST (set
),
709 n_times_set
[REGNO (SET_DEST (set
))],
711 /* If the insn can cause a trap (such as divide by zero),
712 can't move it unless it's guaranteed to be executed
713 once loop is entered. Even a function call might
714 prevent the trap insn from being reached
715 (since it might exit!) */
716 && ! ((maybe_never
|| call_passed
)
717 && may_trap_p (src
)))
719 register struct movable
*m
;
720 register int regno
= REGNO (SET_DEST (set
));
722 /* A potential lossage is where we have a case where two insns
723 can be combined as long as they are both in the loop, but
724 we move one of them outside the loop. For large loops,
725 this can lose. The most common case of this is the address
726 of a function being called.
728 Therefore, if this register is marked as being used exactly
729 once if we are in a loop with calls (a "large loop"), see if
730 we can replace the usage of this register with the source
731 of this SET. If we can, delete this insn.
733 Don't do this if P has a REG_RETVAL note or if we have
734 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
736 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
737 && reg_single_usage
[regno
] != const0_rtx
738 && regno_first_uid
[regno
] == INSN_UID (p
)
739 && (regno_last_uid
[regno
]
740 == INSN_UID (reg_single_usage
[regno
]))
741 && n_times_set
[REGNO (SET_DEST (set
))] == 1
742 && ! side_effects_p (SET_SRC (set
))
743 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
744 #ifdef SMALL_REGISTER_CLASSES
745 && ! (GET_CODE (SET_SRC (set
)) == REG
746 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
748 /* This test is not redundant; SET_SRC (set) might be
749 a call-clobbered register and the life of REGNO
750 might span a call. */
751 && ! modified_between_p (SET_SRC (set
), p
,
752 reg_single_usage
[regno
])
753 && no_labels_between_p (p
, reg_single_usage
[regno
])
754 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
755 reg_single_usage
[regno
]))
757 /* Replace any usage in a REG_EQUAL note. Must copy the
758 new source, so that we don't get rtx sharing between the
759 SET_SOURCE and REG_NOTES of insn p. */
760 REG_NOTES (reg_single_usage
[regno
])
761 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
762 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
765 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
766 NOTE_SOURCE_FILE (p
) = 0;
767 n_times_set
[regno
] = 0;
771 m
= (struct movable
*) alloca (sizeof (struct movable
));
775 m
->dependencies
= dependencies
;
776 m
->set_dest
= SET_DEST (set
);
778 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
782 m
->move_insn
= move_insn
;
783 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
784 m
->savemode
= VOIDmode
;
786 /* Set M->cond if either invariant_p or consec_sets_invariant_p
787 returned 2 (only conditionally invariant). */
788 m
->cond
= ((tem
| tem1
| tem2
) > 1);
789 m
->global
= (uid_luid
[regno_last_uid
[regno
]] > INSN_LUID (end
)
790 || uid_luid
[regno_first_uid
[regno
]] < INSN_LUID (loop_start
));
792 m
->lifetime
= (uid_luid
[regno_last_uid
[regno
]]
793 - uid_luid
[regno_first_uid
[regno
]]);
794 m
->savings
= n_times_used
[regno
];
795 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
796 m
->savings
+= libcall_benefit (p
);
797 n_times_set
[regno
] = move_insn
? -2 : -1;
798 /* Add M to the end of the chain MOVABLES. */
802 last_movable
->next
= m
;
807 /* Skip this insn, not checking REG_LIBCALL notes. */
808 p
= next_nonnote_insn (p
);
809 /* Skip the consecutive insns, if there are any. */
810 p
= skip_consec_insns (p
, m
->consec
);
811 /* Back up to the last insn of the consecutive group. */
812 p
= prev_nonnote_insn (p
);
814 /* We must now reset m->move_insn, m->is_equiv, and possibly
815 m->set_src to correspond to the effects of all the
817 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
819 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
822 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
823 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
824 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
829 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
832 /* If this register is always set within a STRICT_LOW_PART
833 or set to zero, then its high bytes are constant.
834 So clear them outside the loop and within the loop
835 just load the low bytes.
836 We must check that the machine has an instruction to do so.
837 Also, if the value loaded into the register
838 depends on the same register, this cannot be done. */
839 else if (SET_SRC (set
) == const0_rtx
840 && GET_CODE (NEXT_INSN (p
)) == INSN
841 && (set1
= single_set (NEXT_INSN (p
)))
842 && GET_CODE (set1
) == SET
843 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
844 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
845 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
847 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
849 register int regno
= REGNO (SET_DEST (set
));
850 if (n_times_set
[regno
] == 2)
852 register struct movable
*m
;
853 m
= (struct movable
*) alloca (sizeof (struct movable
));
856 m
->set_dest
= SET_DEST (set
);
864 /* If the insn may not be executed on some cycles,
865 we can't clear the whole reg; clear just high part.
866 Not even if the reg is used only within this loop.
873 Clearing x before the inner loop could clobber a value
874 being saved from the last time around the outer loop.
875 However, if the reg is not used outside this loop
876 and all uses of the register are in the same
877 basic block as the store, there is no problem.
879 If this insn was made by loop, we don't know its
880 INSN_LUID and hence must make a conservative
882 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
883 || (uid_luid
[regno_last_uid
[regno
]]
885 || (uid_luid
[regno_first_uid
[regno
]]
887 || (labels_in_range_p
888 (p
, uid_luid
[regno_first_uid
[regno
]])));
889 if (maybe_never
&& m
->global
)
890 m
->savemode
= GET_MODE (SET_SRC (set1
));
892 m
->savemode
= VOIDmode
;
896 m
->lifetime
= (uid_luid
[regno_last_uid
[regno
]]
897 - uid_luid
[regno_first_uid
[regno
]]);
899 n_times_set
[regno
] = -1;
900 /* Add M to the end of the chain MOVABLES. */
904 last_movable
->next
= m
;
909 /* Past a call insn, we get to insns which might not be executed
910 because the call might exit. This matters for insns that trap.
911 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
912 so they don't count. */
913 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
915 /* Past a label or a jump, we get to insns for which we
916 can't count on whether or how many times they will be
917 executed during each iteration. Therefore, we can
918 only move out sets of trivial variables
919 (those not used after the loop). */
920 /* Similar code appears twice in strength_reduce. */
921 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
922 /* If we enter the loop in the middle, and scan around to the
923 beginning, don't set maybe_never for that. This must be an
924 unconditional jump, otherwise the code at the top of the
925 loop might never be executed. Unconditional jumps are
926 followed a by barrier then loop end. */
927 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
928 && NEXT_INSN (NEXT_INSN (p
)) == end
929 && simplejump_p (p
)))
931 else if (GET_CODE (p
) == NOTE
)
933 /* At the virtual top of a converted loop, insns are again known to
934 be executed: logically, the loop begins here even though the exit
935 code has been duplicated. */
936 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
937 maybe_never
= call_passed
= 0;
938 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
940 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
945 /* If one movable subsumes another, ignore that other. */
947 ignore_some_movables (movables
);
949 /* For each movable insn, see if the reg that it loads
950 leads when it dies right into another conditionally movable insn.
951 If so, record that the second insn "forces" the first one,
952 since the second can be moved only if the first is. */
954 force_movables (movables
);
956 /* See if there are multiple movable insns that load the same value.
957 If there are, make all but the first point at the first one
958 through the `match' field, and add the priorities of them
959 all together as the priority of the first. */
961 combine_movables (movables
, nregs
);
963 /* Now consider each movable insn to decide whether it is worth moving.
964 Store 0 in n_times_set for each reg that is moved. */
966 move_movables (movables
, threshold
,
967 insn_count
, loop_start
, end
, nregs
);
969 /* Now candidates that still are negative are those not moved.
970 Change n_times_set to indicate that those are not actually invariant. */
971 for (i
= 0; i
< nregs
; i
++)
972 if (n_times_set
[i
] < 0)
973 n_times_set
[i
] = n_times_used
[i
];
975 if (flag_strength_reduce
)
976 strength_reduce (scan_start
, end
, loop_top
,
977 insn_count
, loop_start
, end
);
980 /* Add elements to *OUTPUT to record all the pseudo-regs
981 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
984 record_excess_regs (in_this
, not_in_this
, output
)
985 rtx in_this
, not_in_this
;
992 code
= GET_CODE (in_this
);
1006 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1007 && ! reg_mentioned_p (in_this
, not_in_this
))
1008 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1012 fmt
= GET_RTX_FORMAT (code
);
1013 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1020 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1021 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1025 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1031 /* Check what regs are referred to in the libcall block ending with INSN,
1032 aside from those mentioned in the equivalent value.
1033 If there are none, return 0.
1034 If there are one or more, return an EXPR_LIST containing all of them. */
1037 libcall_other_reg (insn
, equiv
)
1040 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1041 rtx p
= XEXP (note
, 0);
1044 /* First, find all the regs used in the libcall block
1045 that are not mentioned as inputs to the result. */
1049 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1050 || GET_CODE (p
) == CALL_INSN
)
1051 record_excess_regs (PATTERN (p
), equiv
, &output
);
1058 /* Return 1 if all uses of REG
1059 are between INSN and the end of the basic block. */
1062 reg_in_basic_block_p (insn
, reg
)
1065 int regno
= REGNO (reg
);
1068 if (regno_first_uid
[regno
] != INSN_UID (insn
))
1071 /* Search this basic block for the already recorded last use of the reg. */
1072 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1074 switch (GET_CODE (p
))
1081 /* Ordinary insn: if this is the last use, we win. */
1082 if (regno_last_uid
[regno
] == INSN_UID (p
))
1087 /* Jump insn: if this is the last use, we win. */
1088 if (regno_last_uid
[regno
] == INSN_UID (p
))
1090 /* Otherwise, it's the end of the basic block, so we lose. */
1095 /* It's the end of the basic block, so we lose. */
1100 /* The "last use" doesn't follow the "first use"?? */
1104 /* Compute the benefit of eliminating the insns in the block whose
1105 last insn is LAST. This may be a group of insns used to compute a
1106 value directly or can contain a library call. */
1109 libcall_benefit (last
)
1115 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1116 insn
!= last
; insn
= NEXT_INSN (insn
))
1118 if (GET_CODE (insn
) == CALL_INSN
)
1119 benefit
+= 10; /* Assume at least this many insns in a library
1121 else if (GET_CODE (insn
) == INSN
1122 && GET_CODE (PATTERN (insn
)) != USE
1123 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1130 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1133 skip_consec_insns (insn
, count
)
1137 for (; count
> 0; count
--)
1141 /* If first insn of libcall sequence, skip to end. */
1142 /* Do this at start of loop, since INSN is guaranteed to
1144 if (GET_CODE (insn
) != NOTE
1145 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1146 insn
= XEXP (temp
, 0);
1148 do insn
= NEXT_INSN (insn
);
1149 while (GET_CODE (insn
) == NOTE
);
1155 /* Ignore any movable whose insn falls within a libcall
1156 which is part of another movable.
1157 We make use of the fact that the movable for the libcall value
1158 was made later and so appears later on the chain. */
1161 ignore_some_movables (movables
)
1162 struct movable
*movables
;
1164 register struct movable
*m
, *m1
;
1166 for (m
= movables
; m
; m
= m
->next
)
1168 /* Is this a movable for the value of a libcall? */
1169 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1173 /* Check for earlier movables inside that range,
1174 and mark them invalid. We cannot use LUIDs here because
1175 insns created by loop.c for prior loops don't have LUIDs.
1176 Rather than reject all such insns from movables, we just
1177 explicitly check each insn in the libcall (since invariant
1178 libcalls aren't that common). */
1179 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1180 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1181 if (m1
->insn
== insn
)
1187 /* For each movable insn, see if the reg that it loads
1188 leads when it dies right into another conditionally movable insn.
1189 If so, record that the second insn "forces" the first one,
1190 since the second can be moved only if the first is. */
1193 force_movables (movables
)
1194 struct movable
*movables
;
1196 register struct movable
*m
, *m1
;
1197 for (m1
= movables
; m1
; m1
= m1
->next
)
1198 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1199 if (!m1
->partial
&& !m1
->done
)
1201 int regno
= m1
->regno
;
1202 for (m
= m1
->next
; m
; m
= m
->next
)
1203 /* ??? Could this be a bug? What if CSE caused the
1204 register of M1 to be used after this insn?
1205 Since CSE does not update regno_last_uid,
1206 this insn M->insn might not be where it dies.
1207 But very likely this doesn't matter; what matters is
1208 that M's reg is computed from M1's reg. */
1209 if (INSN_UID (m
->insn
) == regno_last_uid
[regno
]
1212 if (m
!= 0 && m
->set_src
== m1
->set_dest
1213 /* If m->consec, m->set_src isn't valid. */
1217 /* Increase the priority of the moving the first insn
1218 since it permits the second to be moved as well. */
1222 m1
->lifetime
+= m
->lifetime
;
1223 m1
->savings
+= m1
->savings
;
1228 /* Find invariant expressions that are equal and can be combined into
1232 combine_movables (movables
, nregs
)
1233 struct movable
*movables
;
1236 register struct movable
*m
;
1237 char *matched_regs
= (char *) alloca (nregs
);
1238 enum machine_mode mode
;
1240 /* Regs that are set more than once are not allowed to match
1241 or be matched. I'm no longer sure why not. */
1242 /* Perhaps testing m->consec_sets would be more appropriate here? */
1244 for (m
= movables
; m
; m
= m
->next
)
1245 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1247 register struct movable
*m1
;
1248 int regno
= m
->regno
;
1250 bzero (matched_regs
, nregs
);
1251 matched_regs
[regno
] = 1;
1253 for (m1
= movables
; m1
; m1
= m1
->next
)
1254 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1255 /* A reg used outside the loop mustn't be eliminated. */
1257 /* A reg used for zero-extending mustn't be eliminated. */
1259 && (matched_regs
[m1
->regno
]
1262 /* Can combine regs with different modes loaded from the
1263 same constant only if the modes are the same or
1264 if both are integer modes with M wider or the same
1265 width as M1. The check for integer is redundant, but
1266 safe, since the only case of differing destination
1267 modes with equal sources is when both sources are
1268 VOIDmode, i.e., CONST_INT. */
1269 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1270 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1271 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1272 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1273 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1274 /* See if the source of M1 says it matches M. */
1275 && ((GET_CODE (m1
->set_src
) == REG
1276 && matched_regs
[REGNO (m1
->set_src
)])
1277 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1279 && ((m
->dependencies
== m1
->dependencies
)
1280 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1282 m
->lifetime
+= m1
->lifetime
;
1283 m
->savings
+= m1
->savings
;
1286 matched_regs
[m1
->regno
] = 1;
1290 /* Now combine the regs used for zero-extension.
1291 This can be done for those not marked `global'
1292 provided their lives don't overlap. */
1294 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1295 mode
= GET_MODE_WIDER_MODE (mode
))
1297 register struct movable
*m0
= 0;
1299 /* Combine all the registers for extension from mode MODE.
1300 Don't combine any that are used outside this loop. */
1301 for (m
= movables
; m
; m
= m
->next
)
1302 if (m
->partial
&& ! m
->global
1303 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1305 register struct movable
*m1
;
1306 int first
= uid_luid
[regno_first_uid
[m
->regno
]];
1307 int last
= uid_luid
[regno_last_uid
[m
->regno
]];
1311 /* First one: don't check for overlap, just record it. */
1316 /* Make sure they extend to the same mode.
1317 (Almost always true.) */
1318 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1321 /* We already have one: check for overlap with those
1322 already combined together. */
1323 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1324 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1325 if (! (uid_luid
[regno_first_uid
[m1
->regno
]] > last
1326 || uid_luid
[regno_last_uid
[m1
->regno
]] < first
))
1329 /* No overlap: we can combine this with the others. */
1330 m0
->lifetime
+= m
->lifetime
;
1331 m0
->savings
+= m
->savings
;
1340 /* Return 1 if regs X and Y will become the same if moved. */
1343 regs_match_p (x
, y
, movables
)
1345 struct movable
*movables
;
1349 struct movable
*mx
, *my
;
1351 for (mx
= movables
; mx
; mx
= mx
->next
)
1352 if (mx
->regno
== xn
)
1355 for (my
= movables
; my
; my
= my
->next
)
1356 if (my
->regno
== yn
)
1360 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1362 || mx
== my
->match
));
1365 /* Return 1 if X and Y are identical-looking rtx's.
1366 This is the Lisp function EQUAL for rtx arguments.
1368 If two registers are matching movables or a movable register and an
1369 equivalent constant, consider them equal. */
1372 rtx_equal_for_loop_p (x
, y
, movables
)
1374 struct movable
*movables
;
1378 register struct movable
*m
;
1379 register enum rtx_code code
;
1384 if (x
== 0 || y
== 0)
1387 code
= GET_CODE (x
);
1389 /* If we have a register and a constant, they may sometimes be
1391 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1393 for (m
= movables
; m
; m
= m
->next
)
1394 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1395 && rtx_equal_p (m
->set_src
, y
))
1398 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1400 for (m
= movables
; m
; m
= m
->next
)
1401 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1402 && rtx_equal_p (m
->set_src
, x
))
1405 /* Otherwise, rtx's of different codes cannot be equal. */
1406 if (code
!= GET_CODE (y
))
1409 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1410 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1412 if (GET_MODE (x
) != GET_MODE (y
))
1415 /* These three types of rtx's can be compared nonrecursively. */
1417 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1419 if (code
== LABEL_REF
)
1420 return XEXP (x
, 0) == XEXP (y
, 0);
1421 if (code
== SYMBOL_REF
)
1422 return XSTR (x
, 0) == XSTR (y
, 0);
1424 /* Compare the elements. If any pair of corresponding elements
1425 fail to match, return 0 for the whole things. */
1427 fmt
= GET_RTX_FORMAT (code
);
1428 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1433 if (XWINT (x
, i
) != XWINT (y
, i
))
1438 if (XINT (x
, i
) != XINT (y
, i
))
1443 /* Two vectors must have the same length. */
1444 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1447 /* And the corresponding elements must match. */
1448 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1449 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1454 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1459 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1464 /* These are just backpointers, so they don't matter. */
1470 /* It is believed that rtx's at this level will never
1471 contain anything but integers and other rtx's,
1472 except for within LABEL_REFs and SYMBOL_REFs. */
1480 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1481 insns in INSNS which use thet reference. */
1484 add_label_notes (x
, insns
)
1488 enum rtx_code code
= GET_CODE (x
);
1493 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1495 rtx next
= next_real_insn (XEXP (x
, 0));
1497 /* Don't record labels that refer to dispatch tables.
1498 This is not necessary, since the tablejump references the same label.
1499 And if we did record them, flow.c would make worse code. */
1501 || ! (GET_CODE (next
) == JUMP_INSN
1502 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1503 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1505 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1506 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1507 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1513 fmt
= GET_RTX_FORMAT (code
);
1514 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1517 add_label_notes (XEXP (x
, i
), insns
);
1518 else if (fmt
[i
] == 'E')
1519 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1520 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1524 /* Scan MOVABLES, and move the insns that deserve to be moved.
1525 If two matching movables are combined, replace one reg with the
1526 other throughout. */
1529 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1530 struct movable
*movables
;
1538 register struct movable
*m
;
1540 /* Map of pseudo-register replacements to handle combining
1541 when we move several insns that load the same value
1542 into different pseudo-registers. */
1543 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1544 char *already_moved
= (char *) alloca (nregs
);
1546 bzero (already_moved
, nregs
);
1547 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1551 for (m
= movables
; m
; m
= m
->next
)
1553 /* Describe this movable insn. */
1555 if (loop_dump_stream
)
1557 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1558 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1560 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1562 fprintf (loop_dump_stream
, "cond ");
1564 fprintf (loop_dump_stream
, "force ");
1566 fprintf (loop_dump_stream
, "global ");
1568 fprintf (loop_dump_stream
, "done ");
1570 fprintf (loop_dump_stream
, "move-insn ");
1572 fprintf (loop_dump_stream
, "matches %d ",
1573 INSN_UID (m
->match
->insn
));
1575 fprintf (loop_dump_stream
, "forces %d ",
1576 INSN_UID (m
->forces
->insn
));
1579 /* Count movables. Value used in heuristics in strength_reduce. */
1582 /* Ignore the insn if it's already done (it matched something else).
1583 Otherwise, see if it is now safe to move. */
1587 || (1 == invariant_p (m
->set_src
)
1588 && (m
->dependencies
== 0
1589 || 1 == invariant_p (m
->dependencies
))
1591 || 1 == consec_sets_invariant_p (m
->set_dest
,
1594 && (! m
->forces
|| m
->forces
->done
))
1598 int savings
= m
->savings
;
1600 /* We have an insn that is safe to move.
1601 Compute its desirability. */
1606 if (loop_dump_stream
)
1607 fprintf (loop_dump_stream
, "savings %d ", savings
);
1609 if (moved_once
[regno
])
1613 if (loop_dump_stream
)
1614 fprintf (loop_dump_stream
, "halved since already moved ");
1617 /* An insn MUST be moved if we already moved something else
1618 which is safe only if this one is moved too: that is,
1619 if already_moved[REGNO] is nonzero. */
1621 /* An insn is desirable to move if the new lifetime of the
1622 register is no more than THRESHOLD times the old lifetime.
1623 If it's not desirable, it means the loop is so big
1624 that moving won't speed things up much,
1625 and it is liable to make register usage worse. */
1627 /* It is also desirable to move if it can be moved at no
1628 extra cost because something else was already moved. */
1630 if (already_moved
[regno
]
1631 || (threshold
* savings
* m
->lifetime
) >= insn_count
1632 || (m
->forces
&& m
->forces
->done
1633 && n_times_used
[m
->forces
->regno
] == 1))
1636 register struct movable
*m1
;
1639 /* Now move the insns that set the reg. */
1641 if (m
->partial
&& m
->match
)
1645 /* Find the end of this chain of matching regs.
1646 Thus, we load each reg in the chain from that one reg.
1647 And that reg is loaded with 0 directly,
1648 since it has ->match == 0. */
1649 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1650 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1651 SET_DEST (PATTERN (m1
->insn
)));
1652 i1
= emit_insn_before (newpat
, loop_start
);
1654 /* Mark the moved, invariant reg as being allowed to
1655 share a hard reg with the other matching invariant. */
1656 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1657 r1
= SET_DEST (PATTERN (m
->insn
));
1658 r2
= SET_DEST (PATTERN (m1
->insn
));
1659 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1660 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1662 delete_insn (m
->insn
);
1667 if (loop_dump_stream
)
1668 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1670 /* If we are to re-generate the item being moved with a
1671 new move insn, first delete what we have and then emit
1672 the move insn before the loop. */
1673 else if (m
->move_insn
)
1677 for (count
= m
->consec
; count
>= 0; count
--)
1679 /* If this is the first insn of a library call sequence,
1681 if (GET_CODE (p
) != NOTE
1682 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1685 /* If this is the last insn of a libcall sequence, then
1686 delete every insn in the sequence except the last.
1687 The last insn is handled in the normal manner. */
1688 if (GET_CODE (p
) != NOTE
1689 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1691 temp
= XEXP (temp
, 0);
1693 temp
= delete_insn (temp
);
1696 p
= delete_insn (p
);
1697 while (p
&& GET_CODE (p
) == NOTE
)
1702 emit_move_insn (m
->set_dest
, m
->set_src
);
1703 temp
= get_insns ();
1706 add_label_notes (m
->set_src
, temp
);
1708 i1
= emit_insns_before (temp
, loop_start
);
1709 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1711 = gen_rtx (EXPR_LIST
,
1712 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1713 m
->set_src
, REG_NOTES (i1
));
1715 if (loop_dump_stream
)
1716 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1718 /* The more regs we move, the less we like moving them. */
1723 for (count
= m
->consec
; count
>= 0; count
--)
1727 /* If first insn of libcall sequence, skip to end. */
1728 /* Do this at start of loop, since p is guaranteed to
1730 if (GET_CODE (p
) != NOTE
1731 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1734 /* If last insn of libcall sequence, move all
1735 insns except the last before the loop. The last
1736 insn is handled in the normal manner. */
1737 if (GET_CODE (p
) != NOTE
1738 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1742 rtx fn_address_insn
= 0;
1745 for (temp
= XEXP (temp
, 0); temp
!= p
;
1746 temp
= NEXT_INSN (temp
))
1752 if (GET_CODE (temp
) == NOTE
)
1755 body
= PATTERN (temp
);
1757 /* Find the next insn after TEMP,
1758 not counting USE or NOTE insns. */
1759 for (next
= NEXT_INSN (temp
); next
!= p
;
1760 next
= NEXT_INSN (next
))
1761 if (! (GET_CODE (next
) == INSN
1762 && GET_CODE (PATTERN (next
)) == USE
)
1763 && GET_CODE (next
) != NOTE
)
1766 /* If that is the call, this may be the insn
1767 that loads the function address.
1769 Extract the function address from the insn
1770 that loads it into a register.
1771 If this insn was cse'd, we get incorrect code.
1773 So emit a new move insn that copies the
1774 function address into the register that the
1775 call insn will use. flow.c will delete any
1776 redundant stores that we have created. */
1777 if (GET_CODE (next
) == CALL_INSN
1778 && GET_CODE (body
) == SET
1779 && GET_CODE (SET_DEST (body
)) == REG
1780 && (n
= find_reg_note (temp
, REG_EQUAL
,
1783 fn_reg
= SET_SRC (body
);
1784 if (GET_CODE (fn_reg
) != REG
)
1785 fn_reg
= SET_DEST (body
);
1786 fn_address
= XEXP (n
, 0);
1787 fn_address_insn
= temp
;
1789 /* We have the call insn.
1790 If it uses the register we suspect it might,
1791 load it with the correct address directly. */
1792 if (GET_CODE (temp
) == CALL_INSN
1794 && reg_referenced_p (fn_reg
, body
))
1795 emit_insn_after (gen_move_insn (fn_reg
,
1799 if (GET_CODE (temp
) == CALL_INSN
)
1801 i1
= emit_call_insn_before (body
, loop_start
);
1802 /* Because the USAGE information potentially
1803 contains objects other than hard registers
1804 we need to copy it. */
1805 if (CALL_INSN_FUNCTION_USAGE (temp
))
1806 CALL_INSN_FUNCTION_USAGE (i1
) =
1807 copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1810 i1
= emit_insn_before (body
, loop_start
);
1813 if (temp
== fn_address_insn
)
1814 fn_address_insn
= i1
;
1815 REG_NOTES (i1
) = REG_NOTES (temp
);
1819 if (m
->savemode
!= VOIDmode
)
1821 /* P sets REG to zero; but we should clear only
1822 the bits that are not covered by the mode
1824 rtx reg
= m
->set_dest
;
1830 (GET_MODE (reg
), and_optab
, reg
,
1831 GEN_INT ((((HOST_WIDE_INT
) 1
1832 << GET_MODE_BITSIZE (m
->savemode
)))
1834 reg
, 1, OPTAB_LIB_WIDEN
);
1838 emit_move_insn (reg
, tem
);
1839 sequence
= gen_sequence ();
1841 i1
= emit_insn_before (sequence
, loop_start
);
1843 else if (GET_CODE (p
) == CALL_INSN
)
1845 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1846 /* Because the USAGE information potentially
1847 contains objects other than hard registers
1848 we need to copy it. */
1849 if (CALL_INSN_FUNCTION_USAGE (p
))
1850 CALL_INSN_FUNCTION_USAGE (i1
) =
1851 copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1854 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1856 REG_NOTES (i1
) = REG_NOTES (p
);
1858 /* If there is a REG_EQUAL note present whose value is
1859 not loop invariant, then delete it, since it may
1860 cause problems with later optimization passes.
1861 It is possible for cse to create such notes
1862 like this as a result of record_jump_cond. */
1864 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1865 && ! invariant_p (XEXP (temp
, 0)))
1866 remove_note (i1
, temp
);
1871 if (loop_dump_stream
)
1872 fprintf (loop_dump_stream
, " moved to %d",
1876 /* This isn't needed because REG_NOTES is copied
1877 below and is wrong since P might be a PARALLEL. */
1878 if (REG_NOTES (i1
) == 0
1879 && ! m
->partial
/* But not if it's a zero-extend clr. */
1880 && ! m
->global
/* and not if used outside the loop
1881 (since it might get set outside). */
1882 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1884 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1885 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1888 /* If library call, now fix the REG_NOTES that contain
1889 insn pointers, namely REG_LIBCALL on FIRST
1890 and REG_RETVAL on I1. */
1891 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1893 XEXP (temp
, 0) = first
;
1894 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1895 XEXP (temp
, 0) = i1
;
1899 do p
= NEXT_INSN (p
);
1900 while (p
&& GET_CODE (p
) == NOTE
);
1903 /* The more regs we move, the less we like moving them. */
1907 /* Any other movable that loads the same register
1909 already_moved
[regno
] = 1;
1911 /* This reg has been moved out of one loop. */
1912 moved_once
[regno
] = 1;
1914 /* The reg set here is now invariant. */
1916 n_times_set
[regno
] = 0;
1920 /* Change the length-of-life info for the register
1921 to say it lives at least the full length of this loop.
1922 This will help guide optimizations in outer loops. */
1924 if (uid_luid
[regno_first_uid
[regno
]] > INSN_LUID (loop_start
))
1925 /* This is the old insn before all the moved insns.
1926 We can't use the moved insn because it is out of range
1927 in uid_luid. Only the old insns have luids. */
1928 regno_first_uid
[regno
] = INSN_UID (loop_start
);
1929 if (uid_luid
[regno_last_uid
[regno
]] < INSN_LUID (end
))
1930 regno_last_uid
[regno
] = INSN_UID (end
);
1932 /* Combine with this moved insn any other matching movables. */
1935 for (m1
= movables
; m1
; m1
= m1
->next
)
1940 /* Schedule the reg loaded by M1
1941 for replacement so that shares the reg of M.
1942 If the modes differ (only possible in restricted
1943 circumstances, make a SUBREG. */
1944 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
1945 reg_map
[m1
->regno
] = m
->set_dest
;
1948 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
1951 /* Get rid of the matching insn
1952 and prevent further processing of it. */
1955 /* if library call, delete all insn except last, which
1957 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
1960 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
1961 temp
= NEXT_INSN (temp
))
1964 delete_insn (m1
->insn
);
1966 /* Any other movable that loads the same register
1968 already_moved
[m1
->regno
] = 1;
1970 /* The reg merged here is now invariant,
1971 if the reg it matches is invariant. */
1973 n_times_set
[m1
->regno
] = 0;
1976 else if (loop_dump_stream
)
1977 fprintf (loop_dump_stream
, "not desirable");
1979 else if (loop_dump_stream
&& !m
->match
)
1980 fprintf (loop_dump_stream
, "not safe");
1982 if (loop_dump_stream
)
1983 fprintf (loop_dump_stream
, "\n");
1987 new_start
= loop_start
;
1989 /* Go through all the instructions in the loop, making
1990 all the register substitutions scheduled in REG_MAP. */
1991 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
1992 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1993 || GET_CODE (p
) == CALL_INSN
)
1995 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
1996 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2002 /* Scan X and replace the address of any MEM in it with ADDR.
2003 REG is the address that MEM should have before the replacement. */
2006 replace_call_address (x
, reg
, addr
)
2009 register enum rtx_code code
;
2015 code
= GET_CODE (x
);
2029 /* Short cut for very common case. */
2030 replace_call_address (XEXP (x
, 1), reg
, addr
);
2034 /* Short cut for very common case. */
2035 replace_call_address (XEXP (x
, 0), reg
, addr
);
2039 /* If this MEM uses a reg other than the one we expected,
2040 something is wrong. */
2041 if (XEXP (x
, 0) != reg
)
2047 fmt
= GET_RTX_FORMAT (code
);
2048 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2051 replace_call_address (XEXP (x
, i
), reg
, addr
);
2055 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2056 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2062 /* Return the number of memory refs to addresses that vary
2066 count_nonfixed_reads (x
)
2069 register enum rtx_code code
;
2077 code
= GET_CODE (x
);
2091 return ((invariant_p (XEXP (x
, 0)) != 1)
2092 + count_nonfixed_reads (XEXP (x
, 0)));
2096 fmt
= GET_RTX_FORMAT (code
);
2097 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2100 value
+= count_nonfixed_reads (XEXP (x
, i
));
2104 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2105 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2113 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2114 Replace it with an instruction to load just the low bytes
2115 if the machine supports such an instruction,
2116 and insert above LOOP_START an instruction to clear the register. */
2119 constant_high_bytes (p
, loop_start
)
2123 register int insn_code_number
;
2125 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2126 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2128 new = gen_rtx (SET
, VOIDmode
,
2129 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2130 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2131 SET_DEST (PATTERN (p
)),
2133 XEXP (SET_SRC (PATTERN (p
)), 0));
2134 insn_code_number
= recog (new, p
);
2136 if (insn_code_number
)
2140 /* Clear destination register before the loop. */
2141 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2142 SET_DEST (PATTERN (p
)),
2146 /* Inside the loop, just load the low part. */
2152 /* Scan a loop setting the variables `unknown_address_altered',
2153 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2154 and `loop_has_volatile'.
2155 Also, fill in the array `loop_store_mems'. */
2158 prescan_loop (start
, end
)
2161 register int level
= 1;
2164 unknown_address_altered
= 0;
2166 loop_has_volatile
= 0;
2167 loop_store_mems_idx
= 0;
2173 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2174 insn
= NEXT_INSN (insn
))
2176 if (GET_CODE (insn
) == NOTE
)
2178 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2181 /* Count number of loops contained in this one. */
2184 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2193 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2196 loop_continue
= insn
;
2199 else if (GET_CODE (insn
) == CALL_INSN
)
2201 unknown_address_altered
= 1;
2206 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2208 if (volatile_refs_p (PATTERN (insn
)))
2209 loop_has_volatile
= 1;
2211 note_stores (PATTERN (insn
), note_addr_stored
);
2217 /* Scan the function looking for loops. Record the start and end of each loop.
2218 Also mark as invalid loops any loops that contain a setjmp or are branched
2219 to from outside the loop. */
2222 find_and_verify_loops (f
)
2226 int current_loop
= -1;
2230 /* If there are jumps to undefined labels,
2231 treat them as jumps out of any/all loops.
2232 This also avoids writing past end of tables when there are no loops. */
2233 uid_loop_num
[0] = -1;
2235 /* Find boundaries of loops, mark which loops are contained within
2236 loops, and invalidate loops that have setjmp. */
2238 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2240 if (GET_CODE (insn
) == NOTE
)
2241 switch (NOTE_LINE_NUMBER (insn
))
2243 case NOTE_INSN_LOOP_BEG
:
2244 loop_number_loop_starts
[++next_loop
] = insn
;
2245 loop_number_loop_ends
[next_loop
] = 0;
2246 loop_outer_loop
[next_loop
] = current_loop
;
2247 loop_invalid
[next_loop
] = 0;
2248 loop_number_exit_labels
[next_loop
] = 0;
2249 loop_number_exit_count
[next_loop
] = 0;
2250 current_loop
= next_loop
;
2253 case NOTE_INSN_SETJMP
:
2254 /* In this case, we must invalidate our current loop and any
2256 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2258 loop_invalid
[loop
] = 1;
2259 if (loop_dump_stream
)
2260 fprintf (loop_dump_stream
,
2261 "\nLoop at %d ignored due to setjmp.\n",
2262 INSN_UID (loop_number_loop_starts
[loop
]));
2266 case NOTE_INSN_LOOP_END
:
2267 if (current_loop
== -1)
2270 loop_number_loop_ends
[current_loop
] = insn
;
2271 current_loop
= loop_outer_loop
[current_loop
];
2276 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2277 enclosing loop, but this doesn't matter. */
2278 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2281 /* Any loop containing a label used in an initializer must be invalidated,
2282 because it can be jumped into from anywhere. */
2284 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2288 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2290 loop_num
= loop_outer_loop
[loop_num
])
2291 loop_invalid
[loop_num
] = 1;
2294 /* Any loop containing a label used for an exception handler must be
2295 invalidated, because it can be jumped into from anywhere. */
2297 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2301 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2303 loop_num
= loop_outer_loop
[loop_num
])
2304 loop_invalid
[loop_num
] = 1;
2307 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2308 loop that it is not contained within, that loop is marked invalid.
2309 If any INSN or CALL_INSN uses a label's address, then the loop containing
2310 that label is marked invalid, because it could be jumped into from
2313 Also look for blocks of code ending in an unconditional branch that
2314 exits the loop. If such a block is surrounded by a conditional
2315 branch around the block, move the block elsewhere (see below) and
2316 invert the jump to point to the code block. This may eliminate a
2317 label in our loop and will simplify processing by both us and a
2318 possible second cse pass. */
2320 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2321 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2323 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2325 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2327 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2332 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2334 loop_num
= loop_outer_loop
[loop_num
])
2335 loop_invalid
[loop_num
] = 1;
2339 if (GET_CODE (insn
) != JUMP_INSN
)
2342 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2344 /* See if this is an unconditional branch outside the loop. */
2345 if (this_loop_num
!= -1
2346 && (GET_CODE (PATTERN (insn
)) == RETURN
2347 || (simplejump_p (insn
)
2348 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2350 && get_max_uid () < max_uid_for_loop
)
2353 rtx our_next
= next_real_insn (insn
);
2355 int outer_loop
= -1;
2357 /* Go backwards until we reach the start of the loop, a label,
2359 for (p
= PREV_INSN (insn
);
2360 GET_CODE (p
) != CODE_LABEL
2361 && ! (GET_CODE (p
) == NOTE
2362 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2363 && GET_CODE (p
) != JUMP_INSN
;
2367 /* Check for the case where we have a jump to an inner nested
2368 loop, and do not perform the optimization in that case. */
2370 if (JUMP_LABEL (insn
))
2372 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2373 if (dest_loop
!= -1)
2375 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2376 outer_loop
= loop_outer_loop
[outer_loop
])
2377 if (outer_loop
== this_loop_num
)
2382 /* Make sure that the target of P is within the current loop. */
2384 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2385 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2386 outer_loop
= this_loop_num
;
2388 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2389 we have a block of code to try to move.
2391 We look backward and then forward from the target of INSN
2392 to find a BARRIER at the same loop depth as the target.
2393 If we find such a BARRIER, we make a new label for the start
2394 of the block, invert the jump in P and point it to that label,
2395 and move the block of code to the spot we found. */
2397 if (outer_loop
== -1
2398 && GET_CODE (p
) == JUMP_INSN
2399 && JUMP_LABEL (p
) != 0
2400 /* Just ignore jumps to labels that were never emitted.
2401 These always indicate compilation errors. */
2402 && INSN_UID (JUMP_LABEL (p
)) != 0
2404 && ! simplejump_p (p
)
2405 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2408 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2409 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2412 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2413 if (GET_CODE (loc
) == BARRIER
2414 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2418 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2419 if (GET_CODE (loc
) == BARRIER
2420 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2425 rtx cond_label
= JUMP_LABEL (p
);
2426 rtx new_label
= get_label_after (p
);
2428 /* Ensure our label doesn't go away. */
2429 LABEL_NUSES (cond_label
)++;
2431 /* Verify that uid_loop_num is large enough and that
2433 if (invert_jump (p
, new_label
))
2437 /* Include the BARRIER after INSN and copy the
2439 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2440 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2442 /* All those insns are now in TARGET_LOOP_NUM. */
2443 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2445 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2447 /* The label jumped to by INSN is no longer a loop exit.
2448 Unless INSN does not have a label (e.g., it is a
2449 RETURN insn), search loop_number_exit_labels to find
2450 its label_ref, and remove it. Also turn off
2451 LABEL_OUTSIDE_LOOP_P bit. */
2452 if (JUMP_LABEL (insn
))
2457 r
= loop_number_exit_labels
[this_loop_num
];
2458 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2459 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2461 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2463 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2465 loop_number_exit_labels
[this_loop_num
]
2466 = LABEL_NEXTREF (r
);
2470 for (loop_num
= this_loop_num
;
2471 loop_num
!= -1 && loop_num
!= target_loop_num
;
2472 loop_num
= loop_outer_loop
[loop_num
])
2473 loop_number_exit_count
[loop_num
]--;
2475 /* If we didn't find it, then something is wrong. */
2480 /* P is now a jump outside the loop, so it must be put
2481 in loop_number_exit_labels, and marked as such.
2482 The easiest way to do this is to just call
2483 mark_loop_jump again for P. */
2484 mark_loop_jump (PATTERN (p
), this_loop_num
);
2486 /* If INSN now jumps to the insn after it,
2488 if (JUMP_LABEL (insn
) != 0
2489 && (next_real_insn (JUMP_LABEL (insn
))
2490 == next_real_insn (insn
)))
2494 /* Continue the loop after where the conditional
2495 branch used to jump, since the only branch insn
2496 in the block (if it still remains) is an inter-loop
2497 branch and hence needs no processing. */
2498 insn
= NEXT_INSN (cond_label
);
2500 if (--LABEL_NUSES (cond_label
) == 0)
2501 delete_insn (cond_label
);
2503 /* This loop will be continued with NEXT_INSN (insn). */
2504 insn
= PREV_INSN (insn
);
2511 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2512 loops it is contained in, mark the target loop invalid.
2514 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2517 mark_loop_jump (x
, loop_num
)
2525 switch (GET_CODE (x
))
2538 /* There could be a label reference in here. */
2539 mark_loop_jump (XEXP (x
, 0), loop_num
);
2545 mark_loop_jump (XEXP (x
, 0), loop_num
);
2546 mark_loop_jump (XEXP (x
, 1), loop_num
);
2551 mark_loop_jump (XEXP (x
, 0), loop_num
);
2555 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2557 /* Link together all labels that branch outside the loop. This
2558 is used by final_[bg]iv_value and the loop unrolling code. Also
2559 mark this LABEL_REF so we know that this branch should predict
2562 /* A check to make sure the label is not in an inner nested loop,
2563 since this does not count as a loop exit. */
2564 if (dest_loop
!= -1)
2566 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2567 outer_loop
= loop_outer_loop
[outer_loop
])
2568 if (outer_loop
== loop_num
)
2574 if (loop_num
!= -1 && outer_loop
== -1)
2576 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2577 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2578 loop_number_exit_labels
[loop_num
] = x
;
2580 for (outer_loop
= loop_num
;
2581 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2582 outer_loop
= loop_outer_loop
[outer_loop
])
2583 loop_number_exit_count
[outer_loop
]++;
2586 /* If this is inside a loop, but not in the current loop or one enclosed
2587 by it, it invalidates at least one loop. */
2589 if (dest_loop
== -1)
2592 /* We must invalidate every nested loop containing the target of this
2593 label, except those that also contain the jump insn. */
2595 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2597 /* Stop when we reach a loop that also contains the jump insn. */
2598 for (outer_loop
= loop_num
; outer_loop
!= -1;
2599 outer_loop
= loop_outer_loop
[outer_loop
])
2600 if (dest_loop
== outer_loop
)
2603 /* If we get here, we know we need to invalidate a loop. */
2604 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2605 fprintf (loop_dump_stream
,
2606 "\nLoop at %d ignored due to multiple entry points.\n",
2607 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2609 loop_invalid
[dest_loop
] = 1;
2614 /* If this is not setting pc, ignore. */
2615 if (SET_DEST (x
) == pc_rtx
)
2616 mark_loop_jump (SET_SRC (x
), loop_num
);
2620 mark_loop_jump (XEXP (x
, 1), loop_num
);
2621 mark_loop_jump (XEXP (x
, 2), loop_num
);
2626 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2627 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2631 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2632 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2636 /* Treat anything else (such as a symbol_ref)
2637 as a branch out of this loop, but not into any loop. */
2641 loop_number_exit_labels
[loop_num
] = x
;
2643 for (outer_loop
= loop_num
; outer_loop
!= -1;
2644 outer_loop
= loop_outer_loop
[outer_loop
])
2645 loop_number_exit_count
[outer_loop
]++;
2651 /* Return nonzero if there is a label in the range from
2652 insn INSN to and including the insn whose luid is END
2653 INSN must have an assigned luid (i.e., it must not have
2654 been previously created by loop.c). */
2657 labels_in_range_p (insn
, end
)
2661 while (insn
&& INSN_LUID (insn
) <= end
)
2663 if (GET_CODE (insn
) == CODE_LABEL
)
2665 insn
= NEXT_INSN (insn
);
2671 /* Record that a memory reference X is being set. */
2674 note_addr_stored (x
)
2679 if (x
== 0 || GET_CODE (x
) != MEM
)
2682 /* Count number of memory writes.
2683 This affects heuristics in strength_reduce. */
2686 /* BLKmode MEM means all memory is clobbered. */
2687 if (GET_MODE (x
) == BLKmode
)
2688 unknown_address_altered
= 1;
2690 if (unknown_address_altered
)
2693 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2694 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2695 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2697 /* We are storing at the same address as previously noted. Save the
2699 if (GET_MODE_SIZE (GET_MODE (x
))
2700 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2701 loop_store_mems
[i
] = x
;
2705 if (i
== NUM_STORES
)
2706 unknown_address_altered
= 1;
2708 else if (i
== loop_store_mems_idx
)
2709 loop_store_mems
[loop_store_mems_idx
++] = x
;
2712 /* Return nonzero if the rtx X is invariant over the current loop.
2714 The value is 2 if we refer to something only conditionally invariant.
2716 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2717 Otherwise, a memory ref is invariant if it does not conflict with
2718 anything stored in `loop_store_mems'. */
2725 register enum rtx_code code
;
2727 int conditional
= 0;
2731 code
= GET_CODE (x
);
2741 /* A LABEL_REF is normally invariant, however, if we are unrolling
2742 loops, and this label is inside the loop, then it isn't invariant.
2743 This is because each unrolled copy of the loop body will have
2744 a copy of this label. If this was invariant, then an insn loading
2745 the address of this label into a register might get moved outside
2746 the loop, and then each loop body would end up using the same label.
2748 We don't know the loop bounds here though, so just fail for all
2750 if (flag_unroll_loops
)
2757 case UNSPEC_VOLATILE
:
2761 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2762 since the reg might be set by initialization within the loop. */
2763 if (x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2764 || x
== arg_pointer_rtx
)
2767 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2769 if (n_times_set
[REGNO (x
)] < 0)
2771 return n_times_set
[REGNO (x
)] == 0;
2774 /* Volatile memory references must be rejected. Do this before
2775 checking for read-only items, so that volatile read-only items
2776 will be rejected also. */
2777 if (MEM_VOLATILE_P (x
))
2780 /* Read-only items (such as constants in a constant pool) are
2781 invariant if their address is. */
2782 if (RTX_UNCHANGING_P (x
))
2785 /* If we filled the table (or had a subroutine call), any location
2786 in memory could have been clobbered. */
2787 if (unknown_address_altered
)
2790 /* See if there is any dependence between a store and this load. */
2791 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2792 if (true_dependence (loop_store_mems
[i
], x
))
2795 /* It's not invalidated by a store in memory
2796 but we must still verify the address is invariant. */
2800 /* Don't mess with insns declared volatile. */
2801 if (MEM_VOLATILE_P (x
))
2805 fmt
= GET_RTX_FORMAT (code
);
2806 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2810 int tem
= invariant_p (XEXP (x
, i
));
2816 else if (fmt
[i
] == 'E')
2819 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2821 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2831 return 1 + conditional
;
2835 /* Return nonzero if all the insns in the loop that set REG
2836 are INSN and the immediately following insns,
2837 and if each of those insns sets REG in an invariant way
2838 (not counting uses of REG in them).
2840 The value is 2 if some of these insns are only conditionally invariant.
2842 We assume that INSN itself is the first set of REG
2843 and that its source is invariant. */
2846 consec_sets_invariant_p (reg
, n_sets
, insn
)
2850 register rtx p
= insn
;
2851 register int regno
= REGNO (reg
);
2853 /* Number of sets we have to insist on finding after INSN. */
2854 int count
= n_sets
- 1;
2855 int old
= n_times_set
[regno
];
2859 /* If N_SETS hit the limit, we can't rely on its value. */
2863 n_times_set
[regno
] = 0;
2867 register enum rtx_code code
;
2871 code
= GET_CODE (p
);
2873 /* If library call, skip to end of of it. */
2874 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2879 && (set
= single_set (p
))
2880 && GET_CODE (SET_DEST (set
)) == REG
2881 && REGNO (SET_DEST (set
)) == regno
)
2883 this = invariant_p (SET_SRC (set
));
2886 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2888 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2889 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2891 this = (CONSTANT_P (XEXP (temp
, 0))
2892 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
2893 && invariant_p (XEXP (temp
, 0))));
2900 else if (code
!= NOTE
)
2902 n_times_set
[regno
] = old
;
2907 n_times_set
[regno
] = old
;
2908 /* If invariant_p ever returned 2, we return 2. */
2909 return 1 + (value
& 2);
2913 /* I don't think this condition is sufficient to allow INSN
2914 to be moved, so we no longer test it. */
2916 /* Return 1 if all insns in the basic block of INSN and following INSN
2917 that set REG are invariant according to TABLE. */
2920 all_sets_invariant_p (reg
, insn
, table
)
2924 register rtx p
= insn
;
2925 register int regno
= REGNO (reg
);
2929 register enum rtx_code code
;
2931 code
= GET_CODE (p
);
2932 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
2934 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
2935 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
2936 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
2938 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
2945 /* Look at all uses (not sets) of registers in X. For each, if it is
2946 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
2947 a different insn, set USAGE[REGNO] to const0_rtx. */
2950 find_single_use_in_loop (insn
, x
, usage
)
2955 enum rtx_code code
= GET_CODE (x
);
2956 char *fmt
= GET_RTX_FORMAT (code
);
2961 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
2962 ? const0_rtx
: insn
;
2964 else if (code
== SET
)
2966 /* Don't count SET_DEST if it is a REG; otherwise count things
2967 in SET_DEST because if a register is partially modified, it won't
2968 show up as a potential movable so we don't care how USAGE is set
2970 if (GET_CODE (SET_DEST (x
)) != REG
)
2971 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
2972 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
2975 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2977 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
2978 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
2979 else if (fmt
[i
] == 'E')
2980 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2981 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
2985 /* Increment N_TIMES_SET at the index of each register
2986 that is modified by an insn between FROM and TO.
2987 If the value of an element of N_TIMES_SET becomes 127 or more,
2988 stop incrementing it, to avoid overflow.
2990 Store in SINGLE_USAGE[I] the single insn in which register I is
2991 used, if it is only used once. Otherwise, it is set to 0 (for no
2992 uses) or const0_rtx for more than one use. This parameter may be zero,
2993 in which case this processing is not done.
2995 Store in *COUNT_PTR the number of actual instruction
2996 in the loop. We use this to decide what is worth moving out. */
2998 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
2999 In that case, it is the insn that last set reg n. */
3002 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3003 register rtx from
, to
;
3009 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3011 register int count
= 0;
3014 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3015 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3017 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3021 /* If requested, record registers that have exactly one use. */
3024 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3026 /* Include uses in REG_EQUAL notes. */
3027 if (REG_NOTES (insn
))
3028 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3031 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3032 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3033 /* Don't move a reg that has an explicit clobber.
3034 We might do so sometimes, but it's not worth the pain. */
3035 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3037 if (GET_CODE (PATTERN (insn
)) == SET
3038 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3040 dest
= SET_DEST (PATTERN (insn
));
3041 while (GET_CODE (dest
) == SUBREG
3042 || GET_CODE (dest
) == ZERO_EXTRACT
3043 || GET_CODE (dest
) == SIGN_EXTRACT
3044 || GET_CODE (dest
) == STRICT_LOW_PART
)
3045 dest
= XEXP (dest
, 0);
3046 if (GET_CODE (dest
) == REG
)
3048 register int regno
= REGNO (dest
);
3049 /* If this is the first setting of this reg
3050 in current basic block, and it was set before,
3051 it must be set in two basic blocks, so it cannot
3052 be moved out of the loop. */
3053 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3054 may_not_move
[regno
] = 1;
3055 /* If this is not first setting in current basic block,
3056 see if reg was used in between previous one and this.
3057 If so, neither one can be moved. */
3058 if (last_set
[regno
] != 0
3059 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3060 may_not_move
[regno
] = 1;
3061 if (n_times_set
[regno
] < 127)
3062 ++n_times_set
[regno
];
3063 last_set
[regno
] = insn
;
3066 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3069 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3071 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3072 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3073 /* Don't move a reg that has an explicit clobber.
3074 It's not worth the pain to try to do it correctly. */
3075 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3077 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3079 dest
= SET_DEST (x
);
3080 while (GET_CODE (dest
) == SUBREG
3081 || GET_CODE (dest
) == ZERO_EXTRACT
3082 || GET_CODE (dest
) == SIGN_EXTRACT
3083 || GET_CODE (dest
) == STRICT_LOW_PART
)
3084 dest
= XEXP (dest
, 0);
3085 if (GET_CODE (dest
) == REG
)
3087 register int regno
= REGNO (dest
);
3088 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3089 may_not_move
[regno
] = 1;
3090 if (last_set
[regno
] != 0
3091 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3092 may_not_move
[regno
] = 1;
3093 if (n_times_set
[regno
] < 127)
3094 ++n_times_set
[regno
];
3095 last_set
[regno
] = insn
;
3102 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3103 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3108 /* Given a loop that is bounded by LOOP_START and LOOP_END
3109 and that is entered at SCAN_START,
3110 return 1 if the register set in SET contained in insn INSN is used by
3111 any insn that precedes INSN in cyclic order starting
3112 from the loop entry point.
3114 We don't want to use INSN_LUID here because if we restrict INSN to those
3115 that have a valid INSN_LUID, it means we cannot move an invariant out
3116 from an inner loop past two loops. */
3119 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3120 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3122 rtx reg
= SET_DEST (set
);
3125 /* Scan forward checking for register usage. If we hit INSN, we
3126 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3127 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3129 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3130 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3140 /* A "basic induction variable" or biv is a pseudo reg that is set
3141 (within this loop) only by incrementing or decrementing it. */
3142 /* A "general induction variable" or giv is a pseudo reg whose
3143 value is a linear function of a biv. */
3145 /* Bivs are recognized by `basic_induction_var';
3146 Givs by `general_induct_var'. */
3148 /* Indexed by register number, indicates whether or not register is an
3149 induction variable, and if so what type. */
3151 enum iv_mode
*reg_iv_type
;
3153 /* Indexed by register number, contains pointer to `struct induction'
3154 if register is an induction variable. This holds general info for
3155 all induction variables. */
3157 struct induction
**reg_iv_info
;
3159 /* Indexed by register number, contains pointer to `struct iv_class'
3160 if register is a basic induction variable. This holds info describing
3161 the class (a related group) of induction variables that the biv belongs
3164 struct iv_class
**reg_biv_class
;
3166 /* The head of a list which links together (via the next field)
3167 every iv class for the current loop. */
3169 struct iv_class
*loop_iv_list
;
3171 /* Communication with routines called via `note_stores'. */
3173 static rtx note_insn
;
3175 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3177 static rtx addr_placeholder
;
3179 /* ??? Unfinished optimizations, and possible future optimizations,
3180 for the strength reduction code. */
3182 /* ??? There is one more optimization you might be interested in doing: to
3183 allocate pseudo registers for frequently-accessed memory locations.
3184 If the same memory location is referenced each time around, it might
3185 be possible to copy it into a register before and out after.
3186 This is especially useful when the memory location is a variable which
3187 is in a stack slot because somewhere its address is taken. If the
3188 loop doesn't contain a function call and the variable isn't volatile,
3189 it is safe to keep the value in a register for the duration of the
3190 loop. One tricky thing is that the copying of the value back from the
3191 register has to be done on all exits from the loop. You need to check that
3192 all the exits from the loop go to the same place. */
3194 /* ??? The interaction of biv elimination, and recognition of 'constant'
3195 bivs, may cause problems. */
3197 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3198 performance problems.
3200 Perhaps don't eliminate things that can be combined with an addressing
3201 mode. Find all givs that have the same biv, mult_val, and add_val;
3202 then for each giv, check to see if its only use dies in a following
3203 memory address. If so, generate a new memory address and check to see
3204 if it is valid. If it is valid, then store the modified memory address,
3205 otherwise, mark the giv as not done so that it will get its own iv. */
3207 /* ??? Could try to optimize branches when it is known that a biv is always
3210 /* ??? When replace a biv in a compare insn, we should replace with closest
3211 giv so that an optimized branch can still be recognized by the combiner,
3212 e.g. the VAX acb insn. */
3214 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3215 was rerun in loop_optimize whenever a register was added or moved.
3216 Also, some of the optimizations could be a little less conservative. */
3218 /* Perform strength reduction and induction variable elimination. */
3220 /* Pseudo registers created during this function will be beyond the last
3221 valid index in several tables including n_times_set and regno_last_uid.
3222 This does not cause a problem here, because the added registers cannot be
3223 givs outside of their loop, and hence will never be reconsidered.
3224 But scan_loop must check regnos to make sure they are in bounds. */
3227 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3228 loop_start
, loop_end
)
3241 /* This is 1 if current insn is not executed at least once for every loop
3243 int not_every_iteration
= 0;
3244 /* This is 1 if current insn may be executed more than once for every
3246 int maybe_multiple
= 0;
3247 /* Temporary list pointers for traversing loop_iv_list. */
3248 struct iv_class
*bl
, **backbl
;
3249 /* Ratio of extra register life span we can justify
3250 for saving an instruction. More if loop doesn't call subroutines
3251 since in that case saving an insn makes more difference
3252 and more registers are available. */
3253 /* ??? could set this to last value of threshold in move_movables */
3254 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3255 /* Map of pseudo-register replacements. */
3259 rtx end_insert_before
;
3262 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3263 * sizeof (enum iv_mode
*));
3264 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3265 reg_iv_info
= (struct induction
**)
3266 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3267 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3268 * sizeof (struct induction
*)));
3269 reg_biv_class
= (struct iv_class
**)
3270 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3271 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3272 * sizeof (struct iv_class
*)));
3275 addr_placeholder
= gen_reg_rtx (Pmode
);
3277 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3278 must be put before this insn, so that they will appear in the right
3279 order (i.e. loop order).
3281 If loop_end is the end of the current function, then emit a
3282 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3284 if (NEXT_INSN (loop_end
) != 0)
3285 end_insert_before
= NEXT_INSN (loop_end
);
3287 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3289 /* Scan through loop to find all possible bivs. */
3295 /* At end of a straight-in loop, we are done.
3296 At end of a loop entered at the bottom, scan the top. */
3297 if (p
== scan_start
)
3305 if (p
== scan_start
)
3309 if (GET_CODE (p
) == INSN
3310 && (set
= single_set (p
))
3311 && GET_CODE (SET_DEST (set
)) == REG
)
3313 dest_reg
= SET_DEST (set
);
3314 if (REGNO (dest_reg
) < max_reg_before_loop
3315 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3316 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3318 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3319 dest_reg
, p
, &inc_val
, &mult_val
))
3321 /* It is a possible basic induction variable.
3322 Create and initialize an induction structure for it. */
3325 = (struct induction
*) alloca (sizeof (struct induction
));
3327 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3328 not_every_iteration
, maybe_multiple
);
3329 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3331 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3332 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3336 /* Past CODE_LABEL, we get to insns that may be executed multiple
3337 times. The only way we can be sure that they can't is if every
3338 every jump insn between here and the end of the loop either
3339 returns, exits the loop, is a forward jump, or is a jump
3340 to the loop start. */
3342 if (GET_CODE (p
) == CODE_LABEL
)
3350 insn
= NEXT_INSN (insn
);
3351 if (insn
== scan_start
)
3359 if (insn
== scan_start
)
3363 if (GET_CODE (insn
) == JUMP_INSN
3364 && GET_CODE (PATTERN (insn
)) != RETURN
3365 && (! condjump_p (insn
)
3366 || (JUMP_LABEL (insn
) != 0
3367 && JUMP_LABEL (insn
) != scan_start
3368 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3369 || INSN_UID (insn
) >= max_uid_for_loop
3370 || (INSN_LUID (JUMP_LABEL (insn
))
3371 < INSN_LUID (insn
))))))
3379 /* Past a jump, we get to insns for which we can't count
3380 on whether they will be executed during each iteration. */
3381 /* This code appears twice in strength_reduce. There is also similar
3382 code in scan_loop. */
3383 if (GET_CODE (p
) == JUMP_INSN
3384 /* If we enter the loop in the middle, and scan around to the
3385 beginning, don't set not_every_iteration for that.
3386 This can be any kind of jump, since we want to know if insns
3387 will be executed if the loop is executed. */
3388 && ! (JUMP_LABEL (p
) == loop_top
3389 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3390 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3394 /* If this is a jump outside the loop, then it also doesn't
3395 matter. Check to see if the target of this branch is on the
3396 loop_number_exits_labels list. */
3398 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3400 label
= LABEL_NEXTREF (label
))
3401 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3405 not_every_iteration
= 1;
3408 else if (GET_CODE (p
) == NOTE
)
3410 /* At the virtual top of a converted loop, insns are again known to
3411 be executed each iteration: logically, the loop begins here
3412 even though the exit code has been duplicated. */
3413 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3414 not_every_iteration
= 0;
3415 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3417 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3421 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3422 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3423 or not an insn is known to be executed each iteration of the
3424 loop, whether or not any iterations are known to occur.
3426 Therefore, if we have just passed a label and have no more labels
3427 between here and the test insn of the loop, we know these insns
3428 will be executed each iteration. */
3430 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3431 && no_labels_between_p (p
, loop_end
))
3432 not_every_iteration
= 0;
3435 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3436 Make a sanity check against n_times_set. */
3437 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3439 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3440 /* Above happens if register modified by subreg, etc. */
3441 /* Make sure it is not recognized as a basic induction var: */
3442 || n_times_set
[bl
->regno
] != bl
->biv_count
3443 /* If never incremented, it is invariant that we decided not to
3444 move. So leave it alone. */
3445 || ! bl
->incremented
)
3447 if (loop_dump_stream
)
3448 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3450 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3451 ? "not induction variable"
3452 : (! bl
->incremented
? "never incremented"
3455 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3462 if (loop_dump_stream
)
3463 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3467 /* Exit if there are no bivs. */
3470 /* Can still unroll the loop anyways, but indicate that there is no
3471 strength reduction info available. */
3472 if (flag_unroll_loops
)
3473 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3478 /* Find initial value for each biv by searching backwards from loop_start,
3479 halting at first label. Also record any test condition. */
3482 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3486 if (GET_CODE (p
) == CALL_INSN
)
3489 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3490 || GET_CODE (p
) == CALL_INSN
)
3491 note_stores (PATTERN (p
), record_initial
);
3493 /* Record any test of a biv that branches around the loop if no store
3494 between it and the start of loop. We only care about tests with
3495 constants and registers and only certain of those. */
3496 if (GET_CODE (p
) == JUMP_INSN
3497 && JUMP_LABEL (p
) != 0
3498 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3499 && (test
= get_condition_for_loop (p
)) != 0
3500 && GET_CODE (XEXP (test
, 0)) == REG
3501 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3502 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3503 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3504 && bl
->init_insn
== 0)
3506 /* If an NE test, we have an initial value! */
3507 if (GET_CODE (test
) == NE
)
3510 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3511 XEXP (test
, 0), XEXP (test
, 1));
3514 bl
->initial_test
= test
;
3518 /* Look at the each biv and see if we can say anything better about its
3519 initial value from any initializing insns set up above. (This is done
3520 in two passes to avoid missing SETs in a PARALLEL.) */
3521 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3525 if (! bl
->init_insn
)
3528 src
= SET_SRC (bl
->init_set
);
3530 if (loop_dump_stream
)
3531 fprintf (loop_dump_stream
,
3532 "Biv %d initialized at insn %d: initial value ",
3533 bl
->regno
, INSN_UID (bl
->init_insn
));
3535 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3536 || GET_MODE (src
) == VOIDmode
)
3537 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3539 bl
->initial_value
= src
;
3541 if (loop_dump_stream
)
3543 if (GET_CODE (src
) == CONST_INT
)
3544 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3547 print_rtl (loop_dump_stream
, src
);
3548 fprintf (loop_dump_stream
, "\n");
3554 /* Biv initial value is not simple move,
3555 so let it keep initial value of "itself". */
3557 if (loop_dump_stream
)
3558 fprintf (loop_dump_stream
, "is complex\n");
3562 /* Search the loop for general induction variables. */
3564 /* A register is a giv if: it is only set once, it is a function of a
3565 biv and a constant (or invariant), and it is not a biv. */
3567 not_every_iteration
= 0;
3573 /* At end of a straight-in loop, we are done.
3574 At end of a loop entered at the bottom, scan the top. */
3575 if (p
== scan_start
)
3583 if (p
== scan_start
)
3587 /* Look for a general induction variable in a register. */
3588 if (GET_CODE (p
) == INSN
3589 && (set
= single_set (p
))
3590 && GET_CODE (SET_DEST (set
)) == REG
3591 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3599 dest_reg
= SET_DEST (set
);
3600 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3603 if (/* SET_SRC is a giv. */
3604 ((benefit
= general_induction_var (SET_SRC (set
),
3607 /* Equivalent expression is a giv. */
3608 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3609 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3611 &add_val
, &mult_val
))))
3612 /* Don't try to handle any regs made by loop optimization.
3613 We have nothing on them in regno_first_uid, etc. */
3614 && REGNO (dest_reg
) < max_reg_before_loop
3615 /* Don't recognize a BASIC_INDUCT_VAR here. */
3616 && dest_reg
!= src_reg
3617 /* This must be the only place where the register is set. */
3618 && (n_times_set
[REGNO (dest_reg
)] == 1
3619 /* or all sets must be consecutive and make a giv. */
3620 || (benefit
= consec_sets_giv (benefit
, p
,
3622 &add_val
, &mult_val
))))
3626 = (struct induction
*) alloca (sizeof (struct induction
));
3629 /* If this is a library call, increase benefit. */
3630 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3631 benefit
+= libcall_benefit (p
);
3633 /* Skip the consecutive insns, if there are any. */
3634 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3637 /* If first insn of libcall sequence, skip to end.
3638 Do this at start of loop, since INSN is guaranteed to
3640 if (GET_CODE (p
) != NOTE
3641 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3644 do p
= NEXT_INSN (p
);
3645 while (GET_CODE (p
) == NOTE
);
3648 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3649 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3655 #ifndef DONT_REDUCE_ADDR
3656 /* Look for givs which are memory addresses. */
3657 /* This resulted in worse code on a VAX 8600. I wonder if it
3659 if (GET_CODE (p
) == INSN
)
3660 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3664 /* Update the status of whether giv can derive other givs. This can
3665 change when we pass a label or an insn that updates a biv. */
3666 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3667 || GET_CODE (p
) == CODE_LABEL
)
3668 update_giv_derive (p
);
3670 /* Past a jump, we get to insns for which we can't count
3671 on whether they will be executed during each iteration. */
3672 /* This code appears twice in strength_reduce. There is also similar
3673 code in scan_loop. */
3674 if (GET_CODE (p
) == JUMP_INSN
3675 /* If we enter the loop in the middle, and scan around to the
3676 beginning, don't set not_every_iteration for that.
3677 This can be any kind of jump, since we want to know if insns
3678 will be executed if the loop is executed. */
3679 && ! (JUMP_LABEL (p
) == loop_top
3680 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3681 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3685 /* If this is a jump outside the loop, then it also doesn't
3686 matter. Check to see if the target of this branch is on the
3687 loop_number_exits_labels list. */
3689 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3691 label
= LABEL_NEXTREF (label
))
3692 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3696 not_every_iteration
= 1;
3699 else if (GET_CODE (p
) == NOTE
)
3701 /* At the virtual top of a converted loop, insns are again known to
3702 be executed each iteration: logically, the loop begins here
3703 even though the exit code has been duplicated. */
3704 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3705 not_every_iteration
= 0;
3706 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3708 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3712 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3713 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3714 or not an insn is known to be executed each iteration of the
3715 loop, whether or not any iterations are known to occur.
3717 Therefore, if we have just passed a label and have no more labels
3718 between here and the test insn of the loop, we know these insns
3719 will be executed each iteration. */
3721 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3722 && no_labels_between_p (p
, loop_end
))
3723 not_every_iteration
= 0;
3726 /* Try to calculate and save the number of loop iterations. This is
3727 set to zero if the actual number can not be calculated. This must
3728 be called after all giv's have been identified, since otherwise it may
3729 fail if the iteration variable is a giv. */
3731 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3733 /* Now for each giv for which we still don't know whether or not it is
3734 replaceable, check to see if it is replaceable because its final value
3735 can be calculated. This must be done after loop_iterations is called,
3736 so that final_giv_value will work correctly. */
3738 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3740 struct induction
*v
;
3742 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3743 if (! v
->replaceable
&& ! v
->not_replaceable
)
3744 check_final_value (v
, loop_start
, loop_end
);
3747 /* Try to prove that the loop counter variable (if any) is always
3748 nonnegative; if so, record that fact with a REG_NONNEG note
3749 so that "decrement and branch until zero" insn can be used. */
3750 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3752 /* Create reg_map to hold substitutions for replaceable giv regs. */
3753 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3754 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3756 /* Examine each iv class for feasibility of strength reduction/induction
3757 variable elimination. */
3759 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3761 struct induction
*v
;
3764 rtx final_value
= 0;
3766 /* Test whether it will be possible to eliminate this biv
3767 provided all givs are reduced. This is possible if either
3768 the reg is not used outside the loop, or we can compute
3769 what its final value will be.
3771 For architectures with a decrement_and_branch_until_zero insn,
3772 don't do this if we put a REG_NONNEG note on the endtest for
3775 /* Compare against bl->init_insn rather than loop_start.
3776 We aren't concerned with any uses of the biv between
3777 init_insn and loop_start since these won't be affected
3778 by the value of the biv elsewhere in the function, so
3779 long as init_insn doesn't use the biv itself.
3780 March 14, 1989 -- self@bayes.arc.nasa.gov */
3782 if ((uid_luid
[regno_last_uid
[bl
->regno
]] < INSN_LUID (loop_end
)
3784 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3785 && uid_luid
[regno_first_uid
[bl
->regno
]] >= INSN_LUID (bl
->init_insn
)
3786 #ifdef HAVE_decrement_and_branch_until_zero
3789 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3790 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3791 #ifdef HAVE_decrement_and_branch_until_zero
3795 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3796 threshold
, insn_count
);
3799 if (loop_dump_stream
)
3801 fprintf (loop_dump_stream
,
3802 "Cannot eliminate biv %d.\n",
3804 fprintf (loop_dump_stream
,
3805 "First use: insn %d, last use: insn %d.\n",
3806 regno_first_uid
[bl
->regno
],
3807 regno_last_uid
[bl
->regno
]);
3811 /* Combine all giv's for this iv_class. */
3814 /* This will be true at the end, if all givs which depend on this
3815 biv have been strength reduced.
3816 We can't (currently) eliminate the biv unless this is so. */
3819 /* Check each giv in this class to see if we will benefit by reducing
3820 it. Skip giv's combined with others. */
3821 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3823 struct induction
*tv
;
3825 if (v
->ignore
|| v
->same
)
3828 benefit
= v
->benefit
;
3830 /* Reduce benefit if not replaceable, since we will insert
3831 a move-insn to replace the insn that calculates this giv.
3832 Don't do this unless the giv is a user variable, since it
3833 will often be marked non-replaceable because of the duplication
3834 of the exit code outside the loop. In such a case, the copies
3835 we insert are dead and will be deleted. So they don't have
3836 a cost. Similar situations exist. */
3837 /* ??? The new final_[bg]iv_value code does a much better job
3838 of finding replaceable giv's, and hence this code may no longer
3840 if (! v
->replaceable
&& ! bl
->eliminable
3841 && REG_USERVAR_P (v
->dest_reg
))
3842 benefit
-= copy_cost
;
3844 /* Decrease the benefit to count the add-insns that we will
3845 insert to increment the reduced reg for the giv. */
3846 benefit
-= add_cost
* bl
->biv_count
;
3848 /* Decide whether to strength-reduce this giv or to leave the code
3849 unchanged (recompute it from the biv each time it is used).
3850 This decision can be made independently for each giv. */
3852 /* ??? Perhaps attempt to guess whether autoincrement will handle
3853 some of the new add insns; if so, can increase BENEFIT
3854 (undo the subtraction of add_cost that was done above). */
3856 /* If an insn is not to be strength reduced, then set its ignore
3857 flag, and clear all_reduced. */
3859 /* A giv that depends on a reversed biv must be reduced if it is
3860 used after the loop exit, otherwise, it would have the wrong
3861 value after the loop exit. To make it simple, just reduce all
3862 of such giv's whether or not we know they are used after the loop
3865 if (v
->lifetime
* threshold
* benefit
< insn_count
3868 if (loop_dump_stream
)
3869 fprintf (loop_dump_stream
,
3870 "giv of insn %d not worth while, %d vs %d.\n",
3872 v
->lifetime
* threshold
* benefit
, insn_count
);
3878 /* Check that we can increment the reduced giv without a
3879 multiply insn. If not, reject it. */
3881 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
3882 if (tv
->mult_val
== const1_rtx
3883 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
3885 if (loop_dump_stream
)
3886 fprintf (loop_dump_stream
,
3887 "giv of insn %d: would need a multiply.\n",
3888 INSN_UID (v
->insn
));
3896 /* Reduce each giv that we decided to reduce. */
3898 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3900 struct induction
*tv
;
3901 if (! v
->ignore
&& v
->same
== 0)
3903 int auto_inc_opt
= 0;
3905 v
->new_reg
= gen_reg_rtx (v
->mode
);
3908 /* If the target has auto-increment addressing modes, and
3909 this is an address giv, then try to put the increment
3910 immediately after its use, so that flow can create an
3911 auto-increment addressing mode. */
3912 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
3913 && bl
->biv
->always_executed
3914 && ! bl
->biv
->maybe_multiple
3915 && v
->always_executed
&& ! v
->maybe_multiple
)
3917 /* If other giv's have been combined with this one, then
3918 this will work only if all uses of the other giv's occur
3919 before this giv's insn. This is difficult to check.
3921 We simplify this by looking for the common case where
3922 there is one DEST_REG giv, and this giv's insn is the
3923 last use of the dest_reg of that DEST_REG giv. If the
3924 the increment occurs after the address giv, then we can
3925 perform the optimization. (Otherwise, the increment
3926 would have to go before other_giv, and we would not be
3927 able to combine it with the address giv to get an
3928 auto-inc address.) */
3929 if (v
->combined_with
)
3931 struct induction
*other_giv
= 0;
3933 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
3941 if (! tv
&& other_giv
3942 && (regno_last_uid
[REGNO (other_giv
->dest_reg
)]
3943 == INSN_UID (v
->insn
))
3944 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
3947 /* Check for case where increment is before the the address
3949 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
3958 /* We can't put an insn immediately after one setting
3959 cc0, or immediately before one using cc0. */
3960 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
3961 || (auto_inc_opt
== -1
3962 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
3963 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
3964 && sets_cc0_p (PATTERN (prev
))))
3970 v
->auto_inc_opt
= 1;
3974 /* For each place where the biv is incremented, add an insn
3975 to increment the new, reduced reg for the giv. */
3976 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
3981 insert_before
= tv
->insn
;
3982 else if (auto_inc_opt
== 1)
3983 insert_before
= NEXT_INSN (v
->insn
);
3985 insert_before
= v
->insn
;
3987 if (tv
->mult_val
== const1_rtx
)
3988 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
3989 v
->new_reg
, v
->new_reg
, insert_before
);
3990 else /* tv->mult_val == const0_rtx */
3991 /* A multiply is acceptable here
3992 since this is presumed to be seldom executed. */
3993 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
3994 v
->add_val
, v
->new_reg
, insert_before
);
3997 /* Add code at loop start to initialize giv's reduced reg. */
3999 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4000 v
->add_val
, v
->new_reg
, loop_start
);
4004 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4007 For each giv register that can be reduced now: if replaceable,
4008 substitute reduced reg wherever the old giv occurs;
4009 else add new move insn "giv_reg = reduced_reg".
4011 Also check for givs whose first use is their definition and whose
4012 last use is the definition of another giv. If so, it is likely
4013 dead and should not be used to eliminate a biv. */
4014 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4016 if (v
->same
&& v
->same
->ignore
)
4022 if (v
->giv_type
== DEST_REG
4023 && regno_first_uid
[REGNO (v
->dest_reg
)] == INSN_UID (v
->insn
))
4025 struct induction
*v1
;
4027 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4028 if (regno_last_uid
[REGNO (v
->dest_reg
)] == INSN_UID (v1
->insn
))
4032 /* Update expression if this was combined, in case other giv was
4035 v
->new_reg
= replace_rtx (v
->new_reg
,
4036 v
->same
->dest_reg
, v
->same
->new_reg
);
4038 if (v
->giv_type
== DEST_ADDR
)
4039 /* Store reduced reg as the address in the memref where we found
4041 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4042 else if (v
->replaceable
)
4044 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4047 /* I can no longer duplicate the original problem. Perhaps
4048 this is unnecessary now? */
4050 /* Replaceable; it isn't strictly necessary to delete the old
4051 insn and emit a new one, because v->dest_reg is now dead.
4053 However, especially when unrolling loops, the special
4054 handling for (set REG0 REG1) in the second cse pass may
4055 make v->dest_reg live again. To avoid this problem, emit
4056 an insn to set the original giv reg from the reduced giv.
4057 We can not delete the original insn, since it may be part
4058 of a LIBCALL, and the code in flow that eliminates dead
4059 libcalls will fail if it is deleted. */
4060 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4066 /* Not replaceable; emit an insn to set the original giv reg from
4067 the reduced giv, same as above. */
4068 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4072 /* When a loop is reversed, givs which depend on the reversed
4073 biv, and which are live outside the loop, must be set to their
4074 correct final value. This insn is only needed if the giv is
4075 not replaceable. The correct final value is the same as the
4076 value that the giv starts the reversed loop with. */
4077 if (bl
->reversed
&& ! v
->replaceable
)
4078 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4079 v
->add_val
, v
->dest_reg
, end_insert_before
);
4080 else if (v
->final_value
)
4084 /* If the loop has multiple exits, emit the insn before the
4085 loop to ensure that it will always be executed no matter
4086 how the loop exits. Otherwise, emit the insn after the loop,
4087 since this is slightly more efficient. */
4088 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4089 insert_before
= loop_start
;
4091 insert_before
= end_insert_before
;
4092 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4096 /* If the insn to set the final value of the giv was emitted
4097 before the loop, then we must delete the insn inside the loop
4098 that sets it. If this is a LIBCALL, then we must delete
4099 every insn in the libcall. Note, however, that
4100 final_giv_value will only succeed when there are multiple
4101 exits if the giv is dead at each exit, hence it does not
4102 matter that the original insn remains because it is dead
4104 /* Delete the insn inside the loop that sets the giv since
4105 the giv is now set before (or after) the loop. */
4106 delete_insn (v
->insn
);
4110 if (loop_dump_stream
)
4112 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4113 INSN_UID (v
->insn
));
4114 print_rtl (loop_dump_stream
, v
->new_reg
);
4115 fprintf (loop_dump_stream
, "\n");
4119 /* All the givs based on the biv bl have been reduced if they
4122 /* For each giv not marked as maybe dead that has been combined with a
4123 second giv, clear any "maybe dead" mark on that second giv.
4124 v->new_reg will either be or refer to the register of the giv it
4127 Doing this clearing avoids problems in biv elimination where a
4128 giv's new_reg is a complex value that can't be put in the insn but
4129 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4130 Since the register will be used in either case, we'd prefer it be
4131 used from the simpler giv. */
4133 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4134 if (! v
->maybe_dead
&& v
->same
)
4135 v
->same
->maybe_dead
= 0;
4137 /* Try to eliminate the biv, if it is a candidate.
4138 This won't work if ! all_reduced,
4139 since the givs we planned to use might not have been reduced.
4141 We have to be careful that we didn't initially think we could eliminate
4142 this biv because of a giv that we now think may be dead and shouldn't
4143 be used as a biv replacement.
4145 Also, there is the possibility that we may have a giv that looks
4146 like it can be used to eliminate a biv, but the resulting insn
4147 isn't valid. This can happen, for example, on the 88k, where a
4148 JUMP_INSN can compare a register only with zero. Attempts to
4149 replace it with a compare with a constant will fail.
4151 Note that in cases where this call fails, we may have replaced some
4152 of the occurrences of the biv with a giv, but no harm was done in
4153 doing so in the rare cases where it can occur. */
4155 if (all_reduced
== 1 && bl
->eliminable
4156 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4157 threshold
, insn_count
))
4160 /* ?? If we created a new test to bypass the loop entirely,
4161 or otherwise drop straight in, based on this test, then
4162 we might want to rewrite it also. This way some later
4163 pass has more hope of removing the initialization of this
4166 /* If final_value != 0, then the biv may be used after loop end
4167 and we must emit an insn to set it just in case.
4169 Reversed bivs already have an insn after the loop setting their
4170 value, so we don't need another one. We can't calculate the
4171 proper final value for such a biv here anyways. */
4172 if (final_value
!= 0 && ! bl
->reversed
)
4176 /* If the loop has multiple exits, emit the insn before the
4177 loop to ensure that it will always be executed no matter
4178 how the loop exits. Otherwise, emit the insn after the
4179 loop, since this is slightly more efficient. */
4180 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4181 insert_before
= loop_start
;
4183 insert_before
= end_insert_before
;
4185 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4190 /* Delete all of the instructions inside the loop which set
4191 the biv, as they are all dead. If is safe to delete them,
4192 because an insn setting a biv will never be part of a libcall. */
4193 /* However, deleting them will invalidate the regno_last_uid info,
4194 so keeping them around is more convenient. Final_biv_value
4195 will only succeed when there are multiple exits if the biv
4196 is dead at each exit, hence it does not matter that the original
4197 insn remains, because it is dead anyways. */
4198 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4199 delete_insn (v
->insn
);
4202 if (loop_dump_stream
)
4203 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4208 /* Go through all the instructions in the loop, making all the
4209 register substitutions scheduled in REG_MAP. */
4211 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4212 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4213 || GET_CODE (p
) == CALL_INSN
)
4215 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4216 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4220 /* Unroll loops from within strength reduction so that we can use the
4221 induction variable information that strength_reduce has already
4224 if (flag_unroll_loops
)
4225 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4227 if (loop_dump_stream
)
4228 fprintf (loop_dump_stream
, "\n");
4231 /* Return 1 if X is a valid source for an initial value (or as value being
4232 compared against in an initial test).
4234 X must be either a register or constant and must not be clobbered between
4235 the current insn and the start of the loop.
4237 INSN is the insn containing X. */
4240 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4249 /* Only consider pseudos we know about initialized in insns whose luids
4251 if (GET_CODE (x
) != REG
4252 || REGNO (x
) >= max_reg_before_loop
)
4255 /* Don't use call-clobbered registers across a call which clobbers it. On
4256 some machines, don't use any hard registers at all. */
4257 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4258 #ifndef SMALL_REGISTER_CLASSES
4259 && call_used_regs
[REGNO (x
)] && call_seen
4264 /* Don't use registers that have been clobbered before the start of the
4266 if (reg_set_between_p (x
, insn
, loop_start
))
4272 /* Scan X for memory refs and check each memory address
4273 as a possible giv. INSN is the insn whose pattern X comes from.
4274 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4275 every loop iteration. */
4278 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4281 int not_every_iteration
;
4282 rtx loop_start
, loop_end
;
4285 register enum rtx_code code
;
4291 code
= GET_CODE (x
);
4315 benefit
= general_induction_var (XEXP (x
, 0),
4316 &src_reg
, &add_val
, &mult_val
);
4318 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4319 Such a giv isn't useful. */
4320 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4322 /* Found one; record it. */
4324 = (struct induction
*) oballoc (sizeof (struct induction
));
4326 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4327 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4328 &XEXP (x
, 0), loop_start
, loop_end
);
4330 v
->mem_mode
= GET_MODE (x
);
4336 /* Recursively scan the subexpressions for other mem refs. */
4338 fmt
= GET_RTX_FORMAT (code
);
4339 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4341 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4343 else if (fmt
[i
] == 'E')
4344 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4345 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4346 loop_start
, loop_end
);
4349 /* Fill in the data about one biv update.
4350 V is the `struct induction' in which we record the biv. (It is
4351 allocated by the caller, with alloca.)
4352 INSN is the insn that sets it.
4353 DEST_REG is the biv's reg.
4355 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4356 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4357 being set to INC_VAL.
4359 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4360 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4361 can be executed more than once per iteration. If MAYBE_MULTIPLE
4362 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4363 executed exactly once per iteration. */
4366 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4367 not_every_iteration
, maybe_multiple
)
4368 struct induction
*v
;
4373 int not_every_iteration
;
4376 struct iv_class
*bl
;
4379 v
->src_reg
= dest_reg
;
4380 v
->dest_reg
= dest_reg
;
4381 v
->mult_val
= mult_val
;
4382 v
->add_val
= inc_val
;
4383 v
->mode
= GET_MODE (dest_reg
);
4384 v
->always_computable
= ! not_every_iteration
;
4385 v
->always_executed
= ! not_every_iteration
;
4386 v
->maybe_multiple
= maybe_multiple
;
4388 /* Add this to the reg's iv_class, creating a class
4389 if this is the first incrementation of the reg. */
4391 bl
= reg_biv_class
[REGNO (dest_reg
)];
4394 /* Create and initialize new iv_class. */
4396 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4398 bl
->regno
= REGNO (dest_reg
);
4404 /* Set initial value to the reg itself. */
4405 bl
->initial_value
= dest_reg
;
4406 /* We haven't seen the initializing insn yet */
4409 bl
->initial_test
= 0;
4410 bl
->incremented
= 0;
4414 bl
->total_benefit
= 0;
4416 /* Add this class to loop_iv_list. */
4417 bl
->next
= loop_iv_list
;
4420 /* Put it in the array of biv register classes. */
4421 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4424 /* Update IV_CLASS entry for this biv. */
4425 v
->next_iv
= bl
->biv
;
4428 if (mult_val
== const1_rtx
)
4429 bl
->incremented
= 1;
4431 if (loop_dump_stream
)
4433 fprintf (loop_dump_stream
,
4434 "Insn %d: possible biv, reg %d,",
4435 INSN_UID (insn
), REGNO (dest_reg
));
4436 if (GET_CODE (inc_val
) == CONST_INT
)
4437 fprintf (loop_dump_stream
, " const = %d\n",
4441 fprintf (loop_dump_stream
, " const = ");
4442 print_rtl (loop_dump_stream
, inc_val
);
4443 fprintf (loop_dump_stream
, "\n");
4448 /* Fill in the data about one giv.
4449 V is the `struct induction' in which we record the giv. (It is
4450 allocated by the caller, with alloca.)
4451 INSN is the insn that sets it.
4452 BENEFIT estimates the savings from deleting this insn.
4453 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4454 into a register or is used as a memory address.
4456 SRC_REG is the biv reg which the giv is computed from.
4457 DEST_REG is the giv's reg (if the giv is stored in a reg).
4458 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4459 LOCATION points to the place where this giv's value appears in INSN. */
4462 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4463 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4464 struct induction
*v
;
4468 rtx mult_val
, add_val
;
4471 int not_every_iteration
;
4473 rtx loop_start
, loop_end
;
4475 struct induction
*b
;
4476 struct iv_class
*bl
;
4477 rtx set
= single_set (insn
);
4481 v
->src_reg
= src_reg
;
4483 v
->dest_reg
= dest_reg
;
4484 v
->mult_val
= mult_val
;
4485 v
->add_val
= add_val
;
4486 v
->benefit
= benefit
;
4487 v
->location
= location
;
4489 v
->combined_with
= 0;
4490 v
->maybe_multiple
= 0;
4492 v
->derive_adjustment
= 0;
4498 v
->auto_inc_opt
= 0;
4500 /* The v->always_computable field is used in update_giv_derive, to
4501 determine whether a giv can be used to derive another giv. For a
4502 DEST_REG giv, INSN computes a new value for the giv, so its value
4503 isn't computable if INSN insn't executed every iteration.
4504 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4505 it does not compute a new value. Hence the value is always computable
4506 regardless of whether INSN is executed each iteration. */
4508 if (type
== DEST_ADDR
)
4509 v
->always_computable
= 1;
4511 v
->always_computable
= ! not_every_iteration
;
4513 v
->always_executed
= ! not_every_iteration
;
4515 if (type
== DEST_ADDR
)
4517 v
->mode
= GET_MODE (*location
);
4521 else /* type == DEST_REG */
4523 v
->mode
= GET_MODE (SET_DEST (set
));
4525 v
->lifetime
= (uid_luid
[regno_last_uid
[REGNO (dest_reg
)]]
4526 - uid_luid
[regno_first_uid
[REGNO (dest_reg
)]]);
4528 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4530 /* If the lifetime is zero, it means that this register is
4531 really a dead store. So mark this as a giv that can be
4532 ignored. This will not prevent the biv from being eliminated. */
4533 if (v
->lifetime
== 0)
4536 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4537 reg_iv_info
[REGNO (dest_reg
)] = v
;
4540 /* Add the giv to the class of givs computed from one biv. */
4542 bl
= reg_biv_class
[REGNO (src_reg
)];
4545 v
->next_iv
= bl
->giv
;
4547 /* Don't count DEST_ADDR. This is supposed to count the number of
4548 insns that calculate givs. */
4549 if (type
== DEST_REG
)
4551 bl
->total_benefit
+= benefit
;
4554 /* Fatal error, biv missing for this giv? */
4557 if (type
== DEST_ADDR
)
4561 /* The giv can be replaced outright by the reduced register only if all
4562 of the following conditions are true:
4563 - the insn that sets the giv is always executed on any iteration
4564 on which the giv is used at all
4565 (there are two ways to deduce this:
4566 either the insn is executed on every iteration,
4567 or all uses follow that insn in the same basic block),
4568 - the giv is not used outside the loop
4569 - no assignments to the biv occur during the giv's lifetime. */
4571 if (regno_first_uid
[REGNO (dest_reg
)] == INSN_UID (insn
)
4572 /* Previous line always fails if INSN was moved by loop opt. */
4573 && uid_luid
[regno_last_uid
[REGNO (dest_reg
)]] < INSN_LUID (loop_end
)
4574 && (! not_every_iteration
4575 || last_use_this_basic_block (dest_reg
, insn
)))
4577 /* Now check that there are no assignments to the biv within the
4578 giv's lifetime. This requires two separate checks. */
4580 /* Check each biv update, and fail if any are between the first
4581 and last use of the giv.
4583 If this loop contains an inner loop that was unrolled, then
4584 the insn modifying the biv may have been emitted by the loop
4585 unrolling code, and hence does not have a valid luid. Just
4586 mark the biv as not replaceable in this case. It is not very
4587 useful as a biv, because it is used in two different loops.
4588 It is very unlikely that we would be able to optimize the giv
4589 using this biv anyways. */
4592 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4594 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4595 || ((uid_luid
[INSN_UID (b
->insn
)]
4596 >= uid_luid
[regno_first_uid
[REGNO (dest_reg
)]])
4597 && (uid_luid
[INSN_UID (b
->insn
)]
4598 <= uid_luid
[regno_last_uid
[REGNO (dest_reg
)]])))
4601 v
->not_replaceable
= 1;
4606 /* If there are any backwards branches that go from after the
4607 biv update to before it, then this giv is not replaceable. */
4609 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4610 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4613 v
->not_replaceable
= 1;
4619 /* May still be replaceable, we don't have enough info here to
4622 v
->not_replaceable
= 0;
4626 if (loop_dump_stream
)
4628 if (type
== DEST_REG
)
4629 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4630 INSN_UID (insn
), REGNO (dest_reg
));
4632 fprintf (loop_dump_stream
, "Insn %d: dest address",
4635 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4636 REGNO (src_reg
), v
->benefit
);
4637 fprintf (loop_dump_stream
, " used %d lifetime %d",
4638 v
->times_used
, v
->lifetime
);
4641 fprintf (loop_dump_stream
, " replaceable");
4643 if (GET_CODE (mult_val
) == CONST_INT
)
4644 fprintf (loop_dump_stream
, " mult %d",
4648 fprintf (loop_dump_stream
, " mult ");
4649 print_rtl (loop_dump_stream
, mult_val
);
4652 if (GET_CODE (add_val
) == CONST_INT
)
4653 fprintf (loop_dump_stream
, " add %d",
4657 fprintf (loop_dump_stream
, " add ");
4658 print_rtl (loop_dump_stream
, add_val
);
4662 if (loop_dump_stream
)
4663 fprintf (loop_dump_stream
, "\n");
4668 /* All this does is determine whether a giv can be made replaceable because
4669 its final value can be calculated. This code can not be part of record_giv
4670 above, because final_giv_value requires that the number of loop iterations
4671 be known, and that can not be accurately calculated until after all givs
4672 have been identified. */
4675 check_final_value (v
, loop_start
, loop_end
)
4676 struct induction
*v
;
4677 rtx loop_start
, loop_end
;
4679 struct iv_class
*bl
;
4680 rtx final_value
= 0;
4682 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4684 /* DEST_ADDR givs will never reach here, because they are always marked
4685 replaceable above in record_giv. */
4687 /* The giv can be replaced outright by the reduced register only if all
4688 of the following conditions are true:
4689 - the insn that sets the giv is always executed on any iteration
4690 on which the giv is used at all
4691 (there are two ways to deduce this:
4692 either the insn is executed on every iteration,
4693 or all uses follow that insn in the same basic block),
4694 - its final value can be calculated (this condition is different
4695 than the one above in record_giv)
4696 - no assignments to the biv occur during the giv's lifetime. */
4699 /* This is only called now when replaceable is known to be false. */
4700 /* Clear replaceable, so that it won't confuse final_giv_value. */
4704 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4705 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4707 int biv_increment_seen
= 0;
4713 /* When trying to determine whether or not a biv increment occurs
4714 during the lifetime of the giv, we can ignore uses of the variable
4715 outside the loop because final_value is true. Hence we can not
4716 use regno_last_uid and regno_first_uid as above in record_giv. */
4718 /* Search the loop to determine whether any assignments to the
4719 biv occur during the giv's lifetime. Start with the insn
4720 that sets the giv, and search around the loop until we come
4721 back to that insn again.
4723 Also fail if there is a jump within the giv's lifetime that jumps
4724 to somewhere outside the lifetime but still within the loop. This
4725 catches spaghetti code where the execution order is not linear, and
4726 hence the above test fails. Here we assume that the giv lifetime
4727 does not extend from one iteration of the loop to the next, so as
4728 to make the test easier. Since the lifetime isn't known yet,
4729 this requires two loops. See also record_giv above. */
4731 last_giv_use
= v
->insn
;
4737 p
= NEXT_INSN (loop_start
);
4741 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4742 || GET_CODE (p
) == CALL_INSN
)
4744 if (biv_increment_seen
)
4746 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4749 v
->not_replaceable
= 1;
4753 else if (GET_CODE (PATTERN (p
)) == SET
4754 && SET_DEST (PATTERN (p
)) == v
->src_reg
)
4755 biv_increment_seen
= 1;
4756 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4761 /* Now that the lifetime of the giv is known, check for branches
4762 from within the lifetime to outside the lifetime if it is still
4772 p
= NEXT_INSN (loop_start
);
4773 if (p
== last_giv_use
)
4776 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4777 && LABEL_NAME (JUMP_LABEL (p
))
4778 && ((INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4779 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4780 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4781 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4784 v
->not_replaceable
= 1;
4786 if (loop_dump_stream
)
4787 fprintf (loop_dump_stream
,
4788 "Found branch outside giv lifetime.\n");
4795 /* If it is replaceable, then save the final value. */
4797 v
->final_value
= final_value
;
4800 if (loop_dump_stream
&& v
->replaceable
)
4801 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4802 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4805 /* Update the status of whether a giv can derive other givs.
4807 We need to do something special if there is or may be an update to the biv
4808 between the time the giv is defined and the time it is used to derive
4811 In addition, a giv that is only conditionally set is not allowed to
4812 derive another giv once a label has been passed.
4814 The cases we look at are when a label or an update to a biv is passed. */
4817 update_giv_derive (p
)
4820 struct iv_class
*bl
;
4821 struct induction
*biv
, *giv
;
4825 /* Search all IV classes, then all bivs, and finally all givs.
4827 There are three cases we are concerned with. First we have the situation
4828 of a giv that is only updated conditionally. In that case, it may not
4829 derive any givs after a label is passed.
4831 The second case is when a biv update occurs, or may occur, after the
4832 definition of a giv. For certain biv updates (see below) that are
4833 known to occur between the giv definition and use, we can adjust the
4834 giv definition. For others, or when the biv update is conditional,
4835 we must prevent the giv from deriving any other givs. There are two
4836 sub-cases within this case.
4838 If this is a label, we are concerned with any biv update that is done
4839 conditionally, since it may be done after the giv is defined followed by
4840 a branch here (actually, we need to pass both a jump and a label, but
4841 this extra tracking doesn't seem worth it).
4843 If this is a jump, we are concerned about any biv update that may be
4844 executed multiple times. We are actually only concerned about
4845 backward jumps, but it is probably not worth performing the test
4846 on the jump again here.
4848 If this is a biv update, we must adjust the giv status to show that a
4849 subsequent biv update was performed. If this adjustment cannot be done,
4850 the giv cannot derive further givs. */
4852 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
4853 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
4854 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
4857 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
4859 /* If cant_derive is already true, there is no point in
4860 checking all of these conditions again. */
4861 if (giv
->cant_derive
)
4864 /* If this giv is conditionally set and we have passed a label,
4865 it cannot derive anything. */
4866 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
4867 giv
->cant_derive
= 1;
4869 /* Skip givs that have mult_val == 0, since
4870 they are really invariants. Also skip those that are
4871 replaceable, since we know their lifetime doesn't contain
4873 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
4876 /* The only way we can allow this giv to derive another
4877 is if this is a biv increment and we can form the product
4878 of biv->add_val and giv->mult_val. In this case, we will
4879 be able to compute a compensation. */
4880 else if (biv
->insn
== p
)
4884 if (biv
->mult_val
== const1_rtx
)
4885 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
4890 if (tem
&& giv
->derive_adjustment
)
4891 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
4892 giv
->derive_adjustment
),
4895 giv
->derive_adjustment
= tem
;
4897 giv
->cant_derive
= 1;
4899 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
4900 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
4901 giv
->cant_derive
= 1;
4906 /* Check whether an insn is an increment legitimate for a basic induction var.
4907 X is the source of insn P, or a part of it.
4908 MODE is the mode in which X should be interpreted.
4910 DEST_REG is the putative biv, also the destination of the insn.
4911 We accept patterns of these forms:
4912 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
4913 REG = INVARIANT + REG
4915 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
4916 and store the additive term into *INC_VAL.
4918 If X is an assignment of an invariant into DEST_REG, we set
4919 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
4921 We also want to detect a BIV when it corresponds to a variable
4922 whose mode was promoted via PROMOTED_MODE. In that case, an increment
4923 of the variable may be a PLUS that adds a SUBREG of that variable to
4924 an invariant and then sign- or zero-extends the result of the PLUS
4927 Most GIVs in such cases will be in the promoted mode, since that is the
4928 probably the natural computation mode (and almost certainly the mode
4929 used for addresses) on the machine. So we view the pseudo-reg containing
4930 the variable as the BIV, as if it were simply incremented.
4932 Note that treating the entire pseudo as a BIV will result in making
4933 simple increments to any GIVs based on it. However, if the variable
4934 overflows in its declared mode but not its promoted mode, the result will
4935 be incorrect. This is acceptable if the variable is signed, since
4936 overflows in such cases are undefined, but not if it is unsigned, since
4937 those overflows are defined. So we only check for SIGN_EXTEND and
4940 If we cannot find a biv, we return 0. */
4943 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
4945 enum machine_mode mode
;
4951 register enum rtx_code code
;
4955 code
= GET_CODE (x
);
4959 if (XEXP (x
, 0) == dest_reg
4960 || (GET_CODE (XEXP (x
, 0)) == SUBREG
4961 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
4962 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
4964 else if (XEXP (x
, 1) == dest_reg
4965 || (GET_CODE (XEXP (x
, 1)) == SUBREG
4966 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
4967 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
4972 if (invariant_p (arg
) != 1)
4975 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
4976 *mult_val
= const1_rtx
;
4980 /* If this is a SUBREG for a promoted variable, check the inner
4982 if (SUBREG_PROMOTED_VAR_P (x
))
4983 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
4984 dest_reg
, p
, inc_val
, mult_val
);
4987 /* If this register is assigned in the previous insn, look at its
4988 source, but don't go outside the loop or past a label. */
4990 for (insn
= PREV_INSN (p
);
4991 (insn
&& GET_CODE (insn
) == NOTE
4992 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
4993 insn
= PREV_INSN (insn
))
4997 set
= single_set (insn
);
5000 && (SET_DEST (set
) == x
5001 || (GET_CODE (SET_DEST (set
)) == SUBREG
5002 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5004 && SUBREG_REG (SET_DEST (set
)) == x
)))
5005 return basic_induction_var (SET_SRC (set
),
5006 (GET_MODE (SET_SRC (set
)) == VOIDmode
5008 : GET_MODE (SET_SRC (set
))),
5011 /* ... fall through ... */
5013 /* Can accept constant setting of biv only when inside inner most loop.
5014 Otherwise, a biv of an inner loop may be incorrectly recognized
5015 as a biv of the outer loop,
5016 causing code to be moved INTO the inner loop. */
5018 if (invariant_p (x
) != 1)
5023 if (loops_enclosed
== 1)
5025 /* Possible bug here? Perhaps we don't know the mode of X. */
5026 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5027 *mult_val
= const0_rtx
;
5034 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5035 dest_reg
, p
, inc_val
, mult_val
);
5037 /* Similar, since this can be a sign extension. */
5038 for (insn
= PREV_INSN (p
);
5039 (insn
&& GET_CODE (insn
) == NOTE
5040 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5041 insn
= PREV_INSN (insn
))
5045 set
= single_set (insn
);
5047 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5048 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5049 && INTVAL (XEXP (x
, 1)) >= 0
5050 && GET_CODE (SET_SRC (set
)) == ASHIFT
5051 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5052 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5053 GET_MODE (XEXP (x
, 0)),
5054 dest_reg
, insn
, inc_val
, mult_val
);
5062 /* A general induction variable (giv) is any quantity that is a linear
5063 function of a basic induction variable,
5064 i.e. giv = biv * mult_val + add_val.
5065 The coefficients can be any loop invariant quantity.
5066 A giv need not be computed directly from the biv;
5067 it can be computed by way of other givs. */
5069 /* Determine whether X computes a giv.
5070 If it does, return a nonzero value
5071 which is the benefit from eliminating the computation of X;
5072 set *SRC_REG to the register of the biv that it is computed from;
5073 set *ADD_VAL and *MULT_VAL to the coefficients,
5074 such that the value of X is biv * mult + add; */
5077 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5087 /* If this is an invariant, forget it, it isn't a giv. */
5088 if (invariant_p (x
) == 1)
5091 /* See if the expression could be a giv and get its form.
5092 Mark our place on the obstack in case we don't find a giv. */
5093 storage
= (char *) oballoc (0);
5094 x
= simplify_giv_expr (x
, &benefit
);
5101 switch (GET_CODE (x
))
5105 /* Since this is now an invariant and wasn't before, it must be a giv
5106 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5108 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5109 *mult_val
= const0_rtx
;
5114 /* This is equivalent to a BIV. */
5116 *mult_val
= const1_rtx
;
5117 *add_val
= const0_rtx
;
5121 /* Either (plus (biv) (invar)) or
5122 (plus (mult (biv) (invar_1)) (invar_2)). */
5123 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5125 *src_reg
= XEXP (XEXP (x
, 0), 0);
5126 *mult_val
= XEXP (XEXP (x
, 0), 1);
5130 *src_reg
= XEXP (x
, 0);
5131 *mult_val
= const1_rtx
;
5133 *add_val
= XEXP (x
, 1);
5137 /* ADD_VAL is zero. */
5138 *src_reg
= XEXP (x
, 0);
5139 *mult_val
= XEXP (x
, 1);
5140 *add_val
= const0_rtx
;
5147 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5148 unless they are CONST_INT). */
5149 if (GET_CODE (*add_val
) == USE
)
5150 *add_val
= XEXP (*add_val
, 0);
5151 if (GET_CODE (*mult_val
) == USE
)
5152 *mult_val
= XEXP (*mult_val
, 0);
5154 benefit
+= rtx_cost (orig_x
, SET
);
5156 /* Always return some benefit if this is a giv so it will be detected
5157 as such. This allows elimination of bivs that might otherwise
5158 not be eliminated. */
5159 return benefit
== 0 ? 1 : benefit
;
5162 /* Given an expression, X, try to form it as a linear function of a biv.
5163 We will canonicalize it to be of the form
5164 (plus (mult (BIV) (invar_1))
5166 with possible degeneracies.
5168 The invariant expressions must each be of a form that can be used as a
5169 machine operand. We surround then with a USE rtx (a hack, but localized
5170 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5171 routine; it is the caller's responsibility to strip them.
5173 If no such canonicalization is possible (i.e., two biv's are used or an
5174 expression that is neither invariant nor a biv or giv), this routine
5177 For a non-zero return, the result will have a code of CONST_INT, USE,
5178 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5180 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5183 simplify_giv_expr (x
, benefit
)
5187 enum machine_mode mode
= GET_MODE (x
);
5191 /* If this is not an integer mode, or if we cannot do arithmetic in this
5192 mode, this can't be a giv. */
5193 if (mode
!= VOIDmode
5194 && (GET_MODE_CLASS (mode
) != MODE_INT
5195 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5198 switch (GET_CODE (x
))
5201 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5202 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5203 if (arg0
== 0 || arg1
== 0)
5206 /* Put constant last, CONST_INT last if both constant. */
5207 if ((GET_CODE (arg0
) == USE
5208 || GET_CODE (arg0
) == CONST_INT
)
5209 && GET_CODE (arg1
) != CONST_INT
)
5210 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5212 /* Handle addition of zero, then addition of an invariant. */
5213 if (arg1
== const0_rtx
)
5215 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5216 switch (GET_CODE (arg0
))
5220 /* Both invariant. Only valid if sum is machine operand.
5221 First strip off possible USE on first operand. */
5222 if (GET_CODE (arg0
) == USE
)
5223 arg0
= XEXP (arg0
, 0);
5226 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5228 tem
= plus_constant (arg0
, INTVAL (arg1
));
5229 if (GET_CODE (tem
) != CONST_INT
)
5230 tem
= gen_rtx (USE
, mode
, tem
);
5237 /* biv + invar or mult + invar. Return sum. */
5238 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5241 /* (a + invar_1) + invar_2. Associate. */
5242 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5244 gen_rtx (PLUS
, mode
,
5245 XEXP (arg0
, 1), arg1
)),
5252 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5253 MULT to reduce cases. */
5254 if (GET_CODE (arg0
) == REG
)
5255 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5256 if (GET_CODE (arg1
) == REG
)
5257 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5259 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5260 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5261 Recurse to associate the second PLUS. */
5262 if (GET_CODE (arg1
) == MULT
)
5263 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5265 if (GET_CODE (arg1
) == PLUS
)
5266 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5267 gen_rtx (PLUS
, mode
,
5268 arg0
, XEXP (arg1
, 0)),
5272 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5273 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5276 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5279 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5281 gen_rtx (PLUS
, mode
,
5287 /* Handle "a - b" as "a + b * (-1)". */
5288 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5290 gen_rtx (MULT
, mode
,
5291 XEXP (x
, 1), constm1_rtx
)),
5295 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5296 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5297 if (arg0
== 0 || arg1
== 0)
5300 /* Put constant last, CONST_INT last if both constant. */
5301 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5302 && GET_CODE (arg1
) != CONST_INT
)
5303 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5305 /* If second argument is not now constant, not giv. */
5306 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5309 /* Handle multiply by 0 or 1. */
5310 if (arg1
== const0_rtx
)
5313 else if (arg1
== const1_rtx
)
5316 switch (GET_CODE (arg0
))
5319 /* biv * invar. Done. */
5320 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5323 /* Product of two constants. */
5324 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5327 /* invar * invar. Not giv. */
5331 /* (a * invar_1) * invar_2. Associate. */
5332 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5334 gen_rtx (MULT
, mode
,
5335 XEXP (arg0
, 1), arg1
)),
5339 /* (a + invar_1) * invar_2. Distribute. */
5340 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5341 gen_rtx (MULT
, mode
,
5342 XEXP (arg0
, 0), arg1
),
5343 gen_rtx (MULT
, mode
,
5344 XEXP (arg0
, 1), arg1
)),
5352 /* Shift by constant is multiply by power of two. */
5353 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5356 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5358 GEN_INT ((HOST_WIDE_INT
) 1
5359 << INTVAL (XEXP (x
, 1)))),
5363 /* "-a" is "a * (-1)" */
5364 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5368 /* "~a" is "-a - 1". Silly, but easy. */
5369 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5370 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5375 /* Already in proper form for invariant. */
5379 /* If this is a new register, we can't deal with it. */
5380 if (REGNO (x
) >= max_reg_before_loop
)
5383 /* Check for biv or giv. */
5384 switch (reg_iv_type
[REGNO (x
)])
5388 case GENERAL_INDUCT
:
5390 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5392 /* Form expression from giv and add benefit. Ensure this giv
5393 can derive another and subtract any needed adjustment if so. */
5394 *benefit
+= v
->benefit
;
5398 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5399 v
->src_reg
, v
->mult_val
),
5401 if (v
->derive_adjustment
)
5402 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5403 return simplify_giv_expr (tem
, benefit
);
5407 /* Fall through to general case. */
5409 /* If invariant, return as USE (unless CONST_INT).
5410 Otherwise, not giv. */
5411 if (GET_CODE (x
) == USE
)
5414 if (invariant_p (x
) == 1)
5416 if (GET_CODE (x
) == CONST_INT
)
5419 return gen_rtx (USE
, mode
, x
);
5426 /* Help detect a giv that is calculated by several consecutive insns;
5430 The caller has already identified the first insn P as having a giv as dest;
5431 we check that all other insns that set the same register follow
5432 immediately after P, that they alter nothing else,
5433 and that the result of the last is still a giv.
5435 The value is 0 if the reg set in P is not really a giv.
5436 Otherwise, the value is the amount gained by eliminating
5437 all the consecutive insns that compute the value.
5439 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5440 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5442 The coefficients of the ultimate giv value are stored in
5443 *MULT_VAL and *ADD_VAL. */
5446 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5461 /* Indicate that this is a giv so that we can update the value produced in
5462 each insn of the multi-insn sequence.
5464 This induction structure will be used only by the call to
5465 general_induction_var below, so we can allocate it on our stack.
5466 If this is a giv, our caller will replace the induct var entry with
5467 a new induction structure. */
5469 = (struct induction
*) alloca (sizeof (struct induction
));
5470 v
->src_reg
= src_reg
;
5471 v
->mult_val
= *mult_val
;
5472 v
->add_val
= *add_val
;
5473 v
->benefit
= first_benefit
;
5475 v
->derive_adjustment
= 0;
5477 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5478 reg_iv_info
[REGNO (dest_reg
)] = v
;
5480 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5485 code
= GET_CODE (p
);
5487 /* If libcall, skip to end of call sequence. */
5488 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5492 && (set
= single_set (p
))
5493 && GET_CODE (SET_DEST (set
)) == REG
5494 && SET_DEST (set
) == dest_reg
5495 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5497 /* Giv created by equivalent expression. */
5498 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5499 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5500 add_val
, mult_val
))))
5501 && src_reg
== v
->src_reg
)
5503 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5504 benefit
+= libcall_benefit (p
);
5507 v
->mult_val
= *mult_val
;
5508 v
->add_val
= *add_val
;
5509 v
->benefit
= benefit
;
5511 else if (code
!= NOTE
)
5513 /* Allow insns that set something other than this giv to a
5514 constant. Such insns are needed on machines which cannot
5515 include long constants and should not disqualify a giv. */
5517 && (set
= single_set (p
))
5518 && SET_DEST (set
) != dest_reg
5519 && CONSTANT_P (SET_SRC (set
)))
5522 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5530 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5531 represented by G1. If no such expression can be found, or it is clear that
5532 it cannot possibly be a valid address, 0 is returned.
5534 To perform the computation, we note that
5537 where `v' is the biv.
5539 So G2 = (c/a) * G1 + (d - b*c/a) */
5543 express_from (g1
, g2
)
5544 struct induction
*g1
, *g2
;
5548 /* The value that G1 will be multiplied by must be a constant integer. Also,
5549 the only chance we have of getting a valid address is if b*c/a (see above
5550 for notation) is also an integer. */
5551 if (GET_CODE (g1
->mult_val
) != CONST_INT
5552 || GET_CODE (g2
->mult_val
) != CONST_INT
5553 || GET_CODE (g1
->add_val
) != CONST_INT
5554 || g1
->mult_val
== const0_rtx
5555 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5558 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5559 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5561 /* Form simplified final result. */
5562 if (mult
== const0_rtx
)
5564 else if (mult
== const1_rtx
)
5565 mult
= g1
->dest_reg
;
5567 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5569 if (add
== const0_rtx
)
5572 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5576 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5577 (either directly or via an address expression) a register used to represent
5578 G1. Set g2->new_reg to a represtation of G1 (normally just
5582 combine_givs_p (g1
, g2
)
5583 struct induction
*g1
, *g2
;
5587 /* If these givs are identical, they can be combined. */
5588 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5589 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5591 g2
->new_reg
= g1
->dest_reg
;
5596 /* If G2 can be expressed as a function of G1 and that function is valid
5597 as an address and no more expensive than using a register for G2,
5598 the expression of G2 in terms of G1 can be used. */
5599 if (g2
->giv_type
== DEST_ADDR
5600 && (tem
= express_from (g1
, g2
)) != 0
5601 && memory_address_p (g2
->mem_mode
, tem
)
5602 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5612 #ifdef GIV_SORT_CRITERION
5613 /* Compare two givs and sort the most desirable one for combinations first.
5614 This is used only in one qsort call below. */
5618 struct induction
**x
, **y
;
5620 GIV_SORT_CRITERION (*x
, *y
);
5626 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5627 any other. If so, point SAME to the giv combined with and set NEW_REG to
5628 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5629 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5633 struct iv_class
*bl
;
5635 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5636 int i
, j
, giv_count
, pass
;
5638 /* Count givs, because bl->giv_count is incorrect here. */
5640 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5644 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5646 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5647 giv_array
[i
++] = g1
;
5649 #ifdef GIV_SORT_CRITERION
5650 /* Sort the givs if GIV_SORT_CRITERION is defined.
5651 This is usually defined for processors which lack
5652 negative register offsets so more givs may be combined. */
5654 if (loop_dump_stream
)
5655 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5657 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5660 for (i
= 0; i
< giv_count
; i
++)
5663 for (pass
= 0; pass
<= 1; pass
++)
5664 for (j
= 0; j
< giv_count
; j
++)
5668 /* First try to combine with replaceable givs, then all givs. */
5669 && (g1
->replaceable
|| pass
== 1)
5670 /* If either has already been combined or is to be ignored, can't
5672 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5673 /* If something has been based on G2, G2 cannot itself be based
5674 on something else. */
5675 && ! g2
->combined_with
5676 && combine_givs_p (g1
, g2
))
5678 /* g2->new_reg set by `combine_givs_p' */
5680 g1
->combined_with
= 1;
5682 /* If one of these givs is a DEST_REG that was only used
5683 once, by the other giv, this is actually a single use. */
5684 if ((g1
->giv_type
!= DEST_REG
5685 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5686 || ! reg_mentioned_p (g1
->dest_reg
, PATTERN (g2
->insn
)))
5687 && (g2
->giv_type
!= DEST_REG
5688 || n_times_used
[REGNO (g2
->dest_reg
)] != 1
5689 || ! reg_mentioned_p (g2
->dest_reg
,
5690 PATTERN (g1
->insn
))))
5692 g1
->benefit
+= g2
->benefit
;
5693 g1
->times_used
+= g2
->times_used
;
5695 /* ??? The new final_[bg]iv_value code does a much better job
5696 of finding replaceable giv's, and hence this code may no
5697 longer be necessary. */
5698 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5699 g1
->benefit
-= copy_cost
;
5700 g1
->lifetime
+= g2
->lifetime
;
5702 if (loop_dump_stream
)
5703 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5704 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5710 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5713 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5714 rtx b
; /* initial value of basic induction variable */
5715 rtx m
; /* multiplicative constant */
5716 rtx a
; /* additive constant */
5717 rtx reg
; /* destination register */
5723 /* Prevent unexpected sharing of these rtx. */
5727 /* Increase the lifetime of any invariants moved further in code. */
5728 update_reg_last_use (a
, insert_before
);
5729 update_reg_last_use (b
, insert_before
);
5730 update_reg_last_use (m
, insert_before
);
5733 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5735 emit_move_insn (reg
, result
);
5736 seq
= gen_sequence ();
5739 emit_insn_before (seq
, insert_before
);
5742 /* Test whether A * B can be computed without
5743 an actual multiply insn. Value is 1 if so. */
5746 product_cheap_p (a
, b
)
5752 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5753 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5756 /* If only one is constant, make it B. */
5757 if (GET_CODE (a
) == CONST_INT
)
5758 tmp
= a
, a
= b
, b
= tmp
;
5760 /* If first constant, both constant, so don't need multiply. */
5761 if (GET_CODE (a
) == CONST_INT
)
5764 /* If second not constant, neither is constant, so would need multiply. */
5765 if (GET_CODE (b
) != CONST_INT
)
5768 /* One operand is constant, so might not need multiply insn. Generate the
5769 code for the multiply and see if a call or multiply, or long sequence
5770 of insns is generated. */
5772 rtl_obstack
= &temp_obstack
;
5774 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5775 tmp
= gen_sequence ();
5778 if (GET_CODE (tmp
) == SEQUENCE
)
5780 if (XVEC (tmp
, 0) == 0)
5782 else if (XVECLEN (tmp
, 0) > 3)
5785 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5787 rtx insn
= XVECEXP (tmp
, 0, i
);
5789 if (GET_CODE (insn
) != INSN
5790 || (GET_CODE (PATTERN (insn
)) == SET
5791 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5792 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5793 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5794 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5801 else if (GET_CODE (tmp
) == SET
5802 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5804 else if (GET_CODE (tmp
) == PARALLEL
5805 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5806 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5809 /* Free any storage we obtained in generating this multiply and restore rtl
5810 allocation to its normal obstack. */
5811 obstack_free (&temp_obstack
, storage
);
5812 rtl_obstack
= old_rtl_obstack
;
5817 /* Check to see if loop can be terminated by a "decrement and branch until
5818 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5819 Also try reversing an increment loop to a decrement loop
5820 to see if the optimization can be performed.
5821 Value is nonzero if optimization was performed. */
5823 /* This is useful even if the architecture doesn't have such an insn,
5824 because it might change a loops which increments from 0 to n to a loop
5825 which decrements from n to 0. A loop that decrements to zero is usually
5826 faster than one that increments from zero. */
5828 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5829 such as approx_final_value, biv_total_increment, loop_iterations, and
5830 final_[bg]iv_value. */
5833 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5838 struct iv_class
*bl
;
5845 rtx before_comparison
;
5848 /* If last insn is a conditional branch, and the insn before tests a
5849 register value, try to optimize it. Otherwise, we can't do anything. */
5851 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
5852 if (comparison
== 0)
5855 /* Check all of the bivs to see if the compare uses one of them.
5856 Skip biv's set more than once because we can't guarantee that
5857 it will be zero on the last iteration. Also skip if the biv is
5858 used between its update and the test insn. */
5860 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5862 if (bl
->biv_count
== 1
5863 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
5864 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
5865 PREV_INSN (PREV_INSN (loop_end
))))
5872 /* Look for the case where the basic induction variable is always
5873 nonnegative, and equals zero on the last iteration.
5874 In this case, add a reg_note REG_NONNEG, which allows the
5875 m68k DBRA instruction to be used. */
5877 if (((GET_CODE (comparison
) == GT
5878 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
5879 && INTVAL (XEXP (comparison
, 1)) == -1)
5880 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
5881 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
5882 && INTVAL (bl
->biv
->add_val
) < 0)
5884 /* Initial value must be greater than 0,
5885 init_val % -dec_value == 0 to ensure that it equals zero on
5886 the last iteration */
5888 if (GET_CODE (bl
->initial_value
) == CONST_INT
5889 && INTVAL (bl
->initial_value
) > 0
5890 && (INTVAL (bl
->initial_value
) %
5891 (-INTVAL (bl
->biv
->add_val
))) == 0)
5893 /* register always nonnegative, add REG_NOTE to branch */
5894 REG_NOTES (PREV_INSN (loop_end
))
5895 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
5896 REG_NOTES (PREV_INSN (loop_end
)));
5902 /* If the decrement is 1 and the value was tested as >= 0 before
5903 the loop, then we can safely optimize. */
5904 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
5906 if (GET_CODE (p
) == CODE_LABEL
)
5908 if (GET_CODE (p
) != JUMP_INSN
)
5911 before_comparison
= get_condition_for_loop (p
);
5912 if (before_comparison
5913 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
5914 && GET_CODE (before_comparison
) == LT
5915 && XEXP (before_comparison
, 1) == const0_rtx
5916 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
5917 && INTVAL (bl
->biv
->add_val
) == -1)
5919 REG_NOTES (PREV_INSN (loop_end
))
5920 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
5921 REG_NOTES (PREV_INSN (loop_end
)));
5928 else if (num_mem_sets
<= 1)
5930 /* Try to change inc to dec, so can apply above optimization. */
5932 all registers modified are induction variables or invariant,
5933 all memory references have non-overlapping addresses
5934 (obviously true if only one write)
5935 allow 2 insns for the compare/jump at the end of the loop. */
5936 /* Also, we must avoid any instructions which use both the reversed
5937 biv and another biv. Such instructions will fail if the loop is
5938 reversed. We meet this condition by requiring that either
5939 no_use_except_counting is true, or else that there is only
5941 int num_nonfixed_reads
= 0;
5942 /* 1 if the iteration var is used only to count iterations. */
5943 int no_use_except_counting
= 0;
5944 /* 1 if the loop has no memory store, or it has a single memory store
5945 which is reversible. */
5946 int reversible_mem_store
= 1;
5948 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
5949 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5950 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
5952 if (bl
->giv_count
== 0
5953 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
5955 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
5957 /* If there are no givs for this biv, and the only exit is the
5958 fall through at the end of the the loop, then
5959 see if perhaps there are no uses except to count. */
5960 no_use_except_counting
= 1;
5961 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
5962 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5964 rtx set
= single_set (p
);
5966 if (set
&& GET_CODE (SET_DEST (set
)) == REG
5967 && REGNO (SET_DEST (set
)) == bl
->regno
)
5968 /* An insn that sets the biv is okay. */
5970 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
5971 || p
== prev_nonnote_insn (loop_end
))
5972 /* Don't bother about the end test. */
5974 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
5975 /* Any other use of the biv is no good. */
5977 no_use_except_counting
= 0;
5983 /* If the loop has a single store, and the destination address is
5984 invariant, then we can't reverse the loop, because this address
5985 might then have the wrong value at loop exit.
5986 This would work if the source was invariant also, however, in that
5987 case, the insn should have been moved out of the loop. */
5989 if (num_mem_sets
== 1)
5990 reversible_mem_store
5991 = (! unknown_address_altered
5992 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
5994 /* This code only acts for innermost loops. Also it simplifies
5995 the memory address check by only reversing loops with
5996 zero or one memory access.
5997 Two memory accesses could involve parts of the same array,
5998 and that can't be reversed. */
6000 if (num_nonfixed_reads
<= 1
6002 && !loop_has_volatile
6003 && reversible_mem_store
6004 && (no_use_except_counting
6005 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6006 + num_movables
+ 2 == insn_count
)
6007 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6011 /* Loop can be reversed. */
6012 if (loop_dump_stream
)
6013 fprintf (loop_dump_stream
, "Can reverse loop\n");
6015 /* Now check other conditions:
6016 initial_value must be zero,
6017 final_value % add_val == 0, so that when reversed, the
6018 biv will be zero on the last iteration.
6020 This test can probably be improved since +/- 1 in the constant
6021 can be obtained by changing LT to LE and vice versa; this is
6024 if (comparison
&& bl
->initial_value
== const0_rtx
6025 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6026 /* LE gets turned into LT */
6027 && GET_CODE (comparison
) == LT
6028 && (INTVAL (XEXP (comparison
, 1))
6029 % INTVAL (bl
->biv
->add_val
)) == 0)
6031 /* Register will always be nonnegative, with value
6032 0 on last iteration if loop reversed */
6034 /* Save some info needed to produce the new insns. */
6035 reg
= bl
->biv
->dest_reg
;
6036 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6037 if (jump_label
== pc_rtx
)
6038 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6039 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6041 final_value
= XEXP (comparison
, 1);
6042 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6043 - INTVAL (bl
->biv
->add_val
));
6045 /* Initialize biv to start_value before loop start.
6046 The old initializing insn will be deleted as a
6047 dead store by flow.c. */
6048 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6050 /* Add insn to decrement register, and delete insn
6051 that incremented the register. */
6052 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6054 delete_insn (bl
->biv
->insn
);
6056 /* Update biv info to reflect its new status. */
6058 bl
->initial_value
= start_value
;
6059 bl
->biv
->add_val
= new_add_val
;
6061 /* Inc LABEL_NUSES so that delete_insn will
6062 not delete the label. */
6063 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6065 /* Emit an insn after the end of the loop to set the biv's
6066 proper exit value if it is used anywhere outside the loop. */
6067 if ((regno_last_uid
[bl
->regno
]
6068 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6070 || regno_first_uid
[bl
->regno
] != INSN_UID (bl
->init_insn
))
6071 emit_insn_after (gen_move_insn (reg
, final_value
),
6074 /* Delete compare/branch at end of loop. */
6075 delete_insn (PREV_INSN (loop_end
));
6076 delete_insn (PREV_INSN (loop_end
));
6078 /* Add new compare/branch insn at end of loop. */
6080 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6081 GET_MODE (reg
), 0, 0);
6082 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6083 tem
= gen_sequence ();
6085 emit_jump_insn_before (tem
, loop_end
);
6087 for (tem
= PREV_INSN (loop_end
);
6088 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6092 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6094 /* Increment of LABEL_NUSES done above. */
6095 /* Register is now always nonnegative,
6096 so add REG_NONNEG note to the branch. */
6097 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6103 /* Mark that this biv has been reversed. Each giv which depends
6104 on this biv, and which is also live past the end of the loop
6105 will have to be fixed up. */
6109 if (loop_dump_stream
)
6110 fprintf (loop_dump_stream
,
6111 "Reversed loop and added reg_nonneg\n");
6121 /* Verify whether the biv BL appears to be eliminable,
6122 based on the insns in the loop that refer to it.
6123 LOOP_START is the first insn of the loop, and END is the end insn.
6125 If ELIMINATE_P is non-zero, actually do the elimination.
6127 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6128 determine whether invariant insns should be placed inside or at the
6129 start of the loop. */
6132 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6133 struct iv_class
*bl
;
6137 int threshold
, insn_count
;
6139 rtx reg
= bl
->biv
->dest_reg
;
6142 /* Scan all insns in the loop, stopping if we find one that uses the
6143 biv in a way that we cannot eliminate. */
6145 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6147 enum rtx_code code
= GET_CODE (p
);
6148 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6150 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6151 && reg_mentioned_p (reg
, PATTERN (p
))
6152 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6154 if (loop_dump_stream
)
6155 fprintf (loop_dump_stream
,
6156 "Cannot eliminate biv %d: biv used in insn %d.\n",
6157 bl
->regno
, INSN_UID (p
));
6164 if (loop_dump_stream
)
6165 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6166 bl
->regno
, eliminate_p
? "was" : "can be");
6173 /* If BL appears in X (part of the pattern of INSN), see if we can
6174 eliminate its use. If so, return 1. If not, return 0.
6176 If BIV does not appear in X, return 1.
6178 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6179 where extra insns should be added. Depending on how many items have been
6180 moved out of the loop, it will either be before INSN or at the start of
6184 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6186 struct iv_class
*bl
;
6190 enum rtx_code code
= GET_CODE (x
);
6191 rtx reg
= bl
->biv
->dest_reg
;
6192 enum machine_mode mode
= GET_MODE (reg
);
6193 struct induction
*v
;
6202 /* If we haven't already been able to do something with this BIV,
6203 we can't eliminate it. */
6209 /* If this sets the BIV, it is not a problem. */
6210 if (SET_DEST (x
) == reg
)
6213 /* If this is an insn that defines a giv, it is also ok because
6214 it will go away when the giv is reduced. */
6215 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6216 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6220 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6222 /* Can replace with any giv that was reduced and
6223 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6224 Require a constant for MULT_VAL, so we know it's nonzero.
6225 ??? We disable this optimization to avoid potential
6228 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6229 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6230 && v
->add_val
== const0_rtx
6231 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6235 /* If the giv V had the auto-inc address optimization applied
6236 to it, and INSN occurs between the giv insn and the biv
6237 insn, then we must adjust the value used here.
6238 This is rare, so we don't bother to do so. */
6240 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6241 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6242 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6243 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6249 /* If the giv has the opposite direction of change,
6250 then reverse the comparison. */
6251 if (INTVAL (v
->mult_val
) < 0)
6252 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6253 const0_rtx
, v
->new_reg
);
6257 /* We can probably test that giv's reduced reg. */
6258 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6262 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6263 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6264 Require a constant for MULT_VAL, so we know it's nonzero.
6265 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6266 overflow problem. */
6268 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6269 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6270 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6272 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6273 || GET_CODE (v
->add_val
) == LABEL_REF
6274 || GET_CODE (v
->add_val
) == CONST
6275 || (GET_CODE (v
->add_val
) == REG
6276 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6278 /* If the giv V had the auto-inc address optimization applied
6279 to it, and INSN occurs between the giv insn and the biv
6280 insn, then we must adjust the value used here.
6281 This is rare, so we don't bother to do so. */
6283 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6284 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6285 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6286 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6292 /* If the giv has the opposite direction of change,
6293 then reverse the comparison. */
6294 if (INTVAL (v
->mult_val
) < 0)
6295 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6298 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6299 copy_rtx (v
->add_val
));
6301 /* Replace biv with the giv's reduced register. */
6302 update_reg_last_use (v
->add_val
, insn
);
6303 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6306 /* Insn doesn't support that constant or invariant. Copy it
6307 into a register (it will be a loop invariant.) */
6308 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6310 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6313 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)),
6314 gen_rtx (COMPARE
, VOIDmode
,
6315 v
->new_reg
, tem
), 0))
6324 case GT
: case GE
: case GTU
: case GEU
:
6325 case LT
: case LE
: case LTU
: case LEU
:
6326 /* See if either argument is the biv. */
6327 if (XEXP (x
, 0) == reg
)
6328 arg
= XEXP (x
, 1), arg_operand
= 1;
6329 else if (XEXP (x
, 1) == reg
)
6330 arg
= XEXP (x
, 0), arg_operand
= 0;
6334 if (CONSTANT_P (arg
))
6336 /* First try to replace with any giv that has constant positive
6337 mult_val and constant add_val. We might be able to support
6338 negative mult_val, but it seems complex to do it in general. */
6340 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6341 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6342 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6343 || GET_CODE (v
->add_val
) == LABEL_REF
6344 || GET_CODE (v
->add_val
) == CONST
6345 || (GET_CODE (v
->add_val
) == REG
6346 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6347 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6350 /* If the giv V had the auto-inc address optimization applied
6351 to it, and INSN occurs between the giv insn and the biv
6352 insn, then we must adjust the value used here.
6353 This is rare, so we don't bother to do so. */
6355 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6356 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6357 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6358 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6364 /* Replace biv with the giv's reduced reg. */
6365 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6367 /* If all constants are actually constant integers and
6368 the derived constant can be directly placed in the COMPARE,
6370 if (GET_CODE (arg
) == CONST_INT
6371 && GET_CODE (v
->mult_val
) == CONST_INT
6372 && GET_CODE (v
->add_val
) == CONST_INT
6373 && validate_change (insn
, &XEXP (x
, arg_operand
),
6374 GEN_INT (INTVAL (arg
)
6375 * INTVAL (v
->mult_val
)
6376 + INTVAL (v
->add_val
)), 0))
6379 /* Otherwise, load it into a register. */
6380 tem
= gen_reg_rtx (mode
);
6381 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6382 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6385 /* If that failed, put back the change we made above. */
6386 XEXP (x
, 1-arg_operand
) = reg
;
6389 /* Look for giv with positive constant mult_val and nonconst add_val.
6390 Insert insns to calculate new compare value.
6391 ??? Turn this off due to possible overflow. */
6393 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6394 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6395 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6401 /* If the giv V had the auto-inc address optimization applied
6402 to it, and INSN occurs between the giv insn and the biv
6403 insn, then we must adjust the value used here.
6404 This is rare, so we don't bother to do so. */
6406 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6407 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6408 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6409 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6415 tem
= gen_reg_rtx (mode
);
6417 /* Replace biv with giv's reduced register. */
6418 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6421 /* Compute value to compare against. */
6422 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6423 /* Use it in this insn. */
6424 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6425 if (apply_change_group ())
6429 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6431 if (invariant_p (arg
) == 1)
6433 /* Look for giv with constant positive mult_val and nonconst
6434 add_val. Insert insns to compute new compare value.
6435 ??? Turn this off due to possible overflow. */
6437 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6438 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6439 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6445 /* If the giv V had the auto-inc address optimization applied
6446 to it, and INSN occurs between the giv insn and the biv
6447 insn, then we must adjust the value used here.
6448 This is rare, so we don't bother to do so. */
6450 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6451 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6452 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6453 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6459 tem
= gen_reg_rtx (mode
);
6461 /* Replace biv with giv's reduced register. */
6462 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6465 /* Compute value to compare against. */
6466 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6468 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6469 if (apply_change_group ())
6474 /* This code has problems. Basically, you can't know when
6475 seeing if we will eliminate BL, whether a particular giv
6476 of ARG will be reduced. If it isn't going to be reduced,
6477 we can't eliminate BL. We can try forcing it to be reduced,
6478 but that can generate poor code.
6480 The problem is that the benefit of reducing TV, below should
6481 be increased if BL can actually be eliminated, but this means
6482 we might have to do a topological sort of the order in which
6483 we try to process biv. It doesn't seem worthwhile to do
6484 this sort of thing now. */
6487 /* Otherwise the reg compared with had better be a biv. */
6488 if (GET_CODE (arg
) != REG
6489 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6492 /* Look for a pair of givs, one for each biv,
6493 with identical coefficients. */
6494 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6496 struct induction
*tv
;
6498 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6501 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6502 if (! tv
->ignore
&& ! tv
->maybe_dead
6503 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6504 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6505 && tv
->mode
== mode
)
6507 /* If the giv V had the auto-inc address optimization applied
6508 to it, and INSN occurs between the giv insn and the biv
6509 insn, then we must adjust the value used here.
6510 This is rare, so we don't bother to do so. */
6512 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6513 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6514 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6515 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6521 /* Replace biv with its giv's reduced reg. */
6522 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6523 /* Replace other operand with the other giv's
6525 XEXP (x
, arg_operand
) = tv
->new_reg
;
6532 /* If we get here, the biv can't be eliminated. */
6536 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6537 biv is used in it, since it will be replaced. */
6538 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6539 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6544 /* See if any subexpression fails elimination. */
6545 fmt
= GET_RTX_FORMAT (code
);
6546 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6551 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6552 eliminate_p
, where
))
6557 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6558 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6559 eliminate_p
, where
))
6568 /* Return nonzero if the last use of REG
6569 is in an insn following INSN in the same basic block. */
6572 last_use_this_basic_block (reg
, insn
)
6578 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6581 if (regno_last_uid
[REGNO (reg
)] == INSN_UID (n
))
6587 /* Called via `note_stores' to record the initial value of a biv. Here we
6588 just record the location of the set and process it later. */
6591 record_initial (dest
, set
)
6595 struct iv_class
*bl
;
6597 if (GET_CODE (dest
) != REG
6598 || REGNO (dest
) >= max_reg_before_loop
6599 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6602 bl
= reg_biv_class
[REGNO (dest
)];
6604 /* If this is the first set found, record it. */
6605 if (bl
->init_insn
== 0)
6607 bl
->init_insn
= note_insn
;
6612 /* If any of the registers in X are "old" and currently have a last use earlier
6613 than INSN, update them to have a last use of INSN. Their actual last use
6614 will be the previous insn but it will not have a valid uid_luid so we can't
6618 update_reg_last_use (x
, insn
)
6622 /* Check for the case where INSN does not have a valid luid. In this case,
6623 there is no need to modify the regno_last_uid, as this can only happen
6624 when code is inserted after the loop_end to set a pseudo's final value,
6625 and hence this insn will never be the last use of x. */
6626 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6627 && INSN_UID (insn
) < max_uid_for_loop
6628 && uid_luid
[regno_last_uid
[REGNO (x
)]] < uid_luid
[INSN_UID (insn
)])
6629 regno_last_uid
[REGNO (x
)] = INSN_UID (insn
);
6633 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6634 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6637 update_reg_last_use (XEXP (x
, i
), insn
);
6638 else if (fmt
[i
] == 'E')
6639 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6640 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6645 /* Given a jump insn JUMP, return the condition that will cause it to branch
6646 to its JUMP_LABEL. If the condition cannot be understood, or is an
6647 inequality floating-point comparison which needs to be reversed, 0 will
6650 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6651 insn used in locating the condition was found. If a replacement test
6652 of the condition is desired, it should be placed in front of that
6653 insn and we will be sure that the inputs are still valid.
6655 The condition will be returned in a canonical form to simplify testing by
6656 callers. Specifically:
6658 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6659 (2) Both operands will be machine operands; (cc0) will have been replaced.
6660 (3) If an operand is a constant, it will be the second operand.
6661 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6662 for GE, GEU, and LEU. */
6665 get_condition (jump
, earliest
)
6674 int reverse_code
= 0;
6675 int did_reverse_condition
= 0;
6677 /* If this is not a standard conditional jump, we can't parse it. */
6678 if (GET_CODE (jump
) != JUMP_INSN
6679 || ! condjump_p (jump
) || simplejump_p (jump
))
6682 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6683 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6684 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6689 /* If this branches to JUMP_LABEL when the condition is false, reverse
6691 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6692 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6693 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6695 /* If we are comparing a register with zero, see if the register is set
6696 in the previous insn to a COMPARE or a comparison operation. Perform
6697 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6700 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6702 /* Set non-zero when we find something of interest. */
6706 /* If comparison with cc0, import actual comparison from compare
6710 if ((prev
= prev_nonnote_insn (prev
)) == 0
6711 || GET_CODE (prev
) != INSN
6712 || (set
= single_set (prev
)) == 0
6713 || SET_DEST (set
) != cc0_rtx
)
6716 op0
= SET_SRC (set
);
6717 op1
= CONST0_RTX (GET_MODE (op0
));
6723 /* If this is a COMPARE, pick up the two things being compared. */
6724 if (GET_CODE (op0
) == COMPARE
)
6726 op1
= XEXP (op0
, 1);
6727 op0
= XEXP (op0
, 0);
6730 else if (GET_CODE (op0
) != REG
)
6733 /* Go back to the previous insn. Stop if it is not an INSN. We also
6734 stop if it isn't a single set or if it has a REG_INC note because
6735 we don't want to bother dealing with it. */
6737 if ((prev
= prev_nonnote_insn (prev
)) == 0
6738 || GET_CODE (prev
) != INSN
6739 || FIND_REG_INC_NOTE (prev
, 0)
6740 || (set
= single_set (prev
)) == 0)
6743 /* If this is setting OP0, get what it sets it to if it looks
6745 if (rtx_equal_p (SET_DEST (set
), op0
))
6747 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6749 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6752 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6753 && (GET_MODE_BITSIZE (inner_mode
)
6754 <= HOST_BITS_PER_WIDE_INT
)
6755 && (STORE_FLAG_VALUE
6756 & ((HOST_WIDE_INT
) 1
6757 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6758 #ifdef FLOAT_STORE_FLAG_VALUE
6760 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6761 && FLOAT_STORE_FLAG_VALUE
< 0)
6764 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6766 else if (((code
== EQ
6768 && (GET_MODE_BITSIZE (inner_mode
)
6769 <= HOST_BITS_PER_WIDE_INT
)
6770 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6771 && (STORE_FLAG_VALUE
6772 & ((HOST_WIDE_INT
) 1
6773 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6774 #ifdef FLOAT_STORE_FLAG_VALUE
6776 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6777 && FLOAT_STORE_FLAG_VALUE
< 0)
6780 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6782 /* We might have reversed a LT to get a GE here. But this wasn't
6783 actually the comparison of data, so we don't flag that we
6784 have had to reverse the condition. */
6785 did_reverse_condition
^= 1;
6793 else if (reg_set_p (op0
, prev
))
6794 /* If this sets OP0, but not directly, we have to give up. */
6799 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6800 code
= GET_CODE (x
);
6803 code
= reverse_condition (code
);
6804 did_reverse_condition
^= 1;
6808 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6814 /* If constant is first, put it last. */
6815 if (CONSTANT_P (op0
))
6816 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6818 /* If OP0 is the result of a comparison, we weren't able to find what
6819 was really being compared, so fail. */
6820 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6823 /* Canonicalize any ordered comparison with integers involving equality
6824 if we can do computations in the relevant mode and we do not
6827 if (GET_CODE (op1
) == CONST_INT
6828 && GET_MODE (op0
) != VOIDmode
6829 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
6831 HOST_WIDE_INT const_val
= INTVAL (op1
);
6832 unsigned HOST_WIDE_INT uconst_val
= const_val
;
6833 unsigned HOST_WIDE_INT max_val
6834 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
6839 if (const_val
!= max_val
>> 1)
6840 code
= LT
, op1
= GEN_INT (const_val
+ 1);
6845 != (((HOST_WIDE_INT
) 1
6846 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
6847 code
= GT
, op1
= GEN_INT (const_val
- 1);
6851 if (uconst_val
!= max_val
)
6852 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
6856 if (uconst_val
!= 0)
6857 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
6862 /* If this was floating-point and we reversed anything other than an
6863 EQ or NE, return zero. */
6864 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
6865 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
6867 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
6871 /* Never return CC0; return zero instead. */
6876 return gen_rtx (code
, VOIDmode
, op0
, op1
);
6879 /* Similar to above routine, except that we also put an invariant last
6880 unless both operands are invariants. */
6883 get_condition_for_loop (x
)
6886 rtx comparison
= get_condition (x
, NULL_PTR
);
6889 || ! invariant_p (XEXP (comparison
, 0))
6890 || invariant_p (XEXP (comparison
, 1)))
6893 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
6894 XEXP (comparison
, 1), XEXP (comparison
, 0));