1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* For each loop, remember its unrolling factor (if at all).
95 contents of the array:
97 -1: completely unrolled - no further instrumentation is needed.
98 >1: holds the exact amount of unrolling. */
100 int *loop_unroll_factor
;
101 int *loop_unroll_iter
;
103 /* loop parameters for arithmetic loops. These loops have a loop variable
104 which is initialized to loop_start_value, incremented in each iteration
105 by "loop_increment". At the end of the iteration the loop variable is
106 compared to the loop_comparison_value (using loop_comparison_code). */
109 rtx
*loop_comparison_value
;
110 rtx
*loop_start_value
;
111 enum rtx_code
*loop_comparison_code
;
113 /* for debugging: selects sub-range of loops for which the bct optimization
114 is invoked. The numbering is per compilation-unit. */
115 int dbg_bct_min
= -1;
116 int dbg_bct_max
= -1;
120 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
121 really a loop (an insn outside the loop branches into it). */
123 static char *loop_invalid
;
125 /* Indexed by loop number, links together all LABEL_REFs which refer to
126 code labels outside the loop. Used by routines that need to know all
127 loop exits, such as final_biv_value and final_giv_value.
129 This does not include loop exits due to return instructions. This is
130 because all bivs and givs are pseudos, and hence must be dead after a
131 return, so the presense of a return does not affect any of the
132 optimizations that use this info. It is simpler to just not include return
133 instructions on this list. */
135 rtx
*loop_number_exit_labels
;
137 /* Indexed by loop number, counts the number of LABEL_REFs on
138 loop_number_exit_labels for this loop and all loops nested inside it. */
140 int *loop_number_exit_count
;
142 /* Holds the number of loop iterations. It is zero if the number could not be
143 calculated. Must be unsigned since the number of iterations can
144 be as high as 2^wordsize-1. For loops with a wider iterator, this number
145 will will be zero if the number of loop iterations is too large for an
146 unsigned integer to hold. */
148 unsigned HOST_WIDE_INT loop_n_iterations
;
150 /* Nonzero if there is a subroutine call in the current loop. */
152 static int loop_has_call
;
154 /* Nonzero if there is a volatile memory reference in the current
157 static int loop_has_volatile
;
159 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
160 current loop. A continue statement will generate a branch to
161 NEXT_INSN (loop_continue). */
163 static rtx loop_continue
;
165 /* Indexed by register number, contains the number of times the reg
166 is set during the loop being scanned.
167 During code motion, a negative value indicates a reg that has been
168 made a candidate; in particular -2 means that it is an candidate that
169 we know is equal to a constant and -1 means that it is an candidate
170 not known equal to a constant.
171 After code motion, regs moved have 0 (which is accurate now)
172 while the failed candidates have the original number of times set.
174 Therefore, at all times, == 0 indicates an invariant register;
175 < 0 a conditionally invariant one. */
177 static int *n_times_set
;
179 /* Original value of n_times_set; same except that this value
180 is not set negative for a reg whose sets have been made candidates
181 and not set to 0 for a reg that is moved. */
183 static int *n_times_used
;
185 /* Index by register number, 1 indicates that the register
186 cannot be moved or strength reduced. */
188 static char *may_not_optimize
;
190 /* Nonzero means reg N has already been moved out of one loop.
191 This reduces the desire to move it out of another. */
193 static char *moved_once
;
195 /* Array of MEMs that are stored in this loop. If there are too many to fit
196 here, we just turn on unknown_address_altered. */
198 #define NUM_STORES 30
199 static rtx loop_store_mems
[NUM_STORES
];
201 /* Index of first available slot in above array. */
202 static int loop_store_mems_idx
;
204 /* Nonzero if we don't know what MEMs were changed in the current loop.
205 This happens if the loop contains a call (in which case `loop_has_call'
206 will also be set) or if we store into more than NUM_STORES MEMs. */
208 static int unknown_address_altered
;
210 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
211 static int num_movables
;
213 /* Count of memory write instructions discovered in the loop. */
214 static int num_mem_sets
;
216 /* Number of loops contained within the current one, including itself. */
217 static int loops_enclosed
;
219 /* Bound on pseudo register number before loop optimization.
220 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
221 int max_reg_before_loop
;
223 /* This obstack is used in product_cheap_p to allocate its rtl. It
224 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
225 If we used the same obstack that it did, we would be deallocating
228 static struct obstack temp_obstack
;
230 /* This is where the pointer to the obstack being used for RTL is stored. */
232 extern struct obstack
*rtl_obstack
;
234 #define obstack_chunk_alloc xmalloc
235 #define obstack_chunk_free free
237 extern char *oballoc ();
239 /* During the analysis of a loop, a chain of `struct movable's
240 is made to record all the movable insns found.
241 Then the entire chain can be scanned to decide which to move. */
245 rtx insn
; /* A movable insn */
246 rtx set_src
; /* The expression this reg is set from. */
247 rtx set_dest
; /* The destination of this SET. */
248 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
249 of any registers used within the LIBCALL. */
250 int consec
; /* Number of consecutive following insns
251 that must be moved with this one. */
252 int regno
; /* The register it sets */
253 short lifetime
; /* lifetime of that register;
254 may be adjusted when matching movables
255 that load the same value are found. */
256 short savings
; /* Number of insns we can move for this reg,
257 including other movables that force this
258 or match this one. */
259 unsigned int cond
: 1; /* 1 if only conditionally movable */
260 unsigned int force
: 1; /* 1 means MUST move this insn */
261 unsigned int global
: 1; /* 1 means reg is live outside this loop */
262 /* If PARTIAL is 1, GLOBAL means something different:
263 that the reg is live outside the range from where it is set
264 to the following label. */
265 unsigned int done
: 1; /* 1 inhibits further processing of this */
267 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
268 In particular, moving it does not make it
270 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
271 load SRC, rather than copying INSN. */
272 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
273 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
274 that we should avoid changing when clearing
275 the rest of the reg. */
276 struct movable
*match
; /* First entry for same value */
277 struct movable
*forces
; /* An insn that must be moved if this is */
278 struct movable
*next
;
281 FILE *loop_dump_stream
;
283 /* Forward declarations. */
285 static void find_and_verify_loops ();
286 static void mark_loop_jump ();
287 static void prescan_loop ();
288 static int reg_in_basic_block_p ();
289 static int consec_sets_invariant_p ();
290 static rtx
libcall_other_reg ();
291 static int labels_in_range_p ();
292 static void count_loop_regs_set ();
293 static void note_addr_stored ();
294 static int loop_reg_used_before_p ();
295 static void scan_loop ();
296 static void replace_call_address ();
297 static rtx
skip_consec_insns ();
298 static int libcall_benefit ();
299 static void ignore_some_movables ();
300 static void force_movables ();
301 static void combine_movables ();
302 static int rtx_equal_for_loop_p ();
303 static void move_movables ();
304 static void strength_reduce ();
305 static int valid_initial_value_p ();
306 static void find_mem_givs ();
307 static void record_biv ();
308 static void check_final_value ();
309 static void record_giv ();
310 static void update_giv_derive ();
311 static int basic_induction_var ();
312 static rtx
simplify_giv_expr ();
313 static int general_induction_var ();
314 static int consec_sets_giv ();
315 static int check_dbra_loop ();
316 static rtx
express_from ();
317 static int combine_givs_p ();
318 static void combine_givs ();
319 static int product_cheap_p ();
320 static int maybe_eliminate_biv ();
321 static int maybe_eliminate_biv_1 ();
322 static int last_use_this_basic_block ();
323 static void record_initial ();
324 static void update_reg_last_use ();
327 /* This is extern from unroll.c */
328 void iteration_info ();
330 /* Two main functions for implementing bct:
331 first - to be called before loop unrolling, and the second - after */
332 static void analyze_loop_iterations ();
333 static void insert_bct ();
335 /* Auxiliary function that inserts the bct pattern into the loop */
336 static void instrument_loop_bct ();
338 /* Indirect_jump_in_function is computed once per function. */
339 int indirect_jump_in_function
= 0;
340 static int indirect_jump_in_function_p ();
344 /* Debugging functions. */
345 int fix_bct_param ();
346 static int check_bct_param ();
350 /* Relative gain of eliminating various kinds of operations. */
357 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
358 copy the value of the strength reduced giv to its original register. */
364 char *free_point
= (char *) oballoc (1);
365 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
367 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
369 /* We multiply by 2 to reconcile the difference in scale between
370 these two ways of computing costs. Otherwise the cost of a copy
371 will be far less than the cost of an add. */
375 /* Free the objects we just allocated. */
378 /* Initialize the obstack used for rtl in product_cheap_p. */
379 gcc_obstack_init (&temp_obstack
);
382 /* Entry point of this file. Perform loop optimization
383 on the current function. F is the first insn of the function
384 and DUMPFILE is a stream for output of a trace of actions taken
385 (or 0 if none should be output). */
388 loop_optimize (f
, dumpfile
)
389 /* f is the first instruction of a chain of insns for one function */
397 loop_dump_stream
= dumpfile
;
399 init_recog_no_volatile ();
400 init_alias_analysis ();
402 max_reg_before_loop
= max_reg_num ();
404 moved_once
= (char *) alloca (max_reg_before_loop
);
405 bzero (moved_once
, max_reg_before_loop
);
409 /* Count the number of loops. */
412 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
414 if (GET_CODE (insn
) == NOTE
415 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
419 /* Don't waste time if no loops. */
420 if (max_loop_num
== 0)
423 /* Get size to use for tables indexed by uids.
424 Leave some space for labels allocated by find_and_verify_loops. */
425 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
427 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
428 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
430 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
431 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
433 /* Allocate tables for recording each loop. We set each entry, so they need
435 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
436 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
437 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
438 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
439 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
440 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
443 /* Allocate for BCT optimization */
444 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
445 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
447 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
448 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
450 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
451 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
453 loop_unroll_iter
= (int *) alloca (max_loop_num
*sizeof (int));
454 bzero ((char *) loop_unroll_iter
, max_loop_num
* sizeof (int));
456 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
457 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
458 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
459 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
460 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
461 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
464 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
465 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
468 /* Find and process each loop.
469 First, find them, and record them in order of their beginnings. */
470 find_and_verify_loops (f
);
472 /* Now find all register lifetimes. This must be done after
473 find_and_verify_loops, because it might reorder the insns in the
475 reg_scan (f
, max_reg_num (), 1);
477 /* See if we went too far. */
478 if (get_max_uid () > max_uid_for_loop
)
481 /* Compute the mapping from uids to luids.
482 LUIDs are numbers assigned to insns, like uids,
483 except that luids increase monotonically through the code.
484 Don't assign luids to line-number NOTEs, so that the distance in luids
485 between two insns is not affected by -g. */
487 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
490 if (GET_CODE (insn
) != NOTE
491 || NOTE_LINE_NUMBER (insn
) <= 0)
492 uid_luid
[INSN_UID (insn
)] = ++i
;
494 /* Give a line number note the same luid as preceding insn. */
495 uid_luid
[INSN_UID (insn
)] = i
;
500 /* Don't leave gaps in uid_luid for insns that have been
501 deleted. It is possible that the first or last insn
502 using some register has been deleted by cross-jumping.
503 Make sure that uid_luid for that former insn's uid
504 points to the general area where that insn used to be. */
505 for (i
= 0; i
< max_uid_for_loop
; i
++)
507 uid_luid
[0] = uid_luid
[i
];
508 if (uid_luid
[0] != 0)
511 for (i
= 0; i
< max_uid_for_loop
; i
++)
512 if (uid_luid
[i
] == 0)
513 uid_luid
[i
] = uid_luid
[i
- 1];
515 /* Create a mapping from loops to BLOCK tree nodes. */
516 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
517 find_loop_tree_blocks ();
520 /* determine if the function has indirect jump. If it does,
521 we cannot instrument loops in this function with bct */
522 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
525 /* Now scan the loops, last ones first, since this means inner ones are done
526 before outer ones. */
527 for (i
= max_loop_num
-1; i
>= 0; i
--)
528 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
529 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
532 /* If debugging and unrolling loops, we must replicate the tree nodes
533 corresponding to the blocks inside the loop, so that the original one
534 to one mapping will remain. */
535 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
536 unroll_block_trees ();
539 /* Optimize one loop whose start is LOOP_START and end is END.
540 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
541 NOTE_INSN_LOOP_END. */
543 /* ??? Could also move memory writes out of loops if the destination address
544 is invariant, the source is invariant, the memory write is not volatile,
545 and if we can prove that no read inside the loop can read this address
546 before the write occurs. If there is a read of this address after the
547 write, then we can also mark the memory read as invariant. */
550 scan_loop (loop_start
, end
, nregs
)
556 /* 1 if we are scanning insns that could be executed zero times. */
558 /* 1 if we are scanning insns that might never be executed
559 due to a subroutine call which might exit before they are reached. */
561 /* For a rotated loop that is entered near the bottom,
562 this is the label at the top. Otherwise it is zero. */
564 /* Jump insn that enters the loop, or 0 if control drops in. */
565 rtx loop_entry_jump
= 0;
566 /* Place in the loop where control enters. */
568 /* Number of insns in the loop. */
573 /* The SET from an insn, if it is the only SET in the insn. */
575 /* Chain describing insns movable in current loop. */
576 struct movable
*movables
= 0;
577 /* Last element in `movables' -- so we can add elements at the end. */
578 struct movable
*last_movable
= 0;
579 /* Ratio of extra register life span we can justify
580 for saving an instruction. More if loop doesn't call subroutines
581 since in that case saving an insn makes more difference
582 and more registers are available. */
584 /* If we have calls, contains the insn in which a register was used
585 if it was used exactly once; contains const0_rtx if it was used more
587 rtx
*reg_single_usage
= 0;
588 /* Nonzero if we are scanning instructions in a sub-loop. */
591 n_times_set
= (int *) alloca (nregs
* sizeof (int));
592 n_times_used
= (int *) alloca (nregs
* sizeof (int));
593 may_not_optimize
= (char *) alloca (nregs
);
595 /* Determine whether this loop starts with a jump down to a test at
596 the end. This will occur for a small number of loops with a test
597 that is too complex to duplicate in front of the loop.
599 We search for the first insn or label in the loop, skipping NOTEs.
600 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
601 (because we might have a loop executed only once that contains a
602 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
603 (in case we have a degenerate loop).
605 Note that if we mistakenly think that a loop is entered at the top
606 when, in fact, it is entered at the exit test, the only effect will be
607 slightly poorer optimization. Making the opposite error can generate
608 incorrect code. Since very few loops now start with a jump to the
609 exit test, the code here to detect that case is very conservative. */
611 for (p
= NEXT_INSN (loop_start
);
613 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
614 && (GET_CODE (p
) != NOTE
615 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
616 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
622 /* Set up variables describing this loop. */
623 prescan_loop (loop_start
, end
);
624 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
626 /* If loop has a jump before the first label,
627 the true entry is the target of that jump.
628 Start scan from there.
629 But record in LOOP_TOP the place where the end-test jumps
630 back to so we can scan that after the end of the loop. */
631 if (GET_CODE (p
) == JUMP_INSN
)
635 /* Loop entry must be unconditional jump (and not a RETURN) */
637 && JUMP_LABEL (p
) != 0
638 /* Check to see whether the jump actually
639 jumps out of the loop (meaning it's no loop).
640 This case can happen for things like
641 do {..} while (0). If this label was generated previously
642 by loop, we can't tell anything about it and have to reject
644 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
645 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
646 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
648 loop_top
= next_label (scan_start
);
649 scan_start
= JUMP_LABEL (p
);
653 /* If SCAN_START was an insn created by loop, we don't know its luid
654 as required by loop_reg_used_before_p. So skip such loops. (This
655 test may never be true, but it's best to play it safe.)
657 Also, skip loops where we do not start scanning at a label. This
658 test also rejects loops starting with a JUMP_INSN that failed the
661 if (INSN_UID (scan_start
) >= max_uid_for_loop
662 || GET_CODE (scan_start
) != CODE_LABEL
)
664 if (loop_dump_stream
)
665 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
666 INSN_UID (loop_start
), INSN_UID (end
));
670 /* Count number of times each reg is set during this loop.
671 Set may_not_optimize[I] if it is not safe to move out
672 the setting of register I. If this loop has calls, set
673 reg_single_usage[I]. */
675 bzero ((char *) n_times_set
, nregs
* sizeof (int));
676 bzero (may_not_optimize
, nregs
);
680 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
681 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
684 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
685 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
687 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
688 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
689 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
691 if (loop_dump_stream
)
693 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
694 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
696 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
697 INSN_UID (loop_continue
));
700 /* Scan through the loop finding insns that are safe to move.
701 Set n_times_set negative for the reg being set, so that
702 this reg will be considered invariant for subsequent insns.
703 We consider whether subsequent insns use the reg
704 in deciding whether it is worth actually moving.
706 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
707 and therefore it is possible that the insns we are scanning
708 would never be executed. At such times, we must make sure
709 that it is safe to execute the insn once instead of zero times.
710 When MAYBE_NEVER is 0, all insns will be executed at least once
711 so that is not a problem. */
717 /* At end of a straight-in loop, we are done.
718 At end of a loop entered at the bottom, scan the top. */
731 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
732 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
734 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
735 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
738 if (GET_CODE (p
) == INSN
739 && (set
= single_set (p
))
740 && GET_CODE (SET_DEST (set
)) == REG
741 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
746 rtx src
= SET_SRC (set
);
747 rtx dependencies
= 0;
749 /* Figure out what to use as a source of this insn. If a REG_EQUIV
750 note is given or if a REG_EQUAL note with a constant operand is
751 specified, use it as the source and mark that we should move
752 this insn by calling emit_move_insn rather that duplicating the
755 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
757 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
759 src
= XEXP (temp
, 0), move_insn
= 1;
762 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
763 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
764 src
= XEXP (temp
, 0), move_insn
= 1;
765 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
767 src
= XEXP (temp
, 0);
768 /* A libcall block can use regs that don't appear in
769 the equivalent expression. To move the libcall,
770 we must move those regs too. */
771 dependencies
= libcall_other_reg (p
, src
);
775 /* Don't try to optimize a register that was made
776 by loop-optimization for an inner loop.
777 We don't know its life-span, so we can't compute the benefit. */
778 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
780 /* In order to move a register, we need to have one of three cases:
781 (1) it is used only in the same basic block as the set
782 (2) it is not a user variable and it is not used in the
783 exit test (this can cause the variable to be used
784 before it is set just like a user-variable).
785 (3) the set is guaranteed to be executed once the loop starts,
786 and the reg is not used until after that. */
787 else if (! ((! maybe_never
788 && ! loop_reg_used_before_p (set
, p
, loop_start
,
790 || (! REG_USERVAR_P (SET_DEST (set
))
791 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
792 || reg_in_basic_block_p (p
, SET_DEST (set
))))
794 else if ((tem
= invariant_p (src
))
795 && (dependencies
== 0
796 || (tem2
= invariant_p (dependencies
)) != 0)
797 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
799 = consec_sets_invariant_p (SET_DEST (set
),
800 n_times_set
[REGNO (SET_DEST (set
))],
802 /* If the insn can cause a trap (such as divide by zero),
803 can't move it unless it's guaranteed to be executed
804 once loop is entered. Even a function call might
805 prevent the trap insn from being reached
806 (since it might exit!) */
807 && ! ((maybe_never
|| call_passed
)
808 && may_trap_p (src
)))
810 register struct movable
*m
;
811 register int regno
= REGNO (SET_DEST (set
));
813 /* A potential lossage is where we have a case where two insns
814 can be combined as long as they are both in the loop, but
815 we move one of them outside the loop. For large loops,
816 this can lose. The most common case of this is the address
817 of a function being called.
819 Therefore, if this register is marked as being used exactly
820 once if we are in a loop with calls (a "large loop"), see if
821 we can replace the usage of this register with the source
822 of this SET. If we can, delete this insn.
824 Don't do this if P has a REG_RETVAL note or if we have
825 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
827 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
828 && reg_single_usage
[regno
] != const0_rtx
829 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
830 && (REGNO_LAST_UID (regno
)
831 == INSN_UID (reg_single_usage
[regno
]))
832 && n_times_set
[REGNO (SET_DEST (set
))] == 1
833 && ! side_effects_p (SET_SRC (set
))
834 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
835 #ifdef SMALL_REGISTER_CLASSES
836 && ! (SMALL_REGISTER_CLASSES
837 && GET_CODE (SET_SRC (set
)) == REG
838 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)
840 /* This test is not redundant; SET_SRC (set) might be
841 a call-clobbered register and the life of REGNO
842 might span a call. */
843 && ! modified_between_p (SET_SRC (set
), p
,
844 reg_single_usage
[regno
])
845 && no_labels_between_p (p
, reg_single_usage
[regno
])
846 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
847 reg_single_usage
[regno
]))
849 /* Replace any usage in a REG_EQUAL note. Must copy the
850 new source, so that we don't get rtx sharing between the
851 SET_SOURCE and REG_NOTES of insn p. */
852 REG_NOTES (reg_single_usage
[regno
])
853 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
854 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
857 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
858 NOTE_SOURCE_FILE (p
) = 0;
859 n_times_set
[regno
] = 0;
863 m
= (struct movable
*) alloca (sizeof (struct movable
));
867 m
->dependencies
= dependencies
;
868 m
->set_dest
= SET_DEST (set
);
870 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
874 m
->move_insn
= move_insn
;
875 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
876 m
->savemode
= VOIDmode
;
878 /* Set M->cond if either invariant_p or consec_sets_invariant_p
879 returned 2 (only conditionally invariant). */
880 m
->cond
= ((tem
| tem1
| tem2
) > 1);
881 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
882 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
884 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
885 - uid_luid
[REGNO_FIRST_UID (regno
)]);
886 m
->savings
= n_times_used
[regno
];
887 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
888 m
->savings
+= libcall_benefit (p
);
889 n_times_set
[regno
] = move_insn
? -2 : -1;
890 /* Add M to the end of the chain MOVABLES. */
894 last_movable
->next
= m
;
899 /* Skip this insn, not checking REG_LIBCALL notes. */
900 p
= next_nonnote_insn (p
);
901 /* Skip the consecutive insns, if there are any. */
902 p
= skip_consec_insns (p
, m
->consec
);
903 /* Back up to the last insn of the consecutive group. */
904 p
= prev_nonnote_insn (p
);
906 /* We must now reset m->move_insn, m->is_equiv, and possibly
907 m->set_src to correspond to the effects of all the
909 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
911 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
914 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
915 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
916 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
921 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
924 /* If this register is always set within a STRICT_LOW_PART
925 or set to zero, then its high bytes are constant.
926 So clear them outside the loop and within the loop
927 just load the low bytes.
928 We must check that the machine has an instruction to do so.
929 Also, if the value loaded into the register
930 depends on the same register, this cannot be done. */
931 else if (SET_SRC (set
) == const0_rtx
932 && GET_CODE (NEXT_INSN (p
)) == INSN
933 && (set1
= single_set (NEXT_INSN (p
)))
934 && GET_CODE (set1
) == SET
935 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
936 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
937 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
939 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
941 register int regno
= REGNO (SET_DEST (set
));
942 if (n_times_set
[regno
] == 2)
944 register struct movable
*m
;
945 m
= (struct movable
*) alloca (sizeof (struct movable
));
948 m
->set_dest
= SET_DEST (set
);
956 /* If the insn may not be executed on some cycles,
957 we can't clear the whole reg; clear just high part.
958 Not even if the reg is used only within this loop.
965 Clearing x before the inner loop could clobber a value
966 being saved from the last time around the outer loop.
967 However, if the reg is not used outside this loop
968 and all uses of the register are in the same
969 basic block as the store, there is no problem.
971 If this insn was made by loop, we don't know its
972 INSN_LUID and hence must make a conservative
974 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
975 || (uid_luid
[REGNO_LAST_UID (regno
)]
977 || (uid_luid
[REGNO_FIRST_UID (regno
)]
979 || (labels_in_range_p
980 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
981 if (maybe_never
&& m
->global
)
982 m
->savemode
= GET_MODE (SET_SRC (set1
));
984 m
->savemode
= VOIDmode
;
988 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
989 - uid_luid
[REGNO_FIRST_UID (regno
)]);
991 n_times_set
[regno
] = -1;
992 /* Add M to the end of the chain MOVABLES. */
996 last_movable
->next
= m
;
1001 /* Past a call insn, we get to insns which might not be executed
1002 because the call might exit. This matters for insns that trap.
1003 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
1004 so they don't count. */
1005 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
1007 /* Past a label or a jump, we get to insns for which we
1008 can't count on whether or how many times they will be
1009 executed during each iteration. Therefore, we can
1010 only move out sets of trivial variables
1011 (those not used after the loop). */
1012 /* Similar code appears twice in strength_reduce. */
1013 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
1014 /* If we enter the loop in the middle, and scan around to the
1015 beginning, don't set maybe_never for that. This must be an
1016 unconditional jump, otherwise the code at the top of the
1017 loop might never be executed. Unconditional jumps are
1018 followed a by barrier then loop end. */
1019 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1020 && NEXT_INSN (NEXT_INSN (p
)) == end
1021 && simplejump_p (p
)))
1023 else if (GET_CODE (p
) == NOTE
)
1025 /* At the virtual top of a converted loop, insns are again known to
1026 be executed: logically, the loop begins here even though the exit
1027 code has been duplicated. */
1028 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1029 maybe_never
= call_passed
= 0;
1030 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1032 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1037 /* If one movable subsumes another, ignore that other. */
1039 ignore_some_movables (movables
);
1041 /* For each movable insn, see if the reg that it loads
1042 leads when it dies right into another conditionally movable insn.
1043 If so, record that the second insn "forces" the first one,
1044 since the second can be moved only if the first is. */
1046 force_movables (movables
);
1048 /* See if there are multiple movable insns that load the same value.
1049 If there are, make all but the first point at the first one
1050 through the `match' field, and add the priorities of them
1051 all together as the priority of the first. */
1053 combine_movables (movables
, nregs
);
1055 /* Now consider each movable insn to decide whether it is worth moving.
1056 Store 0 in n_times_set for each reg that is moved. */
1058 move_movables (movables
, threshold
,
1059 insn_count
, loop_start
, end
, nregs
);
1061 /* Now candidates that still are negative are those not moved.
1062 Change n_times_set to indicate that those are not actually invariant. */
1063 for (i
= 0; i
< nregs
; i
++)
1064 if (n_times_set
[i
] < 0)
1065 n_times_set
[i
] = n_times_used
[i
];
1067 if (flag_strength_reduce
)
1068 strength_reduce (scan_start
, end
, loop_top
,
1069 insn_count
, loop_start
, end
);
1072 /* Add elements to *OUTPUT to record all the pseudo-regs
1073 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1076 record_excess_regs (in_this
, not_in_this
, output
)
1077 rtx in_this
, not_in_this
;
1084 code
= GET_CODE (in_this
);
1098 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1099 && ! reg_mentioned_p (in_this
, not_in_this
))
1100 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1104 fmt
= GET_RTX_FORMAT (code
);
1105 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1112 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1113 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1117 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1123 /* Check what regs are referred to in the libcall block ending with INSN,
1124 aside from those mentioned in the equivalent value.
1125 If there are none, return 0.
1126 If there are one or more, return an EXPR_LIST containing all of them. */
1129 libcall_other_reg (insn
, equiv
)
1132 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1133 rtx p
= XEXP (note
, 0);
1136 /* First, find all the regs used in the libcall block
1137 that are not mentioned as inputs to the result. */
1141 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1142 || GET_CODE (p
) == CALL_INSN
)
1143 record_excess_regs (PATTERN (p
), equiv
, &output
);
1150 /* Return 1 if all uses of REG
1151 are between INSN and the end of the basic block. */
1154 reg_in_basic_block_p (insn
, reg
)
1157 int regno
= REGNO (reg
);
1160 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1163 /* Search this basic block for the already recorded last use of the reg. */
1164 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1166 switch (GET_CODE (p
))
1173 /* Ordinary insn: if this is the last use, we win. */
1174 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1179 /* Jump insn: if this is the last use, we win. */
1180 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1182 /* Otherwise, it's the end of the basic block, so we lose. */
1187 /* It's the end of the basic block, so we lose. */
1192 /* The "last use" doesn't follow the "first use"?? */
1196 /* Compute the benefit of eliminating the insns in the block whose
1197 last insn is LAST. This may be a group of insns used to compute a
1198 value directly or can contain a library call. */
1201 libcall_benefit (last
)
1207 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1208 insn
!= last
; insn
= NEXT_INSN (insn
))
1210 if (GET_CODE (insn
) == CALL_INSN
)
1211 benefit
+= 10; /* Assume at least this many insns in a library
1213 else if (GET_CODE (insn
) == INSN
1214 && GET_CODE (PATTERN (insn
)) != USE
1215 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1222 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1225 skip_consec_insns (insn
, count
)
1229 for (; count
> 0; count
--)
1233 /* If first insn of libcall sequence, skip to end. */
1234 /* Do this at start of loop, since INSN is guaranteed to
1236 if (GET_CODE (insn
) != NOTE
1237 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1238 insn
= XEXP (temp
, 0);
1240 do insn
= NEXT_INSN (insn
);
1241 while (GET_CODE (insn
) == NOTE
);
1247 /* Ignore any movable whose insn falls within a libcall
1248 which is part of another movable.
1249 We make use of the fact that the movable for the libcall value
1250 was made later and so appears later on the chain. */
1253 ignore_some_movables (movables
)
1254 struct movable
*movables
;
1256 register struct movable
*m
, *m1
;
1258 for (m
= movables
; m
; m
= m
->next
)
1260 /* Is this a movable for the value of a libcall? */
1261 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1265 /* Check for earlier movables inside that range,
1266 and mark them invalid. We cannot use LUIDs here because
1267 insns created by loop.c for prior loops don't have LUIDs.
1268 Rather than reject all such insns from movables, we just
1269 explicitly check each insn in the libcall (since invariant
1270 libcalls aren't that common). */
1271 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1272 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1273 if (m1
->insn
== insn
)
1279 /* For each movable insn, see if the reg that it loads
1280 leads when it dies right into another conditionally movable insn.
1281 If so, record that the second insn "forces" the first one,
1282 since the second can be moved only if the first is. */
1285 force_movables (movables
)
1286 struct movable
*movables
;
1288 register struct movable
*m
, *m1
;
1289 for (m1
= movables
; m1
; m1
= m1
->next
)
1290 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1291 if (!m1
->partial
&& !m1
->done
)
1293 int regno
= m1
->regno
;
1294 for (m
= m1
->next
; m
; m
= m
->next
)
1295 /* ??? Could this be a bug? What if CSE caused the
1296 register of M1 to be used after this insn?
1297 Since CSE does not update regno_last_uid,
1298 this insn M->insn might not be where it dies.
1299 But very likely this doesn't matter; what matters is
1300 that M's reg is computed from M1's reg. */
1301 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1304 if (m
!= 0 && m
->set_src
== m1
->set_dest
1305 /* If m->consec, m->set_src isn't valid. */
1309 /* Increase the priority of the moving the first insn
1310 since it permits the second to be moved as well. */
1314 m1
->lifetime
+= m
->lifetime
;
1315 m1
->savings
+= m1
->savings
;
1320 /* Find invariant expressions that are equal and can be combined into
1324 combine_movables (movables
, nregs
)
1325 struct movable
*movables
;
1328 register struct movable
*m
;
1329 char *matched_regs
= (char *) alloca (nregs
);
1330 enum machine_mode mode
;
1332 /* Regs that are set more than once are not allowed to match
1333 or be matched. I'm no longer sure why not. */
1334 /* Perhaps testing m->consec_sets would be more appropriate here? */
1336 for (m
= movables
; m
; m
= m
->next
)
1337 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1339 register struct movable
*m1
;
1340 int regno
= m
->regno
;
1342 bzero (matched_regs
, nregs
);
1343 matched_regs
[regno
] = 1;
1345 /* We want later insns to match the first one. Don't make the first
1346 one match any later ones. So start this loop at m->next. */
1347 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1348 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1349 /* A reg used outside the loop mustn't be eliminated. */
1351 /* A reg used for zero-extending mustn't be eliminated. */
1353 && (matched_regs
[m1
->regno
]
1356 /* Can combine regs with different modes loaded from the
1357 same constant only if the modes are the same or
1358 if both are integer modes with M wider or the same
1359 width as M1. The check for integer is redundant, but
1360 safe, since the only case of differing destination
1361 modes with equal sources is when both sources are
1362 VOIDmode, i.e., CONST_INT. */
1363 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1364 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1365 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1366 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1367 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1368 /* See if the source of M1 says it matches M. */
1369 && ((GET_CODE (m1
->set_src
) == REG
1370 && matched_regs
[REGNO (m1
->set_src
)])
1371 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1373 && ((m
->dependencies
== m1
->dependencies
)
1374 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1376 m
->lifetime
+= m1
->lifetime
;
1377 m
->savings
+= m1
->savings
;
1380 matched_regs
[m1
->regno
] = 1;
1384 /* Now combine the regs used for zero-extension.
1385 This can be done for those not marked `global'
1386 provided their lives don't overlap. */
1388 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1389 mode
= GET_MODE_WIDER_MODE (mode
))
1391 register struct movable
*m0
= 0;
1393 /* Combine all the registers for extension from mode MODE.
1394 Don't combine any that are used outside this loop. */
1395 for (m
= movables
; m
; m
= m
->next
)
1396 if (m
->partial
&& ! m
->global
1397 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1399 register struct movable
*m1
;
1400 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1401 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1405 /* First one: don't check for overlap, just record it. */
1410 /* Make sure they extend to the same mode.
1411 (Almost always true.) */
1412 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1415 /* We already have one: check for overlap with those
1416 already combined together. */
1417 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1418 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1419 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1420 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1423 /* No overlap: we can combine this with the others. */
1424 m0
->lifetime
+= m
->lifetime
;
1425 m0
->savings
+= m
->savings
;
1434 /* Return 1 if regs X and Y will become the same if moved. */
1437 regs_match_p (x
, y
, movables
)
1439 struct movable
*movables
;
1443 struct movable
*mx
, *my
;
1445 for (mx
= movables
; mx
; mx
= mx
->next
)
1446 if (mx
->regno
== xn
)
1449 for (my
= movables
; my
; my
= my
->next
)
1450 if (my
->regno
== yn
)
1454 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1456 || mx
== my
->match
));
1459 /* Return 1 if X and Y are identical-looking rtx's.
1460 This is the Lisp function EQUAL for rtx arguments.
1462 If two registers are matching movables or a movable register and an
1463 equivalent constant, consider them equal. */
1466 rtx_equal_for_loop_p (x
, y
, movables
)
1468 struct movable
*movables
;
1472 register struct movable
*m
;
1473 register enum rtx_code code
;
1478 if (x
== 0 || y
== 0)
1481 code
= GET_CODE (x
);
1483 /* If we have a register and a constant, they may sometimes be
1485 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1487 for (m
= movables
; m
; m
= m
->next
)
1488 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1489 && rtx_equal_p (m
->set_src
, y
))
1492 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1494 for (m
= movables
; m
; m
= m
->next
)
1495 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1496 && rtx_equal_p (m
->set_src
, x
))
1499 /* Otherwise, rtx's of different codes cannot be equal. */
1500 if (code
!= GET_CODE (y
))
1503 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1504 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1506 if (GET_MODE (x
) != GET_MODE (y
))
1509 /* These three types of rtx's can be compared nonrecursively. */
1511 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1513 if (code
== LABEL_REF
)
1514 return XEXP (x
, 0) == XEXP (y
, 0);
1515 if (code
== SYMBOL_REF
)
1516 return XSTR (x
, 0) == XSTR (y
, 0);
1518 /* Compare the elements. If any pair of corresponding elements
1519 fail to match, return 0 for the whole things. */
1521 fmt
= GET_RTX_FORMAT (code
);
1522 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1527 if (XWINT (x
, i
) != XWINT (y
, i
))
1532 if (XINT (x
, i
) != XINT (y
, i
))
1537 /* Two vectors must have the same length. */
1538 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1541 /* And the corresponding elements must match. */
1542 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1543 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1548 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1553 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1558 /* These are just backpointers, so they don't matter. */
1564 /* It is believed that rtx's at this level will never
1565 contain anything but integers and other rtx's,
1566 except for within LABEL_REFs and SYMBOL_REFs. */
1574 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1575 insns in INSNS which use thet reference. */
1578 add_label_notes (x
, insns
)
1582 enum rtx_code code
= GET_CODE (x
);
1587 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1589 rtx next
= next_real_insn (XEXP (x
, 0));
1591 /* Don't record labels that refer to dispatch tables.
1592 This is not necessary, since the tablejump references the same label.
1593 And if we did record them, flow.c would make worse code. */
1595 || ! (GET_CODE (next
) == JUMP_INSN
1596 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1597 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1599 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1600 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1601 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1607 fmt
= GET_RTX_FORMAT (code
);
1608 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1611 add_label_notes (XEXP (x
, i
), insns
);
1612 else if (fmt
[i
] == 'E')
1613 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1614 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1618 /* Scan MOVABLES, and move the insns that deserve to be moved.
1619 If two matching movables are combined, replace one reg with the
1620 other throughout. */
1623 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1624 struct movable
*movables
;
1632 register struct movable
*m
;
1634 /* Map of pseudo-register replacements to handle combining
1635 when we move several insns that load the same value
1636 into different pseudo-registers. */
1637 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1638 char *already_moved
= (char *) alloca (nregs
);
1640 bzero (already_moved
, nregs
);
1641 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1645 for (m
= movables
; m
; m
= m
->next
)
1647 /* Describe this movable insn. */
1649 if (loop_dump_stream
)
1651 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1652 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1654 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1656 fprintf (loop_dump_stream
, "cond ");
1658 fprintf (loop_dump_stream
, "force ");
1660 fprintf (loop_dump_stream
, "global ");
1662 fprintf (loop_dump_stream
, "done ");
1664 fprintf (loop_dump_stream
, "move-insn ");
1666 fprintf (loop_dump_stream
, "matches %d ",
1667 INSN_UID (m
->match
->insn
));
1669 fprintf (loop_dump_stream
, "forces %d ",
1670 INSN_UID (m
->forces
->insn
));
1673 /* Count movables. Value used in heuristics in strength_reduce. */
1676 /* Ignore the insn if it's already done (it matched something else).
1677 Otherwise, see if it is now safe to move. */
1681 || (1 == invariant_p (m
->set_src
)
1682 && (m
->dependencies
== 0
1683 || 1 == invariant_p (m
->dependencies
))
1685 || 1 == consec_sets_invariant_p (m
->set_dest
,
1688 && (! m
->forces
|| m
->forces
->done
))
1692 int savings
= m
->savings
;
1694 /* We have an insn that is safe to move.
1695 Compute its desirability. */
1700 if (loop_dump_stream
)
1701 fprintf (loop_dump_stream
, "savings %d ", savings
);
1703 if (moved_once
[regno
])
1707 if (loop_dump_stream
)
1708 fprintf (loop_dump_stream
, "halved since already moved ");
1711 /* An insn MUST be moved if we already moved something else
1712 which is safe only if this one is moved too: that is,
1713 if already_moved[REGNO] is nonzero. */
1715 /* An insn is desirable to move if the new lifetime of the
1716 register is no more than THRESHOLD times the old lifetime.
1717 If it's not desirable, it means the loop is so big
1718 that moving won't speed things up much,
1719 and it is liable to make register usage worse. */
1721 /* It is also desirable to move if it can be moved at no
1722 extra cost because something else was already moved. */
1724 if (already_moved
[regno
]
1725 || flag_move_all_movables
1726 || (threshold
* savings
* m
->lifetime
) >= insn_count
1727 || (m
->forces
&& m
->forces
->done
1728 && n_times_used
[m
->forces
->regno
] == 1))
1731 register struct movable
*m1
;
1734 /* Now move the insns that set the reg. */
1736 if (m
->partial
&& m
->match
)
1740 /* Find the end of this chain of matching regs.
1741 Thus, we load each reg in the chain from that one reg.
1742 And that reg is loaded with 0 directly,
1743 since it has ->match == 0. */
1744 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1745 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1746 SET_DEST (PATTERN (m1
->insn
)));
1747 i1
= emit_insn_before (newpat
, loop_start
);
1749 /* Mark the moved, invariant reg as being allowed to
1750 share a hard reg with the other matching invariant. */
1751 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1752 r1
= SET_DEST (PATTERN (m
->insn
));
1753 r2
= SET_DEST (PATTERN (m1
->insn
));
1754 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1755 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1757 delete_insn (m
->insn
);
1762 if (loop_dump_stream
)
1763 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1765 /* If we are to re-generate the item being moved with a
1766 new move insn, first delete what we have and then emit
1767 the move insn before the loop. */
1768 else if (m
->move_insn
)
1772 for (count
= m
->consec
; count
>= 0; count
--)
1774 /* If this is the first insn of a library call sequence,
1776 if (GET_CODE (p
) != NOTE
1777 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1780 /* If this is the last insn of a libcall sequence, then
1781 delete every insn in the sequence except the last.
1782 The last insn is handled in the normal manner. */
1783 if (GET_CODE (p
) != NOTE
1784 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1786 temp
= XEXP (temp
, 0);
1788 temp
= delete_insn (temp
);
1791 p
= delete_insn (p
);
1792 while (p
&& GET_CODE (p
) == NOTE
)
1797 emit_move_insn (m
->set_dest
, m
->set_src
);
1798 temp
= get_insns ();
1801 add_label_notes (m
->set_src
, temp
);
1803 i1
= emit_insns_before (temp
, loop_start
);
1804 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1806 = gen_rtx (EXPR_LIST
,
1807 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1808 m
->set_src
, REG_NOTES (i1
));
1810 if (loop_dump_stream
)
1811 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1813 /* The more regs we move, the less we like moving them. */
1818 for (count
= m
->consec
; count
>= 0; count
--)
1822 /* If first insn of libcall sequence, skip to end. */
1823 /* Do this at start of loop, since p is guaranteed to
1825 if (GET_CODE (p
) != NOTE
1826 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1829 /* If last insn of libcall sequence, move all
1830 insns except the last before the loop. The last
1831 insn is handled in the normal manner. */
1832 if (GET_CODE (p
) != NOTE
1833 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1837 rtx fn_address_insn
= 0;
1840 for (temp
= XEXP (temp
, 0); temp
!= p
;
1841 temp
= NEXT_INSN (temp
))
1847 if (GET_CODE (temp
) == NOTE
)
1850 body
= PATTERN (temp
);
1852 /* Find the next insn after TEMP,
1853 not counting USE or NOTE insns. */
1854 for (next
= NEXT_INSN (temp
); next
!= p
;
1855 next
= NEXT_INSN (next
))
1856 if (! (GET_CODE (next
) == INSN
1857 && GET_CODE (PATTERN (next
)) == USE
)
1858 && GET_CODE (next
) != NOTE
)
1861 /* If that is the call, this may be the insn
1862 that loads the function address.
1864 Extract the function address from the insn
1865 that loads it into a register.
1866 If this insn was cse'd, we get incorrect code.
1868 So emit a new move insn that copies the
1869 function address into the register that the
1870 call insn will use. flow.c will delete any
1871 redundant stores that we have created. */
1872 if (GET_CODE (next
) == CALL_INSN
1873 && GET_CODE (body
) == SET
1874 && GET_CODE (SET_DEST (body
)) == REG
1875 && (n
= find_reg_note (temp
, REG_EQUAL
,
1878 fn_reg
= SET_SRC (body
);
1879 if (GET_CODE (fn_reg
) != REG
)
1880 fn_reg
= SET_DEST (body
);
1881 fn_address
= XEXP (n
, 0);
1882 fn_address_insn
= temp
;
1884 /* We have the call insn.
1885 If it uses the register we suspect it might,
1886 load it with the correct address directly. */
1887 if (GET_CODE (temp
) == CALL_INSN
1889 && reg_referenced_p (fn_reg
, body
))
1890 emit_insn_after (gen_move_insn (fn_reg
,
1894 if (GET_CODE (temp
) == CALL_INSN
)
1896 i1
= emit_call_insn_before (body
, loop_start
);
1897 /* Because the USAGE information potentially
1898 contains objects other than hard registers
1899 we need to copy it. */
1900 if (CALL_INSN_FUNCTION_USAGE (temp
))
1901 CALL_INSN_FUNCTION_USAGE (i1
)
1902 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1905 i1
= emit_insn_before (body
, loop_start
);
1908 if (temp
== fn_address_insn
)
1909 fn_address_insn
= i1
;
1910 REG_NOTES (i1
) = REG_NOTES (temp
);
1914 if (m
->savemode
!= VOIDmode
)
1916 /* P sets REG to zero; but we should clear only
1917 the bits that are not covered by the mode
1919 rtx reg
= m
->set_dest
;
1925 (GET_MODE (reg
), and_optab
, reg
,
1926 GEN_INT ((((HOST_WIDE_INT
) 1
1927 << GET_MODE_BITSIZE (m
->savemode
)))
1929 reg
, 1, OPTAB_LIB_WIDEN
);
1933 emit_move_insn (reg
, tem
);
1934 sequence
= gen_sequence ();
1936 i1
= emit_insn_before (sequence
, loop_start
);
1938 else if (GET_CODE (p
) == CALL_INSN
)
1940 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1941 /* Because the USAGE information potentially
1942 contains objects other than hard registers
1943 we need to copy it. */
1944 if (CALL_INSN_FUNCTION_USAGE (p
))
1945 CALL_INSN_FUNCTION_USAGE (i1
)
1946 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1949 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1951 REG_NOTES (i1
) = REG_NOTES (p
);
1953 /* If there is a REG_EQUAL note present whose value is
1954 not loop invariant, then delete it, since it may
1955 cause problems with later optimization passes.
1956 It is possible for cse to create such notes
1957 like this as a result of record_jump_cond. */
1959 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1960 && ! invariant_p (XEXP (temp
, 0)))
1961 remove_note (i1
, temp
);
1966 if (loop_dump_stream
)
1967 fprintf (loop_dump_stream
, " moved to %d",
1971 /* This isn't needed because REG_NOTES is copied
1972 below and is wrong since P might be a PARALLEL. */
1973 if (REG_NOTES (i1
) == 0
1974 && ! m
->partial
/* But not if it's a zero-extend clr. */
1975 && ! m
->global
/* and not if used outside the loop
1976 (since it might get set outside). */
1977 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1979 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1980 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1983 /* If library call, now fix the REG_NOTES that contain
1984 insn pointers, namely REG_LIBCALL on FIRST
1985 and REG_RETVAL on I1. */
1986 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1988 XEXP (temp
, 0) = first
;
1989 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1990 XEXP (temp
, 0) = i1
;
1994 do p
= NEXT_INSN (p
);
1995 while (p
&& GET_CODE (p
) == NOTE
);
1998 /* The more regs we move, the less we like moving them. */
2002 /* Any other movable that loads the same register
2004 already_moved
[regno
] = 1;
2006 /* This reg has been moved out of one loop. */
2007 moved_once
[regno
] = 1;
2009 /* The reg set here is now invariant. */
2011 n_times_set
[regno
] = 0;
2015 /* Change the length-of-life info for the register
2016 to say it lives at least the full length of this loop.
2017 This will help guide optimizations in outer loops. */
2019 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2020 /* This is the old insn before all the moved insns.
2021 We can't use the moved insn because it is out of range
2022 in uid_luid. Only the old insns have luids. */
2023 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2024 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2025 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2027 /* Combine with this moved insn any other matching movables. */
2030 for (m1
= movables
; m1
; m1
= m1
->next
)
2035 /* Schedule the reg loaded by M1
2036 for replacement so that shares the reg of M.
2037 If the modes differ (only possible in restricted
2038 circumstances, make a SUBREG. */
2039 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2040 reg_map
[m1
->regno
] = m
->set_dest
;
2043 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2046 /* Get rid of the matching insn
2047 and prevent further processing of it. */
2050 /* if library call, delete all insn except last, which
2052 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2055 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2056 temp
= NEXT_INSN (temp
))
2059 delete_insn (m1
->insn
);
2061 /* Any other movable that loads the same register
2063 already_moved
[m1
->regno
] = 1;
2065 /* The reg merged here is now invariant,
2066 if the reg it matches is invariant. */
2068 n_times_set
[m1
->regno
] = 0;
2071 else if (loop_dump_stream
)
2072 fprintf (loop_dump_stream
, "not desirable");
2074 else if (loop_dump_stream
&& !m
->match
)
2075 fprintf (loop_dump_stream
, "not safe");
2077 if (loop_dump_stream
)
2078 fprintf (loop_dump_stream
, "\n");
2082 new_start
= loop_start
;
2084 /* Go through all the instructions in the loop, making
2085 all the register substitutions scheduled in REG_MAP. */
2086 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2087 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2088 || GET_CODE (p
) == CALL_INSN
)
2090 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2091 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2097 /* Scan X and replace the address of any MEM in it with ADDR.
2098 REG is the address that MEM should have before the replacement. */
2101 replace_call_address (x
, reg
, addr
)
2104 register enum rtx_code code
;
2110 code
= GET_CODE (x
);
2124 /* Short cut for very common case. */
2125 replace_call_address (XEXP (x
, 1), reg
, addr
);
2129 /* Short cut for very common case. */
2130 replace_call_address (XEXP (x
, 0), reg
, addr
);
2134 /* If this MEM uses a reg other than the one we expected,
2135 something is wrong. */
2136 if (XEXP (x
, 0) != reg
)
2142 fmt
= GET_RTX_FORMAT (code
);
2143 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2146 replace_call_address (XEXP (x
, i
), reg
, addr
);
2150 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2151 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2157 /* Return the number of memory refs to addresses that vary
2161 count_nonfixed_reads (x
)
2164 register enum rtx_code code
;
2172 code
= GET_CODE (x
);
2186 return ((invariant_p (XEXP (x
, 0)) != 1)
2187 + count_nonfixed_reads (XEXP (x
, 0)));
2191 fmt
= GET_RTX_FORMAT (code
);
2192 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2195 value
+= count_nonfixed_reads (XEXP (x
, i
));
2199 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2200 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2208 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2209 Replace it with an instruction to load just the low bytes
2210 if the machine supports such an instruction,
2211 and insert above LOOP_START an instruction to clear the register. */
2214 constant_high_bytes (p
, loop_start
)
2218 register int insn_code_number
;
2220 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2221 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2223 new = gen_rtx (SET
, VOIDmode
,
2224 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2225 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2226 SET_DEST (PATTERN (p
)),
2228 XEXP (SET_SRC (PATTERN (p
)), 0));
2229 insn_code_number
= recog (new, p
);
2231 if (insn_code_number
)
2235 /* Clear destination register before the loop. */
2236 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2237 SET_DEST (PATTERN (p
)),
2241 /* Inside the loop, just load the low part. */
2247 /* Scan a loop setting the variables `unknown_address_altered',
2248 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2249 and `loop_has_volatile'.
2250 Also, fill in the array `loop_store_mems'. */
2253 prescan_loop (start
, end
)
2256 register int level
= 1;
2259 unknown_address_altered
= 0;
2261 loop_has_volatile
= 0;
2262 loop_store_mems_idx
= 0;
2268 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2269 insn
= NEXT_INSN (insn
))
2271 if (GET_CODE (insn
) == NOTE
)
2273 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2276 /* Count number of loops contained in this one. */
2279 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2288 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2291 loop_continue
= insn
;
2294 else if (GET_CODE (insn
) == CALL_INSN
)
2296 if (! CONST_CALL_P (insn
))
2297 unknown_address_altered
= 1;
2302 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2304 if (volatile_refs_p (PATTERN (insn
)))
2305 loop_has_volatile
= 1;
2307 note_stores (PATTERN (insn
), note_addr_stored
);
2313 /* Scan the function looking for loops. Record the start and end of each loop.
2314 Also mark as invalid loops any loops that contain a setjmp or are branched
2315 to from outside the loop. */
2318 find_and_verify_loops (f
)
2322 int current_loop
= -1;
2326 /* If there are jumps to undefined labels,
2327 treat them as jumps out of any/all loops.
2328 This also avoids writing past end of tables when there are no loops. */
2329 uid_loop_num
[0] = -1;
2331 /* Find boundaries of loops, mark which loops are contained within
2332 loops, and invalidate loops that have setjmp. */
2334 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2336 if (GET_CODE (insn
) == NOTE
)
2337 switch (NOTE_LINE_NUMBER (insn
))
2339 case NOTE_INSN_LOOP_BEG
:
2340 loop_number_loop_starts
[++next_loop
] = insn
;
2341 loop_number_loop_ends
[next_loop
] = 0;
2342 loop_outer_loop
[next_loop
] = current_loop
;
2343 loop_invalid
[next_loop
] = 0;
2344 loop_number_exit_labels
[next_loop
] = 0;
2345 loop_number_exit_count
[next_loop
] = 0;
2346 current_loop
= next_loop
;
2349 case NOTE_INSN_SETJMP
:
2350 /* In this case, we must invalidate our current loop and any
2352 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2354 loop_invalid
[loop
] = 1;
2355 if (loop_dump_stream
)
2356 fprintf (loop_dump_stream
,
2357 "\nLoop at %d ignored due to setjmp.\n",
2358 INSN_UID (loop_number_loop_starts
[loop
]));
2362 case NOTE_INSN_LOOP_END
:
2363 if (current_loop
== -1)
2366 loop_number_loop_ends
[current_loop
] = insn
;
2367 current_loop
= loop_outer_loop
[current_loop
];
2372 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2373 enclosing loop, but this doesn't matter. */
2374 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2377 /* Any loop containing a label used in an initializer must be invalidated,
2378 because it can be jumped into from anywhere. */
2380 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2384 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2386 loop_num
= loop_outer_loop
[loop_num
])
2387 loop_invalid
[loop_num
] = 1;
2390 /* Any loop containing a label used for an exception handler must be
2391 invalidated, because it can be jumped into from anywhere. */
2393 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2397 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2399 loop_num
= loop_outer_loop
[loop_num
])
2400 loop_invalid
[loop_num
] = 1;
2403 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2404 loop that it is not contained within, that loop is marked invalid.
2405 If any INSN or CALL_INSN uses a label's address, then the loop containing
2406 that label is marked invalid, because it could be jumped into from
2409 Also look for blocks of code ending in an unconditional branch that
2410 exits the loop. If such a block is surrounded by a conditional
2411 branch around the block, move the block elsewhere (see below) and
2412 invert the jump to point to the code block. This may eliminate a
2413 label in our loop and will simplify processing by both us and a
2414 possible second cse pass. */
2416 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2417 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2419 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2421 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2423 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2428 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2430 loop_num
= loop_outer_loop
[loop_num
])
2431 loop_invalid
[loop_num
] = 1;
2435 if (GET_CODE (insn
) != JUMP_INSN
)
2438 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2440 /* See if this is an unconditional branch outside the loop. */
2441 if (this_loop_num
!= -1
2442 && (GET_CODE (PATTERN (insn
)) == RETURN
2443 || (simplejump_p (insn
)
2444 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2446 && get_max_uid () < max_uid_for_loop
)
2449 rtx our_next
= next_real_insn (insn
);
2451 int outer_loop
= -1;
2453 /* Go backwards until we reach the start of the loop, a label,
2455 for (p
= PREV_INSN (insn
);
2456 GET_CODE (p
) != CODE_LABEL
2457 && ! (GET_CODE (p
) == NOTE
2458 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2459 && GET_CODE (p
) != JUMP_INSN
;
2463 /* Check for the case where we have a jump to an inner nested
2464 loop, and do not perform the optimization in that case. */
2466 if (JUMP_LABEL (insn
))
2468 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2469 if (dest_loop
!= -1)
2471 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2472 outer_loop
= loop_outer_loop
[outer_loop
])
2473 if (outer_loop
== this_loop_num
)
2478 /* Make sure that the target of P is within the current loop. */
2480 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2481 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2482 outer_loop
= this_loop_num
;
2484 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2485 we have a block of code to try to move.
2487 We look backward and then forward from the target of INSN
2488 to find a BARRIER at the same loop depth as the target.
2489 If we find such a BARRIER, we make a new label for the start
2490 of the block, invert the jump in P and point it to that label,
2491 and move the block of code to the spot we found. */
2493 if (outer_loop
== -1
2494 && GET_CODE (p
) == JUMP_INSN
2495 && JUMP_LABEL (p
) != 0
2496 /* Just ignore jumps to labels that were never emitted.
2497 These always indicate compilation errors. */
2498 && INSN_UID (JUMP_LABEL (p
)) != 0
2500 && ! simplejump_p (p
)
2501 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2504 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2505 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2508 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2509 if (GET_CODE (loc
) == BARRIER
2510 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2514 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2515 if (GET_CODE (loc
) == BARRIER
2516 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2521 rtx cond_label
= JUMP_LABEL (p
);
2522 rtx new_label
= get_label_after (p
);
2524 /* Ensure our label doesn't go away. */
2525 LABEL_NUSES (cond_label
)++;
2527 /* Verify that uid_loop_num is large enough and that
2529 if (invert_jump (p
, new_label
))
2533 /* Include the BARRIER after INSN and copy the
2535 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2536 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2538 /* All those insns are now in TARGET_LOOP_NUM. */
2539 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2541 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2543 /* The label jumped to by INSN is no longer a loop exit.
2544 Unless INSN does not have a label (e.g., it is a
2545 RETURN insn), search loop_number_exit_labels to find
2546 its label_ref, and remove it. Also turn off
2547 LABEL_OUTSIDE_LOOP_P bit. */
2548 if (JUMP_LABEL (insn
))
2553 r
= loop_number_exit_labels
[this_loop_num
];
2554 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2555 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2557 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2559 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2561 loop_number_exit_labels
[this_loop_num
]
2562 = LABEL_NEXTREF (r
);
2566 for (loop_num
= this_loop_num
;
2567 loop_num
!= -1 && loop_num
!= target_loop_num
;
2568 loop_num
= loop_outer_loop
[loop_num
])
2569 loop_number_exit_count
[loop_num
]--;
2571 /* If we didn't find it, then something is wrong. */
2576 /* P is now a jump outside the loop, so it must be put
2577 in loop_number_exit_labels, and marked as such.
2578 The easiest way to do this is to just call
2579 mark_loop_jump again for P. */
2580 mark_loop_jump (PATTERN (p
), this_loop_num
);
2582 /* If INSN now jumps to the insn after it,
2584 if (JUMP_LABEL (insn
) != 0
2585 && (next_real_insn (JUMP_LABEL (insn
))
2586 == next_real_insn (insn
)))
2590 /* Continue the loop after where the conditional
2591 branch used to jump, since the only branch insn
2592 in the block (if it still remains) is an inter-loop
2593 branch and hence needs no processing. */
2594 insn
= NEXT_INSN (cond_label
);
2596 if (--LABEL_NUSES (cond_label
) == 0)
2597 delete_insn (cond_label
);
2599 /* This loop will be continued with NEXT_INSN (insn). */
2600 insn
= PREV_INSN (insn
);
2607 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2608 loops it is contained in, mark the target loop invalid.
2610 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2613 mark_loop_jump (x
, loop_num
)
2621 switch (GET_CODE (x
))
2634 /* There could be a label reference in here. */
2635 mark_loop_jump (XEXP (x
, 0), loop_num
);
2641 mark_loop_jump (XEXP (x
, 0), loop_num
);
2642 mark_loop_jump (XEXP (x
, 1), loop_num
);
2647 mark_loop_jump (XEXP (x
, 0), loop_num
);
2651 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2653 /* Link together all labels that branch outside the loop. This
2654 is used by final_[bg]iv_value and the loop unrolling code. Also
2655 mark this LABEL_REF so we know that this branch should predict
2658 /* A check to make sure the label is not in an inner nested loop,
2659 since this does not count as a loop exit. */
2660 if (dest_loop
!= -1)
2662 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2663 outer_loop
= loop_outer_loop
[outer_loop
])
2664 if (outer_loop
== loop_num
)
2670 if (loop_num
!= -1 && outer_loop
== -1)
2672 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2673 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2674 loop_number_exit_labels
[loop_num
] = x
;
2676 for (outer_loop
= loop_num
;
2677 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2678 outer_loop
= loop_outer_loop
[outer_loop
])
2679 loop_number_exit_count
[outer_loop
]++;
2682 /* If this is inside a loop, but not in the current loop or one enclosed
2683 by it, it invalidates at least one loop. */
2685 if (dest_loop
== -1)
2688 /* We must invalidate every nested loop containing the target of this
2689 label, except those that also contain the jump insn. */
2691 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2693 /* Stop when we reach a loop that also contains the jump insn. */
2694 for (outer_loop
= loop_num
; outer_loop
!= -1;
2695 outer_loop
= loop_outer_loop
[outer_loop
])
2696 if (dest_loop
== outer_loop
)
2699 /* If we get here, we know we need to invalidate a loop. */
2700 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2701 fprintf (loop_dump_stream
,
2702 "\nLoop at %d ignored due to multiple entry points.\n",
2703 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2705 loop_invalid
[dest_loop
] = 1;
2710 /* If this is not setting pc, ignore. */
2711 if (SET_DEST (x
) == pc_rtx
)
2712 mark_loop_jump (SET_SRC (x
), loop_num
);
2716 mark_loop_jump (XEXP (x
, 1), loop_num
);
2717 mark_loop_jump (XEXP (x
, 2), loop_num
);
2722 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2723 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2727 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2728 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2732 /* Treat anything else (such as a symbol_ref)
2733 as a branch out of this loop, but not into any loop. */
2738 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2739 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2742 loop_number_exit_labels
[loop_num
] = x
;
2744 for (outer_loop
= loop_num
; outer_loop
!= -1;
2745 outer_loop
= loop_outer_loop
[outer_loop
])
2746 loop_number_exit_count
[outer_loop
]++;
2752 /* Return nonzero if there is a label in the range from
2753 insn INSN to and including the insn whose luid is END
2754 INSN must have an assigned luid (i.e., it must not have
2755 been previously created by loop.c). */
2758 labels_in_range_p (insn
, end
)
2762 while (insn
&& INSN_LUID (insn
) <= end
)
2764 if (GET_CODE (insn
) == CODE_LABEL
)
2766 insn
= NEXT_INSN (insn
);
2772 /* Record that a memory reference X is being set. */
2775 note_addr_stored (x
)
2780 if (x
== 0 || GET_CODE (x
) != MEM
)
2783 /* Count number of memory writes.
2784 This affects heuristics in strength_reduce. */
2787 /* BLKmode MEM means all memory is clobbered. */
2788 if (GET_MODE (x
) == BLKmode
)
2789 unknown_address_altered
= 1;
2791 if (unknown_address_altered
)
2794 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2795 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2796 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2798 /* We are storing at the same address as previously noted. Save the
2800 if (GET_MODE_SIZE (GET_MODE (x
))
2801 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2802 loop_store_mems
[i
] = x
;
2806 if (i
== NUM_STORES
)
2807 unknown_address_altered
= 1;
2809 else if (i
== loop_store_mems_idx
)
2810 loop_store_mems
[loop_store_mems_idx
++] = x
;
2813 /* Return nonzero if the rtx X is invariant over the current loop.
2815 The value is 2 if we refer to something only conditionally invariant.
2817 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2818 Otherwise, a memory ref is invariant if it does not conflict with
2819 anything stored in `loop_store_mems'. */
2826 register enum rtx_code code
;
2828 int conditional
= 0;
2832 code
= GET_CODE (x
);
2842 /* A LABEL_REF is normally invariant, however, if we are unrolling
2843 loops, and this label is inside the loop, then it isn't invariant.
2844 This is because each unrolled copy of the loop body will have
2845 a copy of this label. If this was invariant, then an insn loading
2846 the address of this label into a register might get moved outside
2847 the loop, and then each loop body would end up using the same label.
2849 We don't know the loop bounds here though, so just fail for all
2851 if (flag_unroll_loops
)
2858 case UNSPEC_VOLATILE
:
2862 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2863 since the reg might be set by initialization within the loop. */
2865 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2866 || x
== arg_pointer_rtx
)
2867 && ! current_function_has_nonlocal_goto
)
2871 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2874 if (n_times_set
[REGNO (x
)] < 0)
2877 return n_times_set
[REGNO (x
)] == 0;
2880 /* Volatile memory references must be rejected. Do this before
2881 checking for read-only items, so that volatile read-only items
2882 will be rejected also. */
2883 if (MEM_VOLATILE_P (x
))
2886 /* Read-only items (such as constants in a constant pool) are
2887 invariant if their address is. */
2888 if (RTX_UNCHANGING_P (x
))
2891 /* If we filled the table (or had a subroutine call), any location
2892 in memory could have been clobbered. */
2893 if (unknown_address_altered
)
2896 /* See if there is any dependence between a store and this load. */
2897 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2898 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2901 /* It's not invalidated by a store in memory
2902 but we must still verify the address is invariant. */
2906 /* Don't mess with insns declared volatile. */
2907 if (MEM_VOLATILE_P (x
))
2911 fmt
= GET_RTX_FORMAT (code
);
2912 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2916 int tem
= invariant_p (XEXP (x
, i
));
2922 else if (fmt
[i
] == 'E')
2925 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2927 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2937 return 1 + conditional
;
2941 /* Return nonzero if all the insns in the loop that set REG
2942 are INSN and the immediately following insns,
2943 and if each of those insns sets REG in an invariant way
2944 (not counting uses of REG in them).
2946 The value is 2 if some of these insns are only conditionally invariant.
2948 We assume that INSN itself is the first set of REG
2949 and that its source is invariant. */
2952 consec_sets_invariant_p (reg
, n_sets
, insn
)
2956 register rtx p
= insn
;
2957 register int regno
= REGNO (reg
);
2959 /* Number of sets we have to insist on finding after INSN. */
2960 int count
= n_sets
- 1;
2961 int old
= n_times_set
[regno
];
2965 /* If N_SETS hit the limit, we can't rely on its value. */
2969 n_times_set
[regno
] = 0;
2973 register enum rtx_code code
;
2977 code
= GET_CODE (p
);
2979 /* If library call, skip to end of of it. */
2980 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2985 && (set
= single_set (p
))
2986 && GET_CODE (SET_DEST (set
)) == REG
2987 && REGNO (SET_DEST (set
)) == regno
)
2989 this = invariant_p (SET_SRC (set
));
2992 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2994 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2995 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
2997 this = (CONSTANT_P (XEXP (temp
, 0))
2998 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
2999 && invariant_p (XEXP (temp
, 0))));
3006 else if (code
!= NOTE
)
3008 n_times_set
[regno
] = old
;
3013 n_times_set
[regno
] = old
;
3014 /* If invariant_p ever returned 2, we return 2. */
3015 return 1 + (value
& 2);
3019 /* I don't think this condition is sufficient to allow INSN
3020 to be moved, so we no longer test it. */
3022 /* Return 1 if all insns in the basic block of INSN and following INSN
3023 that set REG are invariant according to TABLE. */
3026 all_sets_invariant_p (reg
, insn
, table
)
3030 register rtx p
= insn
;
3031 register int regno
= REGNO (reg
);
3035 register enum rtx_code code
;
3037 code
= GET_CODE (p
);
3038 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3040 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3041 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3042 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3044 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3051 /* Look at all uses (not sets) of registers in X. For each, if it is
3052 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3053 a different insn, set USAGE[REGNO] to const0_rtx. */
3056 find_single_use_in_loop (insn
, x
, usage
)
3061 enum rtx_code code
= GET_CODE (x
);
3062 char *fmt
= GET_RTX_FORMAT (code
);
3067 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3068 ? const0_rtx
: insn
;
3070 else if (code
== SET
)
3072 /* Don't count SET_DEST if it is a REG; otherwise count things
3073 in SET_DEST because if a register is partially modified, it won't
3074 show up as a potential movable so we don't care how USAGE is set
3076 if (GET_CODE (SET_DEST (x
)) != REG
)
3077 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3078 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3081 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3083 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3084 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3085 else if (fmt
[i
] == 'E')
3086 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3087 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3091 /* Increment N_TIMES_SET at the index of each register
3092 that is modified by an insn between FROM and TO.
3093 If the value of an element of N_TIMES_SET becomes 127 or more,
3094 stop incrementing it, to avoid overflow.
3096 Store in SINGLE_USAGE[I] the single insn in which register I is
3097 used, if it is only used once. Otherwise, it is set to 0 (for no
3098 uses) or const0_rtx for more than one use. This parameter may be zero,
3099 in which case this processing is not done.
3101 Store in *COUNT_PTR the number of actual instruction
3102 in the loop. We use this to decide what is worth moving out. */
3104 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3105 In that case, it is the insn that last set reg n. */
3108 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3109 register rtx from
, to
;
3115 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3117 register int count
= 0;
3120 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3121 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3123 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3127 /* If requested, record registers that have exactly one use. */
3130 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3132 /* Include uses in REG_EQUAL notes. */
3133 if (REG_NOTES (insn
))
3134 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3137 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3138 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3139 /* Don't move a reg that has an explicit clobber.
3140 We might do so sometimes, but it's not worth the pain. */
3141 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3143 if (GET_CODE (PATTERN (insn
)) == SET
3144 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3146 dest
= SET_DEST (PATTERN (insn
));
3147 while (GET_CODE (dest
) == SUBREG
3148 || GET_CODE (dest
) == ZERO_EXTRACT
3149 || GET_CODE (dest
) == SIGN_EXTRACT
3150 || GET_CODE (dest
) == STRICT_LOW_PART
)
3151 dest
= XEXP (dest
, 0);
3152 if (GET_CODE (dest
) == REG
)
3154 register int regno
= REGNO (dest
);
3155 /* If this is the first setting of this reg
3156 in current basic block, and it was set before,
3157 it must be set in two basic blocks, so it cannot
3158 be moved out of the loop. */
3159 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3160 may_not_move
[regno
] = 1;
3161 /* If this is not first setting in current basic block,
3162 see if reg was used in between previous one and this.
3163 If so, neither one can be moved. */
3164 if (last_set
[regno
] != 0
3165 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3166 may_not_move
[regno
] = 1;
3167 if (n_times_set
[regno
] < 127)
3168 ++n_times_set
[regno
];
3169 last_set
[regno
] = insn
;
3172 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3175 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3177 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3178 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3179 /* Don't move a reg that has an explicit clobber.
3180 It's not worth the pain to try to do it correctly. */
3181 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3183 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3185 dest
= SET_DEST (x
);
3186 while (GET_CODE (dest
) == SUBREG
3187 || GET_CODE (dest
) == ZERO_EXTRACT
3188 || GET_CODE (dest
) == SIGN_EXTRACT
3189 || GET_CODE (dest
) == STRICT_LOW_PART
)
3190 dest
= XEXP (dest
, 0);
3191 if (GET_CODE (dest
) == REG
)
3193 register int regno
= REGNO (dest
);
3194 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3195 may_not_move
[regno
] = 1;
3196 if (last_set
[regno
] != 0
3197 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3198 may_not_move
[regno
] = 1;
3199 if (n_times_set
[regno
] < 127)
3200 ++n_times_set
[regno
];
3201 last_set
[regno
] = insn
;
3208 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3209 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3214 /* Given a loop that is bounded by LOOP_START and LOOP_END
3215 and that is entered at SCAN_START,
3216 return 1 if the register set in SET contained in insn INSN is used by
3217 any insn that precedes INSN in cyclic order starting
3218 from the loop entry point.
3220 We don't want to use INSN_LUID here because if we restrict INSN to those
3221 that have a valid INSN_LUID, it means we cannot move an invariant out
3222 from an inner loop past two loops. */
3225 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3226 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3228 rtx reg
= SET_DEST (set
);
3231 /* Scan forward checking for register usage. If we hit INSN, we
3232 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3233 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3235 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3236 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3246 /* A "basic induction variable" or biv is a pseudo reg that is set
3247 (within this loop) only by incrementing or decrementing it. */
3248 /* A "general induction variable" or giv is a pseudo reg whose
3249 value is a linear function of a biv. */
3251 /* Bivs are recognized by `basic_induction_var';
3252 Givs by `general_induct_var'. */
3254 /* Indexed by register number, indicates whether or not register is an
3255 induction variable, and if so what type. */
3257 enum iv_mode
*reg_iv_type
;
3259 /* Indexed by register number, contains pointer to `struct induction'
3260 if register is an induction variable. This holds general info for
3261 all induction variables. */
3263 struct induction
**reg_iv_info
;
3265 /* Indexed by register number, contains pointer to `struct iv_class'
3266 if register is a basic induction variable. This holds info describing
3267 the class (a related group) of induction variables that the biv belongs
3270 struct iv_class
**reg_biv_class
;
3272 /* The head of a list which links together (via the next field)
3273 every iv class for the current loop. */
3275 struct iv_class
*loop_iv_list
;
3277 /* Communication with routines called via `note_stores'. */
3279 static rtx note_insn
;
3281 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3283 static rtx addr_placeholder
;
3285 /* ??? Unfinished optimizations, and possible future optimizations,
3286 for the strength reduction code. */
3288 /* ??? There is one more optimization you might be interested in doing: to
3289 allocate pseudo registers for frequently-accessed memory locations.
3290 If the same memory location is referenced each time around, it might
3291 be possible to copy it into a register before and out after.
3292 This is especially useful when the memory location is a variable which
3293 is in a stack slot because somewhere its address is taken. If the
3294 loop doesn't contain a function call and the variable isn't volatile,
3295 it is safe to keep the value in a register for the duration of the
3296 loop. One tricky thing is that the copying of the value back from the
3297 register has to be done on all exits from the loop. You need to check that
3298 all the exits from the loop go to the same place. */
3300 /* ??? The interaction of biv elimination, and recognition of 'constant'
3301 bivs, may cause problems. */
3303 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3304 performance problems.
3306 Perhaps don't eliminate things that can be combined with an addressing
3307 mode. Find all givs that have the same biv, mult_val, and add_val;
3308 then for each giv, check to see if its only use dies in a following
3309 memory address. If so, generate a new memory address and check to see
3310 if it is valid. If it is valid, then store the modified memory address,
3311 otherwise, mark the giv as not done so that it will get its own iv. */
3313 /* ??? Could try to optimize branches when it is known that a biv is always
3316 /* ??? When replace a biv in a compare insn, we should replace with closest
3317 giv so that an optimized branch can still be recognized by the combiner,
3318 e.g. the VAX acb insn. */
3320 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3321 was rerun in loop_optimize whenever a register was added or moved.
3322 Also, some of the optimizations could be a little less conservative. */
3324 /* Perform strength reduction and induction variable elimination. */
3326 /* Pseudo registers created during this function will be beyond the last
3327 valid index in several tables including n_times_set and regno_last_uid.
3328 This does not cause a problem here, because the added registers cannot be
3329 givs outside of their loop, and hence will never be reconsidered.
3330 But scan_loop must check regnos to make sure they are in bounds. */
3333 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3334 loop_start
, loop_end
)
3347 /* This is 1 if current insn is not executed at least once for every loop
3349 int not_every_iteration
= 0;
3350 /* This is 1 if current insn may be executed more than once for every
3352 int maybe_multiple
= 0;
3353 /* Temporary list pointers for traversing loop_iv_list. */
3354 struct iv_class
*bl
, **backbl
;
3355 /* Ratio of extra register life span we can justify
3356 for saving an instruction. More if loop doesn't call subroutines
3357 since in that case saving an insn makes more difference
3358 and more registers are available. */
3359 /* ??? could set this to last value of threshold in move_movables */
3360 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3361 /* Map of pseudo-register replacements. */
3365 rtx end_insert_before
;
3368 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3369 * sizeof (enum iv_mode
*));
3370 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3371 reg_iv_info
= (struct induction
**)
3372 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3373 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3374 * sizeof (struct induction
*)));
3375 reg_biv_class
= (struct iv_class
**)
3376 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3377 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3378 * sizeof (struct iv_class
*)));
3381 addr_placeholder
= gen_reg_rtx (Pmode
);
3383 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3384 must be put before this insn, so that they will appear in the right
3385 order (i.e. loop order).
3387 If loop_end is the end of the current function, then emit a
3388 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3390 if (NEXT_INSN (loop_end
) != 0)
3391 end_insert_before
= NEXT_INSN (loop_end
);
3393 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3395 /* Scan through loop to find all possible bivs. */
3401 /* At end of a straight-in loop, we are done.
3402 At end of a loop entered at the bottom, scan the top. */
3403 if (p
== scan_start
)
3411 if (p
== scan_start
)
3415 if (GET_CODE (p
) == INSN
3416 && (set
= single_set (p
))
3417 && GET_CODE (SET_DEST (set
)) == REG
)
3419 dest_reg
= SET_DEST (set
);
3420 if (REGNO (dest_reg
) < max_reg_before_loop
3421 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3422 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3424 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3425 dest_reg
, p
, &inc_val
, &mult_val
))
3427 /* It is a possible basic induction variable.
3428 Create and initialize an induction structure for it. */
3431 = (struct induction
*) alloca (sizeof (struct induction
));
3433 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3434 not_every_iteration
, maybe_multiple
);
3435 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3437 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3438 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3442 /* Past CODE_LABEL, we get to insns that may be executed multiple
3443 times. The only way we can be sure that they can't is if every
3444 every jump insn between here and the end of the loop either
3445 returns, exits the loop, is a forward jump, or is a jump
3446 to the loop start. */
3448 if (GET_CODE (p
) == CODE_LABEL
)
3456 insn
= NEXT_INSN (insn
);
3457 if (insn
== scan_start
)
3465 if (insn
== scan_start
)
3469 if (GET_CODE (insn
) == JUMP_INSN
3470 && GET_CODE (PATTERN (insn
)) != RETURN
3471 && (! condjump_p (insn
)
3472 || (JUMP_LABEL (insn
) != 0
3473 && JUMP_LABEL (insn
) != scan_start
3474 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3475 || INSN_UID (insn
) >= max_uid_for_loop
3476 || (INSN_LUID (JUMP_LABEL (insn
))
3477 < INSN_LUID (insn
))))))
3485 /* Past a jump, we get to insns for which we can't count
3486 on whether they will be executed during each iteration. */
3487 /* This code appears twice in strength_reduce. There is also similar
3488 code in scan_loop. */
3489 if (GET_CODE (p
) == JUMP_INSN
3490 /* If we enter the loop in the middle, and scan around to the
3491 beginning, don't set not_every_iteration for that.
3492 This can be any kind of jump, since we want to know if insns
3493 will be executed if the loop is executed. */
3494 && ! (JUMP_LABEL (p
) == loop_top
3495 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3496 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3500 /* If this is a jump outside the loop, then it also doesn't
3501 matter. Check to see if the target of this branch is on the
3502 loop_number_exits_labels list. */
3504 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3506 label
= LABEL_NEXTREF (label
))
3507 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3511 not_every_iteration
= 1;
3514 else if (GET_CODE (p
) == NOTE
)
3516 /* At the virtual top of a converted loop, insns are again known to
3517 be executed each iteration: logically, the loop begins here
3518 even though the exit code has been duplicated. */
3519 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3520 not_every_iteration
= 0;
3521 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3523 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3527 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3528 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3529 or not an insn is known to be executed each iteration of the
3530 loop, whether or not any iterations are known to occur.
3532 Therefore, if we have just passed a label and have no more labels
3533 between here and the test insn of the loop, we know these insns
3534 will be executed each iteration. */
3536 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3537 && no_labels_between_p (p
, loop_end
))
3538 not_every_iteration
= 0;
3541 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3542 Make a sanity check against n_times_set. */
3543 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3545 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3546 /* Above happens if register modified by subreg, etc. */
3547 /* Make sure it is not recognized as a basic induction var: */
3548 || n_times_set
[bl
->regno
] != bl
->biv_count
3549 /* If never incremented, it is invariant that we decided not to
3550 move. So leave it alone. */
3551 || ! bl
->incremented
)
3553 if (loop_dump_stream
)
3554 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3556 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3557 ? "not induction variable"
3558 : (! bl
->incremented
? "never incremented"
3561 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3568 if (loop_dump_stream
)
3569 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3573 /* Exit if there are no bivs. */
3576 /* Can still unroll the loop anyways, but indicate that there is no
3577 strength reduction info available. */
3578 if (flag_unroll_loops
)
3579 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3584 /* Find initial value for each biv by searching backwards from loop_start,
3585 halting at first label. Also record any test condition. */
3588 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3592 if (GET_CODE (p
) == CALL_INSN
)
3595 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3596 || GET_CODE (p
) == CALL_INSN
)
3597 note_stores (PATTERN (p
), record_initial
);
3599 /* Record any test of a biv that branches around the loop if no store
3600 between it and the start of loop. We only care about tests with
3601 constants and registers and only certain of those. */
3602 if (GET_CODE (p
) == JUMP_INSN
3603 && JUMP_LABEL (p
) != 0
3604 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3605 && (test
= get_condition_for_loop (p
)) != 0
3606 && GET_CODE (XEXP (test
, 0)) == REG
3607 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3608 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3609 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3610 && bl
->init_insn
== 0)
3612 /* If an NE test, we have an initial value! */
3613 if (GET_CODE (test
) == NE
)
3616 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3617 XEXP (test
, 0), XEXP (test
, 1));
3620 bl
->initial_test
= test
;
3624 /* Look at the each biv and see if we can say anything better about its
3625 initial value from any initializing insns set up above. (This is done
3626 in two passes to avoid missing SETs in a PARALLEL.) */
3627 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3631 if (! bl
->init_insn
)
3634 src
= SET_SRC (bl
->init_set
);
3636 if (loop_dump_stream
)
3637 fprintf (loop_dump_stream
,
3638 "Biv %d initialized at insn %d: initial value ",
3639 bl
->regno
, INSN_UID (bl
->init_insn
));
3641 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3642 || GET_MODE (src
) == VOIDmode
)
3643 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3645 bl
->initial_value
= src
;
3647 if (loop_dump_stream
)
3649 if (GET_CODE (src
) == CONST_INT
)
3650 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3653 print_rtl (loop_dump_stream
, src
);
3654 fprintf (loop_dump_stream
, "\n");
3660 /* Biv initial value is not simple move,
3661 so let it keep initial value of "itself". */
3663 if (loop_dump_stream
)
3664 fprintf (loop_dump_stream
, "is complex\n");
3668 /* Search the loop for general induction variables. */
3670 /* A register is a giv if: it is only set once, it is a function of a
3671 biv and a constant (or invariant), and it is not a biv. */
3673 not_every_iteration
= 0;
3679 /* At end of a straight-in loop, we are done.
3680 At end of a loop entered at the bottom, scan the top. */
3681 if (p
== scan_start
)
3689 if (p
== scan_start
)
3693 /* Look for a general induction variable in a register. */
3694 if (GET_CODE (p
) == INSN
3695 && (set
= single_set (p
))
3696 && GET_CODE (SET_DEST (set
)) == REG
3697 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3705 dest_reg
= SET_DEST (set
);
3706 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3709 if (/* SET_SRC is a giv. */
3710 ((benefit
= general_induction_var (SET_SRC (set
),
3713 /* Equivalent expression is a giv. */
3714 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3715 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3717 &add_val
, &mult_val
))))
3718 /* Don't try to handle any regs made by loop optimization.
3719 We have nothing on them in regno_first_uid, etc. */
3720 && REGNO (dest_reg
) < max_reg_before_loop
3721 /* Don't recognize a BASIC_INDUCT_VAR here. */
3722 && dest_reg
!= src_reg
3723 /* This must be the only place where the register is set. */
3724 && (n_times_set
[REGNO (dest_reg
)] == 1
3725 /* or all sets must be consecutive and make a giv. */
3726 || (benefit
= consec_sets_giv (benefit
, p
,
3728 &add_val
, &mult_val
))))
3732 = (struct induction
*) alloca (sizeof (struct induction
));
3735 /* If this is a library call, increase benefit. */
3736 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3737 benefit
+= libcall_benefit (p
);
3739 /* Skip the consecutive insns, if there are any. */
3740 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3743 /* If first insn of libcall sequence, skip to end.
3744 Do this at start of loop, since INSN is guaranteed to
3746 if (GET_CODE (p
) != NOTE
3747 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3750 do p
= NEXT_INSN (p
);
3751 while (GET_CODE (p
) == NOTE
);
3754 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3755 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3761 #ifndef DONT_REDUCE_ADDR
3762 /* Look for givs which are memory addresses. */
3763 /* This resulted in worse code on a VAX 8600. I wonder if it
3765 if (GET_CODE (p
) == INSN
)
3766 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3770 /* Update the status of whether giv can derive other givs. This can
3771 change when we pass a label or an insn that updates a biv. */
3772 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3773 || GET_CODE (p
) == CODE_LABEL
)
3774 update_giv_derive (p
);
3776 /* Past a jump, we get to insns for which we can't count
3777 on whether they will be executed during each iteration. */
3778 /* This code appears twice in strength_reduce. There is also similar
3779 code in scan_loop. */
3780 if (GET_CODE (p
) == JUMP_INSN
3781 /* If we enter the loop in the middle, and scan around to the
3782 beginning, don't set not_every_iteration for that.
3783 This can be any kind of jump, since we want to know if insns
3784 will be executed if the loop is executed. */
3785 && ! (JUMP_LABEL (p
) == loop_top
3786 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3787 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3791 /* If this is a jump outside the loop, then it also doesn't
3792 matter. Check to see if the target of this branch is on the
3793 loop_number_exits_labels list. */
3795 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3797 label
= LABEL_NEXTREF (label
))
3798 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3802 not_every_iteration
= 1;
3805 else if (GET_CODE (p
) == NOTE
)
3807 /* At the virtual top of a converted loop, insns are again known to
3808 be executed each iteration: logically, the loop begins here
3809 even though the exit code has been duplicated. */
3810 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3811 not_every_iteration
= 0;
3812 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3814 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3818 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3819 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3820 or not an insn is known to be executed each iteration of the
3821 loop, whether or not any iterations are known to occur.
3823 Therefore, if we have just passed a label and have no more labels
3824 between here and the test insn of the loop, we know these insns
3825 will be executed each iteration. */
3827 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3828 && no_labels_between_p (p
, loop_end
))
3829 not_every_iteration
= 0;
3832 /* Try to calculate and save the number of loop iterations. This is
3833 set to zero if the actual number can not be calculated. This must
3834 be called after all giv's have been identified, since otherwise it may
3835 fail if the iteration variable is a giv. */
3837 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3839 /* Now for each giv for which we still don't know whether or not it is
3840 replaceable, check to see if it is replaceable because its final value
3841 can be calculated. This must be done after loop_iterations is called,
3842 so that final_giv_value will work correctly. */
3844 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3846 struct induction
*v
;
3848 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3849 if (! v
->replaceable
&& ! v
->not_replaceable
)
3850 check_final_value (v
, loop_start
, loop_end
);
3853 /* Try to prove that the loop counter variable (if any) is always
3854 nonnegative; if so, record that fact with a REG_NONNEG note
3855 so that "decrement and branch until zero" insn can be used. */
3856 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3859 /* record loop-variables relevant for BCT optimization before unrolling
3860 the loop. Unrolling may update part of this information, and the
3861 correct data will be used for generating the BCT. */
3862 #ifdef HAVE_decrement_and_branch_on_count
3863 if (HAVE_decrement_and_branch_on_count
)
3864 analyze_loop_iterations (loop_start
, loop_end
);
3868 /* Create reg_map to hold substitutions for replaceable giv regs. */
3869 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3870 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3872 /* Examine each iv class for feasibility of strength reduction/induction
3873 variable elimination. */
3875 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3877 struct induction
*v
;
3880 rtx final_value
= 0;
3882 /* Test whether it will be possible to eliminate this biv
3883 provided all givs are reduced. This is possible if either
3884 the reg is not used outside the loop, or we can compute
3885 what its final value will be.
3887 For architectures with a decrement_and_branch_until_zero insn,
3888 don't do this if we put a REG_NONNEG note on the endtest for
3891 /* Compare against bl->init_insn rather than loop_start.
3892 We aren't concerned with any uses of the biv between
3893 init_insn and loop_start since these won't be affected
3894 by the value of the biv elsewhere in the function, so
3895 long as init_insn doesn't use the biv itself.
3896 March 14, 1989 -- self@bayes.arc.nasa.gov */
3898 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3900 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3901 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3902 #ifdef HAVE_decrement_and_branch_until_zero
3905 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3906 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3907 #ifdef HAVE_decrement_and_branch_until_zero
3911 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3912 threshold
, insn_count
);
3915 if (loop_dump_stream
)
3917 fprintf (loop_dump_stream
,
3918 "Cannot eliminate biv %d.\n",
3920 fprintf (loop_dump_stream
,
3921 "First use: insn %d, last use: insn %d.\n",
3922 REGNO_FIRST_UID (bl
->regno
),
3923 REGNO_LAST_UID (bl
->regno
));
3927 /* Combine all giv's for this iv_class. */
3930 /* This will be true at the end, if all givs which depend on this
3931 biv have been strength reduced.
3932 We can't (currently) eliminate the biv unless this is so. */
3935 /* Check each giv in this class to see if we will benefit by reducing
3936 it. Skip giv's combined with others. */
3937 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3939 struct induction
*tv
;
3941 if (v
->ignore
|| v
->same
)
3944 benefit
= v
->benefit
;
3946 /* Reduce benefit if not replaceable, since we will insert
3947 a move-insn to replace the insn that calculates this giv.
3948 Don't do this unless the giv is a user variable, since it
3949 will often be marked non-replaceable because of the duplication
3950 of the exit code outside the loop. In such a case, the copies
3951 we insert are dead and will be deleted. So they don't have
3952 a cost. Similar situations exist. */
3953 /* ??? The new final_[bg]iv_value code does a much better job
3954 of finding replaceable giv's, and hence this code may no longer
3956 if (! v
->replaceable
&& ! bl
->eliminable
3957 && REG_USERVAR_P (v
->dest_reg
))
3958 benefit
-= copy_cost
;
3960 /* Decrease the benefit to count the add-insns that we will
3961 insert to increment the reduced reg for the giv. */
3962 benefit
-= add_cost
* bl
->biv_count
;
3964 /* Decide whether to strength-reduce this giv or to leave the code
3965 unchanged (recompute it from the biv each time it is used).
3966 This decision can be made independently for each giv. */
3969 /* Attempt to guess whether autoincrement will handle some of the
3970 new add insns; if so, increase BENEFIT (undo the subtraction of
3971 add_cost that was done above). */
3972 if (v
->giv_type
== DEST_ADDR
3973 && GET_CODE (v
->mult_val
) == CONST_INT
)
3975 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3976 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3977 benefit
+= add_cost
* bl
->biv_count
;
3979 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3980 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3981 benefit
+= add_cost
* bl
->biv_count
;
3986 /* If an insn is not to be strength reduced, then set its ignore
3987 flag, and clear all_reduced. */
3989 /* A giv that depends on a reversed biv must be reduced if it is
3990 used after the loop exit, otherwise, it would have the wrong
3991 value after the loop exit. To make it simple, just reduce all
3992 of such giv's whether or not we know they are used after the loop
3995 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
3998 if (loop_dump_stream
)
3999 fprintf (loop_dump_stream
,
4000 "giv of insn %d not worth while, %d vs %d.\n",
4002 v
->lifetime
* threshold
* benefit
, insn_count
);
4008 /* Check that we can increment the reduced giv without a
4009 multiply insn. If not, reject it. */
4011 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4012 if (tv
->mult_val
== const1_rtx
4013 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4015 if (loop_dump_stream
)
4016 fprintf (loop_dump_stream
,
4017 "giv of insn %d: would need a multiply.\n",
4018 INSN_UID (v
->insn
));
4026 /* Reduce each giv that we decided to reduce. */
4028 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4030 struct induction
*tv
;
4031 if (! v
->ignore
&& v
->same
== 0)
4033 int auto_inc_opt
= 0;
4035 v
->new_reg
= gen_reg_rtx (v
->mode
);
4038 /* If the target has auto-increment addressing modes, and
4039 this is an address giv, then try to put the increment
4040 immediately after its use, so that flow can create an
4041 auto-increment addressing mode. */
4042 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4043 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4044 /* We don't handle reversed biv's because bl->biv->insn
4045 does not have a valid INSN_LUID. */
4047 && v
->always_executed
&& ! v
->maybe_multiple
)
4049 /* If other giv's have been combined with this one, then
4050 this will work only if all uses of the other giv's occur
4051 before this giv's insn. This is difficult to check.
4053 We simplify this by looking for the common case where
4054 there is one DEST_REG giv, and this giv's insn is the
4055 last use of the dest_reg of that DEST_REG giv. If the
4056 the increment occurs after the address giv, then we can
4057 perform the optimization. (Otherwise, the increment
4058 would have to go before other_giv, and we would not be
4059 able to combine it with the address giv to get an
4060 auto-inc address.) */
4061 if (v
->combined_with
)
4063 struct induction
*other_giv
= 0;
4065 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4073 if (! tv
&& other_giv
4074 && REGNO (other_giv
->dest_reg
) <= max_reg_before_loop
4075 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4076 == INSN_UID (v
->insn
))
4077 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4080 /* Check for case where increment is before the the address
4082 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
4091 /* We can't put an insn immediately after one setting
4092 cc0, or immediately before one using cc0. */
4093 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4094 || (auto_inc_opt
== -1
4095 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4096 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4097 && sets_cc0_p (PATTERN (prev
))))
4103 v
->auto_inc_opt
= 1;
4107 /* For each place where the biv is incremented, add an insn
4108 to increment the new, reduced reg for the giv. */
4109 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4114 insert_before
= tv
->insn
;
4115 else if (auto_inc_opt
== 1)
4116 insert_before
= NEXT_INSN (v
->insn
);
4118 insert_before
= v
->insn
;
4120 if (tv
->mult_val
== const1_rtx
)
4121 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4122 v
->new_reg
, v
->new_reg
, insert_before
);
4123 else /* tv->mult_val == const0_rtx */
4124 /* A multiply is acceptable here
4125 since this is presumed to be seldom executed. */
4126 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4127 v
->add_val
, v
->new_reg
, insert_before
);
4130 /* Add code at loop start to initialize giv's reduced reg. */
4132 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4133 v
->add_val
, v
->new_reg
, loop_start
);
4137 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4140 For each giv register that can be reduced now: if replaceable,
4141 substitute reduced reg wherever the old giv occurs;
4142 else add new move insn "giv_reg = reduced_reg".
4144 Also check for givs whose first use is their definition and whose
4145 last use is the definition of another giv. If so, it is likely
4146 dead and should not be used to eliminate a biv. */
4147 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4149 if (v
->same
&& v
->same
->ignore
)
4155 if (v
->giv_type
== DEST_REG
4156 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4158 struct induction
*v1
;
4160 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4161 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4165 /* Update expression if this was combined, in case other giv was
4168 v
->new_reg
= replace_rtx (v
->new_reg
,
4169 v
->same
->dest_reg
, v
->same
->new_reg
);
4171 if (v
->giv_type
== DEST_ADDR
)
4172 /* Store reduced reg as the address in the memref where we found
4174 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4175 else if (v
->replaceable
)
4177 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4180 /* I can no longer duplicate the original problem. Perhaps
4181 this is unnecessary now? */
4183 /* Replaceable; it isn't strictly necessary to delete the old
4184 insn and emit a new one, because v->dest_reg is now dead.
4186 However, especially when unrolling loops, the special
4187 handling for (set REG0 REG1) in the second cse pass may
4188 make v->dest_reg live again. To avoid this problem, emit
4189 an insn to set the original giv reg from the reduced giv.
4190 We can not delete the original insn, since it may be part
4191 of a LIBCALL, and the code in flow that eliminates dead
4192 libcalls will fail if it is deleted. */
4193 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4199 /* Not replaceable; emit an insn to set the original giv reg from
4200 the reduced giv, same as above. */
4201 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4205 /* When a loop is reversed, givs which depend on the reversed
4206 biv, and which are live outside the loop, must be set to their
4207 correct final value. This insn is only needed if the giv is
4208 not replaceable. The correct final value is the same as the
4209 value that the giv starts the reversed loop with. */
4210 if (bl
->reversed
&& ! v
->replaceable
)
4211 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4212 v
->add_val
, v
->dest_reg
, end_insert_before
);
4213 else if (v
->final_value
)
4217 /* If the loop has multiple exits, emit the insn before the
4218 loop to ensure that it will always be executed no matter
4219 how the loop exits. Otherwise, emit the insn after the loop,
4220 since this is slightly more efficient. */
4221 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4222 insert_before
= loop_start
;
4224 insert_before
= end_insert_before
;
4225 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4229 /* If the insn to set the final value of the giv was emitted
4230 before the loop, then we must delete the insn inside the loop
4231 that sets it. If this is a LIBCALL, then we must delete
4232 every insn in the libcall. Note, however, that
4233 final_giv_value will only succeed when there are multiple
4234 exits if the giv is dead at each exit, hence it does not
4235 matter that the original insn remains because it is dead
4237 /* Delete the insn inside the loop that sets the giv since
4238 the giv is now set before (or after) the loop. */
4239 delete_insn (v
->insn
);
4243 if (loop_dump_stream
)
4245 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4246 INSN_UID (v
->insn
));
4247 print_rtl (loop_dump_stream
, v
->new_reg
);
4248 fprintf (loop_dump_stream
, "\n");
4252 /* All the givs based on the biv bl have been reduced if they
4255 /* For each giv not marked as maybe dead that has been combined with a
4256 second giv, clear any "maybe dead" mark on that second giv.
4257 v->new_reg will either be or refer to the register of the giv it
4260 Doing this clearing avoids problems in biv elimination where a
4261 giv's new_reg is a complex value that can't be put in the insn but
4262 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4263 Since the register will be used in either case, we'd prefer it be
4264 used from the simpler giv. */
4266 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4267 if (! v
->maybe_dead
&& v
->same
)
4268 v
->same
->maybe_dead
= 0;
4270 /* Try to eliminate the biv, if it is a candidate.
4271 This won't work if ! all_reduced,
4272 since the givs we planned to use might not have been reduced.
4274 We have to be careful that we didn't initially think we could eliminate
4275 this biv because of a giv that we now think may be dead and shouldn't
4276 be used as a biv replacement.
4278 Also, there is the possibility that we may have a giv that looks
4279 like it can be used to eliminate a biv, but the resulting insn
4280 isn't valid. This can happen, for example, on the 88k, where a
4281 JUMP_INSN can compare a register only with zero. Attempts to
4282 replace it with a compare with a constant will fail.
4284 Note that in cases where this call fails, we may have replaced some
4285 of the occurrences of the biv with a giv, but no harm was done in
4286 doing so in the rare cases where it can occur. */
4288 if (all_reduced
== 1 && bl
->eliminable
4289 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4290 threshold
, insn_count
))
4293 /* ?? If we created a new test to bypass the loop entirely,
4294 or otherwise drop straight in, based on this test, then
4295 we might want to rewrite it also. This way some later
4296 pass has more hope of removing the initialization of this
4299 /* If final_value != 0, then the biv may be used after loop end
4300 and we must emit an insn to set it just in case.
4302 Reversed bivs already have an insn after the loop setting their
4303 value, so we don't need another one. We can't calculate the
4304 proper final value for such a biv here anyways. */
4305 if (final_value
!= 0 && ! bl
->reversed
)
4309 /* If the loop has multiple exits, emit the insn before the
4310 loop to ensure that it will always be executed no matter
4311 how the loop exits. Otherwise, emit the insn after the
4312 loop, since this is slightly more efficient. */
4313 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4314 insert_before
= loop_start
;
4316 insert_before
= end_insert_before
;
4318 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4323 /* Delete all of the instructions inside the loop which set
4324 the biv, as they are all dead. If is safe to delete them,
4325 because an insn setting a biv will never be part of a libcall. */
4326 /* However, deleting them will invalidate the regno_last_uid info,
4327 so keeping them around is more convenient. Final_biv_value
4328 will only succeed when there are multiple exits if the biv
4329 is dead at each exit, hence it does not matter that the original
4330 insn remains, because it is dead anyways. */
4331 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4332 delete_insn (v
->insn
);
4335 if (loop_dump_stream
)
4336 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4341 /* Go through all the instructions in the loop, making all the
4342 register substitutions scheduled in REG_MAP. */
4344 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4345 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4346 || GET_CODE (p
) == CALL_INSN
)
4348 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4349 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4353 /* Unroll loops from within strength reduction so that we can use the
4354 induction variable information that strength_reduce has already
4357 if (flag_unroll_loops
)
4358 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4361 /* instrument the loop with bct insn */
4362 #ifdef HAVE_decrement_and_branch_on_count
4363 if (HAVE_decrement_and_branch_on_count
)
4364 insert_bct (loop_start
, loop_end
);
4368 if (loop_dump_stream
)
4369 fprintf (loop_dump_stream
, "\n");
4372 /* Return 1 if X is a valid source for an initial value (or as value being
4373 compared against in an initial test).
4375 X must be either a register or constant and must not be clobbered between
4376 the current insn and the start of the loop.
4378 INSN is the insn containing X. */
4381 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4390 /* Only consider pseudos we know about initialized in insns whose luids
4392 if (GET_CODE (x
) != REG
4393 || REGNO (x
) >= max_reg_before_loop
)
4396 /* Don't use call-clobbered registers across a call which clobbers it. On
4397 some machines, don't use any hard registers at all. */
4398 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4400 #ifdef SMALL_REGISTER_CLASSES
4401 SMALL_REGISTER_CLASSES
4405 || (call_used_regs
[REGNO (x
)] && call_seen
))
4409 /* Don't use registers that have been clobbered before the start of the
4411 if (reg_set_between_p (x
, insn
, loop_start
))
4417 /* Scan X for memory refs and check each memory address
4418 as a possible giv. INSN is the insn whose pattern X comes from.
4419 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4420 every loop iteration. */
4423 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4426 int not_every_iteration
;
4427 rtx loop_start
, loop_end
;
4430 register enum rtx_code code
;
4436 code
= GET_CODE (x
);
4460 benefit
= general_induction_var (XEXP (x
, 0),
4461 &src_reg
, &add_val
, &mult_val
);
4463 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4464 Such a giv isn't useful. */
4465 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4467 /* Found one; record it. */
4469 = (struct induction
*) oballoc (sizeof (struct induction
));
4471 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4472 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4473 &XEXP (x
, 0), loop_start
, loop_end
);
4475 v
->mem_mode
= GET_MODE (x
);
4481 /* Recursively scan the subexpressions for other mem refs. */
4483 fmt
= GET_RTX_FORMAT (code
);
4484 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4486 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4488 else if (fmt
[i
] == 'E')
4489 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4490 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4491 loop_start
, loop_end
);
4494 /* Fill in the data about one biv update.
4495 V is the `struct induction' in which we record the biv. (It is
4496 allocated by the caller, with alloca.)
4497 INSN is the insn that sets it.
4498 DEST_REG is the biv's reg.
4500 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4501 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4502 being set to INC_VAL.
4504 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4505 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4506 can be executed more than once per iteration. If MAYBE_MULTIPLE
4507 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4508 executed exactly once per iteration. */
4511 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4512 not_every_iteration
, maybe_multiple
)
4513 struct induction
*v
;
4518 int not_every_iteration
;
4521 struct iv_class
*bl
;
4524 v
->src_reg
= dest_reg
;
4525 v
->dest_reg
= dest_reg
;
4526 v
->mult_val
= mult_val
;
4527 v
->add_val
= inc_val
;
4528 v
->mode
= GET_MODE (dest_reg
);
4529 v
->always_computable
= ! not_every_iteration
;
4530 v
->always_executed
= ! not_every_iteration
;
4531 v
->maybe_multiple
= maybe_multiple
;
4533 /* Add this to the reg's iv_class, creating a class
4534 if this is the first incrementation of the reg. */
4536 bl
= reg_biv_class
[REGNO (dest_reg
)];
4539 /* Create and initialize new iv_class. */
4541 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4543 bl
->regno
= REGNO (dest_reg
);
4549 /* Set initial value to the reg itself. */
4550 bl
->initial_value
= dest_reg
;
4551 /* We haven't seen the initializing insn yet */
4554 bl
->initial_test
= 0;
4555 bl
->incremented
= 0;
4559 bl
->total_benefit
= 0;
4561 /* Add this class to loop_iv_list. */
4562 bl
->next
= loop_iv_list
;
4565 /* Put it in the array of biv register classes. */
4566 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4569 /* Update IV_CLASS entry for this biv. */
4570 v
->next_iv
= bl
->biv
;
4573 if (mult_val
== const1_rtx
)
4574 bl
->incremented
= 1;
4576 if (loop_dump_stream
)
4578 fprintf (loop_dump_stream
,
4579 "Insn %d: possible biv, reg %d,",
4580 INSN_UID (insn
), REGNO (dest_reg
));
4581 if (GET_CODE (inc_val
) == CONST_INT
)
4582 fprintf (loop_dump_stream
, " const = %d\n",
4586 fprintf (loop_dump_stream
, " const = ");
4587 print_rtl (loop_dump_stream
, inc_val
);
4588 fprintf (loop_dump_stream
, "\n");
4593 /* Fill in the data about one giv.
4594 V is the `struct induction' in which we record the giv. (It is
4595 allocated by the caller, with alloca.)
4596 INSN is the insn that sets it.
4597 BENEFIT estimates the savings from deleting this insn.
4598 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4599 into a register or is used as a memory address.
4601 SRC_REG is the biv reg which the giv is computed from.
4602 DEST_REG is the giv's reg (if the giv is stored in a reg).
4603 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4604 LOCATION points to the place where this giv's value appears in INSN. */
4607 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4608 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4609 struct induction
*v
;
4613 rtx mult_val
, add_val
;
4616 int not_every_iteration
;
4618 rtx loop_start
, loop_end
;
4620 struct induction
*b
;
4621 struct iv_class
*bl
;
4622 rtx set
= single_set (insn
);
4626 v
->src_reg
= src_reg
;
4628 v
->dest_reg
= dest_reg
;
4629 v
->mult_val
= mult_val
;
4630 v
->add_val
= add_val
;
4631 v
->benefit
= benefit
;
4632 v
->location
= location
;
4634 v
->combined_with
= 0;
4635 v
->maybe_multiple
= 0;
4637 v
->derive_adjustment
= 0;
4643 v
->auto_inc_opt
= 0;
4647 /* The v->always_computable field is used in update_giv_derive, to
4648 determine whether a giv can be used to derive another giv. For a
4649 DEST_REG giv, INSN computes a new value for the giv, so its value
4650 isn't computable if INSN insn't executed every iteration.
4651 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4652 it does not compute a new value. Hence the value is always computable
4653 regardless of whether INSN is executed each iteration. */
4655 if (type
== DEST_ADDR
)
4656 v
->always_computable
= 1;
4658 v
->always_computable
= ! not_every_iteration
;
4660 v
->always_executed
= ! not_every_iteration
;
4662 if (type
== DEST_ADDR
)
4664 v
->mode
= GET_MODE (*location
);
4668 else /* type == DEST_REG */
4670 v
->mode
= GET_MODE (SET_DEST (set
));
4672 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4673 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4675 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4677 /* If the lifetime is zero, it means that this register is
4678 really a dead store. So mark this as a giv that can be
4679 ignored. This will not prevent the biv from being eliminated. */
4680 if (v
->lifetime
== 0)
4683 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4684 reg_iv_info
[REGNO (dest_reg
)] = v
;
4687 /* Add the giv to the class of givs computed from one biv. */
4689 bl
= reg_biv_class
[REGNO (src_reg
)];
4692 v
->next_iv
= bl
->giv
;
4694 /* Don't count DEST_ADDR. This is supposed to count the number of
4695 insns that calculate givs. */
4696 if (type
== DEST_REG
)
4698 bl
->total_benefit
+= benefit
;
4701 /* Fatal error, biv missing for this giv? */
4704 if (type
== DEST_ADDR
)
4708 /* The giv can be replaced outright by the reduced register only if all
4709 of the following conditions are true:
4710 - the insn that sets the giv is always executed on any iteration
4711 on which the giv is used at all
4712 (there are two ways to deduce this:
4713 either the insn is executed on every iteration,
4714 or all uses follow that insn in the same basic block),
4715 - the giv is not used outside the loop
4716 - no assignments to the biv occur during the giv's lifetime. */
4718 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4719 /* Previous line always fails if INSN was moved by loop opt. */
4720 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4721 && (! not_every_iteration
4722 || last_use_this_basic_block (dest_reg
, insn
)))
4724 /* Now check that there are no assignments to the biv within the
4725 giv's lifetime. This requires two separate checks. */
4727 /* Check each biv update, and fail if any are between the first
4728 and last use of the giv.
4730 If this loop contains an inner loop that was unrolled, then
4731 the insn modifying the biv may have been emitted by the loop
4732 unrolling code, and hence does not have a valid luid. Just
4733 mark the biv as not replaceable in this case. It is not very
4734 useful as a biv, because it is used in two different loops.
4735 It is very unlikely that we would be able to optimize the giv
4736 using this biv anyways. */
4739 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4741 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4742 || ((uid_luid
[INSN_UID (b
->insn
)]
4743 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4744 && (uid_luid
[INSN_UID (b
->insn
)]
4745 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4748 v
->not_replaceable
= 1;
4753 /* If there are any backwards branches that go from after the
4754 biv update to before it, then this giv is not replaceable. */
4756 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4757 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4760 v
->not_replaceable
= 1;
4766 /* May still be replaceable, we don't have enough info here to
4769 v
->not_replaceable
= 0;
4773 if (loop_dump_stream
)
4775 if (type
== DEST_REG
)
4776 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4777 INSN_UID (insn
), REGNO (dest_reg
));
4779 fprintf (loop_dump_stream
, "Insn %d: dest address",
4782 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4783 REGNO (src_reg
), v
->benefit
);
4784 fprintf (loop_dump_stream
, " used %d lifetime %d",
4785 v
->times_used
, v
->lifetime
);
4788 fprintf (loop_dump_stream
, " replaceable");
4790 if (GET_CODE (mult_val
) == CONST_INT
)
4791 fprintf (loop_dump_stream
, " mult %d",
4795 fprintf (loop_dump_stream
, " mult ");
4796 print_rtl (loop_dump_stream
, mult_val
);
4799 if (GET_CODE (add_val
) == CONST_INT
)
4800 fprintf (loop_dump_stream
, " add %d",
4804 fprintf (loop_dump_stream
, " add ");
4805 print_rtl (loop_dump_stream
, add_val
);
4809 if (loop_dump_stream
)
4810 fprintf (loop_dump_stream
, "\n");
4815 /* All this does is determine whether a giv can be made replaceable because
4816 its final value can be calculated. This code can not be part of record_giv
4817 above, because final_giv_value requires that the number of loop iterations
4818 be known, and that can not be accurately calculated until after all givs
4819 have been identified. */
4822 check_final_value (v
, loop_start
, loop_end
)
4823 struct induction
*v
;
4824 rtx loop_start
, loop_end
;
4826 struct iv_class
*bl
;
4827 rtx final_value
= 0;
4829 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4831 /* DEST_ADDR givs will never reach here, because they are always marked
4832 replaceable above in record_giv. */
4834 /* The giv can be replaced outright by the reduced register only if all
4835 of the following conditions are true:
4836 - the insn that sets the giv is always executed on any iteration
4837 on which the giv is used at all
4838 (there are two ways to deduce this:
4839 either the insn is executed on every iteration,
4840 or all uses follow that insn in the same basic block),
4841 - its final value can be calculated (this condition is different
4842 than the one above in record_giv)
4843 - no assignments to the biv occur during the giv's lifetime. */
4846 /* This is only called now when replaceable is known to be false. */
4847 /* Clear replaceable, so that it won't confuse final_giv_value. */
4851 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4852 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4854 int biv_increment_seen
= 0;
4860 /* When trying to determine whether or not a biv increment occurs
4861 during the lifetime of the giv, we can ignore uses of the variable
4862 outside the loop because final_value is true. Hence we can not
4863 use regno_last_uid and regno_first_uid as above in record_giv. */
4865 /* Search the loop to determine whether any assignments to the
4866 biv occur during the giv's lifetime. Start with the insn
4867 that sets the giv, and search around the loop until we come
4868 back to that insn again.
4870 Also fail if there is a jump within the giv's lifetime that jumps
4871 to somewhere outside the lifetime but still within the loop. This
4872 catches spaghetti code where the execution order is not linear, and
4873 hence the above test fails. Here we assume that the giv lifetime
4874 does not extend from one iteration of the loop to the next, so as
4875 to make the test easier. Since the lifetime isn't known yet,
4876 this requires two loops. See also record_giv above. */
4878 last_giv_use
= v
->insn
;
4884 p
= NEXT_INSN (loop_start
);
4888 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4889 || GET_CODE (p
) == CALL_INSN
)
4891 if (biv_increment_seen
)
4893 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4896 v
->not_replaceable
= 1;
4900 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4901 biv_increment_seen
= 1;
4902 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4907 /* Now that the lifetime of the giv is known, check for branches
4908 from within the lifetime to outside the lifetime if it is still
4918 p
= NEXT_INSN (loop_start
);
4919 if (p
== last_giv_use
)
4922 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4923 && LABEL_NAME (JUMP_LABEL (p
))
4924 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4925 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4926 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4927 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4928 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4929 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4930 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4933 v
->not_replaceable
= 1;
4935 if (loop_dump_stream
)
4936 fprintf (loop_dump_stream
,
4937 "Found branch outside giv lifetime.\n");
4944 /* If it is replaceable, then save the final value. */
4946 v
->final_value
= final_value
;
4949 if (loop_dump_stream
&& v
->replaceable
)
4950 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4951 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4954 /* Update the status of whether a giv can derive other givs.
4956 We need to do something special if there is or may be an update to the biv
4957 between the time the giv is defined and the time it is used to derive
4960 In addition, a giv that is only conditionally set is not allowed to
4961 derive another giv once a label has been passed.
4963 The cases we look at are when a label or an update to a biv is passed. */
4966 update_giv_derive (p
)
4969 struct iv_class
*bl
;
4970 struct induction
*biv
, *giv
;
4974 /* Search all IV classes, then all bivs, and finally all givs.
4976 There are three cases we are concerned with. First we have the situation
4977 of a giv that is only updated conditionally. In that case, it may not
4978 derive any givs after a label is passed.
4980 The second case is when a biv update occurs, or may occur, after the
4981 definition of a giv. For certain biv updates (see below) that are
4982 known to occur between the giv definition and use, we can adjust the
4983 giv definition. For others, or when the biv update is conditional,
4984 we must prevent the giv from deriving any other givs. There are two
4985 sub-cases within this case.
4987 If this is a label, we are concerned with any biv update that is done
4988 conditionally, since it may be done after the giv is defined followed by
4989 a branch here (actually, we need to pass both a jump and a label, but
4990 this extra tracking doesn't seem worth it).
4992 If this is a jump, we are concerned about any biv update that may be
4993 executed multiple times. We are actually only concerned about
4994 backward jumps, but it is probably not worth performing the test
4995 on the jump again here.
4997 If this is a biv update, we must adjust the giv status to show that a
4998 subsequent biv update was performed. If this adjustment cannot be done,
4999 the giv cannot derive further givs. */
5001 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5002 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5003 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5006 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5008 /* If cant_derive is already true, there is no point in
5009 checking all of these conditions again. */
5010 if (giv
->cant_derive
)
5013 /* If this giv is conditionally set and we have passed a label,
5014 it cannot derive anything. */
5015 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5016 giv
->cant_derive
= 1;
5018 /* Skip givs that have mult_val == 0, since
5019 they are really invariants. Also skip those that are
5020 replaceable, since we know their lifetime doesn't contain
5022 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5025 /* The only way we can allow this giv to derive another
5026 is if this is a biv increment and we can form the product
5027 of biv->add_val and giv->mult_val. In this case, we will
5028 be able to compute a compensation. */
5029 else if (biv
->insn
== p
)
5033 if (biv
->mult_val
== const1_rtx
)
5034 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
5039 if (tem
&& giv
->derive_adjustment
)
5040 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
5041 giv
->derive_adjustment
),
5044 giv
->derive_adjustment
= tem
;
5046 giv
->cant_derive
= 1;
5048 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5049 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5050 giv
->cant_derive
= 1;
5055 /* Check whether an insn is an increment legitimate for a basic induction var.
5056 X is the source of insn P, or a part of it.
5057 MODE is the mode in which X should be interpreted.
5059 DEST_REG is the putative biv, also the destination of the insn.
5060 We accept patterns of these forms:
5061 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5062 REG = INVARIANT + REG
5064 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5065 and store the additive term into *INC_VAL.
5067 If X is an assignment of an invariant into DEST_REG, we set
5068 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5070 We also want to detect a BIV when it corresponds to a variable
5071 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5072 of the variable may be a PLUS that adds a SUBREG of that variable to
5073 an invariant and then sign- or zero-extends the result of the PLUS
5076 Most GIVs in such cases will be in the promoted mode, since that is the
5077 probably the natural computation mode (and almost certainly the mode
5078 used for addresses) on the machine. So we view the pseudo-reg containing
5079 the variable as the BIV, as if it were simply incremented.
5081 Note that treating the entire pseudo as a BIV will result in making
5082 simple increments to any GIVs based on it. However, if the variable
5083 overflows in its declared mode but not its promoted mode, the result will
5084 be incorrect. This is acceptable if the variable is signed, since
5085 overflows in such cases are undefined, but not if it is unsigned, since
5086 those overflows are defined. So we only check for SIGN_EXTEND and
5089 If we cannot find a biv, we return 0. */
5092 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5094 enum machine_mode mode
;
5100 register enum rtx_code code
;
5104 code
= GET_CODE (x
);
5108 if (XEXP (x
, 0) == dest_reg
5109 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5110 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5111 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5113 else if (XEXP (x
, 1) == dest_reg
5114 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5115 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5116 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5121 if (invariant_p (arg
) != 1)
5124 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5125 *mult_val
= const1_rtx
;
5129 /* If this is a SUBREG for a promoted variable, check the inner
5131 if (SUBREG_PROMOTED_VAR_P (x
))
5132 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5133 dest_reg
, p
, inc_val
, mult_val
);
5137 /* If this register is assigned in the previous insn, look at its
5138 source, but don't go outside the loop or past a label. */
5140 for (insn
= PREV_INSN (p
);
5141 (insn
&& GET_CODE (insn
) == NOTE
5142 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5143 insn
= PREV_INSN (insn
))
5147 set
= single_set (insn
);
5150 && (SET_DEST (set
) == x
5151 || (GET_CODE (SET_DEST (set
)) == SUBREG
5152 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5154 && SUBREG_REG (SET_DEST (set
)) == x
)))
5155 return basic_induction_var (SET_SRC (set
),
5156 (GET_MODE (SET_SRC (set
)) == VOIDmode
5158 : GET_MODE (SET_SRC (set
))),
5161 /* ... fall through ... */
5163 /* Can accept constant setting of biv only when inside inner most loop.
5164 Otherwise, a biv of an inner loop may be incorrectly recognized
5165 as a biv of the outer loop,
5166 causing code to be moved INTO the inner loop. */
5168 if (invariant_p (x
) != 1)
5173 if (loops_enclosed
== 1)
5175 /* Possible bug here? Perhaps we don't know the mode of X. */
5176 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5177 *mult_val
= const0_rtx
;
5184 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5185 dest_reg
, p
, inc_val
, mult_val
);
5187 /* Similar, since this can be a sign extension. */
5188 for (insn
= PREV_INSN (p
);
5189 (insn
&& GET_CODE (insn
) == NOTE
5190 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5191 insn
= PREV_INSN (insn
))
5195 set
= single_set (insn
);
5197 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5198 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5199 && INTVAL (XEXP (x
, 1)) >= 0
5200 && GET_CODE (SET_SRC (set
)) == ASHIFT
5201 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5202 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5203 GET_MODE (XEXP (x
, 0)),
5204 dest_reg
, insn
, inc_val
, mult_val
);
5212 /* A general induction variable (giv) is any quantity that is a linear
5213 function of a basic induction variable,
5214 i.e. giv = biv * mult_val + add_val.
5215 The coefficients can be any loop invariant quantity.
5216 A giv need not be computed directly from the biv;
5217 it can be computed by way of other givs. */
5219 /* Determine whether X computes a giv.
5220 If it does, return a nonzero value
5221 which is the benefit from eliminating the computation of X;
5222 set *SRC_REG to the register of the biv that it is computed from;
5223 set *ADD_VAL and *MULT_VAL to the coefficients,
5224 such that the value of X is biv * mult + add; */
5227 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5237 /* If this is an invariant, forget it, it isn't a giv. */
5238 if (invariant_p (x
) == 1)
5241 /* See if the expression could be a giv and get its form.
5242 Mark our place on the obstack in case we don't find a giv. */
5243 storage
= (char *) oballoc (0);
5244 x
= simplify_giv_expr (x
, &benefit
);
5251 switch (GET_CODE (x
))
5255 /* Since this is now an invariant and wasn't before, it must be a giv
5256 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5258 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5259 *mult_val
= const0_rtx
;
5264 /* This is equivalent to a BIV. */
5266 *mult_val
= const1_rtx
;
5267 *add_val
= const0_rtx
;
5271 /* Either (plus (biv) (invar)) or
5272 (plus (mult (biv) (invar_1)) (invar_2)). */
5273 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5275 *src_reg
= XEXP (XEXP (x
, 0), 0);
5276 *mult_val
= XEXP (XEXP (x
, 0), 1);
5280 *src_reg
= XEXP (x
, 0);
5281 *mult_val
= const1_rtx
;
5283 *add_val
= XEXP (x
, 1);
5287 /* ADD_VAL is zero. */
5288 *src_reg
= XEXP (x
, 0);
5289 *mult_val
= XEXP (x
, 1);
5290 *add_val
= const0_rtx
;
5297 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5298 unless they are CONST_INT). */
5299 if (GET_CODE (*add_val
) == USE
)
5300 *add_val
= XEXP (*add_val
, 0);
5301 if (GET_CODE (*mult_val
) == USE
)
5302 *mult_val
= XEXP (*mult_val
, 0);
5304 benefit
+= rtx_cost (orig_x
, SET
);
5306 /* Always return some benefit if this is a giv so it will be detected
5307 as such. This allows elimination of bivs that might otherwise
5308 not be eliminated. */
5309 return benefit
== 0 ? 1 : benefit
;
5312 /* Given an expression, X, try to form it as a linear function of a biv.
5313 We will canonicalize it to be of the form
5314 (plus (mult (BIV) (invar_1))
5316 with possible degeneracies.
5318 The invariant expressions must each be of a form that can be used as a
5319 machine operand. We surround then with a USE rtx (a hack, but localized
5320 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5321 routine; it is the caller's responsibility to strip them.
5323 If no such canonicalization is possible (i.e., two biv's are used or an
5324 expression that is neither invariant nor a biv or giv), this routine
5327 For a non-zero return, the result will have a code of CONST_INT, USE,
5328 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5330 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5333 simplify_giv_expr (x
, benefit
)
5337 enum machine_mode mode
= GET_MODE (x
);
5341 /* If this is not an integer mode, or if we cannot do arithmetic in this
5342 mode, this can't be a giv. */
5343 if (mode
!= VOIDmode
5344 && (GET_MODE_CLASS (mode
) != MODE_INT
5345 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5348 switch (GET_CODE (x
))
5351 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5352 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5353 if (arg0
== 0 || arg1
== 0)
5356 /* Put constant last, CONST_INT last if both constant. */
5357 if ((GET_CODE (arg0
) == USE
5358 || GET_CODE (arg0
) == CONST_INT
)
5359 && GET_CODE (arg1
) != CONST_INT
)
5360 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5362 /* Handle addition of zero, then addition of an invariant. */
5363 if (arg1
== const0_rtx
)
5365 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5366 switch (GET_CODE (arg0
))
5370 /* Both invariant. Only valid if sum is machine operand.
5371 First strip off possible USE on first operand. */
5372 if (GET_CODE (arg0
) == USE
)
5373 arg0
= XEXP (arg0
, 0);
5376 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5378 tem
= plus_constant (arg0
, INTVAL (arg1
));
5379 if (GET_CODE (tem
) != CONST_INT
)
5380 tem
= gen_rtx (USE
, mode
, tem
);
5387 /* biv + invar or mult + invar. Return sum. */
5388 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5391 /* (a + invar_1) + invar_2. Associate. */
5392 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5394 gen_rtx (PLUS
, mode
,
5395 XEXP (arg0
, 1), arg1
)),
5402 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5403 MULT to reduce cases. */
5404 if (GET_CODE (arg0
) == REG
)
5405 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5406 if (GET_CODE (arg1
) == REG
)
5407 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5409 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5410 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5411 Recurse to associate the second PLUS. */
5412 if (GET_CODE (arg1
) == MULT
)
5413 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5415 if (GET_CODE (arg1
) == PLUS
)
5416 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5417 gen_rtx (PLUS
, mode
,
5418 arg0
, XEXP (arg1
, 0)),
5422 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5423 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5426 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5429 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5431 gen_rtx (PLUS
, mode
,
5437 /* Handle "a - b" as "a + b * (-1)". */
5438 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5440 gen_rtx (MULT
, mode
,
5441 XEXP (x
, 1), constm1_rtx
)),
5445 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5446 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5447 if (arg0
== 0 || arg1
== 0)
5450 /* Put constant last, CONST_INT last if both constant. */
5451 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5452 && GET_CODE (arg1
) != CONST_INT
)
5453 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5455 /* If second argument is not now constant, not giv. */
5456 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5459 /* Handle multiply by 0 or 1. */
5460 if (arg1
== const0_rtx
)
5463 else if (arg1
== const1_rtx
)
5466 switch (GET_CODE (arg0
))
5469 /* biv * invar. Done. */
5470 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5473 /* Product of two constants. */
5474 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5477 /* invar * invar. Not giv. */
5481 /* (a * invar_1) * invar_2. Associate. */
5482 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5484 gen_rtx (MULT
, mode
,
5485 XEXP (arg0
, 1), arg1
)),
5489 /* (a + invar_1) * invar_2. Distribute. */
5490 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5491 gen_rtx (MULT
, mode
,
5492 XEXP (arg0
, 0), arg1
),
5493 gen_rtx (MULT
, mode
,
5494 XEXP (arg0
, 1), arg1
)),
5502 /* Shift by constant is multiply by power of two. */
5503 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5506 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5508 GEN_INT ((HOST_WIDE_INT
) 1
5509 << INTVAL (XEXP (x
, 1)))),
5513 /* "-a" is "a * (-1)" */
5514 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5518 /* "~a" is "-a - 1". Silly, but easy. */
5519 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5520 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5525 /* Already in proper form for invariant. */
5529 /* If this is a new register, we can't deal with it. */
5530 if (REGNO (x
) >= max_reg_before_loop
)
5533 /* Check for biv or giv. */
5534 switch (reg_iv_type
[REGNO (x
)])
5538 case GENERAL_INDUCT
:
5540 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5542 /* Form expression from giv and add benefit. Ensure this giv
5543 can derive another and subtract any needed adjustment if so. */
5544 *benefit
+= v
->benefit
;
5548 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5549 v
->src_reg
, v
->mult_val
),
5551 if (v
->derive_adjustment
)
5552 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5553 return simplify_giv_expr (tem
, benefit
);
5557 /* Fall through to general case. */
5559 /* If invariant, return as USE (unless CONST_INT).
5560 Otherwise, not giv. */
5561 if (GET_CODE (x
) == USE
)
5564 if (invariant_p (x
) == 1)
5566 if (GET_CODE (x
) == CONST_INT
)
5569 return gen_rtx (USE
, mode
, x
);
5576 /* Help detect a giv that is calculated by several consecutive insns;
5580 The caller has already identified the first insn P as having a giv as dest;
5581 we check that all other insns that set the same register follow
5582 immediately after P, that they alter nothing else,
5583 and that the result of the last is still a giv.
5585 The value is 0 if the reg set in P is not really a giv.
5586 Otherwise, the value is the amount gained by eliminating
5587 all the consecutive insns that compute the value.
5589 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5590 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5592 The coefficients of the ultimate giv value are stored in
5593 *MULT_VAL and *ADD_VAL. */
5596 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5611 /* Indicate that this is a giv so that we can update the value produced in
5612 each insn of the multi-insn sequence.
5614 This induction structure will be used only by the call to
5615 general_induction_var below, so we can allocate it on our stack.
5616 If this is a giv, our caller will replace the induct var entry with
5617 a new induction structure. */
5619 = (struct induction
*) alloca (sizeof (struct induction
));
5620 v
->src_reg
= src_reg
;
5621 v
->mult_val
= *mult_val
;
5622 v
->add_val
= *add_val
;
5623 v
->benefit
= first_benefit
;
5625 v
->derive_adjustment
= 0;
5627 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5628 reg_iv_info
[REGNO (dest_reg
)] = v
;
5630 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5635 code
= GET_CODE (p
);
5637 /* If libcall, skip to end of call sequence. */
5638 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5642 && (set
= single_set (p
))
5643 && GET_CODE (SET_DEST (set
)) == REG
5644 && SET_DEST (set
) == dest_reg
5645 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5647 /* Giv created by equivalent expression. */
5648 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5649 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5650 add_val
, mult_val
))))
5651 && src_reg
== v
->src_reg
)
5653 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5654 benefit
+= libcall_benefit (p
);
5657 v
->mult_val
= *mult_val
;
5658 v
->add_val
= *add_val
;
5659 v
->benefit
= benefit
;
5661 else if (code
!= NOTE
)
5663 /* Allow insns that set something other than this giv to a
5664 constant. Such insns are needed on machines which cannot
5665 include long constants and should not disqualify a giv. */
5667 && (set
= single_set (p
))
5668 && SET_DEST (set
) != dest_reg
5669 && CONSTANT_P (SET_SRC (set
)))
5672 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5680 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5681 represented by G1. If no such expression can be found, or it is clear that
5682 it cannot possibly be a valid address, 0 is returned.
5684 To perform the computation, we note that
5687 where `v' is the biv.
5689 So G2 = (c/a) * G1 + (d - b*c/a) */
5693 express_from (g1
, g2
)
5694 struct induction
*g1
, *g2
;
5698 /* The value that G1 will be multiplied by must be a constant integer. Also,
5699 the only chance we have of getting a valid address is if b*c/a (see above
5700 for notation) is also an integer. */
5701 if (GET_CODE (g1
->mult_val
) != CONST_INT
5702 || GET_CODE (g2
->mult_val
) != CONST_INT
5703 || GET_CODE (g1
->add_val
) != CONST_INT
5704 || g1
->mult_val
== const0_rtx
5705 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5708 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5709 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5711 /* Form simplified final result. */
5712 if (mult
== const0_rtx
)
5714 else if (mult
== const1_rtx
)
5715 mult
= g1
->dest_reg
;
5717 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5719 if (add
== const0_rtx
)
5722 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5726 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5727 (either directly or via an address expression) a register used to represent
5728 G1. Set g2->new_reg to a represtation of G1 (normally just
5732 combine_givs_p (g1
, g2
)
5733 struct induction
*g1
, *g2
;
5737 /* If these givs are identical, they can be combined. */
5738 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5739 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5741 g2
->new_reg
= g1
->dest_reg
;
5746 /* If G2 can be expressed as a function of G1 and that function is valid
5747 as an address and no more expensive than using a register for G2,
5748 the expression of G2 in terms of G1 can be used. */
5749 if (g2
->giv_type
== DEST_ADDR
5750 && (tem
= express_from (g1
, g2
)) != 0
5751 && memory_address_p (g2
->mem_mode
, tem
)
5752 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5762 #ifdef GIV_SORT_CRITERION
5763 /* Compare two givs and sort the most desirable one for combinations first.
5764 This is used only in one qsort call below. */
5768 struct induction
**x
, **y
;
5770 GIV_SORT_CRITERION (*x
, *y
);
5776 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5777 any other. If so, point SAME to the giv combined with and set NEW_REG to
5778 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5779 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5783 struct iv_class
*bl
;
5785 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5786 int i
, j
, giv_count
, pass
;
5788 /* Count givs, because bl->giv_count is incorrect here. */
5790 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5794 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5796 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5797 giv_array
[i
++] = g1
;
5799 #ifdef GIV_SORT_CRITERION
5800 /* Sort the givs if GIV_SORT_CRITERION is defined.
5801 This is usually defined for processors which lack
5802 negative register offsets so more givs may be combined. */
5804 if (loop_dump_stream
)
5805 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5807 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5810 for (i
= 0; i
< giv_count
; i
++)
5813 for (pass
= 0; pass
<= 1; pass
++)
5814 for (j
= 0; j
< giv_count
; j
++)
5818 /* First try to combine with replaceable givs, then all givs. */
5819 && (g1
->replaceable
|| pass
== 1)
5820 /* If either has already been combined or is to be ignored, can't
5822 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5823 /* If something has been based on G2, G2 cannot itself be based
5824 on something else. */
5825 && ! g2
->combined_with
5826 && combine_givs_p (g1
, g2
))
5828 /* g2->new_reg set by `combine_givs_p' */
5830 g1
->combined_with
= 1;
5832 /* If one of these givs is a DEST_REG that was only used
5833 once, by the other giv, this is actually a single use.
5834 The DEST_REG has the correct cost, while the other giv
5835 counts the REG use too often. */
5836 if (g2
->giv_type
== DEST_REG
5837 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5838 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5839 g1
->benefit
= g2
->benefit
;
5840 else if (g1
->giv_type
!= DEST_REG
5841 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5842 || ! reg_mentioned_p (g1
->dest_reg
,
5843 PATTERN (g2
->insn
)))
5845 g1
->benefit
+= g2
->benefit
;
5846 g1
->times_used
+= g2
->times_used
;
5848 /* ??? The new final_[bg]iv_value code does a much better job
5849 of finding replaceable giv's, and hence this code may no
5850 longer be necessary. */
5851 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5852 g1
->benefit
-= copy_cost
;
5853 g1
->lifetime
+= g2
->lifetime
;
5855 if (loop_dump_stream
)
5856 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5857 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5863 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5866 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5867 rtx b
; /* initial value of basic induction variable */
5868 rtx m
; /* multiplicative constant */
5869 rtx a
; /* additive constant */
5870 rtx reg
; /* destination register */
5876 /* Prevent unexpected sharing of these rtx. */
5880 /* Increase the lifetime of any invariants moved further in code. */
5881 update_reg_last_use (a
, insert_before
);
5882 update_reg_last_use (b
, insert_before
);
5883 update_reg_last_use (m
, insert_before
);
5886 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5888 emit_move_insn (reg
, result
);
5889 seq
= gen_sequence ();
5892 emit_insn_before (seq
, insert_before
);
5894 record_base_value (REGNO (reg
), b
);
5897 /* Test whether A * B can be computed without
5898 an actual multiply insn. Value is 1 if so. */
5901 product_cheap_p (a
, b
)
5907 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5908 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5911 /* If only one is constant, make it B. */
5912 if (GET_CODE (a
) == CONST_INT
)
5913 tmp
= a
, a
= b
, b
= tmp
;
5915 /* If first constant, both constant, so don't need multiply. */
5916 if (GET_CODE (a
) == CONST_INT
)
5919 /* If second not constant, neither is constant, so would need multiply. */
5920 if (GET_CODE (b
) != CONST_INT
)
5923 /* One operand is constant, so might not need multiply insn. Generate the
5924 code for the multiply and see if a call or multiply, or long sequence
5925 of insns is generated. */
5927 rtl_obstack
= &temp_obstack
;
5929 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5930 tmp
= gen_sequence ();
5933 if (GET_CODE (tmp
) == SEQUENCE
)
5935 if (XVEC (tmp
, 0) == 0)
5937 else if (XVECLEN (tmp
, 0) > 3)
5940 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5942 rtx insn
= XVECEXP (tmp
, 0, i
);
5944 if (GET_CODE (insn
) != INSN
5945 || (GET_CODE (PATTERN (insn
)) == SET
5946 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5947 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5948 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5949 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5956 else if (GET_CODE (tmp
) == SET
5957 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5959 else if (GET_CODE (tmp
) == PARALLEL
5960 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5961 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5964 /* Free any storage we obtained in generating this multiply and restore rtl
5965 allocation to its normal obstack. */
5966 obstack_free (&temp_obstack
, storage
);
5967 rtl_obstack
= old_rtl_obstack
;
5972 /* Check to see if loop can be terminated by a "decrement and branch until
5973 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5974 Also try reversing an increment loop to a decrement loop
5975 to see if the optimization can be performed.
5976 Value is nonzero if optimization was performed. */
5978 /* This is useful even if the architecture doesn't have such an insn,
5979 because it might change a loops which increments from 0 to n to a loop
5980 which decrements from n to 0. A loop that decrements to zero is usually
5981 faster than one that increments from zero. */
5983 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5984 such as approx_final_value, biv_total_increment, loop_iterations, and
5985 final_[bg]iv_value. */
5988 check_dbra_loop (loop_end
, insn_count
, loop_start
)
5993 struct iv_class
*bl
;
6000 rtx before_comparison
;
6003 /* If last insn is a conditional branch, and the insn before tests a
6004 register value, try to optimize it. Otherwise, we can't do anything. */
6006 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
6007 if (comparison
== 0)
6010 /* Check all of the bivs to see if the compare uses one of them.
6011 Skip biv's set more than once because we can't guarantee that
6012 it will be zero on the last iteration. Also skip if the biv is
6013 used between its update and the test insn. */
6015 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6017 if (bl
->biv_count
== 1
6018 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6019 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6020 PREV_INSN (PREV_INSN (loop_end
))))
6027 /* Look for the case where the basic induction variable is always
6028 nonnegative, and equals zero on the last iteration.
6029 In this case, add a reg_note REG_NONNEG, which allows the
6030 m68k DBRA instruction to be used. */
6032 if (((GET_CODE (comparison
) == GT
6033 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6034 && INTVAL (XEXP (comparison
, 1)) == -1)
6035 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6036 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6037 && INTVAL (bl
->biv
->add_val
) < 0)
6039 /* Initial value must be greater than 0,
6040 init_val % -dec_value == 0 to ensure that it equals zero on
6041 the last iteration */
6043 if (GET_CODE (bl
->initial_value
) == CONST_INT
6044 && INTVAL (bl
->initial_value
) > 0
6045 && (INTVAL (bl
->initial_value
)
6046 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6048 /* register always nonnegative, add REG_NOTE to branch */
6049 REG_NOTES (PREV_INSN (loop_end
))
6050 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6051 REG_NOTES (PREV_INSN (loop_end
)));
6057 /* If the decrement is 1 and the value was tested as >= 0 before
6058 the loop, then we can safely optimize. */
6059 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6061 if (GET_CODE (p
) == CODE_LABEL
)
6063 if (GET_CODE (p
) != JUMP_INSN
)
6066 before_comparison
= get_condition_for_loop (p
);
6067 if (before_comparison
6068 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6069 && GET_CODE (before_comparison
) == LT
6070 && XEXP (before_comparison
, 1) == const0_rtx
6071 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6072 && INTVAL (bl
->biv
->add_val
) == -1)
6074 REG_NOTES (PREV_INSN (loop_end
))
6075 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6076 REG_NOTES (PREV_INSN (loop_end
)));
6083 else if (num_mem_sets
<= 1)
6085 /* Try to change inc to dec, so can apply above optimization. */
6087 all registers modified are induction variables or invariant,
6088 all memory references have non-overlapping addresses
6089 (obviously true if only one write)
6090 allow 2 insns for the compare/jump at the end of the loop. */
6091 /* Also, we must avoid any instructions which use both the reversed
6092 biv and another biv. Such instructions will fail if the loop is
6093 reversed. We meet this condition by requiring that either
6094 no_use_except_counting is true, or else that there is only
6096 int num_nonfixed_reads
= 0;
6097 /* 1 if the iteration var is used only to count iterations. */
6098 int no_use_except_counting
= 0;
6099 /* 1 if the loop has no memory store, or it has a single memory store
6100 which is reversible. */
6101 int reversible_mem_store
= 1;
6103 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6104 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6105 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6107 if (bl
->giv_count
== 0
6108 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6110 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6112 /* If there are no givs for this biv, and the only exit is the
6113 fall through at the end of the the loop, then
6114 see if perhaps there are no uses except to count. */
6115 no_use_except_counting
= 1;
6116 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6117 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6119 rtx set
= single_set (p
);
6121 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6122 && REGNO (SET_DEST (set
)) == bl
->regno
)
6123 /* An insn that sets the biv is okay. */
6125 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6126 || p
== prev_nonnote_insn (loop_end
))
6127 /* Don't bother about the end test. */
6129 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6130 /* Any other use of the biv is no good. */
6132 no_use_except_counting
= 0;
6138 /* If the loop has a single store, and the destination address is
6139 invariant, then we can't reverse the loop, because this address
6140 might then have the wrong value at loop exit.
6141 This would work if the source was invariant also, however, in that
6142 case, the insn should have been moved out of the loop. */
6144 if (num_mem_sets
== 1)
6145 reversible_mem_store
6146 = (! unknown_address_altered
6147 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6149 /* This code only acts for innermost loops. Also it simplifies
6150 the memory address check by only reversing loops with
6151 zero or one memory access.
6152 Two memory accesses could involve parts of the same array,
6153 and that can't be reversed. */
6155 if (num_nonfixed_reads
<= 1
6157 && !loop_has_volatile
6158 && reversible_mem_store
6159 && (no_use_except_counting
6160 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6161 + num_movables
+ 2 == insn_count
)
6162 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6166 /* Loop can be reversed. */
6167 if (loop_dump_stream
)
6168 fprintf (loop_dump_stream
, "Can reverse loop\n");
6170 /* Now check other conditions:
6171 initial_value must be zero,
6172 final_value % add_val == 0, so that when reversed, the
6173 biv will be zero on the last iteration.
6175 This test can probably be improved since +/- 1 in the constant
6176 can be obtained by changing LT to LE and vice versa; this is
6179 if (comparison
&& bl
->initial_value
== const0_rtx
6180 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6181 /* LE gets turned into LT */
6182 && GET_CODE (comparison
) == LT
6183 && (INTVAL (XEXP (comparison
, 1))
6184 % INTVAL (bl
->biv
->add_val
)) == 0)
6186 /* Register will always be nonnegative, with value
6187 0 on last iteration if loop reversed */
6189 /* Save some info needed to produce the new insns. */
6190 reg
= bl
->biv
->dest_reg
;
6191 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6192 if (jump_label
== pc_rtx
)
6193 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6194 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6196 final_value
= XEXP (comparison
, 1);
6197 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6198 - INTVAL (bl
->biv
->add_val
));
6200 /* Initialize biv to start_value before loop start.
6201 The old initializing insn will be deleted as a
6202 dead store by flow.c. */
6203 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6205 /* Add insn to decrement register, and delete insn
6206 that incremented the register. */
6207 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6209 delete_insn (bl
->biv
->insn
);
6211 /* Update biv info to reflect its new status. */
6213 bl
->initial_value
= start_value
;
6214 bl
->biv
->add_val
= new_add_val
;
6216 /* Inc LABEL_NUSES so that delete_insn will
6217 not delete the label. */
6218 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6220 /* Emit an insn after the end of the loop to set the biv's
6221 proper exit value if it is used anywhere outside the loop. */
6222 if ((REGNO_LAST_UID (bl
->regno
)
6223 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6225 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6226 emit_insn_after (gen_move_insn (reg
, final_value
),
6229 /* Delete compare/branch at end of loop. */
6230 delete_insn (PREV_INSN (loop_end
));
6231 delete_insn (PREV_INSN (loop_end
));
6233 /* Add new compare/branch insn at end of loop. */
6235 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6236 GET_MODE (reg
), 0, 0);
6237 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6238 tem
= gen_sequence ();
6240 emit_jump_insn_before (tem
, loop_end
);
6242 for (tem
= PREV_INSN (loop_end
);
6243 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6247 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6249 /* Increment of LABEL_NUSES done above. */
6250 /* Register is now always nonnegative,
6251 so add REG_NONNEG note to the branch. */
6252 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6258 /* Mark that this biv has been reversed. Each giv which depends
6259 on this biv, and which is also live past the end of the loop
6260 will have to be fixed up. */
6264 if (loop_dump_stream
)
6265 fprintf (loop_dump_stream
,
6266 "Reversed loop and added reg_nonneg\n");
6276 /* Verify whether the biv BL appears to be eliminable,
6277 based on the insns in the loop that refer to it.
6278 LOOP_START is the first insn of the loop, and END is the end insn.
6280 If ELIMINATE_P is non-zero, actually do the elimination.
6282 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6283 determine whether invariant insns should be placed inside or at the
6284 start of the loop. */
6287 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6288 struct iv_class
*bl
;
6292 int threshold
, insn_count
;
6294 rtx reg
= bl
->biv
->dest_reg
;
6297 /* Scan all insns in the loop, stopping if we find one that uses the
6298 biv in a way that we cannot eliminate. */
6300 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6302 enum rtx_code code
= GET_CODE (p
);
6303 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6305 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6306 && reg_mentioned_p (reg
, PATTERN (p
))
6307 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6309 if (loop_dump_stream
)
6310 fprintf (loop_dump_stream
,
6311 "Cannot eliminate biv %d: biv used in insn %d.\n",
6312 bl
->regno
, INSN_UID (p
));
6319 if (loop_dump_stream
)
6320 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6321 bl
->regno
, eliminate_p
? "was" : "can be");
6328 /* If BL appears in X (part of the pattern of INSN), see if we can
6329 eliminate its use. If so, return 1. If not, return 0.
6331 If BIV does not appear in X, return 1.
6333 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6334 where extra insns should be added. Depending on how many items have been
6335 moved out of the loop, it will either be before INSN or at the start of
6339 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6341 struct iv_class
*bl
;
6345 enum rtx_code code
= GET_CODE (x
);
6346 rtx reg
= bl
->biv
->dest_reg
;
6347 enum machine_mode mode
= GET_MODE (reg
);
6348 struct induction
*v
;
6357 /* If we haven't already been able to do something with this BIV,
6358 we can't eliminate it. */
6364 /* If this sets the BIV, it is not a problem. */
6365 if (SET_DEST (x
) == reg
)
6368 /* If this is an insn that defines a giv, it is also ok because
6369 it will go away when the giv is reduced. */
6370 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6371 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6375 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6377 /* Can replace with any giv that was reduced and
6378 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6379 Require a constant for MULT_VAL, so we know it's nonzero.
6380 ??? We disable this optimization to avoid potential
6383 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6384 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6385 && v
->add_val
== const0_rtx
6386 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6390 /* If the giv V had the auto-inc address optimization applied
6391 to it, and INSN occurs between the giv insn and the biv
6392 insn, then we must adjust the value used here.
6393 This is rare, so we don't bother to do so. */
6395 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6396 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6397 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6398 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6404 /* If the giv has the opposite direction of change,
6405 then reverse the comparison. */
6406 if (INTVAL (v
->mult_val
) < 0)
6407 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6408 const0_rtx
, v
->new_reg
);
6412 /* We can probably test that giv's reduced reg. */
6413 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6417 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6418 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6419 Require a constant for MULT_VAL, so we know it's nonzero.
6420 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6421 overflow problem. */
6423 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6424 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6425 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6427 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6428 || GET_CODE (v
->add_val
) == LABEL_REF
6429 || GET_CODE (v
->add_val
) == CONST
6430 || (GET_CODE (v
->add_val
) == REG
6431 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6433 /* If the giv V had the auto-inc address optimization applied
6434 to it, and INSN occurs between the giv insn and the biv
6435 insn, then we must adjust the value used here.
6436 This is rare, so we don't bother to do so. */
6438 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6439 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6440 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6441 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6447 /* If the giv has the opposite direction of change,
6448 then reverse the comparison. */
6449 if (INTVAL (v
->mult_val
) < 0)
6450 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6453 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6454 copy_rtx (v
->add_val
));
6456 /* Replace biv with the giv's reduced register. */
6457 update_reg_last_use (v
->add_val
, insn
);
6458 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6461 /* Insn doesn't support that constant or invariant. Copy it
6462 into a register (it will be a loop invariant.) */
6463 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6465 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6468 /* Substitute the new register for its invariant value in
6469 the compare expression. */
6470 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6471 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6480 case GT
: case GE
: case GTU
: case GEU
:
6481 case LT
: case LE
: case LTU
: case LEU
:
6482 /* See if either argument is the biv. */
6483 if (XEXP (x
, 0) == reg
)
6484 arg
= XEXP (x
, 1), arg_operand
= 1;
6485 else if (XEXP (x
, 1) == reg
)
6486 arg
= XEXP (x
, 0), arg_operand
= 0;
6490 if (CONSTANT_P (arg
))
6492 /* First try to replace with any giv that has constant positive
6493 mult_val and constant add_val. We might be able to support
6494 negative mult_val, but it seems complex to do it in general. */
6496 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6497 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6498 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6499 || GET_CODE (v
->add_val
) == LABEL_REF
6500 || GET_CODE (v
->add_val
) == CONST
6501 || (GET_CODE (v
->add_val
) == REG
6502 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6503 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6506 /* If the giv V had the auto-inc address optimization applied
6507 to it, and INSN occurs between the giv insn and the biv
6508 insn, then we must adjust the value used here.
6509 This is rare, so we don't bother to do so. */
6511 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6512 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6513 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6514 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6520 /* Replace biv with the giv's reduced reg. */
6521 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6523 /* If all constants are actually constant integers and
6524 the derived constant can be directly placed in the COMPARE,
6526 if (GET_CODE (arg
) == CONST_INT
6527 && GET_CODE (v
->mult_val
) == CONST_INT
6528 && GET_CODE (v
->add_val
) == CONST_INT
6529 && validate_change (insn
, &XEXP (x
, arg_operand
),
6530 GEN_INT (INTVAL (arg
)
6531 * INTVAL (v
->mult_val
)
6532 + INTVAL (v
->add_val
)), 0))
6535 /* Otherwise, load it into a register. */
6536 tem
= gen_reg_rtx (mode
);
6537 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6538 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6541 /* If that failed, put back the change we made above. */
6542 XEXP (x
, 1-arg_operand
) = reg
;
6545 /* Look for giv with positive constant mult_val and nonconst add_val.
6546 Insert insns to calculate new compare value.
6547 ??? Turn this off due to possible overflow. */
6549 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6550 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6551 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6557 /* If the giv V had the auto-inc address optimization applied
6558 to it, and INSN occurs between the giv insn and the biv
6559 insn, then we must adjust the value used here.
6560 This is rare, so we don't bother to do so. */
6562 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6563 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6564 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6565 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6571 tem
= gen_reg_rtx (mode
);
6573 /* Replace biv with giv's reduced register. */
6574 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6577 /* Compute value to compare against. */
6578 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6579 /* Use it in this insn. */
6580 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6581 if (apply_change_group ())
6585 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6587 if (invariant_p (arg
) == 1)
6589 /* Look for giv with constant positive mult_val and nonconst
6590 add_val. Insert insns to compute new compare value.
6591 ??? Turn this off due to possible overflow. */
6593 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6594 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6595 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6601 /* If the giv V had the auto-inc address optimization applied
6602 to it, and INSN occurs between the giv insn and the biv
6603 insn, then we must adjust the value used here.
6604 This is rare, so we don't bother to do so. */
6606 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6607 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6608 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6609 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6615 tem
= gen_reg_rtx (mode
);
6617 /* Replace biv with giv's reduced register. */
6618 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6621 /* Compute value to compare against. */
6622 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6624 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6625 if (apply_change_group ())
6630 /* This code has problems. Basically, you can't know when
6631 seeing if we will eliminate BL, whether a particular giv
6632 of ARG will be reduced. If it isn't going to be reduced,
6633 we can't eliminate BL. We can try forcing it to be reduced,
6634 but that can generate poor code.
6636 The problem is that the benefit of reducing TV, below should
6637 be increased if BL can actually be eliminated, but this means
6638 we might have to do a topological sort of the order in which
6639 we try to process biv. It doesn't seem worthwhile to do
6640 this sort of thing now. */
6643 /* Otherwise the reg compared with had better be a biv. */
6644 if (GET_CODE (arg
) != REG
6645 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6648 /* Look for a pair of givs, one for each biv,
6649 with identical coefficients. */
6650 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6652 struct induction
*tv
;
6654 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6657 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6658 if (! tv
->ignore
&& ! tv
->maybe_dead
6659 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6660 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6661 && tv
->mode
== mode
)
6663 /* If the giv V had the auto-inc address optimization applied
6664 to it, and INSN occurs between the giv insn and the biv
6665 insn, then we must adjust the value used here.
6666 This is rare, so we don't bother to do so. */
6668 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6669 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6670 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6671 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6677 /* Replace biv with its giv's reduced reg. */
6678 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6679 /* Replace other operand with the other giv's
6681 XEXP (x
, arg_operand
) = tv
->new_reg
;
6688 /* If we get here, the biv can't be eliminated. */
6692 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6693 biv is used in it, since it will be replaced. */
6694 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6695 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6700 /* See if any subexpression fails elimination. */
6701 fmt
= GET_RTX_FORMAT (code
);
6702 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6707 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6708 eliminate_p
, where
))
6713 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6714 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6715 eliminate_p
, where
))
6724 /* Return nonzero if the last use of REG
6725 is in an insn following INSN in the same basic block. */
6728 last_use_this_basic_block (reg
, insn
)
6734 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6737 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6743 /* Called via `note_stores' to record the initial value of a biv. Here we
6744 just record the location of the set and process it later. */
6747 record_initial (dest
, set
)
6751 struct iv_class
*bl
;
6753 if (GET_CODE (dest
) != REG
6754 || REGNO (dest
) >= max_reg_before_loop
6755 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6758 bl
= reg_biv_class
[REGNO (dest
)];
6760 /* If this is the first set found, record it. */
6761 if (bl
->init_insn
== 0)
6763 bl
->init_insn
= note_insn
;
6768 /* If any of the registers in X are "old" and currently have a last use earlier
6769 than INSN, update them to have a last use of INSN. Their actual last use
6770 will be the previous insn but it will not have a valid uid_luid so we can't
6774 update_reg_last_use (x
, insn
)
6778 /* Check for the case where INSN does not have a valid luid. In this case,
6779 there is no need to modify the regno_last_uid, as this can only happen
6780 when code is inserted after the loop_end to set a pseudo's final value,
6781 and hence this insn will never be the last use of x. */
6782 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6783 && INSN_UID (insn
) < max_uid_for_loop
6784 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6785 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6789 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6790 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6793 update_reg_last_use (XEXP (x
, i
), insn
);
6794 else if (fmt
[i
] == 'E')
6795 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6796 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6801 /* Given a jump insn JUMP, return the condition that will cause it to branch
6802 to its JUMP_LABEL. If the condition cannot be understood, or is an
6803 inequality floating-point comparison which needs to be reversed, 0 will
6806 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6807 insn used in locating the condition was found. If a replacement test
6808 of the condition is desired, it should be placed in front of that
6809 insn and we will be sure that the inputs are still valid.
6811 The condition will be returned in a canonical form to simplify testing by
6812 callers. Specifically:
6814 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6815 (2) Both operands will be machine operands; (cc0) will have been replaced.
6816 (3) If an operand is a constant, it will be the second operand.
6817 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6818 for GE, GEU, and LEU. */
6821 get_condition (jump
, earliest
)
6830 int reverse_code
= 0;
6831 int did_reverse_condition
= 0;
6833 /* If this is not a standard conditional jump, we can't parse it. */
6834 if (GET_CODE (jump
) != JUMP_INSN
6835 || ! condjump_p (jump
) || simplejump_p (jump
))
6838 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6839 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6840 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6845 /* If this branches to JUMP_LABEL when the condition is false, reverse
6847 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6848 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6849 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6851 /* If we are comparing a register with zero, see if the register is set
6852 in the previous insn to a COMPARE or a comparison operation. Perform
6853 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6856 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6858 /* Set non-zero when we find something of interest. */
6862 /* If comparison with cc0, import actual comparison from compare
6866 if ((prev
= prev_nonnote_insn (prev
)) == 0
6867 || GET_CODE (prev
) != INSN
6868 || (set
= single_set (prev
)) == 0
6869 || SET_DEST (set
) != cc0_rtx
)
6872 op0
= SET_SRC (set
);
6873 op1
= CONST0_RTX (GET_MODE (op0
));
6879 /* If this is a COMPARE, pick up the two things being compared. */
6880 if (GET_CODE (op0
) == COMPARE
)
6882 op1
= XEXP (op0
, 1);
6883 op0
= XEXP (op0
, 0);
6886 else if (GET_CODE (op0
) != REG
)
6889 /* Go back to the previous insn. Stop if it is not an INSN. We also
6890 stop if it isn't a single set or if it has a REG_INC note because
6891 we don't want to bother dealing with it. */
6893 if ((prev
= prev_nonnote_insn (prev
)) == 0
6894 || GET_CODE (prev
) != INSN
6895 || FIND_REG_INC_NOTE (prev
, 0)
6896 || (set
= single_set (prev
)) == 0)
6899 /* If this is setting OP0, get what it sets it to if it looks
6901 if (rtx_equal_p (SET_DEST (set
), op0
))
6903 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6905 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6908 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6909 && (GET_MODE_BITSIZE (inner_mode
)
6910 <= HOST_BITS_PER_WIDE_INT
)
6911 && (STORE_FLAG_VALUE
6912 & ((HOST_WIDE_INT
) 1
6913 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6914 #ifdef FLOAT_STORE_FLAG_VALUE
6916 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6917 && FLOAT_STORE_FLAG_VALUE
< 0)
6920 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6922 else if (((code
== EQ
6924 && (GET_MODE_BITSIZE (inner_mode
)
6925 <= HOST_BITS_PER_WIDE_INT
)
6926 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6927 && (STORE_FLAG_VALUE
6928 & ((HOST_WIDE_INT
) 1
6929 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6930 #ifdef FLOAT_STORE_FLAG_VALUE
6932 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6933 && FLOAT_STORE_FLAG_VALUE
< 0)
6936 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6938 /* We might have reversed a LT to get a GE here. But this wasn't
6939 actually the comparison of data, so we don't flag that we
6940 have had to reverse the condition. */
6941 did_reverse_condition
^= 1;
6949 else if (reg_set_p (op0
, prev
))
6950 /* If this sets OP0, but not directly, we have to give up. */
6955 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6956 code
= GET_CODE (x
);
6959 code
= reverse_condition (code
);
6960 did_reverse_condition
^= 1;
6964 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
6970 /* If constant is first, put it last. */
6971 if (CONSTANT_P (op0
))
6972 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
6974 /* If OP0 is the result of a comparison, we weren't able to find what
6975 was really being compared, so fail. */
6976 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
6979 /* Canonicalize any ordered comparison with integers involving equality
6980 if we can do computations in the relevant mode and we do not
6983 if (GET_CODE (op1
) == CONST_INT
6984 && GET_MODE (op0
) != VOIDmode
6985 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
6987 HOST_WIDE_INT const_val
= INTVAL (op1
);
6988 unsigned HOST_WIDE_INT uconst_val
= const_val
;
6989 unsigned HOST_WIDE_INT max_val
6990 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
6995 if (const_val
!= max_val
>> 1)
6996 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7001 != (((HOST_WIDE_INT
) 1
7002 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7003 code
= GT
, op1
= GEN_INT (const_val
- 1);
7007 if (uconst_val
!= max_val
)
7008 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7012 if (uconst_val
!= 0)
7013 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7018 /* If this was floating-point and we reversed anything other than an
7019 EQ or NE, return zero. */
7020 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7021 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7023 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7027 /* Never return CC0; return zero instead. */
7032 return gen_rtx (code
, VOIDmode
, op0
, op1
);
7035 /* Similar to above routine, except that we also put an invariant last
7036 unless both operands are invariants. */
7039 get_condition_for_loop (x
)
7042 rtx comparison
= get_condition (x
, NULL_PTR
);
7045 || ! invariant_p (XEXP (comparison
, 0))
7046 || invariant_p (XEXP (comparison
, 1)))
7049 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7050 XEXP (comparison
, 1), XEXP (comparison
, 0));
7054 /* Analyze a loop in order to instrument it with the use of count register.
7055 loop_start and loop_end are the first and last insns of the loop.
7056 This function works in cooperation with insert_bct ().
7057 loop_can_insert_bct[loop_num] is set according to whether the optimization
7058 is applicable to the loop. When it is applicable, the following variables
7060 loop_start_value[loop_num]
7061 loop_comparison_value[loop_num]
7062 loop_increment[loop_num]
7063 loop_comparison_code[loop_num] */
7066 void analyze_loop_iterations (loop_start
, loop_end
)
7067 rtx loop_start
, loop_end
;
7069 rtx comparison
, comparison_value
;
7070 rtx iteration_var
, initial_value
, increment
;
7071 enum rtx_code comparison_code
;
7077 /* loop_variable mode */
7078 enum machine_mode original_mode
;
7080 /* find the number of the loop */
7081 int loop_num
= loop_number (loop_start
, loop_end
);
7083 /* we change our mind only when we are sure that loop will be instrumented */
7084 loop_can_insert_bct
[loop_num
] = 0;
7086 /* debugging: do we wish to instrument this loop? */
7087 if ( !check_bct_param () )
7090 /* is the optimization suppressed. */
7091 if ( !flag_branch_on_count_reg
)
7094 /* make sure that count-reg is not in use */
7095 if (loop_used_count_register
[loop_num
]){
7096 if (loop_dump_stream
)
7097 fprintf (loop_dump_stream
,
7098 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7103 /* make sure that the function has no indirect jumps. */
7104 if (indirect_jump_in_function
){
7105 if (loop_dump_stream
)
7106 fprintf (loop_dump_stream
,
7107 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7112 /* make sure that the last loop insn is a conditional jump */
7113 last_loop_insn
= PREV_INSN (loop_end
);
7114 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7115 if (loop_dump_stream
)
7116 fprintf (loop_dump_stream
,
7117 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7122 /* First find the iteration variable. If the last insn is a conditional
7123 branch, and the insn preceding it tests a register value, make that
7124 register the iteration variable. */
7126 /* We used to use prev_nonnote_insn here, but that fails because it might
7127 accidentally get the branch for a contained loop if the branch for this
7128 loop was deleted. We can only trust branches immediately before the
7131 comparison
= get_condition_for_loop (last_loop_insn
);
7132 /* ??? Get_condition may switch position of induction variable and
7133 invariant register when it canonicalizes the comparison. */
7135 if (comparison
== 0) {
7136 if (loop_dump_stream
)
7137 fprintf (loop_dump_stream
,
7138 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7143 comparison_code
= GET_CODE (comparison
);
7144 iteration_var
= XEXP (comparison
, 0);
7145 comparison_value
= XEXP (comparison
, 1);
7147 original_mode
= GET_MODE (iteration_var
);
7148 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7149 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7150 if (loop_dump_stream
)
7151 fprintf (loop_dump_stream
,
7152 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7157 /* get info about loop bounds and increment */
7158 iteration_info (iteration_var
, &initial_value
, &increment
,
7159 loop_start
, loop_end
);
7161 /* make sure that all required loop data were found */
7162 if (!(initial_value
&& increment
&& comparison_value
7163 && invariant_p (comparison_value
) && invariant_p (increment
)
7164 && ! indirect_jump_in_function
))
7166 if (loop_dump_stream
) {
7167 fprintf (loop_dump_stream
,
7168 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7169 if (!(initial_value
&& increment
&& comparison_value
)) {
7170 fprintf (loop_dump_stream
, "\tbounds not available: ");
7171 if ( ! initial_value
)
7172 fprintf (loop_dump_stream
, "initial ");
7174 fprintf (loop_dump_stream
, "increment ");
7175 if ( ! comparison_value
)
7176 fprintf (loop_dump_stream
, "comparison ");
7177 fprintf (loop_dump_stream
, "\n");
7179 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7180 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7185 /* make sure that the increment is constant */
7186 if (GET_CODE (increment
) != CONST_INT
) {
7187 if (loop_dump_stream
)
7188 fprintf (loop_dump_stream
,
7189 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7194 /* make sure that the loop contains neither function call, nor jump on table.
7195 (the count register might be altered by the called function, and might
7196 be used for a branch on table). */
7197 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7198 if (GET_CODE (insn
) == CALL_INSN
){
7199 if (loop_dump_stream
)
7200 fprintf (loop_dump_stream
,
7201 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7206 if (GET_CODE (insn
) == JUMP_INSN
7207 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7208 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7209 if (loop_dump_stream
)
7210 fprintf (loop_dump_stream
,
7211 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7217 /* At this point, we are sure that the loop can be instrumented with BCT.
7218 Some of the loops, however, will not be instrumented - the final decision
7219 is taken by insert_bct () */
7220 if (loop_dump_stream
)
7221 fprintf (loop_dump_stream
,
7222 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7225 /* mark all enclosing loops that they cannot use count register */
7226 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7227 marking here may prevent instrumenting an enclosing loop that could
7228 actually be instrumented. But since this is rare, it is safer to mark
7229 here in case the order of calling (analyze/insert)_bct would be changed. */
7230 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7231 loop_used_count_register
[i
] = 1;
7233 /* Set data structures which will be used by the instrumentation phase */
7234 loop_start_value
[loop_num
] = initial_value
;
7235 loop_comparison_value
[loop_num
] = comparison_value
;
7236 loop_increment
[loop_num
] = increment
;
7237 loop_comparison_code
[loop_num
] = comparison_code
;
7238 loop_can_insert_bct
[loop_num
] = 1;
7242 /* instrument loop for insertion of bct instruction. We distinguish between
7243 loops with compile-time bounds, to those with run-time bounds. The loop
7244 behaviour is analized according to the following characteristics/variables:
7246 ; comparison-value: the value to which the iteration counter is compared.
7247 ; initial-value: iteration-counter initial value.
7248 ; increment: iteration-counter increment.
7249 ; Computed variables:
7250 ; increment-direction: the sign of the increment.
7251 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7252 ; range-direction: sign (comparison-value - initial-value)
7253 We give up on the following cases:
7254 ; loop variable overflow.
7255 ; run-time loop bounds with comparison code NE.
7259 insert_bct (loop_start
, loop_end
)
7260 rtx loop_start
, loop_end
;
7262 rtx initial_value
, comparison_value
, increment
;
7263 enum rtx_code comparison_code
;
7265 int increment_direction
, compare_direction
;
7268 /* if the loop condition is <= or >=, the number of iteration
7269 is 1 more than the range of the bounds of the loop */
7270 int add_iteration
= 0;
7272 /* the only machine mode we work with - is the integer of the size that the
7274 enum machine_mode loop_var_mode
= SImode
;
7276 int loop_num
= loop_number (loop_start
, loop_end
);
7278 /* get loop-variables. No need to check that these are valid - already
7279 checked in analyze_loop_iterations (). */
7280 comparison_code
= loop_comparison_code
[loop_num
];
7281 initial_value
= loop_start_value
[loop_num
];
7282 comparison_value
= loop_comparison_value
[loop_num
];
7283 increment
= loop_increment
[loop_num
];
7285 /* check analyze_loop_iterations decision for this loop. */
7286 if (! loop_can_insert_bct
[loop_num
]){
7287 if (loop_dump_stream
)
7288 fprintf (loop_dump_stream
,
7289 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7294 /* make sure that the loop was not fully unrolled. */
7295 if (loop_unroll_factor
[loop_num
] == -1){
7296 if (loop_dump_stream
)
7297 fprintf (loop_dump_stream
, "insert_bct %d: was completely unrolled\n", loop_num
);
7301 /* make sure that the last loop insn is a conditional jump .
7302 This check is repeated from analyze_loop_iterations (),
7303 because unrolling might have changed that. */
7304 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7305 || !condjump_p (PREV_INSN (loop_end
))) {
7306 if (loop_dump_stream
)
7307 fprintf (loop_dump_stream
,
7308 "insert_bct: not instrumenting BCT because of invalid branch\n");
7312 /* fix increment in case loop was unrolled. */
7313 if (loop_unroll_factor
[loop_num
] > 1)
7314 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7316 /* determine properties and directions of the loop */
7317 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7318 switch ( comparison_code
) {
7323 compare_direction
= 1;
7330 compare_direction
= -1;
7334 /* in this case we cannot know the number of iterations */
7335 if (loop_dump_stream
)
7336 fprintf (loop_dump_stream
,
7337 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7344 compare_direction
= 1;
7350 compare_direction
= -1;
7353 compare_direction
= 0;
7360 /* make sure that the loop does not end by an overflow */
7361 if (compare_direction
!= increment_direction
) {
7362 if (loop_dump_stream
)
7363 fprintf (loop_dump_stream
,
7364 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7369 /* try to instrument the loop. */
7371 /* Handle the simpler case, where the bounds are known at compile time. */
7372 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7375 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7377 /* check the relation between compare-val and initial-val */
7378 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7379 int range_direction
= (difference
> 0) ? 1 : -1;
7381 /* make sure the loop executes enough iterations to gain from BCT */
7382 if (difference
> -3 && difference
< 3) {
7383 if (loop_dump_stream
)
7384 fprintf (loop_dump_stream
,
7385 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7390 /* make sure that the loop executes at least once */
7391 if ((range_direction
== 1 && compare_direction
== -1)
7392 || (range_direction
== -1 && compare_direction
== 1))
7394 if (loop_dump_stream
)
7395 fprintf (loop_dump_stream
,
7396 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7401 /* make sure that the loop does not end by an overflow (in compile time
7402 bounds we must have an additional check for overflow, because here
7403 we also support the compare code of 'NE'. */
7404 if (comparison_code
== NE
7405 && increment_direction
!= range_direction
) {
7406 if (loop_dump_stream
)
7407 fprintf (loop_dump_stream
,
7408 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7413 /* Determine the number of iterations by:
7415 ; compare-val - initial-val + (increment -1) + additional-iteration
7416 ; num_iterations = -----------------------------------------------------------------
7419 difference
= (range_direction
> 0) ? difference
: -difference
;
7421 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7422 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7423 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7424 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7425 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7428 if (increment_value_abs
== 0) {
7429 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7432 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7433 / increment_value_abs
;
7436 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7438 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7440 /* Done with this loop. */
7444 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7445 /* In this case we generate run_time calculation of the number of iterations */
7447 /* With runtime bounds, if the compare is of the form '!=' we give up */
7448 if (comparison_code
== NE
) {
7449 if (loop_dump_stream
)
7450 fprintf (loop_dump_stream
,
7451 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7457 /* We rely on the existence of run-time guard to ensure that the
7458 loop executes at least once. */
7460 rtx iterations_num_reg
;
7462 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7464 /* make sure that the increment is a power of two, otherwise (an
7465 expensive) divide is needed. */
7466 if (exact_log2 (increment_value_abs
) == -1)
7468 if (loop_dump_stream
)
7469 fprintf (loop_dump_stream
,
7470 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7474 /* compute the number of iterations */
7477 /* CYGNUS LOCAL: HAIFA bug fix */
7480 /* Again, the number of iterations is calculated by:
7482 ; compare-val - initial-val + (increment -1) + additional-iteration
7483 ; num_iterations = -----------------------------------------------------------------
7486 /* ??? Do we have to call copy_rtx here before passing rtx to
7488 if (compare_direction
> 0) {
7489 /* <, <= :the loop variable is increasing */
7490 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7491 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7494 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7495 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7498 if (increment_value_abs
- 1 + add_iteration
!= 0)
7499 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7500 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7501 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7503 if (increment_value_abs
!= 1)
7505 /* ??? This will generate an expensive divide instruction for
7506 most targets. The original authors apparently expected this
7507 to be a shift, since they test for power-of-2 divisors above,
7508 but just naively generating a divide instruction will not give
7509 a shift. It happens to work for the PowerPC target because
7510 the rs6000.md file has a divide pattern that emits shifts.
7511 It will probably not work for any other target. */
7512 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7514 GEN_INT (increment_value_abs
),
7515 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7518 iterations_num_reg
= temp_reg
;
7519 /* END CYGNUS LOCAL: HAIFA bug fix */
7521 sequence
= gen_sequence ();
7523 emit_insn_before (sequence
, loop_start
);
7524 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7528 /* instrument loop by inserting a bct in it. This is done in the following way:
7529 1. A new register is created and assigned the hard register number of the count
7531 2. In the head of the loop the new variable is initialized by the value passed in the
7532 loop_num_iterations parameter.
7533 3. At the end of the loop, comparison of the register with 0 is generated.
7534 The created comparison follows the pattern defined for the
7535 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7537 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7538 not used elsewhere, it will be eliminated by data-flow analisys. */
7541 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7542 rtx loop_start
, loop_end
;
7543 rtx loop_num_iterations
;
7545 rtx temp_reg1
, temp_reg2
;
7549 enum machine_mode loop_var_mode
= SImode
;
7551 #ifdef HAVE_decrement_and_branch_on_count
7552 if (HAVE_decrement_and_branch_on_count
)
7554 if (loop_dump_stream
)
7555 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7557 /* eliminate the check on the old variable */
7558 delete_insn (PREV_INSN (loop_end
));
7559 delete_insn (PREV_INSN (loop_end
));
7561 /* insert the label which will delimit the start of the loop */
7562 start_label
= gen_label_rtx ();
7563 emit_label_after (start_label
, loop_start
);
7565 /* insert initialization of the count register into the loop header */
7567 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7568 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7570 /* this will be count register */
7571 temp_reg2
= gen_rtx (REG
, loop_var_mode
, COUNT_REGISTER_REGNUM
);
7572 /* we have to move the value to the count register from an GPR
7573 because rtx pointed to by loop_num_iterations could contain
7574 expression which cannot be moved into count register */
7575 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7577 sequence
= gen_sequence ();
7579 emit_insn_after (sequence
, loop_start
);
7581 /* insert new comparison on the count register instead of the
7582 old one, generating the needed BCT pattern (that will be
7583 later recognized by assembly generation phase). */
7584 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7586 LABEL_NUSES (start_label
)++;
7589 #endif /* HAVE_decrement_and_branch_on_count */
7592 /* calculate the uid of the given loop */
7594 loop_number (loop_start
, loop_end
)
7595 rtx loop_start
, loop_end
;
7599 /* assume that this insn contains the LOOP_START
7600 note, so it will not be changed by the loop unrolling */
7601 loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7602 /* sanity check - should never happen */
7609 /* scan the function and determine whether it has indirect (computed) jump */
7611 indirect_jump_in_function_p (start
)
7615 int is_indirect_jump
= 0;
7617 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
)) {
7618 if (GET_CODE (insn
) == JUMP_INSN
) {
7619 if (GET_CODE (PATTERN (insn
)) == SET
) {
7620 rtx insn_work_code
= XEXP (PATTERN (insn
), 1);
7622 if (GET_CODE (insn_work_code
) == LABEL_REF
)
7624 if (GET_CODE (insn_work_code
) == IF_THEN_ELSE
) {
7625 rtx jump_target
= XEXP (insn_work_code
, 1);
7627 if (jump_target
== pc_rtx
7628 || (GET_CODE (jump_target
) == (enum rtx_code
)LABEL_REF
))
7632 is_indirect_jump
= 1;
7635 return is_indirect_jump
;
7638 /* debugging: fix_bct_param () is called from toplev.c upon detection
7639 of the -fbct-***-N options. */
7641 fix_bct_param (param
, val
)
7644 if ( !strcmp (param
, "max") )
7645 dbg_bct_max
= atoi (val
);
7646 else if ( !strcmp (param
, "min") )
7647 dbg_bct_min
= atoi (val
);
7650 /* debugging: return 1 if the loop should be instrumented,
7651 according to bct-min/max. */
7655 static int dbg_bct_num
= 0;
7658 if (dbg_bct_num
> dbg_bct_min
|| dbg_bct_min
== -1)
7659 if (dbg_bct_num
<= dbg_bct_max
|| dbg_bct_max
== -1)
7664 /* END CYGNUS LOCAL haifa */