1 /* Perform various loop optimizations, including strength reduction.
2 Copyright (C) 1987, 88, 89, 91-6, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This is the loop optimization pass of the compiler.
23 It finds invariant computations within loops and moves them
24 to the beginning of the loop. Then it identifies basic and
25 general induction variables. Strength reduction is applied to the general
26 induction variables, and induction variable elimination is applied to
27 the basic induction variables.
29 It also finds cases where
30 a register is set within the loop by zero-extending a narrower value
31 and changes these to zero the entire register once before the loop
32 and merely copy the low part within the loop.
34 Most of the complexity is in heuristics to decide when it is worth
35 while to do these things. */
42 #include "insn-config.h"
43 #include "insn-flags.h"
45 #include "hard-reg-set.h"
52 /* Vector mapping INSN_UIDs to luids.
53 The luids are like uids but increase monotonically always.
54 We use them to see whether a jump comes from outside a given loop. */
58 /* Indexed by INSN_UID, contains the ordinal giving the (innermost) loop
59 number the insn is contained in. */
63 /* 1 + largest uid of any insn. */
67 /* 1 + luid of last insn. */
71 /* Number of loops detected in current function. Used as index to the
74 static int max_loop_num
;
76 /* Indexed by loop number, contains the first and last insn of each loop. */
78 static rtx
*loop_number_loop_starts
, *loop_number_loop_ends
;
80 /* For each loop, gives the containing loop number, -1 if none. */
85 /* The main output of analyze_loop_iterations is placed here */
87 int *loop_can_insert_bct
;
89 /* For each loop, determines whether some of its inner loops has used
92 int *loop_used_count_register
;
94 /* loop parameters for arithmetic loops. These loops have a loop variable
95 which is initialized to loop_start_value, incremented in each iteration
96 by "loop_increment". At the end of the iteration the loop variable is
97 compared to the loop_comparison_value (using loop_comparison_code). */
100 rtx
*loop_comparison_value
;
101 rtx
*loop_start_value
;
102 enum rtx_code
*loop_comparison_code
;
105 /* For each loop, keep track of its unrolling factor.
109 -1: completely unrolled
110 >0: holds the unroll exact factor. */
111 int *loop_unroll_factor
;
113 /* Indexed by loop number, contains a nonzero value if the "loop" isn't
114 really a loop (an insn outside the loop branches into it). */
116 static char *loop_invalid
;
118 /* Indexed by loop number, links together all LABEL_REFs which refer to
119 code labels outside the loop. Used by routines that need to know all
120 loop exits, such as final_biv_value and final_giv_value.
122 This does not include loop exits due to return instructions. This is
123 because all bivs and givs are pseudos, and hence must be dead after a
124 return, so the presense of a return does not affect any of the
125 optimizations that use this info. It is simpler to just not include return
126 instructions on this list. */
128 rtx
*loop_number_exit_labels
;
130 /* Indexed by loop number, counts the number of LABEL_REFs on
131 loop_number_exit_labels for this loop and all loops nested inside it. */
133 int *loop_number_exit_count
;
135 /* Holds the number of loop iterations. It is zero if the number could not be
136 calculated. Must be unsigned since the number of iterations can
137 be as high as 2^wordsize-1. For loops with a wider iterator, this number
138 will will be zero if the number of loop iterations is too large for an
139 unsigned integer to hold. */
141 unsigned HOST_WIDE_INT loop_n_iterations
;
143 /* Nonzero if there is a subroutine call in the current loop. */
145 static int loop_has_call
;
147 /* Nonzero if there is a volatile memory reference in the current
150 static int loop_has_volatile
;
152 /* Added loop_continue which is the NOTE_INSN_LOOP_CONT of the
153 current loop. A continue statement will generate a branch to
154 NEXT_INSN (loop_continue). */
156 static rtx loop_continue
;
158 /* Indexed by register number, contains the number of times the reg
159 is set during the loop being scanned.
160 During code motion, a negative value indicates a reg that has been
161 made a candidate; in particular -2 means that it is an candidate that
162 we know is equal to a constant and -1 means that it is an candidate
163 not known equal to a constant.
164 After code motion, regs moved have 0 (which is accurate now)
165 while the failed candidates have the original number of times set.
167 Therefore, at all times, == 0 indicates an invariant register;
168 < 0 a conditionally invariant one. */
170 static int *n_times_set
;
172 /* Original value of n_times_set; same except that this value
173 is not set negative for a reg whose sets have been made candidates
174 and not set to 0 for a reg that is moved. */
176 static int *n_times_used
;
178 /* Index by register number, 1 indicates that the register
179 cannot be moved or strength reduced. */
181 static char *may_not_optimize
;
183 /* Nonzero means reg N has already been moved out of one loop.
184 This reduces the desire to move it out of another. */
186 static char *moved_once
;
188 /* Array of MEMs that are stored in this loop. If there are too many to fit
189 here, we just turn on unknown_address_altered. */
191 #define NUM_STORES 30
192 static rtx loop_store_mems
[NUM_STORES
];
194 /* Index of first available slot in above array. */
195 static int loop_store_mems_idx
;
197 /* Nonzero if we don't know what MEMs were changed in the current loop.
198 This happens if the loop contains a call (in which case `loop_has_call'
199 will also be set) or if we store into more than NUM_STORES MEMs. */
201 static int unknown_address_altered
;
203 /* Count of movable (i.e. invariant) instructions discovered in the loop. */
204 static int num_movables
;
206 /* Count of memory write instructions discovered in the loop. */
207 static int num_mem_sets
;
209 /* Number of loops contained within the current one, including itself. */
210 static int loops_enclosed
;
212 /* Bound on pseudo register number before loop optimization.
213 A pseudo has valid regscan info if its number is < max_reg_before_loop. */
214 int max_reg_before_loop
;
216 /* This obstack is used in product_cheap_p to allocate its rtl. It
217 may call gen_reg_rtx which, in turn, may reallocate regno_reg_rtx.
218 If we used the same obstack that it did, we would be deallocating
221 static struct obstack temp_obstack
;
223 /* This is where the pointer to the obstack being used for RTL is stored. */
225 extern struct obstack
*rtl_obstack
;
227 #define obstack_chunk_alloc xmalloc
228 #define obstack_chunk_free free
230 extern char *oballoc ();
232 /* During the analysis of a loop, a chain of `struct movable's
233 is made to record all the movable insns found.
234 Then the entire chain can be scanned to decide which to move. */
238 rtx insn
; /* A movable insn */
239 rtx set_src
; /* The expression this reg is set from. */
240 rtx set_dest
; /* The destination of this SET. */
241 rtx dependencies
; /* When INSN is libcall, this is an EXPR_LIST
242 of any registers used within the LIBCALL. */
243 int consec
; /* Number of consecutive following insns
244 that must be moved with this one. */
245 int regno
; /* The register it sets */
246 short lifetime
; /* lifetime of that register;
247 may be adjusted when matching movables
248 that load the same value are found. */
249 short savings
; /* Number of insns we can move for this reg,
250 including other movables that force this
251 or match this one. */
252 unsigned int cond
: 1; /* 1 if only conditionally movable */
253 unsigned int force
: 1; /* 1 means MUST move this insn */
254 unsigned int global
: 1; /* 1 means reg is live outside this loop */
255 /* If PARTIAL is 1, GLOBAL means something different:
256 that the reg is live outside the range from where it is set
257 to the following label. */
258 unsigned int done
: 1; /* 1 inhibits further processing of this */
260 unsigned int partial
: 1; /* 1 means this reg is used for zero-extending.
261 In particular, moving it does not make it
263 unsigned int move_insn
: 1; /* 1 means that we call emit_move_insn to
264 load SRC, rather than copying INSN. */
265 unsigned int is_equiv
: 1; /* 1 means a REG_EQUIV is present on INSN. */
266 enum machine_mode savemode
; /* Nonzero means it is a mode for a low part
267 that we should avoid changing when clearing
268 the rest of the reg. */
269 struct movable
*match
; /* First entry for same value */
270 struct movable
*forces
; /* An insn that must be moved if this is */
271 struct movable
*next
;
274 FILE *loop_dump_stream
;
276 /* Forward declarations. */
278 static void find_and_verify_loops ();
279 static void mark_loop_jump ();
280 static void prescan_loop ();
281 static int reg_in_basic_block_p ();
282 static int consec_sets_invariant_p ();
283 static rtx
libcall_other_reg ();
284 static int labels_in_range_p ();
285 static void count_loop_regs_set ();
286 static void note_addr_stored ();
287 static int loop_reg_used_before_p ();
288 static void scan_loop ();
290 static void replace_call_address ();
292 static rtx
skip_consec_insns ();
293 static int libcall_benefit ();
294 static void ignore_some_movables ();
295 static void force_movables ();
296 static void combine_movables ();
297 static int rtx_equal_for_loop_p ();
298 static void move_movables ();
299 static void strength_reduce ();
300 static int valid_initial_value_p ();
301 static void find_mem_givs ();
302 static void record_biv ();
303 static void check_final_value ();
304 static void record_giv ();
305 static void update_giv_derive ();
306 static int basic_induction_var ();
307 static rtx
simplify_giv_expr ();
308 static int general_induction_var ();
309 static int consec_sets_giv ();
310 static int check_dbra_loop ();
311 static rtx
express_from ();
312 static int combine_givs_p ();
313 static void combine_givs ();
314 static int product_cheap_p ();
315 static int maybe_eliminate_biv ();
316 static int maybe_eliminate_biv_1 ();
317 static int last_use_this_basic_block ();
318 static void record_initial ();
319 static void update_reg_last_use ();
322 /* This is extern from unroll.c */
323 void iteration_info ();
325 /* Two main functions for implementing bct:
326 first - to be called before loop unrolling, and the second - after */
327 static void analyze_loop_iterations ();
328 static void insert_bct ();
330 /* Auxiliary function that inserts the bct pattern into the loop */
331 static void instrument_loop_bct ();
334 /* Indirect_jump_in_function is computed once per function. */
335 int indirect_jump_in_function
= 0;
336 static int indirect_jump_in_function_p ();
339 /* Relative gain of eliminating various kinds of operations. */
346 /* Benefit penalty, if a giv is not replaceable, i.e. must emit an insn to
347 copy the value of the strength reduced giv to its original register. */
353 char *free_point
= (char *) oballoc (1);
354 rtx reg
= gen_rtx (REG
, word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
356 add_cost
= rtx_cost (gen_rtx (PLUS
, word_mode
, reg
, reg
), SET
);
358 /* We multiply by 2 to reconcile the difference in scale between
359 these two ways of computing costs. Otherwise the cost of a copy
360 will be far less than the cost of an add. */
364 /* Free the objects we just allocated. */
367 /* Initialize the obstack used for rtl in product_cheap_p. */
368 gcc_obstack_init (&temp_obstack
);
371 /* Entry point of this file. Perform loop optimization
372 on the current function. F is the first insn of the function
373 and DUMPFILE is a stream for output of a trace of actions taken
374 (or 0 if none should be output). */
377 loop_optimize (f
, dumpfile
)
378 /* f is the first instruction of a chain of insns for one function */
386 loop_dump_stream
= dumpfile
;
388 init_recog_no_volatile ();
389 init_alias_analysis ();
391 max_reg_before_loop
= max_reg_num ();
393 moved_once
= (char *) alloca (max_reg_before_loop
);
394 bzero (moved_once
, max_reg_before_loop
);
398 /* Count the number of loops. */
401 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
403 if (GET_CODE (insn
) == NOTE
404 && NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
408 /* Don't waste time if no loops. */
409 if (max_loop_num
== 0)
412 /* Get size to use for tables indexed by uids.
413 Leave some space for labels allocated by find_and_verify_loops. */
414 max_uid_for_loop
= get_max_uid () + 1 + max_loop_num
* 32;
416 uid_luid
= (int *) alloca (max_uid_for_loop
* sizeof (int));
417 uid_loop_num
= (int *) alloca (max_uid_for_loop
* sizeof (int));
419 bzero ((char *) uid_luid
, max_uid_for_loop
* sizeof (int));
420 bzero ((char *) uid_loop_num
, max_uid_for_loop
* sizeof (int));
422 /* Allocate tables for recording each loop. We set each entry, so they need
424 loop_number_loop_starts
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
425 loop_number_loop_ends
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
426 loop_outer_loop
= (int *) alloca (max_loop_num
* sizeof (int));
427 loop_invalid
= (char *) alloca (max_loop_num
* sizeof (char));
428 loop_number_exit_labels
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
429 loop_number_exit_count
= (int *) alloca (max_loop_num
* sizeof (int));
431 /* This is initialized by the unrolling code, so we go ahead
432 and clear them just in case we are not performing loop
434 loop_unroll_factor
= (int *) alloca (max_loop_num
*sizeof (int));
435 bzero ((char *) loop_unroll_factor
, max_loop_num
* sizeof (int));
438 /* Allocate for BCT optimization */
439 loop_can_insert_bct
= (int *) alloca (max_loop_num
* sizeof (int));
440 bzero ((char *) loop_can_insert_bct
, max_loop_num
* sizeof (int));
442 loop_used_count_register
= (int *) alloca (max_loop_num
* sizeof (int));
443 bzero ((char *) loop_used_count_register
, max_loop_num
* sizeof (int));
445 loop_increment
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
446 loop_comparison_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
447 loop_start_value
= (rtx
*) alloca (max_loop_num
* sizeof (rtx
));
448 bzero ((char *) loop_increment
, max_loop_num
* sizeof (rtx
));
449 bzero ((char *) loop_comparison_value
, max_loop_num
* sizeof (rtx
));
450 bzero ((char *) loop_start_value
, max_loop_num
* sizeof (rtx
));
453 = (enum rtx_code
*) alloca (max_loop_num
* sizeof (enum rtx_code
));
454 bzero ((char *) loop_comparison_code
, max_loop_num
* sizeof (enum rtx_code
));
457 /* Find and process each loop.
458 First, find them, and record them in order of their beginnings. */
459 find_and_verify_loops (f
);
461 /* Now find all register lifetimes. This must be done after
462 find_and_verify_loops, because it might reorder the insns in the
464 reg_scan (f
, max_reg_num (), 1);
466 /* See if we went too far. */
467 if (get_max_uid () > max_uid_for_loop
)
470 /* Compute the mapping from uids to luids.
471 LUIDs are numbers assigned to insns, like uids,
472 except that luids increase monotonically through the code.
473 Don't assign luids to line-number NOTEs, so that the distance in luids
474 between two insns is not affected by -g. */
476 for (insn
= f
, i
= 0; insn
; insn
= NEXT_INSN (insn
))
479 if (GET_CODE (insn
) != NOTE
480 || NOTE_LINE_NUMBER (insn
) <= 0)
481 uid_luid
[INSN_UID (insn
)] = ++i
;
483 /* Give a line number note the same luid as preceding insn. */
484 uid_luid
[INSN_UID (insn
)] = i
;
489 /* Don't leave gaps in uid_luid for insns that have been
490 deleted. It is possible that the first or last insn
491 using some register has been deleted by cross-jumping.
492 Make sure that uid_luid for that former insn's uid
493 points to the general area where that insn used to be. */
494 for (i
= 0; i
< max_uid_for_loop
; i
++)
496 uid_luid
[0] = uid_luid
[i
];
497 if (uid_luid
[0] != 0)
500 for (i
= 0; i
< max_uid_for_loop
; i
++)
501 if (uid_luid
[i
] == 0)
502 uid_luid
[i
] = uid_luid
[i
- 1];
504 /* Create a mapping from loops to BLOCK tree nodes. */
505 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
506 find_loop_tree_blocks ();
508 /* Determine if the function has indirect jump. On some systems
509 this prevents low overhead loop instructions from being used. */
510 indirect_jump_in_function
= indirect_jump_in_function_p (f
);
512 /* Now scan the loops, last ones first, since this means inner ones are done
513 before outer ones. */
514 for (i
= max_loop_num
-1; i
>= 0; i
--)
515 if (! loop_invalid
[i
] && loop_number_loop_ends
[i
])
516 scan_loop (loop_number_loop_starts
[i
], loop_number_loop_ends
[i
],
519 /* If debugging and unrolling loops, we must replicate the tree nodes
520 corresponding to the blocks inside the loop, so that the original one
521 to one mapping will remain. */
522 if (flag_unroll_loops
&& write_symbols
!= NO_DEBUG
)
523 unroll_block_trees ();
526 /* Optimize one loop whose start is LOOP_START and end is END.
527 LOOP_START is the NOTE_INSN_LOOP_BEG and END is the matching
528 NOTE_INSN_LOOP_END. */
530 /* ??? Could also move memory writes out of loops if the destination address
531 is invariant, the source is invariant, the memory write is not volatile,
532 and if we can prove that no read inside the loop can read this address
533 before the write occurs. If there is a read of this address after the
534 write, then we can also mark the memory read as invariant. */
537 scan_loop (loop_start
, end
, nregs
)
543 /* 1 if we are scanning insns that could be executed zero times. */
545 /* 1 if we are scanning insns that might never be executed
546 due to a subroutine call which might exit before they are reached. */
548 /* For a rotated loop that is entered near the bottom,
549 this is the label at the top. Otherwise it is zero. */
551 /* Jump insn that enters the loop, or 0 if control drops in. */
552 rtx loop_entry_jump
= 0;
553 /* Place in the loop where control enters. */
555 /* Number of insns in the loop. */
560 /* The SET from an insn, if it is the only SET in the insn. */
562 /* Chain describing insns movable in current loop. */
563 struct movable
*movables
= 0;
564 /* Last element in `movables' -- so we can add elements at the end. */
565 struct movable
*last_movable
= 0;
566 /* Ratio of extra register life span we can justify
567 for saving an instruction. More if loop doesn't call subroutines
568 since in that case saving an insn makes more difference
569 and more registers are available. */
571 /* If we have calls, contains the insn in which a register was used
572 if it was used exactly once; contains const0_rtx if it was used more
574 rtx
*reg_single_usage
= 0;
575 /* Nonzero if we are scanning instructions in a sub-loop. */
578 n_times_set
= (int *) alloca (nregs
* sizeof (int));
579 n_times_used
= (int *) alloca (nregs
* sizeof (int));
580 may_not_optimize
= (char *) alloca (nregs
);
582 /* Determine whether this loop starts with a jump down to a test at
583 the end. This will occur for a small number of loops with a test
584 that is too complex to duplicate in front of the loop.
586 We search for the first insn or label in the loop, skipping NOTEs.
587 However, we must be careful not to skip past a NOTE_INSN_LOOP_BEG
588 (because we might have a loop executed only once that contains a
589 loop which starts with a jump to its exit test) or a NOTE_INSN_LOOP_END
590 (in case we have a degenerate loop).
592 Note that if we mistakenly think that a loop is entered at the top
593 when, in fact, it is entered at the exit test, the only effect will be
594 slightly poorer optimization. Making the opposite error can generate
595 incorrect code. Since very few loops now start with a jump to the
596 exit test, the code here to detect that case is very conservative. */
598 for (p
= NEXT_INSN (loop_start
);
600 && GET_CODE (p
) != CODE_LABEL
&& GET_RTX_CLASS (GET_CODE (p
)) != 'i'
601 && (GET_CODE (p
) != NOTE
602 || (NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_BEG
603 && NOTE_LINE_NUMBER (p
) != NOTE_INSN_LOOP_END
));
609 /* Set up variables describing this loop. */
610 prescan_loop (loop_start
, end
);
611 threshold
= (loop_has_call
? 1 : 2) * (1 + n_non_fixed_regs
);
613 /* If loop has a jump before the first label,
614 the true entry is the target of that jump.
615 Start scan from there.
616 But record in LOOP_TOP the place where the end-test jumps
617 back to so we can scan that after the end of the loop. */
618 if (GET_CODE (p
) == JUMP_INSN
)
622 /* Loop entry must be unconditional jump (and not a RETURN) */
624 && JUMP_LABEL (p
) != 0
625 /* Check to see whether the jump actually
626 jumps out of the loop (meaning it's no loop).
627 This case can happen for things like
628 do {..} while (0). If this label was generated previously
629 by loop, we can't tell anything about it and have to reject
631 && INSN_UID (JUMP_LABEL (p
)) < max_uid_for_loop
632 && INSN_LUID (JUMP_LABEL (p
)) >= INSN_LUID (loop_start
)
633 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (end
))
635 loop_top
= next_label (scan_start
);
636 scan_start
= JUMP_LABEL (p
);
640 /* If SCAN_START was an insn created by loop, we don't know its luid
641 as required by loop_reg_used_before_p. So skip such loops. (This
642 test may never be true, but it's best to play it safe.)
644 Also, skip loops where we do not start scanning at a label. This
645 test also rejects loops starting with a JUMP_INSN that failed the
648 if (INSN_UID (scan_start
) >= max_uid_for_loop
649 || GET_CODE (scan_start
) != CODE_LABEL
)
651 if (loop_dump_stream
)
652 fprintf (loop_dump_stream
, "\nLoop from %d to %d is phony.\n\n",
653 INSN_UID (loop_start
), INSN_UID (end
));
657 /* Count number of times each reg is set during this loop.
658 Set may_not_optimize[I] if it is not safe to move out
659 the setting of register I. If this loop has calls, set
660 reg_single_usage[I]. */
662 bzero ((char *) n_times_set
, nregs
* sizeof (int));
663 bzero (may_not_optimize
, nregs
);
667 reg_single_usage
= (rtx
*) alloca (nregs
* sizeof (rtx
));
668 bzero ((char *) reg_single_usage
, nregs
* sizeof (rtx
));
671 count_loop_regs_set (loop_top
? loop_top
: loop_start
, end
,
672 may_not_optimize
, reg_single_usage
, &insn_count
, nregs
);
674 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
675 may_not_optimize
[i
] = 1, n_times_set
[i
] = 1;
676 bcopy ((char *) n_times_set
, (char *) n_times_used
, nregs
* sizeof (int));
678 if (loop_dump_stream
)
680 fprintf (loop_dump_stream
, "\nLoop from %d to %d: %d real insns.\n",
681 INSN_UID (loop_start
), INSN_UID (end
), insn_count
);
683 fprintf (loop_dump_stream
, "Continue at insn %d.\n",
684 INSN_UID (loop_continue
));
687 /* Scan through the loop finding insns that are safe to move.
688 Set n_times_set negative for the reg being set, so that
689 this reg will be considered invariant for subsequent insns.
690 We consider whether subsequent insns use the reg
691 in deciding whether it is worth actually moving.
693 MAYBE_NEVER is nonzero if we have passed a conditional jump insn
694 and therefore it is possible that the insns we are scanning
695 would never be executed. At such times, we must make sure
696 that it is safe to execute the insn once instead of zero times.
697 When MAYBE_NEVER is 0, all insns will be executed at least once
698 so that is not a problem. */
704 /* At end of a straight-in loop, we are done.
705 At end of a loop entered at the bottom, scan the top. */
718 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
719 && find_reg_note (p
, REG_LIBCALL
, NULL_RTX
))
721 else if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
722 && find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
725 if (GET_CODE (p
) == INSN
726 && (set
= single_set (p
))
727 && GET_CODE (SET_DEST (set
)) == REG
728 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
733 rtx src
= SET_SRC (set
);
734 rtx dependencies
= 0;
736 /* Figure out what to use as a source of this insn. If a REG_EQUIV
737 note is given or if a REG_EQUAL note with a constant operand is
738 specified, use it as the source and mark that we should move
739 this insn by calling emit_move_insn rather that duplicating the
742 Otherwise, only use the REG_EQUAL contents if a REG_RETVAL note
744 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
746 src
= XEXP (temp
, 0), move_insn
= 1;
749 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
750 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
751 src
= XEXP (temp
, 0), move_insn
= 1;
752 if (temp
&& find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
754 src
= XEXP (temp
, 0);
755 /* A libcall block can use regs that don't appear in
756 the equivalent expression. To move the libcall,
757 we must move those regs too. */
758 dependencies
= libcall_other_reg (p
, src
);
762 /* Don't try to optimize a register that was made
763 by loop-optimization for an inner loop.
764 We don't know its life-span, so we can't compute the benefit. */
765 if (REGNO (SET_DEST (set
)) >= max_reg_before_loop
)
767 /* In order to move a register, we need to have one of three cases:
768 (1) it is used only in the same basic block as the set
769 (2) it is not a user variable and it is not used in the
770 exit test (this can cause the variable to be used
771 before it is set just like a user-variable).
772 (3) the set is guaranteed to be executed once the loop starts,
773 and the reg is not used until after that. */
774 else if (! ((! maybe_never
775 && ! loop_reg_used_before_p (set
, p
, loop_start
,
777 || (! REG_USERVAR_P (SET_DEST (set
))
778 && ! REG_LOOP_TEST_P (SET_DEST (set
)))
779 || reg_in_basic_block_p (p
, SET_DEST (set
))))
781 else if ((tem
= invariant_p (src
))
782 && (dependencies
== 0
783 || (tem2
= invariant_p (dependencies
)) != 0)
784 && (n_times_set
[REGNO (SET_DEST (set
))] == 1
786 = consec_sets_invariant_p (SET_DEST (set
),
787 n_times_set
[REGNO (SET_DEST (set
))],
789 /* If the insn can cause a trap (such as divide by zero),
790 can't move it unless it's guaranteed to be executed
791 once loop is entered. Even a function call might
792 prevent the trap insn from being reached
793 (since it might exit!) */
794 && ! ((maybe_never
|| call_passed
)
795 && may_trap_p (src
)))
797 register struct movable
*m
;
798 register int regno
= REGNO (SET_DEST (set
));
800 /* A potential lossage is where we have a case where two insns
801 can be combined as long as they are both in the loop, but
802 we move one of them outside the loop. For large loops,
803 this can lose. The most common case of this is the address
804 of a function being called.
806 Therefore, if this register is marked as being used exactly
807 once if we are in a loop with calls (a "large loop"), see if
808 we can replace the usage of this register with the source
809 of this SET. If we can, delete this insn.
811 Don't do this if P has a REG_RETVAL note or if we have
812 SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */
814 if (reg_single_usage
&& reg_single_usage
[regno
] != 0
815 && reg_single_usage
[regno
] != const0_rtx
816 && REGNO_FIRST_UID (regno
) == INSN_UID (p
)
817 && (REGNO_LAST_UID (regno
)
818 == INSN_UID (reg_single_usage
[regno
]))
819 && n_times_set
[REGNO (SET_DEST (set
))] == 1
820 && ! side_effects_p (SET_SRC (set
))
821 && ! find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
822 && (! SMALL_REGISTER_CLASSES
823 || (! (GET_CODE (SET_SRC (set
)) == REG
824 && REGNO (SET_SRC (set
)) < FIRST_PSEUDO_REGISTER
)))
825 /* This test is not redundant; SET_SRC (set) might be
826 a call-clobbered register and the life of REGNO
827 might span a call. */
828 && ! modified_between_p (SET_SRC (set
), p
,
829 reg_single_usage
[regno
])
830 && no_labels_between_p (p
, reg_single_usage
[regno
])
831 && validate_replace_rtx (SET_DEST (set
), SET_SRC (set
),
832 reg_single_usage
[regno
]))
834 /* Replace any usage in a REG_EQUAL note. Must copy the
835 new source, so that we don't get rtx sharing between the
836 SET_SOURCE and REG_NOTES of insn p. */
837 REG_NOTES (reg_single_usage
[regno
])
838 = replace_rtx (REG_NOTES (reg_single_usage
[regno
]),
839 SET_DEST (set
), copy_rtx (SET_SRC (set
)));
842 NOTE_LINE_NUMBER (p
) = NOTE_INSN_DELETED
;
843 NOTE_SOURCE_FILE (p
) = 0;
844 n_times_set
[regno
] = 0;
848 m
= (struct movable
*) alloca (sizeof (struct movable
));
852 m
->dependencies
= dependencies
;
853 m
->set_dest
= SET_DEST (set
);
855 m
->consec
= n_times_set
[REGNO (SET_DEST (set
))] - 1;
859 m
->move_insn
= move_insn
;
860 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
861 m
->savemode
= VOIDmode
;
863 /* Set M->cond if either invariant_p or consec_sets_invariant_p
864 returned 2 (only conditionally invariant). */
865 m
->cond
= ((tem
| tem1
| tem2
) > 1);
866 m
->global
= (uid_luid
[REGNO_LAST_UID (regno
)] > INSN_LUID (end
)
867 || uid_luid
[REGNO_FIRST_UID (regno
)] < INSN_LUID (loop_start
));
869 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
870 - uid_luid
[REGNO_FIRST_UID (regno
)]);
871 m
->savings
= n_times_used
[regno
];
872 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
873 m
->savings
+= libcall_benefit (p
);
874 n_times_set
[regno
] = move_insn
? -2 : -1;
875 /* Add M to the end of the chain MOVABLES. */
879 last_movable
->next
= m
;
884 /* Skip this insn, not checking REG_LIBCALL notes. */
885 p
= next_nonnote_insn (p
);
886 /* Skip the consecutive insns, if there are any. */
887 p
= skip_consec_insns (p
, m
->consec
);
888 /* Back up to the last insn of the consecutive group. */
889 p
= prev_nonnote_insn (p
);
891 /* We must now reset m->move_insn, m->is_equiv, and possibly
892 m->set_src to correspond to the effects of all the
894 temp
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
);
896 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
899 temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
900 if (temp
&& CONSTANT_P (XEXP (temp
, 0)))
901 m
->set_src
= XEXP (temp
, 0), m
->move_insn
= 1;
906 m
->is_equiv
= (find_reg_note (p
, REG_EQUIV
, NULL_RTX
) != 0);
909 /* If this register is always set within a STRICT_LOW_PART
910 or set to zero, then its high bytes are constant.
911 So clear them outside the loop and within the loop
912 just load the low bytes.
913 We must check that the machine has an instruction to do so.
914 Also, if the value loaded into the register
915 depends on the same register, this cannot be done. */
916 else if (SET_SRC (set
) == const0_rtx
917 && GET_CODE (NEXT_INSN (p
)) == INSN
918 && (set1
= single_set (NEXT_INSN (p
)))
919 && GET_CODE (set1
) == SET
920 && (GET_CODE (SET_DEST (set1
)) == STRICT_LOW_PART
)
921 && (GET_CODE (XEXP (SET_DEST (set1
), 0)) == SUBREG
)
922 && (SUBREG_REG (XEXP (SET_DEST (set1
), 0))
924 && !reg_mentioned_p (SET_DEST (set
), SET_SRC (set1
)))
926 register int regno
= REGNO (SET_DEST (set
));
927 if (n_times_set
[regno
] == 2)
929 register struct movable
*m
;
930 m
= (struct movable
*) alloca (sizeof (struct movable
));
933 m
->set_dest
= SET_DEST (set
);
941 /* If the insn may not be executed on some cycles,
942 we can't clear the whole reg; clear just high part.
943 Not even if the reg is used only within this loop.
950 Clearing x before the inner loop could clobber a value
951 being saved from the last time around the outer loop.
952 However, if the reg is not used outside this loop
953 and all uses of the register are in the same
954 basic block as the store, there is no problem.
956 If this insn was made by loop, we don't know its
957 INSN_LUID and hence must make a conservative
959 m
->global
= (INSN_UID (p
) >= max_uid_for_loop
960 || (uid_luid
[REGNO_LAST_UID (regno
)]
962 || (uid_luid
[REGNO_FIRST_UID (regno
)]
964 || (labels_in_range_p
965 (p
, uid_luid
[REGNO_FIRST_UID (regno
)])));
966 if (maybe_never
&& m
->global
)
967 m
->savemode
= GET_MODE (SET_SRC (set1
));
969 m
->savemode
= VOIDmode
;
973 m
->lifetime
= (uid_luid
[REGNO_LAST_UID (regno
)]
974 - uid_luid
[REGNO_FIRST_UID (regno
)]);
976 n_times_set
[regno
] = -1;
977 /* Add M to the end of the chain MOVABLES. */
981 last_movable
->next
= m
;
986 /* Past a call insn, we get to insns which might not be executed
987 because the call might exit. This matters for insns that trap.
988 Call insns inside a REG_LIBCALL/REG_RETVAL block always return,
989 so they don't count. */
990 else if (GET_CODE (p
) == CALL_INSN
&& ! in_libcall
)
992 /* Past a label or a jump, we get to insns for which we
993 can't count on whether or how many times they will be
994 executed during each iteration. Therefore, we can
995 only move out sets of trivial variables
996 (those not used after the loop). */
997 /* Similar code appears twice in strength_reduce. */
998 else if ((GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
)
999 /* If we enter the loop in the middle, and scan around to the
1000 beginning, don't set maybe_never for that. This must be an
1001 unconditional jump, otherwise the code at the top of the
1002 loop might never be executed. Unconditional jumps are
1003 followed a by barrier then loop end. */
1004 && ! (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
) == loop_top
1005 && NEXT_INSN (NEXT_INSN (p
)) == end
1006 && simplejump_p (p
)))
1008 else if (GET_CODE (p
) == NOTE
)
1010 /* At the virtual top of a converted loop, insns are again known to
1011 be executed: logically, the loop begins here even though the exit
1012 code has been duplicated. */
1013 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
1014 maybe_never
= call_passed
= 0;
1015 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
1017 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
1022 /* If one movable subsumes another, ignore that other. */
1024 ignore_some_movables (movables
);
1026 /* For each movable insn, see if the reg that it loads
1027 leads when it dies right into another conditionally movable insn.
1028 If so, record that the second insn "forces" the first one,
1029 since the second can be moved only if the first is. */
1031 force_movables (movables
);
1033 /* See if there are multiple movable insns that load the same value.
1034 If there are, make all but the first point at the first one
1035 through the `match' field, and add the priorities of them
1036 all together as the priority of the first. */
1038 combine_movables (movables
, nregs
);
1040 /* Now consider each movable insn to decide whether it is worth moving.
1041 Store 0 in n_times_set for each reg that is moved. */
1043 move_movables (movables
, threshold
,
1044 insn_count
, loop_start
, end
, nregs
);
1046 /* Now candidates that still are negative are those not moved.
1047 Change n_times_set to indicate that those are not actually invariant. */
1048 for (i
= 0; i
< nregs
; i
++)
1049 if (n_times_set
[i
] < 0)
1050 n_times_set
[i
] = n_times_used
[i
];
1052 if (flag_strength_reduce
)
1053 strength_reduce (scan_start
, end
, loop_top
,
1054 insn_count
, loop_start
, end
);
1057 /* Add elements to *OUTPUT to record all the pseudo-regs
1058 mentioned in IN_THIS but not mentioned in NOT_IN_THIS. */
1061 record_excess_regs (in_this
, not_in_this
, output
)
1062 rtx in_this
, not_in_this
;
1069 code
= GET_CODE (in_this
);
1083 if (REGNO (in_this
) >= FIRST_PSEUDO_REGISTER
1084 && ! reg_mentioned_p (in_this
, not_in_this
))
1085 *output
= gen_rtx (EXPR_LIST
, VOIDmode
, in_this
, *output
);
1092 fmt
= GET_RTX_FORMAT (code
);
1093 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1100 for (j
= 0; j
< XVECLEN (in_this
, i
); j
++)
1101 record_excess_regs (XVECEXP (in_this
, i
, j
), not_in_this
, output
);
1105 record_excess_regs (XEXP (in_this
, i
), not_in_this
, output
);
1111 /* Check what regs are referred to in the libcall block ending with INSN,
1112 aside from those mentioned in the equivalent value.
1113 If there are none, return 0.
1114 If there are one or more, return an EXPR_LIST containing all of them. */
1117 libcall_other_reg (insn
, equiv
)
1120 rtx note
= find_reg_note (insn
, REG_RETVAL
, NULL_RTX
);
1121 rtx p
= XEXP (note
, 0);
1124 /* First, find all the regs used in the libcall block
1125 that are not mentioned as inputs to the result. */
1129 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
1130 || GET_CODE (p
) == CALL_INSN
)
1131 record_excess_regs (PATTERN (p
), equiv
, &output
);
1138 /* Return 1 if all uses of REG
1139 are between INSN and the end of the basic block. */
1142 reg_in_basic_block_p (insn
, reg
)
1145 int regno
= REGNO (reg
);
1148 if (REGNO_FIRST_UID (regno
) != INSN_UID (insn
))
1151 /* Search this basic block for the already recorded last use of the reg. */
1152 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1154 switch (GET_CODE (p
))
1161 /* Ordinary insn: if this is the last use, we win. */
1162 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1167 /* Jump insn: if this is the last use, we win. */
1168 if (REGNO_LAST_UID (regno
) == INSN_UID (p
))
1170 /* Otherwise, it's the end of the basic block, so we lose. */
1175 /* It's the end of the basic block, so we lose. */
1183 /* The "last use" doesn't follow the "first use"?? */
1187 /* Compute the benefit of eliminating the insns in the block whose
1188 last insn is LAST. This may be a group of insns used to compute a
1189 value directly or can contain a library call. */
1192 libcall_benefit (last
)
1198 for (insn
= XEXP (find_reg_note (last
, REG_RETVAL
, NULL_RTX
), 0);
1199 insn
!= last
; insn
= NEXT_INSN (insn
))
1201 if (GET_CODE (insn
) == CALL_INSN
)
1202 benefit
+= 10; /* Assume at least this many insns in a library
1204 else if (GET_CODE (insn
) == INSN
1205 && GET_CODE (PATTERN (insn
)) != USE
1206 && GET_CODE (PATTERN (insn
)) != CLOBBER
)
1213 /* Skip COUNT insns from INSN, counting library calls as 1 insn. */
1216 skip_consec_insns (insn
, count
)
1220 for (; count
> 0; count
--)
1224 /* If first insn of libcall sequence, skip to end. */
1225 /* Do this at start of loop, since INSN is guaranteed to
1227 if (GET_CODE (insn
) != NOTE
1228 && (temp
= find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
)))
1229 insn
= XEXP (temp
, 0);
1231 do insn
= NEXT_INSN (insn
);
1232 while (GET_CODE (insn
) == NOTE
);
1238 /* Ignore any movable whose insn falls within a libcall
1239 which is part of another movable.
1240 We make use of the fact that the movable for the libcall value
1241 was made later and so appears later on the chain. */
1244 ignore_some_movables (movables
)
1245 struct movable
*movables
;
1247 register struct movable
*m
, *m1
;
1249 for (m
= movables
; m
; m
= m
->next
)
1251 /* Is this a movable for the value of a libcall? */
1252 rtx note
= find_reg_note (m
->insn
, REG_RETVAL
, NULL_RTX
);
1256 /* Check for earlier movables inside that range,
1257 and mark them invalid. We cannot use LUIDs here because
1258 insns created by loop.c for prior loops don't have LUIDs.
1259 Rather than reject all such insns from movables, we just
1260 explicitly check each insn in the libcall (since invariant
1261 libcalls aren't that common). */
1262 for (insn
= XEXP (note
, 0); insn
!= m
->insn
; insn
= NEXT_INSN (insn
))
1263 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1264 if (m1
->insn
== insn
)
1270 /* For each movable insn, see if the reg that it loads
1271 leads when it dies right into another conditionally movable insn.
1272 If so, record that the second insn "forces" the first one,
1273 since the second can be moved only if the first is. */
1276 force_movables (movables
)
1277 struct movable
*movables
;
1279 register struct movable
*m
, *m1
;
1280 for (m1
= movables
; m1
; m1
= m1
->next
)
1281 /* Omit this if moving just the (SET (REG) 0) of a zero-extend. */
1282 if (!m1
->partial
&& !m1
->done
)
1284 int regno
= m1
->regno
;
1285 for (m
= m1
->next
; m
; m
= m
->next
)
1286 /* ??? Could this be a bug? What if CSE caused the
1287 register of M1 to be used after this insn?
1288 Since CSE does not update regno_last_uid,
1289 this insn M->insn might not be where it dies.
1290 But very likely this doesn't matter; what matters is
1291 that M's reg is computed from M1's reg. */
1292 if (INSN_UID (m
->insn
) == REGNO_LAST_UID (regno
)
1295 if (m
!= 0 && m
->set_src
== m1
->set_dest
1296 /* If m->consec, m->set_src isn't valid. */
1300 /* Increase the priority of the moving the first insn
1301 since it permits the second to be moved as well. */
1305 m1
->lifetime
+= m
->lifetime
;
1306 m1
->savings
+= m1
->savings
;
1311 /* Find invariant expressions that are equal and can be combined into
1315 combine_movables (movables
, nregs
)
1316 struct movable
*movables
;
1319 register struct movable
*m
;
1320 char *matched_regs
= (char *) alloca (nregs
);
1321 enum machine_mode mode
;
1323 /* Regs that are set more than once are not allowed to match
1324 or be matched. I'm no longer sure why not. */
1325 /* Perhaps testing m->consec_sets would be more appropriate here? */
1327 for (m
= movables
; m
; m
= m
->next
)
1328 if (m
->match
== 0 && n_times_used
[m
->regno
] == 1 && !m
->partial
)
1330 register struct movable
*m1
;
1331 int regno
= m
->regno
;
1333 bzero (matched_regs
, nregs
);
1334 matched_regs
[regno
] = 1;
1336 /* We want later insns to match the first one. Don't make the first
1337 one match any later ones. So start this loop at m->next. */
1338 for (m1
= m
->next
; m1
; m1
= m1
->next
)
1339 if (m
!= m1
&& m1
->match
== 0 && n_times_used
[m1
->regno
] == 1
1340 /* A reg used outside the loop mustn't be eliminated. */
1342 /* A reg used for zero-extending mustn't be eliminated. */
1344 && (matched_regs
[m1
->regno
]
1347 /* Can combine regs with different modes loaded from the
1348 same constant only if the modes are the same or
1349 if both are integer modes with M wider or the same
1350 width as M1. The check for integer is redundant, but
1351 safe, since the only case of differing destination
1352 modes with equal sources is when both sources are
1353 VOIDmode, i.e., CONST_INT. */
1354 (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
)
1355 || (GET_MODE_CLASS (GET_MODE (m
->set_dest
)) == MODE_INT
1356 && GET_MODE_CLASS (GET_MODE (m1
->set_dest
)) == MODE_INT
1357 && (GET_MODE_BITSIZE (GET_MODE (m
->set_dest
))
1358 >= GET_MODE_BITSIZE (GET_MODE (m1
->set_dest
)))))
1359 /* See if the source of M1 says it matches M. */
1360 && ((GET_CODE (m1
->set_src
) == REG
1361 && matched_regs
[REGNO (m1
->set_src
)])
1362 || rtx_equal_for_loop_p (m
->set_src
, m1
->set_src
,
1364 && ((m
->dependencies
== m1
->dependencies
)
1365 || rtx_equal_p (m
->dependencies
, m1
->dependencies
)))
1367 m
->lifetime
+= m1
->lifetime
;
1368 m
->savings
+= m1
->savings
;
1371 matched_regs
[m1
->regno
] = 1;
1375 /* Now combine the regs used for zero-extension.
1376 This can be done for those not marked `global'
1377 provided their lives don't overlap. */
1379 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1380 mode
= GET_MODE_WIDER_MODE (mode
))
1382 register struct movable
*m0
= 0;
1384 /* Combine all the registers for extension from mode MODE.
1385 Don't combine any that are used outside this loop. */
1386 for (m
= movables
; m
; m
= m
->next
)
1387 if (m
->partial
&& ! m
->global
1388 && mode
== GET_MODE (SET_SRC (PATTERN (NEXT_INSN (m
->insn
)))))
1390 register struct movable
*m1
;
1391 int first
= uid_luid
[REGNO_FIRST_UID (m
->regno
)];
1392 int last
= uid_luid
[REGNO_LAST_UID (m
->regno
)];
1396 /* First one: don't check for overlap, just record it. */
1401 /* Make sure they extend to the same mode.
1402 (Almost always true.) */
1403 if (GET_MODE (m
->set_dest
) != GET_MODE (m0
->set_dest
))
1406 /* We already have one: check for overlap with those
1407 already combined together. */
1408 for (m1
= movables
; m1
!= m
; m1
= m1
->next
)
1409 if (m1
== m0
|| (m1
->partial
&& m1
->match
== m0
))
1410 if (! (uid_luid
[REGNO_FIRST_UID (m1
->regno
)] > last
1411 || uid_luid
[REGNO_LAST_UID (m1
->regno
)] < first
))
1414 /* No overlap: we can combine this with the others. */
1415 m0
->lifetime
+= m
->lifetime
;
1416 m0
->savings
+= m
->savings
;
1425 /* Return 1 if regs X and Y will become the same if moved. */
1428 regs_match_p (x
, y
, movables
)
1430 struct movable
*movables
;
1434 struct movable
*mx
, *my
;
1436 for (mx
= movables
; mx
; mx
= mx
->next
)
1437 if (mx
->regno
== xn
)
1440 for (my
= movables
; my
; my
= my
->next
)
1441 if (my
->regno
== yn
)
1445 && ((mx
->match
== my
->match
&& mx
->match
!= 0)
1447 || mx
== my
->match
));
1450 /* Return 1 if X and Y are identical-looking rtx's.
1451 This is the Lisp function EQUAL for rtx arguments.
1453 If two registers are matching movables or a movable register and an
1454 equivalent constant, consider them equal. */
1457 rtx_equal_for_loop_p (x
, y
, movables
)
1459 struct movable
*movables
;
1463 register struct movable
*m
;
1464 register enum rtx_code code
;
1469 if (x
== 0 || y
== 0)
1472 code
= GET_CODE (x
);
1474 /* If we have a register and a constant, they may sometimes be
1476 if (GET_CODE (x
) == REG
&& n_times_set
[REGNO (x
)] == -2
1478 for (m
= movables
; m
; m
= m
->next
)
1479 if (m
->move_insn
&& m
->regno
== REGNO (x
)
1480 && rtx_equal_p (m
->set_src
, y
))
1483 else if (GET_CODE (y
) == REG
&& n_times_set
[REGNO (y
)] == -2
1485 for (m
= movables
; m
; m
= m
->next
)
1486 if (m
->move_insn
&& m
->regno
== REGNO (y
)
1487 && rtx_equal_p (m
->set_src
, x
))
1490 /* Otherwise, rtx's of different codes cannot be equal. */
1491 if (code
!= GET_CODE (y
))
1494 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
1495 (REG:SI x) and (REG:HI x) are NOT equivalent. */
1497 if (GET_MODE (x
) != GET_MODE (y
))
1500 /* These three types of rtx's can be compared nonrecursively. */
1502 return (REGNO (x
) == REGNO (y
) || regs_match_p (x
, y
, movables
));
1504 if (code
== LABEL_REF
)
1505 return XEXP (x
, 0) == XEXP (y
, 0);
1506 if (code
== SYMBOL_REF
)
1507 return XSTR (x
, 0) == XSTR (y
, 0);
1509 /* Compare the elements. If any pair of corresponding elements
1510 fail to match, return 0 for the whole things. */
1512 fmt
= GET_RTX_FORMAT (code
);
1513 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1518 if (XWINT (x
, i
) != XWINT (y
, i
))
1523 if (XINT (x
, i
) != XINT (y
, i
))
1528 /* Two vectors must have the same length. */
1529 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
1532 /* And the corresponding elements must match. */
1533 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1534 if (rtx_equal_for_loop_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
), movables
) == 0)
1539 if (rtx_equal_for_loop_p (XEXP (x
, i
), XEXP (y
, i
), movables
) == 0)
1544 if (strcmp (XSTR (x
, i
), XSTR (y
, i
)))
1549 /* These are just backpointers, so they don't matter. */
1555 /* It is believed that rtx's at this level will never
1556 contain anything but integers and other rtx's,
1557 except for within LABEL_REFs and SYMBOL_REFs. */
1565 /* If X contains any LABEL_REF's, add REG_LABEL notes for them to all
1566 insns in INSNS which use thet reference. */
1569 add_label_notes (x
, insns
)
1573 enum rtx_code code
= GET_CODE (x
);
1578 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
1580 rtx next
= next_real_insn (XEXP (x
, 0));
1582 /* Don't record labels that refer to dispatch tables.
1583 This is not necessary, since the tablejump references the same label.
1584 And if we did record them, flow.c would make worse code. */
1586 || ! (GET_CODE (next
) == JUMP_INSN
1587 && (GET_CODE (PATTERN (next
)) == ADDR_VEC
1588 || GET_CODE (PATTERN (next
)) == ADDR_DIFF_VEC
)))
1590 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
1591 if (reg_mentioned_p (XEXP (x
, 0), insn
))
1592 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_LABEL
, XEXP (x
, 0),
1598 fmt
= GET_RTX_FORMAT (code
);
1599 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1602 add_label_notes (XEXP (x
, i
), insns
);
1603 else if (fmt
[i
] == 'E')
1604 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
1605 add_label_notes (XVECEXP (x
, i
, j
), insns
);
1609 /* Scan MOVABLES, and move the insns that deserve to be moved.
1610 If two matching movables are combined, replace one reg with the
1611 other throughout. */
1614 move_movables (movables
, threshold
, insn_count
, loop_start
, end
, nregs
)
1615 struct movable
*movables
;
1623 register struct movable
*m
;
1625 /* Map of pseudo-register replacements to handle combining
1626 when we move several insns that load the same value
1627 into different pseudo-registers. */
1628 rtx
*reg_map
= (rtx
*) alloca (nregs
* sizeof (rtx
));
1629 char *already_moved
= (char *) alloca (nregs
);
1631 bzero (already_moved
, nregs
);
1632 bzero ((char *) reg_map
, nregs
* sizeof (rtx
));
1636 for (m
= movables
; m
; m
= m
->next
)
1638 /* Describe this movable insn. */
1640 if (loop_dump_stream
)
1642 fprintf (loop_dump_stream
, "Insn %d: regno %d (life %d), ",
1643 INSN_UID (m
->insn
), m
->regno
, m
->lifetime
);
1645 fprintf (loop_dump_stream
, "consec %d, ", m
->consec
);
1647 fprintf (loop_dump_stream
, "cond ");
1649 fprintf (loop_dump_stream
, "force ");
1651 fprintf (loop_dump_stream
, "global ");
1653 fprintf (loop_dump_stream
, "done ");
1655 fprintf (loop_dump_stream
, "move-insn ");
1657 fprintf (loop_dump_stream
, "matches %d ",
1658 INSN_UID (m
->match
->insn
));
1660 fprintf (loop_dump_stream
, "forces %d ",
1661 INSN_UID (m
->forces
->insn
));
1664 /* Count movables. Value used in heuristics in strength_reduce. */
1667 /* Ignore the insn if it's already done (it matched something else).
1668 Otherwise, see if it is now safe to move. */
1672 || (1 == invariant_p (m
->set_src
)
1673 && (m
->dependencies
== 0
1674 || 1 == invariant_p (m
->dependencies
))
1676 || 1 == consec_sets_invariant_p (m
->set_dest
,
1679 && (! m
->forces
|| m
->forces
->done
))
1683 int savings
= m
->savings
;
1685 /* We have an insn that is safe to move.
1686 Compute its desirability. */
1691 if (loop_dump_stream
)
1692 fprintf (loop_dump_stream
, "savings %d ", savings
);
1694 if (moved_once
[regno
])
1698 if (loop_dump_stream
)
1699 fprintf (loop_dump_stream
, "halved since already moved ");
1702 /* An insn MUST be moved if we already moved something else
1703 which is safe only if this one is moved too: that is,
1704 if already_moved[REGNO] is nonzero. */
1706 /* An insn is desirable to move if the new lifetime of the
1707 register is no more than THRESHOLD times the old lifetime.
1708 If it's not desirable, it means the loop is so big
1709 that moving won't speed things up much,
1710 and it is liable to make register usage worse. */
1712 /* It is also desirable to move if it can be moved at no
1713 extra cost because something else was already moved. */
1715 if (already_moved
[regno
]
1716 || flag_move_all_movables
1717 || (threshold
* savings
* m
->lifetime
) >= insn_count
1718 || (m
->forces
&& m
->forces
->done
1719 && n_times_used
[m
->forces
->regno
] == 1))
1722 register struct movable
*m1
;
1725 /* Now move the insns that set the reg. */
1727 if (m
->partial
&& m
->match
)
1731 /* Find the end of this chain of matching regs.
1732 Thus, we load each reg in the chain from that one reg.
1733 And that reg is loaded with 0 directly,
1734 since it has ->match == 0. */
1735 for (m1
= m
; m1
->match
; m1
= m1
->match
);
1736 newpat
= gen_move_insn (SET_DEST (PATTERN (m
->insn
)),
1737 SET_DEST (PATTERN (m1
->insn
)));
1738 i1
= emit_insn_before (newpat
, loop_start
);
1740 /* Mark the moved, invariant reg as being allowed to
1741 share a hard reg with the other matching invariant. */
1742 REG_NOTES (i1
) = REG_NOTES (m
->insn
);
1743 r1
= SET_DEST (PATTERN (m
->insn
));
1744 r2
= SET_DEST (PATTERN (m1
->insn
));
1745 regs_may_share
= gen_rtx (EXPR_LIST
, VOIDmode
, r1
,
1746 gen_rtx (EXPR_LIST
, VOIDmode
, r2
,
1748 delete_insn (m
->insn
);
1753 if (loop_dump_stream
)
1754 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1756 /* If we are to re-generate the item being moved with a
1757 new move insn, first delete what we have and then emit
1758 the move insn before the loop. */
1759 else if (m
->move_insn
)
1763 for (count
= m
->consec
; count
>= 0; count
--)
1765 /* If this is the first insn of a library call sequence,
1767 if (GET_CODE (p
) != NOTE
1768 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1771 /* If this is the last insn of a libcall sequence, then
1772 delete every insn in the sequence except the last.
1773 The last insn is handled in the normal manner. */
1774 if (GET_CODE (p
) != NOTE
1775 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1777 temp
= XEXP (temp
, 0);
1779 temp
= delete_insn (temp
);
1782 p
= delete_insn (p
);
1783 while (p
&& GET_CODE (p
) == NOTE
)
1788 emit_move_insn (m
->set_dest
, m
->set_src
);
1789 temp
= get_insns ();
1792 add_label_notes (m
->set_src
, temp
);
1794 i1
= emit_insns_before (temp
, loop_start
);
1795 if (! find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1797 = gen_rtx (EXPR_LIST
,
1798 m
->is_equiv
? REG_EQUIV
: REG_EQUAL
,
1799 m
->set_src
, REG_NOTES (i1
));
1801 if (loop_dump_stream
)
1802 fprintf (loop_dump_stream
, " moved to %d", INSN_UID (i1
));
1804 /* The more regs we move, the less we like moving them. */
1809 for (count
= m
->consec
; count
>= 0; count
--)
1813 /* If first insn of libcall sequence, skip to end. */
1814 /* Do this at start of loop, since p is guaranteed to
1816 if (GET_CODE (p
) != NOTE
1817 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
1820 /* If last insn of libcall sequence, move all
1821 insns except the last before the loop. The last
1822 insn is handled in the normal manner. */
1823 if (GET_CODE (p
) != NOTE
1824 && (temp
= find_reg_note (p
, REG_RETVAL
, NULL_RTX
)))
1828 rtx fn_address_insn
= 0;
1831 for (temp
= XEXP (temp
, 0); temp
!= p
;
1832 temp
= NEXT_INSN (temp
))
1838 if (GET_CODE (temp
) == NOTE
)
1841 body
= PATTERN (temp
);
1843 /* Find the next insn after TEMP,
1844 not counting USE or NOTE insns. */
1845 for (next
= NEXT_INSN (temp
); next
!= p
;
1846 next
= NEXT_INSN (next
))
1847 if (! (GET_CODE (next
) == INSN
1848 && GET_CODE (PATTERN (next
)) == USE
)
1849 && GET_CODE (next
) != NOTE
)
1852 /* If that is the call, this may be the insn
1853 that loads the function address.
1855 Extract the function address from the insn
1856 that loads it into a register.
1857 If this insn was cse'd, we get incorrect code.
1859 So emit a new move insn that copies the
1860 function address into the register that the
1861 call insn will use. flow.c will delete any
1862 redundant stores that we have created. */
1863 if (GET_CODE (next
) == CALL_INSN
1864 && GET_CODE (body
) == SET
1865 && GET_CODE (SET_DEST (body
)) == REG
1866 && (n
= find_reg_note (temp
, REG_EQUAL
,
1869 fn_reg
= SET_SRC (body
);
1870 if (GET_CODE (fn_reg
) != REG
)
1871 fn_reg
= SET_DEST (body
);
1872 fn_address
= XEXP (n
, 0);
1873 fn_address_insn
= temp
;
1875 /* We have the call insn.
1876 If it uses the register we suspect it might,
1877 load it with the correct address directly. */
1878 if (GET_CODE (temp
) == CALL_INSN
1880 && reg_referenced_p (fn_reg
, body
))
1881 emit_insn_after (gen_move_insn (fn_reg
,
1885 if (GET_CODE (temp
) == CALL_INSN
)
1887 i1
= emit_call_insn_before (body
, loop_start
);
1888 /* Because the USAGE information potentially
1889 contains objects other than hard registers
1890 we need to copy it. */
1891 if (CALL_INSN_FUNCTION_USAGE (temp
))
1892 CALL_INSN_FUNCTION_USAGE (i1
)
1893 = copy_rtx (CALL_INSN_FUNCTION_USAGE (temp
));
1896 i1
= emit_insn_before (body
, loop_start
);
1899 if (temp
== fn_address_insn
)
1900 fn_address_insn
= i1
;
1901 REG_NOTES (i1
) = REG_NOTES (temp
);
1905 if (m
->savemode
!= VOIDmode
)
1907 /* P sets REG to zero; but we should clear only
1908 the bits that are not covered by the mode
1910 rtx reg
= m
->set_dest
;
1916 (GET_MODE (reg
), and_optab
, reg
,
1917 GEN_INT ((((HOST_WIDE_INT
) 1
1918 << GET_MODE_BITSIZE (m
->savemode
)))
1920 reg
, 1, OPTAB_LIB_WIDEN
);
1924 emit_move_insn (reg
, tem
);
1925 sequence
= gen_sequence ();
1927 i1
= emit_insn_before (sequence
, loop_start
);
1929 else if (GET_CODE (p
) == CALL_INSN
)
1931 i1
= emit_call_insn_before (PATTERN (p
), loop_start
);
1932 /* Because the USAGE information potentially
1933 contains objects other than hard registers
1934 we need to copy it. */
1935 if (CALL_INSN_FUNCTION_USAGE (p
))
1936 CALL_INSN_FUNCTION_USAGE (i1
)
1937 = copy_rtx (CALL_INSN_FUNCTION_USAGE (p
));
1940 i1
= emit_insn_before (PATTERN (p
), loop_start
);
1942 REG_NOTES (i1
) = REG_NOTES (p
);
1944 /* If there is a REG_EQUAL note present whose value is
1945 not loop invariant, then delete it, since it may
1946 cause problems with later optimization passes.
1947 It is possible for cse to create such notes
1948 like this as a result of record_jump_cond. */
1950 if ((temp
= find_reg_note (i1
, REG_EQUAL
, NULL_RTX
))
1951 && ! invariant_p (XEXP (temp
, 0)))
1952 remove_note (i1
, temp
);
1957 if (loop_dump_stream
)
1958 fprintf (loop_dump_stream
, " moved to %d",
1962 /* This isn't needed because REG_NOTES is copied
1963 below and is wrong since P might be a PARALLEL. */
1964 if (REG_NOTES (i1
) == 0
1965 && ! m
->partial
/* But not if it's a zero-extend clr. */
1966 && ! m
->global
/* and not if used outside the loop
1967 (since it might get set outside). */
1968 && CONSTANT_P (SET_SRC (PATTERN (p
))))
1970 = gen_rtx (EXPR_LIST
, REG_EQUAL
,
1971 SET_SRC (PATTERN (p
)), REG_NOTES (i1
));
1974 /* If library call, now fix the REG_NOTES that contain
1975 insn pointers, namely REG_LIBCALL on FIRST
1976 and REG_RETVAL on I1. */
1977 if (temp
= find_reg_note (i1
, REG_RETVAL
, NULL_RTX
))
1979 XEXP (temp
, 0) = first
;
1980 temp
= find_reg_note (first
, REG_LIBCALL
, NULL_RTX
);
1981 XEXP (temp
, 0) = i1
;
1985 do p
= NEXT_INSN (p
);
1986 while (p
&& GET_CODE (p
) == NOTE
);
1989 /* The more regs we move, the less we like moving them. */
1993 /* Any other movable that loads the same register
1995 already_moved
[regno
] = 1;
1997 /* This reg has been moved out of one loop. */
1998 moved_once
[regno
] = 1;
2000 /* The reg set here is now invariant. */
2002 n_times_set
[regno
] = 0;
2006 /* Change the length-of-life info for the register
2007 to say it lives at least the full length of this loop.
2008 This will help guide optimizations in outer loops. */
2010 if (uid_luid
[REGNO_FIRST_UID (regno
)] > INSN_LUID (loop_start
))
2011 /* This is the old insn before all the moved insns.
2012 We can't use the moved insn because it is out of range
2013 in uid_luid. Only the old insns have luids. */
2014 REGNO_FIRST_UID (regno
) = INSN_UID (loop_start
);
2015 if (uid_luid
[REGNO_LAST_UID (regno
)] < INSN_LUID (end
))
2016 REGNO_LAST_UID (regno
) = INSN_UID (end
);
2018 /* Combine with this moved insn any other matching movables. */
2021 for (m1
= movables
; m1
; m1
= m1
->next
)
2026 /* Schedule the reg loaded by M1
2027 for replacement so that shares the reg of M.
2028 If the modes differ (only possible in restricted
2029 circumstances, make a SUBREG. */
2030 if (GET_MODE (m
->set_dest
) == GET_MODE (m1
->set_dest
))
2031 reg_map
[m1
->regno
] = m
->set_dest
;
2034 = gen_lowpart_common (GET_MODE (m1
->set_dest
),
2037 /* Get rid of the matching insn
2038 and prevent further processing of it. */
2041 /* if library call, delete all insn except last, which
2043 if (temp
= find_reg_note (m1
->insn
, REG_RETVAL
,
2046 for (temp
= XEXP (temp
, 0); temp
!= m1
->insn
;
2047 temp
= NEXT_INSN (temp
))
2050 delete_insn (m1
->insn
);
2052 /* Any other movable that loads the same register
2054 already_moved
[m1
->regno
] = 1;
2056 /* The reg merged here is now invariant,
2057 if the reg it matches is invariant. */
2059 n_times_set
[m1
->regno
] = 0;
2062 else if (loop_dump_stream
)
2063 fprintf (loop_dump_stream
, "not desirable");
2065 else if (loop_dump_stream
&& !m
->match
)
2066 fprintf (loop_dump_stream
, "not safe");
2068 if (loop_dump_stream
)
2069 fprintf (loop_dump_stream
, "\n");
2073 new_start
= loop_start
;
2075 /* Go through all the instructions in the loop, making
2076 all the register substitutions scheduled in REG_MAP. */
2077 for (p
= new_start
; p
!= end
; p
= NEXT_INSN (p
))
2078 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
2079 || GET_CODE (p
) == CALL_INSN
)
2081 replace_regs (PATTERN (p
), reg_map
, nregs
, 0);
2082 replace_regs (REG_NOTES (p
), reg_map
, nregs
, 0);
2088 /* Scan X and replace the address of any MEM in it with ADDR.
2089 REG is the address that MEM should have before the replacement. */
2092 replace_call_address (x
, reg
, addr
)
2095 register enum rtx_code code
;
2101 code
= GET_CODE (x
);
2115 /* Short cut for very common case. */
2116 replace_call_address (XEXP (x
, 1), reg
, addr
);
2120 /* Short cut for very common case. */
2121 replace_call_address (XEXP (x
, 0), reg
, addr
);
2125 /* If this MEM uses a reg other than the one we expected,
2126 something is wrong. */
2127 if (XEXP (x
, 0) != reg
)
2136 fmt
= GET_RTX_FORMAT (code
);
2137 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2140 replace_call_address (XEXP (x
, i
), reg
, addr
);
2144 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2145 replace_call_address (XVECEXP (x
, i
, j
), reg
, addr
);
2151 /* Return the number of memory refs to addresses that vary
2155 count_nonfixed_reads (x
)
2158 register enum rtx_code code
;
2166 code
= GET_CODE (x
);
2180 return ((invariant_p (XEXP (x
, 0)) != 1)
2181 + count_nonfixed_reads (XEXP (x
, 0)));
2188 fmt
= GET_RTX_FORMAT (code
);
2189 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2192 value
+= count_nonfixed_reads (XEXP (x
, i
));
2196 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2197 value
+= count_nonfixed_reads (XVECEXP (x
, i
, j
));
2205 /* P is an instruction that sets a register to the result of a ZERO_EXTEND.
2206 Replace it with an instruction to load just the low bytes
2207 if the machine supports such an instruction,
2208 and insert above LOOP_START an instruction to clear the register. */
2211 constant_high_bytes (p
, loop_start
)
2215 register int insn_code_number
;
2217 /* Try to change (SET (REG ...) (ZERO_EXTEND (..:B ...)))
2218 to (SET (STRICT_LOW_PART (SUBREG:B (REG...))) ...). */
2220 new = gen_rtx (SET
, VOIDmode
,
2221 gen_rtx (STRICT_LOW_PART
, VOIDmode
,
2222 gen_rtx (SUBREG
, GET_MODE (XEXP (SET_SRC (PATTERN (p
)), 0)),
2223 SET_DEST (PATTERN (p
)),
2225 XEXP (SET_SRC (PATTERN (p
)), 0));
2226 insn_code_number
= recog (new, p
);
2228 if (insn_code_number
)
2232 /* Clear destination register before the loop. */
2233 emit_insn_before (gen_rtx (SET
, VOIDmode
,
2234 SET_DEST (PATTERN (p
)),
2238 /* Inside the loop, just load the low part. */
2244 /* Scan a loop setting the variables `unknown_address_altered',
2245 `num_mem_sets', `loop_continue', loops_enclosed', `loop_has_call',
2246 and `loop_has_volatile'.
2247 Also, fill in the array `loop_store_mems'. */
2250 prescan_loop (start
, end
)
2253 register int level
= 1;
2256 unknown_address_altered
= 0;
2258 loop_has_volatile
= 0;
2259 loop_store_mems_idx
= 0;
2265 for (insn
= NEXT_INSN (start
); insn
!= NEXT_INSN (end
);
2266 insn
= NEXT_INSN (insn
))
2268 if (GET_CODE (insn
) == NOTE
)
2270 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
2273 /* Count number of loops contained in this one. */
2276 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
2285 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_CONT
)
2288 loop_continue
= insn
;
2291 else if (GET_CODE (insn
) == CALL_INSN
)
2293 if (! CONST_CALL_P (insn
))
2294 unknown_address_altered
= 1;
2299 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2301 if (volatile_refs_p (PATTERN (insn
)))
2302 loop_has_volatile
= 1;
2304 note_stores (PATTERN (insn
), note_addr_stored
);
2310 /* Scan the function looking for loops. Record the start and end of each loop.
2311 Also mark as invalid loops any loops that contain a setjmp or are branched
2312 to from outside the loop. */
2315 find_and_verify_loops (f
)
2319 int current_loop
= -1;
2323 /* If there are jumps to undefined labels,
2324 treat them as jumps out of any/all loops.
2325 This also avoids writing past end of tables when there are no loops. */
2326 uid_loop_num
[0] = -1;
2328 /* Find boundaries of loops, mark which loops are contained within
2329 loops, and invalidate loops that have setjmp. */
2331 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2333 if (GET_CODE (insn
) == NOTE
)
2334 switch (NOTE_LINE_NUMBER (insn
))
2336 case NOTE_INSN_LOOP_BEG
:
2337 loop_number_loop_starts
[++next_loop
] = insn
;
2338 loop_number_loop_ends
[next_loop
] = 0;
2339 loop_outer_loop
[next_loop
] = current_loop
;
2340 loop_invalid
[next_loop
] = 0;
2341 loop_number_exit_labels
[next_loop
] = 0;
2342 loop_number_exit_count
[next_loop
] = 0;
2343 current_loop
= next_loop
;
2346 case NOTE_INSN_SETJMP
:
2347 /* In this case, we must invalidate our current loop and any
2349 for (loop
= current_loop
; loop
!= -1; loop
= loop_outer_loop
[loop
])
2351 loop_invalid
[loop
] = 1;
2352 if (loop_dump_stream
)
2353 fprintf (loop_dump_stream
,
2354 "\nLoop at %d ignored due to setjmp.\n",
2355 INSN_UID (loop_number_loop_starts
[loop
]));
2359 case NOTE_INSN_LOOP_END
:
2360 if (current_loop
== -1)
2363 loop_number_loop_ends
[current_loop
] = insn
;
2364 current_loop
= loop_outer_loop
[current_loop
];
2371 /* Note that this will mark the NOTE_INSN_LOOP_END note as being in the
2372 enclosing loop, but this doesn't matter. */
2373 uid_loop_num
[INSN_UID (insn
)] = current_loop
;
2376 /* Any loop containing a label used in an initializer must be invalidated,
2377 because it can be jumped into from anywhere. */
2379 for (label
= forced_labels
; label
; label
= XEXP (label
, 1))
2383 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2385 loop_num
= loop_outer_loop
[loop_num
])
2386 loop_invalid
[loop_num
] = 1;
2389 /* Any loop containing a label used for an exception handler must be
2390 invalidated, because it can be jumped into from anywhere. */
2392 for (label
= exception_handler_labels
; label
; label
= XEXP (label
, 1))
2396 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (label
, 0))];
2398 loop_num
= loop_outer_loop
[loop_num
])
2399 loop_invalid
[loop_num
] = 1;
2402 /* Now scan all insn's in the function. If any JUMP_INSN branches into a
2403 loop that it is not contained within, that loop is marked invalid.
2404 If any INSN or CALL_INSN uses a label's address, then the loop containing
2405 that label is marked invalid, because it could be jumped into from
2408 Also look for blocks of code ending in an unconditional branch that
2409 exits the loop. If such a block is surrounded by a conditional
2410 branch around the block, move the block elsewhere (see below) and
2411 invert the jump to point to the code block. This may eliminate a
2412 label in our loop and will simplify processing by both us and a
2413 possible second cse pass. */
2415 for (insn
= f
; insn
; insn
= NEXT_INSN (insn
))
2416 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
2418 int this_loop_num
= uid_loop_num
[INSN_UID (insn
)];
2420 if (GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
)
2422 rtx note
= find_reg_note (insn
, REG_LABEL
, NULL_RTX
);
2427 for (loop_num
= uid_loop_num
[INSN_UID (XEXP (note
, 0))];
2429 loop_num
= loop_outer_loop
[loop_num
])
2430 loop_invalid
[loop_num
] = 1;
2434 if (GET_CODE (insn
) != JUMP_INSN
)
2437 mark_loop_jump (PATTERN (insn
), this_loop_num
);
2439 /* See if this is an unconditional branch outside the loop. */
2440 if (this_loop_num
!= -1
2441 && (GET_CODE (PATTERN (insn
)) == RETURN
2442 || (simplejump_p (insn
)
2443 && (uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))]
2445 && get_max_uid () < max_uid_for_loop
)
2448 rtx our_next
= next_real_insn (insn
);
2450 int outer_loop
= -1;
2452 /* Go backwards until we reach the start of the loop, a label,
2454 for (p
= PREV_INSN (insn
);
2455 GET_CODE (p
) != CODE_LABEL
2456 && ! (GET_CODE (p
) == NOTE
2457 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
2458 && GET_CODE (p
) != JUMP_INSN
;
2462 /* Check for the case where we have a jump to an inner nested
2463 loop, and do not perform the optimization in that case. */
2465 if (JUMP_LABEL (insn
))
2467 dest_loop
= uid_loop_num
[INSN_UID (JUMP_LABEL (insn
))];
2468 if (dest_loop
!= -1)
2470 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2471 outer_loop
= loop_outer_loop
[outer_loop
])
2472 if (outer_loop
== this_loop_num
)
2477 /* Make sure that the target of P is within the current loop. */
2479 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
2480 && uid_loop_num
[INSN_UID (JUMP_LABEL (p
))] != this_loop_num
)
2481 outer_loop
= this_loop_num
;
2483 /* If we stopped on a JUMP_INSN to the next insn after INSN,
2484 we have a block of code to try to move.
2486 We look backward and then forward from the target of INSN
2487 to find a BARRIER at the same loop depth as the target.
2488 If we find such a BARRIER, we make a new label for the start
2489 of the block, invert the jump in P and point it to that label,
2490 and move the block of code to the spot we found. */
2492 if (outer_loop
== -1
2493 && GET_CODE (p
) == JUMP_INSN
2494 && JUMP_LABEL (p
) != 0
2495 /* Just ignore jumps to labels that were never emitted.
2496 These always indicate compilation errors. */
2497 && INSN_UID (JUMP_LABEL (p
)) != 0
2499 && ! simplejump_p (p
)
2500 && next_real_insn (JUMP_LABEL (p
)) == our_next
)
2503 = JUMP_LABEL (insn
) ? JUMP_LABEL (insn
) : get_last_insn ();
2504 int target_loop_num
= uid_loop_num
[INSN_UID (target
)];
2507 for (loc
= target
; loc
; loc
= PREV_INSN (loc
))
2508 if (GET_CODE (loc
) == BARRIER
2509 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2513 for (loc
= target
; loc
; loc
= NEXT_INSN (loc
))
2514 if (GET_CODE (loc
) == BARRIER
2515 && uid_loop_num
[INSN_UID (loc
)] == target_loop_num
)
2520 rtx cond_label
= JUMP_LABEL (p
);
2521 rtx new_label
= get_label_after (p
);
2523 /* Ensure our label doesn't go away. */
2524 LABEL_NUSES (cond_label
)++;
2526 /* Verify that uid_loop_num is large enough and that
2528 if (invert_jump (p
, new_label
))
2532 /* Include the BARRIER after INSN and copy the
2534 new_label
= squeeze_notes (new_label
, NEXT_INSN (insn
));
2535 reorder_insns (new_label
, NEXT_INSN (insn
), loc
);
2537 /* All those insns are now in TARGET_LOOP_NUM. */
2538 for (q
= new_label
; q
!= NEXT_INSN (NEXT_INSN (insn
));
2540 uid_loop_num
[INSN_UID (q
)] = target_loop_num
;
2542 /* The label jumped to by INSN is no longer a loop exit.
2543 Unless INSN does not have a label (e.g., it is a
2544 RETURN insn), search loop_number_exit_labels to find
2545 its label_ref, and remove it. Also turn off
2546 LABEL_OUTSIDE_LOOP_P bit. */
2547 if (JUMP_LABEL (insn
))
2552 r
= loop_number_exit_labels
[this_loop_num
];
2553 r
; q
= r
, r
= LABEL_NEXTREF (r
))
2554 if (XEXP (r
, 0) == JUMP_LABEL (insn
))
2556 LABEL_OUTSIDE_LOOP_P (r
) = 0;
2558 LABEL_NEXTREF (q
) = LABEL_NEXTREF (r
);
2560 loop_number_exit_labels
[this_loop_num
]
2561 = LABEL_NEXTREF (r
);
2565 for (loop_num
= this_loop_num
;
2566 loop_num
!= -1 && loop_num
!= target_loop_num
;
2567 loop_num
= loop_outer_loop
[loop_num
])
2568 loop_number_exit_count
[loop_num
]--;
2570 /* If we didn't find it, then something is wrong. */
2575 /* P is now a jump outside the loop, so it must be put
2576 in loop_number_exit_labels, and marked as such.
2577 The easiest way to do this is to just call
2578 mark_loop_jump again for P. */
2579 mark_loop_jump (PATTERN (p
), this_loop_num
);
2581 /* If INSN now jumps to the insn after it,
2583 if (JUMP_LABEL (insn
) != 0
2584 && (next_real_insn (JUMP_LABEL (insn
))
2585 == next_real_insn (insn
)))
2589 /* Continue the loop after where the conditional
2590 branch used to jump, since the only branch insn
2591 in the block (if it still remains) is an inter-loop
2592 branch and hence needs no processing. */
2593 insn
= NEXT_INSN (cond_label
);
2595 if (--LABEL_NUSES (cond_label
) == 0)
2596 delete_insn (cond_label
);
2598 /* This loop will be continued with NEXT_INSN (insn). */
2599 insn
= PREV_INSN (insn
);
2606 /* If any label in X jumps to a loop different from LOOP_NUM and any of the
2607 loops it is contained in, mark the target loop invalid.
2609 For speed, we assume that X is part of a pattern of a JUMP_INSN. */
2612 mark_loop_jump (x
, loop_num
)
2620 switch (GET_CODE (x
))
2633 /* There could be a label reference in here. */
2634 mark_loop_jump (XEXP (x
, 0), loop_num
);
2640 mark_loop_jump (XEXP (x
, 0), loop_num
);
2641 mark_loop_jump (XEXP (x
, 1), loop_num
);
2646 mark_loop_jump (XEXP (x
, 0), loop_num
);
2650 dest_loop
= uid_loop_num
[INSN_UID (XEXP (x
, 0))];
2652 /* Link together all labels that branch outside the loop. This
2653 is used by final_[bg]iv_value and the loop unrolling code. Also
2654 mark this LABEL_REF so we know that this branch should predict
2657 /* A check to make sure the label is not in an inner nested loop,
2658 since this does not count as a loop exit. */
2659 if (dest_loop
!= -1)
2661 for (outer_loop
= dest_loop
; outer_loop
!= -1;
2662 outer_loop
= loop_outer_loop
[outer_loop
])
2663 if (outer_loop
== loop_num
)
2669 if (loop_num
!= -1 && outer_loop
== -1)
2671 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2672 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2673 loop_number_exit_labels
[loop_num
] = x
;
2675 for (outer_loop
= loop_num
;
2676 outer_loop
!= -1 && outer_loop
!= dest_loop
;
2677 outer_loop
= loop_outer_loop
[outer_loop
])
2678 loop_number_exit_count
[outer_loop
]++;
2681 /* If this is inside a loop, but not in the current loop or one enclosed
2682 by it, it invalidates at least one loop. */
2684 if (dest_loop
== -1)
2687 /* We must invalidate every nested loop containing the target of this
2688 label, except those that also contain the jump insn. */
2690 for (; dest_loop
!= -1; dest_loop
= loop_outer_loop
[dest_loop
])
2692 /* Stop when we reach a loop that also contains the jump insn. */
2693 for (outer_loop
= loop_num
; outer_loop
!= -1;
2694 outer_loop
= loop_outer_loop
[outer_loop
])
2695 if (dest_loop
== outer_loop
)
2698 /* If we get here, we know we need to invalidate a loop. */
2699 if (loop_dump_stream
&& ! loop_invalid
[dest_loop
])
2700 fprintf (loop_dump_stream
,
2701 "\nLoop at %d ignored due to multiple entry points.\n",
2702 INSN_UID (loop_number_loop_starts
[dest_loop
]));
2704 loop_invalid
[dest_loop
] = 1;
2709 /* If this is not setting pc, ignore. */
2710 if (SET_DEST (x
) == pc_rtx
)
2711 mark_loop_jump (SET_SRC (x
), loop_num
);
2715 mark_loop_jump (XEXP (x
, 1), loop_num
);
2716 mark_loop_jump (XEXP (x
, 2), loop_num
);
2721 for (i
= 0; i
< XVECLEN (x
, 0); i
++)
2722 mark_loop_jump (XVECEXP (x
, 0, i
), loop_num
);
2726 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
2727 mark_loop_jump (XVECEXP (x
, 1, i
), loop_num
);
2731 /* Treat anything else (such as a symbol_ref)
2732 as a branch out of this loop, but not into any loop. */
2737 LABEL_OUTSIDE_LOOP_P (x
) = 1;
2738 LABEL_NEXTREF (x
) = loop_number_exit_labels
[loop_num
];
2741 loop_number_exit_labels
[loop_num
] = x
;
2743 for (outer_loop
= loop_num
; outer_loop
!= -1;
2744 outer_loop
= loop_outer_loop
[outer_loop
])
2745 loop_number_exit_count
[outer_loop
]++;
2751 /* Return nonzero if there is a label in the range from
2752 insn INSN to and including the insn whose luid is END
2753 INSN must have an assigned luid (i.e., it must not have
2754 been previously created by loop.c). */
2757 labels_in_range_p (insn
, end
)
2761 while (insn
&& INSN_LUID (insn
) <= end
)
2763 if (GET_CODE (insn
) == CODE_LABEL
)
2765 insn
= NEXT_INSN (insn
);
2771 /* Record that a memory reference X is being set. */
2774 note_addr_stored (x
)
2779 if (x
== 0 || GET_CODE (x
) != MEM
)
2782 /* Count number of memory writes.
2783 This affects heuristics in strength_reduce. */
2786 /* BLKmode MEM means all memory is clobbered. */
2787 if (GET_MODE (x
) == BLKmode
)
2788 unknown_address_altered
= 1;
2790 if (unknown_address_altered
)
2793 for (i
= 0; i
< loop_store_mems_idx
; i
++)
2794 if (rtx_equal_p (XEXP (loop_store_mems
[i
], 0), XEXP (x
, 0))
2795 && MEM_IN_STRUCT_P (x
) == MEM_IN_STRUCT_P (loop_store_mems
[i
]))
2797 /* We are storing at the same address as previously noted. Save the
2799 if (GET_MODE_SIZE (GET_MODE (x
))
2800 > GET_MODE_SIZE (GET_MODE (loop_store_mems
[i
])))
2801 loop_store_mems
[i
] = x
;
2805 if (i
== NUM_STORES
)
2806 unknown_address_altered
= 1;
2808 else if (i
== loop_store_mems_idx
)
2809 loop_store_mems
[loop_store_mems_idx
++] = x
;
2812 /* Return nonzero if the rtx X is invariant over the current loop.
2814 The value is 2 if we refer to something only conditionally invariant.
2816 If `unknown_address_altered' is nonzero, no memory ref is invariant.
2817 Otherwise, a memory ref is invariant if it does not conflict with
2818 anything stored in `loop_store_mems'. */
2825 register enum rtx_code code
;
2827 int conditional
= 0;
2831 code
= GET_CODE (x
);
2841 /* A LABEL_REF is normally invariant, however, if we are unrolling
2842 loops, and this label is inside the loop, then it isn't invariant.
2843 This is because each unrolled copy of the loop body will have
2844 a copy of this label. If this was invariant, then an insn loading
2845 the address of this label into a register might get moved outside
2846 the loop, and then each loop body would end up using the same label.
2848 We don't know the loop bounds here though, so just fail for all
2850 if (flag_unroll_loops
)
2857 case UNSPEC_VOLATILE
:
2861 /* We used to check RTX_UNCHANGING_P (x) here, but that is invalid
2862 since the reg might be set by initialization within the loop. */
2864 if ((x
== frame_pointer_rtx
|| x
== hard_frame_pointer_rtx
2865 || x
== arg_pointer_rtx
)
2866 && ! current_function_has_nonlocal_goto
)
2870 && REGNO (x
) < FIRST_PSEUDO_REGISTER
&& call_used_regs
[REGNO (x
)])
2873 if (n_times_set
[REGNO (x
)] < 0)
2876 return n_times_set
[REGNO (x
)] == 0;
2879 /* Volatile memory references must be rejected. Do this before
2880 checking for read-only items, so that volatile read-only items
2881 will be rejected also. */
2882 if (MEM_VOLATILE_P (x
))
2885 /* Read-only items (such as constants in a constant pool) are
2886 invariant if their address is. */
2887 if (RTX_UNCHANGING_P (x
))
2890 /* If we filled the table (or had a subroutine call), any location
2891 in memory could have been clobbered. */
2892 if (unknown_address_altered
)
2895 /* See if there is any dependence between a store and this load. */
2896 for (i
= loop_store_mems_idx
- 1; i
>= 0; i
--)
2897 if (true_dependence (loop_store_mems
[i
], VOIDmode
, x
, rtx_varies_p
))
2900 /* It's not invalidated by a store in memory
2901 but we must still verify the address is invariant. */
2905 /* Don't mess with insns declared volatile. */
2906 if (MEM_VOLATILE_P (x
))
2914 fmt
= GET_RTX_FORMAT (code
);
2915 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2919 int tem
= invariant_p (XEXP (x
, i
));
2925 else if (fmt
[i
] == 'E')
2928 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2930 int tem
= invariant_p (XVECEXP (x
, i
, j
));
2940 return 1 + conditional
;
2944 /* Return nonzero if all the insns in the loop that set REG
2945 are INSN and the immediately following insns,
2946 and if each of those insns sets REG in an invariant way
2947 (not counting uses of REG in them).
2949 The value is 2 if some of these insns are only conditionally invariant.
2951 We assume that INSN itself is the first set of REG
2952 and that its source is invariant. */
2955 consec_sets_invariant_p (reg
, n_sets
, insn
)
2959 register rtx p
= insn
;
2960 register int regno
= REGNO (reg
);
2962 /* Number of sets we have to insist on finding after INSN. */
2963 int count
= n_sets
- 1;
2964 int old
= n_times_set
[regno
];
2968 /* If N_SETS hit the limit, we can't rely on its value. */
2972 n_times_set
[regno
] = 0;
2976 register enum rtx_code code
;
2980 code
= GET_CODE (p
);
2982 /* If library call, skip to end of of it. */
2983 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
2988 && (set
= single_set (p
))
2989 && GET_CODE (SET_DEST (set
)) == REG
2990 && REGNO (SET_DEST (set
)) == regno
)
2992 this = invariant_p (SET_SRC (set
));
2995 else if (temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
2997 /* If this is a libcall, then any invariant REG_EQUAL note is OK.
2998 If this is an ordinary insn, then only CONSTANT_P REG_EQUAL
3000 this = (CONSTANT_P (XEXP (temp
, 0))
3001 || (find_reg_note (p
, REG_RETVAL
, NULL_RTX
)
3002 && invariant_p (XEXP (temp
, 0))));
3009 else if (code
!= NOTE
)
3011 n_times_set
[regno
] = old
;
3016 n_times_set
[regno
] = old
;
3017 /* If invariant_p ever returned 2, we return 2. */
3018 return 1 + (value
& 2);
3022 /* I don't think this condition is sufficient to allow INSN
3023 to be moved, so we no longer test it. */
3025 /* Return 1 if all insns in the basic block of INSN and following INSN
3026 that set REG are invariant according to TABLE. */
3029 all_sets_invariant_p (reg
, insn
, table
)
3033 register rtx p
= insn
;
3034 register int regno
= REGNO (reg
);
3038 register enum rtx_code code
;
3040 code
= GET_CODE (p
);
3041 if (code
== CODE_LABEL
|| code
== JUMP_INSN
)
3043 if (code
== INSN
&& GET_CODE (PATTERN (p
)) == SET
3044 && GET_CODE (SET_DEST (PATTERN (p
))) == REG
3045 && REGNO (SET_DEST (PATTERN (p
))) == regno
)
3047 if (!invariant_p (SET_SRC (PATTERN (p
)), table
))
3054 /* Look at all uses (not sets) of registers in X. For each, if it is
3055 the single use, set USAGE[REGNO] to INSN; if there was a previous use in
3056 a different insn, set USAGE[REGNO] to const0_rtx. */
3059 find_single_use_in_loop (insn
, x
, usage
)
3064 enum rtx_code code
= GET_CODE (x
);
3065 char *fmt
= GET_RTX_FORMAT (code
);
3070 = (usage
[REGNO (x
)] != 0 && usage
[REGNO (x
)] != insn
)
3071 ? const0_rtx
: insn
;
3073 else if (code
== SET
)
3075 /* Don't count SET_DEST if it is a REG; otherwise count things
3076 in SET_DEST because if a register is partially modified, it won't
3077 show up as a potential movable so we don't care how USAGE is set
3079 if (GET_CODE (SET_DEST (x
)) != REG
)
3080 find_single_use_in_loop (insn
, SET_DEST (x
), usage
);
3081 find_single_use_in_loop (insn
, SET_SRC (x
), usage
);
3084 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3086 if (fmt
[i
] == 'e' && XEXP (x
, i
) != 0)
3087 find_single_use_in_loop (insn
, XEXP (x
, i
), usage
);
3088 else if (fmt
[i
] == 'E')
3089 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3090 find_single_use_in_loop (insn
, XVECEXP (x
, i
, j
), usage
);
3094 /* Increment N_TIMES_SET at the index of each register
3095 that is modified by an insn between FROM and TO.
3096 If the value of an element of N_TIMES_SET becomes 127 or more,
3097 stop incrementing it, to avoid overflow.
3099 Store in SINGLE_USAGE[I] the single insn in which register I is
3100 used, if it is only used once. Otherwise, it is set to 0 (for no
3101 uses) or const0_rtx for more than one use. This parameter may be zero,
3102 in which case this processing is not done.
3104 Store in *COUNT_PTR the number of actual instruction
3105 in the loop. We use this to decide what is worth moving out. */
3107 /* last_set[n] is nonzero iff reg n has been set in the current basic block.
3108 In that case, it is the insn that last set reg n. */
3111 count_loop_regs_set (from
, to
, may_not_move
, single_usage
, count_ptr
, nregs
)
3112 register rtx from
, to
;
3118 register rtx
*last_set
= (rtx
*) alloca (nregs
* sizeof (rtx
));
3120 register int count
= 0;
3123 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3124 for (insn
= from
; insn
!= to
; insn
= NEXT_INSN (insn
))
3126 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
3130 /* If requested, record registers that have exactly one use. */
3133 find_single_use_in_loop (insn
, PATTERN (insn
), single_usage
);
3135 /* Include uses in REG_EQUAL notes. */
3136 if (REG_NOTES (insn
))
3137 find_single_use_in_loop (insn
, REG_NOTES (insn
), single_usage
);
3140 if (GET_CODE (PATTERN (insn
)) == CLOBBER
3141 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
3142 /* Don't move a reg that has an explicit clobber.
3143 We might do so sometimes, but it's not worth the pain. */
3144 may_not_move
[REGNO (XEXP (PATTERN (insn
), 0))] = 1;
3146 if (GET_CODE (PATTERN (insn
)) == SET
3147 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3149 dest
= SET_DEST (PATTERN (insn
));
3150 while (GET_CODE (dest
) == SUBREG
3151 || GET_CODE (dest
) == ZERO_EXTRACT
3152 || GET_CODE (dest
) == SIGN_EXTRACT
3153 || GET_CODE (dest
) == STRICT_LOW_PART
)
3154 dest
= XEXP (dest
, 0);
3155 if (GET_CODE (dest
) == REG
)
3157 register int regno
= REGNO (dest
);
3158 /* If this is the first setting of this reg
3159 in current basic block, and it was set before,
3160 it must be set in two basic blocks, so it cannot
3161 be moved out of the loop. */
3162 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3163 may_not_move
[regno
] = 1;
3164 /* If this is not first setting in current basic block,
3165 see if reg was used in between previous one and this.
3166 If so, neither one can be moved. */
3167 if (last_set
[regno
] != 0
3168 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3169 may_not_move
[regno
] = 1;
3170 if (n_times_set
[regno
] < 127)
3171 ++n_times_set
[regno
];
3172 last_set
[regno
] = insn
;
3175 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3178 for (i
= XVECLEN (PATTERN (insn
), 0) - 1; i
>= 0; i
--)
3180 register rtx x
= XVECEXP (PATTERN (insn
), 0, i
);
3181 if (GET_CODE (x
) == CLOBBER
&& GET_CODE (XEXP (x
, 0)) == REG
)
3182 /* Don't move a reg that has an explicit clobber.
3183 It's not worth the pain to try to do it correctly. */
3184 may_not_move
[REGNO (XEXP (x
, 0))] = 1;
3186 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
3188 dest
= SET_DEST (x
);
3189 while (GET_CODE (dest
) == SUBREG
3190 || GET_CODE (dest
) == ZERO_EXTRACT
3191 || GET_CODE (dest
) == SIGN_EXTRACT
3192 || GET_CODE (dest
) == STRICT_LOW_PART
)
3193 dest
= XEXP (dest
, 0);
3194 if (GET_CODE (dest
) == REG
)
3196 register int regno
= REGNO (dest
);
3197 if (n_times_set
[regno
] > 0 && last_set
[regno
] == 0)
3198 may_not_move
[regno
] = 1;
3199 if (last_set
[regno
] != 0
3200 && reg_used_between_p (dest
, last_set
[regno
], insn
))
3201 may_not_move
[regno
] = 1;
3202 if (n_times_set
[regno
] < 127)
3203 ++n_times_set
[regno
];
3204 last_set
[regno
] = insn
;
3211 if (GET_CODE (insn
) == CODE_LABEL
|| GET_CODE (insn
) == JUMP_INSN
)
3212 bzero ((char *) last_set
, nregs
* sizeof (rtx
));
3217 /* Given a loop that is bounded by LOOP_START and LOOP_END
3218 and that is entered at SCAN_START,
3219 return 1 if the register set in SET contained in insn INSN is used by
3220 any insn that precedes INSN in cyclic order starting
3221 from the loop entry point.
3223 We don't want to use INSN_LUID here because if we restrict INSN to those
3224 that have a valid INSN_LUID, it means we cannot move an invariant out
3225 from an inner loop past two loops. */
3228 loop_reg_used_before_p (set
, insn
, loop_start
, scan_start
, loop_end
)
3229 rtx set
, insn
, loop_start
, scan_start
, loop_end
;
3231 rtx reg
= SET_DEST (set
);
3234 /* Scan forward checking for register usage. If we hit INSN, we
3235 are done. Otherwise, if we hit LOOP_END, wrap around to LOOP_START. */
3236 for (p
= scan_start
; p
!= insn
; p
= NEXT_INSN (p
))
3238 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i'
3239 && reg_overlap_mentioned_p (reg
, PATTERN (p
)))
3249 /* A "basic induction variable" or biv is a pseudo reg that is set
3250 (within this loop) only by incrementing or decrementing it. */
3251 /* A "general induction variable" or giv is a pseudo reg whose
3252 value is a linear function of a biv. */
3254 /* Bivs are recognized by `basic_induction_var';
3255 Givs by `general_induct_var'. */
3257 /* Indexed by register number, indicates whether or not register is an
3258 induction variable, and if so what type. */
3260 enum iv_mode
*reg_iv_type
;
3262 /* Indexed by register number, contains pointer to `struct induction'
3263 if register is an induction variable. This holds general info for
3264 all induction variables. */
3266 struct induction
**reg_iv_info
;
3268 /* Indexed by register number, contains pointer to `struct iv_class'
3269 if register is a basic induction variable. This holds info describing
3270 the class (a related group) of induction variables that the biv belongs
3273 struct iv_class
**reg_biv_class
;
3275 /* The head of a list which links together (via the next field)
3276 every iv class for the current loop. */
3278 struct iv_class
*loop_iv_list
;
3280 /* Communication with routines called via `note_stores'. */
3282 static rtx note_insn
;
3284 /* Dummy register to have non-zero DEST_REG for DEST_ADDR type givs. */
3286 static rtx addr_placeholder
;
3288 /* ??? Unfinished optimizations, and possible future optimizations,
3289 for the strength reduction code. */
3291 /* ??? There is one more optimization you might be interested in doing: to
3292 allocate pseudo registers for frequently-accessed memory locations.
3293 If the same memory location is referenced each time around, it might
3294 be possible to copy it into a register before and out after.
3295 This is especially useful when the memory location is a variable which
3296 is in a stack slot because somewhere its address is taken. If the
3297 loop doesn't contain a function call and the variable isn't volatile,
3298 it is safe to keep the value in a register for the duration of the
3299 loop. One tricky thing is that the copying of the value back from the
3300 register has to be done on all exits from the loop. You need to check that
3301 all the exits from the loop go to the same place. */
3303 /* ??? The interaction of biv elimination, and recognition of 'constant'
3304 bivs, may cause problems. */
3306 /* ??? Add heuristics so that DEST_ADDR strength reduction does not cause
3307 performance problems.
3309 Perhaps don't eliminate things that can be combined with an addressing
3310 mode. Find all givs that have the same biv, mult_val, and add_val;
3311 then for each giv, check to see if its only use dies in a following
3312 memory address. If so, generate a new memory address and check to see
3313 if it is valid. If it is valid, then store the modified memory address,
3314 otherwise, mark the giv as not done so that it will get its own iv. */
3316 /* ??? Could try to optimize branches when it is known that a biv is always
3319 /* ??? When replace a biv in a compare insn, we should replace with closest
3320 giv so that an optimized branch can still be recognized by the combiner,
3321 e.g. the VAX acb insn. */
3323 /* ??? Many of the checks involving uid_luid could be simplified if regscan
3324 was rerun in loop_optimize whenever a register was added or moved.
3325 Also, some of the optimizations could be a little less conservative. */
3327 /* Perform strength reduction and induction variable elimination. */
3329 /* Pseudo registers created during this function will be beyond the last
3330 valid index in several tables including n_times_set and regno_last_uid.
3331 This does not cause a problem here, because the added registers cannot be
3332 givs outside of their loop, and hence will never be reconsidered.
3333 But scan_loop must check regnos to make sure they are in bounds. */
3336 strength_reduce (scan_start
, end
, loop_top
, insn_count
,
3337 loop_start
, loop_end
)
3350 /* This is 1 if current insn is not executed at least once for every loop
3352 int not_every_iteration
= 0;
3353 /* This is 1 if current insn may be executed more than once for every
3355 int maybe_multiple
= 0;
3356 /* Temporary list pointers for traversing loop_iv_list. */
3357 struct iv_class
*bl
, **backbl
;
3358 /* Ratio of extra register life span we can justify
3359 for saving an instruction. More if loop doesn't call subroutines
3360 since in that case saving an insn makes more difference
3361 and more registers are available. */
3362 /* ??? could set this to last value of threshold in move_movables */
3363 int threshold
= (loop_has_call
? 1 : 2) * (3 + n_non_fixed_regs
);
3364 /* Map of pseudo-register replacements. */
3368 rtx end_insert_before
;
3371 reg_iv_type
= (enum iv_mode
*) alloca (max_reg_before_loop
3372 * sizeof (enum iv_mode
*));
3373 bzero ((char *) reg_iv_type
, max_reg_before_loop
* sizeof (enum iv_mode
*));
3374 reg_iv_info
= (struct induction
**)
3375 alloca (max_reg_before_loop
* sizeof (struct induction
*));
3376 bzero ((char *) reg_iv_info
, (max_reg_before_loop
3377 * sizeof (struct induction
*)));
3378 reg_biv_class
= (struct iv_class
**)
3379 alloca (max_reg_before_loop
* sizeof (struct iv_class
*));
3380 bzero ((char *) reg_biv_class
, (max_reg_before_loop
3381 * sizeof (struct iv_class
*)));
3384 addr_placeholder
= gen_reg_rtx (Pmode
);
3386 /* Save insn immediately after the loop_end. Insns inserted after loop_end
3387 must be put before this insn, so that they will appear in the right
3388 order (i.e. loop order).
3390 If loop_end is the end of the current function, then emit a
3391 NOTE_INSN_DELETED after loop_end and set end_insert_before to the
3393 if (NEXT_INSN (loop_end
) != 0)
3394 end_insert_before
= NEXT_INSN (loop_end
);
3396 end_insert_before
= emit_note_after (NOTE_INSN_DELETED
, loop_end
);
3398 /* Scan through loop to find all possible bivs. */
3404 /* At end of a straight-in loop, we are done.
3405 At end of a loop entered at the bottom, scan the top. */
3406 if (p
== scan_start
)
3414 if (p
== scan_start
)
3418 if (GET_CODE (p
) == INSN
3419 && (set
= single_set (p
))
3420 && GET_CODE (SET_DEST (set
)) == REG
)
3422 dest_reg
= SET_DEST (set
);
3423 if (REGNO (dest_reg
) < max_reg_before_loop
3424 && REGNO (dest_reg
) >= FIRST_PSEUDO_REGISTER
3425 && reg_iv_type
[REGNO (dest_reg
)] != NOT_BASIC_INDUCT
)
3427 if (basic_induction_var (SET_SRC (set
), GET_MODE (SET_SRC (set
)),
3428 dest_reg
, p
, &inc_val
, &mult_val
))
3430 /* It is a possible basic induction variable.
3431 Create and initialize an induction structure for it. */
3434 = (struct induction
*) alloca (sizeof (struct induction
));
3436 record_biv (v
, p
, dest_reg
, inc_val
, mult_val
,
3437 not_every_iteration
, maybe_multiple
);
3438 reg_iv_type
[REGNO (dest_reg
)] = BASIC_INDUCT
;
3440 else if (REGNO (dest_reg
) < max_reg_before_loop
)
3441 reg_iv_type
[REGNO (dest_reg
)] = NOT_BASIC_INDUCT
;
3445 /* Past CODE_LABEL, we get to insns that may be executed multiple
3446 times. The only way we can be sure that they can't is if every
3447 every jump insn between here and the end of the loop either
3448 returns, exits the loop, is a forward jump, or is a jump
3449 to the loop start. */
3451 if (GET_CODE (p
) == CODE_LABEL
)
3459 insn
= NEXT_INSN (insn
);
3460 if (insn
== scan_start
)
3468 if (insn
== scan_start
)
3472 if (GET_CODE (insn
) == JUMP_INSN
3473 && GET_CODE (PATTERN (insn
)) != RETURN
3474 && (! condjump_p (insn
)
3475 || (JUMP_LABEL (insn
) != 0
3476 && JUMP_LABEL (insn
) != scan_start
3477 && (INSN_UID (JUMP_LABEL (insn
)) >= max_uid_for_loop
3478 || INSN_UID (insn
) >= max_uid_for_loop
3479 || (INSN_LUID (JUMP_LABEL (insn
))
3480 < INSN_LUID (insn
))))))
3488 /* Past a jump, we get to insns for which we can't count
3489 on whether they will be executed during each iteration. */
3490 /* This code appears twice in strength_reduce. There is also similar
3491 code in scan_loop. */
3492 if (GET_CODE (p
) == JUMP_INSN
3493 /* If we enter the loop in the middle, and scan around to the
3494 beginning, don't set not_every_iteration for that.
3495 This can be any kind of jump, since we want to know if insns
3496 will be executed if the loop is executed. */
3497 && ! (JUMP_LABEL (p
) == loop_top
3498 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3499 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3503 /* If this is a jump outside the loop, then it also doesn't
3504 matter. Check to see if the target of this branch is on the
3505 loop_number_exits_labels list. */
3507 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3509 label
= LABEL_NEXTREF (label
))
3510 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3514 not_every_iteration
= 1;
3517 else if (GET_CODE (p
) == NOTE
)
3519 /* At the virtual top of a converted loop, insns are again known to
3520 be executed each iteration: logically, the loop begins here
3521 even though the exit code has been duplicated. */
3522 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3523 not_every_iteration
= 0;
3524 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3526 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3530 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3531 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3532 or not an insn is known to be executed each iteration of the
3533 loop, whether or not any iterations are known to occur.
3535 Therefore, if we have just passed a label and have no more labels
3536 between here and the test insn of the loop, we know these insns
3537 will be executed each iteration. */
3539 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3540 && no_labels_between_p (p
, loop_end
))
3541 not_every_iteration
= 0;
3544 /* Scan loop_iv_list to remove all regs that proved not to be bivs.
3545 Make a sanity check against n_times_set. */
3546 for (backbl
= &loop_iv_list
, bl
= *backbl
; bl
; bl
= bl
->next
)
3548 if (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3549 /* Above happens if register modified by subreg, etc. */
3550 /* Make sure it is not recognized as a basic induction var: */
3551 || n_times_set
[bl
->regno
] != bl
->biv_count
3552 /* If never incremented, it is invariant that we decided not to
3553 move. So leave it alone. */
3554 || ! bl
->incremented
)
3556 if (loop_dump_stream
)
3557 fprintf (loop_dump_stream
, "Reg %d: biv discarded, %s\n",
3559 (reg_iv_type
[bl
->regno
] != BASIC_INDUCT
3560 ? "not induction variable"
3561 : (! bl
->incremented
? "never incremented"
3564 reg_iv_type
[bl
->regno
] = NOT_BASIC_INDUCT
;
3571 if (loop_dump_stream
)
3572 fprintf (loop_dump_stream
, "Reg %d: biv verified\n", bl
->regno
);
3576 /* Exit if there are no bivs. */
3579 /* Can still unroll the loop anyways, but indicate that there is no
3580 strength reduction info available. */
3581 if (flag_unroll_loops
)
3582 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 0);
3587 /* Find initial value for each biv by searching backwards from loop_start,
3588 halting at first label. Also record any test condition. */
3591 for (p
= loop_start
; p
&& GET_CODE (p
) != CODE_LABEL
; p
= PREV_INSN (p
))
3595 if (GET_CODE (p
) == CALL_INSN
)
3598 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3599 || GET_CODE (p
) == CALL_INSN
)
3600 note_stores (PATTERN (p
), record_initial
);
3602 /* Record any test of a biv that branches around the loop if no store
3603 between it and the start of loop. We only care about tests with
3604 constants and registers and only certain of those. */
3605 if (GET_CODE (p
) == JUMP_INSN
3606 && JUMP_LABEL (p
) != 0
3607 && next_real_insn (JUMP_LABEL (p
)) == next_real_insn (loop_end
)
3608 && (test
= get_condition_for_loop (p
)) != 0
3609 && GET_CODE (XEXP (test
, 0)) == REG
3610 && REGNO (XEXP (test
, 0)) < max_reg_before_loop
3611 && (bl
= reg_biv_class
[REGNO (XEXP (test
, 0))]) != 0
3612 && valid_initial_value_p (XEXP (test
, 1), p
, call_seen
, loop_start
)
3613 && bl
->init_insn
== 0)
3615 /* If an NE test, we have an initial value! */
3616 if (GET_CODE (test
) == NE
)
3619 bl
->init_set
= gen_rtx (SET
, VOIDmode
,
3620 XEXP (test
, 0), XEXP (test
, 1));
3623 bl
->initial_test
= test
;
3627 /* Look at the each biv and see if we can say anything better about its
3628 initial value from any initializing insns set up above. (This is done
3629 in two passes to avoid missing SETs in a PARALLEL.) */
3630 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3634 if (! bl
->init_insn
)
3637 src
= SET_SRC (bl
->init_set
);
3639 if (loop_dump_stream
)
3640 fprintf (loop_dump_stream
,
3641 "Biv %d initialized at insn %d: initial value ",
3642 bl
->regno
, INSN_UID (bl
->init_insn
));
3644 if ((GET_MODE (src
) == GET_MODE (regno_reg_rtx
[bl
->regno
])
3645 || GET_MODE (src
) == VOIDmode
)
3646 && valid_initial_value_p (src
, bl
->init_insn
, call_seen
, loop_start
))
3648 bl
->initial_value
= src
;
3650 if (loop_dump_stream
)
3652 if (GET_CODE (src
) == CONST_INT
)
3653 fprintf (loop_dump_stream
, "%d\n", INTVAL (src
));
3656 print_rtl (loop_dump_stream
, src
);
3657 fprintf (loop_dump_stream
, "\n");
3663 /* Biv initial value is not simple move,
3664 so let it keep initial value of "itself". */
3666 if (loop_dump_stream
)
3667 fprintf (loop_dump_stream
, "is complex\n");
3671 /* Search the loop for general induction variables. */
3673 /* A register is a giv if: it is only set once, it is a function of a
3674 biv and a constant (or invariant), and it is not a biv. */
3676 not_every_iteration
= 0;
3682 /* At end of a straight-in loop, we are done.
3683 At end of a loop entered at the bottom, scan the top. */
3684 if (p
== scan_start
)
3692 if (p
== scan_start
)
3696 /* Look for a general induction variable in a register. */
3697 if (GET_CODE (p
) == INSN
3698 && (set
= single_set (p
))
3699 && GET_CODE (SET_DEST (set
)) == REG
3700 && ! may_not_optimize
[REGNO (SET_DEST (set
))])
3708 dest_reg
= SET_DEST (set
);
3709 if (REGNO (dest_reg
) < FIRST_PSEUDO_REGISTER
)
3712 if (/* SET_SRC is a giv. */
3713 ((benefit
= general_induction_var (SET_SRC (set
),
3716 /* Equivalent expression is a giv. */
3717 || ((regnote
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
3718 && (benefit
= general_induction_var (XEXP (regnote
, 0),
3720 &add_val
, &mult_val
))))
3721 /* Don't try to handle any regs made by loop optimization.
3722 We have nothing on them in regno_first_uid, etc. */
3723 && REGNO (dest_reg
) < max_reg_before_loop
3724 /* Don't recognize a BASIC_INDUCT_VAR here. */
3725 && dest_reg
!= src_reg
3726 /* This must be the only place where the register is set. */
3727 && (n_times_set
[REGNO (dest_reg
)] == 1
3728 /* or all sets must be consecutive and make a giv. */
3729 || (benefit
= consec_sets_giv (benefit
, p
,
3731 &add_val
, &mult_val
))))
3735 = (struct induction
*) alloca (sizeof (struct induction
));
3738 /* If this is a library call, increase benefit. */
3739 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
3740 benefit
+= libcall_benefit (p
);
3742 /* Skip the consecutive insns, if there are any. */
3743 for (count
= n_times_set
[REGNO (dest_reg
)] - 1;
3746 /* If first insn of libcall sequence, skip to end.
3747 Do this at start of loop, since INSN is guaranteed to
3749 if (GET_CODE (p
) != NOTE
3750 && (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
3753 do p
= NEXT_INSN (p
);
3754 while (GET_CODE (p
) == NOTE
);
3757 record_giv (v
, p
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
3758 DEST_REG
, not_every_iteration
, NULL_PTR
, loop_start
,
3764 #ifndef DONT_REDUCE_ADDR
3765 /* Look for givs which are memory addresses. */
3766 /* This resulted in worse code on a VAX 8600. I wonder if it
3768 if (GET_CODE (p
) == INSN
)
3769 find_mem_givs (PATTERN (p
), p
, not_every_iteration
, loop_start
,
3773 /* Update the status of whether giv can derive other givs. This can
3774 change when we pass a label or an insn that updates a biv. */
3775 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
3776 || GET_CODE (p
) == CODE_LABEL
)
3777 update_giv_derive (p
);
3779 /* Past a jump, we get to insns for which we can't count
3780 on whether they will be executed during each iteration. */
3781 /* This code appears twice in strength_reduce. There is also similar
3782 code in scan_loop. */
3783 if (GET_CODE (p
) == JUMP_INSN
3784 /* If we enter the loop in the middle, and scan around to the
3785 beginning, don't set not_every_iteration for that.
3786 This can be any kind of jump, since we want to know if insns
3787 will be executed if the loop is executed. */
3788 && ! (JUMP_LABEL (p
) == loop_top
3789 && ((NEXT_INSN (NEXT_INSN (p
)) == loop_end
&& simplejump_p (p
))
3790 || (NEXT_INSN (p
) == loop_end
&& condjump_p (p
)))))
3794 /* If this is a jump outside the loop, then it also doesn't
3795 matter. Check to see if the target of this branch is on the
3796 loop_number_exits_labels list. */
3798 for (label
= loop_number_exit_labels
[uid_loop_num
[INSN_UID (loop_start
)]];
3800 label
= LABEL_NEXTREF (label
))
3801 if (XEXP (label
, 0) == JUMP_LABEL (p
))
3805 not_every_iteration
= 1;
3808 else if (GET_CODE (p
) == NOTE
)
3810 /* At the virtual top of a converted loop, insns are again known to
3811 be executed each iteration: logically, the loop begins here
3812 even though the exit code has been duplicated. */
3813 if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_VTOP
&& loop_depth
== 0)
3814 not_every_iteration
= 0;
3815 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
)
3817 else if (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)
3821 /* Unlike in the code motion pass where MAYBE_NEVER indicates that
3822 an insn may never be executed, NOT_EVERY_ITERATION indicates whether
3823 or not an insn is known to be executed each iteration of the
3824 loop, whether or not any iterations are known to occur.
3826 Therefore, if we have just passed a label and have no more labels
3827 between here and the test insn of the loop, we know these insns
3828 will be executed each iteration. */
3830 if (not_every_iteration
&& GET_CODE (p
) == CODE_LABEL
3831 && no_labels_between_p (p
, loop_end
))
3832 not_every_iteration
= 0;
3835 /* Try to calculate and save the number of loop iterations. This is
3836 set to zero if the actual number can not be calculated. This must
3837 be called after all giv's have been identified, since otherwise it may
3838 fail if the iteration variable is a giv. */
3840 loop_n_iterations
= loop_iterations (loop_start
, loop_end
);
3842 /* Now for each giv for which we still don't know whether or not it is
3843 replaceable, check to see if it is replaceable because its final value
3844 can be calculated. This must be done after loop_iterations is called,
3845 so that final_giv_value will work correctly. */
3847 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3849 struct induction
*v
;
3851 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3852 if (! v
->replaceable
&& ! v
->not_replaceable
)
3853 check_final_value (v
, loop_start
, loop_end
);
3856 /* Try to prove that the loop counter variable (if any) is always
3857 nonnegative; if so, record that fact with a REG_NONNEG note
3858 so that "decrement and branch until zero" insn can be used. */
3859 check_dbra_loop (loop_end
, insn_count
, loop_start
);
3862 /* record loop-variables relevant for BCT optimization before unrolling
3863 the loop. Unrolling may update part of this information, and the
3864 correct data will be used for generating the BCT. */
3865 #ifdef HAVE_decrement_and_branch_on_count
3866 if (HAVE_decrement_and_branch_on_count
)
3867 analyze_loop_iterations (loop_start
, loop_end
);
3871 /* Create reg_map to hold substitutions for replaceable giv regs. */
3872 reg_map
= (rtx
*) alloca (max_reg_before_loop
* sizeof (rtx
));
3873 bzero ((char *) reg_map
, max_reg_before_loop
* sizeof (rtx
));
3875 /* Examine each iv class for feasibility of strength reduction/induction
3876 variable elimination. */
3878 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
3880 struct induction
*v
;
3883 rtx final_value
= 0;
3885 /* Test whether it will be possible to eliminate this biv
3886 provided all givs are reduced. This is possible if either
3887 the reg is not used outside the loop, or we can compute
3888 what its final value will be.
3890 For architectures with a decrement_and_branch_until_zero insn,
3891 don't do this if we put a REG_NONNEG note on the endtest for
3894 /* Compare against bl->init_insn rather than loop_start.
3895 We aren't concerned with any uses of the biv between
3896 init_insn and loop_start since these won't be affected
3897 by the value of the biv elsewhere in the function, so
3898 long as init_insn doesn't use the biv itself.
3899 March 14, 1989 -- self@bayes.arc.nasa.gov */
3901 if ((uid_luid
[REGNO_LAST_UID (bl
->regno
)] < INSN_LUID (loop_end
)
3903 && INSN_UID (bl
->init_insn
) < max_uid_for_loop
3904 && uid_luid
[REGNO_FIRST_UID (bl
->regno
)] >= INSN_LUID (bl
->init_insn
)
3905 #ifdef HAVE_decrement_and_branch_until_zero
3908 && ! reg_mentioned_p (bl
->biv
->dest_reg
, SET_SRC (bl
->init_set
)))
3909 || ((final_value
= final_biv_value (bl
, loop_start
, loop_end
))
3910 #ifdef HAVE_decrement_and_branch_until_zero
3914 bl
->eliminable
= maybe_eliminate_biv (bl
, loop_start
, end
, 0,
3915 threshold
, insn_count
);
3918 if (loop_dump_stream
)
3920 fprintf (loop_dump_stream
,
3921 "Cannot eliminate biv %d.\n",
3923 fprintf (loop_dump_stream
,
3924 "First use: insn %d, last use: insn %d.\n",
3925 REGNO_FIRST_UID (bl
->regno
),
3926 REGNO_LAST_UID (bl
->regno
));
3930 /* Combine all giv's for this iv_class. */
3933 /* This will be true at the end, if all givs which depend on this
3934 biv have been strength reduced.
3935 We can't (currently) eliminate the biv unless this is so. */
3938 /* Check each giv in this class to see if we will benefit by reducing
3939 it. Skip giv's combined with others. */
3940 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
3942 struct induction
*tv
;
3944 if (v
->ignore
|| v
->same
)
3947 benefit
= v
->benefit
;
3949 /* Reduce benefit if not replaceable, since we will insert
3950 a move-insn to replace the insn that calculates this giv.
3951 Don't do this unless the giv is a user variable, since it
3952 will often be marked non-replaceable because of the duplication
3953 of the exit code outside the loop. In such a case, the copies
3954 we insert are dead and will be deleted. So they don't have
3955 a cost. Similar situations exist. */
3956 /* ??? The new final_[bg]iv_value code does a much better job
3957 of finding replaceable giv's, and hence this code may no longer
3959 if (! v
->replaceable
&& ! bl
->eliminable
3960 && REG_USERVAR_P (v
->dest_reg
))
3961 benefit
-= copy_cost
;
3963 /* Decrease the benefit to count the add-insns that we will
3964 insert to increment the reduced reg for the giv. */
3965 benefit
-= add_cost
* bl
->biv_count
;
3967 /* Decide whether to strength-reduce this giv or to leave the code
3968 unchanged (recompute it from the biv each time it is used).
3969 This decision can be made independently for each giv. */
3972 /* Attempt to guess whether autoincrement will handle some of the
3973 new add insns; if so, increase BENEFIT (undo the subtraction of
3974 add_cost that was done above). */
3975 if (v
->giv_type
== DEST_ADDR
3976 && GET_CODE (v
->mult_val
) == CONST_INT
)
3978 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_PRE_INCREMENT)
3979 if (INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3980 benefit
+= add_cost
* bl
->biv_count
;
3982 #if defined (HAVE_POST_DECREMENT) || defined (HAVE_PRE_DECREMENT)
3983 if (-INTVAL (v
->mult_val
) == GET_MODE_SIZE (v
->mem_mode
))
3984 benefit
+= add_cost
* bl
->biv_count
;
3989 /* If an insn is not to be strength reduced, then set its ignore
3990 flag, and clear all_reduced. */
3992 /* A giv that depends on a reversed biv must be reduced if it is
3993 used after the loop exit, otherwise, it would have the wrong
3994 value after the loop exit. To make it simple, just reduce all
3995 of such giv's whether or not we know they are used after the loop
3998 if ( ! flag_reduce_all_givs
&& v
->lifetime
* threshold
* benefit
< insn_count
4001 if (loop_dump_stream
)
4002 fprintf (loop_dump_stream
,
4003 "giv of insn %d not worth while, %d vs %d.\n",
4005 v
->lifetime
* threshold
* benefit
, insn_count
);
4011 /* Check that we can increment the reduced giv without a
4012 multiply insn. If not, reject it. */
4014 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4015 if (tv
->mult_val
== const1_rtx
4016 && ! product_cheap_p (tv
->add_val
, v
->mult_val
))
4018 if (loop_dump_stream
)
4019 fprintf (loop_dump_stream
,
4020 "giv of insn %d: would need a multiply.\n",
4021 INSN_UID (v
->insn
));
4029 /* Reduce each giv that we decided to reduce. */
4031 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4033 struct induction
*tv
;
4034 if (! v
->ignore
&& v
->same
== 0)
4036 int auto_inc_opt
= 0;
4038 v
->new_reg
= gen_reg_rtx (v
->mode
);
4041 /* If the target has auto-increment addressing modes, and
4042 this is an address giv, then try to put the increment
4043 immediately after its use, so that flow can create an
4044 auto-increment addressing mode. */
4045 if (v
->giv_type
== DEST_ADDR
&& bl
->biv_count
== 1
4046 && bl
->biv
->always_executed
&& ! bl
->biv
->maybe_multiple
4047 /* We don't handle reversed biv's because bl->biv->insn
4048 does not have a valid INSN_LUID. */
4050 && v
->always_executed
&& ! v
->maybe_multiple
)
4052 /* If other giv's have been combined with this one, then
4053 this will work only if all uses of the other giv's occur
4054 before this giv's insn. This is difficult to check.
4056 We simplify this by looking for the common case where
4057 there is one DEST_REG giv, and this giv's insn is the
4058 last use of the dest_reg of that DEST_REG giv. If the
4059 the increment occurs after the address giv, then we can
4060 perform the optimization. (Otherwise, the increment
4061 would have to go before other_giv, and we would not be
4062 able to combine it with the address giv to get an
4063 auto-inc address.) */
4064 if (v
->combined_with
)
4066 struct induction
*other_giv
= 0;
4068 for (tv
= bl
->giv
; tv
; tv
= tv
->next_iv
)
4076 if (! tv
&& other_giv
4077 && REGNO (other_giv
->dest_reg
) < max_reg_before_loop
4078 && (REGNO_LAST_UID (REGNO (other_giv
->dest_reg
))
4079 == INSN_UID (v
->insn
))
4080 && INSN_LUID (v
->insn
) < INSN_LUID (bl
->biv
->insn
))
4083 /* Check for case where increment is before the the address
4085 else if (INSN_LUID (v
->insn
) > INSN_LUID (bl
->biv
->insn
))
4094 /* We can't put an insn immediately after one setting
4095 cc0, or immediately before one using cc0. */
4096 if ((auto_inc_opt
== 1 && sets_cc0_p (PATTERN (v
->insn
)))
4097 || (auto_inc_opt
== -1
4098 && (prev
= prev_nonnote_insn (v
->insn
)) != 0
4099 && GET_RTX_CLASS (GET_CODE (prev
)) == 'i'
4100 && sets_cc0_p (PATTERN (prev
))))
4106 v
->auto_inc_opt
= 1;
4110 /* For each place where the biv is incremented, add an insn
4111 to increment the new, reduced reg for the giv. */
4112 for (tv
= bl
->biv
; tv
; tv
= tv
->next_iv
)
4117 insert_before
= tv
->insn
;
4118 else if (auto_inc_opt
== 1)
4119 insert_before
= NEXT_INSN (v
->insn
);
4121 insert_before
= v
->insn
;
4123 if (tv
->mult_val
== const1_rtx
)
4124 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4125 v
->new_reg
, v
->new_reg
, insert_before
);
4126 else /* tv->mult_val == const0_rtx */
4127 /* A multiply is acceptable here
4128 since this is presumed to be seldom executed. */
4129 emit_iv_add_mult (tv
->add_val
, v
->mult_val
,
4130 v
->add_val
, v
->new_reg
, insert_before
);
4133 /* Add code at loop start to initialize giv's reduced reg. */
4135 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4136 v
->add_val
, v
->new_reg
, loop_start
);
4140 /* Rescan all givs. If a giv is the same as a giv not reduced, mark it
4143 For each giv register that can be reduced now: if replaceable,
4144 substitute reduced reg wherever the old giv occurs;
4145 else add new move insn "giv_reg = reduced_reg".
4147 Also check for givs whose first use is their definition and whose
4148 last use is the definition of another giv. If so, it is likely
4149 dead and should not be used to eliminate a biv. */
4150 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4152 if (v
->same
&& v
->same
->ignore
)
4158 if (v
->giv_type
== DEST_REG
4159 && REGNO_FIRST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v
->insn
))
4161 struct induction
*v1
;
4163 for (v1
= bl
->giv
; v1
; v1
= v1
->next_iv
)
4164 if (REGNO_LAST_UID (REGNO (v
->dest_reg
)) == INSN_UID (v1
->insn
))
4168 /* Update expression if this was combined, in case other giv was
4171 v
->new_reg
= replace_rtx (v
->new_reg
,
4172 v
->same
->dest_reg
, v
->same
->new_reg
);
4174 if (v
->giv_type
== DEST_ADDR
)
4175 /* Store reduced reg as the address in the memref where we found
4177 validate_change (v
->insn
, v
->location
, v
->new_reg
, 0);
4178 else if (v
->replaceable
)
4180 reg_map
[REGNO (v
->dest_reg
)] = v
->new_reg
;
4183 /* I can no longer duplicate the original problem. Perhaps
4184 this is unnecessary now? */
4186 /* Replaceable; it isn't strictly necessary to delete the old
4187 insn and emit a new one, because v->dest_reg is now dead.
4189 However, especially when unrolling loops, the special
4190 handling for (set REG0 REG1) in the second cse pass may
4191 make v->dest_reg live again. To avoid this problem, emit
4192 an insn to set the original giv reg from the reduced giv.
4193 We can not delete the original insn, since it may be part
4194 of a LIBCALL, and the code in flow that eliminates dead
4195 libcalls will fail if it is deleted. */
4196 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4202 /* Not replaceable; emit an insn to set the original giv reg from
4203 the reduced giv, same as above. */
4204 emit_insn_after (gen_move_insn (v
->dest_reg
, v
->new_reg
),
4208 /* When a loop is reversed, givs which depend on the reversed
4209 biv, and which are live outside the loop, must be set to their
4210 correct final value. This insn is only needed if the giv is
4211 not replaceable. The correct final value is the same as the
4212 value that the giv starts the reversed loop with. */
4213 if (bl
->reversed
&& ! v
->replaceable
)
4214 emit_iv_add_mult (bl
->initial_value
, v
->mult_val
,
4215 v
->add_val
, v
->dest_reg
, end_insert_before
);
4216 else if (v
->final_value
)
4220 /* If the loop has multiple exits, emit the insn before the
4221 loop to ensure that it will always be executed no matter
4222 how the loop exits. Otherwise, emit the insn after the loop,
4223 since this is slightly more efficient. */
4224 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4225 insert_before
= loop_start
;
4227 insert_before
= end_insert_before
;
4228 emit_insn_before (gen_move_insn (v
->dest_reg
, v
->final_value
),
4232 /* If the insn to set the final value of the giv was emitted
4233 before the loop, then we must delete the insn inside the loop
4234 that sets it. If this is a LIBCALL, then we must delete
4235 every insn in the libcall. Note, however, that
4236 final_giv_value will only succeed when there are multiple
4237 exits if the giv is dead at each exit, hence it does not
4238 matter that the original insn remains because it is dead
4240 /* Delete the insn inside the loop that sets the giv since
4241 the giv is now set before (or after) the loop. */
4242 delete_insn (v
->insn
);
4246 if (loop_dump_stream
)
4248 fprintf (loop_dump_stream
, "giv at %d reduced to ",
4249 INSN_UID (v
->insn
));
4250 print_rtl (loop_dump_stream
, v
->new_reg
);
4251 fprintf (loop_dump_stream
, "\n");
4255 /* All the givs based on the biv bl have been reduced if they
4258 /* For each giv not marked as maybe dead that has been combined with a
4259 second giv, clear any "maybe dead" mark on that second giv.
4260 v->new_reg will either be or refer to the register of the giv it
4263 Doing this clearing avoids problems in biv elimination where a
4264 giv's new_reg is a complex value that can't be put in the insn but
4265 the giv combined with (with a reg as new_reg) is marked maybe_dead.
4266 Since the register will be used in either case, we'd prefer it be
4267 used from the simpler giv. */
4269 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
4270 if (! v
->maybe_dead
&& v
->same
)
4271 v
->same
->maybe_dead
= 0;
4273 /* Try to eliminate the biv, if it is a candidate.
4274 This won't work if ! all_reduced,
4275 since the givs we planned to use might not have been reduced.
4277 We have to be careful that we didn't initially think we could eliminate
4278 this biv because of a giv that we now think may be dead and shouldn't
4279 be used as a biv replacement.
4281 Also, there is the possibility that we may have a giv that looks
4282 like it can be used to eliminate a biv, but the resulting insn
4283 isn't valid. This can happen, for example, on the 88k, where a
4284 JUMP_INSN can compare a register only with zero. Attempts to
4285 replace it with a compare with a constant will fail.
4287 Note that in cases where this call fails, we may have replaced some
4288 of the occurrences of the biv with a giv, but no harm was done in
4289 doing so in the rare cases where it can occur. */
4291 if (all_reduced
== 1 && bl
->eliminable
4292 && maybe_eliminate_biv (bl
, loop_start
, end
, 1,
4293 threshold
, insn_count
))
4296 /* ?? If we created a new test to bypass the loop entirely,
4297 or otherwise drop straight in, based on this test, then
4298 we might want to rewrite it also. This way some later
4299 pass has more hope of removing the initialization of this
4302 /* If final_value != 0, then the biv may be used after loop end
4303 and we must emit an insn to set it just in case.
4305 Reversed bivs already have an insn after the loop setting their
4306 value, so we don't need another one. We can't calculate the
4307 proper final value for such a biv here anyways. */
4308 if (final_value
!= 0 && ! bl
->reversed
)
4312 /* If the loop has multiple exits, emit the insn before the
4313 loop to ensure that it will always be executed no matter
4314 how the loop exits. Otherwise, emit the insn after the
4315 loop, since this is slightly more efficient. */
4316 if (loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
4317 insert_before
= loop_start
;
4319 insert_before
= end_insert_before
;
4321 emit_insn_before (gen_move_insn (bl
->biv
->dest_reg
, final_value
),
4326 /* Delete all of the instructions inside the loop which set
4327 the biv, as they are all dead. If is safe to delete them,
4328 because an insn setting a biv will never be part of a libcall. */
4329 /* However, deleting them will invalidate the regno_last_uid info,
4330 so keeping them around is more convenient. Final_biv_value
4331 will only succeed when there are multiple exits if the biv
4332 is dead at each exit, hence it does not matter that the original
4333 insn remains, because it is dead anyways. */
4334 for (v
= bl
->biv
; v
; v
= v
->next_iv
)
4335 delete_insn (v
->insn
);
4338 if (loop_dump_stream
)
4339 fprintf (loop_dump_stream
, "Reg %d: biv eliminated\n",
4344 /* Go through all the instructions in the loop, making all the
4345 register substitutions scheduled in REG_MAP. */
4347 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
4348 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4349 || GET_CODE (p
) == CALL_INSN
)
4351 replace_regs (PATTERN (p
), reg_map
, max_reg_before_loop
, 0);
4352 replace_regs (REG_NOTES (p
), reg_map
, max_reg_before_loop
, 0);
4356 /* Unroll loops from within strength reduction so that we can use the
4357 induction variable information that strength_reduce has already
4360 if (flag_unroll_loops
)
4361 unroll_loop (loop_end
, insn_count
, loop_start
, end_insert_before
, 1);
4364 /* instrument the loop with bct insn */
4365 #ifdef HAVE_decrement_and_branch_on_count
4366 if (HAVE_decrement_and_branch_on_count
)
4367 insert_bct (loop_start
, loop_end
);
4371 if (loop_dump_stream
)
4372 fprintf (loop_dump_stream
, "\n");
4375 /* Return 1 if X is a valid source for an initial value (or as value being
4376 compared against in an initial test).
4378 X must be either a register or constant and must not be clobbered between
4379 the current insn and the start of the loop.
4381 INSN is the insn containing X. */
4384 valid_initial_value_p (x
, insn
, call_seen
, loop_start
)
4393 /* Only consider pseudos we know about initialized in insns whose luids
4395 if (GET_CODE (x
) != REG
4396 || REGNO (x
) >= max_reg_before_loop
)
4399 /* Don't use call-clobbered registers across a call which clobbers it. On
4400 some machines, don't use any hard registers at all. */
4401 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
4402 && (SMALL_REGISTER_CLASSES
4403 || (call_used_regs
[REGNO (x
)] && call_seen
)))
4406 /* Don't use registers that have been clobbered before the start of the
4408 if (reg_set_between_p (x
, insn
, loop_start
))
4414 /* Scan X for memory refs and check each memory address
4415 as a possible giv. INSN is the insn whose pattern X comes from.
4416 NOT_EVERY_ITERATION is 1 if the insn might not be executed during
4417 every loop iteration. */
4420 find_mem_givs (x
, insn
, not_every_iteration
, loop_start
, loop_end
)
4423 int not_every_iteration
;
4424 rtx loop_start
, loop_end
;
4427 register enum rtx_code code
;
4433 code
= GET_CODE (x
);
4457 benefit
= general_induction_var (XEXP (x
, 0),
4458 &src_reg
, &add_val
, &mult_val
);
4460 /* Don't make a DEST_ADDR giv with mult_val == 1 && add_val == 0.
4461 Such a giv isn't useful. */
4462 if (benefit
> 0 && (mult_val
!= const1_rtx
|| add_val
!= const0_rtx
))
4464 /* Found one; record it. */
4466 = (struct induction
*) oballoc (sizeof (struct induction
));
4468 record_giv (v
, insn
, src_reg
, addr_placeholder
, mult_val
,
4469 add_val
, benefit
, DEST_ADDR
, not_every_iteration
,
4470 &XEXP (x
, 0), loop_start
, loop_end
);
4472 v
->mem_mode
= GET_MODE (x
);
4481 /* Recursively scan the subexpressions for other mem refs. */
4483 fmt
= GET_RTX_FORMAT (code
);
4484 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4486 find_mem_givs (XEXP (x
, i
), insn
, not_every_iteration
, loop_start
,
4488 else if (fmt
[i
] == 'E')
4489 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
4490 find_mem_givs (XVECEXP (x
, i
, j
), insn
, not_every_iteration
,
4491 loop_start
, loop_end
);
4494 /* Fill in the data about one biv update.
4495 V is the `struct induction' in which we record the biv. (It is
4496 allocated by the caller, with alloca.)
4497 INSN is the insn that sets it.
4498 DEST_REG is the biv's reg.
4500 MULT_VAL is const1_rtx if the biv is being incremented here, in which case
4501 INC_VAL is the increment. Otherwise, MULT_VAL is const0_rtx and the biv is
4502 being set to INC_VAL.
4504 NOT_EVERY_ITERATION is nonzero if this biv update is not know to be
4505 executed every iteration; MAYBE_MULTIPLE is nonzero if this biv update
4506 can be executed more than once per iteration. If MAYBE_MULTIPLE
4507 and NOT_EVERY_ITERATION are both zero, we know that the biv update is
4508 executed exactly once per iteration. */
4511 record_biv (v
, insn
, dest_reg
, inc_val
, mult_val
,
4512 not_every_iteration
, maybe_multiple
)
4513 struct induction
*v
;
4518 int not_every_iteration
;
4521 struct iv_class
*bl
;
4524 v
->src_reg
= dest_reg
;
4525 v
->dest_reg
= dest_reg
;
4526 v
->mult_val
= mult_val
;
4527 v
->add_val
= inc_val
;
4528 v
->mode
= GET_MODE (dest_reg
);
4529 v
->always_computable
= ! not_every_iteration
;
4530 v
->always_executed
= ! not_every_iteration
;
4531 v
->maybe_multiple
= maybe_multiple
;
4533 /* Add this to the reg's iv_class, creating a class
4534 if this is the first incrementation of the reg. */
4536 bl
= reg_biv_class
[REGNO (dest_reg
)];
4539 /* Create and initialize new iv_class. */
4541 bl
= (struct iv_class
*) oballoc (sizeof (struct iv_class
));
4543 bl
->regno
= REGNO (dest_reg
);
4549 /* Set initial value to the reg itself. */
4550 bl
->initial_value
= dest_reg
;
4551 /* We haven't seen the initializing insn yet */
4554 bl
->initial_test
= 0;
4555 bl
->incremented
= 0;
4559 bl
->total_benefit
= 0;
4561 /* Add this class to loop_iv_list. */
4562 bl
->next
= loop_iv_list
;
4565 /* Put it in the array of biv register classes. */
4566 reg_biv_class
[REGNO (dest_reg
)] = bl
;
4569 /* Update IV_CLASS entry for this biv. */
4570 v
->next_iv
= bl
->biv
;
4573 if (mult_val
== const1_rtx
)
4574 bl
->incremented
= 1;
4576 if (loop_dump_stream
)
4578 fprintf (loop_dump_stream
,
4579 "Insn %d: possible biv, reg %d,",
4580 INSN_UID (insn
), REGNO (dest_reg
));
4581 if (GET_CODE (inc_val
) == CONST_INT
)
4582 fprintf (loop_dump_stream
, " const = %d\n",
4586 fprintf (loop_dump_stream
, " const = ");
4587 print_rtl (loop_dump_stream
, inc_val
);
4588 fprintf (loop_dump_stream
, "\n");
4593 /* Fill in the data about one giv.
4594 V is the `struct induction' in which we record the giv. (It is
4595 allocated by the caller, with alloca.)
4596 INSN is the insn that sets it.
4597 BENEFIT estimates the savings from deleting this insn.
4598 TYPE is DEST_REG or DEST_ADDR; it says whether the giv is computed
4599 into a register or is used as a memory address.
4601 SRC_REG is the biv reg which the giv is computed from.
4602 DEST_REG is the giv's reg (if the giv is stored in a reg).
4603 MULT_VAL and ADD_VAL are the coefficients used to compute the giv.
4604 LOCATION points to the place where this giv's value appears in INSN. */
4607 record_giv (v
, insn
, src_reg
, dest_reg
, mult_val
, add_val
, benefit
,
4608 type
, not_every_iteration
, location
, loop_start
, loop_end
)
4609 struct induction
*v
;
4613 rtx mult_val
, add_val
;
4616 int not_every_iteration
;
4618 rtx loop_start
, loop_end
;
4620 struct induction
*b
;
4621 struct iv_class
*bl
;
4622 rtx set
= single_set (insn
);
4626 v
->src_reg
= src_reg
;
4628 v
->dest_reg
= dest_reg
;
4629 v
->mult_val
= mult_val
;
4630 v
->add_val
= add_val
;
4631 v
->benefit
= benefit
;
4632 v
->location
= location
;
4634 v
->combined_with
= 0;
4635 v
->maybe_multiple
= 0;
4637 v
->derive_adjustment
= 0;
4643 v
->auto_inc_opt
= 0;
4647 /* The v->always_computable field is used in update_giv_derive, to
4648 determine whether a giv can be used to derive another giv. For a
4649 DEST_REG giv, INSN computes a new value for the giv, so its value
4650 isn't computable if INSN insn't executed every iteration.
4651 However, for a DEST_ADDR giv, INSN merely uses the value of the giv;
4652 it does not compute a new value. Hence the value is always computable
4653 regardless of whether INSN is executed each iteration. */
4655 if (type
== DEST_ADDR
)
4656 v
->always_computable
= 1;
4658 v
->always_computable
= ! not_every_iteration
;
4660 v
->always_executed
= ! not_every_iteration
;
4662 if (type
== DEST_ADDR
)
4664 v
->mode
= GET_MODE (*location
);
4668 else /* type == DEST_REG */
4670 v
->mode
= GET_MODE (SET_DEST (set
));
4672 v
->lifetime
= (uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))]
4673 - uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))]);
4675 v
->times_used
= n_times_used
[REGNO (dest_reg
)];
4677 /* If the lifetime is zero, it means that this register is
4678 really a dead store. So mark this as a giv that can be
4679 ignored. This will not prevent the biv from being eliminated. */
4680 if (v
->lifetime
== 0)
4683 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
4684 reg_iv_info
[REGNO (dest_reg
)] = v
;
4687 /* Add the giv to the class of givs computed from one biv. */
4689 bl
= reg_biv_class
[REGNO (src_reg
)];
4692 v
->next_iv
= bl
->giv
;
4694 /* Don't count DEST_ADDR. This is supposed to count the number of
4695 insns that calculate givs. */
4696 if (type
== DEST_REG
)
4698 bl
->total_benefit
+= benefit
;
4701 /* Fatal error, biv missing for this giv? */
4704 if (type
== DEST_ADDR
)
4708 /* The giv can be replaced outright by the reduced register only if all
4709 of the following conditions are true:
4710 - the insn that sets the giv is always executed on any iteration
4711 on which the giv is used at all
4712 (there are two ways to deduce this:
4713 either the insn is executed on every iteration,
4714 or all uses follow that insn in the same basic block),
4715 - the giv is not used outside the loop
4716 - no assignments to the biv occur during the giv's lifetime. */
4718 if (REGNO_FIRST_UID (REGNO (dest_reg
)) == INSN_UID (insn
)
4719 /* Previous line always fails if INSN was moved by loop opt. */
4720 && uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))] < INSN_LUID (loop_end
)
4721 && (! not_every_iteration
4722 || last_use_this_basic_block (dest_reg
, insn
)))
4724 /* Now check that there are no assignments to the biv within the
4725 giv's lifetime. This requires two separate checks. */
4727 /* Check each biv update, and fail if any are between the first
4728 and last use of the giv.
4730 If this loop contains an inner loop that was unrolled, then
4731 the insn modifying the biv may have been emitted by the loop
4732 unrolling code, and hence does not have a valid luid. Just
4733 mark the biv as not replaceable in this case. It is not very
4734 useful as a biv, because it is used in two different loops.
4735 It is very unlikely that we would be able to optimize the giv
4736 using this biv anyways. */
4739 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4741 if (INSN_UID (b
->insn
) >= max_uid_for_loop
4742 || ((uid_luid
[INSN_UID (b
->insn
)]
4743 >= uid_luid
[REGNO_FIRST_UID (REGNO (dest_reg
))])
4744 && (uid_luid
[INSN_UID (b
->insn
)]
4745 <= uid_luid
[REGNO_LAST_UID (REGNO (dest_reg
))])))
4748 v
->not_replaceable
= 1;
4753 /* If there are any backwards branches that go from after the
4754 biv update to before it, then this giv is not replaceable. */
4756 for (b
= bl
->biv
; b
; b
= b
->next_iv
)
4757 if (back_branch_in_range_p (b
->insn
, loop_start
, loop_end
))
4760 v
->not_replaceable
= 1;
4766 /* May still be replaceable, we don't have enough info here to
4769 v
->not_replaceable
= 0;
4773 if (loop_dump_stream
)
4775 if (type
== DEST_REG
)
4776 fprintf (loop_dump_stream
, "Insn %d: giv reg %d",
4777 INSN_UID (insn
), REGNO (dest_reg
));
4779 fprintf (loop_dump_stream
, "Insn %d: dest address",
4782 fprintf (loop_dump_stream
, " src reg %d benefit %d",
4783 REGNO (src_reg
), v
->benefit
);
4784 fprintf (loop_dump_stream
, " used %d lifetime %d",
4785 v
->times_used
, v
->lifetime
);
4788 fprintf (loop_dump_stream
, " replaceable");
4790 if (GET_CODE (mult_val
) == CONST_INT
)
4791 fprintf (loop_dump_stream
, " mult %d",
4795 fprintf (loop_dump_stream
, " mult ");
4796 print_rtl (loop_dump_stream
, mult_val
);
4799 if (GET_CODE (add_val
) == CONST_INT
)
4800 fprintf (loop_dump_stream
, " add %d",
4804 fprintf (loop_dump_stream
, " add ");
4805 print_rtl (loop_dump_stream
, add_val
);
4809 if (loop_dump_stream
)
4810 fprintf (loop_dump_stream
, "\n");
4815 /* All this does is determine whether a giv can be made replaceable because
4816 its final value can be calculated. This code can not be part of record_giv
4817 above, because final_giv_value requires that the number of loop iterations
4818 be known, and that can not be accurately calculated until after all givs
4819 have been identified. */
4822 check_final_value (v
, loop_start
, loop_end
)
4823 struct induction
*v
;
4824 rtx loop_start
, loop_end
;
4826 struct iv_class
*bl
;
4827 rtx final_value
= 0;
4829 bl
= reg_biv_class
[REGNO (v
->src_reg
)];
4831 /* DEST_ADDR givs will never reach here, because they are always marked
4832 replaceable above in record_giv. */
4834 /* The giv can be replaced outright by the reduced register only if all
4835 of the following conditions are true:
4836 - the insn that sets the giv is always executed on any iteration
4837 on which the giv is used at all
4838 (there are two ways to deduce this:
4839 either the insn is executed on every iteration,
4840 or all uses follow that insn in the same basic block),
4841 - its final value can be calculated (this condition is different
4842 than the one above in record_giv)
4843 - no assignments to the biv occur during the giv's lifetime. */
4846 /* This is only called now when replaceable is known to be false. */
4847 /* Clear replaceable, so that it won't confuse final_giv_value. */
4851 if ((final_value
= final_giv_value (v
, loop_start
, loop_end
))
4852 && (v
->always_computable
|| last_use_this_basic_block (v
->dest_reg
, v
->insn
)))
4854 int biv_increment_seen
= 0;
4860 /* When trying to determine whether or not a biv increment occurs
4861 during the lifetime of the giv, we can ignore uses of the variable
4862 outside the loop because final_value is true. Hence we can not
4863 use regno_last_uid and regno_first_uid as above in record_giv. */
4865 /* Search the loop to determine whether any assignments to the
4866 biv occur during the giv's lifetime. Start with the insn
4867 that sets the giv, and search around the loop until we come
4868 back to that insn again.
4870 Also fail if there is a jump within the giv's lifetime that jumps
4871 to somewhere outside the lifetime but still within the loop. This
4872 catches spaghetti code where the execution order is not linear, and
4873 hence the above test fails. Here we assume that the giv lifetime
4874 does not extend from one iteration of the loop to the next, so as
4875 to make the test easier. Since the lifetime isn't known yet,
4876 this requires two loops. See also record_giv above. */
4878 last_giv_use
= v
->insn
;
4884 p
= NEXT_INSN (loop_start
);
4888 if (GET_CODE (p
) == INSN
|| GET_CODE (p
) == JUMP_INSN
4889 || GET_CODE (p
) == CALL_INSN
)
4891 if (biv_increment_seen
)
4893 if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4896 v
->not_replaceable
= 1;
4900 else if (reg_set_p (v
->src_reg
, PATTERN (p
)))
4901 biv_increment_seen
= 1;
4902 else if (reg_mentioned_p (v
->dest_reg
, PATTERN (p
)))
4907 /* Now that the lifetime of the giv is known, check for branches
4908 from within the lifetime to outside the lifetime if it is still
4918 p
= NEXT_INSN (loop_start
);
4919 if (p
== last_giv_use
)
4922 if (GET_CODE (p
) == JUMP_INSN
&& JUMP_LABEL (p
)
4923 && LABEL_NAME (JUMP_LABEL (p
))
4924 && ((INSN_UID (JUMP_LABEL (p
)) >= max_uid_for_loop
)
4925 || (INSN_UID (v
->insn
) >= max_uid_for_loop
)
4926 || (INSN_UID (last_giv_use
) >= max_uid_for_loop
)
4927 || (INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (v
->insn
)
4928 && INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (loop_start
))
4929 || (INSN_LUID (JUMP_LABEL (p
)) > INSN_LUID (last_giv_use
)
4930 && INSN_LUID (JUMP_LABEL (p
)) < INSN_LUID (loop_end
))))
4933 v
->not_replaceable
= 1;
4935 if (loop_dump_stream
)
4936 fprintf (loop_dump_stream
,
4937 "Found branch outside giv lifetime.\n");
4944 /* If it is replaceable, then save the final value. */
4946 v
->final_value
= final_value
;
4949 if (loop_dump_stream
&& v
->replaceable
)
4950 fprintf (loop_dump_stream
, "Insn %d: giv reg %d final_value replaceable\n",
4951 INSN_UID (v
->insn
), REGNO (v
->dest_reg
));
4954 /* Update the status of whether a giv can derive other givs.
4956 We need to do something special if there is or may be an update to the biv
4957 between the time the giv is defined and the time it is used to derive
4960 In addition, a giv that is only conditionally set is not allowed to
4961 derive another giv once a label has been passed.
4963 The cases we look at are when a label or an update to a biv is passed. */
4966 update_giv_derive (p
)
4969 struct iv_class
*bl
;
4970 struct induction
*biv
, *giv
;
4974 /* Search all IV classes, then all bivs, and finally all givs.
4976 There are three cases we are concerned with. First we have the situation
4977 of a giv that is only updated conditionally. In that case, it may not
4978 derive any givs after a label is passed.
4980 The second case is when a biv update occurs, or may occur, after the
4981 definition of a giv. For certain biv updates (see below) that are
4982 known to occur between the giv definition and use, we can adjust the
4983 giv definition. For others, or when the biv update is conditional,
4984 we must prevent the giv from deriving any other givs. There are two
4985 sub-cases within this case.
4987 If this is a label, we are concerned with any biv update that is done
4988 conditionally, since it may be done after the giv is defined followed by
4989 a branch here (actually, we need to pass both a jump and a label, but
4990 this extra tracking doesn't seem worth it).
4992 If this is a jump, we are concerned about any biv update that may be
4993 executed multiple times. We are actually only concerned about
4994 backward jumps, but it is probably not worth performing the test
4995 on the jump again here.
4997 If this is a biv update, we must adjust the giv status to show that a
4998 subsequent biv update was performed. If this adjustment cannot be done,
4999 the giv cannot derive further givs. */
5001 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
5002 for (biv
= bl
->biv
; biv
; biv
= biv
->next_iv
)
5003 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
5006 for (giv
= bl
->giv
; giv
; giv
= giv
->next_iv
)
5008 /* If cant_derive is already true, there is no point in
5009 checking all of these conditions again. */
5010 if (giv
->cant_derive
)
5013 /* If this giv is conditionally set and we have passed a label,
5014 it cannot derive anything. */
5015 if (GET_CODE (p
) == CODE_LABEL
&& ! giv
->always_computable
)
5016 giv
->cant_derive
= 1;
5018 /* Skip givs that have mult_val == 0, since
5019 they are really invariants. Also skip those that are
5020 replaceable, since we know their lifetime doesn't contain
5022 else if (giv
->mult_val
== const0_rtx
|| giv
->replaceable
)
5025 /* The only way we can allow this giv to derive another
5026 is if this is a biv increment and we can form the product
5027 of biv->add_val and giv->mult_val. In this case, we will
5028 be able to compute a compensation. */
5029 else if (biv
->insn
== p
)
5033 if (biv
->mult_val
== const1_rtx
)
5034 tem
= simplify_giv_expr (gen_rtx (MULT
, giv
->mode
,
5039 if (tem
&& giv
->derive_adjustment
)
5040 tem
= simplify_giv_expr (gen_rtx (PLUS
, giv
->mode
, tem
,
5041 giv
->derive_adjustment
),
5044 giv
->derive_adjustment
= tem
;
5046 giv
->cant_derive
= 1;
5048 else if ((GET_CODE (p
) == CODE_LABEL
&& ! biv
->always_computable
)
5049 || (GET_CODE (p
) == JUMP_INSN
&& biv
->maybe_multiple
))
5050 giv
->cant_derive
= 1;
5055 /* Check whether an insn is an increment legitimate for a basic induction var.
5056 X is the source of insn P, or a part of it.
5057 MODE is the mode in which X should be interpreted.
5059 DEST_REG is the putative biv, also the destination of the insn.
5060 We accept patterns of these forms:
5061 REG = REG + INVARIANT (includes REG = REG - CONSTANT)
5062 REG = INVARIANT + REG
5064 If X is suitable, we return 1, set *MULT_VAL to CONST1_RTX,
5065 and store the additive term into *INC_VAL.
5067 If X is an assignment of an invariant into DEST_REG, we set
5068 *MULT_VAL to CONST0_RTX, and store the invariant into *INC_VAL.
5070 We also want to detect a BIV when it corresponds to a variable
5071 whose mode was promoted via PROMOTED_MODE. In that case, an increment
5072 of the variable may be a PLUS that adds a SUBREG of that variable to
5073 an invariant and then sign- or zero-extends the result of the PLUS
5076 Most GIVs in such cases will be in the promoted mode, since that is the
5077 probably the natural computation mode (and almost certainly the mode
5078 used for addresses) on the machine. So we view the pseudo-reg containing
5079 the variable as the BIV, as if it were simply incremented.
5081 Note that treating the entire pseudo as a BIV will result in making
5082 simple increments to any GIVs based on it. However, if the variable
5083 overflows in its declared mode but not its promoted mode, the result will
5084 be incorrect. This is acceptable if the variable is signed, since
5085 overflows in such cases are undefined, but not if it is unsigned, since
5086 those overflows are defined. So we only check for SIGN_EXTEND and
5089 If we cannot find a biv, we return 0. */
5092 basic_induction_var (x
, mode
, dest_reg
, p
, inc_val
, mult_val
)
5094 enum machine_mode mode
;
5100 register enum rtx_code code
;
5104 code
= GET_CODE (x
);
5108 if (XEXP (x
, 0) == dest_reg
5109 || (GET_CODE (XEXP (x
, 0)) == SUBREG
5110 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 0))
5111 && SUBREG_REG (XEXP (x
, 0)) == dest_reg
))
5113 else if (XEXP (x
, 1) == dest_reg
5114 || (GET_CODE (XEXP (x
, 1)) == SUBREG
5115 && SUBREG_PROMOTED_VAR_P (XEXP (x
, 1))
5116 && SUBREG_REG (XEXP (x
, 1)) == dest_reg
))
5121 if (invariant_p (arg
) != 1)
5124 *inc_val
= convert_modes (GET_MODE (dest_reg
), GET_MODE (x
), arg
, 0);
5125 *mult_val
= const1_rtx
;
5129 /* If this is a SUBREG for a promoted variable, check the inner
5131 if (SUBREG_PROMOTED_VAR_P (x
))
5132 return basic_induction_var (SUBREG_REG (x
), GET_MODE (SUBREG_REG (x
)),
5133 dest_reg
, p
, inc_val
, mult_val
);
5137 /* If this register is assigned in the previous insn, look at its
5138 source, but don't go outside the loop or past a label. */
5140 for (insn
= PREV_INSN (p
);
5141 (insn
&& GET_CODE (insn
) == NOTE
5142 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5143 insn
= PREV_INSN (insn
))
5147 set
= single_set (insn
);
5150 && (SET_DEST (set
) == x
5151 || (GET_CODE (SET_DEST (set
)) == SUBREG
5152 && (GET_MODE_SIZE (GET_MODE (SET_DEST (set
)))
5154 && SUBREG_REG (SET_DEST (set
)) == x
)))
5155 return basic_induction_var (SET_SRC (set
),
5156 (GET_MODE (SET_SRC (set
)) == VOIDmode
5158 : GET_MODE (SET_SRC (set
))),
5161 /* ... fall through ... */
5163 /* Can accept constant setting of biv only when inside inner most loop.
5164 Otherwise, a biv of an inner loop may be incorrectly recognized
5165 as a biv of the outer loop,
5166 causing code to be moved INTO the inner loop. */
5168 if (invariant_p (x
) != 1)
5173 if (loops_enclosed
== 1)
5175 /* Possible bug here? Perhaps we don't know the mode of X. */
5176 *inc_val
= convert_modes (GET_MODE (dest_reg
), mode
, x
, 0);
5177 *mult_val
= const0_rtx
;
5184 return basic_induction_var (XEXP (x
, 0), GET_MODE (XEXP (x
, 0)),
5185 dest_reg
, p
, inc_val
, mult_val
);
5187 /* Similar, since this can be a sign extension. */
5188 for (insn
= PREV_INSN (p
);
5189 (insn
&& GET_CODE (insn
) == NOTE
5190 && NOTE_LINE_NUMBER (insn
) != NOTE_INSN_LOOP_BEG
);
5191 insn
= PREV_INSN (insn
))
5195 set
= single_set (insn
);
5197 if (set
&& SET_DEST (set
) == XEXP (x
, 0)
5198 && GET_CODE (XEXP (x
, 1)) == CONST_INT
5199 && INTVAL (XEXP (x
, 1)) >= 0
5200 && GET_CODE (SET_SRC (set
)) == ASHIFT
5201 && XEXP (x
, 1) == XEXP (SET_SRC (set
), 1))
5202 return basic_induction_var (XEXP (SET_SRC (set
), 0),
5203 GET_MODE (XEXP (x
, 0)),
5204 dest_reg
, insn
, inc_val
, mult_val
);
5212 /* A general induction variable (giv) is any quantity that is a linear
5213 function of a basic induction variable,
5214 i.e. giv = biv * mult_val + add_val.
5215 The coefficients can be any loop invariant quantity.
5216 A giv need not be computed directly from the biv;
5217 it can be computed by way of other givs. */
5219 /* Determine whether X computes a giv.
5220 If it does, return a nonzero value
5221 which is the benefit from eliminating the computation of X;
5222 set *SRC_REG to the register of the biv that it is computed from;
5223 set *ADD_VAL and *MULT_VAL to the coefficients,
5224 such that the value of X is biv * mult + add; */
5227 general_induction_var (x
, src_reg
, add_val
, mult_val
)
5237 /* If this is an invariant, forget it, it isn't a giv. */
5238 if (invariant_p (x
) == 1)
5241 /* See if the expression could be a giv and get its form.
5242 Mark our place on the obstack in case we don't find a giv. */
5243 storage
= (char *) oballoc (0);
5244 x
= simplify_giv_expr (x
, &benefit
);
5251 switch (GET_CODE (x
))
5255 /* Since this is now an invariant and wasn't before, it must be a giv
5256 with MULT_VAL == 0. It doesn't matter which BIV we associate this
5258 *src_reg
= loop_iv_list
->biv
->dest_reg
;
5259 *mult_val
= const0_rtx
;
5264 /* This is equivalent to a BIV. */
5266 *mult_val
= const1_rtx
;
5267 *add_val
= const0_rtx
;
5271 /* Either (plus (biv) (invar)) or
5272 (plus (mult (biv) (invar_1)) (invar_2)). */
5273 if (GET_CODE (XEXP (x
, 0)) == MULT
)
5275 *src_reg
= XEXP (XEXP (x
, 0), 0);
5276 *mult_val
= XEXP (XEXP (x
, 0), 1);
5280 *src_reg
= XEXP (x
, 0);
5281 *mult_val
= const1_rtx
;
5283 *add_val
= XEXP (x
, 1);
5287 /* ADD_VAL is zero. */
5288 *src_reg
= XEXP (x
, 0);
5289 *mult_val
= XEXP (x
, 1);
5290 *add_val
= const0_rtx
;
5297 /* Remove any enclosing USE from ADD_VAL and MULT_VAL (there will be
5298 unless they are CONST_INT). */
5299 if (GET_CODE (*add_val
) == USE
)
5300 *add_val
= XEXP (*add_val
, 0);
5301 if (GET_CODE (*mult_val
) == USE
)
5302 *mult_val
= XEXP (*mult_val
, 0);
5304 benefit
+= rtx_cost (orig_x
, SET
);
5306 /* Always return some benefit if this is a giv so it will be detected
5307 as such. This allows elimination of bivs that might otherwise
5308 not be eliminated. */
5309 return benefit
== 0 ? 1 : benefit
;
5312 /* Given an expression, X, try to form it as a linear function of a biv.
5313 We will canonicalize it to be of the form
5314 (plus (mult (BIV) (invar_1))
5316 with possible degeneracies.
5318 The invariant expressions must each be of a form that can be used as a
5319 machine operand. We surround then with a USE rtx (a hack, but localized
5320 and certainly unambiguous!) if not a CONST_INT for simplicity in this
5321 routine; it is the caller's responsibility to strip them.
5323 If no such canonicalization is possible (i.e., two biv's are used or an
5324 expression that is neither invariant nor a biv or giv), this routine
5327 For a non-zero return, the result will have a code of CONST_INT, USE,
5328 REG (for a BIV), PLUS, or MULT. No other codes will occur.
5330 *BENEFIT will be incremented by the benefit of any sub-giv encountered. */
5333 simplify_giv_expr (x
, benefit
)
5337 enum machine_mode mode
= GET_MODE (x
);
5341 /* If this is not an integer mode, or if we cannot do arithmetic in this
5342 mode, this can't be a giv. */
5343 if (mode
!= VOIDmode
5344 && (GET_MODE_CLASS (mode
) != MODE_INT
5345 || GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
))
5348 switch (GET_CODE (x
))
5351 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5352 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5353 if (arg0
== 0 || arg1
== 0)
5356 /* Put constant last, CONST_INT last if both constant. */
5357 if ((GET_CODE (arg0
) == USE
5358 || GET_CODE (arg0
) == CONST_INT
)
5359 && GET_CODE (arg1
) != CONST_INT
)
5360 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5362 /* Handle addition of zero, then addition of an invariant. */
5363 if (arg1
== const0_rtx
)
5365 else if (GET_CODE (arg1
) == CONST_INT
|| GET_CODE (arg1
) == USE
)
5366 switch (GET_CODE (arg0
))
5370 /* Both invariant. Only valid if sum is machine operand.
5371 First strip off possible USE on the operands. */
5372 if (GET_CODE (arg0
) == USE
)
5373 arg0
= XEXP (arg0
, 0);
5375 if (GET_CODE (arg1
) == USE
)
5376 arg1
= XEXP (arg1
, 0);
5379 if (CONSTANT_P (arg0
) && GET_CODE (arg1
) == CONST_INT
)
5381 tem
= plus_constant (arg0
, INTVAL (arg1
));
5382 if (GET_CODE (tem
) != CONST_INT
)
5383 tem
= gen_rtx (USE
, mode
, tem
);
5387 /* Adding two invariants must result in an invariant,
5388 so enclose addition operation inside a USE and
5390 tem
= gen_rtx (USE
, mode
, gen_rtx (PLUS
, mode
, arg0
, arg1
));
5397 /* biv + invar or mult + invar. Return sum. */
5398 return gen_rtx (PLUS
, mode
, arg0
, arg1
);
5401 /* (a + invar_1) + invar_2. Associate. */
5402 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5404 gen_rtx (PLUS
, mode
,
5405 XEXP (arg0
, 1), arg1
)),
5412 /* Each argument must be either REG, PLUS, or MULT. Convert REG to
5413 MULT to reduce cases. */
5414 if (GET_CODE (arg0
) == REG
)
5415 arg0
= gen_rtx (MULT
, mode
, arg0
, const1_rtx
);
5416 if (GET_CODE (arg1
) == REG
)
5417 arg1
= gen_rtx (MULT
, mode
, arg1
, const1_rtx
);
5419 /* Now have PLUS + PLUS, PLUS + MULT, MULT + PLUS, or MULT + MULT.
5420 Put a MULT first, leaving PLUS + PLUS, MULT + PLUS, or MULT + MULT.
5421 Recurse to associate the second PLUS. */
5422 if (GET_CODE (arg1
) == MULT
)
5423 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5425 if (GET_CODE (arg1
) == PLUS
)
5426 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5427 gen_rtx (PLUS
, mode
,
5428 arg0
, XEXP (arg1
, 0)),
5432 /* Now must have MULT + MULT. Distribute if same biv, else not giv. */
5433 if (GET_CODE (arg0
) != MULT
|| GET_CODE (arg1
) != MULT
)
5436 if (XEXP (arg0
, 0) != XEXP (arg1
, 0))
5439 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5441 gen_rtx (PLUS
, mode
,
5447 /* Handle "a - b" as "a + b * (-1)". */
5448 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5450 gen_rtx (MULT
, mode
,
5451 XEXP (x
, 1), constm1_rtx
)),
5455 arg0
= simplify_giv_expr (XEXP (x
, 0), benefit
);
5456 arg1
= simplify_giv_expr (XEXP (x
, 1), benefit
);
5457 if (arg0
== 0 || arg1
== 0)
5460 /* Put constant last, CONST_INT last if both constant. */
5461 if ((GET_CODE (arg0
) == USE
|| GET_CODE (arg0
) == CONST_INT
)
5462 && GET_CODE (arg1
) != CONST_INT
)
5463 tem
= arg0
, arg0
= arg1
, arg1
= tem
;
5465 /* If second argument is not now constant, not giv. */
5466 if (GET_CODE (arg1
) != USE
&& GET_CODE (arg1
) != CONST_INT
)
5469 /* Handle multiply by 0 or 1. */
5470 if (arg1
== const0_rtx
)
5473 else if (arg1
== const1_rtx
)
5476 switch (GET_CODE (arg0
))
5479 /* biv * invar. Done. */
5480 return gen_rtx (MULT
, mode
, arg0
, arg1
);
5483 /* Product of two constants. */
5484 return GEN_INT (INTVAL (arg0
) * INTVAL (arg1
));
5487 /* invar * invar. Not giv. */
5491 /* (a * invar_1) * invar_2. Associate. */
5492 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5494 gen_rtx (MULT
, mode
,
5495 XEXP (arg0
, 1), arg1
)),
5499 /* (a + invar_1) * invar_2. Distribute. */
5500 return simplify_giv_expr (gen_rtx (PLUS
, mode
,
5501 gen_rtx (MULT
, mode
,
5502 XEXP (arg0
, 0), arg1
),
5503 gen_rtx (MULT
, mode
,
5504 XEXP (arg0
, 1), arg1
)),
5512 /* Shift by constant is multiply by power of two. */
5513 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
)
5516 return simplify_giv_expr (gen_rtx (MULT
, mode
,
5518 GEN_INT ((HOST_WIDE_INT
) 1
5519 << INTVAL (XEXP (x
, 1)))),
5523 /* "-a" is "a * (-1)" */
5524 return simplify_giv_expr (gen_rtx (MULT
, mode
, XEXP (x
, 0), constm1_rtx
),
5528 /* "~a" is "-a - 1". Silly, but easy. */
5529 return simplify_giv_expr (gen_rtx (MINUS
, mode
,
5530 gen_rtx (NEG
, mode
, XEXP (x
, 0)),
5535 /* Already in proper form for invariant. */
5539 /* If this is a new register, we can't deal with it. */
5540 if (REGNO (x
) >= max_reg_before_loop
)
5543 /* Check for biv or giv. */
5544 switch (reg_iv_type
[REGNO (x
)])
5548 case GENERAL_INDUCT
:
5550 struct induction
*v
= reg_iv_info
[REGNO (x
)];
5552 /* Form expression from giv and add benefit. Ensure this giv
5553 can derive another and subtract any needed adjustment if so. */
5554 *benefit
+= v
->benefit
;
5558 tem
= gen_rtx (PLUS
, mode
, gen_rtx (MULT
, mode
,
5559 v
->src_reg
, v
->mult_val
),
5561 if (v
->derive_adjustment
)
5562 tem
= gen_rtx (MINUS
, mode
, tem
, v
->derive_adjustment
);
5563 return simplify_giv_expr (tem
, benefit
);
5570 /* Fall through to general case. */
5572 /* If invariant, return as USE (unless CONST_INT).
5573 Otherwise, not giv. */
5574 if (GET_CODE (x
) == USE
)
5577 if (invariant_p (x
) == 1)
5579 if (GET_CODE (x
) == CONST_INT
)
5582 return gen_rtx (USE
, mode
, x
);
5589 /* Help detect a giv that is calculated by several consecutive insns;
5593 The caller has already identified the first insn P as having a giv as dest;
5594 we check that all other insns that set the same register follow
5595 immediately after P, that they alter nothing else,
5596 and that the result of the last is still a giv.
5598 The value is 0 if the reg set in P is not really a giv.
5599 Otherwise, the value is the amount gained by eliminating
5600 all the consecutive insns that compute the value.
5602 FIRST_BENEFIT is the amount gained by eliminating the first insn, P.
5603 SRC_REG is the reg of the biv; DEST_REG is the reg of the giv.
5605 The coefficients of the ultimate giv value are stored in
5606 *MULT_VAL and *ADD_VAL. */
5609 consec_sets_giv (first_benefit
, p
, src_reg
, dest_reg
,
5624 /* Indicate that this is a giv so that we can update the value produced in
5625 each insn of the multi-insn sequence.
5627 This induction structure will be used only by the call to
5628 general_induction_var below, so we can allocate it on our stack.
5629 If this is a giv, our caller will replace the induct var entry with
5630 a new induction structure. */
5632 = (struct induction
*) alloca (sizeof (struct induction
));
5633 v
->src_reg
= src_reg
;
5634 v
->mult_val
= *mult_val
;
5635 v
->add_val
= *add_val
;
5636 v
->benefit
= first_benefit
;
5638 v
->derive_adjustment
= 0;
5640 reg_iv_type
[REGNO (dest_reg
)] = GENERAL_INDUCT
;
5641 reg_iv_info
[REGNO (dest_reg
)] = v
;
5643 count
= n_times_set
[REGNO (dest_reg
)] - 1;
5648 code
= GET_CODE (p
);
5650 /* If libcall, skip to end of call sequence. */
5651 if (code
== INSN
&& (temp
= find_reg_note (p
, REG_LIBCALL
, NULL_RTX
)))
5655 && (set
= single_set (p
))
5656 && GET_CODE (SET_DEST (set
)) == REG
5657 && SET_DEST (set
) == dest_reg
5658 && ((benefit
= general_induction_var (SET_SRC (set
), &src_reg
,
5660 /* Giv created by equivalent expression. */
5661 || ((temp
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
5662 && (benefit
= general_induction_var (XEXP (temp
, 0), &src_reg
,
5663 add_val
, mult_val
))))
5664 && src_reg
== v
->src_reg
)
5666 if (find_reg_note (p
, REG_RETVAL
, NULL_RTX
))
5667 benefit
+= libcall_benefit (p
);
5670 v
->mult_val
= *mult_val
;
5671 v
->add_val
= *add_val
;
5672 v
->benefit
= benefit
;
5674 else if (code
!= NOTE
)
5676 /* Allow insns that set something other than this giv to a
5677 constant. Such insns are needed on machines which cannot
5678 include long constants and should not disqualify a giv. */
5680 && (set
= single_set (p
))
5681 && SET_DEST (set
) != dest_reg
5682 && CONSTANT_P (SET_SRC (set
)))
5685 reg_iv_type
[REGNO (dest_reg
)] = UNKNOWN_INDUCT
;
5693 /* Return an rtx, if any, that expresses giv G2 as a function of the register
5694 represented by G1. If no such expression can be found, or it is clear that
5695 it cannot possibly be a valid address, 0 is returned.
5697 To perform the computation, we note that
5700 where `v' is the biv.
5702 So G2 = (c/a) * G1 + (d - b*c/a) */
5706 express_from (g1
, g2
)
5707 struct induction
*g1
, *g2
;
5711 /* The value that G1 will be multiplied by must be a constant integer. Also,
5712 the only chance we have of getting a valid address is if b*c/a (see above
5713 for notation) is also an integer. */
5714 if (GET_CODE (g1
->mult_val
) != CONST_INT
5715 || GET_CODE (g2
->mult_val
) != CONST_INT
5716 || GET_CODE (g1
->add_val
) != CONST_INT
5717 || g1
->mult_val
== const0_rtx
5718 || INTVAL (g2
->mult_val
) % INTVAL (g1
->mult_val
) != 0)
5721 mult
= GEN_INT (INTVAL (g2
->mult_val
) / INTVAL (g1
->mult_val
));
5722 add
= plus_constant (g2
->add_val
, - INTVAL (g1
->add_val
) * INTVAL (mult
));
5724 /* Form simplified final result. */
5725 if (mult
== const0_rtx
)
5727 else if (mult
== const1_rtx
)
5728 mult
= g1
->dest_reg
;
5730 mult
= gen_rtx (MULT
, g2
->mode
, g1
->dest_reg
, mult
);
5732 if (add
== const0_rtx
)
5735 return gen_rtx (PLUS
, g2
->mode
, mult
, add
);
5739 /* Return 1 if giv G2 can be combined with G1. This means that G2 can use
5740 (either directly or via an address expression) a register used to represent
5741 G1. Set g2->new_reg to a represtation of G1 (normally just
5745 combine_givs_p (g1
, g2
)
5746 struct induction
*g1
, *g2
;
5750 /* If these givs are identical, they can be combined. */
5751 if (rtx_equal_p (g1
->mult_val
, g2
->mult_val
)
5752 && rtx_equal_p (g1
->add_val
, g2
->add_val
))
5754 g2
->new_reg
= g1
->dest_reg
;
5759 /* If G2 can be expressed as a function of G1 and that function is valid
5760 as an address and no more expensive than using a register for G2,
5761 the expression of G2 in terms of G1 can be used. */
5762 if (g2
->giv_type
== DEST_ADDR
5763 && (tem
= express_from (g1
, g2
)) != 0
5764 && memory_address_p (g2
->mem_mode
, tem
)
5765 && ADDRESS_COST (tem
) <= ADDRESS_COST (*g2
->location
))
5775 #ifdef GIV_SORT_CRITERION
5776 /* Compare two givs and sort the most desirable one for combinations first.
5777 This is used only in one qsort call below. */
5781 struct induction
**x
, **y
;
5783 GIV_SORT_CRITERION (*x
, *y
);
5789 /* Check all pairs of givs for iv_class BL and see if any can be combined with
5790 any other. If so, point SAME to the giv combined with and set NEW_REG to
5791 be an expression (in terms of the other giv's DEST_REG) equivalent to the
5792 giv. Also, update BENEFIT and related fields for cost/benefit analysis. */
5796 struct iv_class
*bl
;
5798 struct induction
*g1
, *g2
, **giv_array
, *temp_iv
;
5799 int i
, j
, giv_count
, pass
;
5801 /* Count givs, because bl->giv_count is incorrect here. */
5803 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5807 = (struct induction
**) alloca (giv_count
* sizeof (struct induction
*));
5809 for (g1
= bl
->giv
; g1
; g1
= g1
->next_iv
)
5810 giv_array
[i
++] = g1
;
5812 #ifdef GIV_SORT_CRITERION
5813 /* Sort the givs if GIV_SORT_CRITERION is defined.
5814 This is usually defined for processors which lack
5815 negative register offsets so more givs may be combined. */
5817 if (loop_dump_stream
)
5818 fprintf (loop_dump_stream
, "%d givs counted, sorting...\n", giv_count
);
5820 qsort (giv_array
, giv_count
, sizeof (struct induction
*), giv_sort
);
5823 for (i
= 0; i
< giv_count
; i
++)
5826 for (pass
= 0; pass
<= 1; pass
++)
5827 for (j
= 0; j
< giv_count
; j
++)
5831 /* First try to combine with replaceable givs, then all givs. */
5832 && (g1
->replaceable
|| pass
== 1)
5833 /* If either has already been combined or is to be ignored, can't
5835 && ! g1
->ignore
&& ! g2
->ignore
&& ! g1
->same
&& ! g2
->same
5836 /* If something has been based on G2, G2 cannot itself be based
5837 on something else. */
5838 && ! g2
->combined_with
5839 && combine_givs_p (g1
, g2
))
5841 /* g2->new_reg set by `combine_givs_p' */
5843 g1
->combined_with
= 1;
5845 /* If one of these givs is a DEST_REG that was only used
5846 once, by the other giv, this is actually a single use.
5847 The DEST_REG has the correct cost, while the other giv
5848 counts the REG use too often. */
5849 if (g2
->giv_type
== DEST_REG
5850 && n_times_used
[REGNO (g2
->dest_reg
)] == 1
5851 && reg_mentioned_p (g2
->dest_reg
, PATTERN (g1
->insn
)))
5852 g1
->benefit
= g2
->benefit
;
5853 else if (g1
->giv_type
!= DEST_REG
5854 || n_times_used
[REGNO (g1
->dest_reg
)] != 1
5855 || ! reg_mentioned_p (g1
->dest_reg
,
5856 PATTERN (g2
->insn
)))
5858 g1
->benefit
+= g2
->benefit
;
5859 g1
->times_used
+= g2
->times_used
;
5861 /* ??? The new final_[bg]iv_value code does a much better job
5862 of finding replaceable giv's, and hence this code may no
5863 longer be necessary. */
5864 if (! g2
->replaceable
&& REG_USERVAR_P (g2
->dest_reg
))
5865 g1
->benefit
-= copy_cost
;
5866 g1
->lifetime
+= g2
->lifetime
;
5868 if (loop_dump_stream
)
5869 fprintf (loop_dump_stream
, "giv at %d combined with giv at %d\n",
5870 INSN_UID (g2
->insn
), INSN_UID (g1
->insn
));
5876 /* EMIT code before INSERT_BEFORE to set REG = B * M + A. */
5879 emit_iv_add_mult (b
, m
, a
, reg
, insert_before
)
5880 rtx b
; /* initial value of basic induction variable */
5881 rtx m
; /* multiplicative constant */
5882 rtx a
; /* additive constant */
5883 rtx reg
; /* destination register */
5889 /* Prevent unexpected sharing of these rtx. */
5893 /* Increase the lifetime of any invariants moved further in code. */
5894 update_reg_last_use (a
, insert_before
);
5895 update_reg_last_use (b
, insert_before
);
5896 update_reg_last_use (m
, insert_before
);
5899 result
= expand_mult_add (b
, reg
, m
, a
, GET_MODE (reg
), 0);
5901 emit_move_insn (reg
, result
);
5902 seq
= gen_sequence ();
5905 emit_insn_before (seq
, insert_before
);
5907 record_base_value (REGNO (reg
), b
);
5910 /* Test whether A * B can be computed without
5911 an actual multiply insn. Value is 1 if so. */
5914 product_cheap_p (a
, b
)
5920 struct obstack
*old_rtl_obstack
= rtl_obstack
;
5921 char *storage
= (char *) obstack_alloc (&temp_obstack
, 0);
5924 /* If only one is constant, make it B. */
5925 if (GET_CODE (a
) == CONST_INT
)
5926 tmp
= a
, a
= b
, b
= tmp
;
5928 /* If first constant, both constant, so don't need multiply. */
5929 if (GET_CODE (a
) == CONST_INT
)
5932 /* If second not constant, neither is constant, so would need multiply. */
5933 if (GET_CODE (b
) != CONST_INT
)
5936 /* One operand is constant, so might not need multiply insn. Generate the
5937 code for the multiply and see if a call or multiply, or long sequence
5938 of insns is generated. */
5940 rtl_obstack
= &temp_obstack
;
5942 expand_mult (GET_MODE (a
), a
, b
, NULL_RTX
, 0);
5943 tmp
= gen_sequence ();
5946 if (GET_CODE (tmp
) == SEQUENCE
)
5948 if (XVEC (tmp
, 0) == 0)
5950 else if (XVECLEN (tmp
, 0) > 3)
5953 for (i
= 0; i
< XVECLEN (tmp
, 0); i
++)
5955 rtx insn
= XVECEXP (tmp
, 0, i
);
5957 if (GET_CODE (insn
) != INSN
5958 || (GET_CODE (PATTERN (insn
)) == SET
5959 && GET_CODE (SET_SRC (PATTERN (insn
))) == MULT
)
5960 || (GET_CODE (PATTERN (insn
)) == PARALLEL
5961 && GET_CODE (XVECEXP (PATTERN (insn
), 0, 0)) == SET
5962 && GET_CODE (SET_SRC (XVECEXP (PATTERN (insn
), 0, 0))) == MULT
))
5969 else if (GET_CODE (tmp
) == SET
5970 && GET_CODE (SET_SRC (tmp
)) == MULT
)
5972 else if (GET_CODE (tmp
) == PARALLEL
5973 && GET_CODE (XVECEXP (tmp
, 0, 0)) == SET
5974 && GET_CODE (SET_SRC (XVECEXP (tmp
, 0, 0))) == MULT
)
5977 /* Free any storage we obtained in generating this multiply and restore rtl
5978 allocation to its normal obstack. */
5979 obstack_free (&temp_obstack
, storage
);
5980 rtl_obstack
= old_rtl_obstack
;
5985 /* Check to see if loop can be terminated by a "decrement and branch until
5986 zero" instruction. If so, add a REG_NONNEG note to the branch insn if so.
5987 Also try reversing an increment loop to a decrement loop
5988 to see if the optimization can be performed.
5989 Value is nonzero if optimization was performed. */
5991 /* This is useful even if the architecture doesn't have such an insn,
5992 because it might change a loops which increments from 0 to n to a loop
5993 which decrements from n to 0. A loop that decrements to zero is usually
5994 faster than one that increments from zero. */
5996 /* ??? This could be rewritten to use some of the loop unrolling procedures,
5997 such as approx_final_value, biv_total_increment, loop_iterations, and
5998 final_[bg]iv_value. */
6001 check_dbra_loop (loop_end
, insn_count
, loop_start
)
6006 struct iv_class
*bl
;
6013 rtx before_comparison
;
6016 /* If last insn is a conditional branch, and the insn before tests a
6017 register value, try to optimize it. Otherwise, we can't do anything. */
6019 comparison
= get_condition_for_loop (PREV_INSN (loop_end
));
6020 if (comparison
== 0)
6023 /* Check all of the bivs to see if the compare uses one of them.
6024 Skip biv's set more than once because we can't guarantee that
6025 it will be zero on the last iteration. Also skip if the biv is
6026 used between its update and the test insn. */
6028 for (bl
= loop_iv_list
; bl
; bl
= bl
->next
)
6030 if (bl
->biv_count
== 1
6031 && bl
->biv
->dest_reg
== XEXP (comparison
, 0)
6032 && ! reg_used_between_p (regno_reg_rtx
[bl
->regno
], bl
->biv
->insn
,
6033 PREV_INSN (PREV_INSN (loop_end
))))
6040 /* Look for the case where the basic induction variable is always
6041 nonnegative, and equals zero on the last iteration.
6042 In this case, add a reg_note REG_NONNEG, which allows the
6043 m68k DBRA instruction to be used. */
6045 if (((GET_CODE (comparison
) == GT
6046 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6047 && INTVAL (XEXP (comparison
, 1)) == -1)
6048 || (GET_CODE (comparison
) == NE
&& XEXP (comparison
, 1) == const0_rtx
))
6049 && GET_CODE (bl
->biv
->add_val
) == CONST_INT
6050 && INTVAL (bl
->biv
->add_val
) < 0)
6052 /* Initial value must be greater than 0,
6053 init_val % -dec_value == 0 to ensure that it equals zero on
6054 the last iteration */
6056 if (GET_CODE (bl
->initial_value
) == CONST_INT
6057 && INTVAL (bl
->initial_value
) > 0
6058 && (INTVAL (bl
->initial_value
)
6059 % (-INTVAL (bl
->biv
->add_val
))) == 0)
6061 /* register always nonnegative, add REG_NOTE to branch */
6062 REG_NOTES (PREV_INSN (loop_end
))
6063 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6064 REG_NOTES (PREV_INSN (loop_end
)));
6070 /* If the decrement is 1 and the value was tested as >= 0 before
6071 the loop, then we can safely optimize. */
6072 for (p
= loop_start
; p
; p
= PREV_INSN (p
))
6074 if (GET_CODE (p
) == CODE_LABEL
)
6076 if (GET_CODE (p
) != JUMP_INSN
)
6079 before_comparison
= get_condition_for_loop (p
);
6080 if (before_comparison
6081 && XEXP (before_comparison
, 0) == bl
->biv
->dest_reg
6082 && GET_CODE (before_comparison
) == LT
6083 && XEXP (before_comparison
, 1) == const0_rtx
6084 && ! reg_set_between_p (bl
->biv
->dest_reg
, p
, loop_start
)
6085 && INTVAL (bl
->biv
->add_val
) == -1)
6087 REG_NOTES (PREV_INSN (loop_end
))
6088 = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6089 REG_NOTES (PREV_INSN (loop_end
)));
6096 else if (num_mem_sets
<= 1)
6098 /* Try to change inc to dec, so can apply above optimization. */
6100 all registers modified are induction variables or invariant,
6101 all memory references have non-overlapping addresses
6102 (obviously true if only one write)
6103 allow 2 insns for the compare/jump at the end of the loop. */
6104 /* Also, we must avoid any instructions which use both the reversed
6105 biv and another biv. Such instructions will fail if the loop is
6106 reversed. We meet this condition by requiring that either
6107 no_use_except_counting is true, or else that there is only
6109 int num_nonfixed_reads
= 0;
6110 /* 1 if the iteration var is used only to count iterations. */
6111 int no_use_except_counting
= 0;
6112 /* 1 if the loop has no memory store, or it has a single memory store
6113 which is reversible. */
6114 int reversible_mem_store
= 1;
6116 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6117 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6118 num_nonfixed_reads
+= count_nonfixed_reads (PATTERN (p
));
6120 if (bl
->giv_count
== 0
6121 && ! loop_number_exit_count
[uid_loop_num
[INSN_UID (loop_start
)]])
6123 rtx bivreg
= regno_reg_rtx
[bl
->regno
];
6125 /* If there are no givs for this biv, and the only exit is the
6126 fall through at the end of the the loop, then
6127 see if perhaps there are no uses except to count. */
6128 no_use_except_counting
= 1;
6129 for (p
= loop_start
; p
!= loop_end
; p
= NEXT_INSN (p
))
6130 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
6132 rtx set
= single_set (p
);
6134 if (set
&& GET_CODE (SET_DEST (set
)) == REG
6135 && REGNO (SET_DEST (set
)) == bl
->regno
)
6136 /* An insn that sets the biv is okay. */
6138 else if (p
== prev_nonnote_insn (prev_nonnote_insn (loop_end
))
6139 || p
== prev_nonnote_insn (loop_end
))
6140 /* Don't bother about the end test. */
6142 else if (reg_mentioned_p (bivreg
, PATTERN (p
)))
6143 /* Any other use of the biv is no good. */
6145 no_use_except_counting
= 0;
6151 /* If the loop has a single store, and the destination address is
6152 invariant, then we can't reverse the loop, because this address
6153 might then have the wrong value at loop exit.
6154 This would work if the source was invariant also, however, in that
6155 case, the insn should have been moved out of the loop. */
6157 if (num_mem_sets
== 1)
6158 reversible_mem_store
6159 = (! unknown_address_altered
6160 && ! invariant_p (XEXP (loop_store_mems
[0], 0)));
6162 /* This code only acts for innermost loops. Also it simplifies
6163 the memory address check by only reversing loops with
6164 zero or one memory access.
6165 Two memory accesses could involve parts of the same array,
6166 and that can't be reversed. */
6168 if (num_nonfixed_reads
<= 1
6170 && !loop_has_volatile
6171 && reversible_mem_store
6172 && (no_use_except_counting
6173 || ((bl
->giv_count
+ bl
->biv_count
+ num_mem_sets
6174 + num_movables
+ 2 == insn_count
)
6175 && (bl
== loop_iv_list
&& bl
->next
== 0))))
6179 /* Loop can be reversed. */
6180 if (loop_dump_stream
)
6181 fprintf (loop_dump_stream
, "Can reverse loop\n");
6183 /* Now check other conditions:
6185 The increment must be a constant and the comparison code
6188 This test can probably be improved since +/- 1 in the constant
6189 can be obtained by changing LT to LE and vice versa; this is
6193 && GET_CODE (XEXP (comparison
, 1)) == CONST_INT
6194 /* LE gets turned into LT */
6195 && GET_CODE (comparison
) == LT
)
6197 HOST_WIDE_INT add_val
, comparison_val
;
6200 add_val
= INTVAL (bl
->biv
->add_val
);
6201 comparison_val
= INTVAL (XEXP (comparison
, 1));
6202 initial_value
= bl
->initial_value
;
6204 /* Normalize the initial value if it has no other use
6205 except as a counter. This will allow a few more loops
6207 if (no_use_except_counting
)
6209 comparison_val
= comparison_val
- INTVAL (bl
->initial_value
);
6210 initial_value
= const0_rtx
;
6213 /* If the initial value is not zero, or if the comparison
6214 value is not an exact multiple of the increment, then we
6215 can not reverse this loop. */
6216 if (initial_value
!= const0_rtx
6217 || (comparison_val
% add_val
) != 0)
6220 /* Reset these in case we normalized the initial value
6221 and comparison value above. */
6222 bl
->initial_value
= initial_value
;
6223 XEXP (comparison
, 1) = GEN_INT (comparison_val
);
6225 /* Register will always be nonnegative, with value
6226 0 on last iteration if loop reversed */
6228 /* Save some info needed to produce the new insns. */
6229 reg
= bl
->biv
->dest_reg
;
6230 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 1);
6231 if (jump_label
== pc_rtx
)
6232 jump_label
= XEXP (SET_SRC (PATTERN (PREV_INSN (loop_end
))), 2);
6233 new_add_val
= GEN_INT (- INTVAL (bl
->biv
->add_val
));
6235 final_value
= XEXP (comparison
, 1);
6236 start_value
= GEN_INT (INTVAL (XEXP (comparison
, 1))
6237 - INTVAL (bl
->biv
->add_val
));
6239 /* Initialize biv to start_value before loop start.
6240 The old initializing insn will be deleted as a
6241 dead store by flow.c. */
6242 emit_insn_before (gen_move_insn (reg
, start_value
), loop_start
);
6244 /* Add insn to decrement register, and delete insn
6245 that incremented the register. */
6246 p
= emit_insn_before (gen_add2_insn (reg
, new_add_val
),
6248 delete_insn (bl
->biv
->insn
);
6250 /* Update biv info to reflect its new status. */
6252 bl
->initial_value
= start_value
;
6253 bl
->biv
->add_val
= new_add_val
;
6255 /* Inc LABEL_NUSES so that delete_insn will
6256 not delete the label. */
6257 LABEL_NUSES (XEXP (jump_label
, 0)) ++;
6259 /* Emit an insn after the end of the loop to set the biv's
6260 proper exit value if it is used anywhere outside the loop. */
6261 if ((REGNO_LAST_UID (bl
->regno
)
6262 != INSN_UID (PREV_INSN (PREV_INSN (loop_end
))))
6264 || REGNO_FIRST_UID (bl
->regno
) != INSN_UID (bl
->init_insn
))
6265 emit_insn_after (gen_move_insn (reg
, final_value
),
6268 /* Delete compare/branch at end of loop. */
6269 delete_insn (PREV_INSN (loop_end
));
6270 delete_insn (PREV_INSN (loop_end
));
6272 /* Add new compare/branch insn at end of loop. */
6274 emit_cmp_insn (reg
, const0_rtx
, GE
, NULL_RTX
,
6275 GET_MODE (reg
), 0, 0);
6276 emit_jump_insn (gen_bge (XEXP (jump_label
, 0)));
6277 tem
= gen_sequence ();
6279 emit_jump_insn_before (tem
, loop_end
);
6281 for (tem
= PREV_INSN (loop_end
);
6282 tem
&& GET_CODE (tem
) != JUMP_INSN
; tem
= PREV_INSN (tem
))
6286 JUMP_LABEL (tem
) = XEXP (jump_label
, 0);
6288 /* Increment of LABEL_NUSES done above. */
6289 /* Register is now always nonnegative,
6290 so add REG_NONNEG note to the branch. */
6291 REG_NOTES (tem
) = gen_rtx (EXPR_LIST
, REG_NONNEG
, NULL_RTX
,
6297 /* Mark that this biv has been reversed. Each giv which depends
6298 on this biv, and which is also live past the end of the loop
6299 will have to be fixed up. */
6303 if (loop_dump_stream
)
6304 fprintf (loop_dump_stream
,
6305 "Reversed loop and added reg_nonneg\n");
6315 /* Verify whether the biv BL appears to be eliminable,
6316 based on the insns in the loop that refer to it.
6317 LOOP_START is the first insn of the loop, and END is the end insn.
6319 If ELIMINATE_P is non-zero, actually do the elimination.
6321 THRESHOLD and INSN_COUNT are from loop_optimize and are used to
6322 determine whether invariant insns should be placed inside or at the
6323 start of the loop. */
6326 maybe_eliminate_biv (bl
, loop_start
, end
, eliminate_p
, threshold
, insn_count
)
6327 struct iv_class
*bl
;
6331 int threshold
, insn_count
;
6333 rtx reg
= bl
->biv
->dest_reg
;
6336 /* Scan all insns in the loop, stopping if we find one that uses the
6337 biv in a way that we cannot eliminate. */
6339 for (p
= loop_start
; p
!= end
; p
= NEXT_INSN (p
))
6341 enum rtx_code code
= GET_CODE (p
);
6342 rtx where
= threshold
>= insn_count
? loop_start
: p
;
6344 if ((code
== INSN
|| code
== JUMP_INSN
|| code
== CALL_INSN
)
6345 && reg_mentioned_p (reg
, PATTERN (p
))
6346 && ! maybe_eliminate_biv_1 (PATTERN (p
), p
, bl
, eliminate_p
, where
))
6348 if (loop_dump_stream
)
6349 fprintf (loop_dump_stream
,
6350 "Cannot eliminate biv %d: biv used in insn %d.\n",
6351 bl
->regno
, INSN_UID (p
));
6358 if (loop_dump_stream
)
6359 fprintf (loop_dump_stream
, "biv %d %s eliminated.\n",
6360 bl
->regno
, eliminate_p
? "was" : "can be");
6367 /* If BL appears in X (part of the pattern of INSN), see if we can
6368 eliminate its use. If so, return 1. If not, return 0.
6370 If BIV does not appear in X, return 1.
6372 If ELIMINATE_P is non-zero, actually do the elimination. WHERE indicates
6373 where extra insns should be added. Depending on how many items have been
6374 moved out of the loop, it will either be before INSN or at the start of
6378 maybe_eliminate_biv_1 (x
, insn
, bl
, eliminate_p
, where
)
6380 struct iv_class
*bl
;
6384 enum rtx_code code
= GET_CODE (x
);
6385 rtx reg
= bl
->biv
->dest_reg
;
6386 enum machine_mode mode
= GET_MODE (reg
);
6387 struct induction
*v
;
6396 /* If we haven't already been able to do something with this BIV,
6397 we can't eliminate it. */
6403 /* If this sets the BIV, it is not a problem. */
6404 if (SET_DEST (x
) == reg
)
6407 /* If this is an insn that defines a giv, it is also ok because
6408 it will go away when the giv is reduced. */
6409 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6410 if (v
->giv_type
== DEST_REG
&& SET_DEST (x
) == v
->dest_reg
)
6414 if (SET_DEST (x
) == cc0_rtx
&& SET_SRC (x
) == reg
)
6416 /* Can replace with any giv that was reduced and
6417 that has (MULT_VAL != 0) and (ADD_VAL == 0).
6418 Require a constant for MULT_VAL, so we know it's nonzero.
6419 ??? We disable this optimization to avoid potential
6422 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6423 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6424 && v
->add_val
== const0_rtx
6425 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6429 /* If the giv V had the auto-inc address optimization applied
6430 to it, and INSN occurs between the giv insn and the biv
6431 insn, then we must adjust the value used here.
6432 This is rare, so we don't bother to do so. */
6434 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6435 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6436 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6437 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6443 /* If the giv has the opposite direction of change,
6444 then reverse the comparison. */
6445 if (INTVAL (v
->mult_val
) < 0)
6446 new = gen_rtx (COMPARE
, GET_MODE (v
->new_reg
),
6447 const0_rtx
, v
->new_reg
);
6451 /* We can probably test that giv's reduced reg. */
6452 if (validate_change (insn
, &SET_SRC (x
), new, 0))
6456 /* Look for a giv with (MULT_VAL != 0) and (ADD_VAL != 0);
6457 replace test insn with a compare insn (cmp REDUCED_GIV ADD_VAL).
6458 Require a constant for MULT_VAL, so we know it's nonzero.
6459 ??? Do this only if ADD_VAL is a pointer to avoid a potential
6460 overflow problem. */
6462 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6463 if (CONSTANT_P (v
->mult_val
) && v
->mult_val
!= const0_rtx
6464 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6466 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6467 || GET_CODE (v
->add_val
) == LABEL_REF
6468 || GET_CODE (v
->add_val
) == CONST
6469 || (GET_CODE (v
->add_val
) == REG
6470 && REGNO_POINTER_FLAG (REGNO (v
->add_val
)))))
6472 /* If the giv V had the auto-inc address optimization applied
6473 to it, and INSN occurs between the giv insn and the biv
6474 insn, then we must adjust the value used here.
6475 This is rare, so we don't bother to do so. */
6477 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6478 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6479 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6480 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6486 /* If the giv has the opposite direction of change,
6487 then reverse the comparison. */
6488 if (INTVAL (v
->mult_val
) < 0)
6489 new = gen_rtx (COMPARE
, VOIDmode
, copy_rtx (v
->add_val
),
6492 new = gen_rtx (COMPARE
, VOIDmode
, v
->new_reg
,
6493 copy_rtx (v
->add_val
));
6495 /* Replace biv with the giv's reduced register. */
6496 update_reg_last_use (v
->add_val
, insn
);
6497 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6500 /* Insn doesn't support that constant or invariant. Copy it
6501 into a register (it will be a loop invariant.) */
6502 tem
= gen_reg_rtx (GET_MODE (v
->new_reg
));
6504 emit_insn_before (gen_move_insn (tem
, copy_rtx (v
->add_val
)),
6507 /* Substitute the new register for its invariant value in
6508 the compare expression. */
6509 XEXP (new, (INTVAL (v
->mult_val
) < 0) ? 0 : 1) = tem
;
6510 if (validate_change (insn
, &SET_SRC (PATTERN (insn
)), new, 0))
6519 case GT
: case GE
: case GTU
: case GEU
:
6520 case LT
: case LE
: case LTU
: case LEU
:
6521 /* See if either argument is the biv. */
6522 if (XEXP (x
, 0) == reg
)
6523 arg
= XEXP (x
, 1), arg_operand
= 1;
6524 else if (XEXP (x
, 1) == reg
)
6525 arg
= XEXP (x
, 0), arg_operand
= 0;
6529 if (CONSTANT_P (arg
))
6531 /* First try to replace with any giv that has constant positive
6532 mult_val and constant add_val. We might be able to support
6533 negative mult_val, but it seems complex to do it in general. */
6535 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6536 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6537 && (GET_CODE (v
->add_val
) == SYMBOL_REF
6538 || GET_CODE (v
->add_val
) == LABEL_REF
6539 || GET_CODE (v
->add_val
) == CONST
6540 || (GET_CODE (v
->add_val
) == REG
6541 && REGNO_POINTER_FLAG (REGNO (v
->add_val
))))
6542 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6545 /* If the giv V had the auto-inc address optimization applied
6546 to it, and INSN occurs between the giv insn and the biv
6547 insn, then we must adjust the value used here.
6548 This is rare, so we don't bother to do so. */
6550 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6551 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6552 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6553 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6559 /* Replace biv with the giv's reduced reg. */
6560 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6562 /* If all constants are actually constant integers and
6563 the derived constant can be directly placed in the COMPARE,
6565 if (GET_CODE (arg
) == CONST_INT
6566 && GET_CODE (v
->mult_val
) == CONST_INT
6567 && GET_CODE (v
->add_val
) == CONST_INT
6568 && validate_change (insn
, &XEXP (x
, arg_operand
),
6569 GEN_INT (INTVAL (arg
)
6570 * INTVAL (v
->mult_val
)
6571 + INTVAL (v
->add_val
)), 0))
6574 /* Otherwise, load it into a register. */
6575 tem
= gen_reg_rtx (mode
);
6576 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6577 if (validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 0))
6580 /* If that failed, put back the change we made above. */
6581 XEXP (x
, 1-arg_operand
) = reg
;
6584 /* Look for giv with positive constant mult_val and nonconst add_val.
6585 Insert insns to calculate new compare value.
6586 ??? Turn this off due to possible overflow. */
6588 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6589 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6590 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6596 /* If the giv V had the auto-inc address optimization applied
6597 to it, and INSN occurs between the giv insn and the biv
6598 insn, then we must adjust the value used here.
6599 This is rare, so we don't bother to do so. */
6601 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6602 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6603 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6604 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6610 tem
= gen_reg_rtx (mode
);
6612 /* Replace biv with giv's reduced register. */
6613 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6616 /* Compute value to compare against. */
6617 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
, tem
, where
);
6618 /* Use it in this insn. */
6619 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6620 if (apply_change_group ())
6624 else if (GET_CODE (arg
) == REG
|| GET_CODE (arg
) == MEM
)
6626 if (invariant_p (arg
) == 1)
6628 /* Look for giv with constant positive mult_val and nonconst
6629 add_val. Insert insns to compute new compare value.
6630 ??? Turn this off due to possible overflow. */
6632 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6633 if (CONSTANT_P (v
->mult_val
) && INTVAL (v
->mult_val
) > 0
6634 && ! v
->ignore
&& ! v
->maybe_dead
&& v
->always_computable
6640 /* If the giv V had the auto-inc address optimization applied
6641 to it, and INSN occurs between the giv insn and the biv
6642 insn, then we must adjust the value used here.
6643 This is rare, so we don't bother to do so. */
6645 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6646 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6647 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6648 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6654 tem
= gen_reg_rtx (mode
);
6656 /* Replace biv with giv's reduced register. */
6657 validate_change (insn
, &XEXP (x
, 1 - arg_operand
),
6660 /* Compute value to compare against. */
6661 emit_iv_add_mult (arg
, v
->mult_val
, v
->add_val
,
6663 validate_change (insn
, &XEXP (x
, arg_operand
), tem
, 1);
6664 if (apply_change_group ())
6669 /* This code has problems. Basically, you can't know when
6670 seeing if we will eliminate BL, whether a particular giv
6671 of ARG will be reduced. If it isn't going to be reduced,
6672 we can't eliminate BL. We can try forcing it to be reduced,
6673 but that can generate poor code.
6675 The problem is that the benefit of reducing TV, below should
6676 be increased if BL can actually be eliminated, but this means
6677 we might have to do a topological sort of the order in which
6678 we try to process biv. It doesn't seem worthwhile to do
6679 this sort of thing now. */
6682 /* Otherwise the reg compared with had better be a biv. */
6683 if (GET_CODE (arg
) != REG
6684 || reg_iv_type
[REGNO (arg
)] != BASIC_INDUCT
)
6687 /* Look for a pair of givs, one for each biv,
6688 with identical coefficients. */
6689 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6691 struct induction
*tv
;
6693 if (v
->ignore
|| v
->maybe_dead
|| v
->mode
!= mode
)
6696 for (tv
= reg_biv_class
[REGNO (arg
)]->giv
; tv
; tv
= tv
->next_iv
)
6697 if (! tv
->ignore
&& ! tv
->maybe_dead
6698 && rtx_equal_p (tv
->mult_val
, v
->mult_val
)
6699 && rtx_equal_p (tv
->add_val
, v
->add_val
)
6700 && tv
->mode
== mode
)
6702 /* If the giv V had the auto-inc address optimization applied
6703 to it, and INSN occurs between the giv insn and the biv
6704 insn, then we must adjust the value used here.
6705 This is rare, so we don't bother to do so. */
6707 && ((INSN_LUID (v
->insn
) < INSN_LUID (insn
)
6708 && INSN_LUID (insn
) < INSN_LUID (bl
->biv
->insn
))
6709 || (INSN_LUID (v
->insn
) > INSN_LUID (insn
)
6710 && INSN_LUID (insn
) > INSN_LUID (bl
->biv
->insn
))))
6716 /* Replace biv with its giv's reduced reg. */
6717 XEXP (x
, 1-arg_operand
) = v
->new_reg
;
6718 /* Replace other operand with the other giv's
6720 XEXP (x
, arg_operand
) = tv
->new_reg
;
6727 /* If we get here, the biv can't be eliminated. */
6731 /* If this address is a DEST_ADDR giv, it doesn't matter if the
6732 biv is used in it, since it will be replaced. */
6733 for (v
= bl
->giv
; v
; v
= v
->next_iv
)
6734 if (v
->giv_type
== DEST_ADDR
&& v
->location
== &XEXP (x
, 0))
6742 /* See if any subexpression fails elimination. */
6743 fmt
= GET_RTX_FORMAT (code
);
6744 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6749 if (! maybe_eliminate_biv_1 (XEXP (x
, i
), insn
, bl
,
6750 eliminate_p
, where
))
6755 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6756 if (! maybe_eliminate_biv_1 (XVECEXP (x
, i
, j
), insn
, bl
,
6757 eliminate_p
, where
))
6766 /* Return nonzero if the last use of REG
6767 is in an insn following INSN in the same basic block. */
6770 last_use_this_basic_block (reg
, insn
)
6776 n
&& GET_CODE (n
) != CODE_LABEL
&& GET_CODE (n
) != JUMP_INSN
;
6779 if (REGNO_LAST_UID (REGNO (reg
)) == INSN_UID (n
))
6785 /* Called via `note_stores' to record the initial value of a biv. Here we
6786 just record the location of the set and process it later. */
6789 record_initial (dest
, set
)
6793 struct iv_class
*bl
;
6795 if (GET_CODE (dest
) != REG
6796 || REGNO (dest
) >= max_reg_before_loop
6797 || reg_iv_type
[REGNO (dest
)] != BASIC_INDUCT
)
6800 bl
= reg_biv_class
[REGNO (dest
)];
6802 /* If this is the first set found, record it. */
6803 if (bl
->init_insn
== 0)
6805 bl
->init_insn
= note_insn
;
6810 /* If any of the registers in X are "old" and currently have a last use earlier
6811 than INSN, update them to have a last use of INSN. Their actual last use
6812 will be the previous insn but it will not have a valid uid_luid so we can't
6816 update_reg_last_use (x
, insn
)
6820 /* Check for the case where INSN does not have a valid luid. In this case,
6821 there is no need to modify the regno_last_uid, as this can only happen
6822 when code is inserted after the loop_end to set a pseudo's final value,
6823 and hence this insn will never be the last use of x. */
6824 if (GET_CODE (x
) == REG
&& REGNO (x
) < max_reg_before_loop
6825 && INSN_UID (insn
) < max_uid_for_loop
6826 && uid_luid
[REGNO_LAST_UID (REGNO (x
))] < uid_luid
[INSN_UID (insn
)])
6827 REGNO_LAST_UID (REGNO (x
)) = INSN_UID (insn
);
6831 register char *fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6832 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6835 update_reg_last_use (XEXP (x
, i
), insn
);
6836 else if (fmt
[i
] == 'E')
6837 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6838 update_reg_last_use (XVECEXP (x
, i
, j
), insn
);
6843 /* Given a jump insn JUMP, return the condition that will cause it to branch
6844 to its JUMP_LABEL. If the condition cannot be understood, or is an
6845 inequality floating-point comparison which needs to be reversed, 0 will
6848 If EARLIEST is non-zero, it is a pointer to a place where the earliest
6849 insn used in locating the condition was found. If a replacement test
6850 of the condition is desired, it should be placed in front of that
6851 insn and we will be sure that the inputs are still valid.
6853 The condition will be returned in a canonical form to simplify testing by
6854 callers. Specifically:
6856 (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
6857 (2) Both operands will be machine operands; (cc0) will have been replaced.
6858 (3) If an operand is a constant, it will be the second operand.
6859 (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
6860 for GE, GEU, and LEU. */
6863 get_condition (jump
, earliest
)
6872 int reverse_code
= 0;
6873 int did_reverse_condition
= 0;
6875 /* If this is not a standard conditional jump, we can't parse it. */
6876 if (GET_CODE (jump
) != JUMP_INSN
6877 || ! condjump_p (jump
) || simplejump_p (jump
))
6880 code
= GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 0));
6881 op0
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 0);
6882 op1
= XEXP (XEXP (SET_SRC (PATTERN (jump
)), 0), 1);
6887 /* If this branches to JUMP_LABEL when the condition is false, reverse
6889 if (GET_CODE (XEXP (SET_SRC (PATTERN (jump
)), 2)) == LABEL_REF
6890 && XEXP (XEXP (SET_SRC (PATTERN (jump
)), 2), 0) == JUMP_LABEL (jump
))
6891 code
= reverse_condition (code
), did_reverse_condition
^= 1;
6893 /* If we are comparing a register with zero, see if the register is set
6894 in the previous insn to a COMPARE or a comparison operation. Perform
6895 the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
6898 while (GET_RTX_CLASS (code
) == '<' && op1
== CONST0_RTX (GET_MODE (op0
)))
6900 /* Set non-zero when we find something of interest. */
6904 /* If comparison with cc0, import actual comparison from compare
6908 if ((prev
= prev_nonnote_insn (prev
)) == 0
6909 || GET_CODE (prev
) != INSN
6910 || (set
= single_set (prev
)) == 0
6911 || SET_DEST (set
) != cc0_rtx
)
6914 op0
= SET_SRC (set
);
6915 op1
= CONST0_RTX (GET_MODE (op0
));
6921 /* If this is a COMPARE, pick up the two things being compared. */
6922 if (GET_CODE (op0
) == COMPARE
)
6924 op1
= XEXP (op0
, 1);
6925 op0
= XEXP (op0
, 0);
6928 else if (GET_CODE (op0
) != REG
)
6931 /* Go back to the previous insn. Stop if it is not an INSN. We also
6932 stop if it isn't a single set or if it has a REG_INC note because
6933 we don't want to bother dealing with it. */
6935 if ((prev
= prev_nonnote_insn (prev
)) == 0
6936 || GET_CODE (prev
) != INSN
6937 || FIND_REG_INC_NOTE (prev
, 0)
6938 || (set
= single_set (prev
)) == 0)
6941 /* If this is setting OP0, get what it sets it to if it looks
6943 if (rtx_equal_p (SET_DEST (set
), op0
))
6945 enum machine_mode inner_mode
= GET_MODE (SET_SRC (set
));
6947 if ((GET_CODE (SET_SRC (set
)) == COMPARE
6950 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6951 && (GET_MODE_BITSIZE (inner_mode
)
6952 <= HOST_BITS_PER_WIDE_INT
)
6953 && (STORE_FLAG_VALUE
6954 & ((HOST_WIDE_INT
) 1
6955 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6956 #ifdef FLOAT_STORE_FLAG_VALUE
6958 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6959 && FLOAT_STORE_FLAG_VALUE
< 0)
6962 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')))
6964 else if (((code
== EQ
6966 && (GET_MODE_BITSIZE (inner_mode
)
6967 <= HOST_BITS_PER_WIDE_INT
)
6968 && GET_MODE_CLASS (inner_mode
) == MODE_INT
6969 && (STORE_FLAG_VALUE
6970 & ((HOST_WIDE_INT
) 1
6971 << (GET_MODE_BITSIZE (inner_mode
) - 1))))
6972 #ifdef FLOAT_STORE_FLAG_VALUE
6974 && GET_MODE_CLASS (inner_mode
) == MODE_FLOAT
6975 && FLOAT_STORE_FLAG_VALUE
< 0)
6978 && GET_RTX_CLASS (GET_CODE (SET_SRC (set
))) == '<')
6980 /* We might have reversed a LT to get a GE here. But this wasn't
6981 actually the comparison of data, so we don't flag that we
6982 have had to reverse the condition. */
6983 did_reverse_condition
^= 1;
6991 else if (reg_set_p (op0
, prev
))
6992 /* If this sets OP0, but not directly, we have to give up. */
6997 if (GET_RTX_CLASS (GET_CODE (x
)) == '<')
6998 code
= GET_CODE (x
);
7001 code
= reverse_condition (code
);
7002 did_reverse_condition
^= 1;
7006 op0
= XEXP (x
, 0), op1
= XEXP (x
, 1);
7012 /* If constant is first, put it last. */
7013 if (CONSTANT_P (op0
))
7014 code
= swap_condition (code
), tem
= op0
, op0
= op1
, op1
= tem
;
7016 /* If OP0 is the result of a comparison, we weren't able to find what
7017 was really being compared, so fail. */
7018 if (GET_MODE_CLASS (GET_MODE (op0
)) == MODE_CC
)
7021 /* Canonicalize any ordered comparison with integers involving equality
7022 if we can do computations in the relevant mode and we do not
7025 if (GET_CODE (op1
) == CONST_INT
7026 && GET_MODE (op0
) != VOIDmode
7027 && GET_MODE_BITSIZE (GET_MODE (op0
)) <= HOST_BITS_PER_WIDE_INT
)
7029 HOST_WIDE_INT const_val
= INTVAL (op1
);
7030 unsigned HOST_WIDE_INT uconst_val
= const_val
;
7031 unsigned HOST_WIDE_INT max_val
7032 = (unsigned HOST_WIDE_INT
) GET_MODE_MASK (GET_MODE (op0
));
7037 if (const_val
!= max_val
>> 1)
7038 code
= LT
, op1
= GEN_INT (const_val
+ 1);
7043 != (((HOST_WIDE_INT
) 1
7044 << (GET_MODE_BITSIZE (GET_MODE (op0
)) - 1))))
7045 code
= GT
, op1
= GEN_INT (const_val
- 1);
7049 if (uconst_val
!= max_val
)
7050 code
= LTU
, op1
= GEN_INT (uconst_val
+ 1);
7054 if (uconst_val
!= 0)
7055 code
= GTU
, op1
= GEN_INT (uconst_val
- 1);
7063 /* If this was floating-point and we reversed anything other than an
7064 EQ or NE, return zero. */
7065 if (TARGET_FLOAT_FORMAT
== IEEE_FLOAT_FORMAT
7066 && did_reverse_condition
&& code
!= NE
&& code
!= EQ
7068 && GET_MODE_CLASS (GET_MODE (op0
)) == MODE_FLOAT
)
7072 /* Never return CC0; return zero instead. */
7077 return gen_rtx (code
, VOIDmode
, op0
, op1
);
7080 /* Similar to above routine, except that we also put an invariant last
7081 unless both operands are invariants. */
7084 get_condition_for_loop (x
)
7087 rtx comparison
= get_condition (x
, NULL_PTR
);
7090 || ! invariant_p (XEXP (comparison
, 0))
7091 || invariant_p (XEXP (comparison
, 1)))
7094 return gen_rtx (swap_condition (GET_CODE (comparison
)), VOIDmode
,
7095 XEXP (comparison
, 1), XEXP (comparison
, 0));
7099 /* Analyze a loop in order to instrument it with the use of count register.
7100 loop_start and loop_end are the first and last insns of the loop.
7101 This function works in cooperation with insert_bct ().
7102 loop_can_insert_bct[loop_num] is set according to whether the optimization
7103 is applicable to the loop. When it is applicable, the following variables
7105 loop_start_value[loop_num]
7106 loop_comparison_value[loop_num]
7107 loop_increment[loop_num]
7108 loop_comparison_code[loop_num] */
7111 void analyze_loop_iterations (loop_start
, loop_end
)
7112 rtx loop_start
, loop_end
;
7114 rtx comparison
, comparison_value
;
7115 rtx iteration_var
, initial_value
, increment
;
7116 enum rtx_code comparison_code
;
7122 /* loop_variable mode */
7123 enum machine_mode original_mode
;
7125 /* find the number of the loop */
7126 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7128 /* we change our mind only when we are sure that loop will be instrumented */
7129 loop_can_insert_bct
[loop_num
] = 0;
7131 /* is the optimization suppressed. */
7132 if ( !flag_branch_on_count_reg
)
7135 /* make sure that count-reg is not in use */
7136 if (loop_used_count_register
[loop_num
]){
7137 if (loop_dump_stream
)
7138 fprintf (loop_dump_stream
,
7139 "analyze_loop_iterations %d: BCT instrumentation failed: count register already in use\n",
7144 /* make sure that the function has no indirect jumps. */
7145 if (indirect_jump_in_function
){
7146 if (loop_dump_stream
)
7147 fprintf (loop_dump_stream
,
7148 "analyze_loop_iterations %d: BCT instrumentation failed: indirect jump in function\n",
7153 /* make sure that the last loop insn is a conditional jump */
7154 last_loop_insn
= PREV_INSN (loop_end
);
7155 if (GET_CODE (last_loop_insn
) != JUMP_INSN
|| !condjump_p (last_loop_insn
)) {
7156 if (loop_dump_stream
)
7157 fprintf (loop_dump_stream
,
7158 "analyze_loop_iterations %d: BCT instrumentation failed: invalid jump at loop end\n",
7163 /* First find the iteration variable. If the last insn is a conditional
7164 branch, and the insn preceding it tests a register value, make that
7165 register the iteration variable. */
7167 /* We used to use prev_nonnote_insn here, but that fails because it might
7168 accidentally get the branch for a contained loop if the branch for this
7169 loop was deleted. We can only trust branches immediately before the
7172 comparison
= get_condition_for_loop (last_loop_insn
);
7173 /* ??? Get_condition may switch position of induction variable and
7174 invariant register when it canonicalizes the comparison. */
7176 if (comparison
== 0) {
7177 if (loop_dump_stream
)
7178 fprintf (loop_dump_stream
,
7179 "analyze_loop_iterations %d: BCT instrumentation failed: comparison not found\n",
7184 comparison_code
= GET_CODE (comparison
);
7185 iteration_var
= XEXP (comparison
, 0);
7186 comparison_value
= XEXP (comparison
, 1);
7188 original_mode
= GET_MODE (iteration_var
);
7189 if (GET_MODE_CLASS (original_mode
) != MODE_INT
7190 || GET_MODE_SIZE (original_mode
) != UNITS_PER_WORD
) {
7191 if (loop_dump_stream
)
7192 fprintf (loop_dump_stream
,
7193 "analyze_loop_iterations %d: BCT Instrumentation failed: loop variable not integer\n",
7198 /* get info about loop bounds and increment */
7199 iteration_info (iteration_var
, &initial_value
, &increment
,
7200 loop_start
, loop_end
);
7202 /* make sure that all required loop data were found */
7203 if (!(initial_value
&& increment
&& comparison_value
7204 && invariant_p (comparison_value
) && invariant_p (increment
)
7205 && ! indirect_jump_in_function
))
7207 if (loop_dump_stream
) {
7208 fprintf (loop_dump_stream
,
7209 "analyze_loop_iterations %d: BCT instrumentation failed because of wrong loop: ", loop_num
);
7210 if (!(initial_value
&& increment
&& comparison_value
)) {
7211 fprintf (loop_dump_stream
, "\tbounds not available: ");
7212 if ( ! initial_value
)
7213 fprintf (loop_dump_stream
, "initial ");
7215 fprintf (loop_dump_stream
, "increment ");
7216 if ( ! comparison_value
)
7217 fprintf (loop_dump_stream
, "comparison ");
7218 fprintf (loop_dump_stream
, "\n");
7220 if (!invariant_p (comparison_value
) || !invariant_p (increment
))
7221 fprintf (loop_dump_stream
, "\tloop bounds not invariant\n");
7226 /* make sure that the increment is constant */
7227 if (GET_CODE (increment
) != CONST_INT
) {
7228 if (loop_dump_stream
)
7229 fprintf (loop_dump_stream
,
7230 "analyze_loop_iterations %d: instrumentation failed: not arithmetic loop\n",
7235 /* make sure that the loop contains neither function call, nor jump on table.
7236 (the count register might be altered by the called function, and might
7237 be used for a branch on table). */
7238 for (insn
= loop_start
; insn
&& insn
!= loop_end
; insn
= NEXT_INSN (insn
)) {
7239 if (GET_CODE (insn
) == CALL_INSN
){
7240 if (loop_dump_stream
)
7241 fprintf (loop_dump_stream
,
7242 "analyze_loop_iterations %d: BCT instrumentation failed: function call in the loop\n",
7247 if (GET_CODE (insn
) == JUMP_INSN
7248 && (GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
7249 || GET_CODE (PATTERN (insn
)) == ADDR_VEC
)){
7250 if (loop_dump_stream
)
7251 fprintf (loop_dump_stream
,
7252 "analyze_loop_iterations %d: BCT instrumentation failed: computed branch in the loop\n",
7258 /* At this point, we are sure that the loop can be instrumented with BCT.
7259 Some of the loops, however, will not be instrumented - the final decision
7260 is taken by insert_bct () */
7261 if (loop_dump_stream
)
7262 fprintf (loop_dump_stream
,
7263 "analyze_loop_iterations: loop (luid =%d) can be BCT instrumented.\n",
7266 /* mark all enclosing loops that they cannot use count register */
7267 /* ???: In fact, since insert_bct may decide not to instrument this loop,
7268 marking here may prevent instrumenting an enclosing loop that could
7269 actually be instrumented. But since this is rare, it is safer to mark
7270 here in case the order of calling (analyze/insert)_bct would be changed. */
7271 for (i
=loop_num
; i
!= -1; i
= loop_outer_loop
[i
])
7272 loop_used_count_register
[i
] = 1;
7274 /* Set data structures which will be used by the instrumentation phase */
7275 loop_start_value
[loop_num
] = initial_value
;
7276 loop_comparison_value
[loop_num
] = comparison_value
;
7277 loop_increment
[loop_num
] = increment
;
7278 loop_comparison_code
[loop_num
] = comparison_code
;
7279 loop_can_insert_bct
[loop_num
] = 1;
7283 /* instrument loop for insertion of bct instruction. We distinguish between
7284 loops with compile-time bounds, to those with run-time bounds. The loop
7285 behaviour is analized according to the following characteristics/variables:
7287 ; comparison-value: the value to which the iteration counter is compared.
7288 ; initial-value: iteration-counter initial value.
7289 ; increment: iteration-counter increment.
7290 ; Computed variables:
7291 ; increment-direction: the sign of the increment.
7292 ; compare-direction: '1' for GT, GTE, '-1' for LT, LTE, '0' for NE.
7293 ; range-direction: sign (comparison-value - initial-value)
7294 We give up on the following cases:
7295 ; loop variable overflow.
7296 ; run-time loop bounds with comparison code NE.
7300 insert_bct (loop_start
, loop_end
)
7301 rtx loop_start
, loop_end
;
7303 rtx initial_value
, comparison_value
, increment
;
7304 enum rtx_code comparison_code
;
7306 int increment_direction
, compare_direction
;
7309 /* if the loop condition is <= or >=, the number of iteration
7310 is 1 more than the range of the bounds of the loop */
7311 int add_iteration
= 0;
7313 /* the only machine mode we work with - is the integer of the size that the
7315 enum machine_mode loop_var_mode
= SImode
;
7317 int loop_num
= uid_loop_num
[INSN_UID (loop_start
)];
7319 /* get loop-variables. No need to check that these are valid - already
7320 checked in analyze_loop_iterations (). */
7321 comparison_code
= loop_comparison_code
[loop_num
];
7322 initial_value
= loop_start_value
[loop_num
];
7323 comparison_value
= loop_comparison_value
[loop_num
];
7324 increment
= loop_increment
[loop_num
];
7326 /* check analyze_loop_iterations decision for this loop. */
7327 if (! loop_can_insert_bct
[loop_num
]){
7328 if (loop_dump_stream
)
7329 fprintf (loop_dump_stream
,
7330 "insert_bct: [%d] - was decided not to instrument by analyze_loop_iterations ()\n",
7335 /* It's impossible to instrument a competely unrolled loop. */
7336 if (loop_unroll_factor
[loop_num
] == -1)
7339 /* make sure that the last loop insn is a conditional jump .
7340 This check is repeated from analyze_loop_iterations (),
7341 because unrolling might have changed that. */
7342 if (GET_CODE (PREV_INSN (loop_end
)) != JUMP_INSN
7343 || !condjump_p (PREV_INSN (loop_end
))) {
7344 if (loop_dump_stream
)
7345 fprintf (loop_dump_stream
,
7346 "insert_bct: not instrumenting BCT because of invalid branch\n");
7350 /* fix increment in case loop was unrolled. */
7351 if (loop_unroll_factor
[loop_num
] > 1)
7352 increment
= GEN_INT ( INTVAL (increment
) * loop_unroll_factor
[loop_num
] );
7354 /* determine properties and directions of the loop */
7355 increment_direction
= (INTVAL (increment
) > 0) ? 1:-1;
7356 switch ( comparison_code
) {
7361 compare_direction
= 1;
7368 compare_direction
= -1;
7372 /* in this case we cannot know the number of iterations */
7373 if (loop_dump_stream
)
7374 fprintf (loop_dump_stream
,
7375 "insert_bct: %d: loop cannot be instrumented: == in condition\n",
7382 compare_direction
= 1;
7388 compare_direction
= -1;
7391 compare_direction
= 0;
7398 /* make sure that the loop does not end by an overflow */
7399 if (compare_direction
!= increment_direction
) {
7400 if (loop_dump_stream
)
7401 fprintf (loop_dump_stream
,
7402 "insert_bct: %d: loop cannot be instrumented: terminated by overflow\n",
7407 /* try to instrument the loop. */
7409 /* Handle the simpler case, where the bounds are known at compile time. */
7410 if (GET_CODE (initial_value
) == CONST_INT
&& GET_CODE (comparison_value
) == CONST_INT
)
7413 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7415 /* check the relation between compare-val and initial-val */
7416 int difference
= INTVAL (comparison_value
) - INTVAL (initial_value
);
7417 int range_direction
= (difference
> 0) ? 1 : -1;
7419 /* make sure the loop executes enough iterations to gain from BCT */
7420 if (difference
> -3 && difference
< 3) {
7421 if (loop_dump_stream
)
7422 fprintf (loop_dump_stream
,
7423 "insert_bct: loop %d not BCT instrumented: too small iteration count.\n",
7428 /* make sure that the loop executes at least once */
7429 if ((range_direction
== 1 && compare_direction
== -1)
7430 || (range_direction
== -1 && compare_direction
== 1))
7432 if (loop_dump_stream
)
7433 fprintf (loop_dump_stream
,
7434 "insert_bct: loop %d: does not iterate even once. Not instrumenting.\n",
7439 /* make sure that the loop does not end by an overflow (in compile time
7440 bounds we must have an additional check for overflow, because here
7441 we also support the compare code of 'NE'. */
7442 if (comparison_code
== NE
7443 && increment_direction
!= range_direction
) {
7444 if (loop_dump_stream
)
7445 fprintf (loop_dump_stream
,
7446 "insert_bct (compile time bounds): %d: loop not instrumented: terminated by overflow\n",
7451 /* Determine the number of iterations by:
7453 ; compare-val - initial-val + (increment -1) + additional-iteration
7454 ; num_iterations = -----------------------------------------------------------------
7457 difference
= (range_direction
> 0) ? difference
: -difference
;
7459 fprintf (stderr
, "difference is: %d\n", difference
); /* @*/
7460 fprintf (stderr
, "increment_value_abs is: %d\n", increment_value_abs
); /* @*/
7461 fprintf (stderr
, "add_iteration is: %d\n", add_iteration
); /* @*/
7462 fprintf (stderr
, "INTVAL (comparison_value) is: %d\n", INTVAL (comparison_value
)); /* @*/
7463 fprintf (stderr
, "INTVAL (initial_value) is: %d\n", INTVAL (initial_value
)); /* @*/
7466 if (increment_value_abs
== 0) {
7467 fprintf (stderr
, "insert_bct: error: increment == 0 !!!\n");
7470 n_iterations
= (difference
+ increment_value_abs
- 1 + add_iteration
)
7471 / increment_value_abs
;
7474 fprintf (stderr
, "number of iterations is: %d\n", n_iterations
); /* @*/
7476 instrument_loop_bct (loop_start
, loop_end
, GEN_INT (n_iterations
));
7478 /* Done with this loop. */
7482 /* Handle the more complex case, that the bounds are NOT known at compile time. */
7483 /* In this case we generate run_time calculation of the number of iterations */
7485 /* With runtime bounds, if the compare is of the form '!=' we give up */
7486 if (comparison_code
== NE
) {
7487 if (loop_dump_stream
)
7488 fprintf (loop_dump_stream
,
7489 "insert_bct: fail for loop %d: runtime bounds with != comparison\n",
7495 /* We rely on the existence of run-time guard to ensure that the
7496 loop executes at least once. */
7498 rtx iterations_num_reg
;
7500 int increment_value_abs
= INTVAL (increment
) * increment_direction
;
7502 /* make sure that the increment is a power of two, otherwise (an
7503 expensive) divide is needed. */
7504 if (exact_log2 (increment_value_abs
) == -1)
7506 if (loop_dump_stream
)
7507 fprintf (loop_dump_stream
,
7508 "insert_bct: not instrumenting BCT because the increment is not power of 2\n");
7512 /* compute the number of iterations */
7515 /* CYGNUS LOCAL: HAIFA bug fix */
7518 /* Again, the number of iterations is calculated by:
7520 ; compare-val - initial-val + (increment -1) + additional-iteration
7521 ; num_iterations = -----------------------------------------------------------------
7524 /* ??? Do we have to call copy_rtx here before passing rtx to
7526 if (compare_direction
> 0) {
7527 /* <, <= :the loop variable is increasing */
7528 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, comparison_value
,
7529 initial_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7532 temp_reg
= expand_binop (loop_var_mode
, sub_optab
, initial_value
,
7533 comparison_value
, NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7536 if (increment_value_abs
- 1 + add_iteration
!= 0)
7537 temp_reg
= expand_binop (loop_var_mode
, add_optab
, temp_reg
,
7538 GEN_INT (increment_value_abs
- 1 + add_iteration
),
7539 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7541 if (increment_value_abs
!= 1)
7543 /* ??? This will generate an expensive divide instruction for
7544 most targets. The original authors apparently expected this
7545 to be a shift, since they test for power-of-2 divisors above,
7546 but just naively generating a divide instruction will not give
7547 a shift. It happens to work for the PowerPC target because
7548 the rs6000.md file has a divide pattern that emits shifts.
7549 It will probably not work for any other target. */
7550 iterations_num_reg
= expand_binop (loop_var_mode
, sdiv_optab
,
7552 GEN_INT (increment_value_abs
),
7553 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
7556 iterations_num_reg
= temp_reg
;
7557 /* END CYGNUS LOCAL: HAIFA bug fix */
7559 sequence
= gen_sequence ();
7561 emit_insn_before (sequence
, loop_start
);
7562 instrument_loop_bct (loop_start
, loop_end
, iterations_num_reg
);
7566 /* instrument loop by inserting a bct in it. This is done in the following way:
7567 1. A new register is created and assigned the hard register number of the count
7569 2. In the head of the loop the new variable is initialized by the value passed in the
7570 loop_num_iterations parameter.
7571 3. At the end of the loop, comparison of the register with 0 is generated.
7572 The created comparison follows the pattern defined for the
7573 decrement_and_branch_on_count insn, so this insn will be generated in assembly
7575 4. The compare&branch on the old variable is deleted. So, if the loop-variable was
7576 not used elsewhere, it will be eliminated by data-flow analisys. */
7579 instrument_loop_bct (loop_start
, loop_end
, loop_num_iterations
)
7580 rtx loop_start
, loop_end
;
7581 rtx loop_num_iterations
;
7583 rtx temp_reg1
, temp_reg2
;
7587 enum machine_mode loop_var_mode
= SImode
;
7589 #ifdef HAVE_decrement_and_branch_on_count
7590 if (HAVE_decrement_and_branch_on_count
)
7592 if (loop_dump_stream
)
7593 fprintf (loop_dump_stream
, "Loop: Inserting BCT\n");
7595 /* eliminate the check on the old variable */
7596 delete_insn (PREV_INSN (loop_end
));
7597 delete_insn (PREV_INSN (loop_end
));
7599 /* insert the label which will delimit the start of the loop */
7600 start_label
= gen_label_rtx ();
7601 emit_label_after (start_label
, loop_start
);
7603 /* insert initialization of the count register into the loop header */
7605 temp_reg1
= gen_reg_rtx (loop_var_mode
);
7606 emit_insn (gen_move_insn (temp_reg1
, loop_num_iterations
));
7608 /* this will be count register */
7609 temp_reg2
= gen_rtx (REG
, loop_var_mode
, COUNT_REGISTER_REGNUM
);
7610 /* we have to move the value to the count register from an GPR
7611 because rtx pointed to by loop_num_iterations could contain
7612 expression which cannot be moved into count register */
7613 emit_insn (gen_move_insn (temp_reg2
, temp_reg1
));
7615 sequence
= gen_sequence ();
7617 emit_insn_after (sequence
, loop_start
);
7619 /* insert new comparison on the count register instead of the
7620 old one, generating the needed BCT pattern (that will be
7621 later recognized by assembly generation phase). */
7622 emit_jump_insn_before (gen_decrement_and_branch_on_count (temp_reg2
, start_label
),
7624 LABEL_NUSES (start_label
)++;
7627 #endif /* HAVE_decrement_and_branch_on_count */
7631 /* Scan the function and determine whether it has indirect (computed) jumps.
7633 This is taken mostly from flow.c; similar code exists elsewhere
7634 in the compiler. It may be useful to put this into rtlanal.c. */
7636 indirect_jump_in_function_p (start
)
7640 int is_indirect_jump
= 0;
7642 for (insn
= start
; insn
; insn
= NEXT_INSN (insn
))
7643 if (computed_jump_p (insn
))