re PR fortran/30882 ([4.1 and 4.2 only] size with initialization expression value...
[gcc.git] / gcc / lower-subreg.c
1 /* Decompose multiword subregs.
2 Copyright (C) 2007 Free Software Foundation, Inc.
3 Contributed by Richard Henderson <rth@redhat.com>
4 Ian Lance Taylor <iant@google.com>
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
21 02110-1301, USA. */
22
23 #include "config.h"
24 #include "system.h"
25 #include "coretypes.h"
26 #include "machmode.h"
27 #include "tm.h"
28 #include "rtl.h"
29 #include "tm_p.h"
30 #include "timevar.h"
31 #include "flags.h"
32 #include "insn-config.h"
33 #include "obstack.h"
34 #include "basic-block.h"
35 #include "recog.h"
36 #include "bitmap.h"
37 #include "expr.h"
38 #include "regs.h"
39 #include "tree-pass.h"
40
41 #ifdef STACK_GROWS_DOWNWARD
42 # undef STACK_GROWS_DOWNWARD
43 # define STACK_GROWS_DOWNWARD 1
44 #else
45 # define STACK_GROWS_DOWNWARD 0
46 #endif
47
48 DEF_VEC_P (bitmap);
49 DEF_VEC_ALLOC_P (bitmap,heap);
50
51 /* Decompose multi-word pseudo-registers into individual
52 pseudo-registers when possible. This is possible when all the uses
53 of a multi-word register are via SUBREG, or are copies of the
54 register to another location. Breaking apart the register permits
55 more CSE and permits better register allocation. */
56
57 /* Bit N in this bitmap is set if regno N is used in a context in
58 which we can decompose it. */
59 static bitmap decomposable_context;
60
61 /* Bit N in this bitmap is set if regno N is used in a context in
62 which it can not be decomposed. */
63 static bitmap non_decomposable_context;
64
65 /* Bit N in the bitmap in element M of this array is set if there is a
66 copy from reg M to reg N. */
67 static VEC(bitmap,heap) *reg_copy_graph;
68
69 /* Return whether X is a simple object which we can take a word_mode
70 subreg of. */
71
72 static bool
73 simple_move_operand (rtx x)
74 {
75 if (GET_CODE (x) == SUBREG)
76 x = SUBREG_REG (x);
77
78 if (!OBJECT_P (x))
79 return false;
80
81 if (GET_CODE (x) == LABEL_REF
82 || GET_CODE (x) == SYMBOL_REF
83 || GET_CODE (x) == HIGH
84 || GET_CODE (x) == CONST)
85 return false;
86
87 if (MEM_P (x)
88 && (MEM_VOLATILE_P (x)
89 || mode_dependent_address_p (XEXP (x, 0))))
90 return false;
91
92 return true;
93 }
94
95 /* If INSN is a single set between two objects, return the single set.
96 Such an insn can always be decomposed. INSN should have been
97 passed to recog and extract_insn before this is called. */
98
99 static rtx
100 simple_move (rtx insn)
101 {
102 rtx x;
103 rtx set;
104 enum machine_mode mode;
105
106 if (recog_data.n_operands != 2)
107 return NULL_RTX;
108
109 set = single_set (insn);
110 if (!set)
111 return NULL_RTX;
112
113 x = SET_DEST (set);
114 if (x != recog_data.operand[0] && x != recog_data.operand[1])
115 return NULL_RTX;
116 if (!simple_move_operand (x))
117 return NULL_RTX;
118
119 x = SET_SRC (set);
120 if (x != recog_data.operand[0] && x != recog_data.operand[1])
121 return NULL_RTX;
122 /* For the src we can handle ASM_OPERANDS, and it is beneficial for
123 things like x86 rdtsc which returns a DImode value. */
124 if (GET_CODE (x) != ASM_OPERANDS
125 && !simple_move_operand (x))
126 return NULL_RTX;
127
128 /* We try to decompose in integer modes, to avoid generating
129 inefficient code copying between integer and floating point
130 registers. That means that we can't decompose if this is a
131 non-integer mode for which there is no integer mode of the same
132 size. */
133 mode = GET_MODE (SET_SRC (set));
134 if (!SCALAR_INT_MODE_P (mode)
135 && (mode_for_size (GET_MODE_SIZE (mode) * BITS_PER_UNIT, MODE_INT, 0)
136 == BLKmode))
137 return NULL_RTX;
138
139 /* Reject PARTIAL_INT modes. They are used for processor specific
140 purposes and it's probably best not to tamper with them. */
141 if (GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
142 return NULL_RTX;
143
144 return set;
145 }
146
147 /* If SET is a copy from one multi-word pseudo-register to another,
148 record that in reg_copy_graph. Return whether it is such a
149 copy. */
150
151 static bool
152 find_pseudo_copy (rtx set)
153 {
154 rtx dest = SET_DEST (set);
155 rtx src = SET_SRC (set);
156 unsigned int rd, rs;
157 bitmap b;
158
159 if (!REG_P (dest) || !REG_P (src))
160 return false;
161
162 rd = REGNO (dest);
163 rs = REGNO (src);
164 if (HARD_REGISTER_NUM_P (rd) || HARD_REGISTER_NUM_P (rs))
165 return false;
166
167 if (GET_MODE_SIZE (GET_MODE (dest)) <= UNITS_PER_WORD)
168 return false;
169
170 b = VEC_index (bitmap, reg_copy_graph, rs);
171 if (b == NULL)
172 {
173 b = BITMAP_ALLOC (NULL);
174 VEC_replace (bitmap, reg_copy_graph, rs, b);
175 }
176
177 bitmap_set_bit (b, rd);
178
179 return true;
180 }
181
182 /* Look through the registers in DECOMPOSABLE_CONTEXT. For each case
183 where they are copied to another register, add the register to
184 which they are copied to DECOMPOSABLE_CONTEXT. Use
185 NON_DECOMPOSABLE_CONTEXT to limit this--we don't bother to track
186 copies of registers which are in NON_DECOMPOSABLE_CONTEXT. */
187
188 static void
189 propagate_pseudo_copies (void)
190 {
191 bitmap queue, propagate;
192
193 queue = BITMAP_ALLOC (NULL);
194 propagate = BITMAP_ALLOC (NULL);
195
196 bitmap_copy (queue, decomposable_context);
197 do
198 {
199 bitmap_iterator iter;
200 unsigned int i;
201
202 bitmap_clear (propagate);
203
204 EXECUTE_IF_SET_IN_BITMAP (queue, 0, i, iter)
205 {
206 bitmap b = VEC_index (bitmap, reg_copy_graph, i);
207 if (b)
208 bitmap_ior_and_compl_into (propagate, b, non_decomposable_context);
209 }
210
211 bitmap_and_compl (queue, propagate, decomposable_context);
212 bitmap_ior_into (decomposable_context, propagate);
213 }
214 while (!bitmap_empty_p (queue));
215
216 BITMAP_FREE (queue);
217 BITMAP_FREE (propagate);
218 }
219
220 /* A pointer to one of these values is passed to
221 find_decomposable_subregs via for_each_rtx. */
222
223 enum classify_move_insn
224 {
225 /* Not a simple move from one location to another. */
226 NOT_SIMPLE_MOVE,
227 /* A simple move from one pseudo-register to another with no
228 REG_RETVAL note. */
229 SIMPLE_PSEUDO_REG_MOVE,
230 /* A simple move involving a non-pseudo-register, or from one
231 pseudo-register to another with a REG_RETVAL note. */
232 SIMPLE_MOVE
233 };
234
235 /* This is called via for_each_rtx. If we find a SUBREG which we
236 could use to decompose a pseudo-register, set a bit in
237 DECOMPOSABLE_CONTEXT. If we find an unadorned register which is
238 not a simple pseudo-register copy, DATA will point at the type of
239 move, and we set a bit in DECOMPOSABLE_CONTEXT or
240 NON_DECOMPOSABLE_CONTEXT as appropriate. */
241
242 static int
243 find_decomposable_subregs (rtx *px, void *data)
244 {
245 enum classify_move_insn *pcmi = (enum classify_move_insn *) data;
246 rtx x = *px;
247
248 if (x == NULL_RTX)
249 return 0;
250
251 if (GET_CODE (x) == SUBREG)
252 {
253 rtx inner = SUBREG_REG (x);
254 unsigned int regno, outer_size, inner_size, outer_words, inner_words;
255
256 if (!REG_P (inner))
257 return 0;
258
259 regno = REGNO (inner);
260 if (HARD_REGISTER_NUM_P (regno))
261 return -1;
262
263 outer_size = GET_MODE_SIZE (GET_MODE (x));
264 inner_size = GET_MODE_SIZE (GET_MODE (inner));
265 outer_words = (outer_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
266 inner_words = (inner_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
267
268 /* We only try to decompose single word subregs of multi-word
269 registers. When we find one, we return -1 to avoid iterating
270 over the inner register.
271
272 ??? This doesn't allow, e.g., DImode subregs of TImode values
273 on 32-bit targets. We would need to record the way the
274 pseudo-register was used, and only decompose if all the uses
275 were the same number and size of pieces. Hopefully this
276 doesn't happen much. */
277
278 if (outer_words == 1 && inner_words > 1)
279 {
280 bitmap_set_bit (decomposable_context, regno);
281 return -1;
282 }
283 }
284 else if (REG_P (x))
285 {
286 unsigned int regno;
287
288 /* We will see an outer SUBREG before we see the inner REG, so
289 when we see a plain REG here it means a direct reference to
290 the register.
291
292 If this is not a simple copy from one location to another,
293 then we can not decompose this register. If this is a simple
294 copy from one pseudo-register to another, with no REG_RETVAL
295 note, and the mode is right, then we mark the register as
296 decomposable. Otherwise we don't say anything about this
297 register--it could be decomposed, but whether that would be
298 profitable depends upon how it is used elsewhere.
299
300 We only set bits in the bitmap for multi-word
301 pseudo-registers, since those are the only ones we care about
302 and it keeps the size of the bitmaps down. */
303
304 regno = REGNO (x);
305 if (!HARD_REGISTER_NUM_P (regno)
306 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
307 {
308 switch (*pcmi)
309 {
310 case NOT_SIMPLE_MOVE:
311 bitmap_set_bit (non_decomposable_context, regno);
312 break;
313 case SIMPLE_PSEUDO_REG_MOVE:
314 if (MODES_TIEABLE_P (GET_MODE (x), word_mode))
315 bitmap_set_bit (decomposable_context, regno);
316 break;
317 case SIMPLE_MOVE:
318 break;
319 default:
320 gcc_unreachable ();
321 }
322 }
323 }
324 else if (MEM_P (x))
325 {
326 enum classify_move_insn cmi_mem = NOT_SIMPLE_MOVE;
327
328 /* Any registers used in a MEM do not participate in a
329 SIMPLE_MOVE or SIMPLE_PSEUDO_REG_MOVE. Do our own recursion
330 here, and return -1 to block the parent's recursion. */
331 for_each_rtx (&XEXP (x, 0), find_decomposable_subregs, &cmi_mem);
332 return -1;
333 }
334
335 return 0;
336 }
337
338 /* Decompose REGNO into word-sized components. We smash the REG node
339 in place. This ensures that (1) something goes wrong quickly if we
340 fail to make some replacement, and (2) the debug information inside
341 the symbol table is automatically kept up to date. */
342
343 static void
344 decompose_register (unsigned int regno)
345 {
346 rtx reg;
347 unsigned int words, i;
348 rtvec v;
349
350 reg = regno_reg_rtx[regno];
351
352 regno_reg_rtx[regno] = NULL_RTX;
353 clear_reg_info_regno (regno);
354
355 words = GET_MODE_SIZE (GET_MODE (reg));
356 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
357
358 v = rtvec_alloc (words);
359 for (i = 0; i < words; ++i)
360 RTVEC_ELT (v, i) = gen_reg_rtx_offset (reg, word_mode, i * UNITS_PER_WORD);
361
362 PUT_CODE (reg, CONCATN);
363 XVEC (reg, 0) = v;
364
365 if (dump_file)
366 {
367 fprintf (dump_file, "; Splitting reg %u ->", regno);
368 for (i = 0; i < words; ++i)
369 fprintf (dump_file, " %u", REGNO (XVECEXP (reg, 0, i)));
370 fputc ('\n', dump_file);
371 }
372 }
373
374 /* Get a SUBREG of a CONCATN. */
375
376 static rtx
377 simplify_subreg_concatn (enum machine_mode outermode, rtx op,
378 unsigned int byte)
379 {
380 unsigned int inner_size;
381 enum machine_mode innermode;
382 rtx part;
383 unsigned int final_offset;
384
385 gcc_assert (GET_CODE (op) == CONCATN);
386 gcc_assert (byte % GET_MODE_SIZE (outermode) == 0);
387
388 innermode = GET_MODE (op);
389 gcc_assert (byte < GET_MODE_SIZE (innermode));
390 gcc_assert (GET_MODE_SIZE (outermode) <= GET_MODE_SIZE (innermode));
391
392 inner_size = GET_MODE_SIZE (innermode) / XVECLEN (op, 0);
393 part = XVECEXP (op, 0, byte / inner_size);
394 final_offset = byte % inner_size;
395 if (final_offset + GET_MODE_SIZE (outermode) > inner_size)
396 return NULL_RTX;
397
398 return simplify_gen_subreg (outermode, part, GET_MODE (part), final_offset);
399 }
400
401 /* Wrapper around simplify_gen_subreg which handles CONCATN. */
402
403 static rtx
404 simplify_gen_subreg_concatn (enum machine_mode outermode, rtx op,
405 enum machine_mode innermode, unsigned int byte)
406 {
407 rtx ret;
408
409 /* We have to handle generating a SUBREG of a SUBREG of a CONCATN.
410 If OP is a SUBREG of a CONCATN, then it must be a simple mode
411 change with the same size and offset 0, or it must extract a
412 part. We shouldn't see anything else here. */
413 if (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == CONCATN)
414 {
415 rtx op2;
416
417 if ((GET_MODE_SIZE (GET_MODE (op))
418 == GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))
419 && SUBREG_BYTE (op) == 0)
420 return simplify_gen_subreg_concatn (outermode, SUBREG_REG (op),
421 GET_MODE (SUBREG_REG (op)), byte);
422
423 op2 = simplify_subreg_concatn (GET_MODE (op), SUBREG_REG (op),
424 SUBREG_BYTE (op));
425 if (op2 == NULL_RTX)
426 {
427 /* We don't handle paradoxical subregs here. */
428 gcc_assert (GET_MODE_SIZE (outermode)
429 <= GET_MODE_SIZE (GET_MODE (op)));
430 gcc_assert (GET_MODE_SIZE (GET_MODE (op))
431 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))));
432 op2 = simplify_subreg_concatn (outermode, SUBREG_REG (op),
433 byte + SUBREG_BYTE (op));
434 gcc_assert (op2 != NULL_RTX);
435 return op2;
436 }
437
438 op = op2;
439 gcc_assert (op != NULL_RTX);
440 gcc_assert (innermode == GET_MODE (op));
441 }
442
443 if (GET_CODE (op) == CONCATN)
444 return simplify_subreg_concatn (outermode, op, byte);
445
446 ret = simplify_gen_subreg (outermode, op, innermode, byte);
447
448 /* If we see an insn like (set (reg:DI) (subreg:DI (reg:SI) 0)) then
449 resolve_simple_move will ask for the high part of the paradoxical
450 subreg, which does not have a value. Just return a zero. */
451 if (ret == NULL_RTX
452 && GET_CODE (op) == SUBREG
453 && SUBREG_BYTE (op) == 0
454 && (GET_MODE_SIZE (innermode)
455 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op)))))
456 return CONST0_RTX (outermode);
457
458 gcc_assert (ret != NULL_RTX);
459 return ret;
460 }
461
462 /* Return whether we should resolve X into the registers into which it
463 was decomposed. */
464
465 static bool
466 resolve_reg_p (rtx x)
467 {
468 return GET_CODE (x) == CONCATN;
469 }
470
471 /* Return whether X is a SUBREG of a register which we need to
472 resolve. */
473
474 static bool
475 resolve_subreg_p (rtx x)
476 {
477 if (GET_CODE (x) != SUBREG)
478 return false;
479 return resolve_reg_p (SUBREG_REG (x));
480 }
481
482 /* This is called via for_each_rtx. Look for SUBREGs which need to be
483 decomposed. */
484
485 static int
486 resolve_subreg_use (rtx *px, void *data)
487 {
488 rtx insn = (rtx) data;
489 rtx x = *px;
490
491 if (x == NULL_RTX)
492 return 0;
493
494 if (resolve_subreg_p (x))
495 {
496 x = simplify_subreg_concatn (GET_MODE (x), SUBREG_REG (x),
497 SUBREG_BYTE (x));
498
499 /* It is possible for a note to contain a reference which we can
500 decompose. In this case, return 1 to the caller to indicate
501 that the note must be removed. */
502 if (!x)
503 {
504 gcc_assert (!insn);
505 return 1;
506 }
507
508 validate_change (insn, px, x, 1);
509 return -1;
510 }
511
512 if (resolve_reg_p (x))
513 {
514 /* Return 1 to the caller to indicate that we found a direct
515 reference to a register which is being decomposed. This can
516 happen inside notes. */
517 gcc_assert (!insn);
518 return 1;
519 }
520
521 return 0;
522 }
523
524 /* We are deleting INSN. Move any EH_REGION notes to INSNS. */
525
526 static void
527 move_eh_region_note (rtx insn, rtx insns)
528 {
529 rtx note, p;
530
531 note = find_reg_note (insn, REG_EH_REGION, NULL_RTX);
532 if (note == NULL_RTX)
533 return;
534
535 gcc_assert (CALL_P (insn)
536 || (flag_non_call_exceptions && may_trap_p (PATTERN (insn))));
537
538 for (p = insns; p != NULL_RTX; p = NEXT_INSN (p))
539 {
540 if (CALL_P (p)
541 || (flag_non_call_exceptions
542 && INSN_P (p)
543 && may_trap_p (PATTERN (p))))
544 REG_NOTES (p) = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (note, 0),
545 REG_NOTES (p));
546 }
547 }
548
549 /* If there is a REG_LIBCALL note on OLD_START, move it to NEW_START,
550 and link the corresponding REG_RETVAL note to NEW_START. */
551
552 static void
553 move_libcall_note (rtx old_start, rtx new_start)
554 {
555 rtx note0, note1, end;
556
557 note0 = find_reg_note (old_start, REG_LIBCALL, NULL);
558 if (note0 == NULL_RTX)
559 return;
560
561 remove_note (old_start, note0);
562 end = XEXP (note0, 0);
563 note1 = find_reg_note (end, REG_RETVAL, NULL);
564
565 XEXP (note0, 1) = REG_NOTES (new_start);
566 REG_NOTES (new_start) = note0;
567 XEXP (note1, 0) = new_start;
568 }
569
570 /* Remove any REG_RETVAL note, the corresponding REG_LIBCALL note, and
571 any markers for a no-conflict block. We have decomposed the
572 registers so the non-conflict is now obvious. */
573
574 static void
575 remove_retval_note (rtx insn1)
576 {
577 rtx note0, insn0, note1, insn;
578
579 note1 = find_reg_note (insn1, REG_RETVAL, NULL);
580 if (note1 == NULL_RTX)
581 return;
582
583 insn0 = XEXP (note1, 0);
584 note0 = find_reg_note (insn0, REG_LIBCALL, NULL);
585
586 remove_note (insn0, note0);
587 remove_note (insn1, note1);
588
589 for (insn = insn0; insn != insn1; insn = NEXT_INSN (insn))
590 {
591 while (1)
592 {
593 rtx note;
594
595 note = find_reg_note (insn, REG_NO_CONFLICT, NULL);
596 if (note == NULL_RTX)
597 break;
598 remove_note (insn, note);
599 }
600 }
601 }
602
603 /* Resolve any decomposed registers which appear in register notes on
604 INSN. */
605
606 static void
607 resolve_reg_notes (rtx insn)
608 {
609 rtx *pnote, note;
610
611 note = find_reg_equal_equiv_note (insn);
612 if (note)
613 {
614 if (for_each_rtx (&XEXP (note, 0), resolve_subreg_use, NULL))
615 {
616 remove_note (insn, note);
617 remove_retval_note (insn);
618 }
619 }
620
621 pnote = &REG_NOTES (insn);
622 while (*pnote != NULL_RTX)
623 {
624 bool delete = false;
625
626 note = *pnote;
627 switch (REG_NOTE_KIND (note))
628 {
629 case REG_NO_CONFLICT:
630 if (resolve_reg_p (XEXP (note, 0)))
631 delete = true;
632 break;
633
634 default:
635 break;
636 }
637
638 if (delete)
639 *pnote = XEXP (note, 1);
640 else
641 pnote = &XEXP (note, 1);
642 }
643 }
644
645 /* Return whether X can be decomposed into subwords. */
646
647 static bool
648 can_decompose_p (rtx x)
649 {
650 if (REG_P (x))
651 {
652 unsigned int regno = REGNO (x);
653
654 if (HARD_REGISTER_NUM_P (regno))
655 return (validate_subreg (word_mode, GET_MODE (x), x, UNITS_PER_WORD)
656 && HARD_REGNO_MODE_OK (regno, word_mode));
657 else
658 return !bitmap_bit_p (non_decomposable_context, regno);
659 }
660
661 return true;
662 }
663
664 /* Decompose the registers used in a simple move SET within INSN. If
665 we don't change anything, return INSN, otherwise return the start
666 of the sequence of moves. */
667
668 static rtx
669 resolve_simple_move (rtx set, rtx insn)
670 {
671 rtx src, dest, real_dest, insns;
672 enum machine_mode orig_mode, dest_mode;
673 unsigned int words;
674 bool pushing;
675
676 src = SET_SRC (set);
677 dest = SET_DEST (set);
678 orig_mode = GET_MODE (dest);
679
680 words = (GET_MODE_SIZE (orig_mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
681 if (words <= 1)
682 return insn;
683
684 start_sequence ();
685
686 /* We have to handle copying from a SUBREG of a decomposed reg where
687 the SUBREG is larger than word size. Rather than assume that we
688 can take a word_mode SUBREG of the destination, we copy to a new
689 register and then copy that to the destination. */
690
691 real_dest = NULL_RTX;
692
693 if (GET_CODE (src) == SUBREG
694 && resolve_reg_p (SUBREG_REG (src))
695 && (SUBREG_BYTE (src) != 0
696 || (GET_MODE_SIZE (orig_mode)
697 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))))
698 {
699 real_dest = dest;
700 dest = gen_reg_rtx (orig_mode);
701 if (REG_P (real_dest))
702 REG_ATTRS (dest) = REG_ATTRS (real_dest);
703 }
704
705 /* Similarly if we are copying to a SUBREG of a decomposed reg where
706 the SUBREG is larger than word size. */
707
708 if (GET_CODE (dest) == SUBREG
709 && resolve_reg_p (SUBREG_REG (dest))
710 && (SUBREG_BYTE (dest) != 0
711 || (GET_MODE_SIZE (orig_mode)
712 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))))
713 {
714 rtx reg, minsn, smove;
715
716 reg = gen_reg_rtx (orig_mode);
717 minsn = emit_move_insn (reg, src);
718 smove = single_set (minsn);
719 gcc_assert (smove != NULL_RTX);
720 resolve_simple_move (smove, minsn);
721 src = reg;
722 }
723
724 /* If we didn't have any big SUBREGS of decomposed registers, and
725 neither side of the move is a register we are decomposing, then
726 we don't have to do anything here. */
727
728 if (src == SET_SRC (set)
729 && dest == SET_DEST (set)
730 && !resolve_reg_p (src)
731 && !resolve_subreg_p (src)
732 && !resolve_reg_p (dest)
733 && !resolve_subreg_p (dest))
734 {
735 end_sequence ();
736 return insn;
737 }
738
739 /* It's possible for the code to use a subreg of a decomposed
740 register while forming an address. We need to handle that before
741 passing the address to emit_move_insn. We pass NULL_RTX as the
742 insn parameter to resolve_subreg_use because we can not validate
743 the insn yet. */
744 if (MEM_P (src) || MEM_P (dest))
745 {
746 int acg;
747
748 if (MEM_P (src))
749 for_each_rtx (&XEXP (src, 0), resolve_subreg_use, NULL_RTX);
750 if (MEM_P (dest))
751 for_each_rtx (&XEXP (dest, 0), resolve_subreg_use, NULL_RTX);
752 acg = apply_change_group ();
753 gcc_assert (acg);
754 }
755
756 /* If SRC is a register which we can't decompose, or has side
757 effects, we need to move via a temporary register. */
758
759 if (!can_decompose_p (src)
760 || side_effects_p (src)
761 || GET_CODE (src) == ASM_OPERANDS)
762 {
763 rtx reg;
764
765 reg = gen_reg_rtx (orig_mode);
766 emit_move_insn (reg, src);
767 src = reg;
768 }
769
770 /* If DEST is a register which we can't decompose, or has side
771 effects, we need to first move to a temporary register. We
772 handle the common case of pushing an operand directly. We also
773 go through a temporary register if it holds a floating point
774 value. This gives us better code on systems which can't move
775 data easily between integer and floating point registers. */
776
777 dest_mode = orig_mode;
778 pushing = push_operand (dest, dest_mode);
779 if (!can_decompose_p (dest)
780 || (side_effects_p (dest) && !pushing)
781 || (!SCALAR_INT_MODE_P (dest_mode)
782 && !resolve_reg_p (dest)
783 && !resolve_subreg_p (dest)))
784 {
785 if (real_dest == NULL_RTX)
786 real_dest = dest;
787 if (!SCALAR_INT_MODE_P (dest_mode))
788 {
789 dest_mode = mode_for_size (GET_MODE_SIZE (dest_mode) * BITS_PER_UNIT,
790 MODE_INT, 0);
791 gcc_assert (dest_mode != BLKmode);
792 }
793 dest = gen_reg_rtx (dest_mode);
794 if (REG_P (real_dest))
795 REG_ATTRS (dest) = REG_ATTRS (real_dest);
796 }
797
798 if (pushing)
799 {
800 unsigned int i, j, jinc;
801
802 gcc_assert (GET_MODE_SIZE (orig_mode) % UNITS_PER_WORD == 0);
803 gcc_assert (GET_CODE (XEXP (dest, 0)) != PRE_MODIFY);
804 gcc_assert (GET_CODE (XEXP (dest, 0)) != POST_MODIFY);
805
806 if (WORDS_BIG_ENDIAN == STACK_GROWS_DOWNWARD)
807 {
808 j = 0;
809 jinc = 1;
810 }
811 else
812 {
813 j = words - 1;
814 jinc = -1;
815 }
816
817 for (i = 0; i < words; ++i, j += jinc)
818 {
819 rtx temp;
820
821 temp = copy_rtx (XEXP (dest, 0));
822 temp = adjust_automodify_address_nv (dest, word_mode, temp,
823 j * UNITS_PER_WORD);
824 emit_move_insn (temp,
825 simplify_gen_subreg_concatn (word_mode, src,
826 orig_mode,
827 j * UNITS_PER_WORD));
828 }
829 }
830 else
831 {
832 unsigned int i;
833
834 if (REG_P (dest) && !HARD_REGISTER_NUM_P (REGNO (dest)))
835 emit_insn (gen_rtx_CLOBBER (VOIDmode, dest));
836
837 for (i = 0; i < words; ++i)
838 emit_move_insn (simplify_gen_subreg_concatn (word_mode, dest,
839 dest_mode,
840 i * UNITS_PER_WORD),
841 simplify_gen_subreg_concatn (word_mode, src,
842 orig_mode,
843 i * UNITS_PER_WORD));
844 }
845
846 if (real_dest != NULL_RTX)
847 {
848 rtx mdest, minsn, smove;
849
850 if (dest_mode == orig_mode)
851 mdest = dest;
852 else
853 mdest = simplify_gen_subreg (orig_mode, dest, GET_MODE (dest), 0);
854 minsn = emit_move_insn (real_dest, mdest);
855
856 smove = single_set (minsn);
857 gcc_assert (smove != NULL_RTX);
858
859 resolve_simple_move (smove, minsn);
860 }
861
862 insns = get_insns ();
863 end_sequence ();
864
865 move_eh_region_note (insn, insns);
866
867 emit_insn_before (insns, insn);
868
869 move_libcall_note (insn, insns);
870 remove_retval_note (insn);
871 delete_insn (insn);
872
873 return insns;
874 }
875
876 /* Change a CLOBBER of a decomposed register into a CLOBBER of the
877 component registers. Return whether we changed something. */
878
879 static bool
880 resolve_clobber (rtx pat, rtx insn)
881 {
882 rtx reg;
883 enum machine_mode orig_mode;
884 unsigned int words, i;
885 int ret;
886
887 reg = XEXP (pat, 0);
888 if (!resolve_reg_p (reg) && !resolve_subreg_p (reg))
889 return false;
890
891 orig_mode = GET_MODE (reg);
892 words = GET_MODE_SIZE (orig_mode);
893 words = (words + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
894
895 ret = validate_change (NULL_RTX, &XEXP (pat, 0),
896 simplify_gen_subreg_concatn (word_mode, reg,
897 orig_mode, 0),
898 0);
899 gcc_assert (ret != 0);
900
901 for (i = words - 1; i > 0; --i)
902 {
903 rtx x;
904
905 x = simplify_gen_subreg_concatn (word_mode, reg, orig_mode,
906 i * UNITS_PER_WORD);
907 x = gen_rtx_CLOBBER (VOIDmode, x);
908 emit_insn_after (x, insn);
909 }
910
911 return true;
912 }
913
914 /* A USE of a decomposed register is no longer meaningful. Return
915 whether we changed something. */
916
917 static bool
918 resolve_use (rtx pat, rtx insn)
919 {
920 if (resolve_reg_p (XEXP (pat, 0)) || resolve_subreg_p (XEXP (pat, 0)))
921 {
922 delete_insn (insn);
923 return true;
924 }
925 return false;
926 }
927
928 /* Look for registers which are always accessed via word-sized SUBREGs
929 or via copies. Decompose these registers into several word-sized
930 pseudo-registers. */
931
932 static void
933 decompose_multiword_subregs (bool update_life)
934 {
935 unsigned int max;
936 basic_block bb;
937
938 max = max_reg_num ();
939
940 /* First see if there are any multi-word pseudo-registers. If there
941 aren't, there is nothing we can do. This should speed up this
942 pass in the normal case, since it should be faster than scanning
943 all the insns. */
944 {
945 unsigned int i;
946
947 for (i = FIRST_PSEUDO_REGISTER; i < max; ++i)
948 {
949 if (regno_reg_rtx[i] != NULL
950 && GET_MODE_SIZE (GET_MODE (regno_reg_rtx[i])) > UNITS_PER_WORD)
951 break;
952 }
953 if (i == max)
954 return;
955 }
956
957 /* FIXME: When the dataflow branch is merged, we can change this
958 code to look for each multi-word pseudo-register and to find each
959 insn which sets or uses that register. That should be faster
960 than scanning all the insns. */
961
962 decomposable_context = BITMAP_ALLOC (NULL);
963 non_decomposable_context = BITMAP_ALLOC (NULL);
964
965 reg_copy_graph = VEC_alloc (bitmap, heap, max);
966 VEC_safe_grow (bitmap, heap, reg_copy_graph, max);
967 memset (VEC_address (bitmap, reg_copy_graph), 0, sizeof (bitmap) * max);
968
969 FOR_EACH_BB (bb)
970 {
971 rtx insn;
972
973 FOR_BB_INSNS (bb, insn)
974 {
975 rtx set;
976 enum classify_move_insn cmi;
977 int i, n;
978
979 if (!INSN_P (insn)
980 || GET_CODE (PATTERN (insn)) == CLOBBER
981 || GET_CODE (PATTERN (insn)) == USE)
982 continue;
983
984 recog_memoized (insn);
985 extract_insn (insn);
986
987 set = simple_move (insn);
988
989 if (!set)
990 cmi = NOT_SIMPLE_MOVE;
991 else
992 {
993 bool retval;
994
995 retval = find_reg_note (insn, REG_RETVAL, NULL_RTX) != NULL_RTX;
996
997 if (find_pseudo_copy (set) && !retval)
998 cmi = SIMPLE_PSEUDO_REG_MOVE;
999 else if (retval
1000 && REG_P (SET_SRC (set))
1001 && HARD_REGISTER_P (SET_SRC (set)))
1002 {
1003 rtx note;
1004
1005 /* We don't want to decompose an assignment which
1006 copies the value returned by a libcall to a
1007 pseudo-register. Doing that will lose the RETVAL
1008 note with no real gain. */
1009 cmi = NOT_SIMPLE_MOVE;
1010
1011 /* If we have a RETVAL note, there should be an
1012 EQUAL note. We don't want to decompose any
1013 registers which that EQUAL note refers to
1014 directly. If we do, we will no longer know the
1015 value of the libcall. */
1016 note = find_reg_equal_equiv_note (insn);
1017 if (note != NULL_RTX)
1018 for_each_rtx (&XEXP (note, 0), find_decomposable_subregs,
1019 &cmi);
1020 }
1021 else
1022 cmi = SIMPLE_MOVE;
1023 }
1024
1025 n = recog_data.n_operands;
1026 for (i = 0; i < n; ++i)
1027 {
1028 for_each_rtx (&recog_data.operand[i],
1029 find_decomposable_subregs,
1030 &cmi);
1031
1032 /* We handle ASM_OPERANDS as a special case to support
1033 things like x86 rdtsc which returns a DImode value.
1034 We can decompose the output, which will certainly be
1035 operand 0, but not the inputs. */
1036
1037 if (cmi == SIMPLE_MOVE
1038 && GET_CODE (SET_SRC (set)) == ASM_OPERANDS)
1039 {
1040 gcc_assert (i == 0);
1041 cmi = NOT_SIMPLE_MOVE;
1042 }
1043 }
1044 }
1045 }
1046
1047 bitmap_and_compl_into (decomposable_context, non_decomposable_context);
1048 if (!bitmap_empty_p (decomposable_context))
1049 {
1050 int hold_no_new_pseudos = no_new_pseudos;
1051 int max_regno = max_reg_num ();
1052 sbitmap life_blocks;
1053 sbitmap sub_blocks;
1054 bitmap_iterator iter;
1055 unsigned int regno;
1056
1057 propagate_pseudo_copies ();
1058
1059 no_new_pseudos = 0;
1060 life_blocks = sbitmap_alloc (last_basic_block);
1061 sbitmap_zero (life_blocks);
1062 sub_blocks = sbitmap_alloc (last_basic_block);
1063 sbitmap_zero (sub_blocks);
1064
1065 EXECUTE_IF_SET_IN_BITMAP (decomposable_context, 0, regno, iter)
1066 decompose_register (regno);
1067
1068 FOR_EACH_BB (bb)
1069 {
1070 rtx insn;
1071
1072 FOR_BB_INSNS (bb, insn)
1073 {
1074 rtx next, pat;
1075 bool changed;
1076
1077 if (!INSN_P (insn))
1078 continue;
1079
1080 next = NEXT_INSN (insn);
1081 changed = false;
1082
1083 pat = PATTERN (insn);
1084 if (GET_CODE (pat) == CLOBBER)
1085 {
1086 if (resolve_clobber (pat, insn))
1087 changed = true;
1088 }
1089 else if (GET_CODE (pat) == USE)
1090 {
1091 if (resolve_use (pat, insn))
1092 changed = true;
1093 }
1094 else
1095 {
1096 rtx set;
1097 int i;
1098
1099 recog_memoized (insn);
1100 extract_insn (insn);
1101
1102 set = simple_move (insn);
1103 if (set)
1104 {
1105 rtx orig_insn = insn;
1106 bool cfi = control_flow_insn_p (insn);
1107
1108 insn = resolve_simple_move (set, insn);
1109 if (insn != orig_insn)
1110 {
1111 changed = true;
1112
1113 recog_memoized (insn);
1114 extract_insn (insn);
1115
1116 if (cfi)
1117 SET_BIT (sub_blocks, bb->index);
1118 }
1119 }
1120
1121 for (i = recog_data.n_operands - 1; i >= 0; --i)
1122 for_each_rtx (recog_data.operand_loc[i],
1123 resolve_subreg_use,
1124 insn);
1125
1126 resolve_reg_notes (insn);
1127
1128 if (num_validated_changes () > 0)
1129 {
1130 for (i = recog_data.n_dups - 1; i >= 0; --i)
1131 {
1132 rtx *pl = recog_data.dup_loc[i];
1133 int dup_num = recog_data.dup_num[i];
1134 rtx *px = recog_data.operand_loc[dup_num];
1135
1136 validate_change (insn, pl, *px, 1);
1137 }
1138
1139 i = apply_change_group ();
1140 gcc_assert (i);
1141
1142 changed = true;
1143 }
1144 }
1145
1146 if (changed)
1147 {
1148 SET_BIT (life_blocks, bb->index);
1149 reg_scan_update (insn, next, max_regno);
1150 }
1151 }
1152 }
1153
1154 no_new_pseudos = hold_no_new_pseudos;
1155
1156 if (update_life)
1157 update_life_info (life_blocks, UPDATE_LIFE_GLOBAL_RM_NOTES,
1158 PROP_DEATH_NOTES);
1159
1160 if (sbitmap_first_set_bit (sub_blocks) >= 0)
1161 find_many_sub_basic_blocks (sub_blocks);
1162
1163 sbitmap_free (life_blocks);
1164 sbitmap_free (sub_blocks);
1165 }
1166
1167 {
1168 unsigned int i;
1169 bitmap b;
1170
1171 for (i = 0; VEC_iterate (bitmap, reg_copy_graph, i, b); ++i)
1172 if (b)
1173 BITMAP_FREE (b);
1174 }
1175
1176 VEC_free (bitmap, heap, reg_copy_graph);
1177
1178 BITMAP_FREE (decomposable_context);
1179 BITMAP_FREE (non_decomposable_context);
1180 }
1181 \f
1182 /* Gate function for lower subreg pass. */
1183
1184 static bool
1185 gate_handle_lower_subreg (void)
1186 {
1187 return flag_split_wide_types != 0;
1188 }
1189
1190 /* Implement first lower subreg pass. */
1191
1192 static unsigned int
1193 rest_of_handle_lower_subreg (void)
1194 {
1195 decompose_multiword_subregs (false);
1196 return 0;
1197 }
1198
1199 /* Implement second lower subreg pass. */
1200
1201 static unsigned int
1202 rest_of_handle_lower_subreg2 (void)
1203 {
1204 decompose_multiword_subregs (true);
1205 return 0;
1206 }
1207
1208 struct tree_opt_pass pass_lower_subreg =
1209 {
1210 "subreg", /* name */
1211 gate_handle_lower_subreg, /* gate */
1212 rest_of_handle_lower_subreg, /* execute */
1213 NULL, /* sub */
1214 NULL, /* next */
1215 0, /* static_pass_number */
1216 TV_LOWER_SUBREG, /* tv_id */
1217 0, /* properties_required */
1218 0, /* properties_provided */
1219 0, /* properties_destroyed */
1220 0, /* todo_flags_start */
1221 TODO_dump_func |
1222 TODO_ggc_collect |
1223 TODO_verify_flow, /* todo_flags_finish */
1224 'u' /* letter */
1225 };
1226
1227 struct tree_opt_pass pass_lower_subreg2 =
1228 {
1229 "subreg2", /* name */
1230 gate_handle_lower_subreg, /* gate */
1231 rest_of_handle_lower_subreg2, /* execute */
1232 NULL, /* sub */
1233 NULL, /* next */
1234 0, /* static_pass_number */
1235 TV_LOWER_SUBREG, /* tv_id */
1236 0, /* properties_required */
1237 0, /* properties_provided */
1238 0, /* properties_destroyed */
1239 0, /* todo_flags_start */
1240 TODO_dump_func |
1241 TODO_ggc_collect |
1242 TODO_verify_flow, /* todo_flags_finish */
1243 'U' /* letter */
1244 };