1 /* Local Register Allocator (LRA) intercommunication header file.
2 Copyright (C) 2010-2014 Free Software Foundation, Inc.
3 Contributed by Vladimir Makarov <vmakarov@redhat.com>.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
24 #include "insn-attr.h"
25 #include "insn-codes.h"
26 #include "insn-config.h"
29 #define lra_assert(c) gcc_checking_assert (c)
31 /* The parameter used to prevent infinite reloading for an insn. Each
32 insn operands might require a reload and, if it is a memory, its
33 base and index registers might require a reload too. */
34 #define LRA_MAX_INSN_RELOADS (MAX_RECOG_OPERANDS * 3)
36 typedef struct lra_live_range
*lra_live_range_t
;
38 /* The structure describes program points where a given pseudo lives.
39 The live ranges can be used to find conflicts with other pseudos.
40 If the live ranges of two pseudos are intersected, the pseudos are
44 /* Pseudo regno whose live range is described by given
47 /* Program point range. */
49 /* Next structure describing program points where the pseudo
51 lra_live_range_t next
;
52 /* Pointer to structures with the same start. */
53 lra_live_range_t start_next
;
56 typedef struct lra_copy
*lra_copy_t
;
58 /* Copy between pseudos which affects assigning hard registers. */
61 /* True if regno1 is the destination of the copy. */
63 /* Execution frequency of the copy. */
65 /* Pseudos connected by the copy. REGNO1 < REGNO2. */
67 /* Next copy with correspondingly REGNO1 and REGNO2. */
68 lra_copy_t regno1_next
, regno2_next
;
71 /* Common info about a register (pseudo or hard register). */
74 /* Bitmap of UIDs of insns (including debug insns) referring the
76 bitmap_head insn_bitmap
;
77 /* The following fields are defined only for pseudos. */
78 /* Hard registers with which the pseudo conflicts. */
79 HARD_REG_SET conflict_hard_regs
;
80 /* We assign hard registers to reload pseudos which can occur in few
81 places. So two hard register preferences are enough for them.
82 The following fields define the preferred hard registers. If
83 there are no such hard registers the first field value is
84 negative. If there is only one preferred hard register, the 2nd
86 int preferred_hard_regno1
, preferred_hard_regno2
;
87 /* Profits to use the corresponding preferred hard registers. If
88 the both hard registers defined, the first hard register has not
89 less profit than the second one. */
90 int preferred_hard_regno_profit1
, preferred_hard_regno_profit2
;
92 /* True if the pseudo should not be assigned to a stack register. */
95 #ifdef ENABLE_CHECKING
96 /* True if the pseudo crosses a call. It is setup in lra-lives.c
97 and used to check that the pseudo crossing a call did not get a
98 call used hard register. */
101 /* Number of references and execution frequencies of the register in
102 *non-debug* insns. */
105 /* Regno used to undo the inheritance. It can be non-zero only
106 between couple of inheritance and undo inheritance passes. */
108 /* Value holding by register. If the pseudos have the same value
109 they do not conflict. */
111 /* Offset from relative eliminate register to pesudo reg. */
113 /* These members are set up in lra-lives.c and updated in
115 /* The biggest size mode in which each pseudo reg is referred in
116 whole function (possibly via subreg). */
117 enum machine_mode biggest_mode
;
118 /* Live ranges of the pseudo. */
119 lra_live_range_t live_ranges
;
120 /* This member is set up in lra-lives.c for subsequent
125 /* References to the common info about each register. */
126 extern struct lra_reg
*lra_reg_info
;
128 /* Static info about each insn operand (common for all insns with the
129 same ICODE). Warning: if the structure definition is changed, the
130 initializer for debug_operand_data in lra.c should be changed
132 struct lra_operand_data
134 /* The machine description constraint string of the operand. */
135 const char *constraint
;
136 /* It is taken only from machine description (which is different
137 from recog_data.operand_mode) and can be of VOIDmode. */
138 ENUM_BITFIELD(machine_mode
) mode
: 16;
139 /* The type of the operand (in/out/inout). */
140 ENUM_BITFIELD (op_type
) type
: 8;
141 /* Through if accessed through STRICT_LOW. */
142 unsigned int strict_low
: 1;
143 /* True if the operand is an operator. */
144 unsigned int is_operator
: 1;
145 /* True if there is an early clobber alternative for this operand.
146 This field is set up every time when corresponding
147 operand_alternative in lra_static_insn_data is set up. */
148 unsigned int early_clobber
: 1;
149 /* True if the operand is an address. */
150 unsigned int is_address
: 1;
153 /* Info about register occurrence in an insn. */
156 /* The biggest mode through which the insn refers to the register
157 occurrence (remember the register can be accessed through a
158 subreg in the insn). */
159 ENUM_BITFIELD(machine_mode
) biggest_mode
: 16;
160 /* The type of the corresponding operand which is the register. */
161 ENUM_BITFIELD (op_type
) type
: 8;
162 /* True if the reg is accessed through a subreg and the subreg is
163 just a part of the register. */
164 unsigned int subreg_p
: 1;
165 /* True if there is an early clobber alternative for this
167 unsigned int early_clobber
: 1;
168 /* The corresponding regno of the register. */
170 /* Next reg info of the same insn. */
171 struct lra_insn_reg
*next
;
174 /* Static part (common info for insns with the same ICODE) of LRA
175 internal insn info. It exists in at most one exemplar for each
176 non-negative ICODE. There is only one exception. Each asm insn has
177 own structure. Warning: if the structure definition is changed,
178 the initializer for debug_insn_static_data in lra.c should be
180 struct lra_static_insn_data
182 /* Static info about each insn operand. */
183 struct lra_operand_data
*operand
;
184 /* Each duplication refers to the number of the corresponding
185 operand which is duplicated. */
187 /* The number of an operand marked as commutative, -1 otherwise. */
189 /* Number of operands, duplications, and alternatives of the
194 /* Insns in machine description (or clobbers in asm) may contain
195 explicit hard regs which are not operands. The following list
196 describes such hard registers. */
197 struct lra_insn_reg
*hard_regs
;
198 /* Array [n_alternatives][n_operand] of static constraint info for
199 given operand in given alternative. This info can be changed if
200 the target reg info is changed. */
201 struct operand_alternative
*operand_alternative
;
204 /* LRA internal info about an insn (LRA internal insn
206 struct lra_insn_recog_data
210 /* The alternative should be used for the insn, -1 if invalid, or we
211 should try to use any alternative, or the insn is a debug
213 int used_insn_alternative
;
214 /* SP offset before the insn relative to one at the func start. */
215 HOST_WIDE_INT sp_offset
;
216 /* The insn itself. */
218 /* Common data for insns with the same ICODE. Asm insns (their
219 ICODE is negative) do not share such structures. */
220 struct lra_static_insn_data
*insn_static_data
;
221 /* Two arrays of size correspondingly equal to the operand and the
222 duplication numbers: */
223 rtx
**operand_loc
; /* The operand locations, NULL if no operands. */
224 rtx
**dup_loc
; /* The dup locations, NULL if no dups. */
225 /* Number of hard registers implicitly used in given call insn. The
226 value can be NULL or points to array of the hard register numbers
227 ending with a negative value. */
229 /* Alternative enabled for the insn. NULL for debug insns. */
230 alternative_mask enabled_alternatives
;
231 /* The following member value is always NULL for a debug insn. */
232 struct lra_insn_reg
*regs
;
235 typedef struct lra_insn_recog_data
*lra_insn_recog_data_t
;
237 /* Whether the clobber is used temporary in LRA. */
238 #define LRA_TEMP_CLOBBER_P(x) \
239 (RTL_FLAG_CHECK1 ("TEMP_CLOBBER_P", (x), CLOBBER)->unchanging)
241 /* Cost factor for each additional reload and maximal cost reject for
242 insn reloads. One might ask about such strange numbers. Their
243 values occurred historically from former reload pass. */
244 #define LRA_LOSER_COST_FACTOR 6
245 #define LRA_MAX_REJECT 600
247 /* Maximum allowed number of constraint pass iterations after the last
248 spill pass. It is for preventing LRA cycling in a bug case. */
249 #define LRA_MAX_CONSTRAINT_ITERATION_NUMBER 30
251 /* The maximal number of inheritance/split passes in LRA. It should
252 be more 1 in order to perform caller saves transformations and much
253 less MAX_CONSTRAINT_ITERATION_NUMBER to prevent LRA to do as many
254 as permitted constraint passes in some complicated cases. The
255 first inheritance/split pass has a biggest impact on generated code
256 quality. Each subsequent affects generated code in less degree.
257 For example, the 3rd pass does not change generated SPEC2000 code
259 #define LRA_MAX_INHERITANCE_PASSES 2
261 #if LRA_MAX_INHERITANCE_PASSES <= 0 \
262 || LRA_MAX_INHERITANCE_PASSES >= LRA_MAX_CONSTRAINT_ITERATION_NUMBER - 8
263 #error wrong LRA_MAX_INHERITANCE_PASSES value
268 extern FILE *lra_dump_file
;
270 extern bool lra_reg_spill_p
;
272 extern HARD_REG_SET lra_no_alloc_regs
;
274 extern int lra_insn_recog_data_len
;
275 extern lra_insn_recog_data_t
*lra_insn_recog_data
;
277 extern int lra_curr_reload_num
;
279 extern void lra_push_insn (rtx
);
280 extern void lra_push_insn_by_uid (unsigned int);
281 extern void lra_push_insn_and_update_insn_regno_info (rtx
);
282 extern rtx
lra_pop_insn (void);
283 extern unsigned int lra_insn_stack_length (void);
285 extern rtx
lra_create_new_reg_with_unique_value (enum machine_mode
, rtx
,
286 enum reg_class
, const char *);
287 extern void lra_set_regno_unique_value (int);
288 extern void lra_invalidate_insn_data (rtx
);
289 extern void lra_set_insn_deleted (rtx
);
290 extern void lra_delete_dead_insn (rtx
);
291 extern void lra_emit_add (rtx
, rtx
, rtx
);
292 extern void lra_emit_move (rtx
, rtx
);
293 extern void lra_update_dups (lra_insn_recog_data_t
, signed char *);
295 extern void lra_process_new_insns (rtx
, rtx
, rtx
, const char *);
297 extern lra_insn_recog_data_t
lra_set_insn_recog_data (rtx
);
298 extern lra_insn_recog_data_t
lra_update_insn_recog_data (rtx
);
299 extern void lra_set_used_insn_alternative (rtx
, int);
300 extern void lra_set_used_insn_alternative_by_uid (int, int);
302 extern void lra_invalidate_insn_regno_info (rtx
);
303 extern void lra_update_insn_regno_info (rtx
);
304 extern struct lra_insn_reg
*lra_get_insn_regs (int);
306 extern void lra_free_copies (void);
307 extern void lra_create_copy (int, int, int);
308 extern lra_copy_t
lra_get_copy (int);
309 extern bool lra_former_scratch_p (int);
310 extern bool lra_former_scratch_operand_p (rtx
, int);
312 extern int lra_new_regno_start
;
313 extern int lra_constraint_new_regno_start
;
314 extern bitmap_head lra_inheritance_pseudos
;
315 extern bitmap_head lra_split_regs
;
316 extern bitmap_head lra_subreg_reload_pseudos
;
317 extern bitmap_head lra_optional_reload_pseudos
;
318 extern int lra_constraint_new_insn_uid_start
;
320 /* lra-constraints.c: */
322 extern void lra_init_equiv (void);
323 extern int lra_constraint_offset (int, enum machine_mode
);
325 extern int lra_constraint_iter
;
326 extern int lra_constraint_iter_after_spill
;
327 extern bool lra_risky_transformations_p
;
328 extern int lra_inheritance_iter
;
329 extern int lra_undo_inheritance_iter
;
330 extern bool lra_constraints (bool);
331 extern void lra_constraints_init (void);
332 extern void lra_constraints_finish (void);
333 extern void lra_inheritance (void);
334 extern bool lra_undo_inheritance (void);
338 extern int lra_live_max_point
;
339 extern int *lra_point_freq
;
341 extern int lra_hard_reg_usage
[FIRST_PSEUDO_REGISTER
];
343 extern int lra_live_range_iter
;
344 extern void lra_create_live_ranges (bool);
345 extern lra_live_range_t
lra_copy_live_range_list (lra_live_range_t
);
346 extern lra_live_range_t
lra_merge_live_ranges (lra_live_range_t
,
348 extern bool lra_intersected_live_ranges_p (lra_live_range_t
,
350 extern void lra_print_live_range_list (FILE *, lra_live_range_t
);
351 extern void debug (lra_live_range
&ref
);
352 extern void debug (lra_live_range
*ptr
);
353 extern void lra_debug_live_range_list (lra_live_range_t
);
354 extern void lra_debug_pseudo_live_ranges (int);
355 extern void lra_debug_live_ranges (void);
356 extern void lra_clear_live_ranges (void);
357 extern void lra_live_ranges_init (void);
358 extern void lra_live_ranges_finish (void);
359 extern void lra_setup_reload_pseudo_preferenced_hard_reg (int, int, int);
363 extern void lra_setup_reg_renumber (int, int, bool);
364 extern bool lra_assign (void);
367 /* lra-coalesce.c: */
369 extern int lra_coalesce_iter
;
370 extern bool lra_coalesce (void);
374 extern bool lra_need_for_spills_p (void);
375 extern void lra_spill (void);
376 extern void lra_final_code_change (void);
379 /* lra-elimination.c: */
381 extern void lra_debug_elim_table (void);
382 extern int lra_get_elimination_hard_regno (int);
383 extern rtx
lra_eliminate_regs_1 (rtx
, rtx
, enum machine_mode
, bool, bool, bool);
384 extern void lra_eliminate (bool, bool);
386 extern void lra_eliminate_reg_if_possible (rtx
*);
390 /* Return the hard register which given pseudo REGNO assigned to.
391 Negative value means that the register got memory or we don't know
394 lra_get_regno_hard_regno (int regno
)
397 return reg_renumber
[regno
];
400 /* Change class of pseudo REGNO to NEW_CLASS. Print info about it
401 using TITLE. Output a new line if NL_P. */
403 lra_change_class (int regno
, enum reg_class new_class
,
404 const char *title
, bool nl_p
)
406 lra_assert (regno
>= FIRST_PSEUDO_REGISTER
);
407 if (lra_dump_file
!= NULL
)
408 fprintf (lra_dump_file
, "%s class %s for r%d",
409 title
, reg_class_names
[new_class
], regno
);
410 setup_reg_classes (regno
, new_class
, NO_REGS
, new_class
);
411 if (lra_dump_file
!= NULL
&& nl_p
)
412 fprintf (lra_dump_file
, "\n");
415 /* Update insn operands which are duplication of NOP operand. The
416 insn is represented by its LRA internal representation ID. */
418 lra_update_dup (lra_insn_recog_data_t id
, int nop
)
421 struct lra_static_insn_data
*static_id
= id
->insn_static_data
;
423 for (i
= 0; i
< static_id
->n_dups
; i
++)
424 if (static_id
->dup_num
[i
] == nop
)
425 *id
->dup_loc
[i
] = *id
->operand_loc
[nop
];
428 /* Process operator duplications in insn with ID. We do it after the
429 operands processing. Generally speaking, we could do this probably
430 simultaneously with operands processing because a common practice
431 is to enumerate the operators after their operands. */
433 lra_update_operator_dups (lra_insn_recog_data_t id
)
436 struct lra_static_insn_data
*static_id
= id
->insn_static_data
;
438 for (i
= 0; i
< static_id
->n_dups
; i
++)
440 int ndup
= static_id
->dup_num
[i
];
442 if (static_id
->operand
[ndup
].is_operator
)
443 *id
->dup_loc
[i
] = *id
->operand_loc
[ndup
];
447 /* Return info about INSN. Set up the info if it is not done yet. */
448 static inline lra_insn_recog_data_t
449 lra_get_insn_recog_data (rtx insn
)
451 lra_insn_recog_data_t data
;
452 unsigned int uid
= INSN_UID (insn
);
454 if (lra_insn_recog_data_len
> (int) uid
455 && (data
= lra_insn_recog_data
[uid
]) != NULL
)
457 /* Check that we did not change insn without updating the insn
459 lra_assert (data
->insn
== insn
460 && (INSN_CODE (insn
) < 0
461 || data
->icode
== INSN_CODE (insn
)));
464 return lra_set_insn_recog_data (insn
);
467 /* Update offset from pseudos with VAL by INCR. */
469 lra_update_reg_val_offset (int val
, int incr
)
473 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_reg_num (); i
++)
475 if (lra_reg_info
[i
].val
== val
)
476 lra_reg_info
[i
].offset
+= incr
;
480 /* Return true if register content is equal to VAL with OFFSET. */
482 lra_reg_val_equal_p (int regno
, int val
, int offset
)
484 if (lra_reg_info
[regno
].val
== val
485 && lra_reg_info
[regno
].offset
== offset
)
491 /* Assign value of register FROM to TO. */
493 lra_assign_reg_val (int from
, int to
)
495 lra_reg_info
[to
].val
= lra_reg_info
[from
].val
;
496 lra_reg_info
[to
].offset
= lra_reg_info
[from
].offset
;
500 struct target_lra_int
502 /* Map INSN_UID -> the operand alternative data (NULL if unknown).
503 We assume that this data is valid until register info is changed
504 because classes in the data can be changed. */
505 struct operand_alternative
*x_op_alt_data
[LAST_INSN_CODE
];
508 extern struct target_lra_int default_target_lra_int
;
509 #if SWITCHABLE_TARGET
510 extern struct target_lra_int
*this_target_lra_int
;
512 #define this_target_lra_int (&default_target_lra_int)
515 #define op_alt_data (this_target_lra_int->x_op_alt_data)