1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
4 2011, 2012 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
44 #include "basic-block.h"
47 struct target_optabs default_target_optabs
;
48 struct target_libfuncs default_target_libfuncs
;
50 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
51 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
54 #define libfunc_hash \
55 (this_target_libfuncs->x_libfunc_hash)
57 /* Contains the optab used for each rtx code. */
58 optab code_to_optab
[NUM_RTX_CODE
+ 1];
60 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
62 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
63 static void emit_libcall_block_1 (rtx
, rtx
, rtx
, rtx
, bool);
65 /* Debug facility for use in GDB. */
66 void debug_optab_libfuncs (void);
68 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
69 #if ENABLE_DECIMAL_BID_FORMAT
70 #define DECIMAL_PREFIX "bid_"
72 #define DECIMAL_PREFIX "dpd_"
75 /* Used for libfunc_hash. */
78 hash_libfunc (const void *p
)
80 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
82 return (((int) e
->mode1
+ (int) e
->mode2
* NUM_MACHINE_MODES
)
86 /* Used for libfunc_hash. */
89 eq_libfunc (const void *p
, const void *q
)
91 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
92 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
94 return (e1
->optab
== e2
->optab
95 && e1
->mode1
== e2
->mode1
96 && e1
->mode2
== e2
->mode2
);
99 /* Return libfunc corresponding operation defined by OPTAB converting
100 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
101 if no libfunc is available. */
103 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
104 enum machine_mode mode2
)
106 struct libfunc_entry e
;
107 struct libfunc_entry
**slot
;
109 e
.optab
= (size_t) (optab
- &convert_optab_table
[0]);
112 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
115 if (optab
->libcall_gen
)
117 optab
->libcall_gen (optab
, optab
->libcall_basename
, mode1
, mode2
);
118 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
120 return (*slot
)->libfunc
;
126 return (*slot
)->libfunc
;
129 /* Return libfunc corresponding operation defined by OPTAB in MODE.
130 Trigger lazy initialization if needed, return NULL if no libfunc is
133 optab_libfunc (optab optab
, enum machine_mode mode
)
135 struct libfunc_entry e
;
136 struct libfunc_entry
**slot
;
138 e
.optab
= (size_t) (optab
- &optab_table
[0]);
141 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
144 if (optab
->libcall_gen
)
146 optab
->libcall_gen (optab
, optab
->libcall_basename
,
147 optab
->libcall_suffix
, mode
);
148 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
,
151 return (*slot
)->libfunc
;
157 return (*slot
)->libfunc
;
161 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
162 the result of operation CODE applied to OP0 (and OP1 if it is a binary
165 If the last insn does not set TARGET, don't do anything, but return 1.
167 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
168 don't add the REG_EQUAL note but return 0. Our caller can then try
169 again, ensuring that TARGET is not one of the operands. */
172 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
174 rtx last_insn
, insn
, set
;
177 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
179 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
180 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
181 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
182 && GET_RTX_CLASS (code
) != RTX_COMPARE
183 && GET_RTX_CLASS (code
) != RTX_UNARY
)
186 if (GET_CODE (target
) == ZERO_EXTRACT
)
189 for (last_insn
= insns
;
190 NEXT_INSN (last_insn
) != NULL_RTX
;
191 last_insn
= NEXT_INSN (last_insn
))
194 set
= single_set (last_insn
);
198 if (! rtx_equal_p (SET_DEST (set
), target
)
199 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
200 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
201 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
204 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
205 besides the last insn. */
206 if (reg_overlap_mentioned_p (target
, op0
)
207 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
209 insn
= PREV_INSN (last_insn
);
210 while (insn
!= NULL_RTX
)
212 if (reg_set_p (target
, insn
))
215 insn
= PREV_INSN (insn
);
219 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
229 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (target
) != GET_MODE (op0
))
231 note
= gen_rtx_fmt_e (code
, GET_MODE (op0
), copy_rtx (op0
));
232 if (GET_MODE_SIZE (GET_MODE (op0
))
233 > GET_MODE_SIZE (GET_MODE (target
)))
234 note
= simplify_gen_unary (TRUNCATE
, GET_MODE (target
),
235 note
, GET_MODE (op0
));
237 note
= simplify_gen_unary (ZERO_EXTEND
, GET_MODE (target
),
238 note
, GET_MODE (op0
));
243 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
247 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
249 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
254 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
255 for a widening operation would be. In most cases this would be OP0, but if
256 that's a constant it'll be VOIDmode, which isn't useful. */
258 static enum machine_mode
259 widened_mode (enum machine_mode to_mode
, rtx op0
, rtx op1
)
261 enum machine_mode m0
= GET_MODE (op0
);
262 enum machine_mode m1
= GET_MODE (op1
);
263 enum machine_mode result
;
265 if (m0
== VOIDmode
&& m1
== VOIDmode
)
267 else if (m0
== VOIDmode
|| GET_MODE_SIZE (m0
) < GET_MODE_SIZE (m1
))
272 if (GET_MODE_SIZE (result
) > GET_MODE_SIZE (to_mode
))
278 /* Find a widening optab even if it doesn't widen as much as we want.
279 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
280 direct HI->SI insn, then return SI->DI, if that exists.
281 If PERMIT_NON_WIDENING is non-zero then this can be used with
282 non-widening optabs also. */
285 find_widening_optab_handler_and_mode (optab op
, enum machine_mode to_mode
,
286 enum machine_mode from_mode
,
287 int permit_non_widening
,
288 enum machine_mode
*found_mode
)
290 for (; (permit_non_widening
|| from_mode
!= to_mode
)
291 && GET_MODE_SIZE (from_mode
) <= GET_MODE_SIZE (to_mode
)
292 && from_mode
!= VOIDmode
;
293 from_mode
= GET_MODE_WIDER_MODE (from_mode
))
295 enum insn_code handler
= widening_optab_handler (op
, to_mode
,
298 if (handler
!= CODE_FOR_nothing
)
301 *found_mode
= from_mode
;
306 return CODE_FOR_nothing
;
309 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
310 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
311 not actually do a sign-extend or zero-extend, but can leave the
312 higher-order bits of the result rtx undefined, for example, in the case
313 of logical operations, but not right shifts. */
316 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
317 int unsignedp
, int no_extend
)
321 /* If we don't have to extend and this is a constant, return it. */
322 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
325 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
326 extend since it will be more efficient to do so unless the signedness of
327 a promoted object differs from our extension. */
329 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
330 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
331 return convert_modes (mode
, oldmode
, op
, unsignedp
);
333 /* If MODE is no wider than a single word, we return a paradoxical
335 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
336 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
338 /* Otherwise, get an object of MODE, clobber it, and set the low-order
341 result
= gen_reg_rtx (mode
);
342 emit_clobber (result
);
343 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
347 /* Return the optab used for computing the operation given by the tree code,
348 CODE and the tree EXP. This function is not always usable (for example, it
349 cannot give complete results for multiplication or division) but probably
350 ought to be relied on more widely throughout the expander. */
352 optab_for_tree_code (enum tree_code code
, const_tree type
,
353 enum optab_subtype subtype
)
365 return one_cmpl_optab
;
370 case MULT_HIGHPART_EXPR
:
371 return TYPE_UNSIGNED (type
) ? umul_highpart_optab
: smul_highpart_optab
;
377 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
385 if (TYPE_SATURATING(type
))
386 return TYPE_UNSIGNED(type
) ? usdiv_optab
: ssdiv_optab
;
387 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
390 if (TREE_CODE (type
) == VECTOR_TYPE
)
392 if (subtype
== optab_vector
)
393 return TYPE_SATURATING (type
) ? NULL
: vashl_optab
;
395 gcc_assert (subtype
== optab_scalar
);
397 if (TYPE_SATURATING(type
))
398 return TYPE_UNSIGNED(type
) ? usashl_optab
: ssashl_optab
;
402 if (TREE_CODE (type
) == VECTOR_TYPE
)
404 if (subtype
== optab_vector
)
405 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
407 gcc_assert (subtype
== optab_scalar
);
409 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
412 if (TREE_CODE (type
) == VECTOR_TYPE
)
414 if (subtype
== optab_vector
)
417 gcc_assert (subtype
== optab_scalar
);
422 if (TREE_CODE (type
) == VECTOR_TYPE
)
424 if (subtype
== optab_vector
)
427 gcc_assert (subtype
== optab_scalar
);
432 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
435 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
437 case REALIGN_LOAD_EXPR
:
438 return vec_realign_load_optab
;
441 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
444 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
446 case WIDEN_MULT_PLUS_EXPR
:
447 return (TYPE_UNSIGNED (type
)
448 ? (TYPE_SATURATING (type
)
449 ? usmadd_widen_optab
: umadd_widen_optab
)
450 : (TYPE_SATURATING (type
)
451 ? ssmadd_widen_optab
: smadd_widen_optab
));
453 case WIDEN_MULT_MINUS_EXPR
:
454 return (TYPE_UNSIGNED (type
)
455 ? (TYPE_SATURATING (type
)
456 ? usmsub_widen_optab
: umsub_widen_optab
)
457 : (TYPE_SATURATING (type
)
458 ? ssmsub_widen_optab
: smsub_widen_optab
));
464 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
467 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
469 case REDUC_PLUS_EXPR
:
470 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
472 case VEC_LSHIFT_EXPR
:
473 return vec_shl_optab
;
475 case VEC_RSHIFT_EXPR
:
476 return vec_shr_optab
;
478 case VEC_WIDEN_MULT_HI_EXPR
:
479 return TYPE_UNSIGNED (type
) ?
480 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
482 case VEC_WIDEN_MULT_LO_EXPR
:
483 return TYPE_UNSIGNED (type
) ?
484 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
486 case VEC_WIDEN_LSHIFT_HI_EXPR
:
487 return TYPE_UNSIGNED (type
) ?
488 vec_widen_ushiftl_hi_optab
: vec_widen_sshiftl_hi_optab
;
490 case VEC_WIDEN_LSHIFT_LO_EXPR
:
491 return TYPE_UNSIGNED (type
) ?
492 vec_widen_ushiftl_lo_optab
: vec_widen_sshiftl_lo_optab
;
494 case VEC_UNPACK_HI_EXPR
:
495 return TYPE_UNSIGNED (type
) ?
496 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
498 case VEC_UNPACK_LO_EXPR
:
499 return TYPE_UNSIGNED (type
) ?
500 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
502 case VEC_UNPACK_FLOAT_HI_EXPR
:
503 /* The signedness is determined from input operand. */
504 return TYPE_UNSIGNED (type
) ?
505 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
507 case VEC_UNPACK_FLOAT_LO_EXPR
:
508 /* The signedness is determined from input operand. */
509 return TYPE_UNSIGNED (type
) ?
510 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
512 case VEC_PACK_TRUNC_EXPR
:
513 return vec_pack_trunc_optab
;
515 case VEC_PACK_SAT_EXPR
:
516 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
518 case VEC_PACK_FIX_TRUNC_EXPR
:
519 /* The signedness is determined from output operand. */
520 return TYPE_UNSIGNED (type
) ?
521 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
527 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
530 case POINTER_PLUS_EXPR
:
532 if (TYPE_SATURATING(type
))
533 return TYPE_UNSIGNED(type
) ? usadd_optab
: ssadd_optab
;
534 return trapv
? addv_optab
: add_optab
;
537 if (TYPE_SATURATING(type
))
538 return TYPE_UNSIGNED(type
) ? ussub_optab
: sssub_optab
;
539 return trapv
? subv_optab
: sub_optab
;
542 if (TYPE_SATURATING(type
))
543 return TYPE_UNSIGNED(type
) ? usmul_optab
: ssmul_optab
;
544 return trapv
? smulv_optab
: smul_optab
;
547 if (TYPE_SATURATING(type
))
548 return TYPE_UNSIGNED(type
) ? usneg_optab
: ssneg_optab
;
549 return trapv
? negv_optab
: neg_optab
;
552 return trapv
? absv_optab
: abs_optab
;
560 /* Expand vector widening operations.
562 There are two different classes of operations handled here:
563 1) Operations whose result is wider than all the arguments to the operation.
564 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
565 In this case OP0 and optionally OP1 would be initialized,
566 but WIDE_OP wouldn't (not relevant for this case).
567 2) Operations whose result is of the same size as the last argument to the
568 operation, but wider than all the other arguments to the operation.
569 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
570 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
572 E.g, when called to expand the following operations, this is how
573 the arguments will be initialized:
575 widening-sum 2 oprnd0 - oprnd1
576 widening-dot-product 3 oprnd0 oprnd1 oprnd2
577 widening-mult 2 oprnd0 oprnd1 -
578 type-promotion (vec-unpack) 1 oprnd0 - - */
581 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
582 rtx target
, int unsignedp
)
584 struct expand_operand eops
[4];
585 tree oprnd0
, oprnd1
, oprnd2
;
586 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
587 optab widen_pattern_optab
;
588 enum insn_code icode
;
589 int nops
= TREE_CODE_LENGTH (ops
->code
);
593 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
594 widen_pattern_optab
=
595 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
596 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
597 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
598 icode
= find_widening_optab_handler (widen_pattern_optab
,
599 TYPE_MODE (TREE_TYPE (ops
->op2
)),
602 icode
= optab_handler (widen_pattern_optab
, tmode0
);
603 gcc_assert (icode
!= CODE_FOR_nothing
);
608 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
611 /* The last operand is of a wider mode than the rest of the operands. */
616 gcc_assert (tmode1
== tmode0
);
619 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
623 create_output_operand (&eops
[op
++], target
, TYPE_MODE (ops
->type
));
624 create_convert_operand_from (&eops
[op
++], op0
, tmode0
, unsignedp
);
626 create_convert_operand_from (&eops
[op
++], op1
, tmode1
, unsignedp
);
628 create_convert_operand_from (&eops
[op
++], wide_op
, wmode
, unsignedp
);
629 expand_insn (icode
, op
, eops
);
630 return eops
[0].value
;
633 /* Generate code to perform an operation specified by TERNARY_OPTAB
634 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
636 UNSIGNEDP is for the case where we have to widen the operands
637 to perform the operation. It says to use zero-extension.
639 If TARGET is nonzero, the value
640 is generated there, if it is convenient to do so.
641 In all cases an rtx is returned for the locus of the value;
642 this may or may not be TARGET. */
645 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
646 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
648 struct expand_operand ops
[4];
649 enum insn_code icode
= optab_handler (ternary_optab
, mode
);
651 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
653 create_output_operand (&ops
[0], target
, mode
);
654 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
655 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
656 create_convert_operand_from (&ops
[3], op2
, mode
, unsignedp
);
657 expand_insn (icode
, 4, ops
);
662 /* Like expand_binop, but return a constant rtx if the result can be
663 calculated at compile time. The arguments and return value are
664 otherwise the same as for expand_binop. */
667 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
668 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
669 enum optab_methods methods
)
671 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
673 rtx x
= simplify_binary_operation (binoptab
->code
, mode
, op0
, op1
);
679 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
682 /* Like simplify_expand_binop, but always put the result in TARGET.
683 Return true if the expansion succeeded. */
686 force_expand_binop (enum machine_mode mode
, optab binoptab
,
687 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
688 enum optab_methods methods
)
690 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
691 target
, unsignedp
, methods
);
695 emit_move_insn (target
, x
);
699 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
702 expand_vec_shift_expr (sepops ops
, rtx target
)
704 struct expand_operand eops
[3];
705 enum insn_code icode
;
706 rtx rtx_op1
, rtx_op2
;
707 enum machine_mode mode
= TYPE_MODE (ops
->type
);
708 tree vec_oprnd
= ops
->op0
;
709 tree shift_oprnd
= ops
->op1
;
714 case VEC_RSHIFT_EXPR
:
715 shift_optab
= vec_shr_optab
;
717 case VEC_LSHIFT_EXPR
:
718 shift_optab
= vec_shl_optab
;
724 icode
= optab_handler (shift_optab
, mode
);
725 gcc_assert (icode
!= CODE_FOR_nothing
);
727 rtx_op1
= expand_normal (vec_oprnd
);
728 rtx_op2
= expand_normal (shift_oprnd
);
730 create_output_operand (&eops
[0], target
, mode
);
731 create_input_operand (&eops
[1], rtx_op1
, GET_MODE (rtx_op1
));
732 create_convert_operand_from_type (&eops
[2], rtx_op2
, TREE_TYPE (shift_oprnd
));
733 expand_insn (icode
, 3, eops
);
735 return eops
[0].value
;
738 /* Create a new vector value in VMODE with all elements set to OP. The
739 mode of OP must be the element mode of VMODE. If OP is a constant,
740 then the return value will be a constant. */
743 expand_vector_broadcast (enum machine_mode vmode
, rtx op
)
745 enum insn_code icode
;
750 gcc_checking_assert (VECTOR_MODE_P (vmode
));
752 n
= GET_MODE_NUNITS (vmode
);
753 vec
= rtvec_alloc (n
);
754 for (i
= 0; i
< n
; ++i
)
755 RTVEC_ELT (vec
, i
) = op
;
758 return gen_rtx_CONST_VECTOR (vmode
, vec
);
760 /* ??? If the target doesn't have a vec_init, then we have no easy way
761 of performing this operation. Most of this sort of generic support
762 is hidden away in the vector lowering support in gimple. */
763 icode
= optab_handler (vec_init_optab
, vmode
);
764 if (icode
== CODE_FOR_nothing
)
767 ret
= gen_reg_rtx (vmode
);
768 emit_insn (GEN_FCN (icode
) (ret
, gen_rtx_PARALLEL (vmode
, vec
)));
773 /* This subroutine of expand_doubleword_shift handles the cases in which
774 the effective shift value is >= BITS_PER_WORD. The arguments and return
775 value are the same as for the parent routine, except that SUPERWORD_OP1
776 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
777 INTO_TARGET may be null if the caller has decided to calculate it. */
780 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
781 rtx outof_target
, rtx into_target
,
782 int unsignedp
, enum optab_methods methods
)
784 if (into_target
!= 0)
785 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
786 into_target
, unsignedp
, methods
))
789 if (outof_target
!= 0)
791 /* For a signed right shift, we must fill OUTOF_TARGET with copies
792 of the sign bit, otherwise we must fill it with zeros. */
793 if (binoptab
!= ashr_optab
)
794 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
796 if (!force_expand_binop (word_mode
, binoptab
,
797 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
798 outof_target
, unsignedp
, methods
))
804 /* This subroutine of expand_doubleword_shift handles the cases in which
805 the effective shift value is < BITS_PER_WORD. The arguments and return
806 value are the same as for the parent routine. */
809 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
810 rtx outof_input
, rtx into_input
, rtx op1
,
811 rtx outof_target
, rtx into_target
,
812 int unsignedp
, enum optab_methods methods
,
813 unsigned HOST_WIDE_INT shift_mask
)
815 optab reverse_unsigned_shift
, unsigned_shift
;
818 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
819 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
821 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
822 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
823 the opposite direction to BINOPTAB. */
824 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
826 carries
= outof_input
;
827 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
828 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
833 /* We must avoid shifting by BITS_PER_WORD bits since that is either
834 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
835 has unknown behavior. Do a single shift first, then shift by the
836 remainder. It's OK to use ~OP1 as the remainder if shift counts
837 are truncated to the mode size. */
838 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
839 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
840 if (shift_mask
== BITS_PER_WORD
- 1)
842 tmp
= immed_double_const (-1, -1, op1_mode
);
843 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
848 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
849 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
853 if (tmp
== 0 || carries
== 0)
855 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
856 carries
, tmp
, 0, unsignedp
, methods
);
860 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
861 so the result can go directly into INTO_TARGET if convenient. */
862 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
863 into_target
, unsignedp
, methods
);
867 /* Now OR in the bits carried over from OUTOF_INPUT. */
868 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
869 into_target
, unsignedp
, methods
))
872 /* Use a standard word_mode shift for the out-of half. */
873 if (outof_target
!= 0)
874 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
875 outof_target
, unsignedp
, methods
))
882 #ifdef HAVE_conditional_move
883 /* Try implementing expand_doubleword_shift using conditional moves.
884 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
885 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
886 are the shift counts to use in the former and latter case. All other
887 arguments are the same as the parent routine. */
890 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
891 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
892 rtx outof_input
, rtx into_input
,
893 rtx subword_op1
, rtx superword_op1
,
894 rtx outof_target
, rtx into_target
,
895 int unsignedp
, enum optab_methods methods
,
896 unsigned HOST_WIDE_INT shift_mask
)
898 rtx outof_superword
, into_superword
;
900 /* Put the superword version of the output into OUTOF_SUPERWORD and
902 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
903 if (outof_target
!= 0 && subword_op1
== superword_op1
)
905 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
906 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
907 into_superword
= outof_target
;
908 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
909 outof_superword
, 0, unsignedp
, methods
))
914 into_superword
= gen_reg_rtx (word_mode
);
915 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
916 outof_superword
, into_superword
,
921 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
922 if (!expand_subword_shift (op1_mode
, binoptab
,
923 outof_input
, into_input
, subword_op1
,
924 outof_target
, into_target
,
925 unsignedp
, methods
, shift_mask
))
928 /* Select between them. Do the INTO half first because INTO_SUPERWORD
929 might be the current value of OUTOF_TARGET. */
930 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
931 into_target
, into_superword
, word_mode
, false))
934 if (outof_target
!= 0)
935 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
936 outof_target
, outof_superword
,
944 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
945 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
946 input operand; the shift moves bits in the direction OUTOF_INPUT->
947 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
948 of the target. OP1 is the shift count and OP1_MODE is its mode.
949 If OP1 is constant, it will have been truncated as appropriate
950 and is known to be nonzero.
952 If SHIFT_MASK is zero, the result of word shifts is undefined when the
953 shift count is outside the range [0, BITS_PER_WORD). This routine must
954 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
956 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
957 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
958 fill with zeros or sign bits as appropriate.
960 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
961 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
962 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
963 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
966 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
967 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
968 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
969 function wants to calculate it itself.
971 Return true if the shift could be successfully synthesized. */
974 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
975 rtx outof_input
, rtx into_input
, rtx op1
,
976 rtx outof_target
, rtx into_target
,
977 int unsignedp
, enum optab_methods methods
,
978 unsigned HOST_WIDE_INT shift_mask
)
980 rtx superword_op1
, tmp
, cmp1
, cmp2
;
981 rtx subword_label
, done_label
;
982 enum rtx_code cmp_code
;
984 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
985 fill the result with sign or zero bits as appropriate. If so, the value
986 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
987 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
988 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
990 This isn't worthwhile for constant shifts since the optimizers will
991 cope better with in-range shift counts. */
992 if (shift_mask
>= BITS_PER_WORD
994 && !CONSTANT_P (op1
))
996 if (!expand_doubleword_shift (op1_mode
, binoptab
,
997 outof_input
, into_input
, op1
,
999 unsignedp
, methods
, shift_mask
))
1001 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1002 outof_target
, unsignedp
, methods
))
1007 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1008 is true when the effective shift value is less than BITS_PER_WORD.
1009 Set SUPERWORD_OP1 to the shift count that should be used to shift
1010 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1011 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
1012 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1014 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1015 is a subword shift count. */
1016 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1018 cmp2
= CONST0_RTX (op1_mode
);
1020 superword_op1
= op1
;
1024 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1025 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1027 cmp2
= CONST0_RTX (op1_mode
);
1029 superword_op1
= cmp1
;
1034 /* If we can compute the condition at compile time, pick the
1035 appropriate subroutine. */
1036 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1037 if (tmp
!= 0 && CONST_INT_P (tmp
))
1039 if (tmp
== const0_rtx
)
1040 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1041 outof_target
, into_target
,
1042 unsignedp
, methods
);
1044 return expand_subword_shift (op1_mode
, binoptab
,
1045 outof_input
, into_input
, op1
,
1046 outof_target
, into_target
,
1047 unsignedp
, methods
, shift_mask
);
1050 #ifdef HAVE_conditional_move
1051 /* Try using conditional moves to generate straight-line code. */
1053 rtx start
= get_last_insn ();
1054 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1055 cmp_code
, cmp1
, cmp2
,
1056 outof_input
, into_input
,
1058 outof_target
, into_target
,
1059 unsignedp
, methods
, shift_mask
))
1061 delete_insns_since (start
);
1065 /* As a last resort, use branches to select the correct alternative. */
1066 subword_label
= gen_label_rtx ();
1067 done_label
= gen_label_rtx ();
1070 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1071 0, 0, subword_label
, -1);
1074 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1075 outof_target
, into_target
,
1076 unsignedp
, methods
))
1079 emit_jump_insn (gen_jump (done_label
));
1081 emit_label (subword_label
);
1083 if (!expand_subword_shift (op1_mode
, binoptab
,
1084 outof_input
, into_input
, op1
,
1085 outof_target
, into_target
,
1086 unsignedp
, methods
, shift_mask
))
1089 emit_label (done_label
);
1093 /* Subroutine of expand_binop. Perform a double word multiplication of
1094 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1095 as the target's word_mode. This function return NULL_RTX if anything
1096 goes wrong, in which case it may have already emitted instructions
1097 which need to be deleted.
1099 If we want to multiply two two-word values and have normal and widening
1100 multiplies of single-word values, we can do this with three smaller
1103 The multiplication proceeds as follows:
1104 _______________________
1105 [__op0_high_|__op0_low__]
1106 _______________________
1107 * [__op1_high_|__op1_low__]
1108 _______________________________________________
1109 _______________________
1110 (1) [__op0_low__*__op1_low__]
1111 _______________________
1112 (2a) [__op0_low__*__op1_high_]
1113 _______________________
1114 (2b) [__op0_high_*__op1_low__]
1115 _______________________
1116 (3) [__op0_high_*__op1_high_]
1119 This gives a 4-word result. Since we are only interested in the
1120 lower 2 words, partial result (3) and the upper words of (2a) and
1121 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1122 calculated using non-widening multiplication.
1124 (1), however, needs to be calculated with an unsigned widening
1125 multiplication. If this operation is not directly supported we
1126 try using a signed widening multiplication and adjust the result.
1127 This adjustment works as follows:
1129 If both operands are positive then no adjustment is needed.
1131 If the operands have different signs, for example op0_low < 0 and
1132 op1_low >= 0, the instruction treats the most significant bit of
1133 op0_low as a sign bit instead of a bit with significance
1134 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1135 with 2**BITS_PER_WORD - op0_low, and two's complements the
1136 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1139 Similarly, if both operands are negative, we need to add
1140 (op0_low + op1_low) * 2**BITS_PER_WORD.
1142 We use a trick to adjust quickly. We logically shift op0_low right
1143 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1144 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1145 logical shift exists, we do an arithmetic right shift and subtract
1149 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1150 bool umulp
, enum optab_methods methods
)
1152 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1153 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1154 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1155 rtx product
, adjust
, product_high
, temp
;
1157 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1158 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1159 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1160 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1162 /* If we're using an unsigned multiply to directly compute the product
1163 of the low-order words of the operands and perform any required
1164 adjustments of the operands, we begin by trying two more multiplications
1165 and then computing the appropriate sum.
1167 We have checked above that the required addition is provided.
1168 Full-word addition will normally always succeed, especially if
1169 it is provided at all, so we don't worry about its failure. The
1170 multiplication may well fail, however, so we do handle that. */
1174 /* ??? This could be done with emit_store_flag where available. */
1175 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1176 NULL_RTX
, 1, methods
);
1178 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1179 NULL_RTX
, 0, OPTAB_DIRECT
);
1182 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1183 NULL_RTX
, 0, methods
);
1186 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1187 NULL_RTX
, 0, OPTAB_DIRECT
);
1194 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1195 NULL_RTX
, 0, OPTAB_DIRECT
);
1199 /* OP0_HIGH should now be dead. */
1203 /* ??? This could be done with emit_store_flag where available. */
1204 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1205 NULL_RTX
, 1, methods
);
1207 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1208 NULL_RTX
, 0, OPTAB_DIRECT
);
1211 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1212 NULL_RTX
, 0, methods
);
1215 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1216 NULL_RTX
, 0, OPTAB_DIRECT
);
1223 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1224 NULL_RTX
, 0, OPTAB_DIRECT
);
1228 /* OP1_HIGH should now be dead. */
1230 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1231 NULL_RTX
, 0, OPTAB_DIRECT
);
1233 if (target
&& !REG_P (target
))
1237 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1238 target
, 1, OPTAB_DIRECT
);
1240 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1241 target
, 1, OPTAB_DIRECT
);
1246 product_high
= operand_subword (product
, high
, 1, mode
);
1247 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1248 NULL_RTX
, 0, OPTAB_DIRECT
);
1249 emit_move_insn (product_high
, adjust
);
1253 /* Wrapper around expand_binop which takes an rtx code to specify
1254 the operation to perform, not an optab pointer. All other
1255 arguments are the same. */
1257 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1258 rtx op1
, rtx target
, int unsignedp
,
1259 enum optab_methods methods
)
1261 optab binop
= code_to_optab
[(int) code
];
1264 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1267 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1268 binop. Order them according to commutative_operand_precedence and, if
1269 possible, try to put TARGET or a pseudo first. */
1271 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1273 int op0_prec
= commutative_operand_precedence (op0
);
1274 int op1_prec
= commutative_operand_precedence (op1
);
1276 if (op0_prec
< op1_prec
)
1279 if (op0_prec
> op1_prec
)
1282 /* With equal precedence, both orders are ok, but it is better if the
1283 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1284 if (target
== 0 || REG_P (target
))
1285 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1287 return rtx_equal_p (op1
, target
);
1290 /* Return true if BINOPTAB implements a shift operation. */
1293 shift_optab_p (optab binoptab
)
1295 switch (binoptab
->code
)
1311 /* Return true if BINOPTAB implements a commutative binary operation. */
1314 commutative_optab_p (optab binoptab
)
1316 return (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
1317 || binoptab
== smul_widen_optab
1318 || binoptab
== umul_widen_optab
1319 || binoptab
== smul_highpart_optab
1320 || binoptab
== umul_highpart_optab
);
1323 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1324 optimizing, and if the operand is a constant that costs more than
1325 1 instruction, force the constant into a register and return that
1326 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1329 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1330 int opn
, rtx x
, bool unsignedp
)
1332 bool speed
= optimize_insn_for_speed_p ();
1334 if (mode
!= VOIDmode
1337 && rtx_cost (x
, binoptab
->code
, opn
, speed
) > set_src_cost (x
, speed
))
1339 if (CONST_INT_P (x
))
1341 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1342 if (intval
!= INTVAL (x
))
1343 x
= GEN_INT (intval
);
1346 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1347 x
= force_reg (mode
, x
);
1352 /* Helper function for expand_binop: handle the case where there
1353 is an insn that directly implements the indicated operation.
1354 Returns null if this is not possible. */
1356 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1358 rtx target
, int unsignedp
, enum optab_methods methods
,
1361 enum machine_mode from_mode
= widened_mode (mode
, op0
, op1
);
1362 enum insn_code icode
= find_widening_optab_handler (binoptab
, mode
,
1364 enum machine_mode xmode0
= insn_data
[(int) icode
].operand
[1].mode
;
1365 enum machine_mode xmode1
= insn_data
[(int) icode
].operand
[2].mode
;
1366 enum machine_mode mode0
, mode1
, tmp_mode
;
1367 struct expand_operand ops
[3];
1370 rtx xop0
= op0
, xop1
= op1
;
1373 /* If it is a commutative operator and the modes would match
1374 if we would swap the operands, we can save the conversions. */
1375 commutative_p
= commutative_optab_p (binoptab
);
1377 && GET_MODE (xop0
) != xmode0
&& GET_MODE (xop1
) != xmode1
1378 && GET_MODE (xop0
) == xmode1
&& GET_MODE (xop1
) == xmode1
)
1385 /* If we are optimizing, force expensive constants into a register. */
1386 xop0
= avoid_expensive_constant (xmode0
, binoptab
, 0, xop0
, unsignedp
);
1387 if (!shift_optab_p (binoptab
))
1388 xop1
= avoid_expensive_constant (xmode1
, binoptab
, 1, xop1
, unsignedp
);
1390 /* In case the insn wants input operands in modes different from
1391 those of the actual operands, convert the operands. It would
1392 seem that we don't need to convert CONST_INTs, but we do, so
1393 that they're properly zero-extended, sign-extended or truncated
1396 mode0
= GET_MODE (xop0
) != VOIDmode
? GET_MODE (xop0
) : mode
;
1397 if (xmode0
!= VOIDmode
&& xmode0
!= mode0
)
1399 xop0
= convert_modes (xmode0
, mode0
, xop0
, unsignedp
);
1403 mode1
= GET_MODE (xop1
) != VOIDmode
? GET_MODE (xop1
) : mode
;
1404 if (xmode1
!= VOIDmode
&& xmode1
!= mode1
)
1406 xop1
= convert_modes (xmode1
, mode1
, xop1
, unsignedp
);
1410 /* If operation is commutative,
1411 try to make the first operand a register.
1412 Even better, try to make it the same as the target.
1413 Also try to make the last operand a constant. */
1415 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1422 /* Now, if insn's predicates don't allow our operands, put them into
1425 if (binoptab
== vec_pack_trunc_optab
1426 || binoptab
== vec_pack_usat_optab
1427 || binoptab
== vec_pack_ssat_optab
1428 || binoptab
== vec_pack_ufix_trunc_optab
1429 || binoptab
== vec_pack_sfix_trunc_optab
)
1431 /* The mode of the result is different then the mode of the
1433 tmp_mode
= insn_data
[(int) icode
].operand
[0].mode
;
1434 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1436 delete_insns_since (last
);
1443 create_output_operand (&ops
[0], target
, tmp_mode
);
1444 create_input_operand (&ops
[1], xop0
, mode0
);
1445 create_input_operand (&ops
[2], xop1
, mode1
);
1446 pat
= maybe_gen_insn (icode
, 3, ops
);
1449 /* If PAT is composed of more than one insn, try to add an appropriate
1450 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1451 operand, call expand_binop again, this time without a target. */
1452 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1453 && ! add_equal_note (pat
, ops
[0].value
, binoptab
->code
,
1454 ops
[1].value
, ops
[2].value
))
1456 delete_insns_since (last
);
1457 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1458 unsignedp
, methods
);
1462 return ops
[0].value
;
1464 delete_insns_since (last
);
1468 /* Generate code to perform an operation specified by BINOPTAB
1469 on operands OP0 and OP1, with result having machine-mode MODE.
1471 UNSIGNEDP is for the case where we have to widen the operands
1472 to perform the operation. It says to use zero-extension.
1474 If TARGET is nonzero, the value
1475 is generated there, if it is convenient to do so.
1476 In all cases an rtx is returned for the locus of the value;
1477 this may or may not be TARGET. */
1480 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1481 rtx target
, int unsignedp
, enum optab_methods methods
)
1483 enum optab_methods next_methods
1484 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1485 ? OPTAB_WIDEN
: methods
);
1486 enum mode_class mclass
;
1487 enum machine_mode wider_mode
;
1490 rtx entry_last
= get_last_insn ();
1493 mclass
= GET_MODE_CLASS (mode
);
1495 /* If subtracting an integer constant, convert this into an addition of
1496 the negated constant. */
1498 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1500 op1
= negate_rtx (mode
, op1
);
1501 binoptab
= add_optab
;
1504 /* Record where to delete back to if we backtrack. */
1505 last
= get_last_insn ();
1507 /* If we can do it with a three-operand insn, do so. */
1509 if (methods
!= OPTAB_MUST_WIDEN
1510 && find_widening_optab_handler (binoptab
, mode
,
1511 widened_mode (mode
, op0
, op1
), 1)
1512 != CODE_FOR_nothing
)
1514 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1515 unsignedp
, methods
, last
);
1520 /* If we were trying to rotate, and that didn't work, try rotating
1521 the other direction before falling back to shifts and bitwise-or. */
1522 if (((binoptab
== rotl_optab
1523 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1524 || (binoptab
== rotr_optab
1525 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1526 && mclass
== MODE_INT
)
1528 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1530 unsigned int bits
= GET_MODE_PRECISION (mode
);
1532 if (CONST_INT_P (op1
))
1533 newop1
= GEN_INT (bits
- INTVAL (op1
));
1534 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1535 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1537 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1538 GEN_INT (bits
), op1
,
1539 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1541 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1542 target
, unsignedp
, methods
, last
);
1547 /* If this is a multiply, see if we can do a widening operation that
1548 takes operands of this mode and makes a wider mode. */
1550 if (binoptab
== smul_optab
1551 && GET_MODE_2XWIDER_MODE (mode
) != VOIDmode
1552 && (widening_optab_handler ((unsignedp
? umul_widen_optab
1553 : smul_widen_optab
),
1554 GET_MODE_2XWIDER_MODE (mode
), mode
)
1555 != CODE_FOR_nothing
))
1557 temp
= expand_binop (GET_MODE_2XWIDER_MODE (mode
),
1558 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1559 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1563 if (GET_MODE_CLASS (mode
) == MODE_INT
1564 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (temp
)))
1565 return gen_lowpart (mode
, temp
);
1567 return convert_to_mode (mode
, temp
, unsignedp
);
1571 /* If this is a vector shift by a scalar, see if we can do a vector
1572 shift by a vector. If so, broadcast the scalar into a vector. */
1573 if (mclass
== MODE_VECTOR_INT
)
1575 optab otheroptab
= NULL
;
1577 if (binoptab
== ashl_optab
)
1578 otheroptab
= vashl_optab
;
1579 else if (binoptab
== ashr_optab
)
1580 otheroptab
= vashr_optab
;
1581 else if (binoptab
== lshr_optab
)
1582 otheroptab
= vlshr_optab
;
1583 else if (binoptab
== rotl_optab
)
1584 otheroptab
= vrotl_optab
;
1585 else if (binoptab
== rotr_optab
)
1586 otheroptab
= vrotr_optab
;
1588 if (otheroptab
&& optab_handler (otheroptab
, mode
) != CODE_FOR_nothing
)
1590 rtx vop1
= expand_vector_broadcast (mode
, op1
);
1593 temp
= expand_binop_directly (mode
, otheroptab
, op0
, vop1
,
1594 target
, unsignedp
, methods
, last
);
1601 /* Look for a wider mode of the same class for which we think we
1602 can open-code the operation. Check for a widening multiply at the
1603 wider mode as well. */
1605 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1606 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1607 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1608 wider_mode
!= VOIDmode
;
1609 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1611 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1612 || (binoptab
== smul_optab
1613 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1614 && (find_widening_optab_handler ((unsignedp
1616 : smul_widen_optab
),
1617 GET_MODE_WIDER_MODE (wider_mode
),
1619 != CODE_FOR_nothing
)))
1621 rtx xop0
= op0
, xop1
= op1
;
1624 /* For certain integer operations, we need not actually extend
1625 the narrow operands, as long as we will truncate
1626 the results to the same narrowness. */
1628 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1629 || binoptab
== xor_optab
1630 || binoptab
== add_optab
|| binoptab
== sub_optab
1631 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1632 && mclass
== MODE_INT
)
1635 xop0
= avoid_expensive_constant (mode
, binoptab
, 0,
1637 if (binoptab
!= ashl_optab
)
1638 xop1
= avoid_expensive_constant (mode
, binoptab
, 1,
1642 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1644 /* The second operand of a shift must always be extended. */
1645 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1646 no_extend
&& binoptab
!= ashl_optab
);
1648 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1649 unsignedp
, OPTAB_DIRECT
);
1652 if (mclass
!= MODE_INT
1653 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
1656 target
= gen_reg_rtx (mode
);
1657 convert_move (target
, temp
, 0);
1661 return gen_lowpart (mode
, temp
);
1664 delete_insns_since (last
);
1668 /* If operation is commutative,
1669 try to make the first operand a register.
1670 Even better, try to make it the same as the target.
1671 Also try to make the last operand a constant. */
1672 if (commutative_optab_p (binoptab
)
1673 && swap_commutative_operands_with_target (target
, op0
, op1
))
1680 /* These can be done a word at a time. */
1681 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1682 && mclass
== MODE_INT
1683 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1684 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1689 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1690 won't be accurate, so use a new target. */
1694 || !valid_multiword_target_p (target
))
1695 target
= gen_reg_rtx (mode
);
1699 /* Do the actual arithmetic. */
1700 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1702 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1703 rtx x
= expand_binop (word_mode
, binoptab
,
1704 operand_subword_force (op0
, i
, mode
),
1705 operand_subword_force (op1
, i
, mode
),
1706 target_piece
, unsignedp
, next_methods
);
1711 if (target_piece
!= x
)
1712 emit_move_insn (target_piece
, x
);
1715 insns
= get_insns ();
1718 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1725 /* Synthesize double word shifts from single word shifts. */
1726 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1727 || binoptab
== ashr_optab
)
1728 && mclass
== MODE_INT
1729 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1730 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1731 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
)
1732 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1733 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1734 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1736 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1737 enum machine_mode op1_mode
;
1739 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1740 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1741 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1743 /* Apply the truncation to constant shifts. */
1744 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1745 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1747 if (op1
== CONST0_RTX (op1_mode
))
1750 /* Make sure that this is a combination that expand_doubleword_shift
1751 can handle. See the comments there for details. */
1752 if (double_shift_mask
== 0
1753 || (shift_mask
== BITS_PER_WORD
- 1
1754 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1757 rtx into_target
, outof_target
;
1758 rtx into_input
, outof_input
;
1759 int left_shift
, outof_word
;
1761 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1762 won't be accurate, so use a new target. */
1766 || !valid_multiword_target_p (target
))
1767 target
= gen_reg_rtx (mode
);
1771 /* OUTOF_* is the word we are shifting bits away from, and
1772 INTO_* is the word that we are shifting bits towards, thus
1773 they differ depending on the direction of the shift and
1774 WORDS_BIG_ENDIAN. */
1776 left_shift
= binoptab
== ashl_optab
;
1777 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1779 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1780 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1782 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1783 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1785 if (expand_doubleword_shift (op1_mode
, binoptab
,
1786 outof_input
, into_input
, op1
,
1787 outof_target
, into_target
,
1788 unsignedp
, next_methods
, shift_mask
))
1790 insns
= get_insns ();
1800 /* Synthesize double word rotates from single word shifts. */
1801 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1802 && mclass
== MODE_INT
1803 && CONST_INT_P (op1
)
1804 && GET_MODE_PRECISION (mode
) == 2 * BITS_PER_WORD
1805 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1806 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1809 rtx into_target
, outof_target
;
1810 rtx into_input
, outof_input
;
1812 int shift_count
, left_shift
, outof_word
;
1814 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1815 won't be accurate, so use a new target. Do this also if target is not
1816 a REG, first because having a register instead may open optimization
1817 opportunities, and second because if target and op0 happen to be MEMs
1818 designating the same location, we would risk clobbering it too early
1819 in the code sequence we generate below. */
1824 || !valid_multiword_target_p (target
))
1825 target
= gen_reg_rtx (mode
);
1829 shift_count
= INTVAL (op1
);
1831 /* OUTOF_* is the word we are shifting bits away from, and
1832 INTO_* is the word that we are shifting bits towards, thus
1833 they differ depending on the direction of the shift and
1834 WORDS_BIG_ENDIAN. */
1836 left_shift
= (binoptab
== rotl_optab
);
1837 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1839 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1840 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1842 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1843 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1845 if (shift_count
== BITS_PER_WORD
)
1847 /* This is just a word swap. */
1848 emit_move_insn (outof_target
, into_input
);
1849 emit_move_insn (into_target
, outof_input
);
1854 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1855 rtx first_shift_count
, second_shift_count
;
1856 optab reverse_unsigned_shift
, unsigned_shift
;
1858 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1859 ? lshr_optab
: ashl_optab
);
1861 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1862 ? ashl_optab
: lshr_optab
);
1864 if (shift_count
> BITS_PER_WORD
)
1866 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1867 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1871 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1872 second_shift_count
= GEN_INT (shift_count
);
1875 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1876 outof_input
, first_shift_count
,
1877 NULL_RTX
, unsignedp
, next_methods
);
1878 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1879 into_input
, second_shift_count
,
1880 NULL_RTX
, unsignedp
, next_methods
);
1882 if (into_temp1
!= 0 && into_temp2
!= 0)
1883 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1884 into_target
, unsignedp
, next_methods
);
1888 if (inter
!= 0 && inter
!= into_target
)
1889 emit_move_insn (into_target
, inter
);
1891 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1892 into_input
, first_shift_count
,
1893 NULL_RTX
, unsignedp
, next_methods
);
1894 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1895 outof_input
, second_shift_count
,
1896 NULL_RTX
, unsignedp
, next_methods
);
1898 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1899 inter
= expand_binop (word_mode
, ior_optab
,
1900 outof_temp1
, outof_temp2
,
1901 outof_target
, unsignedp
, next_methods
);
1903 if (inter
!= 0 && inter
!= outof_target
)
1904 emit_move_insn (outof_target
, inter
);
1907 insns
= get_insns ();
1917 /* These can be done a word at a time by propagating carries. */
1918 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1919 && mclass
== MODE_INT
1920 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1921 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1924 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1925 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1926 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1927 rtx xop0
, xop1
, xtarget
;
1929 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1930 value is one of those, use it. Otherwise, use 1 since it is the
1931 one easiest to get. */
1932 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1933 int normalizep
= STORE_FLAG_VALUE
;
1938 /* Prepare the operands. */
1939 xop0
= force_reg (mode
, op0
);
1940 xop1
= force_reg (mode
, op1
);
1942 xtarget
= gen_reg_rtx (mode
);
1944 if (target
== 0 || !REG_P (target
) || !valid_multiword_target_p (target
))
1947 /* Indicate for flow that the entire target reg is being set. */
1949 emit_clobber (xtarget
);
1951 /* Do the actual arithmetic. */
1952 for (i
= 0; i
< nwords
; i
++)
1954 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1955 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1956 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1957 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1960 /* Main add/subtract of the input operands. */
1961 x
= expand_binop (word_mode
, binoptab
,
1962 op0_piece
, op1_piece
,
1963 target_piece
, unsignedp
, next_methods
);
1969 /* Store carry from main add/subtract. */
1970 carry_out
= gen_reg_rtx (word_mode
);
1971 carry_out
= emit_store_flag_force (carry_out
,
1972 (binoptab
== add_optab
1975 word_mode
, 1, normalizep
);
1982 /* Add/subtract previous carry to main result. */
1983 newx
= expand_binop (word_mode
,
1984 normalizep
== 1 ? binoptab
: otheroptab
,
1986 NULL_RTX
, 1, next_methods
);
1990 /* Get out carry from adding/subtracting carry in. */
1991 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1992 carry_tmp
= emit_store_flag_force (carry_tmp
,
1993 (binoptab
== add_optab
1996 word_mode
, 1, normalizep
);
1998 /* Logical-ior the two poss. carry together. */
1999 carry_out
= expand_binop (word_mode
, ior_optab
,
2000 carry_out
, carry_tmp
,
2001 carry_out
, 0, next_methods
);
2005 emit_move_insn (target_piece
, newx
);
2009 if (x
!= target_piece
)
2010 emit_move_insn (target_piece
, x
);
2013 carry_in
= carry_out
;
2016 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2018 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2019 || ! rtx_equal_p (target
, xtarget
))
2021 rtx temp
= emit_move_insn (target
, xtarget
);
2023 set_dst_reg_note (temp
, REG_EQUAL
,
2024 gen_rtx_fmt_ee (binoptab
->code
, mode
,
2036 delete_insns_since (last
);
2039 /* Attempt to synthesize double word multiplies using a sequence of word
2040 mode multiplications. We first attempt to generate a sequence using a
2041 more efficient unsigned widening multiply, and if that fails we then
2042 try using a signed widening multiply. */
2044 if (binoptab
== smul_optab
2045 && mclass
== MODE_INT
2046 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2047 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2048 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2050 rtx product
= NULL_RTX
;
2051 if (widening_optab_handler (umul_widen_optab
, mode
, word_mode
)
2052 != CODE_FOR_nothing
)
2054 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2057 delete_insns_since (last
);
2060 if (product
== NULL_RTX
2061 && widening_optab_handler (smul_widen_optab
, mode
, word_mode
)
2062 != CODE_FOR_nothing
)
2064 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2067 delete_insns_since (last
);
2070 if (product
!= NULL_RTX
)
2072 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2074 temp
= emit_move_insn (target
? target
: product
, product
);
2075 set_dst_reg_note (temp
,
2077 gen_rtx_fmt_ee (MULT
, mode
,
2080 target
? target
: product
);
2086 /* It can't be open-coded in this mode.
2087 Use a library call if one is available and caller says that's ok. */
2089 libfunc
= optab_libfunc (binoptab
, mode
);
2091 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2095 enum machine_mode op1_mode
= mode
;
2100 if (shift_optab_p (binoptab
))
2102 op1_mode
= targetm
.libgcc_shift_count_mode ();
2103 /* Specify unsigned here,
2104 since negative shift counts are meaningless. */
2105 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2108 if (GET_MODE (op0
) != VOIDmode
2109 && GET_MODE (op0
) != mode
)
2110 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2112 /* Pass 1 for NO_QUEUE so we don't lose any increments
2113 if the libcall is cse'd or moved. */
2114 value
= emit_library_call_value (libfunc
,
2115 NULL_RTX
, LCT_CONST
, mode
, 2,
2116 op0
, mode
, op1x
, op1_mode
);
2118 insns
= get_insns ();
2121 target
= gen_reg_rtx (mode
);
2122 emit_libcall_block_1 (insns
, target
, value
,
2123 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
),
2124 trapv_binoptab_p (binoptab
));
2129 delete_insns_since (last
);
2131 /* It can't be done in this mode. Can we do it in a wider mode? */
2133 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2134 || methods
== OPTAB_MUST_WIDEN
))
2136 /* Caller says, don't even try. */
2137 delete_insns_since (entry_last
);
2141 /* Compute the value of METHODS to pass to recursive calls.
2142 Don't allow widening to be tried recursively. */
2144 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2146 /* Look for a wider mode of the same class for which it appears we can do
2149 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2151 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2152 wider_mode
!= VOIDmode
;
2153 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2155 if (find_widening_optab_handler (binoptab
, wider_mode
, mode
, 1)
2157 || (methods
== OPTAB_LIB
2158 && optab_libfunc (binoptab
, wider_mode
)))
2160 rtx xop0
= op0
, xop1
= op1
;
2163 /* For certain integer operations, we need not actually extend
2164 the narrow operands, as long as we will truncate
2165 the results to the same narrowness. */
2167 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2168 || binoptab
== xor_optab
2169 || binoptab
== add_optab
|| binoptab
== sub_optab
2170 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2171 && mclass
== MODE_INT
)
2174 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2175 unsignedp
, no_extend
);
2177 /* The second operand of a shift must always be extended. */
2178 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2179 no_extend
&& binoptab
!= ashl_optab
);
2181 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2182 unsignedp
, methods
);
2185 if (mclass
!= MODE_INT
2186 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
2189 target
= gen_reg_rtx (mode
);
2190 convert_move (target
, temp
, 0);
2194 return gen_lowpart (mode
, temp
);
2197 delete_insns_since (last
);
2202 delete_insns_since (entry_last
);
2206 /* Expand a binary operator which has both signed and unsigned forms.
2207 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2210 If we widen unsigned operands, we may use a signed wider operation instead
2211 of an unsigned wider operation, since the result would be the same. */
2214 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2215 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2216 enum optab_methods methods
)
2219 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2220 struct optab_d wide_soptab
;
2222 /* Do it without widening, if possible. */
2223 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2224 unsignedp
, OPTAB_DIRECT
);
2225 if (temp
|| methods
== OPTAB_DIRECT
)
2228 /* Try widening to a signed int. Make a fake signed optab that
2229 hides any signed insn for direct use. */
2230 wide_soptab
= *soptab
;
2231 set_optab_handler (&wide_soptab
, mode
, CODE_FOR_nothing
);
2232 /* We don't want to generate new hash table entries from this fake
2234 wide_soptab
.libcall_gen
= NULL
;
2236 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2237 unsignedp
, OPTAB_WIDEN
);
2239 /* For unsigned operands, try widening to an unsigned int. */
2240 if (temp
== 0 && unsignedp
)
2241 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2242 unsignedp
, OPTAB_WIDEN
);
2243 if (temp
|| methods
== OPTAB_WIDEN
)
2246 /* Use the right width libcall if that exists. */
2247 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2248 if (temp
|| methods
== OPTAB_LIB
)
2251 /* Must widen and use a libcall, use either signed or unsigned. */
2252 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2253 unsignedp
, methods
);
2257 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2258 unsignedp
, methods
);
2262 /* Generate code to perform an operation specified by UNOPPTAB
2263 on operand OP0, with two results to TARG0 and TARG1.
2264 We assume that the order of the operands for the instruction
2265 is TARG0, TARG1, OP0.
2267 Either TARG0 or TARG1 may be zero, but what that means is that
2268 the result is not actually wanted. We will generate it into
2269 a dummy pseudo-reg and discard it. They may not both be zero.
2271 Returns 1 if this operation can be performed; 0 if not. */
2274 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2277 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2278 enum mode_class mclass
;
2279 enum machine_mode wider_mode
;
2280 rtx entry_last
= get_last_insn ();
2283 mclass
= GET_MODE_CLASS (mode
);
2286 targ0
= gen_reg_rtx (mode
);
2288 targ1
= gen_reg_rtx (mode
);
2290 /* Record where to go back to if we fail. */
2291 last
= get_last_insn ();
2293 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2295 struct expand_operand ops
[3];
2296 enum insn_code icode
= optab_handler (unoptab
, mode
);
2298 create_fixed_operand (&ops
[0], targ0
);
2299 create_fixed_operand (&ops
[1], targ1
);
2300 create_convert_operand_from (&ops
[2], op0
, mode
, unsignedp
);
2301 if (maybe_expand_insn (icode
, 3, ops
))
2305 /* It can't be done in this mode. Can we do it in a wider mode? */
2307 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2309 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2310 wider_mode
!= VOIDmode
;
2311 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2313 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2315 rtx t0
= gen_reg_rtx (wider_mode
);
2316 rtx t1
= gen_reg_rtx (wider_mode
);
2317 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2319 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2321 convert_move (targ0
, t0
, unsignedp
);
2322 convert_move (targ1
, t1
, unsignedp
);
2326 delete_insns_since (last
);
2331 delete_insns_since (entry_last
);
2335 /* Generate code to perform an operation specified by BINOPTAB
2336 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2337 We assume that the order of the operands for the instruction
2338 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2339 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2341 Either TARG0 or TARG1 may be zero, but what that means is that
2342 the result is not actually wanted. We will generate it into
2343 a dummy pseudo-reg and discard it. They may not both be zero.
2345 Returns 1 if this operation can be performed; 0 if not. */
2348 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2351 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2352 enum mode_class mclass
;
2353 enum machine_mode wider_mode
;
2354 rtx entry_last
= get_last_insn ();
2357 mclass
= GET_MODE_CLASS (mode
);
2360 targ0
= gen_reg_rtx (mode
);
2362 targ1
= gen_reg_rtx (mode
);
2364 /* Record where to go back to if we fail. */
2365 last
= get_last_insn ();
2367 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2369 struct expand_operand ops
[4];
2370 enum insn_code icode
= optab_handler (binoptab
, mode
);
2371 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2372 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2373 rtx xop0
= op0
, xop1
= op1
;
2375 /* If we are optimizing, force expensive constants into a register. */
2376 xop0
= avoid_expensive_constant (mode0
, binoptab
, 0, xop0
, unsignedp
);
2377 xop1
= avoid_expensive_constant (mode1
, binoptab
, 1, xop1
, unsignedp
);
2379 create_fixed_operand (&ops
[0], targ0
);
2380 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2381 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
2382 create_fixed_operand (&ops
[3], targ1
);
2383 if (maybe_expand_insn (icode
, 4, ops
))
2385 delete_insns_since (last
);
2388 /* It can't be done in this mode. Can we do it in a wider mode? */
2390 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2392 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2393 wider_mode
!= VOIDmode
;
2394 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2396 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2398 rtx t0
= gen_reg_rtx (wider_mode
);
2399 rtx t1
= gen_reg_rtx (wider_mode
);
2400 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2401 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2403 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2406 convert_move (targ0
, t0
, unsignedp
);
2407 convert_move (targ1
, t1
, unsignedp
);
2411 delete_insns_since (last
);
2416 delete_insns_since (entry_last
);
2420 /* Expand the two-valued library call indicated by BINOPTAB, but
2421 preserve only one of the values. If TARG0 is non-NULL, the first
2422 value is placed into TARG0; otherwise the second value is placed
2423 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2424 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2425 This routine assumes that the value returned by the library call is
2426 as if the return value was of an integral mode twice as wide as the
2427 mode of OP0. Returns 1 if the call was successful. */
2430 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2431 rtx targ0
, rtx targ1
, enum rtx_code code
)
2433 enum machine_mode mode
;
2434 enum machine_mode libval_mode
;
2439 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2440 gcc_assert (!targ0
!= !targ1
);
2442 mode
= GET_MODE (op0
);
2443 libfunc
= optab_libfunc (binoptab
, mode
);
2447 /* The value returned by the library function will have twice as
2448 many bits as the nominal MODE. */
2449 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2452 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2456 /* Get the part of VAL containing the value that we want. */
2457 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2458 targ0
? 0 : GET_MODE_SIZE (mode
));
2459 insns
= get_insns ();
2461 /* Move the into the desired location. */
2462 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2463 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2469 /* Wrapper around expand_unop which takes an rtx code to specify
2470 the operation to perform, not an optab pointer. All other
2471 arguments are the same. */
2473 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2474 rtx target
, int unsignedp
)
2476 optab unop
= code_to_optab
[(int) code
];
2479 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2485 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2487 A similar operation can be used for clrsb. UNOPTAB says which operation
2488 we are trying to expand. */
2490 widen_leading (enum machine_mode mode
, rtx op0
, rtx target
, optab unoptab
)
2492 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2493 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2495 enum machine_mode wider_mode
;
2496 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2497 wider_mode
!= VOIDmode
;
2498 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2500 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2502 rtx xop0
, temp
, last
;
2504 last
= get_last_insn ();
2507 target
= gen_reg_rtx (mode
);
2508 xop0
= widen_operand (op0
, wider_mode
, mode
,
2509 unoptab
!= clrsb_optab
, false);
2510 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2511 unoptab
!= clrsb_optab
);
2513 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2514 GEN_INT (GET_MODE_PRECISION (wider_mode
)
2515 - GET_MODE_PRECISION (mode
)),
2516 target
, true, OPTAB_DIRECT
);
2518 delete_insns_since (last
);
2527 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2528 quantities, choosing which based on whether the high word is nonzero. */
2530 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2532 rtx xop0
= force_reg (mode
, op0
);
2533 rtx subhi
= gen_highpart (word_mode
, xop0
);
2534 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2535 rtx hi0_label
= gen_label_rtx ();
2536 rtx after_label
= gen_label_rtx ();
2537 rtx seq
, temp
, result
;
2539 /* If we were not given a target, use a word_mode register, not a
2540 'mode' register. The result will fit, and nobody is expecting
2541 anything bigger (the return type of __builtin_clz* is int). */
2543 target
= gen_reg_rtx (word_mode
);
2545 /* In any case, write to a word_mode scratch in both branches of the
2546 conditional, so we can ensure there is a single move insn setting
2547 'target' to tag a REG_EQUAL note on. */
2548 result
= gen_reg_rtx (word_mode
);
2552 /* If the high word is not equal to zero,
2553 then clz of the full value is clz of the high word. */
2554 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2555 word_mode
, true, hi0_label
);
2557 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2562 convert_move (result
, temp
, true);
2564 emit_jump_insn (gen_jump (after_label
));
2567 /* Else clz of the full value is clz of the low word plus the number
2568 of bits in the high word. */
2569 emit_label (hi0_label
);
2571 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2574 temp
= expand_binop (word_mode
, add_optab
, temp
,
2575 GEN_INT (GET_MODE_BITSIZE (word_mode
)),
2576 result
, true, OPTAB_DIRECT
);
2580 convert_move (result
, temp
, true);
2582 emit_label (after_label
);
2583 convert_move (target
, result
, true);
2588 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2600 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2602 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2604 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2605 enum machine_mode wider_mode
;
2608 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2611 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2612 wider_mode
!= VOIDmode
;
2613 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2614 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2619 last
= get_last_insn ();
2621 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2622 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2624 gcc_assert (GET_MODE_PRECISION (wider_mode
) == GET_MODE_BITSIZE (wider_mode
)
2625 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
));
2627 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2628 GET_MODE_BITSIZE (wider_mode
)
2629 - GET_MODE_BITSIZE (mode
),
2635 target
= gen_reg_rtx (mode
);
2636 emit_move_insn (target
, gen_lowpart (mode
, x
));
2639 delete_insns_since (last
);
2644 /* Try calculating bswap as two bswaps of two word-sized operands. */
2647 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2651 t1
= expand_unop (word_mode
, bswap_optab
,
2652 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2653 t0
= expand_unop (word_mode
, bswap_optab
,
2654 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2656 if (target
== 0 || !valid_multiword_target_p (target
))
2657 target
= gen_reg_rtx (mode
);
2659 emit_clobber (target
);
2660 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2661 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2666 /* Try calculating (parity x) as (and (popcount x) 1), where
2667 popcount can also be done in a wider mode. */
2669 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2671 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2672 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2674 enum machine_mode wider_mode
;
2675 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2676 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2678 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2680 rtx xop0
, temp
, last
;
2682 last
= get_last_insn ();
2685 target
= gen_reg_rtx (mode
);
2686 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2687 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2690 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2691 target
, true, OPTAB_DIRECT
);
2693 delete_insns_since (last
);
2702 /* Try calculating ctz(x) as K - clz(x & -x) ,
2703 where K is GET_MODE_PRECISION(mode) - 1.
2705 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2706 don't have to worry about what the hardware does in that case. (If
2707 the clz instruction produces the usual value at 0, which is K, the
2708 result of this code sequence will be -1; expand_ffs, below, relies
2709 on this. It might be nice to have it be K instead, for consistency
2710 with the (very few) processors that provide a ctz with a defined
2711 value, but that would take one more instruction, and it would be
2712 less convenient for expand_ffs anyway. */
2715 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2719 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2724 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2726 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2727 true, OPTAB_DIRECT
);
2729 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2731 temp
= expand_binop (mode
, sub_optab
, GEN_INT (GET_MODE_PRECISION (mode
) - 1),
2733 true, OPTAB_DIRECT
);
2743 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2749 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2750 else with the sequence used by expand_clz.
2752 The ffs builtin promises to return zero for a zero value and ctz/clz
2753 may have an undefined value in that case. If they do not give us a
2754 convenient value, we have to generate a test and branch. */
2756 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2758 HOST_WIDE_INT val
= 0;
2759 bool defined_at_zero
= false;
2762 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2766 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2770 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2772 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2775 temp
= expand_ctz (mode
, op0
, 0);
2779 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2781 defined_at_zero
= true;
2782 val
= (GET_MODE_PRECISION (mode
) - 1) - val
;
2788 if (defined_at_zero
&& val
== -1)
2789 /* No correction needed at zero. */;
2792 /* We don't try to do anything clever with the situation found
2793 on some processors (eg Alpha) where ctz(0:mode) ==
2794 bitsize(mode). If someone can think of a way to send N to -1
2795 and leave alone all values in the range 0..N-1 (where N is a
2796 power of two), cheaper than this test-and-branch, please add it.
2798 The test-and-branch is done after the operation itself, in case
2799 the operation sets condition codes that can be recycled for this.
2800 (This is true on i386, for instance.) */
2802 rtx nonzero_label
= gen_label_rtx ();
2803 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2804 mode
, true, nonzero_label
);
2806 convert_move (temp
, GEN_INT (-1), false);
2807 emit_label (nonzero_label
);
2810 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2811 to produce a value in the range 0..bitsize. */
2812 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (1),
2813 target
, false, OPTAB_DIRECT
);
2820 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2829 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2830 conditions, VAL may already be a SUBREG against which we cannot generate
2831 a further SUBREG. In this case, we expect forcing the value into a
2832 register will work around the situation. */
2835 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2836 enum machine_mode imode
)
2839 ret
= lowpart_subreg (omode
, val
, imode
);
2842 val
= force_reg (imode
, val
);
2843 ret
= lowpart_subreg (omode
, val
, imode
);
2844 gcc_assert (ret
!= NULL
);
2849 /* Expand a floating point absolute value or negation operation via a
2850 logical operation on the sign bit. */
2853 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2854 rtx op0
, rtx target
)
2856 const struct real_format
*fmt
;
2857 int bitpos
, word
, nwords
, i
;
2858 enum machine_mode imode
;
2862 /* The format has to have a simple sign bit. */
2863 fmt
= REAL_MODE_FORMAT (mode
);
2867 bitpos
= fmt
->signbit_rw
;
2871 /* Don't create negative zeros if the format doesn't support them. */
2872 if (code
== NEG
&& !fmt
->has_signed_zero
)
2875 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2877 imode
= int_mode_for_mode (mode
);
2878 if (imode
== BLKmode
)
2887 if (FLOAT_WORDS_BIG_ENDIAN
)
2888 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2890 word
= bitpos
/ BITS_PER_WORD
;
2891 bitpos
= bitpos
% BITS_PER_WORD
;
2892 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2895 mask
= double_int_setbit (double_int_zero
, bitpos
);
2897 mask
= double_int_not (mask
);
2901 || (nwords
> 1 && !valid_multiword_target_p (target
)))
2902 target
= gen_reg_rtx (mode
);
2908 for (i
= 0; i
< nwords
; ++i
)
2910 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2911 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2915 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2917 immed_double_int_const (mask
, imode
),
2918 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2919 if (temp
!= targ_piece
)
2920 emit_move_insn (targ_piece
, temp
);
2923 emit_move_insn (targ_piece
, op0_piece
);
2926 insns
= get_insns ();
2933 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2934 gen_lowpart (imode
, op0
),
2935 immed_double_int_const (mask
, imode
),
2936 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2937 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2939 set_dst_reg_note (get_last_insn (), REG_EQUAL
,
2940 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)),
2947 /* As expand_unop, but will fail rather than attempt the operation in a
2948 different mode or with a libcall. */
2950 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2953 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2955 struct expand_operand ops
[2];
2956 enum insn_code icode
= optab_handler (unoptab
, mode
);
2957 rtx last
= get_last_insn ();
2960 create_output_operand (&ops
[0], target
, mode
);
2961 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2962 pat
= maybe_gen_insn (icode
, 2, ops
);
2965 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2966 && ! add_equal_note (pat
, ops
[0].value
, unoptab
->code
,
2967 ops
[1].value
, NULL_RTX
))
2969 delete_insns_since (last
);
2970 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2975 return ops
[0].value
;
2981 /* Generate code to perform an operation specified by UNOPTAB
2982 on operand OP0, with result having machine-mode MODE.
2984 UNSIGNEDP is for the case where we have to widen the operands
2985 to perform the operation. It says to use zero-extension.
2987 If TARGET is nonzero, the value
2988 is generated there, if it is convenient to do so.
2989 In all cases an rtx is returned for the locus of the value;
2990 this may or may not be TARGET. */
2993 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2996 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2997 enum machine_mode wider_mode
;
3001 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3005 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3007 /* Widening (or narrowing) clz needs special treatment. */
3008 if (unoptab
== clz_optab
)
3010 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3014 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3015 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3017 temp
= expand_doubleword_clz (mode
, op0
, target
);
3025 if (unoptab
== clrsb_optab
)
3027 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3033 /* Widening (or narrowing) bswap needs special treatment. */
3034 if (unoptab
== bswap_optab
)
3036 /* HImode is special because in this mode BSWAP is equivalent to ROTATE
3037 or ROTATERT. First try these directly; if this fails, then try the
3038 obvious pair of shifts with allowed widening, as this will probably
3039 be always more efficient than the other fallback methods. */
3042 rtx last
, temp1
, temp2
;
3044 if (optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
)
3046 temp
= expand_binop (mode
, rotl_optab
, op0
, GEN_INT (8), target
,
3047 unsignedp
, OPTAB_DIRECT
);
3052 if (optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
3054 temp
= expand_binop (mode
, rotr_optab
, op0
, GEN_INT (8), target
,
3055 unsignedp
, OPTAB_DIRECT
);
3060 last
= get_last_insn ();
3062 temp1
= expand_binop (mode
, ashl_optab
, op0
, GEN_INT (8), NULL_RTX
,
3063 unsignedp
, OPTAB_WIDEN
);
3064 temp2
= expand_binop (mode
, lshr_optab
, op0
, GEN_INT (8), NULL_RTX
,
3065 unsignedp
, OPTAB_WIDEN
);
3068 temp
= expand_binop (mode
, ior_optab
, temp1
, temp2
, target
,
3069 unsignedp
, OPTAB_WIDEN
);
3074 delete_insns_since (last
);
3077 temp
= widen_bswap (mode
, op0
, target
);
3081 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3082 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3084 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3092 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3093 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3094 wider_mode
!= VOIDmode
;
3095 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3097 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3100 rtx last
= get_last_insn ();
3102 /* For certain operations, we need not actually extend
3103 the narrow operand, as long as we will truncate the
3104 results to the same narrowness. */
3106 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3107 (unoptab
== neg_optab
3108 || unoptab
== one_cmpl_optab
)
3109 && mclass
== MODE_INT
);
3111 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3116 if (mclass
!= MODE_INT
3117 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
3120 target
= gen_reg_rtx (mode
);
3121 convert_move (target
, temp
, 0);
3125 return gen_lowpart (mode
, temp
);
3128 delete_insns_since (last
);
3132 /* These can be done a word at a time. */
3133 if (unoptab
== one_cmpl_optab
3134 && mclass
== MODE_INT
3135 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3136 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3141 if (target
== 0 || target
== op0
|| !valid_multiword_target_p (target
))
3142 target
= gen_reg_rtx (mode
);
3146 /* Do the actual arithmetic. */
3147 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3149 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3150 rtx x
= expand_unop (word_mode
, unoptab
,
3151 operand_subword_force (op0
, i
, mode
),
3152 target_piece
, unsignedp
);
3154 if (target_piece
!= x
)
3155 emit_move_insn (target_piece
, x
);
3158 insns
= get_insns ();
3165 if (unoptab
->code
== NEG
)
3167 /* Try negating floating point values by flipping the sign bit. */
3168 if (SCALAR_FLOAT_MODE_P (mode
))
3170 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3175 /* If there is no negation pattern, and we have no negative zero,
3176 try subtracting from zero. */
3177 if (!HONOR_SIGNED_ZEROS (mode
))
3179 temp
= expand_binop (mode
, (unoptab
== negv_optab
3180 ? subv_optab
: sub_optab
),
3181 CONST0_RTX (mode
), op0
, target
,
3182 unsignedp
, OPTAB_DIRECT
);
3188 /* Try calculating parity (x) as popcount (x) % 2. */
3189 if (unoptab
== parity_optab
)
3191 temp
= expand_parity (mode
, op0
, target
);
3196 /* Try implementing ffs (x) in terms of clz (x). */
3197 if (unoptab
== ffs_optab
)
3199 temp
= expand_ffs (mode
, op0
, target
);
3204 /* Try implementing ctz (x) in terms of clz (x). */
3205 if (unoptab
== ctz_optab
)
3207 temp
= expand_ctz (mode
, op0
, target
);
3213 /* Now try a library call in this mode. */
3214 libfunc
= optab_libfunc (unoptab
, mode
);
3220 enum machine_mode outmode
= mode
;
3222 /* All of these functions return small values. Thus we choose to
3223 have them return something that isn't a double-word. */
3224 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3225 || unoptab
== clrsb_optab
|| unoptab
== popcount_optab
3226 || unoptab
== parity_optab
)
3228 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3229 optab_libfunc (unoptab
, mode
)));
3233 /* Pass 1 for NO_QUEUE so we don't lose any increments
3234 if the libcall is cse'd or moved. */
3235 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3237 insns
= get_insns ();
3240 target
= gen_reg_rtx (outmode
);
3241 eq_value
= gen_rtx_fmt_e (unoptab
->code
, mode
, op0
);
3242 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3243 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3244 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3245 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3246 emit_libcall_block_1 (insns
, target
, value
, eq_value
,
3247 trapv_unoptab_p (unoptab
));
3252 /* It can't be done in this mode. Can we do it in a wider mode? */
3254 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3256 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3257 wider_mode
!= VOIDmode
;
3258 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3260 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3261 || optab_libfunc (unoptab
, wider_mode
))
3264 rtx last
= get_last_insn ();
3266 /* For certain operations, we need not actually extend
3267 the narrow operand, as long as we will truncate the
3268 results to the same narrowness. */
3269 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3270 (unoptab
== neg_optab
3271 || unoptab
== one_cmpl_optab
3272 || unoptab
== bswap_optab
)
3273 && mclass
== MODE_INT
);
3275 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3278 /* If we are generating clz using wider mode, adjust the
3279 result. Similarly for clrsb. */
3280 if ((unoptab
== clz_optab
|| unoptab
== clrsb_optab
)
3282 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
3283 GEN_INT (GET_MODE_PRECISION (wider_mode
)
3284 - GET_MODE_PRECISION (mode
)),
3285 target
, true, OPTAB_DIRECT
);
3287 /* Likewise for bswap. */
3288 if (unoptab
== bswap_optab
&& temp
!= 0)
3290 gcc_assert (GET_MODE_PRECISION (wider_mode
)
3291 == GET_MODE_BITSIZE (wider_mode
)
3292 && GET_MODE_PRECISION (mode
)
3293 == GET_MODE_BITSIZE (mode
));
3295 temp
= expand_shift (RSHIFT_EXPR
, wider_mode
, temp
,
3296 GET_MODE_BITSIZE (wider_mode
)
3297 - GET_MODE_BITSIZE (mode
),
3303 if (mclass
!= MODE_INT
)
3306 target
= gen_reg_rtx (mode
);
3307 convert_move (target
, temp
, 0);
3311 return gen_lowpart (mode
, temp
);
3314 delete_insns_since (last
);
3319 /* One final attempt at implementing negation via subtraction,
3320 this time allowing widening of the operand. */
3321 if (unoptab
->code
== NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3324 temp
= expand_binop (mode
,
3325 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3326 CONST0_RTX (mode
), op0
,
3327 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3335 /* Emit code to compute the absolute value of OP0, with result to
3336 TARGET if convenient. (TARGET may be 0.) The return value says
3337 where the result actually is to be found.
3339 MODE is the mode of the operand; the mode of the result is
3340 different but can be deduced from MODE.
3345 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3346 int result_unsignedp
)
3351 result_unsignedp
= 1;
3353 /* First try to do it with a special abs instruction. */
3354 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3359 /* For floating point modes, try clearing the sign bit. */
3360 if (SCALAR_FLOAT_MODE_P (mode
))
3362 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3367 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3368 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3369 && !HONOR_SIGNED_ZEROS (mode
))
3371 rtx last
= get_last_insn ();
3373 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
3375 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3381 delete_insns_since (last
);
3384 /* If this machine has expensive jumps, we can do integer absolute
3385 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3386 where W is the width of MODE. */
3388 if (GET_MODE_CLASS (mode
) == MODE_INT
3389 && BRANCH_COST (optimize_insn_for_speed_p (),
3392 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3393 GET_MODE_PRECISION (mode
) - 1,
3396 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3399 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3400 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3410 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3411 int result_unsignedp
, int safe
)
3416 result_unsignedp
= 1;
3418 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3422 /* If that does not win, use conditional jump and negate. */
3424 /* It is safe to use the target if it is the same
3425 as the source if this is also a pseudo register */
3426 if (op0
== target
&& REG_P (op0
)
3427 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3430 op1
= gen_label_rtx ();
3431 if (target
== 0 || ! safe
3432 || GET_MODE (target
) != mode
3433 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3435 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3436 target
= gen_reg_rtx (mode
);
3438 emit_move_insn (target
, op0
);
3441 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3442 NULL_RTX
, NULL_RTX
, op1
, -1);
3444 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3447 emit_move_insn (target
, op0
);
3453 /* Emit code to compute the one's complement absolute value of OP0
3454 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3455 (TARGET may be NULL_RTX.) The return value says where the result
3456 actually is to be found.
3458 MODE is the mode of the operand; the mode of the result is
3459 different but can be deduced from MODE. */
3462 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3466 /* Not applicable for floating point modes. */
3467 if (FLOAT_MODE_P (mode
))
3470 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3471 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3473 rtx last
= get_last_insn ();
3475 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3477 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3483 delete_insns_since (last
);
3486 /* If this machine has expensive jumps, we can do one's complement
3487 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3489 if (GET_MODE_CLASS (mode
) == MODE_INT
3490 && BRANCH_COST (optimize_insn_for_speed_p (),
3493 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3494 GET_MODE_PRECISION (mode
) - 1,
3497 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3507 /* A subroutine of expand_copysign, perform the copysign operation using the
3508 abs and neg primitives advertised to exist on the target. The assumption
3509 is that we have a split register file, and leaving op0 in fp registers,
3510 and not playing with subregs so much, will help the register allocator. */
3513 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3514 int bitpos
, bool op0_is_abs
)
3516 enum machine_mode imode
;
3517 enum insn_code icode
;
3523 /* Check if the back end provides an insn that handles signbit for the
3525 icode
= optab_handler (signbit_optab
, mode
);
3526 if (icode
!= CODE_FOR_nothing
)
3528 imode
= insn_data
[(int) icode
].operand
[0].mode
;
3529 sign
= gen_reg_rtx (imode
);
3530 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3536 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3538 imode
= int_mode_for_mode (mode
);
3539 if (imode
== BLKmode
)
3541 op1
= gen_lowpart (imode
, op1
);
3548 if (FLOAT_WORDS_BIG_ENDIAN
)
3549 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3551 word
= bitpos
/ BITS_PER_WORD
;
3552 bitpos
= bitpos
% BITS_PER_WORD
;
3553 op1
= operand_subword_force (op1
, word
, mode
);
3556 mask
= double_int_setbit (double_int_zero
, bitpos
);
3558 sign
= expand_binop (imode
, and_optab
, op1
,
3559 immed_double_int_const (mask
, imode
),
3560 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3565 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3572 if (target
== NULL_RTX
)
3573 target
= copy_to_reg (op0
);
3575 emit_move_insn (target
, op0
);
3578 label
= gen_label_rtx ();
3579 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3581 if (GET_CODE (op0
) == CONST_DOUBLE
)
3582 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3584 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3586 emit_move_insn (target
, op0
);
3594 /* A subroutine of expand_copysign, perform the entire copysign operation
3595 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3596 is true if op0 is known to have its sign bit clear. */
3599 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3600 int bitpos
, bool op0_is_abs
)
3602 enum machine_mode imode
;
3604 int word
, nwords
, i
;
3607 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3609 imode
= int_mode_for_mode (mode
);
3610 if (imode
== BLKmode
)
3619 if (FLOAT_WORDS_BIG_ENDIAN
)
3620 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3622 word
= bitpos
/ BITS_PER_WORD
;
3623 bitpos
= bitpos
% BITS_PER_WORD
;
3624 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3627 mask
= double_int_setbit (double_int_zero
, bitpos
);
3632 || (nwords
> 1 && !valid_multiword_target_p (target
)))
3633 target
= gen_reg_rtx (mode
);
3639 for (i
= 0; i
< nwords
; ++i
)
3641 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3642 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3648 = expand_binop (imode
, and_optab
, op0_piece
,
3649 immed_double_int_const (double_int_not (mask
),
3651 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3653 op1
= expand_binop (imode
, and_optab
,
3654 operand_subword_force (op1
, i
, mode
),
3655 immed_double_int_const (mask
, imode
),
3656 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3658 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3659 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3660 if (temp
!= targ_piece
)
3661 emit_move_insn (targ_piece
, temp
);
3664 emit_move_insn (targ_piece
, op0_piece
);
3667 insns
= get_insns ();
3674 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3675 immed_double_int_const (mask
, imode
),
3676 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3678 op0
= gen_lowpart (imode
, op0
);
3680 op0
= expand_binop (imode
, and_optab
, op0
,
3681 immed_double_int_const (double_int_not (mask
),
3683 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3685 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3686 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3687 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3693 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3694 scalar floating point mode. Return NULL if we do not know how to
3695 expand the operation inline. */
3698 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3700 enum machine_mode mode
= GET_MODE (op0
);
3701 const struct real_format
*fmt
;
3705 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3706 gcc_assert (GET_MODE (op1
) == mode
);
3708 /* First try to do it with a special instruction. */
3709 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3710 target
, 0, OPTAB_DIRECT
);
3714 fmt
= REAL_MODE_FORMAT (mode
);
3715 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3719 if (GET_CODE (op0
) == CONST_DOUBLE
)
3721 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3722 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3726 if (fmt
->signbit_ro
>= 0
3727 && (GET_CODE (op0
) == CONST_DOUBLE
3728 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3729 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3731 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3732 fmt
->signbit_ro
, op0_is_abs
);
3737 if (fmt
->signbit_rw
< 0)
3739 return expand_copysign_bit (mode
, op0
, op1
, target
,
3740 fmt
->signbit_rw
, op0_is_abs
);
3743 /* Generate an instruction whose insn-code is INSN_CODE,
3744 with two operands: an output TARGET and an input OP0.
3745 TARGET *must* be nonzero, and the output is always stored there.
3746 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3747 the value that is stored into TARGET.
3749 Return false if expansion failed. */
3752 maybe_emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
,
3755 struct expand_operand ops
[2];
3758 create_output_operand (&ops
[0], target
, GET_MODE (target
));
3759 create_input_operand (&ops
[1], op0
, GET_MODE (op0
));
3760 pat
= maybe_gen_insn (icode
, 2, ops
);
3764 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3765 add_equal_note (pat
, ops
[0].value
, code
, ops
[1].value
, NULL_RTX
);
3769 if (ops
[0].value
!= target
)
3770 emit_move_insn (target
, ops
[0].value
);
3773 /* Generate an instruction whose insn-code is INSN_CODE,
3774 with two operands: an output TARGET and an input OP0.
3775 TARGET *must* be nonzero, and the output is always stored there.
3776 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3777 the value that is stored into TARGET. */
3780 emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
, enum rtx_code code
)
3782 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3786 struct no_conflict_data
3788 rtx target
, first
, insn
;
3792 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3793 the currently examined clobber / store has to stay in the list of
3794 insns that constitute the actual libcall block. */
3796 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3798 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3800 /* If this inns directly contributes to setting the target, it must stay. */
3801 if (reg_overlap_mentioned_p (p
->target
, dest
))
3802 p
->must_stay
= true;
3803 /* If we haven't committed to keeping any other insns in the list yet,
3804 there is nothing more to check. */
3805 else if (p
->insn
== p
->first
)
3807 /* If this insn sets / clobbers a register that feeds one of the insns
3808 already in the list, this insn has to stay too. */
3809 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3810 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3811 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3812 /* Likewise if this insn depends on a register set by a previous
3813 insn in the list, or if it sets a result (presumably a hard
3814 register) that is set or clobbered by a previous insn.
3815 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3816 SET_DEST perform the former check on the address, and the latter
3817 check on the MEM. */
3818 || (GET_CODE (set
) == SET
3819 && (modified_in_p (SET_SRC (set
), p
->first
)
3820 || modified_in_p (SET_DEST (set
), p
->first
)
3821 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3822 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3823 p
->must_stay
= true;
3827 /* Emit code to make a call to a constant function or a library call.
3829 INSNS is a list containing all insns emitted in the call.
3830 These insns leave the result in RESULT. Our block is to copy RESULT
3831 to TARGET, which is logically equivalent to EQUIV.
3833 We first emit any insns that set a pseudo on the assumption that these are
3834 loading constants into registers; doing so allows them to be safely cse'ed
3835 between blocks. Then we emit all the other insns in the block, followed by
3836 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3837 note with an operand of EQUIV. */
3840 emit_libcall_block_1 (rtx insns
, rtx target
, rtx result
, rtx equiv
,
3841 bool equiv_may_trap
)
3843 rtx final_dest
= target
;
3844 rtx next
, last
, insn
;
3846 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3847 into a MEM later. Protect the libcall block from this change. */
3848 if (! REG_P (target
) || REG_USERVAR_P (target
))
3849 target
= gen_reg_rtx (GET_MODE (target
));
3851 /* If we're using non-call exceptions, a libcall corresponding to an
3852 operation that may trap may also trap. */
3853 /* ??? See the comment in front of make_reg_eh_region_note. */
3854 if (cfun
->can_throw_non_call_exceptions
3855 && (equiv_may_trap
|| may_trap_p (equiv
)))
3857 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3860 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3863 int lp_nr
= INTVAL (XEXP (note
, 0));
3864 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3865 remove_note (insn
, note
);
3871 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3872 reg note to indicate that this call cannot throw or execute a nonlocal
3873 goto (unless there is already a REG_EH_REGION note, in which case
3875 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3877 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3880 /* First emit all insns that set pseudos. Remove them from the list as
3881 we go. Avoid insns that set pseudos which were referenced in previous
3882 insns. These can be generated by move_by_pieces, for example,
3883 to update an address. Similarly, avoid insns that reference things
3884 set in previous insns. */
3886 for (insn
= insns
; insn
; insn
= next
)
3888 rtx set
= single_set (insn
);
3890 next
= NEXT_INSN (insn
);
3892 if (set
!= 0 && REG_P (SET_DEST (set
))
3893 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3895 struct no_conflict_data data
;
3897 data
.target
= const0_rtx
;
3901 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3902 if (! data
.must_stay
)
3904 if (PREV_INSN (insn
))
3905 NEXT_INSN (PREV_INSN (insn
)) = next
;
3910 PREV_INSN (next
) = PREV_INSN (insn
);
3916 /* Some ports use a loop to copy large arguments onto the stack.
3917 Don't move anything outside such a loop. */
3922 /* Write the remaining insns followed by the final copy. */
3923 for (insn
= insns
; insn
; insn
= next
)
3925 next
= NEXT_INSN (insn
);
3930 last
= emit_move_insn (target
, result
);
3931 set_dst_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
), target
);
3933 if (final_dest
!= target
)
3934 emit_move_insn (final_dest
, target
);
3938 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3940 emit_libcall_block_1 (insns
, target
, result
, equiv
, false);
3943 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3944 PURPOSE describes how this comparison will be used. CODE is the rtx
3945 comparison code we will be using.
3947 ??? Actually, CODE is slightly weaker than that. A target is still
3948 required to implement all of the normal bcc operations, but not
3949 required to implement all (or any) of the unordered bcc operations. */
3952 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3953 enum can_compare_purpose purpose
)
3956 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
3959 enum insn_code icode
;
3961 if (purpose
== ccp_jump
3962 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
3963 && insn_operand_matches (icode
, 0, test
))
3965 if (purpose
== ccp_store_flag
3966 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
3967 && insn_operand_matches (icode
, 1, test
))
3969 if (purpose
== ccp_cmov
3970 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
3973 mode
= GET_MODE_WIDER_MODE (mode
);
3974 PUT_MODE (test
, mode
);
3976 while (mode
!= VOIDmode
);
3981 /* This function is called when we are going to emit a compare instruction that
3982 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3984 *PMODE is the mode of the inputs (in case they are const_int).
3985 *PUNSIGNEDP nonzero says that the operands are unsigned;
3986 this matters if they need to be widened (as given by METHODS).
3988 If they have mode BLKmode, then SIZE specifies the size of both operands.
3990 This function performs all the setup necessary so that the caller only has
3991 to emit a single comparison insn. This setup can involve doing a BLKmode
3992 comparison or emitting a library call to perform the comparison if no insn
3993 is available to handle it.
3994 The values which are passed in through pointers can be modified; the caller
3995 should perform the comparison on the modified values. Constant
3996 comparisons must have already been folded. */
3999 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4000 int unsignedp
, enum optab_methods methods
,
4001 rtx
*ptest
, enum machine_mode
*pmode
)
4003 enum machine_mode mode
= *pmode
;
4005 enum machine_mode cmp_mode
;
4006 enum mode_class mclass
;
4008 /* The other methods are not needed. */
4009 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
4010 || methods
== OPTAB_LIB_WIDEN
);
4012 /* If we are optimizing, force expensive constants into a register. */
4013 if (CONSTANT_P (x
) && optimize
4014 && (rtx_cost (x
, COMPARE
, 0, optimize_insn_for_speed_p ())
4015 > COSTS_N_INSNS (1)))
4016 x
= force_reg (mode
, x
);
4018 if (CONSTANT_P (y
) && optimize
4019 && (rtx_cost (y
, COMPARE
, 1, optimize_insn_for_speed_p ())
4020 > COSTS_N_INSNS (1)))
4021 y
= force_reg (mode
, y
);
4024 /* Make sure if we have a canonical comparison. The RTL
4025 documentation states that canonical comparisons are required only
4026 for targets which have cc0. */
4027 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4030 /* Don't let both operands fail to indicate the mode. */
4031 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4032 x
= force_reg (mode
, x
);
4033 if (mode
== VOIDmode
)
4034 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4036 /* Handle all BLKmode compares. */
4038 if (mode
== BLKmode
)
4040 enum machine_mode result_mode
;
4041 enum insn_code cmp_code
;
4046 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4050 /* Try to use a memory block compare insn - either cmpstr
4051 or cmpmem will do. */
4052 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4053 cmp_mode
!= VOIDmode
;
4054 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4056 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4057 if (cmp_code
== CODE_FOR_nothing
)
4058 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4059 if (cmp_code
== CODE_FOR_nothing
)
4060 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4061 if (cmp_code
== CODE_FOR_nothing
)
4064 /* Must make sure the size fits the insn's mode. */
4065 if ((CONST_INT_P (size
)
4066 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4067 || (GET_MODE_BITSIZE (GET_MODE (size
))
4068 > GET_MODE_BITSIZE (cmp_mode
)))
4071 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4072 result
= gen_reg_rtx (result_mode
);
4073 size
= convert_to_mode (cmp_mode
, size
, 1);
4074 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4076 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4077 *pmode
= result_mode
;
4081 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4084 /* Otherwise call a library function, memcmp. */
4085 libfunc
= memcmp_libfunc
;
4086 length_type
= sizetype
;
4087 result_mode
= TYPE_MODE (integer_type_node
);
4088 cmp_mode
= TYPE_MODE (length_type
);
4089 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4090 TYPE_UNSIGNED (length_type
));
4092 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4098 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4099 *pmode
= result_mode
;
4103 /* Don't allow operands to the compare to trap, as that can put the
4104 compare and branch in different basic blocks. */
4105 if (cfun
->can_throw_non_call_exceptions
)
4108 x
= force_reg (mode
, x
);
4110 y
= force_reg (mode
, y
);
4113 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4115 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4116 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4120 mclass
= GET_MODE_CLASS (mode
);
4121 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4125 enum insn_code icode
;
4126 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4127 if (icode
!= CODE_FOR_nothing
4128 && insn_operand_matches (icode
, 0, test
))
4130 rtx last
= get_last_insn ();
4131 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4132 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4134 && insn_operand_matches (icode
, 1, op0
)
4135 && insn_operand_matches (icode
, 2, op1
))
4137 XEXP (test
, 0) = op0
;
4138 XEXP (test
, 1) = op1
;
4143 delete_insns_since (last
);
4146 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4148 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4150 while (cmp_mode
!= VOIDmode
);
4152 if (methods
!= OPTAB_LIB_WIDEN
)
4155 if (!SCALAR_FLOAT_MODE_P (mode
))
4158 enum machine_mode ret_mode
;
4160 /* Handle a libcall just for the mode we are using. */
4161 libfunc
= optab_libfunc (cmp_optab
, mode
);
4162 gcc_assert (libfunc
);
4164 /* If we want unsigned, and this mode has a distinct unsigned
4165 comparison routine, use that. */
4168 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4173 ret_mode
= targetm
.libgcc_cmp_return_mode ();
4174 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4175 ret_mode
, 2, x
, mode
, y
, mode
);
4177 /* There are two kinds of comparison routines. Biased routines
4178 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4179 of gcc expect that the comparison operation is equivalent
4180 to the modified comparison. For signed comparisons compare the
4181 result against 1 in the biased case, and zero in the unbiased
4182 case. For unsigned comparisons always compare against 1 after
4183 biasing the unbiased result by adding 1. This gives us a way to
4185 The comparisons in the fixed-point helper library are always
4190 if (!TARGET_LIB_INT_CMP_BIASED
&& !ALL_FIXED_POINT_MODE_P (mode
))
4193 x
= plus_constant (ret_mode
, result
, 1);
4199 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4203 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4211 /* Before emitting an insn with code ICODE, make sure that X, which is going
4212 to be used for operand OPNUM of the insn, is converted from mode MODE to
4213 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4214 that it is accepted by the operand predicate. Return the new value. */
4217 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, enum machine_mode mode
,
4218 enum machine_mode wider_mode
, int unsignedp
)
4220 if (mode
!= wider_mode
)
4221 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4223 if (!insn_operand_matches (icode
, opnum
, x
))
4225 if (reload_completed
)
4227 x
= copy_to_mode_reg (insn_data
[(int) icode
].operand
[opnum
].mode
, x
);
4233 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4234 we can do the branch. */
4237 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
)
4239 enum machine_mode optab_mode
;
4240 enum mode_class mclass
;
4241 enum insn_code icode
;
4243 mclass
= GET_MODE_CLASS (mode
);
4244 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4245 icode
= optab_handler (cbranch_optab
, optab_mode
);
4247 gcc_assert (icode
!= CODE_FOR_nothing
);
4248 gcc_assert (insn_operand_matches (icode
, 0, test
));
4249 emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0), XEXP (test
, 1), label
));
4252 /* Generate code to compare X with Y so that the condition codes are
4253 set and to jump to LABEL if the condition is true. If X is a
4254 constant and Y is not a constant, then the comparison is swapped to
4255 ensure that the comparison RTL has the canonical form.
4257 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4258 need to be widened. UNSIGNEDP is also used to select the proper
4259 branch condition code.
4261 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4263 MODE is the mode of the inputs (in case they are const_int).
4265 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4266 It will be potentially converted into an unsigned variant based on
4267 UNSIGNEDP to select a proper jump instruction. */
4270 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4271 enum machine_mode mode
, int unsignedp
, rtx label
)
4273 rtx op0
= x
, op1
= y
;
4276 /* Swap operands and condition to ensure canonical RTL. */
4277 if (swap_commutative_operands_p (x
, y
)
4278 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4281 comparison
= swap_condition (comparison
);
4284 /* If OP0 is still a constant, then both X and Y must be constants
4285 or the opposite comparison is not supported. Force X into a register
4286 to create canonical RTL. */
4287 if (CONSTANT_P (op0
))
4288 op0
= force_reg (mode
, op0
);
4291 comparison
= unsigned_condition (comparison
);
4293 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4295 emit_cmp_and_jump_insn_1 (test
, mode
, label
);
4299 /* Emit a library call comparison between floating point X and Y.
4300 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4303 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4304 rtx
*ptest
, enum machine_mode
*pmode
)
4306 enum rtx_code swapped
= swap_condition (comparison
);
4307 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4308 enum machine_mode orig_mode
= GET_MODE (x
);
4309 enum machine_mode mode
, cmp_mode
;
4310 rtx true_rtx
, false_rtx
;
4311 rtx value
, target
, insns
, equiv
;
4313 bool reversed_p
= false;
4314 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4316 for (mode
= orig_mode
;
4318 mode
= GET_MODE_WIDER_MODE (mode
))
4320 if (code_to_optab
[comparison
]
4321 && (libfunc
= optab_libfunc (code_to_optab
[comparison
], mode
)))
4324 if (code_to_optab
[swapped
]
4325 && (libfunc
= optab_libfunc (code_to_optab
[swapped
], mode
)))
4328 tmp
= x
; x
= y
; y
= tmp
;
4329 comparison
= swapped
;
4333 if (code_to_optab
[reversed
]
4334 && (libfunc
= optab_libfunc (code_to_optab
[reversed
], mode
)))
4336 comparison
= reversed
;
4342 gcc_assert (mode
!= VOIDmode
);
4344 if (mode
!= orig_mode
)
4346 x
= convert_to_mode (mode
, x
, 0);
4347 y
= convert_to_mode (mode
, y
, 0);
4350 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4351 the RTL. The allows the RTL optimizers to delete the libcall if the
4352 condition can be determined at compile-time. */
4353 if (comparison
== UNORDERED
4354 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4356 true_rtx
= const_true_rtx
;
4357 false_rtx
= const0_rtx
;
4364 true_rtx
= const0_rtx
;
4365 false_rtx
= const_true_rtx
;
4369 true_rtx
= const_true_rtx
;
4370 false_rtx
= const0_rtx
;
4374 true_rtx
= const1_rtx
;
4375 false_rtx
= const0_rtx
;
4379 true_rtx
= const0_rtx
;
4380 false_rtx
= constm1_rtx
;
4384 true_rtx
= constm1_rtx
;
4385 false_rtx
= const0_rtx
;
4389 true_rtx
= const0_rtx
;
4390 false_rtx
= const1_rtx
;
4398 if (comparison
== UNORDERED
)
4400 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4401 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4402 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4403 temp
, const_true_rtx
, equiv
);
4407 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4408 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4409 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4410 equiv
, true_rtx
, false_rtx
);
4414 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4415 cmp_mode
, 2, x
, mode
, y
, mode
);
4416 insns
= get_insns ();
4419 target
= gen_reg_rtx (cmp_mode
);
4420 emit_libcall_block (insns
, target
, value
, equiv
);
4422 if (comparison
== UNORDERED
4423 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4425 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4427 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4432 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4435 emit_indirect_jump (rtx loc
)
4437 struct expand_operand ops
[1];
4439 create_address_operand (&ops
[0], loc
);
4440 expand_jump_insn (CODE_FOR_indirect_jump
, 1, ops
);
4444 #ifdef HAVE_conditional_move
4446 /* Emit a conditional move instruction if the machine supports one for that
4447 condition and machine mode.
4449 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4450 the mode to use should they be constants. If it is VOIDmode, they cannot
4453 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4454 should be stored there. MODE is the mode to use should they be constants.
4455 If it is VOIDmode, they cannot both be constants.
4457 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4458 is not supported. */
4461 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4462 enum machine_mode cmode
, rtx op2
, rtx op3
,
4463 enum machine_mode mode
, int unsignedp
)
4465 rtx tem
, comparison
, last
;
4466 enum insn_code icode
;
4467 enum rtx_code reversed
;
4469 /* If one operand is constant, make it the second one. Only do this
4470 if the other operand is not constant as well. */
4472 if (swap_commutative_operands_p (op0
, op1
))
4477 code
= swap_condition (code
);
4480 /* get_condition will prefer to generate LT and GT even if the old
4481 comparison was against zero, so undo that canonicalization here since
4482 comparisons against zero are cheaper. */
4483 if (code
== LT
&& op1
== const1_rtx
)
4484 code
= LE
, op1
= const0_rtx
;
4485 else if (code
== GT
&& op1
== constm1_rtx
)
4486 code
= GE
, op1
= const0_rtx
;
4488 if (cmode
== VOIDmode
)
4489 cmode
= GET_MODE (op0
);
4491 if (swap_commutative_operands_p (op2
, op3
)
4492 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4501 if (mode
== VOIDmode
)
4502 mode
= GET_MODE (op2
);
4504 icode
= direct_optab_handler (movcc_optab
, mode
);
4506 if (icode
== CODE_FOR_nothing
)
4510 target
= gen_reg_rtx (mode
);
4512 code
= unsignedp
? unsigned_condition (code
) : code
;
4513 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4515 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4516 return NULL and let the caller figure out how best to deal with this
4518 if (!COMPARISON_P (comparison
))
4521 do_pending_stack_adjust ();
4522 last
= get_last_insn ();
4523 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4524 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4525 &comparison
, &cmode
);
4528 struct expand_operand ops
[4];
4530 create_output_operand (&ops
[0], target
, mode
);
4531 create_fixed_operand (&ops
[1], comparison
);
4532 create_input_operand (&ops
[2], op2
, mode
);
4533 create_input_operand (&ops
[3], op3
, mode
);
4534 if (maybe_expand_insn (icode
, 4, ops
))
4536 if (ops
[0].value
!= target
)
4537 convert_move (target
, ops
[0].value
, false);
4541 delete_insns_since (last
);
4545 /* Return nonzero if a conditional move of mode MODE is supported.
4547 This function is for combine so it can tell whether an insn that looks
4548 like a conditional move is actually supported by the hardware. If we
4549 guess wrong we lose a bit on optimization, but that's it. */
4550 /* ??? sparc64 supports conditionally moving integers values based on fp
4551 comparisons, and vice versa. How do we handle them? */
4554 can_conditionally_move_p (enum machine_mode mode
)
4556 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4562 #endif /* HAVE_conditional_move */
4564 /* Emit a conditional addition instruction if the machine supports one for that
4565 condition and machine mode.
4567 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4568 the mode to use should they be constants. If it is VOIDmode, they cannot
4571 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4572 should be stored there. MODE is the mode to use should they be constants.
4573 If it is VOIDmode, they cannot both be constants.
4575 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4576 is not supported. */
4579 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4580 enum machine_mode cmode
, rtx op2
, rtx op3
,
4581 enum machine_mode mode
, int unsignedp
)
4583 rtx tem
, comparison
, last
;
4584 enum insn_code icode
;
4585 enum rtx_code reversed
;
4587 /* If one operand is constant, make it the second one. Only do this
4588 if the other operand is not constant as well. */
4590 if (swap_commutative_operands_p (op0
, op1
))
4595 code
= swap_condition (code
);
4598 /* get_condition will prefer to generate LT and GT even if the old
4599 comparison was against zero, so undo that canonicalization here since
4600 comparisons against zero are cheaper. */
4601 if (code
== LT
&& op1
== const1_rtx
)
4602 code
= LE
, op1
= const0_rtx
;
4603 else if (code
== GT
&& op1
== constm1_rtx
)
4604 code
= GE
, op1
= const0_rtx
;
4606 if (cmode
== VOIDmode
)
4607 cmode
= GET_MODE (op0
);
4609 if (swap_commutative_operands_p (op2
, op3
)
4610 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4619 if (mode
== VOIDmode
)
4620 mode
= GET_MODE (op2
);
4622 icode
= optab_handler (addcc_optab
, mode
);
4624 if (icode
== CODE_FOR_nothing
)
4628 target
= gen_reg_rtx (mode
);
4630 code
= unsignedp
? unsigned_condition (code
) : code
;
4631 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4633 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4634 return NULL and let the caller figure out how best to deal with this
4636 if (!COMPARISON_P (comparison
))
4639 do_pending_stack_adjust ();
4640 last
= get_last_insn ();
4641 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4642 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4643 &comparison
, &cmode
);
4646 struct expand_operand ops
[4];
4648 create_output_operand (&ops
[0], target
, mode
);
4649 create_fixed_operand (&ops
[1], comparison
);
4650 create_input_operand (&ops
[2], op2
, mode
);
4651 create_input_operand (&ops
[3], op3
, mode
);
4652 if (maybe_expand_insn (icode
, 4, ops
))
4654 if (ops
[0].value
!= target
)
4655 convert_move (target
, ops
[0].value
, false);
4659 delete_insns_since (last
);
4663 /* These functions attempt to generate an insn body, rather than
4664 emitting the insn, but if the gen function already emits them, we
4665 make no attempt to turn them back into naked patterns. */
4667 /* Generate and return an insn body to add Y to X. */
4670 gen_add2_insn (rtx x
, rtx y
)
4672 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4674 gcc_assert (insn_operand_matches (icode
, 0, x
));
4675 gcc_assert (insn_operand_matches (icode
, 1, x
));
4676 gcc_assert (insn_operand_matches (icode
, 2, y
));
4678 return GEN_FCN (icode
) (x
, x
, y
);
4681 /* Generate and return an insn body to add r1 and c,
4682 storing the result in r0. */
4685 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4687 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4689 if (icode
== CODE_FOR_nothing
4690 || !insn_operand_matches (icode
, 0, r0
)
4691 || !insn_operand_matches (icode
, 1, r1
)
4692 || !insn_operand_matches (icode
, 2, c
))
4695 return GEN_FCN (icode
) (r0
, r1
, c
);
4699 have_add2_insn (rtx x
, rtx y
)
4701 enum insn_code icode
;
4703 gcc_assert (GET_MODE (x
) != VOIDmode
);
4705 icode
= optab_handler (add_optab
, GET_MODE (x
));
4707 if (icode
== CODE_FOR_nothing
)
4710 if (!insn_operand_matches (icode
, 0, x
)
4711 || !insn_operand_matches (icode
, 1, x
)
4712 || !insn_operand_matches (icode
, 2, y
))
4718 /* Generate and return an insn body to subtract Y from X. */
4721 gen_sub2_insn (rtx x
, rtx y
)
4723 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4725 gcc_assert (insn_operand_matches (icode
, 0, x
));
4726 gcc_assert (insn_operand_matches (icode
, 1, x
));
4727 gcc_assert (insn_operand_matches (icode
, 2, y
));
4729 return GEN_FCN (icode
) (x
, x
, y
);
4732 /* Generate and return an insn body to subtract r1 and c,
4733 storing the result in r0. */
4736 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4738 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4740 if (icode
== CODE_FOR_nothing
4741 || !insn_operand_matches (icode
, 0, r0
)
4742 || !insn_operand_matches (icode
, 1, r1
)
4743 || !insn_operand_matches (icode
, 2, c
))
4746 return GEN_FCN (icode
) (r0
, r1
, c
);
4750 have_sub2_insn (rtx x
, rtx y
)
4752 enum insn_code icode
;
4754 gcc_assert (GET_MODE (x
) != VOIDmode
);
4756 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4758 if (icode
== CODE_FOR_nothing
)
4761 if (!insn_operand_matches (icode
, 0, x
)
4762 || !insn_operand_matches (icode
, 1, x
)
4763 || !insn_operand_matches (icode
, 2, y
))
4769 /* Generate the body of an instruction to copy Y into X.
4770 It may be a list of insns, if one insn isn't enough. */
4773 gen_move_insn (rtx x
, rtx y
)
4778 emit_move_insn_1 (x
, y
);
4784 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4785 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4786 no such operation exists, CODE_FOR_nothing will be returned. */
4789 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4793 #ifdef HAVE_ptr_extend
4795 return CODE_FOR_ptr_extend
;
4798 tab
= unsignedp
? zext_optab
: sext_optab
;
4799 return convert_optab_handler (tab
, to_mode
, from_mode
);
4802 /* Generate the body of an insn to extend Y (with mode MFROM)
4803 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4806 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4807 enum machine_mode mfrom
, int unsignedp
)
4809 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4810 return GEN_FCN (icode
) (x
, y
);
4813 /* can_fix_p and can_float_p say whether the target machine
4814 can directly convert a given fixed point type to
4815 a given floating point type, or vice versa.
4816 The returned value is the CODE_FOR_... value to use,
4817 or CODE_FOR_nothing if these modes cannot be directly converted.
4819 *TRUNCP_PTR is set to 1 if it is necessary to output
4820 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4822 static enum insn_code
4823 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4824 int unsignedp
, int *truncp_ptr
)
4827 enum insn_code icode
;
4829 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4830 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4831 if (icode
!= CODE_FOR_nothing
)
4837 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4838 for this to work. We need to rework the fix* and ftrunc* patterns
4839 and documentation. */
4840 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4841 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4842 if (icode
!= CODE_FOR_nothing
4843 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4850 return CODE_FOR_nothing
;
4854 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4859 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4860 return convert_optab_handler (tab
, fltmode
, fixmode
);
4863 /* Function supportable_convert_operation
4865 Check whether an operation represented by the code CODE is a
4866 convert operation that is supported by the target platform in
4867 vector form (i.e., when operating on arguments of type VECTYPE_IN
4868 producing a result of type VECTYPE_OUT).
4870 Convert operations we currently support directly are FIX_TRUNC and FLOAT.
4871 This function checks if these operations are supported
4872 by the target platform either directly (via vector tree-codes), or via
4876 - CODE1 is code of vector operation to be used when
4877 vectorizing the operation, if available.
4878 - DECL is decl of target builtin functions to be used
4879 when vectorizing the operation, if available. In this case,
4880 CODE1 is CALL_EXPR. */
4883 supportable_convert_operation (enum tree_code code
,
4884 tree vectype_out
, tree vectype_in
,
4885 tree
*decl
, enum tree_code
*code1
)
4887 enum machine_mode m1
,m2
;
4890 m1
= TYPE_MODE (vectype_out
);
4891 m2
= TYPE_MODE (vectype_in
);
4893 /* First check if we can done conversion directly. */
4894 if ((code
== FIX_TRUNC_EXPR
4895 && can_fix_p (m1
,m2
,TYPE_UNSIGNED (vectype_out
), &truncp
)
4896 != CODE_FOR_nothing
)
4897 || (code
== FLOAT_EXPR
4898 && can_float_p (m1
,m2
,TYPE_UNSIGNED (vectype_in
))
4899 != CODE_FOR_nothing
))
4905 /* Now check for builtin. */
4906 if (targetm
.vectorize
.builtin_conversion
4907 && targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
))
4910 *decl
= targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
);
4917 /* Generate code to convert FROM to floating point
4918 and store in TO. FROM must be fixed point and not VOIDmode.
4919 UNSIGNEDP nonzero means regard FROM as unsigned.
4920 Normally this is done by correcting the final value
4921 if it is negative. */
4924 expand_float (rtx to
, rtx from
, int unsignedp
)
4926 enum insn_code icode
;
4928 enum machine_mode fmode
, imode
;
4929 bool can_do_signed
= false;
4931 /* Crash now, because we won't be able to decide which mode to use. */
4932 gcc_assert (GET_MODE (from
) != VOIDmode
);
4934 /* Look for an insn to do the conversion. Do it in the specified
4935 modes if possible; otherwise convert either input, output or both to
4936 wider mode. If the integer mode is wider than the mode of FROM,
4937 we can do the conversion signed even if the input is unsigned. */
4939 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4940 fmode
= GET_MODE_WIDER_MODE (fmode
))
4941 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4942 imode
= GET_MODE_WIDER_MODE (imode
))
4944 int doing_unsigned
= unsignedp
;
4946 if (fmode
!= GET_MODE (to
)
4947 && significand_size (fmode
) < GET_MODE_PRECISION (GET_MODE (from
)))
4950 icode
= can_float_p (fmode
, imode
, unsignedp
);
4951 if (icode
== CODE_FOR_nothing
&& unsignedp
)
4953 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
4954 if (scode
!= CODE_FOR_nothing
)
4955 can_do_signed
= true;
4956 if (imode
!= GET_MODE (from
))
4957 icode
= scode
, doing_unsigned
= 0;
4960 if (icode
!= CODE_FOR_nothing
)
4962 if (imode
!= GET_MODE (from
))
4963 from
= convert_to_mode (imode
, from
, unsignedp
);
4965 if (fmode
!= GET_MODE (to
))
4966 target
= gen_reg_rtx (fmode
);
4968 emit_unop_insn (icode
, target
, from
,
4969 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4972 convert_move (to
, target
, 0);
4977 /* Unsigned integer, and no way to convert directly. Convert as signed,
4978 then unconditionally adjust the result. */
4979 if (unsignedp
&& can_do_signed
)
4981 rtx label
= gen_label_rtx ();
4983 REAL_VALUE_TYPE offset
;
4985 /* Look for a usable floating mode FMODE wider than the source and at
4986 least as wide as the target. Using FMODE will avoid rounding woes
4987 with unsigned values greater than the signed maximum value. */
4989 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4990 fmode
= GET_MODE_WIDER_MODE (fmode
))
4991 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4992 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4995 if (fmode
== VOIDmode
)
4997 /* There is no such mode. Pretend the target is wide enough. */
4998 fmode
= GET_MODE (to
);
5000 /* Avoid double-rounding when TO is narrower than FROM. */
5001 if ((significand_size (fmode
) + 1)
5002 < GET_MODE_PRECISION (GET_MODE (from
)))
5005 rtx neglabel
= gen_label_rtx ();
5007 /* Don't use TARGET if it isn't a register, is a hard register,
5008 or is the wrong mode. */
5010 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5011 || GET_MODE (target
) != fmode
)
5012 target
= gen_reg_rtx (fmode
);
5014 imode
= GET_MODE (from
);
5015 do_pending_stack_adjust ();
5017 /* Test whether the sign bit is set. */
5018 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5021 /* The sign bit is not set. Convert as signed. */
5022 expand_float (target
, from
, 0);
5023 emit_jump_insn (gen_jump (label
));
5026 /* The sign bit is set.
5027 Convert to a usable (positive signed) value by shifting right
5028 one bit, while remembering if a nonzero bit was shifted
5029 out; i.e., compute (from & 1) | (from >> 1). */
5031 emit_label (neglabel
);
5032 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5033 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5034 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, 1, NULL_RTX
, 1);
5035 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5037 expand_float (target
, temp
, 0);
5039 /* Multiply by 2 to undo the shift above. */
5040 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5041 target
, 0, OPTAB_LIB_WIDEN
);
5043 emit_move_insn (target
, temp
);
5045 do_pending_stack_adjust ();
5051 /* If we are about to do some arithmetic to correct for an
5052 unsigned operand, do it in a pseudo-register. */
5054 if (GET_MODE (to
) != fmode
5055 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5056 target
= gen_reg_rtx (fmode
);
5058 /* Convert as signed integer to floating. */
5059 expand_float (target
, from
, 0);
5061 /* If FROM is negative (and therefore TO is negative),
5062 correct its value by 2**bitwidth. */
5064 do_pending_stack_adjust ();
5065 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5069 real_2expN (&offset
, GET_MODE_PRECISION (GET_MODE (from
)), fmode
);
5070 temp
= expand_binop (fmode
, add_optab
, target
,
5071 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5072 target
, 0, OPTAB_LIB_WIDEN
);
5074 emit_move_insn (target
, temp
);
5076 do_pending_stack_adjust ();
5081 /* No hardware instruction available; call a library routine. */
5086 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5088 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5089 from
= convert_to_mode (SImode
, from
, unsignedp
);
5091 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5092 gcc_assert (libfunc
);
5096 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5097 GET_MODE (to
), 1, from
,
5099 insns
= get_insns ();
5102 emit_libcall_block (insns
, target
, value
,
5103 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5104 GET_MODE (to
), from
));
5109 /* Copy result to requested destination
5110 if we have been computing in a temp location. */
5114 if (GET_MODE (target
) == GET_MODE (to
))
5115 emit_move_insn (to
, target
);
5117 convert_move (to
, target
, 0);
5121 /* Generate code to convert FROM to fixed point and store in TO. FROM
5122 must be floating point. */
5125 expand_fix (rtx to
, rtx from
, int unsignedp
)
5127 enum insn_code icode
;
5129 enum machine_mode fmode
, imode
;
5132 /* We first try to find a pair of modes, one real and one integer, at
5133 least as wide as FROM and TO, respectively, in which we can open-code
5134 this conversion. If the integer mode is wider than the mode of TO,
5135 we can do the conversion either signed or unsigned. */
5137 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5138 fmode
= GET_MODE_WIDER_MODE (fmode
))
5139 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5140 imode
= GET_MODE_WIDER_MODE (imode
))
5142 int doing_unsigned
= unsignedp
;
5144 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5145 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5146 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5148 if (icode
!= CODE_FOR_nothing
)
5150 rtx last
= get_last_insn ();
5151 if (fmode
!= GET_MODE (from
))
5152 from
= convert_to_mode (fmode
, from
, 0);
5156 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5157 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5161 if (imode
!= GET_MODE (to
))
5162 target
= gen_reg_rtx (imode
);
5164 if (maybe_emit_unop_insn (icode
, target
, from
,
5165 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5168 convert_move (to
, target
, unsignedp
);
5171 delete_insns_since (last
);
5175 /* For an unsigned conversion, there is one more way to do it.
5176 If we have a signed conversion, we generate code that compares
5177 the real value to the largest representable positive number. If if
5178 is smaller, the conversion is done normally. Otherwise, subtract
5179 one plus the highest signed number, convert, and add it back.
5181 We only need to check all real modes, since we know we didn't find
5182 anything with a wider integer mode.
5184 This code used to extend FP value into mode wider than the destination.
5185 This is needed for decimal float modes which cannot accurately
5186 represent one plus the highest signed number of the same size, but
5187 not for binary modes. Consider, for instance conversion from SFmode
5190 The hot path through the code is dealing with inputs smaller than 2^63
5191 and doing just the conversion, so there is no bits to lose.
5193 In the other path we know the value is positive in the range 2^63..2^64-1
5194 inclusive. (as for other input overflow happens and result is undefined)
5195 So we know that the most important bit set in mantissa corresponds to
5196 2^63. The subtraction of 2^63 should not generate any rounding as it
5197 simply clears out that bit. The rest is trivial. */
5199 if (unsignedp
&& GET_MODE_PRECISION (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5200 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5201 fmode
= GET_MODE_WIDER_MODE (fmode
))
5202 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5203 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5204 || GET_MODE_BITSIZE (fmode
) > GET_MODE_PRECISION (GET_MODE (to
))))
5207 REAL_VALUE_TYPE offset
;
5208 rtx limit
, lab1
, lab2
, insn
;
5210 bitsize
= GET_MODE_PRECISION (GET_MODE (to
));
5211 real_2expN (&offset
, bitsize
- 1, fmode
);
5212 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5213 lab1
= gen_label_rtx ();
5214 lab2
= gen_label_rtx ();
5216 if (fmode
!= GET_MODE (from
))
5217 from
= convert_to_mode (fmode
, from
, 0);
5219 /* See if we need to do the subtraction. */
5220 do_pending_stack_adjust ();
5221 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5224 /* If not, do the signed "fix" and branch around fixup code. */
5225 expand_fix (to
, from
, 0);
5226 emit_jump_insn (gen_jump (lab2
));
5229 /* Otherwise, subtract 2**(N-1), convert to signed number,
5230 then add 2**(N-1). Do the addition using XOR since this
5231 will often generate better code. */
5233 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5234 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5235 expand_fix (to
, target
, 0);
5236 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5238 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5240 to
, 1, OPTAB_LIB_WIDEN
);
5243 emit_move_insn (to
, target
);
5247 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5249 /* Make a place for a REG_NOTE and add it. */
5250 insn
= emit_move_insn (to
, to
);
5251 set_dst_reg_note (insn
, REG_EQUAL
,
5252 gen_rtx_fmt_e (UNSIGNED_FIX
, GET_MODE (to
),
5260 /* We can't do it with an insn, so use a library call. But first ensure
5261 that the mode of TO is at least as wide as SImode, since those are the
5262 only library calls we know about. */
5264 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5266 target
= gen_reg_rtx (SImode
);
5268 expand_fix (target
, from
, unsignedp
);
5276 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5277 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5278 gcc_assert (libfunc
);
5282 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5283 GET_MODE (to
), 1, from
,
5285 insns
= get_insns ();
5288 emit_libcall_block (insns
, target
, value
,
5289 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5290 GET_MODE (to
), from
));
5295 if (GET_MODE (to
) == GET_MODE (target
))
5296 emit_move_insn (to
, target
);
5298 convert_move (to
, target
, 0);
5302 /* Generate code to convert FROM or TO a fixed-point.
5303 If UINTP is true, either TO or FROM is an unsigned integer.
5304 If SATP is true, we need to saturate the result. */
5307 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5309 enum machine_mode to_mode
= GET_MODE (to
);
5310 enum machine_mode from_mode
= GET_MODE (from
);
5312 enum rtx_code this_code
;
5313 enum insn_code code
;
5317 if (to_mode
== from_mode
)
5319 emit_move_insn (to
, from
);
5325 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5326 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5330 tab
= satp
? satfract_optab
: fract_optab
;
5331 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5333 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5334 if (code
!= CODE_FOR_nothing
)
5336 emit_unop_insn (code
, to
, from
, this_code
);
5340 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5341 gcc_assert (libfunc
);
5344 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5345 1, from
, from_mode
);
5346 insns
= get_insns ();
5349 emit_libcall_block (insns
, to
, value
,
5350 gen_rtx_fmt_e (tab
->code
, to_mode
, from
));
5353 /* Generate code to convert FROM to fixed point and store in TO. FROM
5354 must be floating point, TO must be signed. Use the conversion optab
5355 TAB to do the conversion. */
5358 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5360 enum insn_code icode
;
5362 enum machine_mode fmode
, imode
;
5364 /* We first try to find a pair of modes, one real and one integer, at
5365 least as wide as FROM and TO, respectively, in which we can open-code
5366 this conversion. If the integer mode is wider than the mode of TO,
5367 we can do the conversion either signed or unsigned. */
5369 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5370 fmode
= GET_MODE_WIDER_MODE (fmode
))
5371 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5372 imode
= GET_MODE_WIDER_MODE (imode
))
5374 icode
= convert_optab_handler (tab
, imode
, fmode
);
5375 if (icode
!= CODE_FOR_nothing
)
5377 rtx last
= get_last_insn ();
5378 if (fmode
!= GET_MODE (from
))
5379 from
= convert_to_mode (fmode
, from
, 0);
5381 if (imode
!= GET_MODE (to
))
5382 target
= gen_reg_rtx (imode
);
5384 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5386 delete_insns_since (last
);
5390 convert_move (to
, target
, 0);
5398 /* Report whether we have an instruction to perform the operation
5399 specified by CODE on operands of mode MODE. */
5401 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5403 return (code_to_optab
[(int) code
] != 0
5404 && (optab_handler (code_to_optab
[(int) code
], mode
)
5405 != CODE_FOR_nothing
));
5408 /* Set all insn_code fields to CODE_FOR_nothing. */
5411 init_insn_codes (void)
5413 memset (optab_table
, 0, sizeof (optab_table
));
5414 memset (convert_optab_table
, 0, sizeof (convert_optab_table
));
5415 memset (direct_optab_table
, 0, sizeof (direct_optab_table
));
5418 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5420 init_optab (optab op
, enum rtx_code code
)
5423 code_to_optab
[(int) code
] = op
;
5426 /* Same, but fill in its code as CODE, and do _not_ write it into
5427 the code_to_optab table. */
5429 init_optabv (optab op
, enum rtx_code code
)
5434 /* Conversion optabs never go in the code_to_optab table. */
5436 init_convert_optab (convert_optab op
, enum rtx_code code
)
5441 /* Initialize the libfunc fields of an entire group of entries in some
5442 optab. Each entry is set equal to a string consisting of a leading
5443 pair of underscores followed by a generic operation name followed by
5444 a mode name (downshifted to lowercase) followed by a single character
5445 representing the number of operands for the given operation (which is
5446 usually one of the characters '2', '3', or '4').
5448 OPTABLE is the table in which libfunc fields are to be initialized.
5449 OPNAME is the generic (string) name of the operation.
5450 SUFFIX is the character which specifies the number of operands for
5451 the given generic operation.
5452 MODE is the mode to generate for.
5456 gen_libfunc (optab optable
, const char *opname
, int suffix
, enum machine_mode mode
)
5458 unsigned opname_len
= strlen (opname
);
5459 const char *mname
= GET_MODE_NAME (mode
);
5460 unsigned mname_len
= strlen (mname
);
5461 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5462 int len
= prefix_len
+ opname_len
+ mname_len
+ 1 + 1;
5463 char *libfunc_name
= XALLOCAVEC (char, len
);
5470 if (targetm
.libfunc_gnu_prefix
)
5477 for (q
= opname
; *q
; )
5479 for (q
= mname
; *q
; q
++)
5480 *p
++ = TOLOWER (*q
);
5484 set_optab_libfunc (optable
, mode
,
5485 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5488 /* Like gen_libfunc, but verify that integer operation is involved. */
5491 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5492 enum machine_mode mode
)
5494 int maxsize
= 2 * BITS_PER_WORD
;
5496 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5498 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5499 maxsize
= LONG_LONG_TYPE_SIZE
;
5500 if (GET_MODE_CLASS (mode
) != MODE_INT
5501 || mode
< word_mode
|| GET_MODE_BITSIZE (mode
) > maxsize
)
5503 gen_libfunc (optable
, opname
, suffix
, mode
);
5506 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5509 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5510 enum machine_mode mode
)
5514 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5515 gen_libfunc (optable
, opname
, suffix
, mode
);
5516 if (DECIMAL_FLOAT_MODE_P (mode
))
5518 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5519 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5520 depending on the low level floating format used. */
5521 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5522 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5523 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5527 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5530 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5531 enum machine_mode mode
)
5533 if (!ALL_FIXED_POINT_MODE_P (mode
))
5535 gen_libfunc (optable
, opname
, suffix
, mode
);
5538 /* Like gen_libfunc, but verify that signed fixed-point operation is
5542 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5543 enum machine_mode mode
)
5545 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5547 gen_libfunc (optable
, opname
, suffix
, mode
);
5550 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5554 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5555 enum machine_mode mode
)
5557 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5559 gen_libfunc (optable
, opname
, suffix
, mode
);
5562 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5565 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5566 enum machine_mode mode
)
5568 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5569 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5570 if (INTEGRAL_MODE_P (mode
))
5571 gen_int_libfunc (optable
, name
, suffix
, mode
);
5574 /* Like gen_libfunc, but verify that FP or INT operation is involved
5575 and add 'v' suffix for integer operation. */
5578 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5579 enum machine_mode mode
)
5581 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5582 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5583 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5585 int len
= strlen (name
);
5586 char *v_name
= XALLOCAVEC (char, len
+ 2);
5587 strcpy (v_name
, name
);
5589 v_name
[len
+ 1] = 0;
5590 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5594 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5598 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5599 enum machine_mode mode
)
5601 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5602 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5603 if (INTEGRAL_MODE_P (mode
))
5604 gen_int_libfunc (optable
, name
, suffix
, mode
);
5605 if (ALL_FIXED_POINT_MODE_P (mode
))
5606 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5609 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5613 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5614 enum machine_mode mode
)
5616 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5617 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5618 if (INTEGRAL_MODE_P (mode
))
5619 gen_int_libfunc (optable
, name
, suffix
, mode
);
5620 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5621 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5624 /* Like gen_libfunc, but verify that INT or FIXED operation is
5628 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5629 enum machine_mode mode
)
5631 if (INTEGRAL_MODE_P (mode
))
5632 gen_int_libfunc (optable
, name
, suffix
, mode
);
5633 if (ALL_FIXED_POINT_MODE_P (mode
))
5634 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5637 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5641 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5642 enum machine_mode mode
)
5644 if (INTEGRAL_MODE_P (mode
))
5645 gen_int_libfunc (optable
, name
, suffix
, mode
);
5646 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5647 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5650 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5654 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5655 enum machine_mode mode
)
5657 if (INTEGRAL_MODE_P (mode
))
5658 gen_int_libfunc (optable
, name
, suffix
, mode
);
5659 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5660 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5663 /* Initialize the libfunc fields of an entire group of entries of an
5664 inter-mode-class conversion optab. The string formation rules are
5665 similar to the ones for init_libfuncs, above, but instead of having
5666 a mode name and an operand count these functions have two mode names
5667 and no operand count. */
5670 gen_interclass_conv_libfunc (convert_optab tab
,
5672 enum machine_mode tmode
,
5673 enum machine_mode fmode
)
5675 size_t opname_len
= strlen (opname
);
5676 size_t mname_len
= 0;
5678 const char *fname
, *tname
;
5680 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5681 char *libfunc_name
, *suffix
;
5682 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5685 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5686 depends on which underlying decimal floating point format is used. */
5687 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5689 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5691 nondec_name
= XALLOCAVEC (char, prefix_len
+ opname_len
+ mname_len
+ 1 + 1);
5692 nondec_name
[0] = '_';
5693 nondec_name
[1] = '_';
5694 if (targetm
.libfunc_gnu_prefix
)
5696 nondec_name
[2] = 'g';
5697 nondec_name
[3] = 'n';
5698 nondec_name
[4] = 'u';
5699 nondec_name
[5] = '_';
5702 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5703 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5705 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5708 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5709 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5710 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5712 fname
= GET_MODE_NAME (fmode
);
5713 tname
= GET_MODE_NAME (tmode
);
5715 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5717 libfunc_name
= dec_name
;
5718 suffix
= dec_suffix
;
5722 libfunc_name
= nondec_name
;
5723 suffix
= nondec_suffix
;
5727 for (q
= fname
; *q
; p
++, q
++)
5729 for (q
= tname
; *q
; p
++, q
++)
5734 set_conv_libfunc (tab
, tmode
, fmode
,
5735 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5738 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5739 int->fp conversion. */
5742 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5744 enum machine_mode tmode
,
5745 enum machine_mode fmode
)
5747 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5749 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5751 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5754 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5758 gen_ufloat_conv_libfunc (convert_optab tab
,
5759 const char *opname ATTRIBUTE_UNUSED
,
5760 enum machine_mode tmode
,
5761 enum machine_mode fmode
)
5763 if (DECIMAL_FLOAT_MODE_P (tmode
))
5764 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5766 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5769 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5770 fp->int conversion. */
5773 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5775 enum machine_mode tmode
,
5776 enum machine_mode fmode
)
5778 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5780 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5782 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5785 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5786 fp->int conversion with no decimal floating point involved. */
5789 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5791 enum machine_mode tmode
,
5792 enum machine_mode fmode
)
5794 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5796 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5798 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5801 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5802 The string formation rules are
5803 similar to the ones for init_libfunc, above. */
5806 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5807 enum machine_mode tmode
, enum machine_mode fmode
)
5809 size_t opname_len
= strlen (opname
);
5810 size_t mname_len
= 0;
5812 const char *fname
, *tname
;
5814 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5815 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5816 char *libfunc_name
, *suffix
;
5819 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5820 depends on which underlying decimal floating point format is used. */
5821 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5823 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5825 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5826 nondec_name
[0] = '_';
5827 nondec_name
[1] = '_';
5828 if (targetm
.libfunc_gnu_prefix
)
5830 nondec_name
[2] = 'g';
5831 nondec_name
[3] = 'n';
5832 nondec_name
[4] = 'u';
5833 nondec_name
[5] = '_';
5835 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5836 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5838 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5841 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5842 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5843 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5845 fname
= GET_MODE_NAME (fmode
);
5846 tname
= GET_MODE_NAME (tmode
);
5848 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5850 libfunc_name
= dec_name
;
5851 suffix
= dec_suffix
;
5855 libfunc_name
= nondec_name
;
5856 suffix
= nondec_suffix
;
5860 for (q
= fname
; *q
; p
++, q
++)
5862 for (q
= tname
; *q
; p
++, q
++)
5868 set_conv_libfunc (tab
, tmode
, fmode
,
5869 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5872 /* Pick proper libcall for trunc_optab. We need to chose if we do
5873 truncation or extension and interclass or intraclass. */
5876 gen_trunc_conv_libfunc (convert_optab tab
,
5878 enum machine_mode tmode
,
5879 enum machine_mode fmode
)
5881 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5883 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5888 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5889 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5890 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5892 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5895 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5896 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5897 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5898 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5901 /* Pick proper libcall for extend_optab. We need to chose if we do
5902 truncation or extension and interclass or intraclass. */
5905 gen_extend_conv_libfunc (convert_optab tab
,
5906 const char *opname ATTRIBUTE_UNUSED
,
5907 enum machine_mode tmode
,
5908 enum machine_mode fmode
)
5910 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5912 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5917 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5918 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5919 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5921 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5924 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5925 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5926 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5927 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5930 /* Pick proper libcall for fract_optab. We need to chose if we do
5931 interclass or intraclass. */
5934 gen_fract_conv_libfunc (convert_optab tab
,
5936 enum machine_mode tmode
,
5937 enum machine_mode fmode
)
5941 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
5944 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5945 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5947 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5950 /* Pick proper libcall for fractuns_optab. */
5953 gen_fractuns_conv_libfunc (convert_optab tab
,
5955 enum machine_mode tmode
,
5956 enum machine_mode fmode
)
5960 /* One mode must be a fixed-point mode, and the other must be an integer
5962 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
5963 || (ALL_FIXED_POINT_MODE_P (fmode
)
5964 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
5967 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5970 /* Pick proper libcall for satfract_optab. We need to chose if we do
5971 interclass or intraclass. */
5974 gen_satfract_conv_libfunc (convert_optab tab
,
5976 enum machine_mode tmode
,
5977 enum machine_mode fmode
)
5981 /* TMODE must be a fixed-point mode. */
5982 if (!ALL_FIXED_POINT_MODE_P (tmode
))
5985 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5986 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5988 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5991 /* Pick proper libcall for satfractuns_optab. */
5994 gen_satfractuns_conv_libfunc (convert_optab tab
,
5996 enum machine_mode tmode
,
5997 enum machine_mode fmode
)
6001 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6002 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
6005 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6008 /* A table of previously-created libfuncs, hashed by name. */
6009 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
6011 /* Hashtable callbacks for libfunc_decls. */
6014 libfunc_decl_hash (const void *entry
)
6016 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
6020 libfunc_decl_eq (const void *entry1
, const void *entry2
)
6022 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
6025 /* Build a decl for a libfunc named NAME. */
6028 build_libfunc_function (const char *name
)
6030 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
6031 get_identifier (name
),
6032 build_function_type (integer_type_node
, NULL_TREE
));
6033 /* ??? We don't have any type information except for this is
6034 a function. Pretend this is "int foo()". */
6035 DECL_ARTIFICIAL (decl
) = 1;
6036 DECL_EXTERNAL (decl
) = 1;
6037 TREE_PUBLIC (decl
) = 1;
6038 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
6040 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6041 are the flags assigned by targetm.encode_section_info. */
6042 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6048 init_one_libfunc (const char *name
)
6054 if (libfunc_decls
== NULL
)
6055 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6056 libfunc_decl_eq
, NULL
);
6058 /* See if we have already created a libfunc decl for this function. */
6059 id
= get_identifier (name
);
6060 hash
= IDENTIFIER_HASH_VALUE (id
);
6061 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6062 decl
= (tree
) *slot
;
6065 /* Create a new decl, so that it can be passed to
6066 targetm.encode_section_info. */
6067 decl
= build_libfunc_function (name
);
6070 return XEXP (DECL_RTL (decl
), 0);
6073 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6076 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6082 id
= get_identifier (name
);
6083 hash
= IDENTIFIER_HASH_VALUE (id
);
6084 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6086 decl
= (tree
) *slot
;
6087 set_user_assembler_name (decl
, asmspec
);
6088 return XEXP (DECL_RTL (decl
), 0);
6091 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6092 MODE to NAME, which should be either 0 or a string constant. */
6094 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
6097 struct libfunc_entry e
;
6098 struct libfunc_entry
**slot
;
6099 e
.optab
= (size_t) (optable
- &optab_table
[0]);
6104 val
= init_one_libfunc (name
);
6107 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6109 *slot
= ggc_alloc_libfunc_entry ();
6110 (*slot
)->optab
= (size_t) (optable
- &optab_table
[0]);
6111 (*slot
)->mode1
= mode
;
6112 (*slot
)->mode2
= VOIDmode
;
6113 (*slot
)->libfunc
= val
;
6116 /* Call this to reset the function entry for one conversion optab
6117 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6118 either 0 or a string constant. */
6120 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
6121 enum machine_mode fmode
, const char *name
)
6124 struct libfunc_entry e
;
6125 struct libfunc_entry
**slot
;
6126 e
.optab
= (size_t) (optable
- &convert_optab_table
[0]);
6131 val
= init_one_libfunc (name
);
6134 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6136 *slot
= ggc_alloc_libfunc_entry ();
6137 (*slot
)->optab
= (size_t) (optable
- &convert_optab_table
[0]);
6138 (*slot
)->mode1
= tmode
;
6139 (*slot
)->mode2
= fmode
;
6140 (*slot
)->libfunc
= val
;
6143 /* Call this to initialize the contents of the optabs
6144 appropriately for the current target machine. */
6151 htab_empty (libfunc_hash
);
6152 /* We statically initialize the insn_codes with the equivalent of
6153 CODE_FOR_nothing. Repeat the process if reinitialising. */
6157 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6159 init_optab (add_optab
, PLUS
);
6160 init_optabv (addv_optab
, PLUS
);
6161 init_optab (sub_optab
, MINUS
);
6162 init_optabv (subv_optab
, MINUS
);
6163 init_optab (ssadd_optab
, SS_PLUS
);
6164 init_optab (usadd_optab
, US_PLUS
);
6165 init_optab (sssub_optab
, SS_MINUS
);
6166 init_optab (ussub_optab
, US_MINUS
);
6167 init_optab (smul_optab
, MULT
);
6168 init_optab (ssmul_optab
, SS_MULT
);
6169 init_optab (usmul_optab
, US_MULT
);
6170 init_optabv (smulv_optab
, MULT
);
6171 init_optab (smul_highpart_optab
, UNKNOWN
);
6172 init_optab (umul_highpart_optab
, UNKNOWN
);
6173 init_optab (smul_widen_optab
, UNKNOWN
);
6174 init_optab (umul_widen_optab
, UNKNOWN
);
6175 init_optab (usmul_widen_optab
, UNKNOWN
);
6176 init_optab (smadd_widen_optab
, UNKNOWN
);
6177 init_optab (umadd_widen_optab
, UNKNOWN
);
6178 init_optab (ssmadd_widen_optab
, UNKNOWN
);
6179 init_optab (usmadd_widen_optab
, UNKNOWN
);
6180 init_optab (smsub_widen_optab
, UNKNOWN
);
6181 init_optab (umsub_widen_optab
, UNKNOWN
);
6182 init_optab (ssmsub_widen_optab
, UNKNOWN
);
6183 init_optab (usmsub_widen_optab
, UNKNOWN
);
6184 init_optab (sdiv_optab
, DIV
);
6185 init_optab (ssdiv_optab
, SS_DIV
);
6186 init_optab (usdiv_optab
, US_DIV
);
6187 init_optabv (sdivv_optab
, DIV
);
6188 init_optab (sdivmod_optab
, UNKNOWN
);
6189 init_optab (udiv_optab
, UDIV
);
6190 init_optab (udivmod_optab
, UNKNOWN
);
6191 init_optab (smod_optab
, MOD
);
6192 init_optab (umod_optab
, UMOD
);
6193 init_optab (fmod_optab
, UNKNOWN
);
6194 init_optab (remainder_optab
, UNKNOWN
);
6195 init_optab (ftrunc_optab
, UNKNOWN
);
6196 init_optab (and_optab
, AND
);
6197 init_optab (ior_optab
, IOR
);
6198 init_optab (xor_optab
, XOR
);
6199 init_optab (ashl_optab
, ASHIFT
);
6200 init_optab (ssashl_optab
, SS_ASHIFT
);
6201 init_optab (usashl_optab
, US_ASHIFT
);
6202 init_optab (ashr_optab
, ASHIFTRT
);
6203 init_optab (lshr_optab
, LSHIFTRT
);
6204 init_optabv (vashl_optab
, ASHIFT
);
6205 init_optabv (vashr_optab
, ASHIFTRT
);
6206 init_optabv (vlshr_optab
, LSHIFTRT
);
6207 init_optab (rotl_optab
, ROTATE
);
6208 init_optab (rotr_optab
, ROTATERT
);
6209 init_optab (smin_optab
, SMIN
);
6210 init_optab (smax_optab
, SMAX
);
6211 init_optab (umin_optab
, UMIN
);
6212 init_optab (umax_optab
, UMAX
);
6213 init_optab (pow_optab
, UNKNOWN
);
6214 init_optab (atan2_optab
, UNKNOWN
);
6215 init_optab (fma_optab
, FMA
);
6216 init_optab (fms_optab
, UNKNOWN
);
6217 init_optab (fnma_optab
, UNKNOWN
);
6218 init_optab (fnms_optab
, UNKNOWN
);
6220 /* These three have codes assigned exclusively for the sake of
6222 init_optab (mov_optab
, SET
);
6223 init_optab (movstrict_optab
, STRICT_LOW_PART
);
6224 init_optab (cbranch_optab
, COMPARE
);
6226 init_optab (cmov_optab
, UNKNOWN
);
6227 init_optab (cstore_optab
, UNKNOWN
);
6228 init_optab (ctrap_optab
, UNKNOWN
);
6230 init_optab (storent_optab
, UNKNOWN
);
6232 init_optab (cmp_optab
, UNKNOWN
);
6233 init_optab (ucmp_optab
, UNKNOWN
);
6235 init_optab (eq_optab
, EQ
);
6236 init_optab (ne_optab
, NE
);
6237 init_optab (gt_optab
, GT
);
6238 init_optab (ge_optab
, GE
);
6239 init_optab (lt_optab
, LT
);
6240 init_optab (le_optab
, LE
);
6241 init_optab (unord_optab
, UNORDERED
);
6243 init_optab (neg_optab
, NEG
);
6244 init_optab (ssneg_optab
, SS_NEG
);
6245 init_optab (usneg_optab
, US_NEG
);
6246 init_optabv (negv_optab
, NEG
);
6247 init_optab (abs_optab
, ABS
);
6248 init_optabv (absv_optab
, ABS
);
6249 init_optab (addcc_optab
, UNKNOWN
);
6250 init_optab (one_cmpl_optab
, NOT
);
6251 init_optab (bswap_optab
, BSWAP
);
6252 init_optab (ffs_optab
, FFS
);
6253 init_optab (clz_optab
, CLZ
);
6254 init_optab (ctz_optab
, CTZ
);
6255 init_optab (clrsb_optab
, CLRSB
);
6256 init_optab (popcount_optab
, POPCOUNT
);
6257 init_optab (parity_optab
, PARITY
);
6258 init_optab (sqrt_optab
, SQRT
);
6259 init_optab (floor_optab
, UNKNOWN
);
6260 init_optab (ceil_optab
, UNKNOWN
);
6261 init_optab (round_optab
, UNKNOWN
);
6262 init_optab (btrunc_optab
, UNKNOWN
);
6263 init_optab (nearbyint_optab
, UNKNOWN
);
6264 init_optab (rint_optab
, UNKNOWN
);
6265 init_optab (sincos_optab
, UNKNOWN
);
6266 init_optab (sin_optab
, UNKNOWN
);
6267 init_optab (asin_optab
, UNKNOWN
);
6268 init_optab (cos_optab
, UNKNOWN
);
6269 init_optab (acos_optab
, UNKNOWN
);
6270 init_optab (exp_optab
, UNKNOWN
);
6271 init_optab (exp10_optab
, UNKNOWN
);
6272 init_optab (exp2_optab
, UNKNOWN
);
6273 init_optab (expm1_optab
, UNKNOWN
);
6274 init_optab (ldexp_optab
, UNKNOWN
);
6275 init_optab (scalb_optab
, UNKNOWN
);
6276 init_optab (significand_optab
, UNKNOWN
);
6277 init_optab (logb_optab
, UNKNOWN
);
6278 init_optab (ilogb_optab
, UNKNOWN
);
6279 init_optab (log_optab
, UNKNOWN
);
6280 init_optab (log10_optab
, UNKNOWN
);
6281 init_optab (log2_optab
, UNKNOWN
);
6282 init_optab (log1p_optab
, UNKNOWN
);
6283 init_optab (tan_optab
, UNKNOWN
);
6284 init_optab (atan_optab
, UNKNOWN
);
6285 init_optab (copysign_optab
, UNKNOWN
);
6286 init_optab (signbit_optab
, UNKNOWN
);
6288 init_optab (isinf_optab
, UNKNOWN
);
6290 init_optab (strlen_optab
, UNKNOWN
);
6291 init_optab (push_optab
, UNKNOWN
);
6293 init_optab (reduc_smax_optab
, UNKNOWN
);
6294 init_optab (reduc_umax_optab
, UNKNOWN
);
6295 init_optab (reduc_smin_optab
, UNKNOWN
);
6296 init_optab (reduc_umin_optab
, UNKNOWN
);
6297 init_optab (reduc_splus_optab
, UNKNOWN
);
6298 init_optab (reduc_uplus_optab
, UNKNOWN
);
6300 init_optab (ssum_widen_optab
, UNKNOWN
);
6301 init_optab (usum_widen_optab
, UNKNOWN
);
6302 init_optab (sdot_prod_optab
, UNKNOWN
);
6303 init_optab (udot_prod_optab
, UNKNOWN
);
6305 init_optab (vec_extract_optab
, UNKNOWN
);
6306 init_optab (vec_set_optab
, UNKNOWN
);
6307 init_optab (vec_init_optab
, UNKNOWN
);
6308 init_optab (vec_shl_optab
, UNKNOWN
);
6309 init_optab (vec_shr_optab
, UNKNOWN
);
6310 init_optab (vec_realign_load_optab
, UNKNOWN
);
6311 init_optab (movmisalign_optab
, UNKNOWN
);
6312 init_optab (vec_widen_umult_hi_optab
, UNKNOWN
);
6313 init_optab (vec_widen_umult_lo_optab
, UNKNOWN
);
6314 init_optab (vec_widen_smult_hi_optab
, UNKNOWN
);
6315 init_optab (vec_widen_smult_lo_optab
, UNKNOWN
);
6316 init_optab (vec_widen_ushiftl_hi_optab
, UNKNOWN
);
6317 init_optab (vec_widen_ushiftl_lo_optab
, UNKNOWN
);
6318 init_optab (vec_widen_sshiftl_hi_optab
, UNKNOWN
);
6319 init_optab (vec_widen_sshiftl_lo_optab
, UNKNOWN
);
6320 init_optab (vec_unpacks_hi_optab
, UNKNOWN
);
6321 init_optab (vec_unpacks_lo_optab
, UNKNOWN
);
6322 init_optab (vec_unpacku_hi_optab
, UNKNOWN
);
6323 init_optab (vec_unpacku_lo_optab
, UNKNOWN
);
6324 init_optab (vec_unpacks_float_hi_optab
, UNKNOWN
);
6325 init_optab (vec_unpacks_float_lo_optab
, UNKNOWN
);
6326 init_optab (vec_unpacku_float_hi_optab
, UNKNOWN
);
6327 init_optab (vec_unpacku_float_lo_optab
, UNKNOWN
);
6328 init_optab (vec_pack_trunc_optab
, UNKNOWN
);
6329 init_optab (vec_pack_usat_optab
, UNKNOWN
);
6330 init_optab (vec_pack_ssat_optab
, UNKNOWN
);
6331 init_optab (vec_pack_ufix_trunc_optab
, UNKNOWN
);
6332 init_optab (vec_pack_sfix_trunc_optab
, UNKNOWN
);
6334 init_optab (powi_optab
, UNKNOWN
);
6337 init_convert_optab (sext_optab
, SIGN_EXTEND
);
6338 init_convert_optab (zext_optab
, ZERO_EXTEND
);
6339 init_convert_optab (trunc_optab
, TRUNCATE
);
6340 init_convert_optab (sfix_optab
, FIX
);
6341 init_convert_optab (ufix_optab
, UNSIGNED_FIX
);
6342 init_convert_optab (sfixtrunc_optab
, UNKNOWN
);
6343 init_convert_optab (ufixtrunc_optab
, UNKNOWN
);
6344 init_convert_optab (sfloat_optab
, FLOAT
);
6345 init_convert_optab (ufloat_optab
, UNSIGNED_FLOAT
);
6346 init_convert_optab (lrint_optab
, UNKNOWN
);
6347 init_convert_optab (lround_optab
, UNKNOWN
);
6348 init_convert_optab (lfloor_optab
, UNKNOWN
);
6349 init_convert_optab (lceil_optab
, UNKNOWN
);
6351 init_convert_optab (fract_optab
, FRACT_CONVERT
);
6352 init_convert_optab (fractuns_optab
, UNSIGNED_FRACT_CONVERT
);
6353 init_convert_optab (satfract_optab
, SAT_FRACT
);
6354 init_convert_optab (satfractuns_optab
, UNSIGNED_SAT_FRACT
);
6356 /* Fill in the optabs with the insns we support. */
6359 /* Initialize the optabs with the names of the library functions. */
6360 add_optab
->libcall_basename
= "add";
6361 add_optab
->libcall_suffix
= '3';
6362 add_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6363 addv_optab
->libcall_basename
= "add";
6364 addv_optab
->libcall_suffix
= '3';
6365 addv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6366 ssadd_optab
->libcall_basename
= "ssadd";
6367 ssadd_optab
->libcall_suffix
= '3';
6368 ssadd_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6369 usadd_optab
->libcall_basename
= "usadd";
6370 usadd_optab
->libcall_suffix
= '3';
6371 usadd_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6372 sub_optab
->libcall_basename
= "sub";
6373 sub_optab
->libcall_suffix
= '3';
6374 sub_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6375 subv_optab
->libcall_basename
= "sub";
6376 subv_optab
->libcall_suffix
= '3';
6377 subv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6378 sssub_optab
->libcall_basename
= "sssub";
6379 sssub_optab
->libcall_suffix
= '3';
6380 sssub_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6381 ussub_optab
->libcall_basename
= "ussub";
6382 ussub_optab
->libcall_suffix
= '3';
6383 ussub_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6384 smul_optab
->libcall_basename
= "mul";
6385 smul_optab
->libcall_suffix
= '3';
6386 smul_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6387 smulv_optab
->libcall_basename
= "mul";
6388 smulv_optab
->libcall_suffix
= '3';
6389 smulv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6390 ssmul_optab
->libcall_basename
= "ssmul";
6391 ssmul_optab
->libcall_suffix
= '3';
6392 ssmul_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6393 usmul_optab
->libcall_basename
= "usmul";
6394 usmul_optab
->libcall_suffix
= '3';
6395 usmul_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6396 sdiv_optab
->libcall_basename
= "div";
6397 sdiv_optab
->libcall_suffix
= '3';
6398 sdiv_optab
->libcall_gen
= gen_int_fp_signed_fixed_libfunc
;
6399 sdivv_optab
->libcall_basename
= "divv";
6400 sdivv_optab
->libcall_suffix
= '3';
6401 sdivv_optab
->libcall_gen
= gen_int_libfunc
;
6402 ssdiv_optab
->libcall_basename
= "ssdiv";
6403 ssdiv_optab
->libcall_suffix
= '3';
6404 ssdiv_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6405 udiv_optab
->libcall_basename
= "udiv";
6406 udiv_optab
->libcall_suffix
= '3';
6407 udiv_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6408 usdiv_optab
->libcall_basename
= "usdiv";
6409 usdiv_optab
->libcall_suffix
= '3';
6410 usdiv_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6411 sdivmod_optab
->libcall_basename
= "divmod";
6412 sdivmod_optab
->libcall_suffix
= '4';
6413 sdivmod_optab
->libcall_gen
= gen_int_libfunc
;
6414 udivmod_optab
->libcall_basename
= "udivmod";
6415 udivmod_optab
->libcall_suffix
= '4';
6416 udivmod_optab
->libcall_gen
= gen_int_libfunc
;
6417 smod_optab
->libcall_basename
= "mod";
6418 smod_optab
->libcall_suffix
= '3';
6419 smod_optab
->libcall_gen
= gen_int_libfunc
;
6420 umod_optab
->libcall_basename
= "umod";
6421 umod_optab
->libcall_suffix
= '3';
6422 umod_optab
->libcall_gen
= gen_int_libfunc
;
6423 ftrunc_optab
->libcall_basename
= "ftrunc";
6424 ftrunc_optab
->libcall_suffix
= '2';
6425 ftrunc_optab
->libcall_gen
= gen_fp_libfunc
;
6426 and_optab
->libcall_basename
= "and";
6427 and_optab
->libcall_suffix
= '3';
6428 and_optab
->libcall_gen
= gen_int_libfunc
;
6429 ior_optab
->libcall_basename
= "ior";
6430 ior_optab
->libcall_suffix
= '3';
6431 ior_optab
->libcall_gen
= gen_int_libfunc
;
6432 xor_optab
->libcall_basename
= "xor";
6433 xor_optab
->libcall_suffix
= '3';
6434 xor_optab
->libcall_gen
= gen_int_libfunc
;
6435 ashl_optab
->libcall_basename
= "ashl";
6436 ashl_optab
->libcall_suffix
= '3';
6437 ashl_optab
->libcall_gen
= gen_int_fixed_libfunc
;
6438 ssashl_optab
->libcall_basename
= "ssashl";
6439 ssashl_optab
->libcall_suffix
= '3';
6440 ssashl_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6441 usashl_optab
->libcall_basename
= "usashl";
6442 usashl_optab
->libcall_suffix
= '3';
6443 usashl_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6444 ashr_optab
->libcall_basename
= "ashr";
6445 ashr_optab
->libcall_suffix
= '3';
6446 ashr_optab
->libcall_gen
= gen_int_signed_fixed_libfunc
;
6447 lshr_optab
->libcall_basename
= "lshr";
6448 lshr_optab
->libcall_suffix
= '3';
6449 lshr_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6450 smin_optab
->libcall_basename
= "min";
6451 smin_optab
->libcall_suffix
= '3';
6452 smin_optab
->libcall_gen
= gen_int_fp_libfunc
;
6453 smax_optab
->libcall_basename
= "max";
6454 smax_optab
->libcall_suffix
= '3';
6455 smax_optab
->libcall_gen
= gen_int_fp_libfunc
;
6456 umin_optab
->libcall_basename
= "umin";
6457 umin_optab
->libcall_suffix
= '3';
6458 umin_optab
->libcall_gen
= gen_int_libfunc
;
6459 umax_optab
->libcall_basename
= "umax";
6460 umax_optab
->libcall_suffix
= '3';
6461 umax_optab
->libcall_gen
= gen_int_libfunc
;
6462 neg_optab
->libcall_basename
= "neg";
6463 neg_optab
->libcall_suffix
= '2';
6464 neg_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6465 ssneg_optab
->libcall_basename
= "ssneg";
6466 ssneg_optab
->libcall_suffix
= '2';
6467 ssneg_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6468 usneg_optab
->libcall_basename
= "usneg";
6469 usneg_optab
->libcall_suffix
= '2';
6470 usneg_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6471 negv_optab
->libcall_basename
= "neg";
6472 negv_optab
->libcall_suffix
= '2';
6473 negv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6474 one_cmpl_optab
->libcall_basename
= "one_cmpl";
6475 one_cmpl_optab
->libcall_suffix
= '2';
6476 one_cmpl_optab
->libcall_gen
= gen_int_libfunc
;
6477 ffs_optab
->libcall_basename
= "ffs";
6478 ffs_optab
->libcall_suffix
= '2';
6479 ffs_optab
->libcall_gen
= gen_int_libfunc
;
6480 clz_optab
->libcall_basename
= "clz";
6481 clz_optab
->libcall_suffix
= '2';
6482 clz_optab
->libcall_gen
= gen_int_libfunc
;
6483 ctz_optab
->libcall_basename
= "ctz";
6484 ctz_optab
->libcall_suffix
= '2';
6485 ctz_optab
->libcall_gen
= gen_int_libfunc
;
6486 clrsb_optab
->libcall_basename
= "clrsb";
6487 clrsb_optab
->libcall_suffix
= '2';
6488 clrsb_optab
->libcall_gen
= gen_int_libfunc
;
6489 popcount_optab
->libcall_basename
= "popcount";
6490 popcount_optab
->libcall_suffix
= '2';
6491 popcount_optab
->libcall_gen
= gen_int_libfunc
;
6492 parity_optab
->libcall_basename
= "parity";
6493 parity_optab
->libcall_suffix
= '2';
6494 parity_optab
->libcall_gen
= gen_int_libfunc
;
6496 /* Comparison libcalls for integers MUST come in pairs,
6498 cmp_optab
->libcall_basename
= "cmp";
6499 cmp_optab
->libcall_suffix
= '2';
6500 cmp_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6501 ucmp_optab
->libcall_basename
= "ucmp";
6502 ucmp_optab
->libcall_suffix
= '2';
6503 ucmp_optab
->libcall_gen
= gen_int_libfunc
;
6505 /* EQ etc are floating point only. */
6506 eq_optab
->libcall_basename
= "eq";
6507 eq_optab
->libcall_suffix
= '2';
6508 eq_optab
->libcall_gen
= gen_fp_libfunc
;
6509 ne_optab
->libcall_basename
= "ne";
6510 ne_optab
->libcall_suffix
= '2';
6511 ne_optab
->libcall_gen
= gen_fp_libfunc
;
6512 gt_optab
->libcall_basename
= "gt";
6513 gt_optab
->libcall_suffix
= '2';
6514 gt_optab
->libcall_gen
= gen_fp_libfunc
;
6515 ge_optab
->libcall_basename
= "ge";
6516 ge_optab
->libcall_suffix
= '2';
6517 ge_optab
->libcall_gen
= gen_fp_libfunc
;
6518 lt_optab
->libcall_basename
= "lt";
6519 lt_optab
->libcall_suffix
= '2';
6520 lt_optab
->libcall_gen
= gen_fp_libfunc
;
6521 le_optab
->libcall_basename
= "le";
6522 le_optab
->libcall_suffix
= '2';
6523 le_optab
->libcall_gen
= gen_fp_libfunc
;
6524 unord_optab
->libcall_basename
= "unord";
6525 unord_optab
->libcall_suffix
= '2';
6526 unord_optab
->libcall_gen
= gen_fp_libfunc
;
6528 powi_optab
->libcall_basename
= "powi";
6529 powi_optab
->libcall_suffix
= '2';
6530 powi_optab
->libcall_gen
= gen_fp_libfunc
;
6533 sfloat_optab
->libcall_basename
= "float";
6534 sfloat_optab
->libcall_gen
= gen_int_to_fp_conv_libfunc
;
6535 ufloat_optab
->libcall_gen
= gen_ufloat_conv_libfunc
;
6536 sfix_optab
->libcall_basename
= "fix";
6537 sfix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6538 ufix_optab
->libcall_basename
= "fixuns";
6539 ufix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6540 lrint_optab
->libcall_basename
= "lrint";
6541 lrint_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6542 lround_optab
->libcall_basename
= "lround";
6543 lround_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6544 lfloor_optab
->libcall_basename
= "lfloor";
6545 lfloor_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6546 lceil_optab
->libcall_basename
= "lceil";
6547 lceil_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6549 /* trunc_optab is also used for FLOAT_EXTEND. */
6550 sext_optab
->libcall_basename
= "extend";
6551 sext_optab
->libcall_gen
= gen_extend_conv_libfunc
;
6552 trunc_optab
->libcall_basename
= "trunc";
6553 trunc_optab
->libcall_gen
= gen_trunc_conv_libfunc
;
6555 /* Conversions for fixed-point modes and other modes. */
6556 fract_optab
->libcall_basename
= "fract";
6557 fract_optab
->libcall_gen
= gen_fract_conv_libfunc
;
6558 satfract_optab
->libcall_basename
= "satfract";
6559 satfract_optab
->libcall_gen
= gen_satfract_conv_libfunc
;
6560 fractuns_optab
->libcall_basename
= "fractuns";
6561 fractuns_optab
->libcall_gen
= gen_fractuns_conv_libfunc
;
6562 satfractuns_optab
->libcall_basename
= "satfractuns";
6563 satfractuns_optab
->libcall_gen
= gen_satfractuns_conv_libfunc
;
6565 /* The ffs function operates on `int'. Fall back on it if we do not
6566 have a libgcc2 function for that width. */
6567 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6568 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6571 /* Explicitly initialize the bswap libfuncs since we need them to be
6572 valid for things other than word_mode. */
6573 if (targetm
.libfunc_gnu_prefix
)
6575 set_optab_libfunc (bswap_optab
, SImode
, "__gnu_bswapsi2");
6576 set_optab_libfunc (bswap_optab
, DImode
, "__gnu_bswapdi2");
6580 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6581 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6584 /* Use cabs for double complex abs, since systems generally have cabs.
6585 Don't define any libcall for float complex, so that cabs will be used. */
6586 if (complex_double_type_node
)
6587 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
), "cabs");
6589 abort_libfunc
= init_one_libfunc ("abort");
6590 memcpy_libfunc
= init_one_libfunc ("memcpy");
6591 memmove_libfunc
= init_one_libfunc ("memmove");
6592 memcmp_libfunc
= init_one_libfunc ("memcmp");
6593 memset_libfunc
= init_one_libfunc ("memset");
6594 setbits_libfunc
= init_one_libfunc ("__setbits");
6596 #ifndef DONT_USE_BUILTIN_SETJMP
6597 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6598 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6600 setjmp_libfunc
= init_one_libfunc ("setjmp");
6601 longjmp_libfunc
= init_one_libfunc ("longjmp");
6603 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6604 unwind_sjlj_unregister_libfunc
6605 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6607 /* For function entry/exit instrumentation. */
6608 profile_function_entry_libfunc
6609 = init_one_libfunc ("__cyg_profile_func_enter");
6610 profile_function_exit_libfunc
6611 = init_one_libfunc ("__cyg_profile_func_exit");
6613 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6615 /* Allow the target to add more libcalls or rename some, etc. */
6616 targetm
.init_libfuncs ();
6619 /* A helper function for init_sync_libfuncs. Using the basename BASE,
6620 install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
6623 init_sync_libfuncs_1 (optab tab
, const char *base
, int max
)
6625 enum machine_mode mode
;
6627 size_t len
= strlen (base
);
6630 gcc_assert (max
<= 8);
6631 gcc_assert (len
+ 3 < sizeof (buf
));
6633 memcpy (buf
, base
, len
);
6636 buf
[len
+ 2] = '\0';
6639 for (i
= 1; i
<= max
; i
*= 2)
6641 buf
[len
+ 1] = '0' + i
;
6642 set_optab_libfunc (tab
, mode
, buf
);
6643 mode
= GET_MODE_2XWIDER_MODE (mode
);
6648 init_sync_libfuncs (int max
)
6650 if (!flag_sync_libcalls
)
6653 init_sync_libfuncs_1 (sync_compare_and_swap_optab
,
6654 "__sync_val_compare_and_swap", max
);
6655 init_sync_libfuncs_1 (sync_lock_test_and_set_optab
,
6656 "__sync_lock_test_and_set", max
);
6658 init_sync_libfuncs_1 (sync_old_add_optab
, "__sync_fetch_and_add", max
);
6659 init_sync_libfuncs_1 (sync_old_sub_optab
, "__sync_fetch_and_sub", max
);
6660 init_sync_libfuncs_1 (sync_old_ior_optab
, "__sync_fetch_and_or", max
);
6661 init_sync_libfuncs_1 (sync_old_and_optab
, "__sync_fetch_and_and", max
);
6662 init_sync_libfuncs_1 (sync_old_xor_optab
, "__sync_fetch_and_xor", max
);
6663 init_sync_libfuncs_1 (sync_old_nand_optab
, "__sync_fetch_and_nand", max
);
6665 init_sync_libfuncs_1 (sync_new_add_optab
, "__sync_add_and_fetch", max
);
6666 init_sync_libfuncs_1 (sync_new_sub_optab
, "__sync_sub_and_fetch", max
);
6667 init_sync_libfuncs_1 (sync_new_ior_optab
, "__sync_or_and_fetch", max
);
6668 init_sync_libfuncs_1 (sync_new_and_optab
, "__sync_and_and_fetch", max
);
6669 init_sync_libfuncs_1 (sync_new_xor_optab
, "__sync_xor_and_fetch", max
);
6670 init_sync_libfuncs_1 (sync_new_nand_optab
, "__sync_nand_and_fetch", max
);
6673 /* Print information about the current contents of the optabs on
6677 debug_optab_libfuncs (void)
6683 /* Dump the arithmetic optabs. */
6684 for (i
= 0; i
!= (int) OTI_MAX
; i
++)
6685 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6690 o
= &optab_table
[i
];
6691 l
= optab_libfunc (o
, (enum machine_mode
) j
);
6694 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6695 fprintf (stderr
, "%s\t%s:\t%s\n",
6696 GET_RTX_NAME (o
->code
),
6702 /* Dump the conversion optabs. */
6703 for (i
= 0; i
< (int) COI_MAX
; ++i
)
6704 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6705 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6710 o
= &convert_optab_table
[i
];
6711 l
= convert_optab_libfunc (o
, (enum machine_mode
) j
,
6712 (enum machine_mode
) k
);
6715 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6716 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6717 GET_RTX_NAME (o
->code
),
6726 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6727 CODE. Return 0 on failure. */
6730 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6732 enum machine_mode mode
= GET_MODE (op1
);
6733 enum insn_code icode
;
6737 if (mode
== VOIDmode
)
6740 icode
= optab_handler (ctrap_optab
, mode
);
6741 if (icode
== CODE_FOR_nothing
)
6744 /* Some targets only accept a zero trap code. */
6745 if (!insn_operand_matches (icode
, 3, tcode
))
6748 do_pending_stack_adjust ();
6750 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6755 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6758 /* If that failed, then give up. */
6766 insn
= get_insns ();
6771 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6772 or unsigned operation code. */
6774 static enum rtx_code
6775 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6787 code
= unsignedp
? LTU
: LT
;
6790 code
= unsignedp
? LEU
: LE
;
6793 code
= unsignedp
? GTU
: GT
;
6796 code
= unsignedp
? GEU
: GE
;
6799 case UNORDERED_EXPR
:
6830 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6831 unsigned operators. Do not generate compare instruction. */
6834 vector_compare_rtx (tree cond
, bool unsignedp
, enum insn_code icode
)
6836 struct expand_operand ops
[2];
6837 enum rtx_code rcode
;
6839 rtx rtx_op0
, rtx_op1
;
6841 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6842 ensures that condition is a relational operation. */
6843 gcc_assert (COMPARISON_CLASS_P (cond
));
6845 rcode
= get_rtx_code (TREE_CODE (cond
), unsignedp
);
6846 t_op0
= TREE_OPERAND (cond
, 0);
6847 t_op1
= TREE_OPERAND (cond
, 1);
6849 /* Expand operands. */
6850 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6852 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6855 create_input_operand (&ops
[0], rtx_op0
, GET_MODE (rtx_op0
));
6856 create_input_operand (&ops
[1], rtx_op1
, GET_MODE (rtx_op1
));
6857 if (!maybe_legitimize_operands (icode
, 4, 2, ops
))
6859 return gen_rtx_fmt_ee (rcode
, VOIDmode
, ops
[0].value
, ops
[1].value
);
6862 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6863 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6866 can_vec_perm_p (enum machine_mode mode
, bool variable
,
6867 const unsigned char *sel
)
6869 enum machine_mode qimode
;
6871 /* If the target doesn't implement a vector mode for the vector type,
6872 then no operations are supported. */
6873 if (!VECTOR_MODE_P (mode
))
6878 if (direct_optab_handler (vec_perm_const_optab
, mode
) != CODE_FOR_nothing
6880 || targetm
.vectorize
.vec_perm_const_ok
== NULL
6881 || targetm
.vectorize
.vec_perm_const_ok (mode
, sel
)))
6885 if (direct_optab_handler (vec_perm_optab
, mode
) != CODE_FOR_nothing
)
6888 /* We allow fallback to a QI vector mode, and adjust the mask. */
6889 if (GET_MODE_INNER (mode
) == QImode
)
6891 qimode
= mode_for_vector (QImode
, GET_MODE_SIZE (mode
));
6892 if (!VECTOR_MODE_P (qimode
))
6895 /* ??? For completeness, we ought to check the QImode version of
6896 vec_perm_const_optab. But all users of this implicit lowering
6897 feature implement the variable vec_perm_optab. */
6898 if (direct_optab_handler (vec_perm_optab
, qimode
) == CODE_FOR_nothing
)
6901 /* In order to support the lowering of variable permutations,
6902 we need to support shifts and adds. */
6905 if (GET_MODE_UNIT_SIZE (mode
) > 2
6906 && optab_handler (ashl_optab
, mode
) == CODE_FOR_nothing
6907 && optab_handler (vashl_optab
, mode
) == CODE_FOR_nothing
)
6909 if (optab_handler (add_optab
, qimode
) == CODE_FOR_nothing
)
6916 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6919 expand_vec_perm_1 (enum insn_code icode
, rtx target
,
6920 rtx v0
, rtx v1
, rtx sel
)
6922 enum machine_mode tmode
= GET_MODE (target
);
6923 enum machine_mode smode
= GET_MODE (sel
);
6924 struct expand_operand ops
[4];
6926 create_output_operand (&ops
[0], target
, tmode
);
6927 create_input_operand (&ops
[3], sel
, smode
);
6929 /* Make an effort to preserve v0 == v1. The target expander is able to
6930 rely on this to determine if we're permuting a single input operand. */
6931 if (rtx_equal_p (v0
, v1
))
6933 if (!insn_operand_matches (icode
, 1, v0
))
6934 v0
= force_reg (tmode
, v0
);
6935 gcc_checking_assert (insn_operand_matches (icode
, 1, v0
));
6936 gcc_checking_assert (insn_operand_matches (icode
, 2, v0
));
6938 create_fixed_operand (&ops
[1], v0
);
6939 create_fixed_operand (&ops
[2], v0
);
6943 create_input_operand (&ops
[1], v0
, tmode
);
6944 create_input_operand (&ops
[2], v1
, tmode
);
6947 if (maybe_expand_insn (icode
, 4, ops
))
6948 return ops
[0].value
;
6952 /* Generate instructions for vec_perm optab given its mode
6953 and three operands. */
6956 expand_vec_perm (enum machine_mode mode
, rtx v0
, rtx v1
, rtx sel
, rtx target
)
6958 enum insn_code icode
;
6959 enum machine_mode qimode
;
6960 unsigned int i
, w
, e
, u
;
6961 rtx tmp
, sel_qi
= NULL
;
6964 if (!target
|| GET_MODE (target
) != mode
)
6965 target
= gen_reg_rtx (mode
);
6967 w
= GET_MODE_SIZE (mode
);
6968 e
= GET_MODE_NUNITS (mode
);
6969 u
= GET_MODE_UNIT_SIZE (mode
);
6971 /* Set QIMODE to a different vector mode with byte elements.
6972 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6974 if (GET_MODE_INNER (mode
) != QImode
)
6976 qimode
= mode_for_vector (QImode
, w
);
6977 if (!VECTOR_MODE_P (qimode
))
6981 /* If the input is a constant, expand it specially. */
6982 gcc_assert (GET_MODE_CLASS (GET_MODE (sel
)) == MODE_VECTOR_INT
);
6983 if (GET_CODE (sel
) == CONST_VECTOR
)
6985 icode
= direct_optab_handler (vec_perm_const_optab
, mode
);
6986 if (icode
!= CODE_FOR_nothing
)
6988 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6993 /* Fall back to a constant byte-based permutation. */
6994 if (qimode
!= VOIDmode
)
6996 vec
= rtvec_alloc (w
);
6997 for (i
= 0; i
< e
; ++i
)
6999 unsigned int j
, this_e
;
7001 this_e
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
7002 this_e
&= 2 * e
- 1;
7005 for (j
= 0; j
< u
; ++j
)
7006 RTVEC_ELT (vec
, i
* u
+ j
) = GEN_INT (this_e
+ j
);
7008 sel_qi
= gen_rtx_CONST_VECTOR (qimode
, vec
);
7010 icode
= direct_optab_handler (vec_perm_const_optab
, qimode
);
7011 if (icode
!= CODE_FOR_nothing
)
7013 tmp
= expand_vec_perm_1 (icode
, gen_lowpart (qimode
, target
),
7014 gen_lowpart (qimode
, v0
),
7015 gen_lowpart (qimode
, v1
), sel_qi
);
7017 return gen_lowpart (mode
, tmp
);
7022 /* Otherwise expand as a fully variable permuation. */
7023 icode
= direct_optab_handler (vec_perm_optab
, mode
);
7024 if (icode
!= CODE_FOR_nothing
)
7026 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
7031 /* As a special case to aid several targets, lower the element-based
7032 permutation to a byte-based permutation and try again. */
7033 if (qimode
== VOIDmode
)
7035 icode
= direct_optab_handler (vec_perm_optab
, qimode
);
7036 if (icode
== CODE_FOR_nothing
)
7041 /* Multiply each element by its byte size. */
7042 enum machine_mode selmode
= GET_MODE (sel
);
7044 sel
= expand_simple_binop (selmode
, PLUS
, sel
, sel
,
7045 sel
, 0, OPTAB_DIRECT
);
7047 sel
= expand_simple_binop (selmode
, ASHIFT
, sel
,
7048 GEN_INT (exact_log2 (u
)),
7049 sel
, 0, OPTAB_DIRECT
);
7050 gcc_assert (sel
!= NULL
);
7052 /* Broadcast the low byte each element into each of its bytes. */
7053 vec
= rtvec_alloc (w
);
7054 for (i
= 0; i
< w
; ++i
)
7056 int this_e
= i
/ u
* u
;
7057 if (BYTES_BIG_ENDIAN
)
7059 RTVEC_ELT (vec
, i
) = GEN_INT (this_e
);
7061 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
7062 sel
= gen_lowpart (qimode
, sel
);
7063 sel
= expand_vec_perm (qimode
, sel
, sel
, tmp
, NULL
);
7064 gcc_assert (sel
!= NULL
);
7066 /* Add the byte offset to each byte element. */
7067 /* Note that the definition of the indicies here is memory ordering,
7068 so there should be no difference between big and little endian. */
7069 vec
= rtvec_alloc (w
);
7070 for (i
= 0; i
< w
; ++i
)
7071 RTVEC_ELT (vec
, i
) = GEN_INT (i
% u
);
7072 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
7073 sel_qi
= expand_simple_binop (qimode
, PLUS
, sel
, tmp
,
7074 sel
, 0, OPTAB_DIRECT
);
7075 gcc_assert (sel_qi
!= NULL
);
7078 tmp
= expand_vec_perm_1 (icode
, gen_lowpart (qimode
, target
),
7079 gen_lowpart (qimode
, v0
),
7080 gen_lowpart (qimode
, v1
), sel_qi
);
7082 tmp
= gen_lowpart (mode
, tmp
);
7086 /* Return insn code for a conditional operator with a comparison in
7087 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
7089 static inline enum insn_code
7090 get_vcond_icode (enum machine_mode vmode
, enum machine_mode cmode
, bool uns
)
7092 enum insn_code icode
= CODE_FOR_nothing
;
7094 icode
= convert_optab_handler (vcondu_optab
, vmode
, cmode
);
7096 icode
= convert_optab_handler (vcond_optab
, vmode
, cmode
);
7100 /* Return TRUE iff, appropriate vector insns are available
7101 for vector cond expr with vector type VALUE_TYPE and a comparison
7102 with operand vector types in CMP_OP_TYPE. */
7105 expand_vec_cond_expr_p (tree value_type
, tree cmp_op_type
)
7107 enum machine_mode value_mode
= TYPE_MODE (value_type
);
7108 enum machine_mode cmp_op_mode
= TYPE_MODE (cmp_op_type
);
7109 if (GET_MODE_SIZE (value_mode
) != GET_MODE_SIZE (cmp_op_mode
)
7110 || GET_MODE_NUNITS (value_mode
) != GET_MODE_NUNITS (cmp_op_mode
)
7111 || get_vcond_icode (TYPE_MODE (value_type
), TYPE_MODE (cmp_op_type
),
7112 TYPE_UNSIGNED (cmp_op_type
)) == CODE_FOR_nothing
)
7117 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
7121 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
7124 struct expand_operand ops
[6];
7125 enum insn_code icode
;
7126 rtx comparison
, rtx_op1
, rtx_op2
;
7127 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
7128 enum machine_mode cmp_op_mode
;
7131 gcc_assert (COMPARISON_CLASS_P (op0
));
7133 unsignedp
= TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (op0
, 0)));
7134 cmp_op_mode
= TYPE_MODE (TREE_TYPE (TREE_OPERAND (op0
, 0)));
7136 gcc_assert (GET_MODE_SIZE (mode
) == GET_MODE_SIZE (cmp_op_mode
)
7137 && GET_MODE_NUNITS (mode
) == GET_MODE_NUNITS (cmp_op_mode
));
7139 icode
= get_vcond_icode (mode
, cmp_op_mode
, unsignedp
);
7140 if (icode
== CODE_FOR_nothing
)
7143 comparison
= vector_compare_rtx (op0
, unsignedp
, icode
);
7144 rtx_op1
= expand_normal (op1
);
7145 rtx_op2
= expand_normal (op2
);
7147 create_output_operand (&ops
[0], target
, mode
);
7148 create_input_operand (&ops
[1], rtx_op1
, mode
);
7149 create_input_operand (&ops
[2], rtx_op2
, mode
);
7150 create_fixed_operand (&ops
[3], comparison
);
7151 create_fixed_operand (&ops
[4], XEXP (comparison
, 0));
7152 create_fixed_operand (&ops
[5], XEXP (comparison
, 1));
7153 expand_insn (icode
, 6, ops
);
7154 return ops
[0].value
;
7158 /* Return true if there is a compare_and_swap pattern. */
7161 can_compare_and_swap_p (enum machine_mode mode
, bool allow_libcall
)
7163 enum insn_code icode
;
7165 /* Check for __atomic_compare_and_swap. */
7166 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7167 if (icode
!= CODE_FOR_nothing
)
7170 /* Check for __sync_compare_and_swap. */
7171 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7172 if (icode
!= CODE_FOR_nothing
)
7174 if (allow_libcall
&& optab_libfunc (sync_compare_and_swap_optab
, mode
))
7177 /* No inline compare and swap. */
7181 /* Return true if an atomic exchange can be performed. */
7184 can_atomic_exchange_p (enum machine_mode mode
, bool allow_libcall
)
7186 enum insn_code icode
;
7188 /* Check for __atomic_exchange. */
7189 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7190 if (icode
!= CODE_FOR_nothing
)
7193 /* Don't check __sync_test_and_set, as on some platforms that
7194 has reduced functionality. Targets that really do support
7195 a proper exchange should simply be updated to the __atomics. */
7197 return can_compare_and_swap_p (mode
, allow_libcall
);
7201 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
7205 find_cc_set (rtx x
, const_rtx pat
, void *data
)
7207 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
7208 && GET_CODE (pat
) == SET
)
7210 rtx
*p_cc_reg
= (rtx
*) data
;
7211 gcc_assert (!*p_cc_reg
);
7216 /* This is a helper function for the other atomic operations. This function
7217 emits a loop that contains SEQ that iterates until a compare-and-swap
7218 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7219 a set of instructions that takes a value from OLD_REG as an input and
7220 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7221 set to the current contents of MEM. After SEQ, a compare-and-swap will
7222 attempt to update MEM with NEW_REG. The function returns true when the
7223 loop was generated successfully. */
7226 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
7228 enum machine_mode mode
= GET_MODE (mem
);
7229 rtx label
, cmp_reg
, success
, oldval
;
7231 /* The loop we want to generate looks like
7237 (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
7241 Note that we only do the plain load from memory once. Subsequent
7242 iterations use the value loaded by the compare-and-swap pattern. */
7244 label
= gen_label_rtx ();
7245 cmp_reg
= gen_reg_rtx (mode
);
7247 emit_move_insn (cmp_reg
, mem
);
7249 emit_move_insn (old_reg
, cmp_reg
);
7255 if (!expand_atomic_compare_and_swap (&success
, &oldval
, mem
, old_reg
,
7256 new_reg
, false, MEMMODEL_SEQ_CST
,
7260 if (oldval
!= cmp_reg
)
7261 emit_move_insn (cmp_reg
, oldval
);
7263 /* ??? Mark this jump predicted not taken? */
7264 emit_cmp_and_jump_insns (success
, const0_rtx
, EQ
, const0_rtx
,
7265 GET_MODE (success
), 1, label
);
7270 /* This function tries to emit an atomic_exchange intruction. VAL is written
7271 to *MEM using memory model MODEL. The previous contents of *MEM are returned,
7272 using TARGET if possible. */
7275 maybe_emit_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7277 enum machine_mode mode
= GET_MODE (mem
);
7278 enum insn_code icode
;
7280 /* If the target supports the exchange directly, great. */
7281 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7282 if (icode
!= CODE_FOR_nothing
)
7284 struct expand_operand ops
[4];
7286 create_output_operand (&ops
[0], target
, mode
);
7287 create_fixed_operand (&ops
[1], mem
);
7288 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7289 create_convert_operand_to (&ops
[2], val
, mode
, true);
7290 create_integer_operand (&ops
[3], model
);
7291 if (maybe_expand_insn (icode
, 4, ops
))
7292 return ops
[0].value
;
7298 /* This function tries to implement an atomic exchange operation using
7299 __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
7300 The previous contents of *MEM are returned, using TARGET if possible.
7301 Since this instructionn is an acquire barrier only, stronger memory
7302 models may require additional barriers to be emitted. */
7305 maybe_emit_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
,
7306 enum memmodel model
)
7308 enum machine_mode mode
= GET_MODE (mem
);
7309 enum insn_code icode
;
7310 rtx last_insn
= get_last_insn ();
7312 icode
= optab_handler (sync_lock_test_and_set_optab
, mode
);
7314 /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
7315 exists, and the memory model is stronger than acquire, add a release
7316 barrier before the instruction. */
7318 if (model
== MEMMODEL_SEQ_CST
7319 || model
== MEMMODEL_RELEASE
7320 || model
== MEMMODEL_ACQ_REL
)
7321 expand_mem_thread_fence (model
);
7323 if (icode
!= CODE_FOR_nothing
)
7325 struct expand_operand ops
[3];
7326 create_output_operand (&ops
[0], target
, mode
);
7327 create_fixed_operand (&ops
[1], mem
);
7328 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7329 create_convert_operand_to (&ops
[2], val
, mode
, true);
7330 if (maybe_expand_insn (icode
, 3, ops
))
7331 return ops
[0].value
;
7334 /* If an external test-and-set libcall is provided, use that instead of
7335 any external compare-and-swap that we might get from the compare-and-
7336 swap-loop expansion later. */
7337 if (!can_compare_and_swap_p (mode
, false))
7339 rtx libfunc
= optab_libfunc (sync_lock_test_and_set_optab
, mode
);
7340 if (libfunc
!= NULL
)
7344 addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7345 return emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7346 mode
, 2, addr
, ptr_mode
,
7351 /* If the test_and_set can't be emitted, eliminate any barrier that might
7352 have been emitted. */
7353 delete_insns_since (last_insn
);
7357 /* This function tries to implement an atomic exchange operation using a
7358 compare_and_swap loop. VAL is written to *MEM. The previous contents of
7359 *MEM are returned, using TARGET if possible. No memory model is required
7360 since a compare_and_swap loop is seq-cst. */
7363 maybe_emit_compare_and_swap_exchange_loop (rtx target
, rtx mem
, rtx val
)
7365 enum machine_mode mode
= GET_MODE (mem
);
7367 if (can_compare_and_swap_p (mode
, true))
7369 if (!target
|| !register_operand (target
, mode
))
7370 target
= gen_reg_rtx (mode
);
7371 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7372 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7373 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7380 /* This function tries to implement an atomic test-and-set operation
7381 using the atomic_test_and_set instruction pattern. A boolean value
7382 is returned from the operation, using TARGET if possible. */
7384 #ifndef HAVE_atomic_test_and_set
7385 #define HAVE_atomic_test_and_set 0
7386 #define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
7390 maybe_emit_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7392 enum machine_mode pat_bool_mode
;
7393 struct expand_operand ops
[3];
7395 if (!HAVE_atomic_test_and_set
)
7398 /* While we always get QImode from __atomic_test_and_set, we get
7399 other memory modes from __sync_lock_test_and_set. Note that we
7400 use no endian adjustment here. This matches the 4.6 behavior
7401 in the Sparc backend. */
7403 (insn_data
[CODE_FOR_atomic_test_and_set
].operand
[1].mode
== QImode
);
7404 if (GET_MODE (mem
) != QImode
)
7405 mem
= adjust_address_nv (mem
, QImode
, 0);
7407 pat_bool_mode
= insn_data
[CODE_FOR_atomic_test_and_set
].operand
[0].mode
;
7408 create_output_operand (&ops
[0], target
, pat_bool_mode
);
7409 create_fixed_operand (&ops
[1], mem
);
7410 create_integer_operand (&ops
[2], model
);
7412 if (maybe_expand_insn (CODE_FOR_atomic_test_and_set
, 3, ops
))
7413 return ops
[0].value
;
7417 /* This function expands the legacy _sync_lock test_and_set operation which is
7418 generally an atomic exchange. Some limited targets only allow the
7419 constant 1 to be stored. This is an ACQUIRE operation.
7421 TARGET is an optional place to stick the return value.
7422 MEM is where VAL is stored. */
7425 expand_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
)
7429 /* Try an atomic_exchange first. */
7430 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7434 ret
= maybe_emit_sync_lock_test_and_set (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7438 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7442 /* If there are no other options, try atomic_test_and_set if the value
7443 being stored is 1. */
7444 if (val
== const1_rtx
)
7445 ret
= maybe_emit_atomic_test_and_set (target
, mem
, MEMMODEL_ACQUIRE
);
7450 /* This function expands the atomic test_and_set operation:
7451 atomically store a boolean TRUE into MEM and return the previous value.
7453 MEMMODEL is the memory model variant to use.
7454 TARGET is an optional place to stick the return value. */
7457 expand_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7459 enum machine_mode mode
= GET_MODE (mem
);
7460 rtx ret
, trueval
, subtarget
;
7462 ret
= maybe_emit_atomic_test_and_set (target
, mem
, model
);
7466 /* Be binary compatible with non-default settings of trueval, and different
7467 cpu revisions. E.g. one revision may have atomic-test-and-set, but
7468 another only has atomic-exchange. */
7469 if (targetm
.atomic_test_and_set_trueval
== 1)
7471 trueval
= const1_rtx
;
7472 subtarget
= target
? target
: gen_reg_rtx (mode
);
7476 trueval
= gen_int_mode (targetm
.atomic_test_and_set_trueval
, mode
);
7477 subtarget
= gen_reg_rtx (mode
);
7480 /* Try the atomic-exchange optab... */
7481 ret
= maybe_emit_atomic_exchange (subtarget
, mem
, trueval
, model
);
7483 /* ... then an atomic-compare-and-swap loop ... */
7485 ret
= maybe_emit_compare_and_swap_exchange_loop (subtarget
, mem
, trueval
);
7487 /* ... before trying the vaguely defined legacy lock_test_and_set. */
7489 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, trueval
, model
);
7491 /* Recall that the legacy lock_test_and_set optab was allowed to do magic
7492 things with the value 1. Thus we try again without trueval. */
7493 if (!ret
&& targetm
.atomic_test_and_set_trueval
!= 1)
7494 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, const1_rtx
, model
);
7496 /* Failing all else, assume a single threaded environment and simply
7497 perform the operation. */
7500 emit_move_insn (subtarget
, mem
);
7501 emit_move_insn (mem
, trueval
);
7505 /* Recall that have to return a boolean value; rectify if trueval
7506 is not exactly one. */
7507 if (targetm
.atomic_test_and_set_trueval
!= 1)
7508 ret
= emit_store_flag_force (target
, NE
, ret
, const0_rtx
, mode
, 0, 1);
7513 /* This function expands the atomic exchange operation:
7514 atomically store VAL in MEM and return the previous value in MEM.
7516 MEMMODEL is the memory model variant to use.
7517 TARGET is an optional place to stick the return value. */
7520 expand_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7524 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7526 /* Next try a compare-and-swap loop for the exchange. */
7528 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7533 /* This function expands the atomic compare exchange operation:
7535 *PTARGET_BOOL is an optional place to store the boolean success/failure.
7536 *PTARGET_OVAL is an optional place to store the old value from memory.
7537 Both target parameters may be NULL to indicate that we do not care about
7538 that return value. Both target parameters are updated on success to
7539 the actual location of the corresponding result.
7541 MEMMODEL is the memory model variant to use.
7543 The return value of the function is true for success. */
7546 expand_atomic_compare_and_swap (rtx
*ptarget_bool
, rtx
*ptarget_oval
,
7547 rtx mem
, rtx expected
, rtx desired
,
7548 bool is_weak
, enum memmodel succ_model
,
7549 enum memmodel fail_model
)
7551 enum machine_mode mode
= GET_MODE (mem
);
7552 struct expand_operand ops
[8];
7553 enum insn_code icode
;
7554 rtx target_oval
, target_bool
= NULL_RTX
;
7557 /* Load expected into a register for the compare and swap. */
7558 if (MEM_P (expected
))
7559 expected
= copy_to_reg (expected
);
7561 /* Make sure we always have some place to put the return oldval.
7562 Further, make sure that place is distinct from the input expected,
7563 just in case we need that path down below. */
7564 if (ptarget_oval
== NULL
7565 || (target_oval
= *ptarget_oval
) == NULL
7566 || reg_overlap_mentioned_p (expected
, target_oval
))
7567 target_oval
= gen_reg_rtx (mode
);
7569 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7570 if (icode
!= CODE_FOR_nothing
)
7572 enum machine_mode bool_mode
= insn_data
[icode
].operand
[0].mode
;
7574 /* Make sure we always have a place for the bool operand. */
7575 if (ptarget_bool
== NULL
7576 || (target_bool
= *ptarget_bool
) == NULL
7577 || GET_MODE (target_bool
) != bool_mode
)
7578 target_bool
= gen_reg_rtx (bool_mode
);
7580 /* Emit the compare_and_swap. */
7581 create_output_operand (&ops
[0], target_bool
, bool_mode
);
7582 create_output_operand (&ops
[1], target_oval
, mode
);
7583 create_fixed_operand (&ops
[2], mem
);
7584 create_convert_operand_to (&ops
[3], expected
, mode
, true);
7585 create_convert_operand_to (&ops
[4], desired
, mode
, true);
7586 create_integer_operand (&ops
[5], is_weak
);
7587 create_integer_operand (&ops
[6], succ_model
);
7588 create_integer_operand (&ops
[7], fail_model
);
7589 expand_insn (icode
, 8, ops
);
7591 /* Return success/failure. */
7592 target_bool
= ops
[0].value
;
7593 target_oval
= ops
[1].value
;
7597 /* Otherwise fall back to the original __sync_val_compare_and_swap
7598 which is always seq-cst. */
7599 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7600 if (icode
!= CODE_FOR_nothing
)
7604 create_output_operand (&ops
[0], target_oval
, mode
);
7605 create_fixed_operand (&ops
[1], mem
);
7606 create_convert_operand_to (&ops
[2], expected
, mode
, true);
7607 create_convert_operand_to (&ops
[3], desired
, mode
, true);
7608 if (!maybe_expand_insn (icode
, 4, ops
))
7611 target_oval
= ops
[0].value
;
7613 /* If the caller isn't interested in the boolean return value,
7614 skip the computation of it. */
7615 if (ptarget_bool
== NULL
)
7618 /* Otherwise, work out if the compare-and-swap succeeded. */
7620 if (have_insn_for (COMPARE
, CCmode
))
7621 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7624 target_bool
= emit_store_flag_force (target_bool
, EQ
, cc_reg
,
7625 const0_rtx
, VOIDmode
, 0, 1);
7628 goto success_bool_from_val
;
7631 /* Also check for library support for __sync_val_compare_and_swap. */
7632 libfunc
= optab_libfunc (sync_compare_and_swap_optab
, mode
);
7633 if (libfunc
!= NULL
)
7635 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7636 target_oval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7637 mode
, 3, addr
, ptr_mode
,
7638 expected
, mode
, desired
, mode
);
7640 /* Compute the boolean return value only if requested. */
7642 goto success_bool_from_val
;
7650 success_bool_from_val
:
7651 target_bool
= emit_store_flag_force (target_bool
, EQ
, target_oval
,
7652 expected
, VOIDmode
, 1, 1);
7654 /* Make sure that the oval output winds up where the caller asked. */
7656 *ptarget_oval
= target_oval
;
7658 *ptarget_bool
= target_bool
;
7662 /* Generate asm volatile("" : : : "memory") as the memory barrier. */
7665 expand_asm_memory_barrier (void)
7669 asm_op
= gen_rtx_ASM_OPERANDS (VOIDmode
, empty_string
, empty_string
, 0,
7670 rtvec_alloc (0), rtvec_alloc (0),
7671 rtvec_alloc (0), UNKNOWN_LOCATION
);
7672 MEM_VOLATILE_P (asm_op
) = 1;
7674 clob
= gen_rtx_SCRATCH (VOIDmode
);
7675 clob
= gen_rtx_MEM (BLKmode
, clob
);
7676 clob
= gen_rtx_CLOBBER (VOIDmode
, clob
);
7678 emit_insn (gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, asm_op
, clob
)));
7681 /* This routine will either emit the mem_thread_fence pattern or issue a
7682 sync_synchronize to generate a fence for memory model MEMMODEL. */
7684 #ifndef HAVE_mem_thread_fence
7685 # define HAVE_mem_thread_fence 0
7686 # define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
7688 #ifndef HAVE_memory_barrier
7689 # define HAVE_memory_barrier 0
7690 # define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
7694 expand_mem_thread_fence (enum memmodel model
)
7696 if (HAVE_mem_thread_fence
)
7697 emit_insn (gen_mem_thread_fence (GEN_INT (model
)));
7698 else if (model
!= MEMMODEL_RELAXED
)
7700 if (HAVE_memory_barrier
)
7701 emit_insn (gen_memory_barrier ());
7702 else if (synchronize_libfunc
!= NULL_RTX
)
7703 emit_library_call (synchronize_libfunc
, LCT_NORMAL
, VOIDmode
, 0);
7705 expand_asm_memory_barrier ();
7709 /* This routine will either emit the mem_signal_fence pattern or issue a
7710 sync_synchronize to generate a fence for memory model MEMMODEL. */
7712 #ifndef HAVE_mem_signal_fence
7713 # define HAVE_mem_signal_fence 0
7714 # define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
7718 expand_mem_signal_fence (enum memmodel model
)
7720 if (HAVE_mem_signal_fence
)
7721 emit_insn (gen_mem_signal_fence (GEN_INT (model
)));
7722 else if (model
!= MEMMODEL_RELAXED
)
7724 /* By default targets are coherent between a thread and the signal
7725 handler running on the same thread. Thus this really becomes a
7726 compiler barrier, in that stores must not be sunk past
7727 (or raised above) a given point. */
7728 expand_asm_memory_barrier ();
7732 /* This function expands the atomic load operation:
7733 return the atomically loaded value in MEM.
7735 MEMMODEL is the memory model variant to use.
7736 TARGET is an option place to stick the return value. */
7739 expand_atomic_load (rtx target
, rtx mem
, enum memmodel model
)
7741 enum machine_mode mode
= GET_MODE (mem
);
7742 enum insn_code icode
;
7744 /* If the target supports the load directly, great. */
7745 icode
= direct_optab_handler (atomic_load_optab
, mode
);
7746 if (icode
!= CODE_FOR_nothing
)
7748 struct expand_operand ops
[3];
7750 create_output_operand (&ops
[0], target
, mode
);
7751 create_fixed_operand (&ops
[1], mem
);
7752 create_integer_operand (&ops
[2], model
);
7753 if (maybe_expand_insn (icode
, 3, ops
))
7754 return ops
[0].value
;
7757 /* If the size of the object is greater than word size on this target,
7758 then we assume that a load will not be atomic. */
7759 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7761 /* Issue val = compare_and_swap (mem, 0, 0).
7762 This may cause the occasional harmless store of 0 when the value is
7763 already 0, but it seems to be OK according to the standards guys. */
7764 if (expand_atomic_compare_and_swap (NULL
, &target
, mem
, const0_rtx
,
7765 const0_rtx
, false, model
, model
))
7768 /* Otherwise there is no atomic load, leave the library call. */
7772 /* Otherwise assume loads are atomic, and emit the proper barriers. */
7773 if (!target
|| target
== const0_rtx
)
7774 target
= gen_reg_rtx (mode
);
7776 /* Emit the appropriate barrier before the load. */
7777 expand_mem_thread_fence (model
);
7779 emit_move_insn (target
, mem
);
7781 /* For SEQ_CST, also emit a barrier after the load. */
7782 if (model
== MEMMODEL_SEQ_CST
)
7783 expand_mem_thread_fence (model
);
7788 /* This function expands the atomic store operation:
7789 Atomically store VAL in MEM.
7790 MEMMODEL is the memory model variant to use.
7791 USE_RELEASE is true if __sync_lock_release can be used as a fall back.
7792 function returns const0_rtx if a pattern was emitted. */
7795 expand_atomic_store (rtx mem
, rtx val
, enum memmodel model
, bool use_release
)
7797 enum machine_mode mode
= GET_MODE (mem
);
7798 enum insn_code icode
;
7799 struct expand_operand ops
[3];
7801 /* If the target supports the store directly, great. */
7802 icode
= direct_optab_handler (atomic_store_optab
, mode
);
7803 if (icode
!= CODE_FOR_nothing
)
7805 create_fixed_operand (&ops
[0], mem
);
7806 create_input_operand (&ops
[1], val
, mode
);
7807 create_integer_operand (&ops
[2], model
);
7808 if (maybe_expand_insn (icode
, 3, ops
))
7812 /* If using __sync_lock_release is a viable alternative, try it. */
7815 icode
= direct_optab_handler (sync_lock_release_optab
, mode
);
7816 if (icode
!= CODE_FOR_nothing
)
7818 create_fixed_operand (&ops
[0], mem
);
7819 create_input_operand (&ops
[1], const0_rtx
, mode
);
7820 if (maybe_expand_insn (icode
, 2, ops
))
7822 /* lock_release is only a release barrier. */
7823 if (model
== MEMMODEL_SEQ_CST
)
7824 expand_mem_thread_fence (model
);
7830 /* If the size of the object is greater than word size on this target,
7831 a default store will not be atomic, Try a mem_exchange and throw away
7832 the result. If that doesn't work, don't do anything. */
7833 if (GET_MODE_PRECISION(mode
) > BITS_PER_WORD
)
7835 rtx target
= maybe_emit_atomic_exchange (NULL_RTX
, mem
, val
, model
);
7837 target
= maybe_emit_compare_and_swap_exchange_loop (NULL_RTX
, mem
, val
);
7844 /* If there is no mem_store, default to a move with barriers */
7845 if (model
== MEMMODEL_SEQ_CST
|| model
== MEMMODEL_RELEASE
)
7846 expand_mem_thread_fence (model
);
7848 emit_move_insn (mem
, val
);
7850 /* For SEQ_CST, also emit a barrier after the load. */
7851 if (model
== MEMMODEL_SEQ_CST
)
7852 expand_mem_thread_fence (model
);
7858 /* Structure containing the pointers and values required to process the
7859 various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
7861 struct atomic_op_functions
7863 direct_optab mem_fetch_before
;
7864 direct_optab mem_fetch_after
;
7865 direct_optab mem_no_result
;
7868 direct_optab no_result
;
7869 enum rtx_code reverse_code
;
7873 /* Fill in structure pointed to by OP with the various optab entries for an
7874 operation of type CODE. */
7877 get_atomic_op_for_code (struct atomic_op_functions
*op
, enum rtx_code code
)
7879 gcc_assert (op
!= NULL
);
7881 /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
7882 in the source code during compilation, and the optab entries are not
7883 computable until runtime. Fill in the values at runtime. */
7887 op
->mem_fetch_before
= atomic_fetch_add_optab
;
7888 op
->mem_fetch_after
= atomic_add_fetch_optab
;
7889 op
->mem_no_result
= atomic_add_optab
;
7890 op
->fetch_before
= sync_old_add_optab
;
7891 op
->fetch_after
= sync_new_add_optab
;
7892 op
->no_result
= sync_add_optab
;
7893 op
->reverse_code
= MINUS
;
7896 op
->mem_fetch_before
= atomic_fetch_sub_optab
;
7897 op
->mem_fetch_after
= atomic_sub_fetch_optab
;
7898 op
->mem_no_result
= atomic_sub_optab
;
7899 op
->fetch_before
= sync_old_sub_optab
;
7900 op
->fetch_after
= sync_new_sub_optab
;
7901 op
->no_result
= sync_sub_optab
;
7902 op
->reverse_code
= PLUS
;
7905 op
->mem_fetch_before
= atomic_fetch_xor_optab
;
7906 op
->mem_fetch_after
= atomic_xor_fetch_optab
;
7907 op
->mem_no_result
= atomic_xor_optab
;
7908 op
->fetch_before
= sync_old_xor_optab
;
7909 op
->fetch_after
= sync_new_xor_optab
;
7910 op
->no_result
= sync_xor_optab
;
7911 op
->reverse_code
= XOR
;
7914 op
->mem_fetch_before
= atomic_fetch_and_optab
;
7915 op
->mem_fetch_after
= atomic_and_fetch_optab
;
7916 op
->mem_no_result
= atomic_and_optab
;
7917 op
->fetch_before
= sync_old_and_optab
;
7918 op
->fetch_after
= sync_new_and_optab
;
7919 op
->no_result
= sync_and_optab
;
7920 op
->reverse_code
= UNKNOWN
;
7923 op
->mem_fetch_before
= atomic_fetch_or_optab
;
7924 op
->mem_fetch_after
= atomic_or_fetch_optab
;
7925 op
->mem_no_result
= atomic_or_optab
;
7926 op
->fetch_before
= sync_old_ior_optab
;
7927 op
->fetch_after
= sync_new_ior_optab
;
7928 op
->no_result
= sync_ior_optab
;
7929 op
->reverse_code
= UNKNOWN
;
7932 op
->mem_fetch_before
= atomic_fetch_nand_optab
;
7933 op
->mem_fetch_after
= atomic_nand_fetch_optab
;
7934 op
->mem_no_result
= atomic_nand_optab
;
7935 op
->fetch_before
= sync_old_nand_optab
;
7936 op
->fetch_after
= sync_new_nand_optab
;
7937 op
->no_result
= sync_nand_optab
;
7938 op
->reverse_code
= UNKNOWN
;
7945 /* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
7946 using memory order MODEL. If AFTER is true the operation needs to return
7947 the value of *MEM after the operation, otherwise the previous value.
7948 TARGET is an optional place to place the result. The result is unused if
7950 Return the result if there is a better sequence, otherwise NULL_RTX. */
7953 maybe_optimize_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7954 enum memmodel model
, bool after
)
7956 /* If the value is prefetched, or not used, it may be possible to replace
7957 the sequence with a native exchange operation. */
7958 if (!after
|| target
== const0_rtx
)
7960 /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
7961 if (code
== AND
&& val
== const0_rtx
)
7963 if (target
== const0_rtx
)
7964 target
= gen_reg_rtx (GET_MODE (mem
));
7965 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7968 /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
7969 if (code
== IOR
&& val
== constm1_rtx
)
7971 if (target
== const0_rtx
)
7972 target
= gen_reg_rtx (GET_MODE (mem
));
7973 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7980 /* Try to emit an instruction for a specific operation varaition.
7981 OPTAB contains the OP functions.
7982 TARGET is an optional place to return the result. const0_rtx means unused.
7983 MEM is the memory location to operate on.
7984 VAL is the value to use in the operation.
7985 USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
7986 MODEL is the memory model, if used.
7987 AFTER is true if the returned result is the value after the operation. */
7990 maybe_emit_op (const struct atomic_op_functions
*optab
, rtx target
, rtx mem
,
7991 rtx val
, bool use_memmodel
, enum memmodel model
, bool after
)
7993 enum machine_mode mode
= GET_MODE (mem
);
7994 struct expand_operand ops
[4];
7995 enum insn_code icode
;
7999 /* Check to see if there is a result returned. */
8000 if (target
== const0_rtx
)
8004 icode
= direct_optab_handler (optab
->mem_no_result
, mode
);
8005 create_integer_operand (&ops
[2], model
);
8010 icode
= direct_optab_handler (optab
->no_result
, mode
);
8014 /* Otherwise, we need to generate a result. */
8019 icode
= direct_optab_handler (after
? optab
->mem_fetch_after
8020 : optab
->mem_fetch_before
, mode
);
8021 create_integer_operand (&ops
[3], model
);
8026 icode
= optab_handler (after
? optab
->fetch_after
8027 : optab
->fetch_before
, mode
);
8030 create_output_operand (&ops
[op_counter
++], target
, mode
);
8032 if (icode
== CODE_FOR_nothing
)
8035 create_fixed_operand (&ops
[op_counter
++], mem
);
8036 /* VAL may have been promoted to a wider mode. Shrink it if so. */
8037 create_convert_operand_to (&ops
[op_counter
++], val
, mode
, true);
8039 if (maybe_expand_insn (icode
, num_ops
, ops
))
8040 return (target
== const0_rtx
? const0_rtx
: ops
[0].value
);
8046 /* This function expands an atomic fetch_OP or OP_fetch operation:
8047 TARGET is an option place to stick the return value. const0_rtx indicates
8048 the result is unused.
8049 atomically fetch MEM, perform the operation with VAL and return it to MEM.
8050 CODE is the operation being performed (OP)
8051 MEMMODEL is the memory model variant to use.
8052 AFTER is true to return the result of the operation (OP_fetch).
8053 AFTER is false to return the value before the operation (fetch_OP). */
8055 expand_atomic_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
8056 enum memmodel model
, bool after
)
8058 enum machine_mode mode
= GET_MODE (mem
);
8059 struct atomic_op_functions optab
;
8061 bool unused_result
= (target
== const0_rtx
);
8063 get_atomic_op_for_code (&optab
, code
);
8065 /* Check to see if there are any better instructions. */
8066 result
= maybe_optimize_fetch_op (target
, mem
, val
, code
, model
, after
);
8070 /* Check for the case where the result isn't used and try those patterns. */
8073 /* Try the memory model variant first. */
8074 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, true);
8078 /* Next try the old style withuot a memory model. */
8079 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, true);
8083 /* There is no no-result pattern, so try patterns with a result. */
8087 /* Try the __atomic version. */
8088 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, after
);
8092 /* Try the older __sync version. */
8093 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, after
);
8097 /* If the fetch value can be calculated from the other variation of fetch,
8098 try that operation. */
8099 if (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
)
8101 /* Try the __atomic version, then the older __sync version. */
8102 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, !after
);
8104 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, !after
);
8108 /* If the result isn't used, no need to do compensation code. */
8112 /* Issue compensation code. Fetch_after == fetch_before OP val.
8113 Fetch_before == after REVERSE_OP val. */
8115 code
= optab
.reverse_code
;
8118 result
= expand_simple_binop (mode
, AND
, result
, val
, NULL_RTX
,
8119 true, OPTAB_LIB_WIDEN
);
8120 result
= expand_simple_unop (mode
, NOT
, result
, target
, true);
8123 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8124 true, OPTAB_LIB_WIDEN
);
8129 /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
8130 if (!can_compare_and_swap_p (mode
, false))
8135 libfunc
= optab_libfunc (after
? optab
.fetch_after
8136 : optab
.fetch_before
, mode
);
8138 && (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
))
8142 code
= optab
.reverse_code
;
8143 libfunc
= optab_libfunc (after
? optab
.fetch_before
8144 : optab
.fetch_after
, mode
);
8146 if (libfunc
!= NULL
)
8148 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
8149 result
= emit_library_call_value (libfunc
, NULL
, LCT_NORMAL
, mode
,
8150 2, addr
, ptr_mode
, val
, mode
);
8152 if (!unused_result
&& fixup
)
8153 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8154 true, OPTAB_LIB_WIDEN
);
8159 /* If nothing else has succeeded, default to a compare and swap loop. */
8160 if (can_compare_and_swap_p (mode
, true))
8163 rtx t0
= gen_reg_rtx (mode
), t1
;
8167 /* If the result is used, get a register for it. */
8170 if (!target
|| !register_operand (target
, mode
))
8171 target
= gen_reg_rtx (mode
);
8172 /* If fetch_before, copy the value now. */
8174 emit_move_insn (target
, t0
);
8177 target
= const0_rtx
;
8182 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
8183 true, OPTAB_LIB_WIDEN
);
8184 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
8187 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
, true,
8190 /* For after, copy the value now. */
8191 if (!unused_result
&& after
)
8192 emit_move_insn (target
, t1
);
8193 insn
= get_insns ();
8196 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
8203 /* Return true if OPERAND is suitable for operand number OPNO of
8204 instruction ICODE. */
8207 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
8209 return (!insn_data
[(int) icode
].operand
[opno
].predicate
8210 || (insn_data
[(int) icode
].operand
[opno
].predicate
8211 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
8214 /* TARGET is a target of a multiword operation that we are going to
8215 implement as a series of word-mode operations. Return true if
8216 TARGET is suitable for this purpose. */
8219 valid_multiword_target_p (rtx target
)
8221 enum machine_mode mode
;
8224 mode
= GET_MODE (target
);
8225 for (i
= 0; i
< GET_MODE_SIZE (mode
); i
+= UNITS_PER_WORD
)
8226 if (!validate_subreg (word_mode
, mode
, target
, i
))
8231 /* Like maybe_legitimize_operand, but do not change the code of the
8232 current rtx value. */
8235 maybe_legitimize_operand_same_code (enum insn_code icode
, unsigned int opno
,
8236 struct expand_operand
*op
)
8238 /* See if the operand matches in its current form. */
8239 if (insn_operand_matches (icode
, opno
, op
->value
))
8242 /* If the operand is a memory whose address has no side effects,
8243 try forcing the address into a non-virtual pseudo register.
8244 The check for side effects is important because copy_to_mode_reg
8245 cannot handle things like auto-modified addresses. */
8246 if (insn_data
[(int) icode
].operand
[opno
].allows_mem
&& MEM_P (op
->value
))
8251 addr
= XEXP (mem
, 0);
8252 if (!(REG_P (addr
) && REGNO (addr
) > LAST_VIRTUAL_REGISTER
)
8253 && !side_effects_p (addr
))
8256 enum machine_mode mode
;
8258 last
= get_last_insn ();
8259 mode
= get_address_mode (mem
);
8260 mem
= replace_equiv_address (mem
, copy_to_mode_reg (mode
, addr
));
8261 if (insn_operand_matches (icode
, opno
, mem
))
8266 delete_insns_since (last
);
8273 /* Try to make OP match operand OPNO of instruction ICODE. Return true
8274 on success, storing the new operand value back in OP. */
8277 maybe_legitimize_operand (enum insn_code icode
, unsigned int opno
,
8278 struct expand_operand
*op
)
8280 enum machine_mode mode
, imode
;
8281 bool old_volatile_ok
, result
;
8287 old_volatile_ok
= volatile_ok
;
8289 result
= maybe_legitimize_operand_same_code (icode
, opno
, op
);
8290 volatile_ok
= old_volatile_ok
;
8294 gcc_assert (mode
!= VOIDmode
);
8296 && op
->value
!= const0_rtx
8297 && GET_MODE (op
->value
) == mode
8298 && maybe_legitimize_operand_same_code (icode
, opno
, op
))
8301 op
->value
= gen_reg_rtx (mode
);
8306 gcc_assert (mode
!= VOIDmode
);
8307 gcc_assert (GET_MODE (op
->value
) == VOIDmode
8308 || GET_MODE (op
->value
) == mode
);
8309 if (maybe_legitimize_operand_same_code (icode
, opno
, op
))
8312 op
->value
= copy_to_mode_reg (mode
, op
->value
);
8315 case EXPAND_CONVERT_TO
:
8316 gcc_assert (mode
!= VOIDmode
);
8317 op
->value
= convert_to_mode (mode
, op
->value
, op
->unsigned_p
);
8320 case EXPAND_CONVERT_FROM
:
8321 if (GET_MODE (op
->value
) != VOIDmode
)
8322 mode
= GET_MODE (op
->value
);
8324 /* The caller must tell us what mode this value has. */
8325 gcc_assert (mode
!= VOIDmode
);
8327 imode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8328 if (imode
!= VOIDmode
&& imode
!= mode
)
8330 op
->value
= convert_modes (imode
, mode
, op
->value
, op
->unsigned_p
);
8335 case EXPAND_ADDRESS
:
8336 gcc_assert (mode
!= VOIDmode
);
8337 op
->value
= convert_memory_address (mode
, op
->value
);
8340 case EXPAND_INTEGER
:
8341 mode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8342 if (mode
!= VOIDmode
&& const_int_operand (op
->value
, mode
))
8346 return insn_operand_matches (icode
, opno
, op
->value
);
8349 /* Make OP describe an input operand that should have the same value
8350 as VALUE, after any mode conversion that the target might request.
8351 TYPE is the type of VALUE. */
8354 create_convert_operand_from_type (struct expand_operand
*op
,
8355 rtx value
, tree type
)
8357 create_convert_operand_from (op
, value
, TYPE_MODE (type
),
8358 TYPE_UNSIGNED (type
));
8361 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
8362 of instruction ICODE. Return true on success, leaving the new operand
8363 values in the OPS themselves. Emit no code on failure. */
8366 maybe_legitimize_operands (enum insn_code icode
, unsigned int opno
,
8367 unsigned int nops
, struct expand_operand
*ops
)
8372 last
= get_last_insn ();
8373 for (i
= 0; i
< nops
; i
++)
8374 if (!maybe_legitimize_operand (icode
, opno
+ i
, &ops
[i
]))
8376 delete_insns_since (last
);
8382 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
8383 as its operands. Return the instruction pattern on success,
8384 and emit any necessary set-up code. Return null and emit no
8388 maybe_gen_insn (enum insn_code icode
, unsigned int nops
,
8389 struct expand_operand
*ops
)
8391 gcc_assert (nops
== (unsigned int) insn_data
[(int) icode
].n_generator_args
);
8392 if (!maybe_legitimize_operands (icode
, 0, nops
, ops
))
8398 return GEN_FCN (icode
) (ops
[0].value
);
8400 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
);
8402 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
);
8404 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8407 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8408 ops
[3].value
, ops
[4].value
);
8410 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8411 ops
[3].value
, ops
[4].value
, ops
[5].value
);
8413 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8414 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8417 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8418 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8419 ops
[6].value
, ops
[7].value
);
8424 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8425 as its operands. Return true on success and emit no code on failure. */
8428 maybe_expand_insn (enum insn_code icode
, unsigned int nops
,
8429 struct expand_operand
*ops
)
8431 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8440 /* Like maybe_expand_insn, but for jumps. */
8443 maybe_expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8444 struct expand_operand
*ops
)
8446 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8449 emit_jump_insn (pat
);
8455 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8459 expand_insn (enum insn_code icode
, unsigned int nops
,
8460 struct expand_operand
*ops
)
8462 if (!maybe_expand_insn (icode
, nops
, ops
))
8466 /* Like expand_insn, but for jumps. */
8469 expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8470 struct expand_operand
*ops
)
8472 if (!maybe_expand_jump_insn (icode
, nops
, ops
))
8476 #include "gt-optabs.h"