1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
25 #include "diagnostic-core.h"
27 /* Include insn-config.h before expr.h so that HAVE_conditional_move
28 is properly defined. */
29 #include "insn-config.h"
32 #include "stor-layout.h"
33 #include "stringpool.h"
45 #include "basic-block.h"
48 struct target_optabs default_target_optabs
;
49 struct target_libfuncs default_target_libfuncs
;
50 struct target_optabs
*this_fn_optabs
= &default_target_optabs
;
52 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
53 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
56 #define libfunc_hash \
57 (this_target_libfuncs->x_libfunc_hash)
59 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
61 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
62 static void emit_libcall_block_1 (rtx
, rtx
, rtx
, rtx
, bool);
64 /* Debug facility for use in GDB. */
65 void debug_optab_libfuncs (void);
67 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
68 #if ENABLE_DECIMAL_BID_FORMAT
69 #define DECIMAL_PREFIX "bid_"
71 #define DECIMAL_PREFIX "dpd_"
74 /* Used for libfunc_hash. */
77 hash_libfunc (const void *p
)
79 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
80 return ((e
->mode1
+ e
->mode2
* NUM_MACHINE_MODES
) ^ e
->op
);
83 /* Used for libfunc_hash. */
86 eq_libfunc (const void *p
, const void *q
)
88 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
89 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
90 return e1
->op
== e2
->op
&& e1
->mode1
== e2
->mode1
&& e1
->mode2
== e2
->mode2
;
93 /* Return libfunc corresponding operation defined by OPTAB converting
94 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
95 if no libfunc is available. */
97 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
98 enum machine_mode mode2
)
100 struct libfunc_entry e
;
101 struct libfunc_entry
**slot
;
103 /* ??? This ought to be an assert, but not all of the places
104 that we expand optabs know about the optabs that got moved
106 if (!(optab
>= FIRST_CONV_OPTAB
&& optab
<= LAST_CONVLIB_OPTAB
))
112 slot
= (struct libfunc_entry
**)
113 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
116 const struct convert_optab_libcall_d
*d
117 = &convlib_def
[optab
- FIRST_CONV_OPTAB
];
119 if (d
->libcall_gen
== NULL
)
122 d
->libcall_gen (optab
, d
->libcall_basename
, mode1
, mode2
);
123 slot
= (struct libfunc_entry
**)
124 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
128 return (*slot
)->libfunc
;
131 /* Return libfunc corresponding operation defined by OPTAB in MODE.
132 Trigger lazy initialization if needed, return NULL if no libfunc is
135 optab_libfunc (optab optab
, enum machine_mode mode
)
137 struct libfunc_entry e
;
138 struct libfunc_entry
**slot
;
140 /* ??? This ought to be an assert, but not all of the places
141 that we expand optabs know about the optabs that got moved
143 if (!(optab
>= FIRST_NORM_OPTAB
&& optab
<= LAST_NORMLIB_OPTAB
))
149 slot
= (struct libfunc_entry
**)
150 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
153 const struct optab_libcall_d
*d
154 = &normlib_def
[optab
- FIRST_NORM_OPTAB
];
156 if (d
->libcall_gen
== NULL
)
159 d
->libcall_gen (optab
, d
->libcall_basename
, d
->libcall_suffix
, mode
);
160 slot
= (struct libfunc_entry
**)
161 htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
165 return (*slot
)->libfunc
;
169 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
170 the result of operation CODE applied to OP0 (and OP1 if it is a binary
173 If the last insn does not set TARGET, don't do anything, but return 1.
175 If the last insn or a previous insn sets TARGET and TARGET is one of OP0
176 or OP1, don't add the REG_EQUAL note but return 0. Our caller can then
177 try again, ensuring that TARGET is not one of the operands. */
180 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
185 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
187 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
188 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
189 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
190 && GET_RTX_CLASS (code
) != RTX_COMPARE
191 && GET_RTX_CLASS (code
) != RTX_UNARY
)
194 if (GET_CODE (target
) == ZERO_EXTRACT
)
197 for (last_insn
= insns
;
198 NEXT_INSN (last_insn
) != NULL_RTX
;
199 last_insn
= NEXT_INSN (last_insn
))
202 /* If TARGET is in OP0 or OP1, punt. We'd end up with a note referencing
203 a value changing in the insn, so the note would be invalid for CSE. */
204 if (reg_overlap_mentioned_p (target
, op0
)
205 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
208 && (rtx_equal_p (target
, op0
)
209 || (op1
&& rtx_equal_p (target
, op1
))))
211 /* For MEM target, with MEM = MEM op X, prefer no REG_EQUAL note
212 over expanding it as temp = MEM op X, MEM = temp. If the target
213 supports MEM = MEM op X instructions, it is sometimes too hard
214 to reconstruct that form later, especially if X is also a memory,
215 and due to multiple occurrences of addresses the address might
216 be forced into register unnecessarily.
217 Note that not emitting the REG_EQUIV note might inhibit
218 CSE in some cases. */
219 set
= single_set (last_insn
);
221 && GET_CODE (SET_SRC (set
)) == code
222 && MEM_P (SET_DEST (set
))
223 && (rtx_equal_p (SET_DEST (set
), XEXP (SET_SRC (set
), 0))
224 || (op1
&& rtx_equal_p (SET_DEST (set
),
225 XEXP (SET_SRC (set
), 1)))))
231 set
= single_set (last_insn
);
235 if (! rtx_equal_p (SET_DEST (set
), target
)
236 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
237 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
238 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
241 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
251 if (GET_MODE (op0
) != VOIDmode
&& GET_MODE (target
) != GET_MODE (op0
))
253 note
= gen_rtx_fmt_e (code
, GET_MODE (op0
), copy_rtx (op0
));
254 if (GET_MODE_SIZE (GET_MODE (op0
))
255 > GET_MODE_SIZE (GET_MODE (target
)))
256 note
= simplify_gen_unary (TRUNCATE
, GET_MODE (target
),
257 note
, GET_MODE (op0
));
259 note
= simplify_gen_unary (ZERO_EXTEND
, GET_MODE (target
),
260 note
, GET_MODE (op0
));
265 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
269 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
271 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
276 /* Given two input operands, OP0 and OP1, determine what the correct from_mode
277 for a widening operation would be. In most cases this would be OP0, but if
278 that's a constant it'll be VOIDmode, which isn't useful. */
280 static enum machine_mode
281 widened_mode (enum machine_mode to_mode
, rtx op0
, rtx op1
)
283 enum machine_mode m0
= GET_MODE (op0
);
284 enum machine_mode m1
= GET_MODE (op1
);
285 enum machine_mode result
;
287 if (m0
== VOIDmode
&& m1
== VOIDmode
)
289 else if (m0
== VOIDmode
|| GET_MODE_SIZE (m0
) < GET_MODE_SIZE (m1
))
294 if (GET_MODE_SIZE (result
) > GET_MODE_SIZE (to_mode
))
300 /* Like optab_handler, but for widening_operations that have a
301 TO_MODE and a FROM_MODE. */
304 widening_optab_handler (optab op
, enum machine_mode to_mode
,
305 enum machine_mode from_mode
)
307 unsigned scode
= (op
<< 16) | to_mode
;
308 if (to_mode
!= from_mode
&& from_mode
!= VOIDmode
)
310 /* ??? Why does find_widening_optab_handler_and_mode attempt to
311 widen things that can't be widened? E.g. add_optab... */
312 if (op
> LAST_CONV_OPTAB
)
313 return CODE_FOR_nothing
;
314 scode
|= from_mode
<< 8;
316 return raw_optab_handler (scode
);
319 /* Find a widening optab even if it doesn't widen as much as we want.
320 E.g. if from_mode is HImode, and to_mode is DImode, and there is no
321 direct HI->SI insn, then return SI->DI, if that exists.
322 If PERMIT_NON_WIDENING is non-zero then this can be used with
323 non-widening optabs also. */
326 find_widening_optab_handler_and_mode (optab op
, enum machine_mode to_mode
,
327 enum machine_mode from_mode
,
328 int permit_non_widening
,
329 enum machine_mode
*found_mode
)
331 for (; (permit_non_widening
|| from_mode
!= to_mode
)
332 && GET_MODE_SIZE (from_mode
) <= GET_MODE_SIZE (to_mode
)
333 && from_mode
!= VOIDmode
;
334 from_mode
= GET_MODE_WIDER_MODE (from_mode
))
336 enum insn_code handler
= widening_optab_handler (op
, to_mode
,
339 if (handler
!= CODE_FOR_nothing
)
342 *found_mode
= from_mode
;
347 return CODE_FOR_nothing
;
350 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
351 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
352 not actually do a sign-extend or zero-extend, but can leave the
353 higher-order bits of the result rtx undefined, for example, in the case
354 of logical operations, but not right shifts. */
357 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
358 int unsignedp
, int no_extend
)
362 /* If we don't have to extend and this is a constant, return it. */
363 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
366 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
367 extend since it will be more efficient to do so unless the signedness of
368 a promoted object differs from our extension. */
370 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
371 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
372 return convert_modes (mode
, oldmode
, op
, unsignedp
);
374 /* If MODE is no wider than a single word, we return a lowpart or paradoxical
376 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
377 return gen_lowpart (mode
, force_reg (GET_MODE (op
), op
));
379 /* Otherwise, get an object of MODE, clobber it, and set the low-order
382 result
= gen_reg_rtx (mode
);
383 emit_clobber (result
);
384 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
388 /* Return the optab used for computing the operation given by the tree code,
389 CODE and the tree EXP. This function is not always usable (for example, it
390 cannot give complete results for multiplication or division) but probably
391 ought to be relied on more widely throughout the expander. */
393 optab_for_tree_code (enum tree_code code
, const_tree type
,
394 enum optab_subtype subtype
)
406 return one_cmpl_optab
;
411 case MULT_HIGHPART_EXPR
:
412 return TYPE_UNSIGNED (type
) ? umul_highpart_optab
: smul_highpart_optab
;
418 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
426 if (TYPE_SATURATING (type
))
427 return TYPE_UNSIGNED (type
) ? usdiv_optab
: ssdiv_optab
;
428 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
431 if (TREE_CODE (type
) == VECTOR_TYPE
)
433 if (subtype
== optab_vector
)
434 return TYPE_SATURATING (type
) ? unknown_optab
: vashl_optab
;
436 gcc_assert (subtype
== optab_scalar
);
438 if (TYPE_SATURATING (type
))
439 return TYPE_UNSIGNED (type
) ? usashl_optab
: ssashl_optab
;
443 if (TREE_CODE (type
) == VECTOR_TYPE
)
445 if (subtype
== optab_vector
)
446 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
448 gcc_assert (subtype
== optab_scalar
);
450 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
453 if (TREE_CODE (type
) == VECTOR_TYPE
)
455 if (subtype
== optab_vector
)
458 gcc_assert (subtype
== optab_scalar
);
463 if (TREE_CODE (type
) == VECTOR_TYPE
)
465 if (subtype
== optab_vector
)
468 gcc_assert (subtype
== optab_scalar
);
473 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
476 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
478 case REALIGN_LOAD_EXPR
:
479 return vec_realign_load_optab
;
482 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
485 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
487 case WIDEN_MULT_PLUS_EXPR
:
488 return (TYPE_UNSIGNED (type
)
489 ? (TYPE_SATURATING (type
)
490 ? usmadd_widen_optab
: umadd_widen_optab
)
491 : (TYPE_SATURATING (type
)
492 ? ssmadd_widen_optab
: smadd_widen_optab
));
494 case WIDEN_MULT_MINUS_EXPR
:
495 return (TYPE_UNSIGNED (type
)
496 ? (TYPE_SATURATING (type
)
497 ? usmsub_widen_optab
: umsub_widen_optab
)
498 : (TYPE_SATURATING (type
)
499 ? ssmsub_widen_optab
: smsub_widen_optab
));
505 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
508 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
510 case REDUC_PLUS_EXPR
:
511 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
513 case VEC_LSHIFT_EXPR
:
514 return vec_shl_optab
;
516 case VEC_RSHIFT_EXPR
:
517 return vec_shr_optab
;
519 case VEC_WIDEN_MULT_HI_EXPR
:
520 return TYPE_UNSIGNED (type
) ?
521 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
523 case VEC_WIDEN_MULT_LO_EXPR
:
524 return TYPE_UNSIGNED (type
) ?
525 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
527 case VEC_WIDEN_MULT_EVEN_EXPR
:
528 return TYPE_UNSIGNED (type
) ?
529 vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
531 case VEC_WIDEN_MULT_ODD_EXPR
:
532 return TYPE_UNSIGNED (type
) ?
533 vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
535 case VEC_WIDEN_LSHIFT_HI_EXPR
:
536 return TYPE_UNSIGNED (type
) ?
537 vec_widen_ushiftl_hi_optab
: vec_widen_sshiftl_hi_optab
;
539 case VEC_WIDEN_LSHIFT_LO_EXPR
:
540 return TYPE_UNSIGNED (type
) ?
541 vec_widen_ushiftl_lo_optab
: vec_widen_sshiftl_lo_optab
;
543 case VEC_UNPACK_HI_EXPR
:
544 return TYPE_UNSIGNED (type
) ?
545 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
547 case VEC_UNPACK_LO_EXPR
:
548 return TYPE_UNSIGNED (type
) ?
549 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
551 case VEC_UNPACK_FLOAT_HI_EXPR
:
552 /* The signedness is determined from input operand. */
553 return TYPE_UNSIGNED (type
) ?
554 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
556 case VEC_UNPACK_FLOAT_LO_EXPR
:
557 /* The signedness is determined from input operand. */
558 return TYPE_UNSIGNED (type
) ?
559 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
561 case VEC_PACK_TRUNC_EXPR
:
562 return vec_pack_trunc_optab
;
564 case VEC_PACK_SAT_EXPR
:
565 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
567 case VEC_PACK_FIX_TRUNC_EXPR
:
568 /* The signedness is determined from output operand. */
569 return TYPE_UNSIGNED (type
) ?
570 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
576 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
579 case POINTER_PLUS_EXPR
:
581 if (TYPE_SATURATING (type
))
582 return TYPE_UNSIGNED (type
) ? usadd_optab
: ssadd_optab
;
583 return trapv
? addv_optab
: add_optab
;
586 if (TYPE_SATURATING (type
))
587 return TYPE_UNSIGNED (type
) ? ussub_optab
: sssub_optab
;
588 return trapv
? subv_optab
: sub_optab
;
591 if (TYPE_SATURATING (type
))
592 return TYPE_UNSIGNED (type
) ? usmul_optab
: ssmul_optab
;
593 return trapv
? smulv_optab
: smul_optab
;
596 if (TYPE_SATURATING (type
))
597 return TYPE_UNSIGNED (type
) ? usneg_optab
: ssneg_optab
;
598 return trapv
? negv_optab
: neg_optab
;
601 return trapv
? absv_optab
: abs_optab
;
604 return unknown_optab
;
609 /* Expand vector widening operations.
611 There are two different classes of operations handled here:
612 1) Operations whose result is wider than all the arguments to the operation.
613 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
614 In this case OP0 and optionally OP1 would be initialized,
615 but WIDE_OP wouldn't (not relevant for this case).
616 2) Operations whose result is of the same size as the last argument to the
617 operation, but wider than all the other arguments to the operation.
618 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
619 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
621 E.g, when called to expand the following operations, this is how
622 the arguments will be initialized:
624 widening-sum 2 oprnd0 - oprnd1
625 widening-dot-product 3 oprnd0 oprnd1 oprnd2
626 widening-mult 2 oprnd0 oprnd1 -
627 type-promotion (vec-unpack) 1 oprnd0 - - */
630 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
631 rtx target
, int unsignedp
)
633 struct expand_operand eops
[4];
634 tree oprnd0
, oprnd1
, oprnd2
;
635 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
636 optab widen_pattern_optab
;
637 enum insn_code icode
;
638 int nops
= TREE_CODE_LENGTH (ops
->code
);
642 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
643 widen_pattern_optab
=
644 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
645 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
646 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
647 icode
= find_widening_optab_handler (widen_pattern_optab
,
648 TYPE_MODE (TREE_TYPE (ops
->op2
)),
651 icode
= optab_handler (widen_pattern_optab
, tmode0
);
652 gcc_assert (icode
!= CODE_FOR_nothing
);
657 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
660 /* The last operand is of a wider mode than the rest of the operands. */
665 gcc_assert (tmode1
== tmode0
);
668 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
672 create_output_operand (&eops
[op
++], target
, TYPE_MODE (ops
->type
));
673 create_convert_operand_from (&eops
[op
++], op0
, tmode0
, unsignedp
);
675 create_convert_operand_from (&eops
[op
++], op1
, tmode1
, unsignedp
);
677 create_convert_operand_from (&eops
[op
++], wide_op
, wmode
, unsignedp
);
678 expand_insn (icode
, op
, eops
);
679 return eops
[0].value
;
682 /* Generate code to perform an operation specified by TERNARY_OPTAB
683 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
685 UNSIGNEDP is for the case where we have to widen the operands
686 to perform the operation. It says to use zero-extension.
688 If TARGET is nonzero, the value
689 is generated there, if it is convenient to do so.
690 In all cases an rtx is returned for the locus of the value;
691 this may or may not be TARGET. */
694 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
695 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
697 struct expand_operand ops
[4];
698 enum insn_code icode
= optab_handler (ternary_optab
, mode
);
700 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
702 create_output_operand (&ops
[0], target
, mode
);
703 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
704 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
705 create_convert_operand_from (&ops
[3], op2
, mode
, unsignedp
);
706 expand_insn (icode
, 4, ops
);
711 /* Like expand_binop, but return a constant rtx if the result can be
712 calculated at compile time. The arguments and return value are
713 otherwise the same as for expand_binop. */
716 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
717 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
718 enum optab_methods methods
)
720 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
722 rtx x
= simplify_binary_operation (optab_to_code (binoptab
),
728 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
731 /* Like simplify_expand_binop, but always put the result in TARGET.
732 Return true if the expansion succeeded. */
735 force_expand_binop (enum machine_mode mode
, optab binoptab
,
736 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
737 enum optab_methods methods
)
739 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
740 target
, unsignedp
, methods
);
744 emit_move_insn (target
, x
);
748 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
751 expand_vec_shift_expr (sepops ops
, rtx target
)
753 struct expand_operand eops
[3];
754 enum insn_code icode
;
755 rtx rtx_op1
, rtx_op2
;
756 enum machine_mode mode
= TYPE_MODE (ops
->type
);
757 tree vec_oprnd
= ops
->op0
;
758 tree shift_oprnd
= ops
->op1
;
763 case VEC_RSHIFT_EXPR
:
764 shift_optab
= vec_shr_optab
;
766 case VEC_LSHIFT_EXPR
:
767 shift_optab
= vec_shl_optab
;
773 icode
= optab_handler (shift_optab
, mode
);
774 gcc_assert (icode
!= CODE_FOR_nothing
);
776 rtx_op1
= expand_normal (vec_oprnd
);
777 rtx_op2
= expand_normal (shift_oprnd
);
779 create_output_operand (&eops
[0], target
, mode
);
780 create_input_operand (&eops
[1], rtx_op1
, GET_MODE (rtx_op1
));
781 create_convert_operand_from_type (&eops
[2], rtx_op2
, TREE_TYPE (shift_oprnd
));
782 expand_insn (icode
, 3, eops
);
784 return eops
[0].value
;
787 /* Create a new vector value in VMODE with all elements set to OP. The
788 mode of OP must be the element mode of VMODE. If OP is a constant,
789 then the return value will be a constant. */
792 expand_vector_broadcast (enum machine_mode vmode
, rtx op
)
794 enum insn_code icode
;
799 gcc_checking_assert (VECTOR_MODE_P (vmode
));
801 n
= GET_MODE_NUNITS (vmode
);
802 vec
= rtvec_alloc (n
);
803 for (i
= 0; i
< n
; ++i
)
804 RTVEC_ELT (vec
, i
) = op
;
807 return gen_rtx_CONST_VECTOR (vmode
, vec
);
809 /* ??? If the target doesn't have a vec_init, then we have no easy way
810 of performing this operation. Most of this sort of generic support
811 is hidden away in the vector lowering support in gimple. */
812 icode
= optab_handler (vec_init_optab
, vmode
);
813 if (icode
== CODE_FOR_nothing
)
816 ret
= gen_reg_rtx (vmode
);
817 emit_insn (GEN_FCN (icode
) (ret
, gen_rtx_PARALLEL (vmode
, vec
)));
822 /* This subroutine of expand_doubleword_shift handles the cases in which
823 the effective shift value is >= BITS_PER_WORD. The arguments and return
824 value are the same as for the parent routine, except that SUPERWORD_OP1
825 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
826 INTO_TARGET may be null if the caller has decided to calculate it. */
829 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
830 rtx outof_target
, rtx into_target
,
831 int unsignedp
, enum optab_methods methods
)
833 if (into_target
!= 0)
834 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
835 into_target
, unsignedp
, methods
))
838 if (outof_target
!= 0)
840 /* For a signed right shift, we must fill OUTOF_TARGET with copies
841 of the sign bit, otherwise we must fill it with zeros. */
842 if (binoptab
!= ashr_optab
)
843 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
845 if (!force_expand_binop (word_mode
, binoptab
,
846 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
847 outof_target
, unsignedp
, methods
))
853 /* This subroutine of expand_doubleword_shift handles the cases in which
854 the effective shift value is < BITS_PER_WORD. The arguments and return
855 value are the same as for the parent routine. */
858 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
859 rtx outof_input
, rtx into_input
, rtx op1
,
860 rtx outof_target
, rtx into_target
,
861 int unsignedp
, enum optab_methods methods
,
862 unsigned HOST_WIDE_INT shift_mask
)
864 optab reverse_unsigned_shift
, unsigned_shift
;
867 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
868 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
870 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
871 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
872 the opposite direction to BINOPTAB. */
873 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
875 carries
= outof_input
;
876 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
,
877 op1_mode
), op1_mode
);
878 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
883 /* We must avoid shifting by BITS_PER_WORD bits since that is either
884 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
885 has unknown behavior. Do a single shift first, then shift by the
886 remainder. It's OK to use ~OP1 as the remainder if shift counts
887 are truncated to the mode size. */
888 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
889 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
890 if (shift_mask
== BITS_PER_WORD
- 1)
892 tmp
= immed_wide_int_const
893 (wi::minus_one (GET_MODE_PRECISION (op1_mode
)), op1_mode
);
894 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
899 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
- 1,
900 op1_mode
), op1_mode
);
901 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
905 if (tmp
== 0 || carries
== 0)
907 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
908 carries
, tmp
, 0, unsignedp
, methods
);
912 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
913 so the result can go directly into INTO_TARGET if convenient. */
914 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
915 into_target
, unsignedp
, methods
);
919 /* Now OR in the bits carried over from OUTOF_INPUT. */
920 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
921 into_target
, unsignedp
, methods
))
924 /* Use a standard word_mode shift for the out-of half. */
925 if (outof_target
!= 0)
926 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
927 outof_target
, unsignedp
, methods
))
934 #ifdef HAVE_conditional_move
935 /* Try implementing expand_doubleword_shift using conditional moves.
936 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
937 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
938 are the shift counts to use in the former and latter case. All other
939 arguments are the same as the parent routine. */
942 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
943 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
944 rtx outof_input
, rtx into_input
,
945 rtx subword_op1
, rtx superword_op1
,
946 rtx outof_target
, rtx into_target
,
947 int unsignedp
, enum optab_methods methods
,
948 unsigned HOST_WIDE_INT shift_mask
)
950 rtx outof_superword
, into_superword
;
952 /* Put the superword version of the output into OUTOF_SUPERWORD and
954 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
955 if (outof_target
!= 0 && subword_op1
== superword_op1
)
957 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
958 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
959 into_superword
= outof_target
;
960 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
961 outof_superword
, 0, unsignedp
, methods
))
966 into_superword
= gen_reg_rtx (word_mode
);
967 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
968 outof_superword
, into_superword
,
973 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
974 if (!expand_subword_shift (op1_mode
, binoptab
,
975 outof_input
, into_input
, subword_op1
,
976 outof_target
, into_target
,
977 unsignedp
, methods
, shift_mask
))
980 /* Select between them. Do the INTO half first because INTO_SUPERWORD
981 might be the current value of OUTOF_TARGET. */
982 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
983 into_target
, into_superword
, word_mode
, false))
986 if (outof_target
!= 0)
987 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
988 outof_target
, outof_superword
,
996 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
997 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
998 input operand; the shift moves bits in the direction OUTOF_INPUT->
999 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
1000 of the target. OP1 is the shift count and OP1_MODE is its mode.
1001 If OP1 is constant, it will have been truncated as appropriate
1002 and is known to be nonzero.
1004 If SHIFT_MASK is zero, the result of word shifts is undefined when the
1005 shift count is outside the range [0, BITS_PER_WORD). This routine must
1006 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
1008 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
1009 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
1010 fill with zeros or sign bits as appropriate.
1012 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
1013 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
1014 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
1015 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
1018 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
1019 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
1020 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1021 function wants to calculate it itself.
1023 Return true if the shift could be successfully synthesized. */
1026 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
1027 rtx outof_input
, rtx into_input
, rtx op1
,
1028 rtx outof_target
, rtx into_target
,
1029 int unsignedp
, enum optab_methods methods
,
1030 unsigned HOST_WIDE_INT shift_mask
)
1032 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1033 rtx subword_label
, done_label
;
1034 enum rtx_code cmp_code
;
1036 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1037 fill the result with sign or zero bits as appropriate. If so, the value
1038 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1039 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1040 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1042 This isn't worthwhile for constant shifts since the optimizers will
1043 cope better with in-range shift counts. */
1044 if (shift_mask
>= BITS_PER_WORD
1045 && outof_target
!= 0
1046 && !CONSTANT_P (op1
))
1048 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1049 outof_input
, into_input
, op1
,
1051 unsignedp
, methods
, shift_mask
))
1053 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1054 outof_target
, unsignedp
, methods
))
1059 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1060 is true when the effective shift value is less than BITS_PER_WORD.
1061 Set SUPERWORD_OP1 to the shift count that should be used to shift
1062 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1063 tmp
= immed_wide_int_const (wi::shwi (BITS_PER_WORD
, op1_mode
), op1_mode
);
1064 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1066 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1067 is a subword shift count. */
1068 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1070 cmp2
= CONST0_RTX (op1_mode
);
1072 superword_op1
= op1
;
1076 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1077 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1079 cmp2
= CONST0_RTX (op1_mode
);
1081 superword_op1
= cmp1
;
1086 /* If we can compute the condition at compile time, pick the
1087 appropriate subroutine. */
1088 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1089 if (tmp
!= 0 && CONST_INT_P (tmp
))
1091 if (tmp
== const0_rtx
)
1092 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1093 outof_target
, into_target
,
1094 unsignedp
, methods
);
1096 return expand_subword_shift (op1_mode
, binoptab
,
1097 outof_input
, into_input
, op1
,
1098 outof_target
, into_target
,
1099 unsignedp
, methods
, shift_mask
);
1102 #ifdef HAVE_conditional_move
1103 /* Try using conditional moves to generate straight-line code. */
1105 rtx start
= get_last_insn ();
1106 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1107 cmp_code
, cmp1
, cmp2
,
1108 outof_input
, into_input
,
1110 outof_target
, into_target
,
1111 unsignedp
, methods
, shift_mask
))
1113 delete_insns_since (start
);
1117 /* As a last resort, use branches to select the correct alternative. */
1118 subword_label
= gen_label_rtx ();
1119 done_label
= gen_label_rtx ();
1122 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1123 0, 0, subword_label
, -1);
1126 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1127 outof_target
, into_target
,
1128 unsignedp
, methods
))
1131 emit_jump_insn (gen_jump (done_label
));
1133 emit_label (subword_label
);
1135 if (!expand_subword_shift (op1_mode
, binoptab
,
1136 outof_input
, into_input
, op1
,
1137 outof_target
, into_target
,
1138 unsignedp
, methods
, shift_mask
))
1141 emit_label (done_label
);
1145 /* Subroutine of expand_binop. Perform a double word multiplication of
1146 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1147 as the target's word_mode. This function return NULL_RTX if anything
1148 goes wrong, in which case it may have already emitted instructions
1149 which need to be deleted.
1151 If we want to multiply two two-word values and have normal and widening
1152 multiplies of single-word values, we can do this with three smaller
1155 The multiplication proceeds as follows:
1156 _______________________
1157 [__op0_high_|__op0_low__]
1158 _______________________
1159 * [__op1_high_|__op1_low__]
1160 _______________________________________________
1161 _______________________
1162 (1) [__op0_low__*__op1_low__]
1163 _______________________
1164 (2a) [__op0_low__*__op1_high_]
1165 _______________________
1166 (2b) [__op0_high_*__op1_low__]
1167 _______________________
1168 (3) [__op0_high_*__op1_high_]
1171 This gives a 4-word result. Since we are only interested in the
1172 lower 2 words, partial result (3) and the upper words of (2a) and
1173 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1174 calculated using non-widening multiplication.
1176 (1), however, needs to be calculated with an unsigned widening
1177 multiplication. If this operation is not directly supported we
1178 try using a signed widening multiplication and adjust the result.
1179 This adjustment works as follows:
1181 If both operands are positive then no adjustment is needed.
1183 If the operands have different signs, for example op0_low < 0 and
1184 op1_low >= 0, the instruction treats the most significant bit of
1185 op0_low as a sign bit instead of a bit with significance
1186 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1187 with 2**BITS_PER_WORD - op0_low, and two's complements the
1188 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1191 Similarly, if both operands are negative, we need to add
1192 (op0_low + op1_low) * 2**BITS_PER_WORD.
1194 We use a trick to adjust quickly. We logically shift op0_low right
1195 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1196 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1197 logical shift exists, we do an arithmetic right shift and subtract
1201 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1202 bool umulp
, enum optab_methods methods
)
1204 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1205 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1206 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1207 rtx product
, adjust
, product_high
, temp
;
1209 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1210 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1211 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1212 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1214 /* If we're using an unsigned multiply to directly compute the product
1215 of the low-order words of the operands and perform any required
1216 adjustments of the operands, we begin by trying two more multiplications
1217 and then computing the appropriate sum.
1219 We have checked above that the required addition is provided.
1220 Full-word addition will normally always succeed, especially if
1221 it is provided at all, so we don't worry about its failure. The
1222 multiplication may well fail, however, so we do handle that. */
1226 /* ??? This could be done with emit_store_flag where available. */
1227 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1228 NULL_RTX
, 1, methods
);
1230 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1231 NULL_RTX
, 0, OPTAB_DIRECT
);
1234 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1235 NULL_RTX
, 0, methods
);
1238 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1239 NULL_RTX
, 0, OPTAB_DIRECT
);
1246 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1247 NULL_RTX
, 0, OPTAB_DIRECT
);
1251 /* OP0_HIGH should now be dead. */
1255 /* ??? This could be done with emit_store_flag where available. */
1256 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1257 NULL_RTX
, 1, methods
);
1259 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1260 NULL_RTX
, 0, OPTAB_DIRECT
);
1263 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1264 NULL_RTX
, 0, methods
);
1267 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1268 NULL_RTX
, 0, OPTAB_DIRECT
);
1275 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1276 NULL_RTX
, 0, OPTAB_DIRECT
);
1280 /* OP1_HIGH should now be dead. */
1282 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1283 NULL_RTX
, 0, OPTAB_DIRECT
);
1285 if (target
&& !REG_P (target
))
1289 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1290 target
, 1, OPTAB_DIRECT
);
1292 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1293 target
, 1, OPTAB_DIRECT
);
1298 product_high
= operand_subword (product
, high
, 1, mode
);
1299 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1300 NULL_RTX
, 0, OPTAB_DIRECT
);
1301 emit_move_insn (product_high
, adjust
);
1305 /* Wrapper around expand_binop which takes an rtx code to specify
1306 the operation to perform, not an optab pointer. All other
1307 arguments are the same. */
1309 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1310 rtx op1
, rtx target
, int unsignedp
,
1311 enum optab_methods methods
)
1313 optab binop
= code_to_optab (code
);
1316 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1319 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1320 binop. Order them according to commutative_operand_precedence and, if
1321 possible, try to put TARGET or a pseudo first. */
1323 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1325 int op0_prec
= commutative_operand_precedence (op0
);
1326 int op1_prec
= commutative_operand_precedence (op1
);
1328 if (op0_prec
< op1_prec
)
1331 if (op0_prec
> op1_prec
)
1334 /* With equal precedence, both orders are ok, but it is better if the
1335 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1336 if (target
== 0 || REG_P (target
))
1337 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1339 return rtx_equal_p (op1
, target
);
1342 /* Return true if BINOPTAB implements a shift operation. */
1345 shift_optab_p (optab binoptab
)
1347 switch (optab_to_code (binoptab
))
1363 /* Return true if BINOPTAB implements a commutative binary operation. */
1366 commutative_optab_p (optab binoptab
)
1368 return (GET_RTX_CLASS (optab_to_code (binoptab
)) == RTX_COMM_ARITH
1369 || binoptab
== smul_widen_optab
1370 || binoptab
== umul_widen_optab
1371 || binoptab
== smul_highpart_optab
1372 || binoptab
== umul_highpart_optab
);
1375 /* X is to be used in mode MODE as operand OPN to BINOPTAB. If we're
1376 optimizing, and if the operand is a constant that costs more than
1377 1 instruction, force the constant into a register and return that
1378 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1381 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1382 int opn
, rtx x
, bool unsignedp
)
1384 bool speed
= optimize_insn_for_speed_p ();
1386 if (mode
!= VOIDmode
1389 && (rtx_cost (x
, optab_to_code (binoptab
), opn
, speed
)
1390 > set_src_cost (x
, speed
)))
1392 if (CONST_INT_P (x
))
1394 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1395 if (intval
!= INTVAL (x
))
1396 x
= GEN_INT (intval
);
1399 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1400 x
= force_reg (mode
, x
);
1405 /* Helper function for expand_binop: handle the case where there
1406 is an insn that directly implements the indicated operation.
1407 Returns null if this is not possible. */
1409 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1411 rtx target
, int unsignedp
, enum optab_methods methods
,
1414 enum machine_mode from_mode
= widened_mode (mode
, op0
, op1
);
1415 enum insn_code icode
= find_widening_optab_handler (binoptab
, mode
,
1417 enum machine_mode xmode0
= insn_data
[(int) icode
].operand
[1].mode
;
1418 enum machine_mode xmode1
= insn_data
[(int) icode
].operand
[2].mode
;
1419 enum machine_mode mode0
, mode1
, tmp_mode
;
1420 struct expand_operand ops
[3];
1423 rtx xop0
= op0
, xop1
= op1
;
1426 /* If it is a commutative operator and the modes would match
1427 if we would swap the operands, we can save the conversions. */
1428 commutative_p
= commutative_optab_p (binoptab
);
1430 && GET_MODE (xop0
) != xmode0
&& GET_MODE (xop1
) != xmode1
1431 && GET_MODE (xop0
) == xmode1
&& GET_MODE (xop1
) == xmode1
)
1438 /* If we are optimizing, force expensive constants into a register. */
1439 xop0
= avoid_expensive_constant (xmode0
, binoptab
, 0, xop0
, unsignedp
);
1440 if (!shift_optab_p (binoptab
))
1441 xop1
= avoid_expensive_constant (xmode1
, binoptab
, 1, xop1
, unsignedp
);
1443 /* In case the insn wants input operands in modes different from
1444 those of the actual operands, convert the operands. It would
1445 seem that we don't need to convert CONST_INTs, but we do, so
1446 that they're properly zero-extended, sign-extended or truncated
1449 mode0
= GET_MODE (xop0
) != VOIDmode
? GET_MODE (xop0
) : mode
;
1450 if (xmode0
!= VOIDmode
&& xmode0
!= mode0
)
1452 xop0
= convert_modes (xmode0
, mode0
, xop0
, unsignedp
);
1456 mode1
= GET_MODE (xop1
) != VOIDmode
? GET_MODE (xop1
) : mode
;
1457 if (xmode1
!= VOIDmode
&& xmode1
!= mode1
)
1459 xop1
= convert_modes (xmode1
, mode1
, xop1
, unsignedp
);
1463 /* If operation is commutative,
1464 try to make the first operand a register.
1465 Even better, try to make it the same as the target.
1466 Also try to make the last operand a constant. */
1468 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1475 /* Now, if insn's predicates don't allow our operands, put them into
1478 if (binoptab
== vec_pack_trunc_optab
1479 || binoptab
== vec_pack_usat_optab
1480 || binoptab
== vec_pack_ssat_optab
1481 || binoptab
== vec_pack_ufix_trunc_optab
1482 || binoptab
== vec_pack_sfix_trunc_optab
)
1484 /* The mode of the result is different then the mode of the
1486 tmp_mode
= insn_data
[(int) icode
].operand
[0].mode
;
1487 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1489 delete_insns_since (last
);
1496 create_output_operand (&ops
[0], target
, tmp_mode
);
1497 create_input_operand (&ops
[1], xop0
, mode0
);
1498 create_input_operand (&ops
[2], xop1
, mode1
);
1499 pat
= maybe_gen_insn (icode
, 3, ops
);
1502 /* If PAT is composed of more than one insn, try to add an appropriate
1503 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1504 operand, call expand_binop again, this time without a target. */
1505 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1506 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (binoptab
),
1507 ops
[1].value
, ops
[2].value
))
1509 delete_insns_since (last
);
1510 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1511 unsignedp
, methods
);
1515 return ops
[0].value
;
1517 delete_insns_since (last
);
1521 /* Generate code to perform an operation specified by BINOPTAB
1522 on operands OP0 and OP1, with result having machine-mode MODE.
1524 UNSIGNEDP is for the case where we have to widen the operands
1525 to perform the operation. It says to use zero-extension.
1527 If TARGET is nonzero, the value
1528 is generated there, if it is convenient to do so.
1529 In all cases an rtx is returned for the locus of the value;
1530 this may or may not be TARGET. */
1533 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1534 rtx target
, int unsignedp
, enum optab_methods methods
)
1536 enum optab_methods next_methods
1537 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1538 ? OPTAB_WIDEN
: methods
);
1539 enum mode_class mclass
;
1540 enum machine_mode wider_mode
;
1543 rtx entry_last
= get_last_insn ();
1546 mclass
= GET_MODE_CLASS (mode
);
1548 /* If subtracting an integer constant, convert this into an addition of
1549 the negated constant. */
1551 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1553 op1
= negate_rtx (mode
, op1
);
1554 binoptab
= add_optab
;
1557 /* Record where to delete back to if we backtrack. */
1558 last
= get_last_insn ();
1560 /* If we can do it with a three-operand insn, do so. */
1562 if (methods
!= OPTAB_MUST_WIDEN
1563 && find_widening_optab_handler (binoptab
, mode
,
1564 widened_mode (mode
, op0
, op1
), 1)
1565 != CODE_FOR_nothing
)
1567 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1568 unsignedp
, methods
, last
);
1573 /* If we were trying to rotate, and that didn't work, try rotating
1574 the other direction before falling back to shifts and bitwise-or. */
1575 if (((binoptab
== rotl_optab
1576 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1577 || (binoptab
== rotr_optab
1578 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1579 && mclass
== MODE_INT
)
1581 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1583 unsigned int bits
= GET_MODE_PRECISION (mode
);
1585 if (CONST_INT_P (op1
))
1586 newop1
= GEN_INT (bits
- INTVAL (op1
));
1587 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1588 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1590 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1591 gen_int_mode (bits
, GET_MODE (op1
)), op1
,
1592 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1594 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1595 target
, unsignedp
, methods
, last
);
1600 /* If this is a multiply, see if we can do a widening operation that
1601 takes operands of this mode and makes a wider mode. */
1603 if (binoptab
== smul_optab
1604 && GET_MODE_2XWIDER_MODE (mode
) != VOIDmode
1605 && (widening_optab_handler ((unsignedp
? umul_widen_optab
1606 : smul_widen_optab
),
1607 GET_MODE_2XWIDER_MODE (mode
), mode
)
1608 != CODE_FOR_nothing
))
1610 temp
= expand_binop (GET_MODE_2XWIDER_MODE (mode
),
1611 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1612 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1616 if (GET_MODE_CLASS (mode
) == MODE_INT
1617 && TRULY_NOOP_TRUNCATION_MODES_P (mode
, GET_MODE (temp
)))
1618 return gen_lowpart (mode
, temp
);
1620 return convert_to_mode (mode
, temp
, unsignedp
);
1624 /* If this is a vector shift by a scalar, see if we can do a vector
1625 shift by a vector. If so, broadcast the scalar into a vector. */
1626 if (mclass
== MODE_VECTOR_INT
)
1628 optab otheroptab
= unknown_optab
;
1630 if (binoptab
== ashl_optab
)
1631 otheroptab
= vashl_optab
;
1632 else if (binoptab
== ashr_optab
)
1633 otheroptab
= vashr_optab
;
1634 else if (binoptab
== lshr_optab
)
1635 otheroptab
= vlshr_optab
;
1636 else if (binoptab
== rotl_optab
)
1637 otheroptab
= vrotl_optab
;
1638 else if (binoptab
== rotr_optab
)
1639 otheroptab
= vrotr_optab
;
1641 if (otheroptab
&& optab_handler (otheroptab
, mode
) != CODE_FOR_nothing
)
1643 rtx vop1
= expand_vector_broadcast (mode
, op1
);
1646 temp
= expand_binop_directly (mode
, otheroptab
, op0
, vop1
,
1647 target
, unsignedp
, methods
, last
);
1654 /* Look for a wider mode of the same class for which we think we
1655 can open-code the operation. Check for a widening multiply at the
1656 wider mode as well. */
1658 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1659 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1660 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1661 wider_mode
!= VOIDmode
;
1662 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1664 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1665 || (binoptab
== smul_optab
1666 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1667 && (find_widening_optab_handler ((unsignedp
1669 : smul_widen_optab
),
1670 GET_MODE_WIDER_MODE (wider_mode
),
1672 != CODE_FOR_nothing
)))
1674 rtx xop0
= op0
, xop1
= op1
;
1677 /* For certain integer operations, we need not actually extend
1678 the narrow operands, as long as we will truncate
1679 the results to the same narrowness. */
1681 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1682 || binoptab
== xor_optab
1683 || binoptab
== add_optab
|| binoptab
== sub_optab
1684 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1685 && mclass
== MODE_INT
)
1688 xop0
= avoid_expensive_constant (mode
, binoptab
, 0,
1690 if (binoptab
!= ashl_optab
)
1691 xop1
= avoid_expensive_constant (mode
, binoptab
, 1,
1695 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1697 /* The second operand of a shift must always be extended. */
1698 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1699 no_extend
&& binoptab
!= ashl_optab
);
1701 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1702 unsignedp
, OPTAB_DIRECT
);
1705 if (mclass
!= MODE_INT
1706 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
1709 target
= gen_reg_rtx (mode
);
1710 convert_move (target
, temp
, 0);
1714 return gen_lowpart (mode
, temp
);
1717 delete_insns_since (last
);
1721 /* If operation is commutative,
1722 try to make the first operand a register.
1723 Even better, try to make it the same as the target.
1724 Also try to make the last operand a constant. */
1725 if (commutative_optab_p (binoptab
)
1726 && swap_commutative_operands_with_target (target
, op0
, op1
))
1733 /* These can be done a word at a time. */
1734 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1735 && mclass
== MODE_INT
1736 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1737 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1742 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1743 won't be accurate, so use a new target. */
1747 || !valid_multiword_target_p (target
))
1748 target
= gen_reg_rtx (mode
);
1752 /* Do the actual arithmetic. */
1753 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1755 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1756 rtx x
= expand_binop (word_mode
, binoptab
,
1757 operand_subword_force (op0
, i
, mode
),
1758 operand_subword_force (op1
, i
, mode
),
1759 target_piece
, unsignedp
, next_methods
);
1764 if (target_piece
!= x
)
1765 emit_move_insn (target_piece
, x
);
1768 insns
= get_insns ();
1771 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1778 /* Synthesize double word shifts from single word shifts. */
1779 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1780 || binoptab
== ashr_optab
)
1781 && mclass
== MODE_INT
1782 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1783 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1784 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
)
1785 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1786 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1787 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1789 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1790 enum machine_mode op1_mode
;
1792 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1793 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1794 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1796 /* Apply the truncation to constant shifts. */
1797 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1798 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1800 if (op1
== CONST0_RTX (op1_mode
))
1803 /* Make sure that this is a combination that expand_doubleword_shift
1804 can handle. See the comments there for details. */
1805 if (double_shift_mask
== 0
1806 || (shift_mask
== BITS_PER_WORD
- 1
1807 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1810 rtx into_target
, outof_target
;
1811 rtx into_input
, outof_input
;
1812 int left_shift
, outof_word
;
1814 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1815 won't be accurate, so use a new target. */
1819 || !valid_multiword_target_p (target
))
1820 target
= gen_reg_rtx (mode
);
1824 /* OUTOF_* is the word we are shifting bits away from, and
1825 INTO_* is the word that we are shifting bits towards, thus
1826 they differ depending on the direction of the shift and
1827 WORDS_BIG_ENDIAN. */
1829 left_shift
= binoptab
== ashl_optab
;
1830 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1832 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1833 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1835 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1836 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1838 if (expand_doubleword_shift (op1_mode
, binoptab
,
1839 outof_input
, into_input
, op1
,
1840 outof_target
, into_target
,
1841 unsignedp
, next_methods
, shift_mask
))
1843 insns
= get_insns ();
1853 /* Synthesize double word rotates from single word shifts. */
1854 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1855 && mclass
== MODE_INT
1856 && CONST_INT_P (op1
)
1857 && GET_MODE_PRECISION (mode
) == 2 * BITS_PER_WORD
1858 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1859 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1862 rtx into_target
, outof_target
;
1863 rtx into_input
, outof_input
;
1865 int shift_count
, left_shift
, outof_word
;
1867 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1868 won't be accurate, so use a new target. Do this also if target is not
1869 a REG, first because having a register instead may open optimization
1870 opportunities, and second because if target and op0 happen to be MEMs
1871 designating the same location, we would risk clobbering it too early
1872 in the code sequence we generate below. */
1877 || !valid_multiword_target_p (target
))
1878 target
= gen_reg_rtx (mode
);
1882 shift_count
= INTVAL (op1
);
1884 /* OUTOF_* is the word we are shifting bits away from, and
1885 INTO_* is the word that we are shifting bits towards, thus
1886 they differ depending on the direction of the shift and
1887 WORDS_BIG_ENDIAN. */
1889 left_shift
= (binoptab
== rotl_optab
);
1890 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1892 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1893 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1895 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1896 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1898 if (shift_count
== BITS_PER_WORD
)
1900 /* This is just a word swap. */
1901 emit_move_insn (outof_target
, into_input
);
1902 emit_move_insn (into_target
, outof_input
);
1907 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1908 rtx first_shift_count
, second_shift_count
;
1909 optab reverse_unsigned_shift
, unsigned_shift
;
1911 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1912 ? lshr_optab
: ashl_optab
);
1914 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1915 ? ashl_optab
: lshr_optab
);
1917 if (shift_count
> BITS_PER_WORD
)
1919 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1920 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1924 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1925 second_shift_count
= GEN_INT (shift_count
);
1928 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1929 outof_input
, first_shift_count
,
1930 NULL_RTX
, unsignedp
, next_methods
);
1931 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1932 into_input
, second_shift_count
,
1933 NULL_RTX
, unsignedp
, next_methods
);
1935 if (into_temp1
!= 0 && into_temp2
!= 0)
1936 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1937 into_target
, unsignedp
, next_methods
);
1941 if (inter
!= 0 && inter
!= into_target
)
1942 emit_move_insn (into_target
, inter
);
1944 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1945 into_input
, first_shift_count
,
1946 NULL_RTX
, unsignedp
, next_methods
);
1947 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1948 outof_input
, second_shift_count
,
1949 NULL_RTX
, unsignedp
, next_methods
);
1951 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1952 inter
= expand_binop (word_mode
, ior_optab
,
1953 outof_temp1
, outof_temp2
,
1954 outof_target
, unsignedp
, next_methods
);
1956 if (inter
!= 0 && inter
!= outof_target
)
1957 emit_move_insn (outof_target
, inter
);
1960 insns
= get_insns ();
1970 /* These can be done a word at a time by propagating carries. */
1971 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1972 && mclass
== MODE_INT
1973 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1974 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1977 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1978 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1979 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1980 rtx xop0
, xop1
, xtarget
;
1982 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1983 value is one of those, use it. Otherwise, use 1 since it is the
1984 one easiest to get. */
1985 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1986 int normalizep
= STORE_FLAG_VALUE
;
1991 /* Prepare the operands. */
1992 xop0
= force_reg (mode
, op0
);
1993 xop1
= force_reg (mode
, op1
);
1995 xtarget
= gen_reg_rtx (mode
);
1997 if (target
== 0 || !REG_P (target
) || !valid_multiword_target_p (target
))
2000 /* Indicate for flow that the entire target reg is being set. */
2002 emit_clobber (xtarget
);
2004 /* Do the actual arithmetic. */
2005 for (i
= 0; i
< nwords
; i
++)
2007 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
2008 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
2009 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
2010 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
2013 /* Main add/subtract of the input operands. */
2014 x
= expand_binop (word_mode
, binoptab
,
2015 op0_piece
, op1_piece
,
2016 target_piece
, unsignedp
, next_methods
);
2022 /* Store carry from main add/subtract. */
2023 carry_out
= gen_reg_rtx (word_mode
);
2024 carry_out
= emit_store_flag_force (carry_out
,
2025 (binoptab
== add_optab
2028 word_mode
, 1, normalizep
);
2035 /* Add/subtract previous carry to main result. */
2036 newx
= expand_binop (word_mode
,
2037 normalizep
== 1 ? binoptab
: otheroptab
,
2039 NULL_RTX
, 1, next_methods
);
2043 /* Get out carry from adding/subtracting carry in. */
2044 rtx carry_tmp
= gen_reg_rtx (word_mode
);
2045 carry_tmp
= emit_store_flag_force (carry_tmp
,
2046 (binoptab
== add_optab
2049 word_mode
, 1, normalizep
);
2051 /* Logical-ior the two poss. carry together. */
2052 carry_out
= expand_binop (word_mode
, ior_optab
,
2053 carry_out
, carry_tmp
,
2054 carry_out
, 0, next_methods
);
2058 emit_move_insn (target_piece
, newx
);
2062 if (x
!= target_piece
)
2063 emit_move_insn (target_piece
, x
);
2066 carry_in
= carry_out
;
2069 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2071 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2072 || ! rtx_equal_p (target
, xtarget
))
2074 rtx temp
= emit_move_insn (target
, xtarget
);
2076 set_dst_reg_note (temp
, REG_EQUAL
,
2077 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2078 mode
, copy_rtx (xop0
),
2089 delete_insns_since (last
);
2092 /* Attempt to synthesize double word multiplies using a sequence of word
2093 mode multiplications. We first attempt to generate a sequence using a
2094 more efficient unsigned widening multiply, and if that fails we then
2095 try using a signed widening multiply. */
2097 if (binoptab
== smul_optab
2098 && mclass
== MODE_INT
2099 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2100 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2101 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2103 rtx product
= NULL_RTX
;
2104 if (widening_optab_handler (umul_widen_optab
, mode
, word_mode
)
2105 != CODE_FOR_nothing
)
2107 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2110 delete_insns_since (last
);
2113 if (product
== NULL_RTX
2114 && widening_optab_handler (smul_widen_optab
, mode
, word_mode
)
2115 != CODE_FOR_nothing
)
2117 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2120 delete_insns_since (last
);
2123 if (product
!= NULL_RTX
)
2125 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2127 temp
= emit_move_insn (target
? target
: product
, product
);
2128 set_dst_reg_note (temp
,
2130 gen_rtx_fmt_ee (MULT
, mode
,
2133 target
? target
: product
);
2139 /* It can't be open-coded in this mode.
2140 Use a library call if one is available and caller says that's ok. */
2142 libfunc
= optab_libfunc (binoptab
, mode
);
2144 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2148 enum machine_mode op1_mode
= mode
;
2153 if (shift_optab_p (binoptab
))
2155 op1_mode
= targetm
.libgcc_shift_count_mode ();
2156 /* Specify unsigned here,
2157 since negative shift counts are meaningless. */
2158 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2161 if (GET_MODE (op0
) != VOIDmode
2162 && GET_MODE (op0
) != mode
)
2163 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2165 /* Pass 1 for NO_QUEUE so we don't lose any increments
2166 if the libcall is cse'd or moved. */
2167 value
= emit_library_call_value (libfunc
,
2168 NULL_RTX
, LCT_CONST
, mode
, 2,
2169 op0
, mode
, op1x
, op1_mode
);
2171 insns
= get_insns ();
2174 target
= gen_reg_rtx (mode
);
2175 emit_libcall_block_1 (insns
, target
, value
,
2176 gen_rtx_fmt_ee (optab_to_code (binoptab
),
2178 trapv_binoptab_p (binoptab
));
2183 delete_insns_since (last
);
2185 /* It can't be done in this mode. Can we do it in a wider mode? */
2187 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2188 || methods
== OPTAB_MUST_WIDEN
))
2190 /* Caller says, don't even try. */
2191 delete_insns_since (entry_last
);
2195 /* Compute the value of METHODS to pass to recursive calls.
2196 Don't allow widening to be tried recursively. */
2198 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2200 /* Look for a wider mode of the same class for which it appears we can do
2203 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2205 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2206 wider_mode
!= VOIDmode
;
2207 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2209 if (find_widening_optab_handler (binoptab
, wider_mode
, mode
, 1)
2211 || (methods
== OPTAB_LIB
2212 && optab_libfunc (binoptab
, wider_mode
)))
2214 rtx xop0
= op0
, xop1
= op1
;
2217 /* For certain integer operations, we need not actually extend
2218 the narrow operands, as long as we will truncate
2219 the results to the same narrowness. */
2221 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2222 || binoptab
== xor_optab
2223 || binoptab
== add_optab
|| binoptab
== sub_optab
2224 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2225 && mclass
== MODE_INT
)
2228 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2229 unsignedp
, no_extend
);
2231 /* The second operand of a shift must always be extended. */
2232 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2233 no_extend
&& binoptab
!= ashl_optab
);
2235 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2236 unsignedp
, methods
);
2239 if (mclass
!= MODE_INT
2240 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
2243 target
= gen_reg_rtx (mode
);
2244 convert_move (target
, temp
, 0);
2248 return gen_lowpart (mode
, temp
);
2251 delete_insns_since (last
);
2256 delete_insns_since (entry_last
);
2260 /* Expand a binary operator which has both signed and unsigned forms.
2261 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2264 If we widen unsigned operands, we may use a signed wider operation instead
2265 of an unsigned wider operation, since the result would be the same. */
2268 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2269 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2270 enum optab_methods methods
)
2273 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2276 /* Do it without widening, if possible. */
2277 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2278 unsignedp
, OPTAB_DIRECT
);
2279 if (temp
|| methods
== OPTAB_DIRECT
)
2282 /* Try widening to a signed int. Disable any direct use of any
2283 signed insn in the current mode. */
2284 save_enable
= swap_optab_enable (soptab
, mode
, false);
2286 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2287 unsignedp
, OPTAB_WIDEN
);
2289 /* For unsigned operands, try widening to an unsigned int. */
2290 if (!temp
&& unsignedp
)
2291 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2292 unsignedp
, OPTAB_WIDEN
);
2293 if (temp
|| methods
== OPTAB_WIDEN
)
2296 /* Use the right width libcall if that exists. */
2297 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2298 unsignedp
, OPTAB_LIB
);
2299 if (temp
|| methods
== OPTAB_LIB
)
2302 /* Must widen and use a libcall, use either signed or unsigned. */
2303 temp
= expand_binop (mode
, soptab
, op0
, op1
, target
,
2304 unsignedp
, methods
);
2305 if (!temp
&& unsignedp
)
2306 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2307 unsignedp
, methods
);
2310 /* Undo the fiddling above. */
2312 swap_optab_enable (soptab
, mode
, true);
2316 /* Generate code to perform an operation specified by UNOPPTAB
2317 on operand OP0, with two results to TARG0 and TARG1.
2318 We assume that the order of the operands for the instruction
2319 is TARG0, TARG1, OP0.
2321 Either TARG0 or TARG1 may be zero, but what that means is that
2322 the result is not actually wanted. We will generate it into
2323 a dummy pseudo-reg and discard it. They may not both be zero.
2325 Returns 1 if this operation can be performed; 0 if not. */
2328 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2331 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2332 enum mode_class mclass
;
2333 enum machine_mode wider_mode
;
2334 rtx entry_last
= get_last_insn ();
2337 mclass
= GET_MODE_CLASS (mode
);
2340 targ0
= gen_reg_rtx (mode
);
2342 targ1
= gen_reg_rtx (mode
);
2344 /* Record where to go back to if we fail. */
2345 last
= get_last_insn ();
2347 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2349 struct expand_operand ops
[3];
2350 enum insn_code icode
= optab_handler (unoptab
, mode
);
2352 create_fixed_operand (&ops
[0], targ0
);
2353 create_fixed_operand (&ops
[1], targ1
);
2354 create_convert_operand_from (&ops
[2], op0
, mode
, unsignedp
);
2355 if (maybe_expand_insn (icode
, 3, ops
))
2359 /* It can't be done in this mode. Can we do it in a wider mode? */
2361 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2363 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2364 wider_mode
!= VOIDmode
;
2365 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2367 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2369 rtx t0
= gen_reg_rtx (wider_mode
);
2370 rtx t1
= gen_reg_rtx (wider_mode
);
2371 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2373 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2375 convert_move (targ0
, t0
, unsignedp
);
2376 convert_move (targ1
, t1
, unsignedp
);
2380 delete_insns_since (last
);
2385 delete_insns_since (entry_last
);
2389 /* Generate code to perform an operation specified by BINOPTAB
2390 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2391 We assume that the order of the operands for the instruction
2392 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2393 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2395 Either TARG0 or TARG1 may be zero, but what that means is that
2396 the result is not actually wanted. We will generate it into
2397 a dummy pseudo-reg and discard it. They may not both be zero.
2399 Returns 1 if this operation can be performed; 0 if not. */
2402 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2405 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2406 enum mode_class mclass
;
2407 enum machine_mode wider_mode
;
2408 rtx entry_last
= get_last_insn ();
2411 mclass
= GET_MODE_CLASS (mode
);
2414 targ0
= gen_reg_rtx (mode
);
2416 targ1
= gen_reg_rtx (mode
);
2418 /* Record where to go back to if we fail. */
2419 last
= get_last_insn ();
2421 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2423 struct expand_operand ops
[4];
2424 enum insn_code icode
= optab_handler (binoptab
, mode
);
2425 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2426 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2427 rtx xop0
= op0
, xop1
= op1
;
2429 /* If we are optimizing, force expensive constants into a register. */
2430 xop0
= avoid_expensive_constant (mode0
, binoptab
, 0, xop0
, unsignedp
);
2431 xop1
= avoid_expensive_constant (mode1
, binoptab
, 1, xop1
, unsignedp
);
2433 create_fixed_operand (&ops
[0], targ0
);
2434 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
2435 create_convert_operand_from (&ops
[2], op1
, mode
, unsignedp
);
2436 create_fixed_operand (&ops
[3], targ1
);
2437 if (maybe_expand_insn (icode
, 4, ops
))
2439 delete_insns_since (last
);
2442 /* It can't be done in this mode. Can we do it in a wider mode? */
2444 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2446 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2447 wider_mode
!= VOIDmode
;
2448 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2450 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2452 rtx t0
= gen_reg_rtx (wider_mode
);
2453 rtx t1
= gen_reg_rtx (wider_mode
);
2454 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2455 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2457 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2460 convert_move (targ0
, t0
, unsignedp
);
2461 convert_move (targ1
, t1
, unsignedp
);
2465 delete_insns_since (last
);
2470 delete_insns_since (entry_last
);
2474 /* Expand the two-valued library call indicated by BINOPTAB, but
2475 preserve only one of the values. If TARG0 is non-NULL, the first
2476 value is placed into TARG0; otherwise the second value is placed
2477 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2478 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2479 This routine assumes that the value returned by the library call is
2480 as if the return value was of an integral mode twice as wide as the
2481 mode of OP0. Returns 1 if the call was successful. */
2484 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2485 rtx targ0
, rtx targ1
, enum rtx_code code
)
2487 enum machine_mode mode
;
2488 enum machine_mode libval_mode
;
2493 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2494 gcc_assert (!targ0
!= !targ1
);
2496 mode
= GET_MODE (op0
);
2497 libfunc
= optab_libfunc (binoptab
, mode
);
2501 /* The value returned by the library function will have twice as
2502 many bits as the nominal MODE. */
2503 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2506 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2510 /* Get the part of VAL containing the value that we want. */
2511 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2512 targ0
? 0 : GET_MODE_SIZE (mode
));
2513 insns
= get_insns ();
2515 /* Move the into the desired location. */
2516 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2517 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2523 /* Wrapper around expand_unop which takes an rtx code to specify
2524 the operation to perform, not an optab pointer. All other
2525 arguments are the same. */
2527 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2528 rtx target
, int unsignedp
)
2530 optab unop
= code_to_optab (code
);
2533 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2539 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)).
2541 A similar operation can be used for clrsb. UNOPTAB says which operation
2542 we are trying to expand. */
2544 widen_leading (enum machine_mode mode
, rtx op0
, rtx target
, optab unoptab
)
2546 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2547 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2549 enum machine_mode wider_mode
;
2550 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2551 wider_mode
!= VOIDmode
;
2552 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2554 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2556 rtx xop0
, temp
, last
;
2558 last
= get_last_insn ();
2561 target
= gen_reg_rtx (mode
);
2562 xop0
= widen_operand (op0
, wider_mode
, mode
,
2563 unoptab
!= clrsb_optab
, false);
2564 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2565 unoptab
!= clrsb_optab
);
2568 (wider_mode
, sub_optab
, temp
,
2569 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
2570 - GET_MODE_PRECISION (mode
),
2572 target
, true, OPTAB_DIRECT
);
2574 delete_insns_since (last
);
2583 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2584 quantities, choosing which based on whether the high word is nonzero. */
2586 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2588 rtx xop0
= force_reg (mode
, op0
);
2589 rtx subhi
= gen_highpart (word_mode
, xop0
);
2590 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2591 rtx hi0_label
= gen_label_rtx ();
2592 rtx after_label
= gen_label_rtx ();
2593 rtx seq
, temp
, result
;
2595 /* If we were not given a target, use a word_mode register, not a
2596 'mode' register. The result will fit, and nobody is expecting
2597 anything bigger (the return type of __builtin_clz* is int). */
2599 target
= gen_reg_rtx (word_mode
);
2601 /* In any case, write to a word_mode scratch in both branches of the
2602 conditional, so we can ensure there is a single move insn setting
2603 'target' to tag a REG_EQUAL note on. */
2604 result
= gen_reg_rtx (word_mode
);
2608 /* If the high word is not equal to zero,
2609 then clz of the full value is clz of the high word. */
2610 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2611 word_mode
, true, hi0_label
);
2613 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2618 convert_move (result
, temp
, true);
2620 emit_jump_insn (gen_jump (after_label
));
2623 /* Else clz of the full value is clz of the low word plus the number
2624 of bits in the high word. */
2625 emit_label (hi0_label
);
2627 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2630 temp
= expand_binop (word_mode
, add_optab
, temp
,
2631 gen_int_mode (GET_MODE_BITSIZE (word_mode
), word_mode
),
2632 result
, true, OPTAB_DIRECT
);
2636 convert_move (result
, temp
, true);
2638 emit_label (after_label
);
2639 convert_move (target
, result
, true);
2644 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2656 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2658 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2660 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2661 enum machine_mode wider_mode
;
2664 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2667 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2668 wider_mode
!= VOIDmode
;
2669 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2670 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2675 last
= get_last_insn ();
2677 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2678 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2680 gcc_assert (GET_MODE_PRECISION (wider_mode
) == GET_MODE_BITSIZE (wider_mode
)
2681 && GET_MODE_PRECISION (mode
) == GET_MODE_BITSIZE (mode
));
2683 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2684 GET_MODE_BITSIZE (wider_mode
)
2685 - GET_MODE_BITSIZE (mode
),
2691 target
= gen_reg_rtx (mode
);
2692 emit_move_insn (target
, gen_lowpart (mode
, x
));
2695 delete_insns_since (last
);
2700 /* Try calculating bswap as two bswaps of two word-sized operands. */
2703 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2707 t1
= expand_unop (word_mode
, bswap_optab
,
2708 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2709 t0
= expand_unop (word_mode
, bswap_optab
,
2710 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2712 if (target
== 0 || !valid_multiword_target_p (target
))
2713 target
= gen_reg_rtx (mode
);
2715 emit_clobber (target
);
2716 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2717 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2722 /* Try calculating (parity x) as (and (popcount x) 1), where
2723 popcount can also be done in a wider mode. */
2725 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2727 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2728 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2730 enum machine_mode wider_mode
;
2731 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2732 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2734 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2736 rtx xop0
, temp
, last
;
2738 last
= get_last_insn ();
2741 target
= gen_reg_rtx (mode
);
2742 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2743 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2746 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2747 target
, true, OPTAB_DIRECT
);
2749 delete_insns_since (last
);
2758 /* Try calculating ctz(x) as K - clz(x & -x) ,
2759 where K is GET_MODE_PRECISION(mode) - 1.
2761 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2762 don't have to worry about what the hardware does in that case. (If
2763 the clz instruction produces the usual value at 0, which is K, the
2764 result of this code sequence will be -1; expand_ffs, below, relies
2765 on this. It might be nice to have it be K instead, for consistency
2766 with the (very few) processors that provide a ctz with a defined
2767 value, but that would take one more instruction, and it would be
2768 less convenient for expand_ffs anyway. */
2771 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2775 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2780 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2782 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2783 true, OPTAB_DIRECT
);
2785 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2787 temp
= expand_binop (mode
, sub_optab
,
2788 gen_int_mode (GET_MODE_PRECISION (mode
) - 1, mode
),
2790 true, OPTAB_DIRECT
);
2800 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2806 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2807 else with the sequence used by expand_clz.
2809 The ffs builtin promises to return zero for a zero value and ctz/clz
2810 may have an undefined value in that case. If they do not give us a
2811 convenient value, we have to generate a test and branch. */
2813 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2815 HOST_WIDE_INT val
= 0;
2816 bool defined_at_zero
= false;
2819 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2823 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2827 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2829 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2832 temp
= expand_ctz (mode
, op0
, 0);
2836 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2838 defined_at_zero
= true;
2839 val
= (GET_MODE_PRECISION (mode
) - 1) - val
;
2845 if (defined_at_zero
&& val
== -1)
2846 /* No correction needed at zero. */;
2849 /* We don't try to do anything clever with the situation found
2850 on some processors (eg Alpha) where ctz(0:mode) ==
2851 bitsize(mode). If someone can think of a way to send N to -1
2852 and leave alone all values in the range 0..N-1 (where N is a
2853 power of two), cheaper than this test-and-branch, please add it.
2855 The test-and-branch is done after the operation itself, in case
2856 the operation sets condition codes that can be recycled for this.
2857 (This is true on i386, for instance.) */
2859 rtx nonzero_label
= gen_label_rtx ();
2860 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2861 mode
, true, nonzero_label
);
2863 convert_move (temp
, GEN_INT (-1), false);
2864 emit_label (nonzero_label
);
2867 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2868 to produce a value in the range 0..bitsize. */
2869 temp
= expand_binop (mode
, add_optab
, temp
, gen_int_mode (1, mode
),
2870 target
, false, OPTAB_DIRECT
);
2877 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2886 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2887 conditions, VAL may already be a SUBREG against which we cannot generate
2888 a further SUBREG. In this case, we expect forcing the value into a
2889 register will work around the situation. */
2892 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2893 enum machine_mode imode
)
2896 ret
= lowpart_subreg (omode
, val
, imode
);
2899 val
= force_reg (imode
, val
);
2900 ret
= lowpart_subreg (omode
, val
, imode
);
2901 gcc_assert (ret
!= NULL
);
2906 /* Expand a floating point absolute value or negation operation via a
2907 logical operation on the sign bit. */
2910 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2911 rtx op0
, rtx target
)
2913 const struct real_format
*fmt
;
2914 int bitpos
, word
, nwords
, i
;
2915 enum machine_mode imode
;
2918 /* The format has to have a simple sign bit. */
2919 fmt
= REAL_MODE_FORMAT (mode
);
2923 bitpos
= fmt
->signbit_rw
;
2927 /* Don't create negative zeros if the format doesn't support them. */
2928 if (code
== NEG
&& !fmt
->has_signed_zero
)
2931 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2933 imode
= int_mode_for_mode (mode
);
2934 if (imode
== BLKmode
)
2943 if (FLOAT_WORDS_BIG_ENDIAN
)
2944 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2946 word
= bitpos
/ BITS_PER_WORD
;
2947 bitpos
= bitpos
% BITS_PER_WORD
;
2948 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2951 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
2957 || (nwords
> 1 && !valid_multiword_target_p (target
)))
2958 target
= gen_reg_rtx (mode
);
2964 for (i
= 0; i
< nwords
; ++i
)
2966 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2967 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2971 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2973 immed_wide_int_const (mask
, imode
),
2974 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2975 if (temp
!= targ_piece
)
2976 emit_move_insn (targ_piece
, temp
);
2979 emit_move_insn (targ_piece
, op0_piece
);
2982 insns
= get_insns ();
2989 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2990 gen_lowpart (imode
, op0
),
2991 immed_wide_int_const (mask
, imode
),
2992 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2993 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2995 set_dst_reg_note (get_last_insn (), REG_EQUAL
,
2996 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)),
3003 /* As expand_unop, but will fail rather than attempt the operation in a
3004 different mode or with a libcall. */
3006 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3009 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
3011 struct expand_operand ops
[2];
3012 enum insn_code icode
= optab_handler (unoptab
, mode
);
3013 rtx last
= get_last_insn ();
3016 create_output_operand (&ops
[0], target
, mode
);
3017 create_convert_operand_from (&ops
[1], op0
, mode
, unsignedp
);
3018 pat
= maybe_gen_insn (icode
, 2, ops
);
3021 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3022 && ! add_equal_note (pat
, ops
[0].value
, optab_to_code (unoptab
),
3023 ops
[1].value
, NULL_RTX
))
3025 delete_insns_since (last
);
3026 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3031 return ops
[0].value
;
3037 /* Generate code to perform an operation specified by UNOPTAB
3038 on operand OP0, with result having machine-mode MODE.
3040 UNSIGNEDP is for the case where we have to widen the operands
3041 to perform the operation. It says to use zero-extension.
3043 If TARGET is nonzero, the value
3044 is generated there, if it is convenient to do so.
3045 In all cases an rtx is returned for the locus of the value;
3046 this may or may not be TARGET. */
3049 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3052 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3053 enum machine_mode wider_mode
;
3057 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3061 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3063 /* Widening (or narrowing) clz needs special treatment. */
3064 if (unoptab
== clz_optab
)
3066 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3070 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3071 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3073 temp
= expand_doubleword_clz (mode
, op0
, target
);
3081 if (unoptab
== clrsb_optab
)
3083 temp
= widen_leading (mode
, op0
, target
, unoptab
);
3089 /* Widening (or narrowing) bswap needs special treatment. */
3090 if (unoptab
== bswap_optab
)
3092 /* HImode is special because in this mode BSWAP is equivalent to ROTATE
3093 or ROTATERT. First try these directly; if this fails, then try the
3094 obvious pair of shifts with allowed widening, as this will probably
3095 be always more efficient than the other fallback methods. */
3098 rtx last
, temp1
, temp2
;
3100 if (optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
)
3102 temp
= expand_binop (mode
, rotl_optab
, op0
, GEN_INT (8), target
,
3103 unsignedp
, OPTAB_DIRECT
);
3108 if (optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
3110 temp
= expand_binop (mode
, rotr_optab
, op0
, GEN_INT (8), target
,
3111 unsignedp
, OPTAB_DIRECT
);
3116 last
= get_last_insn ();
3118 temp1
= expand_binop (mode
, ashl_optab
, op0
, GEN_INT (8), NULL_RTX
,
3119 unsignedp
, OPTAB_WIDEN
);
3120 temp2
= expand_binop (mode
, lshr_optab
, op0
, GEN_INT (8), NULL_RTX
,
3121 unsignedp
, OPTAB_WIDEN
);
3124 temp
= expand_binop (mode
, ior_optab
, temp1
, temp2
, target
,
3125 unsignedp
, OPTAB_WIDEN
);
3130 delete_insns_since (last
);
3133 temp
= widen_bswap (mode
, op0
, target
);
3137 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3138 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3140 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3148 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3149 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3150 wider_mode
!= VOIDmode
;
3151 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3153 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3156 rtx last
= get_last_insn ();
3158 /* For certain operations, we need not actually extend
3159 the narrow operand, as long as we will truncate the
3160 results to the same narrowness. */
3162 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3163 (unoptab
== neg_optab
3164 || unoptab
== one_cmpl_optab
)
3165 && mclass
== MODE_INT
);
3167 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3172 if (mclass
!= MODE_INT
3173 || !TRULY_NOOP_TRUNCATION_MODES_P (mode
, wider_mode
))
3176 target
= gen_reg_rtx (mode
);
3177 convert_move (target
, temp
, 0);
3181 return gen_lowpart (mode
, temp
);
3184 delete_insns_since (last
);
3188 /* These can be done a word at a time. */
3189 if (unoptab
== one_cmpl_optab
3190 && mclass
== MODE_INT
3191 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3192 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3197 if (target
== 0 || target
== op0
|| !valid_multiword_target_p (target
))
3198 target
= gen_reg_rtx (mode
);
3202 /* Do the actual arithmetic. */
3203 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3205 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3206 rtx x
= expand_unop (word_mode
, unoptab
,
3207 operand_subword_force (op0
, i
, mode
),
3208 target_piece
, unsignedp
);
3210 if (target_piece
!= x
)
3211 emit_move_insn (target_piece
, x
);
3214 insns
= get_insns ();
3221 if (optab_to_code (unoptab
) == NEG
)
3223 /* Try negating floating point values by flipping the sign bit. */
3224 if (SCALAR_FLOAT_MODE_P (mode
))
3226 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3231 /* If there is no negation pattern, and we have no negative zero,
3232 try subtracting from zero. */
3233 if (!HONOR_SIGNED_ZEROS (mode
))
3235 temp
= expand_binop (mode
, (unoptab
== negv_optab
3236 ? subv_optab
: sub_optab
),
3237 CONST0_RTX (mode
), op0
, target
,
3238 unsignedp
, OPTAB_DIRECT
);
3244 /* Try calculating parity (x) as popcount (x) % 2. */
3245 if (unoptab
== parity_optab
)
3247 temp
= expand_parity (mode
, op0
, target
);
3252 /* Try implementing ffs (x) in terms of clz (x). */
3253 if (unoptab
== ffs_optab
)
3255 temp
= expand_ffs (mode
, op0
, target
);
3260 /* Try implementing ctz (x) in terms of clz (x). */
3261 if (unoptab
== ctz_optab
)
3263 temp
= expand_ctz (mode
, op0
, target
);
3269 /* Now try a library call in this mode. */
3270 libfunc
= optab_libfunc (unoptab
, mode
);
3276 enum machine_mode outmode
= mode
;
3278 /* All of these functions return small values. Thus we choose to
3279 have them return something that isn't a double-word. */
3280 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3281 || unoptab
== clrsb_optab
|| unoptab
== popcount_optab
3282 || unoptab
== parity_optab
)
3284 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3285 optab_libfunc (unoptab
, mode
)));
3289 /* Pass 1 for NO_QUEUE so we don't lose any increments
3290 if the libcall is cse'd or moved. */
3291 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3293 insns
= get_insns ();
3296 target
= gen_reg_rtx (outmode
);
3297 eq_value
= gen_rtx_fmt_e (optab_to_code (unoptab
), mode
, op0
);
3298 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3299 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3300 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3301 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3302 emit_libcall_block_1 (insns
, target
, value
, eq_value
,
3303 trapv_unoptab_p (unoptab
));
3308 /* It can't be done in this mode. Can we do it in a wider mode? */
3310 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3312 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3313 wider_mode
!= VOIDmode
;
3314 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3316 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3317 || optab_libfunc (unoptab
, wider_mode
))
3320 rtx last
= get_last_insn ();
3322 /* For certain operations, we need not actually extend
3323 the narrow operand, as long as we will truncate the
3324 results to the same narrowness. */
3325 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3326 (unoptab
== neg_optab
3327 || unoptab
== one_cmpl_optab
3328 || unoptab
== bswap_optab
)
3329 && mclass
== MODE_INT
);
3331 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3334 /* If we are generating clz using wider mode, adjust the
3335 result. Similarly for clrsb. */
3336 if ((unoptab
== clz_optab
|| unoptab
== clrsb_optab
)
3339 (wider_mode
, sub_optab
, temp
,
3340 gen_int_mode (GET_MODE_PRECISION (wider_mode
)
3341 - GET_MODE_PRECISION (mode
),
3343 target
, true, OPTAB_DIRECT
);
3345 /* Likewise for bswap. */
3346 if (unoptab
== bswap_optab
&& temp
!= 0)
3348 gcc_assert (GET_MODE_PRECISION (wider_mode
)
3349 == GET_MODE_BITSIZE (wider_mode
)
3350 && GET_MODE_PRECISION (mode
)
3351 == GET_MODE_BITSIZE (mode
));
3353 temp
= expand_shift (RSHIFT_EXPR
, wider_mode
, temp
,
3354 GET_MODE_BITSIZE (wider_mode
)
3355 - GET_MODE_BITSIZE (mode
),
3361 if (mclass
!= MODE_INT
)
3364 target
= gen_reg_rtx (mode
);
3365 convert_move (target
, temp
, 0);
3369 return gen_lowpart (mode
, temp
);
3372 delete_insns_since (last
);
3377 /* One final attempt at implementing negation via subtraction,
3378 this time allowing widening of the operand. */
3379 if (optab_to_code (unoptab
) == NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3382 temp
= expand_binop (mode
,
3383 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3384 CONST0_RTX (mode
), op0
,
3385 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3393 /* Emit code to compute the absolute value of OP0, with result to
3394 TARGET if convenient. (TARGET may be 0.) The return value says
3395 where the result actually is to be found.
3397 MODE is the mode of the operand; the mode of the result is
3398 different but can be deduced from MODE.
3403 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3404 int result_unsignedp
)
3408 if (GET_MODE_CLASS (mode
) != MODE_INT
3410 result_unsignedp
= 1;
3412 /* First try to do it with a special abs instruction. */
3413 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3418 /* For floating point modes, try clearing the sign bit. */
3419 if (SCALAR_FLOAT_MODE_P (mode
))
3421 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3426 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3427 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3428 && !HONOR_SIGNED_ZEROS (mode
))
3430 rtx last
= get_last_insn ();
3432 temp
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3435 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3441 delete_insns_since (last
);
3444 /* If this machine has expensive jumps, we can do integer absolute
3445 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3446 where W is the width of MODE. */
3448 if (GET_MODE_CLASS (mode
) == MODE_INT
3449 && BRANCH_COST (optimize_insn_for_speed_p (),
3452 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3453 GET_MODE_PRECISION (mode
) - 1,
3456 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3459 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3460 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3470 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3471 int result_unsignedp
, int safe
)
3475 if (GET_MODE_CLASS (mode
) != MODE_INT
3477 result_unsignedp
= 1;
3479 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3483 /* If that does not win, use conditional jump and negate. */
3485 /* It is safe to use the target if it is the same
3486 as the source if this is also a pseudo register */
3487 if (op0
== target
&& REG_P (op0
)
3488 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3491 op1
= gen_label_rtx ();
3492 if (target
== 0 || ! safe
3493 || GET_MODE (target
) != mode
3494 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3496 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3497 target
= gen_reg_rtx (mode
);
3499 emit_move_insn (target
, op0
);
3502 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3503 NULL_RTX
, NULL_RTX
, op1
, -1);
3505 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3508 emit_move_insn (target
, op0
);
3514 /* Emit code to compute the one's complement absolute value of OP0
3515 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3516 (TARGET may be NULL_RTX.) The return value says where the result
3517 actually is to be found.
3519 MODE is the mode of the operand; the mode of the result is
3520 different but can be deduced from MODE. */
3523 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3527 /* Not applicable for floating point modes. */
3528 if (FLOAT_MODE_P (mode
))
3531 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3532 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3534 rtx last
= get_last_insn ();
3536 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3538 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3544 delete_insns_since (last
);
3547 /* If this machine has expensive jumps, we can do one's complement
3548 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3550 if (GET_MODE_CLASS (mode
) == MODE_INT
3551 && BRANCH_COST (optimize_insn_for_speed_p (),
3554 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3555 GET_MODE_PRECISION (mode
) - 1,
3558 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3568 /* A subroutine of expand_copysign, perform the copysign operation using the
3569 abs and neg primitives advertised to exist on the target. The assumption
3570 is that we have a split register file, and leaving op0 in fp registers,
3571 and not playing with subregs so much, will help the register allocator. */
3574 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3575 int bitpos
, bool op0_is_abs
)
3577 enum machine_mode imode
;
3578 enum insn_code icode
;
3584 /* Check if the back end provides an insn that handles signbit for the
3586 icode
= optab_handler (signbit_optab
, mode
);
3587 if (icode
!= CODE_FOR_nothing
)
3589 imode
= insn_data
[(int) icode
].operand
[0].mode
;
3590 sign
= gen_reg_rtx (imode
);
3591 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3595 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3597 imode
= int_mode_for_mode (mode
);
3598 if (imode
== BLKmode
)
3600 op1
= gen_lowpart (imode
, op1
);
3607 if (FLOAT_WORDS_BIG_ENDIAN
)
3608 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3610 word
= bitpos
/ BITS_PER_WORD
;
3611 bitpos
= bitpos
% BITS_PER_WORD
;
3612 op1
= operand_subword_force (op1
, word
, mode
);
3615 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
3616 sign
= expand_binop (imode
, and_optab
, op1
,
3617 immed_wide_int_const (mask
, imode
),
3618 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3623 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3630 if (target
== NULL_RTX
)
3631 target
= copy_to_reg (op0
);
3633 emit_move_insn (target
, op0
);
3636 label
= gen_label_rtx ();
3637 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3639 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3640 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3642 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3644 emit_move_insn (target
, op0
);
3652 /* A subroutine of expand_copysign, perform the entire copysign operation
3653 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3654 is true if op0 is known to have its sign bit clear. */
3657 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3658 int bitpos
, bool op0_is_abs
)
3660 enum machine_mode imode
;
3661 int word
, nwords
, i
;
3664 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3666 imode
= int_mode_for_mode (mode
);
3667 if (imode
== BLKmode
)
3676 if (FLOAT_WORDS_BIG_ENDIAN
)
3677 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3679 word
= bitpos
/ BITS_PER_WORD
;
3680 bitpos
= bitpos
% BITS_PER_WORD
;
3681 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3684 wide_int mask
= wi::set_bit_in_zero (bitpos
, GET_MODE_PRECISION (imode
));
3689 || (nwords
> 1 && !valid_multiword_target_p (target
)))
3690 target
= gen_reg_rtx (mode
);
3696 for (i
= 0; i
< nwords
; ++i
)
3698 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3699 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3705 = expand_binop (imode
, and_optab
, op0_piece
,
3706 immed_wide_int_const (~mask
, imode
),
3707 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3708 op1
= expand_binop (imode
, and_optab
,
3709 operand_subword_force (op1
, i
, mode
),
3710 immed_wide_int_const (mask
, imode
),
3711 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3713 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3714 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3715 if (temp
!= targ_piece
)
3716 emit_move_insn (targ_piece
, temp
);
3719 emit_move_insn (targ_piece
, op0_piece
);
3722 insns
= get_insns ();
3729 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3730 immed_wide_int_const (mask
, imode
),
3731 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3733 op0
= gen_lowpart (imode
, op0
);
3735 op0
= expand_binop (imode
, and_optab
, op0
,
3736 immed_wide_int_const (~mask
, imode
),
3737 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3739 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3740 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3741 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3747 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3748 scalar floating point mode. Return NULL if we do not know how to
3749 expand the operation inline. */
3752 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3754 enum machine_mode mode
= GET_MODE (op0
);
3755 const struct real_format
*fmt
;
3759 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3760 gcc_assert (GET_MODE (op1
) == mode
);
3762 /* First try to do it with a special instruction. */
3763 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3764 target
, 0, OPTAB_DIRECT
);
3768 fmt
= REAL_MODE_FORMAT (mode
);
3769 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3773 if (CONST_DOUBLE_AS_FLOAT_P (op0
))
3775 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3776 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3780 if (fmt
->signbit_ro
>= 0
3781 && (CONST_DOUBLE_AS_FLOAT_P (op0
)
3782 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3783 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3785 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3786 fmt
->signbit_ro
, op0_is_abs
);
3791 if (fmt
->signbit_rw
< 0)
3793 return expand_copysign_bit (mode
, op0
, op1
, target
,
3794 fmt
->signbit_rw
, op0_is_abs
);
3797 /* Generate an instruction whose insn-code is INSN_CODE,
3798 with two operands: an output TARGET and an input OP0.
3799 TARGET *must* be nonzero, and the output is always stored there.
3800 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3801 the value that is stored into TARGET.
3803 Return false if expansion failed. */
3806 maybe_emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
,
3809 struct expand_operand ops
[2];
3812 create_output_operand (&ops
[0], target
, GET_MODE (target
));
3813 create_input_operand (&ops
[1], op0
, GET_MODE (op0
));
3814 pat
= maybe_gen_insn (icode
, 2, ops
);
3818 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3819 add_equal_note (pat
, ops
[0].value
, code
, ops
[1].value
, NULL_RTX
);
3823 if (ops
[0].value
!= target
)
3824 emit_move_insn (target
, ops
[0].value
);
3827 /* Generate an instruction whose insn-code is INSN_CODE,
3828 with two operands: an output TARGET and an input OP0.
3829 TARGET *must* be nonzero, and the output is always stored there.
3830 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3831 the value that is stored into TARGET. */
3834 emit_unop_insn (enum insn_code icode
, rtx target
, rtx op0
, enum rtx_code code
)
3836 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3840 struct no_conflict_data
3842 rtx target
, first
, insn
;
3846 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3847 the currently examined clobber / store has to stay in the list of
3848 insns that constitute the actual libcall block. */
3850 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3852 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3854 /* If this inns directly contributes to setting the target, it must stay. */
3855 if (reg_overlap_mentioned_p (p
->target
, dest
))
3856 p
->must_stay
= true;
3857 /* If we haven't committed to keeping any other insns in the list yet,
3858 there is nothing more to check. */
3859 else if (p
->insn
== p
->first
)
3861 /* If this insn sets / clobbers a register that feeds one of the insns
3862 already in the list, this insn has to stay too. */
3863 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3864 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3865 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3866 /* Likewise if this insn depends on a register set by a previous
3867 insn in the list, or if it sets a result (presumably a hard
3868 register) that is set or clobbered by a previous insn.
3869 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3870 SET_DEST perform the former check on the address, and the latter
3871 check on the MEM. */
3872 || (GET_CODE (set
) == SET
3873 && (modified_in_p (SET_SRC (set
), p
->first
)
3874 || modified_in_p (SET_DEST (set
), p
->first
)
3875 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3876 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3877 p
->must_stay
= true;
3881 /* Emit code to make a call to a constant function or a library call.
3883 INSNS is a list containing all insns emitted in the call.
3884 These insns leave the result in RESULT. Our block is to copy RESULT
3885 to TARGET, which is logically equivalent to EQUIV.
3887 We first emit any insns that set a pseudo on the assumption that these are
3888 loading constants into registers; doing so allows them to be safely cse'ed
3889 between blocks. Then we emit all the other insns in the block, followed by
3890 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3891 note with an operand of EQUIV. */
3894 emit_libcall_block_1 (rtx insns
, rtx target
, rtx result
, rtx equiv
,
3895 bool equiv_may_trap
)
3897 rtx final_dest
= target
;
3898 rtx next
, last
, insn
;
3900 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3901 into a MEM later. Protect the libcall block from this change. */
3902 if (! REG_P (target
) || REG_USERVAR_P (target
))
3903 target
= gen_reg_rtx (GET_MODE (target
));
3905 /* If we're using non-call exceptions, a libcall corresponding to an
3906 operation that may trap may also trap. */
3907 /* ??? See the comment in front of make_reg_eh_region_note. */
3908 if (cfun
->can_throw_non_call_exceptions
3909 && (equiv_may_trap
|| may_trap_p (equiv
)))
3911 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3914 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3917 int lp_nr
= INTVAL (XEXP (note
, 0));
3918 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3919 remove_note (insn
, note
);
3925 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3926 reg note to indicate that this call cannot throw or execute a nonlocal
3927 goto (unless there is already a REG_EH_REGION note, in which case
3929 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3931 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3934 /* First emit all insns that set pseudos. Remove them from the list as
3935 we go. Avoid insns that set pseudos which were referenced in previous
3936 insns. These can be generated by move_by_pieces, for example,
3937 to update an address. Similarly, avoid insns that reference things
3938 set in previous insns. */
3940 for (insn
= insns
; insn
; insn
= next
)
3942 rtx set
= single_set (insn
);
3944 next
= NEXT_INSN (insn
);
3946 if (set
!= 0 && REG_P (SET_DEST (set
))
3947 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3949 struct no_conflict_data data
;
3951 data
.target
= const0_rtx
;
3955 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3956 if (! data
.must_stay
)
3958 if (PREV_INSN (insn
))
3959 NEXT_INSN (PREV_INSN (insn
)) = next
;
3964 PREV_INSN (next
) = PREV_INSN (insn
);
3970 /* Some ports use a loop to copy large arguments onto the stack.
3971 Don't move anything outside such a loop. */
3976 /* Write the remaining insns followed by the final copy. */
3977 for (insn
= insns
; insn
; insn
= next
)
3979 next
= NEXT_INSN (insn
);
3984 last
= emit_move_insn (target
, result
);
3985 set_dst_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
), target
);
3987 if (final_dest
!= target
)
3988 emit_move_insn (final_dest
, target
);
3992 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3994 emit_libcall_block_1 (insns
, target
, result
, equiv
, false);
3997 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3998 PURPOSE describes how this comparison will be used. CODE is the rtx
3999 comparison code we will be using.
4001 ??? Actually, CODE is slightly weaker than that. A target is still
4002 required to implement all of the normal bcc operations, but not
4003 required to implement all (or any) of the unordered bcc operations. */
4006 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
4007 enum can_compare_purpose purpose
)
4010 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
4013 enum insn_code icode
;
4015 if (purpose
== ccp_jump
4016 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
4017 && insn_operand_matches (icode
, 0, test
))
4019 if (purpose
== ccp_store_flag
4020 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
4021 && insn_operand_matches (icode
, 1, test
))
4023 if (purpose
== ccp_cmov
4024 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
4027 mode
= GET_MODE_WIDER_MODE (mode
);
4028 PUT_MODE (test
, mode
);
4030 while (mode
!= VOIDmode
);
4035 /* This function is called when we are going to emit a compare instruction that
4036 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
4038 *PMODE is the mode of the inputs (in case they are const_int).
4039 *PUNSIGNEDP nonzero says that the operands are unsigned;
4040 this matters if they need to be widened (as given by METHODS).
4042 If they have mode BLKmode, then SIZE specifies the size of both operands.
4044 This function performs all the setup necessary so that the caller only has
4045 to emit a single comparison insn. This setup can involve doing a BLKmode
4046 comparison or emitting a library call to perform the comparison if no insn
4047 is available to handle it.
4048 The values which are passed in through pointers can be modified; the caller
4049 should perform the comparison on the modified values. Constant
4050 comparisons must have already been folded. */
4053 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4054 int unsignedp
, enum optab_methods methods
,
4055 rtx
*ptest
, enum machine_mode
*pmode
)
4057 enum machine_mode mode
= *pmode
;
4059 enum machine_mode cmp_mode
;
4060 enum mode_class mclass
;
4062 /* The other methods are not needed. */
4063 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
4064 || methods
== OPTAB_LIB_WIDEN
);
4066 /* If we are optimizing, force expensive constants into a register. */
4067 if (CONSTANT_P (x
) && optimize
4068 && (rtx_cost (x
, COMPARE
, 0, optimize_insn_for_speed_p ())
4069 > COSTS_N_INSNS (1)))
4070 x
= force_reg (mode
, x
);
4072 if (CONSTANT_P (y
) && optimize
4073 && (rtx_cost (y
, COMPARE
, 1, optimize_insn_for_speed_p ())
4074 > COSTS_N_INSNS (1)))
4075 y
= force_reg (mode
, y
);
4078 /* Make sure if we have a canonical comparison. The RTL
4079 documentation states that canonical comparisons are required only
4080 for targets which have cc0. */
4081 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4084 /* Don't let both operands fail to indicate the mode. */
4085 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4086 x
= force_reg (mode
, x
);
4087 if (mode
== VOIDmode
)
4088 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4090 /* Handle all BLKmode compares. */
4092 if (mode
== BLKmode
)
4094 enum machine_mode result_mode
;
4095 enum insn_code cmp_code
;
4100 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4104 /* Try to use a memory block compare insn - either cmpstr
4105 or cmpmem will do. */
4106 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4107 cmp_mode
!= VOIDmode
;
4108 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4110 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4111 if (cmp_code
== CODE_FOR_nothing
)
4112 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4113 if (cmp_code
== CODE_FOR_nothing
)
4114 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4115 if (cmp_code
== CODE_FOR_nothing
)
4118 /* Must make sure the size fits the insn's mode. */
4119 if ((CONST_INT_P (size
)
4120 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4121 || (GET_MODE_BITSIZE (GET_MODE (size
))
4122 > GET_MODE_BITSIZE (cmp_mode
)))
4125 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4126 result
= gen_reg_rtx (result_mode
);
4127 size
= convert_to_mode (cmp_mode
, size
, 1);
4128 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4130 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4131 *pmode
= result_mode
;
4135 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4138 /* Otherwise call a library function, memcmp. */
4139 libfunc
= memcmp_libfunc
;
4140 length_type
= sizetype
;
4141 result_mode
= TYPE_MODE (integer_type_node
);
4142 cmp_mode
= TYPE_MODE (length_type
);
4143 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4144 TYPE_UNSIGNED (length_type
));
4146 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4154 methods
= OPTAB_LIB_WIDEN
;
4158 /* Don't allow operands to the compare to trap, as that can put the
4159 compare and branch in different basic blocks. */
4160 if (cfun
->can_throw_non_call_exceptions
)
4163 x
= force_reg (mode
, x
);
4165 y
= force_reg (mode
, y
);
4168 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4170 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4171 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4175 mclass
= GET_MODE_CLASS (mode
);
4176 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4180 enum insn_code icode
;
4181 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4182 if (icode
!= CODE_FOR_nothing
4183 && insn_operand_matches (icode
, 0, test
))
4185 rtx last
= get_last_insn ();
4186 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4187 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4189 && insn_operand_matches (icode
, 1, op0
)
4190 && insn_operand_matches (icode
, 2, op1
))
4192 XEXP (test
, 0) = op0
;
4193 XEXP (test
, 1) = op1
;
4198 delete_insns_since (last
);
4201 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4203 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4205 while (cmp_mode
!= VOIDmode
);
4207 if (methods
!= OPTAB_LIB_WIDEN
)
4210 if (!SCALAR_FLOAT_MODE_P (mode
))
4213 enum machine_mode ret_mode
;
4215 /* Handle a libcall just for the mode we are using. */
4216 libfunc
= optab_libfunc (cmp_optab
, mode
);
4217 gcc_assert (libfunc
);
4219 /* If we want unsigned, and this mode has a distinct unsigned
4220 comparison routine, use that. */
4223 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4228 ret_mode
= targetm
.libgcc_cmp_return_mode ();
4229 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4230 ret_mode
, 2, x
, mode
, y
, mode
);
4232 /* There are two kinds of comparison routines. Biased routines
4233 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4234 of gcc expect that the comparison operation is equivalent
4235 to the modified comparison. For signed comparisons compare the
4236 result against 1 in the biased case, and zero in the unbiased
4237 case. For unsigned comparisons always compare against 1 after
4238 biasing the unbiased result by adding 1. This gives us a way to
4240 The comparisons in the fixed-point helper library are always
4245 if (!TARGET_LIB_INT_CMP_BIASED
&& !ALL_FIXED_POINT_MODE_P (mode
))
4248 x
= plus_constant (ret_mode
, result
, 1);
4254 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4258 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4266 /* Before emitting an insn with code ICODE, make sure that X, which is going
4267 to be used for operand OPNUM of the insn, is converted from mode MODE to
4268 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4269 that it is accepted by the operand predicate. Return the new value. */
4272 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, enum machine_mode mode
,
4273 enum machine_mode wider_mode
, int unsignedp
)
4275 if (mode
!= wider_mode
)
4276 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4278 if (!insn_operand_matches (icode
, opnum
, x
))
4280 if (reload_completed
)
4282 x
= copy_to_mode_reg (insn_data
[(int) icode
].operand
[opnum
].mode
, x
);
4288 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4289 we can do the branch. */
4292 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
, int prob
)
4294 enum machine_mode optab_mode
;
4295 enum mode_class mclass
;
4296 enum insn_code icode
;
4299 mclass
= GET_MODE_CLASS (mode
);
4300 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4301 icode
= optab_handler (cbranch_optab
, optab_mode
);
4303 gcc_assert (icode
!= CODE_FOR_nothing
);
4304 gcc_assert (insn_operand_matches (icode
, 0, test
));
4305 insn
= emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0),
4306 XEXP (test
, 1), label
));
4308 && profile_status_for_fn (cfun
) != PROFILE_ABSENT
4311 && any_condjump_p (insn
)
4312 && !find_reg_note (insn
, REG_BR_PROB
, 0))
4313 add_int_reg_note (insn
, REG_BR_PROB
, prob
);
4316 /* Generate code to compare X with Y so that the condition codes are
4317 set and to jump to LABEL if the condition is true. If X is a
4318 constant and Y is not a constant, then the comparison is swapped to
4319 ensure that the comparison RTL has the canonical form.
4321 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4322 need to be widened. UNSIGNEDP is also used to select the proper
4323 branch condition code.
4325 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4327 MODE is the mode of the inputs (in case they are const_int).
4329 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4330 It will be potentially converted into an unsigned variant based on
4331 UNSIGNEDP to select a proper jump instruction.
4333 PROB is the probability of jumping to LABEL. */
4336 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4337 enum machine_mode mode
, int unsignedp
, rtx label
,
4340 rtx op0
= x
, op1
= y
;
4343 /* Swap operands and condition to ensure canonical RTL. */
4344 if (swap_commutative_operands_p (x
, y
)
4345 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4348 comparison
= swap_condition (comparison
);
4351 /* If OP0 is still a constant, then both X and Y must be constants
4352 or the opposite comparison is not supported. Force X into a register
4353 to create canonical RTL. */
4354 if (CONSTANT_P (op0
))
4355 op0
= force_reg (mode
, op0
);
4358 comparison
= unsigned_condition (comparison
);
4360 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4362 emit_cmp_and_jump_insn_1 (test
, mode
, label
, prob
);
4366 /* Emit a library call comparison between floating point X and Y.
4367 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4370 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4371 rtx
*ptest
, enum machine_mode
*pmode
)
4373 enum rtx_code swapped
= swap_condition (comparison
);
4374 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4375 enum machine_mode orig_mode
= GET_MODE (x
);
4376 enum machine_mode mode
, cmp_mode
;
4377 rtx true_rtx
, false_rtx
;
4378 rtx value
, target
, insns
, equiv
;
4380 bool reversed_p
= false;
4381 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4383 for (mode
= orig_mode
;
4385 mode
= GET_MODE_WIDER_MODE (mode
))
4387 if (code_to_optab (comparison
)
4388 && (libfunc
= optab_libfunc (code_to_optab (comparison
), mode
)))
4391 if (code_to_optab (swapped
)
4392 && (libfunc
= optab_libfunc (code_to_optab (swapped
), mode
)))
4395 tmp
= x
; x
= y
; y
= tmp
;
4396 comparison
= swapped
;
4400 if (code_to_optab (reversed
)
4401 && (libfunc
= optab_libfunc (code_to_optab (reversed
), mode
)))
4403 comparison
= reversed
;
4409 gcc_assert (mode
!= VOIDmode
);
4411 if (mode
!= orig_mode
)
4413 x
= convert_to_mode (mode
, x
, 0);
4414 y
= convert_to_mode (mode
, y
, 0);
4417 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4418 the RTL. The allows the RTL optimizers to delete the libcall if the
4419 condition can be determined at compile-time. */
4420 if (comparison
== UNORDERED
4421 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4423 true_rtx
= const_true_rtx
;
4424 false_rtx
= const0_rtx
;
4431 true_rtx
= const0_rtx
;
4432 false_rtx
= const_true_rtx
;
4436 true_rtx
= const_true_rtx
;
4437 false_rtx
= const0_rtx
;
4441 true_rtx
= const1_rtx
;
4442 false_rtx
= const0_rtx
;
4446 true_rtx
= const0_rtx
;
4447 false_rtx
= constm1_rtx
;
4451 true_rtx
= constm1_rtx
;
4452 false_rtx
= const0_rtx
;
4456 true_rtx
= const0_rtx
;
4457 false_rtx
= const1_rtx
;
4465 if (comparison
== UNORDERED
)
4467 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4468 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4469 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4470 temp
, const_true_rtx
, equiv
);
4474 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4475 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4476 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4477 equiv
, true_rtx
, false_rtx
);
4481 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4482 cmp_mode
, 2, x
, mode
, y
, mode
);
4483 insns
= get_insns ();
4486 target
= gen_reg_rtx (cmp_mode
);
4487 emit_libcall_block (insns
, target
, value
, equiv
);
4489 if (comparison
== UNORDERED
4490 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4492 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4494 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4499 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4502 emit_indirect_jump (rtx loc
)
4504 struct expand_operand ops
[1];
4506 create_address_operand (&ops
[0], loc
);
4507 expand_jump_insn (CODE_FOR_indirect_jump
, 1, ops
);
4511 #ifdef HAVE_conditional_move
4513 /* Emit a conditional move instruction if the machine supports one for that
4514 condition and machine mode.
4516 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4517 the mode to use should they be constants. If it is VOIDmode, they cannot
4520 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4521 should be stored there. MODE is the mode to use should they be constants.
4522 If it is VOIDmode, they cannot both be constants.
4524 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4525 is not supported. */
4528 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4529 enum machine_mode cmode
, rtx op2
, rtx op3
,
4530 enum machine_mode mode
, int unsignedp
)
4532 rtx tem
, comparison
, last
;
4533 enum insn_code icode
;
4534 enum rtx_code reversed
;
4536 /* If one operand is constant, make it the second one. Only do this
4537 if the other operand is not constant as well. */
4539 if (swap_commutative_operands_p (op0
, op1
))
4544 code
= swap_condition (code
);
4547 /* get_condition will prefer to generate LT and GT even if the old
4548 comparison was against zero, so undo that canonicalization here since
4549 comparisons against zero are cheaper. */
4550 if (code
== LT
&& op1
== const1_rtx
)
4551 code
= LE
, op1
= const0_rtx
;
4552 else if (code
== GT
&& op1
== constm1_rtx
)
4553 code
= GE
, op1
= const0_rtx
;
4555 if (cmode
== VOIDmode
)
4556 cmode
= GET_MODE (op0
);
4558 if (swap_commutative_operands_p (op2
, op3
)
4559 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4568 if (mode
== VOIDmode
)
4569 mode
= GET_MODE (op2
);
4571 icode
= direct_optab_handler (movcc_optab
, mode
);
4573 if (icode
== CODE_FOR_nothing
)
4577 target
= gen_reg_rtx (mode
);
4579 code
= unsignedp
? unsigned_condition (code
) : code
;
4580 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4582 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4583 return NULL and let the caller figure out how best to deal with this
4585 if (!COMPARISON_P (comparison
))
4588 saved_pending_stack_adjust save
;
4589 save_pending_stack_adjust (&save
);
4590 last
= get_last_insn ();
4591 do_pending_stack_adjust ();
4592 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4593 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4594 &comparison
, &cmode
);
4597 struct expand_operand ops
[4];
4599 create_output_operand (&ops
[0], target
, mode
);
4600 create_fixed_operand (&ops
[1], comparison
);
4601 create_input_operand (&ops
[2], op2
, mode
);
4602 create_input_operand (&ops
[3], op3
, mode
);
4603 if (maybe_expand_insn (icode
, 4, ops
))
4605 if (ops
[0].value
!= target
)
4606 convert_move (target
, ops
[0].value
, false);
4610 delete_insns_since (last
);
4611 restore_pending_stack_adjust (&save
);
4615 /* Return nonzero if a conditional move of mode MODE is supported.
4617 This function is for combine so it can tell whether an insn that looks
4618 like a conditional move is actually supported by the hardware. If we
4619 guess wrong we lose a bit on optimization, but that's it. */
4620 /* ??? sparc64 supports conditionally moving integers values based on fp
4621 comparisons, and vice versa. How do we handle them? */
4624 can_conditionally_move_p (enum machine_mode mode
)
4626 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4632 #endif /* HAVE_conditional_move */
4634 /* Emit a conditional addition instruction if the machine supports one for that
4635 condition and machine mode.
4637 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4638 the mode to use should they be constants. If it is VOIDmode, they cannot
4641 OP2 should be stored in TARGET if the comparison is false, otherwise OP2+OP3
4642 should be stored there. MODE is the mode to use should they be constants.
4643 If it is VOIDmode, they cannot both be constants.
4645 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4646 is not supported. */
4649 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4650 enum machine_mode cmode
, rtx op2
, rtx op3
,
4651 enum machine_mode mode
, int unsignedp
)
4653 rtx tem
, comparison
, last
;
4654 enum insn_code icode
;
4656 /* If one operand is constant, make it the second one. Only do this
4657 if the other operand is not constant as well. */
4659 if (swap_commutative_operands_p (op0
, op1
))
4664 code
= swap_condition (code
);
4667 /* get_condition will prefer to generate LT and GT even if the old
4668 comparison was against zero, so undo that canonicalization here since
4669 comparisons against zero are cheaper. */
4670 if (code
== LT
&& op1
== const1_rtx
)
4671 code
= LE
, op1
= const0_rtx
;
4672 else if (code
== GT
&& op1
== constm1_rtx
)
4673 code
= GE
, op1
= const0_rtx
;
4675 if (cmode
== VOIDmode
)
4676 cmode
= GET_MODE (op0
);
4678 if (mode
== VOIDmode
)
4679 mode
= GET_MODE (op2
);
4681 icode
= optab_handler (addcc_optab
, mode
);
4683 if (icode
== CODE_FOR_nothing
)
4687 target
= gen_reg_rtx (mode
);
4689 code
= unsignedp
? unsigned_condition (code
) : code
;
4690 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4692 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4693 return NULL and let the caller figure out how best to deal with this
4695 if (!COMPARISON_P (comparison
))
4698 do_pending_stack_adjust ();
4699 last
= get_last_insn ();
4700 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4701 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4702 &comparison
, &cmode
);
4705 struct expand_operand ops
[4];
4707 create_output_operand (&ops
[0], target
, mode
);
4708 create_fixed_operand (&ops
[1], comparison
);
4709 create_input_operand (&ops
[2], op2
, mode
);
4710 create_input_operand (&ops
[3], op3
, mode
);
4711 if (maybe_expand_insn (icode
, 4, ops
))
4713 if (ops
[0].value
!= target
)
4714 convert_move (target
, ops
[0].value
, false);
4718 delete_insns_since (last
);
4722 /* These functions attempt to generate an insn body, rather than
4723 emitting the insn, but if the gen function already emits them, we
4724 make no attempt to turn them back into naked patterns. */
4726 /* Generate and return an insn body to add Y to X. */
4729 gen_add2_insn (rtx x
, rtx y
)
4731 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4733 gcc_assert (insn_operand_matches (icode
, 0, x
));
4734 gcc_assert (insn_operand_matches (icode
, 1, x
));
4735 gcc_assert (insn_operand_matches (icode
, 2, y
));
4737 return GEN_FCN (icode
) (x
, x
, y
);
4740 /* Generate and return an insn body to add r1 and c,
4741 storing the result in r0. */
4744 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4746 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4748 if (icode
== CODE_FOR_nothing
4749 || !insn_operand_matches (icode
, 0, r0
)
4750 || !insn_operand_matches (icode
, 1, r1
)
4751 || !insn_operand_matches (icode
, 2, c
))
4754 return GEN_FCN (icode
) (r0
, r1
, c
);
4758 have_add2_insn (rtx x
, rtx y
)
4760 enum insn_code icode
;
4762 gcc_assert (GET_MODE (x
) != VOIDmode
);
4764 icode
= optab_handler (add_optab
, GET_MODE (x
));
4766 if (icode
== CODE_FOR_nothing
)
4769 if (!insn_operand_matches (icode
, 0, x
)
4770 || !insn_operand_matches (icode
, 1, x
)
4771 || !insn_operand_matches (icode
, 2, y
))
4777 /* Generate and return an insn body to add Y to X. */
4780 gen_addptr3_insn (rtx x
, rtx y
, rtx z
)
4782 enum insn_code icode
= optab_handler (addptr3_optab
, GET_MODE (x
));
4784 gcc_assert (insn_operand_matches (icode
, 0, x
));
4785 gcc_assert (insn_operand_matches (icode
, 1, y
));
4786 gcc_assert (insn_operand_matches (icode
, 2, z
));
4788 return GEN_FCN (icode
) (x
, y
, z
);
4791 /* Return true if the target implements an addptr pattern and X, Y,
4792 and Z are valid for the pattern predicates. */
4795 have_addptr3_insn (rtx x
, rtx y
, rtx z
)
4797 enum insn_code icode
;
4799 gcc_assert (GET_MODE (x
) != VOIDmode
);
4801 icode
= optab_handler (addptr3_optab
, GET_MODE (x
));
4803 if (icode
== CODE_FOR_nothing
)
4806 if (!insn_operand_matches (icode
, 0, x
)
4807 || !insn_operand_matches (icode
, 1, y
)
4808 || !insn_operand_matches (icode
, 2, z
))
4814 /* Generate and return an insn body to subtract Y from X. */
4817 gen_sub2_insn (rtx x
, rtx y
)
4819 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4821 gcc_assert (insn_operand_matches (icode
, 0, x
));
4822 gcc_assert (insn_operand_matches (icode
, 1, x
));
4823 gcc_assert (insn_operand_matches (icode
, 2, y
));
4825 return GEN_FCN (icode
) (x
, x
, y
);
4828 /* Generate and return an insn body to subtract r1 and c,
4829 storing the result in r0. */
4832 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4834 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4836 if (icode
== CODE_FOR_nothing
4837 || !insn_operand_matches (icode
, 0, r0
)
4838 || !insn_operand_matches (icode
, 1, r1
)
4839 || !insn_operand_matches (icode
, 2, c
))
4842 return GEN_FCN (icode
) (r0
, r1
, c
);
4846 have_sub2_insn (rtx x
, rtx y
)
4848 enum insn_code icode
;
4850 gcc_assert (GET_MODE (x
) != VOIDmode
);
4852 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4854 if (icode
== CODE_FOR_nothing
)
4857 if (!insn_operand_matches (icode
, 0, x
)
4858 || !insn_operand_matches (icode
, 1, x
)
4859 || !insn_operand_matches (icode
, 2, y
))
4865 /* Generate the body of an instruction to copy Y into X.
4866 It may be a list of insns, if one insn isn't enough. */
4869 gen_move_insn (rtx x
, rtx y
)
4874 emit_move_insn_1 (x
, y
);
4880 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4881 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4882 no such operation exists, CODE_FOR_nothing will be returned. */
4885 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4889 #ifdef HAVE_ptr_extend
4891 return CODE_FOR_ptr_extend
;
4894 tab
= unsignedp
? zext_optab
: sext_optab
;
4895 return convert_optab_handler (tab
, to_mode
, from_mode
);
4898 /* Generate the body of an insn to extend Y (with mode MFROM)
4899 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4902 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4903 enum machine_mode mfrom
, int unsignedp
)
4905 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4906 return GEN_FCN (icode
) (x
, y
);
4909 /* can_fix_p and can_float_p say whether the target machine
4910 can directly convert a given fixed point type to
4911 a given floating point type, or vice versa.
4912 The returned value is the CODE_FOR_... value to use,
4913 or CODE_FOR_nothing if these modes cannot be directly converted.
4915 *TRUNCP_PTR is set to 1 if it is necessary to output
4916 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4918 static enum insn_code
4919 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4920 int unsignedp
, int *truncp_ptr
)
4923 enum insn_code icode
;
4925 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4926 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4927 if (icode
!= CODE_FOR_nothing
)
4933 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4934 for this to work. We need to rework the fix* and ftrunc* patterns
4935 and documentation. */
4936 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4937 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4938 if (icode
!= CODE_FOR_nothing
4939 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4946 return CODE_FOR_nothing
;
4950 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4955 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4956 return convert_optab_handler (tab
, fltmode
, fixmode
);
4959 /* Function supportable_convert_operation
4961 Check whether an operation represented by the code CODE is a
4962 convert operation that is supported by the target platform in
4963 vector form (i.e., when operating on arguments of type VECTYPE_IN
4964 producing a result of type VECTYPE_OUT).
4966 Convert operations we currently support directly are FIX_TRUNC and FLOAT.
4967 This function checks if these operations are supported
4968 by the target platform either directly (via vector tree-codes), or via
4972 - CODE1 is code of vector operation to be used when
4973 vectorizing the operation, if available.
4974 - DECL is decl of target builtin functions to be used
4975 when vectorizing the operation, if available. In this case,
4976 CODE1 is CALL_EXPR. */
4979 supportable_convert_operation (enum tree_code code
,
4980 tree vectype_out
, tree vectype_in
,
4981 tree
*decl
, enum tree_code
*code1
)
4983 enum machine_mode m1
,m2
;
4986 m1
= TYPE_MODE (vectype_out
);
4987 m2
= TYPE_MODE (vectype_in
);
4989 /* First check if we can done conversion directly. */
4990 if ((code
== FIX_TRUNC_EXPR
4991 && can_fix_p (m1
,m2
,TYPE_UNSIGNED (vectype_out
), &truncp
)
4992 != CODE_FOR_nothing
)
4993 || (code
== FLOAT_EXPR
4994 && can_float_p (m1
,m2
,TYPE_UNSIGNED (vectype_in
))
4995 != CODE_FOR_nothing
))
5001 /* Now check for builtin. */
5002 if (targetm
.vectorize
.builtin_conversion
5003 && targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
))
5006 *decl
= targetm
.vectorize
.builtin_conversion (code
, vectype_out
, vectype_in
);
5013 /* Generate code to convert FROM to floating point
5014 and store in TO. FROM must be fixed point and not VOIDmode.
5015 UNSIGNEDP nonzero means regard FROM as unsigned.
5016 Normally this is done by correcting the final value
5017 if it is negative. */
5020 expand_float (rtx to
, rtx from
, int unsignedp
)
5022 enum insn_code icode
;
5024 enum machine_mode fmode
, imode
;
5025 bool can_do_signed
= false;
5027 /* Crash now, because we won't be able to decide which mode to use. */
5028 gcc_assert (GET_MODE (from
) != VOIDmode
);
5030 /* Look for an insn to do the conversion. Do it in the specified
5031 modes if possible; otherwise convert either input, output or both to
5032 wider mode. If the integer mode is wider than the mode of FROM,
5033 we can do the conversion signed even if the input is unsigned. */
5035 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5036 fmode
= GET_MODE_WIDER_MODE (fmode
))
5037 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
5038 imode
= GET_MODE_WIDER_MODE (imode
))
5040 int doing_unsigned
= unsignedp
;
5042 if (fmode
!= GET_MODE (to
)
5043 && significand_size (fmode
) < GET_MODE_PRECISION (GET_MODE (from
)))
5046 icode
= can_float_p (fmode
, imode
, unsignedp
);
5047 if (icode
== CODE_FOR_nothing
&& unsignedp
)
5049 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
5050 if (scode
!= CODE_FOR_nothing
)
5051 can_do_signed
= true;
5052 if (imode
!= GET_MODE (from
))
5053 icode
= scode
, doing_unsigned
= 0;
5056 if (icode
!= CODE_FOR_nothing
)
5058 if (imode
!= GET_MODE (from
))
5059 from
= convert_to_mode (imode
, from
, unsignedp
);
5061 if (fmode
!= GET_MODE (to
))
5062 target
= gen_reg_rtx (fmode
);
5064 emit_unop_insn (icode
, target
, from
,
5065 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
5068 convert_move (to
, target
, 0);
5073 /* Unsigned integer, and no way to convert directly. Convert as signed,
5074 then unconditionally adjust the result. */
5075 if (unsignedp
&& can_do_signed
)
5077 rtx label
= gen_label_rtx ();
5079 REAL_VALUE_TYPE offset
;
5081 /* Look for a usable floating mode FMODE wider than the source and at
5082 least as wide as the target. Using FMODE will avoid rounding woes
5083 with unsigned values greater than the signed maximum value. */
5085 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
5086 fmode
= GET_MODE_WIDER_MODE (fmode
))
5087 if (GET_MODE_PRECISION (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
5088 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
5091 if (fmode
== VOIDmode
)
5093 /* There is no such mode. Pretend the target is wide enough. */
5094 fmode
= GET_MODE (to
);
5096 /* Avoid double-rounding when TO is narrower than FROM. */
5097 if ((significand_size (fmode
) + 1)
5098 < GET_MODE_PRECISION (GET_MODE (from
)))
5101 rtx neglabel
= gen_label_rtx ();
5103 /* Don't use TARGET if it isn't a register, is a hard register,
5104 or is the wrong mode. */
5106 || REGNO (target
) < FIRST_PSEUDO_REGISTER
5107 || GET_MODE (target
) != fmode
)
5108 target
= gen_reg_rtx (fmode
);
5110 imode
= GET_MODE (from
);
5111 do_pending_stack_adjust ();
5113 /* Test whether the sign bit is set. */
5114 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
5117 /* The sign bit is not set. Convert as signed. */
5118 expand_float (target
, from
, 0);
5119 emit_jump_insn (gen_jump (label
));
5122 /* The sign bit is set.
5123 Convert to a usable (positive signed) value by shifting right
5124 one bit, while remembering if a nonzero bit was shifted
5125 out; i.e., compute (from & 1) | (from >> 1). */
5127 emit_label (neglabel
);
5128 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5129 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5130 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, 1, NULL_RTX
, 1);
5131 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5133 expand_float (target
, temp
, 0);
5135 /* Multiply by 2 to undo the shift above. */
5136 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5137 target
, 0, OPTAB_LIB_WIDEN
);
5139 emit_move_insn (target
, temp
);
5141 do_pending_stack_adjust ();
5147 /* If we are about to do some arithmetic to correct for an
5148 unsigned operand, do it in a pseudo-register. */
5150 if (GET_MODE (to
) != fmode
5151 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5152 target
= gen_reg_rtx (fmode
);
5154 /* Convert as signed integer to floating. */
5155 expand_float (target
, from
, 0);
5157 /* If FROM is negative (and therefore TO is negative),
5158 correct its value by 2**bitwidth. */
5160 do_pending_stack_adjust ();
5161 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5165 real_2expN (&offset
, GET_MODE_PRECISION (GET_MODE (from
)), fmode
);
5166 temp
= expand_binop (fmode
, add_optab
, target
,
5167 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5168 target
, 0, OPTAB_LIB_WIDEN
);
5170 emit_move_insn (target
, temp
);
5172 do_pending_stack_adjust ();
5177 /* No hardware instruction available; call a library routine. */
5182 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5184 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5185 from
= convert_to_mode (SImode
, from
, unsignedp
);
5187 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5188 gcc_assert (libfunc
);
5192 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5193 GET_MODE (to
), 1, from
,
5195 insns
= get_insns ();
5198 emit_libcall_block (insns
, target
, value
,
5199 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5200 GET_MODE (to
), from
));
5205 /* Copy result to requested destination
5206 if we have been computing in a temp location. */
5210 if (GET_MODE (target
) == GET_MODE (to
))
5211 emit_move_insn (to
, target
);
5213 convert_move (to
, target
, 0);
5217 /* Generate code to convert FROM to fixed point and store in TO. FROM
5218 must be floating point. */
5221 expand_fix (rtx to
, rtx from
, int unsignedp
)
5223 enum insn_code icode
;
5225 enum machine_mode fmode
, imode
;
5228 /* We first try to find a pair of modes, one real and one integer, at
5229 least as wide as FROM and TO, respectively, in which we can open-code
5230 this conversion. If the integer mode is wider than the mode of TO,
5231 we can do the conversion either signed or unsigned. */
5233 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5234 fmode
= GET_MODE_WIDER_MODE (fmode
))
5235 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5236 imode
= GET_MODE_WIDER_MODE (imode
))
5238 int doing_unsigned
= unsignedp
;
5240 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5241 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5242 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5244 if (icode
!= CODE_FOR_nothing
)
5246 rtx last
= get_last_insn ();
5247 if (fmode
!= GET_MODE (from
))
5248 from
= convert_to_mode (fmode
, from
, 0);
5252 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5253 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5257 if (imode
!= GET_MODE (to
))
5258 target
= gen_reg_rtx (imode
);
5260 if (maybe_emit_unop_insn (icode
, target
, from
,
5261 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5264 convert_move (to
, target
, unsignedp
);
5267 delete_insns_since (last
);
5271 /* For an unsigned conversion, there is one more way to do it.
5272 If we have a signed conversion, we generate code that compares
5273 the real value to the largest representable positive number. If if
5274 is smaller, the conversion is done normally. Otherwise, subtract
5275 one plus the highest signed number, convert, and add it back.
5277 We only need to check all real modes, since we know we didn't find
5278 anything with a wider integer mode.
5280 This code used to extend FP value into mode wider than the destination.
5281 This is needed for decimal float modes which cannot accurately
5282 represent one plus the highest signed number of the same size, but
5283 not for binary modes. Consider, for instance conversion from SFmode
5286 The hot path through the code is dealing with inputs smaller than 2^63
5287 and doing just the conversion, so there is no bits to lose.
5289 In the other path we know the value is positive in the range 2^63..2^64-1
5290 inclusive. (as for other input overflow happens and result is undefined)
5291 So we know that the most important bit set in mantissa corresponds to
5292 2^63. The subtraction of 2^63 should not generate any rounding as it
5293 simply clears out that bit. The rest is trivial. */
5295 if (unsignedp
&& GET_MODE_PRECISION (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5296 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5297 fmode
= GET_MODE_WIDER_MODE (fmode
))
5298 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5299 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5300 || GET_MODE_BITSIZE (fmode
) > GET_MODE_PRECISION (GET_MODE (to
))))
5303 REAL_VALUE_TYPE offset
;
5304 rtx limit
, lab1
, lab2
, insn
;
5306 bitsize
= GET_MODE_PRECISION (GET_MODE (to
));
5307 real_2expN (&offset
, bitsize
- 1, fmode
);
5308 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5309 lab1
= gen_label_rtx ();
5310 lab2
= gen_label_rtx ();
5312 if (fmode
!= GET_MODE (from
))
5313 from
= convert_to_mode (fmode
, from
, 0);
5315 /* See if we need to do the subtraction. */
5316 do_pending_stack_adjust ();
5317 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5320 /* If not, do the signed "fix" and branch around fixup code. */
5321 expand_fix (to
, from
, 0);
5322 emit_jump_insn (gen_jump (lab2
));
5325 /* Otherwise, subtract 2**(N-1), convert to signed number,
5326 then add 2**(N-1). Do the addition using XOR since this
5327 will often generate better code. */
5329 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5330 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5331 expand_fix (to
, target
, 0);
5332 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5334 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5336 to
, 1, OPTAB_LIB_WIDEN
);
5339 emit_move_insn (to
, target
);
5343 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5345 /* Make a place for a REG_NOTE and add it. */
5346 insn
= emit_move_insn (to
, to
);
5347 set_dst_reg_note (insn
, REG_EQUAL
,
5348 gen_rtx_fmt_e (UNSIGNED_FIX
, GET_MODE (to
),
5356 /* We can't do it with an insn, so use a library call. But first ensure
5357 that the mode of TO is at least as wide as SImode, since those are the
5358 only library calls we know about. */
5360 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5362 target
= gen_reg_rtx (SImode
);
5364 expand_fix (target
, from
, unsignedp
);
5372 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5373 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5374 gcc_assert (libfunc
);
5378 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5379 GET_MODE (to
), 1, from
,
5381 insns
= get_insns ();
5384 emit_libcall_block (insns
, target
, value
,
5385 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5386 GET_MODE (to
), from
));
5391 if (GET_MODE (to
) == GET_MODE (target
))
5392 emit_move_insn (to
, target
);
5394 convert_move (to
, target
, 0);
5398 /* Generate code to convert FROM or TO a fixed-point.
5399 If UINTP is true, either TO or FROM is an unsigned integer.
5400 If SATP is true, we need to saturate the result. */
5403 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5405 enum machine_mode to_mode
= GET_MODE (to
);
5406 enum machine_mode from_mode
= GET_MODE (from
);
5408 enum rtx_code this_code
;
5409 enum insn_code code
;
5413 if (to_mode
== from_mode
)
5415 emit_move_insn (to
, from
);
5421 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5422 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5426 tab
= satp
? satfract_optab
: fract_optab
;
5427 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5429 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5430 if (code
!= CODE_FOR_nothing
)
5432 emit_unop_insn (code
, to
, from
, this_code
);
5436 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5437 gcc_assert (libfunc
);
5440 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5441 1, from
, from_mode
);
5442 insns
= get_insns ();
5445 emit_libcall_block (insns
, to
, value
,
5446 gen_rtx_fmt_e (optab_to_code (tab
), to_mode
, from
));
5449 /* Generate code to convert FROM to fixed point and store in TO. FROM
5450 must be floating point, TO must be signed. Use the conversion optab
5451 TAB to do the conversion. */
5454 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5456 enum insn_code icode
;
5458 enum machine_mode fmode
, imode
;
5460 /* We first try to find a pair of modes, one real and one integer, at
5461 least as wide as FROM and TO, respectively, in which we can open-code
5462 this conversion. If the integer mode is wider than the mode of TO,
5463 we can do the conversion either signed or unsigned. */
5465 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5466 fmode
= GET_MODE_WIDER_MODE (fmode
))
5467 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5468 imode
= GET_MODE_WIDER_MODE (imode
))
5470 icode
= convert_optab_handler (tab
, imode
, fmode
);
5471 if (icode
!= CODE_FOR_nothing
)
5473 rtx last
= get_last_insn ();
5474 if (fmode
!= GET_MODE (from
))
5475 from
= convert_to_mode (fmode
, from
, 0);
5477 if (imode
!= GET_MODE (to
))
5478 target
= gen_reg_rtx (imode
);
5480 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5482 delete_insns_since (last
);
5486 convert_move (to
, target
, 0);
5494 /* Report whether we have an instruction to perform the operation
5495 specified by CODE on operands of mode MODE. */
5497 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5499 return (code_to_optab (code
)
5500 && (optab_handler (code_to_optab (code
), mode
)
5501 != CODE_FOR_nothing
));
5504 /* Initialize the libfunc fields of an entire group of entries in some
5505 optab. Each entry is set equal to a string consisting of a leading
5506 pair of underscores followed by a generic operation name followed by
5507 a mode name (downshifted to lowercase) followed by a single character
5508 representing the number of operands for the given operation (which is
5509 usually one of the characters '2', '3', or '4').
5511 OPTABLE is the table in which libfunc fields are to be initialized.
5512 OPNAME is the generic (string) name of the operation.
5513 SUFFIX is the character which specifies the number of operands for
5514 the given generic operation.
5515 MODE is the mode to generate for.
5519 gen_libfunc (optab optable
, const char *opname
, int suffix
,
5520 enum machine_mode mode
)
5522 unsigned opname_len
= strlen (opname
);
5523 const char *mname
= GET_MODE_NAME (mode
);
5524 unsigned mname_len
= strlen (mname
);
5525 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5526 int len
= prefix_len
+ opname_len
+ mname_len
+ 1 + 1;
5527 char *libfunc_name
= XALLOCAVEC (char, len
);
5534 if (targetm
.libfunc_gnu_prefix
)
5541 for (q
= opname
; *q
; )
5543 for (q
= mname
; *q
; q
++)
5544 *p
++ = TOLOWER (*q
);
5548 set_optab_libfunc (optable
, mode
,
5549 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5552 /* Like gen_libfunc, but verify that integer operation is involved. */
5555 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5556 enum machine_mode mode
)
5558 int maxsize
= 2 * BITS_PER_WORD
;
5560 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5562 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5563 maxsize
= LONG_LONG_TYPE_SIZE
;
5564 if (GET_MODE_CLASS (mode
) != MODE_INT
5565 || GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
5566 || GET_MODE_BITSIZE (mode
) > maxsize
)
5568 gen_libfunc (optable
, opname
, suffix
, mode
);
5571 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5574 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5575 enum machine_mode mode
)
5579 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5580 gen_libfunc (optable
, opname
, suffix
, mode
);
5581 if (DECIMAL_FLOAT_MODE_P (mode
))
5583 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5584 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5585 depending on the low level floating format used. */
5586 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5587 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5588 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5592 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5595 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5596 enum machine_mode mode
)
5598 if (!ALL_FIXED_POINT_MODE_P (mode
))
5600 gen_libfunc (optable
, opname
, suffix
, mode
);
5603 /* Like gen_libfunc, but verify that signed fixed-point operation is
5607 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5608 enum machine_mode mode
)
5610 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5612 gen_libfunc (optable
, opname
, suffix
, mode
);
5615 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5619 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5620 enum machine_mode mode
)
5622 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5624 gen_libfunc (optable
, opname
, suffix
, mode
);
5627 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5630 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5631 enum machine_mode mode
)
5633 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5634 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5635 if (INTEGRAL_MODE_P (mode
))
5636 gen_int_libfunc (optable
, name
, suffix
, mode
);
5639 /* Like gen_libfunc, but verify that FP or INT operation is involved
5640 and add 'v' suffix for integer operation. */
5643 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5644 enum machine_mode mode
)
5646 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5647 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5648 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5650 int len
= strlen (name
);
5651 char *v_name
= XALLOCAVEC (char, len
+ 2);
5652 strcpy (v_name
, name
);
5654 v_name
[len
+ 1] = 0;
5655 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5659 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5663 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5664 enum machine_mode mode
)
5666 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5667 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5668 if (INTEGRAL_MODE_P (mode
))
5669 gen_int_libfunc (optable
, name
, suffix
, mode
);
5670 if (ALL_FIXED_POINT_MODE_P (mode
))
5671 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5674 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5678 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5679 enum machine_mode mode
)
5681 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5682 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5683 if (INTEGRAL_MODE_P (mode
))
5684 gen_int_libfunc (optable
, name
, suffix
, mode
);
5685 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5686 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5689 /* Like gen_libfunc, but verify that INT or FIXED operation is
5693 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5694 enum machine_mode mode
)
5696 if (INTEGRAL_MODE_P (mode
))
5697 gen_int_libfunc (optable
, name
, suffix
, mode
);
5698 if (ALL_FIXED_POINT_MODE_P (mode
))
5699 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5702 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5706 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5707 enum machine_mode mode
)
5709 if (INTEGRAL_MODE_P (mode
))
5710 gen_int_libfunc (optable
, name
, suffix
, mode
);
5711 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5712 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5715 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5719 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5720 enum machine_mode mode
)
5722 if (INTEGRAL_MODE_P (mode
))
5723 gen_int_libfunc (optable
, name
, suffix
, mode
);
5724 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5725 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5728 /* Initialize the libfunc fields of an entire group of entries of an
5729 inter-mode-class conversion optab. The string formation rules are
5730 similar to the ones for init_libfuncs, above, but instead of having
5731 a mode name and an operand count these functions have two mode names
5732 and no operand count. */
5735 gen_interclass_conv_libfunc (convert_optab tab
,
5737 enum machine_mode tmode
,
5738 enum machine_mode fmode
)
5740 size_t opname_len
= strlen (opname
);
5741 size_t mname_len
= 0;
5743 const char *fname
, *tname
;
5745 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5746 char *libfunc_name
, *suffix
;
5747 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5750 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5751 depends on which underlying decimal floating point format is used. */
5752 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5754 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5756 nondec_name
= XALLOCAVEC (char, prefix_len
+ opname_len
+ mname_len
+ 1 + 1);
5757 nondec_name
[0] = '_';
5758 nondec_name
[1] = '_';
5759 if (targetm
.libfunc_gnu_prefix
)
5761 nondec_name
[2] = 'g';
5762 nondec_name
[3] = 'n';
5763 nondec_name
[4] = 'u';
5764 nondec_name
[5] = '_';
5767 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5768 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5770 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5773 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5774 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5775 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5777 fname
= GET_MODE_NAME (fmode
);
5778 tname
= GET_MODE_NAME (tmode
);
5780 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5782 libfunc_name
= dec_name
;
5783 suffix
= dec_suffix
;
5787 libfunc_name
= nondec_name
;
5788 suffix
= nondec_suffix
;
5792 for (q
= fname
; *q
; p
++, q
++)
5794 for (q
= tname
; *q
; p
++, q
++)
5799 set_conv_libfunc (tab
, tmode
, fmode
,
5800 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5803 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5804 int->fp conversion. */
5807 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5809 enum machine_mode tmode
,
5810 enum machine_mode fmode
)
5812 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5814 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5816 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5819 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5823 gen_ufloat_conv_libfunc (convert_optab tab
,
5824 const char *opname ATTRIBUTE_UNUSED
,
5825 enum machine_mode tmode
,
5826 enum machine_mode fmode
)
5828 if (DECIMAL_FLOAT_MODE_P (tmode
))
5829 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5831 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5834 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5835 fp->int conversion. */
5838 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5840 enum machine_mode tmode
,
5841 enum machine_mode fmode
)
5843 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5845 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5847 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5850 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5851 fp->int conversion with no decimal floating point involved. */
5854 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5856 enum machine_mode tmode
,
5857 enum machine_mode fmode
)
5859 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5861 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5863 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5866 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5867 The string formation rules are
5868 similar to the ones for init_libfunc, above. */
5871 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5872 enum machine_mode tmode
, enum machine_mode fmode
)
5874 size_t opname_len
= strlen (opname
);
5875 size_t mname_len
= 0;
5877 const char *fname
, *tname
;
5879 int prefix_len
= targetm
.libfunc_gnu_prefix
? 6 : 2;
5880 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5881 char *libfunc_name
, *suffix
;
5884 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5885 depends on which underlying decimal floating point format is used. */
5886 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5888 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5890 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5891 nondec_name
[0] = '_';
5892 nondec_name
[1] = '_';
5893 if (targetm
.libfunc_gnu_prefix
)
5895 nondec_name
[2] = 'g';
5896 nondec_name
[3] = 'n';
5897 nondec_name
[4] = 'u';
5898 nondec_name
[5] = '_';
5900 memcpy (&nondec_name
[prefix_len
], opname
, opname_len
);
5901 nondec_suffix
= nondec_name
+ opname_len
+ prefix_len
;
5903 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5906 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5907 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5908 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5910 fname
= GET_MODE_NAME (fmode
);
5911 tname
= GET_MODE_NAME (tmode
);
5913 if (DECIMAL_FLOAT_MODE_P (fmode
) || DECIMAL_FLOAT_MODE_P (tmode
))
5915 libfunc_name
= dec_name
;
5916 suffix
= dec_suffix
;
5920 libfunc_name
= nondec_name
;
5921 suffix
= nondec_suffix
;
5925 for (q
= fname
; *q
; p
++, q
++)
5927 for (q
= tname
; *q
; p
++, q
++)
5933 set_conv_libfunc (tab
, tmode
, fmode
,
5934 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5937 /* Pick proper libcall for trunc_optab. We need to chose if we do
5938 truncation or extension and interclass or intraclass. */
5941 gen_trunc_conv_libfunc (convert_optab tab
,
5943 enum machine_mode tmode
,
5944 enum machine_mode fmode
)
5946 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5948 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5953 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5954 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5955 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5957 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5960 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5961 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5962 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5963 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5966 /* Pick proper libcall for extend_optab. We need to chose if we do
5967 truncation or extension and interclass or intraclass. */
5970 gen_extend_conv_libfunc (convert_optab tab
,
5971 const char *opname ATTRIBUTE_UNUSED
,
5972 enum machine_mode tmode
,
5973 enum machine_mode fmode
)
5975 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5977 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5982 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5983 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5984 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5986 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5989 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5990 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5991 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5992 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5995 /* Pick proper libcall for fract_optab. We need to chose if we do
5996 interclass or intraclass. */
5999 gen_fract_conv_libfunc (convert_optab tab
,
6001 enum machine_mode tmode
,
6002 enum machine_mode fmode
)
6006 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
6009 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
6010 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6012 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6015 /* Pick proper libcall for fractuns_optab. */
6018 gen_fractuns_conv_libfunc (convert_optab tab
,
6020 enum machine_mode tmode
,
6021 enum machine_mode fmode
)
6025 /* One mode must be a fixed-point mode, and the other must be an integer
6027 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
6028 || (ALL_FIXED_POINT_MODE_P (fmode
)
6029 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
6032 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6035 /* Pick proper libcall for satfract_optab. We need to chose if we do
6036 interclass or intraclass. */
6039 gen_satfract_conv_libfunc (convert_optab tab
,
6041 enum machine_mode tmode
,
6042 enum machine_mode fmode
)
6046 /* TMODE must be a fixed-point mode. */
6047 if (!ALL_FIXED_POINT_MODE_P (tmode
))
6050 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
6051 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6053 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6056 /* Pick proper libcall for satfractuns_optab. */
6059 gen_satfractuns_conv_libfunc (convert_optab tab
,
6061 enum machine_mode tmode
,
6062 enum machine_mode fmode
)
6066 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
6067 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
6070 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
6073 /* A table of previously-created libfuncs, hashed by name. */
6074 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
6076 /* Hashtable callbacks for libfunc_decls. */
6079 libfunc_decl_hash (const void *entry
)
6081 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
6085 libfunc_decl_eq (const void *entry1
, const void *entry2
)
6087 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
6090 /* Build a decl for a libfunc named NAME. */
6093 build_libfunc_function (const char *name
)
6095 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
6096 get_identifier (name
),
6097 build_function_type (integer_type_node
, NULL_TREE
));
6098 /* ??? We don't have any type information except for this is
6099 a function. Pretend this is "int foo()". */
6100 DECL_ARTIFICIAL (decl
) = 1;
6101 DECL_EXTERNAL (decl
) = 1;
6102 TREE_PUBLIC (decl
) = 1;
6103 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
6105 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
6106 are the flags assigned by targetm.encode_section_info. */
6107 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
6113 init_one_libfunc (const char *name
)
6119 if (libfunc_decls
== NULL
)
6120 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6121 libfunc_decl_eq
, NULL
);
6123 /* See if we have already created a libfunc decl for this function. */
6124 id
= get_identifier (name
);
6125 hash
= IDENTIFIER_HASH_VALUE (id
);
6126 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6127 decl
= (tree
) *slot
;
6130 /* Create a new decl, so that it can be passed to
6131 targetm.encode_section_info. */
6132 decl
= build_libfunc_function (name
);
6135 return XEXP (DECL_RTL (decl
), 0);
6138 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6141 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6147 id
= get_identifier (name
);
6148 hash
= IDENTIFIER_HASH_VALUE (id
);
6149 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6151 decl
= (tree
) *slot
;
6152 set_user_assembler_name (decl
, asmspec
);
6153 return XEXP (DECL_RTL (decl
), 0);
6156 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6157 MODE to NAME, which should be either 0 or a string constant. */
6159 set_optab_libfunc (optab op
, enum machine_mode mode
, const char *name
)
6162 struct libfunc_entry e
;
6163 struct libfunc_entry
**slot
;
6170 val
= init_one_libfunc (name
);
6173 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6175 *slot
= ggc_alloc
<libfunc_entry
> ();
6177 (*slot
)->mode1
= mode
;
6178 (*slot
)->mode2
= VOIDmode
;
6179 (*slot
)->libfunc
= val
;
6182 /* Call this to reset the function entry for one conversion optab
6183 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6184 either 0 or a string constant. */
6186 set_conv_libfunc (convert_optab optab
, enum machine_mode tmode
,
6187 enum machine_mode fmode
, const char *name
)
6190 struct libfunc_entry e
;
6191 struct libfunc_entry
**slot
;
6198 val
= init_one_libfunc (name
);
6201 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6203 *slot
= ggc_alloc
<libfunc_entry
> ();
6204 (*slot
)->op
= optab
;
6205 (*slot
)->mode1
= tmode
;
6206 (*slot
)->mode2
= fmode
;
6207 (*slot
)->libfunc
= val
;
6210 /* Call this to initialize the contents of the optabs
6211 appropriately for the current target machine. */
6217 htab_empty (libfunc_hash
);
6219 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6221 /* Fill in the optabs with the insns we support. */
6222 init_all_optabs (this_fn_optabs
);
6224 /* The ffs function operates on `int'. Fall back on it if we do not
6225 have a libgcc2 function for that width. */
6226 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6227 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6230 /* Explicitly initialize the bswap libfuncs since we need them to be
6231 valid for things other than word_mode. */
6232 if (targetm
.libfunc_gnu_prefix
)
6234 set_optab_libfunc (bswap_optab
, SImode
, "__gnu_bswapsi2");
6235 set_optab_libfunc (bswap_optab
, DImode
, "__gnu_bswapdi2");
6239 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6240 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6243 /* Use cabs for double complex abs, since systems generally have cabs.
6244 Don't define any libcall for float complex, so that cabs will be used. */
6245 if (complex_double_type_node
)
6246 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
),
6249 abort_libfunc
= init_one_libfunc ("abort");
6250 memcpy_libfunc
= init_one_libfunc ("memcpy");
6251 memmove_libfunc
= init_one_libfunc ("memmove");
6252 memcmp_libfunc
= init_one_libfunc ("memcmp");
6253 memset_libfunc
= init_one_libfunc ("memset");
6254 setbits_libfunc
= init_one_libfunc ("__setbits");
6256 #ifndef DONT_USE_BUILTIN_SETJMP
6257 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6258 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6260 setjmp_libfunc
= init_one_libfunc ("setjmp");
6261 longjmp_libfunc
= init_one_libfunc ("longjmp");
6263 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6264 unwind_sjlj_unregister_libfunc
6265 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6267 /* For function entry/exit instrumentation. */
6268 profile_function_entry_libfunc
6269 = init_one_libfunc ("__cyg_profile_func_enter");
6270 profile_function_exit_libfunc
6271 = init_one_libfunc ("__cyg_profile_func_exit");
6273 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6275 /* Allow the target to add more libcalls or rename some, etc. */
6276 targetm
.init_libfuncs ();
6279 /* Use the current target and options to initialize
6280 TREE_OPTIMIZATION_OPTABS (OPTNODE). */
6283 init_tree_optimization_optabs (tree optnode
)
6285 /* Quick exit if we have already computed optabs for this target. */
6286 if (TREE_OPTIMIZATION_BASE_OPTABS (optnode
) == this_target_optabs
)
6289 /* Forget any previous information and set up for the current target. */
6290 TREE_OPTIMIZATION_BASE_OPTABS (optnode
) = this_target_optabs
;
6291 struct target_optabs
*tmp_optabs
= (struct target_optabs
*)
6292 TREE_OPTIMIZATION_OPTABS (optnode
);
6294 memset (tmp_optabs
, 0, sizeof (struct target_optabs
));
6296 tmp_optabs
= ggc_alloc
<target_optabs
> ();
6298 /* Generate a new set of optabs into tmp_optabs. */
6299 init_all_optabs (tmp_optabs
);
6301 /* If the optabs changed, record it. */
6302 if (memcmp (tmp_optabs
, this_target_optabs
, sizeof (struct target_optabs
)))
6303 TREE_OPTIMIZATION_OPTABS (optnode
) = tmp_optabs
;
6306 TREE_OPTIMIZATION_OPTABS (optnode
) = NULL
;
6307 ggc_free (tmp_optabs
);
6311 /* A helper function for init_sync_libfuncs. Using the basename BASE,
6312 install libfuncs into TAB for BASE_N for 1 <= N <= MAX. */
6315 init_sync_libfuncs_1 (optab tab
, const char *base
, int max
)
6317 enum machine_mode mode
;
6319 size_t len
= strlen (base
);
6322 gcc_assert (max
<= 8);
6323 gcc_assert (len
+ 3 < sizeof (buf
));
6325 memcpy (buf
, base
, len
);
6328 buf
[len
+ 2] = '\0';
6331 for (i
= 1; i
<= max
; i
*= 2)
6333 buf
[len
+ 1] = '0' + i
;
6334 set_optab_libfunc (tab
, mode
, buf
);
6335 mode
= GET_MODE_2XWIDER_MODE (mode
);
6340 init_sync_libfuncs (int max
)
6342 if (!flag_sync_libcalls
)
6345 init_sync_libfuncs_1 (sync_compare_and_swap_optab
,
6346 "__sync_val_compare_and_swap", max
);
6347 init_sync_libfuncs_1 (sync_lock_test_and_set_optab
,
6348 "__sync_lock_test_and_set", max
);
6350 init_sync_libfuncs_1 (sync_old_add_optab
, "__sync_fetch_and_add", max
);
6351 init_sync_libfuncs_1 (sync_old_sub_optab
, "__sync_fetch_and_sub", max
);
6352 init_sync_libfuncs_1 (sync_old_ior_optab
, "__sync_fetch_and_or", max
);
6353 init_sync_libfuncs_1 (sync_old_and_optab
, "__sync_fetch_and_and", max
);
6354 init_sync_libfuncs_1 (sync_old_xor_optab
, "__sync_fetch_and_xor", max
);
6355 init_sync_libfuncs_1 (sync_old_nand_optab
, "__sync_fetch_and_nand", max
);
6357 init_sync_libfuncs_1 (sync_new_add_optab
, "__sync_add_and_fetch", max
);
6358 init_sync_libfuncs_1 (sync_new_sub_optab
, "__sync_sub_and_fetch", max
);
6359 init_sync_libfuncs_1 (sync_new_ior_optab
, "__sync_or_and_fetch", max
);
6360 init_sync_libfuncs_1 (sync_new_and_optab
, "__sync_and_and_fetch", max
);
6361 init_sync_libfuncs_1 (sync_new_xor_optab
, "__sync_xor_and_fetch", max
);
6362 init_sync_libfuncs_1 (sync_new_nand_optab
, "__sync_nand_and_fetch", max
);
6365 /* Print information about the current contents of the optabs on
6369 debug_optab_libfuncs (void)
6373 /* Dump the arithmetic optabs. */
6374 for (i
= FIRST_NORM_OPTAB
; i
<= LAST_NORMLIB_OPTAB
; ++i
)
6375 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6377 rtx l
= optab_libfunc ((optab
) i
, (enum machine_mode
) j
);
6380 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6381 fprintf (stderr
, "%s\t%s:\t%s\n",
6382 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6388 /* Dump the conversion optabs. */
6389 for (i
= FIRST_CONV_OPTAB
; i
<= LAST_CONVLIB_OPTAB
; ++i
)
6390 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6391 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6393 rtx l
= convert_optab_libfunc ((optab
) i
, (enum machine_mode
) j
,
6394 (enum machine_mode
) k
);
6397 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6398 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6399 GET_RTX_NAME (optab_to_code ((optab
) i
)),
6408 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6409 CODE. Return 0 on failure. */
6412 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6414 enum machine_mode mode
= GET_MODE (op1
);
6415 enum insn_code icode
;
6419 if (mode
== VOIDmode
)
6422 icode
= optab_handler (ctrap_optab
, mode
);
6423 if (icode
== CODE_FOR_nothing
)
6426 /* Some targets only accept a zero trap code. */
6427 if (!insn_operand_matches (icode
, 3, tcode
))
6430 do_pending_stack_adjust ();
6432 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6437 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6440 /* If that failed, then give up. */
6448 insn
= get_insns ();
6453 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6454 or unsigned operation code. */
6456 static enum rtx_code
6457 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6469 code
= unsignedp
? LTU
: LT
;
6472 code
= unsignedp
? LEU
: LE
;
6475 code
= unsignedp
? GTU
: GT
;
6478 code
= unsignedp
? GEU
: GE
;
6481 case UNORDERED_EXPR
:
6512 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6513 unsigned operators. Do not generate compare instruction. */
6516 vector_compare_rtx (enum tree_code tcode
, tree t_op0
, tree t_op1
,
6517 bool unsignedp
, enum insn_code icode
)
6519 struct expand_operand ops
[2];
6520 rtx rtx_op0
, rtx_op1
;
6521 enum rtx_code rcode
= get_rtx_code (tcode
, unsignedp
);
6523 gcc_assert (TREE_CODE_CLASS (tcode
) == tcc_comparison
);
6525 /* Expand operands. */
6526 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6528 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6531 create_input_operand (&ops
[0], rtx_op0
, GET_MODE (rtx_op0
));
6532 create_input_operand (&ops
[1], rtx_op1
, GET_MODE (rtx_op1
));
6533 if (!maybe_legitimize_operands (icode
, 4, 2, ops
))
6535 return gen_rtx_fmt_ee (rcode
, VOIDmode
, ops
[0].value
, ops
[1].value
);
6538 /* Return true if VEC_PERM_EXPR can be expanded using SIMD extensions
6539 of the CPU. SEL may be NULL, which stands for an unknown constant. */
6542 can_vec_perm_p (enum machine_mode mode
, bool variable
,
6543 const unsigned char *sel
)
6545 enum machine_mode qimode
;
6547 /* If the target doesn't implement a vector mode for the vector type,
6548 then no operations are supported. */
6549 if (!VECTOR_MODE_P (mode
))
6554 if (direct_optab_handler (vec_perm_const_optab
, mode
) != CODE_FOR_nothing
6556 || targetm
.vectorize
.vec_perm_const_ok
== NULL
6557 || targetm
.vectorize
.vec_perm_const_ok (mode
, sel
)))
6561 if (direct_optab_handler (vec_perm_optab
, mode
) != CODE_FOR_nothing
)
6564 /* We allow fallback to a QI vector mode, and adjust the mask. */
6565 if (GET_MODE_INNER (mode
) == QImode
)
6567 qimode
= mode_for_vector (QImode
, GET_MODE_SIZE (mode
));
6568 if (!VECTOR_MODE_P (qimode
))
6571 /* ??? For completeness, we ought to check the QImode version of
6572 vec_perm_const_optab. But all users of this implicit lowering
6573 feature implement the variable vec_perm_optab. */
6574 if (direct_optab_handler (vec_perm_optab
, qimode
) == CODE_FOR_nothing
)
6577 /* In order to support the lowering of variable permutations,
6578 we need to support shifts and adds. */
6581 if (GET_MODE_UNIT_SIZE (mode
) > 2
6582 && optab_handler (ashl_optab
, mode
) == CODE_FOR_nothing
6583 && optab_handler (vashl_optab
, mode
) == CODE_FOR_nothing
)
6585 if (optab_handler (add_optab
, qimode
) == CODE_FOR_nothing
)
6592 /* A subroutine of expand_vec_perm for expanding one vec_perm insn. */
6595 expand_vec_perm_1 (enum insn_code icode
, rtx target
,
6596 rtx v0
, rtx v1
, rtx sel
)
6598 enum machine_mode tmode
= GET_MODE (target
);
6599 enum machine_mode smode
= GET_MODE (sel
);
6600 struct expand_operand ops
[4];
6602 create_output_operand (&ops
[0], target
, tmode
);
6603 create_input_operand (&ops
[3], sel
, smode
);
6605 /* Make an effort to preserve v0 == v1. The target expander is able to
6606 rely on this to determine if we're permuting a single input operand. */
6607 if (rtx_equal_p (v0
, v1
))
6609 if (!insn_operand_matches (icode
, 1, v0
))
6610 v0
= force_reg (tmode
, v0
);
6611 gcc_checking_assert (insn_operand_matches (icode
, 1, v0
));
6612 gcc_checking_assert (insn_operand_matches (icode
, 2, v0
));
6614 create_fixed_operand (&ops
[1], v0
);
6615 create_fixed_operand (&ops
[2], v0
);
6619 create_input_operand (&ops
[1], v0
, tmode
);
6620 create_input_operand (&ops
[2], v1
, tmode
);
6623 if (maybe_expand_insn (icode
, 4, ops
))
6624 return ops
[0].value
;
6628 /* Generate instructions for vec_perm optab given its mode
6629 and three operands. */
6632 expand_vec_perm (enum machine_mode mode
, rtx v0
, rtx v1
, rtx sel
, rtx target
)
6634 enum insn_code icode
;
6635 enum machine_mode qimode
;
6636 unsigned int i
, w
, e
, u
;
6637 rtx tmp
, sel_qi
= NULL
;
6640 if (!target
|| GET_MODE (target
) != mode
)
6641 target
= gen_reg_rtx (mode
);
6643 w
= GET_MODE_SIZE (mode
);
6644 e
= GET_MODE_NUNITS (mode
);
6645 u
= GET_MODE_UNIT_SIZE (mode
);
6647 /* Set QIMODE to a different vector mode with byte elements.
6648 If no such mode, or if MODE already has byte elements, use VOIDmode. */
6650 if (GET_MODE_INNER (mode
) != QImode
)
6652 qimode
= mode_for_vector (QImode
, w
);
6653 if (!VECTOR_MODE_P (qimode
))
6657 /* If the input is a constant, expand it specially. */
6658 gcc_assert (GET_MODE_CLASS (GET_MODE (sel
)) == MODE_VECTOR_INT
);
6659 if (GET_CODE (sel
) == CONST_VECTOR
)
6661 icode
= direct_optab_handler (vec_perm_const_optab
, mode
);
6662 if (icode
!= CODE_FOR_nothing
)
6664 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6669 /* Fall back to a constant byte-based permutation. */
6670 if (qimode
!= VOIDmode
)
6672 vec
= rtvec_alloc (w
);
6673 for (i
= 0; i
< e
; ++i
)
6675 unsigned int j
, this_e
;
6677 this_e
= INTVAL (CONST_VECTOR_ELT (sel
, i
));
6678 this_e
&= 2 * e
- 1;
6681 for (j
= 0; j
< u
; ++j
)
6682 RTVEC_ELT (vec
, i
* u
+ j
) = GEN_INT (this_e
+ j
);
6684 sel_qi
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6686 icode
= direct_optab_handler (vec_perm_const_optab
, qimode
);
6687 if (icode
!= CODE_FOR_nothing
)
6689 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6690 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6691 gen_lowpart (qimode
, v1
), sel_qi
);
6693 return gen_lowpart (mode
, tmp
);
6698 /* Otherwise expand as a fully variable permuation. */
6699 icode
= direct_optab_handler (vec_perm_optab
, mode
);
6700 if (icode
!= CODE_FOR_nothing
)
6702 tmp
= expand_vec_perm_1 (icode
, target
, v0
, v1
, sel
);
6707 /* As a special case to aid several targets, lower the element-based
6708 permutation to a byte-based permutation and try again. */
6709 if (qimode
== VOIDmode
)
6711 icode
= direct_optab_handler (vec_perm_optab
, qimode
);
6712 if (icode
== CODE_FOR_nothing
)
6717 /* Multiply each element by its byte size. */
6718 enum machine_mode selmode
= GET_MODE (sel
);
6720 sel
= expand_simple_binop (selmode
, PLUS
, sel
, sel
,
6721 sel
, 0, OPTAB_DIRECT
);
6723 sel
= expand_simple_binop (selmode
, ASHIFT
, sel
,
6724 GEN_INT (exact_log2 (u
)),
6725 sel
, 0, OPTAB_DIRECT
);
6726 gcc_assert (sel
!= NULL
);
6728 /* Broadcast the low byte each element into each of its bytes. */
6729 vec
= rtvec_alloc (w
);
6730 for (i
= 0; i
< w
; ++i
)
6732 int this_e
= i
/ u
* u
;
6733 if (BYTES_BIG_ENDIAN
)
6735 RTVEC_ELT (vec
, i
) = GEN_INT (this_e
);
6737 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6738 sel
= gen_lowpart (qimode
, sel
);
6739 sel
= expand_vec_perm (qimode
, sel
, sel
, tmp
, NULL
);
6740 gcc_assert (sel
!= NULL
);
6742 /* Add the byte offset to each byte element. */
6743 /* Note that the definition of the indicies here is memory ordering,
6744 so there should be no difference between big and little endian. */
6745 vec
= rtvec_alloc (w
);
6746 for (i
= 0; i
< w
; ++i
)
6747 RTVEC_ELT (vec
, i
) = GEN_INT (i
% u
);
6748 tmp
= gen_rtx_CONST_VECTOR (qimode
, vec
);
6749 sel_qi
= expand_simple_binop (qimode
, PLUS
, sel
, tmp
,
6750 sel
, 0, OPTAB_DIRECT
);
6751 gcc_assert (sel_qi
!= NULL
);
6754 tmp
= mode
!= qimode
? gen_reg_rtx (qimode
) : target
;
6755 tmp
= expand_vec_perm_1 (icode
, tmp
, gen_lowpart (qimode
, v0
),
6756 gen_lowpart (qimode
, v1
), sel_qi
);
6758 tmp
= gen_lowpart (mode
, tmp
);
6762 /* Return insn code for a conditional operator with a comparison in
6763 mode CMODE, unsigned if UNS is true, resulting in a value of mode VMODE. */
6765 static inline enum insn_code
6766 get_vcond_icode (enum machine_mode vmode
, enum machine_mode cmode
, bool uns
)
6768 enum insn_code icode
= CODE_FOR_nothing
;
6770 icode
= convert_optab_handler (vcondu_optab
, vmode
, cmode
);
6772 icode
= convert_optab_handler (vcond_optab
, vmode
, cmode
);
6776 /* Return TRUE iff, appropriate vector insns are available
6777 for vector cond expr with vector type VALUE_TYPE and a comparison
6778 with operand vector types in CMP_OP_TYPE. */
6781 expand_vec_cond_expr_p (tree value_type
, tree cmp_op_type
)
6783 enum machine_mode value_mode
= TYPE_MODE (value_type
);
6784 enum machine_mode cmp_op_mode
= TYPE_MODE (cmp_op_type
);
6785 if (GET_MODE_SIZE (value_mode
) != GET_MODE_SIZE (cmp_op_mode
)
6786 || GET_MODE_NUNITS (value_mode
) != GET_MODE_NUNITS (cmp_op_mode
)
6787 || get_vcond_icode (TYPE_MODE (value_type
), TYPE_MODE (cmp_op_type
),
6788 TYPE_UNSIGNED (cmp_op_type
)) == CODE_FOR_nothing
)
6793 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6797 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
6800 struct expand_operand ops
[6];
6801 enum insn_code icode
;
6802 rtx comparison
, rtx_op1
, rtx_op2
;
6803 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
6804 enum machine_mode cmp_op_mode
;
6807 enum tree_code tcode
;
6809 if (COMPARISON_CLASS_P (op0
))
6811 op0a
= TREE_OPERAND (op0
, 0);
6812 op0b
= TREE_OPERAND (op0
, 1);
6813 tcode
= TREE_CODE (op0
);
6818 gcc_assert (!TYPE_UNSIGNED (TREE_TYPE (op0
)));
6820 op0b
= build_zero_cst (TREE_TYPE (op0
));
6823 unsignedp
= TYPE_UNSIGNED (TREE_TYPE (op0a
));
6824 cmp_op_mode
= TYPE_MODE (TREE_TYPE (op0a
));
6827 gcc_assert (GET_MODE_SIZE (mode
) == GET_MODE_SIZE (cmp_op_mode
)
6828 && GET_MODE_NUNITS (mode
) == GET_MODE_NUNITS (cmp_op_mode
));
6830 icode
= get_vcond_icode (mode
, cmp_op_mode
, unsignedp
);
6831 if (icode
== CODE_FOR_nothing
)
6834 comparison
= vector_compare_rtx (tcode
, op0a
, op0b
, unsignedp
, icode
);
6835 rtx_op1
= expand_normal (op1
);
6836 rtx_op2
= expand_normal (op2
);
6838 create_output_operand (&ops
[0], target
, mode
);
6839 create_input_operand (&ops
[1], rtx_op1
, mode
);
6840 create_input_operand (&ops
[2], rtx_op2
, mode
);
6841 create_fixed_operand (&ops
[3], comparison
);
6842 create_fixed_operand (&ops
[4], XEXP (comparison
, 0));
6843 create_fixed_operand (&ops
[5], XEXP (comparison
, 1));
6844 expand_insn (icode
, 6, ops
);
6845 return ops
[0].value
;
6848 /* Return non-zero if a highpart multiply is supported of can be synthisized.
6849 For the benefit of expand_mult_highpart, the return value is 1 for direct,
6850 2 for even/odd widening, and 3 for hi/lo widening. */
6853 can_mult_highpart_p (enum machine_mode mode
, bool uns_p
)
6859 op
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6860 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6863 /* If the mode is an integral vector, synth from widening operations. */
6864 if (GET_MODE_CLASS (mode
) != MODE_VECTOR_INT
)
6867 nunits
= GET_MODE_NUNITS (mode
);
6868 sel
= XALLOCAVEC (unsigned char, nunits
);
6870 op
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6871 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6873 op
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6874 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6876 for (i
= 0; i
< nunits
; ++i
)
6877 sel
[i
] = !BYTES_BIG_ENDIAN
+ (i
& ~1) + ((i
& 1) ? nunits
: 0);
6878 if (can_vec_perm_p (mode
, false, sel
))
6883 op
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6884 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6886 op
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6887 if (optab_handler (op
, mode
) != CODE_FOR_nothing
)
6889 for (i
= 0; i
< nunits
; ++i
)
6890 sel
[i
] = 2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1);
6891 if (can_vec_perm_p (mode
, false, sel
))
6899 /* Expand a highpart multiply. */
6902 expand_mult_highpart (enum machine_mode mode
, rtx op0
, rtx op1
,
6903 rtx target
, bool uns_p
)
6905 struct expand_operand eops
[3];
6906 enum insn_code icode
;
6907 int method
, i
, nunits
;
6908 enum machine_mode wmode
;
6913 method
= can_mult_highpart_p (mode
, uns_p
);
6919 tab1
= uns_p
? umul_highpart_optab
: smul_highpart_optab
;
6920 return expand_binop (mode
, tab1
, op0
, op1
, target
, uns_p
,
6923 tab1
= uns_p
? vec_widen_umult_even_optab
: vec_widen_smult_even_optab
;
6924 tab2
= uns_p
? vec_widen_umult_odd_optab
: vec_widen_smult_odd_optab
;
6927 tab1
= uns_p
? vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
6928 tab2
= uns_p
? vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
6929 if (BYTES_BIG_ENDIAN
)
6940 icode
= optab_handler (tab1
, mode
);
6941 nunits
= GET_MODE_NUNITS (mode
);
6942 wmode
= insn_data
[icode
].operand
[0].mode
;
6943 gcc_checking_assert (2 * GET_MODE_NUNITS (wmode
) == nunits
);
6944 gcc_checking_assert (GET_MODE_SIZE (wmode
) == GET_MODE_SIZE (mode
));
6946 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6947 create_input_operand (&eops
[1], op0
, mode
);
6948 create_input_operand (&eops
[2], op1
, mode
);
6949 expand_insn (icode
, 3, eops
);
6950 m1
= gen_lowpart (mode
, eops
[0].value
);
6952 create_output_operand (&eops
[0], gen_reg_rtx (wmode
), wmode
);
6953 create_input_operand (&eops
[1], op0
, mode
);
6954 create_input_operand (&eops
[2], op1
, mode
);
6955 expand_insn (optab_handler (tab2
, mode
), 3, eops
);
6956 m2
= gen_lowpart (mode
, eops
[0].value
);
6958 v
= rtvec_alloc (nunits
);
6961 for (i
= 0; i
< nunits
; ++i
)
6962 RTVEC_ELT (v
, i
) = GEN_INT (!BYTES_BIG_ENDIAN
+ (i
& ~1)
6963 + ((i
& 1) ? nunits
: 0));
6967 for (i
= 0; i
< nunits
; ++i
)
6968 RTVEC_ELT (v
, i
) = GEN_INT (2 * i
+ (BYTES_BIG_ENDIAN
? 0 : 1));
6970 perm
= gen_rtx_CONST_VECTOR (mode
, v
);
6972 return expand_vec_perm (mode
, m1
, m2
, perm
, target
);
6975 /* Return true if target supports vector masked load/store for mode. */
6977 can_vec_mask_load_store_p (enum machine_mode mode
, bool is_load
)
6979 optab op
= is_load
? maskload_optab
: maskstore_optab
;
6980 enum machine_mode vmode
;
6981 unsigned int vector_sizes
;
6983 /* If mode is vector mode, check it directly. */
6984 if (VECTOR_MODE_P (mode
))
6985 return optab_handler (op
, mode
) != CODE_FOR_nothing
;
6987 /* Otherwise, return true if there is some vector mode with
6988 the mask load/store supported. */
6990 /* See if there is any chance the mask load or store might be
6991 vectorized. If not, punt. */
6992 vmode
= targetm
.vectorize
.preferred_simd_mode (mode
);
6993 if (!VECTOR_MODE_P (vmode
))
6996 if (optab_handler (op
, vmode
) != CODE_FOR_nothing
)
6999 vector_sizes
= targetm
.vectorize
.autovectorize_vector_sizes ();
7000 while (vector_sizes
!= 0)
7002 unsigned int cur
= 1 << floor_log2 (vector_sizes
);
7003 vector_sizes
&= ~cur
;
7004 if (cur
<= GET_MODE_SIZE (mode
))
7006 vmode
= mode_for_vector (mode
, cur
/ GET_MODE_SIZE (mode
));
7007 if (VECTOR_MODE_P (vmode
)
7008 && optab_handler (op
, vmode
) != CODE_FOR_nothing
)
7014 /* Return true if there is a compare_and_swap pattern. */
7017 can_compare_and_swap_p (enum machine_mode mode
, bool allow_libcall
)
7019 enum insn_code icode
;
7021 /* Check for __atomic_compare_and_swap. */
7022 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7023 if (icode
!= CODE_FOR_nothing
)
7026 /* Check for __sync_compare_and_swap. */
7027 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7028 if (icode
!= CODE_FOR_nothing
)
7030 if (allow_libcall
&& optab_libfunc (sync_compare_and_swap_optab
, mode
))
7033 /* No inline compare and swap. */
7037 /* Return true if an atomic exchange can be performed. */
7040 can_atomic_exchange_p (enum machine_mode mode
, bool allow_libcall
)
7042 enum insn_code icode
;
7044 /* Check for __atomic_exchange. */
7045 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7046 if (icode
!= CODE_FOR_nothing
)
7049 /* Don't check __sync_test_and_set, as on some platforms that
7050 has reduced functionality. Targets that really do support
7051 a proper exchange should simply be updated to the __atomics. */
7053 return can_compare_and_swap_p (mode
, allow_libcall
);
7057 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
7061 find_cc_set (rtx x
, const_rtx pat
, void *data
)
7063 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
7064 && GET_CODE (pat
) == SET
)
7066 rtx
*p_cc_reg
= (rtx
*) data
;
7067 gcc_assert (!*p_cc_reg
);
7072 /* This is a helper function for the other atomic operations. This function
7073 emits a loop that contains SEQ that iterates until a compare-and-swap
7074 operation at the end succeeds. MEM is the memory to be modified. SEQ is
7075 a set of instructions that takes a value from OLD_REG as an input and
7076 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
7077 set to the current contents of MEM. After SEQ, a compare-and-swap will
7078 attempt to update MEM with NEW_REG. The function returns true when the
7079 loop was generated successfully. */
7082 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
7084 enum machine_mode mode
= GET_MODE (mem
);
7085 rtx label
, cmp_reg
, success
, oldval
;
7087 /* The loop we want to generate looks like
7093 (success, cmp_reg) = compare-and-swap(mem, old_reg, new_reg)
7097 Note that we only do the plain load from memory once. Subsequent
7098 iterations use the value loaded by the compare-and-swap pattern. */
7100 label
= gen_label_rtx ();
7101 cmp_reg
= gen_reg_rtx (mode
);
7103 emit_move_insn (cmp_reg
, mem
);
7105 emit_move_insn (old_reg
, cmp_reg
);
7111 if (!expand_atomic_compare_and_swap (&success
, &oldval
, mem
, old_reg
,
7112 new_reg
, false, MEMMODEL_SEQ_CST
,
7116 if (oldval
!= cmp_reg
)
7117 emit_move_insn (cmp_reg
, oldval
);
7119 /* Mark this jump predicted not taken. */
7120 emit_cmp_and_jump_insns (success
, const0_rtx
, EQ
, const0_rtx
,
7121 GET_MODE (success
), 1, label
, 0);
7126 /* This function tries to emit an atomic_exchange intruction. VAL is written
7127 to *MEM using memory model MODEL. The previous contents of *MEM are returned,
7128 using TARGET if possible. */
7131 maybe_emit_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7133 enum machine_mode mode
= GET_MODE (mem
);
7134 enum insn_code icode
;
7136 /* If the target supports the exchange directly, great. */
7137 icode
= direct_optab_handler (atomic_exchange_optab
, mode
);
7138 if (icode
!= CODE_FOR_nothing
)
7140 struct expand_operand ops
[4];
7142 create_output_operand (&ops
[0], target
, mode
);
7143 create_fixed_operand (&ops
[1], mem
);
7144 create_input_operand (&ops
[2], val
, mode
);
7145 create_integer_operand (&ops
[3], model
);
7146 if (maybe_expand_insn (icode
, 4, ops
))
7147 return ops
[0].value
;
7153 /* This function tries to implement an atomic exchange operation using
7154 __sync_lock_test_and_set. VAL is written to *MEM using memory model MODEL.
7155 The previous contents of *MEM are returned, using TARGET if possible.
7156 Since this instructionn is an acquire barrier only, stronger memory
7157 models may require additional barriers to be emitted. */
7160 maybe_emit_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
,
7161 enum memmodel model
)
7163 enum machine_mode mode
= GET_MODE (mem
);
7164 enum insn_code icode
;
7165 rtx last_insn
= get_last_insn ();
7167 icode
= optab_handler (sync_lock_test_and_set_optab
, mode
);
7169 /* Legacy sync_lock_test_and_set is an acquire barrier. If the pattern
7170 exists, and the memory model is stronger than acquire, add a release
7171 barrier before the instruction. */
7173 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
7174 || (model
& MEMMODEL_MASK
) == MEMMODEL_RELEASE
7175 || (model
& MEMMODEL_MASK
) == MEMMODEL_ACQ_REL
)
7176 expand_mem_thread_fence (model
);
7178 if (icode
!= CODE_FOR_nothing
)
7180 struct expand_operand ops
[3];
7181 create_output_operand (&ops
[0], target
, mode
);
7182 create_fixed_operand (&ops
[1], mem
);
7183 create_input_operand (&ops
[2], val
, mode
);
7184 if (maybe_expand_insn (icode
, 3, ops
))
7185 return ops
[0].value
;
7188 /* If an external test-and-set libcall is provided, use that instead of
7189 any external compare-and-swap that we might get from the compare-and-
7190 swap-loop expansion later. */
7191 if (!can_compare_and_swap_p (mode
, false))
7193 rtx libfunc
= optab_libfunc (sync_lock_test_and_set_optab
, mode
);
7194 if (libfunc
!= NULL
)
7198 addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7199 return emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7200 mode
, 2, addr
, ptr_mode
,
7205 /* If the test_and_set can't be emitted, eliminate any barrier that might
7206 have been emitted. */
7207 delete_insns_since (last_insn
);
7211 /* This function tries to implement an atomic exchange operation using a
7212 compare_and_swap loop. VAL is written to *MEM. The previous contents of
7213 *MEM are returned, using TARGET if possible. No memory model is required
7214 since a compare_and_swap loop is seq-cst. */
7217 maybe_emit_compare_and_swap_exchange_loop (rtx target
, rtx mem
, rtx val
)
7219 enum machine_mode mode
= GET_MODE (mem
);
7221 if (can_compare_and_swap_p (mode
, true))
7223 if (!target
|| !register_operand (target
, mode
))
7224 target
= gen_reg_rtx (mode
);
7225 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7232 /* This function tries to implement an atomic test-and-set operation
7233 using the atomic_test_and_set instruction pattern. A boolean value
7234 is returned from the operation, using TARGET if possible. */
7236 #ifndef HAVE_atomic_test_and_set
7237 #define HAVE_atomic_test_and_set 0
7238 #define CODE_FOR_atomic_test_and_set CODE_FOR_nothing
7242 maybe_emit_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7244 enum machine_mode pat_bool_mode
;
7245 struct expand_operand ops
[3];
7247 if (!HAVE_atomic_test_and_set
)
7250 /* While we always get QImode from __atomic_test_and_set, we get
7251 other memory modes from __sync_lock_test_and_set. Note that we
7252 use no endian adjustment here. This matches the 4.6 behavior
7253 in the Sparc backend. */
7255 (insn_data
[CODE_FOR_atomic_test_and_set
].operand
[1].mode
== QImode
);
7256 if (GET_MODE (mem
) != QImode
)
7257 mem
= adjust_address_nv (mem
, QImode
, 0);
7259 pat_bool_mode
= insn_data
[CODE_FOR_atomic_test_and_set
].operand
[0].mode
;
7260 create_output_operand (&ops
[0], target
, pat_bool_mode
);
7261 create_fixed_operand (&ops
[1], mem
);
7262 create_integer_operand (&ops
[2], model
);
7264 if (maybe_expand_insn (CODE_FOR_atomic_test_and_set
, 3, ops
))
7265 return ops
[0].value
;
7269 /* This function expands the legacy _sync_lock test_and_set operation which is
7270 generally an atomic exchange. Some limited targets only allow the
7271 constant 1 to be stored. This is an ACQUIRE operation.
7273 TARGET is an optional place to stick the return value.
7274 MEM is where VAL is stored. */
7277 expand_sync_lock_test_and_set (rtx target
, rtx mem
, rtx val
)
7281 /* Try an atomic_exchange first. */
7282 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7286 ret
= maybe_emit_sync_lock_test_and_set (target
, mem
, val
, MEMMODEL_ACQUIRE
);
7290 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7294 /* If there are no other options, try atomic_test_and_set if the value
7295 being stored is 1. */
7296 if (val
== const1_rtx
)
7297 ret
= maybe_emit_atomic_test_and_set (target
, mem
, MEMMODEL_ACQUIRE
);
7302 /* This function expands the atomic test_and_set operation:
7303 atomically store a boolean TRUE into MEM and return the previous value.
7305 MEMMODEL is the memory model variant to use.
7306 TARGET is an optional place to stick the return value. */
7309 expand_atomic_test_and_set (rtx target
, rtx mem
, enum memmodel model
)
7311 enum machine_mode mode
= GET_MODE (mem
);
7312 rtx ret
, trueval
, subtarget
;
7314 ret
= maybe_emit_atomic_test_and_set (target
, mem
, model
);
7318 /* Be binary compatible with non-default settings of trueval, and different
7319 cpu revisions. E.g. one revision may have atomic-test-and-set, but
7320 another only has atomic-exchange. */
7321 if (targetm
.atomic_test_and_set_trueval
== 1)
7323 trueval
= const1_rtx
;
7324 subtarget
= target
? target
: gen_reg_rtx (mode
);
7328 trueval
= gen_int_mode (targetm
.atomic_test_and_set_trueval
, mode
);
7329 subtarget
= gen_reg_rtx (mode
);
7332 /* Try the atomic-exchange optab... */
7333 ret
= maybe_emit_atomic_exchange (subtarget
, mem
, trueval
, model
);
7335 /* ... then an atomic-compare-and-swap loop ... */
7337 ret
= maybe_emit_compare_and_swap_exchange_loop (subtarget
, mem
, trueval
);
7339 /* ... before trying the vaguely defined legacy lock_test_and_set. */
7341 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, trueval
, model
);
7343 /* Recall that the legacy lock_test_and_set optab was allowed to do magic
7344 things with the value 1. Thus we try again without trueval. */
7345 if (!ret
&& targetm
.atomic_test_and_set_trueval
!= 1)
7346 ret
= maybe_emit_sync_lock_test_and_set (subtarget
, mem
, const1_rtx
, model
);
7348 /* Failing all else, assume a single threaded environment and simply
7349 perform the operation. */
7352 emit_move_insn (subtarget
, mem
);
7353 emit_move_insn (mem
, trueval
);
7357 /* Recall that have to return a boolean value; rectify if trueval
7358 is not exactly one. */
7359 if (targetm
.atomic_test_and_set_trueval
!= 1)
7360 ret
= emit_store_flag_force (target
, NE
, ret
, const0_rtx
, mode
, 0, 1);
7365 /* This function expands the atomic exchange operation:
7366 atomically store VAL in MEM and return the previous value in MEM.
7368 MEMMODEL is the memory model variant to use.
7369 TARGET is an optional place to stick the return value. */
7372 expand_atomic_exchange (rtx target
, rtx mem
, rtx val
, enum memmodel model
)
7376 ret
= maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7378 /* Next try a compare-and-swap loop for the exchange. */
7380 ret
= maybe_emit_compare_and_swap_exchange_loop (target
, mem
, val
);
7385 /* This function expands the atomic compare exchange operation:
7387 *PTARGET_BOOL is an optional place to store the boolean success/failure.
7388 *PTARGET_OVAL is an optional place to store the old value from memory.
7389 Both target parameters may be NULL to indicate that we do not care about
7390 that return value. Both target parameters are updated on success to
7391 the actual location of the corresponding result.
7393 MEMMODEL is the memory model variant to use.
7395 The return value of the function is true for success. */
7398 expand_atomic_compare_and_swap (rtx
*ptarget_bool
, rtx
*ptarget_oval
,
7399 rtx mem
, rtx expected
, rtx desired
,
7400 bool is_weak
, enum memmodel succ_model
,
7401 enum memmodel fail_model
)
7403 enum machine_mode mode
= GET_MODE (mem
);
7404 struct expand_operand ops
[8];
7405 enum insn_code icode
;
7406 rtx target_oval
, target_bool
= NULL_RTX
;
7409 /* Load expected into a register for the compare and swap. */
7410 if (MEM_P (expected
))
7411 expected
= copy_to_reg (expected
);
7413 /* Make sure we always have some place to put the return oldval.
7414 Further, make sure that place is distinct from the input expected,
7415 just in case we need that path down below. */
7416 if (ptarget_oval
== NULL
7417 || (target_oval
= *ptarget_oval
) == NULL
7418 || reg_overlap_mentioned_p (expected
, target_oval
))
7419 target_oval
= gen_reg_rtx (mode
);
7421 icode
= direct_optab_handler (atomic_compare_and_swap_optab
, mode
);
7422 if (icode
!= CODE_FOR_nothing
)
7424 enum machine_mode bool_mode
= insn_data
[icode
].operand
[0].mode
;
7426 /* Make sure we always have a place for the bool operand. */
7427 if (ptarget_bool
== NULL
7428 || (target_bool
= *ptarget_bool
) == NULL
7429 || GET_MODE (target_bool
) != bool_mode
)
7430 target_bool
= gen_reg_rtx (bool_mode
);
7432 /* Emit the compare_and_swap. */
7433 create_output_operand (&ops
[0], target_bool
, bool_mode
);
7434 create_output_operand (&ops
[1], target_oval
, mode
);
7435 create_fixed_operand (&ops
[2], mem
);
7436 create_input_operand (&ops
[3], expected
, mode
);
7437 create_input_operand (&ops
[4], desired
, mode
);
7438 create_integer_operand (&ops
[5], is_weak
);
7439 create_integer_operand (&ops
[6], succ_model
);
7440 create_integer_operand (&ops
[7], fail_model
);
7441 if (maybe_expand_insn (icode
, 8, ops
))
7443 /* Return success/failure. */
7444 target_bool
= ops
[0].value
;
7445 target_oval
= ops
[1].value
;
7450 /* Otherwise fall back to the original __sync_val_compare_and_swap
7451 which is always seq-cst. */
7452 icode
= optab_handler (sync_compare_and_swap_optab
, mode
);
7453 if (icode
!= CODE_FOR_nothing
)
7457 create_output_operand (&ops
[0], target_oval
, mode
);
7458 create_fixed_operand (&ops
[1], mem
);
7459 create_input_operand (&ops
[2], expected
, mode
);
7460 create_input_operand (&ops
[3], desired
, mode
);
7461 if (!maybe_expand_insn (icode
, 4, ops
))
7464 target_oval
= ops
[0].value
;
7466 /* If the caller isn't interested in the boolean return value,
7467 skip the computation of it. */
7468 if (ptarget_bool
== NULL
)
7471 /* Otherwise, work out if the compare-and-swap succeeded. */
7473 if (have_insn_for (COMPARE
, CCmode
))
7474 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
7477 target_bool
= emit_store_flag_force (target_bool
, EQ
, cc_reg
,
7478 const0_rtx
, VOIDmode
, 0, 1);
7481 goto success_bool_from_val
;
7484 /* Also check for library support for __sync_val_compare_and_swap. */
7485 libfunc
= optab_libfunc (sync_compare_and_swap_optab
, mode
);
7486 if (libfunc
!= NULL
)
7488 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
7489 target_oval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_NORMAL
,
7490 mode
, 3, addr
, ptr_mode
,
7491 expected
, mode
, desired
, mode
);
7493 /* Compute the boolean return value only if requested. */
7495 goto success_bool_from_val
;
7503 success_bool_from_val
:
7504 target_bool
= emit_store_flag_force (target_bool
, EQ
, target_oval
,
7505 expected
, VOIDmode
, 1, 1);
7507 /* Make sure that the oval output winds up where the caller asked. */
7509 *ptarget_oval
= target_oval
;
7511 *ptarget_bool
= target_bool
;
7515 /* Generate asm volatile("" : : : "memory") as the memory barrier. */
7518 expand_asm_memory_barrier (void)
7522 asm_op
= gen_rtx_ASM_OPERANDS (VOIDmode
, empty_string
, empty_string
, 0,
7523 rtvec_alloc (0), rtvec_alloc (0),
7524 rtvec_alloc (0), UNKNOWN_LOCATION
);
7525 MEM_VOLATILE_P (asm_op
) = 1;
7527 clob
= gen_rtx_SCRATCH (VOIDmode
);
7528 clob
= gen_rtx_MEM (BLKmode
, clob
);
7529 clob
= gen_rtx_CLOBBER (VOIDmode
, clob
);
7531 emit_insn (gen_rtx_PARALLEL (VOIDmode
, gen_rtvec (2, asm_op
, clob
)));
7534 /* This routine will either emit the mem_thread_fence pattern or issue a
7535 sync_synchronize to generate a fence for memory model MEMMODEL. */
7537 #ifndef HAVE_mem_thread_fence
7538 # define HAVE_mem_thread_fence 0
7539 # define gen_mem_thread_fence(x) (gcc_unreachable (), NULL_RTX)
7541 #ifndef HAVE_memory_barrier
7542 # define HAVE_memory_barrier 0
7543 # define gen_memory_barrier() (gcc_unreachable (), NULL_RTX)
7547 expand_mem_thread_fence (enum memmodel model
)
7549 if (HAVE_mem_thread_fence
)
7550 emit_insn (gen_mem_thread_fence (GEN_INT (model
)));
7551 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7553 if (HAVE_memory_barrier
)
7554 emit_insn (gen_memory_barrier ());
7555 else if (synchronize_libfunc
!= NULL_RTX
)
7556 emit_library_call (synchronize_libfunc
, LCT_NORMAL
, VOIDmode
, 0);
7558 expand_asm_memory_barrier ();
7562 /* This routine will either emit the mem_signal_fence pattern or issue a
7563 sync_synchronize to generate a fence for memory model MEMMODEL. */
7565 #ifndef HAVE_mem_signal_fence
7566 # define HAVE_mem_signal_fence 0
7567 # define gen_mem_signal_fence(x) (gcc_unreachable (), NULL_RTX)
7571 expand_mem_signal_fence (enum memmodel model
)
7573 if (HAVE_mem_signal_fence
)
7574 emit_insn (gen_mem_signal_fence (GEN_INT (model
)));
7575 else if ((model
& MEMMODEL_MASK
) != MEMMODEL_RELAXED
)
7577 /* By default targets are coherent between a thread and the signal
7578 handler running on the same thread. Thus this really becomes a
7579 compiler barrier, in that stores must not be sunk past
7580 (or raised above) a given point. */
7581 expand_asm_memory_barrier ();
7585 /* This function expands the atomic load operation:
7586 return the atomically loaded value in MEM.
7588 MEMMODEL is the memory model variant to use.
7589 TARGET is an option place to stick the return value. */
7592 expand_atomic_load (rtx target
, rtx mem
, enum memmodel model
)
7594 enum machine_mode mode
= GET_MODE (mem
);
7595 enum insn_code icode
;
7597 /* If the target supports the load directly, great. */
7598 icode
= direct_optab_handler (atomic_load_optab
, mode
);
7599 if (icode
!= CODE_FOR_nothing
)
7601 struct expand_operand ops
[3];
7603 create_output_operand (&ops
[0], target
, mode
);
7604 create_fixed_operand (&ops
[1], mem
);
7605 create_integer_operand (&ops
[2], model
);
7606 if (maybe_expand_insn (icode
, 3, ops
))
7607 return ops
[0].value
;
7610 /* If the size of the object is greater than word size on this target,
7611 then we assume that a load will not be atomic. */
7612 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7614 /* Issue val = compare_and_swap (mem, 0, 0).
7615 This may cause the occasional harmless store of 0 when the value is
7616 already 0, but it seems to be OK according to the standards guys. */
7617 if (expand_atomic_compare_and_swap (NULL
, &target
, mem
, const0_rtx
,
7618 const0_rtx
, false, model
, model
))
7621 /* Otherwise there is no atomic load, leave the library call. */
7625 /* Otherwise assume loads are atomic, and emit the proper barriers. */
7626 if (!target
|| target
== const0_rtx
)
7627 target
= gen_reg_rtx (mode
);
7629 /* For SEQ_CST, emit a barrier before the load. */
7630 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7631 expand_mem_thread_fence (model
);
7633 emit_move_insn (target
, mem
);
7635 /* Emit the appropriate barrier after the load. */
7636 expand_mem_thread_fence (model
);
7641 /* This function expands the atomic store operation:
7642 Atomically store VAL in MEM.
7643 MEMMODEL is the memory model variant to use.
7644 USE_RELEASE is true if __sync_lock_release can be used as a fall back.
7645 function returns const0_rtx if a pattern was emitted. */
7648 expand_atomic_store (rtx mem
, rtx val
, enum memmodel model
, bool use_release
)
7650 enum machine_mode mode
= GET_MODE (mem
);
7651 enum insn_code icode
;
7652 struct expand_operand ops
[3];
7654 /* If the target supports the store directly, great. */
7655 icode
= direct_optab_handler (atomic_store_optab
, mode
);
7656 if (icode
!= CODE_FOR_nothing
)
7658 create_fixed_operand (&ops
[0], mem
);
7659 create_input_operand (&ops
[1], val
, mode
);
7660 create_integer_operand (&ops
[2], model
);
7661 if (maybe_expand_insn (icode
, 3, ops
))
7665 /* If using __sync_lock_release is a viable alternative, try it. */
7668 icode
= direct_optab_handler (sync_lock_release_optab
, mode
);
7669 if (icode
!= CODE_FOR_nothing
)
7671 create_fixed_operand (&ops
[0], mem
);
7672 create_input_operand (&ops
[1], const0_rtx
, mode
);
7673 if (maybe_expand_insn (icode
, 2, ops
))
7675 /* lock_release is only a release barrier. */
7676 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7677 expand_mem_thread_fence (model
);
7683 /* If the size of the object is greater than word size on this target,
7684 a default store will not be atomic, Try a mem_exchange and throw away
7685 the result. If that doesn't work, don't do anything. */
7686 if (GET_MODE_PRECISION (mode
) > BITS_PER_WORD
)
7688 rtx target
= maybe_emit_atomic_exchange (NULL_RTX
, mem
, val
, model
);
7690 target
= maybe_emit_compare_and_swap_exchange_loop (NULL_RTX
, mem
, val
);
7697 /* Otherwise assume stores are atomic, and emit the proper barriers. */
7698 expand_mem_thread_fence (model
);
7700 emit_move_insn (mem
, val
);
7702 /* For SEQ_CST, also emit a barrier after the store. */
7703 if ((model
& MEMMODEL_MASK
) == MEMMODEL_SEQ_CST
)
7704 expand_mem_thread_fence (model
);
7710 /* Structure containing the pointers and values required to process the
7711 various forms of the atomic_fetch_op and atomic_op_fetch builtins. */
7713 struct atomic_op_functions
7715 direct_optab mem_fetch_before
;
7716 direct_optab mem_fetch_after
;
7717 direct_optab mem_no_result
;
7720 direct_optab no_result
;
7721 enum rtx_code reverse_code
;
7725 /* Fill in structure pointed to by OP with the various optab entries for an
7726 operation of type CODE. */
7729 get_atomic_op_for_code (struct atomic_op_functions
*op
, enum rtx_code code
)
7731 gcc_assert (op
!= NULL
);
7733 /* If SWITCHABLE_TARGET is defined, then subtargets can be switched
7734 in the source code during compilation, and the optab entries are not
7735 computable until runtime. Fill in the values at runtime. */
7739 op
->mem_fetch_before
= atomic_fetch_add_optab
;
7740 op
->mem_fetch_after
= atomic_add_fetch_optab
;
7741 op
->mem_no_result
= atomic_add_optab
;
7742 op
->fetch_before
= sync_old_add_optab
;
7743 op
->fetch_after
= sync_new_add_optab
;
7744 op
->no_result
= sync_add_optab
;
7745 op
->reverse_code
= MINUS
;
7748 op
->mem_fetch_before
= atomic_fetch_sub_optab
;
7749 op
->mem_fetch_after
= atomic_sub_fetch_optab
;
7750 op
->mem_no_result
= atomic_sub_optab
;
7751 op
->fetch_before
= sync_old_sub_optab
;
7752 op
->fetch_after
= sync_new_sub_optab
;
7753 op
->no_result
= sync_sub_optab
;
7754 op
->reverse_code
= PLUS
;
7757 op
->mem_fetch_before
= atomic_fetch_xor_optab
;
7758 op
->mem_fetch_after
= atomic_xor_fetch_optab
;
7759 op
->mem_no_result
= atomic_xor_optab
;
7760 op
->fetch_before
= sync_old_xor_optab
;
7761 op
->fetch_after
= sync_new_xor_optab
;
7762 op
->no_result
= sync_xor_optab
;
7763 op
->reverse_code
= XOR
;
7766 op
->mem_fetch_before
= atomic_fetch_and_optab
;
7767 op
->mem_fetch_after
= atomic_and_fetch_optab
;
7768 op
->mem_no_result
= atomic_and_optab
;
7769 op
->fetch_before
= sync_old_and_optab
;
7770 op
->fetch_after
= sync_new_and_optab
;
7771 op
->no_result
= sync_and_optab
;
7772 op
->reverse_code
= UNKNOWN
;
7775 op
->mem_fetch_before
= atomic_fetch_or_optab
;
7776 op
->mem_fetch_after
= atomic_or_fetch_optab
;
7777 op
->mem_no_result
= atomic_or_optab
;
7778 op
->fetch_before
= sync_old_ior_optab
;
7779 op
->fetch_after
= sync_new_ior_optab
;
7780 op
->no_result
= sync_ior_optab
;
7781 op
->reverse_code
= UNKNOWN
;
7784 op
->mem_fetch_before
= atomic_fetch_nand_optab
;
7785 op
->mem_fetch_after
= atomic_nand_fetch_optab
;
7786 op
->mem_no_result
= atomic_nand_optab
;
7787 op
->fetch_before
= sync_old_nand_optab
;
7788 op
->fetch_after
= sync_new_nand_optab
;
7789 op
->no_result
= sync_nand_optab
;
7790 op
->reverse_code
= UNKNOWN
;
7797 /* See if there is a more optimal way to implement the operation "*MEM CODE VAL"
7798 using memory order MODEL. If AFTER is true the operation needs to return
7799 the value of *MEM after the operation, otherwise the previous value.
7800 TARGET is an optional place to place the result. The result is unused if
7802 Return the result if there is a better sequence, otherwise NULL_RTX. */
7805 maybe_optimize_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
7806 enum memmodel model
, bool after
)
7808 /* If the value is prefetched, or not used, it may be possible to replace
7809 the sequence with a native exchange operation. */
7810 if (!after
|| target
== const0_rtx
)
7812 /* fetch_and (&x, 0, m) can be replaced with exchange (&x, 0, m). */
7813 if (code
== AND
&& val
== const0_rtx
)
7815 if (target
== const0_rtx
)
7816 target
= gen_reg_rtx (GET_MODE (mem
));
7817 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7820 /* fetch_or (&x, -1, m) can be replaced with exchange (&x, -1, m). */
7821 if (code
== IOR
&& val
== constm1_rtx
)
7823 if (target
== const0_rtx
)
7824 target
= gen_reg_rtx (GET_MODE (mem
));
7825 return maybe_emit_atomic_exchange (target
, mem
, val
, model
);
7832 /* Try to emit an instruction for a specific operation varaition.
7833 OPTAB contains the OP functions.
7834 TARGET is an optional place to return the result. const0_rtx means unused.
7835 MEM is the memory location to operate on.
7836 VAL is the value to use in the operation.
7837 USE_MEMMODEL is TRUE if the variation with a memory model should be tried.
7838 MODEL is the memory model, if used.
7839 AFTER is true if the returned result is the value after the operation. */
7842 maybe_emit_op (const struct atomic_op_functions
*optab
, rtx target
, rtx mem
,
7843 rtx val
, bool use_memmodel
, enum memmodel model
, bool after
)
7845 enum machine_mode mode
= GET_MODE (mem
);
7846 struct expand_operand ops
[4];
7847 enum insn_code icode
;
7851 /* Check to see if there is a result returned. */
7852 if (target
== const0_rtx
)
7856 icode
= direct_optab_handler (optab
->mem_no_result
, mode
);
7857 create_integer_operand (&ops
[2], model
);
7862 icode
= direct_optab_handler (optab
->no_result
, mode
);
7866 /* Otherwise, we need to generate a result. */
7871 icode
= direct_optab_handler (after
? optab
->mem_fetch_after
7872 : optab
->mem_fetch_before
, mode
);
7873 create_integer_operand (&ops
[3], model
);
7878 icode
= optab_handler (after
? optab
->fetch_after
7879 : optab
->fetch_before
, mode
);
7882 create_output_operand (&ops
[op_counter
++], target
, mode
);
7884 if (icode
== CODE_FOR_nothing
)
7887 create_fixed_operand (&ops
[op_counter
++], mem
);
7888 /* VAL may have been promoted to a wider mode. Shrink it if so. */
7889 create_convert_operand_to (&ops
[op_counter
++], val
, mode
, true);
7891 if (maybe_expand_insn (icode
, num_ops
, ops
))
7892 return (target
== const0_rtx
? const0_rtx
: ops
[0].value
);
7898 /* This function expands an atomic fetch_OP or OP_fetch operation:
7899 TARGET is an option place to stick the return value. const0_rtx indicates
7900 the result is unused.
7901 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7902 CODE is the operation being performed (OP)
7903 MEMMODEL is the memory model variant to use.
7904 AFTER is true to return the result of the operation (OP_fetch).
7905 AFTER is false to return the value before the operation (fetch_OP).
7907 This function will *only* generate instructions if there is a direct
7908 optab. No compare and swap loops or libcalls will be generated. */
7911 expand_atomic_fetch_op_no_fallback (rtx target
, rtx mem
, rtx val
,
7912 enum rtx_code code
, enum memmodel model
,
7915 enum machine_mode mode
= GET_MODE (mem
);
7916 struct atomic_op_functions optab
;
7918 bool unused_result
= (target
== const0_rtx
);
7920 get_atomic_op_for_code (&optab
, code
);
7922 /* Check to see if there are any better instructions. */
7923 result
= maybe_optimize_fetch_op (target
, mem
, val
, code
, model
, after
);
7927 /* Check for the case where the result isn't used and try those patterns. */
7930 /* Try the memory model variant first. */
7931 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, true);
7935 /* Next try the old style withuot a memory model. */
7936 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, true);
7940 /* There is no no-result pattern, so try patterns with a result. */
7944 /* Try the __atomic version. */
7945 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, after
);
7949 /* Try the older __sync version. */
7950 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, after
);
7954 /* If the fetch value can be calculated from the other variation of fetch,
7955 try that operation. */
7956 if (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
)
7958 /* Try the __atomic version, then the older __sync version. */
7959 result
= maybe_emit_op (&optab
, target
, mem
, val
, true, model
, !after
);
7961 result
= maybe_emit_op (&optab
, target
, mem
, val
, false, model
, !after
);
7965 /* If the result isn't used, no need to do compensation code. */
7969 /* Issue compensation code. Fetch_after == fetch_before OP val.
7970 Fetch_before == after REVERSE_OP val. */
7972 code
= optab
.reverse_code
;
7975 result
= expand_simple_binop (mode
, AND
, result
, val
, NULL_RTX
,
7976 true, OPTAB_LIB_WIDEN
);
7977 result
= expand_simple_unop (mode
, NOT
, result
, target
, true);
7980 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
7981 true, OPTAB_LIB_WIDEN
);
7986 /* No direct opcode can be generated. */
7992 /* This function expands an atomic fetch_OP or OP_fetch operation:
7993 TARGET is an option place to stick the return value. const0_rtx indicates
7994 the result is unused.
7995 atomically fetch MEM, perform the operation with VAL and return it to MEM.
7996 CODE is the operation being performed (OP)
7997 MEMMODEL is the memory model variant to use.
7998 AFTER is true to return the result of the operation (OP_fetch).
7999 AFTER is false to return the value before the operation (fetch_OP). */
8001 expand_atomic_fetch_op (rtx target
, rtx mem
, rtx val
, enum rtx_code code
,
8002 enum memmodel model
, bool after
)
8004 enum machine_mode mode
= GET_MODE (mem
);
8006 bool unused_result
= (target
== const0_rtx
);
8008 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, val
, code
, model
,
8014 /* Add/sub can be implemented by doing the reverse operation with -(val). */
8015 if (code
== PLUS
|| code
== MINUS
)
8018 enum rtx_code reverse
= (code
== PLUS
? MINUS
: PLUS
);
8021 tmp
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, true);
8022 result
= expand_atomic_fetch_op_no_fallback (target
, mem
, tmp
, reverse
,
8026 /* PLUS worked so emit the insns and return. */
8033 /* PLUS did not work, so throw away the negation code and continue. */
8037 /* Try the __sync libcalls only if we can't do compare-and-swap inline. */
8038 if (!can_compare_and_swap_p (mode
, false))
8042 enum rtx_code orig_code
= code
;
8043 struct atomic_op_functions optab
;
8045 get_atomic_op_for_code (&optab
, code
);
8046 libfunc
= optab_libfunc (after
? optab
.fetch_after
8047 : optab
.fetch_before
, mode
);
8049 && (after
|| unused_result
|| optab
.reverse_code
!= UNKNOWN
))
8053 code
= optab
.reverse_code
;
8054 libfunc
= optab_libfunc (after
? optab
.fetch_before
8055 : optab
.fetch_after
, mode
);
8057 if (libfunc
!= NULL
)
8059 rtx addr
= convert_memory_address (ptr_mode
, XEXP (mem
, 0));
8060 result
= emit_library_call_value (libfunc
, NULL
, LCT_NORMAL
, mode
,
8061 2, addr
, ptr_mode
, val
, mode
);
8063 if (!unused_result
&& fixup
)
8064 result
= expand_simple_binop (mode
, code
, result
, val
, target
,
8065 true, OPTAB_LIB_WIDEN
);
8069 /* We need the original code for any further attempts. */
8073 /* If nothing else has succeeded, default to a compare and swap loop. */
8074 if (can_compare_and_swap_p (mode
, true))
8077 rtx t0
= gen_reg_rtx (mode
), t1
;
8081 /* If the result is used, get a register for it. */
8084 if (!target
|| !register_operand (target
, mode
))
8085 target
= gen_reg_rtx (mode
);
8086 /* If fetch_before, copy the value now. */
8088 emit_move_insn (target
, t0
);
8091 target
= const0_rtx
;
8096 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
8097 true, OPTAB_LIB_WIDEN
);
8098 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
8101 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
, true,
8104 /* For after, copy the value now. */
8105 if (!unused_result
&& after
)
8106 emit_move_insn (target
, t1
);
8107 insn
= get_insns ();
8110 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
8117 /* Return true if OPERAND is suitable for operand number OPNO of
8118 instruction ICODE. */
8121 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
8123 return (!insn_data
[(int) icode
].operand
[opno
].predicate
8124 || (insn_data
[(int) icode
].operand
[opno
].predicate
8125 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
8128 /* TARGET is a target of a multiword operation that we are going to
8129 implement as a series of word-mode operations. Return true if
8130 TARGET is suitable for this purpose. */
8133 valid_multiword_target_p (rtx target
)
8135 enum machine_mode mode
;
8138 mode
= GET_MODE (target
);
8139 for (i
= 0; i
< GET_MODE_SIZE (mode
); i
+= UNITS_PER_WORD
)
8140 if (!validate_subreg (word_mode
, mode
, target
, i
))
8145 /* Like maybe_legitimize_operand, but do not change the code of the
8146 current rtx value. */
8149 maybe_legitimize_operand_same_code (enum insn_code icode
, unsigned int opno
,
8150 struct expand_operand
*op
)
8152 /* See if the operand matches in its current form. */
8153 if (insn_operand_matches (icode
, opno
, op
->value
))
8156 /* If the operand is a memory whose address has no side effects,
8157 try forcing the address into a non-virtual pseudo register.
8158 The check for side effects is important because copy_to_mode_reg
8159 cannot handle things like auto-modified addresses. */
8160 if (insn_data
[(int) icode
].operand
[opno
].allows_mem
&& MEM_P (op
->value
))
8165 addr
= XEXP (mem
, 0);
8166 if (!(REG_P (addr
) && REGNO (addr
) > LAST_VIRTUAL_REGISTER
)
8167 && !side_effects_p (addr
))
8170 enum machine_mode mode
;
8172 last
= get_last_insn ();
8173 mode
= get_address_mode (mem
);
8174 mem
= replace_equiv_address (mem
, copy_to_mode_reg (mode
, addr
));
8175 if (insn_operand_matches (icode
, opno
, mem
))
8180 delete_insns_since (last
);
8187 /* Try to make OP match operand OPNO of instruction ICODE. Return true
8188 on success, storing the new operand value back in OP. */
8191 maybe_legitimize_operand (enum insn_code icode
, unsigned int opno
,
8192 struct expand_operand
*op
)
8194 enum machine_mode mode
, imode
;
8195 bool old_volatile_ok
, result
;
8201 old_volatile_ok
= volatile_ok
;
8203 result
= maybe_legitimize_operand_same_code (icode
, opno
, op
);
8204 volatile_ok
= old_volatile_ok
;
8208 gcc_assert (mode
!= VOIDmode
);
8210 && op
->value
!= const0_rtx
8211 && GET_MODE (op
->value
) == mode
8212 && maybe_legitimize_operand_same_code (icode
, opno
, op
))
8215 op
->value
= gen_reg_rtx (mode
);
8220 gcc_assert (mode
!= VOIDmode
);
8221 gcc_assert (GET_MODE (op
->value
) == VOIDmode
8222 || GET_MODE (op
->value
) == mode
);
8223 if (maybe_legitimize_operand_same_code (icode
, opno
, op
))
8226 op
->value
= copy_to_mode_reg (mode
, op
->value
);
8229 case EXPAND_CONVERT_TO
:
8230 gcc_assert (mode
!= VOIDmode
);
8231 op
->value
= convert_to_mode (mode
, op
->value
, op
->unsigned_p
);
8234 case EXPAND_CONVERT_FROM
:
8235 if (GET_MODE (op
->value
) != VOIDmode
)
8236 mode
= GET_MODE (op
->value
);
8238 /* The caller must tell us what mode this value has. */
8239 gcc_assert (mode
!= VOIDmode
);
8241 imode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8242 if (imode
!= VOIDmode
&& imode
!= mode
)
8244 op
->value
= convert_modes (imode
, mode
, op
->value
, op
->unsigned_p
);
8249 case EXPAND_ADDRESS
:
8250 gcc_assert (mode
!= VOIDmode
);
8251 op
->value
= convert_memory_address (mode
, op
->value
);
8254 case EXPAND_INTEGER
:
8255 mode
= insn_data
[(int) icode
].operand
[opno
].mode
;
8256 if (mode
!= VOIDmode
&& const_int_operand (op
->value
, mode
))
8260 return insn_operand_matches (icode
, opno
, op
->value
);
8263 /* Make OP describe an input operand that should have the same value
8264 as VALUE, after any mode conversion that the target might request.
8265 TYPE is the type of VALUE. */
8268 create_convert_operand_from_type (struct expand_operand
*op
,
8269 rtx value
, tree type
)
8271 create_convert_operand_from (op
, value
, TYPE_MODE (type
),
8272 TYPE_UNSIGNED (type
));
8275 /* Try to make operands [OPS, OPS + NOPS) match operands [OPNO, OPNO + NOPS)
8276 of instruction ICODE. Return true on success, leaving the new operand
8277 values in the OPS themselves. Emit no code on failure. */
8280 maybe_legitimize_operands (enum insn_code icode
, unsigned int opno
,
8281 unsigned int nops
, struct expand_operand
*ops
)
8286 last
= get_last_insn ();
8287 for (i
= 0; i
< nops
; i
++)
8288 if (!maybe_legitimize_operand (icode
, opno
+ i
, &ops
[i
]))
8290 delete_insns_since (last
);
8296 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
8297 as its operands. Return the instruction pattern on success,
8298 and emit any necessary set-up code. Return null and emit no
8302 maybe_gen_insn (enum insn_code icode
, unsigned int nops
,
8303 struct expand_operand
*ops
)
8305 gcc_assert (nops
== (unsigned int) insn_data
[(int) icode
].n_generator_args
);
8306 if (!maybe_legitimize_operands (icode
, 0, nops
, ops
))
8312 return GEN_FCN (icode
) (ops
[0].value
);
8314 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
);
8316 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
);
8318 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8321 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8322 ops
[3].value
, ops
[4].value
);
8324 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8325 ops
[3].value
, ops
[4].value
, ops
[5].value
);
8327 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8328 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8331 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8332 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8333 ops
[6].value
, ops
[7].value
);
8335 return GEN_FCN (icode
) (ops
[0].value
, ops
[1].value
, ops
[2].value
,
8336 ops
[3].value
, ops
[4].value
, ops
[5].value
,
8337 ops
[6].value
, ops
[7].value
, ops
[8].value
);
8342 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8343 as its operands. Return true on success and emit no code on failure. */
8346 maybe_expand_insn (enum insn_code icode
, unsigned int nops
,
8347 struct expand_operand
*ops
)
8349 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8358 /* Like maybe_expand_insn, but for jumps. */
8361 maybe_expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8362 struct expand_operand
*ops
)
8364 rtx pat
= maybe_gen_insn (icode
, nops
, ops
);
8367 emit_jump_insn (pat
);
8373 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8377 expand_insn (enum insn_code icode
, unsigned int nops
,
8378 struct expand_operand
*ops
)
8380 if (!maybe_expand_insn (icode
, nops
, ops
))
8384 /* Like expand_insn, but for jumps. */
8387 expand_jump_insn (enum insn_code icode
, unsigned int nops
,
8388 struct expand_operand
*ops
)
8390 if (!maybe_expand_jump_insn (icode
, nops
, ops
))
8394 /* Reduce conditional compilation elsewhere. */
8397 #define CODE_FOR_insv CODE_FOR_nothing
8401 #define CODE_FOR_extv CODE_FOR_nothing
8404 #define HAVE_extzv 0
8405 #define CODE_FOR_extzv CODE_FOR_nothing
8408 /* Enumerates the possible types of structure operand to an
8410 enum extraction_type
{ ET_unaligned_mem
, ET_reg
};
8412 /* Check whether insv, extv or extzv pattern ICODE can be used for an
8413 insertion or extraction of type TYPE on a structure of mode MODE.
8414 Return true if so and fill in *INSN accordingly. STRUCT_OP is the
8415 operand number of the structure (the first sign_extract or zero_extract
8416 operand) and FIELD_OP is the operand number of the field (the other
8417 side of the set from the sign_extract or zero_extract). */
8420 get_traditional_extraction_insn (extraction_insn
*insn
,
8421 enum extraction_type type
,
8422 enum machine_mode mode
,
8423 enum insn_code icode
,
8424 int struct_op
, int field_op
)
8426 const struct insn_data_d
*data
= &insn_data
[icode
];
8428 enum machine_mode struct_mode
= data
->operand
[struct_op
].mode
;
8429 if (struct_mode
== VOIDmode
)
8430 struct_mode
= word_mode
;
8431 if (mode
!= struct_mode
)
8434 enum machine_mode field_mode
= data
->operand
[field_op
].mode
;
8435 if (field_mode
== VOIDmode
)
8436 field_mode
= word_mode
;
8438 enum machine_mode pos_mode
= data
->operand
[struct_op
+ 2].mode
;
8439 if (pos_mode
== VOIDmode
)
8440 pos_mode
= word_mode
;
8442 insn
->icode
= icode
;
8443 insn
->field_mode
= field_mode
;
8444 insn
->struct_mode
= (type
== ET_unaligned_mem
? byte_mode
: struct_mode
);
8445 insn
->pos_mode
= pos_mode
;
8449 /* Return true if an optab exists to perform an insertion or extraction
8450 of type TYPE in mode MODE. Describe the instruction in *INSN if so.
8452 REG_OPTAB is the optab to use for register structures and
8453 MISALIGN_OPTAB is the optab to use for misaligned memory structures.
8454 POS_OP is the operand number of the bit position. */
8457 get_optab_extraction_insn (struct extraction_insn
*insn
,
8458 enum extraction_type type
,
8459 enum machine_mode mode
, direct_optab reg_optab
,
8460 direct_optab misalign_optab
, int pos_op
)
8462 direct_optab optab
= (type
== ET_unaligned_mem
? misalign_optab
: reg_optab
);
8463 enum insn_code icode
= direct_optab_handler (optab
, mode
);
8464 if (icode
== CODE_FOR_nothing
)
8467 const struct insn_data_d
*data
= &insn_data
[icode
];
8469 insn
->icode
= icode
;
8470 insn
->field_mode
= mode
;
8471 insn
->struct_mode
= (type
== ET_unaligned_mem
? BLKmode
: mode
);
8472 insn
->pos_mode
= data
->operand
[pos_op
].mode
;
8473 if (insn
->pos_mode
== VOIDmode
)
8474 insn
->pos_mode
= word_mode
;
8478 /* Return true if an instruction exists to perform an insertion or
8479 extraction (PATTERN says which) of type TYPE in mode MODE.
8480 Describe the instruction in *INSN if so. */
8483 get_extraction_insn (extraction_insn
*insn
,
8484 enum extraction_pattern pattern
,
8485 enum extraction_type type
,
8486 enum machine_mode mode
)
8492 && get_traditional_extraction_insn (insn
, type
, mode
,
8493 CODE_FOR_insv
, 0, 3))
8495 return get_optab_extraction_insn (insn
, type
, mode
, insv_optab
,
8496 insvmisalign_optab
, 2);
8500 && get_traditional_extraction_insn (insn
, type
, mode
,
8501 CODE_FOR_extv
, 1, 0))
8503 return get_optab_extraction_insn (insn
, type
, mode
, extv_optab
,
8504 extvmisalign_optab
, 3);
8508 && get_traditional_extraction_insn (insn
, type
, mode
,
8509 CODE_FOR_extzv
, 1, 0))
8511 return get_optab_extraction_insn (insn
, type
, mode
, extzv_optab
,
8512 extzvmisalign_optab
, 3);
8519 /* Return true if an instruction exists to access a field of mode
8520 FIELDMODE in a structure that has STRUCT_BITS significant bits.
8521 Describe the "best" such instruction in *INSN if so. PATTERN and
8522 TYPE describe the type of insertion or extraction we want to perform.
8524 For an insertion, the number of significant structure bits includes
8525 all bits of the target. For an extraction, it need only include the
8526 most significant bit of the field. Larger widths are acceptable
8530 get_best_extraction_insn (extraction_insn
*insn
,
8531 enum extraction_pattern pattern
,
8532 enum extraction_type type
,
8533 unsigned HOST_WIDE_INT struct_bits
,
8534 enum machine_mode field_mode
)
8536 enum machine_mode mode
= smallest_mode_for_size (struct_bits
, MODE_INT
);
8537 while (mode
!= VOIDmode
)
8539 if (get_extraction_insn (insn
, pattern
, type
, mode
))
8541 while (mode
!= VOIDmode
8542 && GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (field_mode
)
8543 && !TRULY_NOOP_TRUNCATION_MODES_P (insn
->field_mode
,
8546 get_extraction_insn (insn
, pattern
, type
, mode
);
8547 mode
= GET_MODE_WIDER_MODE (mode
);
8551 mode
= GET_MODE_WIDER_MODE (mode
);
8556 /* Return true if an instruction exists to access a field of mode
8557 FIELDMODE in a register structure that has STRUCT_BITS significant bits.
8558 Describe the "best" such instruction in *INSN if so. PATTERN describes
8559 the type of insertion or extraction we want to perform.
8561 For an insertion, the number of significant structure bits includes
8562 all bits of the target. For an extraction, it need only include the
8563 most significant bit of the field. Larger widths are acceptable
8567 get_best_reg_extraction_insn (extraction_insn
*insn
,
8568 enum extraction_pattern pattern
,
8569 unsigned HOST_WIDE_INT struct_bits
,
8570 enum machine_mode field_mode
)
8572 return get_best_extraction_insn (insn
, pattern
, ET_reg
, struct_bits
,
8576 /* Return true if an instruction exists to access a field of BITSIZE
8577 bits starting BITNUM bits into a memory structure. Describe the
8578 "best" such instruction in *INSN if so. PATTERN describes the type
8579 of insertion or extraction we want to perform and FIELDMODE is the
8580 natural mode of the extracted field.
8582 The instructions considered here only access bytes that overlap
8583 the bitfield; they do not touch any surrounding bytes. */
8586 get_best_mem_extraction_insn (extraction_insn
*insn
,
8587 enum extraction_pattern pattern
,
8588 HOST_WIDE_INT bitsize
, HOST_WIDE_INT bitnum
,
8589 enum machine_mode field_mode
)
8591 unsigned HOST_WIDE_INT struct_bits
= (bitnum
% BITS_PER_UNIT
8593 + BITS_PER_UNIT
- 1);
8594 struct_bits
-= struct_bits
% BITS_PER_UNIT
;
8595 return get_best_extraction_insn (insn
, pattern
, ET_unaligned_mem
,
8596 struct_bits
, field_mode
);
8599 #include "gt-optabs.h"