1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
47 /* Each optab contains info on how this target machine
48 can perform a particular operation
49 for all sizes and kinds of operands.
51 The operation to be performed is often specified
52 by passing one of these optabs as an argument.
54 See expr.h for documentation of these optabs. */
56 optab optab_table
[OTI_MAX
];
58 rtx libfunc_table
[LTI_MAX
];
60 /* Tables of patterns for extending one integer mode to another. */
61 enum insn_code extendtab
[MAX_MACHINE_MODE
][MAX_MACHINE_MODE
][2];
63 /* Tables of patterns for converting between fixed and floating point. */
64 enum insn_code fixtab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
65 enum insn_code fixtrunctab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
66 enum insn_code floattab
[NUM_MACHINE_MODES
][NUM_MACHINE_MODES
][2];
68 /* Contains the optab used for each rtx code. */
69 optab code_to_optab
[NUM_RTX_CODE
+ 1];
71 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
72 gives the gen_function to make a branch to test that condition. */
74 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
76 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
77 gives the insn code to make a store-condition insn
78 to test that condition. */
80 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
82 #ifdef HAVE_conditional_move
83 /* Indexed by the machine mode, gives the insn code to make a conditional
84 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
85 setcc_gen_code to cut down on the number of named patterns. Consider a day
86 when a lot more rtx codes are conditional (eg: for the ARM). */
88 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
91 static int add_equal_note
PARAMS ((rtx
, rtx
, enum rtx_code
, rtx
, rtx
));
92 static rtx widen_operand
PARAMS ((rtx
, enum machine_mode
,
93 enum machine_mode
, int, int));
94 static int expand_cmplxdiv_straight
PARAMS ((rtx
, rtx
, rtx
, rtx
,
95 rtx
, rtx
, enum machine_mode
,
96 int, enum optab_methods
,
97 enum mode_class
, optab
));
98 static int expand_cmplxdiv_wide
PARAMS ((rtx
, rtx
, rtx
, rtx
,
99 rtx
, rtx
, enum machine_mode
,
100 int, enum optab_methods
,
101 enum mode_class
, optab
));
102 static void prepare_cmp_insn
PARAMS ((rtx
*, rtx
*, enum rtx_code
*, rtx
,
103 enum machine_mode
*, int *,
104 enum can_compare_purpose
));
105 static enum insn_code can_fix_p
PARAMS ((enum machine_mode
, enum machine_mode
,
107 static enum insn_code can_float_p
PARAMS ((enum machine_mode
,
110 static rtx ftruncify
PARAMS ((rtx
));
111 static optab new_optab
PARAMS ((void));
112 static inline optab init_optab
PARAMS ((enum rtx_code
));
113 static inline optab init_optabv
PARAMS ((enum rtx_code
));
114 static void init_libfuncs
PARAMS ((optab
, int, int, const char *, int));
115 static void init_integral_libfuncs
PARAMS ((optab
, const char *, int));
116 static void init_floating_libfuncs
PARAMS ((optab
, const char *, int));
117 #ifdef HAVE_conditional_trap
118 static void init_traps
PARAMS ((void));
120 static void emit_cmp_and_jump_insn_1
PARAMS ((rtx
, rtx
, enum machine_mode
,
121 enum rtx_code
, int, rtx
));
122 static void prepare_float_lib_cmp
PARAMS ((rtx
*, rtx
*, enum rtx_code
*,
123 enum machine_mode
*, int *));
124 static rtx expand_vector_binop
PARAMS ((enum machine_mode
, optab
,
126 enum optab_methods
));
127 static rtx expand_vector_unop
PARAMS ((enum machine_mode
, optab
, rtx
, rtx
,
129 static rtx widen_clz
PARAMS ((enum machine_mode
, rtx
, rtx
));
130 static rtx expand_parity
PARAMS ((enum machine_mode
, rtx
, rtx
));
132 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
133 the result of operation CODE applied to OP0 (and OP1 if it is a binary
136 If the last insn does not set TARGET, don't do anything, but return 1.
138 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
139 don't add the REG_EQUAL note but return 0. Our caller can then try
140 again, ensuring that TARGET is not one of the operands. */
143 add_equal_note (insns
, target
, code
, op0
, op1
)
149 rtx last_insn
, insn
, set
;
154 || NEXT_INSN (insns
) == NULL_RTX
)
157 if (GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
158 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
161 if (GET_CODE (target
) == ZERO_EXTRACT
)
164 for (last_insn
= insns
;
165 NEXT_INSN (last_insn
) != NULL_RTX
;
166 last_insn
= NEXT_INSN (last_insn
))
169 set
= single_set (last_insn
);
173 if (! rtx_equal_p (SET_DEST (set
), target
)
174 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
175 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
176 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
179 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
180 besides the last insn. */
181 if (reg_overlap_mentioned_p (target
, op0
)
182 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
184 insn
= PREV_INSN (last_insn
);
185 while (insn
!= NULL_RTX
)
187 if (reg_set_p (target
, insn
))
190 insn
= PREV_INSN (insn
);
194 if (GET_RTX_CLASS (code
) == '1')
195 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
197 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
199 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
204 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
205 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
206 not actually do a sign-extend or zero-extend, but can leave the
207 higher-order bits of the result rtx undefined, for example, in the case
208 of logical operations, but not right shifts. */
211 widen_operand (op
, mode
, oldmode
, unsignedp
, no_extend
)
213 enum machine_mode mode
, oldmode
;
219 /* If we don't have to extend and this is a constant, return it. */
220 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
223 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
224 extend since it will be more efficient to do so unless the signedness of
225 a promoted object differs from our extension. */
227 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
228 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
229 return convert_modes (mode
, oldmode
, op
, unsignedp
);
231 /* If MODE is no wider than a single word, we return a paradoxical
233 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
234 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
236 /* Otherwise, get an object of MODE, clobber it, and set the low-order
239 result
= gen_reg_rtx (mode
);
240 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
241 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
245 /* Generate code to perform a straightforward complex divide. */
248 expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
249 unsignedp
, methods
, class, binoptab
)
250 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
251 enum machine_mode submode
;
253 enum optab_methods methods
;
254 enum mode_class
class;
261 optab this_add_optab
= add_optab
;
262 optab this_sub_optab
= sub_optab
;
263 optab this_neg_optab
= neg_optab
;
264 optab this_mul_optab
= smul_optab
;
266 if (binoptab
== sdivv_optab
)
268 this_add_optab
= addv_optab
;
269 this_sub_optab
= subv_optab
;
270 this_neg_optab
= negv_optab
;
271 this_mul_optab
= smulv_optab
;
274 /* Don't fetch these from memory more than once. */
275 real0
= force_reg (submode
, real0
);
276 real1
= force_reg (submode
, real1
);
279 imag0
= force_reg (submode
, imag0
);
281 imag1
= force_reg (submode
, imag1
);
283 /* Divisor: c*c + d*d. */
284 temp1
= expand_binop (submode
, this_mul_optab
, real1
, real1
,
285 NULL_RTX
, unsignedp
, methods
);
287 temp2
= expand_binop (submode
, this_mul_optab
, imag1
, imag1
,
288 NULL_RTX
, unsignedp
, methods
);
290 if (temp1
== 0 || temp2
== 0)
293 divisor
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
294 NULL_RTX
, unsignedp
, methods
);
300 /* Mathematically, ((a)(c-id))/divisor. */
301 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
303 /* Calculate the dividend. */
304 real_t
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
305 NULL_RTX
, unsignedp
, methods
);
307 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
308 NULL_RTX
, unsignedp
, methods
);
310 if (real_t
== 0 || imag_t
== 0)
313 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
314 NULL_RTX
, unsignedp
);
318 /* Mathematically, ((a+ib)(c-id))/divider. */
319 /* Calculate the dividend. */
320 temp1
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
321 NULL_RTX
, unsignedp
, methods
);
323 temp2
= expand_binop (submode
, this_mul_optab
, imag0
, imag1
,
324 NULL_RTX
, unsignedp
, methods
);
326 if (temp1
== 0 || temp2
== 0)
329 real_t
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
330 NULL_RTX
, unsignedp
, methods
);
332 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, real1
,
333 NULL_RTX
, unsignedp
, methods
);
335 temp2
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
336 NULL_RTX
, unsignedp
, methods
);
338 if (temp1
== 0 || temp2
== 0)
341 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, temp2
,
342 NULL_RTX
, unsignedp
, methods
);
344 if (real_t
== 0 || imag_t
== 0)
348 if (class == MODE_COMPLEX_FLOAT
)
349 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
350 realr
, unsignedp
, methods
);
352 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
353 real_t
, divisor
, realr
, unsignedp
);
359 emit_move_insn (realr
, res
);
361 if (class == MODE_COMPLEX_FLOAT
)
362 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
363 imagr
, unsignedp
, methods
);
365 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
366 imag_t
, divisor
, imagr
, unsignedp
);
372 emit_move_insn (imagr
, res
);
377 /* Generate code to perform a wide-input-range-acceptable complex divide. */
380 expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
, realr
, imagr
, submode
,
381 unsignedp
, methods
, class, binoptab
)
382 rtx real0
, real1
, imag0
, imag1
, realr
, imagr
;
383 enum machine_mode submode
;
385 enum optab_methods methods
;
386 enum mode_class
class;
391 rtx temp1
, temp2
, lab1
, lab2
;
392 enum machine_mode mode
;
394 optab this_add_optab
= add_optab
;
395 optab this_sub_optab
= sub_optab
;
396 optab this_neg_optab
= neg_optab
;
397 optab this_mul_optab
= smul_optab
;
399 if (binoptab
== sdivv_optab
)
401 this_add_optab
= addv_optab
;
402 this_sub_optab
= subv_optab
;
403 this_neg_optab
= negv_optab
;
404 this_mul_optab
= smulv_optab
;
407 /* Don't fetch these from memory more than once. */
408 real0
= force_reg (submode
, real0
);
409 real1
= force_reg (submode
, real1
);
412 imag0
= force_reg (submode
, imag0
);
414 imag1
= force_reg (submode
, imag1
);
416 /* XXX What's an "unsigned" complex number? */
424 temp1
= expand_abs (submode
, real1
, NULL_RTX
, unsignedp
, 1);
425 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, unsignedp
, 1);
428 if (temp1
== 0 || temp2
== 0)
431 mode
= GET_MODE (temp1
);
432 lab1
= gen_label_rtx ();
433 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
434 mode
, unsignedp
, lab1
);
436 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
438 if (class == MODE_COMPLEX_FLOAT
)
439 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
440 NULL_RTX
, unsignedp
, methods
);
442 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
443 imag1
, real1
, NULL_RTX
, unsignedp
);
448 /* Calculate divisor. */
450 temp1
= expand_binop (submode
, this_mul_optab
, imag1
, ratio
,
451 NULL_RTX
, unsignedp
, methods
);
456 divisor
= expand_binop (submode
, this_add_optab
, temp1
, real1
,
457 NULL_RTX
, unsignedp
, methods
);
462 /* Calculate dividend. */
468 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
470 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
471 NULL_RTX
, unsignedp
, methods
);
476 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
477 NULL_RTX
, unsignedp
);
479 if (real_t
== 0 || imag_t
== 0)
484 /* Compute (a+ib)/(c+id) as
485 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
487 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
488 NULL_RTX
, unsignedp
, methods
);
493 real_t
= expand_binop (submode
, this_add_optab
, temp1
, real0
,
494 NULL_RTX
, unsignedp
, methods
);
496 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
497 NULL_RTX
, unsignedp
, methods
);
502 imag_t
= expand_binop (submode
, this_sub_optab
, imag0
, temp1
,
503 NULL_RTX
, unsignedp
, methods
);
505 if (real_t
== 0 || imag_t
== 0)
509 if (class == MODE_COMPLEX_FLOAT
)
510 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
511 realr
, unsignedp
, methods
);
513 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
514 real_t
, divisor
, realr
, unsignedp
);
520 emit_move_insn (realr
, res
);
522 if (class == MODE_COMPLEX_FLOAT
)
523 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
524 imagr
, unsignedp
, methods
);
526 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
527 imag_t
, divisor
, imagr
, unsignedp
);
533 emit_move_insn (imagr
, res
);
535 lab2
= gen_label_rtx ();
536 emit_jump_insn (gen_jump (lab2
));
541 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
543 if (class == MODE_COMPLEX_FLOAT
)
544 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
545 NULL_RTX
, unsignedp
, methods
);
547 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
548 real1
, imag1
, NULL_RTX
, unsignedp
);
553 /* Calculate divisor. */
555 temp1
= expand_binop (submode
, this_mul_optab
, real1
, ratio
,
556 NULL_RTX
, unsignedp
, methods
);
561 divisor
= expand_binop (submode
, this_add_optab
, temp1
, imag1
,
562 NULL_RTX
, unsignedp
, methods
);
567 /* Calculate dividend. */
571 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
573 real_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
574 NULL_RTX
, unsignedp
, methods
);
576 imag_t
= expand_unop (submode
, this_neg_optab
, real0
,
577 NULL_RTX
, unsignedp
);
579 if (real_t
== 0 || imag_t
== 0)
584 /* Compute (a+ib)/(c+id) as
585 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
587 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
588 NULL_RTX
, unsignedp
, methods
);
593 real_t
= expand_binop (submode
, this_add_optab
, temp1
, imag0
,
594 NULL_RTX
, unsignedp
, methods
);
596 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
597 NULL_RTX
, unsignedp
, methods
);
602 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, real0
,
603 NULL_RTX
, unsignedp
, methods
);
605 if (real_t
== 0 || imag_t
== 0)
609 if (class == MODE_COMPLEX_FLOAT
)
610 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
611 realr
, unsignedp
, methods
);
613 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
614 real_t
, divisor
, realr
, unsignedp
);
620 emit_move_insn (realr
, res
);
622 if (class == MODE_COMPLEX_FLOAT
)
623 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
624 imagr
, unsignedp
, methods
);
626 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
627 imag_t
, divisor
, imagr
, unsignedp
);
633 emit_move_insn (imagr
, res
);
640 /* Wrapper around expand_binop which takes an rtx code to specify
641 the operation to perform, not an optab pointer. All other
642 arguments are the same. */
644 expand_simple_binop (mode
, code
, op0
, op1
, target
, unsignedp
, methods
)
645 enum machine_mode mode
;
650 enum optab_methods methods
;
652 optab binop
= code_to_optab
[(int) code
];
656 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
659 /* Generate code to perform an operation specified by BINOPTAB
660 on operands OP0 and OP1, with result having machine-mode MODE.
662 UNSIGNEDP is for the case where we have to widen the operands
663 to perform the operation. It says to use zero-extension.
665 If TARGET is nonzero, the value
666 is generated there, if it is convenient to do so.
667 In all cases an rtx is returned for the locus of the value;
668 this may or may not be TARGET. */
671 expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
672 enum machine_mode mode
;
677 enum optab_methods methods
;
679 enum optab_methods next_methods
680 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
681 ? OPTAB_WIDEN
: methods
);
682 enum mode_class
class;
683 enum machine_mode wider_mode
;
685 int commutative_op
= 0;
686 int shift_op
= (binoptab
->code
== ASHIFT
687 || binoptab
->code
== ASHIFTRT
688 || binoptab
->code
== LSHIFTRT
689 || binoptab
->code
== ROTATE
690 || binoptab
->code
== ROTATERT
);
691 rtx entry_last
= get_last_insn ();
694 class = GET_MODE_CLASS (mode
);
696 op0
= protect_from_queue (op0
, 0);
697 op1
= protect_from_queue (op1
, 0);
699 target
= protect_from_queue (target
, 1);
703 op0
= force_not_mem (op0
);
704 op1
= force_not_mem (op1
);
707 /* If subtracting an integer constant, convert this into an addition of
708 the negated constant. */
710 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
712 op1
= negate_rtx (mode
, op1
);
713 binoptab
= add_optab
;
716 /* If we are inside an appropriately-short loop and one operand is an
717 expensive constant, force it into a register. */
718 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
719 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
720 op0
= force_reg (mode
, op0
);
722 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
723 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
724 op1
= force_reg (mode
, op1
);
726 /* Record where to delete back to if we backtrack. */
727 last
= get_last_insn ();
729 /* If operation is commutative,
730 try to make the first operand a register.
731 Even better, try to make it the same as the target.
732 Also try to make the last operand a constant. */
733 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
734 || binoptab
== smul_widen_optab
735 || binoptab
== umul_widen_optab
736 || binoptab
== smul_highpart_optab
737 || binoptab
== umul_highpart_optab
)
741 if (((target
== 0 || GET_CODE (target
) == REG
)
742 ? ((GET_CODE (op1
) == REG
743 && GET_CODE (op0
) != REG
)
745 : rtx_equal_p (op1
, target
))
746 || GET_CODE (op0
) == CONST_INT
)
754 /* If we can do it with a three-operand insn, do so. */
756 if (methods
!= OPTAB_MUST_WIDEN
757 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
759 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
760 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
761 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
763 rtx xop0
= op0
, xop1
= op1
;
768 temp
= gen_reg_rtx (mode
);
770 /* If it is a commutative operator and the modes would match
771 if we would swap the operands, we can save the conversions. */
774 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
775 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
779 tmp
= op0
; op0
= op1
; op1
= tmp
;
780 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
784 /* In case the insn wants input operands in modes different from
785 those of the actual operands, convert the operands. It would
786 seem that we don't need to convert CONST_INTs, but we do, so
787 that they're properly zero-extended, sign-extended or truncated
790 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
791 xop0
= convert_modes (mode0
,
792 GET_MODE (op0
) != VOIDmode
797 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
798 xop1
= convert_modes (mode1
,
799 GET_MODE (op1
) != VOIDmode
804 /* Now, if insn's predicates don't allow our operands, put them into
807 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
808 && mode0
!= VOIDmode
)
809 xop0
= copy_to_mode_reg (mode0
, xop0
);
811 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
812 && mode1
!= VOIDmode
)
813 xop1
= copy_to_mode_reg (mode1
, xop1
);
815 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
816 temp
= gen_reg_rtx (mode
);
818 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
821 /* If PAT is composed of more than one insn, try to add an appropriate
822 REG_EQUAL note to it. If we can't because TEMP conflicts with an
823 operand, call ourselves again, this time without a target. */
824 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
825 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
827 delete_insns_since (last
);
828 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
836 delete_insns_since (last
);
839 /* If this is a multiply, see if we can do a widening operation that
840 takes operands of this mode and makes a wider mode. */
842 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
843 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
844 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
845 != CODE_FOR_nothing
))
847 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
848 unsignedp
? umul_widen_optab
: smul_widen_optab
,
849 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
853 if (GET_MODE_CLASS (mode
) == MODE_INT
)
854 return gen_lowpart (mode
, temp
);
856 return convert_to_mode (mode
, temp
, unsignedp
);
860 /* Look for a wider mode of the same class for which we think we
861 can open-code the operation. Check for a widening multiply at the
862 wider mode as well. */
864 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
865 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
866 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
867 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
869 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
870 || (binoptab
== smul_optab
871 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
872 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
873 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
874 != CODE_FOR_nothing
)))
876 rtx xop0
= op0
, xop1
= op1
;
879 /* For certain integer operations, we need not actually extend
880 the narrow operands, as long as we will truncate
881 the results to the same narrowness. */
883 if ((binoptab
== ior_optab
|| binoptab
== and_optab
884 || binoptab
== xor_optab
885 || binoptab
== add_optab
|| binoptab
== sub_optab
886 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
887 && class == MODE_INT
)
890 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
892 /* The second operand of a shift must always be extended. */
893 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
894 no_extend
&& binoptab
!= ashl_optab
);
896 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
897 unsignedp
, OPTAB_DIRECT
);
900 if (class != MODE_INT
)
903 target
= gen_reg_rtx (mode
);
904 convert_move (target
, temp
, 0);
908 return gen_lowpart (mode
, temp
);
911 delete_insns_since (last
);
915 /* These can be done a word at a time. */
916 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
918 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
919 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
925 /* If TARGET is the same as one of the operands, the REG_EQUAL note
926 won't be accurate, so use a new target. */
927 if (target
== 0 || target
== op0
|| target
== op1
)
928 target
= gen_reg_rtx (mode
);
932 /* Do the actual arithmetic. */
933 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
935 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
936 rtx x
= expand_binop (word_mode
, binoptab
,
937 operand_subword_force (op0
, i
, mode
),
938 operand_subword_force (op1
, i
, mode
),
939 target_piece
, unsignedp
, next_methods
);
944 if (target_piece
!= x
)
945 emit_move_insn (target_piece
, x
);
948 insns
= get_insns ();
951 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
953 if (binoptab
->code
!= UNKNOWN
)
955 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
956 copy_rtx (op0
), copy_rtx (op1
));
960 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
965 /* Synthesize double word shifts from single word shifts. */
966 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
967 || binoptab
== ashr_optab
)
969 && GET_CODE (op1
) == CONST_INT
970 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
971 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
972 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
973 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
975 rtx insns
, inter
, equiv_value
;
976 rtx into_target
, outof_target
;
977 rtx into_input
, outof_input
;
978 int shift_count
, left_shift
, outof_word
;
980 /* If TARGET is the same as one of the operands, the REG_EQUAL note
981 won't be accurate, so use a new target. */
982 if (target
== 0 || target
== op0
|| target
== op1
)
983 target
= gen_reg_rtx (mode
);
987 shift_count
= INTVAL (op1
);
989 /* OUTOF_* is the word we are shifting bits away from, and
990 INTO_* is the word that we are shifting bits towards, thus
991 they differ depending on the direction of the shift and
994 left_shift
= binoptab
== ashl_optab
;
995 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
997 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
998 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1000 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1001 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1003 if (shift_count
>= BITS_PER_WORD
)
1005 inter
= expand_binop (word_mode
, binoptab
,
1007 GEN_INT (shift_count
- BITS_PER_WORD
),
1008 into_target
, unsignedp
, next_methods
);
1010 if (inter
!= 0 && inter
!= into_target
)
1011 emit_move_insn (into_target
, inter
);
1013 /* For a signed right shift, we must fill the word we are shifting
1014 out of with copies of the sign bit. Otherwise it is zeroed. */
1015 if (inter
!= 0 && binoptab
!= ashr_optab
)
1016 inter
= CONST0_RTX (word_mode
);
1017 else if (inter
!= 0)
1018 inter
= expand_binop (word_mode
, binoptab
,
1020 GEN_INT (BITS_PER_WORD
- 1),
1021 outof_target
, unsignedp
, next_methods
);
1023 if (inter
!= 0 && inter
!= outof_target
)
1024 emit_move_insn (outof_target
, inter
);
1029 optab reverse_unsigned_shift
, unsigned_shift
;
1031 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1032 we must do a logical shift in the opposite direction of the
1035 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
1037 /* For a shift of less than BITS_PER_WORD, to compute the word
1038 shifted towards, we need to unsigned shift the orig value of
1041 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
1043 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
1045 GEN_INT (BITS_PER_WORD
- shift_count
),
1046 0, unsignedp
, next_methods
);
1051 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
1052 op1
, 0, unsignedp
, next_methods
);
1055 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
1056 into_target
, unsignedp
, next_methods
);
1058 if (inter
!= 0 && inter
!= into_target
)
1059 emit_move_insn (into_target
, inter
);
1062 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
1063 op1
, outof_target
, unsignedp
, next_methods
);
1065 if (inter
!= 0 && inter
!= outof_target
)
1066 emit_move_insn (outof_target
, inter
);
1069 insns
= get_insns ();
1074 if (binoptab
->code
!= UNKNOWN
)
1075 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1079 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1084 /* Synthesize double word rotates from single word shifts. */
1085 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1086 && class == MODE_INT
1087 && GET_CODE (op1
) == CONST_INT
1088 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1089 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1090 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1092 rtx insns
, equiv_value
;
1093 rtx into_target
, outof_target
;
1094 rtx into_input
, outof_input
;
1096 int shift_count
, left_shift
, outof_word
;
1098 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1099 won't be accurate, so use a new target. */
1100 if (target
== 0 || target
== op0
|| target
== op1
)
1101 target
= gen_reg_rtx (mode
);
1105 shift_count
= INTVAL (op1
);
1107 /* OUTOF_* is the word we are shifting bits away from, and
1108 INTO_* is the word that we are shifting bits towards, thus
1109 they differ depending on the direction of the shift and
1110 WORDS_BIG_ENDIAN. */
1112 left_shift
= (binoptab
== rotl_optab
);
1113 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1115 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1116 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1118 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1119 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1121 if (shift_count
== BITS_PER_WORD
)
1123 /* This is just a word swap. */
1124 emit_move_insn (outof_target
, into_input
);
1125 emit_move_insn (into_target
, outof_input
);
1130 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1131 rtx first_shift_count
, second_shift_count
;
1132 optab reverse_unsigned_shift
, unsigned_shift
;
1134 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1135 ? lshr_optab
: ashl_optab
);
1137 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1138 ? ashl_optab
: lshr_optab
);
1140 if (shift_count
> BITS_PER_WORD
)
1142 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1143 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1147 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1148 second_shift_count
= GEN_INT (shift_count
);
1151 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1152 outof_input
, first_shift_count
,
1153 NULL_RTX
, unsignedp
, next_methods
);
1154 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1155 into_input
, second_shift_count
,
1156 NULL_RTX
, unsignedp
, next_methods
);
1158 if (into_temp1
!= 0 && into_temp2
!= 0)
1159 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1160 into_target
, unsignedp
, next_methods
);
1164 if (inter
!= 0 && inter
!= into_target
)
1165 emit_move_insn (into_target
, inter
);
1167 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1168 into_input
, first_shift_count
,
1169 NULL_RTX
, unsignedp
, next_methods
);
1170 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1171 outof_input
, second_shift_count
,
1172 NULL_RTX
, unsignedp
, next_methods
);
1174 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1175 inter
= expand_binop (word_mode
, ior_optab
,
1176 outof_temp1
, outof_temp2
,
1177 outof_target
, unsignedp
, next_methods
);
1179 if (inter
!= 0 && inter
!= outof_target
)
1180 emit_move_insn (outof_target
, inter
);
1183 insns
= get_insns ();
1188 if (binoptab
->code
!= UNKNOWN
)
1189 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1193 /* We can't make this a no conflict block if this is a word swap,
1194 because the word swap case fails if the input and output values
1195 are in the same register. */
1196 if (shift_count
!= BITS_PER_WORD
)
1197 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1206 /* These can be done a word at a time by propagating carries. */
1207 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1208 && class == MODE_INT
1209 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1210 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1213 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1214 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1215 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1216 rtx xop0
, xop1
, xtarget
;
1218 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1219 value is one of those, use it. Otherwise, use 1 since it is the
1220 one easiest to get. */
1221 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1222 int normalizep
= STORE_FLAG_VALUE
;
1227 /* Prepare the operands. */
1228 xop0
= force_reg (mode
, op0
);
1229 xop1
= force_reg (mode
, op1
);
1231 xtarget
= gen_reg_rtx (mode
);
1233 if (target
== 0 || GET_CODE (target
) != REG
)
1236 /* Indicate for flow that the entire target reg is being set. */
1237 if (GET_CODE (target
) == REG
)
1238 emit_insn (gen_rtx_CLOBBER (VOIDmode
, xtarget
));
1240 /* Do the actual arithmetic. */
1241 for (i
= 0; i
< nwords
; i
++)
1243 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1244 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1245 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1246 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1249 /* Main add/subtract of the input operands. */
1250 x
= expand_binop (word_mode
, binoptab
,
1251 op0_piece
, op1_piece
,
1252 target_piece
, unsignedp
, next_methods
);
1258 /* Store carry from main add/subtract. */
1259 carry_out
= gen_reg_rtx (word_mode
);
1260 carry_out
= emit_store_flag_force (carry_out
,
1261 (binoptab
== add_optab
1264 word_mode
, 1, normalizep
);
1271 /* Add/subtract previous carry to main result. */
1272 newx
= expand_binop (word_mode
,
1273 normalizep
== 1 ? binoptab
: otheroptab
,
1275 NULL_RTX
, 1, next_methods
);
1279 /* Get out carry from adding/subtracting carry in. */
1280 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1281 carry_tmp
= emit_store_flag_force (carry_tmp
,
1282 (binoptab
== add_optab
1285 word_mode
, 1, normalizep
);
1287 /* Logical-ior the two poss. carry together. */
1288 carry_out
= expand_binop (word_mode
, ior_optab
,
1289 carry_out
, carry_tmp
,
1290 carry_out
, 0, next_methods
);
1294 emit_move_insn (target_piece
, newx
);
1297 carry_in
= carry_out
;
1300 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
1302 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1304 rtx temp
= emit_move_insn (target
, xtarget
);
1306 set_unique_reg_note (temp
,
1308 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1319 delete_insns_since (last
);
1322 /* If we want to multiply two two-word values and have normal and widening
1323 multiplies of single-word values, we can do this with three smaller
1324 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1325 because we are not operating on one word at a time.
1327 The multiplication proceeds as follows:
1328 _______________________
1329 [__op0_high_|__op0_low__]
1330 _______________________
1331 * [__op1_high_|__op1_low__]
1332 _______________________________________________
1333 _______________________
1334 (1) [__op0_low__*__op1_low__]
1335 _______________________
1336 (2a) [__op0_low__*__op1_high_]
1337 _______________________
1338 (2b) [__op0_high_*__op1_low__]
1339 _______________________
1340 (3) [__op0_high_*__op1_high_]
1343 This gives a 4-word result. Since we are only interested in the
1344 lower 2 words, partial result (3) and the upper words of (2a) and
1345 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1346 calculated using non-widening multiplication.
1348 (1), however, needs to be calculated with an unsigned widening
1349 multiplication. If this operation is not directly supported we
1350 try using a signed widening multiplication and adjust the result.
1351 This adjustment works as follows:
1353 If both operands are positive then no adjustment is needed.
1355 If the operands have different signs, for example op0_low < 0 and
1356 op1_low >= 0, the instruction treats the most significant bit of
1357 op0_low as a sign bit instead of a bit with significance
1358 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1359 with 2**BITS_PER_WORD - op0_low, and two's complements the
1360 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1363 Similarly, if both operands are negative, we need to add
1364 (op0_low + op1_low) * 2**BITS_PER_WORD.
1366 We use a trick to adjust quickly. We logically shift op0_low right
1367 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1368 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1369 logical shift exists, we do an arithmetic right shift and subtract
1372 if (binoptab
== smul_optab
1373 && class == MODE_INT
1374 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1375 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1376 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1377 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1378 != CODE_FOR_nothing
)
1379 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1380 != CODE_FOR_nothing
)))
1382 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1383 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1384 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1385 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1386 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1387 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1389 rtx op0_xhigh
= NULL_RTX
;
1390 rtx op1_xhigh
= NULL_RTX
;
1392 /* If the target is the same as one of the inputs, don't use it. This
1393 prevents problems with the REG_EQUAL note. */
1394 if (target
== op0
|| target
== op1
1395 || (target
!= 0 && GET_CODE (target
) != REG
))
1398 /* Multiply the two lower words to get a double-word product.
1399 If unsigned widening multiplication is available, use that;
1400 otherwise use the signed form and compensate. */
1402 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1404 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1405 target
, 1, OPTAB_DIRECT
);
1407 /* If we didn't succeed, delete everything we did so far. */
1409 delete_insns_since (last
);
1411 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1415 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1416 != CODE_FOR_nothing
)
1418 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1419 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1420 target
, 1, OPTAB_DIRECT
);
1421 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1422 NULL_RTX
, 1, next_methods
);
1424 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1425 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1428 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1429 NULL_RTX
, 0, next_methods
);
1431 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1432 op0_xhigh
, op0_xhigh
, 0,
1436 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1437 NULL_RTX
, 1, next_methods
);
1439 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1440 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1443 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1444 NULL_RTX
, 0, next_methods
);
1446 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1447 op1_xhigh
, op1_xhigh
, 0,
1452 /* If we have been able to directly compute the product of the
1453 low-order words of the operands and perform any required adjustments
1454 of the operands, we proceed by trying two more multiplications
1455 and then computing the appropriate sum.
1457 We have checked above that the required addition is provided.
1458 Full-word addition will normally always succeed, especially if
1459 it is provided at all, so we don't worry about its failure. The
1460 multiplication may well fail, however, so we do handle that. */
1462 if (product
&& op0_xhigh
&& op1_xhigh
)
1464 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1465 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1466 NULL_RTX
, 0, OPTAB_DIRECT
);
1468 if (!REG_P (product_high
))
1469 product_high
= force_reg (word_mode
, product_high
);
1472 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1473 product_high
, 0, next_methods
);
1475 if (temp
!= 0 && temp
!= product_high
)
1476 emit_move_insn (product_high
, temp
);
1479 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1480 NULL_RTX
, 0, OPTAB_DIRECT
);
1483 temp
= expand_binop (word_mode
, add_optab
, temp
,
1484 product_high
, product_high
,
1487 if (temp
!= 0 && temp
!= product_high
)
1488 emit_move_insn (product_high
, temp
);
1490 emit_move_insn (operand_subword (product
, high
, 1, mode
), product_high
);
1494 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1496 temp
= emit_move_insn (product
, product
);
1497 set_unique_reg_note (temp
,
1499 gen_rtx_fmt_ee (MULT
, mode
,
1508 /* If we get here, we couldn't do it for some reason even though we
1509 originally thought we could. Delete anything we've emitted in
1512 delete_insns_since (last
);
1515 /* Open-code the vector operations if we have no hardware support
1517 if (class == MODE_VECTOR_INT
|| class == MODE_VECTOR_FLOAT
)
1518 return expand_vector_binop (mode
, binoptab
, op0
, op1
, target
,
1519 unsignedp
, methods
);
1521 /* We need to open-code the complex type operations: '+, -, * and /' */
1523 /* At this point we allow operations between two similar complex
1524 numbers, and also if one of the operands is not a complex number
1525 but rather of MODE_FLOAT or MODE_INT. However, the caller
1526 must make sure that the MODE of the non-complex operand matches
1527 the SUBMODE of the complex operand. */
1529 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1531 rtx real0
= 0, imag0
= 0;
1532 rtx real1
= 0, imag1
= 0;
1533 rtx realr
, imagr
, res
;
1538 /* Find the correct mode for the real and imaginary parts */
1539 enum machine_mode submode
= GET_MODE_INNER(mode
);
1541 if (submode
== BLKmode
)
1545 target
= gen_reg_rtx (mode
);
1549 realr
= gen_realpart (submode
, target
);
1550 imagr
= gen_imagpart (submode
, target
);
1552 if (GET_MODE (op0
) == mode
)
1554 real0
= gen_realpart (submode
, op0
);
1555 imag0
= gen_imagpart (submode
, op0
);
1560 if (GET_MODE (op1
) == mode
)
1562 real1
= gen_realpart (submode
, op1
);
1563 imag1
= gen_imagpart (submode
, op1
);
1568 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0 || imag1
!= 0))
1571 switch (binoptab
->code
)
1574 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1576 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1577 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1578 realr
, unsignedp
, methods
);
1582 else if (res
!= realr
)
1583 emit_move_insn (realr
, res
);
1585 if (imag0
!= 0 && imag1
!= 0)
1586 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1587 imagr
, unsignedp
, methods
);
1588 else if (imag0
!= 0)
1590 else if (binoptab
->code
== MINUS
)
1591 res
= expand_unop (submode
,
1592 binoptab
== subv_optab
? negv_optab
: neg_optab
,
1593 imag1
, imagr
, unsignedp
);
1599 else if (res
!= imagr
)
1600 emit_move_insn (imagr
, res
);
1606 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1608 if (imag0
!= 0 && imag1
!= 0)
1612 /* Don't fetch these from memory more than once. */
1613 real0
= force_reg (submode
, real0
);
1614 real1
= force_reg (submode
, real1
);
1615 imag0
= force_reg (submode
, imag0
);
1616 imag1
= force_reg (submode
, imag1
);
1618 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1619 unsignedp
, methods
);
1621 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1622 unsignedp
, methods
);
1624 if (temp1
== 0 || temp2
== 0)
1629 binoptab
== smulv_optab
? subv_optab
: sub_optab
,
1630 temp1
, temp2
, realr
, unsignedp
, methods
));
1634 else if (res
!= realr
)
1635 emit_move_insn (realr
, res
);
1637 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1638 NULL_RTX
, unsignedp
, methods
);
1640 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1641 NULL_RTX
, unsignedp
, methods
);
1643 if (temp1
== 0 || temp2
== 0)
1648 binoptab
== smulv_optab
? addv_optab
: add_optab
,
1649 temp1
, temp2
, imagr
, unsignedp
, methods
));
1653 else if (res
!= imagr
)
1654 emit_move_insn (imagr
, res
);
1660 /* Don't fetch these from memory more than once. */
1661 real0
= force_reg (submode
, real0
);
1662 real1
= force_reg (submode
, real1
);
1664 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1665 realr
, unsignedp
, methods
);
1668 else if (res
!= realr
)
1669 emit_move_insn (realr
, res
);
1672 res
= expand_binop (submode
, binoptab
,
1673 real1
, imag0
, imagr
, unsignedp
, methods
);
1675 res
= expand_binop (submode
, binoptab
,
1676 real0
, imag1
, imagr
, unsignedp
, methods
);
1680 else if (res
!= imagr
)
1681 emit_move_insn (imagr
, res
);
1688 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1692 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1694 /* Don't fetch these from memory more than once. */
1695 real1
= force_reg (submode
, real1
);
1697 /* Simply divide the real and imaginary parts by `c' */
1698 if (class == MODE_COMPLEX_FLOAT
)
1699 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1700 realr
, unsignedp
, methods
);
1702 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1703 real0
, real1
, realr
, unsignedp
);
1707 else if (res
!= realr
)
1708 emit_move_insn (realr
, res
);
1710 if (class == MODE_COMPLEX_FLOAT
)
1711 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1712 imagr
, unsignedp
, methods
);
1714 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1715 imag0
, real1
, imagr
, unsignedp
);
1719 else if (res
!= imagr
)
1720 emit_move_insn (imagr
, res
);
1726 switch (flag_complex_divide_method
)
1729 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1730 realr
, imagr
, submode
,
1736 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1737 realr
, imagr
, submode
,
1757 if (binoptab
->code
!= UNKNOWN
)
1759 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1760 copy_rtx (op0
), copy_rtx (op1
));
1764 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1770 /* It can't be open-coded in this mode.
1771 Use a library call if one is available and caller says that's ok. */
1773 if (binoptab
->handlers
[(int) mode
].libfunc
1774 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1778 enum machine_mode op1_mode
= mode
;
1785 op1_mode
= word_mode
;
1786 /* Specify unsigned here,
1787 since negative shift counts are meaningless. */
1788 op1x
= convert_to_mode (word_mode
, op1
, 1);
1791 if (GET_MODE (op0
) != VOIDmode
1792 && GET_MODE (op0
) != mode
)
1793 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1795 /* Pass 1 for NO_QUEUE so we don't lose any increments
1796 if the libcall is cse'd or moved. */
1797 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1798 NULL_RTX
, LCT_CONST
, mode
, 2,
1799 op0
, mode
, op1x
, op1_mode
);
1801 insns
= get_insns ();
1804 target
= gen_reg_rtx (mode
);
1805 emit_libcall_block (insns
, target
, value
,
1806 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1811 delete_insns_since (last
);
1813 /* It can't be done in this mode. Can we do it in a wider mode? */
1815 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1816 || methods
== OPTAB_MUST_WIDEN
))
1818 /* Caller says, don't even try. */
1819 delete_insns_since (entry_last
);
1823 /* Compute the value of METHODS to pass to recursive calls.
1824 Don't allow widening to be tried recursively. */
1826 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1828 /* Look for a wider mode of the same class for which it appears we can do
1831 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1833 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1834 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1836 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1837 != CODE_FOR_nothing
)
1838 || (methods
== OPTAB_LIB
1839 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1841 rtx xop0
= op0
, xop1
= op1
;
1844 /* For certain integer operations, we need not actually extend
1845 the narrow operands, as long as we will truncate
1846 the results to the same narrowness. */
1848 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1849 || binoptab
== xor_optab
1850 || binoptab
== add_optab
|| binoptab
== sub_optab
1851 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1852 && class == MODE_INT
)
1855 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1856 unsignedp
, no_extend
);
1858 /* The second operand of a shift must always be extended. */
1859 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1860 no_extend
&& binoptab
!= ashl_optab
);
1862 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1863 unsignedp
, methods
);
1866 if (class != MODE_INT
)
1869 target
= gen_reg_rtx (mode
);
1870 convert_move (target
, temp
, 0);
1874 return gen_lowpart (mode
, temp
);
1877 delete_insns_since (last
);
1882 delete_insns_since (entry_last
);
1886 /* Like expand_binop, but for open-coding vectors binops. */
1889 expand_vector_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
)
1890 enum machine_mode mode
;
1895 enum optab_methods methods
;
1897 enum machine_mode submode
, tmode
;
1898 int size
, elts
, subsize
, subbitsize
, i
;
1899 rtx t
, a
, b
, res
, seq
;
1900 enum mode_class
class;
1902 class = GET_MODE_CLASS (mode
);
1904 size
= GET_MODE_SIZE (mode
);
1905 submode
= GET_MODE_INNER (mode
);
1907 /* Search for the widest vector mode with the same inner mode that is
1908 still narrower than MODE and that allows to open-code this operator.
1909 Note, if we find such a mode and the handler later decides it can't
1910 do the expansion, we'll be called recursively with the narrower mode. */
1911 for (tmode
= GET_CLASS_NARROWEST_MODE (class);
1912 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
1913 tmode
= GET_MODE_WIDER_MODE (tmode
))
1915 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
1916 && binoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
1920 switch (binoptab
->code
)
1925 tmode
= int_mode_for_mode (mode
);
1926 if (tmode
!= BLKmode
)
1932 subsize
= GET_MODE_SIZE (submode
);
1933 subbitsize
= GET_MODE_BITSIZE (submode
);
1934 elts
= size
/ subsize
;
1936 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1937 but that we operate on more than one element at a time. */
1938 if (subsize
== GET_MODE_UNIT_SIZE (mode
) && methods
== OPTAB_DIRECT
)
1943 /* Errors can leave us with a const0_rtx as operand. */
1944 if (GET_MODE (op0
) != mode
)
1945 op0
= copy_to_mode_reg (mode
, op0
);
1946 if (GET_MODE (op1
) != mode
)
1947 op1
= copy_to_mode_reg (mode
, op1
);
1950 target
= gen_reg_rtx (mode
);
1952 for (i
= 0; i
< elts
; ++i
)
1954 /* If this is part of a register, and not the first item in the
1955 word, we can't store using a SUBREG - that would clobber
1957 And storing with a SUBREG is only possible for the least
1958 significant part, hence we can't do it for big endian
1959 (unless we want to permute the evaluation order. */
1960 if (GET_CODE (target
) == REG
1961 && (BYTES_BIG_ENDIAN
1962 ? subsize
< UNITS_PER_WORD
1963 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
1966 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
1967 if (CONSTANT_P (op0
))
1968 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
1970 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
1971 NULL_RTX
, submode
, submode
, size
);
1972 if (CONSTANT_P (op1
))
1973 b
= simplify_gen_subreg (submode
, op1
, mode
, i
* subsize
);
1975 b
= extract_bit_field (op1
, subbitsize
, i
* subbitsize
, unsignedp
,
1976 NULL_RTX
, submode
, submode
, size
);
1978 if (binoptab
->code
== DIV
)
1980 if (class == MODE_VECTOR_FLOAT
)
1981 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1982 unsignedp
, methods
);
1984 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1985 a
, b
, t
, unsignedp
);
1988 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1989 unsignedp
, methods
);
1995 emit_move_insn (t
, res
);
1997 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2013 /* Like expand_unop but for open-coding vector unops. */
2016 expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
)
2017 enum machine_mode mode
;
2023 enum machine_mode submode
, tmode
;
2024 int size
, elts
, subsize
, subbitsize
, i
;
2027 size
= GET_MODE_SIZE (mode
);
2028 submode
= GET_MODE_INNER (mode
);
2030 /* Search for the widest vector mode with the same inner mode that is
2031 still narrower than MODE and that allows to open-code this operator.
2032 Note, if we find such a mode and the handler later decides it can't
2033 do the expansion, we'll be called recursively with the narrower mode. */
2034 for (tmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode
));
2035 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
2036 tmode
= GET_MODE_WIDER_MODE (tmode
))
2038 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
2039 && unoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
2042 /* If there is no negate operation, try doing a subtract from zero. */
2043 if (unoptab
== neg_optab
&& GET_MODE_CLASS (submode
) == MODE_INT
2044 /* Avoid infinite recursion when an
2045 error has left us with the wrong mode. */
2046 && GET_MODE (op0
) == mode
)
2049 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2050 target
, unsignedp
, OPTAB_DIRECT
);
2055 if (unoptab
== one_cmpl_optab
)
2057 tmode
= int_mode_for_mode (mode
);
2058 if (tmode
!= BLKmode
)
2062 subsize
= GET_MODE_SIZE (submode
);
2063 subbitsize
= GET_MODE_BITSIZE (submode
);
2064 elts
= size
/ subsize
;
2066 /* Errors can leave us with a const0_rtx as operand. */
2067 if (GET_MODE (op0
) != mode
)
2068 op0
= copy_to_mode_reg (mode
, op0
);
2071 target
= gen_reg_rtx (mode
);
2075 for (i
= 0; i
< elts
; ++i
)
2077 /* If this is part of a register, and not the first item in the
2078 word, we can't store using a SUBREG - that would clobber
2080 And storing with a SUBREG is only possible for the least
2081 significant part, hence we can't do it for big endian
2082 (unless we want to permute the evaluation order. */
2083 if (GET_CODE (target
) == REG
2084 && (BYTES_BIG_ENDIAN
2085 ? subsize
< UNITS_PER_WORD
2086 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
2089 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
2090 if (CONSTANT_P (op0
))
2091 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
2093 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
2094 t
, submode
, submode
, size
);
2096 res
= expand_unop (submode
, unoptab
, a
, t
, unsignedp
);
2099 emit_move_insn (t
, res
);
2101 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2112 /* Expand a binary operator which has both signed and unsigned forms.
2113 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2116 If we widen unsigned operands, we may use a signed wider operation instead
2117 of an unsigned wider operation, since the result would be the same. */
2120 sign_expand_binop (mode
, uoptab
, soptab
, op0
, op1
, target
, unsignedp
, methods
)
2121 enum machine_mode mode
;
2122 optab uoptab
, soptab
;
2123 rtx op0
, op1
, target
;
2125 enum optab_methods methods
;
2128 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2129 struct optab wide_soptab
;
2131 /* Do it without widening, if possible. */
2132 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2133 unsignedp
, OPTAB_DIRECT
);
2134 if (temp
|| methods
== OPTAB_DIRECT
)
2137 /* Try widening to a signed int. Make a fake signed optab that
2138 hides any signed insn for direct use. */
2139 wide_soptab
= *soptab
;
2140 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
2141 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
2143 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2144 unsignedp
, OPTAB_WIDEN
);
2146 /* For unsigned operands, try widening to an unsigned int. */
2147 if (temp
== 0 && unsignedp
)
2148 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2149 unsignedp
, OPTAB_WIDEN
);
2150 if (temp
|| methods
== OPTAB_WIDEN
)
2153 /* Use the right width lib call if that exists. */
2154 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2155 if (temp
|| methods
== OPTAB_LIB
)
2158 /* Must widen and use a lib call, use either signed or unsigned. */
2159 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2160 unsignedp
, methods
);
2164 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2165 unsignedp
, methods
);
2169 /* Generate code to perform an operation specified by BINOPTAB
2170 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2171 We assume that the order of the operands for the instruction
2172 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2173 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2175 Either TARG0 or TARG1 may be zero, but what that means is that
2176 the result is not actually wanted. We will generate it into
2177 a dummy pseudo-reg and discard it. They may not both be zero.
2179 Returns 1 if this operation can be performed; 0 if not. */
2182 expand_twoval_binop (binoptab
, op0
, op1
, targ0
, targ1
, unsignedp
)
2188 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2189 enum mode_class
class;
2190 enum machine_mode wider_mode
;
2191 rtx entry_last
= get_last_insn ();
2194 class = GET_MODE_CLASS (mode
);
2196 op0
= protect_from_queue (op0
, 0);
2197 op1
= protect_from_queue (op1
, 0);
2201 op0
= force_not_mem (op0
);
2202 op1
= force_not_mem (op1
);
2205 /* If we are inside an appropriately-short loop and one operand is an
2206 expensive constant, force it into a register. */
2207 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
2208 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
2209 op0
= force_reg (mode
, op0
);
2211 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
2212 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
2213 op1
= force_reg (mode
, op1
);
2216 targ0
= protect_from_queue (targ0
, 1);
2218 targ0
= gen_reg_rtx (mode
);
2220 targ1
= protect_from_queue (targ1
, 1);
2222 targ1
= gen_reg_rtx (mode
);
2224 /* Record where to go back to if we fail. */
2225 last
= get_last_insn ();
2227 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2229 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
2230 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2231 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2233 rtx xop0
= op0
, xop1
= op1
;
2235 /* In case the insn wants input operands in modes different from
2236 those of the actual operands, convert the operands. It would
2237 seem that we don't need to convert CONST_INTs, but we do, so
2238 that they're properly zero-extended, sign-extended or truncated
2241 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2242 xop0
= convert_modes (mode0
,
2243 GET_MODE (op0
) != VOIDmode
2248 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2249 xop1
= convert_modes (mode1
,
2250 GET_MODE (op1
) != VOIDmode
2255 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2256 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2257 xop0
= copy_to_mode_reg (mode0
, xop0
);
2259 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
2260 xop1
= copy_to_mode_reg (mode1
, xop1
);
2262 /* We could handle this, but we should always be called with a pseudo
2263 for our targets and all insns should take them as outputs. */
2264 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2265 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
2268 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2275 delete_insns_since (last
);
2278 /* It can't be done in this mode. Can we do it in a wider mode? */
2280 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2282 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2283 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2285 if (binoptab
->handlers
[(int) wider_mode
].insn_code
2286 != CODE_FOR_nothing
)
2288 rtx t0
= gen_reg_rtx (wider_mode
);
2289 rtx t1
= gen_reg_rtx (wider_mode
);
2290 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2291 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2293 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2296 convert_move (targ0
, t0
, unsignedp
);
2297 convert_move (targ1
, t1
, unsignedp
);
2301 delete_insns_since (last
);
2306 delete_insns_since (entry_last
);
2310 /* Wrapper around expand_unop which takes an rtx code to specify
2311 the operation to perform, not an optab pointer. All other
2312 arguments are the same. */
2314 expand_simple_unop (mode
, code
, op0
, target
, unsignedp
)
2315 enum machine_mode mode
;
2321 optab unop
= code_to_optab
[(int) code
];
2325 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2331 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2333 widen_clz (mode
, op0
, target
)
2334 enum machine_mode mode
;
2338 enum mode_class
class = GET_MODE_CLASS (mode
);
2339 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2341 enum machine_mode wider_mode
;
2342 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2343 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2345 if (clz_optab
->handlers
[(int) wider_mode
].insn_code
2346 != CODE_FOR_nothing
)
2348 rtx xop0
, temp
, last
;
2350 last
= get_last_insn ();
2353 target
= gen_reg_rtx (mode
);
2354 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2355 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2357 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2358 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2359 - GET_MODE_BITSIZE (mode
)),
2360 target
, true, OPTAB_DIRECT
);
2362 delete_insns_since (last
);
2371 /* Try calculating (parity x) as (and (popcount x) 1), where
2372 popcount can also be done in a wider mode. */
2374 expand_parity (mode
, op0
, target
)
2375 enum machine_mode mode
;
2379 enum mode_class
class = GET_MODE_CLASS (mode
);
2380 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2382 enum machine_mode wider_mode
;
2383 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2384 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2386 if (popcount_optab
->handlers
[(int) wider_mode
].insn_code
2387 != CODE_FOR_nothing
)
2389 rtx xop0
, temp
, last
;
2391 last
= get_last_insn ();
2394 target
= gen_reg_rtx (mode
);
2395 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2396 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2399 temp
= expand_binop (wider_mode
, and_optab
, temp
, GEN_INT (1),
2400 target
, true, OPTAB_DIRECT
);
2402 delete_insns_since (last
);
2411 /* Generate code to perform an operation specified by UNOPTAB
2412 on operand OP0, with result having machine-mode MODE.
2414 UNSIGNEDP is for the case where we have to widen the operands
2415 to perform the operation. It says to use zero-extension.
2417 If TARGET is nonzero, the value
2418 is generated there, if it is convenient to do so.
2419 In all cases an rtx is returned for the locus of the value;
2420 this may or may not be TARGET. */
2423 expand_unop (mode
, unoptab
, op0
, target
, unsignedp
)
2424 enum machine_mode mode
;
2430 enum mode_class
class;
2431 enum machine_mode wider_mode
;
2433 rtx last
= get_last_insn ();
2436 class = GET_MODE_CLASS (mode
);
2438 op0
= protect_from_queue (op0
, 0);
2442 op0
= force_not_mem (op0
);
2446 target
= protect_from_queue (target
, 1);
2448 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2450 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2451 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2457 temp
= gen_reg_rtx (mode
);
2459 if (GET_MODE (xop0
) != VOIDmode
2460 && GET_MODE (xop0
) != mode0
)
2461 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2463 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2465 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2466 xop0
= copy_to_mode_reg (mode0
, xop0
);
2468 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2469 temp
= gen_reg_rtx (mode
);
2471 pat
= GEN_FCN (icode
) (temp
, xop0
);
2474 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2475 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2477 delete_insns_since (last
);
2478 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2486 delete_insns_since (last
);
2489 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2491 /* Widening clz needs special treatment. */
2492 if (unoptab
== clz_optab
)
2494 temp
= widen_clz (mode
, op0
, target
);
2501 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2502 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2503 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2505 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2509 /* For certain operations, we need not actually extend
2510 the narrow operand, as long as we will truncate the
2511 results to the same narrowness. */
2513 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2514 (unoptab
== neg_optab
2515 || unoptab
== one_cmpl_optab
)
2516 && class == MODE_INT
);
2518 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2523 if (class != MODE_INT
)
2526 target
= gen_reg_rtx (mode
);
2527 convert_move (target
, temp
, 0);
2531 return gen_lowpart (mode
, temp
);
2534 delete_insns_since (last
);
2538 /* These can be done a word at a time. */
2539 if (unoptab
== one_cmpl_optab
2540 && class == MODE_INT
2541 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2542 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2547 if (target
== 0 || target
== op0
)
2548 target
= gen_reg_rtx (mode
);
2552 /* Do the actual arithmetic. */
2553 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2555 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2556 rtx x
= expand_unop (word_mode
, unoptab
,
2557 operand_subword_force (op0
, i
, mode
),
2558 target_piece
, unsignedp
);
2560 if (target_piece
!= x
)
2561 emit_move_insn (target_piece
, x
);
2564 insns
= get_insns ();
2567 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2568 gen_rtx_fmt_e (unoptab
->code
, mode
,
2573 /* Open-code the complex negation operation. */
2574 else if (unoptab
->code
== NEG
2575 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2581 /* Find the correct mode for the real and imaginary parts */
2582 enum machine_mode submode
= GET_MODE_INNER (mode
);
2584 if (submode
== BLKmode
)
2588 target
= gen_reg_rtx (mode
);
2592 target_piece
= gen_imagpart (submode
, target
);
2593 x
= expand_unop (submode
, unoptab
,
2594 gen_imagpart (submode
, op0
),
2595 target_piece
, unsignedp
);
2596 if (target_piece
!= x
)
2597 emit_move_insn (target_piece
, x
);
2599 target_piece
= gen_realpart (submode
, target
);
2600 x
= expand_unop (submode
, unoptab
,
2601 gen_realpart (submode
, op0
),
2602 target_piece
, unsignedp
);
2603 if (target_piece
!= x
)
2604 emit_move_insn (target_piece
, x
);
2609 emit_no_conflict_block (seq
, target
, op0
, 0,
2610 gen_rtx_fmt_e (unoptab
->code
, mode
,
2615 /* Try negating floating point values by flipping the sign bit. */
2616 if (unoptab
->code
== NEG
&& class == MODE_FLOAT
2617 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2619 const struct real_format
*fmt
= real_format_for_mode
[mode
- QFmode
];
2620 enum machine_mode imode
= int_mode_for_mode (mode
);
2621 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2623 if (imode
!= BLKmode
&& bitpos
>= 0 && fmt
->has_signed_zero
)
2625 HOST_WIDE_INT hi
, lo
;
2626 rtx last
= get_last_insn ();
2628 /* Handle targets with different FP word orders. */
2629 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2631 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2632 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2633 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2636 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2639 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2643 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2646 temp
= expand_binop (imode
, xor_optab
,
2647 gen_lowpart (imode
, op0
),
2648 immed_double_const (lo
, hi
, imode
),
2649 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2651 return gen_lowpart (mode
, temp
);
2652 delete_insns_since (last
);
2656 /* Try calculating parity (x) as popcount (x) % 2. */
2657 if (unoptab
== parity_optab
)
2659 temp
= expand_parity (mode
, op0
, target
);
2665 /* Now try a library call in this mode. */
2666 if (unoptab
->handlers
[(int) mode
].libfunc
)
2670 enum machine_mode outmode
= mode
;
2672 /* All of these functions return small values. Thus we choose to
2673 have them return something that isn't a double-word. */
2674 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
2675 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
2676 outmode
= TYPE_MODE (integer_type_node
);
2680 /* Pass 1 for NO_QUEUE so we don't lose any increments
2681 if the libcall is cse'd or moved. */
2682 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2683 NULL_RTX
, LCT_CONST
, outmode
,
2685 insns
= get_insns ();
2688 target
= gen_reg_rtx (outmode
);
2689 emit_libcall_block (insns
, target
, value
,
2690 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2695 if (class == MODE_VECTOR_FLOAT
|| class == MODE_VECTOR_INT
)
2696 return expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
);
2698 /* It can't be done in this mode. Can we do it in a wider mode? */
2700 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2702 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2703 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2705 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2706 != CODE_FOR_nothing
)
2707 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2711 /* For certain operations, we need not actually extend
2712 the narrow operand, as long as we will truncate the
2713 results to the same narrowness. */
2715 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2716 (unoptab
== neg_optab
2717 || unoptab
== one_cmpl_optab
)
2718 && class == MODE_INT
);
2720 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2723 /* If we are generating clz using wider mode, adjust the
2725 if (unoptab
== clz_optab
&& temp
!= 0)
2726 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2727 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2728 - GET_MODE_BITSIZE (mode
)),
2729 target
, true, OPTAB_DIRECT
);
2733 if (class != MODE_INT
)
2736 target
= gen_reg_rtx (mode
);
2737 convert_move (target
, temp
, 0);
2741 return gen_lowpart (mode
, temp
);
2744 delete_insns_since (last
);
2749 /* If there is no negate operation, try doing a subtract from zero.
2750 The US Software GOFAST library needs this. */
2751 if (unoptab
->code
== NEG
)
2754 temp
= expand_binop (mode
,
2755 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2756 CONST0_RTX (mode
), op0
,
2757 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2765 /* Emit code to compute the absolute value of OP0, with result to
2766 TARGET if convenient. (TARGET may be 0.) The return value says
2767 where the result actually is to be found.
2769 MODE is the mode of the operand; the mode of the result is
2770 different but can be deduced from MODE.
2775 expand_abs (mode
, op0
, target
, result_unsignedp
, safe
)
2776 enum machine_mode mode
;
2779 int result_unsignedp
;
2785 result_unsignedp
= 1;
2787 /* First try to do it with a special abs instruction. */
2788 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2793 /* For floating point modes, try clearing the sign bit. */
2794 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
2795 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2797 const struct real_format
*fmt
= real_format_for_mode
[mode
- QFmode
];
2798 enum machine_mode imode
= int_mode_for_mode (mode
);
2799 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2801 if (imode
!= BLKmode
&& bitpos
>= 0)
2803 HOST_WIDE_INT hi
, lo
;
2804 rtx last
= get_last_insn ();
2806 /* Handle targets with different FP word orders. */
2807 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2809 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2810 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2811 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2814 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2817 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2821 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2824 temp
= expand_binop (imode
, and_optab
,
2825 gen_lowpart (imode
, op0
),
2826 immed_double_const (~lo
, ~hi
, imode
),
2827 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2829 return gen_lowpart (mode
, temp
);
2830 delete_insns_since (last
);
2834 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2835 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2837 rtx last
= get_last_insn ();
2839 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2841 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2847 delete_insns_since (last
);
2850 /* If this machine has expensive jumps, we can do integer absolute
2851 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2852 where W is the width of MODE. */
2854 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2856 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2857 size_int (GET_MODE_BITSIZE (mode
) - 1),
2860 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2863 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2864 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2870 /* If that does not win, use conditional jump and negate. */
2872 /* It is safe to use the target if it is the same
2873 as the source if this is also a pseudo register */
2874 if (op0
== target
&& GET_CODE (op0
) == REG
2875 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2878 op1
= gen_label_rtx ();
2879 if (target
== 0 || ! safe
2880 || GET_MODE (target
) != mode
2881 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2882 || (GET_CODE (target
) == REG
2883 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2884 target
= gen_reg_rtx (mode
);
2886 emit_move_insn (target
, op0
);
2889 /* If this mode is an integer too wide to compare properly,
2890 compare word by word. Rely on CSE to optimize constant cases. */
2891 if (GET_MODE_CLASS (mode
) == MODE_INT
2892 && ! can_compare_p (GE
, mode
, ccp_jump
))
2893 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2896 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2897 NULL_RTX
, NULL_RTX
, op1
);
2899 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
2902 emit_move_insn (target
, op0
);
2908 /* Emit code to compute the absolute value of OP0, with result to
2909 TARGET if convenient. (TARGET may be 0.) The return value says
2910 where the result actually is to be found.
2912 MODE is the mode of the operand; the mode of the result is
2913 different but can be deduced from MODE.
2915 UNSIGNEDP is relevant for complex integer modes. */
2918 expand_complex_abs (mode
, op0
, target
, unsignedp
)
2919 enum machine_mode mode
;
2924 enum mode_class
class = GET_MODE_CLASS (mode
);
2925 enum machine_mode wider_mode
;
2927 rtx entry_last
= get_last_insn ();
2930 optab this_abs_optab
;
2932 /* Find the correct mode for the real and imaginary parts. */
2933 enum machine_mode submode
= GET_MODE_INNER (mode
);
2935 if (submode
== BLKmode
)
2938 op0
= protect_from_queue (op0
, 0);
2942 op0
= force_not_mem (op0
);
2945 last
= get_last_insn ();
2948 target
= protect_from_queue (target
, 1);
2950 this_abs_optab
= ! unsignedp
&& flag_trapv
2951 && (GET_MODE_CLASS(mode
) == MODE_INT
)
2952 ? absv_optab
: abs_optab
;
2954 if (this_abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2956 int icode
= (int) this_abs_optab
->handlers
[(int) mode
].insn_code
;
2957 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2963 temp
= gen_reg_rtx (submode
);
2965 if (GET_MODE (xop0
) != VOIDmode
2966 && GET_MODE (xop0
) != mode0
)
2967 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2969 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2971 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2972 xop0
= copy_to_mode_reg (mode0
, xop0
);
2974 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
2975 temp
= gen_reg_rtx (submode
);
2977 pat
= GEN_FCN (icode
) (temp
, xop0
);
2980 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2981 && ! add_equal_note (pat
, temp
, this_abs_optab
->code
, xop0
,
2984 delete_insns_since (last
);
2985 return expand_unop (mode
, this_abs_optab
, op0
, NULL_RTX
,
2994 delete_insns_since (last
);
2997 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2999 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3000 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3002 if (this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3003 != CODE_FOR_nothing
)
3007 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3008 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3012 if (class != MODE_COMPLEX_INT
)
3015 target
= gen_reg_rtx (submode
);
3016 convert_move (target
, temp
, 0);
3020 return gen_lowpart (submode
, temp
);
3023 delete_insns_since (last
);
3027 /* Open-code the complex absolute-value operation
3028 if we can open-code sqrt. Otherwise it's not worth while. */
3029 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
3032 rtx real
, imag
, total
;
3034 real
= gen_realpart (submode
, op0
);
3035 imag
= gen_imagpart (submode
, op0
);
3037 /* Square both parts. */
3038 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
3039 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
3041 /* Sum the parts. */
3042 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
3043 0, OPTAB_LIB_WIDEN
);
3045 /* Get sqrt in TARGET. Set TARGET to where the result is. */
3046 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
3048 delete_insns_since (last
);
3053 /* Now try a library call in this mode. */
3054 if (this_abs_optab
->handlers
[(int) mode
].libfunc
)
3061 /* Pass 1 for NO_QUEUE so we don't lose any increments
3062 if the libcall is cse'd or moved. */
3063 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
3064 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
3065 insns
= get_insns ();
3068 target
= gen_reg_rtx (submode
);
3069 emit_libcall_block (insns
, target
, value
,
3070 gen_rtx_fmt_e (this_abs_optab
->code
, mode
, op0
));
3075 /* It can't be done in this mode. Can we do it in a wider mode? */
3077 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3078 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3080 if ((this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3081 != CODE_FOR_nothing
)
3082 || this_abs_optab
->handlers
[(int) wider_mode
].libfunc
)
3086 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3088 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3092 if (class != MODE_COMPLEX_INT
)
3095 target
= gen_reg_rtx (submode
);
3096 convert_move (target
, temp
, 0);
3100 return gen_lowpart (submode
, temp
);
3103 delete_insns_since (last
);
3107 delete_insns_since (entry_last
);
3111 /* Generate an instruction whose insn-code is INSN_CODE,
3112 with two operands: an output TARGET and an input OP0.
3113 TARGET *must* be nonzero, and the output is always stored there.
3114 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3115 the value that is stored into TARGET. */
3118 emit_unop_insn (icode
, target
, op0
, code
)
3125 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3128 temp
= target
= protect_from_queue (target
, 1);
3130 op0
= protect_from_queue (op0
, 0);
3132 /* Sign and zero extension from memory is often done specially on
3133 RISC machines, so forcing into a register here can pessimize
3135 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
3136 op0
= force_not_mem (op0
);
3138 /* Now, if insn does not accept our operands, put them into pseudos. */
3140 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
3141 op0
= copy_to_mode_reg (mode0
, op0
);
3143 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
3144 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
3145 temp
= gen_reg_rtx (GET_MODE (temp
));
3147 pat
= GEN_FCN (icode
) (temp
, op0
);
3149 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3150 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3155 emit_move_insn (target
, temp
);
3158 /* Emit code to perform a series of operations on a multi-word quantity, one
3161 Such a block is preceded by a CLOBBER of the output, consists of multiple
3162 insns, each setting one word of the output, and followed by a SET copying
3163 the output to itself.
3165 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3166 note indicating that it doesn't conflict with the (also multi-word)
3167 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3170 INSNS is a block of code generated to perform the operation, not including
3171 the CLOBBER and final copy. All insns that compute intermediate values
3172 are first emitted, followed by the block as described above.
3174 TARGET, OP0, and OP1 are the output and inputs of the operations,
3175 respectively. OP1 may be zero for a unary operation.
3177 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3180 If TARGET is not a register, INSNS is simply emitted with no special
3181 processing. Likewise if anything in INSNS is not an INSN or if
3182 there is a libcall block inside INSNS.
3184 The final insn emitted is returned. */
3187 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv
)
3193 rtx prev
, next
, first
, last
, insn
;
3195 if (GET_CODE (target
) != REG
|| reload_in_progress
)
3196 return emit_insn (insns
);
3198 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3199 if (GET_CODE (insn
) != INSN
3200 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
3201 return emit_insn (insns
);
3203 /* First emit all insns that do not store into words of the output and remove
3204 these from the list. */
3205 for (insn
= insns
; insn
; insn
= next
)
3210 next
= NEXT_INSN (insn
);
3212 /* Some ports (cris) create an libcall regions at their own. We must
3213 avoid any potential nesting of LIBCALLs. */
3214 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3215 remove_note (insn
, note
);
3216 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3217 remove_note (insn
, note
);
3219 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
3220 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3221 set
= PATTERN (insn
);
3222 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3224 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3225 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
3227 set
= XVECEXP (PATTERN (insn
), 0, i
);
3235 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
3237 if (PREV_INSN (insn
))
3238 NEXT_INSN (PREV_INSN (insn
)) = next
;
3243 PREV_INSN (next
) = PREV_INSN (insn
);
3249 prev
= get_last_insn ();
3251 /* Now write the CLOBBER of the output, followed by the setting of each
3252 of the words, followed by the final copy. */
3253 if (target
!= op0
&& target
!= op1
)
3254 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
3256 for (insn
= insns
; insn
; insn
= next
)
3258 next
= NEXT_INSN (insn
);
3261 if (op1
&& GET_CODE (op1
) == REG
)
3262 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
3265 if (op0
&& GET_CODE (op0
) == REG
)
3266 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
3270 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3271 != CODE_FOR_nothing
)
3273 last
= emit_move_insn (target
, target
);
3275 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
3279 last
= get_last_insn ();
3281 /* Remove any existing REG_EQUAL note from "last", or else it will
3282 be mistaken for a note referring to the full contents of the
3283 alleged libcall value when found together with the REG_RETVAL
3284 note added below. An existing note can come from an insn
3285 expansion at "last". */
3286 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3290 first
= get_insns ();
3292 first
= NEXT_INSN (prev
);
3294 /* Encapsulate the block so it gets manipulated as a unit. */
3295 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3297 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
3302 /* Emit code to make a call to a constant function or a library call.
3304 INSNS is a list containing all insns emitted in the call.
3305 These insns leave the result in RESULT. Our block is to copy RESULT
3306 to TARGET, which is logically equivalent to EQUIV.
3308 We first emit any insns that set a pseudo on the assumption that these are
3309 loading constants into registers; doing so allows them to be safely cse'ed
3310 between blocks. Then we emit all the other insns in the block, followed by
3311 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3312 note with an operand of EQUIV.
3314 Moving assignments to pseudos outside of the block is done to improve
3315 the generated code, but is not required to generate correct code,
3316 hence being unable to move an assignment is not grounds for not making
3317 a libcall block. There are two reasons why it is safe to leave these
3318 insns inside the block: First, we know that these pseudos cannot be
3319 used in generated RTL outside the block since they are created for
3320 temporary purposes within the block. Second, CSE will not record the
3321 values of anything set inside a libcall block, so we know they must
3322 be dead at the end of the block.
3324 Except for the first group of insns (the ones setting pseudos), the
3325 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3328 emit_libcall_block (insns
, target
, result
, equiv
)
3334 rtx final_dest
= target
;
3335 rtx prev
, next
, first
, last
, insn
;
3337 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3338 into a MEM later. Protect the libcall block from this change. */
3339 if (! REG_P (target
) || REG_USERVAR_P (target
))
3340 target
= gen_reg_rtx (GET_MODE (target
));
3342 /* If we're using non-call exceptions, a libcall corresponding to an
3343 operation that may trap may also trap. */
3344 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
3346 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3347 if (GET_CODE (insn
) == CALL_INSN
)
3349 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3351 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
3352 remove_note (insn
, note
);
3356 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3357 reg note to indicate that this call cannot throw or execute a nonlocal
3358 goto (unless there is already a REG_EH_REGION note, in which case
3360 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3361 if (GET_CODE (insn
) == CALL_INSN
)
3363 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3366 XEXP (note
, 0) = GEN_INT (-1);
3368 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
3372 /* First emit all insns that set pseudos. Remove them from the list as
3373 we go. Avoid insns that set pseudos which were referenced in previous
3374 insns. These can be generated by move_by_pieces, for example,
3375 to update an address. Similarly, avoid insns that reference things
3376 set in previous insns. */
3378 for (insn
= insns
; insn
; insn
= next
)
3380 rtx set
= single_set (insn
);
3383 /* Some ports (cris) create an libcall regions at their own. We must
3384 avoid any potential nesting of LIBCALLs. */
3385 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3386 remove_note (insn
, note
);
3387 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3388 remove_note (insn
, note
);
3390 next
= NEXT_INSN (insn
);
3392 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
3393 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
3395 || ((! INSN_P(insns
)
3396 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
3397 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
3398 && ! modified_in_p (SET_SRC (set
), insns
)
3399 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
3401 if (PREV_INSN (insn
))
3402 NEXT_INSN (PREV_INSN (insn
)) = next
;
3407 PREV_INSN (next
) = PREV_INSN (insn
);
3413 prev
= get_last_insn ();
3415 /* Write the remaining insns followed by the final copy. */
3417 for (insn
= insns
; insn
; insn
= next
)
3419 next
= NEXT_INSN (insn
);
3424 last
= emit_move_insn (target
, result
);
3425 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3426 != CODE_FOR_nothing
)
3427 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3430 /* Remove any existing REG_EQUAL note from "last", or else it will
3431 be mistaken for a note referring to the full contents of the
3432 libcall value when found together with the REG_RETVAL note added
3433 below. An existing note can come from an insn expansion at
3435 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3438 if (final_dest
!= target
)
3439 emit_move_insn (final_dest
, target
);
3442 first
= get_insns ();
3444 first
= NEXT_INSN (prev
);
3446 /* Encapsulate the block so it gets manipulated as a unit. */
3447 if (!flag_non_call_exceptions
|| !may_trap_p (equiv
))
3449 /* We can't attach the REG_LIBCALL and REG_RETVAL notes
3450 when the encapsulated region would not be in one basic block,
3451 i.e. when there is a control_flow_insn_p insn between FIRST and LAST.
3453 bool attach_libcall_retval_notes
= true;
3454 next
= NEXT_INSN (last
);
3455 for (insn
= first
; insn
!= next
; insn
= NEXT_INSN (insn
))
3456 if (control_flow_insn_p (insn
))
3458 attach_libcall_retval_notes
= false;
3462 if (attach_libcall_retval_notes
)
3464 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3466 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
,
3472 /* Generate code to store zero in X. */
3478 emit_move_insn (x
, const0_rtx
);
3481 /* Generate code to store 1 in X
3482 assuming it contains zero beforehand. */
3485 emit_0_to_1_insn (x
)
3488 emit_move_insn (x
, const1_rtx
);
3491 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3492 PURPOSE describes how this comparison will be used. CODE is the rtx
3493 comparison code we will be using.
3495 ??? Actually, CODE is slightly weaker than that. A target is still
3496 required to implement all of the normal bcc operations, but not
3497 required to implement all (or any) of the unordered bcc operations. */
3500 can_compare_p (code
, mode
, purpose
)
3502 enum machine_mode mode
;
3503 enum can_compare_purpose purpose
;
3507 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3509 if (purpose
== ccp_jump
)
3510 return bcc_gen_fctn
[(int) code
] != NULL
;
3511 else if (purpose
== ccp_store_flag
)
3512 return setcc_gen_code
[(int) code
] != CODE_FOR_nothing
;
3514 /* There's only one cmov entry point, and it's allowed to fail. */
3517 if (purpose
== ccp_jump
3518 && cbranch_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3520 if (purpose
== ccp_cmov
3521 && cmov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3523 if (purpose
== ccp_store_flag
3524 && cstore_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3527 mode
= GET_MODE_WIDER_MODE (mode
);
3529 while (mode
!= VOIDmode
);
3534 /* This function is called when we are going to emit a compare instruction that
3535 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3537 *PMODE is the mode of the inputs (in case they are const_int).
3538 *PUNSIGNEDP nonzero says that the operands are unsigned;
3539 this matters if they need to be widened.
3541 If they have mode BLKmode, then SIZE specifies the size of both operands.
3543 This function performs all the setup necessary so that the caller only has
3544 to emit a single comparison insn. This setup can involve doing a BLKmode
3545 comparison or emitting a library call to perform the comparison if no insn
3546 is available to handle it.
3547 The values which are passed in through pointers can be modified; the caller
3548 should perform the comparison on the modified values. */
3551 prepare_cmp_insn (px
, py
, pcomparison
, size
, pmode
, punsignedp
, purpose
)
3553 enum rtx_code
*pcomparison
;
3555 enum machine_mode
*pmode
;
3557 enum can_compare_purpose purpose
;
3559 enum machine_mode mode
= *pmode
;
3560 rtx x
= *px
, y
= *py
;
3561 int unsignedp
= *punsignedp
;
3562 enum mode_class
class;
3564 class = GET_MODE_CLASS (mode
);
3566 /* They could both be VOIDmode if both args are immediate constants,
3567 but we should fold that at an earlier stage.
3568 With no special code here, this will call abort,
3569 reminding the programmer to implement such folding. */
3571 if (mode
!= BLKmode
&& flag_force_mem
)
3573 x
= force_not_mem (x
);
3574 y
= force_not_mem (y
);
3577 /* If we are inside an appropriately-short loop and one operand is an
3578 expensive constant, force it into a register. */
3579 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
3580 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
3581 x
= force_reg (mode
, x
);
3583 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
3584 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
3585 y
= force_reg (mode
, y
);
3588 /* Abort if we have a non-canonical comparison. The RTL documentation
3589 states that canonical comparisons are required only for targets which
3591 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
3595 /* Don't let both operands fail to indicate the mode. */
3596 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3597 x
= force_reg (mode
, x
);
3599 /* Handle all BLKmode compares. */
3601 if (mode
== BLKmode
)
3604 enum machine_mode result_mode
;
3605 rtx opalign ATTRIBUTE_UNUSED
3606 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
3609 x
= protect_from_queue (x
, 0);
3610 y
= protect_from_queue (y
, 0);
3614 #ifdef HAVE_cmpstrqi
3616 && GET_CODE (size
) == CONST_INT
3617 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
3619 result_mode
= insn_data
[(int) CODE_FOR_cmpstrqi
].operand
[0].mode
;
3620 result
= gen_reg_rtx (result_mode
);
3621 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, opalign
));
3625 #ifdef HAVE_cmpstrhi
3627 && GET_CODE (size
) == CONST_INT
3628 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
3630 result_mode
= insn_data
[(int) CODE_FOR_cmpstrhi
].operand
[0].mode
;
3631 result
= gen_reg_rtx (result_mode
);
3632 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, opalign
));
3636 #ifdef HAVE_cmpstrsi
3639 result_mode
= insn_data
[(int) CODE_FOR_cmpstrsi
].operand
[0].mode
;
3640 result
= gen_reg_rtx (result_mode
);
3641 size
= protect_from_queue (size
, 0);
3642 emit_insn (gen_cmpstrsi (result
, x
, y
,
3643 convert_to_mode (SImode
, size
, 1),
3649 #ifdef TARGET_MEM_FUNCTIONS
3650 result
= emit_library_call_value (memcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3651 TYPE_MODE (integer_type_node
), 3,
3652 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3653 convert_to_mode (TYPE_MODE (sizetype
), size
,
3654 TREE_UNSIGNED (sizetype
)),
3655 TYPE_MODE (sizetype
));
3657 result
= emit_library_call_value (bcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3658 TYPE_MODE (integer_type_node
), 3,
3659 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3660 convert_to_mode (TYPE_MODE (integer_type_node
),
3662 TREE_UNSIGNED (integer_type_node
)),
3663 TYPE_MODE (integer_type_node
));
3666 result_mode
= TYPE_MODE (integer_type_node
);
3670 *pmode
= result_mode
;
3676 if (can_compare_p (*pcomparison
, mode
, purpose
))
3679 /* Handle a lib call just for the mode we are using. */
3681 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3683 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3686 /* If we want unsigned, and this mode has a distinct unsigned
3687 comparison routine, use that. */
3688 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3689 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3691 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
3692 word_mode
, 2, x
, mode
, y
, mode
);
3694 /* Integer comparison returns a result that must be compared against 1,
3695 so that even if we do an unsigned compare afterward,
3696 there is still a value that can represent the result "less than". */
3703 if (class == MODE_FLOAT
)
3704 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3710 /* Before emitting an insn with code ICODE, make sure that X, which is going
3711 to be used for operand OPNUM of the insn, is converted from mode MODE to
3712 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3713 that it is accepted by the operand predicate. Return the new value. */
3716 prepare_operand (icode
, x
, opnum
, mode
, wider_mode
, unsignedp
)
3720 enum machine_mode mode
, wider_mode
;
3723 x
= protect_from_queue (x
, 0);
3725 if (mode
!= wider_mode
)
3726 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3728 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3729 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3730 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3734 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3735 we can do the comparison.
3736 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3737 be NULL_RTX which indicates that only a comparison is to be generated. */
3740 emit_cmp_and_jump_insn_1 (x
, y
, mode
, comparison
, unsignedp
, label
)
3742 enum machine_mode mode
;
3743 enum rtx_code comparison
;
3747 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3748 enum mode_class
class = GET_MODE_CLASS (mode
);
3749 enum machine_mode wider_mode
= mode
;
3751 /* Try combined insns first. */
3754 enum insn_code icode
;
3755 PUT_MODE (test
, wider_mode
);
3759 icode
= cbranch_optab
->handlers
[(int) wider_mode
].insn_code
;
3761 if (icode
!= CODE_FOR_nothing
3762 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3764 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3765 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3766 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3771 /* Handle some compares against zero. */
3772 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3773 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3775 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3776 emit_insn (GEN_FCN (icode
) (x
));
3778 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3782 /* Handle compares for which there is a directly suitable insn. */
3784 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3785 if (icode
!= CODE_FOR_nothing
)
3787 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3788 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3789 emit_insn (GEN_FCN (icode
) (x
, y
));
3791 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3795 if (class != MODE_INT
&& class != MODE_FLOAT
3796 && class != MODE_COMPLEX_FLOAT
)
3799 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3801 while (wider_mode
!= VOIDmode
);
3806 /* Generate code to compare X with Y so that the condition codes are
3807 set and to jump to LABEL if the condition is true. If X is a
3808 constant and Y is not a constant, then the comparison is swapped to
3809 ensure that the comparison RTL has the canonical form.
3811 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3812 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3813 the proper branch condition code.
3815 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3817 MODE is the mode of the inputs (in case they are const_int).
3819 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3820 be passed unchanged to emit_cmp_insn, then potentially converted into an
3821 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3824 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, label
)
3826 enum rtx_code comparison
;
3828 enum machine_mode mode
;
3832 rtx op0
= x
, op1
= y
;
3834 /* Swap operands and condition to ensure canonical RTL. */
3835 if (swap_commutative_operands_p (x
, y
))
3837 /* If we're not emitting a branch, this means some caller
3843 comparison
= swap_condition (comparison
);
3847 /* If OP0 is still a constant, then both X and Y must be constants. Force
3848 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3850 if (CONSTANT_P (op0
))
3851 op0
= force_reg (mode
, op0
);
3856 comparison
= unsigned_condition (comparison
);
3858 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
,
3860 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3863 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3866 emit_cmp_insn (x
, y
, comparison
, size
, mode
, unsignedp
)
3868 enum rtx_code comparison
;
3870 enum machine_mode mode
;
3873 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, 0);
3876 /* Emit a library call comparison between floating point X and Y.
3877 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3880 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
)
3882 enum rtx_code
*pcomparison
;
3883 enum machine_mode
*pmode
;
3886 enum rtx_code comparison
= *pcomparison
;
3888 rtx x
= *px
= protect_from_queue (*px
, 0);
3889 rtx y
= *py
= protect_from_queue (*py
, 0);
3890 enum machine_mode mode
= GET_MODE (x
);
3898 libfunc
= eqhf2_libfunc
;
3902 libfunc
= nehf2_libfunc
;
3906 libfunc
= gthf2_libfunc
;
3907 if (libfunc
== NULL_RTX
)
3909 tmp
= x
; x
= y
; y
= tmp
;
3911 libfunc
= lthf2_libfunc
;
3916 libfunc
= gehf2_libfunc
;
3917 if (libfunc
== NULL_RTX
)
3919 tmp
= x
; x
= y
; y
= tmp
;
3921 libfunc
= lehf2_libfunc
;
3926 libfunc
= lthf2_libfunc
;
3927 if (libfunc
== NULL_RTX
)
3929 tmp
= x
; x
= y
; y
= tmp
;
3931 libfunc
= gthf2_libfunc
;
3936 libfunc
= lehf2_libfunc
;
3937 if (libfunc
== NULL_RTX
)
3939 tmp
= x
; x
= y
; y
= tmp
;
3941 libfunc
= gehf2_libfunc
;
3946 libfunc
= unordhf2_libfunc
;
3952 else if (mode
== SFmode
)
3956 libfunc
= eqsf2_libfunc
;
3960 libfunc
= nesf2_libfunc
;
3964 libfunc
= gtsf2_libfunc
;
3965 if (libfunc
== NULL_RTX
)
3967 tmp
= x
; x
= y
; y
= tmp
;
3969 libfunc
= ltsf2_libfunc
;
3974 libfunc
= gesf2_libfunc
;
3975 if (libfunc
== NULL_RTX
)
3977 tmp
= x
; x
= y
; y
= tmp
;
3979 libfunc
= lesf2_libfunc
;
3984 libfunc
= ltsf2_libfunc
;
3985 if (libfunc
== NULL_RTX
)
3987 tmp
= x
; x
= y
; y
= tmp
;
3989 libfunc
= gtsf2_libfunc
;
3994 libfunc
= lesf2_libfunc
;
3995 if (libfunc
== NULL_RTX
)
3997 tmp
= x
; x
= y
; y
= tmp
;
3999 libfunc
= gesf2_libfunc
;
4004 libfunc
= unordsf2_libfunc
;
4010 else if (mode
== DFmode
)
4014 libfunc
= eqdf2_libfunc
;
4018 libfunc
= nedf2_libfunc
;
4022 libfunc
= gtdf2_libfunc
;
4023 if (libfunc
== NULL_RTX
)
4025 tmp
= x
; x
= y
; y
= tmp
;
4027 libfunc
= ltdf2_libfunc
;
4032 libfunc
= gedf2_libfunc
;
4033 if (libfunc
== NULL_RTX
)
4035 tmp
= x
; x
= y
; y
= tmp
;
4037 libfunc
= ledf2_libfunc
;
4042 libfunc
= ltdf2_libfunc
;
4043 if (libfunc
== NULL_RTX
)
4045 tmp
= x
; x
= y
; y
= tmp
;
4047 libfunc
= gtdf2_libfunc
;
4052 libfunc
= ledf2_libfunc
;
4053 if (libfunc
== NULL_RTX
)
4055 tmp
= x
; x
= y
; y
= tmp
;
4057 libfunc
= gedf2_libfunc
;
4062 libfunc
= unorddf2_libfunc
;
4068 else if (mode
== XFmode
)
4072 libfunc
= eqxf2_libfunc
;
4076 libfunc
= nexf2_libfunc
;
4080 libfunc
= gtxf2_libfunc
;
4081 if (libfunc
== NULL_RTX
)
4083 tmp
= x
; x
= y
; y
= tmp
;
4085 libfunc
= ltxf2_libfunc
;
4090 libfunc
= gexf2_libfunc
;
4091 if (libfunc
== NULL_RTX
)
4093 tmp
= x
; x
= y
; y
= tmp
;
4095 libfunc
= lexf2_libfunc
;
4100 libfunc
= ltxf2_libfunc
;
4101 if (libfunc
== NULL_RTX
)
4103 tmp
= x
; x
= y
; y
= tmp
;
4105 libfunc
= gtxf2_libfunc
;
4110 libfunc
= lexf2_libfunc
;
4111 if (libfunc
== NULL_RTX
)
4113 tmp
= x
; x
= y
; y
= tmp
;
4115 libfunc
= gexf2_libfunc
;
4120 libfunc
= unordxf2_libfunc
;
4126 else if (mode
== TFmode
)
4130 libfunc
= eqtf2_libfunc
;
4134 libfunc
= netf2_libfunc
;
4138 libfunc
= gttf2_libfunc
;
4139 if (libfunc
== NULL_RTX
)
4141 tmp
= x
; x
= y
; y
= tmp
;
4143 libfunc
= lttf2_libfunc
;
4148 libfunc
= getf2_libfunc
;
4149 if (libfunc
== NULL_RTX
)
4151 tmp
= x
; x
= y
; y
= tmp
;
4153 libfunc
= letf2_libfunc
;
4158 libfunc
= lttf2_libfunc
;
4159 if (libfunc
== NULL_RTX
)
4161 tmp
= x
; x
= y
; y
= tmp
;
4163 libfunc
= gttf2_libfunc
;
4168 libfunc
= letf2_libfunc
;
4169 if (libfunc
== NULL_RTX
)
4171 tmp
= x
; x
= y
; y
= tmp
;
4173 libfunc
= getf2_libfunc
;
4178 libfunc
= unordtf2_libfunc
;
4186 enum machine_mode wider_mode
;
4188 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
4189 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
4191 if ((cmp_optab
->handlers
[(int) wider_mode
].insn_code
4192 != CODE_FOR_nothing
)
4193 || (cmp_optab
->handlers
[(int) wider_mode
].libfunc
!= 0))
4195 x
= protect_from_queue (x
, 0);
4196 y
= protect_from_queue (y
, 0);
4197 *px
= convert_to_mode (wider_mode
, x
, 0);
4198 *py
= convert_to_mode (wider_mode
, y
, 0);
4199 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
4209 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
4210 word_mode
, 2, x
, mode
, y
, mode
);
4214 if (comparison
== UNORDERED
)
4216 #ifdef FLOAT_LIB_COMPARE_RETURNS_BOOL
4217 else if (FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4223 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4226 emit_indirect_jump (loc
)
4229 if (! ((*insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
)
4231 loc
= copy_to_mode_reg (Pmode
, loc
);
4233 emit_jump_insn (gen_indirect_jump (loc
));
4237 #ifdef HAVE_conditional_move
4239 /* Emit a conditional move instruction if the machine supports one for that
4240 condition and machine mode.
4242 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4243 the mode to use should they be constants. If it is VOIDmode, they cannot
4246 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4247 should be stored there. MODE is the mode to use should they be constants.
4248 If it is VOIDmode, they cannot both be constants.
4250 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4251 is not supported. */
4254 emit_conditional_move (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
4259 enum machine_mode cmode
;
4261 enum machine_mode mode
;
4264 rtx tem
, subtarget
, comparison
, insn
;
4265 enum insn_code icode
;
4266 enum rtx_code reversed
;
4268 /* If one operand is constant, make it the second one. Only do this
4269 if the other operand is not constant as well. */
4271 if (swap_commutative_operands_p (op0
, op1
))
4276 code
= swap_condition (code
);
4279 /* get_condition will prefer to generate LT and GT even if the old
4280 comparison was against zero, so undo that canonicalization here since
4281 comparisons against zero are cheaper. */
4282 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
4283 code
= LE
, op1
= const0_rtx
;
4284 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
4285 code
= GE
, op1
= const0_rtx
;
4287 if (cmode
== VOIDmode
)
4288 cmode
= GET_MODE (op0
);
4290 if (swap_commutative_operands_p (op2
, op3
)
4291 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4300 if (mode
== VOIDmode
)
4301 mode
= GET_MODE (op2
);
4303 icode
= movcc_gen_code
[mode
];
4305 if (icode
== CODE_FOR_nothing
)
4310 op2
= force_not_mem (op2
);
4311 op3
= force_not_mem (op3
);
4315 target
= protect_from_queue (target
, 1);
4317 target
= gen_reg_rtx (mode
);
4323 op2
= protect_from_queue (op2
, 0);
4324 op3
= protect_from_queue (op3
, 0);
4326 /* If the insn doesn't accept these operands, put them in pseudos. */
4328 if (! (*insn_data
[icode
].operand
[0].predicate
)
4329 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4330 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4332 if (! (*insn_data
[icode
].operand
[2].predicate
)
4333 (op2
, insn_data
[icode
].operand
[2].mode
))
4334 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4336 if (! (*insn_data
[icode
].operand
[3].predicate
)
4337 (op3
, insn_data
[icode
].operand
[3].mode
))
4338 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4340 /* Everything should now be in the suitable form, so emit the compare insn
4341 and then the conditional move. */
4344 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4346 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4347 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4348 return NULL and let the caller figure out how best to deal with this
4350 if (GET_CODE (comparison
) != code
)
4353 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4355 /* If that failed, then give up. */
4361 if (subtarget
!= target
)
4362 convert_move (target
, subtarget
, 0);
4367 /* Return nonzero if a conditional move of mode MODE is supported.
4369 This function is for combine so it can tell whether an insn that looks
4370 like a conditional move is actually supported by the hardware. If we
4371 guess wrong we lose a bit on optimization, but that's it. */
4372 /* ??? sparc64 supports conditionally moving integers values based on fp
4373 comparisons, and vice versa. How do we handle them? */
4376 can_conditionally_move_p (mode
)
4377 enum machine_mode mode
;
4379 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
4385 #endif /* HAVE_conditional_move */
4387 /* Emit a conditional addition instruction if the machine supports one for that
4388 condition and machine mode.
4390 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4391 the mode to use should they be constants. If it is VOIDmode, they cannot
4394 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4395 should be stored there. MODE is the mode to use should they be constants.
4396 If it is VOIDmode, they cannot both be constants.
4398 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4399 is not supported. */
4402 emit_conditional_add (target
, code
, op0
, op1
, cmode
, op2
, op3
, mode
,
4407 enum machine_mode cmode
;
4409 enum machine_mode mode
;
4412 rtx tem
, subtarget
, comparison
, insn
;
4413 enum insn_code icode
;
4414 enum rtx_code reversed
;
4416 /* If one operand is constant, make it the second one. Only do this
4417 if the other operand is not constant as well. */
4419 if (swap_commutative_operands_p (op0
, op1
))
4424 code
= swap_condition (code
);
4427 /* get_condition will prefer to generate LT and GT even if the old
4428 comparison was against zero, so undo that canonicalization here since
4429 comparisons against zero are cheaper. */
4430 if (code
== LT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == 1)
4431 code
= LE
, op1
= const0_rtx
;
4432 else if (code
== GT
&& GET_CODE (op1
) == CONST_INT
&& INTVAL (op1
) == -1)
4433 code
= GE
, op1
= const0_rtx
;
4435 if (cmode
== VOIDmode
)
4436 cmode
= GET_MODE (op0
);
4438 if (swap_commutative_operands_p (op2
, op3
)
4439 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4448 if (mode
== VOIDmode
)
4449 mode
= GET_MODE (op2
);
4451 icode
= addcc_optab
->handlers
[(int) mode
].insn_code
;
4453 if (icode
== CODE_FOR_nothing
)
4458 op2
= force_not_mem (op2
);
4459 op3
= force_not_mem (op3
);
4463 target
= protect_from_queue (target
, 1);
4465 target
= gen_reg_rtx (mode
);
4471 op2
= protect_from_queue (op2
, 0);
4472 op3
= protect_from_queue (op3
, 0);
4474 /* If the insn doesn't accept these operands, put them in pseudos. */
4476 if (! (*insn_data
[icode
].operand
[0].predicate
)
4477 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4478 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4480 if (! (*insn_data
[icode
].operand
[2].predicate
)
4481 (op2
, insn_data
[icode
].operand
[2].mode
))
4482 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4484 if (! (*insn_data
[icode
].operand
[3].predicate
)
4485 (op3
, insn_data
[icode
].operand
[3].mode
))
4486 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4488 /* Everything should now be in the suitable form, so emit the compare insn
4489 and then the conditional move. */
4492 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4494 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4495 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4496 return NULL and let the caller figure out how best to deal with this
4498 if (GET_CODE (comparison
) != code
)
4501 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4503 /* If that failed, then give up. */
4509 if (subtarget
!= target
)
4510 convert_move (target
, subtarget
, 0);
4515 /* These functions attempt to generate an insn body, rather than
4516 emitting the insn, but if the gen function already emits them, we
4517 make no attempt to turn them back into naked patterns.
4519 They do not protect from queued increments,
4520 because they may be used 1) in protect_from_queue itself
4521 and 2) in other passes where there is no queue. */
4523 /* Generate and return an insn body to add Y to X. */
4526 gen_add2_insn (x
, y
)
4529 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4531 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4532 (x
, insn_data
[icode
].operand
[0].mode
))
4533 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4534 (x
, insn_data
[icode
].operand
[1].mode
))
4535 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4536 (y
, insn_data
[icode
].operand
[2].mode
)))
4539 return (GEN_FCN (icode
) (x
, x
, y
));
4542 /* Generate and return an insn body to add r1 and c,
4543 storing the result in r0. */
4545 gen_add3_insn (r0
, r1
, c
)
4548 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4550 if (icode
== CODE_FOR_nothing
4551 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4552 (r0
, insn_data
[icode
].operand
[0].mode
))
4553 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4554 (r1
, insn_data
[icode
].operand
[1].mode
))
4555 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4556 (c
, insn_data
[icode
].operand
[2].mode
)))
4559 return (GEN_FCN (icode
) (r0
, r1
, c
));
4563 have_add2_insn (x
, y
)
4568 if (GET_MODE (x
) == VOIDmode
)
4571 icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4573 if (icode
== CODE_FOR_nothing
)
4576 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4577 (x
, insn_data
[icode
].operand
[0].mode
))
4578 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4579 (x
, insn_data
[icode
].operand
[1].mode
))
4580 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4581 (y
, insn_data
[icode
].operand
[2].mode
)))
4587 /* Generate and return an insn body to subtract Y from X. */
4590 gen_sub2_insn (x
, y
)
4593 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4595 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4596 (x
, insn_data
[icode
].operand
[0].mode
))
4597 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4598 (x
, insn_data
[icode
].operand
[1].mode
))
4599 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4600 (y
, insn_data
[icode
].operand
[2].mode
)))
4603 return (GEN_FCN (icode
) (x
, x
, y
));
4606 /* Generate and return an insn body to subtract r1 and c,
4607 storing the result in r0. */
4609 gen_sub3_insn (r0
, r1
, c
)
4612 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4614 if (icode
== CODE_FOR_nothing
4615 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4616 (r0
, insn_data
[icode
].operand
[0].mode
))
4617 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4618 (r1
, insn_data
[icode
].operand
[1].mode
))
4619 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4620 (c
, insn_data
[icode
].operand
[2].mode
)))
4623 return (GEN_FCN (icode
) (r0
, r1
, c
));
4627 have_sub2_insn (x
, y
)
4632 if (GET_MODE (x
) == VOIDmode
)
4635 icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4637 if (icode
== CODE_FOR_nothing
)
4640 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4641 (x
, insn_data
[icode
].operand
[0].mode
))
4642 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4643 (x
, insn_data
[icode
].operand
[1].mode
))
4644 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4645 (y
, insn_data
[icode
].operand
[2].mode
)))
4651 /* Generate the body of an instruction to copy Y into X.
4652 It may be a list of insns, if one insn isn't enough. */
4655 gen_move_insn (x
, y
)
4661 emit_move_insn_1 (x
, y
);
4667 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4668 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4669 no such operation exists, CODE_FOR_nothing will be returned. */
4672 can_extend_p (to_mode
, from_mode
, unsignedp
)
4673 enum machine_mode to_mode
, from_mode
;
4676 #ifdef HAVE_ptr_extend
4678 return CODE_FOR_ptr_extend
;
4681 return extendtab
[(int) to_mode
][(int) from_mode
][unsignedp
!= 0];
4684 /* Generate the body of an insn to extend Y (with mode MFROM)
4685 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4688 gen_extend_insn (x
, y
, mto
, mfrom
, unsignedp
)
4690 enum machine_mode mto
, mfrom
;
4693 return (GEN_FCN (extendtab
[(int) mto
][(int) mfrom
][unsignedp
!= 0]) (x
, y
));
4696 /* can_fix_p and can_float_p say whether the target machine
4697 can directly convert a given fixed point type to
4698 a given floating point type, or vice versa.
4699 The returned value is the CODE_FOR_... value to use,
4700 or CODE_FOR_nothing if these modes cannot be directly converted.
4702 *TRUNCP_PTR is set to 1 if it is necessary to output
4703 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4705 static enum insn_code
4706 can_fix_p (fixmode
, fltmode
, unsignedp
, truncp_ptr
)
4707 enum machine_mode fltmode
, fixmode
;
4712 if (fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0]
4713 != CODE_FOR_nothing
)
4714 return fixtrunctab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4716 if (ftrunc_optab
->handlers
[(int) fltmode
].insn_code
!= CODE_FOR_nothing
)
4719 return fixtab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4721 return CODE_FOR_nothing
;
4724 static enum insn_code
4725 can_float_p (fltmode
, fixmode
, unsignedp
)
4726 enum machine_mode fixmode
, fltmode
;
4729 return floattab
[(int) fltmode
][(int) fixmode
][unsignedp
!= 0];
4732 /* Generate code to convert FROM to floating point
4733 and store in TO. FROM must be fixed point and not VOIDmode.
4734 UNSIGNEDP nonzero means regard FROM as unsigned.
4735 Normally this is done by correcting the final value
4736 if it is negative. */
4739 expand_float (to
, from
, unsignedp
)
4743 enum insn_code icode
;
4745 enum machine_mode fmode
, imode
;
4747 /* Crash now, because we won't be able to decide which mode to use. */
4748 if (GET_MODE (from
) == VOIDmode
)
4751 /* Look for an insn to do the conversion. Do it in the specified
4752 modes if possible; otherwise convert either input, output or both to
4753 wider mode. If the integer mode is wider than the mode of FROM,
4754 we can do the conversion signed even if the input is unsigned. */
4756 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4757 fmode
= GET_MODE_WIDER_MODE (fmode
))
4758 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4759 imode
= GET_MODE_WIDER_MODE (imode
))
4761 int doing_unsigned
= unsignedp
;
4763 if (fmode
!= GET_MODE (to
)
4764 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4767 icode
= can_float_p (fmode
, imode
, unsignedp
);
4768 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
4769 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
4771 if (icode
!= CODE_FOR_nothing
)
4773 to
= protect_from_queue (to
, 1);
4774 from
= protect_from_queue (from
, 0);
4776 if (imode
!= GET_MODE (from
))
4777 from
= convert_to_mode (imode
, from
, unsignedp
);
4779 if (fmode
!= GET_MODE (to
))
4780 target
= gen_reg_rtx (fmode
);
4782 emit_unop_insn (icode
, target
, from
,
4783 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4786 convert_move (to
, target
, 0);
4791 /* Unsigned integer, and no way to convert directly.
4792 Convert as signed, then conditionally adjust the result. */
4795 rtx label
= gen_label_rtx ();
4797 REAL_VALUE_TYPE offset
;
4801 to
= protect_from_queue (to
, 1);
4802 from
= protect_from_queue (from
, 0);
4805 from
= force_not_mem (from
);
4807 /* Look for a usable floating mode FMODE wider than the source and at
4808 least as wide as the target. Using FMODE will avoid rounding woes
4809 with unsigned values greater than the signed maximum value. */
4811 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4812 fmode
= GET_MODE_WIDER_MODE (fmode
))
4813 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4814 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4817 if (fmode
== VOIDmode
)
4819 /* There is no such mode. Pretend the target is wide enough. */
4820 fmode
= GET_MODE (to
);
4822 /* Avoid double-rounding when TO is narrower than FROM. */
4823 if ((significand_size (fmode
) + 1)
4824 < GET_MODE_BITSIZE (GET_MODE (from
)))
4827 rtx neglabel
= gen_label_rtx ();
4829 /* Don't use TARGET if it isn't a register, is a hard register,
4830 or is the wrong mode. */
4831 if (GET_CODE (target
) != REG
4832 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4833 || GET_MODE (target
) != fmode
)
4834 target
= gen_reg_rtx (fmode
);
4836 imode
= GET_MODE (from
);
4837 do_pending_stack_adjust ();
4839 /* Test whether the sign bit is set. */
4840 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4843 /* The sign bit is not set. Convert as signed. */
4844 expand_float (target
, from
, 0);
4845 emit_jump_insn (gen_jump (label
));
4848 /* The sign bit is set.
4849 Convert to a usable (positive signed) value by shifting right
4850 one bit, while remembering if a nonzero bit was shifted
4851 out; i.e., compute (from & 1) | (from >> 1). */
4853 emit_label (neglabel
);
4854 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4855 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4856 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4858 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4860 expand_float (target
, temp
, 0);
4862 /* Multiply by 2 to undo the shift above. */
4863 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4864 target
, 0, OPTAB_LIB_WIDEN
);
4866 emit_move_insn (target
, temp
);
4868 do_pending_stack_adjust ();
4874 /* If we are about to do some arithmetic to correct for an
4875 unsigned operand, do it in a pseudo-register. */
4877 if (GET_MODE (to
) != fmode
4878 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4879 target
= gen_reg_rtx (fmode
);
4881 /* Convert as signed integer to floating. */
4882 expand_float (target
, from
, 0);
4884 /* If FROM is negative (and therefore TO is negative),
4885 correct its value by 2**bitwidth. */
4887 do_pending_stack_adjust ();
4888 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4892 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)));
4893 temp
= expand_binop (fmode
, add_optab
, target
,
4894 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4895 target
, 0, OPTAB_LIB_WIDEN
);
4897 emit_move_insn (target
, temp
);
4899 do_pending_stack_adjust ();
4904 /* No hardware instruction available; call a library routine to convert from
4905 SImode, DImode, or TImode into SFmode, DFmode, XFmode, or TFmode. */
4911 to
= protect_from_queue (to
, 1);
4912 from
= protect_from_queue (from
, 0);
4914 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4915 from
= convert_to_mode (SImode
, from
, unsignedp
);
4918 from
= force_not_mem (from
);
4920 if (GET_MODE (to
) == SFmode
)
4922 if (GET_MODE (from
) == SImode
)
4923 libfcn
= floatsisf_libfunc
;
4924 else if (GET_MODE (from
) == DImode
)
4925 libfcn
= floatdisf_libfunc
;
4926 else if (GET_MODE (from
) == TImode
)
4927 libfcn
= floattisf_libfunc
;
4931 else if (GET_MODE (to
) == DFmode
)
4933 if (GET_MODE (from
) == SImode
)
4934 libfcn
= floatsidf_libfunc
;
4935 else if (GET_MODE (from
) == DImode
)
4936 libfcn
= floatdidf_libfunc
;
4937 else if (GET_MODE (from
) == TImode
)
4938 libfcn
= floattidf_libfunc
;
4942 else if (GET_MODE (to
) == XFmode
)
4944 if (GET_MODE (from
) == SImode
)
4945 libfcn
= floatsixf_libfunc
;
4946 else if (GET_MODE (from
) == DImode
)
4947 libfcn
= floatdixf_libfunc
;
4948 else if (GET_MODE (from
) == TImode
)
4949 libfcn
= floattixf_libfunc
;
4953 else if (GET_MODE (to
) == TFmode
)
4955 if (GET_MODE (from
) == SImode
)
4956 libfcn
= floatsitf_libfunc
;
4957 else if (GET_MODE (from
) == DImode
)
4958 libfcn
= floatditf_libfunc
;
4959 else if (GET_MODE (from
) == TImode
)
4960 libfcn
= floattitf_libfunc
;
4969 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
4970 GET_MODE (to
), 1, from
,
4972 insns
= get_insns ();
4975 emit_libcall_block (insns
, target
, value
,
4976 gen_rtx_FLOAT (GET_MODE (to
), from
));
4981 /* Copy result to requested destination
4982 if we have been computing in a temp location. */
4986 if (GET_MODE (target
) == GET_MODE (to
))
4987 emit_move_insn (to
, target
);
4989 convert_move (to
, target
, 0);
4993 /* expand_fix: generate code to convert FROM to fixed point
4994 and store in TO. FROM must be floating point. */
5000 rtx temp
= gen_reg_rtx (GET_MODE (x
));
5001 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
5005 expand_fix (to
, from
, unsignedp
)
5009 enum insn_code icode
;
5011 enum machine_mode fmode
, imode
;
5015 /* We first try to find a pair of modes, one real and one integer, at
5016 least as wide as FROM and TO, respectively, in which we can open-code
5017 this conversion. If the integer mode is wider than the mode of TO,
5018 we can do the conversion either signed or unsigned. */
5020 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5021 fmode
= GET_MODE_WIDER_MODE (fmode
))
5022 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5023 imode
= GET_MODE_WIDER_MODE (imode
))
5025 int doing_unsigned
= unsignedp
;
5027 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5028 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5029 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5031 if (icode
!= CODE_FOR_nothing
)
5033 to
= protect_from_queue (to
, 1);
5034 from
= protect_from_queue (from
, 0);
5036 if (fmode
!= GET_MODE (from
))
5037 from
= convert_to_mode (fmode
, from
, 0);
5040 from
= ftruncify (from
);
5042 if (imode
!= GET_MODE (to
))
5043 target
= gen_reg_rtx (imode
);
5045 emit_unop_insn (icode
, target
, from
,
5046 doing_unsigned
? UNSIGNED_FIX
: FIX
);
5048 convert_move (to
, target
, unsignedp
);
5053 /* For an unsigned conversion, there is one more way to do it.
5054 If we have a signed conversion, we generate code that compares
5055 the real value to the largest representable positive number. If if
5056 is smaller, the conversion is done normally. Otherwise, subtract
5057 one plus the highest signed number, convert, and add it back.
5059 We only need to check all real modes, since we know we didn't find
5060 anything with a wider integer mode.
5062 This code used to extend FP value into mode wider than the destination.
5063 This is not needed. Consider, for instance conversion from SFmode
5066 The hot path trought the code is dealing with inputs smaller than 2^63
5067 and doing just the conversion, so there is no bits to lose.
5069 In the other path we know the value is positive in the range 2^63..2^64-1
5070 inclusive. (as for other imput overflow happens and result is undefined)
5071 So we know that the most important bit set in mantisa corresponds to
5072 2^63. The subtraction of 2^63 should not generate any rounding as it
5073 simply clears out that bit. The rest is trivial. */
5075 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5076 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5077 fmode
= GET_MODE_WIDER_MODE (fmode
))
5078 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
5082 REAL_VALUE_TYPE offset
;
5083 rtx limit
, lab1
, lab2
, insn
;
5085 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
5086 real_2expN (&offset
, bitsize
- 1);
5087 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5088 lab1
= gen_label_rtx ();
5089 lab2
= gen_label_rtx ();
5092 to
= protect_from_queue (to
, 1);
5093 from
= protect_from_queue (from
, 0);
5096 from
= force_not_mem (from
);
5098 if (fmode
!= GET_MODE (from
))
5099 from
= convert_to_mode (fmode
, from
, 0);
5101 /* See if we need to do the subtraction. */
5102 do_pending_stack_adjust ();
5103 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5106 /* If not, do the signed "fix" and branch around fixup code. */
5107 expand_fix (to
, from
, 0);
5108 emit_jump_insn (gen_jump (lab2
));
5111 /* Otherwise, subtract 2**(N-1), convert to signed number,
5112 then add 2**(N-1). Do the addition using XOR since this
5113 will often generate better code. */
5115 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5116 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5117 expand_fix (to
, target
, 0);
5118 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5120 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5122 to
, 1, OPTAB_LIB_WIDEN
);
5125 emit_move_insn (to
, target
);
5129 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
5130 != CODE_FOR_nothing
)
5132 /* Make a place for a REG_NOTE and add it. */
5133 insn
= emit_move_insn (to
, to
);
5134 set_unique_reg_note (insn
,
5136 gen_rtx_fmt_e (UNSIGNED_FIX
,
5144 /* We can't do it with an insn, so use a library call. But first ensure
5145 that the mode of TO is at least as wide as SImode, since those are the
5146 only library calls we know about. */
5148 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5150 target
= gen_reg_rtx (SImode
);
5152 expand_fix (target
, from
, unsignedp
);
5154 else if (GET_MODE (from
) == SFmode
)
5156 if (GET_MODE (to
) == SImode
)
5157 libfcn
= unsignedp
? fixunssfsi_libfunc
: fixsfsi_libfunc
;
5158 else if (GET_MODE (to
) == DImode
)
5159 libfcn
= unsignedp
? fixunssfdi_libfunc
: fixsfdi_libfunc
;
5160 else if (GET_MODE (to
) == TImode
)
5161 libfcn
= unsignedp
? fixunssfti_libfunc
: fixsfti_libfunc
;
5165 else if (GET_MODE (from
) == DFmode
)
5167 if (GET_MODE (to
) == SImode
)
5168 libfcn
= unsignedp
? fixunsdfsi_libfunc
: fixdfsi_libfunc
;
5169 else if (GET_MODE (to
) == DImode
)
5170 libfcn
= unsignedp
? fixunsdfdi_libfunc
: fixdfdi_libfunc
;
5171 else if (GET_MODE (to
) == TImode
)
5172 libfcn
= unsignedp
? fixunsdfti_libfunc
: fixdfti_libfunc
;
5176 else if (GET_MODE (from
) == XFmode
)
5178 if (GET_MODE (to
) == SImode
)
5179 libfcn
= unsignedp
? fixunsxfsi_libfunc
: fixxfsi_libfunc
;
5180 else if (GET_MODE (to
) == DImode
)
5181 libfcn
= unsignedp
? fixunsxfdi_libfunc
: fixxfdi_libfunc
;
5182 else if (GET_MODE (to
) == TImode
)
5183 libfcn
= unsignedp
? fixunsxfti_libfunc
: fixxfti_libfunc
;
5187 else if (GET_MODE (from
) == TFmode
)
5189 if (GET_MODE (to
) == SImode
)
5190 libfcn
= unsignedp
? fixunstfsi_libfunc
: fixtfsi_libfunc
;
5191 else if (GET_MODE (to
) == DImode
)
5192 libfcn
= unsignedp
? fixunstfdi_libfunc
: fixtfdi_libfunc
;
5193 else if (GET_MODE (to
) == TImode
)
5194 libfcn
= unsignedp
? fixunstfti_libfunc
: fixtfti_libfunc
;
5206 to
= protect_from_queue (to
, 1);
5207 from
= protect_from_queue (from
, 0);
5210 from
= force_not_mem (from
);
5214 value
= emit_library_call_value (libfcn
, NULL_RTX
, LCT_CONST
,
5215 GET_MODE (to
), 1, from
,
5217 insns
= get_insns ();
5220 emit_libcall_block (insns
, target
, value
,
5221 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5222 GET_MODE (to
), from
));
5227 if (GET_MODE (to
) == GET_MODE (target
))
5228 emit_move_insn (to
, target
);
5230 convert_move (to
, target
, 0);
5234 /* Report whether we have an instruction to perform the operation
5235 specified by CODE on operands of mode MODE. */
5237 have_insn_for (code
, mode
)
5239 enum machine_mode mode
;
5241 return (code_to_optab
[(int) code
] != 0
5242 && (code_to_optab
[(int) code
]->handlers
[(int) mode
].insn_code
5243 != CODE_FOR_nothing
));
5246 /* Create a blank optab. */
5251 optab op
= (optab
) ggc_alloc (sizeof (struct optab
));
5252 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5254 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
5255 op
->handlers
[i
].libfunc
= 0;
5261 /* Same, but fill in its code as CODE, and write it into the
5262 code_to_optab table. */
5267 optab op
= new_optab ();
5269 code_to_optab
[(int) code
] = op
;
5273 /* Same, but fill in its code as CODE, and do _not_ write it into
5274 the code_to_optab table. */
5279 optab op
= new_optab ();
5284 /* Initialize the libfunc fields of an entire group of entries in some
5285 optab. Each entry is set equal to a string consisting of a leading
5286 pair of underscores followed by a generic operation name followed by
5287 a mode name (downshifted to lower case) followed by a single character
5288 representing the number of operands for the given operation (which is
5289 usually one of the characters '2', '3', or '4').
5291 OPTABLE is the table in which libfunc fields are to be initialized.
5292 FIRST_MODE is the first machine mode index in the given optab to
5294 LAST_MODE is the last machine mode index in the given optab to
5296 OPNAME is the generic (string) name of the operation.
5297 SUFFIX is the character which specifies the number of operands for
5298 the given generic operation.
5302 init_libfuncs (optable
, first_mode
, last_mode
, opname
, suffix
)
5310 unsigned opname_len
= strlen (opname
);
5312 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
5313 mode
= (enum machine_mode
) ((int) mode
+ 1))
5315 const char *mname
= GET_MODE_NAME (mode
);
5316 unsigned mname_len
= strlen (mname
);
5317 char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
5324 for (q
= opname
; *q
; )
5326 for (q
= mname
; *q
; q
++)
5327 *p
++ = TOLOWER (*q
);
5331 optable
->handlers
[(int) mode
].libfunc
5332 = gen_rtx_SYMBOL_REF (Pmode
, ggc_alloc_string (libfunc_name
,
5337 /* Initialize the libfunc fields of an entire group of entries in some
5338 optab which correspond to all integer mode operations. The parameters
5339 have the same meaning as similarly named ones for the `init_libfuncs'
5340 routine. (See above). */
5343 init_integral_libfuncs (optable
, opname
, suffix
)
5348 int maxsize
= 2*BITS_PER_WORD
;
5349 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5350 maxsize
= LONG_LONG_TYPE_SIZE
;
5351 init_libfuncs (optable
, word_mode
,
5352 mode_for_size (maxsize
, MODE_INT
, 0),
5356 /* Initialize the libfunc fields of an entire group of entries in some
5357 optab which correspond to all real mode operations. The parameters
5358 have the same meaning as similarly named ones for the `init_libfuncs'
5359 routine. (See above). */
5362 init_floating_libfuncs (optable
, opname
, suffix
)
5367 enum machine_mode fmode
, dmode
, lmode
;
5369 fmode
= float_type_node
? TYPE_MODE (float_type_node
) : VOIDmode
;
5370 dmode
= double_type_node
? TYPE_MODE (double_type_node
) : VOIDmode
;
5371 lmode
= long_double_type_node
? TYPE_MODE (long_double_type_node
) : VOIDmode
;
5373 if (fmode
!= VOIDmode
)
5374 init_libfuncs (optable
, fmode
, fmode
, opname
, suffix
);
5375 if (dmode
!= fmode
&& dmode
!= VOIDmode
)
5376 init_libfuncs (optable
, dmode
, dmode
, opname
, suffix
);
5377 if (lmode
!= dmode
&& lmode
!= VOIDmode
)
5378 init_libfuncs (optable
, lmode
, lmode
, opname
, suffix
);
5382 init_one_libfunc (name
)
5385 /* Create a FUNCTION_DECL that can be passed to
5386 targetm.encode_section_info. */
5387 /* ??? We don't have any type information except for this is
5388 a function. Pretend this is "int foo()". */
5389 tree decl
= build_decl (FUNCTION_DECL
, get_identifier (name
),
5390 build_function_type (integer_type_node
, NULL_TREE
));
5391 DECL_ARTIFICIAL (decl
) = 1;
5392 DECL_EXTERNAL (decl
) = 1;
5393 TREE_PUBLIC (decl
) = 1;
5395 /* Return the symbol_ref from the mem rtx. */
5396 return XEXP (DECL_RTL (decl
), 0);
5399 /* Call this once to initialize the contents of the optabs
5400 appropriately for the current target machine. */
5405 unsigned int i
, j
, k
;
5407 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5409 for (i
= 0; i
< ARRAY_SIZE (fixtab
); i
++)
5410 for (j
= 0; j
< ARRAY_SIZE (fixtab
[0]); j
++)
5411 for (k
= 0; k
< ARRAY_SIZE (fixtab
[0][0]); k
++)
5412 fixtab
[i
][j
][k
] = CODE_FOR_nothing
;
5414 for (i
= 0; i
< ARRAY_SIZE (fixtrunctab
); i
++)
5415 for (j
= 0; j
< ARRAY_SIZE (fixtrunctab
[0]); j
++)
5416 for (k
= 0; k
< ARRAY_SIZE (fixtrunctab
[0][0]); k
++)
5417 fixtrunctab
[i
][j
][k
] = CODE_FOR_nothing
;
5419 for (i
= 0; i
< ARRAY_SIZE (floattab
); i
++)
5420 for (j
= 0; j
< ARRAY_SIZE (floattab
[0]); j
++)
5421 for (k
= 0; k
< ARRAY_SIZE (floattab
[0][0]); k
++)
5422 floattab
[i
][j
][k
] = CODE_FOR_nothing
;
5424 for (i
= 0; i
< ARRAY_SIZE (extendtab
); i
++)
5425 for (j
= 0; j
< ARRAY_SIZE (extendtab
[0]); j
++)
5426 for (k
= 0; k
< ARRAY_SIZE (extendtab
[0][0]); k
++)
5427 extendtab
[i
][j
][k
] = CODE_FOR_nothing
;
5429 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5430 setcc_gen_code
[i
] = CODE_FOR_nothing
;
5432 #ifdef HAVE_conditional_move
5433 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5434 movcc_gen_code
[i
] = CODE_FOR_nothing
;
5437 add_optab
= init_optab (PLUS
);
5438 addv_optab
= init_optabv (PLUS
);
5439 sub_optab
= init_optab (MINUS
);
5440 subv_optab
= init_optabv (MINUS
);
5441 smul_optab
= init_optab (MULT
);
5442 smulv_optab
= init_optabv (MULT
);
5443 smul_highpart_optab
= init_optab (UNKNOWN
);
5444 umul_highpart_optab
= init_optab (UNKNOWN
);
5445 smul_widen_optab
= init_optab (UNKNOWN
);
5446 umul_widen_optab
= init_optab (UNKNOWN
);
5447 sdiv_optab
= init_optab (DIV
);
5448 sdivv_optab
= init_optabv (DIV
);
5449 sdivmod_optab
= init_optab (UNKNOWN
);
5450 udiv_optab
= init_optab (UDIV
);
5451 udivmod_optab
= init_optab (UNKNOWN
);
5452 smod_optab
= init_optab (MOD
);
5453 umod_optab
= init_optab (UMOD
);
5454 ftrunc_optab
= init_optab (UNKNOWN
);
5455 and_optab
= init_optab (AND
);
5456 ior_optab
= init_optab (IOR
);
5457 xor_optab
= init_optab (XOR
);
5458 ashl_optab
= init_optab (ASHIFT
);
5459 ashr_optab
= init_optab (ASHIFTRT
);
5460 lshr_optab
= init_optab (LSHIFTRT
);
5461 rotl_optab
= init_optab (ROTATE
);
5462 rotr_optab
= init_optab (ROTATERT
);
5463 smin_optab
= init_optab (SMIN
);
5464 smax_optab
= init_optab (SMAX
);
5465 umin_optab
= init_optab (UMIN
);
5466 umax_optab
= init_optab (UMAX
);
5467 pow_optab
= init_optab (UNKNOWN
);
5468 atan2_optab
= init_optab (UNKNOWN
);
5470 /* These three have codes assigned exclusively for the sake of
5472 mov_optab
= init_optab (SET
);
5473 movstrict_optab
= init_optab (STRICT_LOW_PART
);
5474 cmp_optab
= init_optab (COMPARE
);
5476 ucmp_optab
= init_optab (UNKNOWN
);
5477 tst_optab
= init_optab (UNKNOWN
);
5478 neg_optab
= init_optab (NEG
);
5479 negv_optab
= init_optabv (NEG
);
5480 abs_optab
= init_optab (ABS
);
5481 absv_optab
= init_optabv (ABS
);
5482 addcc_optab
= init_optab (UNKNOWN
);
5483 one_cmpl_optab
= init_optab (NOT
);
5484 ffs_optab
= init_optab (FFS
);
5485 clz_optab
= init_optab (CLZ
);
5486 ctz_optab
= init_optab (CTZ
);
5487 popcount_optab
= init_optab (POPCOUNT
);
5488 parity_optab
= init_optab (PARITY
);
5489 sqrt_optab
= init_optab (SQRT
);
5490 floor_optab
= init_optab (UNKNOWN
);
5491 ceil_optab
= init_optab (UNKNOWN
);
5492 round_optab
= init_optab (UNKNOWN
);
5493 trunc_optab
= init_optab (UNKNOWN
);
5494 nearbyint_optab
= init_optab (UNKNOWN
);
5495 sin_optab
= init_optab (UNKNOWN
);
5496 cos_optab
= init_optab (UNKNOWN
);
5497 exp_optab
= init_optab (UNKNOWN
);
5498 log_optab
= init_optab (UNKNOWN
);
5499 strlen_optab
= init_optab (UNKNOWN
);
5500 cbranch_optab
= init_optab (UNKNOWN
);
5501 cmov_optab
= init_optab (UNKNOWN
);
5502 cstore_optab
= init_optab (UNKNOWN
);
5503 push_optab
= init_optab (UNKNOWN
);
5505 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5507 movstr_optab
[i
] = CODE_FOR_nothing
;
5508 clrstr_optab
[i
] = CODE_FOR_nothing
;
5510 #ifdef HAVE_SECONDARY_RELOADS
5511 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
5515 /* Fill in the optabs with the insns we support. */
5518 #ifdef FIXUNS_TRUNC_LIKE_FIX_TRUNC
5519 /* This flag says the same insns that convert to a signed fixnum
5520 also convert validly to an unsigned one. */
5521 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5522 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
5523 fixtrunctab
[i
][j
][1] = fixtrunctab
[i
][j
][0];
5526 /* Initialize the optabs with the names of the library functions. */
5527 init_integral_libfuncs (add_optab
, "add", '3');
5528 init_floating_libfuncs (add_optab
, "add", '3');
5529 init_integral_libfuncs (addv_optab
, "addv", '3');
5530 init_floating_libfuncs (addv_optab
, "add", '3');
5531 init_integral_libfuncs (sub_optab
, "sub", '3');
5532 init_floating_libfuncs (sub_optab
, "sub", '3');
5533 init_integral_libfuncs (subv_optab
, "subv", '3');
5534 init_floating_libfuncs (subv_optab
, "sub", '3');
5535 init_integral_libfuncs (smul_optab
, "mul", '3');
5536 init_floating_libfuncs (smul_optab
, "mul", '3');
5537 init_integral_libfuncs (smulv_optab
, "mulv", '3');
5538 init_floating_libfuncs (smulv_optab
, "mul", '3');
5539 init_integral_libfuncs (sdiv_optab
, "div", '3');
5540 init_floating_libfuncs (sdiv_optab
, "div", '3');
5541 init_integral_libfuncs (sdivv_optab
, "divv", '3');
5542 init_integral_libfuncs (udiv_optab
, "udiv", '3');
5543 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
5544 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
5545 init_integral_libfuncs (smod_optab
, "mod", '3');
5546 init_integral_libfuncs (umod_optab
, "umod", '3');
5547 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
5548 init_integral_libfuncs (and_optab
, "and", '3');
5549 init_integral_libfuncs (ior_optab
, "ior", '3');
5550 init_integral_libfuncs (xor_optab
, "xor", '3');
5551 init_integral_libfuncs (ashl_optab
, "ashl", '3');
5552 init_integral_libfuncs (ashr_optab
, "ashr", '3');
5553 init_integral_libfuncs (lshr_optab
, "lshr", '3');
5554 init_integral_libfuncs (smin_optab
, "min", '3');
5555 init_floating_libfuncs (smin_optab
, "min", '3');
5556 init_integral_libfuncs (smax_optab
, "max", '3');
5557 init_floating_libfuncs (smax_optab
, "max", '3');
5558 init_integral_libfuncs (umin_optab
, "umin", '3');
5559 init_integral_libfuncs (umax_optab
, "umax", '3');
5560 init_integral_libfuncs (neg_optab
, "neg", '2');
5561 init_floating_libfuncs (neg_optab
, "neg", '2');
5562 init_integral_libfuncs (negv_optab
, "negv", '2');
5563 init_floating_libfuncs (negv_optab
, "neg", '2');
5564 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
5565 init_integral_libfuncs (ffs_optab
, "ffs", '2');
5566 init_integral_libfuncs (clz_optab
, "clz", '2');
5567 init_integral_libfuncs (ctz_optab
, "ctz", '2');
5568 init_integral_libfuncs (popcount_optab
, "popcount", '2');
5569 init_integral_libfuncs (parity_optab
, "parity", '2');
5571 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5572 init_integral_libfuncs (cmp_optab
, "cmp", '2');
5573 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
5574 init_floating_libfuncs (cmp_optab
, "cmp", '2');
5576 #ifdef MULSI3_LIBCALL
5577 smul_optab
->handlers
[(int) SImode
].libfunc
5578 = init_one_libfunc (MULSI3_LIBCALL
);
5580 #ifdef MULDI3_LIBCALL
5581 smul_optab
->handlers
[(int) DImode
].libfunc
5582 = init_one_libfunc (MULDI3_LIBCALL
);
5585 #ifdef DIVSI3_LIBCALL
5586 sdiv_optab
->handlers
[(int) SImode
].libfunc
5587 = init_one_libfunc (DIVSI3_LIBCALL
);
5589 #ifdef DIVDI3_LIBCALL
5590 sdiv_optab
->handlers
[(int) DImode
].libfunc
5591 = init_one_libfunc (DIVDI3_LIBCALL
);
5594 #ifdef UDIVSI3_LIBCALL
5595 udiv_optab
->handlers
[(int) SImode
].libfunc
5596 = init_one_libfunc (UDIVSI3_LIBCALL
);
5598 #ifdef UDIVDI3_LIBCALL
5599 udiv_optab
->handlers
[(int) DImode
].libfunc
5600 = init_one_libfunc (UDIVDI3_LIBCALL
);
5603 #ifdef MODSI3_LIBCALL
5604 smod_optab
->handlers
[(int) SImode
].libfunc
5605 = init_one_libfunc (MODSI3_LIBCALL
);
5607 #ifdef MODDI3_LIBCALL
5608 smod_optab
->handlers
[(int) DImode
].libfunc
5609 = init_one_libfunc (MODDI3_LIBCALL
);
5612 #ifdef UMODSI3_LIBCALL
5613 umod_optab
->handlers
[(int) SImode
].libfunc
5614 = init_one_libfunc (UMODSI3_LIBCALL
);
5616 #ifdef UMODDI3_LIBCALL
5617 umod_optab
->handlers
[(int) DImode
].libfunc
5618 = init_one_libfunc (UMODDI3_LIBCALL
);
5621 /* Use cabs for DC complex abs, since systems generally have cabs.
5622 Don't define any libcall for SCmode, so that cabs will be used. */
5623 abs_optab
->handlers
[(int) DCmode
].libfunc
5624 = init_one_libfunc ("cabs");
5626 /* The ffs function operates on `int'. */
5627 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
5628 = init_one_libfunc ("ffs");
5630 extendsfdf2_libfunc
= init_one_libfunc ("__extendsfdf2");
5631 extendsfxf2_libfunc
= init_one_libfunc ("__extendsfxf2");
5632 extendsftf2_libfunc
= init_one_libfunc ("__extendsftf2");
5633 extenddfxf2_libfunc
= init_one_libfunc ("__extenddfxf2");
5634 extenddftf2_libfunc
= init_one_libfunc ("__extenddftf2");
5636 truncdfsf2_libfunc
= init_one_libfunc ("__truncdfsf2");
5637 truncxfsf2_libfunc
= init_one_libfunc ("__truncxfsf2");
5638 trunctfsf2_libfunc
= init_one_libfunc ("__trunctfsf2");
5639 truncxfdf2_libfunc
= init_one_libfunc ("__truncxfdf2");
5640 trunctfdf2_libfunc
= init_one_libfunc ("__trunctfdf2");
5642 abort_libfunc
= init_one_libfunc ("abort");
5643 memcpy_libfunc
= init_one_libfunc ("memcpy");
5644 memmove_libfunc
= init_one_libfunc ("memmove");
5645 bcopy_libfunc
= init_one_libfunc ("bcopy");
5646 memcmp_libfunc
= init_one_libfunc ("memcmp");
5647 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
5648 memset_libfunc
= init_one_libfunc ("memset");
5649 bzero_libfunc
= init_one_libfunc ("bzero");
5651 unwind_resume_libfunc
= init_one_libfunc (USING_SJLJ_EXCEPTIONS
5652 ? "_Unwind_SjLj_Resume"
5653 : "_Unwind_Resume");
5654 #ifndef DONT_USE_BUILTIN_SETJMP
5655 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
5656 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
5658 setjmp_libfunc
= init_one_libfunc ("setjmp");
5659 longjmp_libfunc
= init_one_libfunc ("longjmp");
5661 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
5662 unwind_sjlj_unregister_libfunc
5663 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5665 eqhf2_libfunc
= init_one_libfunc ("__eqhf2");
5666 nehf2_libfunc
= init_one_libfunc ("__nehf2");
5667 gthf2_libfunc
= init_one_libfunc ("__gthf2");
5668 gehf2_libfunc
= init_one_libfunc ("__gehf2");
5669 lthf2_libfunc
= init_one_libfunc ("__lthf2");
5670 lehf2_libfunc
= init_one_libfunc ("__lehf2");
5671 unordhf2_libfunc
= init_one_libfunc ("__unordhf2");
5673 eqsf2_libfunc
= init_one_libfunc ("__eqsf2");
5674 nesf2_libfunc
= init_one_libfunc ("__nesf2");
5675 gtsf2_libfunc
= init_one_libfunc ("__gtsf2");
5676 gesf2_libfunc
= init_one_libfunc ("__gesf2");
5677 ltsf2_libfunc
= init_one_libfunc ("__ltsf2");
5678 lesf2_libfunc
= init_one_libfunc ("__lesf2");
5679 unordsf2_libfunc
= init_one_libfunc ("__unordsf2");
5681 eqdf2_libfunc
= init_one_libfunc ("__eqdf2");
5682 nedf2_libfunc
= init_one_libfunc ("__nedf2");
5683 gtdf2_libfunc
= init_one_libfunc ("__gtdf2");
5684 gedf2_libfunc
= init_one_libfunc ("__gedf2");
5685 ltdf2_libfunc
= init_one_libfunc ("__ltdf2");
5686 ledf2_libfunc
= init_one_libfunc ("__ledf2");
5687 unorddf2_libfunc
= init_one_libfunc ("__unorddf2");
5689 eqxf2_libfunc
= init_one_libfunc ("__eqxf2");
5690 nexf2_libfunc
= init_one_libfunc ("__nexf2");
5691 gtxf2_libfunc
= init_one_libfunc ("__gtxf2");
5692 gexf2_libfunc
= init_one_libfunc ("__gexf2");
5693 ltxf2_libfunc
= init_one_libfunc ("__ltxf2");
5694 lexf2_libfunc
= init_one_libfunc ("__lexf2");
5695 unordxf2_libfunc
= init_one_libfunc ("__unordxf2");
5697 eqtf2_libfunc
= init_one_libfunc ("__eqtf2");
5698 netf2_libfunc
= init_one_libfunc ("__netf2");
5699 gttf2_libfunc
= init_one_libfunc ("__gttf2");
5700 getf2_libfunc
= init_one_libfunc ("__getf2");
5701 lttf2_libfunc
= init_one_libfunc ("__lttf2");
5702 letf2_libfunc
= init_one_libfunc ("__letf2");
5703 unordtf2_libfunc
= init_one_libfunc ("__unordtf2");
5705 floatsisf_libfunc
= init_one_libfunc ("__floatsisf");
5706 floatdisf_libfunc
= init_one_libfunc ("__floatdisf");
5707 floattisf_libfunc
= init_one_libfunc ("__floattisf");
5709 floatsidf_libfunc
= init_one_libfunc ("__floatsidf");
5710 floatdidf_libfunc
= init_one_libfunc ("__floatdidf");
5711 floattidf_libfunc
= init_one_libfunc ("__floattidf");
5713 floatsixf_libfunc
= init_one_libfunc ("__floatsixf");
5714 floatdixf_libfunc
= init_one_libfunc ("__floatdixf");
5715 floattixf_libfunc
= init_one_libfunc ("__floattixf");
5717 floatsitf_libfunc
= init_one_libfunc ("__floatsitf");
5718 floatditf_libfunc
= init_one_libfunc ("__floatditf");
5719 floattitf_libfunc
= init_one_libfunc ("__floattitf");
5721 fixsfsi_libfunc
= init_one_libfunc ("__fixsfsi");
5722 fixsfdi_libfunc
= init_one_libfunc ("__fixsfdi");
5723 fixsfti_libfunc
= init_one_libfunc ("__fixsfti");
5725 fixdfsi_libfunc
= init_one_libfunc ("__fixdfsi");
5726 fixdfdi_libfunc
= init_one_libfunc ("__fixdfdi");
5727 fixdfti_libfunc
= init_one_libfunc ("__fixdfti");
5729 fixxfsi_libfunc
= init_one_libfunc ("__fixxfsi");
5730 fixxfdi_libfunc
= init_one_libfunc ("__fixxfdi");
5731 fixxfti_libfunc
= init_one_libfunc ("__fixxfti");
5733 fixtfsi_libfunc
= init_one_libfunc ("__fixtfsi");
5734 fixtfdi_libfunc
= init_one_libfunc ("__fixtfdi");
5735 fixtfti_libfunc
= init_one_libfunc ("__fixtfti");
5737 fixunssfsi_libfunc
= init_one_libfunc ("__fixunssfsi");
5738 fixunssfdi_libfunc
= init_one_libfunc ("__fixunssfdi");
5739 fixunssfti_libfunc
= init_one_libfunc ("__fixunssfti");
5741 fixunsdfsi_libfunc
= init_one_libfunc ("__fixunsdfsi");
5742 fixunsdfdi_libfunc
= init_one_libfunc ("__fixunsdfdi");
5743 fixunsdfti_libfunc
= init_one_libfunc ("__fixunsdfti");
5745 fixunsxfsi_libfunc
= init_one_libfunc ("__fixunsxfsi");
5746 fixunsxfdi_libfunc
= init_one_libfunc ("__fixunsxfdi");
5747 fixunsxfti_libfunc
= init_one_libfunc ("__fixunsxfti");
5749 fixunstfsi_libfunc
= init_one_libfunc ("__fixunstfsi");
5750 fixunstfdi_libfunc
= init_one_libfunc ("__fixunstfdi");
5751 fixunstfti_libfunc
= init_one_libfunc ("__fixunstfti");
5753 /* For function entry/exit instrumentation. */
5754 profile_function_entry_libfunc
5755 = init_one_libfunc ("__cyg_profile_func_enter");
5756 profile_function_exit_libfunc
5757 = init_one_libfunc ("__cyg_profile_func_exit");
5759 #ifdef HAVE_conditional_trap
5763 #ifdef INIT_TARGET_OPTABS
5764 /* Allow the target to add more libcalls or rename some, etc. */
5769 static GTY(()) rtx trap_rtx
;
5771 #ifdef HAVE_conditional_trap
5772 /* The insn generating function can not take an rtx_code argument.
5773 TRAP_RTX is used as an rtx argument. Its code is replaced with
5774 the code to be used in the trap insn and all other fields are
5780 if (HAVE_conditional_trap
)
5782 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
5787 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5788 CODE. Return 0 on failure. */
5791 gen_cond_trap (code
, op1
, op2
, tcode
)
5792 enum rtx_code code ATTRIBUTE_UNUSED
;
5793 rtx op1
, op2 ATTRIBUTE_UNUSED
, tcode ATTRIBUTE_UNUSED
;
5795 enum machine_mode mode
= GET_MODE (op1
);
5797 if (mode
== VOIDmode
)
5800 #ifdef HAVE_conditional_trap
5801 if (HAVE_conditional_trap
5802 && cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
5806 emit_insn (GEN_FCN (cmp_optab
->handlers
[(int) mode
].insn_code
) (op1
, op2
));
5807 PUT_CODE (trap_rtx
, code
);
5808 insn
= gen_conditional_trap (trap_rtx
, tcode
);
5812 insn
= get_insns ();
5822 #include "gt-optabs.h"