1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
25 #include "coretypes.h"
27 #include "diagnostic-core.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
44 #include "basic-block.h"
47 struct target_optabs default_target_optabs
;
48 struct target_libfuncs default_target_libfuncs
;
50 struct target_optabs
*this_target_optabs
= &default_target_optabs
;
51 struct target_libfuncs
*this_target_libfuncs
= &default_target_libfuncs
;
54 #define libfunc_hash \
55 (this_target_libfuncs->x_libfunc_hash)
57 /* Contains the optab used for each rtx code. */
58 optab code_to_optab
[NUM_RTX_CODE
+ 1];
60 static void prepare_float_lib_cmp (rtx
, rtx
, enum rtx_code
, rtx
*,
62 static rtx
expand_unop_direct (enum machine_mode
, optab
, rtx
, rtx
, int);
64 /* Debug facility for use in GDB. */
65 void debug_optab_libfuncs (void);
67 /* Prefixes for the current version of decimal floating point (BID vs. DPD) */
68 #if ENABLE_DECIMAL_BID_FORMAT
69 #define DECIMAL_PREFIX "bid_"
71 #define DECIMAL_PREFIX "dpd_"
74 /* Used for libfunc_hash. */
77 hash_libfunc (const void *p
)
79 const struct libfunc_entry
*const e
= (const struct libfunc_entry
*) p
;
81 return (((int) e
->mode1
+ (int) e
->mode2
* NUM_MACHINE_MODES
)
85 /* Used for libfunc_hash. */
88 eq_libfunc (const void *p
, const void *q
)
90 const struct libfunc_entry
*const e1
= (const struct libfunc_entry
*) p
;
91 const struct libfunc_entry
*const e2
= (const struct libfunc_entry
*) q
;
93 return (e1
->optab
== e2
->optab
94 && e1
->mode1
== e2
->mode1
95 && e1
->mode2
== e2
->mode2
);
98 /* Return libfunc corresponding operation defined by OPTAB converting
99 from MODE2 to MODE1. Trigger lazy initialization if needed, return NULL
100 if no libfunc is available. */
102 convert_optab_libfunc (convert_optab optab
, enum machine_mode mode1
,
103 enum machine_mode mode2
)
105 struct libfunc_entry e
;
106 struct libfunc_entry
**slot
;
108 e
.optab
= (size_t) (optab
- &convert_optab_table
[0]);
111 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
114 if (optab
->libcall_gen
)
116 optab
->libcall_gen (optab
, optab
->libcall_basename
, mode1
, mode2
);
117 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
119 return (*slot
)->libfunc
;
125 return (*slot
)->libfunc
;
128 /* Return libfunc corresponding operation defined by OPTAB in MODE.
129 Trigger lazy initialization if needed, return NULL if no libfunc is
132 optab_libfunc (optab optab
, enum machine_mode mode
)
134 struct libfunc_entry e
;
135 struct libfunc_entry
**slot
;
137 e
.optab
= (size_t) (optab
- &optab_table
[0]);
140 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, NO_INSERT
);
143 if (optab
->libcall_gen
)
145 optab
->libcall_gen (optab
, optab
->libcall_basename
,
146 optab
->libcall_suffix
, mode
);
147 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
,
150 return (*slot
)->libfunc
;
156 return (*slot
)->libfunc
;
160 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
161 the result of operation CODE applied to OP0 (and OP1 if it is a binary
164 If the last insn does not set TARGET, don't do anything, but return 1.
166 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
167 don't add the REG_EQUAL note but return 0. Our caller can then try
168 again, ensuring that TARGET is not one of the operands. */
171 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
173 rtx last_insn
, insn
, set
;
176 gcc_assert (insns
&& INSN_P (insns
) && NEXT_INSN (insns
));
178 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
179 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
180 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
181 && GET_RTX_CLASS (code
) != RTX_COMPARE
182 && GET_RTX_CLASS (code
) != RTX_UNARY
)
185 if (GET_CODE (target
) == ZERO_EXTRACT
)
188 for (last_insn
= insns
;
189 NEXT_INSN (last_insn
) != NULL_RTX
;
190 last_insn
= NEXT_INSN (last_insn
))
193 set
= single_set (last_insn
);
197 if (! rtx_equal_p (SET_DEST (set
), target
)
198 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
199 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
200 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
203 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
204 besides the last insn. */
205 if (reg_overlap_mentioned_p (target
, op0
)
206 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
208 insn
= PREV_INSN (last_insn
);
209 while (insn
!= NULL_RTX
)
211 if (reg_set_p (target
, insn
))
214 insn
= PREV_INSN (insn
);
218 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
219 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
221 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
223 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
228 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
229 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
230 not actually do a sign-extend or zero-extend, but can leave the
231 higher-order bits of the result rtx undefined, for example, in the case
232 of logical operations, but not right shifts. */
235 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
236 int unsignedp
, int no_extend
)
240 /* If we don't have to extend and this is a constant, return it. */
241 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
244 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
245 extend since it will be more efficient to do so unless the signedness of
246 a promoted object differs from our extension. */
248 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
249 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
250 return convert_modes (mode
, oldmode
, op
, unsignedp
);
252 /* If MODE is no wider than a single word, we return a paradoxical
254 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
255 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
257 /* Otherwise, get an object of MODE, clobber it, and set the low-order
260 result
= gen_reg_rtx (mode
);
261 emit_clobber (result
);
262 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
266 /* Return the optab used for computing the operation given by the tree code,
267 CODE and the tree EXP. This function is not always usable (for example, it
268 cannot give complete results for multiplication or division) but probably
269 ought to be relied on more widely throughout the expander. */
271 optab_for_tree_code (enum tree_code code
, const_tree type
,
272 enum optab_subtype subtype
)
284 return one_cmpl_optab
;
293 return TYPE_UNSIGNED (type
) ? umod_optab
: smod_optab
;
301 if (TYPE_SATURATING(type
))
302 return TYPE_UNSIGNED(type
) ? usdiv_optab
: ssdiv_optab
;
303 return TYPE_UNSIGNED (type
) ? udiv_optab
: sdiv_optab
;
306 if (TREE_CODE (type
) == VECTOR_TYPE
)
308 if (subtype
== optab_vector
)
309 return TYPE_SATURATING (type
) ? NULL
: vashl_optab
;
311 gcc_assert (subtype
== optab_scalar
);
313 if (TYPE_SATURATING(type
))
314 return TYPE_UNSIGNED(type
) ? usashl_optab
: ssashl_optab
;
318 if (TREE_CODE (type
) == VECTOR_TYPE
)
320 if (subtype
== optab_vector
)
321 return TYPE_UNSIGNED (type
) ? vlshr_optab
: vashr_optab
;
323 gcc_assert (subtype
== optab_scalar
);
325 return TYPE_UNSIGNED (type
) ? lshr_optab
: ashr_optab
;
328 if (TREE_CODE (type
) == VECTOR_TYPE
)
330 if (subtype
== optab_vector
)
333 gcc_assert (subtype
== optab_scalar
);
338 if (TREE_CODE (type
) == VECTOR_TYPE
)
340 if (subtype
== optab_vector
)
343 gcc_assert (subtype
== optab_scalar
);
348 return TYPE_UNSIGNED (type
) ? umax_optab
: smax_optab
;
351 return TYPE_UNSIGNED (type
) ? umin_optab
: smin_optab
;
353 case REALIGN_LOAD_EXPR
:
354 return vec_realign_load_optab
;
357 return TYPE_UNSIGNED (type
) ? usum_widen_optab
: ssum_widen_optab
;
360 return TYPE_UNSIGNED (type
) ? udot_prod_optab
: sdot_prod_optab
;
362 case WIDEN_MULT_PLUS_EXPR
:
363 return (TYPE_UNSIGNED (type
)
364 ? (TYPE_SATURATING (type
)
365 ? usmadd_widen_optab
: umadd_widen_optab
)
366 : (TYPE_SATURATING (type
)
367 ? ssmadd_widen_optab
: smadd_widen_optab
));
369 case WIDEN_MULT_MINUS_EXPR
:
370 return (TYPE_UNSIGNED (type
)
371 ? (TYPE_SATURATING (type
)
372 ? usmsub_widen_optab
: umsub_widen_optab
)
373 : (TYPE_SATURATING (type
)
374 ? ssmsub_widen_optab
: smsub_widen_optab
));
380 return TYPE_UNSIGNED (type
) ? reduc_umax_optab
: reduc_smax_optab
;
383 return TYPE_UNSIGNED (type
) ? reduc_umin_optab
: reduc_smin_optab
;
385 case REDUC_PLUS_EXPR
:
386 return TYPE_UNSIGNED (type
) ? reduc_uplus_optab
: reduc_splus_optab
;
388 case VEC_LSHIFT_EXPR
:
389 return vec_shl_optab
;
391 case VEC_RSHIFT_EXPR
:
392 return vec_shr_optab
;
394 case VEC_WIDEN_MULT_HI_EXPR
:
395 return TYPE_UNSIGNED (type
) ?
396 vec_widen_umult_hi_optab
: vec_widen_smult_hi_optab
;
398 case VEC_WIDEN_MULT_LO_EXPR
:
399 return TYPE_UNSIGNED (type
) ?
400 vec_widen_umult_lo_optab
: vec_widen_smult_lo_optab
;
402 case VEC_UNPACK_HI_EXPR
:
403 return TYPE_UNSIGNED (type
) ?
404 vec_unpacku_hi_optab
: vec_unpacks_hi_optab
;
406 case VEC_UNPACK_LO_EXPR
:
407 return TYPE_UNSIGNED (type
) ?
408 vec_unpacku_lo_optab
: vec_unpacks_lo_optab
;
410 case VEC_UNPACK_FLOAT_HI_EXPR
:
411 /* The signedness is determined from input operand. */
412 return TYPE_UNSIGNED (type
) ?
413 vec_unpacku_float_hi_optab
: vec_unpacks_float_hi_optab
;
415 case VEC_UNPACK_FLOAT_LO_EXPR
:
416 /* The signedness is determined from input operand. */
417 return TYPE_UNSIGNED (type
) ?
418 vec_unpacku_float_lo_optab
: vec_unpacks_float_lo_optab
;
420 case VEC_PACK_TRUNC_EXPR
:
421 return vec_pack_trunc_optab
;
423 case VEC_PACK_SAT_EXPR
:
424 return TYPE_UNSIGNED (type
) ? vec_pack_usat_optab
: vec_pack_ssat_optab
;
426 case VEC_PACK_FIX_TRUNC_EXPR
:
427 /* The signedness is determined from output operand. */
428 return TYPE_UNSIGNED (type
) ?
429 vec_pack_ufix_trunc_optab
: vec_pack_sfix_trunc_optab
;
435 trapv
= INTEGRAL_TYPE_P (type
) && TYPE_OVERFLOW_TRAPS (type
);
438 case POINTER_PLUS_EXPR
:
440 if (TYPE_SATURATING(type
))
441 return TYPE_UNSIGNED(type
) ? usadd_optab
: ssadd_optab
;
442 return trapv
? addv_optab
: add_optab
;
445 if (TYPE_SATURATING(type
))
446 return TYPE_UNSIGNED(type
) ? ussub_optab
: sssub_optab
;
447 return trapv
? subv_optab
: sub_optab
;
450 if (TYPE_SATURATING(type
))
451 return TYPE_UNSIGNED(type
) ? usmul_optab
: ssmul_optab
;
452 return trapv
? smulv_optab
: smul_optab
;
455 if (TYPE_SATURATING(type
))
456 return TYPE_UNSIGNED(type
) ? usneg_optab
: ssneg_optab
;
457 return trapv
? negv_optab
: neg_optab
;
460 return trapv
? absv_optab
: abs_optab
;
462 case VEC_EXTRACT_EVEN_EXPR
:
463 return vec_extract_even_optab
;
465 case VEC_EXTRACT_ODD_EXPR
:
466 return vec_extract_odd_optab
;
468 case VEC_INTERLEAVE_HIGH_EXPR
:
469 return vec_interleave_high_optab
;
471 case VEC_INTERLEAVE_LOW_EXPR
:
472 return vec_interleave_low_optab
;
480 /* Expand vector widening operations.
482 There are two different classes of operations handled here:
483 1) Operations whose result is wider than all the arguments to the operation.
484 Examples: VEC_UNPACK_HI/LO_EXPR, VEC_WIDEN_MULT_HI/LO_EXPR
485 In this case OP0 and optionally OP1 would be initialized,
486 but WIDE_OP wouldn't (not relevant for this case).
487 2) Operations whose result is of the same size as the last argument to the
488 operation, but wider than all the other arguments to the operation.
489 Examples: WIDEN_SUM_EXPR, VEC_DOT_PROD_EXPR.
490 In the case WIDE_OP, OP0 and optionally OP1 would be initialized.
492 E.g, when called to expand the following operations, this is how
493 the arguments will be initialized:
495 widening-sum 2 oprnd0 - oprnd1
496 widening-dot-product 3 oprnd0 oprnd1 oprnd2
497 widening-mult 2 oprnd0 oprnd1 -
498 type-promotion (vec-unpack) 1 oprnd0 - - */
501 expand_widen_pattern_expr (sepops ops
, rtx op0
, rtx op1
, rtx wide_op
,
502 rtx target
, int unsignedp
)
504 tree oprnd0
, oprnd1
, oprnd2
;
505 enum machine_mode wmode
= VOIDmode
, tmode0
, tmode1
= VOIDmode
;
506 optab widen_pattern_optab
;
508 enum machine_mode xmode0
, xmode1
= VOIDmode
, wxmode
= VOIDmode
;
511 rtx xop0
, xop1
, wxop
;
512 int nops
= TREE_CODE_LENGTH (ops
->code
);
515 tmode0
= TYPE_MODE (TREE_TYPE (oprnd0
));
516 widen_pattern_optab
=
517 optab_for_tree_code (ops
->code
, TREE_TYPE (oprnd0
), optab_default
);
518 if (ops
->code
== WIDEN_MULT_PLUS_EXPR
519 || ops
->code
== WIDEN_MULT_MINUS_EXPR
)
520 icode
= (int) optab_handler (widen_pattern_optab
,
521 TYPE_MODE (TREE_TYPE (ops
->op2
)));
523 icode
= (int) optab_handler (widen_pattern_optab
, tmode0
);
524 gcc_assert (icode
!= CODE_FOR_nothing
);
525 xmode0
= insn_data
[icode
].operand
[1].mode
;
530 tmode1
= TYPE_MODE (TREE_TYPE (oprnd1
));
531 xmode1
= insn_data
[icode
].operand
[2].mode
;
534 /* The last operand is of a wider mode than the rest of the operands. */
542 gcc_assert (tmode1
== tmode0
);
545 wmode
= TYPE_MODE (TREE_TYPE (oprnd2
));
546 wxmode
= insn_data
[icode
].operand
[3].mode
;
550 wmode
= wxmode
= insn_data
[icode
].operand
[0].mode
;
553 || ! (*insn_data
[icode
].operand
[0].predicate
) (target
, wmode
))
554 temp
= gen_reg_rtx (wmode
);
562 /* In case the insn wants input operands in modes different from
563 those of the actual operands, convert the operands. It would
564 seem that we don't need to convert CONST_INTs, but we do, so
565 that they're properly zero-extended, sign-extended or truncated
568 if (GET_MODE (op0
) != xmode0
&& xmode0
!= VOIDmode
)
569 xop0
= convert_modes (xmode0
,
570 GET_MODE (op0
) != VOIDmode
576 if (GET_MODE (op1
) != xmode1
&& xmode1
!= VOIDmode
)
577 xop1
= convert_modes (xmode1
,
578 GET_MODE (op1
) != VOIDmode
584 if (GET_MODE (wide_op
) != wxmode
&& wxmode
!= VOIDmode
)
585 wxop
= convert_modes (wxmode
,
586 GET_MODE (wide_op
) != VOIDmode
591 /* Now, if insn's predicates don't allow our operands, put them into
594 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, xmode0
)
595 && xmode0
!= VOIDmode
)
596 xop0
= copy_to_mode_reg (xmode0
, xop0
);
600 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, xmode1
)
601 && xmode1
!= VOIDmode
)
602 xop1
= copy_to_mode_reg (xmode1
, xop1
);
606 if (! (*insn_data
[icode
].operand
[3].predicate
) (wxop
, wxmode
)
607 && wxmode
!= VOIDmode
)
608 wxop
= copy_to_mode_reg (wxmode
, wxop
);
610 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
, wxop
);
613 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
619 if (! (*insn_data
[icode
].operand
[2].predicate
) (wxop
, wxmode
)
620 && wxmode
!= VOIDmode
)
621 wxop
= copy_to_mode_reg (wxmode
, wxop
);
623 pat
= GEN_FCN (icode
) (temp
, xop0
, wxop
);
626 pat
= GEN_FCN (icode
) (temp
, xop0
);
633 /* Generate code to perform an operation specified by TERNARY_OPTAB
634 on operands OP0, OP1 and OP2, with result having machine-mode MODE.
636 UNSIGNEDP is for the case where we have to widen the operands
637 to perform the operation. It says to use zero-extension.
639 If TARGET is nonzero, the value
640 is generated there, if it is convenient to do so.
641 In all cases an rtx is returned for the locus of the value;
642 this may or may not be TARGET. */
645 expand_ternary_op (enum machine_mode mode
, optab ternary_optab
, rtx op0
,
646 rtx op1
, rtx op2
, rtx target
, int unsignedp
)
648 int icode
= (int) optab_handler (ternary_optab
, mode
);
649 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
650 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
651 enum machine_mode mode2
= insn_data
[icode
].operand
[3].mode
;
654 rtx xop0
= op0
, xop1
= op1
, xop2
= op2
;
656 gcc_assert (optab_handler (ternary_optab
, mode
) != CODE_FOR_nothing
);
658 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
659 temp
= gen_reg_rtx (mode
);
663 /* In case the insn wants input operands in modes different from
664 those of the actual operands, convert the operands. It would
665 seem that we don't need to convert CONST_INTs, but we do, so
666 that they're properly zero-extended, sign-extended or truncated
669 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
670 xop0
= convert_modes (mode0
,
671 GET_MODE (op0
) != VOIDmode
676 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
677 xop1
= convert_modes (mode1
,
678 GET_MODE (op1
) != VOIDmode
683 if (GET_MODE (op2
) != mode2
&& mode2
!= VOIDmode
)
684 xop2
= convert_modes (mode2
,
685 GET_MODE (op2
) != VOIDmode
690 /* Now, if insn's predicates don't allow our operands, put them into
693 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
)
694 && mode0
!= VOIDmode
)
695 xop0
= copy_to_mode_reg (mode0
, xop0
);
697 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
)
698 && mode1
!= VOIDmode
)
699 xop1
= copy_to_mode_reg (mode1
, xop1
);
701 if (!insn_data
[icode
].operand
[3].predicate (xop2
, mode2
)
702 && mode2
!= VOIDmode
)
703 xop2
= copy_to_mode_reg (mode2
, xop2
);
705 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
, xop2
);
712 /* Like expand_binop, but return a constant rtx if the result can be
713 calculated at compile time. The arguments and return value are
714 otherwise the same as for expand_binop. */
717 simplify_expand_binop (enum machine_mode mode
, optab binoptab
,
718 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
719 enum optab_methods methods
)
721 if (CONSTANT_P (op0
) && CONSTANT_P (op1
))
723 rtx x
= simplify_binary_operation (binoptab
->code
, mode
, op0
, op1
);
729 return expand_binop (mode
, binoptab
, op0
, op1
, target
, unsignedp
, methods
);
732 /* Like simplify_expand_binop, but always put the result in TARGET.
733 Return true if the expansion succeeded. */
736 force_expand_binop (enum machine_mode mode
, optab binoptab
,
737 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
738 enum optab_methods methods
)
740 rtx x
= simplify_expand_binop (mode
, binoptab
, op0
, op1
,
741 target
, unsignedp
, methods
);
745 emit_move_insn (target
, x
);
749 /* Generate insns for VEC_LSHIFT_EXPR, VEC_RSHIFT_EXPR. */
752 expand_vec_shift_expr (sepops ops
, rtx target
)
754 enum insn_code icode
;
755 rtx rtx_op1
, rtx_op2
;
756 enum machine_mode mode1
;
757 enum machine_mode mode2
;
758 enum machine_mode mode
= TYPE_MODE (ops
->type
);
759 tree vec_oprnd
= ops
->op0
;
760 tree shift_oprnd
= ops
->op1
;
766 case VEC_RSHIFT_EXPR
:
767 shift_optab
= vec_shr_optab
;
769 case VEC_LSHIFT_EXPR
:
770 shift_optab
= vec_shl_optab
;
776 icode
= optab_handler (shift_optab
, mode
);
777 gcc_assert (icode
!= CODE_FOR_nothing
);
779 mode1
= insn_data
[icode
].operand
[1].mode
;
780 mode2
= insn_data
[icode
].operand
[2].mode
;
782 rtx_op1
= expand_normal (vec_oprnd
);
783 if (!(*insn_data
[icode
].operand
[1].predicate
) (rtx_op1
, mode1
)
784 && mode1
!= VOIDmode
)
785 rtx_op1
= force_reg (mode1
, rtx_op1
);
787 rtx_op2
= expand_normal (shift_oprnd
);
788 if (!(*insn_data
[icode
].operand
[2].predicate
) (rtx_op2
, mode2
)
789 && mode2
!= VOIDmode
)
790 rtx_op2
= force_reg (mode2
, rtx_op2
);
793 || ! (*insn_data
[icode
].operand
[0].predicate
) (target
, mode
))
794 target
= gen_reg_rtx (mode
);
796 /* Emit instruction */
797 pat
= GEN_FCN (icode
) (target
, rtx_op1
, rtx_op2
);
804 /* This subroutine of expand_doubleword_shift handles the cases in which
805 the effective shift value is >= BITS_PER_WORD. The arguments and return
806 value are the same as for the parent routine, except that SUPERWORD_OP1
807 is the shift count to use when shifting OUTOF_INPUT into INTO_TARGET.
808 INTO_TARGET may be null if the caller has decided to calculate it. */
811 expand_superword_shift (optab binoptab
, rtx outof_input
, rtx superword_op1
,
812 rtx outof_target
, rtx into_target
,
813 int unsignedp
, enum optab_methods methods
)
815 if (into_target
!= 0)
816 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, superword_op1
,
817 into_target
, unsignedp
, methods
))
820 if (outof_target
!= 0)
822 /* For a signed right shift, we must fill OUTOF_TARGET with copies
823 of the sign bit, otherwise we must fill it with zeros. */
824 if (binoptab
!= ashr_optab
)
825 emit_move_insn (outof_target
, CONST0_RTX (word_mode
));
827 if (!force_expand_binop (word_mode
, binoptab
,
828 outof_input
, GEN_INT (BITS_PER_WORD
- 1),
829 outof_target
, unsignedp
, methods
))
835 /* This subroutine of expand_doubleword_shift handles the cases in which
836 the effective shift value is < BITS_PER_WORD. The arguments and return
837 value are the same as for the parent routine. */
840 expand_subword_shift (enum machine_mode op1_mode
, optab binoptab
,
841 rtx outof_input
, rtx into_input
, rtx op1
,
842 rtx outof_target
, rtx into_target
,
843 int unsignedp
, enum optab_methods methods
,
844 unsigned HOST_WIDE_INT shift_mask
)
846 optab reverse_unsigned_shift
, unsigned_shift
;
849 reverse_unsigned_shift
= (binoptab
== ashl_optab
? lshr_optab
: ashl_optab
);
850 unsigned_shift
= (binoptab
== ashl_optab
? ashl_optab
: lshr_optab
);
852 /* The low OP1 bits of INTO_TARGET come from the high bits of OUTOF_INPUT.
853 We therefore need to shift OUTOF_INPUT by (BITS_PER_WORD - OP1) bits in
854 the opposite direction to BINOPTAB. */
855 if (CONSTANT_P (op1
) || shift_mask
>= BITS_PER_WORD
)
857 carries
= outof_input
;
858 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
859 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
864 /* We must avoid shifting by BITS_PER_WORD bits since that is either
865 the same as a zero shift (if shift_mask == BITS_PER_WORD - 1) or
866 has unknown behavior. Do a single shift first, then shift by the
867 remainder. It's OK to use ~OP1 as the remainder if shift counts
868 are truncated to the mode size. */
869 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
870 outof_input
, const1_rtx
, 0, unsignedp
, methods
);
871 if (shift_mask
== BITS_PER_WORD
- 1)
873 tmp
= immed_double_const (-1, -1, op1_mode
);
874 tmp
= simplify_expand_binop (op1_mode
, xor_optab
, op1
, tmp
,
879 tmp
= immed_double_const (BITS_PER_WORD
- 1, 0, op1_mode
);
880 tmp
= simplify_expand_binop (op1_mode
, sub_optab
, tmp
, op1
,
884 if (tmp
== 0 || carries
== 0)
886 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
887 carries
, tmp
, 0, unsignedp
, methods
);
891 /* Shift INTO_INPUT logically by OP1. This is the last use of INTO_INPUT
892 so the result can go directly into INTO_TARGET if convenient. */
893 tmp
= expand_binop (word_mode
, unsigned_shift
, into_input
, op1
,
894 into_target
, unsignedp
, methods
);
898 /* Now OR in the bits carried over from OUTOF_INPUT. */
899 if (!force_expand_binop (word_mode
, ior_optab
, tmp
, carries
,
900 into_target
, unsignedp
, methods
))
903 /* Use a standard word_mode shift for the out-of half. */
904 if (outof_target
!= 0)
905 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
906 outof_target
, unsignedp
, methods
))
913 #ifdef HAVE_conditional_move
914 /* Try implementing expand_doubleword_shift using conditional moves.
915 The shift is by < BITS_PER_WORD if (CMP_CODE CMP1 CMP2) is true,
916 otherwise it is by >= BITS_PER_WORD. SUBWORD_OP1 and SUPERWORD_OP1
917 are the shift counts to use in the former and latter case. All other
918 arguments are the same as the parent routine. */
921 expand_doubleword_shift_condmove (enum machine_mode op1_mode
, optab binoptab
,
922 enum rtx_code cmp_code
, rtx cmp1
, rtx cmp2
,
923 rtx outof_input
, rtx into_input
,
924 rtx subword_op1
, rtx superword_op1
,
925 rtx outof_target
, rtx into_target
,
926 int unsignedp
, enum optab_methods methods
,
927 unsigned HOST_WIDE_INT shift_mask
)
929 rtx outof_superword
, into_superword
;
931 /* Put the superword version of the output into OUTOF_SUPERWORD and
933 outof_superword
= outof_target
!= 0 ? gen_reg_rtx (word_mode
) : 0;
934 if (outof_target
!= 0 && subword_op1
== superword_op1
)
936 /* The value INTO_TARGET >> SUBWORD_OP1, which we later store in
937 OUTOF_TARGET, is the same as the value of INTO_SUPERWORD. */
938 into_superword
= outof_target
;
939 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
940 outof_superword
, 0, unsignedp
, methods
))
945 into_superword
= gen_reg_rtx (word_mode
);
946 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
947 outof_superword
, into_superword
,
952 /* Put the subword version directly in OUTOF_TARGET and INTO_TARGET. */
953 if (!expand_subword_shift (op1_mode
, binoptab
,
954 outof_input
, into_input
, subword_op1
,
955 outof_target
, into_target
,
956 unsignedp
, methods
, shift_mask
))
959 /* Select between them. Do the INTO half first because INTO_SUPERWORD
960 might be the current value of OUTOF_TARGET. */
961 if (!emit_conditional_move (into_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
962 into_target
, into_superword
, word_mode
, false))
965 if (outof_target
!= 0)
966 if (!emit_conditional_move (outof_target
, cmp_code
, cmp1
, cmp2
, op1_mode
,
967 outof_target
, outof_superword
,
975 /* Expand a doubleword shift (ashl, ashr or lshr) using word-mode shifts.
976 OUTOF_INPUT and INTO_INPUT are the two word-sized halves of the first
977 input operand; the shift moves bits in the direction OUTOF_INPUT->
978 INTO_TARGET. OUTOF_TARGET and INTO_TARGET are the equivalent words
979 of the target. OP1 is the shift count and OP1_MODE is its mode.
980 If OP1 is constant, it will have been truncated as appropriate
981 and is known to be nonzero.
983 If SHIFT_MASK is zero, the result of word shifts is undefined when the
984 shift count is outside the range [0, BITS_PER_WORD). This routine must
985 avoid generating such shifts for OP1s in the range [0, BITS_PER_WORD * 2).
987 If SHIFT_MASK is nonzero, all word-mode shift counts are effectively
988 masked by it and shifts in the range [BITS_PER_WORD, SHIFT_MASK) will
989 fill with zeros or sign bits as appropriate.
991 If SHIFT_MASK is BITS_PER_WORD - 1, this routine will synthesize
992 a doubleword shift whose equivalent mask is BITS_PER_WORD * 2 - 1.
993 Doing this preserves semantics required by SHIFT_COUNT_TRUNCATED.
994 In all other cases, shifts by values outside [0, BITS_PER_UNIT * 2)
997 BINOPTAB, UNSIGNEDP and METHODS are as for expand_binop. This function
998 may not use INTO_INPUT after modifying INTO_TARGET, and similarly for
999 OUTOF_INPUT and OUTOF_TARGET. OUTOF_TARGET can be null if the parent
1000 function wants to calculate it itself.
1002 Return true if the shift could be successfully synthesized. */
1005 expand_doubleword_shift (enum machine_mode op1_mode
, optab binoptab
,
1006 rtx outof_input
, rtx into_input
, rtx op1
,
1007 rtx outof_target
, rtx into_target
,
1008 int unsignedp
, enum optab_methods methods
,
1009 unsigned HOST_WIDE_INT shift_mask
)
1011 rtx superword_op1
, tmp
, cmp1
, cmp2
;
1012 rtx subword_label
, done_label
;
1013 enum rtx_code cmp_code
;
1015 /* See if word-mode shifts by BITS_PER_WORD...BITS_PER_WORD * 2 - 1 will
1016 fill the result with sign or zero bits as appropriate. If so, the value
1017 of OUTOF_TARGET will always be (SHIFT OUTOF_INPUT OP1). Recursively call
1018 this routine to calculate INTO_TARGET (which depends on both OUTOF_INPUT
1019 and INTO_INPUT), then emit code to set up OUTOF_TARGET.
1021 This isn't worthwhile for constant shifts since the optimizers will
1022 cope better with in-range shift counts. */
1023 if (shift_mask
>= BITS_PER_WORD
1024 && outof_target
!= 0
1025 && !CONSTANT_P (op1
))
1027 if (!expand_doubleword_shift (op1_mode
, binoptab
,
1028 outof_input
, into_input
, op1
,
1030 unsignedp
, methods
, shift_mask
))
1032 if (!force_expand_binop (word_mode
, binoptab
, outof_input
, op1
,
1033 outof_target
, unsignedp
, methods
))
1038 /* Set CMP_CODE, CMP1 and CMP2 so that the rtx (CMP_CODE CMP1 CMP2)
1039 is true when the effective shift value is less than BITS_PER_WORD.
1040 Set SUPERWORD_OP1 to the shift count that should be used to shift
1041 OUTOF_INPUT into INTO_TARGET when the condition is false. */
1042 tmp
= immed_double_const (BITS_PER_WORD
, 0, op1_mode
);
1043 if (!CONSTANT_P (op1
) && shift_mask
== BITS_PER_WORD
- 1)
1045 /* Set CMP1 to OP1 & BITS_PER_WORD. The result is zero iff OP1
1046 is a subword shift count. */
1047 cmp1
= simplify_expand_binop (op1_mode
, and_optab
, op1
, tmp
,
1049 cmp2
= CONST0_RTX (op1_mode
);
1051 superword_op1
= op1
;
1055 /* Set CMP1 to OP1 - BITS_PER_WORD. */
1056 cmp1
= simplify_expand_binop (op1_mode
, sub_optab
, op1
, tmp
,
1058 cmp2
= CONST0_RTX (op1_mode
);
1060 superword_op1
= cmp1
;
1065 /* If we can compute the condition at compile time, pick the
1066 appropriate subroutine. */
1067 tmp
= simplify_relational_operation (cmp_code
, SImode
, op1_mode
, cmp1
, cmp2
);
1068 if (tmp
!= 0 && CONST_INT_P (tmp
))
1070 if (tmp
== const0_rtx
)
1071 return expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1072 outof_target
, into_target
,
1073 unsignedp
, methods
);
1075 return expand_subword_shift (op1_mode
, binoptab
,
1076 outof_input
, into_input
, op1
,
1077 outof_target
, into_target
,
1078 unsignedp
, methods
, shift_mask
);
1081 #ifdef HAVE_conditional_move
1082 /* Try using conditional moves to generate straight-line code. */
1084 rtx start
= get_last_insn ();
1085 if (expand_doubleword_shift_condmove (op1_mode
, binoptab
,
1086 cmp_code
, cmp1
, cmp2
,
1087 outof_input
, into_input
,
1089 outof_target
, into_target
,
1090 unsignedp
, methods
, shift_mask
))
1092 delete_insns_since (start
);
1096 /* As a last resort, use branches to select the correct alternative. */
1097 subword_label
= gen_label_rtx ();
1098 done_label
= gen_label_rtx ();
1101 do_compare_rtx_and_jump (cmp1
, cmp2
, cmp_code
, false, op1_mode
,
1102 0, 0, subword_label
, -1);
1105 if (!expand_superword_shift (binoptab
, outof_input
, superword_op1
,
1106 outof_target
, into_target
,
1107 unsignedp
, methods
))
1110 emit_jump_insn (gen_jump (done_label
));
1112 emit_label (subword_label
);
1114 if (!expand_subword_shift (op1_mode
, binoptab
,
1115 outof_input
, into_input
, op1
,
1116 outof_target
, into_target
,
1117 unsignedp
, methods
, shift_mask
))
1120 emit_label (done_label
);
1124 /* Subroutine of expand_binop. Perform a double word multiplication of
1125 operands OP0 and OP1 both of mode MODE, which is exactly twice as wide
1126 as the target's word_mode. This function return NULL_RTX if anything
1127 goes wrong, in which case it may have already emitted instructions
1128 which need to be deleted.
1130 If we want to multiply two two-word values and have normal and widening
1131 multiplies of single-word values, we can do this with three smaller
1134 The multiplication proceeds as follows:
1135 _______________________
1136 [__op0_high_|__op0_low__]
1137 _______________________
1138 * [__op1_high_|__op1_low__]
1139 _______________________________________________
1140 _______________________
1141 (1) [__op0_low__*__op1_low__]
1142 _______________________
1143 (2a) [__op0_low__*__op1_high_]
1144 _______________________
1145 (2b) [__op0_high_*__op1_low__]
1146 _______________________
1147 (3) [__op0_high_*__op1_high_]
1150 This gives a 4-word result. Since we are only interested in the
1151 lower 2 words, partial result (3) and the upper words of (2a) and
1152 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1153 calculated using non-widening multiplication.
1155 (1), however, needs to be calculated with an unsigned widening
1156 multiplication. If this operation is not directly supported we
1157 try using a signed widening multiplication and adjust the result.
1158 This adjustment works as follows:
1160 If both operands are positive then no adjustment is needed.
1162 If the operands have different signs, for example op0_low < 0 and
1163 op1_low >= 0, the instruction treats the most significant bit of
1164 op0_low as a sign bit instead of a bit with significance
1165 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1166 with 2**BITS_PER_WORD - op0_low, and two's complements the
1167 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1170 Similarly, if both operands are negative, we need to add
1171 (op0_low + op1_low) * 2**BITS_PER_WORD.
1173 We use a trick to adjust quickly. We logically shift op0_low right
1174 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1175 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1176 logical shift exists, we do an arithmetic right shift and subtract
1180 expand_doubleword_mult (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
1181 bool umulp
, enum optab_methods methods
)
1183 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1184 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1185 rtx wordm1
= umulp
? NULL_RTX
: GEN_INT (BITS_PER_WORD
- 1);
1186 rtx product
, adjust
, product_high
, temp
;
1188 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1189 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1190 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1191 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1193 /* If we're using an unsigned multiply to directly compute the product
1194 of the low-order words of the operands and perform any required
1195 adjustments of the operands, we begin by trying two more multiplications
1196 and then computing the appropriate sum.
1198 We have checked above that the required addition is provided.
1199 Full-word addition will normally always succeed, especially if
1200 it is provided at all, so we don't worry about its failure. The
1201 multiplication may well fail, however, so we do handle that. */
1205 /* ??? This could be done with emit_store_flag where available. */
1206 temp
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1207 NULL_RTX
, 1, methods
);
1209 op0_high
= expand_binop (word_mode
, add_optab
, op0_high
, temp
,
1210 NULL_RTX
, 0, OPTAB_DIRECT
);
1213 temp
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1214 NULL_RTX
, 0, methods
);
1217 op0_high
= expand_binop (word_mode
, sub_optab
, op0_high
, temp
,
1218 NULL_RTX
, 0, OPTAB_DIRECT
);
1225 adjust
= expand_binop (word_mode
, smul_optab
, op0_high
, op1_low
,
1226 NULL_RTX
, 0, OPTAB_DIRECT
);
1230 /* OP0_HIGH should now be dead. */
1234 /* ??? This could be done with emit_store_flag where available. */
1235 temp
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1236 NULL_RTX
, 1, methods
);
1238 op1_high
= expand_binop (word_mode
, add_optab
, op1_high
, temp
,
1239 NULL_RTX
, 0, OPTAB_DIRECT
);
1242 temp
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1243 NULL_RTX
, 0, methods
);
1246 op1_high
= expand_binop (word_mode
, sub_optab
, op1_high
, temp
,
1247 NULL_RTX
, 0, OPTAB_DIRECT
);
1254 temp
= expand_binop (word_mode
, smul_optab
, op1_high
, op0_low
,
1255 NULL_RTX
, 0, OPTAB_DIRECT
);
1259 /* OP1_HIGH should now be dead. */
1261 adjust
= expand_binop (word_mode
, add_optab
, adjust
, temp
,
1262 NULL_RTX
, 0, OPTAB_DIRECT
);
1264 if (target
&& !REG_P (target
))
1268 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1269 target
, 1, OPTAB_DIRECT
);
1271 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1272 target
, 1, OPTAB_DIRECT
);
1277 product_high
= operand_subword (product
, high
, 1, mode
);
1278 adjust
= expand_binop (word_mode
, add_optab
, product_high
, adjust
,
1279 NULL_RTX
, 0, OPTAB_DIRECT
);
1280 emit_move_insn (product_high
, adjust
);
1284 /* Wrapper around expand_binop which takes an rtx code to specify
1285 the operation to perform, not an optab pointer. All other
1286 arguments are the same. */
1288 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
1289 rtx op1
, rtx target
, int unsignedp
,
1290 enum optab_methods methods
)
1292 optab binop
= code_to_optab
[(int) code
];
1295 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
1298 /* Return whether OP0 and OP1 should be swapped when expanding a commutative
1299 binop. Order them according to commutative_operand_precedence and, if
1300 possible, try to put TARGET or a pseudo first. */
1302 swap_commutative_operands_with_target (rtx target
, rtx op0
, rtx op1
)
1304 int op0_prec
= commutative_operand_precedence (op0
);
1305 int op1_prec
= commutative_operand_precedence (op1
);
1307 if (op0_prec
< op1_prec
)
1310 if (op0_prec
> op1_prec
)
1313 /* With equal precedence, both orders are ok, but it is better if the
1314 first operand is TARGET, or if both TARGET and OP0 are pseudos. */
1315 if (target
== 0 || REG_P (target
))
1316 return (REG_P (op1
) && !REG_P (op0
)) || target
== op1
;
1318 return rtx_equal_p (op1
, target
);
1321 /* Return true if BINOPTAB implements a shift operation. */
1324 shift_optab_p (optab binoptab
)
1326 switch (binoptab
->code
)
1342 /* Return true if BINOPTAB implements a commutative binary operation. */
1345 commutative_optab_p (optab binoptab
)
1347 return (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
1348 || binoptab
== smul_widen_optab
1349 || binoptab
== umul_widen_optab
1350 || binoptab
== smul_highpart_optab
1351 || binoptab
== umul_highpart_optab
);
1354 /* X is to be used in mode MODE as an operand to BINOPTAB. If we're
1355 optimizing, and if the operand is a constant that costs more than
1356 1 instruction, force the constant into a register and return that
1357 register. Return X otherwise. UNSIGNEDP says whether X is unsigned. */
1360 avoid_expensive_constant (enum machine_mode mode
, optab binoptab
,
1361 rtx x
, bool unsignedp
)
1363 bool speed
= optimize_insn_for_speed_p ();
1365 if (mode
!= VOIDmode
1368 && rtx_cost (x
, binoptab
->code
, speed
) > rtx_cost (x
, SET
, speed
))
1370 if (CONST_INT_P (x
))
1372 HOST_WIDE_INT intval
= trunc_int_for_mode (INTVAL (x
), mode
);
1373 if (intval
!= INTVAL (x
))
1374 x
= GEN_INT (intval
);
1377 x
= convert_modes (mode
, VOIDmode
, x
, unsignedp
);
1378 x
= force_reg (mode
, x
);
1383 /* Helper function for expand_binop: handle the case where there
1384 is an insn that directly implements the indicated operation.
1385 Returns null if this is not possible. */
1387 expand_binop_directly (enum machine_mode mode
, optab binoptab
,
1389 rtx target
, int unsignedp
, enum optab_methods methods
,
1392 int icode
= (int) optab_handler (binoptab
, mode
);
1393 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
1394 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
1395 enum machine_mode tmp_mode
;
1398 rtx xop0
= op0
, xop1
= op1
;
1405 temp
= gen_reg_rtx (mode
);
1407 /* If it is a commutative operator and the modes would match
1408 if we would swap the operands, we can save the conversions. */
1409 commutative_p
= commutative_optab_p (binoptab
);
1411 && GET_MODE (xop0
) != mode0
&& GET_MODE (xop1
) != mode1
1412 && GET_MODE (xop0
) == mode1
&& GET_MODE (xop1
) == mode1
)
1419 /* If we are optimizing, force expensive constants into a register. */
1420 xop0
= avoid_expensive_constant (mode0
, binoptab
, xop0
, unsignedp
);
1421 if (!shift_optab_p (binoptab
))
1422 xop1
= avoid_expensive_constant (mode1
, binoptab
, xop1
, unsignedp
);
1424 /* In case the insn wants input operands in modes different from
1425 those of the actual operands, convert the operands. It would
1426 seem that we don't need to convert CONST_INTs, but we do, so
1427 that they're properly zero-extended, sign-extended or truncated
1430 if (GET_MODE (xop0
) != mode0
&& mode0
!= VOIDmode
)
1431 xop0
= convert_modes (mode0
,
1432 GET_MODE (xop0
) != VOIDmode
1437 if (GET_MODE (xop1
) != mode1
&& mode1
!= VOIDmode
)
1438 xop1
= convert_modes (mode1
,
1439 GET_MODE (xop1
) != VOIDmode
1444 /* If operation is commutative,
1445 try to make the first operand a register.
1446 Even better, try to make it the same as the target.
1447 Also try to make the last operand a constant. */
1449 && swap_commutative_operands_with_target (target
, xop0
, xop1
))
1456 /* Now, if insn's predicates don't allow our operands, put them into
1459 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
)
1460 && mode0
!= VOIDmode
)
1461 xop0
= copy_to_mode_reg (mode0
, xop0
);
1463 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
)
1464 && mode1
!= VOIDmode
)
1465 xop1
= copy_to_mode_reg (mode1
, xop1
);
1467 if (binoptab
== vec_pack_trunc_optab
1468 || binoptab
== vec_pack_usat_optab
1469 || binoptab
== vec_pack_ssat_optab
1470 || binoptab
== vec_pack_ufix_trunc_optab
1471 || binoptab
== vec_pack_sfix_trunc_optab
)
1473 /* The mode of the result is different then the mode of the
1475 tmp_mode
= insn_data
[icode
].operand
[0].mode
;
1476 if (GET_MODE_NUNITS (tmp_mode
) != 2 * GET_MODE_NUNITS (mode
))
1482 if (!insn_data
[icode
].operand
[0].predicate (temp
, tmp_mode
))
1483 temp
= gen_reg_rtx (tmp_mode
);
1485 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
1488 /* If PAT is composed of more than one insn, try to add an appropriate
1489 REG_EQUAL note to it. If we can't because TEMP conflicts with an
1490 operand, call expand_binop again, this time without a target. */
1491 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
1492 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
1494 delete_insns_since (last
);
1495 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
1496 unsignedp
, methods
);
1503 delete_insns_since (last
);
1507 /* Generate code to perform an operation specified by BINOPTAB
1508 on operands OP0 and OP1, with result having machine-mode MODE.
1510 UNSIGNEDP is for the case where we have to widen the operands
1511 to perform the operation. It says to use zero-extension.
1513 If TARGET is nonzero, the value
1514 is generated there, if it is convenient to do so.
1515 In all cases an rtx is returned for the locus of the value;
1516 this may or may not be TARGET. */
1519 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
1520 rtx target
, int unsignedp
, enum optab_methods methods
)
1522 enum optab_methods next_methods
1523 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
1524 ? OPTAB_WIDEN
: methods
);
1525 enum mode_class mclass
;
1526 enum machine_mode wider_mode
;
1529 rtx entry_last
= get_last_insn ();
1532 mclass
= GET_MODE_CLASS (mode
);
1534 /* If subtracting an integer constant, convert this into an addition of
1535 the negated constant. */
1537 if (binoptab
== sub_optab
&& CONST_INT_P (op1
))
1539 op1
= negate_rtx (mode
, op1
);
1540 binoptab
= add_optab
;
1543 /* Record where to delete back to if we backtrack. */
1544 last
= get_last_insn ();
1546 /* If we can do it with a three-operand insn, do so. */
1548 if (methods
!= OPTAB_MUST_WIDEN
1549 && optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
1551 temp
= expand_binop_directly (mode
, binoptab
, op0
, op1
, target
,
1552 unsignedp
, methods
, last
);
1557 /* If we were trying to rotate, and that didn't work, try rotating
1558 the other direction before falling back to shifts and bitwise-or. */
1559 if (((binoptab
== rotl_optab
1560 && optab_handler (rotr_optab
, mode
) != CODE_FOR_nothing
)
1561 || (binoptab
== rotr_optab
1562 && optab_handler (rotl_optab
, mode
) != CODE_FOR_nothing
))
1563 && mclass
== MODE_INT
)
1565 optab otheroptab
= (binoptab
== rotl_optab
? rotr_optab
: rotl_optab
);
1567 unsigned int bits
= GET_MODE_BITSIZE (mode
);
1569 if (CONST_INT_P (op1
))
1570 newop1
= GEN_INT (bits
- INTVAL (op1
));
1571 else if (targetm
.shift_truncation_mask (mode
) == bits
- 1)
1572 newop1
= negate_rtx (GET_MODE (op1
), op1
);
1574 newop1
= expand_binop (GET_MODE (op1
), sub_optab
,
1575 GEN_INT (bits
), op1
,
1576 NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1578 temp
= expand_binop_directly (mode
, otheroptab
, op0
, newop1
,
1579 target
, unsignedp
, methods
, last
);
1584 /* If this is a multiply, see if we can do a widening operation that
1585 takes operands of this mode and makes a wider mode. */
1587 if (binoptab
== smul_optab
1588 && GET_MODE_WIDER_MODE (mode
) != VOIDmode
1589 && (optab_handler ((unsignedp
? umul_widen_optab
: smul_widen_optab
),
1590 GET_MODE_WIDER_MODE (mode
))
1591 != CODE_FOR_nothing
))
1593 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
1594 unsignedp
? umul_widen_optab
: smul_widen_optab
,
1595 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
1599 if (GET_MODE_CLASS (mode
) == MODE_INT
1600 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1601 GET_MODE_BITSIZE (GET_MODE (temp
))))
1602 return gen_lowpart (mode
, temp
);
1604 return convert_to_mode (mode
, temp
, unsignedp
);
1608 /* Look for a wider mode of the same class for which we think we
1609 can open-code the operation. Check for a widening multiply at the
1610 wider mode as well. */
1612 if (CLASS_HAS_WIDER_MODES_P (mclass
)
1613 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
1614 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
1615 wider_mode
!= VOIDmode
;
1616 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1618 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
1619 || (binoptab
== smul_optab
1620 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
1621 && (optab_handler ((unsignedp
? umul_widen_optab
1622 : smul_widen_optab
),
1623 GET_MODE_WIDER_MODE (wider_mode
))
1624 != CODE_FOR_nothing
)))
1626 rtx xop0
= op0
, xop1
= op1
;
1629 /* For certain integer operations, we need not actually extend
1630 the narrow operands, as long as we will truncate
1631 the results to the same narrowness. */
1633 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1634 || binoptab
== xor_optab
1635 || binoptab
== add_optab
|| binoptab
== sub_optab
1636 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1637 && mclass
== MODE_INT
)
1640 xop0
= avoid_expensive_constant (mode
, binoptab
,
1642 if (binoptab
!= ashl_optab
)
1643 xop1
= avoid_expensive_constant (mode
, binoptab
,
1647 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
1649 /* The second operand of a shift must always be extended. */
1650 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1651 no_extend
&& binoptab
!= ashl_optab
);
1653 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1654 unsignedp
, OPTAB_DIRECT
);
1657 if (mclass
!= MODE_INT
1658 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
1659 GET_MODE_BITSIZE (wider_mode
)))
1662 target
= gen_reg_rtx (mode
);
1663 convert_move (target
, temp
, 0);
1667 return gen_lowpart (mode
, temp
);
1670 delete_insns_since (last
);
1674 /* If operation is commutative,
1675 try to make the first operand a register.
1676 Even better, try to make it the same as the target.
1677 Also try to make the last operand a constant. */
1678 if (commutative_optab_p (binoptab
)
1679 && swap_commutative_operands_with_target (target
, op0
, op1
))
1686 /* These can be done a word at a time. */
1687 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
1688 && mclass
== MODE_INT
1689 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1690 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1695 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1696 won't be accurate, so use a new target. */
1697 if (target
== 0 || target
== op0
|| target
== op1
)
1698 target
= gen_reg_rtx (mode
);
1702 /* Do the actual arithmetic. */
1703 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
1705 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
1706 rtx x
= expand_binop (word_mode
, binoptab
,
1707 operand_subword_force (op0
, i
, mode
),
1708 operand_subword_force (op1
, i
, mode
),
1709 target_piece
, unsignedp
, next_methods
);
1714 if (target_piece
!= x
)
1715 emit_move_insn (target_piece
, x
);
1718 insns
= get_insns ();
1721 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
1728 /* Synthesize double word shifts from single word shifts. */
1729 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
1730 || binoptab
== ashr_optab
)
1731 && mclass
== MODE_INT
1732 && (CONST_INT_P (op1
) || optimize_insn_for_speed_p ())
1733 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1734 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
1735 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1736 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1738 unsigned HOST_WIDE_INT shift_mask
, double_shift_mask
;
1739 enum machine_mode op1_mode
;
1741 double_shift_mask
= targetm
.shift_truncation_mask (mode
);
1742 shift_mask
= targetm
.shift_truncation_mask (word_mode
);
1743 op1_mode
= GET_MODE (op1
) != VOIDmode
? GET_MODE (op1
) : word_mode
;
1745 /* Apply the truncation to constant shifts. */
1746 if (double_shift_mask
> 0 && CONST_INT_P (op1
))
1747 op1
= GEN_INT (INTVAL (op1
) & double_shift_mask
);
1749 if (op1
== CONST0_RTX (op1_mode
))
1752 /* Make sure that this is a combination that expand_doubleword_shift
1753 can handle. See the comments there for details. */
1754 if (double_shift_mask
== 0
1755 || (shift_mask
== BITS_PER_WORD
- 1
1756 && double_shift_mask
== BITS_PER_WORD
* 2 - 1))
1759 rtx into_target
, outof_target
;
1760 rtx into_input
, outof_input
;
1761 int left_shift
, outof_word
;
1763 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1764 won't be accurate, so use a new target. */
1765 if (target
== 0 || target
== op0
|| target
== op1
)
1766 target
= gen_reg_rtx (mode
);
1770 /* OUTOF_* is the word we are shifting bits away from, and
1771 INTO_* is the word that we are shifting bits towards, thus
1772 they differ depending on the direction of the shift and
1773 WORDS_BIG_ENDIAN. */
1775 left_shift
= binoptab
== ashl_optab
;
1776 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1778 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1779 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1781 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1782 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1784 if (expand_doubleword_shift (op1_mode
, binoptab
,
1785 outof_input
, into_input
, op1
,
1786 outof_target
, into_target
,
1787 unsignedp
, next_methods
, shift_mask
))
1789 insns
= get_insns ();
1799 /* Synthesize double word rotates from single word shifts. */
1800 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1801 && mclass
== MODE_INT
1802 && CONST_INT_P (op1
)
1803 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1804 && optab_handler (ashl_optab
, word_mode
) != CODE_FOR_nothing
1805 && optab_handler (lshr_optab
, word_mode
) != CODE_FOR_nothing
)
1808 rtx into_target
, outof_target
;
1809 rtx into_input
, outof_input
;
1811 int shift_count
, left_shift
, outof_word
;
1813 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1814 won't be accurate, so use a new target. Do this also if target is not
1815 a REG, first because having a register instead may open optimization
1816 opportunities, and second because if target and op0 happen to be MEMs
1817 designating the same location, we would risk clobbering it too early
1818 in the code sequence we generate below. */
1819 if (target
== 0 || target
== op0
|| target
== op1
|| ! REG_P (target
))
1820 target
= gen_reg_rtx (mode
);
1824 shift_count
= INTVAL (op1
);
1826 /* OUTOF_* is the word we are shifting bits away from, and
1827 INTO_* is the word that we are shifting bits towards, thus
1828 they differ depending on the direction of the shift and
1829 WORDS_BIG_ENDIAN. */
1831 left_shift
= (binoptab
== rotl_optab
);
1832 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1834 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1835 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1837 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1838 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1840 if (shift_count
== BITS_PER_WORD
)
1842 /* This is just a word swap. */
1843 emit_move_insn (outof_target
, into_input
);
1844 emit_move_insn (into_target
, outof_input
);
1849 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1850 rtx first_shift_count
, second_shift_count
;
1851 optab reverse_unsigned_shift
, unsigned_shift
;
1853 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1854 ? lshr_optab
: ashl_optab
);
1856 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1857 ? ashl_optab
: lshr_optab
);
1859 if (shift_count
> BITS_PER_WORD
)
1861 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1862 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1866 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1867 second_shift_count
= GEN_INT (shift_count
);
1870 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1871 outof_input
, first_shift_count
,
1872 NULL_RTX
, unsignedp
, next_methods
);
1873 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1874 into_input
, second_shift_count
,
1875 NULL_RTX
, unsignedp
, next_methods
);
1877 if (into_temp1
!= 0 && into_temp2
!= 0)
1878 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1879 into_target
, unsignedp
, next_methods
);
1883 if (inter
!= 0 && inter
!= into_target
)
1884 emit_move_insn (into_target
, inter
);
1886 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1887 into_input
, first_shift_count
,
1888 NULL_RTX
, unsignedp
, next_methods
);
1889 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1890 outof_input
, second_shift_count
,
1891 NULL_RTX
, unsignedp
, next_methods
);
1893 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1894 inter
= expand_binop (word_mode
, ior_optab
,
1895 outof_temp1
, outof_temp2
,
1896 outof_target
, unsignedp
, next_methods
);
1898 if (inter
!= 0 && inter
!= outof_target
)
1899 emit_move_insn (outof_target
, inter
);
1902 insns
= get_insns ();
1912 /* These can be done a word at a time by propagating carries. */
1913 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1914 && mclass
== MODE_INT
1915 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1916 && optab_handler (binoptab
, word_mode
) != CODE_FOR_nothing
)
1919 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1920 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1921 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1922 rtx xop0
, xop1
, xtarget
;
1924 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1925 value is one of those, use it. Otherwise, use 1 since it is the
1926 one easiest to get. */
1927 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1928 int normalizep
= STORE_FLAG_VALUE
;
1933 /* Prepare the operands. */
1934 xop0
= force_reg (mode
, op0
);
1935 xop1
= force_reg (mode
, op1
);
1937 xtarget
= gen_reg_rtx (mode
);
1939 if (target
== 0 || !REG_P (target
))
1942 /* Indicate for flow that the entire target reg is being set. */
1944 emit_clobber (xtarget
);
1946 /* Do the actual arithmetic. */
1947 for (i
= 0; i
< nwords
; i
++)
1949 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1950 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1951 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1952 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1955 /* Main add/subtract of the input operands. */
1956 x
= expand_binop (word_mode
, binoptab
,
1957 op0_piece
, op1_piece
,
1958 target_piece
, unsignedp
, next_methods
);
1964 /* Store carry from main add/subtract. */
1965 carry_out
= gen_reg_rtx (word_mode
);
1966 carry_out
= emit_store_flag_force (carry_out
,
1967 (binoptab
== add_optab
1970 word_mode
, 1, normalizep
);
1977 /* Add/subtract previous carry to main result. */
1978 newx
= expand_binop (word_mode
,
1979 normalizep
== 1 ? binoptab
: otheroptab
,
1981 NULL_RTX
, 1, next_methods
);
1985 /* Get out carry from adding/subtracting carry in. */
1986 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1987 carry_tmp
= emit_store_flag_force (carry_tmp
,
1988 (binoptab
== add_optab
1991 word_mode
, 1, normalizep
);
1993 /* Logical-ior the two poss. carry together. */
1994 carry_out
= expand_binop (word_mode
, ior_optab
,
1995 carry_out
, carry_tmp
,
1996 carry_out
, 0, next_methods
);
2000 emit_move_insn (target_piece
, newx
);
2004 if (x
!= target_piece
)
2005 emit_move_insn (target_piece
, x
);
2008 carry_in
= carry_out
;
2011 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
2013 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
2014 || ! rtx_equal_p (target
, xtarget
))
2016 rtx temp
= emit_move_insn (target
, xtarget
);
2018 set_unique_reg_note (temp
,
2020 gen_rtx_fmt_ee (binoptab
->code
, mode
,
2031 delete_insns_since (last
);
2034 /* Attempt to synthesize double word multiplies using a sequence of word
2035 mode multiplications. We first attempt to generate a sequence using a
2036 more efficient unsigned widening multiply, and if that fails we then
2037 try using a signed widening multiply. */
2039 if (binoptab
== smul_optab
2040 && mclass
== MODE_INT
2041 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
2042 && optab_handler (smul_optab
, word_mode
) != CODE_FOR_nothing
2043 && optab_handler (add_optab
, word_mode
) != CODE_FOR_nothing
)
2045 rtx product
= NULL_RTX
;
2047 if (optab_handler (umul_widen_optab
, mode
) != CODE_FOR_nothing
)
2049 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2052 delete_insns_since (last
);
2055 if (product
== NULL_RTX
2056 && optab_handler (smul_widen_optab
, mode
) != CODE_FOR_nothing
)
2058 product
= expand_doubleword_mult (mode
, op0
, op1
, target
,
2061 delete_insns_since (last
);
2064 if (product
!= NULL_RTX
)
2066 if (optab_handler (mov_optab
, mode
) != CODE_FOR_nothing
)
2068 temp
= emit_move_insn (target
? target
: product
, product
);
2069 set_unique_reg_note (temp
,
2071 gen_rtx_fmt_ee (MULT
, mode
,
2079 /* It can't be open-coded in this mode.
2080 Use a library call if one is available and caller says that's ok. */
2082 libfunc
= optab_libfunc (binoptab
, mode
);
2084 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
2088 enum machine_mode op1_mode
= mode
;
2093 if (shift_optab_p (binoptab
))
2095 op1_mode
= targetm
.libgcc_shift_count_mode ();
2096 /* Specify unsigned here,
2097 since negative shift counts are meaningless. */
2098 op1x
= convert_to_mode (op1_mode
, op1
, 1);
2101 if (GET_MODE (op0
) != VOIDmode
2102 && GET_MODE (op0
) != mode
)
2103 op0
= convert_to_mode (mode
, op0
, unsignedp
);
2105 /* Pass 1 for NO_QUEUE so we don't lose any increments
2106 if the libcall is cse'd or moved. */
2107 value
= emit_library_call_value (libfunc
,
2108 NULL_RTX
, LCT_CONST
, mode
, 2,
2109 op0
, mode
, op1x
, op1_mode
);
2111 insns
= get_insns ();
2114 target
= gen_reg_rtx (mode
);
2115 emit_libcall_block (insns
, target
, value
,
2116 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
2121 delete_insns_since (last
);
2123 /* It can't be done in this mode. Can we do it in a wider mode? */
2125 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
2126 || methods
== OPTAB_MUST_WIDEN
))
2128 /* Caller says, don't even try. */
2129 delete_insns_since (entry_last
);
2133 /* Compute the value of METHODS to pass to recursive calls.
2134 Don't allow widening to be tried recursively. */
2136 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
2138 /* Look for a wider mode of the same class for which it appears we can do
2141 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2143 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2144 wider_mode
!= VOIDmode
;
2145 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2147 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
2148 || (methods
== OPTAB_LIB
2149 && optab_libfunc (binoptab
, wider_mode
)))
2151 rtx xop0
= op0
, xop1
= op1
;
2154 /* For certain integer operations, we need not actually extend
2155 the narrow operands, as long as we will truncate
2156 the results to the same narrowness. */
2158 if ((binoptab
== ior_optab
|| binoptab
== and_optab
2159 || binoptab
== xor_optab
2160 || binoptab
== add_optab
|| binoptab
== sub_optab
2161 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
2162 && mclass
== MODE_INT
)
2165 xop0
= widen_operand (xop0
, wider_mode
, mode
,
2166 unsignedp
, no_extend
);
2168 /* The second operand of a shift must always be extended. */
2169 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
2170 no_extend
&& binoptab
!= ashl_optab
);
2172 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
2173 unsignedp
, methods
);
2176 if (mclass
!= MODE_INT
2177 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
2178 GET_MODE_BITSIZE (wider_mode
)))
2181 target
= gen_reg_rtx (mode
);
2182 convert_move (target
, temp
, 0);
2186 return gen_lowpart (mode
, temp
);
2189 delete_insns_since (last
);
2194 delete_insns_since (entry_last
);
2198 /* Expand a binary operator which has both signed and unsigned forms.
2199 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2202 If we widen unsigned operands, we may use a signed wider operation instead
2203 of an unsigned wider operation, since the result would be the same. */
2206 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2207 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2208 enum optab_methods methods
)
2211 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2212 struct optab_d wide_soptab
;
2214 /* Do it without widening, if possible. */
2215 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2216 unsignedp
, OPTAB_DIRECT
);
2217 if (temp
|| methods
== OPTAB_DIRECT
)
2220 /* Try widening to a signed int. Make a fake signed optab that
2221 hides any signed insn for direct use. */
2222 wide_soptab
= *soptab
;
2223 set_optab_handler (&wide_soptab
, mode
, CODE_FOR_nothing
);
2224 /* We don't want to generate new hash table entries from this fake
2226 wide_soptab
.libcall_gen
= NULL
;
2228 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2229 unsignedp
, OPTAB_WIDEN
);
2231 /* For unsigned operands, try widening to an unsigned int. */
2232 if (temp
== 0 && unsignedp
)
2233 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2234 unsignedp
, OPTAB_WIDEN
);
2235 if (temp
|| methods
== OPTAB_WIDEN
)
2238 /* Use the right width libcall if that exists. */
2239 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2240 if (temp
|| methods
== OPTAB_LIB
)
2243 /* Must widen and use a libcall, use either signed or unsigned. */
2244 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2245 unsignedp
, methods
);
2249 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2250 unsignedp
, methods
);
2254 /* Generate code to perform an operation specified by UNOPPTAB
2255 on operand OP0, with two results to TARG0 and TARG1.
2256 We assume that the order of the operands for the instruction
2257 is TARG0, TARG1, OP0.
2259 Either TARG0 or TARG1 may be zero, but what that means is that
2260 the result is not actually wanted. We will generate it into
2261 a dummy pseudo-reg and discard it. They may not both be zero.
2263 Returns 1 if this operation can be performed; 0 if not. */
2266 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2269 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2270 enum mode_class mclass
;
2271 enum machine_mode wider_mode
;
2272 rtx entry_last
= get_last_insn ();
2275 mclass
= GET_MODE_CLASS (mode
);
2278 targ0
= gen_reg_rtx (mode
);
2280 targ1
= gen_reg_rtx (mode
);
2282 /* Record where to go back to if we fail. */
2283 last
= get_last_insn ();
2285 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2287 int icode
= (int) optab_handler (unoptab
, mode
);
2288 enum machine_mode mode0
= insn_data
[icode
].operand
[2].mode
;
2292 if (GET_MODE (xop0
) != VOIDmode
2293 && GET_MODE (xop0
) != mode0
)
2294 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2296 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2297 if (!insn_data
[icode
].operand
[2].predicate (xop0
, mode0
))
2298 xop0
= copy_to_mode_reg (mode0
, xop0
);
2300 /* We could handle this, but we should always be called with a pseudo
2301 for our targets and all insns should take them as outputs. */
2302 gcc_assert (insn_data
[icode
].operand
[0].predicate (targ0
, mode
));
2303 gcc_assert (insn_data
[icode
].operand
[1].predicate (targ1
, mode
));
2305 pat
= GEN_FCN (icode
) (targ0
, targ1
, xop0
);
2312 delete_insns_since (last
);
2315 /* It can't be done in this mode. Can we do it in a wider mode? */
2317 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2319 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2320 wider_mode
!= VOIDmode
;
2321 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2323 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
2325 rtx t0
= gen_reg_rtx (wider_mode
);
2326 rtx t1
= gen_reg_rtx (wider_mode
);
2327 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2329 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2331 convert_move (targ0
, t0
, unsignedp
);
2332 convert_move (targ1
, t1
, unsignedp
);
2336 delete_insns_since (last
);
2341 delete_insns_since (entry_last
);
2345 /* Generate code to perform an operation specified by BINOPTAB
2346 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2347 We assume that the order of the operands for the instruction
2348 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2349 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2351 Either TARG0 or TARG1 may be zero, but what that means is that
2352 the result is not actually wanted. We will generate it into
2353 a dummy pseudo-reg and discard it. They may not both be zero.
2355 Returns 1 if this operation can be performed; 0 if not. */
2358 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2361 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2362 enum mode_class mclass
;
2363 enum machine_mode wider_mode
;
2364 rtx entry_last
= get_last_insn ();
2367 mclass
= GET_MODE_CLASS (mode
);
2370 targ0
= gen_reg_rtx (mode
);
2372 targ1
= gen_reg_rtx (mode
);
2374 /* Record where to go back to if we fail. */
2375 last
= get_last_insn ();
2377 if (optab_handler (binoptab
, mode
) != CODE_FOR_nothing
)
2379 int icode
= (int) optab_handler (binoptab
, mode
);
2380 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2381 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2383 rtx xop0
= op0
, xop1
= op1
;
2385 /* If we are optimizing, force expensive constants into a register. */
2386 xop0
= avoid_expensive_constant (mode0
, binoptab
, xop0
, unsignedp
);
2387 xop1
= avoid_expensive_constant (mode1
, binoptab
, xop1
, unsignedp
);
2389 /* In case the insn wants input operands in modes different from
2390 those of the actual operands, convert the operands. It would
2391 seem that we don't need to convert CONST_INTs, but we do, so
2392 that they're properly zero-extended, sign-extended or truncated
2395 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2396 xop0
= convert_modes (mode0
,
2397 GET_MODE (op0
) != VOIDmode
2402 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2403 xop1
= convert_modes (mode1
,
2404 GET_MODE (op1
) != VOIDmode
2409 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2410 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
))
2411 xop0
= copy_to_mode_reg (mode0
, xop0
);
2413 if (!insn_data
[icode
].operand
[2].predicate (xop1
, mode1
))
2414 xop1
= copy_to_mode_reg (mode1
, xop1
);
2416 /* We could handle this, but we should always be called with a pseudo
2417 for our targets and all insns should take them as outputs. */
2418 gcc_assert (insn_data
[icode
].operand
[0].predicate (targ0
, mode
));
2419 gcc_assert (insn_data
[icode
].operand
[3].predicate (targ1
, mode
));
2421 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2428 delete_insns_since (last
);
2431 /* It can't be done in this mode. Can we do it in a wider mode? */
2433 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2435 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2436 wider_mode
!= VOIDmode
;
2437 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2439 if (optab_handler (binoptab
, wider_mode
) != CODE_FOR_nothing
)
2441 rtx t0
= gen_reg_rtx (wider_mode
);
2442 rtx t1
= gen_reg_rtx (wider_mode
);
2443 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2444 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2446 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2449 convert_move (targ0
, t0
, unsignedp
);
2450 convert_move (targ1
, t1
, unsignedp
);
2454 delete_insns_since (last
);
2459 delete_insns_since (entry_last
);
2463 /* Expand the two-valued library call indicated by BINOPTAB, but
2464 preserve only one of the values. If TARG0 is non-NULL, the first
2465 value is placed into TARG0; otherwise the second value is placed
2466 into TARG1. Exactly one of TARG0 and TARG1 must be non-NULL. The
2467 value stored into TARG0 or TARG1 is equivalent to (CODE OP0 OP1).
2468 This routine assumes that the value returned by the library call is
2469 as if the return value was of an integral mode twice as wide as the
2470 mode of OP0. Returns 1 if the call was successful. */
2473 expand_twoval_binop_libfunc (optab binoptab
, rtx op0
, rtx op1
,
2474 rtx targ0
, rtx targ1
, enum rtx_code code
)
2476 enum machine_mode mode
;
2477 enum machine_mode libval_mode
;
2482 /* Exactly one of TARG0 or TARG1 should be non-NULL. */
2483 gcc_assert (!targ0
!= !targ1
);
2485 mode
= GET_MODE (op0
);
2486 libfunc
= optab_libfunc (binoptab
, mode
);
2490 /* The value returned by the library function will have twice as
2491 many bits as the nominal MODE. */
2492 libval_mode
= smallest_mode_for_size (2 * GET_MODE_BITSIZE (mode
),
2495 libval
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
2499 /* Get the part of VAL containing the value that we want. */
2500 libval
= simplify_gen_subreg (mode
, libval
, libval_mode
,
2501 targ0
? 0 : GET_MODE_SIZE (mode
));
2502 insns
= get_insns ();
2504 /* Move the into the desired location. */
2505 emit_libcall_block (insns
, targ0
? targ0
: targ1
, libval
,
2506 gen_rtx_fmt_ee (code
, mode
, op0
, op1
));
2512 /* Wrapper around expand_unop which takes an rtx code to specify
2513 the operation to perform, not an optab pointer. All other
2514 arguments are the same. */
2516 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2517 rtx target
, int unsignedp
)
2519 optab unop
= code_to_optab
[(int) code
];
2522 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2528 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2530 widen_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2532 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2533 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2535 enum machine_mode wider_mode
;
2536 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2537 wider_mode
!= VOIDmode
;
2538 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2540 if (optab_handler (clz_optab
, wider_mode
) != CODE_FOR_nothing
)
2542 rtx xop0
, temp
, last
;
2544 last
= get_last_insn ();
2547 target
= gen_reg_rtx (mode
);
2548 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2549 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2551 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2552 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2553 - GET_MODE_BITSIZE (mode
)),
2554 target
, true, OPTAB_DIRECT
);
2556 delete_insns_since (last
);
2565 /* Try calculating clz of a double-word quantity as two clz's of word-sized
2566 quantities, choosing which based on whether the high word is nonzero. */
2568 expand_doubleword_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2570 rtx xop0
= force_reg (mode
, op0
);
2571 rtx subhi
= gen_highpart (word_mode
, xop0
);
2572 rtx sublo
= gen_lowpart (word_mode
, xop0
);
2573 rtx hi0_label
= gen_label_rtx ();
2574 rtx after_label
= gen_label_rtx ();
2575 rtx seq
, temp
, result
;
2577 /* If we were not given a target, use a word_mode register, not a
2578 'mode' register. The result will fit, and nobody is expecting
2579 anything bigger (the return type of __builtin_clz* is int). */
2581 target
= gen_reg_rtx (word_mode
);
2583 /* In any case, write to a word_mode scratch in both branches of the
2584 conditional, so we can ensure there is a single move insn setting
2585 'target' to tag a REG_EQUAL note on. */
2586 result
= gen_reg_rtx (word_mode
);
2590 /* If the high word is not equal to zero,
2591 then clz of the full value is clz of the high word. */
2592 emit_cmp_and_jump_insns (subhi
, CONST0_RTX (word_mode
), EQ
, 0,
2593 word_mode
, true, hi0_label
);
2595 temp
= expand_unop_direct (word_mode
, clz_optab
, subhi
, result
, true);
2600 convert_move (result
, temp
, true);
2602 emit_jump_insn (gen_jump (after_label
));
2605 /* Else clz of the full value is clz of the low word plus the number
2606 of bits in the high word. */
2607 emit_label (hi0_label
);
2609 temp
= expand_unop_direct (word_mode
, clz_optab
, sublo
, 0, true);
2612 temp
= expand_binop (word_mode
, add_optab
, temp
,
2613 GEN_INT (GET_MODE_BITSIZE (word_mode
)),
2614 result
, true, OPTAB_DIRECT
);
2618 convert_move (result
, temp
, true);
2620 emit_label (after_label
);
2621 convert_move (target
, result
, true);
2626 add_equal_note (seq
, target
, CLZ
, xop0
, 0);
2638 (lshiftrt:wide (bswap:wide x) ((width wide) - (width narrow))). */
2640 widen_bswap (enum machine_mode mode
, rtx op0
, rtx target
)
2642 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2643 enum machine_mode wider_mode
;
2646 if (!CLASS_HAS_WIDER_MODES_P (mclass
))
2649 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
2650 wider_mode
!= VOIDmode
;
2651 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2652 if (optab_handler (bswap_optab
, wider_mode
) != CODE_FOR_nothing
)
2657 last
= get_last_insn ();
2659 x
= widen_operand (op0
, wider_mode
, mode
, true, true);
2660 x
= expand_unop (wider_mode
, bswap_optab
, x
, NULL_RTX
, true);
2663 x
= expand_shift (RSHIFT_EXPR
, wider_mode
, x
,
2664 size_int (GET_MODE_BITSIZE (wider_mode
)
2665 - GET_MODE_BITSIZE (mode
)),
2671 target
= gen_reg_rtx (mode
);
2672 emit_move_insn (target
, gen_lowpart (mode
, x
));
2675 delete_insns_since (last
);
2680 /* Try calculating bswap as two bswaps of two word-sized operands. */
2683 expand_doubleword_bswap (enum machine_mode mode
, rtx op
, rtx target
)
2687 t1
= expand_unop (word_mode
, bswap_optab
,
2688 operand_subword_force (op
, 0, mode
), NULL_RTX
, true);
2689 t0
= expand_unop (word_mode
, bswap_optab
,
2690 operand_subword_force (op
, 1, mode
), NULL_RTX
, true);
2693 target
= gen_reg_rtx (mode
);
2695 emit_clobber (target
);
2696 emit_move_insn (operand_subword (target
, 0, 1, mode
), t0
);
2697 emit_move_insn (operand_subword (target
, 1, 1, mode
), t1
);
2702 /* Try calculating (parity x) as (and (popcount x) 1), where
2703 popcount can also be done in a wider mode. */
2705 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2707 enum mode_class mclass
= GET_MODE_CLASS (mode
);
2708 if (CLASS_HAS_WIDER_MODES_P (mclass
))
2710 enum machine_mode wider_mode
;
2711 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2712 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2714 if (optab_handler (popcount_optab
, wider_mode
) != CODE_FOR_nothing
)
2716 rtx xop0
, temp
, last
;
2718 last
= get_last_insn ();
2721 target
= gen_reg_rtx (mode
);
2722 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2723 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2726 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2727 target
, true, OPTAB_DIRECT
);
2729 delete_insns_since (last
);
2738 /* Try calculating ctz(x) as K - clz(x & -x) ,
2739 where K is GET_MODE_BITSIZE(mode) - 1.
2741 Both __builtin_ctz and __builtin_clz are undefined at zero, so we
2742 don't have to worry about what the hardware does in that case. (If
2743 the clz instruction produces the usual value at 0, which is K, the
2744 result of this code sequence will be -1; expand_ffs, below, relies
2745 on this. It might be nice to have it be K instead, for consistency
2746 with the (very few) processors that provide a ctz with a defined
2747 value, but that would take one more instruction, and it would be
2748 less convenient for expand_ffs anyway. */
2751 expand_ctz (enum machine_mode mode
, rtx op0
, rtx target
)
2755 if (optab_handler (clz_optab
, mode
) == CODE_FOR_nothing
)
2760 temp
= expand_unop_direct (mode
, neg_optab
, op0
, NULL_RTX
, true);
2762 temp
= expand_binop (mode
, and_optab
, op0
, temp
, NULL_RTX
,
2763 true, OPTAB_DIRECT
);
2765 temp
= expand_unop_direct (mode
, clz_optab
, temp
, NULL_RTX
, true);
2767 temp
= expand_binop (mode
, sub_optab
, GEN_INT (GET_MODE_BITSIZE (mode
) - 1),
2769 true, OPTAB_DIRECT
);
2779 add_equal_note (seq
, temp
, CTZ
, op0
, 0);
2785 /* Try calculating ffs(x) using ctz(x) if we have that instruction, or
2786 else with the sequence used by expand_clz.
2788 The ffs builtin promises to return zero for a zero value and ctz/clz
2789 may have an undefined value in that case. If they do not give us a
2790 convenient value, we have to generate a test and branch. */
2792 expand_ffs (enum machine_mode mode
, rtx op0
, rtx target
)
2794 HOST_WIDE_INT val
= 0;
2795 bool defined_at_zero
= false;
2798 if (optab_handler (ctz_optab
, mode
) != CODE_FOR_nothing
)
2802 temp
= expand_unop_direct (mode
, ctz_optab
, op0
, 0, true);
2806 defined_at_zero
= (CTZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2);
2808 else if (optab_handler (clz_optab
, mode
) != CODE_FOR_nothing
)
2811 temp
= expand_ctz (mode
, op0
, 0);
2815 if (CLZ_DEFINED_VALUE_AT_ZERO (mode
, val
) == 2)
2817 defined_at_zero
= true;
2818 val
= (GET_MODE_BITSIZE (mode
) - 1) - val
;
2824 if (defined_at_zero
&& val
== -1)
2825 /* No correction needed at zero. */;
2828 /* We don't try to do anything clever with the situation found
2829 on some processors (eg Alpha) where ctz(0:mode) ==
2830 bitsize(mode). If someone can think of a way to send N to -1
2831 and leave alone all values in the range 0..N-1 (where N is a
2832 power of two), cheaper than this test-and-branch, please add it.
2834 The test-and-branch is done after the operation itself, in case
2835 the operation sets condition codes that can be recycled for this.
2836 (This is true on i386, for instance.) */
2838 rtx nonzero_label
= gen_label_rtx ();
2839 emit_cmp_and_jump_insns (op0
, CONST0_RTX (mode
), NE
, 0,
2840 mode
, true, nonzero_label
);
2842 convert_move (temp
, GEN_INT (-1), false);
2843 emit_label (nonzero_label
);
2846 /* temp now has a value in the range -1..bitsize-1. ffs is supposed
2847 to produce a value in the range 0..bitsize. */
2848 temp
= expand_binop (mode
, add_optab
, temp
, GEN_INT (1),
2849 target
, false, OPTAB_DIRECT
);
2856 add_equal_note (seq
, temp
, FFS
, op0
, 0);
2865 /* Extract the OMODE lowpart from VAL, which has IMODE. Under certain
2866 conditions, VAL may already be a SUBREG against which we cannot generate
2867 a further SUBREG. In this case, we expect forcing the value into a
2868 register will work around the situation. */
2871 lowpart_subreg_maybe_copy (enum machine_mode omode
, rtx val
,
2872 enum machine_mode imode
)
2875 ret
= lowpart_subreg (omode
, val
, imode
);
2878 val
= force_reg (imode
, val
);
2879 ret
= lowpart_subreg (omode
, val
, imode
);
2880 gcc_assert (ret
!= NULL
);
2885 /* Expand a floating point absolute value or negation operation via a
2886 logical operation on the sign bit. */
2889 expand_absneg_bit (enum rtx_code code
, enum machine_mode mode
,
2890 rtx op0
, rtx target
)
2892 const struct real_format
*fmt
;
2893 int bitpos
, word
, nwords
, i
;
2894 enum machine_mode imode
;
2898 /* The format has to have a simple sign bit. */
2899 fmt
= REAL_MODE_FORMAT (mode
);
2903 bitpos
= fmt
->signbit_rw
;
2907 /* Don't create negative zeros if the format doesn't support them. */
2908 if (code
== NEG
&& !fmt
->has_signed_zero
)
2911 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
2913 imode
= int_mode_for_mode (mode
);
2914 if (imode
== BLKmode
)
2923 if (FLOAT_WORDS_BIG_ENDIAN
)
2924 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
2926 word
= bitpos
/ BITS_PER_WORD
;
2927 bitpos
= bitpos
% BITS_PER_WORD
;
2928 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
2931 mask
= double_int_setbit (double_int_zero
, bitpos
);
2933 mask
= double_int_not (mask
);
2935 if (target
== 0 || target
== op0
)
2936 target
= gen_reg_rtx (mode
);
2942 for (i
= 0; i
< nwords
; ++i
)
2944 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
2945 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
2949 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2951 immed_double_int_const (mask
, imode
),
2952 targ_piece
, 1, OPTAB_LIB_WIDEN
);
2953 if (temp
!= targ_piece
)
2954 emit_move_insn (targ_piece
, temp
);
2957 emit_move_insn (targ_piece
, op0_piece
);
2960 insns
= get_insns ();
2967 temp
= expand_binop (imode
, code
== ABS
? and_optab
: xor_optab
,
2968 gen_lowpart (imode
, op0
),
2969 immed_double_int_const (mask
, imode
),
2970 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
2971 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
2973 set_unique_reg_note (get_last_insn (), REG_EQUAL
,
2974 gen_rtx_fmt_e (code
, mode
, copy_rtx (op0
)));
2980 /* As expand_unop, but will fail rather than attempt the operation in a
2981 different mode or with a libcall. */
2983 expand_unop_direct (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2986 if (optab_handler (unoptab
, mode
) != CODE_FOR_nothing
)
2988 int icode
= (int) optab_handler (unoptab
, mode
);
2989 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2991 rtx last
= get_last_insn ();
2997 temp
= gen_reg_rtx (mode
);
2999 if (GET_MODE (xop0
) != VOIDmode
3000 && GET_MODE (xop0
) != mode0
)
3001 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
3003 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3005 if (!insn_data
[icode
].operand
[1].predicate (xop0
, mode0
))
3006 xop0
= copy_to_mode_reg (mode0
, xop0
);
3008 if (!insn_data
[icode
].operand
[0].predicate (temp
, mode
))
3009 temp
= gen_reg_rtx (mode
);
3011 pat
= GEN_FCN (icode
) (temp
, xop0
);
3014 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3015 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
3017 delete_insns_since (last
);
3018 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
3026 delete_insns_since (last
);
3031 /* Generate code to perform an operation specified by UNOPTAB
3032 on operand OP0, with result having machine-mode MODE.
3034 UNSIGNEDP is for the case where we have to widen the operands
3035 to perform the operation. It says to use zero-extension.
3037 If TARGET is nonzero, the value
3038 is generated there, if it is convenient to do so.
3039 In all cases an rtx is returned for the locus of the value;
3040 this may or may not be TARGET. */
3043 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
3046 enum mode_class mclass
= GET_MODE_CLASS (mode
);
3047 enum machine_mode wider_mode
;
3051 temp
= expand_unop_direct (mode
, unoptab
, op0
, target
, unsignedp
);
3055 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3057 /* Widening (or narrowing) clz needs special treatment. */
3058 if (unoptab
== clz_optab
)
3060 temp
= widen_clz (mode
, op0
, target
);
3064 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3065 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3067 temp
= expand_doubleword_clz (mode
, op0
, target
);
3075 /* Widening (or narrowing) bswap needs special treatment. */
3076 if (unoptab
== bswap_optab
)
3078 temp
= widen_bswap (mode
, op0
, target
);
3082 if (GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
3083 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3085 temp
= expand_doubleword_bswap (mode
, op0
, target
);
3093 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3094 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3095 wider_mode
!= VOIDmode
;
3096 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3098 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
)
3101 rtx last
= get_last_insn ();
3103 /* For certain operations, we need not actually extend
3104 the narrow operand, as long as we will truncate the
3105 results to the same narrowness. */
3107 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3108 (unoptab
== neg_optab
3109 || unoptab
== one_cmpl_optab
)
3110 && mclass
== MODE_INT
);
3112 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3117 if (mclass
!= MODE_INT
3118 || !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (mode
),
3119 GET_MODE_BITSIZE (wider_mode
)))
3122 target
= gen_reg_rtx (mode
);
3123 convert_move (target
, temp
, 0);
3127 return gen_lowpart (mode
, temp
);
3130 delete_insns_since (last
);
3134 /* These can be done a word at a time. */
3135 if (unoptab
== one_cmpl_optab
3136 && mclass
== MODE_INT
3137 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
3138 && optab_handler (unoptab
, word_mode
) != CODE_FOR_nothing
)
3143 if (target
== 0 || target
== op0
)
3144 target
= gen_reg_rtx (mode
);
3148 /* Do the actual arithmetic. */
3149 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
3151 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
3152 rtx x
= expand_unop (word_mode
, unoptab
,
3153 operand_subword_force (op0
, i
, mode
),
3154 target_piece
, unsignedp
);
3156 if (target_piece
!= x
)
3157 emit_move_insn (target_piece
, x
);
3160 insns
= get_insns ();
3167 if (unoptab
->code
== NEG
)
3169 /* Try negating floating point values by flipping the sign bit. */
3170 if (SCALAR_FLOAT_MODE_P (mode
))
3172 temp
= expand_absneg_bit (NEG
, mode
, op0
, target
);
3177 /* If there is no negation pattern, and we have no negative zero,
3178 try subtracting from zero. */
3179 if (!HONOR_SIGNED_ZEROS (mode
))
3181 temp
= expand_binop (mode
, (unoptab
== negv_optab
3182 ? subv_optab
: sub_optab
),
3183 CONST0_RTX (mode
), op0
, target
,
3184 unsignedp
, OPTAB_DIRECT
);
3190 /* Try calculating parity (x) as popcount (x) % 2. */
3191 if (unoptab
== parity_optab
)
3193 temp
= expand_parity (mode
, op0
, target
);
3198 /* Try implementing ffs (x) in terms of clz (x). */
3199 if (unoptab
== ffs_optab
)
3201 temp
= expand_ffs (mode
, op0
, target
);
3206 /* Try implementing ctz (x) in terms of clz (x). */
3207 if (unoptab
== ctz_optab
)
3209 temp
= expand_ctz (mode
, op0
, target
);
3215 /* Now try a library call in this mode. */
3216 libfunc
= optab_libfunc (unoptab
, mode
);
3222 enum machine_mode outmode
= mode
;
3224 /* All of these functions return small values. Thus we choose to
3225 have them return something that isn't a double-word. */
3226 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
3227 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
3229 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
),
3230 optab_libfunc (unoptab
, mode
)));
3234 /* Pass 1 for NO_QUEUE so we don't lose any increments
3235 if the libcall is cse'd or moved. */
3236 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, outmode
,
3238 insns
= get_insns ();
3241 target
= gen_reg_rtx (outmode
);
3242 eq_value
= gen_rtx_fmt_e (unoptab
->code
, mode
, op0
);
3243 if (GET_MODE_SIZE (outmode
) < GET_MODE_SIZE (mode
))
3244 eq_value
= simplify_gen_unary (TRUNCATE
, outmode
, eq_value
, mode
);
3245 else if (GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (mode
))
3246 eq_value
= simplify_gen_unary (ZERO_EXTEND
, outmode
, eq_value
, mode
);
3247 emit_libcall_block (insns
, target
, value
, eq_value
);
3252 /* It can't be done in this mode. Can we do it in a wider mode? */
3254 if (CLASS_HAS_WIDER_MODES_P (mclass
))
3256 for (wider_mode
= GET_MODE_WIDER_MODE (mode
);
3257 wider_mode
!= VOIDmode
;
3258 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3260 if (optab_handler (unoptab
, wider_mode
) != CODE_FOR_nothing
3261 || optab_libfunc (unoptab
, wider_mode
))
3264 rtx last
= get_last_insn ();
3266 /* For certain operations, we need not actually extend
3267 the narrow operand, as long as we will truncate the
3268 results to the same narrowness. */
3270 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
3271 (unoptab
== neg_optab
3272 || unoptab
== one_cmpl_optab
)
3273 && mclass
== MODE_INT
);
3275 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
3278 /* If we are generating clz using wider mode, adjust the
3280 if (unoptab
== clz_optab
&& temp
!= 0)
3281 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
3282 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
3283 - GET_MODE_BITSIZE (mode
)),
3284 target
, true, OPTAB_DIRECT
);
3288 if (mclass
!= MODE_INT
)
3291 target
= gen_reg_rtx (mode
);
3292 convert_move (target
, temp
, 0);
3296 return gen_lowpart (mode
, temp
);
3299 delete_insns_since (last
);
3304 /* One final attempt at implementing negation via subtraction,
3305 this time allowing widening of the operand. */
3306 if (unoptab
->code
== NEG
&& !HONOR_SIGNED_ZEROS (mode
))
3309 temp
= expand_binop (mode
,
3310 unoptab
== negv_optab
? subv_optab
: sub_optab
,
3311 CONST0_RTX (mode
), op0
,
3312 target
, unsignedp
, OPTAB_LIB_WIDEN
);
3320 /* Emit code to compute the absolute value of OP0, with result to
3321 TARGET if convenient. (TARGET may be 0.) The return value says
3322 where the result actually is to be found.
3324 MODE is the mode of the operand; the mode of the result is
3325 different but can be deduced from MODE.
3330 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
3331 int result_unsignedp
)
3336 result_unsignedp
= 1;
3338 /* First try to do it with a special abs instruction. */
3339 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
3344 /* For floating point modes, try clearing the sign bit. */
3345 if (SCALAR_FLOAT_MODE_P (mode
))
3347 temp
= expand_absneg_bit (ABS
, mode
, op0
, target
);
3352 /* If we have a MAX insn, we can do this as MAX (x, -x). */
3353 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
3354 && !HONOR_SIGNED_ZEROS (mode
))
3356 rtx last
= get_last_insn ();
3358 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
3360 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3366 delete_insns_since (last
);
3369 /* If this machine has expensive jumps, we can do integer absolute
3370 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
3371 where W is the width of MODE. */
3373 if (GET_MODE_CLASS (mode
) == MODE_INT
3374 && BRANCH_COST (optimize_insn_for_speed_p (),
3377 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3378 size_int (GET_MODE_BITSIZE (mode
) - 1),
3381 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3384 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
3385 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
3395 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3396 int result_unsignedp
, int safe
)
3401 result_unsignedp
= 1;
3403 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
3407 /* If that does not win, use conditional jump and negate. */
3409 /* It is safe to use the target if it is the same
3410 as the source if this is also a pseudo register */
3411 if (op0
== target
&& REG_P (op0
)
3412 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
3415 op1
= gen_label_rtx ();
3416 if (target
== 0 || ! safe
3417 || GET_MODE (target
) != mode
3418 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
3420 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
3421 target
= gen_reg_rtx (mode
);
3423 emit_move_insn (target
, op0
);
3426 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
3427 NULL_RTX
, NULL_RTX
, op1
, -1);
3429 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3432 emit_move_insn (target
, op0
);
3438 /* Emit code to compute the one's complement absolute value of OP0
3439 (if (OP0 < 0) OP0 = ~OP0), with result to TARGET if convenient.
3440 (TARGET may be NULL_RTX.) The return value says where the result
3441 actually is to be found.
3443 MODE is the mode of the operand; the mode of the result is
3444 different but can be deduced from MODE. */
3447 expand_one_cmpl_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
)
3451 /* Not applicable for floating point modes. */
3452 if (FLOAT_MODE_P (mode
))
3455 /* If we have a MAX insn, we can do this as MAX (x, ~x). */
3456 if (optab_handler (smax_optab
, mode
) != CODE_FOR_nothing
)
3458 rtx last
= get_last_insn ();
3460 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, NULL_RTX
, 0);
3462 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
3468 delete_insns_since (last
);
3471 /* If this machine has expensive jumps, we can do one's complement
3472 absolute value of X as (((signed) x >> (W-1)) ^ x). */
3474 if (GET_MODE_CLASS (mode
) == MODE_INT
3475 && BRANCH_COST (optimize_insn_for_speed_p (),
3478 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
3479 size_int (GET_MODE_BITSIZE (mode
) - 1),
3482 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
3492 /* A subroutine of expand_copysign, perform the copysign operation using the
3493 abs and neg primitives advertised to exist on the target. The assumption
3494 is that we have a split register file, and leaving op0 in fp registers,
3495 and not playing with subregs so much, will help the register allocator. */
3498 expand_copysign_absneg (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3499 int bitpos
, bool op0_is_abs
)
3501 enum machine_mode imode
;
3508 /* Check if the back end provides an insn that handles signbit for the
3510 icode
= (int) optab_handler (signbit_optab
, mode
);
3511 if (icode
!= CODE_FOR_nothing
)
3513 imode
= insn_data
[icode
].operand
[0].mode
;
3514 sign
= gen_reg_rtx (imode
);
3515 emit_unop_insn (icode
, sign
, op1
, UNKNOWN
);
3521 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3523 imode
= int_mode_for_mode (mode
);
3524 if (imode
== BLKmode
)
3526 op1
= gen_lowpart (imode
, op1
);
3533 if (FLOAT_WORDS_BIG_ENDIAN
)
3534 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3536 word
= bitpos
/ BITS_PER_WORD
;
3537 bitpos
= bitpos
% BITS_PER_WORD
;
3538 op1
= operand_subword_force (op1
, word
, mode
);
3541 mask
= double_int_setbit (double_int_zero
, bitpos
);
3543 sign
= expand_binop (imode
, and_optab
, op1
,
3544 immed_double_int_const (mask
, imode
),
3545 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3550 op0
= expand_unop (mode
, abs_optab
, op0
, target
, 0);
3557 if (target
== NULL_RTX
)
3558 target
= copy_to_reg (op0
);
3560 emit_move_insn (target
, op0
);
3563 label
= gen_label_rtx ();
3564 emit_cmp_and_jump_insns (sign
, const0_rtx
, EQ
, NULL_RTX
, imode
, 1, label
);
3566 if (GET_CODE (op0
) == CONST_DOUBLE
)
3567 op0
= simplify_unary_operation (NEG
, mode
, op0
, mode
);
3569 op0
= expand_unop (mode
, neg_optab
, op0
, target
, 0);
3571 emit_move_insn (target
, op0
);
3579 /* A subroutine of expand_copysign, perform the entire copysign operation
3580 with integer bitmasks. BITPOS is the position of the sign bit; OP0_IS_ABS
3581 is true if op0 is known to have its sign bit clear. */
3584 expand_copysign_bit (enum machine_mode mode
, rtx op0
, rtx op1
, rtx target
,
3585 int bitpos
, bool op0_is_abs
)
3587 enum machine_mode imode
;
3589 int word
, nwords
, i
;
3592 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
3594 imode
= int_mode_for_mode (mode
);
3595 if (imode
== BLKmode
)
3604 if (FLOAT_WORDS_BIG_ENDIAN
)
3605 word
= (GET_MODE_BITSIZE (mode
) - bitpos
) / BITS_PER_WORD
;
3607 word
= bitpos
/ BITS_PER_WORD
;
3608 bitpos
= bitpos
% BITS_PER_WORD
;
3609 nwords
= (GET_MODE_BITSIZE (mode
) + BITS_PER_WORD
- 1) / BITS_PER_WORD
;
3612 mask
= double_int_setbit (double_int_zero
, bitpos
);
3614 if (target
== 0 || target
== op0
|| target
== op1
)
3615 target
= gen_reg_rtx (mode
);
3621 for (i
= 0; i
< nwords
; ++i
)
3623 rtx targ_piece
= operand_subword (target
, i
, 1, mode
);
3624 rtx op0_piece
= operand_subword_force (op0
, i
, mode
);
3630 = expand_binop (imode
, and_optab
, op0_piece
,
3631 immed_double_int_const (double_int_not (mask
),
3633 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3635 op1
= expand_binop (imode
, and_optab
,
3636 operand_subword_force (op1
, i
, mode
),
3637 immed_double_int_const (mask
, imode
),
3638 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3640 temp
= expand_binop (imode
, ior_optab
, op0_piece
, op1
,
3641 targ_piece
, 1, OPTAB_LIB_WIDEN
);
3642 if (temp
!= targ_piece
)
3643 emit_move_insn (targ_piece
, temp
);
3646 emit_move_insn (targ_piece
, op0_piece
);
3649 insns
= get_insns ();
3656 op1
= expand_binop (imode
, and_optab
, gen_lowpart (imode
, op1
),
3657 immed_double_int_const (mask
, imode
),
3658 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3660 op0
= gen_lowpart (imode
, op0
);
3662 op0
= expand_binop (imode
, and_optab
, op0
,
3663 immed_double_int_const (double_int_not (mask
),
3665 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
3667 temp
= expand_binop (imode
, ior_optab
, op0
, op1
,
3668 gen_lowpart (imode
, target
), 1, OPTAB_LIB_WIDEN
);
3669 target
= lowpart_subreg_maybe_copy (mode
, temp
, imode
);
3675 /* Expand the C99 copysign operation. OP0 and OP1 must be the same
3676 scalar floating point mode. Return NULL if we do not know how to
3677 expand the operation inline. */
3680 expand_copysign (rtx op0
, rtx op1
, rtx target
)
3682 enum machine_mode mode
= GET_MODE (op0
);
3683 const struct real_format
*fmt
;
3687 gcc_assert (SCALAR_FLOAT_MODE_P (mode
));
3688 gcc_assert (GET_MODE (op1
) == mode
);
3690 /* First try to do it with a special instruction. */
3691 temp
= expand_binop (mode
, copysign_optab
, op0
, op1
,
3692 target
, 0, OPTAB_DIRECT
);
3696 fmt
= REAL_MODE_FORMAT (mode
);
3697 if (fmt
== NULL
|| !fmt
->has_signed_zero
)
3701 if (GET_CODE (op0
) == CONST_DOUBLE
)
3703 if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0
)))
3704 op0
= simplify_unary_operation (ABS
, mode
, op0
, mode
);
3708 if (fmt
->signbit_ro
>= 0
3709 && (GET_CODE (op0
) == CONST_DOUBLE
3710 || (optab_handler (neg_optab
, mode
) != CODE_FOR_nothing
3711 && optab_handler (abs_optab
, mode
) != CODE_FOR_nothing
)))
3713 temp
= expand_copysign_absneg (mode
, op0
, op1
, target
,
3714 fmt
->signbit_ro
, op0_is_abs
);
3719 if (fmt
->signbit_rw
< 0)
3721 return expand_copysign_bit (mode
, op0
, op1
, target
,
3722 fmt
->signbit_rw
, op0_is_abs
);
3725 /* Generate an instruction whose insn-code is INSN_CODE,
3726 with two operands: an output TARGET and an input OP0.
3727 TARGET *must* be nonzero, and the output is always stored there.
3728 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3729 the value that is stored into TARGET.
3731 Return false if expansion failed. */
3734 maybe_emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3737 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3739 rtx last
= get_last_insn ();
3743 /* Now, if insn does not accept our operands, put them into pseudos. */
3745 if (!insn_data
[icode
].operand
[1].predicate (op0
, mode0
))
3746 op0
= copy_to_mode_reg (mode0
, op0
);
3748 if (!insn_data
[icode
].operand
[0].predicate (temp
, GET_MODE (temp
)))
3749 temp
= gen_reg_rtx (GET_MODE (temp
));
3751 pat
= GEN_FCN (icode
) (temp
, op0
);
3754 delete_insns_since (last
);
3758 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3759 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3764 emit_move_insn (target
, temp
);
3767 /* Generate an instruction whose insn-code is INSN_CODE,
3768 with two operands: an output TARGET and an input OP0.
3769 TARGET *must* be nonzero, and the output is always stored there.
3770 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3771 the value that is stored into TARGET. */
3774 emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3776 bool ok
= maybe_emit_unop_insn (icode
, target
, op0
, code
);
3780 struct no_conflict_data
3782 rtx target
, first
, insn
;
3786 /* Called via note_stores by emit_libcall_block. Set P->must_stay if
3787 the currently examined clobber / store has to stay in the list of
3788 insns that constitute the actual libcall block. */
3790 no_conflict_move_test (rtx dest
, const_rtx set
, void *p0
)
3792 struct no_conflict_data
*p
= (struct no_conflict_data
*) p0
;
3794 /* If this inns directly contributes to setting the target, it must stay. */
3795 if (reg_overlap_mentioned_p (p
->target
, dest
))
3796 p
->must_stay
= true;
3797 /* If we haven't committed to keeping any other insns in the list yet,
3798 there is nothing more to check. */
3799 else if (p
->insn
== p
->first
)
3801 /* If this insn sets / clobbers a register that feeds one of the insns
3802 already in the list, this insn has to stay too. */
3803 else if (reg_overlap_mentioned_p (dest
, PATTERN (p
->first
))
3804 || (CALL_P (p
->first
) && (find_reg_fusage (p
->first
, USE
, dest
)))
3805 || reg_used_between_p (dest
, p
->first
, p
->insn
)
3806 /* Likewise if this insn depends on a register set by a previous
3807 insn in the list, or if it sets a result (presumably a hard
3808 register) that is set or clobbered by a previous insn.
3809 N.B. the modified_*_p (SET_DEST...) tests applied to a MEM
3810 SET_DEST perform the former check on the address, and the latter
3811 check on the MEM. */
3812 || (GET_CODE (set
) == SET
3813 && (modified_in_p (SET_SRC (set
), p
->first
)
3814 || modified_in_p (SET_DEST (set
), p
->first
)
3815 || modified_between_p (SET_SRC (set
), p
->first
, p
->insn
)
3816 || modified_between_p (SET_DEST (set
), p
->first
, p
->insn
))))
3817 p
->must_stay
= true;
3821 /* Emit code to make a call to a constant function or a library call.
3823 INSNS is a list containing all insns emitted in the call.
3824 These insns leave the result in RESULT. Our block is to copy RESULT
3825 to TARGET, which is logically equivalent to EQUIV.
3827 We first emit any insns that set a pseudo on the assumption that these are
3828 loading constants into registers; doing so allows them to be safely cse'ed
3829 between blocks. Then we emit all the other insns in the block, followed by
3830 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3831 note with an operand of EQUIV. */
3834 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3836 rtx final_dest
= target
;
3837 rtx next
, last
, insn
;
3839 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3840 into a MEM later. Protect the libcall block from this change. */
3841 if (! REG_P (target
) || REG_USERVAR_P (target
))
3842 target
= gen_reg_rtx (GET_MODE (target
));
3844 /* If we're using non-call exceptions, a libcall corresponding to an
3845 operation that may trap may also trap. */
3846 /* ??? See the comment in front of make_reg_eh_region_note. */
3847 if (cfun
->can_throw_non_call_exceptions
&& may_trap_p (equiv
))
3849 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3852 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3855 int lp_nr
= INTVAL (XEXP (note
, 0));
3856 if (lp_nr
== 0 || lp_nr
== INT_MIN
)
3857 remove_note (insn
, note
);
3863 /* Look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3864 reg note to indicate that this call cannot throw or execute a nonlocal
3865 goto (unless there is already a REG_EH_REGION note, in which case
3867 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3869 make_reg_eh_region_note_nothrow_nononlocal (insn
);
3872 /* First emit all insns that set pseudos. Remove them from the list as
3873 we go. Avoid insns that set pseudos which were referenced in previous
3874 insns. These can be generated by move_by_pieces, for example,
3875 to update an address. Similarly, avoid insns that reference things
3876 set in previous insns. */
3878 for (insn
= insns
; insn
; insn
= next
)
3880 rtx set
= single_set (insn
);
3882 next
= NEXT_INSN (insn
);
3884 if (set
!= 0 && REG_P (SET_DEST (set
))
3885 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
3887 struct no_conflict_data data
;
3889 data
.target
= const0_rtx
;
3893 note_stores (PATTERN (insn
), no_conflict_move_test
, &data
);
3894 if (! data
.must_stay
)
3896 if (PREV_INSN (insn
))
3897 NEXT_INSN (PREV_INSN (insn
)) = next
;
3902 PREV_INSN (next
) = PREV_INSN (insn
);
3908 /* Some ports use a loop to copy large arguments onto the stack.
3909 Don't move anything outside such a loop. */
3914 /* Write the remaining insns followed by the final copy. */
3915 for (insn
= insns
; insn
; insn
= next
)
3917 next
= NEXT_INSN (insn
);
3922 last
= emit_move_insn (target
, result
);
3923 if (optab_handler (mov_optab
, GET_MODE (target
)) != CODE_FOR_nothing
)
3924 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3926 if (final_dest
!= target
)
3927 emit_move_insn (final_dest
, target
);
3930 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3931 PURPOSE describes how this comparison will be used. CODE is the rtx
3932 comparison code we will be using.
3934 ??? Actually, CODE is slightly weaker than that. A target is still
3935 required to implement all of the normal bcc operations, but not
3936 required to implement all (or any) of the unordered bcc operations. */
3939 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3940 enum can_compare_purpose purpose
)
3943 test
= gen_rtx_fmt_ee (code
, mode
, const0_rtx
, const0_rtx
);
3946 enum insn_code icode
;
3948 if (purpose
== ccp_jump
3949 && (icode
= optab_handler (cbranch_optab
, mode
)) != CODE_FOR_nothing
3950 && insn_operand_matches (icode
, 0, test
))
3952 if (purpose
== ccp_store_flag
3953 && (icode
= optab_handler (cstore_optab
, mode
)) != CODE_FOR_nothing
3954 && insn_operand_matches (icode
, 1, test
))
3956 if (purpose
== ccp_cmov
3957 && optab_handler (cmov_optab
, mode
) != CODE_FOR_nothing
)
3960 mode
= GET_MODE_WIDER_MODE (mode
);
3961 PUT_MODE (test
, mode
);
3963 while (mode
!= VOIDmode
);
3968 /* This function is called when we are going to emit a compare instruction that
3969 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3971 *PMODE is the mode of the inputs (in case they are const_int).
3972 *PUNSIGNEDP nonzero says that the operands are unsigned;
3973 this matters if they need to be widened (as given by METHODS).
3975 If they have mode BLKmode, then SIZE specifies the size of both operands.
3977 This function performs all the setup necessary so that the caller only has
3978 to emit a single comparison insn. This setup can involve doing a BLKmode
3979 comparison or emitting a library call to perform the comparison if no insn
3980 is available to handle it.
3981 The values which are passed in through pointers can be modified; the caller
3982 should perform the comparison on the modified values. Constant
3983 comparisons must have already been folded. */
3986 prepare_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3987 int unsignedp
, enum optab_methods methods
,
3988 rtx
*ptest
, enum machine_mode
*pmode
)
3990 enum machine_mode mode
= *pmode
;
3992 enum machine_mode cmp_mode
;
3993 enum mode_class mclass
;
3995 /* The other methods are not needed. */
3996 gcc_assert (methods
== OPTAB_DIRECT
|| methods
== OPTAB_WIDEN
3997 || methods
== OPTAB_LIB_WIDEN
);
3999 /* If we are optimizing, force expensive constants into a register. */
4000 if (CONSTANT_P (x
) && optimize
4001 && (rtx_cost (x
, COMPARE
, optimize_insn_for_speed_p ())
4002 > COSTS_N_INSNS (1)))
4003 x
= force_reg (mode
, x
);
4005 if (CONSTANT_P (y
) && optimize
4006 && (rtx_cost (y
, COMPARE
, optimize_insn_for_speed_p ())
4007 > COSTS_N_INSNS (1)))
4008 y
= force_reg (mode
, y
);
4011 /* Make sure if we have a canonical comparison. The RTL
4012 documentation states that canonical comparisons are required only
4013 for targets which have cc0. */
4014 gcc_assert (!CONSTANT_P (x
) || CONSTANT_P (y
));
4017 /* Don't let both operands fail to indicate the mode. */
4018 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
4019 x
= force_reg (mode
, x
);
4020 if (mode
== VOIDmode
)
4021 mode
= GET_MODE (x
) != VOIDmode
? GET_MODE (x
) : GET_MODE (y
);
4023 /* Handle all BLKmode compares. */
4025 if (mode
== BLKmode
)
4027 enum machine_mode result_mode
;
4028 enum insn_code cmp_code
;
4033 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
4037 /* Try to use a memory block compare insn - either cmpstr
4038 or cmpmem will do. */
4039 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
4040 cmp_mode
!= VOIDmode
;
4041 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
4043 cmp_code
= direct_optab_handler (cmpmem_optab
, cmp_mode
);
4044 if (cmp_code
== CODE_FOR_nothing
)
4045 cmp_code
= direct_optab_handler (cmpstr_optab
, cmp_mode
);
4046 if (cmp_code
== CODE_FOR_nothing
)
4047 cmp_code
= direct_optab_handler (cmpstrn_optab
, cmp_mode
);
4048 if (cmp_code
== CODE_FOR_nothing
)
4051 /* Must make sure the size fits the insn's mode. */
4052 if ((CONST_INT_P (size
)
4053 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
4054 || (GET_MODE_BITSIZE (GET_MODE (size
))
4055 > GET_MODE_BITSIZE (cmp_mode
)))
4058 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
4059 result
= gen_reg_rtx (result_mode
);
4060 size
= convert_to_mode (cmp_mode
, size
, 1);
4061 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
4063 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4064 *pmode
= result_mode
;
4068 if (methods
!= OPTAB_LIB
&& methods
!= OPTAB_LIB_WIDEN
)
4071 /* Otherwise call a library function, memcmp. */
4072 libfunc
= memcmp_libfunc
;
4073 length_type
= sizetype
;
4074 result_mode
= TYPE_MODE (integer_type_node
);
4075 cmp_mode
= TYPE_MODE (length_type
);
4076 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
4077 TYPE_UNSIGNED (length_type
));
4079 result
= emit_library_call_value (libfunc
, 0, LCT_PURE
,
4085 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, result
, const0_rtx
);
4086 *pmode
= result_mode
;
4090 /* Don't allow operands to the compare to trap, as that can put the
4091 compare and branch in different basic blocks. */
4092 if (cfun
->can_throw_non_call_exceptions
)
4095 x
= force_reg (mode
, x
);
4097 y
= force_reg (mode
, y
);
4100 if (GET_MODE_CLASS (mode
) == MODE_CC
)
4102 gcc_assert (can_compare_p (comparison
, CCmode
, ccp_jump
));
4103 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4107 mclass
= GET_MODE_CLASS (mode
);
4108 test
= gen_rtx_fmt_ee (comparison
, VOIDmode
, x
, y
);
4112 enum insn_code icode
;
4113 icode
= optab_handler (cbranch_optab
, cmp_mode
);
4114 if (icode
!= CODE_FOR_nothing
4115 && insn_operand_matches (icode
, 0, test
))
4117 rtx last
= get_last_insn ();
4118 rtx op0
= prepare_operand (icode
, x
, 1, mode
, cmp_mode
, unsignedp
);
4119 rtx op1
= prepare_operand (icode
, y
, 2, mode
, cmp_mode
, unsignedp
);
4121 && insn_operand_matches (icode
, 1, op0
)
4122 && insn_operand_matches (icode
, 2, op1
))
4124 XEXP (test
, 0) = op0
;
4125 XEXP (test
, 1) = op1
;
4130 delete_insns_since (last
);
4133 if (methods
== OPTAB_DIRECT
|| !CLASS_HAS_WIDER_MODES_P (mclass
))
4135 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
);
4137 while (cmp_mode
!= VOIDmode
);
4139 if (methods
!= OPTAB_LIB_WIDEN
)
4142 if (!SCALAR_FLOAT_MODE_P (mode
))
4146 /* Handle a libcall just for the mode we are using. */
4147 libfunc
= optab_libfunc (cmp_optab
, mode
);
4148 gcc_assert (libfunc
);
4150 /* If we want unsigned, and this mode has a distinct unsigned
4151 comparison routine, use that. */
4154 rtx ulibfunc
= optab_libfunc (ucmp_optab
, mode
);
4159 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4160 targetm
.libgcc_cmp_return_mode (),
4161 2, x
, mode
, y
, mode
);
4163 /* There are two kinds of comparison routines. Biased routines
4164 return 0/1/2, and unbiased routines return -1/0/1. Other parts
4165 of gcc expect that the comparison operation is equivalent
4166 to the modified comparison. For signed comparisons compare the
4167 result against 1 in the biased case, and zero in the unbiased
4168 case. For unsigned comparisons always compare against 1 after
4169 biasing the unbiased result by adding 1. This gives us a way to
4174 if (!TARGET_LIB_INT_CMP_BIASED
)
4177 x
= plus_constant (result
, 1);
4183 prepare_cmp_insn (x
, y
, comparison
, NULL_RTX
, unsignedp
, methods
,
4187 prepare_float_lib_cmp (x
, y
, comparison
, ptest
, pmode
);
4195 /* Before emitting an insn with code ICODE, make sure that X, which is going
4196 to be used for operand OPNUM of the insn, is converted from mode MODE to
4197 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
4198 that it is accepted by the operand predicate. Return the new value. */
4201 prepare_operand (enum insn_code icode
, rtx x
, int opnum
, enum machine_mode mode
,
4202 enum machine_mode wider_mode
, int unsignedp
)
4204 if (mode
!= wider_mode
)
4205 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
4207 if (!insn_operand_matches (icode
, opnum
, x
))
4209 if (reload_completed
)
4211 x
= copy_to_mode_reg (insn_data
[(int) icode
].operand
[opnum
].mode
, x
);
4217 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
4218 we can do the branch. */
4221 emit_cmp_and_jump_insn_1 (rtx test
, enum machine_mode mode
, rtx label
)
4223 enum machine_mode optab_mode
;
4224 enum mode_class mclass
;
4225 enum insn_code icode
;
4227 mclass
= GET_MODE_CLASS (mode
);
4228 optab_mode
= (mclass
== MODE_CC
) ? CCmode
: mode
;
4229 icode
= optab_handler (cbranch_optab
, optab_mode
);
4231 gcc_assert (icode
!= CODE_FOR_nothing
);
4232 gcc_assert (insn_operand_matches (icode
, 0, test
));
4233 emit_jump_insn (GEN_FCN (icode
) (test
, XEXP (test
, 0), XEXP (test
, 1), label
));
4236 /* Generate code to compare X with Y so that the condition codes are
4237 set and to jump to LABEL if the condition is true. If X is a
4238 constant and Y is not a constant, then the comparison is swapped to
4239 ensure that the comparison RTL has the canonical form.
4241 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
4242 need to be widened. UNSIGNEDP is also used to select the proper
4243 branch condition code.
4245 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
4247 MODE is the mode of the inputs (in case they are const_int).
4249 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.).
4250 It will be potentially converted into an unsigned variant based on
4251 UNSIGNEDP to select a proper jump instruction. */
4254 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
4255 enum machine_mode mode
, int unsignedp
, rtx label
)
4257 rtx op0
= x
, op1
= y
;
4260 /* Swap operands and condition to ensure canonical RTL. */
4261 if (swap_commutative_operands_p (x
, y
)
4262 && can_compare_p (swap_condition (comparison
), mode
, ccp_jump
))
4265 comparison
= swap_condition (comparison
);
4268 /* If OP0 is still a constant, then both X and Y must be constants
4269 or the opposite comparison is not supported. Force X into a register
4270 to create canonical RTL. */
4271 if (CONSTANT_P (op0
))
4272 op0
= force_reg (mode
, op0
);
4275 comparison
= unsigned_condition (comparison
);
4277 prepare_cmp_insn (op0
, op1
, comparison
, size
, unsignedp
, OPTAB_LIB_WIDEN
,
4279 emit_cmp_and_jump_insn_1 (test
, mode
, label
);
4283 /* Emit a library call comparison between floating point X and Y.
4284 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
4287 prepare_float_lib_cmp (rtx x
, rtx y
, enum rtx_code comparison
,
4288 rtx
*ptest
, enum machine_mode
*pmode
)
4290 enum rtx_code swapped
= swap_condition (comparison
);
4291 enum rtx_code reversed
= reverse_condition_maybe_unordered (comparison
);
4292 enum machine_mode orig_mode
= GET_MODE (x
);
4293 enum machine_mode mode
, cmp_mode
;
4294 rtx true_rtx
, false_rtx
;
4295 rtx value
, target
, insns
, equiv
;
4297 bool reversed_p
= false;
4298 cmp_mode
= targetm
.libgcc_cmp_return_mode ();
4300 for (mode
= orig_mode
;
4302 mode
= GET_MODE_WIDER_MODE (mode
))
4304 if (code_to_optab
[comparison
]
4305 && (libfunc
= optab_libfunc (code_to_optab
[comparison
], mode
)))
4308 if (code_to_optab
[swapped
]
4309 && (libfunc
= optab_libfunc (code_to_optab
[swapped
], mode
)))
4312 tmp
= x
; x
= y
; y
= tmp
;
4313 comparison
= swapped
;
4317 if (code_to_optab
[reversed
]
4318 && (libfunc
= optab_libfunc (code_to_optab
[reversed
], mode
)))
4320 comparison
= reversed
;
4326 gcc_assert (mode
!= VOIDmode
);
4328 if (mode
!= orig_mode
)
4330 x
= convert_to_mode (mode
, x
, 0);
4331 y
= convert_to_mode (mode
, y
, 0);
4334 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4335 the RTL. The allows the RTL optimizers to delete the libcall if the
4336 condition can be determined at compile-time. */
4337 if (comparison
== UNORDERED
4338 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4340 true_rtx
= const_true_rtx
;
4341 false_rtx
= const0_rtx
;
4348 true_rtx
= const0_rtx
;
4349 false_rtx
= const_true_rtx
;
4353 true_rtx
= const_true_rtx
;
4354 false_rtx
= const0_rtx
;
4358 true_rtx
= const1_rtx
;
4359 false_rtx
= const0_rtx
;
4363 true_rtx
= const0_rtx
;
4364 false_rtx
= constm1_rtx
;
4368 true_rtx
= constm1_rtx
;
4369 false_rtx
= const0_rtx
;
4373 true_rtx
= const0_rtx
;
4374 false_rtx
= const1_rtx
;
4382 if (comparison
== UNORDERED
)
4384 rtx temp
= simplify_gen_relational (NE
, cmp_mode
, mode
, x
, x
);
4385 equiv
= simplify_gen_relational (NE
, cmp_mode
, mode
, y
, y
);
4386 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4387 temp
, const_true_rtx
, equiv
);
4391 equiv
= simplify_gen_relational (comparison
, cmp_mode
, mode
, x
, y
);
4392 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4393 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, cmp_mode
, cmp_mode
,
4394 equiv
, true_rtx
, false_rtx
);
4398 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4399 cmp_mode
, 2, x
, mode
, y
, mode
);
4400 insns
= get_insns ();
4403 target
= gen_reg_rtx (cmp_mode
);
4404 emit_libcall_block (insns
, target
, value
, equiv
);
4406 if (comparison
== UNORDERED
4407 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
)
4409 *ptest
= gen_rtx_fmt_ee (reversed_p
? EQ
: NE
, VOIDmode
, target
, false_rtx
);
4411 *ptest
= gen_rtx_fmt_ee (comparison
, VOIDmode
, target
, const0_rtx
);
4416 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4419 emit_indirect_jump (rtx loc
)
4421 if (!insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
4423 loc
= copy_to_mode_reg (Pmode
, loc
);
4425 emit_jump_insn (gen_indirect_jump (loc
));
4429 #ifdef HAVE_conditional_move
4431 /* Emit a conditional move instruction if the machine supports one for that
4432 condition and machine mode.
4434 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4435 the mode to use should they be constants. If it is VOIDmode, they cannot
4438 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4439 should be stored there. MODE is the mode to use should they be constants.
4440 If it is VOIDmode, they cannot both be constants.
4442 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4443 is not supported. */
4446 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4447 enum machine_mode cmode
, rtx op2
, rtx op3
,
4448 enum machine_mode mode
, int unsignedp
)
4450 rtx tem
, subtarget
, comparison
, insn
;
4451 enum insn_code icode
;
4452 enum rtx_code reversed
;
4454 /* If one operand is constant, make it the second one. Only do this
4455 if the other operand is not constant as well. */
4457 if (swap_commutative_operands_p (op0
, op1
))
4462 code
= swap_condition (code
);
4465 /* get_condition will prefer to generate LT and GT even if the old
4466 comparison was against zero, so undo that canonicalization here since
4467 comparisons against zero are cheaper. */
4468 if (code
== LT
&& op1
== const1_rtx
)
4469 code
= LE
, op1
= const0_rtx
;
4470 else if (code
== GT
&& op1
== constm1_rtx
)
4471 code
= GE
, op1
= const0_rtx
;
4473 if (cmode
== VOIDmode
)
4474 cmode
= GET_MODE (op0
);
4476 if (swap_commutative_operands_p (op2
, op3
)
4477 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4486 if (mode
== VOIDmode
)
4487 mode
= GET_MODE (op2
);
4489 icode
= direct_optab_handler (movcc_optab
, mode
);
4491 if (icode
== CODE_FOR_nothing
)
4495 target
= gen_reg_rtx (mode
);
4499 /* If the insn doesn't accept these operands, put them in pseudos. */
4501 if (!insn_data
[icode
].operand
[0].predicate
4502 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4503 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4505 if (!insn_data
[icode
].operand
[2].predicate
4506 (op2
, insn_data
[icode
].operand
[2].mode
))
4507 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4509 if (!insn_data
[icode
].operand
[3].predicate
4510 (op3
, insn_data
[icode
].operand
[3].mode
))
4511 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4513 /* Everything should now be in the suitable form. */
4515 code
= unsignedp
? unsigned_condition (code
) : code
;
4516 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4518 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4519 return NULL and let the caller figure out how best to deal with this
4521 if (!COMPARISON_P (comparison
))
4524 do_pending_stack_adjust ();
4526 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4527 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4528 &comparison
, &cmode
);
4532 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4534 /* If that failed, then give up. */
4542 insn
= get_insns ();
4545 if (subtarget
!= target
)
4546 convert_move (target
, subtarget
, 0);
4551 /* Return nonzero if a conditional move of mode MODE is supported.
4553 This function is for combine so it can tell whether an insn that looks
4554 like a conditional move is actually supported by the hardware. If we
4555 guess wrong we lose a bit on optimization, but that's it. */
4556 /* ??? sparc64 supports conditionally moving integers values based on fp
4557 comparisons, and vice versa. How do we handle them? */
4560 can_conditionally_move_p (enum machine_mode mode
)
4562 if (direct_optab_handler (movcc_optab
, mode
) != CODE_FOR_nothing
)
4568 #endif /* HAVE_conditional_move */
4570 /* Emit a conditional addition instruction if the machine supports one for that
4571 condition and machine mode.
4573 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4574 the mode to use should they be constants. If it is VOIDmode, they cannot
4577 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4578 should be stored there. MODE is the mode to use should they be constants.
4579 If it is VOIDmode, they cannot both be constants.
4581 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4582 is not supported. */
4585 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4586 enum machine_mode cmode
, rtx op2
, rtx op3
,
4587 enum machine_mode mode
, int unsignedp
)
4589 rtx tem
, subtarget
, comparison
, insn
;
4590 enum insn_code icode
;
4591 enum rtx_code reversed
;
4593 /* If one operand is constant, make it the second one. Only do this
4594 if the other operand is not constant as well. */
4596 if (swap_commutative_operands_p (op0
, op1
))
4601 code
= swap_condition (code
);
4604 /* get_condition will prefer to generate LT and GT even if the old
4605 comparison was against zero, so undo that canonicalization here since
4606 comparisons against zero are cheaper. */
4607 if (code
== LT
&& op1
== const1_rtx
)
4608 code
= LE
, op1
= const0_rtx
;
4609 else if (code
== GT
&& op1
== constm1_rtx
)
4610 code
= GE
, op1
= const0_rtx
;
4612 if (cmode
== VOIDmode
)
4613 cmode
= GET_MODE (op0
);
4615 if (swap_commutative_operands_p (op2
, op3
)
4616 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4625 if (mode
== VOIDmode
)
4626 mode
= GET_MODE (op2
);
4628 icode
= optab_handler (addcc_optab
, mode
);
4630 if (icode
== CODE_FOR_nothing
)
4634 target
= gen_reg_rtx (mode
);
4636 /* If the insn doesn't accept these operands, put them in pseudos. */
4638 if (!insn_data
[icode
].operand
[0].predicate
4639 (target
, insn_data
[icode
].operand
[0].mode
))
4640 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4644 if (!insn_data
[icode
].operand
[2].predicate
4645 (op2
, insn_data
[icode
].operand
[2].mode
))
4646 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4648 if (!insn_data
[icode
].operand
[3].predicate
4649 (op3
, insn_data
[icode
].operand
[3].mode
))
4650 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4652 /* Everything should now be in the suitable form. */
4654 code
= unsignedp
? unsigned_condition (code
) : code
;
4655 comparison
= simplify_gen_relational (code
, VOIDmode
, cmode
, op0
, op1
);
4657 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4658 return NULL and let the caller figure out how best to deal with this
4660 if (!COMPARISON_P (comparison
))
4663 do_pending_stack_adjust ();
4665 prepare_cmp_insn (XEXP (comparison
, 0), XEXP (comparison
, 1),
4666 GET_CODE (comparison
), NULL_RTX
, unsignedp
, OPTAB_WIDEN
,
4667 &comparison
, &cmode
);
4671 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4673 /* If that failed, then give up. */
4681 insn
= get_insns ();
4684 if (subtarget
!= target
)
4685 convert_move (target
, subtarget
, 0);
4690 /* These functions attempt to generate an insn body, rather than
4691 emitting the insn, but if the gen function already emits them, we
4692 make no attempt to turn them back into naked patterns. */
4694 /* Generate and return an insn body to add Y to X. */
4697 gen_add2_insn (rtx x
, rtx y
)
4699 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
4701 gcc_assert (insn_operand_matches (icode
, 0, x
));
4702 gcc_assert (insn_operand_matches (icode
, 1, x
));
4703 gcc_assert (insn_operand_matches (icode
, 2, y
));
4705 return GEN_FCN (icode
) (x
, x
, y
);
4708 /* Generate and return an insn body to add r1 and c,
4709 storing the result in r0. */
4712 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4714 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (r0
));
4716 if (icode
== CODE_FOR_nothing
4717 || !insn_operand_matches (icode
, 0, r0
)
4718 || !insn_operand_matches (icode
, 1, r1
)
4719 || !insn_operand_matches (icode
, 2, c
))
4722 return GEN_FCN (icode
) (r0
, r1
, c
);
4726 have_add2_insn (rtx x
, rtx y
)
4728 enum insn_code icode
;
4730 gcc_assert (GET_MODE (x
) != VOIDmode
);
4732 icode
= optab_handler (add_optab
, GET_MODE (x
));
4734 if (icode
== CODE_FOR_nothing
)
4737 if (!insn_operand_matches (icode
, 0, x
)
4738 || !insn_operand_matches (icode
, 1, x
)
4739 || !insn_operand_matches (icode
, 2, y
))
4745 /* Generate and return an insn body to subtract Y from X. */
4748 gen_sub2_insn (rtx x
, rtx y
)
4750 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (x
));
4752 gcc_assert (insn_operand_matches (icode
, 0, x
));
4753 gcc_assert (insn_operand_matches (icode
, 1, x
));
4754 gcc_assert (insn_operand_matches (icode
, 2, y
));
4756 return GEN_FCN (icode
) (x
, x
, y
);
4759 /* Generate and return an insn body to subtract r1 and c,
4760 storing the result in r0. */
4763 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4765 enum insn_code icode
= optab_handler (sub_optab
, GET_MODE (r0
));
4767 if (icode
== CODE_FOR_nothing
4768 || !insn_operand_matches (icode
, 0, r0
)
4769 || !insn_operand_matches (icode
, 1, r1
)
4770 || !insn_operand_matches (icode
, 2, c
))
4773 return GEN_FCN (icode
) (r0
, r1
, c
);
4777 have_sub2_insn (rtx x
, rtx y
)
4779 enum insn_code icode
;
4781 gcc_assert (GET_MODE (x
) != VOIDmode
);
4783 icode
= optab_handler (sub_optab
, GET_MODE (x
));
4785 if (icode
== CODE_FOR_nothing
)
4788 if (!insn_operand_matches (icode
, 0, x
)
4789 || !insn_operand_matches (icode
, 1, x
)
4790 || !insn_operand_matches (icode
, 2, y
))
4796 /* Generate the body of an instruction to copy Y into X.
4797 It may be a list of insns, if one insn isn't enough. */
4800 gen_move_insn (rtx x
, rtx y
)
4805 emit_move_insn_1 (x
, y
);
4811 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4812 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4813 no such operation exists, CODE_FOR_nothing will be returned. */
4816 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4820 #ifdef HAVE_ptr_extend
4822 return CODE_FOR_ptr_extend
;
4825 tab
= unsignedp
? zext_optab
: sext_optab
;
4826 return convert_optab_handler (tab
, to_mode
, from_mode
);
4829 /* Generate the body of an insn to extend Y (with mode MFROM)
4830 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4833 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4834 enum machine_mode mfrom
, int unsignedp
)
4836 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4837 return GEN_FCN (icode
) (x
, y
);
4840 /* can_fix_p and can_float_p say whether the target machine
4841 can directly convert a given fixed point type to
4842 a given floating point type, or vice versa.
4843 The returned value is the CODE_FOR_... value to use,
4844 or CODE_FOR_nothing if these modes cannot be directly converted.
4846 *TRUNCP_PTR is set to 1 if it is necessary to output
4847 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4849 static enum insn_code
4850 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4851 int unsignedp
, int *truncp_ptr
)
4854 enum insn_code icode
;
4856 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4857 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4858 if (icode
!= CODE_FOR_nothing
)
4864 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4865 for this to work. We need to rework the fix* and ftrunc* patterns
4866 and documentation. */
4867 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4868 icode
= convert_optab_handler (tab
, fixmode
, fltmode
);
4869 if (icode
!= CODE_FOR_nothing
4870 && optab_handler (ftrunc_optab
, fltmode
) != CODE_FOR_nothing
)
4877 return CODE_FOR_nothing
;
4880 static enum insn_code
4881 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4886 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4887 return convert_optab_handler (tab
, fltmode
, fixmode
);
4890 /* Generate code to convert FROM to floating point
4891 and store in TO. FROM must be fixed point and not VOIDmode.
4892 UNSIGNEDP nonzero means regard FROM as unsigned.
4893 Normally this is done by correcting the final value
4894 if it is negative. */
4897 expand_float (rtx to
, rtx from
, int unsignedp
)
4899 enum insn_code icode
;
4901 enum machine_mode fmode
, imode
;
4902 bool can_do_signed
= false;
4904 /* Crash now, because we won't be able to decide which mode to use. */
4905 gcc_assert (GET_MODE (from
) != VOIDmode
);
4907 /* Look for an insn to do the conversion. Do it in the specified
4908 modes if possible; otherwise convert either input, output or both to
4909 wider mode. If the integer mode is wider than the mode of FROM,
4910 we can do the conversion signed even if the input is unsigned. */
4912 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4913 fmode
= GET_MODE_WIDER_MODE (fmode
))
4914 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4915 imode
= GET_MODE_WIDER_MODE (imode
))
4917 int doing_unsigned
= unsignedp
;
4919 if (fmode
!= GET_MODE (to
)
4920 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4923 icode
= can_float_p (fmode
, imode
, unsignedp
);
4924 if (icode
== CODE_FOR_nothing
&& unsignedp
)
4926 enum insn_code scode
= can_float_p (fmode
, imode
, 0);
4927 if (scode
!= CODE_FOR_nothing
)
4928 can_do_signed
= true;
4929 if (imode
!= GET_MODE (from
))
4930 icode
= scode
, doing_unsigned
= 0;
4933 if (icode
!= CODE_FOR_nothing
)
4935 if (imode
!= GET_MODE (from
))
4936 from
= convert_to_mode (imode
, from
, unsignedp
);
4938 if (fmode
!= GET_MODE (to
))
4939 target
= gen_reg_rtx (fmode
);
4941 emit_unop_insn (icode
, target
, from
,
4942 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4945 convert_move (to
, target
, 0);
4950 /* Unsigned integer, and no way to convert directly. Convert as signed,
4951 then unconditionally adjust the result. */
4952 if (unsignedp
&& can_do_signed
)
4954 rtx label
= gen_label_rtx ();
4956 REAL_VALUE_TYPE offset
;
4958 /* Look for a usable floating mode FMODE wider than the source and at
4959 least as wide as the target. Using FMODE will avoid rounding woes
4960 with unsigned values greater than the signed maximum value. */
4962 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4963 fmode
= GET_MODE_WIDER_MODE (fmode
))
4964 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4965 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4968 if (fmode
== VOIDmode
)
4970 /* There is no such mode. Pretend the target is wide enough. */
4971 fmode
= GET_MODE (to
);
4973 /* Avoid double-rounding when TO is narrower than FROM. */
4974 if ((significand_size (fmode
) + 1)
4975 < GET_MODE_BITSIZE (GET_MODE (from
)))
4978 rtx neglabel
= gen_label_rtx ();
4980 /* Don't use TARGET if it isn't a register, is a hard register,
4981 or is the wrong mode. */
4983 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4984 || GET_MODE (target
) != fmode
)
4985 target
= gen_reg_rtx (fmode
);
4987 imode
= GET_MODE (from
);
4988 do_pending_stack_adjust ();
4990 /* Test whether the sign bit is set. */
4991 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4994 /* The sign bit is not set. Convert as signed. */
4995 expand_float (target
, from
, 0);
4996 emit_jump_insn (gen_jump (label
));
4999 /* The sign bit is set.
5000 Convert to a usable (positive signed) value by shifting right
5001 one bit, while remembering if a nonzero bit was shifted
5002 out; i.e., compute (from & 1) | (from >> 1). */
5004 emit_label (neglabel
);
5005 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
5006 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
5007 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
5009 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
5011 expand_float (target
, temp
, 0);
5013 /* Multiply by 2 to undo the shift above. */
5014 temp
= expand_binop (fmode
, add_optab
, target
, target
,
5015 target
, 0, OPTAB_LIB_WIDEN
);
5017 emit_move_insn (target
, temp
);
5019 do_pending_stack_adjust ();
5025 /* If we are about to do some arithmetic to correct for an
5026 unsigned operand, do it in a pseudo-register. */
5028 if (GET_MODE (to
) != fmode
5029 || !REG_P (to
) || REGNO (to
) < FIRST_PSEUDO_REGISTER
)
5030 target
= gen_reg_rtx (fmode
);
5032 /* Convert as signed integer to floating. */
5033 expand_float (target
, from
, 0);
5035 /* If FROM is negative (and therefore TO is negative),
5036 correct its value by 2**bitwidth. */
5038 do_pending_stack_adjust ();
5039 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
5043 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)), fmode
);
5044 temp
= expand_binop (fmode
, add_optab
, target
,
5045 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
5046 target
, 0, OPTAB_LIB_WIDEN
);
5048 emit_move_insn (target
, temp
);
5050 do_pending_stack_adjust ();
5055 /* No hardware instruction available; call a library routine. */
5060 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
5062 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
5063 from
= convert_to_mode (SImode
, from
, unsignedp
);
5065 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5066 gcc_assert (libfunc
);
5070 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5071 GET_MODE (to
), 1, from
,
5073 insns
= get_insns ();
5076 emit_libcall_block (insns
, target
, value
,
5077 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FLOAT
: FLOAT
,
5078 GET_MODE (to
), from
));
5083 /* Copy result to requested destination
5084 if we have been computing in a temp location. */
5088 if (GET_MODE (target
) == GET_MODE (to
))
5089 emit_move_insn (to
, target
);
5091 convert_move (to
, target
, 0);
5095 /* Generate code to convert FROM to fixed point and store in TO. FROM
5096 must be floating point. */
5099 expand_fix (rtx to
, rtx from
, int unsignedp
)
5101 enum insn_code icode
;
5103 enum machine_mode fmode
, imode
;
5106 /* We first try to find a pair of modes, one real and one integer, at
5107 least as wide as FROM and TO, respectively, in which we can open-code
5108 this conversion. If the integer mode is wider than the mode of TO,
5109 we can do the conversion either signed or unsigned. */
5111 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5112 fmode
= GET_MODE_WIDER_MODE (fmode
))
5113 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5114 imode
= GET_MODE_WIDER_MODE (imode
))
5116 int doing_unsigned
= unsignedp
;
5118 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
5119 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
5120 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
5122 if (icode
!= CODE_FOR_nothing
)
5124 rtx last
= get_last_insn ();
5125 if (fmode
!= GET_MODE (from
))
5126 from
= convert_to_mode (fmode
, from
, 0);
5130 rtx temp
= gen_reg_rtx (GET_MODE (from
));
5131 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
5135 if (imode
!= GET_MODE (to
))
5136 target
= gen_reg_rtx (imode
);
5138 if (maybe_emit_unop_insn (icode
, target
, from
,
5139 doing_unsigned
? UNSIGNED_FIX
: FIX
))
5142 convert_move (to
, target
, unsignedp
);
5145 delete_insns_since (last
);
5149 /* For an unsigned conversion, there is one more way to do it.
5150 If we have a signed conversion, we generate code that compares
5151 the real value to the largest representable positive number. If if
5152 is smaller, the conversion is done normally. Otherwise, subtract
5153 one plus the highest signed number, convert, and add it back.
5155 We only need to check all real modes, since we know we didn't find
5156 anything with a wider integer mode.
5158 This code used to extend FP value into mode wider than the destination.
5159 This is needed for decimal float modes which cannot accurately
5160 represent one plus the highest signed number of the same size, but
5161 not for binary modes. Consider, for instance conversion from SFmode
5164 The hot path through the code is dealing with inputs smaller than 2^63
5165 and doing just the conversion, so there is no bits to lose.
5167 In the other path we know the value is positive in the range 2^63..2^64-1
5168 inclusive. (as for other input overflow happens and result is undefined)
5169 So we know that the most important bit set in mantissa corresponds to
5170 2^63. The subtraction of 2^63 should not generate any rounding as it
5171 simply clears out that bit. The rest is trivial. */
5173 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
5174 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5175 fmode
= GET_MODE_WIDER_MODE (fmode
))
5176 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0, &must_trunc
)
5177 && (!DECIMAL_FLOAT_MODE_P (fmode
)
5178 || GET_MODE_BITSIZE (fmode
) > GET_MODE_BITSIZE (GET_MODE (to
))))
5181 REAL_VALUE_TYPE offset
;
5182 rtx limit
, lab1
, lab2
, insn
;
5184 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
5185 real_2expN (&offset
, bitsize
- 1, fmode
);
5186 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
5187 lab1
= gen_label_rtx ();
5188 lab2
= gen_label_rtx ();
5190 if (fmode
!= GET_MODE (from
))
5191 from
= convert_to_mode (fmode
, from
, 0);
5193 /* See if we need to do the subtraction. */
5194 do_pending_stack_adjust ();
5195 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
5198 /* If not, do the signed "fix" and branch around fixup code. */
5199 expand_fix (to
, from
, 0);
5200 emit_jump_insn (gen_jump (lab2
));
5203 /* Otherwise, subtract 2**(N-1), convert to signed number,
5204 then add 2**(N-1). Do the addition using XOR since this
5205 will often generate better code. */
5207 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
5208 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
5209 expand_fix (to
, target
, 0);
5210 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
5212 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
5214 to
, 1, OPTAB_LIB_WIDEN
);
5217 emit_move_insn (to
, target
);
5221 if (optab_handler (mov_optab
, GET_MODE (to
)) != CODE_FOR_nothing
)
5223 /* Make a place for a REG_NOTE and add it. */
5224 insn
= emit_move_insn (to
, to
);
5225 set_unique_reg_note (insn
,
5227 gen_rtx_fmt_e (UNSIGNED_FIX
,
5235 /* We can't do it with an insn, so use a library call. But first ensure
5236 that the mode of TO is at least as wide as SImode, since those are the
5237 only library calls we know about. */
5239 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
5241 target
= gen_reg_rtx (SImode
);
5243 expand_fix (target
, from
, unsignedp
);
5251 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
5252 libfunc
= convert_optab_libfunc (tab
, GET_MODE (to
), GET_MODE (from
));
5253 gcc_assert (libfunc
);
5257 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
5258 GET_MODE (to
), 1, from
,
5260 insns
= get_insns ();
5263 emit_libcall_block (insns
, target
, value
,
5264 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
5265 GET_MODE (to
), from
));
5270 if (GET_MODE (to
) == GET_MODE (target
))
5271 emit_move_insn (to
, target
);
5273 convert_move (to
, target
, 0);
5277 /* Generate code to convert FROM or TO a fixed-point.
5278 If UINTP is true, either TO or FROM is an unsigned integer.
5279 If SATP is true, we need to saturate the result. */
5282 expand_fixed_convert (rtx to
, rtx from
, int uintp
, int satp
)
5284 enum machine_mode to_mode
= GET_MODE (to
);
5285 enum machine_mode from_mode
= GET_MODE (from
);
5287 enum rtx_code this_code
;
5288 enum insn_code code
;
5292 if (to_mode
== from_mode
)
5294 emit_move_insn (to
, from
);
5300 tab
= satp
? satfractuns_optab
: fractuns_optab
;
5301 this_code
= satp
? UNSIGNED_SAT_FRACT
: UNSIGNED_FRACT_CONVERT
;
5305 tab
= satp
? satfract_optab
: fract_optab
;
5306 this_code
= satp
? SAT_FRACT
: FRACT_CONVERT
;
5308 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
5309 if (code
!= CODE_FOR_nothing
)
5311 emit_unop_insn (code
, to
, from
, this_code
);
5315 libfunc
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
5316 gcc_assert (libfunc
);
5319 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
, to_mode
,
5320 1, from
, from_mode
);
5321 insns
= get_insns ();
5324 emit_libcall_block (insns
, to
, value
,
5325 gen_rtx_fmt_e (tab
->code
, to_mode
, from
));
5328 /* Generate code to convert FROM to fixed point and store in TO. FROM
5329 must be floating point, TO must be signed. Use the conversion optab
5330 TAB to do the conversion. */
5333 expand_sfix_optab (rtx to
, rtx from
, convert_optab tab
)
5335 enum insn_code icode
;
5337 enum machine_mode fmode
, imode
;
5339 /* We first try to find a pair of modes, one real and one integer, at
5340 least as wide as FROM and TO, respectively, in which we can open-code
5341 this conversion. If the integer mode is wider than the mode of TO,
5342 we can do the conversion either signed or unsigned. */
5344 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
5345 fmode
= GET_MODE_WIDER_MODE (fmode
))
5346 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
5347 imode
= GET_MODE_WIDER_MODE (imode
))
5349 icode
= convert_optab_handler (tab
, imode
, fmode
);
5350 if (icode
!= CODE_FOR_nothing
)
5352 rtx last
= get_last_insn ();
5353 if (fmode
!= GET_MODE (from
))
5354 from
= convert_to_mode (fmode
, from
, 0);
5356 if (imode
!= GET_MODE (to
))
5357 target
= gen_reg_rtx (imode
);
5359 if (!maybe_emit_unop_insn (icode
, target
, from
, UNKNOWN
))
5361 delete_insns_since (last
);
5365 convert_move (to
, target
, 0);
5373 /* Report whether we have an instruction to perform the operation
5374 specified by CODE on operands of mode MODE. */
5376 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
5378 return (code_to_optab
[(int) code
] != 0
5379 && (optab_handler (code_to_optab
[(int) code
], mode
)
5380 != CODE_FOR_nothing
));
5383 /* Set all insn_code fields to CODE_FOR_nothing. */
5386 init_insn_codes (void)
5388 memset (optab_table
, 0, sizeof (optab_table
));
5389 memset (convert_optab_table
, 0, sizeof (convert_optab_table
));
5390 memset (direct_optab_table
, 0, sizeof (direct_optab_table
));
5393 /* Initialize OP's code to CODE, and write it into the code_to_optab table. */
5395 init_optab (optab op
, enum rtx_code code
)
5398 code_to_optab
[(int) code
] = op
;
5401 /* Same, but fill in its code as CODE, and do _not_ write it into
5402 the code_to_optab table. */
5404 init_optabv (optab op
, enum rtx_code code
)
5409 /* Conversion optabs never go in the code_to_optab table. */
5411 init_convert_optab (convert_optab op
, enum rtx_code code
)
5416 /* Initialize the libfunc fields of an entire group of entries in some
5417 optab. Each entry is set equal to a string consisting of a leading
5418 pair of underscores followed by a generic operation name followed by
5419 a mode name (downshifted to lowercase) followed by a single character
5420 representing the number of operands for the given operation (which is
5421 usually one of the characters '2', '3', or '4').
5423 OPTABLE is the table in which libfunc fields are to be initialized.
5424 OPNAME is the generic (string) name of the operation.
5425 SUFFIX is the character which specifies the number of operands for
5426 the given generic operation.
5427 MODE is the mode to generate for.
5431 gen_libfunc (optab optable
, const char *opname
, int suffix
, enum machine_mode mode
)
5433 unsigned opname_len
= strlen (opname
);
5434 const char *mname
= GET_MODE_NAME (mode
);
5435 unsigned mname_len
= strlen (mname
);
5436 char *libfunc_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5443 for (q
= opname
; *q
; )
5445 for (q
= mname
; *q
; q
++)
5446 *p
++ = TOLOWER (*q
);
5450 set_optab_libfunc (optable
, mode
,
5451 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5454 /* Like gen_libfunc, but verify that integer operation is involved. */
5457 gen_int_libfunc (optab optable
, const char *opname
, char suffix
,
5458 enum machine_mode mode
)
5460 int maxsize
= 2 * BITS_PER_WORD
;
5462 if (GET_MODE_CLASS (mode
) != MODE_INT
)
5464 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5465 maxsize
= LONG_LONG_TYPE_SIZE
;
5466 if (GET_MODE_CLASS (mode
) != MODE_INT
5467 || mode
< word_mode
|| GET_MODE_BITSIZE (mode
) > maxsize
)
5469 gen_libfunc (optable
, opname
, suffix
, mode
);
5472 /* Like gen_libfunc, but verify that FP and set decimal prefix if needed. */
5475 gen_fp_libfunc (optab optable
, const char *opname
, char suffix
,
5476 enum machine_mode mode
)
5480 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5481 gen_libfunc (optable
, opname
, suffix
, mode
);
5482 if (DECIMAL_FLOAT_MODE_P (mode
))
5484 dec_opname
= XALLOCAVEC (char, sizeof (DECIMAL_PREFIX
) + strlen (opname
));
5485 /* For BID support, change the name to have either a bid_ or dpd_ prefix
5486 depending on the low level floating format used. */
5487 memcpy (dec_opname
, DECIMAL_PREFIX
, sizeof (DECIMAL_PREFIX
) - 1);
5488 strcpy (dec_opname
+ sizeof (DECIMAL_PREFIX
) - 1, opname
);
5489 gen_libfunc (optable
, dec_opname
, suffix
, mode
);
5493 /* Like gen_libfunc, but verify that fixed-point operation is involved. */
5496 gen_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5497 enum machine_mode mode
)
5499 if (!ALL_FIXED_POINT_MODE_P (mode
))
5501 gen_libfunc (optable
, opname
, suffix
, mode
);
5504 /* Like gen_libfunc, but verify that signed fixed-point operation is
5508 gen_signed_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5509 enum machine_mode mode
)
5511 if (!SIGNED_FIXED_POINT_MODE_P (mode
))
5513 gen_libfunc (optable
, opname
, suffix
, mode
);
5516 /* Like gen_libfunc, but verify that unsigned fixed-point operation is
5520 gen_unsigned_fixed_libfunc (optab optable
, const char *opname
, char suffix
,
5521 enum machine_mode mode
)
5523 if (!UNSIGNED_FIXED_POINT_MODE_P (mode
))
5525 gen_libfunc (optable
, opname
, suffix
, mode
);
5528 /* Like gen_libfunc, but verify that FP or INT operation is involved. */
5531 gen_int_fp_libfunc (optab optable
, const char *name
, char suffix
,
5532 enum machine_mode mode
)
5534 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5535 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5536 if (INTEGRAL_MODE_P (mode
))
5537 gen_int_libfunc (optable
, name
, suffix
, mode
);
5540 /* Like gen_libfunc, but verify that FP or INT operation is involved
5541 and add 'v' suffix for integer operation. */
5544 gen_intv_fp_libfunc (optab optable
, const char *name
, char suffix
,
5545 enum machine_mode mode
)
5547 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5548 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5549 if (GET_MODE_CLASS (mode
) == MODE_INT
)
5551 int len
= strlen (name
);
5552 char *v_name
= XALLOCAVEC (char, len
+ 2);
5553 strcpy (v_name
, name
);
5555 v_name
[len
+ 1] = 0;
5556 gen_int_libfunc (optable
, v_name
, suffix
, mode
);
5560 /* Like gen_libfunc, but verify that FP or INT or FIXED operation is
5564 gen_int_fp_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5565 enum machine_mode mode
)
5567 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5568 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5569 if (INTEGRAL_MODE_P (mode
))
5570 gen_int_libfunc (optable
, name
, suffix
, mode
);
5571 if (ALL_FIXED_POINT_MODE_P (mode
))
5572 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5575 /* Like gen_libfunc, but verify that FP or INT or signed FIXED operation is
5579 gen_int_fp_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5580 enum machine_mode mode
)
5582 if (DECIMAL_FLOAT_MODE_P (mode
) || GET_MODE_CLASS (mode
) == MODE_FLOAT
)
5583 gen_fp_libfunc (optable
, name
, suffix
, mode
);
5584 if (INTEGRAL_MODE_P (mode
))
5585 gen_int_libfunc (optable
, name
, suffix
, mode
);
5586 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5587 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5590 /* Like gen_libfunc, but verify that INT or FIXED operation is
5594 gen_int_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5595 enum machine_mode mode
)
5597 if (INTEGRAL_MODE_P (mode
))
5598 gen_int_libfunc (optable
, name
, suffix
, mode
);
5599 if (ALL_FIXED_POINT_MODE_P (mode
))
5600 gen_fixed_libfunc (optable
, name
, suffix
, mode
);
5603 /* Like gen_libfunc, but verify that INT or signed FIXED operation is
5607 gen_int_signed_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5608 enum machine_mode mode
)
5610 if (INTEGRAL_MODE_P (mode
))
5611 gen_int_libfunc (optable
, name
, suffix
, mode
);
5612 if (SIGNED_FIXED_POINT_MODE_P (mode
))
5613 gen_signed_fixed_libfunc (optable
, name
, suffix
, mode
);
5616 /* Like gen_libfunc, but verify that INT or unsigned FIXED operation is
5620 gen_int_unsigned_fixed_libfunc (optab optable
, const char *name
, char suffix
,
5621 enum machine_mode mode
)
5623 if (INTEGRAL_MODE_P (mode
))
5624 gen_int_libfunc (optable
, name
, suffix
, mode
);
5625 if (UNSIGNED_FIXED_POINT_MODE_P (mode
))
5626 gen_unsigned_fixed_libfunc (optable
, name
, suffix
, mode
);
5629 /* Initialize the libfunc fields of an entire group of entries of an
5630 inter-mode-class conversion optab. The string formation rules are
5631 similar to the ones for init_libfuncs, above, but instead of having
5632 a mode name and an operand count these functions have two mode names
5633 and no operand count. */
5636 gen_interclass_conv_libfunc (convert_optab tab
,
5638 enum machine_mode tmode
,
5639 enum machine_mode fmode
)
5641 size_t opname_len
= strlen (opname
);
5642 size_t mname_len
= 0;
5644 const char *fname
, *tname
;
5646 char *libfunc_name
, *suffix
;
5647 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5650 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5651 depends on which underlying decimal floating point format is used. */
5652 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5654 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5656 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5657 nondec_name
[0] = '_';
5658 nondec_name
[1] = '_';
5659 memcpy (&nondec_name
[2], opname
, opname_len
);
5660 nondec_suffix
= nondec_name
+ opname_len
+ 2;
5662 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5665 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5666 memcpy (&dec_name
[2+dec_len
], opname
, opname_len
);
5667 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5669 fname
= GET_MODE_NAME (fmode
);
5670 tname
= GET_MODE_NAME (tmode
);
5672 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5674 libfunc_name
= dec_name
;
5675 suffix
= dec_suffix
;
5679 libfunc_name
= nondec_name
;
5680 suffix
= nondec_suffix
;
5684 for (q
= fname
; *q
; p
++, q
++)
5686 for (q
= tname
; *q
; p
++, q
++)
5691 set_conv_libfunc (tab
, tmode
, fmode
,
5692 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5695 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5696 int->fp conversion. */
5699 gen_int_to_fp_conv_libfunc (convert_optab tab
,
5701 enum machine_mode tmode
,
5702 enum machine_mode fmode
)
5704 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5706 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5708 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5711 /* ufloat_optab is special by using floatun for FP and floatuns decimal fp
5715 gen_ufloat_conv_libfunc (convert_optab tab
,
5716 const char *opname ATTRIBUTE_UNUSED
,
5717 enum machine_mode tmode
,
5718 enum machine_mode fmode
)
5720 if (DECIMAL_FLOAT_MODE_P (tmode
))
5721 gen_int_to_fp_conv_libfunc (tab
, "floatuns", tmode
, fmode
);
5723 gen_int_to_fp_conv_libfunc (tab
, "floatun", tmode
, fmode
);
5726 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5727 fp->int conversion. */
5730 gen_int_to_fp_nondecimal_conv_libfunc (convert_optab tab
,
5732 enum machine_mode tmode
,
5733 enum machine_mode fmode
)
5735 if (GET_MODE_CLASS (fmode
) != MODE_INT
)
5737 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
)
5739 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5742 /* Same as gen_interclass_conv_libfunc but verify that we are producing
5743 fp->int conversion with no decimal floating point involved. */
5746 gen_fp_to_int_conv_libfunc (convert_optab tab
,
5748 enum machine_mode tmode
,
5749 enum machine_mode fmode
)
5751 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5753 if (GET_MODE_CLASS (tmode
) != MODE_INT
)
5755 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5758 /* Initialize the libfunc fields of an of an intra-mode-class conversion optab.
5759 The string formation rules are
5760 similar to the ones for init_libfunc, above. */
5763 gen_intraclass_conv_libfunc (convert_optab tab
, const char *opname
,
5764 enum machine_mode tmode
, enum machine_mode fmode
)
5766 size_t opname_len
= strlen (opname
);
5767 size_t mname_len
= 0;
5769 const char *fname
, *tname
;
5771 char *nondec_name
, *dec_name
, *nondec_suffix
, *dec_suffix
;
5772 char *libfunc_name
, *suffix
;
5775 /* If this is a decimal conversion, add the current BID vs. DPD prefix that
5776 depends on which underlying decimal floating point format is used. */
5777 const size_t dec_len
= sizeof (DECIMAL_PREFIX
) - 1;
5779 mname_len
= strlen (GET_MODE_NAME (tmode
)) + strlen (GET_MODE_NAME (fmode
));
5781 nondec_name
= XALLOCAVEC (char, 2 + opname_len
+ mname_len
+ 1 + 1);
5782 nondec_name
[0] = '_';
5783 nondec_name
[1] = '_';
5784 memcpy (&nondec_name
[2], opname
, opname_len
);
5785 nondec_suffix
= nondec_name
+ opname_len
+ 2;
5787 dec_name
= XALLOCAVEC (char, 2 + dec_len
+ opname_len
+ mname_len
+ 1 + 1);
5790 memcpy (&dec_name
[2], DECIMAL_PREFIX
, dec_len
);
5791 memcpy (&dec_name
[2 + dec_len
], opname
, opname_len
);
5792 dec_suffix
= dec_name
+ dec_len
+ opname_len
+ 2;
5794 fname
= GET_MODE_NAME (fmode
);
5795 tname
= GET_MODE_NAME (tmode
);
5797 if (DECIMAL_FLOAT_MODE_P(fmode
) || DECIMAL_FLOAT_MODE_P(tmode
))
5799 libfunc_name
= dec_name
;
5800 suffix
= dec_suffix
;
5804 libfunc_name
= nondec_name
;
5805 suffix
= nondec_suffix
;
5809 for (q
= fname
; *q
; p
++, q
++)
5811 for (q
= tname
; *q
; p
++, q
++)
5817 set_conv_libfunc (tab
, tmode
, fmode
,
5818 ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5821 /* Pick proper libcall for trunc_optab. We need to chose if we do
5822 truncation or extension and interclass or intraclass. */
5825 gen_trunc_conv_libfunc (convert_optab tab
,
5827 enum machine_mode tmode
,
5828 enum machine_mode fmode
)
5830 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5832 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5837 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5838 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5839 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5841 if (GET_MODE_PRECISION (fmode
) <= GET_MODE_PRECISION (tmode
))
5844 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5845 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5846 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5847 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5850 /* Pick proper libcall for extend_optab. We need to chose if we do
5851 truncation or extension and interclass or intraclass. */
5854 gen_extend_conv_libfunc (convert_optab tab
,
5855 const char *opname ATTRIBUTE_UNUSED
,
5856 enum machine_mode tmode
,
5857 enum machine_mode fmode
)
5859 if (GET_MODE_CLASS (tmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (tmode
))
5861 if (GET_MODE_CLASS (fmode
) != MODE_FLOAT
&& !DECIMAL_FLOAT_MODE_P (fmode
))
5866 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (fmode
))
5867 || (GET_MODE_CLASS (fmode
) == MODE_FLOAT
&& DECIMAL_FLOAT_MODE_P (tmode
)))
5868 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5870 if (GET_MODE_PRECISION (fmode
) > GET_MODE_PRECISION (tmode
))
5873 if ((GET_MODE_CLASS (tmode
) == MODE_FLOAT
5874 && GET_MODE_CLASS (fmode
) == MODE_FLOAT
)
5875 || (DECIMAL_FLOAT_MODE_P (fmode
) && DECIMAL_FLOAT_MODE_P (tmode
)))
5876 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5879 /* Pick proper libcall for fract_optab. We need to chose if we do
5880 interclass or intraclass. */
5883 gen_fract_conv_libfunc (convert_optab tab
,
5885 enum machine_mode tmode
,
5886 enum machine_mode fmode
)
5890 if (!(ALL_FIXED_POINT_MODE_P (tmode
) || ALL_FIXED_POINT_MODE_P (fmode
)))
5893 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5894 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5896 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5899 /* Pick proper libcall for fractuns_optab. */
5902 gen_fractuns_conv_libfunc (convert_optab tab
,
5904 enum machine_mode tmode
,
5905 enum machine_mode fmode
)
5909 /* One mode must be a fixed-point mode, and the other must be an integer
5911 if (!((ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
)
5912 || (ALL_FIXED_POINT_MODE_P (fmode
)
5913 && GET_MODE_CLASS (tmode
) == MODE_INT
)))
5916 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5919 /* Pick proper libcall for satfract_optab. We need to chose if we do
5920 interclass or intraclass. */
5923 gen_satfract_conv_libfunc (convert_optab tab
,
5925 enum machine_mode tmode
,
5926 enum machine_mode fmode
)
5930 /* TMODE must be a fixed-point mode. */
5931 if (!ALL_FIXED_POINT_MODE_P (tmode
))
5934 if (GET_MODE_CLASS (tmode
) == GET_MODE_CLASS (fmode
))
5935 gen_intraclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5937 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5940 /* Pick proper libcall for satfractuns_optab. */
5943 gen_satfractuns_conv_libfunc (convert_optab tab
,
5945 enum machine_mode tmode
,
5946 enum machine_mode fmode
)
5950 /* TMODE must be a fixed-point mode, and FMODE must be an integer mode. */
5951 if (!(ALL_FIXED_POINT_MODE_P (tmode
) && GET_MODE_CLASS (fmode
) == MODE_INT
))
5954 gen_interclass_conv_libfunc (tab
, opname
, tmode
, fmode
);
5957 /* A table of previously-created libfuncs, hashed by name. */
5958 static GTY ((param_is (union tree_node
))) htab_t libfunc_decls
;
5960 /* Hashtable callbacks for libfunc_decls. */
5963 libfunc_decl_hash (const void *entry
)
5965 return IDENTIFIER_HASH_VALUE (DECL_NAME ((const_tree
) entry
));
5969 libfunc_decl_eq (const void *entry1
, const void *entry2
)
5971 return DECL_NAME ((const_tree
) entry1
) == (const_tree
) entry2
;
5974 /* Build a decl for a libfunc named NAME. */
5977 build_libfunc_function (const char *name
)
5979 tree decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
5980 get_identifier (name
),
5981 build_function_type (integer_type_node
, NULL_TREE
));
5982 /* ??? We don't have any type information except for this is
5983 a function. Pretend this is "int foo()". */
5984 DECL_ARTIFICIAL (decl
) = 1;
5985 DECL_EXTERNAL (decl
) = 1;
5986 TREE_PUBLIC (decl
) = 1;
5987 gcc_assert (DECL_ASSEMBLER_NAME (decl
));
5989 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5990 are the flags assigned by targetm.encode_section_info. */
5991 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
5997 init_one_libfunc (const char *name
)
6003 if (libfunc_decls
== NULL
)
6004 libfunc_decls
= htab_create_ggc (37, libfunc_decl_hash
,
6005 libfunc_decl_eq
, NULL
);
6007 /* See if we have already created a libfunc decl for this function. */
6008 id
= get_identifier (name
);
6009 hash
= IDENTIFIER_HASH_VALUE (id
);
6010 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, INSERT
);
6011 decl
= (tree
) *slot
;
6014 /* Create a new decl, so that it can be passed to
6015 targetm.encode_section_info. */
6016 decl
= build_libfunc_function (name
);
6019 return XEXP (DECL_RTL (decl
), 0);
6022 /* Adjust the assembler name of libfunc NAME to ASMSPEC. */
6025 set_user_assembler_libfunc (const char *name
, const char *asmspec
)
6031 id
= get_identifier (name
);
6032 hash
= IDENTIFIER_HASH_VALUE (id
);
6033 slot
= htab_find_slot_with_hash (libfunc_decls
, id
, hash
, NO_INSERT
);
6035 decl
= (tree
) *slot
;
6036 set_user_assembler_name (decl
, asmspec
);
6037 return XEXP (DECL_RTL (decl
), 0);
6040 /* Call this to reset the function entry for one optab (OPTABLE) in mode
6041 MODE to NAME, which should be either 0 or a string constant. */
6043 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
6046 struct libfunc_entry e
;
6047 struct libfunc_entry
**slot
;
6048 e
.optab
= (size_t) (optable
- &optab_table
[0]);
6053 val
= init_one_libfunc (name
);
6056 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6058 *slot
= ggc_alloc_libfunc_entry ();
6059 (*slot
)->optab
= (size_t) (optable
- &optab_table
[0]);
6060 (*slot
)->mode1
= mode
;
6061 (*slot
)->mode2
= VOIDmode
;
6062 (*slot
)->libfunc
= val
;
6065 /* Call this to reset the function entry for one conversion optab
6066 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
6067 either 0 or a string constant. */
6069 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
6070 enum machine_mode fmode
, const char *name
)
6073 struct libfunc_entry e
;
6074 struct libfunc_entry
**slot
;
6075 e
.optab
= (size_t) (optable
- &convert_optab_table
[0]);
6080 val
= init_one_libfunc (name
);
6083 slot
= (struct libfunc_entry
**) htab_find_slot (libfunc_hash
, &e
, INSERT
);
6085 *slot
= ggc_alloc_libfunc_entry ();
6086 (*slot
)->optab
= (size_t) (optable
- &convert_optab_table
[0]);
6087 (*slot
)->mode1
= tmode
;
6088 (*slot
)->mode2
= fmode
;
6089 (*slot
)->libfunc
= val
;
6092 /* Call this to initialize the contents of the optabs
6093 appropriately for the current target machine. */
6100 htab_empty (libfunc_hash
);
6101 /* We statically initialize the insn_codes with the equivalent of
6102 CODE_FOR_nothing. Repeat the process if reinitialising. */
6106 libfunc_hash
= htab_create_ggc (10, hash_libfunc
, eq_libfunc
, NULL
);
6108 init_optab (add_optab
, PLUS
);
6109 init_optabv (addv_optab
, PLUS
);
6110 init_optab (sub_optab
, MINUS
);
6111 init_optabv (subv_optab
, MINUS
);
6112 init_optab (ssadd_optab
, SS_PLUS
);
6113 init_optab (usadd_optab
, US_PLUS
);
6114 init_optab (sssub_optab
, SS_MINUS
);
6115 init_optab (ussub_optab
, US_MINUS
);
6116 init_optab (smul_optab
, MULT
);
6117 init_optab (ssmul_optab
, SS_MULT
);
6118 init_optab (usmul_optab
, US_MULT
);
6119 init_optabv (smulv_optab
, MULT
);
6120 init_optab (smul_highpart_optab
, UNKNOWN
);
6121 init_optab (umul_highpart_optab
, UNKNOWN
);
6122 init_optab (smul_widen_optab
, UNKNOWN
);
6123 init_optab (umul_widen_optab
, UNKNOWN
);
6124 init_optab (usmul_widen_optab
, UNKNOWN
);
6125 init_optab (smadd_widen_optab
, UNKNOWN
);
6126 init_optab (umadd_widen_optab
, UNKNOWN
);
6127 init_optab (ssmadd_widen_optab
, UNKNOWN
);
6128 init_optab (usmadd_widen_optab
, UNKNOWN
);
6129 init_optab (smsub_widen_optab
, UNKNOWN
);
6130 init_optab (umsub_widen_optab
, UNKNOWN
);
6131 init_optab (ssmsub_widen_optab
, UNKNOWN
);
6132 init_optab (usmsub_widen_optab
, UNKNOWN
);
6133 init_optab (sdiv_optab
, DIV
);
6134 init_optab (ssdiv_optab
, SS_DIV
);
6135 init_optab (usdiv_optab
, US_DIV
);
6136 init_optabv (sdivv_optab
, DIV
);
6137 init_optab (sdivmod_optab
, UNKNOWN
);
6138 init_optab (udiv_optab
, UDIV
);
6139 init_optab (udivmod_optab
, UNKNOWN
);
6140 init_optab (smod_optab
, MOD
);
6141 init_optab (umod_optab
, UMOD
);
6142 init_optab (fmod_optab
, UNKNOWN
);
6143 init_optab (remainder_optab
, UNKNOWN
);
6144 init_optab (ftrunc_optab
, UNKNOWN
);
6145 init_optab (and_optab
, AND
);
6146 init_optab (ior_optab
, IOR
);
6147 init_optab (xor_optab
, XOR
);
6148 init_optab (ashl_optab
, ASHIFT
);
6149 init_optab (ssashl_optab
, SS_ASHIFT
);
6150 init_optab (usashl_optab
, US_ASHIFT
);
6151 init_optab (ashr_optab
, ASHIFTRT
);
6152 init_optab (lshr_optab
, LSHIFTRT
);
6153 init_optab (rotl_optab
, ROTATE
);
6154 init_optab (rotr_optab
, ROTATERT
);
6155 init_optab (smin_optab
, SMIN
);
6156 init_optab (smax_optab
, SMAX
);
6157 init_optab (umin_optab
, UMIN
);
6158 init_optab (umax_optab
, UMAX
);
6159 init_optab (pow_optab
, UNKNOWN
);
6160 init_optab (atan2_optab
, UNKNOWN
);
6161 init_optab (fma_optab
, FMA
);
6162 init_optab (fms_optab
, UNKNOWN
);
6163 init_optab (fnma_optab
, UNKNOWN
);
6164 init_optab (fnms_optab
, UNKNOWN
);
6166 /* These three have codes assigned exclusively for the sake of
6168 init_optab (mov_optab
, SET
);
6169 init_optab (movstrict_optab
, STRICT_LOW_PART
);
6170 init_optab (cbranch_optab
, COMPARE
);
6172 init_optab (cmov_optab
, UNKNOWN
);
6173 init_optab (cstore_optab
, UNKNOWN
);
6174 init_optab (ctrap_optab
, UNKNOWN
);
6176 init_optab (storent_optab
, UNKNOWN
);
6178 init_optab (cmp_optab
, UNKNOWN
);
6179 init_optab (ucmp_optab
, UNKNOWN
);
6181 init_optab (eq_optab
, EQ
);
6182 init_optab (ne_optab
, NE
);
6183 init_optab (gt_optab
, GT
);
6184 init_optab (ge_optab
, GE
);
6185 init_optab (lt_optab
, LT
);
6186 init_optab (le_optab
, LE
);
6187 init_optab (unord_optab
, UNORDERED
);
6189 init_optab (neg_optab
, NEG
);
6190 init_optab (ssneg_optab
, SS_NEG
);
6191 init_optab (usneg_optab
, US_NEG
);
6192 init_optabv (negv_optab
, NEG
);
6193 init_optab (abs_optab
, ABS
);
6194 init_optabv (absv_optab
, ABS
);
6195 init_optab (addcc_optab
, UNKNOWN
);
6196 init_optab (one_cmpl_optab
, NOT
);
6197 init_optab (bswap_optab
, BSWAP
);
6198 init_optab (ffs_optab
, FFS
);
6199 init_optab (clz_optab
, CLZ
);
6200 init_optab (ctz_optab
, CTZ
);
6201 init_optab (popcount_optab
, POPCOUNT
);
6202 init_optab (parity_optab
, PARITY
);
6203 init_optab (sqrt_optab
, SQRT
);
6204 init_optab (floor_optab
, UNKNOWN
);
6205 init_optab (ceil_optab
, UNKNOWN
);
6206 init_optab (round_optab
, UNKNOWN
);
6207 init_optab (btrunc_optab
, UNKNOWN
);
6208 init_optab (nearbyint_optab
, UNKNOWN
);
6209 init_optab (rint_optab
, UNKNOWN
);
6210 init_optab (sincos_optab
, UNKNOWN
);
6211 init_optab (sin_optab
, UNKNOWN
);
6212 init_optab (asin_optab
, UNKNOWN
);
6213 init_optab (cos_optab
, UNKNOWN
);
6214 init_optab (acos_optab
, UNKNOWN
);
6215 init_optab (exp_optab
, UNKNOWN
);
6216 init_optab (exp10_optab
, UNKNOWN
);
6217 init_optab (exp2_optab
, UNKNOWN
);
6218 init_optab (expm1_optab
, UNKNOWN
);
6219 init_optab (ldexp_optab
, UNKNOWN
);
6220 init_optab (scalb_optab
, UNKNOWN
);
6221 init_optab (significand_optab
, UNKNOWN
);
6222 init_optab (logb_optab
, UNKNOWN
);
6223 init_optab (ilogb_optab
, UNKNOWN
);
6224 init_optab (log_optab
, UNKNOWN
);
6225 init_optab (log10_optab
, UNKNOWN
);
6226 init_optab (log2_optab
, UNKNOWN
);
6227 init_optab (log1p_optab
, UNKNOWN
);
6228 init_optab (tan_optab
, UNKNOWN
);
6229 init_optab (atan_optab
, UNKNOWN
);
6230 init_optab (copysign_optab
, UNKNOWN
);
6231 init_optab (signbit_optab
, UNKNOWN
);
6233 init_optab (isinf_optab
, UNKNOWN
);
6235 init_optab (strlen_optab
, UNKNOWN
);
6236 init_optab (push_optab
, UNKNOWN
);
6238 init_optab (reduc_smax_optab
, UNKNOWN
);
6239 init_optab (reduc_umax_optab
, UNKNOWN
);
6240 init_optab (reduc_smin_optab
, UNKNOWN
);
6241 init_optab (reduc_umin_optab
, UNKNOWN
);
6242 init_optab (reduc_splus_optab
, UNKNOWN
);
6243 init_optab (reduc_uplus_optab
, UNKNOWN
);
6245 init_optab (ssum_widen_optab
, UNKNOWN
);
6246 init_optab (usum_widen_optab
, UNKNOWN
);
6247 init_optab (sdot_prod_optab
, UNKNOWN
);
6248 init_optab (udot_prod_optab
, UNKNOWN
);
6250 init_optab (vec_extract_optab
, UNKNOWN
);
6251 init_optab (vec_extract_even_optab
, UNKNOWN
);
6252 init_optab (vec_extract_odd_optab
, UNKNOWN
);
6253 init_optab (vec_interleave_high_optab
, UNKNOWN
);
6254 init_optab (vec_interleave_low_optab
, UNKNOWN
);
6255 init_optab (vec_set_optab
, UNKNOWN
);
6256 init_optab (vec_init_optab
, UNKNOWN
);
6257 init_optab (vec_shl_optab
, UNKNOWN
);
6258 init_optab (vec_shr_optab
, UNKNOWN
);
6259 init_optab (vec_realign_load_optab
, UNKNOWN
);
6260 init_optab (movmisalign_optab
, UNKNOWN
);
6261 init_optab (vec_widen_umult_hi_optab
, UNKNOWN
);
6262 init_optab (vec_widen_umult_lo_optab
, UNKNOWN
);
6263 init_optab (vec_widen_smult_hi_optab
, UNKNOWN
);
6264 init_optab (vec_widen_smult_lo_optab
, UNKNOWN
);
6265 init_optab (vec_unpacks_hi_optab
, UNKNOWN
);
6266 init_optab (vec_unpacks_lo_optab
, UNKNOWN
);
6267 init_optab (vec_unpacku_hi_optab
, UNKNOWN
);
6268 init_optab (vec_unpacku_lo_optab
, UNKNOWN
);
6269 init_optab (vec_unpacks_float_hi_optab
, UNKNOWN
);
6270 init_optab (vec_unpacks_float_lo_optab
, UNKNOWN
);
6271 init_optab (vec_unpacku_float_hi_optab
, UNKNOWN
);
6272 init_optab (vec_unpacku_float_lo_optab
, UNKNOWN
);
6273 init_optab (vec_pack_trunc_optab
, UNKNOWN
);
6274 init_optab (vec_pack_usat_optab
, UNKNOWN
);
6275 init_optab (vec_pack_ssat_optab
, UNKNOWN
);
6276 init_optab (vec_pack_ufix_trunc_optab
, UNKNOWN
);
6277 init_optab (vec_pack_sfix_trunc_optab
, UNKNOWN
);
6279 init_optab (powi_optab
, UNKNOWN
);
6282 init_convert_optab (sext_optab
, SIGN_EXTEND
);
6283 init_convert_optab (zext_optab
, ZERO_EXTEND
);
6284 init_convert_optab (trunc_optab
, TRUNCATE
);
6285 init_convert_optab (sfix_optab
, FIX
);
6286 init_convert_optab (ufix_optab
, UNSIGNED_FIX
);
6287 init_convert_optab (sfixtrunc_optab
, UNKNOWN
);
6288 init_convert_optab (ufixtrunc_optab
, UNKNOWN
);
6289 init_convert_optab (sfloat_optab
, FLOAT
);
6290 init_convert_optab (ufloat_optab
, UNSIGNED_FLOAT
);
6291 init_convert_optab (lrint_optab
, UNKNOWN
);
6292 init_convert_optab (lround_optab
, UNKNOWN
);
6293 init_convert_optab (lfloor_optab
, UNKNOWN
);
6294 init_convert_optab (lceil_optab
, UNKNOWN
);
6296 init_convert_optab (fract_optab
, FRACT_CONVERT
);
6297 init_convert_optab (fractuns_optab
, UNSIGNED_FRACT_CONVERT
);
6298 init_convert_optab (satfract_optab
, SAT_FRACT
);
6299 init_convert_optab (satfractuns_optab
, UNSIGNED_SAT_FRACT
);
6301 /* Fill in the optabs with the insns we support. */
6304 /* Initialize the optabs with the names of the library functions. */
6305 add_optab
->libcall_basename
= "add";
6306 add_optab
->libcall_suffix
= '3';
6307 add_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6308 addv_optab
->libcall_basename
= "add";
6309 addv_optab
->libcall_suffix
= '3';
6310 addv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6311 ssadd_optab
->libcall_basename
= "ssadd";
6312 ssadd_optab
->libcall_suffix
= '3';
6313 ssadd_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6314 usadd_optab
->libcall_basename
= "usadd";
6315 usadd_optab
->libcall_suffix
= '3';
6316 usadd_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6317 sub_optab
->libcall_basename
= "sub";
6318 sub_optab
->libcall_suffix
= '3';
6319 sub_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6320 subv_optab
->libcall_basename
= "sub";
6321 subv_optab
->libcall_suffix
= '3';
6322 subv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6323 sssub_optab
->libcall_basename
= "sssub";
6324 sssub_optab
->libcall_suffix
= '3';
6325 sssub_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6326 ussub_optab
->libcall_basename
= "ussub";
6327 ussub_optab
->libcall_suffix
= '3';
6328 ussub_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6329 smul_optab
->libcall_basename
= "mul";
6330 smul_optab
->libcall_suffix
= '3';
6331 smul_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6332 smulv_optab
->libcall_basename
= "mul";
6333 smulv_optab
->libcall_suffix
= '3';
6334 smulv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6335 ssmul_optab
->libcall_basename
= "ssmul";
6336 ssmul_optab
->libcall_suffix
= '3';
6337 ssmul_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6338 usmul_optab
->libcall_basename
= "usmul";
6339 usmul_optab
->libcall_suffix
= '3';
6340 usmul_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6341 sdiv_optab
->libcall_basename
= "div";
6342 sdiv_optab
->libcall_suffix
= '3';
6343 sdiv_optab
->libcall_gen
= gen_int_fp_signed_fixed_libfunc
;
6344 sdivv_optab
->libcall_basename
= "divv";
6345 sdivv_optab
->libcall_suffix
= '3';
6346 sdivv_optab
->libcall_gen
= gen_int_libfunc
;
6347 ssdiv_optab
->libcall_basename
= "ssdiv";
6348 ssdiv_optab
->libcall_suffix
= '3';
6349 ssdiv_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6350 udiv_optab
->libcall_basename
= "udiv";
6351 udiv_optab
->libcall_suffix
= '3';
6352 udiv_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6353 usdiv_optab
->libcall_basename
= "usdiv";
6354 usdiv_optab
->libcall_suffix
= '3';
6355 usdiv_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6356 sdivmod_optab
->libcall_basename
= "divmod";
6357 sdivmod_optab
->libcall_suffix
= '4';
6358 sdivmod_optab
->libcall_gen
= gen_int_libfunc
;
6359 udivmod_optab
->libcall_basename
= "udivmod";
6360 udivmod_optab
->libcall_suffix
= '4';
6361 udivmod_optab
->libcall_gen
= gen_int_libfunc
;
6362 smod_optab
->libcall_basename
= "mod";
6363 smod_optab
->libcall_suffix
= '3';
6364 smod_optab
->libcall_gen
= gen_int_libfunc
;
6365 umod_optab
->libcall_basename
= "umod";
6366 umod_optab
->libcall_suffix
= '3';
6367 umod_optab
->libcall_gen
= gen_int_libfunc
;
6368 ftrunc_optab
->libcall_basename
= "ftrunc";
6369 ftrunc_optab
->libcall_suffix
= '2';
6370 ftrunc_optab
->libcall_gen
= gen_fp_libfunc
;
6371 and_optab
->libcall_basename
= "and";
6372 and_optab
->libcall_suffix
= '3';
6373 and_optab
->libcall_gen
= gen_int_libfunc
;
6374 ior_optab
->libcall_basename
= "ior";
6375 ior_optab
->libcall_suffix
= '3';
6376 ior_optab
->libcall_gen
= gen_int_libfunc
;
6377 xor_optab
->libcall_basename
= "xor";
6378 xor_optab
->libcall_suffix
= '3';
6379 xor_optab
->libcall_gen
= gen_int_libfunc
;
6380 ashl_optab
->libcall_basename
= "ashl";
6381 ashl_optab
->libcall_suffix
= '3';
6382 ashl_optab
->libcall_gen
= gen_int_fixed_libfunc
;
6383 ssashl_optab
->libcall_basename
= "ssashl";
6384 ssashl_optab
->libcall_suffix
= '3';
6385 ssashl_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6386 usashl_optab
->libcall_basename
= "usashl";
6387 usashl_optab
->libcall_suffix
= '3';
6388 usashl_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6389 ashr_optab
->libcall_basename
= "ashr";
6390 ashr_optab
->libcall_suffix
= '3';
6391 ashr_optab
->libcall_gen
= gen_int_signed_fixed_libfunc
;
6392 lshr_optab
->libcall_basename
= "lshr";
6393 lshr_optab
->libcall_suffix
= '3';
6394 lshr_optab
->libcall_gen
= gen_int_unsigned_fixed_libfunc
;
6395 smin_optab
->libcall_basename
= "min";
6396 smin_optab
->libcall_suffix
= '3';
6397 smin_optab
->libcall_gen
= gen_int_fp_libfunc
;
6398 smax_optab
->libcall_basename
= "max";
6399 smax_optab
->libcall_suffix
= '3';
6400 smax_optab
->libcall_gen
= gen_int_fp_libfunc
;
6401 umin_optab
->libcall_basename
= "umin";
6402 umin_optab
->libcall_suffix
= '3';
6403 umin_optab
->libcall_gen
= gen_int_libfunc
;
6404 umax_optab
->libcall_basename
= "umax";
6405 umax_optab
->libcall_suffix
= '3';
6406 umax_optab
->libcall_gen
= gen_int_libfunc
;
6407 neg_optab
->libcall_basename
= "neg";
6408 neg_optab
->libcall_suffix
= '2';
6409 neg_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6410 ssneg_optab
->libcall_basename
= "ssneg";
6411 ssneg_optab
->libcall_suffix
= '2';
6412 ssneg_optab
->libcall_gen
= gen_signed_fixed_libfunc
;
6413 usneg_optab
->libcall_basename
= "usneg";
6414 usneg_optab
->libcall_suffix
= '2';
6415 usneg_optab
->libcall_gen
= gen_unsigned_fixed_libfunc
;
6416 negv_optab
->libcall_basename
= "neg";
6417 negv_optab
->libcall_suffix
= '2';
6418 negv_optab
->libcall_gen
= gen_intv_fp_libfunc
;
6419 one_cmpl_optab
->libcall_basename
= "one_cmpl";
6420 one_cmpl_optab
->libcall_suffix
= '2';
6421 one_cmpl_optab
->libcall_gen
= gen_int_libfunc
;
6422 ffs_optab
->libcall_basename
= "ffs";
6423 ffs_optab
->libcall_suffix
= '2';
6424 ffs_optab
->libcall_gen
= gen_int_libfunc
;
6425 clz_optab
->libcall_basename
= "clz";
6426 clz_optab
->libcall_suffix
= '2';
6427 clz_optab
->libcall_gen
= gen_int_libfunc
;
6428 ctz_optab
->libcall_basename
= "ctz";
6429 ctz_optab
->libcall_suffix
= '2';
6430 ctz_optab
->libcall_gen
= gen_int_libfunc
;
6431 popcount_optab
->libcall_basename
= "popcount";
6432 popcount_optab
->libcall_suffix
= '2';
6433 popcount_optab
->libcall_gen
= gen_int_libfunc
;
6434 parity_optab
->libcall_basename
= "parity";
6435 parity_optab
->libcall_suffix
= '2';
6436 parity_optab
->libcall_gen
= gen_int_libfunc
;
6438 /* Comparison libcalls for integers MUST come in pairs,
6440 cmp_optab
->libcall_basename
= "cmp";
6441 cmp_optab
->libcall_suffix
= '2';
6442 cmp_optab
->libcall_gen
= gen_int_fp_fixed_libfunc
;
6443 ucmp_optab
->libcall_basename
= "ucmp";
6444 ucmp_optab
->libcall_suffix
= '2';
6445 ucmp_optab
->libcall_gen
= gen_int_libfunc
;
6447 /* EQ etc are floating point only. */
6448 eq_optab
->libcall_basename
= "eq";
6449 eq_optab
->libcall_suffix
= '2';
6450 eq_optab
->libcall_gen
= gen_fp_libfunc
;
6451 ne_optab
->libcall_basename
= "ne";
6452 ne_optab
->libcall_suffix
= '2';
6453 ne_optab
->libcall_gen
= gen_fp_libfunc
;
6454 gt_optab
->libcall_basename
= "gt";
6455 gt_optab
->libcall_suffix
= '2';
6456 gt_optab
->libcall_gen
= gen_fp_libfunc
;
6457 ge_optab
->libcall_basename
= "ge";
6458 ge_optab
->libcall_suffix
= '2';
6459 ge_optab
->libcall_gen
= gen_fp_libfunc
;
6460 lt_optab
->libcall_basename
= "lt";
6461 lt_optab
->libcall_suffix
= '2';
6462 lt_optab
->libcall_gen
= gen_fp_libfunc
;
6463 le_optab
->libcall_basename
= "le";
6464 le_optab
->libcall_suffix
= '2';
6465 le_optab
->libcall_gen
= gen_fp_libfunc
;
6466 unord_optab
->libcall_basename
= "unord";
6467 unord_optab
->libcall_suffix
= '2';
6468 unord_optab
->libcall_gen
= gen_fp_libfunc
;
6470 powi_optab
->libcall_basename
= "powi";
6471 powi_optab
->libcall_suffix
= '2';
6472 powi_optab
->libcall_gen
= gen_fp_libfunc
;
6475 sfloat_optab
->libcall_basename
= "float";
6476 sfloat_optab
->libcall_gen
= gen_int_to_fp_conv_libfunc
;
6477 ufloat_optab
->libcall_gen
= gen_ufloat_conv_libfunc
;
6478 sfix_optab
->libcall_basename
= "fix";
6479 sfix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6480 ufix_optab
->libcall_basename
= "fixuns";
6481 ufix_optab
->libcall_gen
= gen_fp_to_int_conv_libfunc
;
6482 lrint_optab
->libcall_basename
= "lrint";
6483 lrint_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6484 lround_optab
->libcall_basename
= "lround";
6485 lround_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6486 lfloor_optab
->libcall_basename
= "lfloor";
6487 lfloor_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6488 lceil_optab
->libcall_basename
= "lceil";
6489 lceil_optab
->libcall_gen
= gen_int_to_fp_nondecimal_conv_libfunc
;
6491 /* trunc_optab is also used for FLOAT_EXTEND. */
6492 sext_optab
->libcall_basename
= "extend";
6493 sext_optab
->libcall_gen
= gen_extend_conv_libfunc
;
6494 trunc_optab
->libcall_basename
= "trunc";
6495 trunc_optab
->libcall_gen
= gen_trunc_conv_libfunc
;
6497 /* Conversions for fixed-point modes and other modes. */
6498 fract_optab
->libcall_basename
= "fract";
6499 fract_optab
->libcall_gen
= gen_fract_conv_libfunc
;
6500 satfract_optab
->libcall_basename
= "satfract";
6501 satfract_optab
->libcall_gen
= gen_satfract_conv_libfunc
;
6502 fractuns_optab
->libcall_basename
= "fractuns";
6503 fractuns_optab
->libcall_gen
= gen_fractuns_conv_libfunc
;
6504 satfractuns_optab
->libcall_basename
= "satfractuns";
6505 satfractuns_optab
->libcall_gen
= gen_satfractuns_conv_libfunc
;
6507 /* The ffs function operates on `int'. Fall back on it if we do not
6508 have a libgcc2 function for that width. */
6509 if (INT_TYPE_SIZE
< BITS_PER_WORD
)
6510 set_optab_libfunc (ffs_optab
, mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0),
6513 /* Explicitly initialize the bswap libfuncs since we need them to be
6514 valid for things other than word_mode. */
6515 set_optab_libfunc (bswap_optab
, SImode
, "__bswapsi2");
6516 set_optab_libfunc (bswap_optab
, DImode
, "__bswapdi2");
6518 /* Use cabs for double complex abs, since systems generally have cabs.
6519 Don't define any libcall for float complex, so that cabs will be used. */
6520 if (complex_double_type_node
)
6521 set_optab_libfunc (abs_optab
, TYPE_MODE (complex_double_type_node
), "cabs");
6523 abort_libfunc
= init_one_libfunc ("abort");
6524 memcpy_libfunc
= init_one_libfunc ("memcpy");
6525 memmove_libfunc
= init_one_libfunc ("memmove");
6526 memcmp_libfunc
= init_one_libfunc ("memcmp");
6527 memset_libfunc
= init_one_libfunc ("memset");
6528 setbits_libfunc
= init_one_libfunc ("__setbits");
6530 #ifndef DONT_USE_BUILTIN_SETJMP
6531 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
6532 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
6534 setjmp_libfunc
= init_one_libfunc ("setjmp");
6535 longjmp_libfunc
= init_one_libfunc ("longjmp");
6537 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
6538 unwind_sjlj_unregister_libfunc
6539 = init_one_libfunc ("_Unwind_SjLj_Unregister");
6541 /* For function entry/exit instrumentation. */
6542 profile_function_entry_libfunc
6543 = init_one_libfunc ("__cyg_profile_func_enter");
6544 profile_function_exit_libfunc
6545 = init_one_libfunc ("__cyg_profile_func_exit");
6547 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
6549 /* Allow the target to add more libcalls or rename some, etc. */
6550 targetm
.init_libfuncs ();
6553 /* Print information about the current contents of the optabs on
6557 debug_optab_libfuncs (void)
6563 /* Dump the arithmetic optabs. */
6564 for (i
= 0; i
!= (int) OTI_MAX
; i
++)
6565 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6570 o
= &optab_table
[i
];
6571 l
= optab_libfunc (o
, (enum machine_mode
) j
);
6574 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6575 fprintf (stderr
, "%s\t%s:\t%s\n",
6576 GET_RTX_NAME (o
->code
),
6582 /* Dump the conversion optabs. */
6583 for (i
= 0; i
< (int) COI_MAX
; ++i
)
6584 for (j
= 0; j
< NUM_MACHINE_MODES
; ++j
)
6585 for (k
= 0; k
< NUM_MACHINE_MODES
; ++k
)
6590 o
= &convert_optab_table
[i
];
6591 l
= convert_optab_libfunc (o
, (enum machine_mode
) j
,
6592 (enum machine_mode
) k
);
6595 gcc_assert (GET_CODE (l
) == SYMBOL_REF
);
6596 fprintf (stderr
, "%s\t%s\t%s:\t%s\n",
6597 GET_RTX_NAME (o
->code
),
6606 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
6607 CODE. Return 0 on failure. */
6610 gen_cond_trap (enum rtx_code code
, rtx op1
, rtx op2
, rtx tcode
)
6612 enum machine_mode mode
= GET_MODE (op1
);
6613 enum insn_code icode
;
6617 if (mode
== VOIDmode
)
6620 icode
= optab_handler (ctrap_optab
, mode
);
6621 if (icode
== CODE_FOR_nothing
)
6624 /* Some targets only accept a zero trap code. */
6625 if (!insn_operand_matches (icode
, 3, tcode
))
6628 do_pending_stack_adjust ();
6630 prepare_cmp_insn (op1
, op2
, code
, NULL_RTX
, false, OPTAB_DIRECT
,
6635 insn
= GEN_FCN (icode
) (trap_rtx
, XEXP (trap_rtx
, 0), XEXP (trap_rtx
, 1),
6638 /* If that failed, then give up. */
6646 insn
= get_insns ();
6651 /* Return rtx code for TCODE. Use UNSIGNEDP to select signed
6652 or unsigned operation code. */
6654 static enum rtx_code
6655 get_rtx_code (enum tree_code tcode
, bool unsignedp
)
6667 code
= unsignedp
? LTU
: LT
;
6670 code
= unsignedp
? LEU
: LE
;
6673 code
= unsignedp
? GTU
: GT
;
6676 code
= unsignedp
? GEU
: GE
;
6679 case UNORDERED_EXPR
:
6710 /* Return comparison rtx for COND. Use UNSIGNEDP to select signed or
6711 unsigned operators. Do not generate compare instruction. */
6714 vector_compare_rtx (tree cond
, bool unsignedp
, enum insn_code icode
)
6716 enum rtx_code rcode
;
6718 rtx rtx_op0
, rtx_op1
;
6720 /* This is unlikely. While generating VEC_COND_EXPR, auto vectorizer
6721 ensures that condition is a relational operation. */
6722 gcc_assert (COMPARISON_CLASS_P (cond
));
6724 rcode
= get_rtx_code (TREE_CODE (cond
), unsignedp
);
6725 t_op0
= TREE_OPERAND (cond
, 0);
6726 t_op1
= TREE_OPERAND (cond
, 1);
6728 /* Expand operands. */
6729 rtx_op0
= expand_expr (t_op0
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op0
)),
6731 rtx_op1
= expand_expr (t_op1
, NULL_RTX
, TYPE_MODE (TREE_TYPE (t_op1
)),
6734 if (!insn_data
[icode
].operand
[4].predicate (rtx_op0
, GET_MODE (rtx_op0
))
6735 && GET_MODE (rtx_op0
) != VOIDmode
)
6736 rtx_op0
= force_reg (GET_MODE (rtx_op0
), rtx_op0
);
6738 if (!insn_data
[icode
].operand
[5].predicate (rtx_op1
, GET_MODE (rtx_op1
))
6739 && GET_MODE (rtx_op1
) != VOIDmode
)
6740 rtx_op1
= force_reg (GET_MODE (rtx_op1
), rtx_op1
);
6742 return gen_rtx_fmt_ee (rcode
, VOIDmode
, rtx_op0
, rtx_op1
);
6745 /* Return insn code for TYPE, the type of a VEC_COND_EXPR. */
6747 static inline enum insn_code
6748 get_vcond_icode (tree type
, enum machine_mode mode
)
6750 enum insn_code icode
= CODE_FOR_nothing
;
6752 if (TYPE_UNSIGNED (type
))
6753 icode
= direct_optab_handler (vcondu_optab
, mode
);
6755 icode
= direct_optab_handler (vcond_optab
, mode
);
6759 /* Return TRUE iff, appropriate vector insns are available
6760 for vector cond expr with type TYPE in VMODE mode. */
6763 expand_vec_cond_expr_p (tree type
, enum machine_mode vmode
)
6765 if (get_vcond_icode (type
, vmode
) == CODE_FOR_nothing
)
6770 /* Generate insns for a VEC_COND_EXPR, given its TYPE and its
6774 expand_vec_cond_expr (tree vec_cond_type
, tree op0
, tree op1
, tree op2
,
6777 enum insn_code icode
;
6778 rtx comparison
, rtx_op1
, rtx_op2
, cc_op0
, cc_op1
;
6779 enum machine_mode mode
= TYPE_MODE (vec_cond_type
);
6780 bool unsignedp
= TYPE_UNSIGNED (vec_cond_type
);
6782 icode
= get_vcond_icode (vec_cond_type
, mode
);
6783 if (icode
== CODE_FOR_nothing
)
6786 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
6787 target
= gen_reg_rtx (mode
);
6789 /* Get comparison rtx. First expand both cond expr operands. */
6790 comparison
= vector_compare_rtx (op0
,
6792 cc_op0
= XEXP (comparison
, 0);
6793 cc_op1
= XEXP (comparison
, 1);
6794 /* Expand both operands and force them in reg, if required. */
6795 rtx_op1
= expand_normal (op1
);
6796 if (!insn_data
[icode
].operand
[1].predicate (rtx_op1
, mode
)
6797 && mode
!= VOIDmode
)
6798 rtx_op1
= force_reg (mode
, rtx_op1
);
6800 rtx_op2
= expand_normal (op2
);
6801 if (!insn_data
[icode
].operand
[2].predicate (rtx_op2
, mode
)
6802 && mode
!= VOIDmode
)
6803 rtx_op2
= force_reg (mode
, rtx_op2
);
6805 /* Emit instruction! */
6806 emit_insn (GEN_FCN (icode
) (target
, rtx_op1
, rtx_op2
,
6807 comparison
, cc_op0
, cc_op1
));
6813 /* This is an internal subroutine of the other compare_and_swap expanders.
6814 MEM, OLD_VAL and NEW_VAL are as you'd expect for a compare-and-swap
6815 operation. TARGET is an optional place to store the value result of
6816 the operation. ICODE is the particular instruction to expand. Return
6817 the result of the operation. */
6820 expand_val_compare_and_swap_1 (rtx mem
, rtx old_val
, rtx new_val
,
6821 rtx target
, enum insn_code icode
)
6823 enum machine_mode mode
= GET_MODE (mem
);
6826 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
6827 target
= gen_reg_rtx (mode
);
6829 if (GET_MODE (old_val
) != VOIDmode
&& GET_MODE (old_val
) != mode
)
6830 old_val
= convert_modes (mode
, GET_MODE (old_val
), old_val
, 1);
6831 if (!insn_data
[icode
].operand
[2].predicate (old_val
, mode
))
6832 old_val
= force_reg (mode
, old_val
);
6834 if (GET_MODE (new_val
) != VOIDmode
&& GET_MODE (new_val
) != mode
)
6835 new_val
= convert_modes (mode
, GET_MODE (new_val
), new_val
, 1);
6836 if (!insn_data
[icode
].operand
[3].predicate (new_val
, mode
))
6837 new_val
= force_reg (mode
, new_val
);
6839 insn
= GEN_FCN (icode
) (target
, mem
, old_val
, new_val
);
6840 if (insn
== NULL_RTX
)
6847 /* Expand a compare-and-swap operation and return its value. */
6850 expand_val_compare_and_swap (rtx mem
, rtx old_val
, rtx new_val
, rtx target
)
6852 enum machine_mode mode
= GET_MODE (mem
);
6853 enum insn_code icode
6854 = direct_optab_handler (sync_compare_and_swap_optab
, mode
);
6856 if (icode
== CODE_FOR_nothing
)
6859 return expand_val_compare_and_swap_1 (mem
, old_val
, new_val
, target
, icode
);
6862 /* Helper function to find the MODE_CC set in a sync_compare_and_swap
6866 find_cc_set (rtx x
, const_rtx pat
, void *data
)
6868 if (REG_P (x
) && GET_MODE_CLASS (GET_MODE (x
)) == MODE_CC
6869 && GET_CODE (pat
) == SET
)
6871 rtx
*p_cc_reg
= (rtx
*) data
;
6872 gcc_assert (!*p_cc_reg
);
6877 /* Expand a compare-and-swap operation and store true into the result if
6878 the operation was successful and false otherwise. Return the result.
6879 Unlike other routines, TARGET is not optional. */
6882 expand_bool_compare_and_swap (rtx mem
, rtx old_val
, rtx new_val
, rtx target
)
6884 enum machine_mode mode
= GET_MODE (mem
);
6885 enum insn_code icode
;
6886 rtx subtarget
, seq
, cc_reg
;
6888 /* If the target supports a compare-and-swap pattern that simultaneously
6889 sets some flag for success, then use it. Otherwise use the regular
6890 compare-and-swap and follow that immediately with a compare insn. */
6891 icode
= direct_optab_handler (sync_compare_and_swap_optab
, mode
);
6892 if (icode
== CODE_FOR_nothing
)
6895 do_pending_stack_adjust ();
6899 subtarget
= expand_val_compare_and_swap_1 (mem
, old_val
, new_val
,
6902 if (subtarget
== NULL_RTX
)
6908 if (have_insn_for (COMPARE
, CCmode
))
6909 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
6913 /* We might be comparing against an old value. Try again. :-( */
6914 if (!cc_reg
&& MEM_P (old_val
))
6917 old_val
= force_reg (mode
, old_val
);
6924 return emit_store_flag_force (target
, EQ
, cc_reg
, const0_rtx
, VOIDmode
, 0, 1);
6926 return emit_store_flag_force (target
, EQ
, subtarget
, old_val
, VOIDmode
, 1, 1);
6929 /* This is a helper function for the other atomic operations. This function
6930 emits a loop that contains SEQ that iterates until a compare-and-swap
6931 operation at the end succeeds. MEM is the memory to be modified. SEQ is
6932 a set of instructions that takes a value from OLD_REG as an input and
6933 produces a value in NEW_REG as an output. Before SEQ, OLD_REG will be
6934 set to the current contents of MEM. After SEQ, a compare-and-swap will
6935 attempt to update MEM with NEW_REG. The function returns true when the
6936 loop was generated successfully. */
6939 expand_compare_and_swap_loop (rtx mem
, rtx old_reg
, rtx new_reg
, rtx seq
)
6941 enum machine_mode mode
= GET_MODE (mem
);
6942 enum insn_code icode
;
6943 rtx label
, cmp_reg
, subtarget
, cc_reg
;
6945 /* The loop we want to generate looks like
6951 cmp_reg = compare-and-swap(mem, old_reg, new_reg)
6952 if (cmp_reg != old_reg)
6955 Note that we only do the plain load from memory once. Subsequent
6956 iterations use the value loaded by the compare-and-swap pattern. */
6958 label
= gen_label_rtx ();
6959 cmp_reg
= gen_reg_rtx (mode
);
6961 emit_move_insn (cmp_reg
, mem
);
6963 emit_move_insn (old_reg
, cmp_reg
);
6967 /* If the target supports a compare-and-swap pattern that simultaneously
6968 sets some flag for success, then use it. Otherwise use the regular
6969 compare-and-swap and follow that immediately with a compare insn. */
6970 icode
= direct_optab_handler (sync_compare_and_swap_optab
, mode
);
6971 if (icode
== CODE_FOR_nothing
)
6974 subtarget
= expand_val_compare_and_swap_1 (mem
, old_reg
, new_reg
,
6976 if (subtarget
== NULL_RTX
)
6980 if (have_insn_for (COMPARE
, CCmode
))
6981 note_stores (PATTERN (get_last_insn ()), find_cc_set
, &cc_reg
);
6985 old_reg
= const0_rtx
;
6989 if (subtarget
!= cmp_reg
)
6990 emit_move_insn (cmp_reg
, subtarget
);
6993 /* ??? Mark this jump predicted not taken? */
6994 emit_cmp_and_jump_insns (cmp_reg
, old_reg
, NE
, const0_rtx
, GET_MODE (cmp_reg
), 1,
6999 /* This function generates the atomic operation MEM CODE= VAL. In this
7000 case, we do not care about any resulting value. Returns NULL if we
7001 cannot generate the operation. */
7004 expand_sync_operation (rtx mem
, rtx val
, enum rtx_code code
)
7006 enum machine_mode mode
= GET_MODE (mem
);
7007 enum insn_code icode
;
7010 /* Look to see if the target supports the operation directly. */
7014 icode
= direct_optab_handler (sync_add_optab
, mode
);
7017 icode
= direct_optab_handler (sync_ior_optab
, mode
);
7020 icode
= direct_optab_handler (sync_xor_optab
, mode
);
7023 icode
= direct_optab_handler (sync_and_optab
, mode
);
7026 icode
= direct_optab_handler (sync_nand_optab
, mode
);
7030 icode
= direct_optab_handler (sync_sub_optab
, mode
);
7031 if (icode
== CODE_FOR_nothing
|| CONST_INT_P (val
))
7033 icode
= direct_optab_handler (sync_add_optab
, mode
);
7034 if (icode
!= CODE_FOR_nothing
)
7036 val
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, 1);
7046 /* Generate the direct operation, if present. */
7047 if (icode
!= CODE_FOR_nothing
)
7049 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7050 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7051 if (!insn_data
[icode
].operand
[1].predicate (val
, mode
))
7052 val
= force_reg (mode
, val
);
7054 insn
= GEN_FCN (icode
) (mem
, val
);
7062 /* Failing that, generate a compare-and-swap loop in which we perform the
7063 operation with normal arithmetic instructions. */
7064 if (direct_optab_handler (sync_compare_and_swap_optab
, mode
)
7065 != CODE_FOR_nothing
)
7067 rtx t0
= gen_reg_rtx (mode
), t1
;
7074 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7075 true, OPTAB_LIB_WIDEN
);
7076 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7079 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
,
7080 true, OPTAB_LIB_WIDEN
);
7081 insn
= get_insns ();
7084 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
7091 /* This function generates the atomic operation MEM CODE= VAL. In this
7092 case, we do care about the resulting value: if AFTER is true then
7093 return the value MEM holds after the operation, if AFTER is false
7094 then return the value MEM holds before the operation. TARGET is an
7095 optional place for the result value to be stored. */
7098 expand_sync_fetch_operation (rtx mem
, rtx val
, enum rtx_code code
,
7099 bool after
, rtx target
)
7101 enum machine_mode mode
= GET_MODE (mem
);
7102 enum insn_code old_code
, new_code
, icode
;
7106 /* Look to see if the target supports the operation directly. */
7110 old_code
= direct_optab_handler (sync_old_add_optab
, mode
);
7111 new_code
= direct_optab_handler (sync_new_add_optab
, mode
);
7114 old_code
= direct_optab_handler (sync_old_ior_optab
, mode
);
7115 new_code
= direct_optab_handler (sync_new_ior_optab
, mode
);
7118 old_code
= direct_optab_handler (sync_old_xor_optab
, mode
);
7119 new_code
= direct_optab_handler (sync_new_xor_optab
, mode
);
7122 old_code
= direct_optab_handler (sync_old_and_optab
, mode
);
7123 new_code
= direct_optab_handler (sync_new_and_optab
, mode
);
7126 old_code
= direct_optab_handler (sync_old_nand_optab
, mode
);
7127 new_code
= direct_optab_handler (sync_new_nand_optab
, mode
);
7131 old_code
= direct_optab_handler (sync_old_sub_optab
, mode
);
7132 new_code
= direct_optab_handler (sync_new_sub_optab
, mode
);
7133 if ((old_code
== CODE_FOR_nothing
&& new_code
== CODE_FOR_nothing
)
7134 || CONST_INT_P (val
))
7136 old_code
= direct_optab_handler (sync_old_add_optab
, mode
);
7137 new_code
= direct_optab_handler (sync_new_add_optab
, mode
);
7138 if (old_code
!= CODE_FOR_nothing
|| new_code
!= CODE_FOR_nothing
)
7140 val
= expand_simple_unop (mode
, NEG
, val
, NULL_RTX
, 1);
7150 /* If the target does supports the proper new/old operation, great. But
7151 if we only support the opposite old/new operation, check to see if we
7152 can compensate. In the case in which the old value is supported, then
7153 we can always perform the operation again with normal arithmetic. In
7154 the case in which the new value is supported, then we can only handle
7155 this in the case the operation is reversible. */
7160 if (icode
== CODE_FOR_nothing
)
7163 if (icode
!= CODE_FOR_nothing
)
7170 if (icode
== CODE_FOR_nothing
7171 && (code
== PLUS
|| code
== MINUS
|| code
== XOR
))
7174 if (icode
!= CODE_FOR_nothing
)
7179 /* If we found something supported, great. */
7180 if (icode
!= CODE_FOR_nothing
)
7182 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
7183 target
= gen_reg_rtx (mode
);
7185 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7186 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7187 if (!insn_data
[icode
].operand
[2].predicate (val
, mode
))
7188 val
= force_reg (mode
, val
);
7190 insn
= GEN_FCN (icode
) (target
, mem
, val
);
7195 /* If we need to compensate for using an operation with the
7196 wrong return value, do so now. */
7203 else if (code
== MINUS
)
7209 target
= expand_simple_binop (mode
, AND
, target
, val
,
7212 target
= expand_simple_unop (mode
, code
, target
,
7216 target
= expand_simple_binop (mode
, code
, target
, val
,
7225 /* Failing that, generate a compare-and-swap loop in which we perform the
7226 operation with normal arithmetic instructions. */
7227 if (direct_optab_handler (sync_compare_and_swap_optab
, mode
)
7228 != CODE_FOR_nothing
)
7230 rtx t0
= gen_reg_rtx (mode
), t1
;
7232 if (!target
|| !register_operand (target
, mode
))
7233 target
= gen_reg_rtx (mode
);
7238 emit_move_insn (target
, t0
);
7242 t1
= expand_simple_binop (mode
, AND
, t1
, val
, NULL_RTX
,
7243 true, OPTAB_LIB_WIDEN
);
7244 t1
= expand_simple_unop (mode
, code
, t1
, NULL_RTX
, true);
7247 t1
= expand_simple_binop (mode
, code
, t1
, val
, NULL_RTX
,
7248 true, OPTAB_LIB_WIDEN
);
7250 emit_move_insn (target
, t1
);
7252 insn
= get_insns ();
7255 if (t1
!= NULL
&& expand_compare_and_swap_loop (mem
, t0
, t1
, insn
))
7262 /* This function expands a test-and-set operation. Ideally we atomically
7263 store VAL in MEM and return the previous value in MEM. Some targets
7264 may not support this operation and only support VAL with the constant 1;
7265 in this case while the return value will be 0/1, but the exact value
7266 stored in MEM is target defined. TARGET is an option place to stick
7267 the return value. */
7270 expand_sync_lock_test_and_set (rtx mem
, rtx val
, rtx target
)
7272 enum machine_mode mode
= GET_MODE (mem
);
7273 enum insn_code icode
;
7276 /* If the target supports the test-and-set directly, great. */
7277 icode
= direct_optab_handler (sync_lock_test_and_set_optab
, mode
);
7278 if (icode
!= CODE_FOR_nothing
)
7280 if (!target
|| !insn_data
[icode
].operand
[0].predicate (target
, mode
))
7281 target
= gen_reg_rtx (mode
);
7283 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7284 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7285 if (!insn_data
[icode
].operand
[2].predicate (val
, mode
))
7286 val
= force_reg (mode
, val
);
7288 insn
= GEN_FCN (icode
) (target
, mem
, val
);
7296 /* Otherwise, use a compare-and-swap loop for the exchange. */
7297 if (direct_optab_handler (sync_compare_and_swap_optab
, mode
)
7298 != CODE_FOR_nothing
)
7300 if (!target
|| !register_operand (target
, mode
))
7301 target
= gen_reg_rtx (mode
);
7302 if (GET_MODE (val
) != VOIDmode
&& GET_MODE (val
) != mode
)
7303 val
= convert_modes (mode
, GET_MODE (val
), val
, 1);
7304 if (expand_compare_and_swap_loop (mem
, target
, val
, NULL_RTX
))
7311 /* Return true if OPERAND is suitable for operand number OPNO of
7312 instruction ICODE. */
7315 insn_operand_matches (enum insn_code icode
, unsigned int opno
, rtx operand
)
7317 return (!insn_data
[(int) icode
].operand
[opno
].predicate
7318 || (insn_data
[(int) icode
].operand
[opno
].predicate
7319 (operand
, insn_data
[(int) icode
].operand
[opno
].mode
)));
7322 #include "gt-optabs.h"