1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 optab optab_table
[OTI_MAX
];
59 rtx libfunc_table
[LTI_MAX
];
61 /* Tables of patterns for converting one mode to another. */
62 convert_optab convert_optab_table
[CTI_MAX
];
64 /* Contains the optab used for each rtx code. */
65 optab code_to_optab
[NUM_RTX_CODE
+ 1];
67 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
68 gives the gen_function to make a branch to test that condition. */
70 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
72 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
73 gives the insn code to make a store-condition insn
74 to test that condition. */
76 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
78 #ifdef HAVE_conditional_move
79 /* Indexed by the machine mode, gives the insn code to make a conditional
80 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
81 setcc_gen_code to cut down on the number of named patterns. Consider a day
82 when a lot more rtx codes are conditional (eg: for the ARM). */
84 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
87 /* The insn generating function can not take an rtx_code argument.
88 TRAP_RTX is used as an rtx argument. Its code is replaced with
89 the code to be used in the trap insn and all other fields are ignored. */
90 static GTY(()) rtx trap_rtx
;
92 static int add_equal_note (rtx
, rtx
, enum rtx_code
, rtx
, rtx
);
93 static rtx
widen_operand (rtx
, enum machine_mode
, enum machine_mode
, int,
95 static int expand_cmplxdiv_straight (rtx
, rtx
, rtx
, rtx
, rtx
, rtx
,
96 enum machine_mode
, int,
97 enum optab_methods
, enum mode_class
,
99 static int expand_cmplxdiv_wide (rtx
, rtx
, rtx
, rtx
, rtx
, rtx
,
100 enum machine_mode
, int, enum optab_methods
,
101 enum mode_class
, optab
);
102 static void prepare_cmp_insn (rtx
*, rtx
*, enum rtx_code
*, rtx
,
103 enum machine_mode
*, int *,
104 enum can_compare_purpose
);
105 static enum insn_code
can_fix_p (enum machine_mode
, enum machine_mode
, int,
107 static enum insn_code
can_float_p (enum machine_mode
, enum machine_mode
, int);
108 static optab
new_optab (void);
109 static convert_optab
new_convert_optab (void);
110 static inline optab
init_optab (enum rtx_code
);
111 static inline optab
init_optabv (enum rtx_code
);
112 static inline convert_optab
init_convert_optab (enum rtx_code
);
113 static void init_libfuncs (optab
, int, int, const char *, int);
114 static void init_integral_libfuncs (optab
, const char *, int);
115 static void init_floating_libfuncs (optab
, const char *, int);
116 static void init_interclass_conv_libfuncs (convert_optab
, const char *,
117 enum mode_class
, enum mode_class
);
118 static void init_intraclass_conv_libfuncs (convert_optab
, const char *,
119 enum mode_class
, bool);
120 static void emit_cmp_and_jump_insn_1 (rtx
, rtx
, enum machine_mode
,
121 enum rtx_code
, int, rtx
);
122 static void prepare_float_lib_cmp (rtx
*, rtx
*, enum rtx_code
*,
123 enum machine_mode
*, int *);
124 static rtx
expand_vector_binop (enum machine_mode
, optab
, rtx
, rtx
, rtx
, int,
126 static rtx
expand_vector_unop (enum machine_mode
, optab
, rtx
, rtx
, int);
127 static rtx
widen_clz (enum machine_mode
, rtx
, rtx
);
128 static rtx
expand_parity (enum machine_mode
, rtx
, rtx
);
130 #ifndef HAVE_conditional_trap
131 #define HAVE_conditional_trap 0
132 #define gen_conditional_trap(a,b) (abort (), NULL_RTX)
135 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
136 the result of operation CODE applied to OP0 (and OP1 if it is a binary
139 If the last insn does not set TARGET, don't do anything, but return 1.
141 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
142 don't add the REG_EQUAL note but return 0. Our caller can then try
143 again, ensuring that TARGET is not one of the operands. */
146 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
148 rtx last_insn
, insn
, set
;
153 || NEXT_INSN (insns
) == NULL_RTX
)
156 if (GET_RTX_CLASS (code
) != RTX_COMM_ARITH
157 && GET_RTX_CLASS (code
) != RTX_BIN_ARITH
158 && GET_RTX_CLASS (code
) != RTX_COMM_COMPARE
159 && GET_RTX_CLASS (code
) != RTX_COMPARE
160 && GET_RTX_CLASS (code
) != RTX_UNARY
)
163 if (GET_CODE (target
) == ZERO_EXTRACT
)
166 for (last_insn
= insns
;
167 NEXT_INSN (last_insn
) != NULL_RTX
;
168 last_insn
= NEXT_INSN (last_insn
))
171 set
= single_set (last_insn
);
175 if (! rtx_equal_p (SET_DEST (set
), target
)
176 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
177 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
178 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
181 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
182 besides the last insn. */
183 if (reg_overlap_mentioned_p (target
, op0
)
184 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
186 insn
= PREV_INSN (last_insn
);
187 while (insn
!= NULL_RTX
)
189 if (reg_set_p (target
, insn
))
192 insn
= PREV_INSN (insn
);
196 if (GET_RTX_CLASS (code
) == RTX_UNARY
)
197 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
199 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
201 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
206 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
207 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
208 not actually do a sign-extend or zero-extend, but can leave the
209 higher-order bits of the result rtx undefined, for example, in the case
210 of logical operations, but not right shifts. */
213 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
214 int unsignedp
, int no_extend
)
218 /* If we don't have to extend and this is a constant, return it. */
219 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
222 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
223 extend since it will be more efficient to do so unless the signedness of
224 a promoted object differs from our extension. */
226 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
227 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
228 return convert_modes (mode
, oldmode
, op
, unsignedp
);
230 /* If MODE is no wider than a single word, we return a paradoxical
232 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
233 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
235 /* Otherwise, get an object of MODE, clobber it, and set the low-order
238 result
= gen_reg_rtx (mode
);
239 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
240 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
244 /* Generate code to perform a straightforward complex divide. */
247 expand_cmplxdiv_straight (rtx real0
, rtx real1
, rtx imag0
, rtx imag1
,
248 rtx realr
, rtx imagr
, enum machine_mode submode
,
249 int unsignedp
, enum optab_methods methods
,
250 enum mode_class
class, optab binoptab
)
256 optab this_add_optab
= add_optab
;
257 optab this_sub_optab
= sub_optab
;
258 optab this_neg_optab
= neg_optab
;
259 optab this_mul_optab
= smul_optab
;
261 if (binoptab
== sdivv_optab
)
263 this_add_optab
= addv_optab
;
264 this_sub_optab
= subv_optab
;
265 this_neg_optab
= negv_optab
;
266 this_mul_optab
= smulv_optab
;
269 /* Don't fetch these from memory more than once. */
270 real0
= force_reg (submode
, real0
);
271 real1
= force_reg (submode
, real1
);
274 imag0
= force_reg (submode
, imag0
);
276 imag1
= force_reg (submode
, imag1
);
278 /* Divisor: c*c + d*d. */
279 temp1
= expand_binop (submode
, this_mul_optab
, real1
, real1
,
280 NULL_RTX
, unsignedp
, methods
);
282 temp2
= expand_binop (submode
, this_mul_optab
, imag1
, imag1
,
283 NULL_RTX
, unsignedp
, methods
);
285 if (temp1
== 0 || temp2
== 0)
288 divisor
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
289 NULL_RTX
, unsignedp
, methods
);
295 /* Mathematically, ((a)(c-id))/divisor. */
296 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
298 /* Calculate the dividend. */
299 real_t
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
300 NULL_RTX
, unsignedp
, methods
);
302 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
303 NULL_RTX
, unsignedp
, methods
);
305 if (real_t
== 0 || imag_t
== 0)
308 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
309 NULL_RTX
, unsignedp
);
313 /* Mathematically, ((a+ib)(c-id))/divider. */
314 /* Calculate the dividend. */
315 temp1
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
316 NULL_RTX
, unsignedp
, methods
);
318 temp2
= expand_binop (submode
, this_mul_optab
, imag0
, imag1
,
319 NULL_RTX
, unsignedp
, methods
);
321 if (temp1
== 0 || temp2
== 0)
324 real_t
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
325 NULL_RTX
, unsignedp
, methods
);
327 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, real1
,
328 NULL_RTX
, unsignedp
, methods
);
330 temp2
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
331 NULL_RTX
, unsignedp
, methods
);
333 if (temp1
== 0 || temp2
== 0)
336 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, temp2
,
337 NULL_RTX
, unsignedp
, methods
);
339 if (real_t
== 0 || imag_t
== 0)
343 if (class == MODE_COMPLEX_FLOAT
)
344 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
345 realr
, unsignedp
, methods
);
347 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
348 real_t
, divisor
, realr
, unsignedp
);
354 emit_move_insn (realr
, res
);
356 if (class == MODE_COMPLEX_FLOAT
)
357 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
358 imagr
, unsignedp
, methods
);
360 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
361 imag_t
, divisor
, imagr
, unsignedp
);
367 emit_move_insn (imagr
, res
);
372 /* Generate code to perform a wide-input-range-acceptable complex divide. */
375 expand_cmplxdiv_wide (rtx real0
, rtx real1
, rtx imag0
, rtx imag1
, rtx realr
,
376 rtx imagr
, enum machine_mode submode
, int unsignedp
,
377 enum optab_methods methods
, enum mode_class
class,
382 rtx temp1
, temp2
, lab1
, lab2
;
383 enum machine_mode mode
;
385 optab this_add_optab
= add_optab
;
386 optab this_sub_optab
= sub_optab
;
387 optab this_neg_optab
= neg_optab
;
388 optab this_mul_optab
= smul_optab
;
390 if (binoptab
== sdivv_optab
)
392 this_add_optab
= addv_optab
;
393 this_sub_optab
= subv_optab
;
394 this_neg_optab
= negv_optab
;
395 this_mul_optab
= smulv_optab
;
398 /* Don't fetch these from memory more than once. */
399 real0
= force_reg (submode
, real0
);
400 real1
= force_reg (submode
, real1
);
403 imag0
= force_reg (submode
, imag0
);
405 imag1
= force_reg (submode
, imag1
);
407 /* XXX What's an "unsigned" complex number? */
415 temp1
= expand_abs (submode
, real1
, NULL_RTX
, unsignedp
, 1);
416 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, unsignedp
, 1);
419 if (temp1
== 0 || temp2
== 0)
422 mode
= GET_MODE (temp1
);
423 lab1
= gen_label_rtx ();
424 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
425 mode
, unsignedp
, lab1
);
427 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
429 if (class == MODE_COMPLEX_FLOAT
)
430 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
431 NULL_RTX
, unsignedp
, methods
);
433 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
434 imag1
, real1
, NULL_RTX
, unsignedp
);
439 /* Calculate divisor. */
441 temp1
= expand_binop (submode
, this_mul_optab
, imag1
, ratio
,
442 NULL_RTX
, unsignedp
, methods
);
447 divisor
= expand_binop (submode
, this_add_optab
, temp1
, real1
,
448 NULL_RTX
, unsignedp
, methods
);
453 /* Calculate dividend. */
459 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
461 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
462 NULL_RTX
, unsignedp
, methods
);
467 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
468 NULL_RTX
, unsignedp
);
470 if (real_t
== 0 || imag_t
== 0)
475 /* Compute (a+ib)/(c+id) as
476 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
478 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
479 NULL_RTX
, unsignedp
, methods
);
484 real_t
= expand_binop (submode
, this_add_optab
, temp1
, real0
,
485 NULL_RTX
, unsignedp
, methods
);
487 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
488 NULL_RTX
, unsignedp
, methods
);
493 imag_t
= expand_binop (submode
, this_sub_optab
, imag0
, temp1
,
494 NULL_RTX
, unsignedp
, methods
);
496 if (real_t
== 0 || imag_t
== 0)
500 if (class == MODE_COMPLEX_FLOAT
)
501 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
502 realr
, unsignedp
, methods
);
504 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
505 real_t
, divisor
, realr
, unsignedp
);
511 emit_move_insn (realr
, res
);
513 if (class == MODE_COMPLEX_FLOAT
)
514 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
515 imagr
, unsignedp
, methods
);
517 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
518 imag_t
, divisor
, imagr
, unsignedp
);
524 emit_move_insn (imagr
, res
);
526 lab2
= gen_label_rtx ();
527 emit_jump_insn (gen_jump (lab2
));
532 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
534 if (class == MODE_COMPLEX_FLOAT
)
535 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
536 NULL_RTX
, unsignedp
, methods
);
538 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
539 real1
, imag1
, NULL_RTX
, unsignedp
);
544 /* Calculate divisor. */
546 temp1
= expand_binop (submode
, this_mul_optab
, real1
, ratio
,
547 NULL_RTX
, unsignedp
, methods
);
552 divisor
= expand_binop (submode
, this_add_optab
, temp1
, imag1
,
553 NULL_RTX
, unsignedp
, methods
);
558 /* Calculate dividend. */
562 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
564 real_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
565 NULL_RTX
, unsignedp
, methods
);
567 imag_t
= expand_unop (submode
, this_neg_optab
, real0
,
568 NULL_RTX
, unsignedp
);
570 if (real_t
== 0 || imag_t
== 0)
575 /* Compute (a+ib)/(c+id) as
576 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
578 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
579 NULL_RTX
, unsignedp
, methods
);
584 real_t
= expand_binop (submode
, this_add_optab
, temp1
, imag0
,
585 NULL_RTX
, unsignedp
, methods
);
587 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
588 NULL_RTX
, unsignedp
, methods
);
593 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, real0
,
594 NULL_RTX
, unsignedp
, methods
);
596 if (real_t
== 0 || imag_t
== 0)
600 if (class == MODE_COMPLEX_FLOAT
)
601 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
602 realr
, unsignedp
, methods
);
604 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
605 real_t
, divisor
, realr
, unsignedp
);
611 emit_move_insn (realr
, res
);
613 if (class == MODE_COMPLEX_FLOAT
)
614 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
615 imagr
, unsignedp
, methods
);
617 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
618 imag_t
, divisor
, imagr
, unsignedp
);
624 emit_move_insn (imagr
, res
);
631 /* Wrapper around expand_binop which takes an rtx code to specify
632 the operation to perform, not an optab pointer. All other
633 arguments are the same. */
635 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
636 rtx op1
, rtx target
, int unsignedp
,
637 enum optab_methods methods
)
639 optab binop
= code_to_optab
[(int) code
];
643 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
646 /* Generate code to perform an operation specified by BINOPTAB
647 on operands OP0 and OP1, with result having machine-mode MODE.
649 UNSIGNEDP is for the case where we have to widen the operands
650 to perform the operation. It says to use zero-extension.
652 If TARGET is nonzero, the value
653 is generated there, if it is convenient to do so.
654 In all cases an rtx is returned for the locus of the value;
655 this may or may not be TARGET. */
658 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
659 rtx target
, int unsignedp
, enum optab_methods methods
)
661 enum optab_methods next_methods
662 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
663 ? OPTAB_WIDEN
: methods
);
664 enum mode_class
class;
665 enum machine_mode wider_mode
;
667 int commutative_op
= 0;
668 int shift_op
= (binoptab
->code
== ASHIFT
669 || binoptab
->code
== ASHIFTRT
670 || binoptab
->code
== LSHIFTRT
671 || binoptab
->code
== ROTATE
672 || binoptab
->code
== ROTATERT
);
673 rtx entry_last
= get_last_insn ();
676 class = GET_MODE_CLASS (mode
);
678 op0
= protect_from_queue (op0
, 0);
679 op1
= protect_from_queue (op1
, 0);
681 target
= protect_from_queue (target
, 1);
685 /* Load duplicate non-volatile operands once. */
686 if (rtx_equal_p (op0
, op1
) && ! volatile_refs_p (op0
))
688 op0
= force_not_mem (op0
);
693 op0
= force_not_mem (op0
);
694 op1
= force_not_mem (op1
);
698 /* If subtracting an integer constant, convert this into an addition of
699 the negated constant. */
701 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
703 op1
= negate_rtx (mode
, op1
);
704 binoptab
= add_optab
;
707 /* If we are inside an appropriately-short loop and one operand is an
708 expensive constant, force it into a register. */
709 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
710 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
711 op0
= force_reg (mode
, op0
);
713 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
714 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
715 op1
= force_reg (mode
, op1
);
717 /* Record where to delete back to if we backtrack. */
718 last
= get_last_insn ();
720 /* If operation is commutative,
721 try to make the first operand a register.
722 Even better, try to make it the same as the target.
723 Also try to make the last operand a constant. */
724 if (GET_RTX_CLASS (binoptab
->code
) == RTX_COMM_ARITH
725 || binoptab
== smul_widen_optab
726 || binoptab
== umul_widen_optab
727 || binoptab
== smul_highpart_optab
728 || binoptab
== umul_highpart_optab
)
732 if (((target
== 0 || GET_CODE (target
) == REG
)
733 ? ((GET_CODE (op1
) == REG
734 && GET_CODE (op0
) != REG
)
736 : rtx_equal_p (op1
, target
))
737 || GET_CODE (op0
) == CONST_INT
)
745 /* If we can do it with a three-operand insn, do so. */
747 if (methods
!= OPTAB_MUST_WIDEN
748 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
750 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
751 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
752 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
754 rtx xop0
= op0
, xop1
= op1
;
759 temp
= gen_reg_rtx (mode
);
761 /* If it is a commutative operator and the modes would match
762 if we would swap the operands, we can save the conversions. */
765 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
766 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
770 tmp
= op0
; op0
= op1
; op1
= tmp
;
771 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
775 /* In case the insn wants input operands in modes different from
776 those of the actual operands, convert the operands. It would
777 seem that we don't need to convert CONST_INTs, but we do, so
778 that they're properly zero-extended, sign-extended or truncated
781 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
782 xop0
= convert_modes (mode0
,
783 GET_MODE (op0
) != VOIDmode
788 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
789 xop1
= convert_modes (mode1
,
790 GET_MODE (op1
) != VOIDmode
795 /* Now, if insn's predicates don't allow our operands, put them into
798 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
799 && mode0
!= VOIDmode
)
800 xop0
= copy_to_mode_reg (mode0
, xop0
);
802 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
803 && mode1
!= VOIDmode
)
804 xop1
= copy_to_mode_reg (mode1
, xop1
);
806 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
807 temp
= gen_reg_rtx (mode
);
809 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
812 /* If PAT is composed of more than one insn, try to add an appropriate
813 REG_EQUAL note to it. If we can't because TEMP conflicts with an
814 operand, call ourselves again, this time without a target. */
815 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
816 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
818 delete_insns_since (last
);
819 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
827 delete_insns_since (last
);
830 /* If this is a multiply, see if we can do a widening operation that
831 takes operands of this mode and makes a wider mode. */
833 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
834 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
835 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
836 != CODE_FOR_nothing
))
838 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
839 unsignedp
? umul_widen_optab
: smul_widen_optab
,
840 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
844 if (GET_MODE_CLASS (mode
) == MODE_INT
)
845 return gen_lowpart (mode
, temp
);
847 return convert_to_mode (mode
, temp
, unsignedp
);
851 /* Look for a wider mode of the same class for which we think we
852 can open-code the operation. Check for a widening multiply at the
853 wider mode as well. */
855 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
856 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
857 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
858 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
860 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
861 || (binoptab
== smul_optab
862 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
863 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
864 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
865 != CODE_FOR_nothing
)))
867 rtx xop0
= op0
, xop1
= op1
;
870 /* For certain integer operations, we need not actually extend
871 the narrow operands, as long as we will truncate
872 the results to the same narrowness. */
874 if ((binoptab
== ior_optab
|| binoptab
== and_optab
875 || binoptab
== xor_optab
876 || binoptab
== add_optab
|| binoptab
== sub_optab
877 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
878 && class == MODE_INT
)
881 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
883 /* The second operand of a shift must always be extended. */
884 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
885 no_extend
&& binoptab
!= ashl_optab
);
887 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
888 unsignedp
, OPTAB_DIRECT
);
891 if (class != MODE_INT
)
894 target
= gen_reg_rtx (mode
);
895 convert_move (target
, temp
, 0);
899 return gen_lowpart (mode
, temp
);
902 delete_insns_since (last
);
906 /* These can be done a word at a time. */
907 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
909 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
910 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
916 /* If TARGET is the same as one of the operands, the REG_EQUAL note
917 won't be accurate, so use a new target. */
918 if (target
== 0 || target
== op0
|| target
== op1
)
919 target
= gen_reg_rtx (mode
);
923 /* Do the actual arithmetic. */
924 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
926 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
927 rtx x
= expand_binop (word_mode
, binoptab
,
928 operand_subword_force (op0
, i
, mode
),
929 operand_subword_force (op1
, i
, mode
),
930 target_piece
, unsignedp
, next_methods
);
935 if (target_piece
!= x
)
936 emit_move_insn (target_piece
, x
);
939 insns
= get_insns ();
942 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
944 if (binoptab
->code
!= UNKNOWN
)
946 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
947 copy_rtx (op0
), copy_rtx (op1
));
951 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
956 /* Synthesize double word shifts from single word shifts. */
957 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
958 || binoptab
== ashr_optab
)
960 && GET_CODE (op1
) == CONST_INT
961 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
962 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
963 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
964 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
966 rtx insns
, inter
, equiv_value
;
967 rtx into_target
, outof_target
;
968 rtx into_input
, outof_input
;
969 int shift_count
, left_shift
, outof_word
;
971 /* If TARGET is the same as one of the operands, the REG_EQUAL note
972 won't be accurate, so use a new target. */
973 if (target
== 0 || target
== op0
|| target
== op1
)
974 target
= gen_reg_rtx (mode
);
978 shift_count
= INTVAL (op1
);
980 /* OUTOF_* is the word we are shifting bits away from, and
981 INTO_* is the word that we are shifting bits towards, thus
982 they differ depending on the direction of the shift and
985 left_shift
= binoptab
== ashl_optab
;
986 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
988 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
989 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
991 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
992 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
994 if (shift_count
>= BITS_PER_WORD
)
996 inter
= expand_binop (word_mode
, binoptab
,
998 GEN_INT (shift_count
- BITS_PER_WORD
),
999 into_target
, unsignedp
, next_methods
);
1001 if (inter
!= 0 && inter
!= into_target
)
1002 emit_move_insn (into_target
, inter
);
1004 /* For a signed right shift, we must fill the word we are shifting
1005 out of with copies of the sign bit. Otherwise it is zeroed. */
1006 if (inter
!= 0 && binoptab
!= ashr_optab
)
1007 inter
= CONST0_RTX (word_mode
);
1008 else if (inter
!= 0)
1009 inter
= expand_binop (word_mode
, binoptab
,
1011 GEN_INT (BITS_PER_WORD
- 1),
1012 outof_target
, unsignedp
, next_methods
);
1014 if (inter
!= 0 && inter
!= outof_target
)
1015 emit_move_insn (outof_target
, inter
);
1020 optab reverse_unsigned_shift
, unsigned_shift
;
1022 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1023 we must do a logical shift in the opposite direction of the
1026 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
1028 /* For a shift of less than BITS_PER_WORD, to compute the word
1029 shifted towards, we need to unsigned shift the orig value of
1032 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
1034 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
1036 GEN_INT (BITS_PER_WORD
- shift_count
),
1037 0, unsignedp
, next_methods
);
1042 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
1043 op1
, 0, unsignedp
, next_methods
);
1046 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
1047 into_target
, unsignedp
, next_methods
);
1049 if (inter
!= 0 && inter
!= into_target
)
1050 emit_move_insn (into_target
, inter
);
1053 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
1054 op1
, outof_target
, unsignedp
, next_methods
);
1056 if (inter
!= 0 && inter
!= outof_target
)
1057 emit_move_insn (outof_target
, inter
);
1060 insns
= get_insns ();
1065 if (binoptab
->code
!= UNKNOWN
)
1066 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1070 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1075 /* Synthesize double word rotates from single word shifts. */
1076 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1077 && class == MODE_INT
1078 && GET_CODE (op1
) == CONST_INT
1079 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1080 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1081 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1083 rtx insns
, equiv_value
;
1084 rtx into_target
, outof_target
;
1085 rtx into_input
, outof_input
;
1087 int shift_count
, left_shift
, outof_word
;
1089 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1090 won't be accurate, so use a new target. Do this also if target is not
1091 a REG, first because having a register instead may open optimization
1092 opportunities, and second because if target and op0 happen to be MEMs
1093 designating the same location, we would risk clobbering it too early
1094 in the code sequence we generate below. */
1095 if (target
== 0 || target
== op0
|| target
== op1
|| ! REG_P (target
))
1096 target
= gen_reg_rtx (mode
);
1100 shift_count
= INTVAL (op1
);
1102 /* OUTOF_* is the word we are shifting bits away from, and
1103 INTO_* is the word that we are shifting bits towards, thus
1104 they differ depending on the direction of the shift and
1105 WORDS_BIG_ENDIAN. */
1107 left_shift
= (binoptab
== rotl_optab
);
1108 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1110 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1111 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1113 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1114 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1116 if (shift_count
== BITS_PER_WORD
)
1118 /* This is just a word swap. */
1119 emit_move_insn (outof_target
, into_input
);
1120 emit_move_insn (into_target
, outof_input
);
1125 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1126 rtx first_shift_count
, second_shift_count
;
1127 optab reverse_unsigned_shift
, unsigned_shift
;
1129 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1130 ? lshr_optab
: ashl_optab
);
1132 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1133 ? ashl_optab
: lshr_optab
);
1135 if (shift_count
> BITS_PER_WORD
)
1137 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1138 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1142 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1143 second_shift_count
= GEN_INT (shift_count
);
1146 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1147 outof_input
, first_shift_count
,
1148 NULL_RTX
, unsignedp
, next_methods
);
1149 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1150 into_input
, second_shift_count
,
1151 NULL_RTX
, unsignedp
, next_methods
);
1153 if (into_temp1
!= 0 && into_temp2
!= 0)
1154 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1155 into_target
, unsignedp
, next_methods
);
1159 if (inter
!= 0 && inter
!= into_target
)
1160 emit_move_insn (into_target
, inter
);
1162 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1163 into_input
, first_shift_count
,
1164 NULL_RTX
, unsignedp
, next_methods
);
1165 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1166 outof_input
, second_shift_count
,
1167 NULL_RTX
, unsignedp
, next_methods
);
1169 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1170 inter
= expand_binop (word_mode
, ior_optab
,
1171 outof_temp1
, outof_temp2
,
1172 outof_target
, unsignedp
, next_methods
);
1174 if (inter
!= 0 && inter
!= outof_target
)
1175 emit_move_insn (outof_target
, inter
);
1178 insns
= get_insns ();
1183 if (binoptab
->code
!= UNKNOWN
)
1184 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1188 /* We can't make this a no conflict block if this is a word swap,
1189 because the word swap case fails if the input and output values
1190 are in the same register. */
1191 if (shift_count
!= BITS_PER_WORD
)
1192 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1201 /* These can be done a word at a time by propagating carries. */
1202 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1203 && class == MODE_INT
1204 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1205 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1208 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1209 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1210 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1211 rtx xop0
, xop1
, xtarget
;
1213 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1214 value is one of those, use it. Otherwise, use 1 since it is the
1215 one easiest to get. */
1216 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1217 int normalizep
= STORE_FLAG_VALUE
;
1222 /* Prepare the operands. */
1223 xop0
= force_reg (mode
, op0
);
1224 xop1
= force_reg (mode
, op1
);
1226 xtarget
= gen_reg_rtx (mode
);
1228 if (target
== 0 || GET_CODE (target
) != REG
)
1231 /* Indicate for flow that the entire target reg is being set. */
1232 if (GET_CODE (target
) == REG
)
1233 emit_insn (gen_rtx_CLOBBER (VOIDmode
, xtarget
));
1235 /* Do the actual arithmetic. */
1236 for (i
= 0; i
< nwords
; i
++)
1238 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1239 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1240 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1241 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1244 /* Main add/subtract of the input operands. */
1245 x
= expand_binop (word_mode
, binoptab
,
1246 op0_piece
, op1_piece
,
1247 target_piece
, unsignedp
, next_methods
);
1253 /* Store carry from main add/subtract. */
1254 carry_out
= gen_reg_rtx (word_mode
);
1255 carry_out
= emit_store_flag_force (carry_out
,
1256 (binoptab
== add_optab
1259 word_mode
, 1, normalizep
);
1266 /* Add/subtract previous carry to main result. */
1267 newx
= expand_binop (word_mode
,
1268 normalizep
== 1 ? binoptab
: otheroptab
,
1270 NULL_RTX
, 1, next_methods
);
1274 /* Get out carry from adding/subtracting carry in. */
1275 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1276 carry_tmp
= emit_store_flag_force (carry_tmp
,
1277 (binoptab
== add_optab
1280 word_mode
, 1, normalizep
);
1282 /* Logical-ior the two poss. carry together. */
1283 carry_out
= expand_binop (word_mode
, ior_optab
,
1284 carry_out
, carry_tmp
,
1285 carry_out
, 0, next_methods
);
1289 emit_move_insn (target_piece
, newx
);
1292 carry_in
= carry_out
;
1295 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
1297 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
1298 || ! rtx_equal_p (target
, xtarget
))
1300 rtx temp
= emit_move_insn (target
, xtarget
);
1302 set_unique_reg_note (temp
,
1304 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1315 delete_insns_since (last
);
1318 /* If we want to multiply two two-word values and have normal and widening
1319 multiplies of single-word values, we can do this with three smaller
1320 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1321 because we are not operating on one word at a time.
1323 The multiplication proceeds as follows:
1324 _______________________
1325 [__op0_high_|__op0_low__]
1326 _______________________
1327 * [__op1_high_|__op1_low__]
1328 _______________________________________________
1329 _______________________
1330 (1) [__op0_low__*__op1_low__]
1331 _______________________
1332 (2a) [__op0_low__*__op1_high_]
1333 _______________________
1334 (2b) [__op0_high_*__op1_low__]
1335 _______________________
1336 (3) [__op0_high_*__op1_high_]
1339 This gives a 4-word result. Since we are only interested in the
1340 lower 2 words, partial result (3) and the upper words of (2a) and
1341 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1342 calculated using non-widening multiplication.
1344 (1), however, needs to be calculated with an unsigned widening
1345 multiplication. If this operation is not directly supported we
1346 try using a signed widening multiplication and adjust the result.
1347 This adjustment works as follows:
1349 If both operands are positive then no adjustment is needed.
1351 If the operands have different signs, for example op0_low < 0 and
1352 op1_low >= 0, the instruction treats the most significant bit of
1353 op0_low as a sign bit instead of a bit with significance
1354 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1355 with 2**BITS_PER_WORD - op0_low, and two's complements the
1356 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1359 Similarly, if both operands are negative, we need to add
1360 (op0_low + op1_low) * 2**BITS_PER_WORD.
1362 We use a trick to adjust quickly. We logically shift op0_low right
1363 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1364 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1365 logical shift exists, we do an arithmetic right shift and subtract
1368 if (binoptab
== smul_optab
1369 && class == MODE_INT
1370 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1371 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1372 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1373 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1374 != CODE_FOR_nothing
)
1375 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1376 != CODE_FOR_nothing
)))
1378 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1379 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1380 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1381 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1382 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1383 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1385 rtx op0_xhigh
= NULL_RTX
;
1386 rtx op1_xhigh
= NULL_RTX
;
1388 /* If the target is the same as one of the inputs, don't use it. This
1389 prevents problems with the REG_EQUAL note. */
1390 if (target
== op0
|| target
== op1
1391 || (target
!= 0 && GET_CODE (target
) != REG
))
1394 /* Multiply the two lower words to get a double-word product.
1395 If unsigned widening multiplication is available, use that;
1396 otherwise use the signed form and compensate. */
1398 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1400 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1401 target
, 1, OPTAB_DIRECT
);
1403 /* If we didn't succeed, delete everything we did so far. */
1405 delete_insns_since (last
);
1407 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1411 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1412 != CODE_FOR_nothing
)
1414 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1415 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1416 target
, 1, OPTAB_DIRECT
);
1417 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1418 NULL_RTX
, 1, next_methods
);
1420 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1421 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1424 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1425 NULL_RTX
, 0, next_methods
);
1427 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1428 op0_xhigh
, op0_xhigh
, 0,
1432 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1433 NULL_RTX
, 1, next_methods
);
1435 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1436 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1439 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1440 NULL_RTX
, 0, next_methods
);
1442 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1443 op1_xhigh
, op1_xhigh
, 0,
1448 /* If we have been able to directly compute the product of the
1449 low-order words of the operands and perform any required adjustments
1450 of the operands, we proceed by trying two more multiplications
1451 and then computing the appropriate sum.
1453 We have checked above that the required addition is provided.
1454 Full-word addition will normally always succeed, especially if
1455 it is provided at all, so we don't worry about its failure. The
1456 multiplication may well fail, however, so we do handle that. */
1458 if (product
&& op0_xhigh
&& op1_xhigh
)
1460 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1461 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1462 NULL_RTX
, 0, OPTAB_DIRECT
);
1464 if (!REG_P (product_high
))
1465 product_high
= force_reg (word_mode
, product_high
);
1468 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1469 product_high
, 0, next_methods
);
1471 if (temp
!= 0 && temp
!= product_high
)
1472 emit_move_insn (product_high
, temp
);
1475 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1476 NULL_RTX
, 0, OPTAB_DIRECT
);
1479 temp
= expand_binop (word_mode
, add_optab
, temp
,
1480 product_high
, product_high
,
1483 if (temp
!= 0 && temp
!= product_high
)
1484 emit_move_insn (product_high
, temp
);
1486 emit_move_insn (operand_subword (product
, high
, 1, mode
), product_high
);
1490 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1492 temp
= emit_move_insn (product
, product
);
1493 set_unique_reg_note (temp
,
1495 gen_rtx_fmt_ee (MULT
, mode
,
1504 /* If we get here, we couldn't do it for some reason even though we
1505 originally thought we could. Delete anything we've emitted in
1508 delete_insns_since (last
);
1511 /* Open-code the vector operations if we have no hardware support
1513 if (class == MODE_VECTOR_INT
|| class == MODE_VECTOR_FLOAT
)
1514 return expand_vector_binop (mode
, binoptab
, op0
, op1
, target
,
1515 unsignedp
, methods
);
1517 /* We need to open-code the complex type operations: '+, -, * and /' */
1519 /* At this point we allow operations between two similar complex
1520 numbers, and also if one of the operands is not a complex number
1521 but rather of MODE_FLOAT or MODE_INT. However, the caller
1522 must make sure that the MODE of the non-complex operand matches
1523 the SUBMODE of the complex operand. */
1525 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1527 rtx real0
= 0, imag0
= 0;
1528 rtx real1
= 0, imag1
= 0;
1529 rtx realr
, imagr
, res
;
1533 /* Find the correct mode for the real and imaginary parts. */
1534 enum machine_mode submode
= GET_MODE_INNER (mode
);
1536 if (submode
== BLKmode
)
1541 if (GET_MODE (op0
) == mode
)
1543 real0
= gen_realpart (submode
, op0
);
1544 imag0
= gen_imagpart (submode
, op0
);
1549 if (GET_MODE (op1
) == mode
)
1551 real1
= gen_realpart (submode
, op1
);
1552 imag1
= gen_imagpart (submode
, op1
);
1557 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0 || imag1
!= 0))
1560 result
= gen_reg_rtx (mode
);
1561 realr
= gen_realpart (submode
, result
);
1562 imagr
= gen_imagpart (submode
, result
);
1564 switch (binoptab
->code
)
1567 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1569 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1570 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1571 realr
, unsignedp
, methods
);
1575 else if (res
!= realr
)
1576 emit_move_insn (realr
, res
);
1578 if (imag0
!= 0 && imag1
!= 0)
1579 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1580 imagr
, unsignedp
, methods
);
1581 else if (imag0
!= 0)
1583 else if (binoptab
->code
== MINUS
)
1584 res
= expand_unop (submode
,
1585 binoptab
== subv_optab
? negv_optab
: neg_optab
,
1586 imag1
, imagr
, unsignedp
);
1592 else if (res
!= imagr
)
1593 emit_move_insn (imagr
, res
);
1599 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1601 if (imag0
!= 0 && imag1
!= 0)
1605 /* Don't fetch these from memory more than once. */
1606 real0
= force_reg (submode
, real0
);
1607 real1
= force_reg (submode
, real1
);
1608 imag0
= force_reg (submode
, imag0
);
1609 imag1
= force_reg (submode
, imag1
);
1611 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1612 unsignedp
, methods
);
1614 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1615 unsignedp
, methods
);
1617 if (temp1
== 0 || temp2
== 0)
1622 binoptab
== smulv_optab
? subv_optab
: sub_optab
,
1623 temp1
, temp2
, realr
, unsignedp
, methods
));
1627 else if (res
!= realr
)
1628 emit_move_insn (realr
, res
);
1630 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1631 NULL_RTX
, unsignedp
, methods
);
1633 /* Avoid expanding redundant multiplication for the common
1634 case of squaring a complex number. */
1635 if (rtx_equal_p (real0
, real1
) && rtx_equal_p (imag0
, imag1
))
1638 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1639 NULL_RTX
, unsignedp
, methods
);
1641 if (temp1
== 0 || temp2
== 0)
1646 binoptab
== smulv_optab
? addv_optab
: add_optab
,
1647 temp1
, temp2
, imagr
, unsignedp
, methods
));
1651 else if (res
!= imagr
)
1652 emit_move_insn (imagr
, res
);
1658 /* Don't fetch these from memory more than once. */
1659 real0
= force_reg (submode
, real0
);
1660 real1
= force_reg (submode
, real1
);
1662 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1663 realr
, unsignedp
, methods
);
1666 else if (res
!= realr
)
1667 emit_move_insn (realr
, res
);
1670 res
= expand_binop (submode
, binoptab
,
1671 real1
, imag0
, imagr
, unsignedp
, methods
);
1673 res
= expand_binop (submode
, binoptab
,
1674 real0
, imag1
, imagr
, unsignedp
, methods
);
1678 else if (res
!= imagr
)
1679 emit_move_insn (imagr
, res
);
1686 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1690 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1692 /* Don't fetch these from memory more than once. */
1693 real1
= force_reg (submode
, real1
);
1695 /* Simply divide the real and imaginary parts by `c' */
1696 if (class == MODE_COMPLEX_FLOAT
)
1697 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1698 realr
, unsignedp
, methods
);
1700 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1701 real0
, real1
, realr
, unsignedp
);
1705 else if (res
!= realr
)
1706 emit_move_insn (realr
, res
);
1708 if (class == MODE_COMPLEX_FLOAT
)
1709 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1710 imagr
, unsignedp
, methods
);
1712 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1713 imag0
, real1
, imagr
, unsignedp
);
1717 else if (res
!= imagr
)
1718 emit_move_insn (imagr
, res
);
1724 switch (flag_complex_divide_method
)
1727 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1728 realr
, imagr
, submode
,
1734 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1735 realr
, imagr
, submode
,
1755 rtx equiv
= gen_rtx_fmt_ee (binoptab
->code
, mode
,
1756 copy_rtx (op0
), copy_rtx (op1
));
1757 emit_no_conflict_block (seq
, result
, op0
, op1
, equiv
);
1762 /* It can't be open-coded in this mode.
1763 Use a library call if one is available and caller says that's ok. */
1765 if (binoptab
->handlers
[(int) mode
].libfunc
1766 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1770 enum machine_mode op1_mode
= mode
;
1777 op1_mode
= word_mode
;
1778 /* Specify unsigned here,
1779 since negative shift counts are meaningless. */
1780 op1x
= convert_to_mode (word_mode
, op1
, 1);
1783 if (GET_MODE (op0
) != VOIDmode
1784 && GET_MODE (op0
) != mode
)
1785 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1787 /* Pass 1 for NO_QUEUE so we don't lose any increments
1788 if the libcall is cse'd or moved. */
1789 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1790 NULL_RTX
, LCT_CONST
, mode
, 2,
1791 op0
, mode
, op1x
, op1_mode
);
1793 insns
= get_insns ();
1796 target
= gen_reg_rtx (mode
);
1797 emit_libcall_block (insns
, target
, value
,
1798 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1803 delete_insns_since (last
);
1805 /* It can't be done in this mode. Can we do it in a wider mode? */
1807 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1808 || methods
== OPTAB_MUST_WIDEN
))
1810 /* Caller says, don't even try. */
1811 delete_insns_since (entry_last
);
1815 /* Compute the value of METHODS to pass to recursive calls.
1816 Don't allow widening to be tried recursively. */
1818 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1820 /* Look for a wider mode of the same class for which it appears we can do
1823 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1825 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1826 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1828 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1829 != CODE_FOR_nothing
)
1830 || (methods
== OPTAB_LIB
1831 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1833 rtx xop0
= op0
, xop1
= op1
;
1836 /* For certain integer operations, we need not actually extend
1837 the narrow operands, as long as we will truncate
1838 the results to the same narrowness. */
1840 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1841 || binoptab
== xor_optab
1842 || binoptab
== add_optab
|| binoptab
== sub_optab
1843 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1844 && class == MODE_INT
)
1847 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1848 unsignedp
, no_extend
);
1850 /* The second operand of a shift must always be extended. */
1851 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1852 no_extend
&& binoptab
!= ashl_optab
);
1854 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1855 unsignedp
, methods
);
1858 if (class != MODE_INT
)
1861 target
= gen_reg_rtx (mode
);
1862 convert_move (target
, temp
, 0);
1866 return gen_lowpart (mode
, temp
);
1869 delete_insns_since (last
);
1874 delete_insns_since (entry_last
);
1878 /* Like expand_binop, but for open-coding vectors binops. */
1881 expand_vector_binop (enum machine_mode mode
, optab binoptab
, rtx op0
,
1882 rtx op1
, rtx target
, int unsignedp
,
1883 enum optab_methods methods
)
1885 enum machine_mode submode
, tmode
;
1886 int size
, elts
, subsize
, subbitsize
, i
;
1887 rtx t
, a
, b
, res
, seq
;
1888 enum mode_class
class;
1890 class = GET_MODE_CLASS (mode
);
1892 size
= GET_MODE_SIZE (mode
);
1893 submode
= GET_MODE_INNER (mode
);
1895 /* Search for the widest vector mode with the same inner mode that is
1896 still narrower than MODE and that allows to open-code this operator.
1897 Note, if we find such a mode and the handler later decides it can't
1898 do the expansion, we'll be called recursively with the narrower mode. */
1899 for (tmode
= GET_CLASS_NARROWEST_MODE (class);
1900 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
1901 tmode
= GET_MODE_WIDER_MODE (tmode
))
1903 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
1904 && binoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
1908 switch (binoptab
->code
)
1913 tmode
= int_mode_for_mode (mode
);
1914 if (tmode
!= BLKmode
)
1920 subsize
= GET_MODE_SIZE (submode
);
1921 subbitsize
= GET_MODE_BITSIZE (submode
);
1922 elts
= size
/ subsize
;
1924 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1925 but that we operate on more than one element at a time. */
1926 if (subsize
== GET_MODE_UNIT_SIZE (mode
) && methods
== OPTAB_DIRECT
)
1931 /* Errors can leave us with a const0_rtx as operand. */
1932 if (GET_MODE (op0
) != mode
)
1933 op0
= copy_to_mode_reg (mode
, op0
);
1934 if (GET_MODE (op1
) != mode
)
1935 op1
= copy_to_mode_reg (mode
, op1
);
1938 target
= gen_reg_rtx (mode
);
1940 for (i
= 0; i
< elts
; ++i
)
1942 /* If this is part of a register, and not the first item in the
1943 word, we can't store using a SUBREG - that would clobber
1945 And storing with a SUBREG is only possible for the least
1946 significant part, hence we can't do it for big endian
1947 (unless we want to permute the evaluation order. */
1948 if (GET_CODE (target
) == REG
1949 && (BYTES_BIG_ENDIAN
1950 ? subsize
< UNITS_PER_WORD
1951 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
1954 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
1955 if (CONSTANT_P (op0
))
1956 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
1958 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
1959 NULL_RTX
, submode
, submode
, size
);
1960 if (CONSTANT_P (op1
))
1961 b
= simplify_gen_subreg (submode
, op1
, mode
, i
* subsize
);
1963 b
= extract_bit_field (op1
, subbitsize
, i
* subbitsize
, unsignedp
,
1964 NULL_RTX
, submode
, submode
, size
);
1966 if (binoptab
->code
== DIV
)
1968 if (class == MODE_VECTOR_FLOAT
)
1969 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1970 unsignedp
, methods
);
1972 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1973 a
, b
, t
, unsignedp
);
1976 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1977 unsignedp
, methods
);
1983 emit_move_insn (t
, res
);
1985 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2001 /* Like expand_unop but for open-coding vector unops. */
2004 expand_vector_unop (enum machine_mode mode
, optab unoptab
, rtx op0
,
2005 rtx target
, int unsignedp
)
2007 enum machine_mode submode
, tmode
;
2008 int size
, elts
, subsize
, subbitsize
, i
;
2011 size
= GET_MODE_SIZE (mode
);
2012 submode
= GET_MODE_INNER (mode
);
2014 /* Search for the widest vector mode with the same inner mode that is
2015 still narrower than MODE and that allows to open-code this operator.
2016 Note, if we find such a mode and the handler later decides it can't
2017 do the expansion, we'll be called recursively with the narrower mode. */
2018 for (tmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode
));
2019 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
2020 tmode
= GET_MODE_WIDER_MODE (tmode
))
2022 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
2023 && unoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
2026 /* If there is no negate operation, try doing a subtract from zero. */
2027 if (unoptab
== neg_optab
&& GET_MODE_CLASS (submode
) == MODE_INT
2028 /* Avoid infinite recursion when an
2029 error has left us with the wrong mode. */
2030 && GET_MODE (op0
) == mode
)
2033 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2034 target
, unsignedp
, OPTAB_DIRECT
);
2039 if (unoptab
== one_cmpl_optab
)
2041 tmode
= int_mode_for_mode (mode
);
2042 if (tmode
!= BLKmode
)
2046 subsize
= GET_MODE_SIZE (submode
);
2047 subbitsize
= GET_MODE_BITSIZE (submode
);
2048 elts
= size
/ subsize
;
2050 /* Errors can leave us with a const0_rtx as operand. */
2051 if (GET_MODE (op0
) != mode
)
2052 op0
= copy_to_mode_reg (mode
, op0
);
2055 target
= gen_reg_rtx (mode
);
2059 for (i
= 0; i
< elts
; ++i
)
2061 /* If this is part of a register, and not the first item in the
2062 word, we can't store using a SUBREG - that would clobber
2064 And storing with a SUBREG is only possible for the least
2065 significant part, hence we can't do it for big endian
2066 (unless we want to permute the evaluation order. */
2067 if (GET_CODE (target
) == REG
2068 && (BYTES_BIG_ENDIAN
2069 ? subsize
< UNITS_PER_WORD
2070 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
2073 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
2074 if (CONSTANT_P (op0
))
2075 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
2077 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
2078 t
, submode
, submode
, size
);
2080 res
= expand_unop (submode
, unoptab
, a
, t
, unsignedp
);
2083 emit_move_insn (t
, res
);
2085 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2096 /* Expand a binary operator which has both signed and unsigned forms.
2097 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2100 If we widen unsigned operands, we may use a signed wider operation instead
2101 of an unsigned wider operation, since the result would be the same. */
2104 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2105 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2106 enum optab_methods methods
)
2109 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2110 struct optab wide_soptab
;
2112 /* Do it without widening, if possible. */
2113 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2114 unsignedp
, OPTAB_DIRECT
);
2115 if (temp
|| methods
== OPTAB_DIRECT
)
2118 /* Try widening to a signed int. Make a fake signed optab that
2119 hides any signed insn for direct use. */
2120 wide_soptab
= *soptab
;
2121 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
2122 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
2124 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2125 unsignedp
, OPTAB_WIDEN
);
2127 /* For unsigned operands, try widening to an unsigned int. */
2128 if (temp
== 0 && unsignedp
)
2129 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2130 unsignedp
, OPTAB_WIDEN
);
2131 if (temp
|| methods
== OPTAB_WIDEN
)
2134 /* Use the right width lib call if that exists. */
2135 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2136 if (temp
|| methods
== OPTAB_LIB
)
2139 /* Must widen and use a lib call, use either signed or unsigned. */
2140 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2141 unsignedp
, methods
);
2145 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2146 unsignedp
, methods
);
2150 /* Generate code to perform an operation specified by UNOPPTAB
2151 on operand OP0, with two results to TARG0 and TARG1.
2152 We assume that the order of the operands for the instruction
2153 is TARG0, TARG1, OP0.
2155 Either TARG0 or TARG1 may be zero, but what that means is that
2156 the result is not actually wanted. We will generate it into
2157 a dummy pseudo-reg and discard it. They may not both be zero.
2159 Returns 1 if this operation can be performed; 0 if not. */
2162 expand_twoval_unop (optab unoptab
, rtx op0
, rtx targ0
, rtx targ1
,
2165 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2166 enum mode_class
class;
2167 enum machine_mode wider_mode
;
2168 rtx entry_last
= get_last_insn ();
2171 class = GET_MODE_CLASS (mode
);
2173 op0
= protect_from_queue (op0
, 0);
2177 op0
= force_not_mem (op0
);
2181 targ0
= protect_from_queue (targ0
, 1);
2183 targ0
= gen_reg_rtx (mode
);
2185 targ1
= protect_from_queue (targ1
, 1);
2187 targ1
= gen_reg_rtx (mode
);
2189 /* Record where to go back to if we fail. */
2190 last
= get_last_insn ();
2192 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2194 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2195 enum machine_mode mode0
= insn_data
[icode
].operand
[2].mode
;
2199 if (GET_MODE (xop0
) != VOIDmode
2200 && GET_MODE (xop0
) != mode0
)
2201 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2203 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2204 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop0
, mode0
))
2205 xop0
= copy_to_mode_reg (mode0
, xop0
);
2207 /* We could handle this, but we should always be called with a pseudo
2208 for our targets and all insns should take them as outputs. */
2209 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2210 || ! (*insn_data
[icode
].operand
[1].predicate
) (targ1
, mode
))
2213 pat
= GEN_FCN (icode
) (targ0
, targ1
, xop0
);
2220 delete_insns_since (last
);
2223 /* It can't be done in this mode. Can we do it in a wider mode? */
2225 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2227 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2228 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2230 if (unoptab
->handlers
[(int) wider_mode
].insn_code
2231 != CODE_FOR_nothing
)
2233 rtx t0
= gen_reg_rtx (wider_mode
);
2234 rtx t1
= gen_reg_rtx (wider_mode
);
2235 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2237 if (expand_twoval_unop (unoptab
, cop0
, t0
, t1
, unsignedp
))
2239 convert_move (targ0
, t0
, unsignedp
);
2240 convert_move (targ1
, t1
, unsignedp
);
2244 delete_insns_since (last
);
2249 delete_insns_since (entry_last
);
2253 /* Generate code to perform an operation specified by BINOPTAB
2254 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2255 We assume that the order of the operands for the instruction
2256 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2257 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2259 Either TARG0 or TARG1 may be zero, but what that means is that
2260 the result is not actually wanted. We will generate it into
2261 a dummy pseudo-reg and discard it. They may not both be zero.
2263 Returns 1 if this operation can be performed; 0 if not. */
2266 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2269 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2270 enum mode_class
class;
2271 enum machine_mode wider_mode
;
2272 rtx entry_last
= get_last_insn ();
2275 class = GET_MODE_CLASS (mode
);
2277 op0
= protect_from_queue (op0
, 0);
2278 op1
= protect_from_queue (op1
, 0);
2282 op0
= force_not_mem (op0
);
2283 op1
= force_not_mem (op1
);
2286 /* If we are inside an appropriately-short loop and one operand is an
2287 expensive constant, force it into a register. */
2288 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
2289 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
2290 op0
= force_reg (mode
, op0
);
2292 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
2293 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
2294 op1
= force_reg (mode
, op1
);
2297 targ0
= protect_from_queue (targ0
, 1);
2299 targ0
= gen_reg_rtx (mode
);
2301 targ1
= protect_from_queue (targ1
, 1);
2303 targ1
= gen_reg_rtx (mode
);
2305 /* Record where to go back to if we fail. */
2306 last
= get_last_insn ();
2308 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2310 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
2311 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2312 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2314 rtx xop0
= op0
, xop1
= op1
;
2316 /* In case the insn wants input operands in modes different from
2317 those of the actual operands, convert the operands. It would
2318 seem that we don't need to convert CONST_INTs, but we do, so
2319 that they're properly zero-extended, sign-extended or truncated
2322 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2323 xop0
= convert_modes (mode0
,
2324 GET_MODE (op0
) != VOIDmode
2329 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2330 xop1
= convert_modes (mode1
,
2331 GET_MODE (op1
) != VOIDmode
2336 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2337 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2338 xop0
= copy_to_mode_reg (mode0
, xop0
);
2340 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
2341 xop1
= copy_to_mode_reg (mode1
, xop1
);
2343 /* We could handle this, but we should always be called with a pseudo
2344 for our targets and all insns should take them as outputs. */
2345 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2346 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
2349 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2356 delete_insns_since (last
);
2359 /* It can't be done in this mode. Can we do it in a wider mode? */
2361 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2363 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2364 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2366 if (binoptab
->handlers
[(int) wider_mode
].insn_code
2367 != CODE_FOR_nothing
)
2369 rtx t0
= gen_reg_rtx (wider_mode
);
2370 rtx t1
= gen_reg_rtx (wider_mode
);
2371 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2372 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2374 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2377 convert_move (targ0
, t0
, unsignedp
);
2378 convert_move (targ1
, t1
, unsignedp
);
2382 delete_insns_since (last
);
2387 delete_insns_since (entry_last
);
2391 /* Wrapper around expand_unop which takes an rtx code to specify
2392 the operation to perform, not an optab pointer. All other
2393 arguments are the same. */
2395 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2396 rtx target
, int unsignedp
)
2398 optab unop
= code_to_optab
[(int) code
];
2402 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2408 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2410 widen_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2412 enum mode_class
class = GET_MODE_CLASS (mode
);
2413 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2415 enum machine_mode wider_mode
;
2416 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2417 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2419 if (clz_optab
->handlers
[(int) wider_mode
].insn_code
2420 != CODE_FOR_nothing
)
2422 rtx xop0
, temp
, last
;
2424 last
= get_last_insn ();
2427 target
= gen_reg_rtx (mode
);
2428 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2429 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2431 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2432 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2433 - GET_MODE_BITSIZE (mode
)),
2434 target
, true, OPTAB_DIRECT
);
2436 delete_insns_since (last
);
2445 /* Try calculating (parity x) as (and (popcount x) 1), where
2446 popcount can also be done in a wider mode. */
2448 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2450 enum mode_class
class = GET_MODE_CLASS (mode
);
2451 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2453 enum machine_mode wider_mode
;
2454 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2455 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2457 if (popcount_optab
->handlers
[(int) wider_mode
].insn_code
2458 != CODE_FOR_nothing
)
2460 rtx xop0
, temp
, last
;
2462 last
= get_last_insn ();
2465 target
= gen_reg_rtx (mode
);
2466 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2467 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2470 temp
= expand_binop (wider_mode
, and_optab
, temp
, const1_rtx
,
2471 target
, true, OPTAB_DIRECT
);
2473 delete_insns_since (last
);
2482 /* Generate code to perform an operation specified by UNOPTAB
2483 on operand OP0, with result having machine-mode MODE.
2485 UNSIGNEDP is for the case where we have to widen the operands
2486 to perform the operation. It says to use zero-extension.
2488 If TARGET is nonzero, the value
2489 is generated there, if it is convenient to do so.
2490 In all cases an rtx is returned for the locus of the value;
2491 this may or may not be TARGET. */
2494 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2497 enum mode_class
class;
2498 enum machine_mode wider_mode
;
2500 rtx last
= get_last_insn ();
2503 class = GET_MODE_CLASS (mode
);
2505 op0
= protect_from_queue (op0
, 0);
2509 op0
= force_not_mem (op0
);
2513 target
= protect_from_queue (target
, 1);
2515 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2517 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2518 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2524 temp
= gen_reg_rtx (mode
);
2526 if (GET_MODE (xop0
) != VOIDmode
2527 && GET_MODE (xop0
) != mode0
)
2528 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2530 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2532 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2533 xop0
= copy_to_mode_reg (mode0
, xop0
);
2535 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2536 temp
= gen_reg_rtx (mode
);
2538 pat
= GEN_FCN (icode
) (temp
, xop0
);
2541 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2542 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2544 delete_insns_since (last
);
2545 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2553 delete_insns_since (last
);
2556 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2558 /* Widening clz needs special treatment. */
2559 if (unoptab
== clz_optab
)
2561 temp
= widen_clz (mode
, op0
, target
);
2568 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2569 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2570 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2572 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2576 /* For certain operations, we need not actually extend
2577 the narrow operand, as long as we will truncate the
2578 results to the same narrowness. */
2580 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2581 (unoptab
== neg_optab
2582 || unoptab
== one_cmpl_optab
)
2583 && class == MODE_INT
);
2585 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2590 if (class != MODE_INT
)
2593 target
= gen_reg_rtx (mode
);
2594 convert_move (target
, temp
, 0);
2598 return gen_lowpart (mode
, temp
);
2601 delete_insns_since (last
);
2605 /* These can be done a word at a time. */
2606 if (unoptab
== one_cmpl_optab
2607 && class == MODE_INT
2608 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2609 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2614 if (target
== 0 || target
== op0
)
2615 target
= gen_reg_rtx (mode
);
2619 /* Do the actual arithmetic. */
2620 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2622 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2623 rtx x
= expand_unop (word_mode
, unoptab
,
2624 operand_subword_force (op0
, i
, mode
),
2625 target_piece
, unsignedp
);
2627 if (target_piece
!= x
)
2628 emit_move_insn (target_piece
, x
);
2631 insns
= get_insns ();
2634 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2635 gen_rtx_fmt_e (unoptab
->code
, mode
,
2640 /* Open-code the complex negation operation. */
2641 else if (unoptab
->code
== NEG
2642 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2648 /* Find the correct mode for the real and imaginary parts. */
2649 enum machine_mode submode
= GET_MODE_INNER (mode
);
2651 if (submode
== BLKmode
)
2655 target
= gen_reg_rtx (mode
);
2659 target_piece
= gen_imagpart (submode
, target
);
2660 x
= expand_unop (submode
, unoptab
,
2661 gen_imagpart (submode
, op0
),
2662 target_piece
, unsignedp
);
2663 if (target_piece
!= x
)
2664 emit_move_insn (target_piece
, x
);
2666 target_piece
= gen_realpart (submode
, target
);
2667 x
= expand_unop (submode
, unoptab
,
2668 gen_realpart (submode
, op0
),
2669 target_piece
, unsignedp
);
2670 if (target_piece
!= x
)
2671 emit_move_insn (target_piece
, x
);
2676 emit_no_conflict_block (seq
, target
, op0
, 0,
2677 gen_rtx_fmt_e (unoptab
->code
, mode
,
2682 /* Try negating floating point values by flipping the sign bit. */
2683 if (unoptab
->code
== NEG
&& class == MODE_FLOAT
2684 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2686 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2687 enum machine_mode imode
= int_mode_for_mode (mode
);
2688 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2690 if (imode
!= BLKmode
&& bitpos
>= 0 && fmt
->has_signed_zero
)
2692 HOST_WIDE_INT hi
, lo
;
2693 rtx last
= get_last_insn ();
2695 /* Handle targets with different FP word orders. */
2696 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2698 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2699 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2700 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2703 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2706 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2710 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2713 temp
= expand_binop (imode
, xor_optab
,
2714 gen_lowpart (imode
, op0
),
2715 immed_double_const (lo
, hi
, imode
),
2716 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2721 target
= gen_reg_rtx (mode
);
2722 insn
= emit_move_insn (target
, gen_lowpart (mode
, temp
));
2723 set_unique_reg_note (insn
, REG_EQUAL
,
2724 gen_rtx_fmt_e (NEG
, mode
,
2728 delete_insns_since (last
);
2732 /* Try calculating parity (x) as popcount (x) % 2. */
2733 if (unoptab
== parity_optab
)
2735 temp
= expand_parity (mode
, op0
, target
);
2741 /* Now try a library call in this mode. */
2742 if (unoptab
->handlers
[(int) mode
].libfunc
)
2746 enum machine_mode outmode
= mode
;
2748 /* All of these functions return small values. Thus we choose to
2749 have them return something that isn't a double-word. */
2750 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
2751 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
2753 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
)));
2757 /* Pass 1 for NO_QUEUE so we don't lose any increments
2758 if the libcall is cse'd or moved. */
2759 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2760 NULL_RTX
, LCT_CONST
, outmode
,
2762 insns
= get_insns ();
2765 target
= gen_reg_rtx (outmode
);
2766 emit_libcall_block (insns
, target
, value
,
2767 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2772 if (class == MODE_VECTOR_FLOAT
|| class == MODE_VECTOR_INT
)
2773 return expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
);
2775 /* It can't be done in this mode. Can we do it in a wider mode? */
2777 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2779 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2780 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2782 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2783 != CODE_FOR_nothing
)
2784 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2788 /* For certain operations, we need not actually extend
2789 the narrow operand, as long as we will truncate the
2790 results to the same narrowness. */
2792 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2793 (unoptab
== neg_optab
2794 || unoptab
== one_cmpl_optab
)
2795 && class == MODE_INT
);
2797 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2800 /* If we are generating clz using wider mode, adjust the
2802 if (unoptab
== clz_optab
&& temp
!= 0)
2803 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2804 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2805 - GET_MODE_BITSIZE (mode
)),
2806 target
, true, OPTAB_DIRECT
);
2810 if (class != MODE_INT
)
2813 target
= gen_reg_rtx (mode
);
2814 convert_move (target
, temp
, 0);
2818 return gen_lowpart (mode
, temp
);
2821 delete_insns_since (last
);
2826 /* If there is no negate operation, try doing a subtract from zero.
2827 The US Software GOFAST library needs this. */
2828 if (unoptab
->code
== NEG
)
2831 temp
= expand_binop (mode
,
2832 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2833 CONST0_RTX (mode
), op0
,
2834 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2842 /* Emit code to compute the absolute value of OP0, with result to
2843 TARGET if convenient. (TARGET may be 0.) The return value says
2844 where the result actually is to be found.
2846 MODE is the mode of the operand; the mode of the result is
2847 different but can be deduced from MODE.
2852 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
2853 int result_unsignedp
)
2858 result_unsignedp
= 1;
2860 /* First try to do it with a special abs instruction. */
2861 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2866 /* For floating point modes, try clearing the sign bit. */
2867 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
2868 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2870 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2871 enum machine_mode imode
= int_mode_for_mode (mode
);
2872 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2874 if (imode
!= BLKmode
&& bitpos
>= 0)
2876 HOST_WIDE_INT hi
, lo
;
2877 rtx last
= get_last_insn ();
2879 /* Handle targets with different FP word orders. */
2880 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2882 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2883 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2884 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2887 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2890 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2894 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2897 temp
= expand_binop (imode
, and_optab
,
2898 gen_lowpart (imode
, op0
),
2899 immed_double_const (~lo
, ~hi
, imode
),
2900 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2905 target
= gen_reg_rtx (mode
);
2906 insn
= emit_move_insn (target
, gen_lowpart (mode
, temp
));
2907 set_unique_reg_note (insn
, REG_EQUAL
,
2908 gen_rtx_fmt_e (ABS
, mode
,
2912 delete_insns_since (last
);
2916 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2917 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2919 rtx last
= get_last_insn ();
2921 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2923 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2929 delete_insns_since (last
);
2932 /* If this machine has expensive jumps, we can do integer absolute
2933 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2934 where W is the width of MODE. */
2936 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2938 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2939 size_int (GET_MODE_BITSIZE (mode
) - 1),
2942 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2945 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2946 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2956 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
2957 int result_unsignedp
, int safe
)
2962 result_unsignedp
= 1;
2964 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
2968 /* If that does not win, use conditional jump and negate. */
2970 /* It is safe to use the target if it is the same
2971 as the source if this is also a pseudo register */
2972 if (op0
== target
&& GET_CODE (op0
) == REG
2973 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2976 op1
= gen_label_rtx ();
2977 if (target
== 0 || ! safe
2978 || GET_MODE (target
) != mode
2979 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2980 || (GET_CODE (target
) == REG
2981 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2982 target
= gen_reg_rtx (mode
);
2984 emit_move_insn (target
, op0
);
2987 /* If this mode is an integer too wide to compare properly,
2988 compare word by word. Rely on CSE to optimize constant cases. */
2989 if (GET_MODE_CLASS (mode
) == MODE_INT
2990 && ! can_compare_p (GE
, mode
, ccp_jump
))
2991 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2994 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2995 NULL_RTX
, NULL_RTX
, op1
);
2997 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
3000 emit_move_insn (target
, op0
);
3006 /* Emit code to compute the absolute value of OP0, with result to
3007 TARGET if convenient. (TARGET may be 0.) The return value says
3008 where the result actually is to be found.
3010 MODE is the mode of the operand; the mode of the result is
3011 different but can be deduced from MODE.
3013 UNSIGNEDP is relevant for complex integer modes. */
3016 expand_complex_abs (enum machine_mode mode
, rtx op0
, rtx target
,
3019 enum mode_class
class = GET_MODE_CLASS (mode
);
3020 enum machine_mode wider_mode
;
3022 rtx entry_last
= get_last_insn ();
3025 optab this_abs_optab
;
3027 /* Find the correct mode for the real and imaginary parts. */
3028 enum machine_mode submode
= GET_MODE_INNER (mode
);
3030 if (submode
== BLKmode
)
3033 op0
= protect_from_queue (op0
, 0);
3037 op0
= force_not_mem (op0
);
3040 last
= get_last_insn ();
3043 target
= protect_from_queue (target
, 1);
3045 this_abs_optab
= ! unsignedp
&& flag_trapv
3046 && (GET_MODE_CLASS(mode
) == MODE_INT
)
3047 ? absv_optab
: abs_optab
;
3049 if (this_abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3051 int icode
= (int) this_abs_optab
->handlers
[(int) mode
].insn_code
;
3052 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3058 temp
= gen_reg_rtx (submode
);
3060 if (GET_MODE (xop0
) != VOIDmode
3061 && GET_MODE (xop0
) != mode0
)
3062 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
3064 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
3066 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
3067 xop0
= copy_to_mode_reg (mode0
, xop0
);
3069 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
3070 temp
= gen_reg_rtx (submode
);
3072 pat
= GEN_FCN (icode
) (temp
, xop0
);
3075 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
3076 && ! add_equal_note (pat
, temp
, this_abs_optab
->code
, xop0
,
3079 delete_insns_since (last
);
3080 return expand_unop (mode
, this_abs_optab
, op0
, NULL_RTX
,
3089 delete_insns_since (last
);
3092 /* It can't be done in this mode. Can we open-code it in a wider mode? */
3094 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3095 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3097 if (this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3098 != CODE_FOR_nothing
)
3102 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3103 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3107 if (class != MODE_COMPLEX_INT
)
3110 target
= gen_reg_rtx (submode
);
3111 convert_move (target
, temp
, 0);
3115 return gen_lowpart (submode
, temp
);
3118 delete_insns_since (last
);
3122 /* Open-code the complex absolute-value operation
3123 if we can open-code sqrt. Otherwise it's not worth while. */
3124 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
3127 rtx real
, imag
, total
;
3129 real
= gen_realpart (submode
, op0
);
3130 imag
= gen_imagpart (submode
, op0
);
3132 /* Square both parts. */
3133 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
3134 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
3136 /* Sum the parts. */
3137 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
3138 0, OPTAB_LIB_WIDEN
);
3140 /* Get sqrt in TARGET. Set TARGET to where the result is. */
3141 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
3143 delete_insns_since (last
);
3148 /* Now try a library call in this mode. */
3149 if (this_abs_optab
->handlers
[(int) mode
].libfunc
)
3156 /* Pass 1 for NO_QUEUE so we don't lose any increments
3157 if the libcall is cse'd or moved. */
3158 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
3159 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
3160 insns
= get_insns ();
3163 target
= gen_reg_rtx (submode
);
3164 emit_libcall_block (insns
, target
, value
,
3165 gen_rtx_fmt_e (this_abs_optab
->code
, mode
, op0
));
3170 /* It can't be done in this mode. Can we do it in a wider mode? */
3172 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3173 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3175 if ((this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3176 != CODE_FOR_nothing
)
3177 || this_abs_optab
->handlers
[(int) wider_mode
].libfunc
)
3181 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3183 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3187 if (class != MODE_COMPLEX_INT
)
3190 target
= gen_reg_rtx (submode
);
3191 convert_move (target
, temp
, 0);
3195 return gen_lowpart (submode
, temp
);
3198 delete_insns_since (last
);
3202 delete_insns_since (entry_last
);
3206 /* Generate an instruction whose insn-code is INSN_CODE,
3207 with two operands: an output TARGET and an input OP0.
3208 TARGET *must* be nonzero, and the output is always stored there.
3209 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3210 the value that is stored into TARGET. */
3213 emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3216 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3219 temp
= target
= protect_from_queue (target
, 1);
3221 op0
= protect_from_queue (op0
, 0);
3223 /* Sign and zero extension from memory is often done specially on
3224 RISC machines, so forcing into a register here can pessimize
3226 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
3227 op0
= force_not_mem (op0
);
3229 /* Now, if insn does not accept our operands, put them into pseudos. */
3231 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
3232 op0
= copy_to_mode_reg (mode0
, op0
);
3234 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
3235 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
3236 temp
= gen_reg_rtx (GET_MODE (temp
));
3238 pat
= GEN_FCN (icode
) (temp
, op0
);
3240 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3241 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3246 emit_move_insn (target
, temp
);
3249 /* Emit code to perform a series of operations on a multi-word quantity, one
3252 Such a block is preceded by a CLOBBER of the output, consists of multiple
3253 insns, each setting one word of the output, and followed by a SET copying
3254 the output to itself.
3256 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3257 note indicating that it doesn't conflict with the (also multi-word)
3258 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3261 INSNS is a block of code generated to perform the operation, not including
3262 the CLOBBER and final copy. All insns that compute intermediate values
3263 are first emitted, followed by the block as described above.
3265 TARGET, OP0, and OP1 are the output and inputs of the operations,
3266 respectively. OP1 may be zero for a unary operation.
3268 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3271 If TARGET is not a register, INSNS is simply emitted with no special
3272 processing. Likewise if anything in INSNS is not an INSN or if
3273 there is a libcall block inside INSNS.
3275 The final insn emitted is returned. */
3278 emit_no_conflict_block (rtx insns
, rtx target
, rtx op0
, rtx op1
, rtx equiv
)
3280 rtx prev
, next
, first
, last
, insn
;
3282 if (GET_CODE (target
) != REG
|| reload_in_progress
)
3283 return emit_insn (insns
);
3285 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3286 if (GET_CODE (insn
) != INSN
3287 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
3288 return emit_insn (insns
);
3290 /* First emit all insns that do not store into words of the output and remove
3291 these from the list. */
3292 for (insn
= insns
; insn
; insn
= next
)
3297 next
= NEXT_INSN (insn
);
3299 /* Some ports (cris) create a libcall regions at their own. We must
3300 avoid any potential nesting of LIBCALLs. */
3301 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3302 remove_note (insn
, note
);
3303 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3304 remove_note (insn
, note
);
3306 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
3307 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3308 set
= PATTERN (insn
);
3309 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3311 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3312 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
3314 set
= XVECEXP (PATTERN (insn
), 0, i
);
3322 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
3324 if (PREV_INSN (insn
))
3325 NEXT_INSN (PREV_INSN (insn
)) = next
;
3330 PREV_INSN (next
) = PREV_INSN (insn
);
3336 prev
= get_last_insn ();
3338 /* Now write the CLOBBER of the output, followed by the setting of each
3339 of the words, followed by the final copy. */
3340 if (target
!= op0
&& target
!= op1
)
3341 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
3343 for (insn
= insns
; insn
; insn
= next
)
3345 next
= NEXT_INSN (insn
);
3348 if (op1
&& GET_CODE (op1
) == REG
)
3349 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
3352 if (op0
&& GET_CODE (op0
) == REG
)
3353 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
3357 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3358 != CODE_FOR_nothing
)
3360 last
= emit_move_insn (target
, target
);
3362 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
3366 last
= get_last_insn ();
3368 /* Remove any existing REG_EQUAL note from "last", or else it will
3369 be mistaken for a note referring to the full contents of the
3370 alleged libcall value when found together with the REG_RETVAL
3371 note added below. An existing note can come from an insn
3372 expansion at "last". */
3373 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3377 first
= get_insns ();
3379 first
= NEXT_INSN (prev
);
3381 /* Encapsulate the block so it gets manipulated as a unit. */
3382 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3384 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
3389 /* Emit code to make a call to a constant function or a library call.
3391 INSNS is a list containing all insns emitted in the call.
3392 These insns leave the result in RESULT. Our block is to copy RESULT
3393 to TARGET, which is logically equivalent to EQUIV.
3395 We first emit any insns that set a pseudo on the assumption that these are
3396 loading constants into registers; doing so allows them to be safely cse'ed
3397 between blocks. Then we emit all the other insns in the block, followed by
3398 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3399 note with an operand of EQUIV.
3401 Moving assignments to pseudos outside of the block is done to improve
3402 the generated code, but is not required to generate correct code,
3403 hence being unable to move an assignment is not grounds for not making
3404 a libcall block. There are two reasons why it is safe to leave these
3405 insns inside the block: First, we know that these pseudos cannot be
3406 used in generated RTL outside the block since they are created for
3407 temporary purposes within the block. Second, CSE will not record the
3408 values of anything set inside a libcall block, so we know they must
3409 be dead at the end of the block.
3411 Except for the first group of insns (the ones setting pseudos), the
3412 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3415 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3417 rtx final_dest
= target
;
3418 rtx prev
, next
, first
, last
, insn
;
3420 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3421 into a MEM later. Protect the libcall block from this change. */
3422 if (! REG_P (target
) || REG_USERVAR_P (target
))
3423 target
= gen_reg_rtx (GET_MODE (target
));
3425 /* If we're using non-call exceptions, a libcall corresponding to an
3426 operation that may trap may also trap. */
3427 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
3429 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3430 if (GET_CODE (insn
) == CALL_INSN
)
3432 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3434 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
3435 remove_note (insn
, note
);
3439 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3440 reg note to indicate that this call cannot throw or execute a nonlocal
3441 goto (unless there is already a REG_EH_REGION note, in which case
3443 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3444 if (GET_CODE (insn
) == CALL_INSN
)
3446 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3449 XEXP (note
, 0) = constm1_rtx
;
3451 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, constm1_rtx
,
3455 /* First emit all insns that set pseudos. Remove them from the list as
3456 we go. Avoid insns that set pseudos which were referenced in previous
3457 insns. These can be generated by move_by_pieces, for example,
3458 to update an address. Similarly, avoid insns that reference things
3459 set in previous insns. */
3461 for (insn
= insns
; insn
; insn
= next
)
3463 rtx set
= single_set (insn
);
3466 /* Some ports (cris) create a libcall regions at their own. We must
3467 avoid any potential nesting of LIBCALLs. */
3468 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3469 remove_note (insn
, note
);
3470 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3471 remove_note (insn
, note
);
3473 next
= NEXT_INSN (insn
);
3475 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
3476 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
3478 || ((! INSN_P(insns
)
3479 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
3480 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
3481 && ! modified_in_p (SET_SRC (set
), insns
)
3482 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
3484 if (PREV_INSN (insn
))
3485 NEXT_INSN (PREV_INSN (insn
)) = next
;
3490 PREV_INSN (next
) = PREV_INSN (insn
);
3495 /* Some ports use a loop to copy large arguments onto the stack.
3496 Don't move anything outside such a loop. */
3497 if (GET_CODE (insn
) == CODE_LABEL
)
3501 prev
= get_last_insn ();
3503 /* Write the remaining insns followed by the final copy. */
3505 for (insn
= insns
; insn
; insn
= next
)
3507 next
= NEXT_INSN (insn
);
3512 last
= emit_move_insn (target
, result
);
3513 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3514 != CODE_FOR_nothing
)
3515 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3518 /* Remove any existing REG_EQUAL note from "last", or else it will
3519 be mistaken for a note referring to the full contents of the
3520 libcall value when found together with the REG_RETVAL note added
3521 below. An existing note can come from an insn expansion at
3523 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3526 if (final_dest
!= target
)
3527 emit_move_insn (final_dest
, target
);
3530 first
= get_insns ();
3532 first
= NEXT_INSN (prev
);
3534 /* Encapsulate the block so it gets manipulated as a unit. */
3535 if (!flag_non_call_exceptions
|| !may_trap_p (equiv
))
3537 /* We can't attach the REG_LIBCALL and REG_RETVAL notes
3538 when the encapsulated region would not be in one basic block,
3539 i.e. when there is a control_flow_insn_p insn between FIRST and LAST.
3541 bool attach_libcall_retval_notes
= true;
3542 next
= NEXT_INSN (last
);
3543 for (insn
= first
; insn
!= next
; insn
= NEXT_INSN (insn
))
3544 if (control_flow_insn_p (insn
))
3546 attach_libcall_retval_notes
= false;
3550 if (attach_libcall_retval_notes
)
3552 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3554 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
,
3560 /* Generate code to store zero in X. */
3563 emit_clr_insn (rtx x
)
3565 emit_move_insn (x
, const0_rtx
);
3568 /* Generate code to store 1 in X
3569 assuming it contains zero beforehand. */
3572 emit_0_to_1_insn (rtx x
)
3574 emit_move_insn (x
, const1_rtx
);
3577 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3578 PURPOSE describes how this comparison will be used. CODE is the rtx
3579 comparison code we will be using.
3581 ??? Actually, CODE is slightly weaker than that. A target is still
3582 required to implement all of the normal bcc operations, but not
3583 required to implement all (or any) of the unordered bcc operations. */
3586 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3587 enum can_compare_purpose purpose
)
3591 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3593 if (purpose
== ccp_jump
)
3594 return bcc_gen_fctn
[(int) code
] != NULL
;
3595 else if (purpose
== ccp_store_flag
)
3596 return setcc_gen_code
[(int) code
] != CODE_FOR_nothing
;
3598 /* There's only one cmov entry point, and it's allowed to fail. */
3601 if (purpose
== ccp_jump
3602 && cbranch_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3604 if (purpose
== ccp_cmov
3605 && cmov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3607 if (purpose
== ccp_store_flag
3608 && cstore_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3611 mode
= GET_MODE_WIDER_MODE (mode
);
3613 while (mode
!= VOIDmode
);
3618 /* This function is called when we are going to emit a compare instruction that
3619 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3621 *PMODE is the mode of the inputs (in case they are const_int).
3622 *PUNSIGNEDP nonzero says that the operands are unsigned;
3623 this matters if they need to be widened.
3625 If they have mode BLKmode, then SIZE specifies the size of both operands.
3627 This function performs all the setup necessary so that the caller only has
3628 to emit a single comparison insn. This setup can involve doing a BLKmode
3629 comparison or emitting a library call to perform the comparison if no insn
3630 is available to handle it.
3631 The values which are passed in through pointers can be modified; the caller
3632 should perform the comparison on the modified values. */
3635 prepare_cmp_insn (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
, rtx size
,
3636 enum machine_mode
*pmode
, int *punsignedp
,
3637 enum can_compare_purpose purpose
)
3639 enum machine_mode mode
= *pmode
;
3640 rtx x
= *px
, y
= *py
;
3641 int unsignedp
= *punsignedp
;
3642 enum mode_class
class;
3644 class = GET_MODE_CLASS (mode
);
3646 /* They could both be VOIDmode if both args are immediate constants,
3647 but we should fold that at an earlier stage.
3648 With no special code here, this will call abort,
3649 reminding the programmer to implement such folding. */
3651 if (mode
!= BLKmode
&& flag_force_mem
)
3653 /* Load duplicate non-volatile operands once. */
3654 if (rtx_equal_p (x
, y
) && ! volatile_refs_p (x
))
3656 x
= force_not_mem (x
);
3661 x
= force_not_mem (x
);
3662 y
= force_not_mem (y
);
3666 /* If we are inside an appropriately-short loop and one operand is an
3667 expensive constant, force it into a register. */
3668 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
3669 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
3670 x
= force_reg (mode
, x
);
3672 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
3673 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
3674 y
= force_reg (mode
, y
);
3677 /* Abort if we have a non-canonical comparison. The RTL documentation
3678 states that canonical comparisons are required only for targets which
3680 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
3684 /* Don't let both operands fail to indicate the mode. */
3685 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3686 x
= force_reg (mode
, x
);
3688 /* Handle all BLKmode compares. */
3690 if (mode
== BLKmode
)
3692 enum machine_mode cmp_mode
, result_mode
;
3693 enum insn_code cmp_code
;
3698 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
3704 x
= protect_from_queue (x
, 0);
3705 y
= protect_from_queue (y
, 0);
3706 size
= protect_from_queue (size
, 0);
3708 /* Try to use a memory block compare insn - either cmpstr
3709 or cmpmem will do. */
3710 for (cmp_mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
);
3711 cmp_mode
!= VOIDmode
;
3712 cmp_mode
= GET_MODE_WIDER_MODE (cmp_mode
))
3714 cmp_code
= cmpmem_optab
[cmp_mode
];
3715 if (cmp_code
== CODE_FOR_nothing
)
3716 cmp_code
= cmpstr_optab
[cmp_mode
];
3717 if (cmp_code
== CODE_FOR_nothing
)
3720 /* Must make sure the size fits the insn's mode. */
3721 if ((GET_CODE (size
) == CONST_INT
3722 && INTVAL (size
) >= (1 << GET_MODE_BITSIZE (cmp_mode
)))
3723 || (GET_MODE_BITSIZE (GET_MODE (size
))
3724 > GET_MODE_BITSIZE (cmp_mode
)))
3727 result_mode
= insn_data
[cmp_code
].operand
[0].mode
;
3728 result
= gen_reg_rtx (result_mode
);
3729 size
= convert_to_mode (cmp_mode
, size
, 1);
3730 emit_insn (GEN_FCN (cmp_code
) (result
, x
, y
, size
, opalign
));
3734 *pmode
= result_mode
;
3738 /* Otherwise call a library function, memcmp if we've got it,
3740 #ifdef TARGET_MEM_FUNCTIONS
3741 libfunc
= memcmp_libfunc
;
3742 length_type
= sizetype
;
3744 libfunc
= bcmp_libfunc
;
3745 length_type
= integer_type_node
;
3747 result_mode
= TYPE_MODE (integer_type_node
);
3748 cmp_mode
= TYPE_MODE (length_type
);
3749 size
= convert_to_mode (TYPE_MODE (length_type
), size
,
3750 TYPE_UNSIGNED (length_type
));
3752 result
= emit_library_call_value (libfunc
, 0, LCT_PURE_MAKE_BLOCK
,
3759 *pmode
= result_mode
;
3763 /* Don't allow operands to the compare to trap, as that can put the
3764 compare and branch in different basic blocks. */
3765 if (flag_non_call_exceptions
)
3768 x
= force_reg (mode
, x
);
3770 y
= force_reg (mode
, y
);
3775 if (can_compare_p (*pcomparison
, mode
, purpose
))
3778 /* Handle a lib call just for the mode we are using. */
3780 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3782 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3785 /* If we want unsigned, and this mode has a distinct unsigned
3786 comparison routine, use that. */
3787 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3788 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3790 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
3791 word_mode
, 2, x
, mode
, y
, mode
);
3793 /* Integer comparison returns a result that must be compared against 1,
3794 so that even if we do an unsigned compare afterward,
3795 there is still a value that can represent the result "less than". */
3802 if (class == MODE_FLOAT
)
3803 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3809 /* Before emitting an insn with code ICODE, make sure that X, which is going
3810 to be used for operand OPNUM of the insn, is converted from mode MODE to
3811 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3812 that it is accepted by the operand predicate. Return the new value. */
3815 prepare_operand (int icode
, rtx x
, int opnum
, enum machine_mode mode
,
3816 enum machine_mode wider_mode
, int unsignedp
)
3818 x
= protect_from_queue (x
, 0);
3820 if (mode
!= wider_mode
)
3821 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3823 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3824 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3828 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3834 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3835 we can do the comparison.
3836 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3837 be NULL_RTX which indicates that only a comparison is to be generated. */
3840 emit_cmp_and_jump_insn_1 (rtx x
, rtx y
, enum machine_mode mode
,
3841 enum rtx_code comparison
, int unsignedp
, rtx label
)
3843 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3844 enum mode_class
class = GET_MODE_CLASS (mode
);
3845 enum machine_mode wider_mode
= mode
;
3847 /* Try combined insns first. */
3850 enum insn_code icode
;
3851 PUT_MODE (test
, wider_mode
);
3855 icode
= cbranch_optab
->handlers
[(int) wider_mode
].insn_code
;
3857 if (icode
!= CODE_FOR_nothing
3858 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3860 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3861 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3862 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3867 /* Handle some compares against zero. */
3868 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3869 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3871 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3872 emit_insn (GEN_FCN (icode
) (x
));
3874 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3878 /* Handle compares for which there is a directly suitable insn. */
3880 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3881 if (icode
!= CODE_FOR_nothing
)
3883 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3884 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3885 emit_insn (GEN_FCN (icode
) (x
, y
));
3887 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3891 if (class != MODE_INT
&& class != MODE_FLOAT
3892 && class != MODE_COMPLEX_FLOAT
)
3895 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3897 while (wider_mode
!= VOIDmode
);
3902 /* Generate code to compare X with Y so that the condition codes are
3903 set and to jump to LABEL if the condition is true. If X is a
3904 constant and Y is not a constant, then the comparison is swapped to
3905 ensure that the comparison RTL has the canonical form.
3907 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3908 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3909 the proper branch condition code.
3911 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3913 MODE is the mode of the inputs (in case they are const_int).
3915 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3916 be passed unchanged to emit_cmp_insn, then potentially converted into an
3917 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3920 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3921 enum machine_mode mode
, int unsignedp
, rtx label
)
3923 rtx op0
= x
, op1
= y
;
3925 /* Swap operands and condition to ensure canonical RTL. */
3926 if (swap_commutative_operands_p (x
, y
))
3928 /* If we're not emitting a branch, this means some caller
3934 comparison
= swap_condition (comparison
);
3938 /* If OP0 is still a constant, then both X and Y must be constants. Force
3939 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3941 if (CONSTANT_P (op0
))
3942 op0
= force_reg (mode
, op0
);
3947 comparison
= unsigned_condition (comparison
);
3949 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
,
3951 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3954 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3957 emit_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3958 enum machine_mode mode
, int unsignedp
)
3960 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, 0);
3963 /* Emit a library call comparison between floating point X and Y.
3964 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3967 prepare_float_lib_cmp (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
,
3968 enum machine_mode
*pmode
, int *punsignedp
)
3970 enum rtx_code comparison
= *pcomparison
;
3971 enum rtx_code swapped
= swap_condition (comparison
);
3972 rtx x
= protect_from_queue (*px
, 0);
3973 rtx y
= protect_from_queue (*py
, 0);
3974 enum machine_mode orig_mode
= GET_MODE (x
);
3975 enum machine_mode mode
;
3976 rtx value
, target
, insns
, equiv
;
3979 for (mode
= orig_mode
; mode
!= VOIDmode
; mode
= GET_MODE_WIDER_MODE (mode
))
3981 if ((libfunc
= code_to_optab
[comparison
]->handlers
[mode
].libfunc
))
3984 if ((libfunc
= code_to_optab
[swapped
]->handlers
[mode
].libfunc
))
3987 tmp
= x
; x
= y
; y
= tmp
;
3988 comparison
= swapped
;
3993 if (mode
== VOIDmode
)
3996 if (mode
!= orig_mode
)
3998 x
= convert_to_mode (mode
, x
, 0);
3999 y
= convert_to_mode (mode
, y
, 0);
4002 /* Attach a REG_EQUAL note describing the semantics of the libcall to
4003 the RTL. The allows the RTL optimizers to delete the libcall if the
4004 condition can be determined at compile-time. */
4005 if (comparison
== UNORDERED
)
4007 rtx temp
= simplify_gen_relational (NE
, word_mode
, mode
, x
, x
);
4008 equiv
= simplify_gen_relational (NE
, word_mode
, mode
, y
, y
);
4009 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
, word_mode
,
4010 temp
, const_true_rtx
, equiv
);
4014 equiv
= simplify_gen_relational (comparison
, word_mode
, mode
, x
, y
);
4015 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4017 rtx true_rtx
, false_rtx
;
4022 true_rtx
= const0_rtx
;
4023 false_rtx
= const_true_rtx
;
4027 true_rtx
= const_true_rtx
;
4028 false_rtx
= const0_rtx
;
4032 true_rtx
= const1_rtx
;
4033 false_rtx
= const0_rtx
;
4037 true_rtx
= const0_rtx
;
4038 false_rtx
= constm1_rtx
;
4042 true_rtx
= constm1_rtx
;
4043 false_rtx
= const0_rtx
;
4047 true_rtx
= const0_rtx
;
4048 false_rtx
= const1_rtx
;
4054 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
, word_mode
,
4055 equiv
, true_rtx
, false_rtx
);
4060 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4061 word_mode
, 2, x
, mode
, y
, mode
);
4062 insns
= get_insns ();
4065 target
= gen_reg_rtx (word_mode
);
4066 emit_libcall_block (insns
, target
, value
, equiv
);
4069 if (comparison
== UNORDERED
4070 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
4076 *pcomparison
= comparison
;
4080 /* Generate code to indirectly jump to a location given in the rtx LOC. */
4083 emit_indirect_jump (rtx loc
)
4085 if (! ((*insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
)
4087 loc
= copy_to_mode_reg (Pmode
, loc
);
4089 emit_jump_insn (gen_indirect_jump (loc
));
4093 #ifdef HAVE_conditional_move
4095 /* Emit a conditional move instruction if the machine supports one for that
4096 condition and machine mode.
4098 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4099 the mode to use should they be constants. If it is VOIDmode, they cannot
4102 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4103 should be stored there. MODE is the mode to use should they be constants.
4104 If it is VOIDmode, they cannot both be constants.
4106 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4107 is not supported. */
4110 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4111 enum machine_mode cmode
, rtx op2
, rtx op3
,
4112 enum machine_mode mode
, int unsignedp
)
4114 rtx tem
, subtarget
, comparison
, insn
;
4115 enum insn_code icode
;
4116 enum rtx_code reversed
;
4118 /* If one operand is constant, make it the second one. Only do this
4119 if the other operand is not constant as well. */
4121 if (swap_commutative_operands_p (op0
, op1
))
4126 code
= swap_condition (code
);
4129 /* get_condition will prefer to generate LT and GT even if the old
4130 comparison was against zero, so undo that canonicalization here since
4131 comparisons against zero are cheaper. */
4132 if (code
== LT
&& op1
== const1_rtx
)
4133 code
= LE
, op1
= const0_rtx
;
4134 else if (code
== GT
&& op1
== constm1_rtx
)
4135 code
= GE
, op1
= const0_rtx
;
4137 if (cmode
== VOIDmode
)
4138 cmode
= GET_MODE (op0
);
4140 if (swap_commutative_operands_p (op2
, op3
)
4141 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4150 if (mode
== VOIDmode
)
4151 mode
= GET_MODE (op2
);
4153 icode
= movcc_gen_code
[mode
];
4155 if (icode
== CODE_FOR_nothing
)
4160 op2
= force_not_mem (op2
);
4161 op3
= force_not_mem (op3
);
4165 target
= protect_from_queue (target
, 1);
4167 target
= gen_reg_rtx (mode
);
4173 op2
= protect_from_queue (op2
, 0);
4174 op3
= protect_from_queue (op3
, 0);
4176 /* If the insn doesn't accept these operands, put them in pseudos. */
4178 if (! (*insn_data
[icode
].operand
[0].predicate
)
4179 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4180 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4182 if (! (*insn_data
[icode
].operand
[2].predicate
)
4183 (op2
, insn_data
[icode
].operand
[2].mode
))
4184 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4186 if (! (*insn_data
[icode
].operand
[3].predicate
)
4187 (op3
, insn_data
[icode
].operand
[3].mode
))
4188 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4190 /* Everything should now be in the suitable form, so emit the compare insn
4191 and then the conditional move. */
4194 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4196 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4197 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4198 return NULL and let the caller figure out how best to deal with this
4200 if (GET_CODE (comparison
) != code
)
4203 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4205 /* If that failed, then give up. */
4211 if (subtarget
!= target
)
4212 convert_move (target
, subtarget
, 0);
4217 /* Return nonzero if a conditional move of mode MODE is supported.
4219 This function is for combine so it can tell whether an insn that looks
4220 like a conditional move is actually supported by the hardware. If we
4221 guess wrong we lose a bit on optimization, but that's it. */
4222 /* ??? sparc64 supports conditionally moving integers values based on fp
4223 comparisons, and vice versa. How do we handle them? */
4226 can_conditionally_move_p (enum machine_mode mode
)
4228 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
4234 #endif /* HAVE_conditional_move */
4236 /* Emit a conditional addition instruction if the machine supports one for that
4237 condition and machine mode.
4239 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4240 the mode to use should they be constants. If it is VOIDmode, they cannot
4243 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4244 should be stored there. MODE is the mode to use should they be constants.
4245 If it is VOIDmode, they cannot both be constants.
4247 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4248 is not supported. */
4251 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4252 enum machine_mode cmode
, rtx op2
, rtx op3
,
4253 enum machine_mode mode
, int unsignedp
)
4255 rtx tem
, subtarget
, comparison
, insn
;
4256 enum insn_code icode
;
4257 enum rtx_code reversed
;
4259 /* If one operand is constant, make it the second one. Only do this
4260 if the other operand is not constant as well. */
4262 if (swap_commutative_operands_p (op0
, op1
))
4267 code
= swap_condition (code
);
4270 /* get_condition will prefer to generate LT and GT even if the old
4271 comparison was against zero, so undo that canonicalization here since
4272 comparisons against zero are cheaper. */
4273 if (code
== LT
&& op1
== const1_rtx
)
4274 code
= LE
, op1
= const0_rtx
;
4275 else if (code
== GT
&& op1
== constm1_rtx
)
4276 code
= GE
, op1
= const0_rtx
;
4278 if (cmode
== VOIDmode
)
4279 cmode
= GET_MODE (op0
);
4281 if (swap_commutative_operands_p (op2
, op3
)
4282 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4291 if (mode
== VOIDmode
)
4292 mode
= GET_MODE (op2
);
4294 icode
= addcc_optab
->handlers
[(int) mode
].insn_code
;
4296 if (icode
== CODE_FOR_nothing
)
4301 op2
= force_not_mem (op2
);
4302 op3
= force_not_mem (op3
);
4306 target
= protect_from_queue (target
, 1);
4308 target
= gen_reg_rtx (mode
);
4314 op2
= protect_from_queue (op2
, 0);
4315 op3
= protect_from_queue (op3
, 0);
4317 /* If the insn doesn't accept these operands, put them in pseudos. */
4319 if (! (*insn_data
[icode
].operand
[0].predicate
)
4320 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4321 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4323 if (! (*insn_data
[icode
].operand
[2].predicate
)
4324 (op2
, insn_data
[icode
].operand
[2].mode
))
4325 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4327 if (! (*insn_data
[icode
].operand
[3].predicate
)
4328 (op3
, insn_data
[icode
].operand
[3].mode
))
4329 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4331 /* Everything should now be in the suitable form, so emit the compare insn
4332 and then the conditional move. */
4335 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4337 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4338 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4339 return NULL and let the caller figure out how best to deal with this
4341 if (GET_CODE (comparison
) != code
)
4344 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4346 /* If that failed, then give up. */
4352 if (subtarget
!= target
)
4353 convert_move (target
, subtarget
, 0);
4358 /* These functions attempt to generate an insn body, rather than
4359 emitting the insn, but if the gen function already emits them, we
4360 make no attempt to turn them back into naked patterns.
4362 They do not protect from queued increments,
4363 because they may be used 1) in protect_from_queue itself
4364 and 2) in other passes where there is no queue. */
4366 /* Generate and return an insn body to add Y to X. */
4369 gen_add2_insn (rtx x
, rtx y
)
4371 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4373 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4374 (x
, insn_data
[icode
].operand
[0].mode
))
4375 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4376 (x
, insn_data
[icode
].operand
[1].mode
))
4377 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4378 (y
, insn_data
[icode
].operand
[2].mode
)))
4381 return (GEN_FCN (icode
) (x
, x
, y
));
4384 /* Generate and return an insn body to add r1 and c,
4385 storing the result in r0. */
4387 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4389 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4391 if (icode
== CODE_FOR_nothing
4392 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4393 (r0
, insn_data
[icode
].operand
[0].mode
))
4394 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4395 (r1
, insn_data
[icode
].operand
[1].mode
))
4396 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4397 (c
, insn_data
[icode
].operand
[2].mode
)))
4400 return (GEN_FCN (icode
) (r0
, r1
, c
));
4404 have_add2_insn (rtx x
, rtx y
)
4408 if (GET_MODE (x
) == VOIDmode
)
4411 icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4413 if (icode
== CODE_FOR_nothing
)
4416 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4417 (x
, insn_data
[icode
].operand
[0].mode
))
4418 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4419 (x
, insn_data
[icode
].operand
[1].mode
))
4420 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4421 (y
, insn_data
[icode
].operand
[2].mode
)))
4427 /* Generate and return an insn body to subtract Y from X. */
4430 gen_sub2_insn (rtx x
, rtx y
)
4432 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4434 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4435 (x
, insn_data
[icode
].operand
[0].mode
))
4436 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4437 (x
, insn_data
[icode
].operand
[1].mode
))
4438 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4439 (y
, insn_data
[icode
].operand
[2].mode
)))
4442 return (GEN_FCN (icode
) (x
, x
, y
));
4445 /* Generate and return an insn body to subtract r1 and c,
4446 storing the result in r0. */
4448 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4450 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4452 if (icode
== CODE_FOR_nothing
4453 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4454 (r0
, insn_data
[icode
].operand
[0].mode
))
4455 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4456 (r1
, insn_data
[icode
].operand
[1].mode
))
4457 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4458 (c
, insn_data
[icode
].operand
[2].mode
)))
4461 return (GEN_FCN (icode
) (r0
, r1
, c
));
4465 have_sub2_insn (rtx x
, rtx y
)
4469 if (GET_MODE (x
) == VOIDmode
)
4472 icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4474 if (icode
== CODE_FOR_nothing
)
4477 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4478 (x
, insn_data
[icode
].operand
[0].mode
))
4479 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4480 (x
, insn_data
[icode
].operand
[1].mode
))
4481 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4482 (y
, insn_data
[icode
].operand
[2].mode
)))
4488 /* Generate the body of an instruction to copy Y into X.
4489 It may be a list of insns, if one insn isn't enough. */
4492 gen_move_insn (rtx x
, rtx y
)
4497 emit_move_insn_1 (x
, y
);
4503 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4504 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4505 no such operation exists, CODE_FOR_nothing will be returned. */
4508 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4512 #ifdef HAVE_ptr_extend
4514 return CODE_FOR_ptr_extend
;
4517 tab
= unsignedp
? zext_optab
: sext_optab
;
4518 return tab
->handlers
[to_mode
][from_mode
].insn_code
;
4521 /* Generate the body of an insn to extend Y (with mode MFROM)
4522 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4525 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4526 enum machine_mode mfrom
, int unsignedp
)
4528 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4529 return GEN_FCN (icode
) (x
, y
);
4532 /* can_fix_p and can_float_p say whether the target machine
4533 can directly convert a given fixed point type to
4534 a given floating point type, or vice versa.
4535 The returned value is the CODE_FOR_... value to use,
4536 or CODE_FOR_nothing if these modes cannot be directly converted.
4538 *TRUNCP_PTR is set to 1 if it is necessary to output
4539 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4541 static enum insn_code
4542 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4543 int unsignedp
, int *truncp_ptr
)
4546 enum insn_code icode
;
4548 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4549 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
4550 if (icode
!= CODE_FOR_nothing
)
4556 /* FIXME: This requires a port to define both FIX and FTRUNC pattern
4557 for this to work. We need to rework the fix* and ftrunc* patterns
4558 and documentation. */
4559 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4560 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
4561 if (icode
!= CODE_FOR_nothing
4562 && ftrunc_optab
->handlers
[fltmode
].insn_code
!= CODE_FOR_nothing
)
4569 return CODE_FOR_nothing
;
4572 static enum insn_code
4573 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4578 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4579 return tab
->handlers
[fltmode
][fixmode
].insn_code
;
4582 /* Generate code to convert FROM to floating point
4583 and store in TO. FROM must be fixed point and not VOIDmode.
4584 UNSIGNEDP nonzero means regard FROM as unsigned.
4585 Normally this is done by correcting the final value
4586 if it is negative. */
4589 expand_float (rtx to
, rtx from
, int unsignedp
)
4591 enum insn_code icode
;
4593 enum machine_mode fmode
, imode
;
4595 /* Crash now, because we won't be able to decide which mode to use. */
4596 if (GET_MODE (from
) == VOIDmode
)
4599 /* Look for an insn to do the conversion. Do it in the specified
4600 modes if possible; otherwise convert either input, output or both to
4601 wider mode. If the integer mode is wider than the mode of FROM,
4602 we can do the conversion signed even if the input is unsigned. */
4604 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4605 fmode
= GET_MODE_WIDER_MODE (fmode
))
4606 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4607 imode
= GET_MODE_WIDER_MODE (imode
))
4609 int doing_unsigned
= unsignedp
;
4611 if (fmode
!= GET_MODE (to
)
4612 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4615 icode
= can_float_p (fmode
, imode
, unsignedp
);
4616 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
4617 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
4619 if (icode
!= CODE_FOR_nothing
)
4621 to
= protect_from_queue (to
, 1);
4622 from
= protect_from_queue (from
, 0);
4624 if (imode
!= GET_MODE (from
))
4625 from
= convert_to_mode (imode
, from
, unsignedp
);
4627 if (fmode
!= GET_MODE (to
))
4628 target
= gen_reg_rtx (fmode
);
4630 emit_unop_insn (icode
, target
, from
,
4631 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4634 convert_move (to
, target
, 0);
4639 /* Unsigned integer, and no way to convert directly.
4640 Convert as signed, then conditionally adjust the result. */
4643 rtx label
= gen_label_rtx ();
4645 REAL_VALUE_TYPE offset
;
4649 to
= protect_from_queue (to
, 1);
4650 from
= protect_from_queue (from
, 0);
4653 from
= force_not_mem (from
);
4655 /* Look for a usable floating mode FMODE wider than the source and at
4656 least as wide as the target. Using FMODE will avoid rounding woes
4657 with unsigned values greater than the signed maximum value. */
4659 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4660 fmode
= GET_MODE_WIDER_MODE (fmode
))
4661 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4662 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4665 if (fmode
== VOIDmode
)
4667 /* There is no such mode. Pretend the target is wide enough. */
4668 fmode
= GET_MODE (to
);
4670 /* Avoid double-rounding when TO is narrower than FROM. */
4671 if ((significand_size (fmode
) + 1)
4672 < GET_MODE_BITSIZE (GET_MODE (from
)))
4675 rtx neglabel
= gen_label_rtx ();
4677 /* Don't use TARGET if it isn't a register, is a hard register,
4678 or is the wrong mode. */
4679 if (GET_CODE (target
) != REG
4680 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4681 || GET_MODE (target
) != fmode
)
4682 target
= gen_reg_rtx (fmode
);
4684 imode
= GET_MODE (from
);
4685 do_pending_stack_adjust ();
4687 /* Test whether the sign bit is set. */
4688 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4691 /* The sign bit is not set. Convert as signed. */
4692 expand_float (target
, from
, 0);
4693 emit_jump_insn (gen_jump (label
));
4696 /* The sign bit is set.
4697 Convert to a usable (positive signed) value by shifting right
4698 one bit, while remembering if a nonzero bit was shifted
4699 out; i.e., compute (from & 1) | (from >> 1). */
4701 emit_label (neglabel
);
4702 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4703 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4704 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4706 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4708 expand_float (target
, temp
, 0);
4710 /* Multiply by 2 to undo the shift above. */
4711 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4712 target
, 0, OPTAB_LIB_WIDEN
);
4714 emit_move_insn (target
, temp
);
4716 do_pending_stack_adjust ();
4722 /* If we are about to do some arithmetic to correct for an
4723 unsigned operand, do it in a pseudo-register. */
4725 if (GET_MODE (to
) != fmode
4726 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4727 target
= gen_reg_rtx (fmode
);
4729 /* Convert as signed integer to floating. */
4730 expand_float (target
, from
, 0);
4732 /* If FROM is negative (and therefore TO is negative),
4733 correct its value by 2**bitwidth. */
4735 do_pending_stack_adjust ();
4736 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4740 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)));
4741 temp
= expand_binop (fmode
, add_optab
, target
,
4742 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4743 target
, 0, OPTAB_LIB_WIDEN
);
4745 emit_move_insn (target
, temp
);
4747 do_pending_stack_adjust ();
4752 /* No hardware instruction available; call a library routine. */
4757 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4759 to
= protect_from_queue (to
, 1);
4760 from
= protect_from_queue (from
, 0);
4762 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4763 from
= convert_to_mode (SImode
, from
, unsignedp
);
4766 from
= force_not_mem (from
);
4768 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4774 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4775 GET_MODE (to
), 1, from
,
4777 insns
= get_insns ();
4780 emit_libcall_block (insns
, target
, value
,
4781 gen_rtx_FLOAT (GET_MODE (to
), from
));
4786 /* Copy result to requested destination
4787 if we have been computing in a temp location. */
4791 if (GET_MODE (target
) == GET_MODE (to
))
4792 emit_move_insn (to
, target
);
4794 convert_move (to
, target
, 0);
4798 /* Generate code to convert FROM to fixed point and store in TO. FROM
4799 must be floating point. */
4802 expand_fix (rtx to
, rtx from
, int unsignedp
)
4804 enum insn_code icode
;
4806 enum machine_mode fmode
, imode
;
4809 /* We first try to find a pair of modes, one real and one integer, at
4810 least as wide as FROM and TO, respectively, in which we can open-code
4811 this conversion. If the integer mode is wider than the mode of TO,
4812 we can do the conversion either signed or unsigned. */
4814 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4815 fmode
= GET_MODE_WIDER_MODE (fmode
))
4816 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4817 imode
= GET_MODE_WIDER_MODE (imode
))
4819 int doing_unsigned
= unsignedp
;
4821 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4822 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4823 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4825 if (icode
!= CODE_FOR_nothing
)
4827 to
= protect_from_queue (to
, 1);
4828 from
= protect_from_queue (from
, 0);
4830 if (fmode
!= GET_MODE (from
))
4831 from
= convert_to_mode (fmode
, from
, 0);
4835 rtx temp
= gen_reg_rtx (GET_MODE (from
));
4836 from
= expand_unop (GET_MODE (from
), ftrunc_optab
, from
,
4840 if (imode
!= GET_MODE (to
))
4841 target
= gen_reg_rtx (imode
);
4843 emit_unop_insn (icode
, target
, from
,
4844 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4846 convert_move (to
, target
, unsignedp
);
4851 /* For an unsigned conversion, there is one more way to do it.
4852 If we have a signed conversion, we generate code that compares
4853 the real value to the largest representable positive number. If if
4854 is smaller, the conversion is done normally. Otherwise, subtract
4855 one plus the highest signed number, convert, and add it back.
4857 We only need to check all real modes, since we know we didn't find
4858 anything with a wider integer mode.
4860 This code used to extend FP value into mode wider than the destination.
4861 This is not needed. Consider, for instance conversion from SFmode
4864 The hot path trought the code is dealing with inputs smaller than 2^63
4865 and doing just the conversion, so there is no bits to lose.
4867 In the other path we know the value is positive in the range 2^63..2^64-1
4868 inclusive. (as for other imput overflow happens and result is undefined)
4869 So we know that the most important bit set in mantissa corresponds to
4870 2^63. The subtraction of 2^63 should not generate any rounding as it
4871 simply clears out that bit. The rest is trivial. */
4873 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4874 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4875 fmode
= GET_MODE_WIDER_MODE (fmode
))
4876 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4880 REAL_VALUE_TYPE offset
;
4881 rtx limit
, lab1
, lab2
, insn
;
4883 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4884 real_2expN (&offset
, bitsize
- 1);
4885 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4886 lab1
= gen_label_rtx ();
4887 lab2
= gen_label_rtx ();
4890 to
= protect_from_queue (to
, 1);
4891 from
= protect_from_queue (from
, 0);
4894 from
= force_not_mem (from
);
4896 if (fmode
!= GET_MODE (from
))
4897 from
= convert_to_mode (fmode
, from
, 0);
4899 /* See if we need to do the subtraction. */
4900 do_pending_stack_adjust ();
4901 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4904 /* If not, do the signed "fix" and branch around fixup code. */
4905 expand_fix (to
, from
, 0);
4906 emit_jump_insn (gen_jump (lab2
));
4909 /* Otherwise, subtract 2**(N-1), convert to signed number,
4910 then add 2**(N-1). Do the addition using XOR since this
4911 will often generate better code. */
4913 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4914 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4915 expand_fix (to
, target
, 0);
4916 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4918 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
4920 to
, 1, OPTAB_LIB_WIDEN
);
4923 emit_move_insn (to
, target
);
4927 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4928 != CODE_FOR_nothing
)
4930 /* Make a place for a REG_NOTE and add it. */
4931 insn
= emit_move_insn (to
, to
);
4932 set_unique_reg_note (insn
,
4934 gen_rtx_fmt_e (UNSIGNED_FIX
,
4942 /* We can't do it with an insn, so use a library call. But first ensure
4943 that the mode of TO is at least as wide as SImode, since those are the
4944 only library calls we know about. */
4946 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4948 target
= gen_reg_rtx (SImode
);
4950 expand_fix (target
, from
, unsignedp
);
4958 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
4959 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4963 to
= protect_from_queue (to
, 1);
4964 from
= protect_from_queue (from
, 0);
4967 from
= force_not_mem (from
);
4971 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4972 GET_MODE (to
), 1, from
,
4974 insns
= get_insns ();
4977 emit_libcall_block (insns
, target
, value
,
4978 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4979 GET_MODE (to
), from
));
4984 if (GET_MODE (to
) == GET_MODE (target
))
4985 emit_move_insn (to
, target
);
4987 convert_move (to
, target
, 0);
4991 /* Report whether we have an instruction to perform the operation
4992 specified by CODE on operands of mode MODE. */
4994 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
4996 return (code_to_optab
[(int) code
] != 0
4997 && (code_to_optab
[(int) code
]->handlers
[(int) mode
].insn_code
4998 != CODE_FOR_nothing
));
5001 /* Create a blank optab. */
5006 optab op
= ggc_alloc (sizeof (struct optab
));
5007 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5009 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
5010 op
->handlers
[i
].libfunc
= 0;
5016 static convert_optab
5017 new_convert_optab (void)
5020 convert_optab op
= ggc_alloc (sizeof (struct convert_optab
));
5021 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5022 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
5024 op
->handlers
[i
][j
].insn_code
= CODE_FOR_nothing
;
5025 op
->handlers
[i
][j
].libfunc
= 0;
5030 /* Same, but fill in its code as CODE, and write it into the
5031 code_to_optab table. */
5033 init_optab (enum rtx_code code
)
5035 optab op
= new_optab ();
5037 code_to_optab
[(int) code
] = op
;
5041 /* Same, but fill in its code as CODE, and do _not_ write it into
5042 the code_to_optab table. */
5044 init_optabv (enum rtx_code code
)
5046 optab op
= new_optab ();
5051 /* Conversion optabs never go in the code_to_optab table. */
5052 static inline convert_optab
5053 init_convert_optab (enum rtx_code code
)
5055 convert_optab op
= new_convert_optab ();
5060 /* Initialize the libfunc fields of an entire group of entries in some
5061 optab. Each entry is set equal to a string consisting of a leading
5062 pair of underscores followed by a generic operation name followed by
5063 a mode name (downshifted to lowercase) followed by a single character
5064 representing the number of operands for the given operation (which is
5065 usually one of the characters '2', '3', or '4').
5067 OPTABLE is the table in which libfunc fields are to be initialized.
5068 FIRST_MODE is the first machine mode index in the given optab to
5070 LAST_MODE is the last machine mode index in the given optab to
5072 OPNAME is the generic (string) name of the operation.
5073 SUFFIX is the character which specifies the number of operands for
5074 the given generic operation.
5078 init_libfuncs (optab optable
, int first_mode
, int last_mode
,
5079 const char *opname
, int suffix
)
5082 unsigned opname_len
= strlen (opname
);
5084 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
5085 mode
= (enum machine_mode
) ((int) mode
+ 1))
5087 const char *mname
= GET_MODE_NAME (mode
);
5088 unsigned mname_len
= strlen (mname
);
5089 char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
5096 for (q
= opname
; *q
; )
5098 for (q
= mname
; *q
; q
++)
5099 *p
++ = TOLOWER (*q
);
5103 optable
->handlers
[(int) mode
].libfunc
5104 = init_one_libfunc (ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5108 /* Initialize the libfunc fields of an entire group of entries in some
5109 optab which correspond to all integer mode operations. The parameters
5110 have the same meaning as similarly named ones for the `init_libfuncs'
5111 routine. (See above). */
5114 init_integral_libfuncs (optab optable
, const char *opname
, int suffix
)
5116 int maxsize
= 2*BITS_PER_WORD
;
5117 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5118 maxsize
= LONG_LONG_TYPE_SIZE
;
5119 init_libfuncs (optable
, word_mode
,
5120 mode_for_size (maxsize
, MODE_INT
, 0),
5124 /* Initialize the libfunc fields of an entire group of entries in some
5125 optab which correspond to all real mode operations. The parameters
5126 have the same meaning as similarly named ones for the `init_libfuncs'
5127 routine. (See above). */
5130 init_floating_libfuncs (optab optable
, const char *opname
, int suffix
)
5132 init_libfuncs (optable
, MIN_MODE_FLOAT
, MAX_MODE_FLOAT
, opname
, suffix
);
5135 /* Initialize the libfunc fields of an entire group of entries of an
5136 inter-mode-class conversion optab. The string formation rules are
5137 similar to the ones for init_libfuncs, above, but instead of having
5138 a mode name and an operand count these functions have two mode names
5139 and no operand count. */
5141 init_interclass_conv_libfuncs (convert_optab tab
, const char *opname
,
5142 enum mode_class from_class
,
5143 enum mode_class to_class
)
5145 enum machine_mode first_from_mode
= GET_CLASS_NARROWEST_MODE (from_class
);
5146 enum machine_mode first_to_mode
= GET_CLASS_NARROWEST_MODE (to_class
);
5147 size_t opname_len
= strlen (opname
);
5148 size_t max_mname_len
= 0;
5150 enum machine_mode fmode
, tmode
;
5151 const char *fname
, *tname
;
5153 char *libfunc_name
, *suffix
;
5156 for (fmode
= first_from_mode
;
5158 fmode
= GET_MODE_WIDER_MODE (fmode
))
5159 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (fmode
)));
5161 for (tmode
= first_to_mode
;
5163 tmode
= GET_MODE_WIDER_MODE (tmode
))
5164 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (tmode
)));
5166 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
5167 libfunc_name
[0] = '_';
5168 libfunc_name
[1] = '_';
5169 memcpy (&libfunc_name
[2], opname
, opname_len
);
5170 suffix
= libfunc_name
+ opname_len
+ 2;
5172 for (fmode
= first_from_mode
; fmode
!= VOIDmode
;
5173 fmode
= GET_MODE_WIDER_MODE (fmode
))
5174 for (tmode
= first_to_mode
; tmode
!= VOIDmode
;
5175 tmode
= GET_MODE_WIDER_MODE (tmode
))
5177 fname
= GET_MODE_NAME (fmode
);
5178 tname
= GET_MODE_NAME (tmode
);
5181 for (q
= fname
; *q
; p
++, q
++)
5183 for (q
= tname
; *q
; p
++, q
++)
5188 tab
->handlers
[tmode
][fmode
].libfunc
5189 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
5194 /* Initialize the libfunc fields of an entire group of entries of an
5195 intra-mode-class conversion optab. The string formation rules are
5196 similar to the ones for init_libfunc, above. WIDENING says whether
5197 the optab goes from narrow to wide modes or vice versa. These functions
5198 have two mode names _and_ an operand count. */
5200 init_intraclass_conv_libfuncs (convert_optab tab
, const char *opname
,
5201 enum mode_class
class, bool widening
)
5203 enum machine_mode first_mode
= GET_CLASS_NARROWEST_MODE (class);
5204 size_t opname_len
= strlen (opname
);
5205 size_t max_mname_len
= 0;
5207 enum machine_mode nmode
, wmode
;
5208 const char *nname
, *wname
;
5210 char *libfunc_name
, *suffix
;
5213 for (nmode
= first_mode
; nmode
!= VOIDmode
;
5214 nmode
= GET_MODE_WIDER_MODE (nmode
))
5215 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (nmode
)));
5217 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
5218 libfunc_name
[0] = '_';
5219 libfunc_name
[1] = '_';
5220 memcpy (&libfunc_name
[2], opname
, opname_len
);
5221 suffix
= libfunc_name
+ opname_len
+ 2;
5223 for (nmode
= first_mode
; nmode
!= VOIDmode
;
5224 nmode
= GET_MODE_WIDER_MODE (nmode
))
5225 for (wmode
= GET_MODE_WIDER_MODE (nmode
); wmode
!= VOIDmode
;
5226 wmode
= GET_MODE_WIDER_MODE (wmode
))
5228 nname
= GET_MODE_NAME (nmode
);
5229 wname
= GET_MODE_NAME (wmode
);
5232 for (q
= widening
? nname
: wname
; *q
; p
++, q
++)
5234 for (q
= widening
? wname
: nname
; *q
; p
++, q
++)
5240 tab
->handlers
[widening
? wmode
: nmode
]
5241 [widening
? nmode
: wmode
].libfunc
5242 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
5249 init_one_libfunc (const char *name
)
5253 /* Create a FUNCTION_DECL that can be passed to
5254 targetm.encode_section_info. */
5255 /* ??? We don't have any type information except for this is
5256 a function. Pretend this is "int foo()". */
5257 tree decl
= build_decl (FUNCTION_DECL
, get_identifier (name
),
5258 build_function_type (integer_type_node
, NULL_TREE
));
5259 DECL_ARTIFICIAL (decl
) = 1;
5260 DECL_EXTERNAL (decl
) = 1;
5261 TREE_PUBLIC (decl
) = 1;
5263 symbol
= XEXP (DECL_RTL (decl
), 0);
5265 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5266 are the flags assigned by targetm.encode_section_info. */
5267 SYMBOL_REF_DECL (symbol
) = 0;
5272 /* Call this to reset the function entry for one optab (OPTABLE) in mode
5273 MODE to NAME, which should be either 0 or a string constant. */
5275 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
5278 optable
->handlers
[mode
].libfunc
= init_one_libfunc (name
);
5280 optable
->handlers
[mode
].libfunc
= 0;
5283 /* Call this to reset the function entry for one conversion optab
5284 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
5285 either 0 or a string constant. */
5287 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
5288 enum machine_mode fmode
, const char *name
)
5291 optable
->handlers
[tmode
][fmode
].libfunc
= init_one_libfunc (name
);
5293 optable
->handlers
[tmode
][fmode
].libfunc
= 0;
5296 /* Call this once to initialize the contents of the optabs
5297 appropriately for the current target machine. */
5304 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5306 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5307 setcc_gen_code
[i
] = CODE_FOR_nothing
;
5309 #ifdef HAVE_conditional_move
5310 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5311 movcc_gen_code
[i
] = CODE_FOR_nothing
;
5314 add_optab
= init_optab (PLUS
);
5315 addv_optab
= init_optabv (PLUS
);
5316 sub_optab
= init_optab (MINUS
);
5317 subv_optab
= init_optabv (MINUS
);
5318 smul_optab
= init_optab (MULT
);
5319 smulv_optab
= init_optabv (MULT
);
5320 smul_highpart_optab
= init_optab (UNKNOWN
);
5321 umul_highpart_optab
= init_optab (UNKNOWN
);
5322 smul_widen_optab
= init_optab (UNKNOWN
);
5323 umul_widen_optab
= init_optab (UNKNOWN
);
5324 sdiv_optab
= init_optab (DIV
);
5325 sdivv_optab
= init_optabv (DIV
);
5326 sdivmod_optab
= init_optab (UNKNOWN
);
5327 udiv_optab
= init_optab (UDIV
);
5328 udivmod_optab
= init_optab (UNKNOWN
);
5329 smod_optab
= init_optab (MOD
);
5330 umod_optab
= init_optab (UMOD
);
5331 ftrunc_optab
= init_optab (UNKNOWN
);
5332 and_optab
= init_optab (AND
);
5333 ior_optab
= init_optab (IOR
);
5334 xor_optab
= init_optab (XOR
);
5335 ashl_optab
= init_optab (ASHIFT
);
5336 ashr_optab
= init_optab (ASHIFTRT
);
5337 lshr_optab
= init_optab (LSHIFTRT
);
5338 rotl_optab
= init_optab (ROTATE
);
5339 rotr_optab
= init_optab (ROTATERT
);
5340 smin_optab
= init_optab (SMIN
);
5341 smax_optab
= init_optab (SMAX
);
5342 umin_optab
= init_optab (UMIN
);
5343 umax_optab
= init_optab (UMAX
);
5344 pow_optab
= init_optab (UNKNOWN
);
5345 atan2_optab
= init_optab (UNKNOWN
);
5347 /* These three have codes assigned exclusively for the sake of
5349 mov_optab
= init_optab (SET
);
5350 movstrict_optab
= init_optab (STRICT_LOW_PART
);
5351 cmp_optab
= init_optab (COMPARE
);
5353 ucmp_optab
= init_optab (UNKNOWN
);
5354 tst_optab
= init_optab (UNKNOWN
);
5356 eq_optab
= init_optab (EQ
);
5357 ne_optab
= init_optab (NE
);
5358 gt_optab
= init_optab (GT
);
5359 ge_optab
= init_optab (GE
);
5360 lt_optab
= init_optab (LT
);
5361 le_optab
= init_optab (LE
);
5362 unord_optab
= init_optab (UNORDERED
);
5364 neg_optab
= init_optab (NEG
);
5365 negv_optab
= init_optabv (NEG
);
5366 abs_optab
= init_optab (ABS
);
5367 absv_optab
= init_optabv (ABS
);
5368 addcc_optab
= init_optab (UNKNOWN
);
5369 one_cmpl_optab
= init_optab (NOT
);
5370 ffs_optab
= init_optab (FFS
);
5371 clz_optab
= init_optab (CLZ
);
5372 ctz_optab
= init_optab (CTZ
);
5373 popcount_optab
= init_optab (POPCOUNT
);
5374 parity_optab
= init_optab (PARITY
);
5375 sqrt_optab
= init_optab (SQRT
);
5376 floor_optab
= init_optab (UNKNOWN
);
5377 ceil_optab
= init_optab (UNKNOWN
);
5378 round_optab
= init_optab (UNKNOWN
);
5379 btrunc_optab
= init_optab (UNKNOWN
);
5380 nearbyint_optab
= init_optab (UNKNOWN
);
5381 sincos_optab
= init_optab (UNKNOWN
);
5382 sin_optab
= init_optab (UNKNOWN
);
5383 asin_optab
= init_optab (UNKNOWN
);
5384 cos_optab
= init_optab (UNKNOWN
);
5385 acos_optab
= init_optab (UNKNOWN
);
5386 exp_optab
= init_optab (UNKNOWN
);
5387 exp10_optab
= init_optab (UNKNOWN
);
5388 exp2_optab
= init_optab (UNKNOWN
);
5389 expm1_optab
= init_optab (UNKNOWN
);
5390 logb_optab
= init_optab (UNKNOWN
);
5391 ilogb_optab
= init_optab (UNKNOWN
);
5392 log_optab
= init_optab (UNKNOWN
);
5393 log10_optab
= init_optab (UNKNOWN
);
5394 log2_optab
= init_optab (UNKNOWN
);
5395 tan_optab
= init_optab (UNKNOWN
);
5396 atan_optab
= init_optab (UNKNOWN
);
5397 strlen_optab
= init_optab (UNKNOWN
);
5398 cbranch_optab
= init_optab (UNKNOWN
);
5399 cmov_optab
= init_optab (UNKNOWN
);
5400 cstore_optab
= init_optab (UNKNOWN
);
5401 push_optab
= init_optab (UNKNOWN
);
5403 vec_extract_optab
= init_optab (UNKNOWN
);
5404 vec_set_optab
= init_optab (UNKNOWN
);
5405 vec_init_optab
= init_optab (UNKNOWN
);
5407 sext_optab
= init_convert_optab (SIGN_EXTEND
);
5408 zext_optab
= init_convert_optab (ZERO_EXTEND
);
5409 trunc_optab
= init_convert_optab (TRUNCATE
);
5410 sfix_optab
= init_convert_optab (FIX
);
5411 ufix_optab
= init_convert_optab (UNSIGNED_FIX
);
5412 sfixtrunc_optab
= init_convert_optab (UNKNOWN
);
5413 ufixtrunc_optab
= init_convert_optab (UNKNOWN
);
5414 sfloat_optab
= init_convert_optab (FLOAT
);
5415 ufloat_optab
= init_convert_optab (UNSIGNED_FLOAT
);
5417 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5419 movstr_optab
[i
] = CODE_FOR_nothing
;
5420 clrstr_optab
[i
] = CODE_FOR_nothing
;
5421 cmpstr_optab
[i
] = CODE_FOR_nothing
;
5422 cmpmem_optab
[i
] = CODE_FOR_nothing
;
5424 #ifdef HAVE_SECONDARY_RELOADS
5425 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
5429 /* Fill in the optabs with the insns we support. */
5432 /* Initialize the optabs with the names of the library functions. */
5433 init_integral_libfuncs (add_optab
, "add", '3');
5434 init_floating_libfuncs (add_optab
, "add", '3');
5435 init_integral_libfuncs (addv_optab
, "addv", '3');
5436 init_floating_libfuncs (addv_optab
, "add", '3');
5437 init_integral_libfuncs (sub_optab
, "sub", '3');
5438 init_floating_libfuncs (sub_optab
, "sub", '3');
5439 init_integral_libfuncs (subv_optab
, "subv", '3');
5440 init_floating_libfuncs (subv_optab
, "sub", '3');
5441 init_integral_libfuncs (smul_optab
, "mul", '3');
5442 init_floating_libfuncs (smul_optab
, "mul", '3');
5443 init_integral_libfuncs (smulv_optab
, "mulv", '3');
5444 init_floating_libfuncs (smulv_optab
, "mul", '3');
5445 init_integral_libfuncs (sdiv_optab
, "div", '3');
5446 init_floating_libfuncs (sdiv_optab
, "div", '3');
5447 init_integral_libfuncs (sdivv_optab
, "divv", '3');
5448 init_integral_libfuncs (udiv_optab
, "udiv", '3');
5449 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
5450 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
5451 init_integral_libfuncs (smod_optab
, "mod", '3');
5452 init_integral_libfuncs (umod_optab
, "umod", '3');
5453 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
5454 init_integral_libfuncs (and_optab
, "and", '3');
5455 init_integral_libfuncs (ior_optab
, "ior", '3');
5456 init_integral_libfuncs (xor_optab
, "xor", '3');
5457 init_integral_libfuncs (ashl_optab
, "ashl", '3');
5458 init_integral_libfuncs (ashr_optab
, "ashr", '3');
5459 init_integral_libfuncs (lshr_optab
, "lshr", '3');
5460 init_integral_libfuncs (smin_optab
, "min", '3');
5461 init_floating_libfuncs (smin_optab
, "min", '3');
5462 init_integral_libfuncs (smax_optab
, "max", '3');
5463 init_floating_libfuncs (smax_optab
, "max", '3');
5464 init_integral_libfuncs (umin_optab
, "umin", '3');
5465 init_integral_libfuncs (umax_optab
, "umax", '3');
5466 init_integral_libfuncs (neg_optab
, "neg", '2');
5467 init_floating_libfuncs (neg_optab
, "neg", '2');
5468 init_integral_libfuncs (negv_optab
, "negv", '2');
5469 init_floating_libfuncs (negv_optab
, "neg", '2');
5470 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
5471 init_integral_libfuncs (ffs_optab
, "ffs", '2');
5472 init_integral_libfuncs (clz_optab
, "clz", '2');
5473 init_integral_libfuncs (ctz_optab
, "ctz", '2');
5474 init_integral_libfuncs (popcount_optab
, "popcount", '2');
5475 init_integral_libfuncs (parity_optab
, "parity", '2');
5477 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5478 init_integral_libfuncs (cmp_optab
, "cmp", '2');
5479 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
5480 init_floating_libfuncs (cmp_optab
, "cmp", '2');
5482 /* EQ etc are floating point only. */
5483 init_floating_libfuncs (eq_optab
, "eq", '2');
5484 init_floating_libfuncs (ne_optab
, "ne", '2');
5485 init_floating_libfuncs (gt_optab
, "gt", '2');
5486 init_floating_libfuncs (ge_optab
, "ge", '2');
5487 init_floating_libfuncs (lt_optab
, "lt", '2');
5488 init_floating_libfuncs (le_optab
, "le", '2');
5489 init_floating_libfuncs (unord_optab
, "unord", '2');
5492 init_interclass_conv_libfuncs (sfloat_optab
, "float", MODE_INT
, MODE_FLOAT
);
5493 init_interclass_conv_libfuncs (sfix_optab
, "fix", MODE_FLOAT
, MODE_INT
);
5494 init_interclass_conv_libfuncs (ufix_optab
, "fixuns", MODE_FLOAT
, MODE_INT
);
5496 /* sext_optab is also used for FLOAT_EXTEND. */
5497 init_intraclass_conv_libfuncs (sext_optab
, "extend", MODE_FLOAT
, true);
5498 init_intraclass_conv_libfuncs (trunc_optab
, "trunc", MODE_FLOAT
, false);
5500 /* Use cabs for double complex abs, since systems generally have cabs.
5501 Don't define any libcall for float complex, so that cabs will be used. */
5502 if (complex_double_type_node
)
5503 abs_optab
->handlers
[TYPE_MODE (complex_double_type_node
)].libfunc
5504 = init_one_libfunc ("cabs");
5506 /* The ffs function operates on `int'. */
5507 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
5508 = init_one_libfunc ("ffs");
5510 abort_libfunc
= init_one_libfunc ("abort");
5511 memcpy_libfunc
= init_one_libfunc ("memcpy");
5512 memmove_libfunc
= init_one_libfunc ("memmove");
5513 bcopy_libfunc
= init_one_libfunc ("bcopy");
5514 memcmp_libfunc
= init_one_libfunc ("memcmp");
5515 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
5516 memset_libfunc
= init_one_libfunc ("memset");
5517 bzero_libfunc
= init_one_libfunc ("bzero");
5518 setbits_libfunc
= init_one_libfunc ("__setbits");
5520 unwind_resume_libfunc
= init_one_libfunc (USING_SJLJ_EXCEPTIONS
5521 ? "_Unwind_SjLj_Resume"
5522 : "_Unwind_Resume");
5523 #ifndef DONT_USE_BUILTIN_SETJMP
5524 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
5525 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
5527 setjmp_libfunc
= init_one_libfunc ("setjmp");
5528 longjmp_libfunc
= init_one_libfunc ("longjmp");
5530 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
5531 unwind_sjlj_unregister_libfunc
5532 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5534 /* For function entry/exit instrumentation. */
5535 profile_function_entry_libfunc
5536 = init_one_libfunc ("__cyg_profile_func_enter");
5537 profile_function_exit_libfunc
5538 = init_one_libfunc ("__cyg_profile_func_exit");
5540 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
5541 gcov_init_libfunc
= init_one_libfunc ("__gcov_init");
5543 if (HAVE_conditional_trap
)
5544 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
5546 /* Allow the target to add more libcalls or rename some, etc. */
5547 targetm
.init_libfuncs ();
5550 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5551 CODE. Return 0 on failure. */
5554 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED
, rtx op1
,
5555 rtx op2 ATTRIBUTE_UNUSED
, rtx tcode ATTRIBUTE_UNUSED
)
5557 enum machine_mode mode
= GET_MODE (op1
);
5558 enum insn_code icode
;
5561 if (!HAVE_conditional_trap
)
5564 if (mode
== VOIDmode
)
5567 icode
= cmp_optab
->handlers
[(int) mode
].insn_code
;
5568 if (icode
== CODE_FOR_nothing
)
5572 op1
= prepare_operand (icode
, op1
, 0, mode
, mode
, 0);
5573 op2
= prepare_operand (icode
, op2
, 1, mode
, mode
, 0);
5579 emit_insn (GEN_FCN (icode
) (op1
, op2
));
5581 PUT_CODE (trap_rtx
, code
);
5582 insn
= gen_conditional_trap (trap_rtx
, tcode
);
5586 insn
= get_insns ();
5593 #include "gt-optabs.h"