1 /* Expand the basic unary and binary arithmetic operations, for GNU compiler.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
29 /* Include insn-config.h before expr.h so that HAVE_conditional_move
30 is properly defined. */
31 #include "insn-config.h"
45 #include "basic-block.h"
48 /* Each optab contains info on how this target machine
49 can perform a particular operation
50 for all sizes and kinds of operands.
52 The operation to be performed is often specified
53 by passing one of these optabs as an argument.
55 See expr.h for documentation of these optabs. */
57 optab optab_table
[OTI_MAX
];
59 rtx libfunc_table
[LTI_MAX
];
61 /* Tables of patterns for converting one mode to another. */
62 convert_optab convert_optab_table
[CTI_MAX
];
64 /* Contains the optab used for each rtx code. */
65 optab code_to_optab
[NUM_RTX_CODE
+ 1];
67 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
68 gives the gen_function to make a branch to test that condition. */
70 rtxfun bcc_gen_fctn
[NUM_RTX_CODE
];
72 /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
73 gives the insn code to make a store-condition insn
74 to test that condition. */
76 enum insn_code setcc_gen_code
[NUM_RTX_CODE
];
78 #ifdef HAVE_conditional_move
79 /* Indexed by the machine mode, gives the insn code to make a conditional
80 move insn. This is not indexed by the rtx-code like bcc_gen_fctn and
81 setcc_gen_code to cut down on the number of named patterns. Consider a day
82 when a lot more rtx codes are conditional (eg: for the ARM). */
84 enum insn_code movcc_gen_code
[NUM_MACHINE_MODES
];
87 /* The insn generating function can not take an rtx_code argument.
88 TRAP_RTX is used as an rtx argument. Its code is replaced with
89 the code to be used in the trap insn and all other fields are ignored. */
90 static GTY(()) rtx trap_rtx
;
92 static int add_equal_note (rtx
, rtx
, enum rtx_code
, rtx
, rtx
);
93 static rtx
widen_operand (rtx
, enum machine_mode
, enum machine_mode
, int,
95 static int expand_cmplxdiv_straight (rtx
, rtx
, rtx
, rtx
, rtx
, rtx
,
96 enum machine_mode
, int,
97 enum optab_methods
, enum mode_class
,
99 static int expand_cmplxdiv_wide (rtx
, rtx
, rtx
, rtx
, rtx
, rtx
,
100 enum machine_mode
, int, enum optab_methods
,
101 enum mode_class
, optab
);
102 static void prepare_cmp_insn (rtx
*, rtx
*, enum rtx_code
*, rtx
,
103 enum machine_mode
*, int *,
104 enum can_compare_purpose
);
105 static enum insn_code
can_fix_p (enum machine_mode
, enum machine_mode
, int,
107 static enum insn_code
can_float_p (enum machine_mode
, enum machine_mode
, int);
108 static rtx
ftruncify (rtx
);
109 static optab
new_optab (void);
110 static convert_optab
new_convert_optab (void);
111 static inline optab
init_optab (enum rtx_code
);
112 static inline optab
init_optabv (enum rtx_code
);
113 static inline convert_optab
init_convert_optab (enum rtx_code
);
114 static void init_libfuncs (optab
, int, int, const char *, int);
115 static void init_integral_libfuncs (optab
, const char *, int);
116 static void init_floating_libfuncs (optab
, const char *, int);
117 static void init_interclass_conv_libfuncs (convert_optab
, const char *,
118 enum mode_class
, enum mode_class
);
119 static void init_intraclass_conv_libfuncs (convert_optab
, const char *,
120 enum mode_class
, bool);
121 static void emit_cmp_and_jump_insn_1 (rtx
, rtx
, enum machine_mode
,
122 enum rtx_code
, int, rtx
);
123 static void prepare_float_lib_cmp (rtx
*, rtx
*, enum rtx_code
*,
124 enum machine_mode
*, int *);
125 static rtx
expand_vector_binop (enum machine_mode
, optab
, rtx
, rtx
, rtx
, int,
127 static rtx
expand_vector_unop (enum machine_mode
, optab
, rtx
, rtx
, int);
128 static rtx
widen_clz (enum machine_mode
, rtx
, rtx
);
129 static rtx
expand_parity (enum machine_mode
, rtx
, rtx
);
131 #ifndef HAVE_conditional_trap
132 #define HAVE_conditional_trap 0
133 #define gen_conditional_trap(a,b) (abort (), NULL_RTX)
136 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
137 the result of operation CODE applied to OP0 (and OP1 if it is a binary
140 If the last insn does not set TARGET, don't do anything, but return 1.
142 If a previous insn sets TARGET and TARGET is one of OP0 or OP1,
143 don't add the REG_EQUAL note but return 0. Our caller can then try
144 again, ensuring that TARGET is not one of the operands. */
147 add_equal_note (rtx insns
, rtx target
, enum rtx_code code
, rtx op0
, rtx op1
)
149 rtx last_insn
, insn
, set
;
154 || NEXT_INSN (insns
) == NULL_RTX
)
157 if (GET_RTX_CLASS (code
) != '1' && GET_RTX_CLASS (code
) != '2'
158 && GET_RTX_CLASS (code
) != 'c' && GET_RTX_CLASS (code
) != '<')
161 if (GET_CODE (target
) == ZERO_EXTRACT
)
164 for (last_insn
= insns
;
165 NEXT_INSN (last_insn
) != NULL_RTX
;
166 last_insn
= NEXT_INSN (last_insn
))
169 set
= single_set (last_insn
);
173 if (! rtx_equal_p (SET_DEST (set
), target
)
174 /* For a STRICT_LOW_PART, the REG_NOTE applies to what is inside it. */
175 && (GET_CODE (SET_DEST (set
)) != STRICT_LOW_PART
176 || ! rtx_equal_p (XEXP (SET_DEST (set
), 0), target
)))
179 /* If TARGET is in OP0 or OP1, check if anything in SEQ sets TARGET
180 besides the last insn. */
181 if (reg_overlap_mentioned_p (target
, op0
)
182 || (op1
&& reg_overlap_mentioned_p (target
, op1
)))
184 insn
= PREV_INSN (last_insn
);
185 while (insn
!= NULL_RTX
)
187 if (reg_set_p (target
, insn
))
190 insn
= PREV_INSN (insn
);
194 if (GET_RTX_CLASS (code
) == '1')
195 note
= gen_rtx_fmt_e (code
, GET_MODE (target
), copy_rtx (op0
));
197 note
= gen_rtx_fmt_ee (code
, GET_MODE (target
), copy_rtx (op0
), copy_rtx (op1
));
199 set_unique_reg_note (last_insn
, REG_EQUAL
, note
);
204 /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP
205 says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need
206 not actually do a sign-extend or zero-extend, but can leave the
207 higher-order bits of the result rtx undefined, for example, in the case
208 of logical operations, but not right shifts. */
211 widen_operand (rtx op
, enum machine_mode mode
, enum machine_mode oldmode
,
212 int unsignedp
, int no_extend
)
216 /* If we don't have to extend and this is a constant, return it. */
217 if (no_extend
&& GET_MODE (op
) == VOIDmode
)
220 /* If we must extend do so. If OP is a SUBREG for a promoted object, also
221 extend since it will be more efficient to do so unless the signedness of
222 a promoted object differs from our extension. */
224 || (GET_CODE (op
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (op
)
225 && SUBREG_PROMOTED_UNSIGNED_P (op
) == unsignedp
))
226 return convert_modes (mode
, oldmode
, op
, unsignedp
);
228 /* If MODE is no wider than a single word, we return a paradoxical
230 if (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
)
231 return gen_rtx_SUBREG (mode
, force_reg (GET_MODE (op
), op
), 0);
233 /* Otherwise, get an object of MODE, clobber it, and set the low-order
236 result
= gen_reg_rtx (mode
);
237 emit_insn (gen_rtx_CLOBBER (VOIDmode
, result
));
238 emit_move_insn (gen_lowpart (GET_MODE (op
), result
), op
);
242 /* Generate code to perform a straightforward complex divide. */
245 expand_cmplxdiv_straight (rtx real0
, rtx real1
, rtx imag0
, rtx imag1
,
246 rtx realr
, rtx imagr
, enum machine_mode submode
,
247 int unsignedp
, enum optab_methods methods
,
248 enum mode_class
class, optab binoptab
)
254 optab this_add_optab
= add_optab
;
255 optab this_sub_optab
= sub_optab
;
256 optab this_neg_optab
= neg_optab
;
257 optab this_mul_optab
= smul_optab
;
259 if (binoptab
== sdivv_optab
)
261 this_add_optab
= addv_optab
;
262 this_sub_optab
= subv_optab
;
263 this_neg_optab
= negv_optab
;
264 this_mul_optab
= smulv_optab
;
267 /* Don't fetch these from memory more than once. */
268 real0
= force_reg (submode
, real0
);
269 real1
= force_reg (submode
, real1
);
272 imag0
= force_reg (submode
, imag0
);
274 imag1
= force_reg (submode
, imag1
);
276 /* Divisor: c*c + d*d. */
277 temp1
= expand_binop (submode
, this_mul_optab
, real1
, real1
,
278 NULL_RTX
, unsignedp
, methods
);
280 temp2
= expand_binop (submode
, this_mul_optab
, imag1
, imag1
,
281 NULL_RTX
, unsignedp
, methods
);
283 if (temp1
== 0 || temp2
== 0)
286 divisor
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
287 NULL_RTX
, unsignedp
, methods
);
293 /* Mathematically, ((a)(c-id))/divisor. */
294 /* Computationally, (a+i0) / (c+id) = (ac/(cc+dd)) + i(-ad/(cc+dd)). */
296 /* Calculate the dividend. */
297 real_t
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
298 NULL_RTX
, unsignedp
, methods
);
300 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
301 NULL_RTX
, unsignedp
, methods
);
303 if (real_t
== 0 || imag_t
== 0)
306 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
307 NULL_RTX
, unsignedp
);
311 /* Mathematically, ((a+ib)(c-id))/divider. */
312 /* Calculate the dividend. */
313 temp1
= expand_binop (submode
, this_mul_optab
, real0
, real1
,
314 NULL_RTX
, unsignedp
, methods
);
316 temp2
= expand_binop (submode
, this_mul_optab
, imag0
, imag1
,
317 NULL_RTX
, unsignedp
, methods
);
319 if (temp1
== 0 || temp2
== 0)
322 real_t
= expand_binop (submode
, this_add_optab
, temp1
, temp2
,
323 NULL_RTX
, unsignedp
, methods
);
325 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, real1
,
326 NULL_RTX
, unsignedp
, methods
);
328 temp2
= expand_binop (submode
, this_mul_optab
, real0
, imag1
,
329 NULL_RTX
, unsignedp
, methods
);
331 if (temp1
== 0 || temp2
== 0)
334 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, temp2
,
335 NULL_RTX
, unsignedp
, methods
);
337 if (real_t
== 0 || imag_t
== 0)
341 if (class == MODE_COMPLEX_FLOAT
)
342 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
343 realr
, unsignedp
, methods
);
345 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
346 real_t
, divisor
, realr
, unsignedp
);
352 emit_move_insn (realr
, res
);
354 if (class == MODE_COMPLEX_FLOAT
)
355 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
356 imagr
, unsignedp
, methods
);
358 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
359 imag_t
, divisor
, imagr
, unsignedp
);
365 emit_move_insn (imagr
, res
);
370 /* Generate code to perform a wide-input-range-acceptable complex divide. */
373 expand_cmplxdiv_wide (rtx real0
, rtx real1
, rtx imag0
, rtx imag1
, rtx realr
,
374 rtx imagr
, enum machine_mode submode
, int unsignedp
,
375 enum optab_methods methods
, enum mode_class
class,
380 rtx temp1
, temp2
, lab1
, lab2
;
381 enum machine_mode mode
;
383 optab this_add_optab
= add_optab
;
384 optab this_sub_optab
= sub_optab
;
385 optab this_neg_optab
= neg_optab
;
386 optab this_mul_optab
= smul_optab
;
388 if (binoptab
== sdivv_optab
)
390 this_add_optab
= addv_optab
;
391 this_sub_optab
= subv_optab
;
392 this_neg_optab
= negv_optab
;
393 this_mul_optab
= smulv_optab
;
396 /* Don't fetch these from memory more than once. */
397 real0
= force_reg (submode
, real0
);
398 real1
= force_reg (submode
, real1
);
401 imag0
= force_reg (submode
, imag0
);
403 imag1
= force_reg (submode
, imag1
);
405 /* XXX What's an "unsigned" complex number? */
413 temp1
= expand_abs (submode
, real1
, NULL_RTX
, unsignedp
, 1);
414 temp2
= expand_abs (submode
, imag1
, NULL_RTX
, unsignedp
, 1);
417 if (temp1
== 0 || temp2
== 0)
420 mode
= GET_MODE (temp1
);
421 lab1
= gen_label_rtx ();
422 emit_cmp_and_jump_insns (temp1
, temp2
, LT
, NULL_RTX
,
423 mode
, unsignedp
, lab1
);
425 /* |c| >= |d|; use ratio d/c to scale dividend and divisor. */
427 if (class == MODE_COMPLEX_FLOAT
)
428 ratio
= expand_binop (submode
, binoptab
, imag1
, real1
,
429 NULL_RTX
, unsignedp
, methods
);
431 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
432 imag1
, real1
, NULL_RTX
, unsignedp
);
437 /* Calculate divisor. */
439 temp1
= expand_binop (submode
, this_mul_optab
, imag1
, ratio
,
440 NULL_RTX
, unsignedp
, methods
);
445 divisor
= expand_binop (submode
, this_add_optab
, temp1
, real1
,
446 NULL_RTX
, unsignedp
, methods
);
451 /* Calculate dividend. */
457 /* Compute a / (c+id) as a / (c+d(d/c)) + i (-a(d/c)) / (c+d(d/c)). */
459 imag_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
460 NULL_RTX
, unsignedp
, methods
);
465 imag_t
= expand_unop (submode
, this_neg_optab
, imag_t
,
466 NULL_RTX
, unsignedp
);
468 if (real_t
== 0 || imag_t
== 0)
473 /* Compute (a+ib)/(c+id) as
474 (a+b(d/c))/(c+d(d/c) + i(b-a(d/c))/(c+d(d/c)). */
476 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
477 NULL_RTX
, unsignedp
, methods
);
482 real_t
= expand_binop (submode
, this_add_optab
, temp1
, real0
,
483 NULL_RTX
, unsignedp
, methods
);
485 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
486 NULL_RTX
, unsignedp
, methods
);
491 imag_t
= expand_binop (submode
, this_sub_optab
, imag0
, temp1
,
492 NULL_RTX
, unsignedp
, methods
);
494 if (real_t
== 0 || imag_t
== 0)
498 if (class == MODE_COMPLEX_FLOAT
)
499 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
500 realr
, unsignedp
, methods
);
502 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
503 real_t
, divisor
, realr
, unsignedp
);
509 emit_move_insn (realr
, res
);
511 if (class == MODE_COMPLEX_FLOAT
)
512 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
513 imagr
, unsignedp
, methods
);
515 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
516 imag_t
, divisor
, imagr
, unsignedp
);
522 emit_move_insn (imagr
, res
);
524 lab2
= gen_label_rtx ();
525 emit_jump_insn (gen_jump (lab2
));
530 /* |d| > |c|; use ratio c/d to scale dividend and divisor. */
532 if (class == MODE_COMPLEX_FLOAT
)
533 ratio
= expand_binop (submode
, binoptab
, real1
, imag1
,
534 NULL_RTX
, unsignedp
, methods
);
536 ratio
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
537 real1
, imag1
, NULL_RTX
, unsignedp
);
542 /* Calculate divisor. */
544 temp1
= expand_binop (submode
, this_mul_optab
, real1
, ratio
,
545 NULL_RTX
, unsignedp
, methods
);
550 divisor
= expand_binop (submode
, this_add_optab
, temp1
, imag1
,
551 NULL_RTX
, unsignedp
, methods
);
556 /* Calculate dividend. */
560 /* Compute a / (c+id) as a(c/d) / (c(c/d)+d) + i (-a) / (c(c/d)+d). */
562 real_t
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
563 NULL_RTX
, unsignedp
, methods
);
565 imag_t
= expand_unop (submode
, this_neg_optab
, real0
,
566 NULL_RTX
, unsignedp
);
568 if (real_t
== 0 || imag_t
== 0)
573 /* Compute (a+ib)/(c+id) as
574 (a(c/d)+b)/(c(c/d)+d) + i (b(c/d)-a)/(c(c/d)+d). */
576 temp1
= expand_binop (submode
, this_mul_optab
, real0
, ratio
,
577 NULL_RTX
, unsignedp
, methods
);
582 real_t
= expand_binop (submode
, this_add_optab
, temp1
, imag0
,
583 NULL_RTX
, unsignedp
, methods
);
585 temp1
= expand_binop (submode
, this_mul_optab
, imag0
, ratio
,
586 NULL_RTX
, unsignedp
, methods
);
591 imag_t
= expand_binop (submode
, this_sub_optab
, temp1
, real0
,
592 NULL_RTX
, unsignedp
, methods
);
594 if (real_t
== 0 || imag_t
== 0)
598 if (class == MODE_COMPLEX_FLOAT
)
599 res
= expand_binop (submode
, binoptab
, real_t
, divisor
,
600 realr
, unsignedp
, methods
);
602 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
603 real_t
, divisor
, realr
, unsignedp
);
609 emit_move_insn (realr
, res
);
611 if (class == MODE_COMPLEX_FLOAT
)
612 res
= expand_binop (submode
, binoptab
, imag_t
, divisor
,
613 imagr
, unsignedp
, methods
);
615 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
616 imag_t
, divisor
, imagr
, unsignedp
);
622 emit_move_insn (imagr
, res
);
629 /* Wrapper around expand_binop which takes an rtx code to specify
630 the operation to perform, not an optab pointer. All other
631 arguments are the same. */
633 expand_simple_binop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
634 rtx op1
, rtx target
, int unsignedp
,
635 enum optab_methods methods
)
637 optab binop
= code_to_optab
[(int) code
];
641 return expand_binop (mode
, binop
, op0
, op1
, target
, unsignedp
, methods
);
644 /* Generate code to perform an operation specified by BINOPTAB
645 on operands OP0 and OP1, with result having machine-mode MODE.
647 UNSIGNEDP is for the case where we have to widen the operands
648 to perform the operation. It says to use zero-extension.
650 If TARGET is nonzero, the value
651 is generated there, if it is convenient to do so.
652 In all cases an rtx is returned for the locus of the value;
653 this may or may not be TARGET. */
656 expand_binop (enum machine_mode mode
, optab binoptab
, rtx op0
, rtx op1
,
657 rtx target
, int unsignedp
, enum optab_methods methods
)
659 enum optab_methods next_methods
660 = (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
661 ? OPTAB_WIDEN
: methods
);
662 enum mode_class
class;
663 enum machine_mode wider_mode
;
665 int commutative_op
= 0;
666 int shift_op
= (binoptab
->code
== ASHIFT
667 || binoptab
->code
== ASHIFTRT
668 || binoptab
->code
== LSHIFTRT
669 || binoptab
->code
== ROTATE
670 || binoptab
->code
== ROTATERT
);
671 rtx entry_last
= get_last_insn ();
674 class = GET_MODE_CLASS (mode
);
676 op0
= protect_from_queue (op0
, 0);
677 op1
= protect_from_queue (op1
, 0);
679 target
= protect_from_queue (target
, 1);
683 /* Load duplicate non-volatile operands once. */
684 if (rtx_equal_p (op0
, op1
) && ! volatile_refs_p (op0
))
686 op0
= force_not_mem (op0
);
691 op0
= force_not_mem (op0
);
692 op1
= force_not_mem (op1
);
696 /* If subtracting an integer constant, convert this into an addition of
697 the negated constant. */
699 if (binoptab
== sub_optab
&& GET_CODE (op1
) == CONST_INT
)
701 op1
= negate_rtx (mode
, op1
);
702 binoptab
= add_optab
;
705 /* If we are inside an appropriately-short loop and one operand is an
706 expensive constant, force it into a register. */
707 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
708 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
709 op0
= force_reg (mode
, op0
);
711 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
712 && ! shift_op
&& rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
713 op1
= force_reg (mode
, op1
);
715 /* Record where to delete back to if we backtrack. */
716 last
= get_last_insn ();
718 /* If operation is commutative,
719 try to make the first operand a register.
720 Even better, try to make it the same as the target.
721 Also try to make the last operand a constant. */
722 if (GET_RTX_CLASS (binoptab
->code
) == 'c'
723 || binoptab
== smul_widen_optab
724 || binoptab
== umul_widen_optab
725 || binoptab
== smul_highpart_optab
726 || binoptab
== umul_highpart_optab
)
730 if (((target
== 0 || GET_CODE (target
) == REG
)
731 ? ((GET_CODE (op1
) == REG
732 && GET_CODE (op0
) != REG
)
734 : rtx_equal_p (op1
, target
))
735 || GET_CODE (op0
) == CONST_INT
)
743 /* If we can do it with a three-operand insn, do so. */
745 if (methods
!= OPTAB_MUST_WIDEN
746 && binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
748 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
749 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
750 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
752 rtx xop0
= op0
, xop1
= op1
;
757 temp
= gen_reg_rtx (mode
);
759 /* If it is a commutative operator and the modes would match
760 if we would swap the operands, we can save the conversions. */
763 if (GET_MODE (op0
) != mode0
&& GET_MODE (op1
) != mode1
764 && GET_MODE (op0
) == mode1
&& GET_MODE (op1
) == mode0
)
768 tmp
= op0
; op0
= op1
; op1
= tmp
;
769 tmp
= xop0
; xop0
= xop1
; xop1
= tmp
;
773 /* In case the insn wants input operands in modes different from
774 those of the actual operands, convert the operands. It would
775 seem that we don't need to convert CONST_INTs, but we do, so
776 that they're properly zero-extended, sign-extended or truncated
779 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
780 xop0
= convert_modes (mode0
,
781 GET_MODE (op0
) != VOIDmode
786 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
787 xop1
= convert_modes (mode1
,
788 GET_MODE (op1
) != VOIDmode
793 /* Now, if insn's predicates don't allow our operands, put them into
796 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
)
797 && mode0
!= VOIDmode
)
798 xop0
= copy_to_mode_reg (mode0
, xop0
);
800 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
)
801 && mode1
!= VOIDmode
)
802 xop1
= copy_to_mode_reg (mode1
, xop1
);
804 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
805 temp
= gen_reg_rtx (mode
);
807 pat
= GEN_FCN (icode
) (temp
, xop0
, xop1
);
810 /* If PAT is composed of more than one insn, try to add an appropriate
811 REG_EQUAL note to it. If we can't because TEMP conflicts with an
812 operand, call ourselves again, this time without a target. */
813 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
814 && ! add_equal_note (pat
, temp
, binoptab
->code
, xop0
, xop1
))
816 delete_insns_since (last
);
817 return expand_binop (mode
, binoptab
, op0
, op1
, NULL_RTX
,
825 delete_insns_since (last
);
828 /* If this is a multiply, see if we can do a widening operation that
829 takes operands of this mode and makes a wider mode. */
831 if (binoptab
== smul_optab
&& GET_MODE_WIDER_MODE (mode
) != VOIDmode
832 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
833 ->handlers
[(int) GET_MODE_WIDER_MODE (mode
)].insn_code
)
834 != CODE_FOR_nothing
))
836 temp
= expand_binop (GET_MODE_WIDER_MODE (mode
),
837 unsignedp
? umul_widen_optab
: smul_widen_optab
,
838 op0
, op1
, NULL_RTX
, unsignedp
, OPTAB_DIRECT
);
842 if (GET_MODE_CLASS (mode
) == MODE_INT
)
843 return gen_lowpart (mode
, temp
);
845 return convert_to_mode (mode
, temp
, unsignedp
);
849 /* Look for a wider mode of the same class for which we think we
850 can open-code the operation. Check for a widening multiply at the
851 wider mode as well. */
853 if ((class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
854 && methods
!= OPTAB_DIRECT
&& methods
!= OPTAB_LIB
)
855 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
856 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
858 if (binoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
859 || (binoptab
== smul_optab
860 && GET_MODE_WIDER_MODE (wider_mode
) != VOIDmode
861 && (((unsignedp
? umul_widen_optab
: smul_widen_optab
)
862 ->handlers
[(int) GET_MODE_WIDER_MODE (wider_mode
)].insn_code
)
863 != CODE_FOR_nothing
)))
865 rtx xop0
= op0
, xop1
= op1
;
868 /* For certain integer operations, we need not actually extend
869 the narrow operands, as long as we will truncate
870 the results to the same narrowness. */
872 if ((binoptab
== ior_optab
|| binoptab
== and_optab
873 || binoptab
== xor_optab
874 || binoptab
== add_optab
|| binoptab
== sub_optab
875 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
876 && class == MODE_INT
)
879 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
, no_extend
);
881 /* The second operand of a shift must always be extended. */
882 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
883 no_extend
&& binoptab
!= ashl_optab
);
885 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
886 unsignedp
, OPTAB_DIRECT
);
889 if (class != MODE_INT
)
892 target
= gen_reg_rtx (mode
);
893 convert_move (target
, temp
, 0);
897 return gen_lowpart (mode
, temp
);
900 delete_insns_since (last
);
904 /* These can be done a word at a time. */
905 if ((binoptab
== and_optab
|| binoptab
== ior_optab
|| binoptab
== xor_optab
)
907 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
908 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
914 /* If TARGET is the same as one of the operands, the REG_EQUAL note
915 won't be accurate, so use a new target. */
916 if (target
== 0 || target
== op0
|| target
== op1
)
917 target
= gen_reg_rtx (mode
);
921 /* Do the actual arithmetic. */
922 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
924 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
925 rtx x
= expand_binop (word_mode
, binoptab
,
926 operand_subword_force (op0
, i
, mode
),
927 operand_subword_force (op1
, i
, mode
),
928 target_piece
, unsignedp
, next_methods
);
933 if (target_piece
!= x
)
934 emit_move_insn (target_piece
, x
);
937 insns
= get_insns ();
940 if (i
== GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
)
942 if (binoptab
->code
!= UNKNOWN
)
944 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
945 copy_rtx (op0
), copy_rtx (op1
));
949 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
954 /* Synthesize double word shifts from single word shifts. */
955 if ((binoptab
== lshr_optab
|| binoptab
== ashl_optab
956 || binoptab
== ashr_optab
)
958 && GET_CODE (op1
) == CONST_INT
959 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
960 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
961 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
962 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
964 rtx insns
, inter
, equiv_value
;
965 rtx into_target
, outof_target
;
966 rtx into_input
, outof_input
;
967 int shift_count
, left_shift
, outof_word
;
969 /* If TARGET is the same as one of the operands, the REG_EQUAL note
970 won't be accurate, so use a new target. */
971 if (target
== 0 || target
== op0
|| target
== op1
)
972 target
= gen_reg_rtx (mode
);
976 shift_count
= INTVAL (op1
);
978 /* OUTOF_* is the word we are shifting bits away from, and
979 INTO_* is the word that we are shifting bits towards, thus
980 they differ depending on the direction of the shift and
983 left_shift
= binoptab
== ashl_optab
;
984 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
986 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
987 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
989 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
990 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
992 if (shift_count
>= BITS_PER_WORD
)
994 inter
= expand_binop (word_mode
, binoptab
,
996 GEN_INT (shift_count
- BITS_PER_WORD
),
997 into_target
, unsignedp
, next_methods
);
999 if (inter
!= 0 && inter
!= into_target
)
1000 emit_move_insn (into_target
, inter
);
1002 /* For a signed right shift, we must fill the word we are shifting
1003 out of with copies of the sign bit. Otherwise it is zeroed. */
1004 if (inter
!= 0 && binoptab
!= ashr_optab
)
1005 inter
= CONST0_RTX (word_mode
);
1006 else if (inter
!= 0)
1007 inter
= expand_binop (word_mode
, binoptab
,
1009 GEN_INT (BITS_PER_WORD
- 1),
1010 outof_target
, unsignedp
, next_methods
);
1012 if (inter
!= 0 && inter
!= outof_target
)
1013 emit_move_insn (outof_target
, inter
);
1018 optab reverse_unsigned_shift
, unsigned_shift
;
1020 /* For a shift of less then BITS_PER_WORD, to compute the carry,
1021 we must do a logical shift in the opposite direction of the
1024 reverse_unsigned_shift
= (left_shift
? lshr_optab
: ashl_optab
);
1026 /* For a shift of less than BITS_PER_WORD, to compute the word
1027 shifted towards, we need to unsigned shift the orig value of
1030 unsigned_shift
= (left_shift
? ashl_optab
: lshr_optab
);
1032 carries
= expand_binop (word_mode
, reverse_unsigned_shift
,
1034 GEN_INT (BITS_PER_WORD
- shift_count
),
1035 0, unsignedp
, next_methods
);
1040 inter
= expand_binop (word_mode
, unsigned_shift
, into_input
,
1041 op1
, 0, unsignedp
, next_methods
);
1044 inter
= expand_binop (word_mode
, ior_optab
, carries
, inter
,
1045 into_target
, unsignedp
, next_methods
);
1047 if (inter
!= 0 && inter
!= into_target
)
1048 emit_move_insn (into_target
, inter
);
1051 inter
= expand_binop (word_mode
, binoptab
, outof_input
,
1052 op1
, outof_target
, unsignedp
, next_methods
);
1054 if (inter
!= 0 && inter
!= outof_target
)
1055 emit_move_insn (outof_target
, inter
);
1058 insns
= get_insns ();
1063 if (binoptab
->code
!= UNKNOWN
)
1064 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1068 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1073 /* Synthesize double word rotates from single word shifts. */
1074 if ((binoptab
== rotl_optab
|| binoptab
== rotr_optab
)
1075 && class == MODE_INT
1076 && GET_CODE (op1
) == CONST_INT
1077 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1078 && ashl_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1079 && lshr_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1081 rtx insns
, equiv_value
;
1082 rtx into_target
, outof_target
;
1083 rtx into_input
, outof_input
;
1085 int shift_count
, left_shift
, outof_word
;
1087 /* If TARGET is the same as one of the operands, the REG_EQUAL note
1088 won't be accurate, so use a new target. */
1089 if (target
== 0 || target
== op0
|| target
== op1
)
1090 target
= gen_reg_rtx (mode
);
1094 shift_count
= INTVAL (op1
);
1096 /* OUTOF_* is the word we are shifting bits away from, and
1097 INTO_* is the word that we are shifting bits towards, thus
1098 they differ depending on the direction of the shift and
1099 WORDS_BIG_ENDIAN. */
1101 left_shift
= (binoptab
== rotl_optab
);
1102 outof_word
= left_shift
^ ! WORDS_BIG_ENDIAN
;
1104 outof_target
= operand_subword (target
, outof_word
, 1, mode
);
1105 into_target
= operand_subword (target
, 1 - outof_word
, 1, mode
);
1107 outof_input
= operand_subword_force (op0
, outof_word
, mode
);
1108 into_input
= operand_subword_force (op0
, 1 - outof_word
, mode
);
1110 if (shift_count
== BITS_PER_WORD
)
1112 /* This is just a word swap. */
1113 emit_move_insn (outof_target
, into_input
);
1114 emit_move_insn (into_target
, outof_input
);
1119 rtx into_temp1
, into_temp2
, outof_temp1
, outof_temp2
;
1120 rtx first_shift_count
, second_shift_count
;
1121 optab reverse_unsigned_shift
, unsigned_shift
;
1123 reverse_unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1124 ? lshr_optab
: ashl_optab
);
1126 unsigned_shift
= (left_shift
^ (shift_count
< BITS_PER_WORD
)
1127 ? ashl_optab
: lshr_optab
);
1129 if (shift_count
> BITS_PER_WORD
)
1131 first_shift_count
= GEN_INT (shift_count
- BITS_PER_WORD
);
1132 second_shift_count
= GEN_INT (2 * BITS_PER_WORD
- shift_count
);
1136 first_shift_count
= GEN_INT (BITS_PER_WORD
- shift_count
);
1137 second_shift_count
= GEN_INT (shift_count
);
1140 into_temp1
= expand_binop (word_mode
, unsigned_shift
,
1141 outof_input
, first_shift_count
,
1142 NULL_RTX
, unsignedp
, next_methods
);
1143 into_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1144 into_input
, second_shift_count
,
1145 NULL_RTX
, unsignedp
, next_methods
);
1147 if (into_temp1
!= 0 && into_temp2
!= 0)
1148 inter
= expand_binop (word_mode
, ior_optab
, into_temp1
, into_temp2
,
1149 into_target
, unsignedp
, next_methods
);
1153 if (inter
!= 0 && inter
!= into_target
)
1154 emit_move_insn (into_target
, inter
);
1156 outof_temp1
= expand_binop (word_mode
, unsigned_shift
,
1157 into_input
, first_shift_count
,
1158 NULL_RTX
, unsignedp
, next_methods
);
1159 outof_temp2
= expand_binop (word_mode
, reverse_unsigned_shift
,
1160 outof_input
, second_shift_count
,
1161 NULL_RTX
, unsignedp
, next_methods
);
1163 if (inter
!= 0 && outof_temp1
!= 0 && outof_temp2
!= 0)
1164 inter
= expand_binop (word_mode
, ior_optab
,
1165 outof_temp1
, outof_temp2
,
1166 outof_target
, unsignedp
, next_methods
);
1168 if (inter
!= 0 && inter
!= outof_target
)
1169 emit_move_insn (outof_target
, inter
);
1172 insns
= get_insns ();
1177 if (binoptab
->code
!= UNKNOWN
)
1178 equiv_value
= gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
);
1182 /* We can't make this a no conflict block if this is a word swap,
1183 because the word swap case fails if the input and output values
1184 are in the same register. */
1185 if (shift_count
!= BITS_PER_WORD
)
1186 emit_no_conflict_block (insns
, target
, op0
, op1
, equiv_value
);
1195 /* These can be done a word at a time by propagating carries. */
1196 if ((binoptab
== add_optab
|| binoptab
== sub_optab
)
1197 && class == MODE_INT
1198 && GET_MODE_SIZE (mode
) >= 2 * UNITS_PER_WORD
1199 && binoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
1202 optab otheroptab
= binoptab
== add_optab
? sub_optab
: add_optab
;
1203 const unsigned int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
1204 rtx carry_in
= NULL_RTX
, carry_out
= NULL_RTX
;
1205 rtx xop0
, xop1
, xtarget
;
1207 /* We can handle either a 1 or -1 value for the carry. If STORE_FLAG
1208 value is one of those, use it. Otherwise, use 1 since it is the
1209 one easiest to get. */
1210 #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1
1211 int normalizep
= STORE_FLAG_VALUE
;
1216 /* Prepare the operands. */
1217 xop0
= force_reg (mode
, op0
);
1218 xop1
= force_reg (mode
, op1
);
1220 xtarget
= gen_reg_rtx (mode
);
1222 if (target
== 0 || GET_CODE (target
) != REG
)
1225 /* Indicate for flow that the entire target reg is being set. */
1226 if (GET_CODE (target
) == REG
)
1227 emit_insn (gen_rtx_CLOBBER (VOIDmode
, xtarget
));
1229 /* Do the actual arithmetic. */
1230 for (i
= 0; i
< nwords
; i
++)
1232 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
1233 rtx target_piece
= operand_subword (xtarget
, index
, 1, mode
);
1234 rtx op0_piece
= operand_subword_force (xop0
, index
, mode
);
1235 rtx op1_piece
= operand_subword_force (xop1
, index
, mode
);
1238 /* Main add/subtract of the input operands. */
1239 x
= expand_binop (word_mode
, binoptab
,
1240 op0_piece
, op1_piece
,
1241 target_piece
, unsignedp
, next_methods
);
1247 /* Store carry from main add/subtract. */
1248 carry_out
= gen_reg_rtx (word_mode
);
1249 carry_out
= emit_store_flag_force (carry_out
,
1250 (binoptab
== add_optab
1253 word_mode
, 1, normalizep
);
1260 /* Add/subtract previous carry to main result. */
1261 newx
= expand_binop (word_mode
,
1262 normalizep
== 1 ? binoptab
: otheroptab
,
1264 NULL_RTX
, 1, next_methods
);
1268 /* Get out carry from adding/subtracting carry in. */
1269 rtx carry_tmp
= gen_reg_rtx (word_mode
);
1270 carry_tmp
= emit_store_flag_force (carry_tmp
,
1271 (binoptab
== add_optab
1274 word_mode
, 1, normalizep
);
1276 /* Logical-ior the two poss. carry together. */
1277 carry_out
= expand_binop (word_mode
, ior_optab
,
1278 carry_out
, carry_tmp
,
1279 carry_out
, 0, next_methods
);
1283 emit_move_insn (target_piece
, newx
);
1286 carry_in
= carry_out
;
1289 if (i
== GET_MODE_BITSIZE (mode
) / (unsigned) BITS_PER_WORD
)
1291 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
1292 || ! rtx_equal_p (target
, xtarget
))
1294 rtx temp
= emit_move_insn (target
, xtarget
);
1296 set_unique_reg_note (temp
,
1298 gen_rtx_fmt_ee (binoptab
->code
, mode
,
1309 delete_insns_since (last
);
1312 /* If we want to multiply two two-word values and have normal and widening
1313 multiplies of single-word values, we can do this with three smaller
1314 multiplications. Note that we do not make a REG_NO_CONFLICT block here
1315 because we are not operating on one word at a time.
1317 The multiplication proceeds as follows:
1318 _______________________
1319 [__op0_high_|__op0_low__]
1320 _______________________
1321 * [__op1_high_|__op1_low__]
1322 _______________________________________________
1323 _______________________
1324 (1) [__op0_low__*__op1_low__]
1325 _______________________
1326 (2a) [__op0_low__*__op1_high_]
1327 _______________________
1328 (2b) [__op0_high_*__op1_low__]
1329 _______________________
1330 (3) [__op0_high_*__op1_high_]
1333 This gives a 4-word result. Since we are only interested in the
1334 lower 2 words, partial result (3) and the upper words of (2a) and
1335 (2b) don't need to be calculated. Hence (2a) and (2b) can be
1336 calculated using non-widening multiplication.
1338 (1), however, needs to be calculated with an unsigned widening
1339 multiplication. If this operation is not directly supported we
1340 try using a signed widening multiplication and adjust the result.
1341 This adjustment works as follows:
1343 If both operands are positive then no adjustment is needed.
1345 If the operands have different signs, for example op0_low < 0 and
1346 op1_low >= 0, the instruction treats the most significant bit of
1347 op0_low as a sign bit instead of a bit with significance
1348 2**(BITS_PER_WORD-1), i.e. the instruction multiplies op1_low
1349 with 2**BITS_PER_WORD - op0_low, and two's complements the
1350 result. Conclusion: We need to add op1_low * 2**BITS_PER_WORD to
1353 Similarly, if both operands are negative, we need to add
1354 (op0_low + op1_low) * 2**BITS_PER_WORD.
1356 We use a trick to adjust quickly. We logically shift op0_low right
1357 (op1_low) BITS_PER_WORD-1 steps to get 0 or 1, and add this to
1358 op0_high (op1_high) before it is used to calculate 2b (2a). If no
1359 logical shift exists, we do an arithmetic right shift and subtract
1362 if (binoptab
== smul_optab
1363 && class == MODE_INT
1364 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1365 && smul_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1366 && add_optab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
1367 && ((umul_widen_optab
->handlers
[(int) mode
].insn_code
1368 != CODE_FOR_nothing
)
1369 || (smul_widen_optab
->handlers
[(int) mode
].insn_code
1370 != CODE_FOR_nothing
)))
1372 int low
= (WORDS_BIG_ENDIAN
? 1 : 0);
1373 int high
= (WORDS_BIG_ENDIAN
? 0 : 1);
1374 rtx op0_high
= operand_subword_force (op0
, high
, mode
);
1375 rtx op0_low
= operand_subword_force (op0
, low
, mode
);
1376 rtx op1_high
= operand_subword_force (op1
, high
, mode
);
1377 rtx op1_low
= operand_subword_force (op1
, low
, mode
);
1379 rtx op0_xhigh
= NULL_RTX
;
1380 rtx op1_xhigh
= NULL_RTX
;
1382 /* If the target is the same as one of the inputs, don't use it. This
1383 prevents problems with the REG_EQUAL note. */
1384 if (target
== op0
|| target
== op1
1385 || (target
!= 0 && GET_CODE (target
) != REG
))
1388 /* Multiply the two lower words to get a double-word product.
1389 If unsigned widening multiplication is available, use that;
1390 otherwise use the signed form and compensate. */
1392 if (umul_widen_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1394 product
= expand_binop (mode
, umul_widen_optab
, op0_low
, op1_low
,
1395 target
, 1, OPTAB_DIRECT
);
1397 /* If we didn't succeed, delete everything we did so far. */
1399 delete_insns_since (last
);
1401 op0_xhigh
= op0_high
, op1_xhigh
= op1_high
;
1405 && smul_widen_optab
->handlers
[(int) mode
].insn_code
1406 != CODE_FOR_nothing
)
1408 rtx wordm1
= GEN_INT (BITS_PER_WORD
- 1);
1409 product
= expand_binop (mode
, smul_widen_optab
, op0_low
, op1_low
,
1410 target
, 1, OPTAB_DIRECT
);
1411 op0_xhigh
= expand_binop (word_mode
, lshr_optab
, op0_low
, wordm1
,
1412 NULL_RTX
, 1, next_methods
);
1414 op0_xhigh
= expand_binop (word_mode
, add_optab
, op0_high
,
1415 op0_xhigh
, op0_xhigh
, 0, next_methods
);
1418 op0_xhigh
= expand_binop (word_mode
, ashr_optab
, op0_low
, wordm1
,
1419 NULL_RTX
, 0, next_methods
);
1421 op0_xhigh
= expand_binop (word_mode
, sub_optab
, op0_high
,
1422 op0_xhigh
, op0_xhigh
, 0,
1426 op1_xhigh
= expand_binop (word_mode
, lshr_optab
, op1_low
, wordm1
,
1427 NULL_RTX
, 1, next_methods
);
1429 op1_xhigh
= expand_binop (word_mode
, add_optab
, op1_high
,
1430 op1_xhigh
, op1_xhigh
, 0, next_methods
);
1433 op1_xhigh
= expand_binop (word_mode
, ashr_optab
, op1_low
, wordm1
,
1434 NULL_RTX
, 0, next_methods
);
1436 op1_xhigh
= expand_binop (word_mode
, sub_optab
, op1_high
,
1437 op1_xhigh
, op1_xhigh
, 0,
1442 /* If we have been able to directly compute the product of the
1443 low-order words of the operands and perform any required adjustments
1444 of the operands, we proceed by trying two more multiplications
1445 and then computing the appropriate sum.
1447 We have checked above that the required addition is provided.
1448 Full-word addition will normally always succeed, especially if
1449 it is provided at all, so we don't worry about its failure. The
1450 multiplication may well fail, however, so we do handle that. */
1452 if (product
&& op0_xhigh
&& op1_xhigh
)
1454 rtx product_high
= operand_subword (product
, high
, 1, mode
);
1455 rtx temp
= expand_binop (word_mode
, binoptab
, op0_low
, op1_xhigh
,
1456 NULL_RTX
, 0, OPTAB_DIRECT
);
1458 if (!REG_P (product_high
))
1459 product_high
= force_reg (word_mode
, product_high
);
1462 temp
= expand_binop (word_mode
, add_optab
, temp
, product_high
,
1463 product_high
, 0, next_methods
);
1465 if (temp
!= 0 && temp
!= product_high
)
1466 emit_move_insn (product_high
, temp
);
1469 temp
= expand_binop (word_mode
, binoptab
, op1_low
, op0_xhigh
,
1470 NULL_RTX
, 0, OPTAB_DIRECT
);
1473 temp
= expand_binop (word_mode
, add_optab
, temp
,
1474 product_high
, product_high
,
1477 if (temp
!= 0 && temp
!= product_high
)
1478 emit_move_insn (product_high
, temp
);
1480 emit_move_insn (operand_subword (product
, high
, 1, mode
), product_high
);
1484 if (mov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
1486 temp
= emit_move_insn (product
, product
);
1487 set_unique_reg_note (temp
,
1489 gen_rtx_fmt_ee (MULT
, mode
,
1498 /* If we get here, we couldn't do it for some reason even though we
1499 originally thought we could. Delete anything we've emitted in
1502 delete_insns_since (last
);
1505 /* Open-code the vector operations if we have no hardware support
1507 if (class == MODE_VECTOR_INT
|| class == MODE_VECTOR_FLOAT
)
1508 return expand_vector_binop (mode
, binoptab
, op0
, op1
, target
,
1509 unsignedp
, methods
);
1511 /* We need to open-code the complex type operations: '+, -, * and /' */
1513 /* At this point we allow operations between two similar complex
1514 numbers, and also if one of the operands is not a complex number
1515 but rather of MODE_FLOAT or MODE_INT. However, the caller
1516 must make sure that the MODE of the non-complex operand matches
1517 the SUBMODE of the complex operand. */
1519 if (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
)
1521 rtx real0
= 0, imag0
= 0;
1522 rtx real1
= 0, imag1
= 0;
1523 rtx realr
, imagr
, res
;
1528 /* Find the correct mode for the real and imaginary parts. */
1529 enum machine_mode submode
= GET_MODE_INNER(mode
);
1531 if (submode
== BLKmode
)
1535 target
= gen_reg_rtx (mode
);
1539 realr
= gen_realpart (submode
, target
);
1540 imagr
= gen_imagpart (submode
, target
);
1542 if (GET_MODE (op0
) == mode
)
1544 real0
= gen_realpart (submode
, op0
);
1545 imag0
= gen_imagpart (submode
, op0
);
1550 if (GET_MODE (op1
) == mode
)
1552 real1
= gen_realpart (submode
, op1
);
1553 imag1
= gen_imagpart (submode
, op1
);
1558 if (real0
== 0 || real1
== 0 || ! (imag0
!= 0 || imag1
!= 0))
1561 switch (binoptab
->code
)
1564 /* (a+ib) + (c+id) = (a+c) + i(b+d) */
1566 /* (a+ib) - (c+id) = (a-c) + i(b-d) */
1567 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1568 realr
, unsignedp
, methods
);
1572 else if (res
!= realr
)
1573 emit_move_insn (realr
, res
);
1575 if (imag0
!= 0 && imag1
!= 0)
1576 res
= expand_binop (submode
, binoptab
, imag0
, imag1
,
1577 imagr
, unsignedp
, methods
);
1578 else if (imag0
!= 0)
1580 else if (binoptab
->code
== MINUS
)
1581 res
= expand_unop (submode
,
1582 binoptab
== subv_optab
? negv_optab
: neg_optab
,
1583 imag1
, imagr
, unsignedp
);
1589 else if (res
!= imagr
)
1590 emit_move_insn (imagr
, res
);
1596 /* (a+ib) * (c+id) = (ac-bd) + i(ad+cb) */
1598 if (imag0
!= 0 && imag1
!= 0)
1602 /* Don't fetch these from memory more than once. */
1603 real0
= force_reg (submode
, real0
);
1604 real1
= force_reg (submode
, real1
);
1605 imag0
= force_reg (submode
, imag0
);
1606 imag1
= force_reg (submode
, imag1
);
1608 temp1
= expand_binop (submode
, binoptab
, real0
, real1
, NULL_RTX
,
1609 unsignedp
, methods
);
1611 temp2
= expand_binop (submode
, binoptab
, imag0
, imag1
, NULL_RTX
,
1612 unsignedp
, methods
);
1614 if (temp1
== 0 || temp2
== 0)
1619 binoptab
== smulv_optab
? subv_optab
: sub_optab
,
1620 temp1
, temp2
, realr
, unsignedp
, methods
));
1624 else if (res
!= realr
)
1625 emit_move_insn (realr
, res
);
1627 temp1
= expand_binop (submode
, binoptab
, real0
, imag1
,
1628 NULL_RTX
, unsignedp
, methods
);
1630 /* Avoid expanding redundant multiplication for the common
1631 case of squaring a complex number. */
1632 if (rtx_equal_p (real0
, real1
) && rtx_equal_p (imag0
, imag1
))
1635 temp2
= expand_binop (submode
, binoptab
, real1
, imag0
,
1636 NULL_RTX
, unsignedp
, methods
);
1638 if (temp1
== 0 || temp2
== 0)
1643 binoptab
== smulv_optab
? addv_optab
: add_optab
,
1644 temp1
, temp2
, imagr
, unsignedp
, methods
));
1648 else if (res
!= imagr
)
1649 emit_move_insn (imagr
, res
);
1655 /* Don't fetch these from memory more than once. */
1656 real0
= force_reg (submode
, real0
);
1657 real1
= force_reg (submode
, real1
);
1659 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1660 realr
, unsignedp
, methods
);
1663 else if (res
!= realr
)
1664 emit_move_insn (realr
, res
);
1667 res
= expand_binop (submode
, binoptab
,
1668 real1
, imag0
, imagr
, unsignedp
, methods
);
1670 res
= expand_binop (submode
, binoptab
,
1671 real0
, imag1
, imagr
, unsignedp
, methods
);
1675 else if (res
!= imagr
)
1676 emit_move_insn (imagr
, res
);
1683 /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */
1687 /* (a+ib) / (c+i0) = (a/c) + i(b/c) */
1689 /* Don't fetch these from memory more than once. */
1690 real1
= force_reg (submode
, real1
);
1692 /* Simply divide the real and imaginary parts by `c' */
1693 if (class == MODE_COMPLEX_FLOAT
)
1694 res
= expand_binop (submode
, binoptab
, real0
, real1
,
1695 realr
, unsignedp
, methods
);
1697 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1698 real0
, real1
, realr
, unsignedp
);
1702 else if (res
!= realr
)
1703 emit_move_insn (realr
, res
);
1705 if (class == MODE_COMPLEX_FLOAT
)
1706 res
= expand_binop (submode
, binoptab
, imag0
, real1
,
1707 imagr
, unsignedp
, methods
);
1709 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1710 imag0
, real1
, imagr
, unsignedp
);
1714 else if (res
!= imagr
)
1715 emit_move_insn (imagr
, res
);
1721 switch (flag_complex_divide_method
)
1724 ok
= expand_cmplxdiv_straight (real0
, real1
, imag0
, imag1
,
1725 realr
, imagr
, submode
,
1731 ok
= expand_cmplxdiv_wide (real0
, real1
, imag0
, imag1
,
1732 realr
, imagr
, submode
,
1752 if (binoptab
->code
!= UNKNOWN
)
1754 = gen_rtx_fmt_ee (binoptab
->code
, mode
,
1755 copy_rtx (op0
), copy_rtx (op1
));
1759 emit_no_conflict_block (seq
, target
, op0
, op1
, equiv_value
);
1765 /* It can't be open-coded in this mode.
1766 Use a library call if one is available and caller says that's ok. */
1768 if (binoptab
->handlers
[(int) mode
].libfunc
1769 && (methods
== OPTAB_LIB
|| methods
== OPTAB_LIB_WIDEN
))
1773 enum machine_mode op1_mode
= mode
;
1780 op1_mode
= word_mode
;
1781 /* Specify unsigned here,
1782 since negative shift counts are meaningless. */
1783 op1x
= convert_to_mode (word_mode
, op1
, 1);
1786 if (GET_MODE (op0
) != VOIDmode
1787 && GET_MODE (op0
) != mode
)
1788 op0
= convert_to_mode (mode
, op0
, unsignedp
);
1790 /* Pass 1 for NO_QUEUE so we don't lose any increments
1791 if the libcall is cse'd or moved. */
1792 value
= emit_library_call_value (binoptab
->handlers
[(int) mode
].libfunc
,
1793 NULL_RTX
, LCT_CONST
, mode
, 2,
1794 op0
, mode
, op1x
, op1_mode
);
1796 insns
= get_insns ();
1799 target
= gen_reg_rtx (mode
);
1800 emit_libcall_block (insns
, target
, value
,
1801 gen_rtx_fmt_ee (binoptab
->code
, mode
, op0
, op1
));
1806 delete_insns_since (last
);
1808 /* It can't be done in this mode. Can we do it in a wider mode? */
1810 if (! (methods
== OPTAB_WIDEN
|| methods
== OPTAB_LIB_WIDEN
1811 || methods
== OPTAB_MUST_WIDEN
))
1813 /* Caller says, don't even try. */
1814 delete_insns_since (entry_last
);
1818 /* Compute the value of METHODS to pass to recursive calls.
1819 Don't allow widening to be tried recursively. */
1821 methods
= (methods
== OPTAB_LIB_WIDEN
? OPTAB_LIB
: OPTAB_DIRECT
);
1823 /* Look for a wider mode of the same class for which it appears we can do
1826 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
1828 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
1829 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
1831 if ((binoptab
->handlers
[(int) wider_mode
].insn_code
1832 != CODE_FOR_nothing
)
1833 || (methods
== OPTAB_LIB
1834 && binoptab
->handlers
[(int) wider_mode
].libfunc
))
1836 rtx xop0
= op0
, xop1
= op1
;
1839 /* For certain integer operations, we need not actually extend
1840 the narrow operands, as long as we will truncate
1841 the results to the same narrowness. */
1843 if ((binoptab
== ior_optab
|| binoptab
== and_optab
1844 || binoptab
== xor_optab
1845 || binoptab
== add_optab
|| binoptab
== sub_optab
1846 || binoptab
== smul_optab
|| binoptab
== ashl_optab
)
1847 && class == MODE_INT
)
1850 xop0
= widen_operand (xop0
, wider_mode
, mode
,
1851 unsignedp
, no_extend
);
1853 /* The second operand of a shift must always be extended. */
1854 xop1
= widen_operand (xop1
, wider_mode
, mode
, unsignedp
,
1855 no_extend
&& binoptab
!= ashl_optab
);
1857 temp
= expand_binop (wider_mode
, binoptab
, xop0
, xop1
, NULL_RTX
,
1858 unsignedp
, methods
);
1861 if (class != MODE_INT
)
1864 target
= gen_reg_rtx (mode
);
1865 convert_move (target
, temp
, 0);
1869 return gen_lowpart (mode
, temp
);
1872 delete_insns_since (last
);
1877 delete_insns_since (entry_last
);
1881 /* Like expand_binop, but for open-coding vectors binops. */
1884 expand_vector_binop (enum machine_mode mode
, optab binoptab
, rtx op0
,
1885 rtx op1
, rtx target
, int unsignedp
,
1886 enum optab_methods methods
)
1888 enum machine_mode submode
, tmode
;
1889 int size
, elts
, subsize
, subbitsize
, i
;
1890 rtx t
, a
, b
, res
, seq
;
1891 enum mode_class
class;
1893 class = GET_MODE_CLASS (mode
);
1895 size
= GET_MODE_SIZE (mode
);
1896 submode
= GET_MODE_INNER (mode
);
1898 /* Search for the widest vector mode with the same inner mode that is
1899 still narrower than MODE and that allows to open-code this operator.
1900 Note, if we find such a mode and the handler later decides it can't
1901 do the expansion, we'll be called recursively with the narrower mode. */
1902 for (tmode
= GET_CLASS_NARROWEST_MODE (class);
1903 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
1904 tmode
= GET_MODE_WIDER_MODE (tmode
))
1906 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
1907 && binoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
1911 switch (binoptab
->code
)
1916 tmode
= int_mode_for_mode (mode
);
1917 if (tmode
!= BLKmode
)
1923 subsize
= GET_MODE_SIZE (submode
);
1924 subbitsize
= GET_MODE_BITSIZE (submode
);
1925 elts
= size
/ subsize
;
1927 /* If METHODS is OPTAB_DIRECT, we don't insist on the exact mode,
1928 but that we operate on more than one element at a time. */
1929 if (subsize
== GET_MODE_UNIT_SIZE (mode
) && methods
== OPTAB_DIRECT
)
1934 /* Errors can leave us with a const0_rtx as operand. */
1935 if (GET_MODE (op0
) != mode
)
1936 op0
= copy_to_mode_reg (mode
, op0
);
1937 if (GET_MODE (op1
) != mode
)
1938 op1
= copy_to_mode_reg (mode
, op1
);
1941 target
= gen_reg_rtx (mode
);
1943 for (i
= 0; i
< elts
; ++i
)
1945 /* If this is part of a register, and not the first item in the
1946 word, we can't store using a SUBREG - that would clobber
1948 And storing with a SUBREG is only possible for the least
1949 significant part, hence we can't do it for big endian
1950 (unless we want to permute the evaluation order. */
1951 if (GET_CODE (target
) == REG
1952 && (BYTES_BIG_ENDIAN
1953 ? subsize
< UNITS_PER_WORD
1954 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
1957 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
1958 if (CONSTANT_P (op0
))
1959 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
1961 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
1962 NULL_RTX
, submode
, submode
, size
);
1963 if (CONSTANT_P (op1
))
1964 b
= simplify_gen_subreg (submode
, op1
, mode
, i
* subsize
);
1966 b
= extract_bit_field (op1
, subbitsize
, i
* subbitsize
, unsignedp
,
1967 NULL_RTX
, submode
, submode
, size
);
1969 if (binoptab
->code
== DIV
)
1971 if (class == MODE_VECTOR_FLOAT
)
1972 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1973 unsignedp
, methods
);
1975 res
= expand_divmod (0, TRUNC_DIV_EXPR
, submode
,
1976 a
, b
, t
, unsignedp
);
1979 res
= expand_binop (submode
, binoptab
, a
, b
, t
,
1980 unsignedp
, methods
);
1986 emit_move_insn (t
, res
);
1988 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2004 /* Like expand_unop but for open-coding vector unops. */
2007 expand_vector_unop (enum machine_mode mode
, optab unoptab
, rtx op0
,
2008 rtx target
, int unsignedp
)
2010 enum machine_mode submode
, tmode
;
2011 int size
, elts
, subsize
, subbitsize
, i
;
2014 size
= GET_MODE_SIZE (mode
);
2015 submode
= GET_MODE_INNER (mode
);
2017 /* Search for the widest vector mode with the same inner mode that is
2018 still narrower than MODE and that allows to open-code this operator.
2019 Note, if we find such a mode and the handler later decides it can't
2020 do the expansion, we'll be called recursively with the narrower mode. */
2021 for (tmode
= GET_CLASS_NARROWEST_MODE (GET_MODE_CLASS (mode
));
2022 GET_MODE_SIZE (tmode
) < GET_MODE_SIZE (mode
);
2023 tmode
= GET_MODE_WIDER_MODE (tmode
))
2025 if (GET_MODE_INNER (tmode
) == GET_MODE_INNER (mode
)
2026 && unoptab
->handlers
[(int) tmode
].insn_code
!= CODE_FOR_nothing
)
2029 /* If there is no negate operation, try doing a subtract from zero. */
2030 if (unoptab
== neg_optab
&& GET_MODE_CLASS (submode
) == MODE_INT
2031 /* Avoid infinite recursion when an
2032 error has left us with the wrong mode. */
2033 && GET_MODE (op0
) == mode
)
2036 temp
= expand_binop (mode
, sub_optab
, CONST0_RTX (mode
), op0
,
2037 target
, unsignedp
, OPTAB_DIRECT
);
2042 if (unoptab
== one_cmpl_optab
)
2044 tmode
= int_mode_for_mode (mode
);
2045 if (tmode
!= BLKmode
)
2049 subsize
= GET_MODE_SIZE (submode
);
2050 subbitsize
= GET_MODE_BITSIZE (submode
);
2051 elts
= size
/ subsize
;
2053 /* Errors can leave us with a const0_rtx as operand. */
2054 if (GET_MODE (op0
) != mode
)
2055 op0
= copy_to_mode_reg (mode
, op0
);
2058 target
= gen_reg_rtx (mode
);
2062 for (i
= 0; i
< elts
; ++i
)
2064 /* If this is part of a register, and not the first item in the
2065 word, we can't store using a SUBREG - that would clobber
2067 And storing with a SUBREG is only possible for the least
2068 significant part, hence we can't do it for big endian
2069 (unless we want to permute the evaluation order. */
2070 if (GET_CODE (target
) == REG
2071 && (BYTES_BIG_ENDIAN
2072 ? subsize
< UNITS_PER_WORD
2073 : ((i
* subsize
) % UNITS_PER_WORD
) != 0))
2076 t
= simplify_gen_subreg (submode
, target
, mode
, i
* subsize
);
2077 if (CONSTANT_P (op0
))
2078 a
= simplify_gen_subreg (submode
, op0
, mode
, i
* subsize
);
2080 a
= extract_bit_field (op0
, subbitsize
, i
* subbitsize
, unsignedp
,
2081 t
, submode
, submode
, size
);
2083 res
= expand_unop (submode
, unoptab
, a
, t
, unsignedp
);
2086 emit_move_insn (t
, res
);
2088 store_bit_field (target
, subbitsize
, i
* subbitsize
, submode
, res
,
2099 /* Expand a binary operator which has both signed and unsigned forms.
2100 UOPTAB is the optab for unsigned operations, and SOPTAB is for
2103 If we widen unsigned operands, we may use a signed wider operation instead
2104 of an unsigned wider operation, since the result would be the same. */
2107 sign_expand_binop (enum machine_mode mode
, optab uoptab
, optab soptab
,
2108 rtx op0
, rtx op1
, rtx target
, int unsignedp
,
2109 enum optab_methods methods
)
2112 optab direct_optab
= unsignedp
? uoptab
: soptab
;
2113 struct optab wide_soptab
;
2115 /* Do it without widening, if possible. */
2116 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
,
2117 unsignedp
, OPTAB_DIRECT
);
2118 if (temp
|| methods
== OPTAB_DIRECT
)
2121 /* Try widening to a signed int. Make a fake signed optab that
2122 hides any signed insn for direct use. */
2123 wide_soptab
= *soptab
;
2124 wide_soptab
.handlers
[(int) mode
].insn_code
= CODE_FOR_nothing
;
2125 wide_soptab
.handlers
[(int) mode
].libfunc
= 0;
2127 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2128 unsignedp
, OPTAB_WIDEN
);
2130 /* For unsigned operands, try widening to an unsigned int. */
2131 if (temp
== 0 && unsignedp
)
2132 temp
= expand_binop (mode
, uoptab
, op0
, op1
, target
,
2133 unsignedp
, OPTAB_WIDEN
);
2134 if (temp
|| methods
== OPTAB_WIDEN
)
2137 /* Use the right width lib call if that exists. */
2138 temp
= expand_binop (mode
, direct_optab
, op0
, op1
, target
, unsignedp
, OPTAB_LIB
);
2139 if (temp
|| methods
== OPTAB_LIB
)
2142 /* Must widen and use a lib call, use either signed or unsigned. */
2143 temp
= expand_binop (mode
, &wide_soptab
, op0
, op1
, target
,
2144 unsignedp
, methods
);
2148 return expand_binop (mode
, uoptab
, op0
, op1
, target
,
2149 unsignedp
, methods
);
2153 /* Generate code to perform an operation specified by BINOPTAB
2154 on operands OP0 and OP1, with two results to TARG1 and TARG2.
2155 We assume that the order of the operands for the instruction
2156 is TARG0, OP0, OP1, TARG1, which would fit a pattern like
2157 [(set TARG0 (operate OP0 OP1)) (set TARG1 (operate ...))].
2159 Either TARG0 or TARG1 may be zero, but what that means is that
2160 the result is not actually wanted. We will generate it into
2161 a dummy pseudo-reg and discard it. They may not both be zero.
2163 Returns 1 if this operation can be performed; 0 if not. */
2166 expand_twoval_binop (optab binoptab
, rtx op0
, rtx op1
, rtx targ0
, rtx targ1
,
2169 enum machine_mode mode
= GET_MODE (targ0
? targ0
: targ1
);
2170 enum mode_class
class;
2171 enum machine_mode wider_mode
;
2172 rtx entry_last
= get_last_insn ();
2175 class = GET_MODE_CLASS (mode
);
2177 op0
= protect_from_queue (op0
, 0);
2178 op1
= protect_from_queue (op1
, 0);
2182 op0
= force_not_mem (op0
);
2183 op1
= force_not_mem (op1
);
2186 /* If we are inside an appropriately-short loop and one operand is an
2187 expensive constant, force it into a register. */
2188 if (CONSTANT_P (op0
) && preserve_subexpressions_p ()
2189 && rtx_cost (op0
, binoptab
->code
) > COSTS_N_INSNS (1))
2190 op0
= force_reg (mode
, op0
);
2192 if (CONSTANT_P (op1
) && preserve_subexpressions_p ()
2193 && rtx_cost (op1
, binoptab
->code
) > COSTS_N_INSNS (1))
2194 op1
= force_reg (mode
, op1
);
2197 targ0
= protect_from_queue (targ0
, 1);
2199 targ0
= gen_reg_rtx (mode
);
2201 targ1
= protect_from_queue (targ1
, 1);
2203 targ1
= gen_reg_rtx (mode
);
2205 /* Record where to go back to if we fail. */
2206 last
= get_last_insn ();
2208 if (binoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2210 int icode
= (int) binoptab
->handlers
[(int) mode
].insn_code
;
2211 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2212 enum machine_mode mode1
= insn_data
[icode
].operand
[2].mode
;
2214 rtx xop0
= op0
, xop1
= op1
;
2216 /* In case the insn wants input operands in modes different from
2217 those of the actual operands, convert the operands. It would
2218 seem that we don't need to convert CONST_INTs, but we do, so
2219 that they're properly zero-extended, sign-extended or truncated
2222 if (GET_MODE (op0
) != mode0
&& mode0
!= VOIDmode
)
2223 xop0
= convert_modes (mode0
,
2224 GET_MODE (op0
) != VOIDmode
2229 if (GET_MODE (op1
) != mode1
&& mode1
!= VOIDmode
)
2230 xop1
= convert_modes (mode1
,
2231 GET_MODE (op1
) != VOIDmode
2236 /* Now, if insn doesn't accept these operands, put them into pseudos. */
2237 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2238 xop0
= copy_to_mode_reg (mode0
, xop0
);
2240 if (! (*insn_data
[icode
].operand
[2].predicate
) (xop1
, mode1
))
2241 xop1
= copy_to_mode_reg (mode1
, xop1
);
2243 /* We could handle this, but we should always be called with a pseudo
2244 for our targets and all insns should take them as outputs. */
2245 if (! (*insn_data
[icode
].operand
[0].predicate
) (targ0
, mode
)
2246 || ! (*insn_data
[icode
].operand
[3].predicate
) (targ1
, mode
))
2249 pat
= GEN_FCN (icode
) (targ0
, xop0
, xop1
, targ1
);
2256 delete_insns_since (last
);
2259 /* It can't be done in this mode. Can we do it in a wider mode? */
2261 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2263 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2264 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2266 if (binoptab
->handlers
[(int) wider_mode
].insn_code
2267 != CODE_FOR_nothing
)
2269 rtx t0
= gen_reg_rtx (wider_mode
);
2270 rtx t1
= gen_reg_rtx (wider_mode
);
2271 rtx cop0
= convert_modes (wider_mode
, mode
, op0
, unsignedp
);
2272 rtx cop1
= convert_modes (wider_mode
, mode
, op1
, unsignedp
);
2274 if (expand_twoval_binop (binoptab
, cop0
, cop1
,
2277 convert_move (targ0
, t0
, unsignedp
);
2278 convert_move (targ1
, t1
, unsignedp
);
2282 delete_insns_since (last
);
2287 delete_insns_since (entry_last
);
2291 /* Wrapper around expand_unop which takes an rtx code to specify
2292 the operation to perform, not an optab pointer. All other
2293 arguments are the same. */
2295 expand_simple_unop (enum machine_mode mode
, enum rtx_code code
, rtx op0
,
2296 rtx target
, int unsignedp
)
2298 optab unop
= code_to_optab
[(int) code
];
2302 return expand_unop (mode
, unop
, op0
, target
, unsignedp
);
2308 (clz:wide (zero_extend:wide x)) - ((width wide) - (width narrow)). */
2310 widen_clz (enum machine_mode mode
, rtx op0
, rtx target
)
2312 enum mode_class
class = GET_MODE_CLASS (mode
);
2313 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2315 enum machine_mode wider_mode
;
2316 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2317 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2319 if (clz_optab
->handlers
[(int) wider_mode
].insn_code
2320 != CODE_FOR_nothing
)
2322 rtx xop0
, temp
, last
;
2324 last
= get_last_insn ();
2327 target
= gen_reg_rtx (mode
);
2328 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2329 temp
= expand_unop (wider_mode
, clz_optab
, xop0
, NULL_RTX
, true);
2331 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2332 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2333 - GET_MODE_BITSIZE (mode
)),
2334 target
, true, OPTAB_DIRECT
);
2336 delete_insns_since (last
);
2345 /* Try calculating (parity x) as (and (popcount x) 1), where
2346 popcount can also be done in a wider mode. */
2348 expand_parity (enum machine_mode mode
, rtx op0
, rtx target
)
2350 enum mode_class
class = GET_MODE_CLASS (mode
);
2351 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2353 enum machine_mode wider_mode
;
2354 for (wider_mode
= mode
; wider_mode
!= VOIDmode
;
2355 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2357 if (popcount_optab
->handlers
[(int) wider_mode
].insn_code
2358 != CODE_FOR_nothing
)
2360 rtx xop0
, temp
, last
;
2362 last
= get_last_insn ();
2365 target
= gen_reg_rtx (mode
);
2366 xop0
= widen_operand (op0
, wider_mode
, mode
, true, false);
2367 temp
= expand_unop (wider_mode
, popcount_optab
, xop0
, NULL_RTX
,
2370 temp
= expand_binop (wider_mode
, and_optab
, temp
, GEN_INT (1),
2371 target
, true, OPTAB_DIRECT
);
2373 delete_insns_since (last
);
2382 /* Generate code to perform an operation specified by UNOPTAB
2383 on operand OP0, with result having machine-mode MODE.
2385 UNSIGNEDP is for the case where we have to widen the operands
2386 to perform the operation. It says to use zero-extension.
2388 If TARGET is nonzero, the value
2389 is generated there, if it is convenient to do so.
2390 In all cases an rtx is returned for the locus of the value;
2391 this may or may not be TARGET. */
2394 expand_unop (enum machine_mode mode
, optab unoptab
, rtx op0
, rtx target
,
2397 enum mode_class
class;
2398 enum machine_mode wider_mode
;
2400 rtx last
= get_last_insn ();
2403 class = GET_MODE_CLASS (mode
);
2405 op0
= protect_from_queue (op0
, 0);
2409 op0
= force_not_mem (op0
);
2413 target
= protect_from_queue (target
, 1);
2415 if (unoptab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2417 int icode
= (int) unoptab
->handlers
[(int) mode
].insn_code
;
2418 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2424 temp
= gen_reg_rtx (mode
);
2426 if (GET_MODE (xop0
) != VOIDmode
2427 && GET_MODE (xop0
) != mode0
)
2428 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2430 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2432 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2433 xop0
= copy_to_mode_reg (mode0
, xop0
);
2435 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, mode
))
2436 temp
= gen_reg_rtx (mode
);
2438 pat
= GEN_FCN (icode
) (temp
, xop0
);
2441 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2442 && ! add_equal_note (pat
, temp
, unoptab
->code
, xop0
, NULL_RTX
))
2444 delete_insns_since (last
);
2445 return expand_unop (mode
, unoptab
, op0
, NULL_RTX
, unsignedp
);
2453 delete_insns_since (last
);
2456 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2458 /* Widening clz needs special treatment. */
2459 if (unoptab
== clz_optab
)
2461 temp
= widen_clz (mode
, op0
, target
);
2468 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2469 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2470 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2472 if (unoptab
->handlers
[(int) wider_mode
].insn_code
!= CODE_FOR_nothing
)
2476 /* For certain operations, we need not actually extend
2477 the narrow operand, as long as we will truncate the
2478 results to the same narrowness. */
2480 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2481 (unoptab
== neg_optab
2482 || unoptab
== one_cmpl_optab
)
2483 && class == MODE_INT
);
2485 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2490 if (class != MODE_INT
)
2493 target
= gen_reg_rtx (mode
);
2494 convert_move (target
, temp
, 0);
2498 return gen_lowpart (mode
, temp
);
2501 delete_insns_since (last
);
2505 /* These can be done a word at a time. */
2506 if (unoptab
== one_cmpl_optab
2507 && class == MODE_INT
2508 && GET_MODE_SIZE (mode
) > UNITS_PER_WORD
2509 && unoptab
->handlers
[(int) word_mode
].insn_code
!= CODE_FOR_nothing
)
2514 if (target
== 0 || target
== op0
)
2515 target
= gen_reg_rtx (mode
);
2519 /* Do the actual arithmetic. */
2520 for (i
= 0; i
< GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
; i
++)
2522 rtx target_piece
= operand_subword (target
, i
, 1, mode
);
2523 rtx x
= expand_unop (word_mode
, unoptab
,
2524 operand_subword_force (op0
, i
, mode
),
2525 target_piece
, unsignedp
);
2527 if (target_piece
!= x
)
2528 emit_move_insn (target_piece
, x
);
2531 insns
= get_insns ();
2534 emit_no_conflict_block (insns
, target
, op0
, NULL_RTX
,
2535 gen_rtx_fmt_e (unoptab
->code
, mode
,
2540 /* Open-code the complex negation operation. */
2541 else if (unoptab
->code
== NEG
2542 && (class == MODE_COMPLEX_FLOAT
|| class == MODE_COMPLEX_INT
))
2548 /* Find the correct mode for the real and imaginary parts. */
2549 enum machine_mode submode
= GET_MODE_INNER (mode
);
2551 if (submode
== BLKmode
)
2555 target
= gen_reg_rtx (mode
);
2559 target_piece
= gen_imagpart (submode
, target
);
2560 x
= expand_unop (submode
, unoptab
,
2561 gen_imagpart (submode
, op0
),
2562 target_piece
, unsignedp
);
2563 if (target_piece
!= x
)
2564 emit_move_insn (target_piece
, x
);
2566 target_piece
= gen_realpart (submode
, target
);
2567 x
= expand_unop (submode
, unoptab
,
2568 gen_realpart (submode
, op0
),
2569 target_piece
, unsignedp
);
2570 if (target_piece
!= x
)
2571 emit_move_insn (target_piece
, x
);
2576 emit_no_conflict_block (seq
, target
, op0
, 0,
2577 gen_rtx_fmt_e (unoptab
->code
, mode
,
2582 /* Try negating floating point values by flipping the sign bit. */
2583 if (unoptab
->code
== NEG
&& class == MODE_FLOAT
2584 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2586 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2587 enum machine_mode imode
= int_mode_for_mode (mode
);
2588 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2590 if (imode
!= BLKmode
&& bitpos
>= 0 && fmt
->has_signed_zero
)
2592 HOST_WIDE_INT hi
, lo
;
2593 rtx last
= get_last_insn ();
2595 /* Handle targets with different FP word orders. */
2596 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2598 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2599 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2600 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2603 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2606 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2610 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2613 temp
= expand_binop (imode
, xor_optab
,
2614 gen_lowpart (imode
, op0
),
2615 immed_double_const (lo
, hi
, imode
),
2616 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2618 return gen_lowpart (mode
, temp
);
2619 delete_insns_since (last
);
2623 /* Try calculating parity (x) as popcount (x) % 2. */
2624 if (unoptab
== parity_optab
)
2626 temp
= expand_parity (mode
, op0
, target
);
2632 /* Now try a library call in this mode. */
2633 if (unoptab
->handlers
[(int) mode
].libfunc
)
2637 enum machine_mode outmode
= mode
;
2639 /* All of these functions return small values. Thus we choose to
2640 have them return something that isn't a double-word. */
2641 if (unoptab
== ffs_optab
|| unoptab
== clz_optab
|| unoptab
== ctz_optab
2642 || unoptab
== popcount_optab
|| unoptab
== parity_optab
)
2644 = GET_MODE (hard_libcall_value (TYPE_MODE (integer_type_node
)));
2648 /* Pass 1 for NO_QUEUE so we don't lose any increments
2649 if the libcall is cse'd or moved. */
2650 value
= emit_library_call_value (unoptab
->handlers
[(int) mode
].libfunc
,
2651 NULL_RTX
, LCT_CONST
, outmode
,
2653 insns
= get_insns ();
2656 target
= gen_reg_rtx (outmode
);
2657 emit_libcall_block (insns
, target
, value
,
2658 gen_rtx_fmt_e (unoptab
->code
, mode
, op0
));
2663 if (class == MODE_VECTOR_FLOAT
|| class == MODE_VECTOR_INT
)
2664 return expand_vector_unop (mode
, unoptab
, op0
, target
, unsignedp
);
2666 /* It can't be done in this mode. Can we do it in a wider mode? */
2668 if (class == MODE_INT
|| class == MODE_FLOAT
|| class == MODE_COMPLEX_FLOAT
)
2670 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2671 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2673 if ((unoptab
->handlers
[(int) wider_mode
].insn_code
2674 != CODE_FOR_nothing
)
2675 || unoptab
->handlers
[(int) wider_mode
].libfunc
)
2679 /* For certain operations, we need not actually extend
2680 the narrow operand, as long as we will truncate the
2681 results to the same narrowness. */
2683 xop0
= widen_operand (xop0
, wider_mode
, mode
, unsignedp
,
2684 (unoptab
== neg_optab
2685 || unoptab
== one_cmpl_optab
)
2686 && class == MODE_INT
);
2688 temp
= expand_unop (wider_mode
, unoptab
, xop0
, NULL_RTX
,
2691 /* If we are generating clz using wider mode, adjust the
2693 if (unoptab
== clz_optab
&& temp
!= 0)
2694 temp
= expand_binop (wider_mode
, sub_optab
, temp
,
2695 GEN_INT (GET_MODE_BITSIZE (wider_mode
)
2696 - GET_MODE_BITSIZE (mode
)),
2697 target
, true, OPTAB_DIRECT
);
2701 if (class != MODE_INT
)
2704 target
= gen_reg_rtx (mode
);
2705 convert_move (target
, temp
, 0);
2709 return gen_lowpart (mode
, temp
);
2712 delete_insns_since (last
);
2717 /* If there is no negate operation, try doing a subtract from zero.
2718 The US Software GOFAST library needs this. */
2719 if (unoptab
->code
== NEG
)
2722 temp
= expand_binop (mode
,
2723 unoptab
== negv_optab
? subv_optab
: sub_optab
,
2724 CONST0_RTX (mode
), op0
,
2725 target
, unsignedp
, OPTAB_LIB_WIDEN
);
2733 /* Emit code to compute the absolute value of OP0, with result to
2734 TARGET if convenient. (TARGET may be 0.) The return value says
2735 where the result actually is to be found.
2737 MODE is the mode of the operand; the mode of the result is
2738 different but can be deduced from MODE.
2743 expand_abs_nojump (enum machine_mode mode
, rtx op0
, rtx target
,
2744 int result_unsignedp
)
2749 result_unsignedp
= 1;
2751 /* First try to do it with a special abs instruction. */
2752 temp
= expand_unop (mode
, result_unsignedp
? abs_optab
: absv_optab
,
2757 /* For floating point modes, try clearing the sign bit. */
2758 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
2759 && GET_MODE_BITSIZE (mode
) <= 2 * HOST_BITS_PER_WIDE_INT
)
2761 const struct real_format
*fmt
= REAL_MODE_FORMAT (mode
);
2762 enum machine_mode imode
= int_mode_for_mode (mode
);
2763 int bitpos
= (fmt
!= 0) ? fmt
->signbit
: -1;
2765 if (imode
!= BLKmode
&& bitpos
>= 0)
2767 HOST_WIDE_INT hi
, lo
;
2768 rtx last
= get_last_insn ();
2770 /* Handle targets with different FP word orders. */
2771 if (FLOAT_WORDS_BIG_ENDIAN
!= WORDS_BIG_ENDIAN
)
2773 int nwords
= GET_MODE_BITSIZE (mode
) / BITS_PER_WORD
;
2774 int word
= nwords
- (bitpos
/ BITS_PER_WORD
) - 1;
2775 bitpos
= word
* BITS_PER_WORD
+ bitpos
% BITS_PER_WORD
;
2778 if (bitpos
< HOST_BITS_PER_WIDE_INT
)
2781 lo
= (HOST_WIDE_INT
) 1 << bitpos
;
2785 hi
= (HOST_WIDE_INT
) 1 << (bitpos
- HOST_BITS_PER_WIDE_INT
);
2788 temp
= expand_binop (imode
, and_optab
,
2789 gen_lowpart (imode
, op0
),
2790 immed_double_const (~lo
, ~hi
, imode
),
2791 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
2793 return gen_lowpart (mode
, temp
);
2794 delete_insns_since (last
);
2798 /* If we have a MAX insn, we can do this as MAX (x, -x). */
2799 if (smax_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2801 rtx last
= get_last_insn ();
2803 temp
= expand_unop (mode
, neg_optab
, op0
, NULL_RTX
, 0);
2805 temp
= expand_binop (mode
, smax_optab
, op0
, temp
, target
, 0,
2811 delete_insns_since (last
);
2814 /* If this machine has expensive jumps, we can do integer absolute
2815 value of X as (((signed) x >> (W-1)) ^ x) - ((signed) x >> (W-1)),
2816 where W is the width of MODE. */
2818 if (GET_MODE_CLASS (mode
) == MODE_INT
&& BRANCH_COST
>= 2)
2820 rtx extended
= expand_shift (RSHIFT_EXPR
, mode
, op0
,
2821 size_int (GET_MODE_BITSIZE (mode
) - 1),
2824 temp
= expand_binop (mode
, xor_optab
, extended
, op0
, target
, 0,
2827 temp
= expand_binop (mode
, result_unsignedp
? sub_optab
: subv_optab
,
2828 temp
, extended
, target
, 0, OPTAB_LIB_WIDEN
);
2838 expand_abs (enum machine_mode mode
, rtx op0
, rtx target
,
2839 int result_unsignedp
, int safe
)
2844 result_unsignedp
= 1;
2846 temp
= expand_abs_nojump (mode
, op0
, target
, result_unsignedp
);
2850 /* If that does not win, use conditional jump and negate. */
2852 /* It is safe to use the target if it is the same
2853 as the source if this is also a pseudo register */
2854 if (op0
== target
&& GET_CODE (op0
) == REG
2855 && REGNO (op0
) >= FIRST_PSEUDO_REGISTER
)
2858 op1
= gen_label_rtx ();
2859 if (target
== 0 || ! safe
2860 || GET_MODE (target
) != mode
2861 || (GET_CODE (target
) == MEM
&& MEM_VOLATILE_P (target
))
2862 || (GET_CODE (target
) == REG
2863 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
2864 target
= gen_reg_rtx (mode
);
2866 emit_move_insn (target
, op0
);
2869 /* If this mode is an integer too wide to compare properly,
2870 compare word by word. Rely on CSE to optimize constant cases. */
2871 if (GET_MODE_CLASS (mode
) == MODE_INT
2872 && ! can_compare_p (GE
, mode
, ccp_jump
))
2873 do_jump_by_parts_greater_rtx (mode
, 0, target
, const0_rtx
,
2876 do_compare_rtx_and_jump (target
, CONST0_RTX (mode
), GE
, 0, mode
,
2877 NULL_RTX
, NULL_RTX
, op1
);
2879 op0
= expand_unop (mode
, result_unsignedp
? neg_optab
: negv_optab
,
2882 emit_move_insn (target
, op0
);
2888 /* Emit code to compute the absolute value of OP0, with result to
2889 TARGET if convenient. (TARGET may be 0.) The return value says
2890 where the result actually is to be found.
2892 MODE is the mode of the operand; the mode of the result is
2893 different but can be deduced from MODE.
2895 UNSIGNEDP is relevant for complex integer modes. */
2898 expand_complex_abs (enum machine_mode mode
, rtx op0
, rtx target
,
2901 enum mode_class
class = GET_MODE_CLASS (mode
);
2902 enum machine_mode wider_mode
;
2904 rtx entry_last
= get_last_insn ();
2907 optab this_abs_optab
;
2909 /* Find the correct mode for the real and imaginary parts. */
2910 enum machine_mode submode
= GET_MODE_INNER (mode
);
2912 if (submode
== BLKmode
)
2915 op0
= protect_from_queue (op0
, 0);
2919 op0
= force_not_mem (op0
);
2922 last
= get_last_insn ();
2925 target
= protect_from_queue (target
, 1);
2927 this_abs_optab
= ! unsignedp
&& flag_trapv
2928 && (GET_MODE_CLASS(mode
) == MODE_INT
)
2929 ? absv_optab
: abs_optab
;
2931 if (this_abs_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
2933 int icode
= (int) this_abs_optab
->handlers
[(int) mode
].insn_code
;
2934 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
2940 temp
= gen_reg_rtx (submode
);
2942 if (GET_MODE (xop0
) != VOIDmode
2943 && GET_MODE (xop0
) != mode0
)
2944 xop0
= convert_to_mode (mode0
, xop0
, unsignedp
);
2946 /* Now, if insn doesn't accept our operand, put it into a pseudo. */
2948 if (! (*insn_data
[icode
].operand
[1].predicate
) (xop0
, mode0
))
2949 xop0
= copy_to_mode_reg (mode0
, xop0
);
2951 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, submode
))
2952 temp
= gen_reg_rtx (submode
);
2954 pat
= GEN_FCN (icode
) (temp
, xop0
);
2957 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
2958 && ! add_equal_note (pat
, temp
, this_abs_optab
->code
, xop0
,
2961 delete_insns_since (last
);
2962 return expand_unop (mode
, this_abs_optab
, op0
, NULL_RTX
,
2971 delete_insns_since (last
);
2974 /* It can't be done in this mode. Can we open-code it in a wider mode? */
2976 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
2977 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
2979 if (this_abs_optab
->handlers
[(int) wider_mode
].insn_code
2980 != CODE_FOR_nothing
)
2984 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
2985 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
2989 if (class != MODE_COMPLEX_INT
)
2992 target
= gen_reg_rtx (submode
);
2993 convert_move (target
, temp
, 0);
2997 return gen_lowpart (submode
, temp
);
3000 delete_insns_since (last
);
3004 /* Open-code the complex absolute-value operation
3005 if we can open-code sqrt. Otherwise it's not worth while. */
3006 if (sqrt_optab
->handlers
[(int) submode
].insn_code
!= CODE_FOR_nothing
3009 rtx real
, imag
, total
;
3011 real
= gen_realpart (submode
, op0
);
3012 imag
= gen_imagpart (submode
, op0
);
3014 /* Square both parts. */
3015 real
= expand_mult (submode
, real
, real
, NULL_RTX
, 0);
3016 imag
= expand_mult (submode
, imag
, imag
, NULL_RTX
, 0);
3018 /* Sum the parts. */
3019 total
= expand_binop (submode
, add_optab
, real
, imag
, NULL_RTX
,
3020 0, OPTAB_LIB_WIDEN
);
3022 /* Get sqrt in TARGET. Set TARGET to where the result is. */
3023 target
= expand_unop (submode
, sqrt_optab
, total
, target
, 0);
3025 delete_insns_since (last
);
3030 /* Now try a library call in this mode. */
3031 if (this_abs_optab
->handlers
[(int) mode
].libfunc
)
3038 /* Pass 1 for NO_QUEUE so we don't lose any increments
3039 if the libcall is cse'd or moved. */
3040 value
= emit_library_call_value (abs_optab
->handlers
[(int) mode
].libfunc
,
3041 NULL_RTX
, LCT_CONST
, submode
, 1, op0
, mode
);
3042 insns
= get_insns ();
3045 target
= gen_reg_rtx (submode
);
3046 emit_libcall_block (insns
, target
, value
,
3047 gen_rtx_fmt_e (this_abs_optab
->code
, mode
, op0
));
3052 /* It can't be done in this mode. Can we do it in a wider mode? */
3054 for (wider_mode
= GET_MODE_WIDER_MODE (mode
); wider_mode
!= VOIDmode
;
3055 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
))
3057 if ((this_abs_optab
->handlers
[(int) wider_mode
].insn_code
3058 != CODE_FOR_nothing
)
3059 || this_abs_optab
->handlers
[(int) wider_mode
].libfunc
)
3063 xop0
= convert_modes (wider_mode
, mode
, xop0
, unsignedp
);
3065 temp
= expand_complex_abs (wider_mode
, xop0
, NULL_RTX
, unsignedp
);
3069 if (class != MODE_COMPLEX_INT
)
3072 target
= gen_reg_rtx (submode
);
3073 convert_move (target
, temp
, 0);
3077 return gen_lowpart (submode
, temp
);
3080 delete_insns_since (last
);
3084 delete_insns_since (entry_last
);
3088 /* Generate an instruction whose insn-code is INSN_CODE,
3089 with two operands: an output TARGET and an input OP0.
3090 TARGET *must* be nonzero, and the output is always stored there.
3091 CODE is an rtx code such that (CODE OP0) is an rtx that describes
3092 the value that is stored into TARGET. */
3095 emit_unop_insn (int icode
, rtx target
, rtx op0
, enum rtx_code code
)
3098 enum machine_mode mode0
= insn_data
[icode
].operand
[1].mode
;
3101 temp
= target
= protect_from_queue (target
, 1);
3103 op0
= protect_from_queue (op0
, 0);
3105 /* Sign and zero extension from memory is often done specially on
3106 RISC machines, so forcing into a register here can pessimize
3108 if (flag_force_mem
&& code
!= SIGN_EXTEND
&& code
!= ZERO_EXTEND
)
3109 op0
= force_not_mem (op0
);
3111 /* Now, if insn does not accept our operands, put them into pseudos. */
3113 if (! (*insn_data
[icode
].operand
[1].predicate
) (op0
, mode0
))
3114 op0
= copy_to_mode_reg (mode0
, op0
);
3116 if (! (*insn_data
[icode
].operand
[0].predicate
) (temp
, GET_MODE (temp
))
3117 || (flag_force_mem
&& GET_CODE (temp
) == MEM
))
3118 temp
= gen_reg_rtx (GET_MODE (temp
));
3120 pat
= GEN_FCN (icode
) (temp
, op0
);
3122 if (INSN_P (pat
) && NEXT_INSN (pat
) != NULL_RTX
&& code
!= UNKNOWN
)
3123 add_equal_note (pat
, temp
, code
, op0
, NULL_RTX
);
3128 emit_move_insn (target
, temp
);
3131 /* Emit code to perform a series of operations on a multi-word quantity, one
3134 Such a block is preceded by a CLOBBER of the output, consists of multiple
3135 insns, each setting one word of the output, and followed by a SET copying
3136 the output to itself.
3138 Each of the insns setting words of the output receives a REG_NO_CONFLICT
3139 note indicating that it doesn't conflict with the (also multi-word)
3140 inputs. The entire block is surrounded by REG_LIBCALL and REG_RETVAL
3143 INSNS is a block of code generated to perform the operation, not including
3144 the CLOBBER and final copy. All insns that compute intermediate values
3145 are first emitted, followed by the block as described above.
3147 TARGET, OP0, and OP1 are the output and inputs of the operations,
3148 respectively. OP1 may be zero for a unary operation.
3150 EQUIV, if nonzero, is an expression to be placed into a REG_EQUAL note
3153 If TARGET is not a register, INSNS is simply emitted with no special
3154 processing. Likewise if anything in INSNS is not an INSN or if
3155 there is a libcall block inside INSNS.
3157 The final insn emitted is returned. */
3160 emit_no_conflict_block (rtx insns
, rtx target
, rtx op0
, rtx op1
, rtx equiv
)
3162 rtx prev
, next
, first
, last
, insn
;
3164 if (GET_CODE (target
) != REG
|| reload_in_progress
)
3165 return emit_insn (insns
);
3167 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3168 if (GET_CODE (insn
) != INSN
3169 || find_reg_note (insn
, REG_LIBCALL
, NULL_RTX
))
3170 return emit_insn (insns
);
3172 /* First emit all insns that do not store into words of the output and remove
3173 these from the list. */
3174 for (insn
= insns
; insn
; insn
= next
)
3179 next
= NEXT_INSN (insn
);
3181 /* Some ports (cris) create a libcall regions at their own. We must
3182 avoid any potential nesting of LIBCALLs. */
3183 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3184 remove_note (insn
, note
);
3185 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3186 remove_note (insn
, note
);
3188 if (GET_CODE (PATTERN (insn
)) == SET
|| GET_CODE (PATTERN (insn
)) == USE
3189 || GET_CODE (PATTERN (insn
)) == CLOBBER
)
3190 set
= PATTERN (insn
);
3191 else if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
3193 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
3194 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == SET
)
3196 set
= XVECEXP (PATTERN (insn
), 0, i
);
3204 if (! reg_overlap_mentioned_p (target
, SET_DEST (set
)))
3206 if (PREV_INSN (insn
))
3207 NEXT_INSN (PREV_INSN (insn
)) = next
;
3212 PREV_INSN (next
) = PREV_INSN (insn
);
3218 prev
= get_last_insn ();
3220 /* Now write the CLOBBER of the output, followed by the setting of each
3221 of the words, followed by the final copy. */
3222 if (target
!= op0
&& target
!= op1
)
3223 emit_insn (gen_rtx_CLOBBER (VOIDmode
, target
));
3225 for (insn
= insns
; insn
; insn
= next
)
3227 next
= NEXT_INSN (insn
);
3230 if (op1
&& GET_CODE (op1
) == REG
)
3231 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op1
,
3234 if (op0
&& GET_CODE (op0
) == REG
)
3235 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_NO_CONFLICT
, op0
,
3239 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3240 != CODE_FOR_nothing
)
3242 last
= emit_move_insn (target
, target
);
3244 set_unique_reg_note (last
, REG_EQUAL
, equiv
);
3248 last
= get_last_insn ();
3250 /* Remove any existing REG_EQUAL note from "last", or else it will
3251 be mistaken for a note referring to the full contents of the
3252 alleged libcall value when found together with the REG_RETVAL
3253 note added below. An existing note can come from an insn
3254 expansion at "last". */
3255 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3259 first
= get_insns ();
3261 first
= NEXT_INSN (prev
);
3263 /* Encapsulate the block so it gets manipulated as a unit. */
3264 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3266 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
, REG_NOTES (last
));
3271 /* Emit code to make a call to a constant function or a library call.
3273 INSNS is a list containing all insns emitted in the call.
3274 These insns leave the result in RESULT. Our block is to copy RESULT
3275 to TARGET, which is logically equivalent to EQUIV.
3277 We first emit any insns that set a pseudo on the assumption that these are
3278 loading constants into registers; doing so allows them to be safely cse'ed
3279 between blocks. Then we emit all the other insns in the block, followed by
3280 an insn to move RESULT to TARGET. This last insn will have a REQ_EQUAL
3281 note with an operand of EQUIV.
3283 Moving assignments to pseudos outside of the block is done to improve
3284 the generated code, but is not required to generate correct code,
3285 hence being unable to move an assignment is not grounds for not making
3286 a libcall block. There are two reasons why it is safe to leave these
3287 insns inside the block: First, we know that these pseudos cannot be
3288 used in generated RTL outside the block since they are created for
3289 temporary purposes within the block. Second, CSE will not record the
3290 values of anything set inside a libcall block, so we know they must
3291 be dead at the end of the block.
3293 Except for the first group of insns (the ones setting pseudos), the
3294 block is delimited by REG_RETVAL and REG_LIBCALL notes. */
3297 emit_libcall_block (rtx insns
, rtx target
, rtx result
, rtx equiv
)
3299 rtx final_dest
= target
;
3300 rtx prev
, next
, first
, last
, insn
;
3302 /* If this is a reg with REG_USERVAR_P set, then it could possibly turn
3303 into a MEM later. Protect the libcall block from this change. */
3304 if (! REG_P (target
) || REG_USERVAR_P (target
))
3305 target
= gen_reg_rtx (GET_MODE (target
));
3307 /* If we're using non-call exceptions, a libcall corresponding to an
3308 operation that may trap may also trap. */
3309 if (flag_non_call_exceptions
&& may_trap_p (equiv
))
3311 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3312 if (GET_CODE (insn
) == CALL_INSN
)
3314 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3316 if (note
!= 0 && INTVAL (XEXP (note
, 0)) <= 0)
3317 remove_note (insn
, note
);
3321 /* look for any CALL_INSNs in this sequence, and attach a REG_EH_REGION
3322 reg note to indicate that this call cannot throw or execute a nonlocal
3323 goto (unless there is already a REG_EH_REGION note, in which case
3325 for (insn
= insns
; insn
; insn
= NEXT_INSN (insn
))
3326 if (GET_CODE (insn
) == CALL_INSN
)
3328 rtx note
= find_reg_note (insn
, REG_EH_REGION
, NULL_RTX
);
3331 XEXP (note
, 0) = GEN_INT (-1);
3333 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_EH_REGION
, GEN_INT (-1),
3337 /* First emit all insns that set pseudos. Remove them from the list as
3338 we go. Avoid insns that set pseudos which were referenced in previous
3339 insns. These can be generated by move_by_pieces, for example,
3340 to update an address. Similarly, avoid insns that reference things
3341 set in previous insns. */
3343 for (insn
= insns
; insn
; insn
= next
)
3345 rtx set
= single_set (insn
);
3348 /* Some ports (cris) create a libcall regions at their own. We must
3349 avoid any potential nesting of LIBCALLs. */
3350 if ((note
= find_reg_note (insn
, REG_LIBCALL
, NULL
)) != NULL
)
3351 remove_note (insn
, note
);
3352 if ((note
= find_reg_note (insn
, REG_RETVAL
, NULL
)) != NULL
)
3353 remove_note (insn
, note
);
3355 next
= NEXT_INSN (insn
);
3357 if (set
!= 0 && GET_CODE (SET_DEST (set
)) == REG
3358 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
3360 || ((! INSN_P(insns
)
3361 || ! reg_mentioned_p (SET_DEST (set
), PATTERN (insns
)))
3362 && ! reg_used_between_p (SET_DEST (set
), insns
, insn
)
3363 && ! modified_in_p (SET_SRC (set
), insns
)
3364 && ! modified_between_p (SET_SRC (set
), insns
, insn
))))
3366 if (PREV_INSN (insn
))
3367 NEXT_INSN (PREV_INSN (insn
)) = next
;
3372 PREV_INSN (next
) = PREV_INSN (insn
);
3377 /* Some ports use a loop to copy large arguments onto the stack.
3378 Don't move anything outside such a loop. */
3379 if (GET_CODE (insn
) == CODE_LABEL
)
3383 prev
= get_last_insn ();
3385 /* Write the remaining insns followed by the final copy. */
3387 for (insn
= insns
; insn
; insn
= next
)
3389 next
= NEXT_INSN (insn
);
3394 last
= emit_move_insn (target
, result
);
3395 if (mov_optab
->handlers
[(int) GET_MODE (target
)].insn_code
3396 != CODE_FOR_nothing
)
3397 set_unique_reg_note (last
, REG_EQUAL
, copy_rtx (equiv
));
3400 /* Remove any existing REG_EQUAL note from "last", or else it will
3401 be mistaken for a note referring to the full contents of the
3402 libcall value when found together with the REG_RETVAL note added
3403 below. An existing note can come from an insn expansion at
3405 remove_note (last
, find_reg_note (last
, REG_EQUAL
, NULL_RTX
));
3408 if (final_dest
!= target
)
3409 emit_move_insn (final_dest
, target
);
3412 first
= get_insns ();
3414 first
= NEXT_INSN (prev
);
3416 /* Encapsulate the block so it gets manipulated as a unit. */
3417 if (!flag_non_call_exceptions
|| !may_trap_p (equiv
))
3419 /* We can't attach the REG_LIBCALL and REG_RETVAL notes
3420 when the encapsulated region would not be in one basic block,
3421 i.e. when there is a control_flow_insn_p insn between FIRST and LAST.
3423 bool attach_libcall_retval_notes
= true;
3424 next
= NEXT_INSN (last
);
3425 for (insn
= first
; insn
!= next
; insn
= NEXT_INSN (insn
))
3426 if (control_flow_insn_p (insn
))
3428 attach_libcall_retval_notes
= false;
3432 if (attach_libcall_retval_notes
)
3434 REG_NOTES (first
) = gen_rtx_INSN_LIST (REG_LIBCALL
, last
,
3436 REG_NOTES (last
) = gen_rtx_INSN_LIST (REG_RETVAL
, first
,
3442 /* Generate code to store zero in X. */
3445 emit_clr_insn (rtx x
)
3447 emit_move_insn (x
, const0_rtx
);
3450 /* Generate code to store 1 in X
3451 assuming it contains zero beforehand. */
3454 emit_0_to_1_insn (rtx x
)
3456 emit_move_insn (x
, const1_rtx
);
3459 /* Nonzero if we can perform a comparison of mode MODE straightforwardly.
3460 PURPOSE describes how this comparison will be used. CODE is the rtx
3461 comparison code we will be using.
3463 ??? Actually, CODE is slightly weaker than that. A target is still
3464 required to implement all of the normal bcc operations, but not
3465 required to implement all (or any) of the unordered bcc operations. */
3468 can_compare_p (enum rtx_code code
, enum machine_mode mode
,
3469 enum can_compare_purpose purpose
)
3473 if (cmp_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3475 if (purpose
== ccp_jump
)
3476 return bcc_gen_fctn
[(int) code
] != NULL
;
3477 else if (purpose
== ccp_store_flag
)
3478 return setcc_gen_code
[(int) code
] != CODE_FOR_nothing
;
3480 /* There's only one cmov entry point, and it's allowed to fail. */
3483 if (purpose
== ccp_jump
3484 && cbranch_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3486 if (purpose
== ccp_cmov
3487 && cmov_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3489 if (purpose
== ccp_store_flag
3490 && cstore_optab
->handlers
[(int) mode
].insn_code
!= CODE_FOR_nothing
)
3493 mode
= GET_MODE_WIDER_MODE (mode
);
3495 while (mode
!= VOIDmode
);
3500 /* This function is called when we are going to emit a compare instruction that
3501 compares the values found in *PX and *PY, using the rtl operator COMPARISON.
3503 *PMODE is the mode of the inputs (in case they are const_int).
3504 *PUNSIGNEDP nonzero says that the operands are unsigned;
3505 this matters if they need to be widened.
3507 If they have mode BLKmode, then SIZE specifies the size of both operands.
3509 This function performs all the setup necessary so that the caller only has
3510 to emit a single comparison insn. This setup can involve doing a BLKmode
3511 comparison or emitting a library call to perform the comparison if no insn
3512 is available to handle it.
3513 The values which are passed in through pointers can be modified; the caller
3514 should perform the comparison on the modified values. */
3517 prepare_cmp_insn (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
, rtx size
,
3518 enum machine_mode
*pmode
, int *punsignedp
,
3519 enum can_compare_purpose purpose
)
3521 enum machine_mode mode
= *pmode
;
3522 rtx x
= *px
, y
= *py
;
3523 int unsignedp
= *punsignedp
;
3524 enum mode_class
class;
3526 class = GET_MODE_CLASS (mode
);
3528 /* They could both be VOIDmode if both args are immediate constants,
3529 but we should fold that at an earlier stage.
3530 With no special code here, this will call abort,
3531 reminding the programmer to implement such folding. */
3533 if (mode
!= BLKmode
&& flag_force_mem
)
3535 /* Load duplicate non-volatile operands once. */
3536 if (rtx_equal_p (x
, y
) && ! volatile_refs_p (x
))
3538 x
= force_not_mem (x
);
3543 x
= force_not_mem (x
);
3544 y
= force_not_mem (y
);
3548 /* If we are inside an appropriately-short loop and one operand is an
3549 expensive constant, force it into a register. */
3550 if (CONSTANT_P (x
) && preserve_subexpressions_p ()
3551 && rtx_cost (x
, COMPARE
) > COSTS_N_INSNS (1))
3552 x
= force_reg (mode
, x
);
3554 if (CONSTANT_P (y
) && preserve_subexpressions_p ()
3555 && rtx_cost (y
, COMPARE
) > COSTS_N_INSNS (1))
3556 y
= force_reg (mode
, y
);
3559 /* Abort if we have a non-canonical comparison. The RTL documentation
3560 states that canonical comparisons are required only for targets which
3562 if (CONSTANT_P (x
) && ! CONSTANT_P (y
))
3566 /* Don't let both operands fail to indicate the mode. */
3567 if (GET_MODE (x
) == VOIDmode
&& GET_MODE (y
) == VOIDmode
)
3568 x
= force_reg (mode
, x
);
3570 /* Handle all BLKmode compares. */
3572 if (mode
== BLKmode
)
3575 enum machine_mode result_mode
;
3576 rtx opalign ATTRIBUTE_UNUSED
3577 = GEN_INT (MIN (MEM_ALIGN (x
), MEM_ALIGN (y
)) / BITS_PER_UNIT
);
3580 x
= protect_from_queue (x
, 0);
3581 y
= protect_from_queue (y
, 0);
3585 #ifdef HAVE_cmpmemqi
3587 && GET_CODE (size
) == CONST_INT
3588 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
3590 result_mode
= insn_data
[(int) CODE_FOR_cmpmemqi
].operand
[0].mode
;
3591 result
= gen_reg_rtx (result_mode
);
3592 emit_insn (gen_cmpmemqi (result
, x
, y
, size
, opalign
));
3596 #ifdef HAVE_cmpmemhi
3598 && GET_CODE (size
) == CONST_INT
3599 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
3601 result_mode
= insn_data
[(int) CODE_FOR_cmpmemhi
].operand
[0].mode
;
3602 result
= gen_reg_rtx (result_mode
);
3603 emit_insn (gen_cmpmemhi (result
, x
, y
, size
, opalign
));
3607 #ifdef HAVE_cmpmemsi
3610 result_mode
= insn_data
[(int) CODE_FOR_cmpmemsi
].operand
[0].mode
;
3611 result
= gen_reg_rtx (result_mode
);
3612 size
= protect_from_queue (size
, 0);
3613 emit_insn (gen_cmpmemsi (result
, x
, y
,
3614 convert_to_mode (SImode
, size
, 1),
3619 #ifdef HAVE_cmpstrqi
3621 && GET_CODE (size
) == CONST_INT
3622 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (QImode
)))
3624 result_mode
= insn_data
[(int) CODE_FOR_cmpstrqi
].operand
[0].mode
;
3625 result
= gen_reg_rtx (result_mode
);
3626 emit_insn (gen_cmpstrqi (result
, x
, y
, size
, opalign
));
3630 #ifdef HAVE_cmpstrhi
3632 && GET_CODE (size
) == CONST_INT
3633 && INTVAL (size
) < (1 << GET_MODE_BITSIZE (HImode
)))
3635 result_mode
= insn_data
[(int) CODE_FOR_cmpstrhi
].operand
[0].mode
;
3636 result
= gen_reg_rtx (result_mode
);
3637 emit_insn (gen_cmpstrhi (result
, x
, y
, size
, opalign
));
3641 #ifdef HAVE_cmpstrsi
3644 result_mode
= insn_data
[(int) CODE_FOR_cmpstrsi
].operand
[0].mode
;
3645 result
= gen_reg_rtx (result_mode
);
3646 size
= protect_from_queue (size
, 0);
3647 emit_insn (gen_cmpstrsi (result
, x
, y
,
3648 convert_to_mode (SImode
, size
, 1),
3654 #ifdef TARGET_MEM_FUNCTIONS
3655 result
= emit_library_call_value (memcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3656 TYPE_MODE (integer_type_node
), 3,
3657 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3658 convert_to_mode (TYPE_MODE (sizetype
), size
,
3659 TREE_UNSIGNED (sizetype
)),
3660 TYPE_MODE (sizetype
));
3662 result
= emit_library_call_value (bcmp_libfunc
, NULL_RTX
, LCT_PURE_MAKE_BLOCK
,
3663 TYPE_MODE (integer_type_node
), 3,
3664 XEXP (x
, 0), Pmode
, XEXP (y
, 0), Pmode
,
3665 convert_to_mode (TYPE_MODE (integer_type_node
),
3667 TREE_UNSIGNED (integer_type_node
)),
3668 TYPE_MODE (integer_type_node
));
3671 result_mode
= TYPE_MODE (integer_type_node
);
3675 *pmode
= result_mode
;
3681 if (can_compare_p (*pcomparison
, mode
, purpose
))
3684 /* Handle a lib call just for the mode we are using. */
3686 if (cmp_optab
->handlers
[(int) mode
].libfunc
&& class != MODE_FLOAT
)
3688 rtx libfunc
= cmp_optab
->handlers
[(int) mode
].libfunc
;
3691 /* If we want unsigned, and this mode has a distinct unsigned
3692 comparison routine, use that. */
3693 if (unsignedp
&& ucmp_optab
->handlers
[(int) mode
].libfunc
)
3694 libfunc
= ucmp_optab
->handlers
[(int) mode
].libfunc
;
3696 result
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST_MAKE_BLOCK
,
3697 word_mode
, 2, x
, mode
, y
, mode
);
3699 /* Integer comparison returns a result that must be compared against 1,
3700 so that even if we do an unsigned compare afterward,
3701 there is still a value that can represent the result "less than". */
3708 if (class == MODE_FLOAT
)
3709 prepare_float_lib_cmp (px
, py
, pcomparison
, pmode
, punsignedp
);
3715 /* Before emitting an insn with code ICODE, make sure that X, which is going
3716 to be used for operand OPNUM of the insn, is converted from mode MODE to
3717 WIDER_MODE (UNSIGNEDP determines whether it is an unsigned conversion), and
3718 that it is accepted by the operand predicate. Return the new value. */
3721 prepare_operand (int icode
, rtx x
, int opnum
, enum machine_mode mode
,
3722 enum machine_mode wider_mode
, int unsignedp
)
3724 x
= protect_from_queue (x
, 0);
3726 if (mode
!= wider_mode
)
3727 x
= convert_modes (wider_mode
, mode
, x
, unsignedp
);
3729 if (! (*insn_data
[icode
].operand
[opnum
].predicate
)
3730 (x
, insn_data
[icode
].operand
[opnum
].mode
))
3734 x
= copy_to_mode_reg (insn_data
[icode
].operand
[opnum
].mode
, x
);
3740 /* Subroutine of emit_cmp_and_jump_insns; this function is called when we know
3741 we can do the comparison.
3742 The arguments are the same as for emit_cmp_and_jump_insns; but LABEL may
3743 be NULL_RTX which indicates that only a comparison is to be generated. */
3746 emit_cmp_and_jump_insn_1 (rtx x
, rtx y
, enum machine_mode mode
,
3747 enum rtx_code comparison
, int unsignedp
, rtx label
)
3749 rtx test
= gen_rtx_fmt_ee (comparison
, mode
, x
, y
);
3750 enum mode_class
class = GET_MODE_CLASS (mode
);
3751 enum machine_mode wider_mode
= mode
;
3753 /* Try combined insns first. */
3756 enum insn_code icode
;
3757 PUT_MODE (test
, wider_mode
);
3761 icode
= cbranch_optab
->handlers
[(int) wider_mode
].insn_code
;
3763 if (icode
!= CODE_FOR_nothing
3764 && (*insn_data
[icode
].operand
[0].predicate
) (test
, wider_mode
))
3766 x
= prepare_operand (icode
, x
, 1, mode
, wider_mode
, unsignedp
);
3767 y
= prepare_operand (icode
, y
, 2, mode
, wider_mode
, unsignedp
);
3768 emit_jump_insn (GEN_FCN (icode
) (test
, x
, y
, label
));
3773 /* Handle some compares against zero. */
3774 icode
= (int) tst_optab
->handlers
[(int) wider_mode
].insn_code
;
3775 if (y
== CONST0_RTX (mode
) && icode
!= CODE_FOR_nothing
)
3777 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3778 emit_insn (GEN_FCN (icode
) (x
));
3780 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3784 /* Handle compares for which there is a directly suitable insn. */
3786 icode
= (int) cmp_optab
->handlers
[(int) wider_mode
].insn_code
;
3787 if (icode
!= CODE_FOR_nothing
)
3789 x
= prepare_operand (icode
, x
, 0, mode
, wider_mode
, unsignedp
);
3790 y
= prepare_operand (icode
, y
, 1, mode
, wider_mode
, unsignedp
);
3791 emit_insn (GEN_FCN (icode
) (x
, y
));
3793 emit_jump_insn ((*bcc_gen_fctn
[(int) comparison
]) (label
));
3797 if (class != MODE_INT
&& class != MODE_FLOAT
3798 && class != MODE_COMPLEX_FLOAT
)
3801 wider_mode
= GET_MODE_WIDER_MODE (wider_mode
);
3803 while (wider_mode
!= VOIDmode
);
3808 /* Generate code to compare X with Y so that the condition codes are
3809 set and to jump to LABEL if the condition is true. If X is a
3810 constant and Y is not a constant, then the comparison is swapped to
3811 ensure that the comparison RTL has the canonical form.
3813 UNSIGNEDP nonzero says that X and Y are unsigned; this matters if they
3814 need to be widened by emit_cmp_insn. UNSIGNEDP is also used to select
3815 the proper branch condition code.
3817 If X and Y have mode BLKmode, then SIZE specifies the size of both X and Y.
3819 MODE is the mode of the inputs (in case they are const_int).
3821 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). It will
3822 be passed unchanged to emit_cmp_insn, then potentially converted into an
3823 unsigned variant based on UNSIGNEDP to select a proper jump instruction. */
3826 emit_cmp_and_jump_insns (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3827 enum machine_mode mode
, int unsignedp
, rtx label
)
3829 rtx op0
= x
, op1
= y
;
3831 /* Swap operands and condition to ensure canonical RTL. */
3832 if (swap_commutative_operands_p (x
, y
))
3834 /* If we're not emitting a branch, this means some caller
3840 comparison
= swap_condition (comparison
);
3844 /* If OP0 is still a constant, then both X and Y must be constants. Force
3845 X into a register to avoid aborting in emit_cmp_insn due to non-canonical
3847 if (CONSTANT_P (op0
))
3848 op0
= force_reg (mode
, op0
);
3853 comparison
= unsigned_condition (comparison
);
3855 prepare_cmp_insn (&op0
, &op1
, &comparison
, size
, &mode
, &unsignedp
,
3857 emit_cmp_and_jump_insn_1 (op0
, op1
, mode
, comparison
, unsignedp
, label
);
3860 /* Like emit_cmp_and_jump_insns, but generate only the comparison. */
3863 emit_cmp_insn (rtx x
, rtx y
, enum rtx_code comparison
, rtx size
,
3864 enum machine_mode mode
, int unsignedp
)
3866 emit_cmp_and_jump_insns (x
, y
, comparison
, size
, mode
, unsignedp
, 0);
3869 /* Emit a library call comparison between floating point X and Y.
3870 COMPARISON is the rtl operator to compare with (EQ, NE, GT, etc.). */
3873 prepare_float_lib_cmp (rtx
*px
, rtx
*py
, enum rtx_code
*pcomparison
,
3874 enum machine_mode
*pmode
, int *punsignedp
)
3876 enum rtx_code comparison
= *pcomparison
;
3877 enum rtx_code swapped
= swap_condition (comparison
);
3878 rtx x
= protect_from_queue (*px
, 0);
3879 rtx y
= protect_from_queue (*py
, 0);
3880 enum machine_mode orig_mode
= GET_MODE (x
);
3881 enum machine_mode mode
;
3882 rtx value
, target
, insns
, equiv
;
3885 for (mode
= orig_mode
; mode
!= VOIDmode
; mode
= GET_MODE_WIDER_MODE (mode
))
3887 if ((libfunc
= code_to_optab
[comparison
]->handlers
[mode
].libfunc
))
3890 if ((libfunc
= code_to_optab
[swapped
]->handlers
[mode
].libfunc
))
3893 tmp
= x
; x
= y
; y
= tmp
;
3894 comparison
= swapped
;
3899 if (mode
== VOIDmode
)
3902 if (mode
!= orig_mode
)
3904 x
= convert_to_mode (mode
, x
, 0);
3905 y
= convert_to_mode (mode
, y
, 0);
3908 /* If we're optimizing attach a REG_EQUAL note describing the semantics
3909 of the libcall to the RTL. The allows the RTL optimizers to delete
3910 the libcall if the condition can be determined at compile-time. */
3912 && ! side_effects_p (x
)
3913 && ! side_effects_p (y
))
3915 if (comparison
== UNORDERED
)
3917 rtx temp
= simplify_gen_relational (NE
, word_mode
, mode
, x
, x
);
3918 equiv
= simplify_gen_relational (NE
, word_mode
, mode
, y
, y
);
3919 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
, word_mode
,
3920 temp
, const_true_rtx
, equiv
);
3924 equiv
= simplify_gen_relational (comparison
, word_mode
, mode
, x
, y
);
3925 if (! FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3927 rtx true_rtx
, false_rtx
;
3932 true_rtx
= const0_rtx
;
3933 false_rtx
= const_true_rtx
;
3937 true_rtx
= const_true_rtx
;
3938 false_rtx
= const0_rtx
;
3942 true_rtx
= const1_rtx
;
3943 false_rtx
= const0_rtx
;
3947 true_rtx
= const0_rtx
;
3948 false_rtx
= constm1_rtx
;
3952 true_rtx
= constm1_rtx
;
3953 false_rtx
= const0_rtx
;
3957 true_rtx
= const0_rtx
;
3958 false_rtx
= const1_rtx
;
3964 equiv
= simplify_gen_ternary (IF_THEN_ELSE
, word_mode
,
3966 true_rtx
, false_rtx
);
3974 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
3975 word_mode
, 2, x
, mode
, y
, mode
);
3976 insns
= get_insns ();
3979 target
= gen_reg_rtx (word_mode
);
3980 emit_libcall_block (insns
, target
, value
, equiv
);
3983 if (comparison
== UNORDERED
3984 || FLOAT_LIB_COMPARE_RETURNS_BOOL (mode
, comparison
))
3990 *pcomparison
= comparison
;
3994 /* Generate code to indirectly jump to a location given in the rtx LOC. */
3997 emit_indirect_jump (rtx loc
)
3999 if (! ((*insn_data
[(int) CODE_FOR_indirect_jump
].operand
[0].predicate
)
4001 loc
= copy_to_mode_reg (Pmode
, loc
);
4003 emit_jump_insn (gen_indirect_jump (loc
));
4007 #ifdef HAVE_conditional_move
4009 /* Emit a conditional move instruction if the machine supports one for that
4010 condition and machine mode.
4012 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4013 the mode to use should they be constants. If it is VOIDmode, they cannot
4016 OP2 should be stored in TARGET if the comparison is true, otherwise OP3
4017 should be stored there. MODE is the mode to use should they be constants.
4018 If it is VOIDmode, they cannot both be constants.
4020 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4021 is not supported. */
4024 emit_conditional_move (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4025 enum machine_mode cmode
, rtx op2
, rtx op3
,
4026 enum machine_mode mode
, int unsignedp
)
4028 rtx tem
, subtarget
, comparison
, insn
;
4029 enum insn_code icode
;
4030 enum rtx_code reversed
;
4032 /* If one operand is constant, make it the second one. Only do this
4033 if the other operand is not constant as well. */
4035 if (swap_commutative_operands_p (op0
, op1
))
4040 code
= swap_condition (code
);
4043 /* get_condition will prefer to generate LT and GT even if the old
4044 comparison was against zero, so undo that canonicalization here since
4045 comparisons against zero are cheaper. */
4046 if (code
== LT
&& op1
== const1_rtx
)
4047 code
= LE
, op1
= const0_rtx
;
4048 else if (code
== GT
&& op1
== constm1_rtx
)
4049 code
= GE
, op1
= const0_rtx
;
4051 if (cmode
== VOIDmode
)
4052 cmode
= GET_MODE (op0
);
4054 if (swap_commutative_operands_p (op2
, op3
)
4055 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4064 if (mode
== VOIDmode
)
4065 mode
= GET_MODE (op2
);
4067 icode
= movcc_gen_code
[mode
];
4069 if (icode
== CODE_FOR_nothing
)
4074 op2
= force_not_mem (op2
);
4075 op3
= force_not_mem (op3
);
4079 target
= protect_from_queue (target
, 1);
4081 target
= gen_reg_rtx (mode
);
4087 op2
= protect_from_queue (op2
, 0);
4088 op3
= protect_from_queue (op3
, 0);
4090 /* If the insn doesn't accept these operands, put them in pseudos. */
4092 if (! (*insn_data
[icode
].operand
[0].predicate
)
4093 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4094 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4096 if (! (*insn_data
[icode
].operand
[2].predicate
)
4097 (op2
, insn_data
[icode
].operand
[2].mode
))
4098 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4100 if (! (*insn_data
[icode
].operand
[3].predicate
)
4101 (op3
, insn_data
[icode
].operand
[3].mode
))
4102 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4104 /* Everything should now be in the suitable form, so emit the compare insn
4105 and then the conditional move. */
4108 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4110 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4111 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4112 return NULL and let the caller figure out how best to deal with this
4114 if (GET_CODE (comparison
) != code
)
4117 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4119 /* If that failed, then give up. */
4125 if (subtarget
!= target
)
4126 convert_move (target
, subtarget
, 0);
4131 /* Return nonzero if a conditional move of mode MODE is supported.
4133 This function is for combine so it can tell whether an insn that looks
4134 like a conditional move is actually supported by the hardware. If we
4135 guess wrong we lose a bit on optimization, but that's it. */
4136 /* ??? sparc64 supports conditionally moving integers values based on fp
4137 comparisons, and vice versa. How do we handle them? */
4140 can_conditionally_move_p (enum machine_mode mode
)
4142 if (movcc_gen_code
[mode
] != CODE_FOR_nothing
)
4148 #endif /* HAVE_conditional_move */
4150 /* Emit a conditional addition instruction if the machine supports one for that
4151 condition and machine mode.
4153 OP0 and OP1 are the operands that should be compared using CODE. CMODE is
4154 the mode to use should they be constants. If it is VOIDmode, they cannot
4157 OP2 should be stored in TARGET if the comparison is true, otherwise OP2+OP3
4158 should be stored there. MODE is the mode to use should they be constants.
4159 If it is VOIDmode, they cannot both be constants.
4161 The result is either TARGET (perhaps modified) or NULL_RTX if the operation
4162 is not supported. */
4165 emit_conditional_add (rtx target
, enum rtx_code code
, rtx op0
, rtx op1
,
4166 enum machine_mode cmode
, rtx op2
, rtx op3
,
4167 enum machine_mode mode
, int unsignedp
)
4169 rtx tem
, subtarget
, comparison
, insn
;
4170 enum insn_code icode
;
4171 enum rtx_code reversed
;
4173 /* If one operand is constant, make it the second one. Only do this
4174 if the other operand is not constant as well. */
4176 if (swap_commutative_operands_p (op0
, op1
))
4181 code
= swap_condition (code
);
4184 /* get_condition will prefer to generate LT and GT even if the old
4185 comparison was against zero, so undo that canonicalization here since
4186 comparisons against zero are cheaper. */
4187 if (code
== LT
&& op1
== const1_rtx
)
4188 code
= LE
, op1
= const0_rtx
;
4189 else if (code
== GT
&& op1
== constm1_rtx
)
4190 code
= GE
, op1
= const0_rtx
;
4192 if (cmode
== VOIDmode
)
4193 cmode
= GET_MODE (op0
);
4195 if (swap_commutative_operands_p (op2
, op3
)
4196 && ((reversed
= reversed_comparison_code_parts (code
, op0
, op1
, NULL
))
4205 if (mode
== VOIDmode
)
4206 mode
= GET_MODE (op2
);
4208 icode
= addcc_optab
->handlers
[(int) mode
].insn_code
;
4210 if (icode
== CODE_FOR_nothing
)
4215 op2
= force_not_mem (op2
);
4216 op3
= force_not_mem (op3
);
4220 target
= protect_from_queue (target
, 1);
4222 target
= gen_reg_rtx (mode
);
4228 op2
= protect_from_queue (op2
, 0);
4229 op3
= protect_from_queue (op3
, 0);
4231 /* If the insn doesn't accept these operands, put them in pseudos. */
4233 if (! (*insn_data
[icode
].operand
[0].predicate
)
4234 (subtarget
, insn_data
[icode
].operand
[0].mode
))
4235 subtarget
= gen_reg_rtx (insn_data
[icode
].operand
[0].mode
);
4237 if (! (*insn_data
[icode
].operand
[2].predicate
)
4238 (op2
, insn_data
[icode
].operand
[2].mode
))
4239 op2
= copy_to_mode_reg (insn_data
[icode
].operand
[2].mode
, op2
);
4241 if (! (*insn_data
[icode
].operand
[3].predicate
)
4242 (op3
, insn_data
[icode
].operand
[3].mode
))
4243 op3
= copy_to_mode_reg (insn_data
[icode
].operand
[3].mode
, op3
);
4245 /* Everything should now be in the suitable form, so emit the compare insn
4246 and then the conditional move. */
4249 = compare_from_rtx (op0
, op1
, code
, unsignedp
, cmode
, NULL_RTX
);
4251 /* ??? Watch for const0_rtx (nop) and const_true_rtx (unconditional)? */
4252 /* We can get const0_rtx or const_true_rtx in some circumstances. Just
4253 return NULL and let the caller figure out how best to deal with this
4255 if (GET_CODE (comparison
) != code
)
4258 insn
= GEN_FCN (icode
) (subtarget
, comparison
, op2
, op3
);
4260 /* If that failed, then give up. */
4266 if (subtarget
!= target
)
4267 convert_move (target
, subtarget
, 0);
4272 /* These functions attempt to generate an insn body, rather than
4273 emitting the insn, but if the gen function already emits them, we
4274 make no attempt to turn them back into naked patterns.
4276 They do not protect from queued increments,
4277 because they may be used 1) in protect_from_queue itself
4278 and 2) in other passes where there is no queue. */
4280 /* Generate and return an insn body to add Y to X. */
4283 gen_add2_insn (rtx x
, rtx y
)
4285 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4287 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4288 (x
, insn_data
[icode
].operand
[0].mode
))
4289 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4290 (x
, insn_data
[icode
].operand
[1].mode
))
4291 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4292 (y
, insn_data
[icode
].operand
[2].mode
)))
4295 return (GEN_FCN (icode
) (x
, x
, y
));
4298 /* Generate and return an insn body to add r1 and c,
4299 storing the result in r0. */
4301 gen_add3_insn (rtx r0
, rtx r1
, rtx c
)
4303 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4305 if (icode
== CODE_FOR_nothing
4306 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4307 (r0
, insn_data
[icode
].operand
[0].mode
))
4308 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4309 (r1
, insn_data
[icode
].operand
[1].mode
))
4310 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4311 (c
, insn_data
[icode
].operand
[2].mode
)))
4314 return (GEN_FCN (icode
) (r0
, r1
, c
));
4318 have_add2_insn (rtx x
, rtx y
)
4322 if (GET_MODE (x
) == VOIDmode
)
4325 icode
= (int) add_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4327 if (icode
== CODE_FOR_nothing
)
4330 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4331 (x
, insn_data
[icode
].operand
[0].mode
))
4332 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4333 (x
, insn_data
[icode
].operand
[1].mode
))
4334 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4335 (y
, insn_data
[icode
].operand
[2].mode
)))
4341 /* Generate and return an insn body to subtract Y from X. */
4344 gen_sub2_insn (rtx x
, rtx y
)
4346 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4348 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4349 (x
, insn_data
[icode
].operand
[0].mode
))
4350 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4351 (x
, insn_data
[icode
].operand
[1].mode
))
4352 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4353 (y
, insn_data
[icode
].operand
[2].mode
)))
4356 return (GEN_FCN (icode
) (x
, x
, y
));
4359 /* Generate and return an insn body to subtract r1 and c,
4360 storing the result in r0. */
4362 gen_sub3_insn (rtx r0
, rtx r1
, rtx c
)
4364 int icode
= (int) sub_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
4366 if (icode
== CODE_FOR_nothing
4367 || ! ((*insn_data
[icode
].operand
[0].predicate
)
4368 (r0
, insn_data
[icode
].operand
[0].mode
))
4369 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4370 (r1
, insn_data
[icode
].operand
[1].mode
))
4371 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4372 (c
, insn_data
[icode
].operand
[2].mode
)))
4375 return (GEN_FCN (icode
) (r0
, r1
, c
));
4379 have_sub2_insn (rtx x
, rtx y
)
4383 if (GET_MODE (x
) == VOIDmode
)
4386 icode
= (int) sub_optab
->handlers
[(int) GET_MODE (x
)].insn_code
;
4388 if (icode
== CODE_FOR_nothing
)
4391 if (! ((*insn_data
[icode
].operand
[0].predicate
)
4392 (x
, insn_data
[icode
].operand
[0].mode
))
4393 || ! ((*insn_data
[icode
].operand
[1].predicate
)
4394 (x
, insn_data
[icode
].operand
[1].mode
))
4395 || ! ((*insn_data
[icode
].operand
[2].predicate
)
4396 (y
, insn_data
[icode
].operand
[2].mode
)))
4402 /* Generate the body of an instruction to copy Y into X.
4403 It may be a list of insns, if one insn isn't enough. */
4406 gen_move_insn (rtx x
, rtx y
)
4411 emit_move_insn_1 (x
, y
);
4417 /* Return the insn code used to extend FROM_MODE to TO_MODE.
4418 UNSIGNEDP specifies zero-extension instead of sign-extension. If
4419 no such operation exists, CODE_FOR_nothing will be returned. */
4422 can_extend_p (enum machine_mode to_mode
, enum machine_mode from_mode
,
4426 #ifdef HAVE_ptr_extend
4428 return CODE_FOR_ptr_extend
;
4431 tab
= unsignedp
? zext_optab
: sext_optab
;
4432 return tab
->handlers
[to_mode
][from_mode
].insn_code
;
4435 /* Generate the body of an insn to extend Y (with mode MFROM)
4436 into X (with mode MTO). Do zero-extension if UNSIGNEDP is nonzero. */
4439 gen_extend_insn (rtx x
, rtx y
, enum machine_mode mto
,
4440 enum machine_mode mfrom
, int unsignedp
)
4442 enum insn_code icode
= can_extend_p (mto
, mfrom
, unsignedp
);
4443 return GEN_FCN (icode
) (x
, y
);
4446 /* can_fix_p and can_float_p say whether the target machine
4447 can directly convert a given fixed point type to
4448 a given floating point type, or vice versa.
4449 The returned value is the CODE_FOR_... value to use,
4450 or CODE_FOR_nothing if these modes cannot be directly converted.
4452 *TRUNCP_PTR is set to 1 if it is necessary to output
4453 an explicit FTRUNC insn before the fix insn; otherwise 0. */
4455 static enum insn_code
4456 can_fix_p (enum machine_mode fixmode
, enum machine_mode fltmode
,
4457 int unsignedp
, int *truncp_ptr
)
4460 enum insn_code icode
;
4462 tab
= unsignedp
? ufixtrunc_optab
: sfixtrunc_optab
;
4463 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
4464 if (icode
!= CODE_FOR_nothing
)
4470 tab
= unsignedp
? ufix_optab
: sfix_optab
;
4471 icode
= tab
->handlers
[fixmode
][fltmode
].insn_code
;
4472 if (icode
!= CODE_FOR_nothing
4473 && ftrunc_optab
->handlers
[fltmode
].insn_code
!= CODE_FOR_nothing
)
4480 return CODE_FOR_nothing
;
4483 static enum insn_code
4484 can_float_p (enum machine_mode fltmode
, enum machine_mode fixmode
,
4489 tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4490 return tab
->handlers
[fltmode
][fixmode
].insn_code
;
4493 /* Generate code to convert FROM to floating point
4494 and store in TO. FROM must be fixed point and not VOIDmode.
4495 UNSIGNEDP nonzero means regard FROM as unsigned.
4496 Normally this is done by correcting the final value
4497 if it is negative. */
4500 expand_float (rtx to
, rtx from
, int unsignedp
)
4502 enum insn_code icode
;
4504 enum machine_mode fmode
, imode
;
4506 /* Crash now, because we won't be able to decide which mode to use. */
4507 if (GET_MODE (from
) == VOIDmode
)
4510 /* Look for an insn to do the conversion. Do it in the specified
4511 modes if possible; otherwise convert either input, output or both to
4512 wider mode. If the integer mode is wider than the mode of FROM,
4513 we can do the conversion signed even if the input is unsigned. */
4515 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4516 fmode
= GET_MODE_WIDER_MODE (fmode
))
4517 for (imode
= GET_MODE (from
); imode
!= VOIDmode
;
4518 imode
= GET_MODE_WIDER_MODE (imode
))
4520 int doing_unsigned
= unsignedp
;
4522 if (fmode
!= GET_MODE (to
)
4523 && significand_size (fmode
) < GET_MODE_BITSIZE (GET_MODE (from
)))
4526 icode
= can_float_p (fmode
, imode
, unsignedp
);
4527 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (from
) && unsignedp
)
4528 icode
= can_float_p (fmode
, imode
, 0), doing_unsigned
= 0;
4530 if (icode
!= CODE_FOR_nothing
)
4532 to
= protect_from_queue (to
, 1);
4533 from
= protect_from_queue (from
, 0);
4535 if (imode
!= GET_MODE (from
))
4536 from
= convert_to_mode (imode
, from
, unsignedp
);
4538 if (fmode
!= GET_MODE (to
))
4539 target
= gen_reg_rtx (fmode
);
4541 emit_unop_insn (icode
, target
, from
,
4542 doing_unsigned
? UNSIGNED_FLOAT
: FLOAT
);
4545 convert_move (to
, target
, 0);
4550 /* Unsigned integer, and no way to convert directly.
4551 Convert as signed, then conditionally adjust the result. */
4554 rtx label
= gen_label_rtx ();
4556 REAL_VALUE_TYPE offset
;
4560 to
= protect_from_queue (to
, 1);
4561 from
= protect_from_queue (from
, 0);
4564 from
= force_not_mem (from
);
4566 /* Look for a usable floating mode FMODE wider than the source and at
4567 least as wide as the target. Using FMODE will avoid rounding woes
4568 with unsigned values greater than the signed maximum value. */
4570 for (fmode
= GET_MODE (to
); fmode
!= VOIDmode
;
4571 fmode
= GET_MODE_WIDER_MODE (fmode
))
4572 if (GET_MODE_BITSIZE (GET_MODE (from
)) < GET_MODE_BITSIZE (fmode
)
4573 && can_float_p (fmode
, GET_MODE (from
), 0) != CODE_FOR_nothing
)
4576 if (fmode
== VOIDmode
)
4578 /* There is no such mode. Pretend the target is wide enough. */
4579 fmode
= GET_MODE (to
);
4581 /* Avoid double-rounding when TO is narrower than FROM. */
4582 if ((significand_size (fmode
) + 1)
4583 < GET_MODE_BITSIZE (GET_MODE (from
)))
4586 rtx neglabel
= gen_label_rtx ();
4588 /* Don't use TARGET if it isn't a register, is a hard register,
4589 or is the wrong mode. */
4590 if (GET_CODE (target
) != REG
4591 || REGNO (target
) < FIRST_PSEUDO_REGISTER
4592 || GET_MODE (target
) != fmode
)
4593 target
= gen_reg_rtx (fmode
);
4595 imode
= GET_MODE (from
);
4596 do_pending_stack_adjust ();
4598 /* Test whether the sign bit is set. */
4599 emit_cmp_and_jump_insns (from
, const0_rtx
, LT
, NULL_RTX
, imode
,
4602 /* The sign bit is not set. Convert as signed. */
4603 expand_float (target
, from
, 0);
4604 emit_jump_insn (gen_jump (label
));
4607 /* The sign bit is set.
4608 Convert to a usable (positive signed) value by shifting right
4609 one bit, while remembering if a nonzero bit was shifted
4610 out; i.e., compute (from & 1) | (from >> 1). */
4612 emit_label (neglabel
);
4613 temp
= expand_binop (imode
, and_optab
, from
, const1_rtx
,
4614 NULL_RTX
, 1, OPTAB_LIB_WIDEN
);
4615 temp1
= expand_shift (RSHIFT_EXPR
, imode
, from
, integer_one_node
,
4617 temp
= expand_binop (imode
, ior_optab
, temp
, temp1
, temp
, 1,
4619 expand_float (target
, temp
, 0);
4621 /* Multiply by 2 to undo the shift above. */
4622 temp
= expand_binop (fmode
, add_optab
, target
, target
,
4623 target
, 0, OPTAB_LIB_WIDEN
);
4625 emit_move_insn (target
, temp
);
4627 do_pending_stack_adjust ();
4633 /* If we are about to do some arithmetic to correct for an
4634 unsigned operand, do it in a pseudo-register. */
4636 if (GET_MODE (to
) != fmode
4637 || GET_CODE (to
) != REG
|| REGNO (to
) < FIRST_PSEUDO_REGISTER
)
4638 target
= gen_reg_rtx (fmode
);
4640 /* Convert as signed integer to floating. */
4641 expand_float (target
, from
, 0);
4643 /* If FROM is negative (and therefore TO is negative),
4644 correct its value by 2**bitwidth. */
4646 do_pending_stack_adjust ();
4647 emit_cmp_and_jump_insns (from
, const0_rtx
, GE
, NULL_RTX
, GET_MODE (from
),
4651 real_2expN (&offset
, GET_MODE_BITSIZE (GET_MODE (from
)));
4652 temp
= expand_binop (fmode
, add_optab
, target
,
4653 CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
),
4654 target
, 0, OPTAB_LIB_WIDEN
);
4656 emit_move_insn (target
, temp
);
4658 do_pending_stack_adjust ();
4663 /* No hardware instruction available; call a library routine. */
4668 convert_optab tab
= unsignedp
? ufloat_optab
: sfloat_optab
;
4670 to
= protect_from_queue (to
, 1);
4671 from
= protect_from_queue (from
, 0);
4673 if (GET_MODE_SIZE (GET_MODE (from
)) < GET_MODE_SIZE (SImode
))
4674 from
= convert_to_mode (SImode
, from
, unsignedp
);
4677 from
= force_not_mem (from
);
4679 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4685 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4686 GET_MODE (to
), 1, from
,
4688 insns
= get_insns ();
4691 emit_libcall_block (insns
, target
, value
,
4692 gen_rtx_FLOAT (GET_MODE (to
), from
));
4697 /* Copy result to requested destination
4698 if we have been computing in a temp location. */
4702 if (GET_MODE (target
) == GET_MODE (to
))
4703 emit_move_insn (to
, target
);
4705 convert_move (to
, target
, 0);
4709 /* expand_fix: generate code to convert FROM to fixed point
4710 and store in TO. FROM must be floating point. */
4715 rtx temp
= gen_reg_rtx (GET_MODE (x
));
4716 return expand_unop (GET_MODE (x
), ftrunc_optab
, x
, temp
, 0);
4720 expand_fix (rtx to
, rtx from
, int unsignedp
)
4722 enum insn_code icode
;
4724 enum machine_mode fmode
, imode
;
4727 /* We first try to find a pair of modes, one real and one integer, at
4728 least as wide as FROM and TO, respectively, in which we can open-code
4729 this conversion. If the integer mode is wider than the mode of TO,
4730 we can do the conversion either signed or unsigned. */
4732 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4733 fmode
= GET_MODE_WIDER_MODE (fmode
))
4734 for (imode
= GET_MODE (to
); imode
!= VOIDmode
;
4735 imode
= GET_MODE_WIDER_MODE (imode
))
4737 int doing_unsigned
= unsignedp
;
4739 icode
= can_fix_p (imode
, fmode
, unsignedp
, &must_trunc
);
4740 if (icode
== CODE_FOR_nothing
&& imode
!= GET_MODE (to
) && unsignedp
)
4741 icode
= can_fix_p (imode
, fmode
, 0, &must_trunc
), doing_unsigned
= 0;
4743 if (icode
!= CODE_FOR_nothing
)
4745 to
= protect_from_queue (to
, 1);
4746 from
= protect_from_queue (from
, 0);
4748 if (fmode
!= GET_MODE (from
))
4749 from
= convert_to_mode (fmode
, from
, 0);
4752 from
= ftruncify (from
);
4754 if (imode
!= GET_MODE (to
))
4755 target
= gen_reg_rtx (imode
);
4757 emit_unop_insn (icode
, target
, from
,
4758 doing_unsigned
? UNSIGNED_FIX
: FIX
);
4760 convert_move (to
, target
, unsignedp
);
4765 /* For an unsigned conversion, there is one more way to do it.
4766 If we have a signed conversion, we generate code that compares
4767 the real value to the largest representable positive number. If if
4768 is smaller, the conversion is done normally. Otherwise, subtract
4769 one plus the highest signed number, convert, and add it back.
4771 We only need to check all real modes, since we know we didn't find
4772 anything with a wider integer mode.
4774 This code used to extend FP value into mode wider than the destination.
4775 This is not needed. Consider, for instance conversion from SFmode
4778 The hot path trought the code is dealing with inputs smaller than 2^63
4779 and doing just the conversion, so there is no bits to lose.
4781 In the other path we know the value is positive in the range 2^63..2^64-1
4782 inclusive. (as for other imput overflow happens and result is undefined)
4783 So we know that the most important bit set in mantissa corresponds to
4784 2^63. The subtraction of 2^63 should not generate any rounding as it
4785 simply clears out that bit. The rest is trivial. */
4787 if (unsignedp
&& GET_MODE_BITSIZE (GET_MODE (to
)) <= HOST_BITS_PER_WIDE_INT
)
4788 for (fmode
= GET_MODE (from
); fmode
!= VOIDmode
;
4789 fmode
= GET_MODE_WIDER_MODE (fmode
))
4790 if (CODE_FOR_nothing
!= can_fix_p (GET_MODE (to
), fmode
, 0,
4794 REAL_VALUE_TYPE offset
;
4795 rtx limit
, lab1
, lab2
, insn
;
4797 bitsize
= GET_MODE_BITSIZE (GET_MODE (to
));
4798 real_2expN (&offset
, bitsize
- 1);
4799 limit
= CONST_DOUBLE_FROM_REAL_VALUE (offset
, fmode
);
4800 lab1
= gen_label_rtx ();
4801 lab2
= gen_label_rtx ();
4804 to
= protect_from_queue (to
, 1);
4805 from
= protect_from_queue (from
, 0);
4808 from
= force_not_mem (from
);
4810 if (fmode
!= GET_MODE (from
))
4811 from
= convert_to_mode (fmode
, from
, 0);
4813 /* See if we need to do the subtraction. */
4814 do_pending_stack_adjust ();
4815 emit_cmp_and_jump_insns (from
, limit
, GE
, NULL_RTX
, GET_MODE (from
),
4818 /* If not, do the signed "fix" and branch around fixup code. */
4819 expand_fix (to
, from
, 0);
4820 emit_jump_insn (gen_jump (lab2
));
4823 /* Otherwise, subtract 2**(N-1), convert to signed number,
4824 then add 2**(N-1). Do the addition using XOR since this
4825 will often generate better code. */
4827 target
= expand_binop (GET_MODE (from
), sub_optab
, from
, limit
,
4828 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4829 expand_fix (to
, target
, 0);
4830 target
= expand_binop (GET_MODE (to
), xor_optab
, to
,
4832 ((HOST_WIDE_INT
) 1 << (bitsize
- 1),
4834 to
, 1, OPTAB_LIB_WIDEN
);
4837 emit_move_insn (to
, target
);
4841 if (mov_optab
->handlers
[(int) GET_MODE (to
)].insn_code
4842 != CODE_FOR_nothing
)
4844 /* Make a place for a REG_NOTE and add it. */
4845 insn
= emit_move_insn (to
, to
);
4846 set_unique_reg_note (insn
,
4848 gen_rtx_fmt_e (UNSIGNED_FIX
,
4856 /* We can't do it with an insn, so use a library call. But first ensure
4857 that the mode of TO is at least as wide as SImode, since those are the
4858 only library calls we know about. */
4860 if (GET_MODE_SIZE (GET_MODE (to
)) < GET_MODE_SIZE (SImode
))
4862 target
= gen_reg_rtx (SImode
);
4864 expand_fix (target
, from
, unsignedp
);
4872 convert_optab tab
= unsignedp
? ufix_optab
: sfix_optab
;
4873 libfunc
= tab
->handlers
[GET_MODE (to
)][GET_MODE (from
)].libfunc
;
4877 to
= protect_from_queue (to
, 1);
4878 from
= protect_from_queue (from
, 0);
4881 from
= force_not_mem (from
);
4885 value
= emit_library_call_value (libfunc
, NULL_RTX
, LCT_CONST
,
4886 GET_MODE (to
), 1, from
,
4888 insns
= get_insns ();
4891 emit_libcall_block (insns
, target
, value
,
4892 gen_rtx_fmt_e (unsignedp
? UNSIGNED_FIX
: FIX
,
4893 GET_MODE (to
), from
));
4898 if (GET_MODE (to
) == GET_MODE (target
))
4899 emit_move_insn (to
, target
);
4901 convert_move (to
, target
, 0);
4905 /* Report whether we have an instruction to perform the operation
4906 specified by CODE on operands of mode MODE. */
4908 have_insn_for (enum rtx_code code
, enum machine_mode mode
)
4910 return (code_to_optab
[(int) code
] != 0
4911 && (code_to_optab
[(int) code
]->handlers
[(int) mode
].insn_code
4912 != CODE_FOR_nothing
));
4915 /* Create a blank optab. */
4920 optab op
= ggc_alloc (sizeof (struct optab
));
4921 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4923 op
->handlers
[i
].insn_code
= CODE_FOR_nothing
;
4924 op
->handlers
[i
].libfunc
= 0;
4930 static convert_optab
4931 new_convert_optab (void)
4934 convert_optab op
= ggc_alloc (sizeof (struct convert_optab
));
4935 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
4936 for (j
= 0; j
< NUM_MACHINE_MODES
; j
++)
4938 op
->handlers
[i
][j
].insn_code
= CODE_FOR_nothing
;
4939 op
->handlers
[i
][j
].libfunc
= 0;
4944 /* Same, but fill in its code as CODE, and write it into the
4945 code_to_optab table. */
4947 init_optab (enum rtx_code code
)
4949 optab op
= new_optab ();
4951 code_to_optab
[(int) code
] = op
;
4955 /* Same, but fill in its code as CODE, and do _not_ write it into
4956 the code_to_optab table. */
4958 init_optabv (enum rtx_code code
)
4960 optab op
= new_optab ();
4965 /* Conversion optabs never go in the code_to_optab table. */
4966 static inline convert_optab
4967 init_convert_optab (enum rtx_code code
)
4969 convert_optab op
= new_convert_optab ();
4974 /* Initialize the libfunc fields of an entire group of entries in some
4975 optab. Each entry is set equal to a string consisting of a leading
4976 pair of underscores followed by a generic operation name followed by
4977 a mode name (downshifted to lower case) followed by a single character
4978 representing the number of operands for the given operation (which is
4979 usually one of the characters '2', '3', or '4').
4981 OPTABLE is the table in which libfunc fields are to be initialized.
4982 FIRST_MODE is the first machine mode index in the given optab to
4984 LAST_MODE is the last machine mode index in the given optab to
4986 OPNAME is the generic (string) name of the operation.
4987 SUFFIX is the character which specifies the number of operands for
4988 the given generic operation.
4992 init_libfuncs (optab optable
, int first_mode
, int last_mode
,
4993 const char *opname
, int suffix
)
4996 unsigned opname_len
= strlen (opname
);
4998 for (mode
= first_mode
; (int) mode
<= (int) last_mode
;
4999 mode
= (enum machine_mode
) ((int) mode
+ 1))
5001 const char *mname
= GET_MODE_NAME (mode
);
5002 unsigned mname_len
= strlen (mname
);
5003 char *libfunc_name
= alloca (2 + opname_len
+ mname_len
+ 1 + 1);
5010 for (q
= opname
; *q
; )
5012 for (q
= mname
; *q
; q
++)
5013 *p
++ = TOLOWER (*q
);
5017 optable
->handlers
[(int) mode
].libfunc
5018 = init_one_libfunc (ggc_alloc_string (libfunc_name
, p
- libfunc_name
));
5022 /* Initialize the libfunc fields of an entire group of entries in some
5023 optab which correspond to all integer mode operations. The parameters
5024 have the same meaning as similarly named ones for the `init_libfuncs'
5025 routine. (See above). */
5028 init_integral_libfuncs (optab optable
, const char *opname
, int suffix
)
5030 int maxsize
= 2*BITS_PER_WORD
;
5031 if (maxsize
< LONG_LONG_TYPE_SIZE
)
5032 maxsize
= LONG_LONG_TYPE_SIZE
;
5033 init_libfuncs (optable
, word_mode
,
5034 mode_for_size (maxsize
, MODE_INT
, 0),
5038 /* Initialize the libfunc fields of an entire group of entries in some
5039 optab which correspond to all real mode operations. The parameters
5040 have the same meaning as similarly named ones for the `init_libfuncs'
5041 routine. (See above). */
5044 init_floating_libfuncs (optab optable
, const char *opname
, int suffix
)
5046 enum machine_mode fmode
, dmode
, lmode
;
5048 fmode
= float_type_node
? TYPE_MODE (float_type_node
) : VOIDmode
;
5049 dmode
= double_type_node
? TYPE_MODE (double_type_node
) : VOIDmode
;
5050 lmode
= long_double_type_node
? TYPE_MODE (long_double_type_node
) : VOIDmode
;
5052 if (fmode
!= VOIDmode
)
5053 init_libfuncs (optable
, fmode
, fmode
, opname
, suffix
);
5054 if (dmode
!= fmode
&& dmode
!= VOIDmode
)
5055 init_libfuncs (optable
, dmode
, dmode
, opname
, suffix
);
5056 if (lmode
!= dmode
&& lmode
!= VOIDmode
)
5057 init_libfuncs (optable
, lmode
, lmode
, opname
, suffix
);
5060 /* Initialize the libfunc fields of an entire group of entries of an
5061 inter-mode-class conversion optab. The string formation rules are
5062 similar to the ones for init_libfuncs, above, but instead of having
5063 a mode name and an operand count these functions have two mode names
5064 and no operand count. */
5066 init_interclass_conv_libfuncs (convert_optab tab
, const char *opname
,
5067 enum mode_class from_class
,
5068 enum mode_class to_class
)
5070 enum machine_mode first_from_mode
= GET_CLASS_NARROWEST_MODE (from_class
);
5071 enum machine_mode first_to_mode
= GET_CLASS_NARROWEST_MODE (to_class
);
5072 size_t opname_len
= strlen (opname
);
5073 size_t max_mname_len
= 0;
5075 enum machine_mode fmode
, tmode
;
5076 const char *fname
, *tname
;
5078 char *libfunc_name
, *suffix
;
5081 for (fmode
= first_from_mode
;
5083 fmode
= GET_MODE_WIDER_MODE (fmode
))
5084 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (fmode
)));
5086 for (tmode
= first_to_mode
;
5088 tmode
= GET_MODE_WIDER_MODE (tmode
))
5089 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (tmode
)));
5091 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
5092 libfunc_name
[0] = '_';
5093 libfunc_name
[1] = '_';
5094 memcpy (&libfunc_name
[2], opname
, opname_len
);
5095 suffix
= libfunc_name
+ opname_len
+ 2;
5097 for (fmode
= first_from_mode
; fmode
!= VOIDmode
;
5098 fmode
= GET_MODE_WIDER_MODE (fmode
))
5099 for (tmode
= first_to_mode
; tmode
!= VOIDmode
;
5100 tmode
= GET_MODE_WIDER_MODE (tmode
))
5102 fname
= GET_MODE_NAME (fmode
);
5103 tname
= GET_MODE_NAME (tmode
);
5106 for (q
= fname
; *q
; p
++, q
++)
5108 for (q
= tname
; *q
; p
++, q
++)
5113 tab
->handlers
[tmode
][fmode
].libfunc
5114 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
5119 /* Initialize the libfunc fields of an entire group of entries of an
5120 intra-mode-class conversion optab. The string formation rules are
5121 similar to the ones for init_libfunc, above. WIDENING says whether
5122 the optab goes from narrow to wide modes or vice versa. These functions
5123 have two mode names _and_ an operand count. */
5125 init_intraclass_conv_libfuncs (convert_optab tab
, const char *opname
,
5126 enum mode_class
class, bool widening
)
5128 enum machine_mode first_mode
= GET_CLASS_NARROWEST_MODE (class);
5129 size_t opname_len
= strlen (opname
);
5130 size_t max_mname_len
= 0;
5132 enum machine_mode nmode
, wmode
;
5133 const char *nname
, *wname
;
5135 char *libfunc_name
, *suffix
;
5138 for (nmode
= first_mode
; nmode
!= VOIDmode
;
5139 nmode
= GET_MODE_WIDER_MODE (nmode
))
5140 max_mname_len
= MAX (max_mname_len
, strlen (GET_MODE_NAME (nmode
)));
5142 libfunc_name
= alloca (2 + opname_len
+ 2*max_mname_len
+ 1 + 1);
5143 libfunc_name
[0] = '_';
5144 libfunc_name
[1] = '_';
5145 memcpy (&libfunc_name
[2], opname
, opname_len
);
5146 suffix
= libfunc_name
+ opname_len
+ 2;
5148 for (nmode
= first_mode
; nmode
!= VOIDmode
;
5149 nmode
= GET_MODE_WIDER_MODE (nmode
))
5150 for (wmode
= GET_MODE_WIDER_MODE (nmode
); wmode
!= VOIDmode
;
5151 wmode
= GET_MODE_WIDER_MODE (wmode
))
5153 nname
= GET_MODE_NAME (nmode
);
5154 wname
= GET_MODE_NAME (wmode
);
5157 for (q
= widening
? nname
: wname
; *q
; p
++, q
++)
5159 for (q
= widening
? wname
: nname
; *q
; p
++, q
++)
5165 tab
->handlers
[widening
? nmode
: wmode
]
5166 [widening
? wmode
: nmode
].libfunc
5167 = init_one_libfunc (ggc_alloc_string (libfunc_name
,
5174 init_one_libfunc (const char *name
)
5178 /* Create a FUNCTION_DECL that can be passed to
5179 targetm.encode_section_info. */
5180 /* ??? We don't have any type information except for this is
5181 a function. Pretend this is "int foo()". */
5182 tree decl
= build_decl (FUNCTION_DECL
, get_identifier (name
),
5183 build_function_type (integer_type_node
, NULL_TREE
));
5184 DECL_ARTIFICIAL (decl
) = 1;
5185 DECL_EXTERNAL (decl
) = 1;
5186 TREE_PUBLIC (decl
) = 1;
5188 symbol
= XEXP (DECL_RTL (decl
), 0);
5190 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
5191 are the flags assigned by targetm.encode_section_info. */
5192 SYMBOL_REF_DECL (symbol
) = 0;
5197 /* Call this to reset the function entry for one optab (OPTABLE) in mode
5198 MODE to NAME, which should be either 0 or a string constant. */
5200 set_optab_libfunc (optab optable
, enum machine_mode mode
, const char *name
)
5203 optable
->handlers
[mode
].libfunc
= init_one_libfunc (name
);
5205 optable
->handlers
[mode
].libfunc
= 0;
5208 /* Call this to reset the function entry for one conversion optab
5209 (OPTABLE) from mode FMODE to mode TMODE to NAME, which should be
5210 either 0 or a string constant. */
5212 set_conv_libfunc (convert_optab optable
, enum machine_mode tmode
,
5213 enum machine_mode fmode
, const char *name
)
5216 optable
->handlers
[tmode
][fmode
].libfunc
= init_one_libfunc (name
);
5218 optable
->handlers
[tmode
][fmode
].libfunc
= 0;
5221 /* Call this once to initialize the contents of the optabs
5222 appropriately for the current target machine. */
5229 /* Start by initializing all tables to contain CODE_FOR_nothing. */
5231 for (i
= 0; i
< NUM_RTX_CODE
; i
++)
5232 setcc_gen_code
[i
] = CODE_FOR_nothing
;
5234 #ifdef HAVE_conditional_move
5235 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5236 movcc_gen_code
[i
] = CODE_FOR_nothing
;
5239 add_optab
= init_optab (PLUS
);
5240 addv_optab
= init_optabv (PLUS
);
5241 sub_optab
= init_optab (MINUS
);
5242 subv_optab
= init_optabv (MINUS
);
5243 smul_optab
= init_optab (MULT
);
5244 smulv_optab
= init_optabv (MULT
);
5245 smul_highpart_optab
= init_optab (UNKNOWN
);
5246 umul_highpart_optab
= init_optab (UNKNOWN
);
5247 smul_widen_optab
= init_optab (UNKNOWN
);
5248 umul_widen_optab
= init_optab (UNKNOWN
);
5249 sdiv_optab
= init_optab (DIV
);
5250 sdivv_optab
= init_optabv (DIV
);
5251 sdivmod_optab
= init_optab (UNKNOWN
);
5252 udiv_optab
= init_optab (UDIV
);
5253 udivmod_optab
= init_optab (UNKNOWN
);
5254 smod_optab
= init_optab (MOD
);
5255 umod_optab
= init_optab (UMOD
);
5256 ftrunc_optab
= init_optab (UNKNOWN
);
5257 and_optab
= init_optab (AND
);
5258 ior_optab
= init_optab (IOR
);
5259 xor_optab
= init_optab (XOR
);
5260 ashl_optab
= init_optab (ASHIFT
);
5261 ashr_optab
= init_optab (ASHIFTRT
);
5262 lshr_optab
= init_optab (LSHIFTRT
);
5263 rotl_optab
= init_optab (ROTATE
);
5264 rotr_optab
= init_optab (ROTATERT
);
5265 smin_optab
= init_optab (SMIN
);
5266 smax_optab
= init_optab (SMAX
);
5267 umin_optab
= init_optab (UMIN
);
5268 umax_optab
= init_optab (UMAX
);
5269 pow_optab
= init_optab (UNKNOWN
);
5270 atan2_optab
= init_optab (UNKNOWN
);
5272 /* These three have codes assigned exclusively for the sake of
5274 mov_optab
= init_optab (SET
);
5275 movstrict_optab
= init_optab (STRICT_LOW_PART
);
5276 cmp_optab
= init_optab (COMPARE
);
5278 ucmp_optab
= init_optab (UNKNOWN
);
5279 tst_optab
= init_optab (UNKNOWN
);
5281 eq_optab
= init_optab (EQ
);
5282 ne_optab
= init_optab (NE
);
5283 gt_optab
= init_optab (GT
);
5284 ge_optab
= init_optab (GE
);
5285 lt_optab
= init_optab (LT
);
5286 le_optab
= init_optab (LE
);
5287 unord_optab
= init_optab (UNORDERED
);
5289 neg_optab
= init_optab (NEG
);
5290 negv_optab
= init_optabv (NEG
);
5291 abs_optab
= init_optab (ABS
);
5292 absv_optab
= init_optabv (ABS
);
5293 addcc_optab
= init_optab (UNKNOWN
);
5294 one_cmpl_optab
= init_optab (NOT
);
5295 ffs_optab
= init_optab (FFS
);
5296 clz_optab
= init_optab (CLZ
);
5297 ctz_optab
= init_optab (CTZ
);
5298 popcount_optab
= init_optab (POPCOUNT
);
5299 parity_optab
= init_optab (PARITY
);
5300 sqrt_optab
= init_optab (SQRT
);
5301 floor_optab
= init_optab (UNKNOWN
);
5302 ceil_optab
= init_optab (UNKNOWN
);
5303 round_optab
= init_optab (UNKNOWN
);
5304 btrunc_optab
= init_optab (UNKNOWN
);
5305 nearbyint_optab
= init_optab (UNKNOWN
);
5306 sin_optab
= init_optab (UNKNOWN
);
5307 cos_optab
= init_optab (UNKNOWN
);
5308 exp_optab
= init_optab (UNKNOWN
);
5309 log_optab
= init_optab (UNKNOWN
);
5310 tan_optab
= init_optab (UNKNOWN
);
5311 atan_optab
= init_optab (UNKNOWN
);
5312 strlen_optab
= init_optab (UNKNOWN
);
5313 cbranch_optab
= init_optab (UNKNOWN
);
5314 cmov_optab
= init_optab (UNKNOWN
);
5315 cstore_optab
= init_optab (UNKNOWN
);
5316 push_optab
= init_optab (UNKNOWN
);
5319 sext_optab
= init_convert_optab (SIGN_EXTEND
);
5320 zext_optab
= init_convert_optab (ZERO_EXTEND
);
5321 trunc_optab
= init_convert_optab (TRUNCATE
);
5322 sfix_optab
= init_convert_optab (FIX
);
5323 ufix_optab
= init_convert_optab (UNSIGNED_FIX
);
5324 sfixtrunc_optab
= init_convert_optab (UNKNOWN
);
5325 ufixtrunc_optab
= init_convert_optab (UNKNOWN
);
5326 sfloat_optab
= init_convert_optab (FLOAT
);
5327 ufloat_optab
= init_convert_optab (UNSIGNED_FLOAT
);
5329 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
5331 movstr_optab
[i
] = CODE_FOR_nothing
;
5332 clrstr_optab
[i
] = CODE_FOR_nothing
;
5334 #ifdef HAVE_SECONDARY_RELOADS
5335 reload_in_optab
[i
] = reload_out_optab
[i
] = CODE_FOR_nothing
;
5339 /* Fill in the optabs with the insns we support. */
5342 /* Initialize the optabs with the names of the library functions. */
5343 init_integral_libfuncs (add_optab
, "add", '3');
5344 init_floating_libfuncs (add_optab
, "add", '3');
5345 init_integral_libfuncs (addv_optab
, "addv", '3');
5346 init_floating_libfuncs (addv_optab
, "add", '3');
5347 init_integral_libfuncs (sub_optab
, "sub", '3');
5348 init_floating_libfuncs (sub_optab
, "sub", '3');
5349 init_integral_libfuncs (subv_optab
, "subv", '3');
5350 init_floating_libfuncs (subv_optab
, "sub", '3');
5351 init_integral_libfuncs (smul_optab
, "mul", '3');
5352 init_floating_libfuncs (smul_optab
, "mul", '3');
5353 init_integral_libfuncs (smulv_optab
, "mulv", '3');
5354 init_floating_libfuncs (smulv_optab
, "mul", '3');
5355 init_integral_libfuncs (sdiv_optab
, "div", '3');
5356 init_floating_libfuncs (sdiv_optab
, "div", '3');
5357 init_integral_libfuncs (sdivv_optab
, "divv", '3');
5358 init_integral_libfuncs (udiv_optab
, "udiv", '3');
5359 init_integral_libfuncs (sdivmod_optab
, "divmod", '4');
5360 init_integral_libfuncs (udivmod_optab
, "udivmod", '4');
5361 init_integral_libfuncs (smod_optab
, "mod", '3');
5362 init_integral_libfuncs (umod_optab
, "umod", '3');
5363 init_floating_libfuncs (ftrunc_optab
, "ftrunc", '2');
5364 init_integral_libfuncs (and_optab
, "and", '3');
5365 init_integral_libfuncs (ior_optab
, "ior", '3');
5366 init_integral_libfuncs (xor_optab
, "xor", '3');
5367 init_integral_libfuncs (ashl_optab
, "ashl", '3');
5368 init_integral_libfuncs (ashr_optab
, "ashr", '3');
5369 init_integral_libfuncs (lshr_optab
, "lshr", '3');
5370 init_integral_libfuncs (smin_optab
, "min", '3');
5371 init_floating_libfuncs (smin_optab
, "min", '3');
5372 init_integral_libfuncs (smax_optab
, "max", '3');
5373 init_floating_libfuncs (smax_optab
, "max", '3');
5374 init_integral_libfuncs (umin_optab
, "umin", '3');
5375 init_integral_libfuncs (umax_optab
, "umax", '3');
5376 init_integral_libfuncs (neg_optab
, "neg", '2');
5377 init_floating_libfuncs (neg_optab
, "neg", '2');
5378 init_integral_libfuncs (negv_optab
, "negv", '2');
5379 init_floating_libfuncs (negv_optab
, "neg", '2');
5380 init_integral_libfuncs (one_cmpl_optab
, "one_cmpl", '2');
5381 init_integral_libfuncs (ffs_optab
, "ffs", '2');
5382 init_integral_libfuncs (clz_optab
, "clz", '2');
5383 init_integral_libfuncs (ctz_optab
, "ctz", '2');
5384 init_integral_libfuncs (popcount_optab
, "popcount", '2');
5385 init_integral_libfuncs (parity_optab
, "parity", '2');
5387 /* Comparison libcalls for integers MUST come in pairs, signed/unsigned. */
5388 init_integral_libfuncs (cmp_optab
, "cmp", '2');
5389 init_integral_libfuncs (ucmp_optab
, "ucmp", '2');
5390 init_floating_libfuncs (cmp_optab
, "cmp", '2');
5392 /* EQ etc are floating point only. */
5393 init_floating_libfuncs (eq_optab
, "eq", '2');
5394 init_floating_libfuncs (ne_optab
, "ne", '2');
5395 init_floating_libfuncs (gt_optab
, "gt", '2');
5396 init_floating_libfuncs (ge_optab
, "ge", '2');
5397 init_floating_libfuncs (lt_optab
, "lt", '2');
5398 init_floating_libfuncs (le_optab
, "le", '2');
5399 init_floating_libfuncs (unord_optab
, "unord", '2');
5402 init_interclass_conv_libfuncs (sfloat_optab
, "float", MODE_INT
, MODE_FLOAT
);
5403 init_interclass_conv_libfuncs (sfix_optab
, "fix", MODE_FLOAT
, MODE_INT
);
5404 init_interclass_conv_libfuncs (ufix_optab
, "fixuns", MODE_FLOAT
, MODE_INT
);
5406 /* sext_optab is also used for FLOAT_EXTEND. */
5407 init_intraclass_conv_libfuncs (sext_optab
, "extend", MODE_FLOAT
, true);
5408 init_intraclass_conv_libfuncs (trunc_optab
, "trunc", MODE_FLOAT
, false);
5410 /* Use cabs for double complex abs, since systems generally have cabs.
5411 Don't define any libcall for float complex, so that cabs will be used. */
5412 if (complex_double_type_node
)
5413 abs_optab
->handlers
[TYPE_MODE (complex_double_type_node
)].libfunc
5414 = init_one_libfunc ("cabs");
5416 /* The ffs function op[1erates on `int'. */
5417 ffs_optab
->handlers
[(int) mode_for_size (INT_TYPE_SIZE
, MODE_INT
, 0)].libfunc
5418 = init_one_libfunc ("ffs");
5420 abort_libfunc
= init_one_libfunc ("abort");
5421 memcpy_libfunc
= init_one_libfunc ("memcpy");
5422 memmove_libfunc
= init_one_libfunc ("memmove");
5423 bcopy_libfunc
= init_one_libfunc ("bcopy");
5424 memcmp_libfunc
= init_one_libfunc ("memcmp");
5425 bcmp_libfunc
= init_one_libfunc ("__gcc_bcmp");
5426 memset_libfunc
= init_one_libfunc ("memset");
5427 bzero_libfunc
= init_one_libfunc ("bzero");
5428 setbits_libfunc
= init_one_libfunc ("__setbits");
5430 unwind_resume_libfunc
= init_one_libfunc (USING_SJLJ_EXCEPTIONS
5431 ? "_Unwind_SjLj_Resume"
5432 : "_Unwind_Resume");
5433 #ifndef DONT_USE_BUILTIN_SETJMP
5434 setjmp_libfunc
= init_one_libfunc ("__builtin_setjmp");
5435 longjmp_libfunc
= init_one_libfunc ("__builtin_longjmp");
5437 setjmp_libfunc
= init_one_libfunc ("setjmp");
5438 longjmp_libfunc
= init_one_libfunc ("longjmp");
5440 unwind_sjlj_register_libfunc
= init_one_libfunc ("_Unwind_SjLj_Register");
5441 unwind_sjlj_unregister_libfunc
5442 = init_one_libfunc ("_Unwind_SjLj_Unregister");
5444 /* For function entry/exit instrumentation. */
5445 profile_function_entry_libfunc
5446 = init_one_libfunc ("__cyg_profile_func_enter");
5447 profile_function_exit_libfunc
5448 = init_one_libfunc ("__cyg_profile_func_exit");
5450 gcov_flush_libfunc
= init_one_libfunc ("__gcov_flush");
5451 gcov_init_libfunc
= init_one_libfunc ("__gcov_init");
5453 if (HAVE_conditional_trap
)
5454 trap_rtx
= gen_rtx_fmt_ee (EQ
, VOIDmode
, NULL_RTX
, NULL_RTX
);
5456 /* Allow the target to add more libcalls or rename some, etc. */
5457 targetm
.init_libfuncs ();
5460 /* Generate insns to trap with code TCODE if OP1 and OP2 satisfy condition
5461 CODE. Return 0 on failure. */
5464 gen_cond_trap (enum rtx_code code ATTRIBUTE_UNUSED
, rtx op1
,
5465 rtx op2 ATTRIBUTE_UNUSED
, rtx tcode ATTRIBUTE_UNUSED
)
5467 enum machine_mode mode
= GET_MODE (op1
);
5468 enum insn_code icode
;
5471 if (!HAVE_conditional_trap
)
5474 if (mode
== VOIDmode
)
5477 icode
= cmp_optab
->handlers
[(int) mode
].insn_code
;
5478 if (icode
== CODE_FOR_nothing
)
5482 op1
= prepare_operand (icode
, op1
, 0, mode
, mode
, 0);
5483 op2
= prepare_operand (icode
, op2
, 1, mode
, mode
, 0);
5489 emit_insn (GEN_FCN (icode
) (op1
, op2
));
5491 PUT_CODE (trap_rtx
, code
);
5492 insn
= gen_conditional_trap (trap_rtx
, tcode
);
5496 insn
= get_insns ();
5503 #include "gt-optabs.h"