alias.c (mark_constant_function): Use INSN_P.
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
24
25 * The form of the input:
26
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
36
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
44
45 * The form of the output:
46
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
52
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
55
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
59
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
62
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
66
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
71
72 * Methodology:
73
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
77
78 * asm_operands:
79
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
83
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
87
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
91
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
98
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
101
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
104
105 asm ("foo" : "=t" (a) : "f" (b));
106
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
112
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
115
116 The asm above would be written as
117
118 asm ("foo" : "=&t" (a) : "f" (b));
119
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
124
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
128
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
133
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
136
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
140
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
143
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
151
152 */
153 \f
154 #include "config.h"
155 #include "system.h"
156 #include "tree.h"
157 #include "rtl.h"
158 #include "tm_p.h"
159 #include "function.h"
160 #include "insn-config.h"
161 #include "regs.h"
162 #include "hard-reg-set.h"
163 #include "flags.h"
164 #include "insn-flags.h"
165 #include "toplev.h"
166 #include "recog.h"
167 #include "output.h"
168 #include "basic-block.h"
169 #include "varray.h"
170
171 #ifdef STACK_REGS
172
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
180 appropriately.
181
182 REG_SET indicates which registers are live. */
183
184 typedef struct stack_def
185 {
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 char reg[REG_STACK_SIZE]; /* register - stack mapping */
189 } *stack;
190
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
193
194 typedef struct block_info_def
195 {
196 struct stack_def stack_in; /* Input stack configuration. */
197 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
198 int done; /* True if block already converted. */
199 } *block_info;
200
201 #define BLOCK_INFO(B) ((block_info) (B)->aux)
202
203 /* Passed to change_stack to indicate where to emit insns. */
204 enum emit_where
205 {
206 EMIT_AFTER,
207 EMIT_BEFORE
208 };
209
210 /* We use this array to cache info about insns, because otherwise we
211 spend too much time in stack_regs_mentioned_p.
212
213 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
214 the insn uses stack registers, two indicates the insn does not use
215 stack registers. */
216 static varray_type stack_regs_mentioned_data;
217
218 /* The block we're currently working on. */
219 static basic_block current_block;
220
221 /* This is the register file for all register after conversion */
222 static rtx
223 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
224
225 #define FP_MODE_REG(regno,mode) \
226 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227
228 /* Used to initialize uninitialized registers. */
229 static rtx nan;
230
231 /* Forward declarations */
232
233 static int stack_regs_mentioned_p PARAMS ((rtx pat));
234 static void straighten_stack PARAMS ((rtx, stack));
235 static void pop_stack PARAMS ((stack, int));
236 static rtx *get_true_reg PARAMS ((rtx *));
237
238 static int check_asm_stack_operands PARAMS ((rtx));
239 static int get_asm_operand_n_inputs PARAMS ((rtx));
240 static rtx stack_result PARAMS ((tree));
241 static void replace_reg PARAMS ((rtx *, int));
242 static void remove_regno_note PARAMS ((rtx, enum reg_note, int));
243 static int get_hard_regnum PARAMS ((stack, rtx));
244 static void delete_insn_for_stacker PARAMS ((rtx));
245 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
246 enum emit_where));
247 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
248 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
249 static int swap_rtx_condition_1 PARAMS ((rtx));
250 static int swap_rtx_condition PARAMS ((rtx));
251 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
252 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
253 static void subst_asm_stack_regs PARAMS ((rtx, stack));
254 static void subst_stack_regs PARAMS ((rtx, stack));
255 static void change_stack PARAMS ((rtx, stack, stack,
256 enum emit_where));
257 static int convert_regs_entry PARAMS ((void));
258 static void convert_regs_exit PARAMS ((void));
259 static int convert_regs_1 PARAMS ((FILE *, basic_block));
260 static int convert_regs_2 PARAMS ((FILE *, basic_block));
261 static int convert_regs PARAMS ((FILE *));
262 static void print_stack PARAMS ((FILE *, stack));
263 static rtx next_flags_user PARAMS ((rtx));
264 static void record_label_references PARAMS ((rtx, rtx));
265 \f
266 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
267
268 static int
269 stack_regs_mentioned_p (pat)
270 rtx pat;
271 {
272 register const char *fmt;
273 register int i;
274
275 if (STACK_REG_P (pat))
276 return 1;
277
278 fmt = GET_RTX_FORMAT (GET_CODE (pat));
279 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
280 {
281 if (fmt[i] == 'E')
282 {
283 register int j;
284
285 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
286 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
287 return 1;
288 }
289 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
290 return 1;
291 }
292
293 return 0;
294 }
295
296 /* Return nonzero if INSN mentions stacked registers, else return zero. */
297
298 int
299 stack_regs_mentioned (insn)
300 rtx insn;
301 {
302 unsigned int uid, max;
303 int test;
304
305 if (! INSN_P (insn))
306 return 0;
307
308 uid = INSN_UID (insn);
309 max = VARRAY_SIZE (stack_regs_mentioned_data);
310 if (uid >= max)
311 {
312 /* Allocate some extra size to avoid too many reallocs, but
313 do not grow too quickly. */
314 max = uid + uid / 20;
315 VARRAY_GROW (stack_regs_mentioned_data, max);
316 }
317
318 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
319 if (test == 0)
320 {
321 /* This insn has yet to be examined. Do so now. */
322 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
323 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
324 }
325
326 return test == 1;
327 }
328 \f
329 static rtx ix86_flags_rtx;
330
331 static rtx
332 next_flags_user (insn)
333 rtx insn;
334 {
335 /* Search forward looking for the first use of this value.
336 Stop at block boundaries. */
337 /* ??? This really cries for BLOCK_END! */
338
339 while (1)
340 {
341 insn = NEXT_INSN (insn);
342 if (!insn)
343 return NULL_RTX;
344
345 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
346 return insn;
347
348 if (GET_CODE (insn) == JUMP_INSN
349 || GET_CODE (insn) == CODE_LABEL
350 || GET_CODE (insn) == CALL_INSN)
351 return NULL_RTX;
352 }
353 }
354 \f
355 /* Reorganise the stack into ascending numbers,
356 after this insn. */
357
358 static void
359 straighten_stack (insn, regstack)
360 rtx insn;
361 stack regstack;
362 {
363 struct stack_def temp_stack;
364 int top;
365
366 /* If there is only a single register on the stack, then the stack is
367 already in increasing order and no reorganization is needed.
368
369 Similarly if the stack is empty. */
370 if (regstack->top <= 0)
371 return;
372
373 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
374
375 for (top = temp_stack.top = regstack->top; top >= 0; top--)
376 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
377
378 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
379 }
380
381 /* Pop a register from the stack */
382
383 static void
384 pop_stack (regstack, regno)
385 stack regstack;
386 int regno;
387 {
388 int top = regstack->top;
389
390 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
391 regstack->top--;
392 /* If regno was not at the top of stack then adjust stack */
393 if (regstack->reg [top] != regno)
394 {
395 int i;
396 for (i = regstack->top; i >= 0; i--)
397 if (regstack->reg [i] == regno)
398 {
399 int j;
400 for (j = i; j < top; j++)
401 regstack->reg [j] = regstack->reg [j + 1];
402 break;
403 }
404 }
405 }
406 \f
407 /* Convert register usage from "flat" register file usage to a "stack
408 register file. FIRST is the first insn in the function, FILE is the
409 dump file, if used.
410
411 Construct a CFG and run life analysis. Then convert each insn one
412 by one. Run a last jump_optimize pass, if optimizing, to eliminate
413 code duplication created when the converter inserts pop insns on
414 the edges. */
415
416 void
417 reg_to_stack (first, file)
418 rtx first;
419 FILE *file;
420 {
421 int i;
422 int max_uid;
423 block_info bi;
424
425 /* See if there is something to do. Flow analysis is quite
426 expensive so we might save some compilation time. */
427 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
428 if (regs_ever_live[i])
429 break;
430 if (i > LAST_STACK_REG)
431 return;
432
433 /* Ok, floating point instructions exist. If not optimizing,
434 build the CFG and run life analysis. */
435 find_basic_blocks (first, max_reg_num (), file);
436 count_or_remove_death_notes (NULL, 1);
437 life_analysis (first, file, PROP_DEATH_NOTES);
438
439 /* Set up block info for each basic block. */
440 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
441 for (i = n_basic_blocks - 1; i >= 0; --i)
442 BASIC_BLOCK (i)->aux = bi + i;
443 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
444
445 /* Create the replacement registers up front. */
446 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
447 {
448 enum machine_mode mode;
449 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
450 mode != VOIDmode;
451 mode = GET_MODE_WIDER_MODE (mode))
452 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
453 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
454 mode != VOIDmode;
455 mode = GET_MODE_WIDER_MODE (mode))
456 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
457 }
458
459 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
460
461 /* A QNaN for initializing uninitialized variables.
462
463 ??? We can't load from constant memory in PIC mode, because
464 we're insertting these instructions before the prologue and
465 the PIC register hasn't been set up. In that case, fall back
466 on zero, which we can get from `ldz'. */
467
468 if (flag_pic)
469 nan = CONST0_RTX (SFmode);
470 else
471 {
472 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
473 nan = force_const_mem (SFmode, nan);
474 }
475
476 /* Allocate a cache for stack_regs_mentioned. */
477 max_uid = get_max_uid ();
478 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
479 "stack_regs_mentioned cache");
480
481 if (convert_regs (file) && optimize)
482 {
483 jump_optimize (first, JUMP_CROSS_JUMP_DEATH_MATTERS,
484 !JUMP_NOOP_MOVES, !JUMP_AFTER_REGSCAN);
485 }
486
487 /* Clean up. */
488 VARRAY_FREE (stack_regs_mentioned_data);
489 free (bi);
490 }
491 \f
492 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
493 label's chain of references, and note which insn contains each
494 reference. */
495
496 static void
497 record_label_references (insn, pat)
498 rtx insn, pat;
499 {
500 register enum rtx_code code = GET_CODE (pat);
501 register int i;
502 register const char *fmt;
503
504 if (code == LABEL_REF)
505 {
506 register rtx label = XEXP (pat, 0);
507 register rtx ref;
508
509 if (GET_CODE (label) != CODE_LABEL)
510 abort ();
511
512 /* If this is an undefined label, LABEL_REFS (label) contains
513 garbage. */
514 if (INSN_UID (label) == 0)
515 return;
516
517 /* Don't make a duplicate in the code_label's chain. */
518
519 for (ref = LABEL_REFS (label);
520 ref && ref != label;
521 ref = LABEL_NEXTREF (ref))
522 if (CONTAINING_INSN (ref) == insn)
523 return;
524
525 CONTAINING_INSN (pat) = insn;
526 LABEL_NEXTREF (pat) = LABEL_REFS (label);
527 LABEL_REFS (label) = pat;
528
529 return;
530 }
531
532 fmt = GET_RTX_FORMAT (code);
533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
534 {
535 if (fmt[i] == 'e')
536 record_label_references (insn, XEXP (pat, i));
537 if (fmt[i] == 'E')
538 {
539 register int j;
540 for (j = 0; j < XVECLEN (pat, i); j++)
541 record_label_references (insn, XVECEXP (pat, i, j));
542 }
543 }
544 }
545 \f
546 /* Return a pointer to the REG expression within PAT. If PAT is not a
547 REG, possible enclosed by a conversion rtx, return the inner part of
548 PAT that stopped the search. */
549
550 static rtx *
551 get_true_reg (pat)
552 rtx *pat;
553 {
554 for (;;)
555 switch (GET_CODE (*pat))
556 {
557 case SUBREG:
558 /* Eliminate FP subregister accesses in favour of the
559 actual FP register in use. */
560 {
561 rtx subreg;
562 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
563 {
564 *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
565 GET_MODE (subreg));
566 default:
567 return pat;
568 }
569 }
570 case FLOAT:
571 case FIX:
572 case FLOAT_EXTEND:
573 pat = & XEXP (*pat, 0);
574 }
575 }
576 \f
577 /* There are many rules that an asm statement for stack-like regs must
578 follow. Those rules are explained at the top of this file: the rule
579 numbers below refer to that explanation. */
580
581 static int
582 check_asm_stack_operands (insn)
583 rtx insn;
584 {
585 int i;
586 int n_clobbers;
587 int malformed_asm = 0;
588 rtx body = PATTERN (insn);
589
590 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
591 char implicitly_dies[FIRST_PSEUDO_REGISTER];
592 int alt;
593
594 rtx *clobber_reg = 0;
595 int n_inputs, n_outputs;
596
597 /* Find out what the constraints require. If no constraint
598 alternative matches, this asm is malformed. */
599 extract_insn (insn);
600 constrain_operands (1);
601 alt = which_alternative;
602
603 preprocess_constraints ();
604
605 n_inputs = get_asm_operand_n_inputs (body);
606 n_outputs = recog_data.n_operands - n_inputs;
607
608 if (alt < 0)
609 {
610 malformed_asm = 1;
611 /* Avoid further trouble with this insn. */
612 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
613 return 0;
614 }
615
616 /* Strip SUBREGs here to make the following code simpler. */
617 for (i = 0; i < recog_data.n_operands; i++)
618 if (GET_CODE (recog_data.operand[i]) == SUBREG
619 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
620 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
621
622 /* Set up CLOBBER_REG. */
623
624 n_clobbers = 0;
625
626 if (GET_CODE (body) == PARALLEL)
627 {
628 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
629
630 for (i = 0; i < XVECLEN (body, 0); i++)
631 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
632 {
633 rtx clobber = XVECEXP (body, 0, i);
634 rtx reg = XEXP (clobber, 0);
635
636 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
637 reg = SUBREG_REG (reg);
638
639 if (STACK_REG_P (reg))
640 {
641 clobber_reg[n_clobbers] = reg;
642 n_clobbers++;
643 }
644 }
645 }
646
647 /* Enforce rule #4: Output operands must specifically indicate which
648 reg an output appears in after an asm. "=f" is not allowed: the
649 operand constraints must select a class with a single reg.
650
651 Also enforce rule #5: Output operands must start at the top of
652 the reg-stack: output operands may not "skip" a reg. */
653
654 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
655 for (i = 0; i < n_outputs; i++)
656 if (STACK_REG_P (recog_data.operand[i]))
657 {
658 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
659 {
660 error_for_asm (insn, "Output constraint %d must specify a single register", i);
661 malformed_asm = 1;
662 }
663 else
664 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
665 }
666
667
668 /* Search for first non-popped reg. */
669 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
670 if (! reg_used_as_output[i])
671 break;
672
673 /* If there are any other popped regs, that's an error. */
674 for (; i < LAST_STACK_REG + 1; i++)
675 if (reg_used_as_output[i])
676 break;
677
678 if (i != LAST_STACK_REG + 1)
679 {
680 error_for_asm (insn, "Output regs must be grouped at top of stack");
681 malformed_asm = 1;
682 }
683
684 /* Enforce rule #2: All implicitly popped input regs must be closer
685 to the top of the reg-stack than any input that is not implicitly
686 popped. */
687
688 memset (implicitly_dies, 0, sizeof (implicitly_dies));
689 for (i = n_outputs; i < n_outputs + n_inputs; i++)
690 if (STACK_REG_P (recog_data.operand[i]))
691 {
692 /* An input reg is implicitly popped if it is tied to an
693 output, or if there is a CLOBBER for it. */
694 int j;
695
696 for (j = 0; j < n_clobbers; j++)
697 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
698 break;
699
700 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
701 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
702 }
703
704 /* Search for first non-popped reg. */
705 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
706 if (! implicitly_dies[i])
707 break;
708
709 /* If there are any other popped regs, that's an error. */
710 for (; i < LAST_STACK_REG + 1; i++)
711 if (implicitly_dies[i])
712 break;
713
714 if (i != LAST_STACK_REG + 1)
715 {
716 error_for_asm (insn,
717 "Implicitly popped regs must be grouped at top of stack");
718 malformed_asm = 1;
719 }
720
721 /* Enfore rule #3: If any input operand uses the "f" constraint, all
722 output constraints must use the "&" earlyclobber.
723
724 ??? Detect this more deterministically by having constrain_asm_operands
725 record any earlyclobber. */
726
727 for (i = n_outputs; i < n_outputs + n_inputs; i++)
728 if (recog_op_alt[i][alt].matches == -1)
729 {
730 int j;
731
732 for (j = 0; j < n_outputs; j++)
733 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
734 {
735 error_for_asm (insn,
736 "Output operand %d must use `&' constraint", j);
737 malformed_asm = 1;
738 }
739 }
740
741 if (malformed_asm)
742 {
743 /* Avoid further trouble with this insn. */
744 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
745 return 0;
746 }
747
748 return 1;
749 }
750 \f
751 /* Calculate the number of inputs and outputs in BODY, an
752 asm_operands. N_OPERANDS is the total number of operands, and
753 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
754 placed. */
755
756 static int
757 get_asm_operand_n_inputs (body)
758 rtx body;
759 {
760 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
761 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
762
763 else if (GET_CODE (body) == ASM_OPERANDS)
764 return ASM_OPERANDS_INPUT_LENGTH (body);
765
766 else if (GET_CODE (body) == PARALLEL
767 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
768 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
769
770 else if (GET_CODE (body) == PARALLEL
771 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
772 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
773
774 abort ();
775 }
776
777 /* If current function returns its result in an fp stack register,
778 return the REG. Otherwise, return 0. */
779
780 static rtx
781 stack_result (decl)
782 tree decl;
783 {
784 rtx result;
785
786 /* If the value is supposed to be returned in memory, then clearly
787 it is not returned in a stack register. */
788 if (aggregate_value_p (DECL_RESULT (decl)))
789 return 0;
790
791 result = DECL_RTL (DECL_RESULT (decl));
792 /* ?!? What is this code supposed to do? Can this code actually
793 trigger if we kick out aggregates above? */
794 if (result != 0
795 && ! (GET_CODE (result) == REG
796 && REGNO (result) < FIRST_PSEUDO_REGISTER))
797 {
798 #ifdef FUNCTION_OUTGOING_VALUE
799 result
800 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
801 #else
802 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
803 #endif
804 }
805
806 return result != 0 && STACK_REG_P (result) ? result : 0;
807 }
808 \f
809
810 /*
811 * This section deals with stack register substitution, and forms the second
812 * pass over the RTL.
813 */
814
815 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
816 the desired hard REGNO. */
817
818 static void
819 replace_reg (reg, regno)
820 rtx *reg;
821 int regno;
822 {
823 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
824 || ! STACK_REG_P (*reg))
825 abort ();
826
827 switch (GET_MODE_CLASS (GET_MODE (*reg)))
828 {
829 default: abort ();
830 case MODE_FLOAT:
831 case MODE_COMPLEX_FLOAT:;
832 }
833
834 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
835 }
836
837 /* Remove a note of type NOTE, which must be found, for register
838 number REGNO from INSN. Remove only one such note. */
839
840 static void
841 remove_regno_note (insn, note, regno)
842 rtx insn;
843 enum reg_note note;
844 int regno;
845 {
846 register rtx *note_link, this;
847
848 note_link = &REG_NOTES(insn);
849 for (this = *note_link; this; this = XEXP (this, 1))
850 if (REG_NOTE_KIND (this) == note
851 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
852 {
853 *note_link = XEXP (this, 1);
854 return;
855 }
856 else
857 note_link = &XEXP (this, 1);
858
859 abort ();
860 }
861
862 /* Find the hard register number of virtual register REG in REGSTACK.
863 The hard register number is relative to the top of the stack. -1 is
864 returned if the register is not found. */
865
866 static int
867 get_hard_regnum (regstack, reg)
868 stack regstack;
869 rtx reg;
870 {
871 int i;
872
873 if (! STACK_REG_P (reg))
874 abort ();
875
876 for (i = regstack->top; i >= 0; i--)
877 if (regstack->reg[i] == REGNO (reg))
878 break;
879
880 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
881 }
882
883 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
884 the chain of insns. Doing so could confuse block_begin and block_end
885 if this were the only insn in the block. */
886
887 static void
888 delete_insn_for_stacker (insn)
889 rtx insn;
890 {
891 PUT_CODE (insn, NOTE);
892 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
893 NOTE_SOURCE_FILE (insn) = 0;
894 }
895 \f
896 /* Emit an insn to pop virtual register REG before or after INSN.
897 REGSTACK is the stack state after INSN and is updated to reflect this
898 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
899 is represented as a SET whose destination is the register to be popped
900 and source is the top of stack. A death note for the top of stack
901 cases the movdf pattern to pop. */
902
903 static rtx
904 emit_pop_insn (insn, regstack, reg, where)
905 rtx insn;
906 stack regstack;
907 rtx reg;
908 enum emit_where where;
909 {
910 rtx pop_insn, pop_rtx;
911 int hard_regno;
912
913 hard_regno = get_hard_regnum (regstack, reg);
914
915 if (hard_regno < FIRST_STACK_REG)
916 abort ();
917
918 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
919 FP_MODE_REG (FIRST_STACK_REG, DFmode));
920
921 if (where == EMIT_AFTER)
922 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
923 else
924 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
925
926 REG_NOTES (pop_insn)
927 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
928 REG_NOTES (pop_insn));
929
930 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
931 = regstack->reg[regstack->top];
932 regstack->top -= 1;
933 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
934
935 return pop_insn;
936 }
937 \f
938 /* Emit an insn before or after INSN to swap virtual register REG with
939 the top of stack. REGSTACK is the stack state before the swap, and
940 is updated to reflect the swap. A swap insn is represented as a
941 PARALLEL of two patterns: each pattern moves one reg to the other.
942
943 If REG is already at the top of the stack, no insn is emitted. */
944
945 static void
946 emit_swap_insn (insn, regstack, reg)
947 rtx insn;
948 stack regstack;
949 rtx reg;
950 {
951 int hard_regno;
952 rtx swap_rtx;
953 int tmp, other_reg; /* swap regno temps */
954 rtx i1; /* the stack-reg insn prior to INSN */
955 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
956
957 hard_regno = get_hard_regnum (regstack, reg);
958
959 if (hard_regno < FIRST_STACK_REG)
960 abort ();
961 if (hard_regno == FIRST_STACK_REG)
962 return;
963
964 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
965
966 tmp = regstack->reg[other_reg];
967 regstack->reg[other_reg] = regstack->reg[regstack->top];
968 regstack->reg[regstack->top] = tmp;
969
970 /* Find the previous insn involving stack regs, but don't pass a
971 block boundary. */
972 i1 = NULL;
973 if (current_block && insn != current_block->head)
974 {
975 rtx tmp = PREV_INSN (insn);
976 rtx limit = PREV_INSN (current_block->head);
977 while (tmp != limit)
978 {
979 if (GET_CODE (tmp) == CODE_LABEL
980 || NOTE_INSN_BASIC_BLOCK_P (tmp)
981 || (GET_CODE (tmp) == INSN
982 && stack_regs_mentioned (tmp)))
983 {
984 i1 = tmp;
985 break;
986 }
987 tmp = PREV_INSN (tmp);
988 }
989 }
990
991 if (i1 != NULL_RTX
992 && (i1set = single_set (i1)) != NULL_RTX)
993 {
994 rtx i1src = *get_true_reg (&SET_SRC (i1set));
995 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
996
997 /* If the previous register stack push was from the reg we are to
998 swap with, omit the swap. */
999
1000 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1001 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1002 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1003 return;
1004
1005 /* If the previous insn wrote to the reg we are to swap with,
1006 omit the swap. */
1007
1008 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1009 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1010 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1011 return;
1012 }
1013
1014 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1015 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1016
1017 if (i1)
1018 emit_block_insn_after (swap_rtx, i1, current_block);
1019 else if (current_block)
1020 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1021 else
1022 emit_insn_before (swap_rtx, insn);
1023 }
1024 \f
1025 /* Handle a move to or from a stack register in PAT, which is in INSN.
1026 REGSTACK is the current stack. */
1027
1028 static void
1029 move_for_stack_reg (insn, regstack, pat)
1030 rtx insn;
1031 stack regstack;
1032 rtx pat;
1033 {
1034 rtx *psrc = get_true_reg (&SET_SRC (pat));
1035 rtx *pdest = get_true_reg (&SET_DEST (pat));
1036 rtx src, dest;
1037 rtx note;
1038
1039 src = *psrc; dest = *pdest;
1040
1041 if (STACK_REG_P (src) && STACK_REG_P (dest))
1042 {
1043 /* Write from one stack reg to another. If SRC dies here, then
1044 just change the register mapping and delete the insn. */
1045
1046 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1047 if (note)
1048 {
1049 int i;
1050
1051 /* If this is a no-op move, there must not be a REG_DEAD note. */
1052 if (REGNO (src) == REGNO (dest))
1053 abort ();
1054
1055 for (i = regstack->top; i >= 0; i--)
1056 if (regstack->reg[i] == REGNO (src))
1057 break;
1058
1059 /* The source must be live, and the dest must be dead. */
1060 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1061 abort ();
1062
1063 /* It is possible that the dest is unused after this insn.
1064 If so, just pop the src. */
1065
1066 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1067 {
1068 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1069
1070 delete_insn_for_stacker (insn);
1071 return;
1072 }
1073
1074 regstack->reg[i] = REGNO (dest);
1075
1076 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1077 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1078
1079 delete_insn_for_stacker (insn);
1080
1081 return;
1082 }
1083
1084 /* The source reg does not die. */
1085
1086 /* If this appears to be a no-op move, delete it, or else it
1087 will confuse the machine description output patterns. But if
1088 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1089 for REG_UNUSED will not work for deleted insns. */
1090
1091 if (REGNO (src) == REGNO (dest))
1092 {
1093 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1094 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1095
1096 delete_insn_for_stacker (insn);
1097 return;
1098 }
1099
1100 /* The destination ought to be dead */
1101 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1102 abort ();
1103
1104 replace_reg (psrc, get_hard_regnum (regstack, src));
1105
1106 regstack->reg[++regstack->top] = REGNO (dest);
1107 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1108 replace_reg (pdest, FIRST_STACK_REG);
1109 }
1110 else if (STACK_REG_P (src))
1111 {
1112 /* Save from a stack reg to MEM, or possibly integer reg. Since
1113 only top of stack may be saved, emit an exchange first if
1114 needs be. */
1115
1116 emit_swap_insn (insn, regstack, src);
1117
1118 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1119 if (note)
1120 {
1121 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1122 regstack->top--;
1123 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1124 }
1125 else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1)
1126 {
1127 /* A 387 cannot write an XFmode value to a MEM without
1128 clobbering the source reg. The output code can handle
1129 this by reading back the value from the MEM.
1130 But it is more efficient to use a temp register if one is
1131 available. Push the source value here if the register
1132 stack is not full, and then write the value to memory via
1133 a pop. */
1134 rtx push_rtx, push_insn;
1135 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1136
1137 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1138 push_insn = emit_insn_before (push_rtx, insn);
1139 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1140 REG_NOTES (insn));
1141 }
1142
1143 replace_reg (psrc, FIRST_STACK_REG);
1144 }
1145 else if (STACK_REG_P (dest))
1146 {
1147 /* Load from MEM, or possibly integer REG or constant, into the
1148 stack regs. The actual target is always the top of the
1149 stack. The stack mapping is changed to reflect that DEST is
1150 now at top of stack. */
1151
1152 /* The destination ought to be dead */
1153 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1154 abort ();
1155
1156 if (regstack->top >= REG_STACK_SIZE)
1157 abort ();
1158
1159 regstack->reg[++regstack->top] = REGNO (dest);
1160 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1161 replace_reg (pdest, FIRST_STACK_REG);
1162 }
1163 else
1164 abort ();
1165 }
1166 \f
1167 /* Swap the condition on a branch, if there is one. Return true if we
1168 found a condition to swap. False if the condition was not used as
1169 such. */
1170
1171 static int
1172 swap_rtx_condition_1 (pat)
1173 rtx pat;
1174 {
1175 register const char *fmt;
1176 register int i, r = 0;
1177
1178 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1179 {
1180 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1181 r = 1;
1182 }
1183 else
1184 {
1185 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1186 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1187 {
1188 if (fmt[i] == 'E')
1189 {
1190 register int j;
1191
1192 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1193 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1194 }
1195 else if (fmt[i] == 'e')
1196 r |= swap_rtx_condition_1 (XEXP (pat, i));
1197 }
1198 }
1199
1200 return r;
1201 }
1202
1203 static int
1204 swap_rtx_condition (insn)
1205 rtx insn;
1206 {
1207 rtx pat = PATTERN (insn);
1208
1209 /* We're looking for a single set to cc0 or an HImode temporary. */
1210
1211 if (GET_CODE (pat) == SET
1212 && GET_CODE (SET_DEST (pat)) == REG
1213 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1214 {
1215 insn = next_flags_user (insn);
1216 if (insn == NULL_RTX)
1217 return 0;
1218 pat = PATTERN (insn);
1219 }
1220
1221 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1222 not doing anything with the cc value right now. We may be able to
1223 search for one though. */
1224
1225 if (GET_CODE (pat) == SET
1226 && GET_CODE (SET_SRC (pat)) == UNSPEC
1227 && XINT (SET_SRC (pat), 1) == 9)
1228 {
1229 rtx dest = SET_DEST (pat);
1230
1231 /* Search forward looking for the first use of this value.
1232 Stop at block boundaries. */
1233 /* ??? This really cries for BLOCK_END! */
1234 while (1)
1235 {
1236 insn = NEXT_INSN (insn);
1237 if (insn == NULL_RTX)
1238 return 0;
1239 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1240 break;
1241 if (GET_CODE (insn) == JUMP_INSN)
1242 return 0;
1243 if (GET_CODE (insn) == CODE_LABEL)
1244 return 0;
1245 }
1246
1247 /* So we've found the insn using this value. If it is anything
1248 other than sahf, aka unspec 10, or the value does not die
1249 (meaning we'd have to search further), then we must give up. */
1250 pat = PATTERN (insn);
1251 if (GET_CODE (pat) != SET
1252 || GET_CODE (SET_SRC (pat)) != UNSPEC
1253 || XINT (SET_SRC (pat), 1) != 10
1254 || ! dead_or_set_p (insn, dest))
1255 return 0;
1256
1257 /* Now we are prepared to handle this as a normal cc0 setter. */
1258 insn = next_flags_user (insn);
1259 if (insn == NULL_RTX)
1260 return 0;
1261 pat = PATTERN (insn);
1262 }
1263
1264 return swap_rtx_condition_1 (pat);
1265 }
1266
1267 /* Handle a comparison. Special care needs to be taken to avoid
1268 causing comparisons that a 387 cannot do correctly, such as EQ.
1269
1270 Also, a pop insn may need to be emitted. The 387 does have an
1271 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1272 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1273 set up. */
1274
1275 static void
1276 compare_for_stack_reg (insn, regstack, pat_src)
1277 rtx insn;
1278 stack regstack;
1279 rtx pat_src;
1280 {
1281 rtx *src1, *src2;
1282 rtx src1_note, src2_note;
1283 rtx flags_user;
1284
1285 src1 = get_true_reg (&XEXP (pat_src, 0));
1286 src2 = get_true_reg (&XEXP (pat_src, 1));
1287 flags_user = next_flags_user (insn);
1288
1289 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1290 registers that die in this insn - move those to stack top first. */
1291 if ((! STACK_REG_P (*src1)
1292 || (STACK_REG_P (*src2)
1293 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1294 && swap_rtx_condition (insn))
1295 {
1296 rtx temp;
1297 temp = XEXP (pat_src, 0);
1298 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1299 XEXP (pat_src, 1) = temp;
1300
1301 src1 = get_true_reg (&XEXP (pat_src, 0));
1302 src2 = get_true_reg (&XEXP (pat_src, 1));
1303
1304 INSN_CODE (insn) = -1;
1305 }
1306
1307 /* We will fix any death note later. */
1308
1309 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1310
1311 if (STACK_REG_P (*src2))
1312 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1313 else
1314 src2_note = NULL_RTX;
1315
1316 emit_swap_insn (insn, regstack, *src1);
1317
1318 replace_reg (src1, FIRST_STACK_REG);
1319
1320 if (STACK_REG_P (*src2))
1321 replace_reg (src2, get_hard_regnum (regstack, *src2));
1322
1323 if (src1_note)
1324 {
1325 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1326 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1327 }
1328
1329 /* If the second operand dies, handle that. But if the operands are
1330 the same stack register, don't bother, because only one death is
1331 needed, and it was just handled. */
1332
1333 if (src2_note
1334 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1335 && REGNO (*src1) == REGNO (*src2)))
1336 {
1337 /* As a special case, two regs may die in this insn if src2 is
1338 next to top of stack and the top of stack also dies. Since
1339 we have already popped src1, "next to top of stack" is really
1340 at top (FIRST_STACK_REG) now. */
1341
1342 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1343 && src1_note)
1344 {
1345 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1346 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1347 }
1348 else
1349 {
1350 /* The 386 can only represent death of the first operand in
1351 the case handled above. In all other cases, emit a separate
1352 pop and remove the death note from here. */
1353
1354 /* link_cc0_insns (insn); */
1355
1356 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1357
1358 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1359 EMIT_AFTER);
1360 }
1361 }
1362 }
1363 \f
1364 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1365 is the current register layout. */
1366
1367 static void
1368 subst_stack_regs_pat (insn, regstack, pat)
1369 rtx insn;
1370 stack regstack;
1371 rtx pat;
1372 {
1373 rtx *dest, *src;
1374
1375 switch (GET_CODE (pat))
1376 {
1377 case USE:
1378 /* Deaths in USE insns can happen in non optimizing compilation.
1379 Handle them by popping the dying register. */
1380 src = get_true_reg (&XEXP (pat, 0));
1381 if (STACK_REG_P (*src)
1382 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1383 {
1384 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1385 return;
1386 }
1387 /* ??? Uninitialized USE should not happen. */
1388 else if (get_hard_regnum (regstack, *src) == -1)
1389 abort();
1390 break;
1391
1392 case CLOBBER:
1393 {
1394 rtx note;
1395
1396 dest = get_true_reg (&XEXP (pat, 0));
1397 if (STACK_REG_P (*dest))
1398 {
1399 note = find_reg_note (insn, REG_DEAD, *dest);
1400
1401 if (pat != PATTERN (insn))
1402 {
1403 /* The fix_truncdi_1 pattern wants to be able to allocate
1404 it's own scratch register. It does this by clobbering
1405 an fp reg so that it is assured of an empty reg-stack
1406 register. If the register is live, kill it now.
1407 Remove the DEAD/UNUSED note so we don't try to kill it
1408 later too. */
1409
1410 if (note)
1411 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1412 else
1413 {
1414 note = find_reg_note (insn, REG_UNUSED, *dest);
1415 if (!note)
1416 abort ();
1417 }
1418 remove_note (insn, note);
1419 replace_reg (dest, LAST_STACK_REG);
1420 }
1421 else
1422 {
1423 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1424 indicates an uninitialized value. Because reload removed
1425 all other clobbers, this must be due to a function
1426 returning without a value. Load up a NaN. */
1427
1428 if (! note
1429 && get_hard_regnum (regstack, *dest) == -1)
1430 {
1431 pat = gen_rtx_SET (VOIDmode,
1432 FP_MODE_REG (REGNO (*dest), SFmode),
1433 nan);
1434 PATTERN (insn) = pat;
1435 move_for_stack_reg (insn, regstack, pat);
1436 }
1437 }
1438 }
1439 break;
1440 }
1441
1442 case SET:
1443 {
1444 rtx *src1 = (rtx *) NULL_PTR, *src2;
1445 rtx src1_note, src2_note;
1446 rtx pat_src;
1447
1448 dest = get_true_reg (&SET_DEST (pat));
1449 src = get_true_reg (&SET_SRC (pat));
1450 pat_src = SET_SRC (pat);
1451
1452 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1453 if (STACK_REG_P (*src)
1454 || (STACK_REG_P (*dest)
1455 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1456 || GET_CODE (*src) == CONST_DOUBLE)))
1457 {
1458 move_for_stack_reg (insn, regstack, pat);
1459 break;
1460 }
1461
1462 switch (GET_CODE (pat_src))
1463 {
1464 case COMPARE:
1465 compare_for_stack_reg (insn, regstack, pat_src);
1466 break;
1467
1468 case CALL:
1469 {
1470 int count;
1471 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1472 --count >= 0;)
1473 {
1474 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1475 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1476 }
1477 }
1478 replace_reg (dest, FIRST_STACK_REG);
1479 break;
1480
1481 case REG:
1482 /* This is a `tstM2' case. */
1483 if (*dest != cc0_rtx)
1484 abort ();
1485 src1 = src;
1486
1487 /* Fall through. */
1488
1489 case FLOAT_TRUNCATE:
1490 case SQRT:
1491 case ABS:
1492 case NEG:
1493 /* These insns only operate on the top of the stack. DEST might
1494 be cc0_rtx if we're processing a tstM pattern. Also, it's
1495 possible that the tstM case results in a REG_DEAD note on the
1496 source. */
1497
1498 if (src1 == 0)
1499 src1 = get_true_reg (&XEXP (pat_src, 0));
1500
1501 emit_swap_insn (insn, regstack, *src1);
1502
1503 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1504
1505 if (STACK_REG_P (*dest))
1506 replace_reg (dest, FIRST_STACK_REG);
1507
1508 if (src1_note)
1509 {
1510 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1511 regstack->top--;
1512 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1513 }
1514
1515 replace_reg (src1, FIRST_STACK_REG);
1516 break;
1517
1518 case MINUS:
1519 case DIV:
1520 /* On i386, reversed forms of subM3 and divM3 exist for
1521 MODE_FLOAT, so the same code that works for addM3 and mulM3
1522 can be used. */
1523 case MULT:
1524 case PLUS:
1525 /* These insns can accept the top of stack as a destination
1526 from a stack reg or mem, or can use the top of stack as a
1527 source and some other stack register (possibly top of stack)
1528 as a destination. */
1529
1530 src1 = get_true_reg (&XEXP (pat_src, 0));
1531 src2 = get_true_reg (&XEXP (pat_src, 1));
1532
1533 /* We will fix any death note later. */
1534
1535 if (STACK_REG_P (*src1))
1536 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1537 else
1538 src1_note = NULL_RTX;
1539 if (STACK_REG_P (*src2))
1540 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1541 else
1542 src2_note = NULL_RTX;
1543
1544 /* If either operand is not a stack register, then the dest
1545 must be top of stack. */
1546
1547 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1548 emit_swap_insn (insn, regstack, *dest);
1549 else
1550 {
1551 /* Both operands are REG. If neither operand is already
1552 at the top of stack, choose to make the one that is the dest
1553 the new top of stack. */
1554
1555 int src1_hard_regnum, src2_hard_regnum;
1556
1557 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1558 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1559 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1560 abort ();
1561
1562 if (src1_hard_regnum != FIRST_STACK_REG
1563 && src2_hard_regnum != FIRST_STACK_REG)
1564 emit_swap_insn (insn, regstack, *dest);
1565 }
1566
1567 if (STACK_REG_P (*src1))
1568 replace_reg (src1, get_hard_regnum (regstack, *src1));
1569 if (STACK_REG_P (*src2))
1570 replace_reg (src2, get_hard_regnum (regstack, *src2));
1571
1572 if (src1_note)
1573 {
1574 rtx src1_reg = XEXP (src1_note, 0);
1575
1576 /* If the register that dies is at the top of stack, then
1577 the destination is somewhere else - merely substitute it.
1578 But if the reg that dies is not at top of stack, then
1579 move the top of stack to the dead reg, as though we had
1580 done the insn and then a store-with-pop. */
1581
1582 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1583 {
1584 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1585 replace_reg (dest, get_hard_regnum (regstack, *dest));
1586 }
1587 else
1588 {
1589 int regno = get_hard_regnum (regstack, src1_reg);
1590
1591 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1592 replace_reg (dest, regno);
1593
1594 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1595 = regstack->reg[regstack->top];
1596 }
1597
1598 CLEAR_HARD_REG_BIT (regstack->reg_set,
1599 REGNO (XEXP (src1_note, 0)));
1600 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1601 regstack->top--;
1602 }
1603 else if (src2_note)
1604 {
1605 rtx src2_reg = XEXP (src2_note, 0);
1606 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1607 {
1608 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1609 replace_reg (dest, get_hard_regnum (regstack, *dest));
1610 }
1611 else
1612 {
1613 int regno = get_hard_regnum (regstack, src2_reg);
1614
1615 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1616 replace_reg (dest, regno);
1617
1618 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1619 = regstack->reg[regstack->top];
1620 }
1621
1622 CLEAR_HARD_REG_BIT (regstack->reg_set,
1623 REGNO (XEXP (src2_note, 0)));
1624 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1625 regstack->top--;
1626 }
1627 else
1628 {
1629 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1630 replace_reg (dest, get_hard_regnum (regstack, *dest));
1631 }
1632
1633 /* Keep operand 1 maching with destination. */
1634 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1635 && REG_P (*src1) && REG_P (*src2)
1636 && REGNO (*src1) != REGNO (*dest))
1637 {
1638 int tmp = REGNO (*src1);
1639 replace_reg (src1, REGNO (*src2));
1640 replace_reg (src2, tmp);
1641 }
1642 break;
1643
1644 case UNSPEC:
1645 switch (XINT (pat_src, 1))
1646 {
1647 case 1: /* sin */
1648 case 2: /* cos */
1649 /* These insns only operate on the top of the stack. */
1650
1651 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1652
1653 emit_swap_insn (insn, regstack, *src1);
1654
1655 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1656
1657 if (STACK_REG_P (*dest))
1658 replace_reg (dest, FIRST_STACK_REG);
1659
1660 if (src1_note)
1661 {
1662 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1663 regstack->top--;
1664 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1665 }
1666
1667 replace_reg (src1, FIRST_STACK_REG);
1668 break;
1669
1670 case 10:
1671 /* (unspec [(unspec [(compare ..)] 9)] 10)
1672 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1673 matches the PPRO fcomi instruction. */
1674
1675 pat_src = XVECEXP (pat_src, 0, 0);
1676 if (GET_CODE (pat_src) != UNSPEC
1677 || XINT (pat_src, 1) != 9)
1678 abort ();
1679 /* FALLTHRU */
1680
1681 case 9:
1682 /* (unspec [(compare ..)] 9) */
1683 /* Combined fcomp+fnstsw generated for doing well with
1684 CSE. When optimizing this would have been broken
1685 up before now. */
1686
1687 pat_src = XVECEXP (pat_src, 0, 0);
1688 if (GET_CODE (pat_src) != COMPARE)
1689 abort ();
1690
1691 compare_for_stack_reg (insn, regstack, pat_src);
1692 break;
1693
1694 default:
1695 abort ();
1696 }
1697 break;
1698
1699 case IF_THEN_ELSE:
1700 /* This insn requires the top of stack to be the destination. */
1701
1702 /* If the comparison operator is an FP comparison operator,
1703 it is handled correctly by compare_for_stack_reg () who
1704 will move the destination to the top of stack. But if the
1705 comparison operator is not an FP comparison operator, we
1706 have to handle it here. */
1707 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1708 && REGNO (*dest) != regstack->reg[regstack->top])
1709 emit_swap_insn (insn, regstack, *dest);
1710
1711 src1 = get_true_reg (&XEXP (pat_src, 1));
1712 src2 = get_true_reg (&XEXP (pat_src, 2));
1713
1714 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1715 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1716
1717 {
1718 rtx src_note [3];
1719 int i;
1720
1721 src_note[0] = 0;
1722 src_note[1] = src1_note;
1723 src_note[2] = src2_note;
1724
1725 if (STACK_REG_P (*src1))
1726 replace_reg (src1, get_hard_regnum (regstack, *src1));
1727 if (STACK_REG_P (*src2))
1728 replace_reg (src2, get_hard_regnum (regstack, *src2));
1729
1730 for (i = 1; i <= 2; i++)
1731 if (src_note [i])
1732 {
1733 int regno = REGNO (XEXP (src_note[i], 0));
1734
1735 /* If the register that dies is not at the top of
1736 stack, then move the top of stack to the dead reg */
1737 if (regno != regstack->reg[regstack->top])
1738 {
1739 remove_regno_note (insn, REG_DEAD, regno);
1740 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1741 EMIT_AFTER);
1742 }
1743 else
1744 {
1745 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1746 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1747 regstack->top--;
1748 }
1749 }
1750 }
1751
1752 /* Make dest the top of stack. Add dest to regstack if
1753 not present. */
1754 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1755 regstack->reg[++regstack->top] = REGNO (*dest);
1756 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1757 replace_reg (dest, FIRST_STACK_REG);
1758 break;
1759
1760 default:
1761 abort ();
1762 }
1763 break;
1764 }
1765
1766 default:
1767 break;
1768 }
1769 }
1770 \f
1771 /* Substitute hard regnums for any stack regs in INSN, which has
1772 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1773 before the insn, and is updated with changes made here.
1774
1775 There are several requirements and assumptions about the use of
1776 stack-like regs in asm statements. These rules are enforced by
1777 record_asm_stack_regs; see comments there for details. Any
1778 asm_operands left in the RTL at this point may be assume to meet the
1779 requirements, since record_asm_stack_regs removes any problem asm. */
1780
1781 static void
1782 subst_asm_stack_regs (insn, regstack)
1783 rtx insn;
1784 stack regstack;
1785 {
1786 rtx body = PATTERN (insn);
1787 int alt;
1788
1789 rtx *note_reg; /* Array of note contents */
1790 rtx **note_loc; /* Address of REG field of each note */
1791 enum reg_note *note_kind; /* The type of each note */
1792
1793 rtx *clobber_reg = 0;
1794 rtx **clobber_loc = 0;
1795
1796 struct stack_def temp_stack;
1797 int n_notes;
1798 int n_clobbers;
1799 rtx note;
1800 int i;
1801 int n_inputs, n_outputs;
1802
1803 if (! check_asm_stack_operands (insn))
1804 return;
1805
1806 /* Find out what the constraints required. If no constraint
1807 alternative matches, that is a compiler bug: we should have caught
1808 such an insn in check_asm_stack_operands. */
1809 extract_insn (insn);
1810 constrain_operands (1);
1811 alt = which_alternative;
1812
1813 preprocess_constraints ();
1814
1815 n_inputs = get_asm_operand_n_inputs (body);
1816 n_outputs = recog_data.n_operands - n_inputs;
1817
1818 if (alt < 0)
1819 abort ();
1820
1821 /* Strip SUBREGs here to make the following code simpler. */
1822 for (i = 0; i < recog_data.n_operands; i++)
1823 if (GET_CODE (recog_data.operand[i]) == SUBREG
1824 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1825 {
1826 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1827 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1828 }
1829
1830 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1831
1832 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1833 i++;
1834
1835 note_reg = (rtx *) alloca (i * sizeof (rtx));
1836 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1837 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1838
1839 n_notes = 0;
1840 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1841 {
1842 rtx reg = XEXP (note, 0);
1843 rtx *loc = & XEXP (note, 0);
1844
1845 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1846 {
1847 loc = & SUBREG_REG (reg);
1848 reg = SUBREG_REG (reg);
1849 }
1850
1851 if (STACK_REG_P (reg)
1852 && (REG_NOTE_KIND (note) == REG_DEAD
1853 || REG_NOTE_KIND (note) == REG_UNUSED))
1854 {
1855 note_reg[n_notes] = reg;
1856 note_loc[n_notes] = loc;
1857 note_kind[n_notes] = REG_NOTE_KIND (note);
1858 n_notes++;
1859 }
1860 }
1861
1862 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1863
1864 n_clobbers = 0;
1865
1866 if (GET_CODE (body) == PARALLEL)
1867 {
1868 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1869 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1870
1871 for (i = 0; i < XVECLEN (body, 0); i++)
1872 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1873 {
1874 rtx clobber = XVECEXP (body, 0, i);
1875 rtx reg = XEXP (clobber, 0);
1876 rtx *loc = & XEXP (clobber, 0);
1877
1878 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1879 {
1880 loc = & SUBREG_REG (reg);
1881 reg = SUBREG_REG (reg);
1882 }
1883
1884 if (STACK_REG_P (reg))
1885 {
1886 clobber_reg[n_clobbers] = reg;
1887 clobber_loc[n_clobbers] = loc;
1888 n_clobbers++;
1889 }
1890 }
1891 }
1892
1893 temp_stack = *regstack;
1894
1895 /* Put the input regs into the desired place in TEMP_STACK. */
1896
1897 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1898 if (STACK_REG_P (recog_data.operand[i])
1899 && reg_class_subset_p (recog_op_alt[i][alt].class,
1900 FLOAT_REGS)
1901 && recog_op_alt[i][alt].class != FLOAT_REGS)
1902 {
1903 /* If an operand needs to be in a particular reg in
1904 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1905 these constraints are for single register classes, and
1906 reload guaranteed that operand[i] is already in that class,
1907 we can just use REGNO (recog_data.operand[i]) to know which
1908 actual reg this operand needs to be in. */
1909
1910 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1911
1912 if (regno < 0)
1913 abort ();
1914
1915 if (regno != REGNO (recog_data.operand[i]))
1916 {
1917 /* recog_data.operand[i] is not in the right place. Find
1918 it and swap it with whatever is already in I's place.
1919 K is where recog_data.operand[i] is now. J is where it
1920 should be. */
1921 int j, k, temp;
1922
1923 k = temp_stack.top - (regno - FIRST_STACK_REG);
1924 j = (temp_stack.top
1925 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
1926
1927 temp = temp_stack.reg[k];
1928 temp_stack.reg[k] = temp_stack.reg[j];
1929 temp_stack.reg[j] = temp;
1930 }
1931 }
1932
1933 /* Emit insns before INSN to make sure the reg-stack is in the right
1934 order. */
1935
1936 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1937
1938 /* Make the needed input register substitutions. Do death notes and
1939 clobbers too, because these are for inputs, not outputs. */
1940
1941 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1942 if (STACK_REG_P (recog_data.operand[i]))
1943 {
1944 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
1945
1946 if (regnum < 0)
1947 abort ();
1948
1949 replace_reg (recog_data.operand_loc[i], regnum);
1950 }
1951
1952 for (i = 0; i < n_notes; i++)
1953 if (note_kind[i] == REG_DEAD)
1954 {
1955 int regnum = get_hard_regnum (regstack, note_reg[i]);
1956
1957 if (regnum < 0)
1958 abort ();
1959
1960 replace_reg (note_loc[i], regnum);
1961 }
1962
1963 for (i = 0; i < n_clobbers; i++)
1964 {
1965 /* It's OK for a CLOBBER to reference a reg that is not live.
1966 Don't try to replace it in that case. */
1967 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
1968
1969 if (regnum >= 0)
1970 {
1971 /* Sigh - clobbers always have QImode. But replace_reg knows
1972 that these regs can't be MODE_INT and will abort. Just put
1973 the right reg there without calling replace_reg. */
1974
1975 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
1976 }
1977 }
1978
1979 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
1980
1981 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1982 if (STACK_REG_P (recog_data.operand[i]))
1983 {
1984 /* An input reg is implicitly popped if it is tied to an
1985 output, or if there is a CLOBBER for it. */
1986 int j;
1987
1988 for (j = 0; j < n_clobbers; j++)
1989 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
1990 break;
1991
1992 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
1993 {
1994 /* recog_data.operand[i] might not be at the top of stack.
1995 But that's OK, because all we need to do is pop the
1996 right number of regs off of the top of the reg-stack.
1997 record_asm_stack_regs guaranteed that all implicitly
1998 popped regs were grouped at the top of the reg-stack. */
1999
2000 CLEAR_HARD_REG_BIT (regstack->reg_set,
2001 regstack->reg[regstack->top]);
2002 regstack->top--;
2003 }
2004 }
2005
2006 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2007 Note that there isn't any need to substitute register numbers.
2008 ??? Explain why this is true. */
2009
2010 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2011 {
2012 /* See if there is an output for this hard reg. */
2013 int j;
2014
2015 for (j = 0; j < n_outputs; j++)
2016 if (STACK_REG_P (recog_data.operand[j])
2017 && REGNO (recog_data.operand[j]) == i)
2018 {
2019 regstack->reg[++regstack->top] = i;
2020 SET_HARD_REG_BIT (regstack->reg_set, i);
2021 break;
2022 }
2023 }
2024
2025 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2026 input that the asm didn't implicitly pop. If the asm didn't
2027 implicitly pop an input reg, that reg will still be live.
2028
2029 Note that we can't use find_regno_note here: the register numbers
2030 in the death notes have already been substituted. */
2031
2032 for (i = 0; i < n_outputs; i++)
2033 if (STACK_REG_P (recog_data.operand[i]))
2034 {
2035 int j;
2036
2037 for (j = 0; j < n_notes; j++)
2038 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2039 && note_kind[j] == REG_UNUSED)
2040 {
2041 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2042 EMIT_AFTER);
2043 break;
2044 }
2045 }
2046
2047 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2048 if (STACK_REG_P (recog_data.operand[i]))
2049 {
2050 int j;
2051
2052 for (j = 0; j < n_notes; j++)
2053 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2054 && note_kind[j] == REG_DEAD
2055 && TEST_HARD_REG_BIT (regstack->reg_set,
2056 REGNO (recog_data.operand[i])))
2057 {
2058 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2059 EMIT_AFTER);
2060 break;
2061 }
2062 }
2063 }
2064 \f
2065 /* Substitute stack hard reg numbers for stack virtual registers in
2066 INSN. Non-stack register numbers are not changed. REGSTACK is the
2067 current stack content. Insns may be emitted as needed to arrange the
2068 stack for the 387 based on the contents of the insn. */
2069
2070 static void
2071 subst_stack_regs (insn, regstack)
2072 rtx insn;
2073 stack regstack;
2074 {
2075 register rtx *note_link, note;
2076 register int i;
2077
2078 if (GET_CODE (insn) == CALL_INSN)
2079 {
2080 int top = regstack->top;
2081
2082 /* If there are any floating point parameters to be passed in
2083 registers for this call, make sure they are in the right
2084 order. */
2085
2086 if (top >= 0)
2087 {
2088 straighten_stack (PREV_INSN (insn), regstack);
2089
2090 /* Now mark the arguments as dead after the call. */
2091
2092 while (regstack->top >= 0)
2093 {
2094 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2095 regstack->top--;
2096 }
2097 }
2098 }
2099
2100 /* Do the actual substitution if any stack regs are mentioned.
2101 Since we only record whether entire insn mentions stack regs, and
2102 subst_stack_regs_pat only works for patterns that contain stack regs,
2103 we must check each pattern in a parallel here. A call_value_pop could
2104 fail otherwise. */
2105
2106 if (stack_regs_mentioned (insn))
2107 {
2108 int n_operands = asm_noperands (PATTERN (insn));
2109 if (n_operands >= 0)
2110 {
2111 /* This insn is an `asm' with operands. Decode the operands,
2112 decide how many are inputs, and do register substitution.
2113 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2114
2115 subst_asm_stack_regs (insn, regstack);
2116 return;
2117 }
2118
2119 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2120 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2121 {
2122 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2123 subst_stack_regs_pat (insn, regstack,
2124 XVECEXP (PATTERN (insn), 0, i));
2125 }
2126 else
2127 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2128 }
2129
2130 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2131 REG_UNUSED will already have been dealt with, so just return. */
2132
2133 if (GET_CODE (insn) == NOTE)
2134 return;
2135
2136 /* If there is a REG_UNUSED note on a stack register on this insn,
2137 the indicated reg must be popped. The REG_UNUSED note is removed,
2138 since the form of the newly emitted pop insn references the reg,
2139 making it no longer `unset'. */
2140
2141 note_link = &REG_NOTES(insn);
2142 for (note = *note_link; note; note = XEXP (note, 1))
2143 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2144 {
2145 *note_link = XEXP (note, 1);
2146 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2147 }
2148 else
2149 note_link = &XEXP (note, 1);
2150 }
2151 \f
2152 /* Change the organization of the stack so that it fits a new basic
2153 block. Some registers might have to be popped, but there can never be
2154 a register live in the new block that is not now live.
2155
2156 Insert any needed insns before or after INSN, as indicated by
2157 WHERE. OLD is the original stack layout, and NEW is the desired
2158 form. OLD is updated to reflect the code emitted, ie, it will be
2159 the same as NEW upon return.
2160
2161 This function will not preserve block_end[]. But that information
2162 is no longer needed once this has executed. */
2163
2164 static void
2165 change_stack (insn, old, new, where)
2166 rtx insn;
2167 stack old;
2168 stack new;
2169 enum emit_where where;
2170 {
2171 int reg;
2172 int update_end = 0;
2173
2174 /* We will be inserting new insns "backwards". If we are to insert
2175 after INSN, find the next insn, and insert before it. */
2176
2177 if (where == EMIT_AFTER)
2178 {
2179 if (current_block && current_block->end == insn)
2180 update_end = 1;
2181 insn = NEXT_INSN (insn);
2182 }
2183
2184 /* Pop any registers that are not needed in the new block. */
2185
2186 for (reg = old->top; reg >= 0; reg--)
2187 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2188 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2189 EMIT_BEFORE);
2190
2191 if (new->top == -2)
2192 {
2193 /* If the new block has never been processed, then it can inherit
2194 the old stack order. */
2195
2196 new->top = old->top;
2197 memcpy (new->reg, old->reg, sizeof (new->reg));
2198 }
2199 else
2200 {
2201 /* This block has been entered before, and we must match the
2202 previously selected stack order. */
2203
2204 /* By now, the only difference should be the order of the stack,
2205 not their depth or liveliness. */
2206
2207 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2208 abort ();
2209 win:
2210 if (old->top != new->top)
2211 abort ();
2212
2213 /* If the stack is not empty (new->top != -1), loop here emitting
2214 swaps until the stack is correct.
2215
2216 The worst case number of swaps emitted is N + 2, where N is the
2217 depth of the stack. In some cases, the reg at the top of
2218 stack may be correct, but swapped anyway in order to fix
2219 other regs. But since we never swap any other reg away from
2220 its correct slot, this algorithm will converge. */
2221
2222 if (new->top != -1)
2223 do
2224 {
2225 /* Swap the reg at top of stack into the position it is
2226 supposed to be in, until the correct top of stack appears. */
2227
2228 while (old->reg[old->top] != new->reg[new->top])
2229 {
2230 for (reg = new->top; reg >= 0; reg--)
2231 if (new->reg[reg] == old->reg[old->top])
2232 break;
2233
2234 if (reg == -1)
2235 abort ();
2236
2237 emit_swap_insn (insn, old,
2238 FP_MODE_REG (old->reg[reg], DFmode));
2239 }
2240
2241 /* See if any regs remain incorrect. If so, bring an
2242 incorrect reg to the top of stack, and let the while loop
2243 above fix it. */
2244
2245 for (reg = new->top; reg >= 0; reg--)
2246 if (new->reg[reg] != old->reg[reg])
2247 {
2248 emit_swap_insn (insn, old,
2249 FP_MODE_REG (old->reg[reg], DFmode));
2250 break;
2251 }
2252 } while (reg >= 0);
2253
2254 /* At this point there must be no differences. */
2255
2256 for (reg = old->top; reg >= 0; reg--)
2257 if (old->reg[reg] != new->reg[reg])
2258 abort ();
2259 }
2260
2261 if (update_end)
2262 current_block->end = PREV_INSN (insn);
2263 }
2264 \f
2265 /* Print stack configuration. */
2266
2267 static void
2268 print_stack (file, s)
2269 FILE *file;
2270 stack s;
2271 {
2272 if (! file)
2273 return;
2274
2275 if (s->top == -2)
2276 fprintf (file, "uninitialized\n");
2277 else if (s->top == -1)
2278 fprintf (file, "empty\n");
2279 else
2280 {
2281 int i;
2282 fputs ("[ ", file);
2283 for (i = 0; i <= s->top; ++i)
2284 fprintf (file, "%d ", s->reg[i]);
2285 fputs ("]\n", file);
2286 }
2287 }
2288 \f
2289 /* This function was doing life analysis. We now let the regular live
2290 code do it's job, so we only need to check some extra invariants
2291 that reg-stack expects. Primary among these being that all registers
2292 are initialized before use.
2293
2294 The function returns true when code was emitted to CFG edges and
2295 commit_edge_insertions needs to be called. */
2296
2297 static int
2298 convert_regs_entry ()
2299 {
2300 int inserted = 0, i;
2301 edge e;
2302
2303 for (i = n_basic_blocks - 1; i >= 0; --i)
2304 {
2305 basic_block block = BASIC_BLOCK (i);
2306 block_info bi = BLOCK_INFO (block);
2307 int reg;
2308
2309 /* Set current register status at last instruction `uninitialized'. */
2310 bi->stack_in.top = -2;
2311
2312 /* Copy live_at_end and live_at_start into temporaries. */
2313 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2314 {
2315 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2316 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2317 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2318 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2319 }
2320 }
2321
2322 /* Load something into each stack register live at function entry.
2323 Such live registers can be caused by uninitialized variables or
2324 functions not returning values on all paths. In order to keep
2325 the push/pop code happy, and to not scrog the register stack, we
2326 must put something in these registers. Use a QNaN.
2327
2328 Note that we are insertting converted code here. This code is
2329 never seen by the convert_regs pass. */
2330
2331 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2332 {
2333 basic_block block = e->dest;
2334 block_info bi = BLOCK_INFO (block);
2335 int reg, top = -1;
2336
2337 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2338 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2339 {
2340 rtx init;
2341
2342 bi->stack_in.reg[++top] = reg;
2343
2344 init = gen_rtx_SET (VOIDmode,
2345 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2346 nan);
2347 insert_insn_on_edge (init, e);
2348 inserted = 1;
2349 }
2350
2351 bi->stack_in.top = top;
2352 }
2353
2354 return inserted;
2355 }
2356
2357 /* Construct the desired stack for function exit. This will either
2358 be `empty', or the function return value at top-of-stack. */
2359
2360 static void
2361 convert_regs_exit ()
2362 {
2363 int value_reg_low, value_reg_high;
2364 stack output_stack;
2365 rtx retvalue;
2366
2367 retvalue = stack_result (current_function_decl);
2368 value_reg_low = value_reg_high = -1;
2369 if (retvalue)
2370 {
2371 value_reg_low = REGNO (retvalue);
2372 value_reg_high = value_reg_low
2373 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2374 }
2375
2376 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2377 if (value_reg_low == -1)
2378 output_stack->top = -1;
2379 else
2380 {
2381 int reg;
2382
2383 output_stack->top = value_reg_high - value_reg_low;
2384 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2385 {
2386 output_stack->reg[reg - value_reg_low] = reg;
2387 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2388 }
2389 }
2390 }
2391
2392 /* Convert stack register references in one block. */
2393
2394 static int
2395 convert_regs_1 (file, block)
2396 FILE *file;
2397 basic_block block;
2398 {
2399 struct stack_def regstack, tmpstack;
2400 block_info bi = BLOCK_INFO (block);
2401 int inserted, reg;
2402 rtx insn, next;
2403 edge e;
2404
2405 current_block = block;
2406
2407 if (file)
2408 {
2409 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2410 print_stack (file, &bi->stack_in);
2411 }
2412
2413 /* Process all insns in this block. Keep track of NEXT so that we
2414 don't process insns emitted while substituting in INSN. */
2415 next = block->head;
2416 regstack = bi->stack_in;
2417 do
2418 {
2419 insn = next;
2420 next = NEXT_INSN (insn);
2421
2422 /* Ensure we have not missed a block boundary. */
2423 if (next == NULL)
2424 abort ();
2425 if (insn == block->end)
2426 next = NULL;
2427
2428 /* Don't bother processing unless there is a stack reg
2429 mentioned or if it's a CALL_INSN. */
2430 if (stack_regs_mentioned (insn)
2431 || GET_CODE (insn) == CALL_INSN)
2432 {
2433 if (file)
2434 {
2435 fprintf (file, " insn %d input stack: ",
2436 INSN_UID (insn));
2437 print_stack (file, &regstack);
2438 }
2439 subst_stack_regs (insn, &regstack);
2440 }
2441 }
2442 while (next);
2443
2444 if (file)
2445 {
2446 fprintf (file, "Expected live registers [");
2447 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2448 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2449 fprintf (file, " %d", reg);
2450 fprintf (file, " ]\nOutput stack: ");
2451 print_stack (file, &regstack);
2452 }
2453
2454 insn = block->end;
2455 if (GET_CODE (insn) == JUMP_INSN)
2456 insn = PREV_INSN (insn);
2457
2458 /* If the function is declared to return a value, but it returns one
2459 in only some cases, some registers might come live here. Emit
2460 necessary moves for them. */
2461
2462 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2463 {
2464 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2465 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2466 {
2467 rtx set;
2468
2469 if (file)
2470 {
2471 fprintf (file, "Emitting insn initializing reg %d\n",
2472 reg);
2473 }
2474
2475 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2476 nan);
2477 insn = emit_block_insn_after (set, insn, block);
2478 subst_stack_regs (insn, &regstack);
2479 }
2480 }
2481
2482 /* Something failed if the stack lives don't match. */
2483 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2484 abort ();
2485 win:
2486
2487 /* Adjust the stack of this block on exit to match the stack of the
2488 target block, or copy stack info into the stack of the successor
2489 of the successor hasn't been processed yet. */
2490 inserted = 0;
2491 for (e = block->succ; e ; e = e->succ_next)
2492 {
2493 basic_block target = e->dest;
2494 stack target_stack = &BLOCK_INFO (target)->stack_in;
2495
2496 if (file)
2497 fprintf (file, "Edge to block %d: ", target->index);
2498
2499 if (target_stack->top == -2)
2500 {
2501 /* The target block hasn't had a stack order selected.
2502 We need merely ensure that no pops are needed. */
2503 for (reg = regstack.top; reg >= 0; --reg)
2504 if (! TEST_HARD_REG_BIT (target_stack->reg_set,
2505 regstack.reg[reg]))
2506 break;
2507
2508 if (reg == -1)
2509 {
2510 if (file)
2511 fprintf (file, "new block; copying stack position\n");
2512
2513 /* change_stack kills values in regstack. */
2514 tmpstack = regstack;
2515
2516 change_stack (block->end, &tmpstack,
2517 target_stack, EMIT_AFTER);
2518 continue;
2519 }
2520
2521 if (file)
2522 fprintf (file, "new block; pops needed\n");
2523 }
2524 else
2525 {
2526 if (target_stack->top == regstack.top)
2527 {
2528 for (reg = target_stack->top; reg >= 0; --reg)
2529 if (target_stack->reg[reg] != regstack.reg[reg])
2530 break;
2531
2532 if (reg == -1)
2533 {
2534 if (file)
2535 fprintf (file, "no changes needed\n");
2536 continue;
2537 }
2538 }
2539
2540 if (file)
2541 {
2542 fprintf (file, "correcting stack to ");
2543 print_stack (file, target_stack);
2544 }
2545 }
2546
2547 /* Care for EH edges specially. The normal return path may return
2548 a value in st(0), but the EH path will not, and there's no need
2549 to add popping code to the edge. */
2550 if (e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
2551 {
2552 /* Assert that the lifetimes are as we expect -- one value
2553 live at st(0) on the end of the source block, and no
2554 values live at the beginning of the destination block. */
2555 HARD_REG_SET tmp;
2556
2557 CLEAR_HARD_REG_SET (tmp);
2558 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2559 abort();
2560 eh1:
2561
2562 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2563 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2564 abort();
2565 eh2:
2566
2567 target_stack->top = -1;
2568 }
2569
2570 /* It is better to output directly to the end of the block
2571 instead of to the edge, because emit_swap can do minimal
2572 insn scheduling. We can do this when there is only one
2573 edge out, and it is not abnormal. */
2574 else if (block->succ->succ_next == NULL
2575 && ! (e->flags & EDGE_ABNORMAL))
2576 {
2577 /* change_stack kills values in regstack. */
2578 tmpstack = regstack;
2579
2580 change_stack (block->end, &tmpstack, target_stack,
2581 (GET_CODE (block->end) == JUMP_INSN
2582 ? EMIT_BEFORE : EMIT_AFTER));
2583 }
2584 else
2585 {
2586 rtx seq, after;
2587
2588 /* We don't support abnormal edges. Global takes care to
2589 avoid any live register across them, so we should never
2590 have to insert instructions on such edges. */
2591 if (e->flags & EDGE_ABNORMAL)
2592 abort ();
2593
2594 current_block = NULL;
2595 start_sequence ();
2596
2597 /* ??? change_stack needs some point to emit insns after.
2598 Also needed to keep gen_sequence from returning a
2599 pattern as opposed to a sequence, which would lose
2600 REG_DEAD notes. */
2601 after = emit_note (NULL, NOTE_INSN_DELETED);
2602
2603 tmpstack = regstack;
2604 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2605
2606 seq = gen_sequence ();
2607 end_sequence ();
2608
2609 insert_insn_on_edge (seq, e);
2610 inserted = 1;
2611 current_block = block;
2612 }
2613 }
2614
2615 return inserted;
2616 }
2617
2618 /* Convert registers in all blocks reachable from BLOCK. */
2619
2620 static int
2621 convert_regs_2 (file, block)
2622 FILE *file;
2623 basic_block block;
2624 {
2625 basic_block *stack, *sp;
2626 int inserted;
2627
2628 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2629 sp = stack;
2630
2631 *sp++ = block;
2632 BLOCK_INFO (block)->done = 1;
2633
2634 inserted = 0;
2635 do
2636 {
2637 edge e;
2638
2639 block = *--sp;
2640 inserted |= convert_regs_1 (file, block);
2641
2642 for (e = block->succ; e ; e = e->succ_next)
2643 if (! BLOCK_INFO (e->dest)->done)
2644 {
2645 *sp++ = e->dest;
2646 BLOCK_INFO (e->dest)->done = 1;
2647 }
2648 }
2649 while (sp != stack);
2650
2651 return inserted;
2652 }
2653
2654 /* Traverse all basic blocks in a function, converting the register
2655 references in each insn from the "flat" register file that gcc uses,
2656 to the stack-like registers the 387 uses. */
2657
2658 static int
2659 convert_regs (file)
2660 FILE *file;
2661 {
2662 int inserted, i;
2663 edge e;
2664
2665 /* Initialize uninitialized registers on function entry. */
2666 inserted = convert_regs_entry ();
2667
2668 /* Construct the desired stack for function exit. */
2669 convert_regs_exit ();
2670 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2671
2672 /* ??? Future: process inner loops first, and give them arbitrary
2673 initial stacks which emit_swap_insn can modify. This ought to
2674 prevent double fxch that aften appears at the head of a loop. */
2675
2676 /* Process all blocks reachable from all entry points. */
2677 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2678 inserted |= convert_regs_2 (file, e->dest);
2679
2680 /* ??? Process all unreachable blocks. Though there's no excuse
2681 for keeping these even when not optimizing. */
2682 for (i = 0; i < n_basic_blocks; ++i)
2683 {
2684 basic_block b = BASIC_BLOCK (i);
2685 block_info bi = BLOCK_INFO (b);
2686
2687 if (! bi->done)
2688 {
2689 int reg;
2690
2691 /* Create an arbitrary input stack. */
2692 bi->stack_in.top = -1;
2693 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2694 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2695 bi->stack_in.reg[++bi->stack_in.top] = reg;
2696
2697 inserted |= convert_regs_2 (file, b);
2698 }
2699 }
2700
2701 if (inserted)
2702 commit_edge_insertions ();
2703
2704 if (file)
2705 fputc ('\n', file);
2706
2707 return inserted;
2708 }
2709 #endif /* STACK_REGS */