Use base inequality for some vector alias checks
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992-2017 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
22
23 * The form of the input:
24
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
34
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
42
43 * The form of the output:
44
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
50
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
53
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
57
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
60
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
64
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
68 stack.
69
70 * Methodology:
71
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
75
76 * asm_operands:
77
78 There are several rules on the usage of stack-like regs in
79 asm_operands insns. These rules apply only to the operands that are
80 stack-like regs:
81
82 1. Given a set of input regs that die in an asm_operands, it is
83 necessary to know which are implicitly popped by the asm, and
84 which must be explicitly popped by gcc.
85
86 An input reg that is implicitly popped by the asm must be
87 explicitly clobbered, unless it is constrained to match an
88 output operand.
89
90 2. For any input reg that is implicitly popped by an asm, it is
91 necessary to know how to adjust the stack to compensate for the pop.
92 If any non-popped input is closer to the top of the reg-stack than
93 the implicitly popped reg, it would not be possible to know what the
94 stack looked like - it's not clear how the rest of the stack "slides
95 up".
96
97 All implicitly popped input regs must be closer to the top of
98 the reg-stack than any input that is not implicitly popped.
99
100 All explicitly referenced input operands may not "skip" a reg.
101 Otherwise we can have holes in the stack.
102
103 3. It is possible that if an input dies in an insn, reload might
104 use the input reg for an output reload. Consider this example:
105
106 asm ("foo" : "=t" (a) : "f" (b));
107
108 This asm says that input B is not popped by the asm, and that
109 the asm pushes a result onto the reg-stack, i.e., the stack is one
110 deeper after the asm than it was before. But, it is possible that
111 reload will think that it can use the same reg for both the input and
112 the output, if input B dies in this insn.
113
114 If any input operand uses the "f" constraint, all output reg
115 constraints must use the "&" earlyclobber.
116
117 The asm above would be written as
118
119 asm ("foo" : "=&t" (a) : "f" (b));
120
121 4. Some operands need to be in particular places on the stack. All
122 output operands fall in this category - there is no other way to
123 know which regs the outputs appear in unless the user indicates
124 this in the constraints.
125
126 Output operands must specifically indicate which reg an output
127 appears in after an asm. "=f" is not allowed: the operand
128 constraints must select a class with a single reg.
129
130 5. Output operands may not be "inserted" between existing stack regs.
131 Since no 387 opcode uses a read/write operand, all output operands
132 are dead before the asm_operands, and are pushed by the asm_operands.
133 It makes no sense to push anywhere but the top of the reg-stack.
134
135 Output operands must start at the top of the reg-stack: output
136 operands may not "skip" a reg.
137
138 6. Some asm statements may need extra stack space for internal
139 calculations. This can be guaranteed by clobbering stack registers
140 unrelated to the inputs and outputs.
141
142 Here are a couple of reasonable asms to want to write. This asm
143 takes one input, which is internally popped, and produces two outputs.
144
145 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146
147 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
148 and replaces them with one output. The user must code the "st(1)"
149 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150
151 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
152
153 */
154 \f
155 #include "config.h"
156 #include "system.h"
157 #include "coretypes.h"
158 #include "backend.h"
159 #include "target.h"
160 #include "rtl.h"
161 #include "tree.h"
162 #include "df.h"
163 #include "insn-config.h"
164 #include "memmodel.h"
165 #include "emit-rtl.h" /* FIXME: Can go away once crtl is moved to rtl.h. */
166 #include "recog.h"
167 #include "varasm.h"
168 #include "rtl-error.h"
169 #include "cfgrtl.h"
170 #include "cfganal.h"
171 #include "cfgbuild.h"
172 #include "cfgcleanup.h"
173 #include "reload.h"
174 #include "tree-pass.h"
175 #include "rtl-iter.h"
176
177 #ifdef STACK_REGS
178
179 /* We use this array to cache info about insns, because otherwise we
180 spend too much time in stack_regs_mentioned_p.
181
182 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
183 the insn uses stack registers, two indicates the insn does not use
184 stack registers. */
185 static vec<char> stack_regs_mentioned_data;
186
187 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
188
189 int regstack_completed = 0;
190
191 /* This is the basic stack record. TOP is an index into REG[] such
192 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
193
194 If TOP is -2, REG[] is not yet initialized. Stack initialization
195 consists of placing each live reg in array `reg' and setting `top'
196 appropriately.
197
198 REG_SET indicates which registers are live. */
199
200 typedef struct stack_def
201 {
202 int top; /* index to top stack element */
203 HARD_REG_SET reg_set; /* set of live registers */
204 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
205 } *stack_ptr;
206
207 /* This is used to carry information about basic blocks. It is
208 attached to the AUX field of the standard CFG block. */
209
210 typedef struct block_info_def
211 {
212 struct stack_def stack_in; /* Input stack configuration. */
213 struct stack_def stack_out; /* Output stack configuration. */
214 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
215 int done; /* True if block already converted. */
216 int predecessors; /* Number of predecessors that need
217 to be visited. */
218 } *block_info;
219
220 #define BLOCK_INFO(B) ((block_info) (B)->aux)
221
222 /* Passed to change_stack to indicate where to emit insns. */
223 enum emit_where
224 {
225 EMIT_AFTER,
226 EMIT_BEFORE
227 };
228
229 /* The block we're currently working on. */
230 static basic_block current_block;
231
232 /* In the current_block, whether we're processing the first register
233 stack or call instruction, i.e. the regstack is currently the
234 same as BLOCK_INFO(current_block)->stack_in. */
235 static bool starting_stack_p;
236
237 /* This is the register file for all register after conversion. */
238 static rtx
239 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
240
241 #define FP_MODE_REG(regno,mode) \
242 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
243
244 /* Used to initialize uninitialized registers. */
245 static rtx not_a_num;
246
247 /* Forward declarations */
248
249 static int stack_regs_mentioned_p (const_rtx pat);
250 static void pop_stack (stack_ptr, int);
251 static rtx *get_true_reg (rtx *);
252
253 static int check_asm_stack_operands (rtx_insn *);
254 static void get_asm_operands_in_out (rtx, int *, int *);
255 static rtx stack_result (tree);
256 static void replace_reg (rtx *, int);
257 static void remove_regno_note (rtx_insn *, enum reg_note, unsigned int);
258 static int get_hard_regnum (stack_ptr, rtx);
259 static rtx_insn *emit_pop_insn (rtx_insn *, stack_ptr, rtx, enum emit_where);
260 static void swap_to_top (rtx_insn *, stack_ptr, rtx, rtx);
261 static bool move_for_stack_reg (rtx_insn *, stack_ptr, rtx);
262 static bool move_nan_for_stack_reg (rtx_insn *, stack_ptr, rtx);
263 static int swap_rtx_condition_1 (rtx);
264 static int swap_rtx_condition (rtx_insn *);
265 static void compare_for_stack_reg (rtx_insn *, stack_ptr, rtx);
266 static bool subst_stack_regs_pat (rtx_insn *, stack_ptr, rtx);
267 static void subst_asm_stack_regs (rtx_insn *, stack_ptr);
268 static bool subst_stack_regs (rtx_insn *, stack_ptr);
269 static void change_stack (rtx_insn *, stack_ptr, stack_ptr, enum emit_where);
270 static void print_stack (FILE *, stack_ptr);
271 static rtx_insn *next_flags_user (rtx_insn *);
272 \f
273 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
274
275 static int
276 stack_regs_mentioned_p (const_rtx pat)
277 {
278 const char *fmt;
279 int i;
280
281 if (STACK_REG_P (pat))
282 return 1;
283
284 fmt = GET_RTX_FORMAT (GET_CODE (pat));
285 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
286 {
287 if (fmt[i] == 'E')
288 {
289 int j;
290
291 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
292 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
293 return 1;
294 }
295 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
296 return 1;
297 }
298
299 return 0;
300 }
301
302 /* Return nonzero if INSN mentions stacked registers, else return zero. */
303
304 int
305 stack_regs_mentioned (const_rtx insn)
306 {
307 unsigned int uid, max;
308 int test;
309
310 if (! INSN_P (insn) || !stack_regs_mentioned_data.exists ())
311 return 0;
312
313 uid = INSN_UID (insn);
314 max = stack_regs_mentioned_data.length ();
315 if (uid >= max)
316 {
317 /* Allocate some extra size to avoid too many reallocs, but
318 do not grow too quickly. */
319 max = uid + uid / 20 + 1;
320 stack_regs_mentioned_data.safe_grow_cleared (max);
321 }
322
323 test = stack_regs_mentioned_data[uid];
324 if (test == 0)
325 {
326 /* This insn has yet to be examined. Do so now. */
327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
328 stack_regs_mentioned_data[uid] = test;
329 }
330
331 return test == 1;
332 }
333 \f
334 static rtx ix86_flags_rtx;
335
336 static rtx_insn *
337 next_flags_user (rtx_insn *insn)
338 {
339 /* Search forward looking for the first use of this value.
340 Stop at block boundaries. */
341
342 while (insn != BB_END (current_block))
343 {
344 insn = NEXT_INSN (insn);
345
346 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
347 return insn;
348
349 if (CALL_P (insn))
350 return NULL;
351 }
352 return NULL;
353 }
354 \f
355 /* Reorganize the stack into ascending numbers, before this insn. */
356
357 static void
358 straighten_stack (rtx_insn *insn, stack_ptr regstack)
359 {
360 struct stack_def temp_stack;
361 int top;
362
363 /* If there is only a single register on the stack, then the stack is
364 already in increasing order and no reorganization is needed.
365
366 Similarly if the stack is empty. */
367 if (regstack->top <= 0)
368 return;
369
370 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
371
372 for (top = temp_stack.top = regstack->top; top >= 0; top--)
373 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
374
375 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
376 }
377
378 /* Pop a register from the stack. */
379
380 static void
381 pop_stack (stack_ptr regstack, int regno)
382 {
383 int top = regstack->top;
384
385 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
386 regstack->top--;
387 /* If regno was not at the top of stack then adjust stack. */
388 if (regstack->reg [top] != regno)
389 {
390 int i;
391 for (i = regstack->top; i >= 0; i--)
392 if (regstack->reg [i] == regno)
393 {
394 int j;
395 for (j = i; j < top; j++)
396 regstack->reg [j] = regstack->reg [j + 1];
397 break;
398 }
399 }
400 }
401 \f
402 /* Return a pointer to the REG expression within PAT. If PAT is not a
403 REG, possible enclosed by a conversion rtx, return the inner part of
404 PAT that stopped the search. */
405
406 static rtx *
407 get_true_reg (rtx *pat)
408 {
409 for (;;)
410 switch (GET_CODE (*pat))
411 {
412 case SUBREG:
413 /* Eliminate FP subregister accesses in favor of the
414 actual FP register in use. */
415 {
416 rtx subreg;
417 if (STACK_REG_P (subreg = SUBREG_REG (*pat)))
418 {
419 int regno_off = subreg_regno_offset (REGNO (subreg),
420 GET_MODE (subreg),
421 SUBREG_BYTE (*pat),
422 GET_MODE (*pat));
423 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
424 GET_MODE (subreg));
425 return pat;
426 }
427 pat = &XEXP (*pat, 0);
428 break;
429 }
430 case FLOAT:
431 case FIX:
432 case FLOAT_EXTEND:
433 pat = &XEXP (*pat, 0);
434 break;
435
436 case UNSPEC:
437 if (XINT (*pat, 1) == UNSPEC_TRUNC_NOOP
438 || XINT (*pat, 1) == UNSPEC_FILD_ATOMIC)
439 pat = &XVECEXP (*pat, 0, 0);
440 return pat;
441
442 case FLOAT_TRUNCATE:
443 if (!flag_unsafe_math_optimizations)
444 return pat;
445 pat = &XEXP (*pat, 0);
446 break;
447
448 default:
449 return pat;
450 }
451 }
452 \f
453 /* Set if we find any malformed asms in a block. */
454 static bool any_malformed_asm;
455
456 /* There are many rules that an asm statement for stack-like regs must
457 follow. Those rules are explained at the top of this file: the rule
458 numbers below refer to that explanation. */
459
460 static int
461 check_asm_stack_operands (rtx_insn *insn)
462 {
463 int i;
464 int n_clobbers;
465 int malformed_asm = 0;
466 rtx body = PATTERN (insn);
467
468 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
469 char implicitly_dies[FIRST_PSEUDO_REGISTER];
470 char explicitly_used[FIRST_PSEUDO_REGISTER];
471
472 rtx *clobber_reg = 0;
473 int n_inputs, n_outputs;
474
475 /* Find out what the constraints require. If no constraint
476 alternative matches, this asm is malformed. */
477 extract_constrain_insn (insn);
478
479 preprocess_constraints (insn);
480
481 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
482
483 if (which_alternative < 0)
484 {
485 malformed_asm = 1;
486 /* Avoid further trouble with this insn. */
487 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
488 return 0;
489 }
490 const operand_alternative *op_alt = which_op_alt ();
491
492 /* Strip SUBREGs here to make the following code simpler. */
493 for (i = 0; i < recog_data.n_operands; i++)
494 if (GET_CODE (recog_data.operand[i]) == SUBREG
495 && REG_P (SUBREG_REG (recog_data.operand[i])))
496 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
497
498 /* Set up CLOBBER_REG. */
499
500 n_clobbers = 0;
501
502 if (GET_CODE (body) == PARALLEL)
503 {
504 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
505
506 for (i = 0; i < XVECLEN (body, 0); i++)
507 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
508 {
509 rtx clobber = XVECEXP (body, 0, i);
510 rtx reg = XEXP (clobber, 0);
511
512 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
513 reg = SUBREG_REG (reg);
514
515 if (STACK_REG_P (reg))
516 {
517 clobber_reg[n_clobbers] = reg;
518 n_clobbers++;
519 }
520 }
521 }
522
523 /* Enforce rule #4: Output operands must specifically indicate which
524 reg an output appears in after an asm. "=f" is not allowed: the
525 operand constraints must select a class with a single reg.
526
527 Also enforce rule #5: Output operands must start at the top of
528 the reg-stack: output operands may not "skip" a reg. */
529
530 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
531 for (i = 0; i < n_outputs; i++)
532 if (STACK_REG_P (recog_data.operand[i]))
533 {
534 if (reg_class_size[(int) op_alt[i].cl] != 1)
535 {
536 error_for_asm (insn, "output constraint %d must specify a single register", i);
537 malformed_asm = 1;
538 }
539 else
540 {
541 int j;
542
543 for (j = 0; j < n_clobbers; j++)
544 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
545 {
546 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
547 i, reg_names [REGNO (clobber_reg[j])]);
548 malformed_asm = 1;
549 break;
550 }
551 if (j == n_clobbers)
552 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
553 }
554 }
555
556
557 /* Search for first non-popped reg. */
558 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
559 if (! reg_used_as_output[i])
560 break;
561
562 /* If there are any other popped regs, that's an error. */
563 for (; i < LAST_STACK_REG + 1; i++)
564 if (reg_used_as_output[i])
565 break;
566
567 if (i != LAST_STACK_REG + 1)
568 {
569 error_for_asm (insn, "output regs must be grouped at top of stack");
570 malformed_asm = 1;
571 }
572
573 /* Enforce rule #2: All implicitly popped input regs must be closer
574 to the top of the reg-stack than any input that is not implicitly
575 popped. */
576
577 memset (implicitly_dies, 0, sizeof (implicitly_dies));
578 memset (explicitly_used, 0, sizeof (explicitly_used));
579 for (i = n_outputs; i < n_outputs + n_inputs; i++)
580 if (STACK_REG_P (recog_data.operand[i]))
581 {
582 /* An input reg is implicitly popped if it is tied to an
583 output, or if there is a CLOBBER for it. */
584 int j;
585
586 for (j = 0; j < n_clobbers; j++)
587 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
588 break;
589
590 if (j < n_clobbers || op_alt[i].matches >= 0)
591 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
592 else if (reg_class_size[(int) op_alt[i].cl] == 1)
593 explicitly_used[REGNO (recog_data.operand[i])] = 1;
594 }
595
596 /* Search for first non-popped reg. */
597 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
598 if (! implicitly_dies[i])
599 break;
600
601 /* If there are any other popped regs, that's an error. */
602 for (; i < LAST_STACK_REG + 1; i++)
603 if (implicitly_dies[i])
604 break;
605
606 if (i != LAST_STACK_REG + 1)
607 {
608 error_for_asm (insn,
609 "implicitly popped regs must be grouped at top of stack");
610 malformed_asm = 1;
611 }
612
613 /* Search for first not-explicitly used reg. */
614 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
615 if (! implicitly_dies[i] && ! explicitly_used[i])
616 break;
617
618 /* If there are any other explicitly used regs, that's an error. */
619 for (; i < LAST_STACK_REG + 1; i++)
620 if (explicitly_used[i])
621 break;
622
623 if (i != LAST_STACK_REG + 1)
624 {
625 error_for_asm (insn,
626 "explicitly used regs must be grouped at top of stack");
627 malformed_asm = 1;
628 }
629
630 /* Enforce rule #3: If any input operand uses the "f" constraint, all
631 output constraints must use the "&" earlyclobber.
632
633 ??? Detect this more deterministically by having constrain_asm_operands
634 record any earlyclobber. */
635
636 for (i = n_outputs; i < n_outputs + n_inputs; i++)
637 if (STACK_REG_P (recog_data.operand[i]) && op_alt[i].matches == -1)
638 {
639 int j;
640
641 for (j = 0; j < n_outputs; j++)
642 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
643 {
644 error_for_asm (insn,
645 "output operand %d must use %<&%> constraint", j);
646 malformed_asm = 1;
647 }
648 }
649
650 if (malformed_asm)
651 {
652 /* Avoid further trouble with this insn. */
653 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
654 any_malformed_asm = true;
655 return 0;
656 }
657
658 return 1;
659 }
660 \f
661 /* Calculate the number of inputs and outputs in BODY, an
662 asm_operands. N_OPERANDS is the total number of operands, and
663 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
664 placed. */
665
666 static void
667 get_asm_operands_in_out (rtx body, int *pout, int *pin)
668 {
669 rtx asmop = extract_asm_operands (body);
670
671 *pin = ASM_OPERANDS_INPUT_LENGTH (asmop);
672 *pout = (recog_data.n_operands
673 - ASM_OPERANDS_INPUT_LENGTH (asmop)
674 - ASM_OPERANDS_LABEL_LENGTH (asmop));
675 }
676
677 /* If current function returns its result in an fp stack register,
678 return the REG. Otherwise, return 0. */
679
680 static rtx
681 stack_result (tree decl)
682 {
683 rtx result;
684
685 /* If the value is supposed to be returned in memory, then clearly
686 it is not returned in a stack register. */
687 if (aggregate_value_p (DECL_RESULT (decl), decl))
688 return 0;
689
690 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
691 if (result != 0)
692 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
693 decl, true);
694
695 return result != 0 && STACK_REG_P (result) ? result : 0;
696 }
697 \f
698
699 /*
700 * This section deals with stack register substitution, and forms the second
701 * pass over the RTL.
702 */
703
704 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
705 the desired hard REGNO. */
706
707 static void
708 replace_reg (rtx *reg, int regno)
709 {
710 gcc_assert (IN_RANGE (regno, FIRST_STACK_REG, LAST_STACK_REG));
711 gcc_assert (STACK_REG_P (*reg));
712
713 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
714 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
715
716 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
717 }
718
719 /* Remove a note of type NOTE, which must be found, for register
720 number REGNO from INSN. Remove only one such note. */
721
722 static void
723 remove_regno_note (rtx_insn *insn, enum reg_note note, unsigned int regno)
724 {
725 rtx *note_link, this_rtx;
726
727 note_link = &REG_NOTES (insn);
728 for (this_rtx = *note_link; this_rtx; this_rtx = XEXP (this_rtx, 1))
729 if (REG_NOTE_KIND (this_rtx) == note
730 && REG_P (XEXP (this_rtx, 0)) && REGNO (XEXP (this_rtx, 0)) == regno)
731 {
732 *note_link = XEXP (this_rtx, 1);
733 return;
734 }
735 else
736 note_link = &XEXP (this_rtx, 1);
737
738 gcc_unreachable ();
739 }
740
741 /* Find the hard register number of virtual register REG in REGSTACK.
742 The hard register number is relative to the top of the stack. -1 is
743 returned if the register is not found. */
744
745 static int
746 get_hard_regnum (stack_ptr regstack, rtx reg)
747 {
748 int i;
749
750 gcc_assert (STACK_REG_P (reg));
751
752 for (i = regstack->top; i >= 0; i--)
753 if (regstack->reg[i] == REGNO (reg))
754 break;
755
756 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
757 }
758 \f
759 /* Emit an insn to pop virtual register REG before or after INSN.
760 REGSTACK is the stack state after INSN and is updated to reflect this
761 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
762 is represented as a SET whose destination is the register to be popped
763 and source is the top of stack. A death note for the top of stack
764 cases the movdf pattern to pop. */
765
766 static rtx_insn *
767 emit_pop_insn (rtx_insn *insn, stack_ptr regstack, rtx reg, enum emit_where where)
768 {
769 rtx_insn *pop_insn;
770 rtx pop_rtx;
771 int hard_regno;
772
773 /* For complex types take care to pop both halves. These may survive in
774 CLOBBER and USE expressions. */
775 if (COMPLEX_MODE_P (GET_MODE (reg)))
776 {
777 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
778 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
779
780 pop_insn = NULL;
781 if (get_hard_regnum (regstack, reg1) >= 0)
782 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
783 if (get_hard_regnum (regstack, reg2) >= 0)
784 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
785 gcc_assert (pop_insn);
786 return pop_insn;
787 }
788
789 hard_regno = get_hard_regnum (regstack, reg);
790
791 gcc_assert (hard_regno >= FIRST_STACK_REG);
792
793 pop_rtx = gen_rtx_SET (FP_MODE_REG (hard_regno, DFmode),
794 FP_MODE_REG (FIRST_STACK_REG, DFmode));
795
796 if (where == EMIT_AFTER)
797 pop_insn = emit_insn_after (pop_rtx, insn);
798 else
799 pop_insn = emit_insn_before (pop_rtx, insn);
800
801 add_reg_note (pop_insn, REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode));
802
803 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
804 = regstack->reg[regstack->top];
805 regstack->top -= 1;
806 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
807
808 return pop_insn;
809 }
810 \f
811 /* Emit an insn before or after INSN to swap virtual register REG with
812 the top of stack. REGSTACK is the stack state before the swap, and
813 is updated to reflect the swap. A swap insn is represented as a
814 PARALLEL of two patterns: each pattern moves one reg to the other.
815
816 If REG is already at the top of the stack, no insn is emitted. */
817
818 static void
819 emit_swap_insn (rtx_insn *insn, stack_ptr regstack, rtx reg)
820 {
821 int hard_regno;
822 rtx swap_rtx;
823 int other_reg; /* swap regno temps */
824 rtx_insn *i1; /* the stack-reg insn prior to INSN */
825 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
826
827 hard_regno = get_hard_regnum (regstack, reg);
828
829 if (hard_regno == FIRST_STACK_REG)
830 return;
831 if (hard_regno == -1)
832 {
833 /* Something failed if the register wasn't on the stack. If we had
834 malformed asms, we zapped the instruction itself, but that didn't
835 produce the same pattern of register sets as before. To prevent
836 further failure, adjust REGSTACK to include REG at TOP. */
837 gcc_assert (any_malformed_asm);
838 regstack->reg[++regstack->top] = REGNO (reg);
839 return;
840 }
841 gcc_assert (hard_regno >= FIRST_STACK_REG);
842
843 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
844 std::swap (regstack->reg[regstack->top], regstack->reg[other_reg]);
845
846 /* Find the previous insn involving stack regs, but don't pass a
847 block boundary. */
848 i1 = NULL;
849 if (current_block && insn != BB_HEAD (current_block))
850 {
851 rtx_insn *tmp = PREV_INSN (insn);
852 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
853 while (tmp != limit)
854 {
855 if (LABEL_P (tmp)
856 || CALL_P (tmp)
857 || NOTE_INSN_BASIC_BLOCK_P (tmp)
858 || (NONJUMP_INSN_P (tmp)
859 && stack_regs_mentioned (tmp)))
860 {
861 i1 = tmp;
862 break;
863 }
864 tmp = PREV_INSN (tmp);
865 }
866 }
867
868 if (i1 != NULL_RTX
869 && (i1set = single_set (i1)) != NULL_RTX)
870 {
871 rtx i1src = *get_true_reg (&SET_SRC (i1set));
872 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
873
874 /* If the previous register stack push was from the reg we are to
875 swap with, omit the swap. */
876
877 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
878 && REG_P (i1src)
879 && REGNO (i1src) == (unsigned) hard_regno - 1
880 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
881 return;
882
883 /* If the previous insn wrote to the reg we are to swap with,
884 omit the swap. */
885
886 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
887 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
888 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
889 return;
890
891 /* Instead of
892 fld a
893 fld b
894 fxch %st(1)
895 just use
896 fld b
897 fld a
898 if possible. Similarly for fld1, fldz, fldpi etc. instead of any
899 of the loads or for float extension from memory. */
900
901 i1src = SET_SRC (i1set);
902 if (GET_CODE (i1src) == FLOAT_EXTEND)
903 i1src = XEXP (i1src, 0);
904 if (REG_P (i1dest)
905 && REGNO (i1dest) == FIRST_STACK_REG
906 && (MEM_P (i1src) || GET_CODE (i1src) == CONST_DOUBLE)
907 && !side_effects_p (i1src)
908 && hard_regno == FIRST_STACK_REG + 1
909 && i1 != BB_HEAD (current_block))
910 {
911 /* i1 is the last insn that involves stack regs before insn, and
912 is known to be a load without other side-effects, i.e. fld b
913 in the above comment. */
914 rtx_insn *i2 = NULL;
915 rtx i2set;
916 rtx_insn *tmp = PREV_INSN (i1);
917 rtx_insn *limit = PREV_INSN (BB_HEAD (current_block));
918 /* Find the previous insn involving stack regs, but don't pass a
919 block boundary. */
920 while (tmp != limit)
921 {
922 if (LABEL_P (tmp)
923 || CALL_P (tmp)
924 || NOTE_INSN_BASIC_BLOCK_P (tmp)
925 || (NONJUMP_INSN_P (tmp)
926 && stack_regs_mentioned (tmp)))
927 {
928 i2 = tmp;
929 break;
930 }
931 tmp = PREV_INSN (tmp);
932 }
933 if (i2 != NULL_RTX
934 && (i2set = single_set (i2)) != NULL_RTX)
935 {
936 rtx i2dest = *get_true_reg (&SET_DEST (i2set));
937 rtx i2src = SET_SRC (i2set);
938 if (GET_CODE (i2src) == FLOAT_EXTEND)
939 i2src = XEXP (i2src, 0);
940 /* If the last two insns before insn that involve
941 stack regs are loads, where the latter (i1)
942 pushes onto the register stack and thus
943 moves the value from the first load (i2) from
944 %st to %st(1), consider swapping them. */
945 if (REG_P (i2dest)
946 && REGNO (i2dest) == FIRST_STACK_REG
947 && (MEM_P (i2src) || GET_CODE (i2src) == CONST_DOUBLE)
948 /* Ensure i2 doesn't have other side-effects. */
949 && !side_effects_p (i2src)
950 /* And that the two instructions can actually be
951 swapped, i.e. there shouldn't be any stores
952 in between i2 and i1 that might alias with
953 the i1 memory, and the memory address can't
954 use registers set in between i2 and i1. */
955 && !modified_between_p (SET_SRC (i1set), i2, i1))
956 {
957 /* Move i1 (fld b above) right before i2 (fld a
958 above. */
959 remove_insn (i1);
960 SET_PREV_INSN (i1) = NULL_RTX;
961 SET_NEXT_INSN (i1) = NULL_RTX;
962 set_block_for_insn (i1, NULL);
963 emit_insn_before (i1, i2);
964 return;
965 }
966 }
967 }
968 }
969
970 /* Avoid emitting the swap if this is the first register stack insn
971 of the current_block. Instead update the current_block's stack_in
972 and let compensate edges take care of this for us. */
973 if (current_block && starting_stack_p)
974 {
975 BLOCK_INFO (current_block)->stack_in = *regstack;
976 starting_stack_p = false;
977 return;
978 }
979
980 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
981 FP_MODE_REG (FIRST_STACK_REG, XFmode));
982
983 if (i1)
984 emit_insn_after (swap_rtx, i1);
985 else if (current_block)
986 emit_insn_before (swap_rtx, BB_HEAD (current_block));
987 else
988 emit_insn_before (swap_rtx, insn);
989 }
990 \f
991 /* Emit an insns before INSN to swap virtual register SRC1 with
992 the top of stack and virtual register SRC2 with second stack
993 slot. REGSTACK is the stack state before the swaps, and
994 is updated to reflect the swaps. A swap insn is represented as a
995 PARALLEL of two patterns: each pattern moves one reg to the other.
996
997 If SRC1 and/or SRC2 are already at the right place, no swap insn
998 is emitted. */
999
1000 static void
1001 swap_to_top (rtx_insn *insn, stack_ptr regstack, rtx src1, rtx src2)
1002 {
1003 struct stack_def temp_stack;
1004 int regno, j, k;
1005
1006 temp_stack = *regstack;
1007
1008 /* Place operand 1 at the top of stack. */
1009 regno = get_hard_regnum (&temp_stack, src1);
1010 gcc_assert (regno >= 0);
1011 if (regno != FIRST_STACK_REG)
1012 {
1013 k = temp_stack.top - (regno - FIRST_STACK_REG);
1014 j = temp_stack.top;
1015
1016 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
1017 }
1018
1019 /* Place operand 2 next on the stack. */
1020 regno = get_hard_regnum (&temp_stack, src2);
1021 gcc_assert (regno >= 0);
1022 if (regno != FIRST_STACK_REG + 1)
1023 {
1024 k = temp_stack.top - (regno - FIRST_STACK_REG);
1025 j = temp_stack.top - 1;
1026
1027 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
1028 }
1029
1030 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1031 }
1032 \f
1033 /* Handle a move to or from a stack register in PAT, which is in INSN.
1034 REGSTACK is the current stack. Return whether a control flow insn
1035 was deleted in the process. */
1036
1037 static bool
1038 move_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat)
1039 {
1040 rtx *psrc = get_true_reg (&SET_SRC (pat));
1041 rtx *pdest = get_true_reg (&SET_DEST (pat));
1042 rtx src, dest;
1043 rtx note;
1044 bool control_flow_insn_deleted = false;
1045
1046 src = *psrc; dest = *pdest;
1047
1048 if (STACK_REG_P (src) && STACK_REG_P (dest))
1049 {
1050 /* Write from one stack reg to another. If SRC dies here, then
1051 just change the register mapping and delete the insn. */
1052
1053 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1054 if (note)
1055 {
1056 int i;
1057
1058 /* If this is a no-op move, there must not be a REG_DEAD note. */
1059 gcc_assert (REGNO (src) != REGNO (dest));
1060
1061 for (i = regstack->top; i >= 0; i--)
1062 if (regstack->reg[i] == REGNO (src))
1063 break;
1064
1065 /* The destination must be dead, or life analysis is borked. */
1066 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1067
1068 /* If the source is not live, this is yet another case of
1069 uninitialized variables. Load up a NaN instead. */
1070 if (i < 0)
1071 return move_nan_for_stack_reg (insn, regstack, dest);
1072
1073 /* It is possible that the dest is unused after this insn.
1074 If so, just pop the src. */
1075
1076 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1077 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1078 else
1079 {
1080 regstack->reg[i] = REGNO (dest);
1081 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1082 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1083 }
1084
1085 control_flow_insn_deleted |= control_flow_insn_p (insn);
1086 delete_insn (insn);
1087 return control_flow_insn_deleted;
1088 }
1089
1090 /* The source reg does not die. */
1091
1092 /* If this appears to be a no-op move, delete it, or else it
1093 will confuse the machine description output patterns. But if
1094 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1095 for REG_UNUSED will not work for deleted insns. */
1096
1097 if (REGNO (src) == REGNO (dest))
1098 {
1099 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1100 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1101
1102 control_flow_insn_deleted |= control_flow_insn_p (insn);
1103 delete_insn (insn);
1104 return control_flow_insn_deleted;
1105 }
1106
1107 /* The destination ought to be dead. */
1108 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1109
1110 replace_reg (psrc, get_hard_regnum (regstack, src));
1111
1112 regstack->reg[++regstack->top] = REGNO (dest);
1113 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1114 replace_reg (pdest, FIRST_STACK_REG);
1115 }
1116 else if (STACK_REG_P (src))
1117 {
1118 /* Save from a stack reg to MEM, or possibly integer reg. Since
1119 only top of stack may be saved, emit an exchange first if
1120 needs be. */
1121
1122 emit_swap_insn (insn, regstack, src);
1123
1124 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1125 if (note)
1126 {
1127 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1128 regstack->top--;
1129 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1130 }
1131 else if ((GET_MODE (src) == XFmode)
1132 && regstack->top < REG_STACK_SIZE - 1)
1133 {
1134 /* A 387 cannot write an XFmode value to a MEM without
1135 clobbering the source reg. The output code can handle
1136 this by reading back the value from the MEM.
1137 But it is more efficient to use a temp register if one is
1138 available. Push the source value here if the register
1139 stack is not full, and then write the value to memory via
1140 a pop. */
1141 rtx push_rtx;
1142 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1143
1144 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1145 emit_insn_before (push_rtx, insn);
1146 add_reg_note (insn, REG_DEAD, top_stack_reg);
1147 }
1148
1149 replace_reg (psrc, FIRST_STACK_REG);
1150 }
1151 else
1152 {
1153 rtx pat = PATTERN (insn);
1154
1155 gcc_assert (STACK_REG_P (dest));
1156
1157 /* Load from MEM, or possibly integer REG or constant, into the
1158 stack regs. The actual target is always the top of the
1159 stack. The stack mapping is changed to reflect that DEST is
1160 now at top of stack. */
1161
1162 /* The destination ought to be dead. However, there is a
1163 special case with i387 UNSPEC_TAN, where destination is live
1164 (an argument to fptan) but inherent load of 1.0 is modelled
1165 as a load from a constant. */
1166 if (GET_CODE (pat) == PARALLEL
1167 && XVECLEN (pat, 0) == 2
1168 && GET_CODE (XVECEXP (pat, 0, 1)) == SET
1169 && GET_CODE (SET_SRC (XVECEXP (pat, 0, 1))) == UNSPEC
1170 && XINT (SET_SRC (XVECEXP (pat, 0, 1)), 1) == UNSPEC_TAN)
1171 emit_swap_insn (insn, regstack, dest);
1172 else
1173 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1174
1175 gcc_assert (regstack->top < REG_STACK_SIZE);
1176
1177 regstack->reg[++regstack->top] = REGNO (dest);
1178 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1179 replace_reg (pdest, FIRST_STACK_REG);
1180 }
1181
1182 return control_flow_insn_deleted;
1183 }
1184
1185 /* A helper function which replaces INSN with a pattern that loads up
1186 a NaN into DEST, then invokes move_for_stack_reg. */
1187
1188 static bool
1189 move_nan_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx dest)
1190 {
1191 rtx pat;
1192
1193 dest = FP_MODE_REG (REGNO (dest), SFmode);
1194 pat = gen_rtx_SET (dest, not_a_num);
1195 PATTERN (insn) = pat;
1196 INSN_CODE (insn) = -1;
1197
1198 return move_for_stack_reg (insn, regstack, pat);
1199 }
1200 \f
1201 /* Swap the condition on a branch, if there is one. Return true if we
1202 found a condition to swap. False if the condition was not used as
1203 such. */
1204
1205 static int
1206 swap_rtx_condition_1 (rtx pat)
1207 {
1208 const char *fmt;
1209 int i, r = 0;
1210
1211 if (COMPARISON_P (pat))
1212 {
1213 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1214 r = 1;
1215 }
1216 else
1217 {
1218 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1219 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1220 {
1221 if (fmt[i] == 'E')
1222 {
1223 int j;
1224
1225 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1226 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1227 }
1228 else if (fmt[i] == 'e')
1229 r |= swap_rtx_condition_1 (XEXP (pat, i));
1230 }
1231 }
1232
1233 return r;
1234 }
1235
1236 static int
1237 swap_rtx_condition (rtx_insn *insn)
1238 {
1239 rtx pat = PATTERN (insn);
1240
1241 /* We're looking for a single set to cc0 or an HImode temporary. */
1242
1243 if (GET_CODE (pat) == SET
1244 && REG_P (SET_DEST (pat))
1245 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1246 {
1247 insn = next_flags_user (insn);
1248 if (insn == NULL_RTX)
1249 return 0;
1250 pat = PATTERN (insn);
1251 }
1252
1253 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1254 with the cc value right now. We may be able to search for one
1255 though. */
1256
1257 if (GET_CODE (pat) == SET
1258 && GET_CODE (SET_SRC (pat)) == UNSPEC
1259 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1260 {
1261 rtx dest = SET_DEST (pat);
1262
1263 /* Search forward looking for the first use of this value.
1264 Stop at block boundaries. */
1265 while (insn != BB_END (current_block))
1266 {
1267 insn = NEXT_INSN (insn);
1268 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1269 break;
1270 if (CALL_P (insn))
1271 return 0;
1272 }
1273
1274 /* We haven't found it. */
1275 if (insn == BB_END (current_block))
1276 return 0;
1277
1278 /* So we've found the insn using this value. If it is anything
1279 other than sahf or the value does not die (meaning we'd have
1280 to search further), then we must give up. */
1281 pat = PATTERN (insn);
1282 if (GET_CODE (pat) != SET
1283 || GET_CODE (SET_SRC (pat)) != UNSPEC
1284 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1285 || ! dead_or_set_p (insn, dest))
1286 return 0;
1287
1288 /* Now we are prepared to handle this as a normal cc0 setter. */
1289 insn = next_flags_user (insn);
1290 if (insn == NULL_RTX)
1291 return 0;
1292 pat = PATTERN (insn);
1293 }
1294
1295 if (swap_rtx_condition_1 (pat))
1296 {
1297 int fail = 0;
1298 INSN_CODE (insn) = -1;
1299 if (recog_memoized (insn) == -1)
1300 fail = 1;
1301 /* In case the flags don't die here, recurse to try fix
1302 following user too. */
1303 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1304 {
1305 insn = next_flags_user (insn);
1306 if (!insn || !swap_rtx_condition (insn))
1307 fail = 1;
1308 }
1309 if (fail)
1310 {
1311 swap_rtx_condition_1 (pat);
1312 return 0;
1313 }
1314 return 1;
1315 }
1316 return 0;
1317 }
1318
1319 /* Handle a comparison. Special care needs to be taken to avoid
1320 causing comparisons that a 387 cannot do correctly, such as EQ.
1321
1322 Also, a pop insn may need to be emitted. The 387 does have an
1323 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1324 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1325 set up. */
1326
1327 static void
1328 compare_for_stack_reg (rtx_insn *insn, stack_ptr regstack, rtx pat_src)
1329 {
1330 rtx *src1, *src2;
1331 rtx src1_note, src2_note;
1332
1333 src1 = get_true_reg (&XEXP (pat_src, 0));
1334 src2 = get_true_reg (&XEXP (pat_src, 1));
1335
1336 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1337 registers that die in this insn - move those to stack top first. */
1338 if ((! STACK_REG_P (*src1)
1339 || (STACK_REG_P (*src2)
1340 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1341 && swap_rtx_condition (insn))
1342 {
1343 std::swap (XEXP (pat_src, 0), XEXP (pat_src, 1));
1344
1345 src1 = get_true_reg (&XEXP (pat_src, 0));
1346 src2 = get_true_reg (&XEXP (pat_src, 1));
1347
1348 INSN_CODE (insn) = -1;
1349 }
1350
1351 /* We will fix any death note later. */
1352
1353 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1354
1355 if (STACK_REG_P (*src2))
1356 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1357 else
1358 src2_note = NULL_RTX;
1359
1360 emit_swap_insn (insn, regstack, *src1);
1361
1362 replace_reg (src1, FIRST_STACK_REG);
1363
1364 if (STACK_REG_P (*src2))
1365 replace_reg (src2, get_hard_regnum (regstack, *src2));
1366
1367 if (src1_note)
1368 {
1369 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1370 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1371 }
1372
1373 /* If the second operand dies, handle that. But if the operands are
1374 the same stack register, don't bother, because only one death is
1375 needed, and it was just handled. */
1376
1377 if (src2_note
1378 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1379 && REGNO (*src1) == REGNO (*src2)))
1380 {
1381 /* As a special case, two regs may die in this insn if src2 is
1382 next to top of stack and the top of stack also dies. Since
1383 we have already popped src1, "next to top of stack" is really
1384 at top (FIRST_STACK_REG) now. */
1385
1386 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1387 && src1_note)
1388 {
1389 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1390 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1391 }
1392 else
1393 {
1394 /* The 386 can only represent death of the first operand in
1395 the case handled above. In all other cases, emit a separate
1396 pop and remove the death note from here. */
1397 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1398 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1399 EMIT_AFTER);
1400 }
1401 }
1402 }
1403 \f
1404 /* Substitute hardware stack regs in debug insn INSN, using stack
1405 layout REGSTACK. If we can't find a hardware stack reg for any of
1406 the REGs in it, reset the debug insn. */
1407
1408 static void
1409 subst_all_stack_regs_in_debug_insn (rtx_insn *insn, struct stack_def *regstack)
1410 {
1411 subrtx_ptr_iterator::array_type array;
1412 FOR_EACH_SUBRTX_PTR (iter, array, &INSN_VAR_LOCATION_LOC (insn), NONCONST)
1413 {
1414 rtx *loc = *iter;
1415 rtx x = *loc;
1416 if (STACK_REG_P (x))
1417 {
1418 int hard_regno = get_hard_regnum (regstack, x);
1419
1420 /* If we can't find an active register, reset this debug insn. */
1421 if (hard_regno == -1)
1422 {
1423 INSN_VAR_LOCATION_LOC (insn) = gen_rtx_UNKNOWN_VAR_LOC ();
1424 return;
1425 }
1426
1427 gcc_assert (hard_regno >= FIRST_STACK_REG);
1428 replace_reg (loc, hard_regno);
1429 iter.skip_subrtxes ();
1430 }
1431 }
1432 }
1433
1434 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1435 is the current register layout. Return whether a control flow insn
1436 was deleted in the process. */
1437
1438 static bool
1439 subst_stack_regs_pat (rtx_insn *insn, stack_ptr regstack, rtx pat)
1440 {
1441 rtx *dest, *src;
1442 bool control_flow_insn_deleted = false;
1443
1444 switch (GET_CODE (pat))
1445 {
1446 case USE:
1447 /* Deaths in USE insns can happen in non optimizing compilation.
1448 Handle them by popping the dying register. */
1449 src = get_true_reg (&XEXP (pat, 0));
1450 if (STACK_REG_P (*src)
1451 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1452 {
1453 /* USEs are ignored for liveness information so USEs of dead
1454 register might happen. */
1455 if (TEST_HARD_REG_BIT (regstack->reg_set, REGNO (*src)))
1456 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1457 return control_flow_insn_deleted;
1458 }
1459 /* Uninitialized USE might happen for functions returning uninitialized
1460 value. We will properly initialize the USE on the edge to EXIT_BLOCK,
1461 so it is safe to ignore the use here. This is consistent with behavior
1462 of dataflow analyzer that ignores USE too. (This also imply that
1463 forcibly initializing the register to NaN here would lead to ICE later,
1464 since the REG_DEAD notes are not issued.) */
1465 break;
1466
1467 case VAR_LOCATION:
1468 gcc_unreachable ();
1469
1470 case CLOBBER:
1471 {
1472 rtx note;
1473
1474 dest = get_true_reg (&XEXP (pat, 0));
1475 if (STACK_REG_P (*dest))
1476 {
1477 note = find_reg_note (insn, REG_DEAD, *dest);
1478
1479 if (pat != PATTERN (insn))
1480 {
1481 /* The fix_truncdi_1 pattern wants to be able to
1482 allocate its own scratch register. It does this by
1483 clobbering an fp reg so that it is assured of an
1484 empty reg-stack register. If the register is live,
1485 kill it now. Remove the DEAD/UNUSED note so we
1486 don't try to kill it later too.
1487
1488 In reality the UNUSED note can be absent in some
1489 complicated cases when the register is reused for
1490 partially set variable. */
1491
1492 if (note)
1493 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1494 else
1495 note = find_reg_note (insn, REG_UNUSED, *dest);
1496 if (note)
1497 remove_note (insn, note);
1498 replace_reg (dest, FIRST_STACK_REG + 1);
1499 }
1500 else
1501 {
1502 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1503 indicates an uninitialized value. Because reload removed
1504 all other clobbers, this must be due to a function
1505 returning without a value. Load up a NaN. */
1506
1507 if (!note)
1508 {
1509 rtx t = *dest;
1510 if (COMPLEX_MODE_P (GET_MODE (t)))
1511 {
1512 rtx u = FP_MODE_REG (REGNO (t) + 1, SFmode);
1513 if (get_hard_regnum (regstack, u) == -1)
1514 {
1515 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, u);
1516 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1517 control_flow_insn_deleted
1518 |= move_nan_for_stack_reg (insn2, regstack, u);
1519 }
1520 }
1521 if (get_hard_regnum (regstack, t) == -1)
1522 control_flow_insn_deleted
1523 |= move_nan_for_stack_reg (insn, regstack, t);
1524 }
1525 }
1526 }
1527 break;
1528 }
1529
1530 case SET:
1531 {
1532 rtx *src1 = (rtx *) 0, *src2;
1533 rtx src1_note, src2_note;
1534 rtx pat_src;
1535
1536 dest = get_true_reg (&SET_DEST (pat));
1537 src = get_true_reg (&SET_SRC (pat));
1538 pat_src = SET_SRC (pat);
1539
1540 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1541 if (STACK_REG_P (*src)
1542 || (STACK_REG_P (*dest)
1543 && (REG_P (*src) || MEM_P (*src)
1544 || CONST_DOUBLE_P (*src))))
1545 {
1546 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1547 break;
1548 }
1549
1550 switch (GET_CODE (pat_src))
1551 {
1552 case COMPARE:
1553 compare_for_stack_reg (insn, regstack, pat_src);
1554 break;
1555
1556 case CALL:
1557 {
1558 int count;
1559 for (count = REG_NREGS (*dest); --count >= 0;)
1560 {
1561 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1562 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1563 }
1564 }
1565 replace_reg (dest, FIRST_STACK_REG);
1566 break;
1567
1568 case REG:
1569 /* This is a `tstM2' case. */
1570 gcc_assert (*dest == cc0_rtx);
1571 src1 = src;
1572
1573 /* Fall through. */
1574
1575 case FLOAT_TRUNCATE:
1576 case SQRT:
1577 case ABS:
1578 case NEG:
1579 /* These insns only operate on the top of the stack. DEST might
1580 be cc0_rtx if we're processing a tstM pattern. Also, it's
1581 possible that the tstM case results in a REG_DEAD note on the
1582 source. */
1583
1584 if (src1 == 0)
1585 src1 = get_true_reg (&XEXP (pat_src, 0));
1586
1587 emit_swap_insn (insn, regstack, *src1);
1588
1589 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1590
1591 if (STACK_REG_P (*dest))
1592 replace_reg (dest, FIRST_STACK_REG);
1593
1594 if (src1_note)
1595 {
1596 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1597 regstack->top--;
1598 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1599 }
1600
1601 replace_reg (src1, FIRST_STACK_REG);
1602 break;
1603
1604 case MINUS:
1605 case DIV:
1606 /* On i386, reversed forms of subM3 and divM3 exist for
1607 MODE_FLOAT, so the same code that works for addM3 and mulM3
1608 can be used. */
1609 case MULT:
1610 case PLUS:
1611 /* These insns can accept the top of stack as a destination
1612 from a stack reg or mem, or can use the top of stack as a
1613 source and some other stack register (possibly top of stack)
1614 as a destination. */
1615
1616 src1 = get_true_reg (&XEXP (pat_src, 0));
1617 src2 = get_true_reg (&XEXP (pat_src, 1));
1618
1619 /* We will fix any death note later. */
1620
1621 if (STACK_REG_P (*src1))
1622 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1623 else
1624 src1_note = NULL_RTX;
1625 if (STACK_REG_P (*src2))
1626 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1627 else
1628 src2_note = NULL_RTX;
1629
1630 /* If either operand is not a stack register, then the dest
1631 must be top of stack. */
1632
1633 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1634 emit_swap_insn (insn, regstack, *dest);
1635 else
1636 {
1637 /* Both operands are REG. If neither operand is already
1638 at the top of stack, choose to make the one that is the
1639 dest the new top of stack. */
1640
1641 int src1_hard_regnum, src2_hard_regnum;
1642
1643 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1644 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1645
1646 /* If the source is not live, this is yet another case of
1647 uninitialized variables. Load up a NaN instead. */
1648 if (src1_hard_regnum == -1)
1649 {
1650 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src1);
1651 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1652 control_flow_insn_deleted
1653 |= move_nan_for_stack_reg (insn2, regstack, *src1);
1654 }
1655 if (src2_hard_regnum == -1)
1656 {
1657 rtx pat2 = gen_rtx_CLOBBER (VOIDmode, *src2);
1658 rtx_insn *insn2 = emit_insn_before (pat2, insn);
1659 control_flow_insn_deleted
1660 |= move_nan_for_stack_reg (insn2, regstack, *src2);
1661 }
1662
1663 if (src1_hard_regnum != FIRST_STACK_REG
1664 && src2_hard_regnum != FIRST_STACK_REG)
1665 emit_swap_insn (insn, regstack, *dest);
1666 }
1667
1668 if (STACK_REG_P (*src1))
1669 replace_reg (src1, get_hard_regnum (regstack, *src1));
1670 if (STACK_REG_P (*src2))
1671 replace_reg (src2, get_hard_regnum (regstack, *src2));
1672
1673 if (src1_note)
1674 {
1675 rtx src1_reg = XEXP (src1_note, 0);
1676
1677 /* If the register that dies is at the top of stack, then
1678 the destination is somewhere else - merely substitute it.
1679 But if the reg that dies is not at top of stack, then
1680 move the top of stack to the dead reg, as though we had
1681 done the insn and then a store-with-pop. */
1682
1683 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1684 {
1685 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1686 replace_reg (dest, get_hard_regnum (regstack, *dest));
1687 }
1688 else
1689 {
1690 int regno = get_hard_regnum (regstack, src1_reg);
1691
1692 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1693 replace_reg (dest, regno);
1694
1695 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1696 = regstack->reg[regstack->top];
1697 }
1698
1699 CLEAR_HARD_REG_BIT (regstack->reg_set,
1700 REGNO (XEXP (src1_note, 0)));
1701 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1702 regstack->top--;
1703 }
1704 else if (src2_note)
1705 {
1706 rtx src2_reg = XEXP (src2_note, 0);
1707 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1708 {
1709 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1710 replace_reg (dest, get_hard_regnum (regstack, *dest));
1711 }
1712 else
1713 {
1714 int regno = get_hard_regnum (regstack, src2_reg);
1715
1716 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1717 replace_reg (dest, regno);
1718
1719 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1720 = regstack->reg[regstack->top];
1721 }
1722
1723 CLEAR_HARD_REG_BIT (regstack->reg_set,
1724 REGNO (XEXP (src2_note, 0)));
1725 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1726 regstack->top--;
1727 }
1728 else
1729 {
1730 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1731 replace_reg (dest, get_hard_regnum (regstack, *dest));
1732 }
1733
1734 /* Keep operand 1 matching with destination. */
1735 if (COMMUTATIVE_ARITH_P (pat_src)
1736 && REG_P (*src1) && REG_P (*src2)
1737 && REGNO (*src1) != REGNO (*dest))
1738 {
1739 int tmp = REGNO (*src1);
1740 replace_reg (src1, REGNO (*src2));
1741 replace_reg (src2, tmp);
1742 }
1743 break;
1744
1745 case UNSPEC:
1746 switch (XINT (pat_src, 1))
1747 {
1748 case UNSPEC_FIST:
1749 case UNSPEC_FIST_ATOMIC:
1750
1751 case UNSPEC_FIST_FLOOR:
1752 case UNSPEC_FIST_CEIL:
1753
1754 /* These insns only operate on the top of the stack. */
1755
1756 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1757 emit_swap_insn (insn, regstack, *src1);
1758
1759 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1760
1761 if (STACK_REG_P (*dest))
1762 replace_reg (dest, FIRST_STACK_REG);
1763
1764 if (src1_note)
1765 {
1766 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1767 regstack->top--;
1768 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1769 }
1770
1771 replace_reg (src1, FIRST_STACK_REG);
1772 break;
1773
1774 case UNSPEC_FXAM:
1775
1776 /* This insn only operate on the top of the stack. */
1777
1778 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1779 emit_swap_insn (insn, regstack, *src1);
1780
1781 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1782
1783 replace_reg (src1, FIRST_STACK_REG);
1784
1785 if (src1_note)
1786 {
1787 remove_regno_note (insn, REG_DEAD,
1788 REGNO (XEXP (src1_note, 0)));
1789 emit_pop_insn (insn, regstack, XEXP (src1_note, 0),
1790 EMIT_AFTER);
1791 }
1792
1793 break;
1794
1795 case UNSPEC_SIN:
1796 case UNSPEC_COS:
1797 case UNSPEC_FRNDINT:
1798 case UNSPEC_F2XM1:
1799
1800 case UNSPEC_FRNDINT_FLOOR:
1801 case UNSPEC_FRNDINT_CEIL:
1802 case UNSPEC_FRNDINT_TRUNC:
1803 case UNSPEC_FRNDINT_MASK_PM:
1804
1805 /* Above insns operate on the top of the stack. */
1806
1807 case UNSPEC_SINCOS_COS:
1808 case UNSPEC_XTRACT_FRACT:
1809
1810 /* Above insns operate on the top two stack slots,
1811 first part of one input, double output insn. */
1812
1813 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1814
1815 emit_swap_insn (insn, regstack, *src1);
1816
1817 /* Input should never die, it is replaced with output. */
1818 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1819 gcc_assert (!src1_note);
1820
1821 if (STACK_REG_P (*dest))
1822 replace_reg (dest, FIRST_STACK_REG);
1823
1824 replace_reg (src1, FIRST_STACK_REG);
1825 break;
1826
1827 case UNSPEC_SINCOS_SIN:
1828 case UNSPEC_XTRACT_EXP:
1829
1830 /* These insns operate on the top two stack slots,
1831 second part of one input, double output insn. */
1832
1833 regstack->top++;
1834 /* FALLTHRU */
1835
1836 case UNSPEC_TAN:
1837
1838 /* For UNSPEC_TAN, regstack->top is already increased
1839 by inherent load of constant 1.0. */
1840
1841 /* Output value is generated in the second stack slot.
1842 Move current value from second slot to the top. */
1843 regstack->reg[regstack->top]
1844 = regstack->reg[regstack->top - 1];
1845
1846 gcc_assert (STACK_REG_P (*dest));
1847
1848 regstack->reg[regstack->top - 1] = REGNO (*dest);
1849 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1850 replace_reg (dest, FIRST_STACK_REG + 1);
1851
1852 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1853
1854 replace_reg (src1, FIRST_STACK_REG);
1855 break;
1856
1857 case UNSPEC_FPATAN:
1858 case UNSPEC_FYL2X:
1859 case UNSPEC_FYL2XP1:
1860 /* These insns operate on the top two stack slots. */
1861
1862 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1863 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1864
1865 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1866 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1867
1868 swap_to_top (insn, regstack, *src1, *src2);
1869
1870 replace_reg (src1, FIRST_STACK_REG);
1871 replace_reg (src2, FIRST_STACK_REG + 1);
1872
1873 if (src1_note)
1874 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1875 if (src2_note)
1876 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1877
1878 /* Pop both input operands from the stack. */
1879 CLEAR_HARD_REG_BIT (regstack->reg_set,
1880 regstack->reg[regstack->top]);
1881 CLEAR_HARD_REG_BIT (regstack->reg_set,
1882 regstack->reg[regstack->top - 1]);
1883 regstack->top -= 2;
1884
1885 /* Push the result back onto the stack. */
1886 regstack->reg[++regstack->top] = REGNO (*dest);
1887 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1888 replace_reg (dest, FIRST_STACK_REG);
1889 break;
1890
1891 case UNSPEC_FSCALE_FRACT:
1892 case UNSPEC_FPREM_F:
1893 case UNSPEC_FPREM1_F:
1894 /* These insns operate on the top two stack slots,
1895 first part of double input, double output insn. */
1896
1897 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1898 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1899
1900 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1901 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1902
1903 /* Inputs should never die, they are
1904 replaced with outputs. */
1905 gcc_assert (!src1_note);
1906 gcc_assert (!src2_note);
1907
1908 swap_to_top (insn, regstack, *src1, *src2);
1909
1910 /* Push the result back onto stack. Empty stack slot
1911 will be filled in second part of insn. */
1912 if (STACK_REG_P (*dest))
1913 {
1914 regstack->reg[regstack->top] = REGNO (*dest);
1915 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1916 replace_reg (dest, FIRST_STACK_REG);
1917 }
1918
1919 replace_reg (src1, FIRST_STACK_REG);
1920 replace_reg (src2, FIRST_STACK_REG + 1);
1921 break;
1922
1923 case UNSPEC_FSCALE_EXP:
1924 case UNSPEC_FPREM_U:
1925 case UNSPEC_FPREM1_U:
1926 /* These insns operate on the top two stack slots,
1927 second part of double input, double output insn. */
1928
1929 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1930 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1931
1932 /* Push the result back onto stack. Fill empty slot from
1933 first part of insn and fix top of stack pointer. */
1934 if (STACK_REG_P (*dest))
1935 {
1936 regstack->reg[regstack->top - 1] = REGNO (*dest);
1937 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1938 replace_reg (dest, FIRST_STACK_REG + 1);
1939 }
1940
1941 replace_reg (src1, FIRST_STACK_REG);
1942 replace_reg (src2, FIRST_STACK_REG + 1);
1943 break;
1944
1945 case UNSPEC_C2_FLAG:
1946 /* This insn operates on the top two stack slots,
1947 third part of C2 setting double input insn. */
1948
1949 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1950 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1951
1952 replace_reg (src1, FIRST_STACK_REG);
1953 replace_reg (src2, FIRST_STACK_REG + 1);
1954 break;
1955
1956 case UNSPEC_SAHF:
1957 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1958 The combination matches the PPRO fcomi instruction. */
1959
1960 pat_src = XVECEXP (pat_src, 0, 0);
1961 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1962 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1963 /* Fall through. */
1964
1965 case UNSPEC_FNSTSW:
1966 /* Combined fcomp+fnstsw generated for doing well with
1967 CSE. When optimizing this would have been broken
1968 up before now. */
1969
1970 pat_src = XVECEXP (pat_src, 0, 0);
1971 gcc_assert (GET_CODE (pat_src) == COMPARE);
1972
1973 compare_for_stack_reg (insn, regstack, pat_src);
1974 break;
1975
1976 default:
1977 gcc_unreachable ();
1978 }
1979 break;
1980
1981 case IF_THEN_ELSE:
1982 /* This insn requires the top of stack to be the destination. */
1983
1984 src1 = get_true_reg (&XEXP (pat_src, 1));
1985 src2 = get_true_reg (&XEXP (pat_src, 2));
1986
1987 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1988 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1989
1990 /* If the comparison operator is an FP comparison operator,
1991 it is handled correctly by compare_for_stack_reg () who
1992 will move the destination to the top of stack. But if the
1993 comparison operator is not an FP comparison operator, we
1994 have to handle it here. */
1995 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1996 && REGNO (*dest) != regstack->reg[regstack->top])
1997 {
1998 /* In case one of operands is the top of stack and the operands
1999 dies, it is safe to make it the destination operand by
2000 reversing the direction of cmove and avoid fxch. */
2001 if ((REGNO (*src1) == regstack->reg[regstack->top]
2002 && src1_note)
2003 || (REGNO (*src2) == regstack->reg[regstack->top]
2004 && src2_note))
2005 {
2006 int idx1 = (get_hard_regnum (regstack, *src1)
2007 - FIRST_STACK_REG);
2008 int idx2 = (get_hard_regnum (regstack, *src2)
2009 - FIRST_STACK_REG);
2010
2011 /* Make reg-stack believe that the operands are already
2012 swapped on the stack */
2013 regstack->reg[regstack->top - idx1] = REGNO (*src2);
2014 regstack->reg[regstack->top - idx2] = REGNO (*src1);
2015
2016 /* Reverse condition to compensate the operand swap.
2017 i386 do have comparison always reversible. */
2018 PUT_CODE (XEXP (pat_src, 0),
2019 reversed_comparison_code (XEXP (pat_src, 0), insn));
2020 }
2021 else
2022 emit_swap_insn (insn, regstack, *dest);
2023 }
2024
2025 {
2026 rtx src_note [3];
2027 int i;
2028
2029 src_note[0] = 0;
2030 src_note[1] = src1_note;
2031 src_note[2] = src2_note;
2032
2033 if (STACK_REG_P (*src1))
2034 replace_reg (src1, get_hard_regnum (regstack, *src1));
2035 if (STACK_REG_P (*src2))
2036 replace_reg (src2, get_hard_regnum (regstack, *src2));
2037
2038 for (i = 1; i <= 2; i++)
2039 if (src_note [i])
2040 {
2041 int regno = REGNO (XEXP (src_note[i], 0));
2042
2043 /* If the register that dies is not at the top of
2044 stack, then move the top of stack to the dead reg.
2045 Top of stack should never die, as it is the
2046 destination. */
2047 gcc_assert (regno != regstack->reg[regstack->top]);
2048 remove_regno_note (insn, REG_DEAD, regno);
2049 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2050 EMIT_AFTER);
2051 }
2052 }
2053
2054 /* Make dest the top of stack. Add dest to regstack if
2055 not present. */
2056 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2057 regstack->reg[++regstack->top] = REGNO (*dest);
2058 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2059 replace_reg (dest, FIRST_STACK_REG);
2060 break;
2061
2062 default:
2063 gcc_unreachable ();
2064 }
2065 break;
2066 }
2067
2068 default:
2069 break;
2070 }
2071
2072 return control_flow_insn_deleted;
2073 }
2074 \f
2075 /* Substitute hard regnums for any stack regs in INSN, which has
2076 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2077 before the insn, and is updated with changes made here.
2078
2079 There are several requirements and assumptions about the use of
2080 stack-like regs in asm statements. These rules are enforced by
2081 record_asm_stack_regs; see comments there for details. Any
2082 asm_operands left in the RTL at this point may be assume to meet the
2083 requirements, since record_asm_stack_regs removes any problem asm. */
2084
2085 static void
2086 subst_asm_stack_regs (rtx_insn *insn, stack_ptr regstack)
2087 {
2088 rtx body = PATTERN (insn);
2089
2090 rtx *note_reg; /* Array of note contents */
2091 rtx **note_loc; /* Address of REG field of each note */
2092 enum reg_note *note_kind; /* The type of each note */
2093
2094 rtx *clobber_reg = 0;
2095 rtx **clobber_loc = 0;
2096
2097 struct stack_def temp_stack;
2098 int n_notes;
2099 int n_clobbers;
2100 rtx note;
2101 int i;
2102 int n_inputs, n_outputs;
2103
2104 if (! check_asm_stack_operands (insn))
2105 return;
2106
2107 /* Find out what the constraints required. If no constraint
2108 alternative matches, that is a compiler bug: we should have caught
2109 such an insn in check_asm_stack_operands. */
2110 extract_constrain_insn (insn);
2111
2112 preprocess_constraints (insn);
2113 const operand_alternative *op_alt = which_op_alt ();
2114
2115 get_asm_operands_in_out (body, &n_outputs, &n_inputs);
2116
2117 /* Strip SUBREGs here to make the following code simpler. */
2118 for (i = 0; i < recog_data.n_operands; i++)
2119 if (GET_CODE (recog_data.operand[i]) == SUBREG
2120 && REG_P (SUBREG_REG (recog_data.operand[i])))
2121 {
2122 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2123 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2124 }
2125
2126 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2127
2128 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2129 i++;
2130
2131 note_reg = XALLOCAVEC (rtx, i);
2132 note_loc = XALLOCAVEC (rtx *, i);
2133 note_kind = XALLOCAVEC (enum reg_note, i);
2134
2135 n_notes = 0;
2136 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2137 {
2138 if (GET_CODE (note) != EXPR_LIST)
2139 continue;
2140 rtx reg = XEXP (note, 0);
2141 rtx *loc = & XEXP (note, 0);
2142
2143 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2144 {
2145 loc = & SUBREG_REG (reg);
2146 reg = SUBREG_REG (reg);
2147 }
2148
2149 if (STACK_REG_P (reg)
2150 && (REG_NOTE_KIND (note) == REG_DEAD
2151 || REG_NOTE_KIND (note) == REG_UNUSED))
2152 {
2153 note_reg[n_notes] = reg;
2154 note_loc[n_notes] = loc;
2155 note_kind[n_notes] = REG_NOTE_KIND (note);
2156 n_notes++;
2157 }
2158 }
2159
2160 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2161
2162 n_clobbers = 0;
2163
2164 if (GET_CODE (body) == PARALLEL)
2165 {
2166 clobber_reg = XALLOCAVEC (rtx, XVECLEN (body, 0));
2167 clobber_loc = XALLOCAVEC (rtx *, XVECLEN (body, 0));
2168
2169 for (i = 0; i < XVECLEN (body, 0); i++)
2170 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2171 {
2172 rtx clobber = XVECEXP (body, 0, i);
2173 rtx reg = XEXP (clobber, 0);
2174 rtx *loc = & XEXP (clobber, 0);
2175
2176 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2177 {
2178 loc = & SUBREG_REG (reg);
2179 reg = SUBREG_REG (reg);
2180 }
2181
2182 if (STACK_REG_P (reg))
2183 {
2184 clobber_reg[n_clobbers] = reg;
2185 clobber_loc[n_clobbers] = loc;
2186 n_clobbers++;
2187 }
2188 }
2189 }
2190
2191 temp_stack = *regstack;
2192
2193 /* Put the input regs into the desired place in TEMP_STACK. */
2194
2195 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2196 if (STACK_REG_P (recog_data.operand[i])
2197 && reg_class_subset_p (op_alt[i].cl, FLOAT_REGS)
2198 && op_alt[i].cl != FLOAT_REGS)
2199 {
2200 /* If an operand needs to be in a particular reg in
2201 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2202 these constraints are for single register classes, and
2203 reload guaranteed that operand[i] is already in that class,
2204 we can just use REGNO (recog_data.operand[i]) to know which
2205 actual reg this operand needs to be in. */
2206
2207 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2208
2209 gcc_assert (regno >= 0);
2210
2211 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2212 {
2213 /* recog_data.operand[i] is not in the right place. Find
2214 it and swap it with whatever is already in I's place.
2215 K is where recog_data.operand[i] is now. J is where it
2216 should be. */
2217 int j, k;
2218
2219 k = temp_stack.top - (regno - FIRST_STACK_REG);
2220 j = (temp_stack.top
2221 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2222
2223 std::swap (temp_stack.reg[j], temp_stack.reg[k]);
2224 }
2225 }
2226
2227 /* Emit insns before INSN to make sure the reg-stack is in the right
2228 order. */
2229
2230 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2231
2232 /* Make the needed input register substitutions. Do death notes and
2233 clobbers too, because these are for inputs, not outputs. */
2234
2235 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2236 if (STACK_REG_P (recog_data.operand[i]))
2237 {
2238 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2239
2240 gcc_assert (regnum >= 0);
2241
2242 replace_reg (recog_data.operand_loc[i], regnum);
2243 }
2244
2245 for (i = 0; i < n_notes; i++)
2246 if (note_kind[i] == REG_DEAD)
2247 {
2248 int regnum = get_hard_regnum (regstack, note_reg[i]);
2249
2250 gcc_assert (regnum >= 0);
2251
2252 replace_reg (note_loc[i], regnum);
2253 }
2254
2255 for (i = 0; i < n_clobbers; i++)
2256 {
2257 /* It's OK for a CLOBBER to reference a reg that is not live.
2258 Don't try to replace it in that case. */
2259 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2260
2261 if (regnum >= 0)
2262 {
2263 /* Sigh - clobbers always have QImode. But replace_reg knows
2264 that these regs can't be MODE_INT and will assert. Just put
2265 the right reg there without calling replace_reg. */
2266
2267 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2268 }
2269 }
2270
2271 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2272
2273 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2274 if (STACK_REG_P (recog_data.operand[i]))
2275 {
2276 /* An input reg is implicitly popped if it is tied to an
2277 output, or if there is a CLOBBER for it. */
2278 int j;
2279
2280 for (j = 0; j < n_clobbers; j++)
2281 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2282 break;
2283
2284 if (j < n_clobbers || op_alt[i].matches >= 0)
2285 {
2286 /* recog_data.operand[i] might not be at the top of stack.
2287 But that's OK, because all we need to do is pop the
2288 right number of regs off of the top of the reg-stack.
2289 record_asm_stack_regs guaranteed that all implicitly
2290 popped regs were grouped at the top of the reg-stack. */
2291
2292 CLEAR_HARD_REG_BIT (regstack->reg_set,
2293 regstack->reg[regstack->top]);
2294 regstack->top--;
2295 }
2296 }
2297
2298 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2299 Note that there isn't any need to substitute register numbers.
2300 ??? Explain why this is true. */
2301
2302 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2303 {
2304 /* See if there is an output for this hard reg. */
2305 int j;
2306
2307 for (j = 0; j < n_outputs; j++)
2308 if (STACK_REG_P (recog_data.operand[j])
2309 && REGNO (recog_data.operand[j]) == (unsigned) i)
2310 {
2311 regstack->reg[++regstack->top] = i;
2312 SET_HARD_REG_BIT (regstack->reg_set, i);
2313 break;
2314 }
2315 }
2316
2317 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2318 input that the asm didn't implicitly pop. If the asm didn't
2319 implicitly pop an input reg, that reg will still be live.
2320
2321 Note that we can't use find_regno_note here: the register numbers
2322 in the death notes have already been substituted. */
2323
2324 for (i = 0; i < n_outputs; i++)
2325 if (STACK_REG_P (recog_data.operand[i]))
2326 {
2327 int j;
2328
2329 for (j = 0; j < n_notes; j++)
2330 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2331 && note_kind[j] == REG_UNUSED)
2332 {
2333 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2334 EMIT_AFTER);
2335 break;
2336 }
2337 }
2338
2339 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2340 if (STACK_REG_P (recog_data.operand[i]))
2341 {
2342 int j;
2343
2344 for (j = 0; j < n_notes; j++)
2345 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2346 && note_kind[j] == REG_DEAD
2347 && TEST_HARD_REG_BIT (regstack->reg_set,
2348 REGNO (recog_data.operand[i])))
2349 {
2350 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2351 EMIT_AFTER);
2352 break;
2353 }
2354 }
2355 }
2356 \f
2357 /* Substitute stack hard reg numbers for stack virtual registers in
2358 INSN. Non-stack register numbers are not changed. REGSTACK is the
2359 current stack content. Insns may be emitted as needed to arrange the
2360 stack for the 387 based on the contents of the insn. Return whether
2361 a control flow insn was deleted in the process. */
2362
2363 static bool
2364 subst_stack_regs (rtx_insn *insn, stack_ptr regstack)
2365 {
2366 rtx *note_link, note;
2367 bool control_flow_insn_deleted = false;
2368 int i;
2369
2370 if (CALL_P (insn))
2371 {
2372 int top = regstack->top;
2373
2374 /* If there are any floating point parameters to be passed in
2375 registers for this call, make sure they are in the right
2376 order. */
2377
2378 if (top >= 0)
2379 {
2380 straighten_stack (insn, regstack);
2381
2382 /* Now mark the arguments as dead after the call. */
2383
2384 while (regstack->top >= 0)
2385 {
2386 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2387 regstack->top--;
2388 }
2389 }
2390 }
2391
2392 /* Do the actual substitution if any stack regs are mentioned.
2393 Since we only record whether entire insn mentions stack regs, and
2394 subst_stack_regs_pat only works for patterns that contain stack regs,
2395 we must check each pattern in a parallel here. A call_value_pop could
2396 fail otherwise. */
2397
2398 if (stack_regs_mentioned (insn))
2399 {
2400 int n_operands = asm_noperands (PATTERN (insn));
2401 if (n_operands >= 0)
2402 {
2403 /* This insn is an `asm' with operands. Decode the operands,
2404 decide how many are inputs, and do register substitution.
2405 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2406
2407 subst_asm_stack_regs (insn, regstack);
2408 return control_flow_insn_deleted;
2409 }
2410
2411 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2412 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2413 {
2414 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2415 {
2416 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2417 XVECEXP (PATTERN (insn), 0, i)
2418 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2419 control_flow_insn_deleted
2420 |= subst_stack_regs_pat (insn, regstack,
2421 XVECEXP (PATTERN (insn), 0, i));
2422 }
2423 }
2424 else
2425 control_flow_insn_deleted
2426 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2427 }
2428
2429 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2430 REG_UNUSED will already have been dealt with, so just return. */
2431
2432 if (NOTE_P (insn) || insn->deleted ())
2433 return control_flow_insn_deleted;
2434
2435 /* If this a noreturn call, we can't insert pop insns after it.
2436 Instead, reset the stack state to empty. */
2437 if (CALL_P (insn)
2438 && find_reg_note (insn, REG_NORETURN, NULL))
2439 {
2440 regstack->top = -1;
2441 CLEAR_HARD_REG_SET (regstack->reg_set);
2442 return control_flow_insn_deleted;
2443 }
2444
2445 /* If there is a REG_UNUSED note on a stack register on this insn,
2446 the indicated reg must be popped. The REG_UNUSED note is removed,
2447 since the form of the newly emitted pop insn references the reg,
2448 making it no longer `unset'. */
2449
2450 note_link = &REG_NOTES (insn);
2451 for (note = *note_link; note; note = XEXP (note, 1))
2452 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2453 {
2454 *note_link = XEXP (note, 1);
2455 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2456 }
2457 else
2458 note_link = &XEXP (note, 1);
2459
2460 return control_flow_insn_deleted;
2461 }
2462 \f
2463 /* Change the organization of the stack so that it fits a new basic
2464 block. Some registers might have to be popped, but there can never be
2465 a register live in the new block that is not now live.
2466
2467 Insert any needed insns before or after INSN, as indicated by
2468 WHERE. OLD is the original stack layout, and NEW is the desired
2469 form. OLD is updated to reflect the code emitted, i.e., it will be
2470 the same as NEW upon return.
2471
2472 This function will not preserve block_end[]. But that information
2473 is no longer needed once this has executed. */
2474
2475 static void
2476 change_stack (rtx_insn *insn, stack_ptr old, stack_ptr new_stack,
2477 enum emit_where where)
2478 {
2479 int reg;
2480 int update_end = 0;
2481 int i;
2482
2483 /* Stack adjustments for the first insn in a block update the
2484 current_block's stack_in instead of inserting insns directly.
2485 compensate_edges will add the necessary code later. */
2486 if (current_block
2487 && starting_stack_p
2488 && where == EMIT_BEFORE)
2489 {
2490 BLOCK_INFO (current_block)->stack_in = *new_stack;
2491 starting_stack_p = false;
2492 *old = *new_stack;
2493 return;
2494 }
2495
2496 /* We will be inserting new insns "backwards". If we are to insert
2497 after INSN, find the next insn, and insert before it. */
2498
2499 if (where == EMIT_AFTER)
2500 {
2501 if (current_block && BB_END (current_block) == insn)
2502 update_end = 1;
2503 insn = NEXT_INSN (insn);
2504 }
2505
2506 /* Initialize partially dead variables. */
2507 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
2508 if (TEST_HARD_REG_BIT (new_stack->reg_set, i)
2509 && !TEST_HARD_REG_BIT (old->reg_set, i))
2510 {
2511 old->reg[++old->top] = i;
2512 SET_HARD_REG_BIT (old->reg_set, i);
2513 emit_insn_before (gen_rtx_SET (FP_MODE_REG (i, SFmode), not_a_num),
2514 insn);
2515 }
2516
2517 /* Pop any registers that are not needed in the new block. */
2518
2519 /* If the destination block's stack already has a specified layout
2520 and contains two or more registers, use a more intelligent algorithm
2521 to pop registers that minimizes the number of fxchs below. */
2522 if (new_stack->top > 0)
2523 {
2524 bool slots[REG_STACK_SIZE];
2525 int pops[REG_STACK_SIZE];
2526 int next, dest, topsrc;
2527
2528 /* First pass to determine the free slots. */
2529 for (reg = 0; reg <= new_stack->top; reg++)
2530 slots[reg] = TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]);
2531
2532 /* Second pass to allocate preferred slots. */
2533 topsrc = -1;
2534 for (reg = old->top; reg > new_stack->top; reg--)
2535 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2536 {
2537 dest = -1;
2538 for (next = 0; next <= new_stack->top; next++)
2539 if (!slots[next] && new_stack->reg[next] == old->reg[reg])
2540 {
2541 /* If this is a preference for the new top of stack, record
2542 the fact by remembering it's old->reg in topsrc. */
2543 if (next == new_stack->top)
2544 topsrc = reg;
2545 slots[next] = true;
2546 dest = next;
2547 break;
2548 }
2549 pops[reg] = dest;
2550 }
2551 else
2552 pops[reg] = reg;
2553
2554 /* Intentionally, avoid placing the top of stack in it's correct
2555 location, if we still need to permute the stack below and we
2556 can usefully place it somewhere else. This is the case if any
2557 slot is still unallocated, in which case we should place the
2558 top of stack there. */
2559 if (topsrc != -1)
2560 for (reg = 0; reg < new_stack->top; reg++)
2561 if (!slots[reg])
2562 {
2563 pops[topsrc] = reg;
2564 slots[new_stack->top] = false;
2565 slots[reg] = true;
2566 break;
2567 }
2568
2569 /* Third pass allocates remaining slots and emits pop insns. */
2570 next = new_stack->top;
2571 for (reg = old->top; reg > new_stack->top; reg--)
2572 {
2573 dest = pops[reg];
2574 if (dest == -1)
2575 {
2576 /* Find next free slot. */
2577 while (slots[next])
2578 next--;
2579 dest = next--;
2580 }
2581 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2582 EMIT_BEFORE);
2583 }
2584 }
2585 else
2586 {
2587 /* The following loop attempts to maximize the number of times we
2588 pop the top of the stack, as this permits the use of the faster
2589 ffreep instruction on platforms that support it. */
2590 int live, next;
2591
2592 live = 0;
2593 for (reg = 0; reg <= old->top; reg++)
2594 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[reg]))
2595 live++;
2596
2597 next = live;
2598 while (old->top >= live)
2599 if (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[old->top]))
2600 {
2601 while (TEST_HARD_REG_BIT (new_stack->reg_set, old->reg[next]))
2602 next--;
2603 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2604 EMIT_BEFORE);
2605 }
2606 else
2607 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2608 EMIT_BEFORE);
2609 }
2610
2611 if (new_stack->top == -2)
2612 {
2613 /* If the new block has never been processed, then it can inherit
2614 the old stack order. */
2615
2616 new_stack->top = old->top;
2617 memcpy (new_stack->reg, old->reg, sizeof (new_stack->reg));
2618 }
2619 else
2620 {
2621 /* This block has been entered before, and we must match the
2622 previously selected stack order. */
2623
2624 /* By now, the only difference should be the order of the stack,
2625 not their depth or liveliness. */
2626
2627 gcc_assert (hard_reg_set_equal_p (old->reg_set, new_stack->reg_set));
2628 gcc_assert (old->top == new_stack->top);
2629
2630 /* If the stack is not empty (new_stack->top != -1), loop here emitting
2631 swaps until the stack is correct.
2632
2633 The worst case number of swaps emitted is N + 2, where N is the
2634 depth of the stack. In some cases, the reg at the top of
2635 stack may be correct, but swapped anyway in order to fix
2636 other regs. But since we never swap any other reg away from
2637 its correct slot, this algorithm will converge. */
2638
2639 if (new_stack->top != -1)
2640 do
2641 {
2642 /* Swap the reg at top of stack into the position it is
2643 supposed to be in, until the correct top of stack appears. */
2644
2645 while (old->reg[old->top] != new_stack->reg[new_stack->top])
2646 {
2647 for (reg = new_stack->top; reg >= 0; reg--)
2648 if (new_stack->reg[reg] == old->reg[old->top])
2649 break;
2650
2651 gcc_assert (reg != -1);
2652
2653 emit_swap_insn (insn, old,
2654 FP_MODE_REG (old->reg[reg], DFmode));
2655 }
2656
2657 /* See if any regs remain incorrect. If so, bring an
2658 incorrect reg to the top of stack, and let the while loop
2659 above fix it. */
2660
2661 for (reg = new_stack->top; reg >= 0; reg--)
2662 if (new_stack->reg[reg] != old->reg[reg])
2663 {
2664 emit_swap_insn (insn, old,
2665 FP_MODE_REG (old->reg[reg], DFmode));
2666 break;
2667 }
2668 } while (reg >= 0);
2669
2670 /* At this point there must be no differences. */
2671
2672 for (reg = old->top; reg >= 0; reg--)
2673 gcc_assert (old->reg[reg] == new_stack->reg[reg]);
2674 }
2675
2676 if (update_end)
2677 BB_END (current_block) = PREV_INSN (insn);
2678 }
2679 \f
2680 /* Print stack configuration. */
2681
2682 static void
2683 print_stack (FILE *file, stack_ptr s)
2684 {
2685 if (! file)
2686 return;
2687
2688 if (s->top == -2)
2689 fprintf (file, "uninitialized\n");
2690 else if (s->top == -1)
2691 fprintf (file, "empty\n");
2692 else
2693 {
2694 int i;
2695 fputs ("[ ", file);
2696 for (i = 0; i <= s->top; ++i)
2697 fprintf (file, "%d ", s->reg[i]);
2698 fputs ("]\n", file);
2699 }
2700 }
2701 \f
2702 /* This function was doing life analysis. We now let the regular live
2703 code do it's job, so we only need to check some extra invariants
2704 that reg-stack expects. Primary among these being that all registers
2705 are initialized before use.
2706
2707 The function returns true when code was emitted to CFG edges and
2708 commit_edge_insertions needs to be called. */
2709
2710 static int
2711 convert_regs_entry (void)
2712 {
2713 int inserted = 0;
2714 edge e;
2715 edge_iterator ei;
2716
2717 /* Load something into each stack register live at function entry.
2718 Such live registers can be caused by uninitialized variables or
2719 functions not returning values on all paths. In order to keep
2720 the push/pop code happy, and to not scrog the register stack, we
2721 must put something in these registers. Use a QNaN.
2722
2723 Note that we are inserting converted code here. This code is
2724 never seen by the convert_regs pass. */
2725
2726 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
2727 {
2728 basic_block block = e->dest;
2729 block_info bi = BLOCK_INFO (block);
2730 int reg, top = -1;
2731
2732 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2733 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2734 {
2735 rtx init;
2736
2737 bi->stack_in.reg[++top] = reg;
2738
2739 init = gen_rtx_SET (FP_MODE_REG (FIRST_STACK_REG, SFmode),
2740 not_a_num);
2741 insert_insn_on_edge (init, e);
2742 inserted = 1;
2743 }
2744
2745 bi->stack_in.top = top;
2746 }
2747
2748 return inserted;
2749 }
2750
2751 /* Construct the desired stack for function exit. This will either
2752 be `empty', or the function return value at top-of-stack. */
2753
2754 static void
2755 convert_regs_exit (void)
2756 {
2757 int value_reg_low, value_reg_high;
2758 stack_ptr output_stack;
2759 rtx retvalue;
2760
2761 retvalue = stack_result (current_function_decl);
2762 value_reg_low = value_reg_high = -1;
2763 if (retvalue)
2764 {
2765 value_reg_low = REGNO (retvalue);
2766 value_reg_high = END_REGNO (retvalue) - 1;
2767 }
2768
2769 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->stack_in;
2770 if (value_reg_low == -1)
2771 output_stack->top = -1;
2772 else
2773 {
2774 int reg;
2775
2776 output_stack->top = value_reg_high - value_reg_low;
2777 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2778 {
2779 output_stack->reg[value_reg_high - reg] = reg;
2780 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2781 }
2782 }
2783 }
2784
2785 /* Copy the stack info from the end of edge E's source block to the
2786 start of E's destination block. */
2787
2788 static void
2789 propagate_stack (edge e)
2790 {
2791 stack_ptr src_stack = &BLOCK_INFO (e->src)->stack_out;
2792 stack_ptr dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2793 int reg;
2794
2795 /* Preserve the order of the original stack, but check whether
2796 any pops are needed. */
2797 dest_stack->top = -1;
2798 for (reg = 0; reg <= src_stack->top; ++reg)
2799 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2800 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2801
2802 /* Push in any partially dead values. */
2803 for (reg = FIRST_STACK_REG; reg < LAST_STACK_REG + 1; reg++)
2804 if (TEST_HARD_REG_BIT (dest_stack->reg_set, reg)
2805 && !TEST_HARD_REG_BIT (src_stack->reg_set, reg))
2806 dest_stack->reg[++dest_stack->top] = reg;
2807 }
2808
2809
2810 /* Adjust the stack of edge E's source block on exit to match the stack
2811 of it's target block upon input. The stack layouts of both blocks
2812 should have been defined by now. */
2813
2814 static bool
2815 compensate_edge (edge e)
2816 {
2817 basic_block source = e->src, target = e->dest;
2818 stack_ptr target_stack = &BLOCK_INFO (target)->stack_in;
2819 stack_ptr source_stack = &BLOCK_INFO (source)->stack_out;
2820 struct stack_def regstack;
2821 int reg;
2822
2823 if (dump_file)
2824 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2825
2826 gcc_assert (target_stack->top != -2);
2827
2828 /* Check whether stacks are identical. */
2829 if (target_stack->top == source_stack->top)
2830 {
2831 for (reg = target_stack->top; reg >= 0; --reg)
2832 if (target_stack->reg[reg] != source_stack->reg[reg])
2833 break;
2834
2835 if (reg == -1)
2836 {
2837 if (dump_file)
2838 fprintf (dump_file, "no changes needed\n");
2839 return false;
2840 }
2841 }
2842
2843 if (dump_file)
2844 {
2845 fprintf (dump_file, "correcting stack to ");
2846 print_stack (dump_file, target_stack);
2847 }
2848
2849 /* Abnormal calls may appear to have values live in st(0), but the
2850 abnormal return path will not have actually loaded the values. */
2851 if (e->flags & EDGE_ABNORMAL_CALL)
2852 {
2853 /* Assert that the lifetimes are as we expect -- one value
2854 live at st(0) on the end of the source block, and no
2855 values live at the beginning of the destination block.
2856 For complex return values, we may have st(1) live as well. */
2857 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2858 gcc_assert (target_stack->top == -1);
2859 return false;
2860 }
2861
2862 /* Handle non-call EH edges specially. The normal return path have
2863 values in registers. These will be popped en masse by the unwind
2864 library. */
2865 if (e->flags & EDGE_EH)
2866 {
2867 gcc_assert (target_stack->top == -1);
2868 return false;
2869 }
2870
2871 /* We don't support abnormal edges. Global takes care to
2872 avoid any live register across them, so we should never
2873 have to insert instructions on such edges. */
2874 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2875
2876 /* Make a copy of source_stack as change_stack is destructive. */
2877 regstack = *source_stack;
2878
2879 /* It is better to output directly to the end of the block
2880 instead of to the edge, because emit_swap can do minimal
2881 insn scheduling. We can do this when there is only one
2882 edge out, and it is not abnormal. */
2883 if (EDGE_COUNT (source->succs) == 1)
2884 {
2885 current_block = source;
2886 change_stack (BB_END (source), &regstack, target_stack,
2887 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2888 }
2889 else
2890 {
2891 rtx_insn *seq;
2892 rtx_note *after;
2893
2894 current_block = NULL;
2895 start_sequence ();
2896
2897 /* ??? change_stack needs some point to emit insns after. */
2898 after = emit_note (NOTE_INSN_DELETED);
2899
2900 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2901
2902 seq = get_insns ();
2903 end_sequence ();
2904
2905 insert_insn_on_edge (seq, e);
2906 return true;
2907 }
2908 return false;
2909 }
2910
2911 /* Traverse all non-entry edges in the CFG, and emit the necessary
2912 edge compensation code to change the stack from stack_out of the
2913 source block to the stack_in of the destination block. */
2914
2915 static bool
2916 compensate_edges (void)
2917 {
2918 bool inserted = false;
2919 basic_block bb;
2920
2921 starting_stack_p = false;
2922
2923 FOR_EACH_BB_FN (bb, cfun)
2924 if (bb != ENTRY_BLOCK_PTR_FOR_FN (cfun))
2925 {
2926 edge e;
2927 edge_iterator ei;
2928
2929 FOR_EACH_EDGE (e, ei, bb->succs)
2930 inserted |= compensate_edge (e);
2931 }
2932 return inserted;
2933 }
2934
2935 /* Select the better of two edges E1 and E2 to use to determine the
2936 stack layout for their shared destination basic block. This is
2937 typically the more frequently executed. The edge E1 may be NULL
2938 (in which case E2 is returned), but E2 is always non-NULL. */
2939
2940 static edge
2941 better_edge (edge e1, edge e2)
2942 {
2943 if (!e1)
2944 return e2;
2945
2946 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2947 return e1;
2948 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2949 return e2;
2950
2951 if (e1->count > e2->count)
2952 return e1;
2953 if (e1->count < e2->count)
2954 return e2;
2955
2956 /* Prefer critical edges to minimize inserting compensation code on
2957 critical edges. */
2958
2959 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2960 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2961
2962 /* Avoid non-deterministic behavior. */
2963 return (e1->src->index < e2->src->index) ? e1 : e2;
2964 }
2965
2966 /* Convert stack register references in one block. Return true if the CFG
2967 has been modified in the process. */
2968
2969 static bool
2970 convert_regs_1 (basic_block block)
2971 {
2972 struct stack_def regstack;
2973 block_info bi = BLOCK_INFO (block);
2974 int reg;
2975 rtx_insn *insn, *next;
2976 bool control_flow_insn_deleted = false;
2977 bool cfg_altered = false;
2978 int debug_insns_with_starting_stack = 0;
2979
2980 any_malformed_asm = false;
2981
2982 /* Choose an initial stack layout, if one hasn't already been chosen. */
2983 if (bi->stack_in.top == -2)
2984 {
2985 edge e, beste = NULL;
2986 edge_iterator ei;
2987
2988 /* Select the best incoming edge (typically the most frequent) to
2989 use as a template for this basic block. */
2990 FOR_EACH_EDGE (e, ei, block->preds)
2991 if (BLOCK_INFO (e->src)->done)
2992 beste = better_edge (beste, e);
2993
2994 if (beste)
2995 propagate_stack (beste);
2996 else
2997 {
2998 /* No predecessors. Create an arbitrary input stack. */
2999 bi->stack_in.top = -1;
3000 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
3001 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
3002 bi->stack_in.reg[++bi->stack_in.top] = reg;
3003 }
3004 }
3005
3006 if (dump_file)
3007 {
3008 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
3009 print_stack (dump_file, &bi->stack_in);
3010 }
3011
3012 /* Process all insns in this block. Keep track of NEXT so that we
3013 don't process insns emitted while substituting in INSN. */
3014 current_block = block;
3015 next = BB_HEAD (block);
3016 regstack = bi->stack_in;
3017 starting_stack_p = true;
3018
3019 do
3020 {
3021 insn = next;
3022 next = NEXT_INSN (insn);
3023
3024 /* Ensure we have not missed a block boundary. */
3025 gcc_assert (next);
3026 if (insn == BB_END (block))
3027 next = NULL;
3028
3029 /* Don't bother processing unless there is a stack reg
3030 mentioned or if it's a CALL_INSN. */
3031 if (DEBUG_INSN_P (insn))
3032 {
3033 if (starting_stack_p)
3034 debug_insns_with_starting_stack++;
3035 else
3036 {
3037 subst_all_stack_regs_in_debug_insn (insn, &regstack);
3038
3039 /* Nothing must ever die at a debug insn. If something
3040 is referenced in it that becomes dead, it should have
3041 died before and the reference in the debug insn
3042 should have been removed so as to avoid changing code
3043 generation. */
3044 gcc_assert (!find_reg_note (insn, REG_DEAD, NULL));
3045 }
3046 }
3047 else if (stack_regs_mentioned (insn)
3048 || CALL_P (insn))
3049 {
3050 if (dump_file)
3051 {
3052 fprintf (dump_file, " insn %d input stack: ",
3053 INSN_UID (insn));
3054 print_stack (dump_file, &regstack);
3055 }
3056 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
3057 starting_stack_p = false;
3058 }
3059 }
3060 while (next);
3061
3062 if (debug_insns_with_starting_stack)
3063 {
3064 /* Since it's the first non-debug instruction that determines
3065 the stack requirements of the current basic block, we refrain
3066 from updating debug insns before it in the loop above, and
3067 fix them up here. */
3068 for (insn = BB_HEAD (block); debug_insns_with_starting_stack;
3069 insn = NEXT_INSN (insn))
3070 {
3071 if (!DEBUG_INSN_P (insn))
3072 continue;
3073
3074 debug_insns_with_starting_stack--;
3075 subst_all_stack_regs_in_debug_insn (insn, &bi->stack_in);
3076 }
3077 }
3078
3079 if (dump_file)
3080 {
3081 fprintf (dump_file, "Expected live registers [");
3082 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3083 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
3084 fprintf (dump_file, " %d", reg);
3085 fprintf (dump_file, " ]\nOutput stack: ");
3086 print_stack (dump_file, &regstack);
3087 }
3088
3089 insn = BB_END (block);
3090 if (JUMP_P (insn))
3091 insn = PREV_INSN (insn);
3092
3093 /* If the function is declared to return a value, but it returns one
3094 in only some cases, some registers might come live here. Emit
3095 necessary moves for them. */
3096
3097 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
3098 {
3099 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
3100 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
3101 {
3102 rtx set;
3103
3104 if (dump_file)
3105 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
3106
3107 set = gen_rtx_SET (FP_MODE_REG (reg, SFmode), not_a_num);
3108 insn = emit_insn_after (set, insn);
3109 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
3110 }
3111 }
3112
3113 /* Amongst the insns possibly deleted during the substitution process above,
3114 might have been the only trapping insn in the block. We purge the now
3115 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
3116 called at the end of convert_regs. The order in which we process the
3117 blocks ensures that we never delete an already processed edge.
3118
3119 Note that, at this point, the CFG may have been damaged by the emission
3120 of instructions after an abnormal call, which moves the basic block end
3121 (and is the reason why we call fixup_abnormal_edges later). So we must
3122 be sure that the trapping insn has been deleted before trying to purge
3123 dead edges, otherwise we risk purging valid edges.
3124
3125 ??? We are normally supposed not to delete trapping insns, so we pretend
3126 that the insns deleted above don't actually trap. It would have been
3127 better to detect this earlier and avoid creating the EH edge in the first
3128 place, still, but we don't have enough information at that time. */
3129
3130 if (control_flow_insn_deleted)
3131 cfg_altered |= purge_dead_edges (block);
3132
3133 /* Something failed if the stack lives don't match. If we had malformed
3134 asms, we zapped the instruction itself, but that didn't produce the
3135 same pattern of register kills as before. */
3136
3137 gcc_assert (hard_reg_set_equal_p (regstack.reg_set, bi->out_reg_set)
3138 || any_malformed_asm);
3139 bi->stack_out = regstack;
3140 bi->done = true;
3141
3142 return cfg_altered;
3143 }
3144
3145 /* Convert registers in all blocks reachable from BLOCK. Return true if the
3146 CFG has been modified in the process. */
3147
3148 static bool
3149 convert_regs_2 (basic_block block)
3150 {
3151 basic_block *stack, *sp;
3152 bool cfg_altered = false;
3153
3154 /* We process the blocks in a top-down manner, in a way such that one block
3155 is only processed after all its predecessors. The number of predecessors
3156 of every block has already been computed. */
3157
3158 stack = XNEWVEC (basic_block, n_basic_blocks_for_fn (cfun));
3159 sp = stack;
3160
3161 *sp++ = block;
3162
3163 do
3164 {
3165 edge e;
3166 edge_iterator ei;
3167
3168 block = *--sp;
3169
3170 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3171 some dead EH outgoing edge after the deletion of the trapping
3172 insn inside the block. Since the number of predecessors of
3173 BLOCK's successors was computed based on the initial edge set,
3174 we check the necessity to process some of these successors
3175 before such an edge deletion may happen. However, there is
3176 a pitfall: if BLOCK is the only predecessor of a successor and
3177 the edge between them happens to be deleted, the successor
3178 becomes unreachable and should not be processed. The problem
3179 is that there is no way to preventively detect this case so we
3180 stack the successor in all cases and hand over the task of
3181 fixing up the discrepancy to convert_regs_1. */
3182
3183 FOR_EACH_EDGE (e, ei, block->succs)
3184 if (! (e->flags & EDGE_DFS_BACK))
3185 {
3186 BLOCK_INFO (e->dest)->predecessors--;
3187 if (!BLOCK_INFO (e->dest)->predecessors)
3188 *sp++ = e->dest;
3189 }
3190
3191 cfg_altered |= convert_regs_1 (block);
3192 }
3193 while (sp != stack);
3194
3195 free (stack);
3196
3197 return cfg_altered;
3198 }
3199
3200 /* Traverse all basic blocks in a function, converting the register
3201 references in each insn from the "flat" register file that gcc uses,
3202 to the stack-like registers the 387 uses. */
3203
3204 static void
3205 convert_regs (void)
3206 {
3207 bool cfg_altered = false;
3208 int inserted;
3209 basic_block b;
3210 edge e;
3211 edge_iterator ei;
3212
3213 /* Initialize uninitialized registers on function entry. */
3214 inserted = convert_regs_entry ();
3215
3216 /* Construct the desired stack for function exit. */
3217 convert_regs_exit ();
3218 BLOCK_INFO (EXIT_BLOCK_PTR_FOR_FN (cfun))->done = 1;
3219
3220 /* ??? Future: process inner loops first, and give them arbitrary
3221 initial stacks which emit_swap_insn can modify. This ought to
3222 prevent double fxch that often appears at the head of a loop. */
3223
3224 /* Process all blocks reachable from all entry points. */
3225 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR_FOR_FN (cfun)->succs)
3226 cfg_altered |= convert_regs_2 (e->dest);
3227
3228 /* ??? Process all unreachable blocks. Though there's no excuse
3229 for keeping these even when not optimizing. */
3230 FOR_EACH_BB_FN (b, cfun)
3231 {
3232 block_info bi = BLOCK_INFO (b);
3233
3234 if (! bi->done)
3235 cfg_altered |= convert_regs_2 (b);
3236 }
3237
3238 /* We must fix up abnormal edges before inserting compensation code
3239 because both mechanisms insert insns on edges. */
3240 inserted |= fixup_abnormal_edges ();
3241
3242 inserted |= compensate_edges ();
3243
3244 clear_aux_for_blocks ();
3245
3246 if (inserted)
3247 commit_edge_insertions ();
3248
3249 if (cfg_altered)
3250 cleanup_cfg (0);
3251
3252 if (dump_file)
3253 fputc ('\n', dump_file);
3254 }
3255 \f
3256 /* Convert register usage from "flat" register file usage to a "stack
3257 register file. FILE is the dump file, if used.
3258
3259 Construct a CFG and run life analysis. Then convert each insn one
3260 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3261 code duplication created when the converter inserts pop insns on
3262 the edges. */
3263
3264 static bool
3265 reg_to_stack (void)
3266 {
3267 basic_block bb;
3268 int i;
3269 int max_uid;
3270
3271 /* Clean up previous run. */
3272 stack_regs_mentioned_data.release ();
3273
3274 /* See if there is something to do. Flow analysis is quite
3275 expensive so we might save some compilation time. */
3276 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3277 if (df_regs_ever_live_p (i))
3278 break;
3279 if (i > LAST_STACK_REG)
3280 return false;
3281
3282 df_note_add_problem ();
3283 df_analyze ();
3284
3285 mark_dfs_back_edges ();
3286
3287 /* Set up block info for each basic block. */
3288 alloc_aux_for_blocks (sizeof (struct block_info_def));
3289 FOR_EACH_BB_FN (bb, cfun)
3290 {
3291 block_info bi = BLOCK_INFO (bb);
3292 edge_iterator ei;
3293 edge e;
3294 int reg;
3295
3296 FOR_EACH_EDGE (e, ei, bb->preds)
3297 if (!(e->flags & EDGE_DFS_BACK)
3298 && e->src != ENTRY_BLOCK_PTR_FOR_FN (cfun))
3299 bi->predecessors++;
3300
3301 /* Set current register status at last instruction `uninitialized'. */
3302 bi->stack_in.top = -2;
3303
3304 /* Copy live_at_end and live_at_start into temporaries. */
3305 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3306 {
3307 if (REGNO_REG_SET_P (DF_LR_OUT (bb), reg))
3308 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3309 if (REGNO_REG_SET_P (DF_LR_IN (bb), reg))
3310 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3311 }
3312 }
3313
3314 /* Create the replacement registers up front. */
3315 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3316 {
3317 machine_mode mode;
3318 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3319 mode != VOIDmode;
3320 mode = GET_MODE_WIDER_MODE (mode))
3321 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3322 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3323 mode != VOIDmode;
3324 mode = GET_MODE_WIDER_MODE (mode))
3325 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3326 }
3327
3328 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3329
3330 /* A QNaN for initializing uninitialized variables.
3331
3332 ??? We can't load from constant memory in PIC mode, because
3333 we're inserting these instructions before the prologue and
3334 the PIC register hasn't been set up. In that case, fall back
3335 on zero, which we can get from `fldz'. */
3336
3337 if ((flag_pic && !TARGET_64BIT)
3338 || ix86_cmodel == CM_LARGE || ix86_cmodel == CM_LARGE_PIC)
3339 not_a_num = CONST0_RTX (SFmode);
3340 else
3341 {
3342 REAL_VALUE_TYPE r;
3343
3344 real_nan (&r, "", 1, SFmode);
3345 not_a_num = const_double_from_real_value (r, SFmode);
3346 not_a_num = force_const_mem (SFmode, not_a_num);
3347 }
3348
3349 /* Allocate a cache for stack_regs_mentioned. */
3350 max_uid = get_max_uid ();
3351 stack_regs_mentioned_data.create (max_uid + 1);
3352 memset (stack_regs_mentioned_data.address (),
3353 0, sizeof (char) * (max_uid + 1));
3354
3355 convert_regs ();
3356
3357 free_aux_for_blocks ();
3358 return true;
3359 }
3360 #endif /* STACK_REGS */
3361 \f
3362 namespace {
3363
3364 const pass_data pass_data_stack_regs =
3365 {
3366 RTL_PASS, /* type */
3367 "*stack_regs", /* name */
3368 OPTGROUP_NONE, /* optinfo_flags */
3369 TV_REG_STACK, /* tv_id */
3370 0, /* properties_required */
3371 0, /* properties_provided */
3372 0, /* properties_destroyed */
3373 0, /* todo_flags_start */
3374 0, /* todo_flags_finish */
3375 };
3376
3377 class pass_stack_regs : public rtl_opt_pass
3378 {
3379 public:
3380 pass_stack_regs (gcc::context *ctxt)
3381 : rtl_opt_pass (pass_data_stack_regs, ctxt)
3382 {}
3383
3384 /* opt_pass methods: */
3385 virtual bool gate (function *)
3386 {
3387 #ifdef STACK_REGS
3388 return true;
3389 #else
3390 return false;
3391 #endif
3392 }
3393
3394 }; // class pass_stack_regs
3395
3396 } // anon namespace
3397
3398 rtl_opt_pass *
3399 make_pass_stack_regs (gcc::context *ctxt)
3400 {
3401 return new pass_stack_regs (ctxt);
3402 }
3403
3404 /* Convert register usage from flat register file usage to a stack
3405 register file. */
3406 static unsigned int
3407 rest_of_handle_stack_regs (void)
3408 {
3409 #ifdef STACK_REGS
3410 reg_to_stack ();
3411 regstack_completed = 1;
3412 #endif
3413 return 0;
3414 }
3415
3416 namespace {
3417
3418 const pass_data pass_data_stack_regs_run =
3419 {
3420 RTL_PASS, /* type */
3421 "stack", /* name */
3422 OPTGROUP_NONE, /* optinfo_flags */
3423 TV_REG_STACK, /* tv_id */
3424 0, /* properties_required */
3425 0, /* properties_provided */
3426 0, /* properties_destroyed */
3427 0, /* todo_flags_start */
3428 TODO_df_finish, /* todo_flags_finish */
3429 };
3430
3431 class pass_stack_regs_run : public rtl_opt_pass
3432 {
3433 public:
3434 pass_stack_regs_run (gcc::context *ctxt)
3435 : rtl_opt_pass (pass_data_stack_regs_run, ctxt)
3436 {}
3437
3438 /* opt_pass methods: */
3439 virtual unsigned int execute (function *)
3440 {
3441 return rest_of_handle_stack_regs ();
3442 }
3443
3444 }; // class pass_stack_regs_run
3445
3446 } // anon namespace
3447
3448 rtl_opt_pass *
3449 make_pass_stack_regs_run (gcc::context *ctxt)
3450 {
3451 return new pass_stack_regs_run (ctxt);
3452 }