6327b24e96e6759facb032357ef0013b3e3564e6
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
4
5 This file is part of GNU CC.
6
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
24
25 * The form of the input:
26
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
36
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
44
45 * The form of the output:
46
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
52
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
55
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
59
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
62
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
66
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
71
72 * Methodology:
73
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
77
78 * asm_operands:
79
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
83
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
87
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
91
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
98
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
101
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
104
105 asm ("foo" : "=t" (a) : "f" (b));
106
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
112
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
115
116 The asm above would be written as
117
118 asm ("foo" : "=&t" (a) : "f" (b));
119
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
124
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
128
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
133
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
136
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
140
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
143
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
151
152 */
153 \f
154 #include "config.h"
155 #include "system.h"
156 #include "tree.h"
157 #include "rtl.h"
158 #include "tm_p.h"
159 #include "function.h"
160 #include "insn-config.h"
161 #include "regs.h"
162 #include "hard-reg-set.h"
163 #include "flags.h"
164 #include "toplev.h"
165 #include "recog.h"
166 #include "output.h"
167 #include "basic-block.h"
168 #include "varray.h"
169 #include "reload.h"
170
171 #ifdef STACK_REGS
172
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
180 appropriately.
181
182 REG_SET indicates which registers are live. */
183
184 typedef struct stack_def
185 {
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
189 } *stack;
190
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
193
194 typedef struct block_info_def
195 {
196 struct stack_def stack_in; /* Input stack configuration. */
197 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
198 int done; /* True if block already converted. */
199 } *block_info;
200
201 #define BLOCK_INFO(B) ((block_info) (B)->aux)
202
203 /* Passed to change_stack to indicate where to emit insns. */
204 enum emit_where
205 {
206 EMIT_AFTER,
207 EMIT_BEFORE
208 };
209
210 /* We use this array to cache info about insns, because otherwise we
211 spend too much time in stack_regs_mentioned_p.
212
213 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
214 the insn uses stack registers, two indicates the insn does not use
215 stack registers. */
216 static varray_type stack_regs_mentioned_data;
217
218 /* The block we're currently working on. */
219 static basic_block current_block;
220
221 /* This is the register file for all register after conversion */
222 static rtx
223 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
224
225 #define FP_MODE_REG(regno,mode) \
226 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227
228 /* Used to initialize uninitialized registers. */
229 static rtx nan;
230
231 /* Forward declarations */
232
233 static int stack_regs_mentioned_p PARAMS ((rtx pat));
234 static void straighten_stack PARAMS ((rtx, stack));
235 static void pop_stack PARAMS ((stack, int));
236 static rtx *get_true_reg PARAMS ((rtx *));
237
238 static int check_asm_stack_operands PARAMS ((rtx));
239 static int get_asm_operand_n_inputs PARAMS ((rtx));
240 static rtx stack_result PARAMS ((tree));
241 static void replace_reg PARAMS ((rtx *, int));
242 static void remove_regno_note PARAMS ((rtx, enum reg_note,
243 unsigned int));
244 static int get_hard_regnum PARAMS ((stack, rtx));
245 static void delete_insn_for_stacker PARAMS ((rtx));
246 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
247 enum emit_where));
248 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
249 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
250 static int swap_rtx_condition_1 PARAMS ((rtx));
251 static int swap_rtx_condition PARAMS ((rtx));
252 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
253 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
254 static void subst_asm_stack_regs PARAMS ((rtx, stack));
255 static void subst_stack_regs PARAMS ((rtx, stack));
256 static void change_stack PARAMS ((rtx, stack, stack,
257 enum emit_where));
258 static int convert_regs_entry PARAMS ((void));
259 static void convert_regs_exit PARAMS ((void));
260 static int convert_regs_1 PARAMS ((FILE *, basic_block));
261 static int convert_regs_2 PARAMS ((FILE *, basic_block));
262 static int convert_regs PARAMS ((FILE *));
263 static void print_stack PARAMS ((FILE *, stack));
264 static rtx next_flags_user PARAMS ((rtx));
265 static void record_label_references PARAMS ((rtx, rtx));
266 \f
267 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
268
269 static int
270 stack_regs_mentioned_p (pat)
271 rtx pat;
272 {
273 register const char *fmt;
274 register int i;
275
276 if (STACK_REG_P (pat))
277 return 1;
278
279 fmt = GET_RTX_FORMAT (GET_CODE (pat));
280 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
281 {
282 if (fmt[i] == 'E')
283 {
284 register int j;
285
286 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
287 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
288 return 1;
289 }
290 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
291 return 1;
292 }
293
294 return 0;
295 }
296
297 /* Return nonzero if INSN mentions stacked registers, else return zero. */
298
299 int
300 stack_regs_mentioned (insn)
301 rtx insn;
302 {
303 unsigned int uid, max;
304 int test;
305
306 if (! INSN_P (insn))
307 return 0;
308
309 uid = INSN_UID (insn);
310 max = VARRAY_SIZE (stack_regs_mentioned_data);
311 if (uid >= max)
312 {
313 /* Allocate some extra size to avoid too many reallocs, but
314 do not grow too quickly. */
315 max = uid + uid / 20;
316 VARRAY_GROW (stack_regs_mentioned_data, max);
317 }
318
319 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
320 if (test == 0)
321 {
322 /* This insn has yet to be examined. Do so now. */
323 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
324 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
325 }
326
327 return test == 1;
328 }
329 \f
330 static rtx ix86_flags_rtx;
331
332 static rtx
333 next_flags_user (insn)
334 rtx insn;
335 {
336 /* Search forward looking for the first use of this value.
337 Stop at block boundaries. */
338
339 while (insn != current_block->end)
340 {
341 insn = NEXT_INSN (insn);
342
343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
344 return insn;
345
346 if (GET_CODE (insn) == CALL_INSN)
347 return NULL_RTX;
348 }
349 return NULL_RTX;
350 }
351 \f
352 /* Reorganise the stack into ascending numbers,
353 after this insn. */
354
355 static void
356 straighten_stack (insn, regstack)
357 rtx insn;
358 stack regstack;
359 {
360 struct stack_def temp_stack;
361 int top;
362
363 /* If there is only a single register on the stack, then the stack is
364 already in increasing order and no reorganization is needed.
365
366 Similarly if the stack is empty. */
367 if (regstack->top <= 0)
368 return;
369
370 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
371
372 for (top = temp_stack.top = regstack->top; top >= 0; top--)
373 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
374
375 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
376 }
377
378 /* Pop a register from the stack */
379
380 static void
381 pop_stack (regstack, regno)
382 stack regstack;
383 int regno;
384 {
385 int top = regstack->top;
386
387 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
388 regstack->top--;
389 /* If regno was not at the top of stack then adjust stack */
390 if (regstack->reg [top] != regno)
391 {
392 int i;
393 for (i = regstack->top; i >= 0; i--)
394 if (regstack->reg [i] == regno)
395 {
396 int j;
397 for (j = i; j < top; j++)
398 regstack->reg [j] = regstack->reg [j + 1];
399 break;
400 }
401 }
402 }
403 \f
404 /* Convert register usage from "flat" register file usage to a "stack
405 register file. FIRST is the first insn in the function, FILE is the
406 dump file, if used.
407
408 Construct a CFG and run life analysis. Then convert each insn one
409 by one. Run a last jump_optimize pass, if optimizing, to eliminate
410 code duplication created when the converter inserts pop insns on
411 the edges. */
412
413 void
414 reg_to_stack (first, file)
415 rtx first;
416 FILE *file;
417 {
418 int i;
419 int max_uid;
420 block_info bi;
421
422 /* See if there is something to do. Flow analysis is quite
423 expensive so we might save some compilation time. */
424 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
425 if (regs_ever_live[i])
426 break;
427 if (i > LAST_STACK_REG)
428 return;
429
430 /* Ok, floating point instructions exist. If not optimizing,
431 build the CFG and run life analysis. */
432 find_basic_blocks (first, max_reg_num (), file);
433 count_or_remove_death_notes (NULL, 1);
434 life_analysis (first, file, PROP_DEATH_NOTES);
435
436 /* Set up block info for each basic block. */
437 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
438 for (i = n_basic_blocks - 1; i >= 0; --i)
439 BASIC_BLOCK (i)->aux = bi + i;
440 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
441
442 /* Create the replacement registers up front. */
443 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
444 {
445 enum machine_mode mode;
446 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
447 mode != VOIDmode;
448 mode = GET_MODE_WIDER_MODE (mode))
449 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
450 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
451 mode != VOIDmode;
452 mode = GET_MODE_WIDER_MODE (mode))
453 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
454 }
455
456 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
457
458 /* A QNaN for initializing uninitialized variables.
459
460 ??? We can't load from constant memory in PIC mode, because
461 we're insertting these instructions before the prologue and
462 the PIC register hasn't been set up. In that case, fall back
463 on zero, which we can get from `ldz'. */
464
465 if (flag_pic)
466 nan = CONST0_RTX (SFmode);
467 else
468 {
469 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
470 nan = force_const_mem (SFmode, nan);
471 }
472
473 /* Allocate a cache for stack_regs_mentioned. */
474 max_uid = get_max_uid ();
475 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
476 "stack_regs_mentioned cache");
477
478 if (convert_regs (file) && optimize)
479 {
480 jump_optimize (first, JUMP_CROSS_JUMP_DEATH_MATTERS,
481 !JUMP_NOOP_MOVES, !JUMP_AFTER_REGSCAN);
482 }
483
484 /* Clean up. */
485 VARRAY_FREE (stack_regs_mentioned_data);
486 free (bi);
487 }
488 \f
489 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
490 label's chain of references, and note which insn contains each
491 reference. */
492
493 static void
494 record_label_references (insn, pat)
495 rtx insn, pat;
496 {
497 register enum rtx_code code = GET_CODE (pat);
498 register int i;
499 register const char *fmt;
500
501 if (code == LABEL_REF)
502 {
503 register rtx label = XEXP (pat, 0);
504 register rtx ref;
505
506 if (GET_CODE (label) != CODE_LABEL)
507 abort ();
508
509 /* If this is an undefined label, LABEL_REFS (label) contains
510 garbage. */
511 if (INSN_UID (label) == 0)
512 return;
513
514 /* Don't make a duplicate in the code_label's chain. */
515
516 for (ref = LABEL_REFS (label);
517 ref && ref != label;
518 ref = LABEL_NEXTREF (ref))
519 if (CONTAINING_INSN (ref) == insn)
520 return;
521
522 CONTAINING_INSN (pat) = insn;
523 LABEL_NEXTREF (pat) = LABEL_REFS (label);
524 LABEL_REFS (label) = pat;
525
526 return;
527 }
528
529 fmt = GET_RTX_FORMAT (code);
530 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
531 {
532 if (fmt[i] == 'e')
533 record_label_references (insn, XEXP (pat, i));
534 if (fmt[i] == 'E')
535 {
536 register int j;
537 for (j = 0; j < XVECLEN (pat, i); j++)
538 record_label_references (insn, XVECEXP (pat, i, j));
539 }
540 }
541 }
542 \f
543 /* Return a pointer to the REG expression within PAT. If PAT is not a
544 REG, possible enclosed by a conversion rtx, return the inner part of
545 PAT that stopped the search. */
546
547 static rtx *
548 get_true_reg (pat)
549 rtx *pat;
550 {
551 for (;;)
552 switch (GET_CODE (*pat))
553 {
554 case SUBREG:
555 /* Eliminate FP subregister accesses in favour of the
556 actual FP register in use. */
557 {
558 rtx subreg;
559 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
560 {
561 int regno_off = subreg_regno_offset (REGNO (subreg),
562 GET_MODE (subreg),
563 SUBREG_BYTE (*pat),
564 GET_MODE (*pat));
565 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
566 GET_MODE (subreg));
567 default:
568 return pat;
569 }
570 }
571 case FLOAT:
572 case FIX:
573 case FLOAT_EXTEND:
574 pat = & XEXP (*pat, 0);
575 }
576 }
577 \f
578 /* There are many rules that an asm statement for stack-like regs must
579 follow. Those rules are explained at the top of this file: the rule
580 numbers below refer to that explanation. */
581
582 static int
583 check_asm_stack_operands (insn)
584 rtx insn;
585 {
586 int i;
587 int n_clobbers;
588 int malformed_asm = 0;
589 rtx body = PATTERN (insn);
590
591 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
592 char implicitly_dies[FIRST_PSEUDO_REGISTER];
593 int alt;
594
595 rtx *clobber_reg = 0;
596 int n_inputs, n_outputs;
597
598 /* Find out what the constraints require. If no constraint
599 alternative matches, this asm is malformed. */
600 extract_insn (insn);
601 constrain_operands (1);
602 alt = which_alternative;
603
604 preprocess_constraints ();
605
606 n_inputs = get_asm_operand_n_inputs (body);
607 n_outputs = recog_data.n_operands - n_inputs;
608
609 if (alt < 0)
610 {
611 malformed_asm = 1;
612 /* Avoid further trouble with this insn. */
613 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
614 return 0;
615 }
616
617 /* Strip SUBREGs here to make the following code simpler. */
618 for (i = 0; i < recog_data.n_operands; i++)
619 if (GET_CODE (recog_data.operand[i]) == SUBREG
620 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
621 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
622
623 /* Set up CLOBBER_REG. */
624
625 n_clobbers = 0;
626
627 if (GET_CODE (body) == PARALLEL)
628 {
629 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
630
631 for (i = 0; i < XVECLEN (body, 0); i++)
632 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
633 {
634 rtx clobber = XVECEXP (body, 0, i);
635 rtx reg = XEXP (clobber, 0);
636
637 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
638 reg = SUBREG_REG (reg);
639
640 if (STACK_REG_P (reg))
641 {
642 clobber_reg[n_clobbers] = reg;
643 n_clobbers++;
644 }
645 }
646 }
647
648 /* Enforce rule #4: Output operands must specifically indicate which
649 reg an output appears in after an asm. "=f" is not allowed: the
650 operand constraints must select a class with a single reg.
651
652 Also enforce rule #5: Output operands must start at the top of
653 the reg-stack: output operands may not "skip" a reg. */
654
655 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
656 for (i = 0; i < n_outputs; i++)
657 if (STACK_REG_P (recog_data.operand[i]))
658 {
659 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
660 {
661 error_for_asm (insn, "Output constraint %d must specify a single register", i);
662 malformed_asm = 1;
663 }
664 else
665 {
666 int j;
667
668 for (j = 0; j < n_clobbers; j++)
669 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
670 {
671 error_for_asm (insn, "Output constraint %d cannot be specified together with \"%s\" clobber",
672 i, reg_names [REGNO (clobber_reg[j])]);
673 malformed_asm = 1;
674 break;
675 }
676 if (j == n_clobbers)
677 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
678 }
679 }
680
681
682 /* Search for first non-popped reg. */
683 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
684 if (! reg_used_as_output[i])
685 break;
686
687 /* If there are any other popped regs, that's an error. */
688 for (; i < LAST_STACK_REG + 1; i++)
689 if (reg_used_as_output[i])
690 break;
691
692 if (i != LAST_STACK_REG + 1)
693 {
694 error_for_asm (insn, "Output regs must be grouped at top of stack");
695 malformed_asm = 1;
696 }
697
698 /* Enforce rule #2: All implicitly popped input regs must be closer
699 to the top of the reg-stack than any input that is not implicitly
700 popped. */
701
702 memset (implicitly_dies, 0, sizeof (implicitly_dies));
703 for (i = n_outputs; i < n_outputs + n_inputs; i++)
704 if (STACK_REG_P (recog_data.operand[i]))
705 {
706 /* An input reg is implicitly popped if it is tied to an
707 output, or if there is a CLOBBER for it. */
708 int j;
709
710 for (j = 0; j < n_clobbers; j++)
711 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
712 break;
713
714 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
715 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
716 }
717
718 /* Search for first non-popped reg. */
719 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
720 if (! implicitly_dies[i])
721 break;
722
723 /* If there are any other popped regs, that's an error. */
724 for (; i < LAST_STACK_REG + 1; i++)
725 if (implicitly_dies[i])
726 break;
727
728 if (i != LAST_STACK_REG + 1)
729 {
730 error_for_asm (insn,
731 "Implicitly popped regs must be grouped at top of stack");
732 malformed_asm = 1;
733 }
734
735 /* Enfore rule #3: If any input operand uses the "f" constraint, all
736 output constraints must use the "&" earlyclobber.
737
738 ??? Detect this more deterministically by having constrain_asm_operands
739 record any earlyclobber. */
740
741 for (i = n_outputs; i < n_outputs + n_inputs; i++)
742 if (recog_op_alt[i][alt].matches == -1)
743 {
744 int j;
745
746 for (j = 0; j < n_outputs; j++)
747 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
748 {
749 error_for_asm (insn,
750 "Output operand %d must use `&' constraint", j);
751 malformed_asm = 1;
752 }
753 }
754
755 if (malformed_asm)
756 {
757 /* Avoid further trouble with this insn. */
758 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
759 return 0;
760 }
761
762 return 1;
763 }
764 \f
765 /* Calculate the number of inputs and outputs in BODY, an
766 asm_operands. N_OPERANDS is the total number of operands, and
767 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
768 placed. */
769
770 static int
771 get_asm_operand_n_inputs (body)
772 rtx body;
773 {
774 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
775 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
776
777 else if (GET_CODE (body) == ASM_OPERANDS)
778 return ASM_OPERANDS_INPUT_LENGTH (body);
779
780 else if (GET_CODE (body) == PARALLEL
781 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
782 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
783
784 else if (GET_CODE (body) == PARALLEL
785 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
786 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
787
788 abort ();
789 }
790
791 /* If current function returns its result in an fp stack register,
792 return the REG. Otherwise, return 0. */
793
794 static rtx
795 stack_result (decl)
796 tree decl;
797 {
798 rtx result;
799
800 /* If the value is supposed to be returned in memory, then clearly
801 it is not returned in a stack register. */
802 if (aggregate_value_p (DECL_RESULT (decl)))
803 return 0;
804
805 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
806 if (result != 0)
807 {
808 #ifdef FUNCTION_OUTGOING_VALUE
809 result
810 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
811 #else
812 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
813 #endif
814 }
815
816 return result != 0 && STACK_REG_P (result) ? result : 0;
817 }
818 \f
819
820 /*
821 * This section deals with stack register substitution, and forms the second
822 * pass over the RTL.
823 */
824
825 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
826 the desired hard REGNO. */
827
828 static void
829 replace_reg (reg, regno)
830 rtx *reg;
831 int regno;
832 {
833 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
834 || ! STACK_REG_P (*reg))
835 abort ();
836
837 switch (GET_MODE_CLASS (GET_MODE (*reg)))
838 {
839 default: abort ();
840 case MODE_FLOAT:
841 case MODE_COMPLEX_FLOAT:;
842 }
843
844 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
845 }
846
847 /* Remove a note of type NOTE, which must be found, for register
848 number REGNO from INSN. Remove only one such note. */
849
850 static void
851 remove_regno_note (insn, note, regno)
852 rtx insn;
853 enum reg_note note;
854 unsigned int regno;
855 {
856 register rtx *note_link, this;
857
858 note_link = &REG_NOTES(insn);
859 for (this = *note_link; this; this = XEXP (this, 1))
860 if (REG_NOTE_KIND (this) == note
861 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
862 {
863 *note_link = XEXP (this, 1);
864 return;
865 }
866 else
867 note_link = &XEXP (this, 1);
868
869 abort ();
870 }
871
872 /* Find the hard register number of virtual register REG in REGSTACK.
873 The hard register number is relative to the top of the stack. -1 is
874 returned if the register is not found. */
875
876 static int
877 get_hard_regnum (regstack, reg)
878 stack regstack;
879 rtx reg;
880 {
881 int i;
882
883 if (! STACK_REG_P (reg))
884 abort ();
885
886 for (i = regstack->top; i >= 0; i--)
887 if (regstack->reg[i] == REGNO (reg))
888 break;
889
890 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
891 }
892
893 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
894 the chain of insns. Doing so could confuse block_begin and block_end
895 if this were the only insn in the block. */
896
897 static void
898 delete_insn_for_stacker (insn)
899 rtx insn;
900 {
901 PUT_CODE (insn, NOTE);
902 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
903 NOTE_SOURCE_FILE (insn) = 0;
904 }
905 \f
906 /* Emit an insn to pop virtual register REG before or after INSN.
907 REGSTACK is the stack state after INSN and is updated to reflect this
908 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
909 is represented as a SET whose destination is the register to be popped
910 and source is the top of stack. A death note for the top of stack
911 cases the movdf pattern to pop. */
912
913 static rtx
914 emit_pop_insn (insn, regstack, reg, where)
915 rtx insn;
916 stack regstack;
917 rtx reg;
918 enum emit_where where;
919 {
920 rtx pop_insn, pop_rtx;
921 int hard_regno;
922
923 /* For complex types take care to pop both halves. These may survive in
924 CLOBBER and USE expressions. */
925 if (COMPLEX_MODE_P (GET_MODE (reg)))
926 {
927 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
928 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
929
930 pop_insn = NULL_RTX;
931 if (get_hard_regnum (regstack, reg1) >= 0)
932 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
933 if (get_hard_regnum (regstack, reg2) >= 0)
934 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
935 if (!pop_insn)
936 abort ();
937 return pop_insn;
938 }
939
940 hard_regno = get_hard_regnum (regstack, reg);
941
942 if (hard_regno < FIRST_STACK_REG)
943 abort ();
944
945 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
946 FP_MODE_REG (FIRST_STACK_REG, DFmode));
947
948 if (where == EMIT_AFTER)
949 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
950 else
951 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
952
953 REG_NOTES (pop_insn)
954 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
955 REG_NOTES (pop_insn));
956
957 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
958 = regstack->reg[regstack->top];
959 regstack->top -= 1;
960 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
961
962 return pop_insn;
963 }
964 \f
965 /* Emit an insn before or after INSN to swap virtual register REG with
966 the top of stack. REGSTACK is the stack state before the swap, and
967 is updated to reflect the swap. A swap insn is represented as a
968 PARALLEL of two patterns: each pattern moves one reg to the other.
969
970 If REG is already at the top of the stack, no insn is emitted. */
971
972 static void
973 emit_swap_insn (insn, regstack, reg)
974 rtx insn;
975 stack regstack;
976 rtx reg;
977 {
978 int hard_regno;
979 rtx swap_rtx;
980 int tmp, other_reg; /* swap regno temps */
981 rtx i1; /* the stack-reg insn prior to INSN */
982 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
983
984 hard_regno = get_hard_regnum (regstack, reg);
985
986 if (hard_regno < FIRST_STACK_REG)
987 abort ();
988 if (hard_regno == FIRST_STACK_REG)
989 return;
990
991 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
992
993 tmp = regstack->reg[other_reg];
994 regstack->reg[other_reg] = regstack->reg[regstack->top];
995 regstack->reg[regstack->top] = tmp;
996
997 /* Find the previous insn involving stack regs, but don't pass a
998 block boundary. */
999 i1 = NULL;
1000 if (current_block && insn != current_block->head)
1001 {
1002 rtx tmp = PREV_INSN (insn);
1003 rtx limit = PREV_INSN (current_block->head);
1004 while (tmp != limit)
1005 {
1006 if (GET_CODE (tmp) == CODE_LABEL
1007 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1008 || (GET_CODE (tmp) == INSN
1009 && stack_regs_mentioned (tmp)))
1010 {
1011 i1 = tmp;
1012 break;
1013 }
1014 tmp = PREV_INSN (tmp);
1015 }
1016 }
1017
1018 if (i1 != NULL_RTX
1019 && (i1set = single_set (i1)) != NULL_RTX)
1020 {
1021 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1022 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1023
1024 /* If the previous register stack push was from the reg we are to
1025 swap with, omit the swap. */
1026
1027 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1028 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1029 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1030 return;
1031
1032 /* If the previous insn wrote to the reg we are to swap with,
1033 omit the swap. */
1034
1035 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1036 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1037 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1038 return;
1039 }
1040
1041 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1042 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1043
1044 if (i1)
1045 emit_block_insn_after (swap_rtx, i1, current_block);
1046 else if (current_block)
1047 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1048 else
1049 emit_insn_before (swap_rtx, insn);
1050 }
1051 \f
1052 /* Handle a move to or from a stack register in PAT, which is in INSN.
1053 REGSTACK is the current stack. */
1054
1055 static void
1056 move_for_stack_reg (insn, regstack, pat)
1057 rtx insn;
1058 stack regstack;
1059 rtx pat;
1060 {
1061 rtx *psrc = get_true_reg (&SET_SRC (pat));
1062 rtx *pdest = get_true_reg (&SET_DEST (pat));
1063 rtx src, dest;
1064 rtx note;
1065
1066 src = *psrc; dest = *pdest;
1067
1068 if (STACK_REG_P (src) && STACK_REG_P (dest))
1069 {
1070 /* Write from one stack reg to another. If SRC dies here, then
1071 just change the register mapping and delete the insn. */
1072
1073 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1074 if (note)
1075 {
1076 int i;
1077
1078 /* If this is a no-op move, there must not be a REG_DEAD note. */
1079 if (REGNO (src) == REGNO (dest))
1080 abort ();
1081
1082 for (i = regstack->top; i >= 0; i--)
1083 if (regstack->reg[i] == REGNO (src))
1084 break;
1085
1086 /* The source must be live, and the dest must be dead. */
1087 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1088 abort ();
1089
1090 /* It is possible that the dest is unused after this insn.
1091 If so, just pop the src. */
1092
1093 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1094 {
1095 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1096
1097 delete_insn_for_stacker (insn);
1098 return;
1099 }
1100
1101 regstack->reg[i] = REGNO (dest);
1102
1103 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1104 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1105
1106 delete_insn_for_stacker (insn);
1107
1108 return;
1109 }
1110
1111 /* The source reg does not die. */
1112
1113 /* If this appears to be a no-op move, delete it, or else it
1114 will confuse the machine description output patterns. But if
1115 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1116 for REG_UNUSED will not work for deleted insns. */
1117
1118 if (REGNO (src) == REGNO (dest))
1119 {
1120 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1121 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1122
1123 delete_insn_for_stacker (insn);
1124 return;
1125 }
1126
1127 /* The destination ought to be dead */
1128 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1129 abort ();
1130
1131 replace_reg (psrc, get_hard_regnum (regstack, src));
1132
1133 regstack->reg[++regstack->top] = REGNO (dest);
1134 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1135 replace_reg (pdest, FIRST_STACK_REG);
1136 }
1137 else if (STACK_REG_P (src))
1138 {
1139 /* Save from a stack reg to MEM, or possibly integer reg. Since
1140 only top of stack may be saved, emit an exchange first if
1141 needs be. */
1142
1143 emit_swap_insn (insn, regstack, src);
1144
1145 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1146 if (note)
1147 {
1148 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1149 regstack->top--;
1150 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1151 }
1152 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1153 && regstack->top < REG_STACK_SIZE - 1)
1154 {
1155 /* A 387 cannot write an XFmode value to a MEM without
1156 clobbering the source reg. The output code can handle
1157 this by reading back the value from the MEM.
1158 But it is more efficient to use a temp register if one is
1159 available. Push the source value here if the register
1160 stack is not full, and then write the value to memory via
1161 a pop. */
1162 rtx push_rtx, push_insn;
1163 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1164
1165 if (GET_MODE (src) == TFmode)
1166 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1167 else
1168 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1169 push_insn = emit_insn_before (push_rtx, insn);
1170 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1171 REG_NOTES (insn));
1172 }
1173
1174 replace_reg (psrc, FIRST_STACK_REG);
1175 }
1176 else if (STACK_REG_P (dest))
1177 {
1178 /* Load from MEM, or possibly integer REG or constant, into the
1179 stack regs. The actual target is always the top of the
1180 stack. The stack mapping is changed to reflect that DEST is
1181 now at top of stack. */
1182
1183 /* The destination ought to be dead */
1184 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1185 abort ();
1186
1187 if (regstack->top >= REG_STACK_SIZE)
1188 abort ();
1189
1190 regstack->reg[++regstack->top] = REGNO (dest);
1191 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1192 replace_reg (pdest, FIRST_STACK_REG);
1193 }
1194 else
1195 abort ();
1196 }
1197 \f
1198 /* Swap the condition on a branch, if there is one. Return true if we
1199 found a condition to swap. False if the condition was not used as
1200 such. */
1201
1202 static int
1203 swap_rtx_condition_1 (pat)
1204 rtx pat;
1205 {
1206 register const char *fmt;
1207 register int i, r = 0;
1208
1209 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1210 {
1211 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1212 r = 1;
1213 }
1214 else
1215 {
1216 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1217 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1218 {
1219 if (fmt[i] == 'E')
1220 {
1221 register int j;
1222
1223 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1224 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1225 }
1226 else if (fmt[i] == 'e')
1227 r |= swap_rtx_condition_1 (XEXP (pat, i));
1228 }
1229 }
1230
1231 return r;
1232 }
1233
1234 static int
1235 swap_rtx_condition (insn)
1236 rtx insn;
1237 {
1238 rtx pat = PATTERN (insn);
1239
1240 /* We're looking for a single set to cc0 or an HImode temporary. */
1241
1242 if (GET_CODE (pat) == SET
1243 && GET_CODE (SET_DEST (pat)) == REG
1244 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1245 {
1246 insn = next_flags_user (insn);
1247 if (insn == NULL_RTX)
1248 return 0;
1249 pat = PATTERN (insn);
1250 }
1251
1252 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1253 not doing anything with the cc value right now. We may be able to
1254 search for one though. */
1255
1256 if (GET_CODE (pat) == SET
1257 && GET_CODE (SET_SRC (pat)) == UNSPEC
1258 && XINT (SET_SRC (pat), 1) == 9)
1259 {
1260 rtx dest = SET_DEST (pat);
1261
1262 /* Search forward looking for the first use of this value.
1263 Stop at block boundaries. */
1264 while (insn != current_block->end)
1265 {
1266 insn = NEXT_INSN (insn);
1267 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1268 break;
1269 if (GET_CODE (insn) == CALL_INSN)
1270 return 0;
1271 }
1272
1273 /* So we've found the insn using this value. If it is anything
1274 other than sahf, aka unspec 10, or the value does not die
1275 (meaning we'd have to search further), then we must give up. */
1276 pat = PATTERN (insn);
1277 if (GET_CODE (pat) != SET
1278 || GET_CODE (SET_SRC (pat)) != UNSPEC
1279 || XINT (SET_SRC (pat), 1) != 10
1280 || ! dead_or_set_p (insn, dest))
1281 return 0;
1282
1283 /* Now we are prepared to handle this as a normal cc0 setter. */
1284 insn = next_flags_user (insn);
1285 if (insn == NULL_RTX)
1286 return 0;
1287 pat = PATTERN (insn);
1288 }
1289
1290 if (swap_rtx_condition_1 (pat))
1291 {
1292 int fail = 0;
1293 INSN_CODE (insn) = -1;
1294 if (recog_memoized (insn) == -1)
1295 fail = 1;
1296 /* In case the flags don't die here, recurse to try fix
1297 following user too. */
1298 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1299 {
1300 insn = next_flags_user (insn);
1301 if (!insn || !swap_rtx_condition (insn))
1302 fail = 1;
1303 }
1304 if (fail)
1305 {
1306 swap_rtx_condition_1 (pat);
1307 return 0;
1308 }
1309 return 1;
1310 }
1311 return 0;
1312 }
1313
1314 /* Handle a comparison. Special care needs to be taken to avoid
1315 causing comparisons that a 387 cannot do correctly, such as EQ.
1316
1317 Also, a pop insn may need to be emitted. The 387 does have an
1318 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1319 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1320 set up. */
1321
1322 static void
1323 compare_for_stack_reg (insn, regstack, pat_src)
1324 rtx insn;
1325 stack regstack;
1326 rtx pat_src;
1327 {
1328 rtx *src1, *src2;
1329 rtx src1_note, src2_note;
1330 rtx flags_user;
1331
1332 src1 = get_true_reg (&XEXP (pat_src, 0));
1333 src2 = get_true_reg (&XEXP (pat_src, 1));
1334 flags_user = next_flags_user (insn);
1335
1336 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1337 registers that die in this insn - move those to stack top first. */
1338 if ((! STACK_REG_P (*src1)
1339 || (STACK_REG_P (*src2)
1340 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1341 && swap_rtx_condition (insn))
1342 {
1343 rtx temp;
1344 temp = XEXP (pat_src, 0);
1345 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1346 XEXP (pat_src, 1) = temp;
1347
1348 src1 = get_true_reg (&XEXP (pat_src, 0));
1349 src2 = get_true_reg (&XEXP (pat_src, 1));
1350
1351 INSN_CODE (insn) = -1;
1352 }
1353
1354 /* We will fix any death note later. */
1355
1356 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1357
1358 if (STACK_REG_P (*src2))
1359 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1360 else
1361 src2_note = NULL_RTX;
1362
1363 emit_swap_insn (insn, regstack, *src1);
1364
1365 replace_reg (src1, FIRST_STACK_REG);
1366
1367 if (STACK_REG_P (*src2))
1368 replace_reg (src2, get_hard_regnum (regstack, *src2));
1369
1370 if (src1_note)
1371 {
1372 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1373 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1374 }
1375
1376 /* If the second operand dies, handle that. But if the operands are
1377 the same stack register, don't bother, because only one death is
1378 needed, and it was just handled. */
1379
1380 if (src2_note
1381 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1382 && REGNO (*src1) == REGNO (*src2)))
1383 {
1384 /* As a special case, two regs may die in this insn if src2 is
1385 next to top of stack and the top of stack also dies. Since
1386 we have already popped src1, "next to top of stack" is really
1387 at top (FIRST_STACK_REG) now. */
1388
1389 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1390 && src1_note)
1391 {
1392 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1393 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1394 }
1395 else
1396 {
1397 /* The 386 can only represent death of the first operand in
1398 the case handled above. In all other cases, emit a separate
1399 pop and remove the death note from here. */
1400
1401 /* link_cc0_insns (insn); */
1402
1403 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1404
1405 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1406 EMIT_AFTER);
1407 }
1408 }
1409 }
1410 \f
1411 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1412 is the current register layout. */
1413
1414 static void
1415 subst_stack_regs_pat (insn, regstack, pat)
1416 rtx insn;
1417 stack regstack;
1418 rtx pat;
1419 {
1420 rtx *dest, *src;
1421
1422 switch (GET_CODE (pat))
1423 {
1424 case USE:
1425 /* Deaths in USE insns can happen in non optimizing compilation.
1426 Handle them by popping the dying register. */
1427 src = get_true_reg (&XEXP (pat, 0));
1428 if (STACK_REG_P (*src)
1429 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1430 {
1431 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1432 return;
1433 }
1434 /* ??? Uninitialized USE should not happen. */
1435 else if (get_hard_regnum (regstack, *src) == -1)
1436 abort();
1437 break;
1438
1439 case CLOBBER:
1440 {
1441 rtx note;
1442
1443 dest = get_true_reg (&XEXP (pat, 0));
1444 if (STACK_REG_P (*dest))
1445 {
1446 note = find_reg_note (insn, REG_DEAD, *dest);
1447
1448 if (pat != PATTERN (insn))
1449 {
1450 /* The fix_truncdi_1 pattern wants to be able to allocate
1451 it's own scratch register. It does this by clobbering
1452 an fp reg so that it is assured of an empty reg-stack
1453 register. If the register is live, kill it now.
1454 Remove the DEAD/UNUSED note so we don't try to kill it
1455 later too. */
1456
1457 if (note)
1458 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1459 else
1460 {
1461 note = find_reg_note (insn, REG_UNUSED, *dest);
1462 if (!note)
1463 abort ();
1464 }
1465 remove_note (insn, note);
1466 replace_reg (dest, LAST_STACK_REG);
1467 }
1468 else
1469 {
1470 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1471 indicates an uninitialized value. Because reload removed
1472 all other clobbers, this must be due to a function
1473 returning without a value. Load up a NaN. */
1474
1475 if (! note
1476 && get_hard_regnum (regstack, *dest) == -1)
1477 {
1478 pat = gen_rtx_SET (VOIDmode,
1479 FP_MODE_REG (REGNO (*dest), SFmode),
1480 nan);
1481 PATTERN (insn) = pat;
1482 move_for_stack_reg (insn, regstack, pat);
1483 }
1484 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1485 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1486 {
1487 pat = gen_rtx_SET (VOIDmode,
1488 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1489 nan);
1490 PATTERN (insn) = pat;
1491 move_for_stack_reg (insn, regstack, pat);
1492 }
1493 }
1494 }
1495 break;
1496 }
1497
1498 case SET:
1499 {
1500 rtx *src1 = (rtx *) NULL_PTR, *src2;
1501 rtx src1_note, src2_note;
1502 rtx pat_src;
1503
1504 dest = get_true_reg (&SET_DEST (pat));
1505 src = get_true_reg (&SET_SRC (pat));
1506 pat_src = SET_SRC (pat);
1507
1508 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1509 if (STACK_REG_P (*src)
1510 || (STACK_REG_P (*dest)
1511 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1512 || GET_CODE (*src) == CONST_DOUBLE)))
1513 {
1514 move_for_stack_reg (insn, regstack, pat);
1515 break;
1516 }
1517
1518 switch (GET_CODE (pat_src))
1519 {
1520 case COMPARE:
1521 compare_for_stack_reg (insn, regstack, pat_src);
1522 break;
1523
1524 case CALL:
1525 {
1526 int count;
1527 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1528 --count >= 0;)
1529 {
1530 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1531 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1532 }
1533 }
1534 replace_reg (dest, FIRST_STACK_REG);
1535 break;
1536
1537 case REG:
1538 /* This is a `tstM2' case. */
1539 if (*dest != cc0_rtx)
1540 abort ();
1541 src1 = src;
1542
1543 /* Fall through. */
1544
1545 case FLOAT_TRUNCATE:
1546 case SQRT:
1547 case ABS:
1548 case NEG:
1549 /* These insns only operate on the top of the stack. DEST might
1550 be cc0_rtx if we're processing a tstM pattern. Also, it's
1551 possible that the tstM case results in a REG_DEAD note on the
1552 source. */
1553
1554 if (src1 == 0)
1555 src1 = get_true_reg (&XEXP (pat_src, 0));
1556
1557 emit_swap_insn (insn, regstack, *src1);
1558
1559 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1560
1561 if (STACK_REG_P (*dest))
1562 replace_reg (dest, FIRST_STACK_REG);
1563
1564 if (src1_note)
1565 {
1566 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1567 regstack->top--;
1568 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1569 }
1570
1571 replace_reg (src1, FIRST_STACK_REG);
1572 break;
1573
1574 case MINUS:
1575 case DIV:
1576 /* On i386, reversed forms of subM3 and divM3 exist for
1577 MODE_FLOAT, so the same code that works for addM3 and mulM3
1578 can be used. */
1579 case MULT:
1580 case PLUS:
1581 /* These insns can accept the top of stack as a destination
1582 from a stack reg or mem, or can use the top of stack as a
1583 source and some other stack register (possibly top of stack)
1584 as a destination. */
1585
1586 src1 = get_true_reg (&XEXP (pat_src, 0));
1587 src2 = get_true_reg (&XEXP (pat_src, 1));
1588
1589 /* We will fix any death note later. */
1590
1591 if (STACK_REG_P (*src1))
1592 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1593 else
1594 src1_note = NULL_RTX;
1595 if (STACK_REG_P (*src2))
1596 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1597 else
1598 src2_note = NULL_RTX;
1599
1600 /* If either operand is not a stack register, then the dest
1601 must be top of stack. */
1602
1603 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1604 emit_swap_insn (insn, regstack, *dest);
1605 else
1606 {
1607 /* Both operands are REG. If neither operand is already
1608 at the top of stack, choose to make the one that is the dest
1609 the new top of stack. */
1610
1611 int src1_hard_regnum, src2_hard_regnum;
1612
1613 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1614 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1615 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1616 abort ();
1617
1618 if (src1_hard_regnum != FIRST_STACK_REG
1619 && src2_hard_regnum != FIRST_STACK_REG)
1620 emit_swap_insn (insn, regstack, *dest);
1621 }
1622
1623 if (STACK_REG_P (*src1))
1624 replace_reg (src1, get_hard_regnum (regstack, *src1));
1625 if (STACK_REG_P (*src2))
1626 replace_reg (src2, get_hard_regnum (regstack, *src2));
1627
1628 if (src1_note)
1629 {
1630 rtx src1_reg = XEXP (src1_note, 0);
1631
1632 /* If the register that dies is at the top of stack, then
1633 the destination is somewhere else - merely substitute it.
1634 But if the reg that dies is not at top of stack, then
1635 move the top of stack to the dead reg, as though we had
1636 done the insn and then a store-with-pop. */
1637
1638 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1639 {
1640 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1641 replace_reg (dest, get_hard_regnum (regstack, *dest));
1642 }
1643 else
1644 {
1645 int regno = get_hard_regnum (regstack, src1_reg);
1646
1647 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1648 replace_reg (dest, regno);
1649
1650 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1651 = regstack->reg[regstack->top];
1652 }
1653
1654 CLEAR_HARD_REG_BIT (regstack->reg_set,
1655 REGNO (XEXP (src1_note, 0)));
1656 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1657 regstack->top--;
1658 }
1659 else if (src2_note)
1660 {
1661 rtx src2_reg = XEXP (src2_note, 0);
1662 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1663 {
1664 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1665 replace_reg (dest, get_hard_regnum (regstack, *dest));
1666 }
1667 else
1668 {
1669 int regno = get_hard_regnum (regstack, src2_reg);
1670
1671 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1672 replace_reg (dest, regno);
1673
1674 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1675 = regstack->reg[regstack->top];
1676 }
1677
1678 CLEAR_HARD_REG_BIT (regstack->reg_set,
1679 REGNO (XEXP (src2_note, 0)));
1680 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1681 regstack->top--;
1682 }
1683 else
1684 {
1685 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1686 replace_reg (dest, get_hard_regnum (regstack, *dest));
1687 }
1688
1689 /* Keep operand 1 maching with destination. */
1690 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1691 && REG_P (*src1) && REG_P (*src2)
1692 && REGNO (*src1) != REGNO (*dest))
1693 {
1694 int tmp = REGNO (*src1);
1695 replace_reg (src1, REGNO (*src2));
1696 replace_reg (src2, tmp);
1697 }
1698 break;
1699
1700 case UNSPEC:
1701 switch (XINT (pat_src, 1))
1702 {
1703 case 1: /* sin */
1704 case 2: /* cos */
1705 /* These insns only operate on the top of the stack. */
1706
1707 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1708
1709 emit_swap_insn (insn, regstack, *src1);
1710
1711 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1712
1713 if (STACK_REG_P (*dest))
1714 replace_reg (dest, FIRST_STACK_REG);
1715
1716 if (src1_note)
1717 {
1718 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1719 regstack->top--;
1720 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1721 }
1722
1723 replace_reg (src1, FIRST_STACK_REG);
1724 break;
1725
1726 case 10:
1727 /* (unspec [(unspec [(compare ..)] 9)] 10)
1728 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1729 matches the PPRO fcomi instruction. */
1730
1731 pat_src = XVECEXP (pat_src, 0, 0);
1732 if (GET_CODE (pat_src) != UNSPEC
1733 || XINT (pat_src, 1) != 9)
1734 abort ();
1735 /* FALLTHRU */
1736
1737 case 9:
1738 /* (unspec [(compare ..)] 9) */
1739 /* Combined fcomp+fnstsw generated for doing well with
1740 CSE. When optimizing this would have been broken
1741 up before now. */
1742
1743 pat_src = XVECEXP (pat_src, 0, 0);
1744 if (GET_CODE (pat_src) != COMPARE)
1745 abort ();
1746
1747 compare_for_stack_reg (insn, regstack, pat_src);
1748 break;
1749
1750 default:
1751 abort ();
1752 }
1753 break;
1754
1755 case IF_THEN_ELSE:
1756 /* This insn requires the top of stack to be the destination. */
1757
1758 /* If the comparison operator is an FP comparison operator,
1759 it is handled correctly by compare_for_stack_reg () who
1760 will move the destination to the top of stack. But if the
1761 comparison operator is not an FP comparison operator, we
1762 have to handle it here. */
1763 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1764 && REGNO (*dest) != regstack->reg[regstack->top])
1765 emit_swap_insn (insn, regstack, *dest);
1766
1767 src1 = get_true_reg (&XEXP (pat_src, 1));
1768 src2 = get_true_reg (&XEXP (pat_src, 2));
1769
1770 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1771 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1772
1773 {
1774 rtx src_note [3];
1775 int i;
1776
1777 src_note[0] = 0;
1778 src_note[1] = src1_note;
1779 src_note[2] = src2_note;
1780
1781 if (STACK_REG_P (*src1))
1782 replace_reg (src1, get_hard_regnum (regstack, *src1));
1783 if (STACK_REG_P (*src2))
1784 replace_reg (src2, get_hard_regnum (regstack, *src2));
1785
1786 for (i = 1; i <= 2; i++)
1787 if (src_note [i])
1788 {
1789 int regno = REGNO (XEXP (src_note[i], 0));
1790
1791 /* If the register that dies is not at the top of
1792 stack, then move the top of stack to the dead reg */
1793 if (regno != regstack->reg[regstack->top])
1794 {
1795 remove_regno_note (insn, REG_DEAD, regno);
1796 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1797 EMIT_AFTER);
1798 }
1799 else
1800 {
1801 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1802 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1803 regstack->top--;
1804 }
1805 }
1806 }
1807
1808 /* Make dest the top of stack. Add dest to regstack if
1809 not present. */
1810 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1811 regstack->reg[++regstack->top] = REGNO (*dest);
1812 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1813 replace_reg (dest, FIRST_STACK_REG);
1814 break;
1815
1816 default:
1817 abort ();
1818 }
1819 break;
1820 }
1821
1822 default:
1823 break;
1824 }
1825 }
1826 \f
1827 /* Substitute hard regnums for any stack regs in INSN, which has
1828 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1829 before the insn, and is updated with changes made here.
1830
1831 There are several requirements and assumptions about the use of
1832 stack-like regs in asm statements. These rules are enforced by
1833 record_asm_stack_regs; see comments there for details. Any
1834 asm_operands left in the RTL at this point may be assume to meet the
1835 requirements, since record_asm_stack_regs removes any problem asm. */
1836
1837 static void
1838 subst_asm_stack_regs (insn, regstack)
1839 rtx insn;
1840 stack regstack;
1841 {
1842 rtx body = PATTERN (insn);
1843 int alt;
1844
1845 rtx *note_reg; /* Array of note contents */
1846 rtx **note_loc; /* Address of REG field of each note */
1847 enum reg_note *note_kind; /* The type of each note */
1848
1849 rtx *clobber_reg = 0;
1850 rtx **clobber_loc = 0;
1851
1852 struct stack_def temp_stack;
1853 int n_notes;
1854 int n_clobbers;
1855 rtx note;
1856 int i;
1857 int n_inputs, n_outputs;
1858
1859 if (! check_asm_stack_operands (insn))
1860 return;
1861
1862 /* Find out what the constraints required. If no constraint
1863 alternative matches, that is a compiler bug: we should have caught
1864 such an insn in check_asm_stack_operands. */
1865 extract_insn (insn);
1866 constrain_operands (1);
1867 alt = which_alternative;
1868
1869 preprocess_constraints ();
1870
1871 n_inputs = get_asm_operand_n_inputs (body);
1872 n_outputs = recog_data.n_operands - n_inputs;
1873
1874 if (alt < 0)
1875 abort ();
1876
1877 /* Strip SUBREGs here to make the following code simpler. */
1878 for (i = 0; i < recog_data.n_operands; i++)
1879 if (GET_CODE (recog_data.operand[i]) == SUBREG
1880 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1881 {
1882 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1883 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1884 }
1885
1886 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1887
1888 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1889 i++;
1890
1891 note_reg = (rtx *) alloca (i * sizeof (rtx));
1892 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1893 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1894
1895 n_notes = 0;
1896 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1897 {
1898 rtx reg = XEXP (note, 0);
1899 rtx *loc = & XEXP (note, 0);
1900
1901 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1902 {
1903 loc = & SUBREG_REG (reg);
1904 reg = SUBREG_REG (reg);
1905 }
1906
1907 if (STACK_REG_P (reg)
1908 && (REG_NOTE_KIND (note) == REG_DEAD
1909 || REG_NOTE_KIND (note) == REG_UNUSED))
1910 {
1911 note_reg[n_notes] = reg;
1912 note_loc[n_notes] = loc;
1913 note_kind[n_notes] = REG_NOTE_KIND (note);
1914 n_notes++;
1915 }
1916 }
1917
1918 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1919
1920 n_clobbers = 0;
1921
1922 if (GET_CODE (body) == PARALLEL)
1923 {
1924 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1925 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1926
1927 for (i = 0; i < XVECLEN (body, 0); i++)
1928 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1929 {
1930 rtx clobber = XVECEXP (body, 0, i);
1931 rtx reg = XEXP (clobber, 0);
1932 rtx *loc = & XEXP (clobber, 0);
1933
1934 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1935 {
1936 loc = & SUBREG_REG (reg);
1937 reg = SUBREG_REG (reg);
1938 }
1939
1940 if (STACK_REG_P (reg))
1941 {
1942 clobber_reg[n_clobbers] = reg;
1943 clobber_loc[n_clobbers] = loc;
1944 n_clobbers++;
1945 }
1946 }
1947 }
1948
1949 temp_stack = *regstack;
1950
1951 /* Put the input regs into the desired place in TEMP_STACK. */
1952
1953 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1954 if (STACK_REG_P (recog_data.operand[i])
1955 && reg_class_subset_p (recog_op_alt[i][alt].class,
1956 FLOAT_REGS)
1957 && recog_op_alt[i][alt].class != FLOAT_REGS)
1958 {
1959 /* If an operand needs to be in a particular reg in
1960 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1961 these constraints are for single register classes, and
1962 reload guaranteed that operand[i] is already in that class,
1963 we can just use REGNO (recog_data.operand[i]) to know which
1964 actual reg this operand needs to be in. */
1965
1966 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1967
1968 if (regno < 0)
1969 abort ();
1970
1971 if (regno != REGNO (recog_data.operand[i]))
1972 {
1973 /* recog_data.operand[i] is not in the right place. Find
1974 it and swap it with whatever is already in I's place.
1975 K is where recog_data.operand[i] is now. J is where it
1976 should be. */
1977 int j, k, temp;
1978
1979 k = temp_stack.top - (regno - FIRST_STACK_REG);
1980 j = (temp_stack.top
1981 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
1982
1983 temp = temp_stack.reg[k];
1984 temp_stack.reg[k] = temp_stack.reg[j];
1985 temp_stack.reg[j] = temp;
1986 }
1987 }
1988
1989 /* Emit insns before INSN to make sure the reg-stack is in the right
1990 order. */
1991
1992 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1993
1994 /* Make the needed input register substitutions. Do death notes and
1995 clobbers too, because these are for inputs, not outputs. */
1996
1997 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1998 if (STACK_REG_P (recog_data.operand[i]))
1999 {
2000 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2001
2002 if (regnum < 0)
2003 abort ();
2004
2005 replace_reg (recog_data.operand_loc[i], regnum);
2006 }
2007
2008 for (i = 0; i < n_notes; i++)
2009 if (note_kind[i] == REG_DEAD)
2010 {
2011 int regnum = get_hard_regnum (regstack, note_reg[i]);
2012
2013 if (regnum < 0)
2014 abort ();
2015
2016 replace_reg (note_loc[i], regnum);
2017 }
2018
2019 for (i = 0; i < n_clobbers; i++)
2020 {
2021 /* It's OK for a CLOBBER to reference a reg that is not live.
2022 Don't try to replace it in that case. */
2023 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2024
2025 if (regnum >= 0)
2026 {
2027 /* Sigh - clobbers always have QImode. But replace_reg knows
2028 that these regs can't be MODE_INT and will abort. Just put
2029 the right reg there without calling replace_reg. */
2030
2031 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2032 }
2033 }
2034
2035 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2036
2037 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2038 if (STACK_REG_P (recog_data.operand[i]))
2039 {
2040 /* An input reg is implicitly popped if it is tied to an
2041 output, or if there is a CLOBBER for it. */
2042 int j;
2043
2044 for (j = 0; j < n_clobbers; j++)
2045 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2046 break;
2047
2048 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2049 {
2050 /* recog_data.operand[i] might not be at the top of stack.
2051 But that's OK, because all we need to do is pop the
2052 right number of regs off of the top of the reg-stack.
2053 record_asm_stack_regs guaranteed that all implicitly
2054 popped regs were grouped at the top of the reg-stack. */
2055
2056 CLEAR_HARD_REG_BIT (regstack->reg_set,
2057 regstack->reg[regstack->top]);
2058 regstack->top--;
2059 }
2060 }
2061
2062 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2063 Note that there isn't any need to substitute register numbers.
2064 ??? Explain why this is true. */
2065
2066 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2067 {
2068 /* See if there is an output for this hard reg. */
2069 int j;
2070
2071 for (j = 0; j < n_outputs; j++)
2072 if (STACK_REG_P (recog_data.operand[j])
2073 && REGNO (recog_data.operand[j]) == i)
2074 {
2075 regstack->reg[++regstack->top] = i;
2076 SET_HARD_REG_BIT (regstack->reg_set, i);
2077 break;
2078 }
2079 }
2080
2081 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2082 input that the asm didn't implicitly pop. If the asm didn't
2083 implicitly pop an input reg, that reg will still be live.
2084
2085 Note that we can't use find_regno_note here: the register numbers
2086 in the death notes have already been substituted. */
2087
2088 for (i = 0; i < n_outputs; i++)
2089 if (STACK_REG_P (recog_data.operand[i]))
2090 {
2091 int j;
2092
2093 for (j = 0; j < n_notes; j++)
2094 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2095 && note_kind[j] == REG_UNUSED)
2096 {
2097 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2098 EMIT_AFTER);
2099 break;
2100 }
2101 }
2102
2103 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2104 if (STACK_REG_P (recog_data.operand[i]))
2105 {
2106 int j;
2107
2108 for (j = 0; j < n_notes; j++)
2109 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2110 && note_kind[j] == REG_DEAD
2111 && TEST_HARD_REG_BIT (regstack->reg_set,
2112 REGNO (recog_data.operand[i])))
2113 {
2114 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2115 EMIT_AFTER);
2116 break;
2117 }
2118 }
2119 }
2120 \f
2121 /* Substitute stack hard reg numbers for stack virtual registers in
2122 INSN. Non-stack register numbers are not changed. REGSTACK is the
2123 current stack content. Insns may be emitted as needed to arrange the
2124 stack for the 387 based on the contents of the insn. */
2125
2126 static void
2127 subst_stack_regs (insn, regstack)
2128 rtx insn;
2129 stack regstack;
2130 {
2131 register rtx *note_link, note;
2132 register int i;
2133
2134 if (GET_CODE (insn) == CALL_INSN)
2135 {
2136 int top = regstack->top;
2137
2138 /* If there are any floating point parameters to be passed in
2139 registers for this call, make sure they are in the right
2140 order. */
2141
2142 if (top >= 0)
2143 {
2144 straighten_stack (PREV_INSN (insn), regstack);
2145
2146 /* Now mark the arguments as dead after the call. */
2147
2148 while (regstack->top >= 0)
2149 {
2150 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2151 regstack->top--;
2152 }
2153 }
2154 }
2155
2156 /* Do the actual substitution if any stack regs are mentioned.
2157 Since we only record whether entire insn mentions stack regs, and
2158 subst_stack_regs_pat only works for patterns that contain stack regs,
2159 we must check each pattern in a parallel here. A call_value_pop could
2160 fail otherwise. */
2161
2162 if (stack_regs_mentioned (insn))
2163 {
2164 int n_operands = asm_noperands (PATTERN (insn));
2165 if (n_operands >= 0)
2166 {
2167 /* This insn is an `asm' with operands. Decode the operands,
2168 decide how many are inputs, and do register substitution.
2169 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2170
2171 subst_asm_stack_regs (insn, regstack);
2172 return;
2173 }
2174
2175 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2176 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2177 {
2178 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2179 subst_stack_regs_pat (insn, regstack,
2180 XVECEXP (PATTERN (insn), 0, i));
2181 }
2182 else
2183 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2184 }
2185
2186 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2187 REG_UNUSED will already have been dealt with, so just return. */
2188
2189 if (GET_CODE (insn) == NOTE)
2190 return;
2191
2192 /* If there is a REG_UNUSED note on a stack register on this insn,
2193 the indicated reg must be popped. The REG_UNUSED note is removed,
2194 since the form of the newly emitted pop insn references the reg,
2195 making it no longer `unset'. */
2196
2197 note_link = &REG_NOTES(insn);
2198 for (note = *note_link; note; note = XEXP (note, 1))
2199 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2200 {
2201 *note_link = XEXP (note, 1);
2202 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2203 }
2204 else
2205 note_link = &XEXP (note, 1);
2206 }
2207 \f
2208 /* Change the organization of the stack so that it fits a new basic
2209 block. Some registers might have to be popped, but there can never be
2210 a register live in the new block that is not now live.
2211
2212 Insert any needed insns before or after INSN, as indicated by
2213 WHERE. OLD is the original stack layout, and NEW is the desired
2214 form. OLD is updated to reflect the code emitted, ie, it will be
2215 the same as NEW upon return.
2216
2217 This function will not preserve block_end[]. But that information
2218 is no longer needed once this has executed. */
2219
2220 static void
2221 change_stack (insn, old, new, where)
2222 rtx insn;
2223 stack old;
2224 stack new;
2225 enum emit_where where;
2226 {
2227 int reg;
2228 int update_end = 0;
2229
2230 /* We will be inserting new insns "backwards". If we are to insert
2231 after INSN, find the next insn, and insert before it. */
2232
2233 if (where == EMIT_AFTER)
2234 {
2235 if (current_block && current_block->end == insn)
2236 update_end = 1;
2237 insn = NEXT_INSN (insn);
2238 }
2239
2240 /* Pop any registers that are not needed in the new block. */
2241
2242 for (reg = old->top; reg >= 0; reg--)
2243 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2244 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2245 EMIT_BEFORE);
2246
2247 if (new->top == -2)
2248 {
2249 /* If the new block has never been processed, then it can inherit
2250 the old stack order. */
2251
2252 new->top = old->top;
2253 memcpy (new->reg, old->reg, sizeof (new->reg));
2254 }
2255 else
2256 {
2257 /* This block has been entered before, and we must match the
2258 previously selected stack order. */
2259
2260 /* By now, the only difference should be the order of the stack,
2261 not their depth or liveliness. */
2262
2263 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2264 abort ();
2265 win:
2266 if (old->top != new->top)
2267 abort ();
2268
2269 /* If the stack is not empty (new->top != -1), loop here emitting
2270 swaps until the stack is correct.
2271
2272 The worst case number of swaps emitted is N + 2, where N is the
2273 depth of the stack. In some cases, the reg at the top of
2274 stack may be correct, but swapped anyway in order to fix
2275 other regs. But since we never swap any other reg away from
2276 its correct slot, this algorithm will converge. */
2277
2278 if (new->top != -1)
2279 do
2280 {
2281 /* Swap the reg at top of stack into the position it is
2282 supposed to be in, until the correct top of stack appears. */
2283
2284 while (old->reg[old->top] != new->reg[new->top])
2285 {
2286 for (reg = new->top; reg >= 0; reg--)
2287 if (new->reg[reg] == old->reg[old->top])
2288 break;
2289
2290 if (reg == -1)
2291 abort ();
2292
2293 emit_swap_insn (insn, old,
2294 FP_MODE_REG (old->reg[reg], DFmode));
2295 }
2296
2297 /* See if any regs remain incorrect. If so, bring an
2298 incorrect reg to the top of stack, and let the while loop
2299 above fix it. */
2300
2301 for (reg = new->top; reg >= 0; reg--)
2302 if (new->reg[reg] != old->reg[reg])
2303 {
2304 emit_swap_insn (insn, old,
2305 FP_MODE_REG (old->reg[reg], DFmode));
2306 break;
2307 }
2308 } while (reg >= 0);
2309
2310 /* At this point there must be no differences. */
2311
2312 for (reg = old->top; reg >= 0; reg--)
2313 if (old->reg[reg] != new->reg[reg])
2314 abort ();
2315 }
2316
2317 if (update_end)
2318 current_block->end = PREV_INSN (insn);
2319 }
2320 \f
2321 /* Print stack configuration. */
2322
2323 static void
2324 print_stack (file, s)
2325 FILE *file;
2326 stack s;
2327 {
2328 if (! file)
2329 return;
2330
2331 if (s->top == -2)
2332 fprintf (file, "uninitialized\n");
2333 else if (s->top == -1)
2334 fprintf (file, "empty\n");
2335 else
2336 {
2337 int i;
2338 fputs ("[ ", file);
2339 for (i = 0; i <= s->top; ++i)
2340 fprintf (file, "%d ", s->reg[i]);
2341 fputs ("]\n", file);
2342 }
2343 }
2344 \f
2345 /* This function was doing life analysis. We now let the regular live
2346 code do it's job, so we only need to check some extra invariants
2347 that reg-stack expects. Primary among these being that all registers
2348 are initialized before use.
2349
2350 The function returns true when code was emitted to CFG edges and
2351 commit_edge_insertions needs to be called. */
2352
2353 static int
2354 convert_regs_entry ()
2355 {
2356 int inserted = 0, i;
2357 edge e;
2358
2359 for (i = n_basic_blocks - 1; i >= 0; --i)
2360 {
2361 basic_block block = BASIC_BLOCK (i);
2362 block_info bi = BLOCK_INFO (block);
2363 int reg;
2364
2365 /* Set current register status at last instruction `uninitialized'. */
2366 bi->stack_in.top = -2;
2367
2368 /* Copy live_at_end and live_at_start into temporaries. */
2369 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2370 {
2371 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2372 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2373 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2374 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2375 }
2376 }
2377
2378 /* Load something into each stack register live at function entry.
2379 Such live registers can be caused by uninitialized variables or
2380 functions not returning values on all paths. In order to keep
2381 the push/pop code happy, and to not scrog the register stack, we
2382 must put something in these registers. Use a QNaN.
2383
2384 Note that we are insertting converted code here. This code is
2385 never seen by the convert_regs pass. */
2386
2387 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2388 {
2389 basic_block block = e->dest;
2390 block_info bi = BLOCK_INFO (block);
2391 int reg, top = -1;
2392
2393 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2394 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2395 {
2396 rtx init;
2397
2398 bi->stack_in.reg[++top] = reg;
2399
2400 init = gen_rtx_SET (VOIDmode,
2401 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2402 nan);
2403 insert_insn_on_edge (init, e);
2404 inserted = 1;
2405 }
2406
2407 bi->stack_in.top = top;
2408 }
2409
2410 return inserted;
2411 }
2412
2413 /* Construct the desired stack for function exit. This will either
2414 be `empty', or the function return value at top-of-stack. */
2415
2416 static void
2417 convert_regs_exit ()
2418 {
2419 int value_reg_low, value_reg_high;
2420 stack output_stack;
2421 rtx retvalue;
2422
2423 retvalue = stack_result (current_function_decl);
2424 value_reg_low = value_reg_high = -1;
2425 if (retvalue)
2426 {
2427 value_reg_low = REGNO (retvalue);
2428 value_reg_high = value_reg_low
2429 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2430 }
2431
2432 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2433 if (value_reg_low == -1)
2434 output_stack->top = -1;
2435 else
2436 {
2437 int reg;
2438
2439 output_stack->top = value_reg_high - value_reg_low;
2440 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2441 {
2442 output_stack->reg[reg - value_reg_low] = reg;
2443 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2444 }
2445 }
2446 }
2447
2448 /* Convert stack register references in one block. */
2449
2450 static int
2451 convert_regs_1 (file, block)
2452 FILE *file;
2453 basic_block block;
2454 {
2455 struct stack_def regstack, tmpstack;
2456 block_info bi = BLOCK_INFO (block);
2457 int inserted, reg;
2458 rtx insn, next;
2459 edge e;
2460
2461 current_block = block;
2462
2463 if (file)
2464 {
2465 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2466 print_stack (file, &bi->stack_in);
2467 }
2468
2469 /* Process all insns in this block. Keep track of NEXT so that we
2470 don't process insns emitted while substituting in INSN. */
2471 next = block->head;
2472 regstack = bi->stack_in;
2473 do
2474 {
2475 insn = next;
2476 next = NEXT_INSN (insn);
2477
2478 /* Ensure we have not missed a block boundary. */
2479 if (next == NULL)
2480 abort ();
2481 if (insn == block->end)
2482 next = NULL;
2483
2484 /* Don't bother processing unless there is a stack reg
2485 mentioned or if it's a CALL_INSN. */
2486 if (stack_regs_mentioned (insn)
2487 || GET_CODE (insn) == CALL_INSN)
2488 {
2489 if (file)
2490 {
2491 fprintf (file, " insn %d input stack: ",
2492 INSN_UID (insn));
2493 print_stack (file, &regstack);
2494 }
2495 subst_stack_regs (insn, &regstack);
2496 }
2497 }
2498 while (next);
2499
2500 if (file)
2501 {
2502 fprintf (file, "Expected live registers [");
2503 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2504 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2505 fprintf (file, " %d", reg);
2506 fprintf (file, " ]\nOutput stack: ");
2507 print_stack (file, &regstack);
2508 }
2509
2510 insn = block->end;
2511 if (GET_CODE (insn) == JUMP_INSN)
2512 insn = PREV_INSN (insn);
2513
2514 /* If the function is declared to return a value, but it returns one
2515 in only some cases, some registers might come live here. Emit
2516 necessary moves for them. */
2517
2518 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2519 {
2520 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2521 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2522 {
2523 rtx set;
2524
2525 if (file)
2526 {
2527 fprintf (file, "Emitting insn initializing reg %d\n",
2528 reg);
2529 }
2530
2531 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2532 nan);
2533 insn = emit_block_insn_after (set, insn, block);
2534 subst_stack_regs (insn, &regstack);
2535 }
2536 }
2537
2538 /* Something failed if the stack lives don't match. */
2539 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2540 abort ();
2541 win:
2542
2543 /* Adjust the stack of this block on exit to match the stack of the
2544 target block, or copy stack info into the stack of the successor
2545 of the successor hasn't been processed yet. */
2546 inserted = 0;
2547 for (e = block->succ; e ; e = e->succ_next)
2548 {
2549 basic_block target = e->dest;
2550 stack target_stack = &BLOCK_INFO (target)->stack_in;
2551
2552 if (file)
2553 fprintf (file, "Edge to block %d: ", target->index);
2554
2555 if (target_stack->top == -2)
2556 {
2557 /* The target block hasn't had a stack order selected.
2558 We need merely ensure that no pops are needed. */
2559 for (reg = regstack.top; reg >= 0; --reg)
2560 if (! TEST_HARD_REG_BIT (target_stack->reg_set,
2561 regstack.reg[reg]))
2562 break;
2563
2564 if (reg == -1)
2565 {
2566 if (file)
2567 fprintf (file, "new block; copying stack position\n");
2568
2569 /* change_stack kills values in regstack. */
2570 tmpstack = regstack;
2571
2572 change_stack (block->end, &tmpstack,
2573 target_stack, EMIT_AFTER);
2574 continue;
2575 }
2576
2577 if (file)
2578 fprintf (file, "new block; pops needed\n");
2579 }
2580 else
2581 {
2582 if (target_stack->top == regstack.top)
2583 {
2584 for (reg = target_stack->top; reg >= 0; --reg)
2585 if (target_stack->reg[reg] != regstack.reg[reg])
2586 break;
2587
2588 if (reg == -1)
2589 {
2590 if (file)
2591 fprintf (file, "no changes needed\n");
2592 continue;
2593 }
2594 }
2595
2596 if (file)
2597 {
2598 fprintf (file, "correcting stack to ");
2599 print_stack (file, target_stack);
2600 }
2601 }
2602
2603 /* Care for non-call EH edges specially. The normal return path have
2604 values in registers. These will be popped en masse by the unwind
2605 library. */
2606 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2607 target_stack->top = -1;
2608
2609 /* Other calls may appear to have values live in st(0), but the
2610 abnormal return path will not have actually loaded the values. */
2611 else if (e->flags & EDGE_ABNORMAL_CALL)
2612 {
2613 /* Assert that the lifetimes are as we expect -- one value
2614 live at st(0) on the end of the source block, and no
2615 values live at the beginning of the destination block. */
2616 HARD_REG_SET tmp;
2617
2618 CLEAR_HARD_REG_SET (tmp);
2619 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2620 abort();
2621 eh1:
2622
2623 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2624 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2625 abort();
2626 eh2:
2627
2628 target_stack->top = -1;
2629 }
2630
2631 /* It is better to output directly to the end of the block
2632 instead of to the edge, because emit_swap can do minimal
2633 insn scheduling. We can do this when there is only one
2634 edge out, and it is not abnormal. */
2635 else if (block->succ->succ_next == NULL
2636 && ! (e->flags & EDGE_ABNORMAL))
2637 {
2638 /* change_stack kills values in regstack. */
2639 tmpstack = regstack;
2640
2641 change_stack (block->end, &tmpstack, target_stack,
2642 (GET_CODE (block->end) == JUMP_INSN
2643 ? EMIT_BEFORE : EMIT_AFTER));
2644 }
2645 else
2646 {
2647 rtx seq, after;
2648
2649 /* We don't support abnormal edges. Global takes care to
2650 avoid any live register across them, so we should never
2651 have to insert instructions on such edges. */
2652 if (e->flags & EDGE_ABNORMAL)
2653 abort ();
2654
2655 current_block = NULL;
2656 start_sequence ();
2657
2658 /* ??? change_stack needs some point to emit insns after.
2659 Also needed to keep gen_sequence from returning a
2660 pattern as opposed to a sequence, which would lose
2661 REG_DEAD notes. */
2662 after = emit_note (NULL, NOTE_INSN_DELETED);
2663
2664 tmpstack = regstack;
2665 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2666
2667 seq = gen_sequence ();
2668 end_sequence ();
2669
2670 insert_insn_on_edge (seq, e);
2671 inserted = 1;
2672 current_block = block;
2673 }
2674 }
2675
2676 return inserted;
2677 }
2678
2679 /* Convert registers in all blocks reachable from BLOCK. */
2680
2681 static int
2682 convert_regs_2 (file, block)
2683 FILE *file;
2684 basic_block block;
2685 {
2686 basic_block *stack, *sp;
2687 int inserted;
2688
2689 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2690 sp = stack;
2691
2692 *sp++ = block;
2693 BLOCK_INFO (block)->done = 1;
2694
2695 inserted = 0;
2696 do
2697 {
2698 edge e;
2699
2700 block = *--sp;
2701 inserted |= convert_regs_1 (file, block);
2702
2703 for (e = block->succ; e ; e = e->succ_next)
2704 if (! BLOCK_INFO (e->dest)->done)
2705 {
2706 *sp++ = e->dest;
2707 BLOCK_INFO (e->dest)->done = 1;
2708 }
2709 }
2710 while (sp != stack);
2711
2712 return inserted;
2713 }
2714
2715 /* Traverse all basic blocks in a function, converting the register
2716 references in each insn from the "flat" register file that gcc uses,
2717 to the stack-like registers the 387 uses. */
2718
2719 static int
2720 convert_regs (file)
2721 FILE *file;
2722 {
2723 int inserted, i;
2724 edge e;
2725
2726 /* Initialize uninitialized registers on function entry. */
2727 inserted = convert_regs_entry ();
2728
2729 /* Construct the desired stack for function exit. */
2730 convert_regs_exit ();
2731 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2732
2733 /* ??? Future: process inner loops first, and give them arbitrary
2734 initial stacks which emit_swap_insn can modify. This ought to
2735 prevent double fxch that aften appears at the head of a loop. */
2736
2737 /* Process all blocks reachable from all entry points. */
2738 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2739 inserted |= convert_regs_2 (file, e->dest);
2740
2741 /* ??? Process all unreachable blocks. Though there's no excuse
2742 for keeping these even when not optimizing. */
2743 for (i = 0; i < n_basic_blocks; ++i)
2744 {
2745 basic_block b = BASIC_BLOCK (i);
2746 block_info bi = BLOCK_INFO (b);
2747
2748 if (! bi->done)
2749 {
2750 int reg;
2751
2752 /* Create an arbitrary input stack. */
2753 bi->stack_in.top = -1;
2754 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2755 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2756 bi->stack_in.reg[++bi->stack_in.top] = reg;
2757
2758 inserted |= convert_regs_2 (file, b);
2759 }
2760 }
2761
2762 if (inserted)
2763 commit_edge_insertions ();
2764
2765 if (file)
2766 fputc ('\n', file);
2767
2768 return inserted;
2769 }
2770 #endif /* STACK_REGS */