usage.adb: Change "pragma inline" to "pragma Inline" in information and error messages
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
24
25 * The form of the input:
26
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
36
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
44
45 * The form of the output:
46
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
52
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
55
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
59
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
62
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
66
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
71
72 * Methodology:
73
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
77
78 * asm_operands:
79
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
83
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
87
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
91
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
98
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
101
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
104
105 asm ("foo" : "=t" (a) : "f" (b));
106
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
112
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
115
116 The asm above would be written as
117
118 asm ("foo" : "=&t" (a) : "f" (b));
119
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
124
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
128
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
133
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
136
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
140
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
143
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
151
152 */
153 \f
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
173
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
176
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
179 stack registers. */
180 static GTY(()) varray_type stack_regs_mentioned_data;
181
182 #ifdef STACK_REGS
183
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
185
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
188
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
191 appropriately.
192
193 REG_SET indicates which registers are live. */
194
195 typedef struct stack_def
196 {
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
200 } *stack;
201
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
204
205 typedef struct block_info_def
206 {
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
212 to be visited. */
213 } *block_info;
214
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
216
217 /* Passed to change_stack to indicate where to emit insns. */
218 enum emit_where
219 {
220 EMIT_AFTER,
221 EMIT_BEFORE
222 };
223
224 /* The block we're currently working on. */
225 static basic_block current_block;
226
227 /* This is the register file for all register after conversion. */
228 static rtx
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
230
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
233
234 /* Used to initialize uninitialized registers. */
235 static rtx not_a_num;
236
237 /* Forward declarations */
238
239 static int stack_regs_mentioned_p (rtx pat);
240 static void straighten_stack (rtx, stack);
241 static void pop_stack (stack, int);
242 static rtx *get_true_reg (rtx *);
243
244 static int check_asm_stack_operands (rtx);
245 static int get_asm_operand_n_inputs (rtx);
246 static rtx stack_result (tree);
247 static void replace_reg (rtx *, int);
248 static void remove_regno_note (rtx, enum reg_note, unsigned int);
249 static int get_hard_regnum (stack, rtx);
250 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
251 static void emit_swap_insn (rtx, stack, rtx);
252 static void swap_to_top(rtx, stack, rtx, rtx);
253 static bool move_for_stack_reg (rtx, stack, rtx);
254 static int swap_rtx_condition_1 (rtx);
255 static int swap_rtx_condition (rtx);
256 static void compare_for_stack_reg (rtx, stack, rtx);
257 static bool subst_stack_regs_pat (rtx, stack, rtx);
258 static void subst_asm_stack_regs (rtx, stack);
259 static bool subst_stack_regs (rtx, stack);
260 static void change_stack (rtx, stack, stack, enum emit_where);
261 static int convert_regs_entry (void);
262 static void convert_regs_exit (void);
263 static int convert_regs_1 (FILE *, basic_block);
264 static int convert_regs_2 (FILE *, basic_block);
265 static int convert_regs (FILE *);
266 static void print_stack (FILE *, stack);
267 static rtx next_flags_user (rtx);
268 static void record_label_references (rtx, rtx);
269 static bool compensate_edge (edge, FILE *);
270 \f
271 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
272
273 static int
274 stack_regs_mentioned_p (rtx pat)
275 {
276 const char *fmt;
277 int i;
278
279 if (STACK_REG_P (pat))
280 return 1;
281
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
284 {
285 if (fmt[i] == 'E')
286 {
287 int j;
288
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
291 return 1;
292 }
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
294 return 1;
295 }
296
297 return 0;
298 }
299
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
301
302 int
303 stack_regs_mentioned (rtx insn)
304 {
305 unsigned int uid, max;
306 int test;
307
308 if (! INSN_P (insn) || !stack_regs_mentioned_data)
309 return 0;
310
311 uid = INSN_UID (insn);
312 max = VARRAY_SIZE (stack_regs_mentioned_data);
313 if (uid >= max)
314 {
315 /* Allocate some extra size to avoid too many reallocs, but
316 do not grow too quickly. */
317 max = uid + uid / 20;
318 VARRAY_GROW (stack_regs_mentioned_data, max);
319 }
320
321 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
322 if (test == 0)
323 {
324 /* This insn has yet to be examined. Do so now. */
325 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
326 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
327 }
328
329 return test == 1;
330 }
331 \f
332 static rtx ix86_flags_rtx;
333
334 static rtx
335 next_flags_user (rtx insn)
336 {
337 /* Search forward looking for the first use of this value.
338 Stop at block boundaries. */
339
340 while (insn != BB_END (current_block))
341 {
342 insn = NEXT_INSN (insn);
343
344 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
345 return insn;
346
347 if (CALL_P (insn))
348 return NULL_RTX;
349 }
350 return NULL_RTX;
351 }
352 \f
353 /* Reorganize the stack into ascending numbers,
354 after this insn. */
355
356 static void
357 straighten_stack (rtx insn, stack regstack)
358 {
359 struct stack_def temp_stack;
360 int top;
361
362 /* If there is only a single register on the stack, then the stack is
363 already in increasing order and no reorganization is needed.
364
365 Similarly if the stack is empty. */
366 if (regstack->top <= 0)
367 return;
368
369 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
370
371 for (top = temp_stack.top = regstack->top; top >= 0; top--)
372 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
373
374 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
375 }
376
377 /* Pop a register from the stack. */
378
379 static void
380 pop_stack (stack regstack, int regno)
381 {
382 int top = regstack->top;
383
384 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
385 regstack->top--;
386 /* If regno was not at the top of stack then adjust stack. */
387 if (regstack->reg [top] != regno)
388 {
389 int i;
390 for (i = regstack->top; i >= 0; i--)
391 if (regstack->reg [i] == regno)
392 {
393 int j;
394 for (j = i; j < top; j++)
395 regstack->reg [j] = regstack->reg [j + 1];
396 break;
397 }
398 }
399 }
400 \f
401 /* Convert register usage from "flat" register file usage to a "stack
402 register file. FILE is the dump file, if used.
403
404 Construct a CFG and run life analysis. Then convert each insn one
405 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
406 code duplication created when the converter inserts pop insns on
407 the edges. */
408
409 bool
410 reg_to_stack (FILE *file)
411 {
412 basic_block bb;
413 int i;
414 int max_uid;
415
416 /* Clean up previous run. */
417 stack_regs_mentioned_data = 0;
418
419 /* See if there is something to do. Flow analysis is quite
420 expensive so we might save some compilation time. */
421 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
422 if (regs_ever_live[i])
423 break;
424 if (i > LAST_STACK_REG)
425 return false;
426
427 /* Ok, floating point instructions exist. If not optimizing,
428 build the CFG and run life analysis.
429 Also need to rebuild life when superblock scheduling is done
430 as it don't update liveness yet. */
431 if (!optimize
432 || (flag_sched2_use_superblocks
433 && flag_schedule_insns_after_reload))
434 {
435 count_or_remove_death_notes (NULL, 1);
436 life_analysis (file, PROP_DEATH_NOTES);
437 }
438 mark_dfs_back_edges ();
439
440 /* Set up block info for each basic block. */
441 alloc_aux_for_blocks (sizeof (struct block_info_def));
442 FOR_EACH_BB_REVERSE (bb)
443 {
444 edge e;
445 edge_iterator ei;
446
447 FOR_EACH_EDGE (e, ei, bb->preds)
448 if (!(e->flags & EDGE_DFS_BACK)
449 && e->src != ENTRY_BLOCK_PTR)
450 BLOCK_INFO (bb)->predecessors++;
451 }
452
453 /* Create the replacement registers up front. */
454 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
455 {
456 enum machine_mode mode;
457 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
458 mode != VOIDmode;
459 mode = GET_MODE_WIDER_MODE (mode))
460 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
461 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
462 mode != VOIDmode;
463 mode = GET_MODE_WIDER_MODE (mode))
464 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
465 }
466
467 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
468
469 /* A QNaN for initializing uninitialized variables.
470
471 ??? We can't load from constant memory in PIC mode, because
472 we're inserting these instructions before the prologue and
473 the PIC register hasn't been set up. In that case, fall back
474 on zero, which we can get from `ldz'. */
475
476 if (flag_pic)
477 not_a_num = CONST0_RTX (SFmode);
478 else
479 {
480 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
481 not_a_num = force_const_mem (SFmode, not_a_num);
482 }
483
484 /* Allocate a cache for stack_regs_mentioned. */
485 max_uid = get_max_uid ();
486 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
487 "stack_regs_mentioned cache");
488
489 convert_regs (file);
490
491 free_aux_for_blocks ();
492 return true;
493 }
494 \f
495 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
496 label's chain of references, and note which insn contains each
497 reference. */
498
499 static void
500 record_label_references (rtx insn, rtx pat)
501 {
502 enum rtx_code code = GET_CODE (pat);
503 int i;
504 const char *fmt;
505
506 if (code == LABEL_REF)
507 {
508 rtx label = XEXP (pat, 0);
509 rtx ref;
510
511 gcc_assert (LABEL_P (label));
512
513 /* If this is an undefined label, LABEL_REFS (label) contains
514 garbage. */
515 if (INSN_UID (label) == 0)
516 return;
517
518 /* Don't make a duplicate in the code_label's chain. */
519
520 for (ref = LABEL_REFS (label);
521 ref && ref != label;
522 ref = LABEL_NEXTREF (ref))
523 if (CONTAINING_INSN (ref) == insn)
524 return;
525
526 CONTAINING_INSN (pat) = insn;
527 LABEL_NEXTREF (pat) = LABEL_REFS (label);
528 LABEL_REFS (label) = pat;
529
530 return;
531 }
532
533 fmt = GET_RTX_FORMAT (code);
534 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
535 {
536 if (fmt[i] == 'e')
537 record_label_references (insn, XEXP (pat, i));
538 if (fmt[i] == 'E')
539 {
540 int j;
541 for (j = 0; j < XVECLEN (pat, i); j++)
542 record_label_references (insn, XVECEXP (pat, i, j));
543 }
544 }
545 }
546 \f
547 /* Return a pointer to the REG expression within PAT. If PAT is not a
548 REG, possible enclosed by a conversion rtx, return the inner part of
549 PAT that stopped the search. */
550
551 static rtx *
552 get_true_reg (rtx *pat)
553 {
554 for (;;)
555 switch (GET_CODE (*pat))
556 {
557 case SUBREG:
558 /* Eliminate FP subregister accesses in favor of the
559 actual FP register in use. */
560 {
561 rtx subreg;
562 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
563 {
564 int regno_off = subreg_regno_offset (REGNO (subreg),
565 GET_MODE (subreg),
566 SUBREG_BYTE (*pat),
567 GET_MODE (*pat));
568 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
569 GET_MODE (subreg));
570 default:
571 return pat;
572 }
573 }
574 case FLOAT:
575 case FIX:
576 case FLOAT_EXTEND:
577 pat = & XEXP (*pat, 0);
578 break;
579
580 case FLOAT_TRUNCATE:
581 if (!flag_unsafe_math_optimizations)
582 return pat;
583 pat = & XEXP (*pat, 0);
584 break;
585 }
586 }
587 \f
588 /* Set if we find any malformed asms in a block. */
589 static bool any_malformed_asm;
590
591 /* There are many rules that an asm statement for stack-like regs must
592 follow. Those rules are explained at the top of this file: the rule
593 numbers below refer to that explanation. */
594
595 static int
596 check_asm_stack_operands (rtx insn)
597 {
598 int i;
599 int n_clobbers;
600 int malformed_asm = 0;
601 rtx body = PATTERN (insn);
602
603 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
604 char implicitly_dies[FIRST_PSEUDO_REGISTER];
605 int alt;
606
607 rtx *clobber_reg = 0;
608 int n_inputs, n_outputs;
609
610 /* Find out what the constraints require. If no constraint
611 alternative matches, this asm is malformed. */
612 extract_insn (insn);
613 constrain_operands (1);
614 alt = which_alternative;
615
616 preprocess_constraints ();
617
618 n_inputs = get_asm_operand_n_inputs (body);
619 n_outputs = recog_data.n_operands - n_inputs;
620
621 if (alt < 0)
622 {
623 malformed_asm = 1;
624 /* Avoid further trouble with this insn. */
625 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
626 return 0;
627 }
628
629 /* Strip SUBREGs here to make the following code simpler. */
630 for (i = 0; i < recog_data.n_operands; i++)
631 if (GET_CODE (recog_data.operand[i]) == SUBREG
632 && REG_P (SUBREG_REG (recog_data.operand[i])))
633 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
634
635 /* Set up CLOBBER_REG. */
636
637 n_clobbers = 0;
638
639 if (GET_CODE (body) == PARALLEL)
640 {
641 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
642
643 for (i = 0; i < XVECLEN (body, 0); i++)
644 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
645 {
646 rtx clobber = XVECEXP (body, 0, i);
647 rtx reg = XEXP (clobber, 0);
648
649 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
650 reg = SUBREG_REG (reg);
651
652 if (STACK_REG_P (reg))
653 {
654 clobber_reg[n_clobbers] = reg;
655 n_clobbers++;
656 }
657 }
658 }
659
660 /* Enforce rule #4: Output operands must specifically indicate which
661 reg an output appears in after an asm. "=f" is not allowed: the
662 operand constraints must select a class with a single reg.
663
664 Also enforce rule #5: Output operands must start at the top of
665 the reg-stack: output operands may not "skip" a reg. */
666
667 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
668 for (i = 0; i < n_outputs; i++)
669 if (STACK_REG_P (recog_data.operand[i]))
670 {
671 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
672 {
673 error_for_asm (insn, "output constraint %d must specify a single register", i);
674 malformed_asm = 1;
675 }
676 else
677 {
678 int j;
679
680 for (j = 0; j < n_clobbers; j++)
681 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
682 {
683 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
684 i, reg_names [REGNO (clobber_reg[j])]);
685 malformed_asm = 1;
686 break;
687 }
688 if (j == n_clobbers)
689 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
690 }
691 }
692
693
694 /* Search for first non-popped reg. */
695 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
696 if (! reg_used_as_output[i])
697 break;
698
699 /* If there are any other popped regs, that's an error. */
700 for (; i < LAST_STACK_REG + 1; i++)
701 if (reg_used_as_output[i])
702 break;
703
704 if (i != LAST_STACK_REG + 1)
705 {
706 error_for_asm (insn, "output regs must be grouped at top of stack");
707 malformed_asm = 1;
708 }
709
710 /* Enforce rule #2: All implicitly popped input regs must be closer
711 to the top of the reg-stack than any input that is not implicitly
712 popped. */
713
714 memset (implicitly_dies, 0, sizeof (implicitly_dies));
715 for (i = n_outputs; i < n_outputs + n_inputs; i++)
716 if (STACK_REG_P (recog_data.operand[i]))
717 {
718 /* An input reg is implicitly popped if it is tied to an
719 output, or if there is a CLOBBER for it. */
720 int j;
721
722 for (j = 0; j < n_clobbers; j++)
723 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
724 break;
725
726 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
727 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
728 }
729
730 /* Search for first non-popped reg. */
731 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
732 if (! implicitly_dies[i])
733 break;
734
735 /* If there are any other popped regs, that's an error. */
736 for (; i < LAST_STACK_REG + 1; i++)
737 if (implicitly_dies[i])
738 break;
739
740 if (i != LAST_STACK_REG + 1)
741 {
742 error_for_asm (insn,
743 "implicitly popped regs must be grouped at top of stack");
744 malformed_asm = 1;
745 }
746
747 /* Enforce rule #3: If any input operand uses the "f" constraint, all
748 output constraints must use the "&" earlyclobber.
749
750 ??? Detect this more deterministically by having constrain_asm_operands
751 record any earlyclobber. */
752
753 for (i = n_outputs; i < n_outputs + n_inputs; i++)
754 if (recog_op_alt[i][alt].matches == -1)
755 {
756 int j;
757
758 for (j = 0; j < n_outputs; j++)
759 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
760 {
761 error_for_asm (insn,
762 "output operand %d must use `&' constraint", j);
763 malformed_asm = 1;
764 }
765 }
766
767 if (malformed_asm)
768 {
769 /* Avoid further trouble with this insn. */
770 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
771 any_malformed_asm = true;
772 return 0;
773 }
774
775 return 1;
776 }
777 \f
778 /* Calculate the number of inputs and outputs in BODY, an
779 asm_operands. N_OPERANDS is the total number of operands, and
780 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
781 placed. */
782
783 static int
784 get_asm_operand_n_inputs (rtx body)
785 {
786 switch (GET_CODE (body))
787 {
788 case SET:
789 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
790 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
791
792 case ASM_OPERANDS:
793 return ASM_OPERANDS_INPUT_LENGTH (body);
794
795 case PARALLEL:
796 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
797
798 default:
799 gcc_unreachable ();
800 }
801 }
802
803 /* If current function returns its result in an fp stack register,
804 return the REG. Otherwise, return 0. */
805
806 static rtx
807 stack_result (tree decl)
808 {
809 rtx result;
810
811 /* If the value is supposed to be returned in memory, then clearly
812 it is not returned in a stack register. */
813 if (aggregate_value_p (DECL_RESULT (decl), decl))
814 return 0;
815
816 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
817 if (result != 0)
818 {
819 #ifdef FUNCTION_OUTGOING_VALUE
820 result
821 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
822 #else
823 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
824 #endif
825 }
826
827 return result != 0 && STACK_REG_P (result) ? result : 0;
828 }
829 \f
830
831 /*
832 * This section deals with stack register substitution, and forms the second
833 * pass over the RTL.
834 */
835
836 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
837 the desired hard REGNO. */
838
839 static void
840 replace_reg (rtx *reg, int regno)
841 {
842 gcc_assert (regno >= FIRST_STACK_REG);
843 gcc_assert (regno <= LAST_STACK_REG);
844 gcc_assert (STACK_REG_P (*reg));
845
846 gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT
847 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
848
849 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
850 }
851
852 /* Remove a note of type NOTE, which must be found, for register
853 number REGNO from INSN. Remove only one such note. */
854
855 static void
856 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
857 {
858 rtx *note_link, this;
859
860 note_link = &REG_NOTES (insn);
861 for (this = *note_link; this; this = XEXP (this, 1))
862 if (REG_NOTE_KIND (this) == note
863 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
864 {
865 *note_link = XEXP (this, 1);
866 return;
867 }
868 else
869 note_link = &XEXP (this, 1);
870
871 gcc_unreachable ();
872 }
873
874 /* Find the hard register number of virtual register REG in REGSTACK.
875 The hard register number is relative to the top of the stack. -1 is
876 returned if the register is not found. */
877
878 static int
879 get_hard_regnum (stack regstack, rtx reg)
880 {
881 int i;
882
883 gcc_assert (STACK_REG_P (reg));
884
885 for (i = regstack->top; i >= 0; i--)
886 if (regstack->reg[i] == REGNO (reg))
887 break;
888
889 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
890 }
891 \f
892 /* Emit an insn to pop virtual register REG before or after INSN.
893 REGSTACK is the stack state after INSN and is updated to reflect this
894 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
895 is represented as a SET whose destination is the register to be popped
896 and source is the top of stack. A death note for the top of stack
897 cases the movdf pattern to pop. */
898
899 static rtx
900 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
901 {
902 rtx pop_insn, pop_rtx;
903 int hard_regno;
904
905 /* For complex types take care to pop both halves. These may survive in
906 CLOBBER and USE expressions. */
907 if (COMPLEX_MODE_P (GET_MODE (reg)))
908 {
909 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
910 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
911
912 pop_insn = NULL_RTX;
913 if (get_hard_regnum (regstack, reg1) >= 0)
914 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
915 if (get_hard_regnum (regstack, reg2) >= 0)
916 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
917 gcc_assert (pop_insn);
918 return pop_insn;
919 }
920
921 hard_regno = get_hard_regnum (regstack, reg);
922
923 gcc_assert (hard_regno >= FIRST_STACK_REG);
924
925 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
926 FP_MODE_REG (FIRST_STACK_REG, DFmode));
927
928 if (where == EMIT_AFTER)
929 pop_insn = emit_insn_after (pop_rtx, insn);
930 else
931 pop_insn = emit_insn_before (pop_rtx, insn);
932
933 REG_NOTES (pop_insn)
934 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
935 REG_NOTES (pop_insn));
936
937 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
938 = regstack->reg[regstack->top];
939 regstack->top -= 1;
940 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
941
942 return pop_insn;
943 }
944 \f
945 /* Emit an insn before or after INSN to swap virtual register REG with
946 the top of stack. REGSTACK is the stack state before the swap, and
947 is updated to reflect the swap. A swap insn is represented as a
948 PARALLEL of two patterns: each pattern moves one reg to the other.
949
950 If REG is already at the top of the stack, no insn is emitted. */
951
952 static void
953 emit_swap_insn (rtx insn, stack regstack, rtx reg)
954 {
955 int hard_regno;
956 rtx swap_rtx;
957 int tmp, other_reg; /* swap regno temps */
958 rtx i1; /* the stack-reg insn prior to INSN */
959 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
960
961 hard_regno = get_hard_regnum (regstack, reg);
962
963 gcc_assert (hard_regno >= FIRST_STACK_REG);
964 if (hard_regno == FIRST_STACK_REG)
965 return;
966
967 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
968
969 tmp = regstack->reg[other_reg];
970 regstack->reg[other_reg] = regstack->reg[regstack->top];
971 regstack->reg[regstack->top] = tmp;
972
973 /* Find the previous insn involving stack regs, but don't pass a
974 block boundary. */
975 i1 = NULL;
976 if (current_block && insn != BB_HEAD (current_block))
977 {
978 rtx tmp = PREV_INSN (insn);
979 rtx limit = PREV_INSN (BB_HEAD (current_block));
980 while (tmp != limit)
981 {
982 if (LABEL_P (tmp)
983 || CALL_P (tmp)
984 || NOTE_INSN_BASIC_BLOCK_P (tmp)
985 || (NOTE_P (tmp)
986 && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE)
987 || (NONJUMP_INSN_P (tmp)
988 && stack_regs_mentioned (tmp)))
989 {
990 i1 = tmp;
991 break;
992 }
993 tmp = PREV_INSN (tmp);
994 }
995 }
996
997 if (i1 != NULL_RTX
998 && (i1set = single_set (i1)) != NULL_RTX)
999 {
1000 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1001 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1002
1003 /* If the previous register stack push was from the reg we are to
1004 swap with, omit the swap. */
1005
1006 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
1007 && REG_P (i1src)
1008 && REGNO (i1src) == (unsigned) hard_regno - 1
1009 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1010 return;
1011
1012 /* If the previous insn wrote to the reg we are to swap with,
1013 omit the swap. */
1014
1015 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
1016 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
1017 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1018 return;
1019 }
1020
1021 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1022 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1023
1024 if (i1)
1025 emit_insn_after (swap_rtx, i1);
1026 else if (current_block)
1027 emit_insn_before (swap_rtx, BB_HEAD (current_block));
1028 else
1029 emit_insn_before (swap_rtx, insn);
1030 }
1031 \f
1032 /* Emit an insns before INSN to swap virtual register SRC1 with
1033 the top of stack and virtual register SRC2 with second stack
1034 slot. REGSTACK is the stack state before the swaps, and
1035 is updated to reflect the swaps. A swap insn is represented as a
1036 PARALLEL of two patterns: each pattern moves one reg to the other.
1037
1038 If SRC1 and/or SRC2 are already at the right place, no swap insn
1039 is emitted. */
1040
1041 static void
1042 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
1043 {
1044 struct stack_def temp_stack;
1045 int regno, j, k, temp;
1046
1047 temp_stack = *regstack;
1048
1049 /* Place operand 1 at the top of stack. */
1050 regno = get_hard_regnum (&temp_stack, src1);
1051 gcc_assert (regno >= 0);
1052 if (regno != FIRST_STACK_REG)
1053 {
1054 k = temp_stack.top - (regno - FIRST_STACK_REG);
1055 j = temp_stack.top;
1056
1057 temp = temp_stack.reg[k];
1058 temp_stack.reg[k] = temp_stack.reg[j];
1059 temp_stack.reg[j] = temp;
1060 }
1061
1062 /* Place operand 2 next on the stack. */
1063 regno = get_hard_regnum (&temp_stack, src2);
1064 gcc_assert (regno >= 0);
1065 if (regno != FIRST_STACK_REG + 1)
1066 {
1067 k = temp_stack.top - (regno - FIRST_STACK_REG);
1068 j = temp_stack.top - 1;
1069
1070 temp = temp_stack.reg[k];
1071 temp_stack.reg[k] = temp_stack.reg[j];
1072 temp_stack.reg[j] = temp;
1073 }
1074
1075 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1076 }
1077 \f
1078 /* Handle a move to or from a stack register in PAT, which is in INSN.
1079 REGSTACK is the current stack. Return whether a control flow insn
1080 was deleted in the process. */
1081
1082 static bool
1083 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
1084 {
1085 rtx *psrc = get_true_reg (&SET_SRC (pat));
1086 rtx *pdest = get_true_reg (&SET_DEST (pat));
1087 rtx src, dest;
1088 rtx note;
1089 bool control_flow_insn_deleted = false;
1090
1091 src = *psrc; dest = *pdest;
1092
1093 if (STACK_REG_P (src) && STACK_REG_P (dest))
1094 {
1095 /* Write from one stack reg to another. If SRC dies here, then
1096 just change the register mapping and delete the insn. */
1097
1098 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1099 if (note)
1100 {
1101 int i;
1102
1103 /* If this is a no-op move, there must not be a REG_DEAD note. */
1104 gcc_assert (REGNO (src) != REGNO (dest));
1105
1106 for (i = regstack->top; i >= 0; i--)
1107 if (regstack->reg[i] == REGNO (src))
1108 break;
1109
1110 /* The source must be live, and the dest must be dead. */
1111 gcc_assert (i >= 0);
1112 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1113
1114 /* It is possible that the dest is unused after this insn.
1115 If so, just pop the src. */
1116
1117 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1118 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1119 else
1120 {
1121 regstack->reg[i] = REGNO (dest);
1122 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1123 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1124 }
1125
1126 control_flow_insn_deleted |= control_flow_insn_p (insn);
1127 delete_insn (insn);
1128 return control_flow_insn_deleted;
1129 }
1130
1131 /* The source reg does not die. */
1132
1133 /* If this appears to be a no-op move, delete it, or else it
1134 will confuse the machine description output patterns. But if
1135 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1136 for REG_UNUSED will not work for deleted insns. */
1137
1138 if (REGNO (src) == REGNO (dest))
1139 {
1140 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1141 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1142
1143 control_flow_insn_deleted |= control_flow_insn_p (insn);
1144 delete_insn (insn);
1145 return control_flow_insn_deleted;
1146 }
1147
1148 /* The destination ought to be dead. */
1149 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1150
1151 replace_reg (psrc, get_hard_regnum (regstack, src));
1152
1153 regstack->reg[++regstack->top] = REGNO (dest);
1154 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1155 replace_reg (pdest, FIRST_STACK_REG);
1156 }
1157 else if (STACK_REG_P (src))
1158 {
1159 /* Save from a stack reg to MEM, or possibly integer reg. Since
1160 only top of stack may be saved, emit an exchange first if
1161 needs be. */
1162
1163 emit_swap_insn (insn, regstack, src);
1164
1165 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1166 if (note)
1167 {
1168 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1169 regstack->top--;
1170 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1171 }
1172 else if ((GET_MODE (src) == XFmode)
1173 && regstack->top < REG_STACK_SIZE - 1)
1174 {
1175 /* A 387 cannot write an XFmode value to a MEM without
1176 clobbering the source reg. The output code can handle
1177 this by reading back the value from the MEM.
1178 But it is more efficient to use a temp register if one is
1179 available. Push the source value here if the register
1180 stack is not full, and then write the value to memory via
1181 a pop. */
1182 rtx push_rtx, push_insn;
1183 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1184
1185 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1186 push_insn = emit_insn_before (push_rtx, insn);
1187 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1188 REG_NOTES (insn));
1189 }
1190
1191 replace_reg (psrc, FIRST_STACK_REG);
1192 }
1193 else
1194 {
1195 gcc_assert (STACK_REG_P (dest));
1196
1197 /* Load from MEM, or possibly integer REG or constant, into the
1198 stack regs. The actual target is always the top of the
1199 stack. The stack mapping is changed to reflect that DEST is
1200 now at top of stack. */
1201
1202 /* The destination ought to be dead. */
1203 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1204
1205 gcc_assert (regstack->top < REG_STACK_SIZE);
1206
1207 regstack->reg[++regstack->top] = REGNO (dest);
1208 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1209 replace_reg (pdest, FIRST_STACK_REG);
1210 }
1211
1212 return control_flow_insn_deleted;
1213 }
1214 \f
1215 /* Swap the condition on a branch, if there is one. Return true if we
1216 found a condition to swap. False if the condition was not used as
1217 such. */
1218
1219 static int
1220 swap_rtx_condition_1 (rtx pat)
1221 {
1222 const char *fmt;
1223 int i, r = 0;
1224
1225 if (COMPARISON_P (pat))
1226 {
1227 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1228 r = 1;
1229 }
1230 else
1231 {
1232 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1233 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1234 {
1235 if (fmt[i] == 'E')
1236 {
1237 int j;
1238
1239 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1240 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1241 }
1242 else if (fmt[i] == 'e')
1243 r |= swap_rtx_condition_1 (XEXP (pat, i));
1244 }
1245 }
1246
1247 return r;
1248 }
1249
1250 static int
1251 swap_rtx_condition (rtx insn)
1252 {
1253 rtx pat = PATTERN (insn);
1254
1255 /* We're looking for a single set to cc0 or an HImode temporary. */
1256
1257 if (GET_CODE (pat) == SET
1258 && REG_P (SET_DEST (pat))
1259 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1260 {
1261 insn = next_flags_user (insn);
1262 if (insn == NULL_RTX)
1263 return 0;
1264 pat = PATTERN (insn);
1265 }
1266
1267 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1268 not doing anything with the cc value right now. We may be able to
1269 search for one though. */
1270
1271 if (GET_CODE (pat) == SET
1272 && GET_CODE (SET_SRC (pat)) == UNSPEC
1273 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1274 {
1275 rtx dest = SET_DEST (pat);
1276
1277 /* Search forward looking for the first use of this value.
1278 Stop at block boundaries. */
1279 while (insn != BB_END (current_block))
1280 {
1281 insn = NEXT_INSN (insn);
1282 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1283 break;
1284 if (CALL_P (insn))
1285 return 0;
1286 }
1287
1288 /* So we've found the insn using this value. If it is anything
1289 other than sahf, aka unspec 10, or the value does not die
1290 (meaning we'd have to search further), then we must give up. */
1291 pat = PATTERN (insn);
1292 if (GET_CODE (pat) != SET
1293 || GET_CODE (SET_SRC (pat)) != UNSPEC
1294 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1295 || ! dead_or_set_p (insn, dest))
1296 return 0;
1297
1298 /* Now we are prepared to handle this as a normal cc0 setter. */
1299 insn = next_flags_user (insn);
1300 if (insn == NULL_RTX)
1301 return 0;
1302 pat = PATTERN (insn);
1303 }
1304
1305 if (swap_rtx_condition_1 (pat))
1306 {
1307 int fail = 0;
1308 INSN_CODE (insn) = -1;
1309 if (recog_memoized (insn) == -1)
1310 fail = 1;
1311 /* In case the flags don't die here, recurse to try fix
1312 following user too. */
1313 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1314 {
1315 insn = next_flags_user (insn);
1316 if (!insn || !swap_rtx_condition (insn))
1317 fail = 1;
1318 }
1319 if (fail)
1320 {
1321 swap_rtx_condition_1 (pat);
1322 return 0;
1323 }
1324 return 1;
1325 }
1326 return 0;
1327 }
1328
1329 /* Handle a comparison. Special care needs to be taken to avoid
1330 causing comparisons that a 387 cannot do correctly, such as EQ.
1331
1332 Also, a pop insn may need to be emitted. The 387 does have an
1333 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1334 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1335 set up. */
1336
1337 static void
1338 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1339 {
1340 rtx *src1, *src2;
1341 rtx src1_note, src2_note;
1342 rtx flags_user;
1343
1344 src1 = get_true_reg (&XEXP (pat_src, 0));
1345 src2 = get_true_reg (&XEXP (pat_src, 1));
1346 flags_user = next_flags_user (insn);
1347
1348 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1349 registers that die in this insn - move those to stack top first. */
1350 if ((! STACK_REG_P (*src1)
1351 || (STACK_REG_P (*src2)
1352 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1353 && swap_rtx_condition (insn))
1354 {
1355 rtx temp;
1356 temp = XEXP (pat_src, 0);
1357 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1358 XEXP (pat_src, 1) = temp;
1359
1360 src1 = get_true_reg (&XEXP (pat_src, 0));
1361 src2 = get_true_reg (&XEXP (pat_src, 1));
1362
1363 INSN_CODE (insn) = -1;
1364 }
1365
1366 /* We will fix any death note later. */
1367
1368 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1369
1370 if (STACK_REG_P (*src2))
1371 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1372 else
1373 src2_note = NULL_RTX;
1374
1375 emit_swap_insn (insn, regstack, *src1);
1376
1377 replace_reg (src1, FIRST_STACK_REG);
1378
1379 if (STACK_REG_P (*src2))
1380 replace_reg (src2, get_hard_regnum (regstack, *src2));
1381
1382 if (src1_note)
1383 {
1384 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1385 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1386 }
1387
1388 /* If the second operand dies, handle that. But if the operands are
1389 the same stack register, don't bother, because only one death is
1390 needed, and it was just handled. */
1391
1392 if (src2_note
1393 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1394 && REGNO (*src1) == REGNO (*src2)))
1395 {
1396 /* As a special case, two regs may die in this insn if src2 is
1397 next to top of stack and the top of stack also dies. Since
1398 we have already popped src1, "next to top of stack" is really
1399 at top (FIRST_STACK_REG) now. */
1400
1401 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1402 && src1_note)
1403 {
1404 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1405 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1406 }
1407 else
1408 {
1409 /* The 386 can only represent death of the first operand in
1410 the case handled above. In all other cases, emit a separate
1411 pop and remove the death note from here. */
1412
1413 /* link_cc0_insns (insn); */
1414
1415 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1416
1417 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1418 EMIT_AFTER);
1419 }
1420 }
1421 }
1422 \f
1423 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1424 is the current register layout. Return whether a control flow insn
1425 was deleted in the process. */
1426
1427 static bool
1428 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1429 {
1430 rtx *dest, *src;
1431 bool control_flow_insn_deleted = false;
1432
1433 switch (GET_CODE (pat))
1434 {
1435 case USE:
1436 /* Deaths in USE insns can happen in non optimizing compilation.
1437 Handle them by popping the dying register. */
1438 src = get_true_reg (&XEXP (pat, 0));
1439 if (STACK_REG_P (*src)
1440 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1441 {
1442 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1443 return control_flow_insn_deleted;
1444 }
1445 /* ??? Uninitialized USE should not happen. */
1446 else
1447 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1448 break;
1449
1450 case CLOBBER:
1451 {
1452 rtx note;
1453
1454 dest = get_true_reg (&XEXP (pat, 0));
1455 if (STACK_REG_P (*dest))
1456 {
1457 note = find_reg_note (insn, REG_DEAD, *dest);
1458
1459 if (pat != PATTERN (insn))
1460 {
1461 /* The fix_truncdi_1 pattern wants to be able to allocate
1462 it's own scratch register. It does this by clobbering
1463 an fp reg so that it is assured of an empty reg-stack
1464 register. If the register is live, kill it now.
1465 Remove the DEAD/UNUSED note so we don't try to kill it
1466 later too. */
1467
1468 if (note)
1469 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1470 else
1471 {
1472 note = find_reg_note (insn, REG_UNUSED, *dest);
1473 gcc_assert (note);
1474 }
1475 remove_note (insn, note);
1476 replace_reg (dest, FIRST_STACK_REG + 1);
1477 }
1478 else
1479 {
1480 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1481 indicates an uninitialized value. Because reload removed
1482 all other clobbers, this must be due to a function
1483 returning without a value. Load up a NaN. */
1484
1485 if (! note
1486 && get_hard_regnum (regstack, *dest) == -1)
1487 {
1488 pat = gen_rtx_SET (VOIDmode,
1489 FP_MODE_REG (REGNO (*dest), SFmode),
1490 not_a_num);
1491 PATTERN (insn) = pat;
1492 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1493 }
1494 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1495 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1496 {
1497 pat = gen_rtx_SET (VOIDmode,
1498 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1499 not_a_num);
1500 PATTERN (insn) = pat;
1501 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1502 }
1503 }
1504 }
1505 break;
1506 }
1507
1508 case SET:
1509 {
1510 rtx *src1 = (rtx *) 0, *src2;
1511 rtx src1_note, src2_note;
1512 rtx pat_src;
1513
1514 dest = get_true_reg (&SET_DEST (pat));
1515 src = get_true_reg (&SET_SRC (pat));
1516 pat_src = SET_SRC (pat);
1517
1518 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1519 if (STACK_REG_P (*src)
1520 || (STACK_REG_P (*dest)
1521 && (REG_P (*src) || MEM_P (*src)
1522 || GET_CODE (*src) == CONST_DOUBLE)))
1523 {
1524 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1525 break;
1526 }
1527
1528 switch (GET_CODE (pat_src))
1529 {
1530 case COMPARE:
1531 compare_for_stack_reg (insn, regstack, pat_src);
1532 break;
1533
1534 case CALL:
1535 {
1536 int count;
1537 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1538 --count >= 0;)
1539 {
1540 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1541 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1542 }
1543 }
1544 replace_reg (dest, FIRST_STACK_REG);
1545 break;
1546
1547 case REG:
1548 /* This is a `tstM2' case. */
1549 gcc_assert (*dest == cc0_rtx);
1550 src1 = src;
1551
1552 /* Fall through. */
1553
1554 case FLOAT_TRUNCATE:
1555 case SQRT:
1556 case ABS:
1557 case NEG:
1558 /* These insns only operate on the top of the stack. DEST might
1559 be cc0_rtx if we're processing a tstM pattern. Also, it's
1560 possible that the tstM case results in a REG_DEAD note on the
1561 source. */
1562
1563 if (src1 == 0)
1564 src1 = get_true_reg (&XEXP (pat_src, 0));
1565
1566 emit_swap_insn (insn, regstack, *src1);
1567
1568 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1569
1570 if (STACK_REG_P (*dest))
1571 replace_reg (dest, FIRST_STACK_REG);
1572
1573 if (src1_note)
1574 {
1575 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1576 regstack->top--;
1577 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1578 }
1579
1580 replace_reg (src1, FIRST_STACK_REG);
1581 break;
1582
1583 case MINUS:
1584 case DIV:
1585 /* On i386, reversed forms of subM3 and divM3 exist for
1586 MODE_FLOAT, so the same code that works for addM3 and mulM3
1587 can be used. */
1588 case MULT:
1589 case PLUS:
1590 /* These insns can accept the top of stack as a destination
1591 from a stack reg or mem, or can use the top of stack as a
1592 source and some other stack register (possibly top of stack)
1593 as a destination. */
1594
1595 src1 = get_true_reg (&XEXP (pat_src, 0));
1596 src2 = get_true_reg (&XEXP (pat_src, 1));
1597
1598 /* We will fix any death note later. */
1599
1600 if (STACK_REG_P (*src1))
1601 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1602 else
1603 src1_note = NULL_RTX;
1604 if (STACK_REG_P (*src2))
1605 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1606 else
1607 src2_note = NULL_RTX;
1608
1609 /* If either operand is not a stack register, then the dest
1610 must be top of stack. */
1611
1612 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1613 emit_swap_insn (insn, regstack, *dest);
1614 else
1615 {
1616 /* Both operands are REG. If neither operand is already
1617 at the top of stack, choose to make the one that is the dest
1618 the new top of stack. */
1619
1620 int src1_hard_regnum, src2_hard_regnum;
1621
1622 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1623 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1624 gcc_assert (src1_hard_regnum != -1);
1625 gcc_assert (src2_hard_regnum != -1);
1626
1627 if (src1_hard_regnum != FIRST_STACK_REG
1628 && src2_hard_regnum != FIRST_STACK_REG)
1629 emit_swap_insn (insn, regstack, *dest);
1630 }
1631
1632 if (STACK_REG_P (*src1))
1633 replace_reg (src1, get_hard_regnum (regstack, *src1));
1634 if (STACK_REG_P (*src2))
1635 replace_reg (src2, get_hard_regnum (regstack, *src2));
1636
1637 if (src1_note)
1638 {
1639 rtx src1_reg = XEXP (src1_note, 0);
1640
1641 /* If the register that dies is at the top of stack, then
1642 the destination is somewhere else - merely substitute it.
1643 But if the reg that dies is not at top of stack, then
1644 move the top of stack to the dead reg, as though we had
1645 done the insn and then a store-with-pop. */
1646
1647 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1648 {
1649 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1650 replace_reg (dest, get_hard_regnum (regstack, *dest));
1651 }
1652 else
1653 {
1654 int regno = get_hard_regnum (regstack, src1_reg);
1655
1656 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1657 replace_reg (dest, regno);
1658
1659 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1660 = regstack->reg[regstack->top];
1661 }
1662
1663 CLEAR_HARD_REG_BIT (regstack->reg_set,
1664 REGNO (XEXP (src1_note, 0)));
1665 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1666 regstack->top--;
1667 }
1668 else if (src2_note)
1669 {
1670 rtx src2_reg = XEXP (src2_note, 0);
1671 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1672 {
1673 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1674 replace_reg (dest, get_hard_regnum (regstack, *dest));
1675 }
1676 else
1677 {
1678 int regno = get_hard_regnum (regstack, src2_reg);
1679
1680 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1681 replace_reg (dest, regno);
1682
1683 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1684 = regstack->reg[regstack->top];
1685 }
1686
1687 CLEAR_HARD_REG_BIT (regstack->reg_set,
1688 REGNO (XEXP (src2_note, 0)));
1689 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1690 regstack->top--;
1691 }
1692 else
1693 {
1694 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1695 replace_reg (dest, get_hard_regnum (regstack, *dest));
1696 }
1697
1698 /* Keep operand 1 matching with destination. */
1699 if (COMMUTATIVE_ARITH_P (pat_src)
1700 && REG_P (*src1) && REG_P (*src2)
1701 && REGNO (*src1) != REGNO (*dest))
1702 {
1703 int tmp = REGNO (*src1);
1704 replace_reg (src1, REGNO (*src2));
1705 replace_reg (src2, tmp);
1706 }
1707 break;
1708
1709 case UNSPEC:
1710 switch (XINT (pat_src, 1))
1711 {
1712 case UNSPEC_SIN:
1713 case UNSPEC_COS:
1714 case UNSPEC_FRNDINT:
1715 case UNSPEC_F2XM1:
1716
1717 case UNSPEC_FRNDINT_FLOOR:
1718 case UNSPEC_FRNDINT_CEIL:
1719 case UNSPEC_FRNDINT_TRUNC:
1720 case UNSPEC_FRNDINT_MASK_PM:
1721
1722 /* These insns only operate on the top of the stack. */
1723
1724 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1725
1726 emit_swap_insn (insn, regstack, *src1);
1727
1728 /* Input should never die, it is
1729 replaced with output. */
1730 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1731 gcc_assert (!src1_note);
1732
1733 if (STACK_REG_P (*dest))
1734 replace_reg (dest, FIRST_STACK_REG);
1735
1736 replace_reg (src1, FIRST_STACK_REG);
1737 break;
1738
1739 case UNSPEC_FPATAN:
1740 case UNSPEC_FYL2X:
1741 case UNSPEC_FYL2XP1:
1742 /* These insns operate on the top two stack slots. */
1743
1744 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1745 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1746
1747 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1748 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1749
1750 swap_to_top (insn, regstack, *src1, *src2);
1751
1752 replace_reg (src1, FIRST_STACK_REG);
1753 replace_reg (src2, FIRST_STACK_REG + 1);
1754
1755 if (src1_note)
1756 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1757 if (src2_note)
1758 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1759
1760 /* Pop both input operands from the stack. */
1761 CLEAR_HARD_REG_BIT (regstack->reg_set,
1762 regstack->reg[regstack->top]);
1763 CLEAR_HARD_REG_BIT (regstack->reg_set,
1764 regstack->reg[regstack->top - 1]);
1765 regstack->top -= 2;
1766
1767 /* Push the result back onto the stack. */
1768 regstack->reg[++regstack->top] = REGNO (*dest);
1769 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1770 replace_reg (dest, FIRST_STACK_REG);
1771 break;
1772
1773 case UNSPEC_FSCALE_FRACT:
1774 case UNSPEC_FPREM_F:
1775 case UNSPEC_FPREM1_F:
1776 /* These insns operate on the top two stack slots.
1777 first part of double input, double output insn. */
1778
1779 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1780 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1781
1782 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1783 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1784
1785 /* Inputs should never die, they are
1786 replaced with outputs. */
1787 gcc_assert (!src1_note);
1788 gcc_assert (!src2_note);
1789
1790 swap_to_top (insn, regstack, *src1, *src2);
1791
1792 /* Push the result back onto stack. Empty stack slot
1793 will be filled in second part of insn. */
1794 if (STACK_REG_P (*dest)) {
1795 regstack->reg[regstack->top] = REGNO (*dest);
1796 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1797 replace_reg (dest, FIRST_STACK_REG);
1798 }
1799
1800 replace_reg (src1, FIRST_STACK_REG);
1801 replace_reg (src2, FIRST_STACK_REG + 1);
1802 break;
1803
1804 case UNSPEC_FSCALE_EXP:
1805 case UNSPEC_FPREM_U:
1806 case UNSPEC_FPREM1_U:
1807 /* These insns operate on the top two stack slots./
1808 second part of double input, double output insn. */
1809
1810 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1811 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1812
1813 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1814 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1815
1816 /* Inputs should never die, they are
1817 replaced with outputs. */
1818 gcc_assert (!src1_note);
1819 gcc_assert (!src2_note);
1820
1821 swap_to_top (insn, regstack, *src1, *src2);
1822
1823 /* Push the result back onto stack. Fill empty slot from
1824 first part of insn and fix top of stack pointer. */
1825 if (STACK_REG_P (*dest)) {
1826 regstack->reg[regstack->top - 1] = REGNO (*dest);
1827 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1828 replace_reg (dest, FIRST_STACK_REG + 1);
1829 }
1830
1831 replace_reg (src1, FIRST_STACK_REG);
1832 replace_reg (src2, FIRST_STACK_REG + 1);
1833 break;
1834
1835 case UNSPEC_SINCOS_COS:
1836 case UNSPEC_TAN_ONE:
1837 case UNSPEC_XTRACT_FRACT:
1838 /* These insns operate on the top two stack slots,
1839 first part of one input, double output insn. */
1840
1841 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1842
1843 emit_swap_insn (insn, regstack, *src1);
1844
1845 /* Input should never die, it is
1846 replaced with output. */
1847 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1848 gcc_assert (!src1_note);
1849
1850 /* Push the result back onto stack. Empty stack slot
1851 will be filled in second part of insn. */
1852 if (STACK_REG_P (*dest)) {
1853 regstack->reg[regstack->top + 1] = REGNO (*dest);
1854 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1855 replace_reg (dest, FIRST_STACK_REG);
1856 }
1857
1858 replace_reg (src1, FIRST_STACK_REG);
1859 break;
1860
1861 case UNSPEC_SINCOS_SIN:
1862 case UNSPEC_TAN_TAN:
1863 case UNSPEC_XTRACT_EXP:
1864 /* These insns operate on the top two stack slots,
1865 second part of one input, double output insn. */
1866
1867 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1868
1869 emit_swap_insn (insn, regstack, *src1);
1870
1871 /* Input should never die, it is
1872 replaced with output. */
1873 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1874 gcc_assert (!src1_note);
1875
1876 /* Push the result back onto stack. Fill empty slot from
1877 first part of insn and fix top of stack pointer. */
1878 if (STACK_REG_P (*dest)) {
1879 regstack->reg[regstack->top] = REGNO (*dest);
1880 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1881 replace_reg (dest, FIRST_STACK_REG + 1);
1882
1883 regstack->top++;
1884 }
1885
1886 replace_reg (src1, FIRST_STACK_REG);
1887 break;
1888
1889 case UNSPEC_SAHF:
1890 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1891 The combination matches the PPRO fcomi instruction. */
1892
1893 pat_src = XVECEXP (pat_src, 0, 0);
1894 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1895 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1896 /* Fall through. */
1897
1898 case UNSPEC_FNSTSW:
1899 /* Combined fcomp+fnstsw generated for doing well with
1900 CSE. When optimizing this would have been broken
1901 up before now. */
1902
1903 pat_src = XVECEXP (pat_src, 0, 0);
1904 gcc_assert (GET_CODE (pat_src) == COMPARE);
1905
1906 compare_for_stack_reg (insn, regstack, pat_src);
1907 break;
1908
1909 default:
1910 gcc_unreachable ();
1911 }
1912 break;
1913
1914 case IF_THEN_ELSE:
1915 /* This insn requires the top of stack to be the destination. */
1916
1917 src1 = get_true_reg (&XEXP (pat_src, 1));
1918 src2 = get_true_reg (&XEXP (pat_src, 2));
1919
1920 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1921 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1922
1923 /* If the comparison operator is an FP comparison operator,
1924 it is handled correctly by compare_for_stack_reg () who
1925 will move the destination to the top of stack. But if the
1926 comparison operator is not an FP comparison operator, we
1927 have to handle it here. */
1928 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1929 && REGNO (*dest) != regstack->reg[regstack->top])
1930 {
1931 /* In case one of operands is the top of stack and the operands
1932 dies, it is safe to make it the destination operand by
1933 reversing the direction of cmove and avoid fxch. */
1934 if ((REGNO (*src1) == regstack->reg[regstack->top]
1935 && src1_note)
1936 || (REGNO (*src2) == regstack->reg[regstack->top]
1937 && src2_note))
1938 {
1939 int idx1 = (get_hard_regnum (regstack, *src1)
1940 - FIRST_STACK_REG);
1941 int idx2 = (get_hard_regnum (regstack, *src2)
1942 - FIRST_STACK_REG);
1943
1944 /* Make reg-stack believe that the operands are already
1945 swapped on the stack */
1946 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1947 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1948
1949 /* Reverse condition to compensate the operand swap.
1950 i386 do have comparison always reversible. */
1951 PUT_CODE (XEXP (pat_src, 0),
1952 reversed_comparison_code (XEXP (pat_src, 0), insn));
1953 }
1954 else
1955 emit_swap_insn (insn, regstack, *dest);
1956 }
1957
1958 {
1959 rtx src_note [3];
1960 int i;
1961
1962 src_note[0] = 0;
1963 src_note[1] = src1_note;
1964 src_note[2] = src2_note;
1965
1966 if (STACK_REG_P (*src1))
1967 replace_reg (src1, get_hard_regnum (regstack, *src1));
1968 if (STACK_REG_P (*src2))
1969 replace_reg (src2, get_hard_regnum (regstack, *src2));
1970
1971 for (i = 1; i <= 2; i++)
1972 if (src_note [i])
1973 {
1974 int regno = REGNO (XEXP (src_note[i], 0));
1975
1976 /* If the register that dies is not at the top of
1977 stack, then move the top of stack to the dead reg.
1978 Top of stack should never die, as it is the
1979 destination. */
1980 gcc_assert (regno != regstack->reg[regstack->top]);
1981 remove_regno_note (insn, REG_DEAD, regno);
1982 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1983 EMIT_AFTER);
1984 }
1985 }
1986
1987 /* Make dest the top of stack. Add dest to regstack if
1988 not present. */
1989 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1990 regstack->reg[++regstack->top] = REGNO (*dest);
1991 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1992 replace_reg (dest, FIRST_STACK_REG);
1993 break;
1994
1995 default:
1996 gcc_unreachable ();
1997 }
1998 break;
1999 }
2000
2001 default:
2002 break;
2003 }
2004
2005 return control_flow_insn_deleted;
2006 }
2007 \f
2008 /* Substitute hard regnums for any stack regs in INSN, which has
2009 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2010 before the insn, and is updated with changes made here.
2011
2012 There are several requirements and assumptions about the use of
2013 stack-like regs in asm statements. These rules are enforced by
2014 record_asm_stack_regs; see comments there for details. Any
2015 asm_operands left in the RTL at this point may be assume to meet the
2016 requirements, since record_asm_stack_regs removes any problem asm. */
2017
2018 static void
2019 subst_asm_stack_regs (rtx insn, stack regstack)
2020 {
2021 rtx body = PATTERN (insn);
2022 int alt;
2023
2024 rtx *note_reg; /* Array of note contents */
2025 rtx **note_loc; /* Address of REG field of each note */
2026 enum reg_note *note_kind; /* The type of each note */
2027
2028 rtx *clobber_reg = 0;
2029 rtx **clobber_loc = 0;
2030
2031 struct stack_def temp_stack;
2032 int n_notes;
2033 int n_clobbers;
2034 rtx note;
2035 int i;
2036 int n_inputs, n_outputs;
2037
2038 if (! check_asm_stack_operands (insn))
2039 return;
2040
2041 /* Find out what the constraints required. If no constraint
2042 alternative matches, that is a compiler bug: we should have caught
2043 such an insn in check_asm_stack_operands. */
2044 extract_insn (insn);
2045 constrain_operands (1);
2046 alt = which_alternative;
2047
2048 preprocess_constraints ();
2049
2050 n_inputs = get_asm_operand_n_inputs (body);
2051 n_outputs = recog_data.n_operands - n_inputs;
2052
2053 gcc_assert (alt >= 0);
2054
2055 /* Strip SUBREGs here to make the following code simpler. */
2056 for (i = 0; i < recog_data.n_operands; i++)
2057 if (GET_CODE (recog_data.operand[i]) == SUBREG
2058 && REG_P (SUBREG_REG (recog_data.operand[i])))
2059 {
2060 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2061 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2062 }
2063
2064 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2065
2066 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2067 i++;
2068
2069 note_reg = alloca (i * sizeof (rtx));
2070 note_loc = alloca (i * sizeof (rtx *));
2071 note_kind = alloca (i * sizeof (enum reg_note));
2072
2073 n_notes = 0;
2074 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2075 {
2076 rtx reg = XEXP (note, 0);
2077 rtx *loc = & XEXP (note, 0);
2078
2079 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2080 {
2081 loc = & SUBREG_REG (reg);
2082 reg = SUBREG_REG (reg);
2083 }
2084
2085 if (STACK_REG_P (reg)
2086 && (REG_NOTE_KIND (note) == REG_DEAD
2087 || REG_NOTE_KIND (note) == REG_UNUSED))
2088 {
2089 note_reg[n_notes] = reg;
2090 note_loc[n_notes] = loc;
2091 note_kind[n_notes] = REG_NOTE_KIND (note);
2092 n_notes++;
2093 }
2094 }
2095
2096 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2097
2098 n_clobbers = 0;
2099
2100 if (GET_CODE (body) == PARALLEL)
2101 {
2102 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2103 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2104
2105 for (i = 0; i < XVECLEN (body, 0); i++)
2106 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2107 {
2108 rtx clobber = XVECEXP (body, 0, i);
2109 rtx reg = XEXP (clobber, 0);
2110 rtx *loc = & XEXP (clobber, 0);
2111
2112 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2113 {
2114 loc = & SUBREG_REG (reg);
2115 reg = SUBREG_REG (reg);
2116 }
2117
2118 if (STACK_REG_P (reg))
2119 {
2120 clobber_reg[n_clobbers] = reg;
2121 clobber_loc[n_clobbers] = loc;
2122 n_clobbers++;
2123 }
2124 }
2125 }
2126
2127 temp_stack = *regstack;
2128
2129 /* Put the input regs into the desired place in TEMP_STACK. */
2130
2131 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2132 if (STACK_REG_P (recog_data.operand[i])
2133 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2134 FLOAT_REGS)
2135 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2136 {
2137 /* If an operand needs to be in a particular reg in
2138 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2139 these constraints are for single register classes, and
2140 reload guaranteed that operand[i] is already in that class,
2141 we can just use REGNO (recog_data.operand[i]) to know which
2142 actual reg this operand needs to be in. */
2143
2144 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2145
2146 gcc_assert (regno >= 0);
2147
2148 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2149 {
2150 /* recog_data.operand[i] is not in the right place. Find
2151 it and swap it with whatever is already in I's place.
2152 K is where recog_data.operand[i] is now. J is where it
2153 should be. */
2154 int j, k, temp;
2155
2156 k = temp_stack.top - (regno - FIRST_STACK_REG);
2157 j = (temp_stack.top
2158 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2159
2160 temp = temp_stack.reg[k];
2161 temp_stack.reg[k] = temp_stack.reg[j];
2162 temp_stack.reg[j] = temp;
2163 }
2164 }
2165
2166 /* Emit insns before INSN to make sure the reg-stack is in the right
2167 order. */
2168
2169 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2170
2171 /* Make the needed input register substitutions. Do death notes and
2172 clobbers too, because these are for inputs, not outputs. */
2173
2174 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2175 if (STACK_REG_P (recog_data.operand[i]))
2176 {
2177 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2178
2179 gcc_assert (regnum >= 0);
2180
2181 replace_reg (recog_data.operand_loc[i], regnum);
2182 }
2183
2184 for (i = 0; i < n_notes; i++)
2185 if (note_kind[i] == REG_DEAD)
2186 {
2187 int regnum = get_hard_regnum (regstack, note_reg[i]);
2188
2189 gcc_assert (regnum >= 0);
2190
2191 replace_reg (note_loc[i], regnum);
2192 }
2193
2194 for (i = 0; i < n_clobbers; i++)
2195 {
2196 /* It's OK for a CLOBBER to reference a reg that is not live.
2197 Don't try to replace it in that case. */
2198 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2199
2200 if (regnum >= 0)
2201 {
2202 /* Sigh - clobbers always have QImode. But replace_reg knows
2203 that these regs can't be MODE_INT and will assert. Just put
2204 the right reg there without calling replace_reg. */
2205
2206 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2207 }
2208 }
2209
2210 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2211
2212 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2213 if (STACK_REG_P (recog_data.operand[i]))
2214 {
2215 /* An input reg is implicitly popped if it is tied to an
2216 output, or if there is a CLOBBER for it. */
2217 int j;
2218
2219 for (j = 0; j < n_clobbers; j++)
2220 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2221 break;
2222
2223 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2224 {
2225 /* recog_data.operand[i] might not be at the top of stack.
2226 But that's OK, because all we need to do is pop the
2227 right number of regs off of the top of the reg-stack.
2228 record_asm_stack_regs guaranteed that all implicitly
2229 popped regs were grouped at the top of the reg-stack. */
2230
2231 CLEAR_HARD_REG_BIT (regstack->reg_set,
2232 regstack->reg[regstack->top]);
2233 regstack->top--;
2234 }
2235 }
2236
2237 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2238 Note that there isn't any need to substitute register numbers.
2239 ??? Explain why this is true. */
2240
2241 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2242 {
2243 /* See if there is an output for this hard reg. */
2244 int j;
2245
2246 for (j = 0; j < n_outputs; j++)
2247 if (STACK_REG_P (recog_data.operand[j])
2248 && REGNO (recog_data.operand[j]) == (unsigned) i)
2249 {
2250 regstack->reg[++regstack->top] = i;
2251 SET_HARD_REG_BIT (regstack->reg_set, i);
2252 break;
2253 }
2254 }
2255
2256 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2257 input that the asm didn't implicitly pop. If the asm didn't
2258 implicitly pop an input reg, that reg will still be live.
2259
2260 Note that we can't use find_regno_note here: the register numbers
2261 in the death notes have already been substituted. */
2262
2263 for (i = 0; i < n_outputs; i++)
2264 if (STACK_REG_P (recog_data.operand[i]))
2265 {
2266 int j;
2267
2268 for (j = 0; j < n_notes; j++)
2269 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2270 && note_kind[j] == REG_UNUSED)
2271 {
2272 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2273 EMIT_AFTER);
2274 break;
2275 }
2276 }
2277
2278 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2279 if (STACK_REG_P (recog_data.operand[i]))
2280 {
2281 int j;
2282
2283 for (j = 0; j < n_notes; j++)
2284 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2285 && note_kind[j] == REG_DEAD
2286 && TEST_HARD_REG_BIT (regstack->reg_set,
2287 REGNO (recog_data.operand[i])))
2288 {
2289 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2290 EMIT_AFTER);
2291 break;
2292 }
2293 }
2294 }
2295 \f
2296 /* Substitute stack hard reg numbers for stack virtual registers in
2297 INSN. Non-stack register numbers are not changed. REGSTACK is the
2298 current stack content. Insns may be emitted as needed to arrange the
2299 stack for the 387 based on the contents of the insn. Return whether
2300 a control flow insn was deleted in the process. */
2301
2302 static bool
2303 subst_stack_regs (rtx insn, stack regstack)
2304 {
2305 rtx *note_link, note;
2306 bool control_flow_insn_deleted = false;
2307 int i;
2308
2309 if (CALL_P (insn))
2310 {
2311 int top = regstack->top;
2312
2313 /* If there are any floating point parameters to be passed in
2314 registers for this call, make sure they are in the right
2315 order. */
2316
2317 if (top >= 0)
2318 {
2319 straighten_stack (PREV_INSN (insn), regstack);
2320
2321 /* Now mark the arguments as dead after the call. */
2322
2323 while (regstack->top >= 0)
2324 {
2325 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2326 regstack->top--;
2327 }
2328 }
2329 }
2330
2331 /* Do the actual substitution if any stack regs are mentioned.
2332 Since we only record whether entire insn mentions stack regs, and
2333 subst_stack_regs_pat only works for patterns that contain stack regs,
2334 we must check each pattern in a parallel here. A call_value_pop could
2335 fail otherwise. */
2336
2337 if (stack_regs_mentioned (insn))
2338 {
2339 int n_operands = asm_noperands (PATTERN (insn));
2340 if (n_operands >= 0)
2341 {
2342 /* This insn is an `asm' with operands. Decode the operands,
2343 decide how many are inputs, and do register substitution.
2344 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2345
2346 subst_asm_stack_regs (insn, regstack);
2347 return control_flow_insn_deleted;
2348 }
2349
2350 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2351 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2352 {
2353 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2354 {
2355 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2356 XVECEXP (PATTERN (insn), 0, i)
2357 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2358 control_flow_insn_deleted
2359 |= subst_stack_regs_pat (insn, regstack,
2360 XVECEXP (PATTERN (insn), 0, i));
2361 }
2362 }
2363 else
2364 control_flow_insn_deleted
2365 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2366 }
2367
2368 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2369 REG_UNUSED will already have been dealt with, so just return. */
2370
2371 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2372 return control_flow_insn_deleted;
2373
2374 /* If there is a REG_UNUSED note on a stack register on this insn,
2375 the indicated reg must be popped. The REG_UNUSED note is removed,
2376 since the form of the newly emitted pop insn references the reg,
2377 making it no longer `unset'. */
2378
2379 note_link = &REG_NOTES (insn);
2380 for (note = *note_link; note; note = XEXP (note, 1))
2381 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2382 {
2383 *note_link = XEXP (note, 1);
2384 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2385 }
2386 else
2387 note_link = &XEXP (note, 1);
2388
2389 return control_flow_insn_deleted;
2390 }
2391 \f
2392 /* Change the organization of the stack so that it fits a new basic
2393 block. Some registers might have to be popped, but there can never be
2394 a register live in the new block that is not now live.
2395
2396 Insert any needed insns before or after INSN, as indicated by
2397 WHERE. OLD is the original stack layout, and NEW is the desired
2398 form. OLD is updated to reflect the code emitted, i.e., it will be
2399 the same as NEW upon return.
2400
2401 This function will not preserve block_end[]. But that information
2402 is no longer needed once this has executed. */
2403
2404 static void
2405 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2406 {
2407 int reg;
2408 int update_end = 0;
2409
2410 /* We will be inserting new insns "backwards". If we are to insert
2411 after INSN, find the next insn, and insert before it. */
2412
2413 if (where == EMIT_AFTER)
2414 {
2415 if (current_block && BB_END (current_block) == insn)
2416 update_end = 1;
2417 insn = NEXT_INSN (insn);
2418 }
2419
2420 /* Pop any registers that are not needed in the new block. */
2421
2422 for (reg = old->top; reg >= 0; reg--)
2423 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2424 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2425 EMIT_BEFORE);
2426
2427 if (new->top == -2)
2428 {
2429 /* If the new block has never been processed, then it can inherit
2430 the old stack order. */
2431
2432 new->top = old->top;
2433 memcpy (new->reg, old->reg, sizeof (new->reg));
2434 }
2435 else
2436 {
2437 /* This block has been entered before, and we must match the
2438 previously selected stack order. */
2439
2440 /* By now, the only difference should be the order of the stack,
2441 not their depth or liveliness. */
2442
2443 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2444 gcc_unreachable ();
2445 win:
2446 gcc_assert (old->top == new->top);
2447
2448 /* If the stack is not empty (new->top != -1), loop here emitting
2449 swaps until the stack is correct.
2450
2451 The worst case number of swaps emitted is N + 2, where N is the
2452 depth of the stack. In some cases, the reg at the top of
2453 stack may be correct, but swapped anyway in order to fix
2454 other regs. But since we never swap any other reg away from
2455 its correct slot, this algorithm will converge. */
2456
2457 if (new->top != -1)
2458 do
2459 {
2460 /* Swap the reg at top of stack into the position it is
2461 supposed to be in, until the correct top of stack appears. */
2462
2463 while (old->reg[old->top] != new->reg[new->top])
2464 {
2465 for (reg = new->top; reg >= 0; reg--)
2466 if (new->reg[reg] == old->reg[old->top])
2467 break;
2468
2469 gcc_assert (reg != -1);
2470
2471 emit_swap_insn (insn, old,
2472 FP_MODE_REG (old->reg[reg], DFmode));
2473 }
2474
2475 /* See if any regs remain incorrect. If so, bring an
2476 incorrect reg to the top of stack, and let the while loop
2477 above fix it. */
2478
2479 for (reg = new->top; reg >= 0; reg--)
2480 if (new->reg[reg] != old->reg[reg])
2481 {
2482 emit_swap_insn (insn, old,
2483 FP_MODE_REG (old->reg[reg], DFmode));
2484 break;
2485 }
2486 } while (reg >= 0);
2487
2488 /* At this point there must be no differences. */
2489
2490 for (reg = old->top; reg >= 0; reg--)
2491 gcc_assert (old->reg[reg] == new->reg[reg]);
2492 }
2493
2494 if (update_end)
2495 BB_END (current_block) = PREV_INSN (insn);
2496 }
2497 \f
2498 /* Print stack configuration. */
2499
2500 static void
2501 print_stack (FILE *file, stack s)
2502 {
2503 if (! file)
2504 return;
2505
2506 if (s->top == -2)
2507 fprintf (file, "uninitialized\n");
2508 else if (s->top == -1)
2509 fprintf (file, "empty\n");
2510 else
2511 {
2512 int i;
2513 fputs ("[ ", file);
2514 for (i = 0; i <= s->top; ++i)
2515 fprintf (file, "%d ", s->reg[i]);
2516 fputs ("]\n", file);
2517 }
2518 }
2519 \f
2520 /* This function was doing life analysis. We now let the regular live
2521 code do it's job, so we only need to check some extra invariants
2522 that reg-stack expects. Primary among these being that all registers
2523 are initialized before use.
2524
2525 The function returns true when code was emitted to CFG edges and
2526 commit_edge_insertions needs to be called. */
2527
2528 static int
2529 convert_regs_entry (void)
2530 {
2531 int inserted = 0;
2532 edge e;
2533 edge_iterator ei;
2534 basic_block block;
2535
2536 FOR_EACH_BB_REVERSE (block)
2537 {
2538 block_info bi = BLOCK_INFO (block);
2539 int reg;
2540
2541 /* Set current register status at last instruction `uninitialized'. */
2542 bi->stack_in.top = -2;
2543
2544 /* Copy live_at_end and live_at_start into temporaries. */
2545 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2546 {
2547 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2548 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2549 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2550 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2551 }
2552 }
2553
2554 /* Load something into each stack register live at function entry.
2555 Such live registers can be caused by uninitialized variables or
2556 functions not returning values on all paths. In order to keep
2557 the push/pop code happy, and to not scrog the register stack, we
2558 must put something in these registers. Use a QNaN.
2559
2560 Note that we are inserting converted code here. This code is
2561 never seen by the convert_regs pass. */
2562
2563 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2564 {
2565 basic_block block = e->dest;
2566 block_info bi = BLOCK_INFO (block);
2567 int reg, top = -1;
2568
2569 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2570 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2571 {
2572 rtx init;
2573
2574 bi->stack_in.reg[++top] = reg;
2575
2576 init = gen_rtx_SET (VOIDmode,
2577 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2578 not_a_num);
2579 insert_insn_on_edge (init, e);
2580 inserted = 1;
2581 }
2582
2583 bi->stack_in.top = top;
2584 }
2585
2586 return inserted;
2587 }
2588
2589 /* Construct the desired stack for function exit. This will either
2590 be `empty', or the function return value at top-of-stack. */
2591
2592 static void
2593 convert_regs_exit (void)
2594 {
2595 int value_reg_low, value_reg_high;
2596 stack output_stack;
2597 rtx retvalue;
2598
2599 retvalue = stack_result (current_function_decl);
2600 value_reg_low = value_reg_high = -1;
2601 if (retvalue)
2602 {
2603 value_reg_low = REGNO (retvalue);
2604 value_reg_high = value_reg_low
2605 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2606 }
2607
2608 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2609 if (value_reg_low == -1)
2610 output_stack->top = -1;
2611 else
2612 {
2613 int reg;
2614
2615 output_stack->top = value_reg_high - value_reg_low;
2616 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2617 {
2618 output_stack->reg[value_reg_high - reg] = reg;
2619 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2620 }
2621 }
2622 }
2623
2624 /* Adjust the stack of this block on exit to match the stack of the
2625 target block, or copy stack info into the stack of the successor
2626 of the successor hasn't been processed yet. */
2627 static bool
2628 compensate_edge (edge e, FILE *file)
2629 {
2630 basic_block block = e->src, target = e->dest;
2631 block_info bi = BLOCK_INFO (block);
2632 struct stack_def regstack, tmpstack;
2633 stack target_stack = &BLOCK_INFO (target)->stack_in;
2634 int reg;
2635
2636 current_block = block;
2637 regstack = bi->stack_out;
2638 if (file)
2639 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2640
2641 if (target_stack->top == -2)
2642 {
2643 /* The target block hasn't had a stack order selected.
2644 We need merely ensure that no pops are needed. */
2645 for (reg = regstack.top; reg >= 0; --reg)
2646 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2647 break;
2648
2649 if (reg == -1)
2650 {
2651 if (file)
2652 fprintf (file, "new block; copying stack position\n");
2653
2654 /* change_stack kills values in regstack. */
2655 tmpstack = regstack;
2656
2657 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER);
2658 return false;
2659 }
2660
2661 if (file)
2662 fprintf (file, "new block; pops needed\n");
2663 }
2664 else
2665 {
2666 if (target_stack->top == regstack.top)
2667 {
2668 for (reg = target_stack->top; reg >= 0; --reg)
2669 if (target_stack->reg[reg] != regstack.reg[reg])
2670 break;
2671
2672 if (reg == -1)
2673 {
2674 if (file)
2675 fprintf (file, "no changes needed\n");
2676 return false;
2677 }
2678 }
2679
2680 if (file)
2681 {
2682 fprintf (file, "correcting stack to ");
2683 print_stack (file, target_stack);
2684 }
2685 }
2686
2687 /* Care for non-call EH edges specially. The normal return path have
2688 values in registers. These will be popped en masse by the unwind
2689 library. */
2690 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2691 target_stack->top = -1;
2692
2693 /* Other calls may appear to have values live in st(0), but the
2694 abnormal return path will not have actually loaded the values. */
2695 else if (e->flags & EDGE_ABNORMAL_CALL)
2696 {
2697 /* Assert that the lifetimes are as we expect -- one value
2698 live at st(0) on the end of the source block, and no
2699 values live at the beginning of the destination block. */
2700 HARD_REG_SET tmp;
2701
2702 CLEAR_HARD_REG_SET (tmp);
2703 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2704 gcc_unreachable ();
2705 eh1:
2706
2707 /* We are sure that there is st(0) live, otherwise we won't compensate.
2708 For complex return values, we may have st(1) live as well. */
2709 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2710 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2711 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2712 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2713 gcc_unreachable ();
2714 eh2:
2715
2716 target_stack->top = -1;
2717 }
2718
2719 /* It is better to output directly to the end of the block
2720 instead of to the edge, because emit_swap can do minimal
2721 insn scheduling. We can do this when there is only one
2722 edge out, and it is not abnormal. */
2723 else if (EDGE_COUNT (block->succs) == 1 && !(e->flags & EDGE_ABNORMAL))
2724 {
2725 /* change_stack kills values in regstack. */
2726 tmpstack = regstack;
2727
2728 change_stack (BB_END (block), &tmpstack, target_stack,
2729 (JUMP_P (BB_END (block))
2730 ? EMIT_BEFORE : EMIT_AFTER));
2731 }
2732 else
2733 {
2734 rtx seq, after;
2735
2736 /* We don't support abnormal edges. Global takes care to
2737 avoid any live register across them, so we should never
2738 have to insert instructions on such edges. */
2739 gcc_assert (!(e->flags & EDGE_ABNORMAL));
2740
2741 current_block = NULL;
2742 start_sequence ();
2743
2744 /* ??? change_stack needs some point to emit insns after. */
2745 after = emit_note (NOTE_INSN_DELETED);
2746
2747 tmpstack = regstack;
2748 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2749
2750 seq = get_insns ();
2751 end_sequence ();
2752
2753 insert_insn_on_edge (seq, e);
2754 return true;
2755 }
2756 return false;
2757 }
2758
2759 /* Convert stack register references in one block. */
2760
2761 static int
2762 convert_regs_1 (FILE *file, basic_block block)
2763 {
2764 struct stack_def regstack;
2765 block_info bi = BLOCK_INFO (block);
2766 int deleted, inserted, reg;
2767 rtx insn, next;
2768 edge e, beste = NULL;
2769 bool control_flow_insn_deleted = false;
2770 edge_iterator ei;
2771
2772 inserted = 0;
2773 deleted = 0;
2774 any_malformed_asm = false;
2775
2776 /* Find the edge we will copy stack from. It should be the most frequent
2777 one as it will get cheapest after compensation code is generated,
2778 if multiple such exists, take one with largest count, prefer critical
2779 one (as splitting critical edges is more expensive), or one with lowest
2780 index, to avoid random changes with different orders of the edges. */
2781 FOR_EACH_EDGE (e, ei, block->preds)
2782 {
2783 if (e->flags & EDGE_DFS_BACK)
2784 ;
2785 else if (! beste)
2786 beste = e;
2787 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2788 beste = e;
2789 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2790 ;
2791 else if (beste->count < e->count)
2792 beste = e;
2793 else if (beste->count > e->count)
2794 ;
2795 else if ((EDGE_CRITICAL_P (e) != 0)
2796 != (EDGE_CRITICAL_P (beste) != 0))
2797 {
2798 if (EDGE_CRITICAL_P (e))
2799 beste = e;
2800 }
2801 else if (e->src->index < beste->src->index)
2802 beste = e;
2803 }
2804
2805 /* Initialize stack at block entry. */
2806 if (bi->stack_in.top == -2)
2807 {
2808 if (beste)
2809 inserted |= compensate_edge (beste, file);
2810 else
2811 {
2812 /* No predecessors. Create an arbitrary input stack. */
2813 int reg;
2814
2815 bi->stack_in.top = -1;
2816 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2817 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2818 bi->stack_in.reg[++bi->stack_in.top] = reg;
2819 }
2820 }
2821 else
2822 /* Entry blocks do have stack already initialized. */
2823 beste = NULL;
2824
2825 current_block = block;
2826
2827 if (file)
2828 {
2829 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2830 print_stack (file, &bi->stack_in);
2831 }
2832
2833 /* Process all insns in this block. Keep track of NEXT so that we
2834 don't process insns emitted while substituting in INSN. */
2835 next = BB_HEAD (block);
2836 regstack = bi->stack_in;
2837 do
2838 {
2839 insn = next;
2840 next = NEXT_INSN (insn);
2841
2842 /* Ensure we have not missed a block boundary. */
2843 gcc_assert (next);
2844 if (insn == BB_END (block))
2845 next = NULL;
2846
2847 /* Don't bother processing unless there is a stack reg
2848 mentioned or if it's a CALL_INSN. */
2849 if (stack_regs_mentioned (insn)
2850 || CALL_P (insn))
2851 {
2852 if (file)
2853 {
2854 fprintf (file, " insn %d input stack: ",
2855 INSN_UID (insn));
2856 print_stack (file, &regstack);
2857 }
2858 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2859 }
2860 }
2861 while (next);
2862
2863 if (file)
2864 {
2865 fprintf (file, "Expected live registers [");
2866 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2867 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2868 fprintf (file, " %d", reg);
2869 fprintf (file, " ]\nOutput stack: ");
2870 print_stack (file, &regstack);
2871 }
2872
2873 insn = BB_END (block);
2874 if (JUMP_P (insn))
2875 insn = PREV_INSN (insn);
2876
2877 /* If the function is declared to return a value, but it returns one
2878 in only some cases, some registers might come live here. Emit
2879 necessary moves for them. */
2880
2881 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2882 {
2883 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2884 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2885 {
2886 rtx set;
2887
2888 if (file)
2889 {
2890 fprintf (file, "Emitting insn initializing reg %d\n",
2891 reg);
2892 }
2893
2894 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2895 not_a_num);
2896 insn = emit_insn_after (set, insn);
2897 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2898 }
2899 }
2900
2901 /* Amongst the insns possibly deleted during the substitution process above,
2902 might have been the only trapping insn in the block. We purge the now
2903 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2904 called at the end of convert_regs. The order in which we process the
2905 blocks ensures that we never delete an already processed edge.
2906
2907 Note that, at this point, the CFG may have been damaged by the emission
2908 of instructions after an abnormal call, which moves the basic block end
2909 (and is the reason why we call fixup_abnormal_edges later). So we must
2910 be sure that the trapping insn has been deleted before trying to purge
2911 dead edges, otherwise we risk purging valid edges.
2912
2913 ??? We are normally supposed not to delete trapping insns, so we pretend
2914 that the insns deleted above don't actually trap. It would have been
2915 better to detect this earlier and avoid creating the EH edge in the first
2916 place, still, but we don't have enough information at that time. */
2917
2918 if (control_flow_insn_deleted)
2919 purge_dead_edges (block);
2920
2921 /* Something failed if the stack lives don't match. If we had malformed
2922 asms, we zapped the instruction itself, but that didn't produce the
2923 same pattern of register kills as before. */
2924 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2925 gcc_assert (any_malformed_asm);
2926 win:
2927 bi->stack_out = regstack;
2928
2929 /* Compensate the back edges, as those wasn't visited yet. */
2930 FOR_EACH_EDGE (e, ei, block->succs)
2931 {
2932 if (e->flags & EDGE_DFS_BACK
2933 || (e->dest == EXIT_BLOCK_PTR))
2934 {
2935 gcc_assert (BLOCK_INFO (e->dest)->done
2936 || e->dest == block);
2937 inserted |= compensate_edge (e, file);
2938 }
2939 }
2940 FOR_EACH_EDGE (e, ei, block->preds)
2941 {
2942 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2943 && e->src != ENTRY_BLOCK_PTR)
2944 {
2945 gcc_assert (BLOCK_INFO (e->src)->done);
2946 inserted |= compensate_edge (e, file);
2947 }
2948 }
2949
2950 return inserted;
2951 }
2952
2953 /* Convert registers in all blocks reachable from BLOCK. */
2954
2955 static int
2956 convert_regs_2 (FILE *file, basic_block block)
2957 {
2958 basic_block *stack, *sp;
2959 int inserted;
2960
2961 /* We process the blocks in a top-down manner, in a way such that one block
2962 is only processed after all its predecessors. The number of predecessors
2963 of every block has already been computed. */
2964
2965 stack = xmalloc (sizeof (*stack) * n_basic_blocks);
2966 sp = stack;
2967
2968 *sp++ = block;
2969
2970 inserted = 0;
2971 do
2972 {
2973 edge e;
2974 edge_iterator ei;
2975
2976 block = *--sp;
2977
2978 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2979 some dead EH outgoing edge after the deletion of the trapping
2980 insn inside the block. Since the number of predecessors of
2981 BLOCK's successors was computed based on the initial edge set,
2982 we check the necessity to process some of these successors
2983 before such an edge deletion may happen. However, there is
2984 a pitfall: if BLOCK is the only predecessor of a successor and
2985 the edge between them happens to be deleted, the successor
2986 becomes unreachable and should not be processed. The problem
2987 is that there is no way to preventively detect this case so we
2988 stack the successor in all cases and hand over the task of
2989 fixing up the discrepancy to convert_regs_1. */
2990
2991 FOR_EACH_EDGE (e, ei, block->succs)
2992 if (! (e->flags & EDGE_DFS_BACK))
2993 {
2994 BLOCK_INFO (e->dest)->predecessors--;
2995 if (!BLOCK_INFO (e->dest)->predecessors)
2996 *sp++ = e->dest;
2997 }
2998
2999 inserted |= convert_regs_1 (file, block);
3000 BLOCK_INFO (block)->done = 1;
3001 }
3002 while (sp != stack);
3003
3004 return inserted;
3005 }
3006
3007 /* Traverse all basic blocks in a function, converting the register
3008 references in each insn from the "flat" register file that gcc uses,
3009 to the stack-like registers the 387 uses. */
3010
3011 static int
3012 convert_regs (FILE *file)
3013 {
3014 int inserted;
3015 basic_block b;
3016 edge e;
3017 edge_iterator ei;
3018
3019 /* Initialize uninitialized registers on function entry. */
3020 inserted = convert_regs_entry ();
3021
3022 /* Construct the desired stack for function exit. */
3023 convert_regs_exit ();
3024 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3025
3026 /* ??? Future: process inner loops first, and give them arbitrary
3027 initial stacks which emit_swap_insn can modify. This ought to
3028 prevent double fxch that often appears at the head of a loop. */
3029
3030 /* Process all blocks reachable from all entry points. */
3031 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3032 inserted |= convert_regs_2 (file, e->dest);
3033
3034 /* ??? Process all unreachable blocks. Though there's no excuse
3035 for keeping these even when not optimizing. */
3036 FOR_EACH_BB (b)
3037 {
3038 block_info bi = BLOCK_INFO (b);
3039
3040 if (! bi->done)
3041 inserted |= convert_regs_2 (file, b);
3042 }
3043 clear_aux_for_blocks ();
3044
3045 fixup_abnormal_edges ();
3046 if (inserted)
3047 commit_edge_insertions ();
3048
3049 if (file)
3050 fputc ('\n', file);
3051
3052 return inserted;
3053 }
3054 #endif /* STACK_REGS */
3055
3056 #include "gt-reg-stack.h"