reg-stack.c (change_stack): Improve algorithm used to pop regs off the stack to maxim...
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
24
25 * The form of the input:
26
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
36
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
44
45 * The form of the output:
46
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
52
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
55
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
59
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
62
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
66
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
71
72 * Methodology:
73
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
77
78 * asm_operands:
79
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
83
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
87
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
91
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
98
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
101
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
104
105 asm ("foo" : "=t" (a) : "f" (b));
106
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
112
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
115
116 The asm above would be written as
117
118 asm ("foo" : "=&t" (a) : "f" (b));
119
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
124
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
128
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
133
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
136
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
140
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
143
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
151
152 */
153 \f
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
173
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
176
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
179 stack registers. */
180 static GTY(()) varray_type stack_regs_mentioned_data;
181
182 #ifdef STACK_REGS
183
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
185
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
188
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
191 appropriately.
192
193 REG_SET indicates which registers are live. */
194
195 typedef struct stack_def
196 {
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
200 } *stack;
201
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
204
205 typedef struct block_info_def
206 {
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
212 to be visited. */
213 } *block_info;
214
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
216
217 /* Passed to change_stack to indicate where to emit insns. */
218 enum emit_where
219 {
220 EMIT_AFTER,
221 EMIT_BEFORE
222 };
223
224 /* The block we're currently working on. */
225 static basic_block current_block;
226
227 /* This is the register file for all register after conversion. */
228 static rtx
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
230
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
233
234 /* Used to initialize uninitialized registers. */
235 static rtx not_a_num;
236
237 /* Forward declarations */
238
239 static int stack_regs_mentioned_p (rtx pat);
240 static void straighten_stack (rtx, stack);
241 static void pop_stack (stack, int);
242 static rtx *get_true_reg (rtx *);
243
244 static int check_asm_stack_operands (rtx);
245 static int get_asm_operand_n_inputs (rtx);
246 static rtx stack_result (tree);
247 static void replace_reg (rtx *, int);
248 static void remove_regno_note (rtx, enum reg_note, unsigned int);
249 static int get_hard_regnum (stack, rtx);
250 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
251 static void emit_swap_insn (rtx, stack, rtx);
252 static void swap_to_top(rtx, stack, rtx, rtx);
253 static bool move_for_stack_reg (rtx, stack, rtx);
254 static int swap_rtx_condition_1 (rtx);
255 static int swap_rtx_condition (rtx);
256 static void compare_for_stack_reg (rtx, stack, rtx);
257 static bool subst_stack_regs_pat (rtx, stack, rtx);
258 static void subst_asm_stack_regs (rtx, stack);
259 static bool subst_stack_regs (rtx, stack);
260 static void change_stack (rtx, stack, stack, enum emit_where);
261 static int convert_regs_entry (void);
262 static void convert_regs_exit (void);
263 static int convert_regs_1 (FILE *, basic_block);
264 static int convert_regs_2 (FILE *, basic_block);
265 static int convert_regs (FILE *);
266 static void print_stack (FILE *, stack);
267 static rtx next_flags_user (rtx);
268 static bool compensate_edge (edge, FILE *);
269 \f
270 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
271
272 static int
273 stack_regs_mentioned_p (rtx pat)
274 {
275 const char *fmt;
276 int i;
277
278 if (STACK_REG_P (pat))
279 return 1;
280
281 fmt = GET_RTX_FORMAT (GET_CODE (pat));
282 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
283 {
284 if (fmt[i] == 'E')
285 {
286 int j;
287
288 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
289 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
290 return 1;
291 }
292 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
293 return 1;
294 }
295
296 return 0;
297 }
298
299 /* Return nonzero if INSN mentions stacked registers, else return zero. */
300
301 int
302 stack_regs_mentioned (rtx insn)
303 {
304 unsigned int uid, max;
305 int test;
306
307 if (! INSN_P (insn) || !stack_regs_mentioned_data)
308 return 0;
309
310 uid = INSN_UID (insn);
311 max = VARRAY_SIZE (stack_regs_mentioned_data);
312 if (uid >= max)
313 {
314 /* Allocate some extra size to avoid too many reallocs, but
315 do not grow too quickly. */
316 max = uid + uid / 20;
317 VARRAY_GROW (stack_regs_mentioned_data, max);
318 }
319
320 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
321 if (test == 0)
322 {
323 /* This insn has yet to be examined. Do so now. */
324 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
325 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
326 }
327
328 return test == 1;
329 }
330 \f
331 static rtx ix86_flags_rtx;
332
333 static rtx
334 next_flags_user (rtx insn)
335 {
336 /* Search forward looking for the first use of this value.
337 Stop at block boundaries. */
338
339 while (insn != BB_END (current_block))
340 {
341 insn = NEXT_INSN (insn);
342
343 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
344 return insn;
345
346 if (CALL_P (insn))
347 return NULL_RTX;
348 }
349 return NULL_RTX;
350 }
351 \f
352 /* Reorganize the stack into ascending numbers,
353 after this insn. */
354
355 static void
356 straighten_stack (rtx insn, stack regstack)
357 {
358 struct stack_def temp_stack;
359 int top;
360
361 /* If there is only a single register on the stack, then the stack is
362 already in increasing order and no reorganization is needed.
363
364 Similarly if the stack is empty. */
365 if (regstack->top <= 0)
366 return;
367
368 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
369
370 for (top = temp_stack.top = regstack->top; top >= 0; top--)
371 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
372
373 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
374 }
375
376 /* Pop a register from the stack. */
377
378 static void
379 pop_stack (stack regstack, int regno)
380 {
381 int top = regstack->top;
382
383 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
384 regstack->top--;
385 /* If regno was not at the top of stack then adjust stack. */
386 if (regstack->reg [top] != regno)
387 {
388 int i;
389 for (i = regstack->top; i >= 0; i--)
390 if (regstack->reg [i] == regno)
391 {
392 int j;
393 for (j = i; j < top; j++)
394 regstack->reg [j] = regstack->reg [j + 1];
395 break;
396 }
397 }
398 }
399 \f
400 /* Convert register usage from "flat" register file usage to a "stack
401 register file. FILE is the dump file, if used.
402
403 Construct a CFG and run life analysis. Then convert each insn one
404 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
405 code duplication created when the converter inserts pop insns on
406 the edges. */
407
408 bool
409 reg_to_stack (FILE *file)
410 {
411 basic_block bb;
412 int i;
413 int max_uid;
414
415 /* Clean up previous run. */
416 stack_regs_mentioned_data = 0;
417
418 /* See if there is something to do. Flow analysis is quite
419 expensive so we might save some compilation time. */
420 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
421 if (regs_ever_live[i])
422 break;
423 if (i > LAST_STACK_REG)
424 return false;
425
426 /* Ok, floating point instructions exist. If not optimizing,
427 build the CFG and run life analysis.
428 Also need to rebuild life when superblock scheduling is done
429 as it don't update liveness yet. */
430 if (!optimize
431 || (flag_sched2_use_superblocks
432 && flag_schedule_insns_after_reload))
433 {
434 count_or_remove_death_notes (NULL, 1);
435 life_analysis (file, PROP_DEATH_NOTES);
436 }
437 mark_dfs_back_edges ();
438
439 /* Set up block info for each basic block. */
440 alloc_aux_for_blocks (sizeof (struct block_info_def));
441 FOR_EACH_BB_REVERSE (bb)
442 {
443 edge e;
444 edge_iterator ei;
445
446 FOR_EACH_EDGE (e, ei, bb->preds)
447 if (!(e->flags & EDGE_DFS_BACK)
448 && e->src != ENTRY_BLOCK_PTR)
449 BLOCK_INFO (bb)->predecessors++;
450 }
451
452 /* Create the replacement registers up front. */
453 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
454 {
455 enum machine_mode mode;
456 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
457 mode != VOIDmode;
458 mode = GET_MODE_WIDER_MODE (mode))
459 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
460 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
461 mode != VOIDmode;
462 mode = GET_MODE_WIDER_MODE (mode))
463 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
464 }
465
466 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
467
468 /* A QNaN for initializing uninitialized variables.
469
470 ??? We can't load from constant memory in PIC mode, because
471 we're inserting these instructions before the prologue and
472 the PIC register hasn't been set up. In that case, fall back
473 on zero, which we can get from `ldz'. */
474
475 if (flag_pic)
476 not_a_num = CONST0_RTX (SFmode);
477 else
478 {
479 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
480 not_a_num = force_const_mem (SFmode, not_a_num);
481 }
482
483 /* Allocate a cache for stack_regs_mentioned. */
484 max_uid = get_max_uid ();
485 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
486 "stack_regs_mentioned cache");
487
488 convert_regs (file);
489
490 free_aux_for_blocks ();
491 return true;
492 }
493
494 \f
495 /* Return a pointer to the REG expression within PAT. If PAT is not a
496 REG, possible enclosed by a conversion rtx, return the inner part of
497 PAT that stopped the search. */
498
499 static rtx *
500 get_true_reg (rtx *pat)
501 {
502 for (;;)
503 switch (GET_CODE (*pat))
504 {
505 case SUBREG:
506 /* Eliminate FP subregister accesses in favor of the
507 actual FP register in use. */
508 {
509 rtx subreg;
510 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
511 {
512 int regno_off = subreg_regno_offset (REGNO (subreg),
513 GET_MODE (subreg),
514 SUBREG_BYTE (*pat),
515 GET_MODE (*pat));
516 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
517 GET_MODE (subreg));
518 default:
519 return pat;
520 }
521 }
522 case FLOAT:
523 case FIX:
524 case FLOAT_EXTEND:
525 pat = & XEXP (*pat, 0);
526 break;
527
528 case FLOAT_TRUNCATE:
529 if (!flag_unsafe_math_optimizations)
530 return pat;
531 pat = & XEXP (*pat, 0);
532 break;
533 }
534 }
535 \f
536 /* Set if we find any malformed asms in a block. */
537 static bool any_malformed_asm;
538
539 /* There are many rules that an asm statement for stack-like regs must
540 follow. Those rules are explained at the top of this file: the rule
541 numbers below refer to that explanation. */
542
543 static int
544 check_asm_stack_operands (rtx insn)
545 {
546 int i;
547 int n_clobbers;
548 int malformed_asm = 0;
549 rtx body = PATTERN (insn);
550
551 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
552 char implicitly_dies[FIRST_PSEUDO_REGISTER];
553 int alt;
554
555 rtx *clobber_reg = 0;
556 int n_inputs, n_outputs;
557
558 /* Find out what the constraints require. If no constraint
559 alternative matches, this asm is malformed. */
560 extract_insn (insn);
561 constrain_operands (1);
562 alt = which_alternative;
563
564 preprocess_constraints ();
565
566 n_inputs = get_asm_operand_n_inputs (body);
567 n_outputs = recog_data.n_operands - n_inputs;
568
569 if (alt < 0)
570 {
571 malformed_asm = 1;
572 /* Avoid further trouble with this insn. */
573 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
574 return 0;
575 }
576
577 /* Strip SUBREGs here to make the following code simpler. */
578 for (i = 0; i < recog_data.n_operands; i++)
579 if (GET_CODE (recog_data.operand[i]) == SUBREG
580 && REG_P (SUBREG_REG (recog_data.operand[i])))
581 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
582
583 /* Set up CLOBBER_REG. */
584
585 n_clobbers = 0;
586
587 if (GET_CODE (body) == PARALLEL)
588 {
589 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
590
591 for (i = 0; i < XVECLEN (body, 0); i++)
592 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
593 {
594 rtx clobber = XVECEXP (body, 0, i);
595 rtx reg = XEXP (clobber, 0);
596
597 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
598 reg = SUBREG_REG (reg);
599
600 if (STACK_REG_P (reg))
601 {
602 clobber_reg[n_clobbers] = reg;
603 n_clobbers++;
604 }
605 }
606 }
607
608 /* Enforce rule #4: Output operands must specifically indicate which
609 reg an output appears in after an asm. "=f" is not allowed: the
610 operand constraints must select a class with a single reg.
611
612 Also enforce rule #5: Output operands must start at the top of
613 the reg-stack: output operands may not "skip" a reg. */
614
615 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
616 for (i = 0; i < n_outputs; i++)
617 if (STACK_REG_P (recog_data.operand[i]))
618 {
619 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
620 {
621 error_for_asm (insn, "output constraint %d must specify a single register", i);
622 malformed_asm = 1;
623 }
624 else
625 {
626 int j;
627
628 for (j = 0; j < n_clobbers; j++)
629 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
630 {
631 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
632 i, reg_names [REGNO (clobber_reg[j])]);
633 malformed_asm = 1;
634 break;
635 }
636 if (j == n_clobbers)
637 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
638 }
639 }
640
641
642 /* Search for first non-popped reg. */
643 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
644 if (! reg_used_as_output[i])
645 break;
646
647 /* If there are any other popped regs, that's an error. */
648 for (; i < LAST_STACK_REG + 1; i++)
649 if (reg_used_as_output[i])
650 break;
651
652 if (i != LAST_STACK_REG + 1)
653 {
654 error_for_asm (insn, "output regs must be grouped at top of stack");
655 malformed_asm = 1;
656 }
657
658 /* Enforce rule #2: All implicitly popped input regs must be closer
659 to the top of the reg-stack than any input that is not implicitly
660 popped. */
661
662 memset (implicitly_dies, 0, sizeof (implicitly_dies));
663 for (i = n_outputs; i < n_outputs + n_inputs; i++)
664 if (STACK_REG_P (recog_data.operand[i]))
665 {
666 /* An input reg is implicitly popped if it is tied to an
667 output, or if there is a CLOBBER for it. */
668 int j;
669
670 for (j = 0; j < n_clobbers; j++)
671 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
672 break;
673
674 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
675 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
676 }
677
678 /* Search for first non-popped reg. */
679 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
680 if (! implicitly_dies[i])
681 break;
682
683 /* If there are any other popped regs, that's an error. */
684 for (; i < LAST_STACK_REG + 1; i++)
685 if (implicitly_dies[i])
686 break;
687
688 if (i != LAST_STACK_REG + 1)
689 {
690 error_for_asm (insn,
691 "implicitly popped regs must be grouped at top of stack");
692 malformed_asm = 1;
693 }
694
695 /* Enforce rule #3: If any input operand uses the "f" constraint, all
696 output constraints must use the "&" earlyclobber.
697
698 ??? Detect this more deterministically by having constrain_asm_operands
699 record any earlyclobber. */
700
701 for (i = n_outputs; i < n_outputs + n_inputs; i++)
702 if (recog_op_alt[i][alt].matches == -1)
703 {
704 int j;
705
706 for (j = 0; j < n_outputs; j++)
707 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
708 {
709 error_for_asm (insn,
710 "output operand %d must use %<&%> constraint", j);
711 malformed_asm = 1;
712 }
713 }
714
715 if (malformed_asm)
716 {
717 /* Avoid further trouble with this insn. */
718 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
719 any_malformed_asm = true;
720 return 0;
721 }
722
723 return 1;
724 }
725 \f
726 /* Calculate the number of inputs and outputs in BODY, an
727 asm_operands. N_OPERANDS is the total number of operands, and
728 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
729 placed. */
730
731 static int
732 get_asm_operand_n_inputs (rtx body)
733 {
734 switch (GET_CODE (body))
735 {
736 case SET:
737 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
738 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
739
740 case ASM_OPERANDS:
741 return ASM_OPERANDS_INPUT_LENGTH (body);
742
743 case PARALLEL:
744 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
745
746 default:
747 gcc_unreachable ();
748 }
749 }
750
751 /* If current function returns its result in an fp stack register,
752 return the REG. Otherwise, return 0. */
753
754 static rtx
755 stack_result (tree decl)
756 {
757 rtx result;
758
759 /* If the value is supposed to be returned in memory, then clearly
760 it is not returned in a stack register. */
761 if (aggregate_value_p (DECL_RESULT (decl), decl))
762 return 0;
763
764 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
765 if (result != 0)
766 {
767 #ifdef FUNCTION_OUTGOING_VALUE
768 result
769 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
770 #else
771 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
772 #endif
773 }
774
775 return result != 0 && STACK_REG_P (result) ? result : 0;
776 }
777 \f
778
779 /*
780 * This section deals with stack register substitution, and forms the second
781 * pass over the RTL.
782 */
783
784 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
785 the desired hard REGNO. */
786
787 static void
788 replace_reg (rtx *reg, int regno)
789 {
790 gcc_assert (regno >= FIRST_STACK_REG);
791 gcc_assert (regno <= LAST_STACK_REG);
792 gcc_assert (STACK_REG_P (*reg));
793
794 gcc_assert (GET_MODE_CLASS (GET_MODE (*reg)) == MODE_FLOAT
795 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
796
797 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
798 }
799
800 /* Remove a note of type NOTE, which must be found, for register
801 number REGNO from INSN. Remove only one such note. */
802
803 static void
804 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
805 {
806 rtx *note_link, this;
807
808 note_link = &REG_NOTES (insn);
809 for (this = *note_link; this; this = XEXP (this, 1))
810 if (REG_NOTE_KIND (this) == note
811 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
812 {
813 *note_link = XEXP (this, 1);
814 return;
815 }
816 else
817 note_link = &XEXP (this, 1);
818
819 gcc_unreachable ();
820 }
821
822 /* Find the hard register number of virtual register REG in REGSTACK.
823 The hard register number is relative to the top of the stack. -1 is
824 returned if the register is not found. */
825
826 static int
827 get_hard_regnum (stack regstack, rtx reg)
828 {
829 int i;
830
831 gcc_assert (STACK_REG_P (reg));
832
833 for (i = regstack->top; i >= 0; i--)
834 if (regstack->reg[i] == REGNO (reg))
835 break;
836
837 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
838 }
839 \f
840 /* Emit an insn to pop virtual register REG before or after INSN.
841 REGSTACK is the stack state after INSN and is updated to reflect this
842 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
843 is represented as a SET whose destination is the register to be popped
844 and source is the top of stack. A death note for the top of stack
845 cases the movdf pattern to pop. */
846
847 static rtx
848 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
849 {
850 rtx pop_insn, pop_rtx;
851 int hard_regno;
852
853 /* For complex types take care to pop both halves. These may survive in
854 CLOBBER and USE expressions. */
855 if (COMPLEX_MODE_P (GET_MODE (reg)))
856 {
857 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
858 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
859
860 pop_insn = NULL_RTX;
861 if (get_hard_regnum (regstack, reg1) >= 0)
862 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
863 if (get_hard_regnum (regstack, reg2) >= 0)
864 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
865 gcc_assert (pop_insn);
866 return pop_insn;
867 }
868
869 hard_regno = get_hard_regnum (regstack, reg);
870
871 gcc_assert (hard_regno >= FIRST_STACK_REG);
872
873 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
874 FP_MODE_REG (FIRST_STACK_REG, DFmode));
875
876 if (where == EMIT_AFTER)
877 pop_insn = emit_insn_after (pop_rtx, insn);
878 else
879 pop_insn = emit_insn_before (pop_rtx, insn);
880
881 REG_NOTES (pop_insn)
882 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
883 REG_NOTES (pop_insn));
884
885 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
886 = regstack->reg[regstack->top];
887 regstack->top -= 1;
888 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
889
890 return pop_insn;
891 }
892 \f
893 /* Emit an insn before or after INSN to swap virtual register REG with
894 the top of stack. REGSTACK is the stack state before the swap, and
895 is updated to reflect the swap. A swap insn is represented as a
896 PARALLEL of two patterns: each pattern moves one reg to the other.
897
898 If REG is already at the top of the stack, no insn is emitted. */
899
900 static void
901 emit_swap_insn (rtx insn, stack regstack, rtx reg)
902 {
903 int hard_regno;
904 rtx swap_rtx;
905 int tmp, other_reg; /* swap regno temps */
906 rtx i1; /* the stack-reg insn prior to INSN */
907 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
908
909 hard_regno = get_hard_regnum (regstack, reg);
910
911 gcc_assert (hard_regno >= FIRST_STACK_REG);
912 if (hard_regno == FIRST_STACK_REG)
913 return;
914
915 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
916
917 tmp = regstack->reg[other_reg];
918 regstack->reg[other_reg] = regstack->reg[regstack->top];
919 regstack->reg[regstack->top] = tmp;
920
921 /* Find the previous insn involving stack regs, but don't pass a
922 block boundary. */
923 i1 = NULL;
924 if (current_block && insn != BB_HEAD (current_block))
925 {
926 rtx tmp = PREV_INSN (insn);
927 rtx limit = PREV_INSN (BB_HEAD (current_block));
928 while (tmp != limit)
929 {
930 if (LABEL_P (tmp)
931 || CALL_P (tmp)
932 || NOTE_INSN_BASIC_BLOCK_P (tmp)
933 || (NOTE_P (tmp)
934 && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE)
935 || (NONJUMP_INSN_P (tmp)
936 && stack_regs_mentioned (tmp)))
937 {
938 i1 = tmp;
939 break;
940 }
941 tmp = PREV_INSN (tmp);
942 }
943 }
944
945 if (i1 != NULL_RTX
946 && (i1set = single_set (i1)) != NULL_RTX)
947 {
948 rtx i1src = *get_true_reg (&SET_SRC (i1set));
949 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
950
951 /* If the previous register stack push was from the reg we are to
952 swap with, omit the swap. */
953
954 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
955 && REG_P (i1src)
956 && REGNO (i1src) == (unsigned) hard_regno - 1
957 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
958 return;
959
960 /* If the previous insn wrote to the reg we are to swap with,
961 omit the swap. */
962
963 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
964 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
965 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
966 return;
967 }
968
969 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
970 FP_MODE_REG (FIRST_STACK_REG, XFmode));
971
972 if (i1)
973 emit_insn_after (swap_rtx, i1);
974 else if (current_block)
975 emit_insn_before (swap_rtx, BB_HEAD (current_block));
976 else
977 emit_insn_before (swap_rtx, insn);
978 }
979 \f
980 /* Emit an insns before INSN to swap virtual register SRC1 with
981 the top of stack and virtual register SRC2 with second stack
982 slot. REGSTACK is the stack state before the swaps, and
983 is updated to reflect the swaps. A swap insn is represented as a
984 PARALLEL of two patterns: each pattern moves one reg to the other.
985
986 If SRC1 and/or SRC2 are already at the right place, no swap insn
987 is emitted. */
988
989 static void
990 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
991 {
992 struct stack_def temp_stack;
993 int regno, j, k, temp;
994
995 temp_stack = *regstack;
996
997 /* Place operand 1 at the top of stack. */
998 regno = get_hard_regnum (&temp_stack, src1);
999 gcc_assert (regno >= 0);
1000 if (regno != FIRST_STACK_REG)
1001 {
1002 k = temp_stack.top - (regno - FIRST_STACK_REG);
1003 j = temp_stack.top;
1004
1005 temp = temp_stack.reg[k];
1006 temp_stack.reg[k] = temp_stack.reg[j];
1007 temp_stack.reg[j] = temp;
1008 }
1009
1010 /* Place operand 2 next on the stack. */
1011 regno = get_hard_regnum (&temp_stack, src2);
1012 gcc_assert (regno >= 0);
1013 if (regno != FIRST_STACK_REG + 1)
1014 {
1015 k = temp_stack.top - (regno - FIRST_STACK_REG);
1016 j = temp_stack.top - 1;
1017
1018 temp = temp_stack.reg[k];
1019 temp_stack.reg[k] = temp_stack.reg[j];
1020 temp_stack.reg[j] = temp;
1021 }
1022
1023 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1024 }
1025 \f
1026 /* Handle a move to or from a stack register in PAT, which is in INSN.
1027 REGSTACK is the current stack. Return whether a control flow insn
1028 was deleted in the process. */
1029
1030 static bool
1031 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
1032 {
1033 rtx *psrc = get_true_reg (&SET_SRC (pat));
1034 rtx *pdest = get_true_reg (&SET_DEST (pat));
1035 rtx src, dest;
1036 rtx note;
1037 bool control_flow_insn_deleted = false;
1038
1039 src = *psrc; dest = *pdest;
1040
1041 if (STACK_REG_P (src) && STACK_REG_P (dest))
1042 {
1043 /* Write from one stack reg to another. If SRC dies here, then
1044 just change the register mapping and delete the insn. */
1045
1046 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1047 if (note)
1048 {
1049 int i;
1050
1051 /* If this is a no-op move, there must not be a REG_DEAD note. */
1052 gcc_assert (REGNO (src) != REGNO (dest));
1053
1054 for (i = regstack->top; i >= 0; i--)
1055 if (regstack->reg[i] == REGNO (src))
1056 break;
1057
1058 /* The source must be live, and the dest must be dead. */
1059 gcc_assert (i >= 0);
1060 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1061
1062 /* It is possible that the dest is unused after this insn.
1063 If so, just pop the src. */
1064
1065 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1066 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1067 else
1068 {
1069 regstack->reg[i] = REGNO (dest);
1070 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1071 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1072 }
1073
1074 control_flow_insn_deleted |= control_flow_insn_p (insn);
1075 delete_insn (insn);
1076 return control_flow_insn_deleted;
1077 }
1078
1079 /* The source reg does not die. */
1080
1081 /* If this appears to be a no-op move, delete it, or else it
1082 will confuse the machine description output patterns. But if
1083 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1084 for REG_UNUSED will not work for deleted insns. */
1085
1086 if (REGNO (src) == REGNO (dest))
1087 {
1088 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1089 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1090
1091 control_flow_insn_deleted |= control_flow_insn_p (insn);
1092 delete_insn (insn);
1093 return control_flow_insn_deleted;
1094 }
1095
1096 /* The destination ought to be dead. */
1097 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1098
1099 replace_reg (psrc, get_hard_regnum (regstack, src));
1100
1101 regstack->reg[++regstack->top] = REGNO (dest);
1102 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1103 replace_reg (pdest, FIRST_STACK_REG);
1104 }
1105 else if (STACK_REG_P (src))
1106 {
1107 /* Save from a stack reg to MEM, or possibly integer reg. Since
1108 only top of stack may be saved, emit an exchange first if
1109 needs be. */
1110
1111 emit_swap_insn (insn, regstack, src);
1112
1113 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1114 if (note)
1115 {
1116 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1117 regstack->top--;
1118 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1119 }
1120 else if ((GET_MODE (src) == XFmode)
1121 && regstack->top < REG_STACK_SIZE - 1)
1122 {
1123 /* A 387 cannot write an XFmode value to a MEM without
1124 clobbering the source reg. The output code can handle
1125 this by reading back the value from the MEM.
1126 But it is more efficient to use a temp register if one is
1127 available. Push the source value here if the register
1128 stack is not full, and then write the value to memory via
1129 a pop. */
1130 rtx push_rtx, push_insn;
1131 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1132
1133 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1134 push_insn = emit_insn_before (push_rtx, insn);
1135 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1136 REG_NOTES (insn));
1137 }
1138
1139 replace_reg (psrc, FIRST_STACK_REG);
1140 }
1141 else
1142 {
1143 gcc_assert (STACK_REG_P (dest));
1144
1145 /* Load from MEM, or possibly integer REG or constant, into the
1146 stack regs. The actual target is always the top of the
1147 stack. The stack mapping is changed to reflect that DEST is
1148 now at top of stack. */
1149
1150 /* The destination ought to be dead. */
1151 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1152
1153 gcc_assert (regstack->top < REG_STACK_SIZE);
1154
1155 regstack->reg[++regstack->top] = REGNO (dest);
1156 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1157 replace_reg (pdest, FIRST_STACK_REG);
1158 }
1159
1160 return control_flow_insn_deleted;
1161 }
1162 \f
1163 /* Swap the condition on a branch, if there is one. Return true if we
1164 found a condition to swap. False if the condition was not used as
1165 such. */
1166
1167 static int
1168 swap_rtx_condition_1 (rtx pat)
1169 {
1170 const char *fmt;
1171 int i, r = 0;
1172
1173 if (COMPARISON_P (pat))
1174 {
1175 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1176 r = 1;
1177 }
1178 else
1179 {
1180 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1181 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1182 {
1183 if (fmt[i] == 'E')
1184 {
1185 int j;
1186
1187 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1188 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1189 }
1190 else if (fmt[i] == 'e')
1191 r |= swap_rtx_condition_1 (XEXP (pat, i));
1192 }
1193 }
1194
1195 return r;
1196 }
1197
1198 static int
1199 swap_rtx_condition (rtx insn)
1200 {
1201 rtx pat = PATTERN (insn);
1202
1203 /* We're looking for a single set to cc0 or an HImode temporary. */
1204
1205 if (GET_CODE (pat) == SET
1206 && REG_P (SET_DEST (pat))
1207 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1208 {
1209 insn = next_flags_user (insn);
1210 if (insn == NULL_RTX)
1211 return 0;
1212 pat = PATTERN (insn);
1213 }
1214
1215 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1216 not doing anything with the cc value right now. We may be able to
1217 search for one though. */
1218
1219 if (GET_CODE (pat) == SET
1220 && GET_CODE (SET_SRC (pat)) == UNSPEC
1221 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1222 {
1223 rtx dest = SET_DEST (pat);
1224
1225 /* Search forward looking for the first use of this value.
1226 Stop at block boundaries. */
1227 while (insn != BB_END (current_block))
1228 {
1229 insn = NEXT_INSN (insn);
1230 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1231 break;
1232 if (CALL_P (insn))
1233 return 0;
1234 }
1235
1236 /* So we've found the insn using this value. If it is anything
1237 other than sahf, aka unspec 10, or the value does not die
1238 (meaning we'd have to search further), then we must give up. */
1239 pat = PATTERN (insn);
1240 if (GET_CODE (pat) != SET
1241 || GET_CODE (SET_SRC (pat)) != UNSPEC
1242 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1243 || ! dead_or_set_p (insn, dest))
1244 return 0;
1245
1246 /* Now we are prepared to handle this as a normal cc0 setter. */
1247 insn = next_flags_user (insn);
1248 if (insn == NULL_RTX)
1249 return 0;
1250 pat = PATTERN (insn);
1251 }
1252
1253 if (swap_rtx_condition_1 (pat))
1254 {
1255 int fail = 0;
1256 INSN_CODE (insn) = -1;
1257 if (recog_memoized (insn) == -1)
1258 fail = 1;
1259 /* In case the flags don't die here, recurse to try fix
1260 following user too. */
1261 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1262 {
1263 insn = next_flags_user (insn);
1264 if (!insn || !swap_rtx_condition (insn))
1265 fail = 1;
1266 }
1267 if (fail)
1268 {
1269 swap_rtx_condition_1 (pat);
1270 return 0;
1271 }
1272 return 1;
1273 }
1274 return 0;
1275 }
1276
1277 /* Handle a comparison. Special care needs to be taken to avoid
1278 causing comparisons that a 387 cannot do correctly, such as EQ.
1279
1280 Also, a pop insn may need to be emitted. The 387 does have an
1281 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1282 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1283 set up. */
1284
1285 static void
1286 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1287 {
1288 rtx *src1, *src2;
1289 rtx src1_note, src2_note;
1290 rtx flags_user;
1291
1292 src1 = get_true_reg (&XEXP (pat_src, 0));
1293 src2 = get_true_reg (&XEXP (pat_src, 1));
1294 flags_user = next_flags_user (insn);
1295
1296 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1297 registers that die in this insn - move those to stack top first. */
1298 if ((! STACK_REG_P (*src1)
1299 || (STACK_REG_P (*src2)
1300 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1301 && swap_rtx_condition (insn))
1302 {
1303 rtx temp;
1304 temp = XEXP (pat_src, 0);
1305 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1306 XEXP (pat_src, 1) = temp;
1307
1308 src1 = get_true_reg (&XEXP (pat_src, 0));
1309 src2 = get_true_reg (&XEXP (pat_src, 1));
1310
1311 INSN_CODE (insn) = -1;
1312 }
1313
1314 /* We will fix any death note later. */
1315
1316 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1317
1318 if (STACK_REG_P (*src2))
1319 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1320 else
1321 src2_note = NULL_RTX;
1322
1323 emit_swap_insn (insn, regstack, *src1);
1324
1325 replace_reg (src1, FIRST_STACK_REG);
1326
1327 if (STACK_REG_P (*src2))
1328 replace_reg (src2, get_hard_regnum (regstack, *src2));
1329
1330 if (src1_note)
1331 {
1332 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1333 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1334 }
1335
1336 /* If the second operand dies, handle that. But if the operands are
1337 the same stack register, don't bother, because only one death is
1338 needed, and it was just handled. */
1339
1340 if (src2_note
1341 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1342 && REGNO (*src1) == REGNO (*src2)))
1343 {
1344 /* As a special case, two regs may die in this insn if src2 is
1345 next to top of stack and the top of stack also dies. Since
1346 we have already popped src1, "next to top of stack" is really
1347 at top (FIRST_STACK_REG) now. */
1348
1349 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1350 && src1_note)
1351 {
1352 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1353 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1354 }
1355 else
1356 {
1357 /* The 386 can only represent death of the first operand in
1358 the case handled above. In all other cases, emit a separate
1359 pop and remove the death note from here. */
1360
1361 /* link_cc0_insns (insn); */
1362
1363 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1364
1365 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1366 EMIT_AFTER);
1367 }
1368 }
1369 }
1370 \f
1371 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1372 is the current register layout. Return whether a control flow insn
1373 was deleted in the process. */
1374
1375 static bool
1376 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1377 {
1378 rtx *dest, *src;
1379 bool control_flow_insn_deleted = false;
1380
1381 switch (GET_CODE (pat))
1382 {
1383 case USE:
1384 /* Deaths in USE insns can happen in non optimizing compilation.
1385 Handle them by popping the dying register. */
1386 src = get_true_reg (&XEXP (pat, 0));
1387 if (STACK_REG_P (*src)
1388 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1389 {
1390 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1391 return control_flow_insn_deleted;
1392 }
1393 /* ??? Uninitialized USE should not happen. */
1394 else
1395 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1396 break;
1397
1398 case CLOBBER:
1399 {
1400 rtx note;
1401
1402 dest = get_true_reg (&XEXP (pat, 0));
1403 if (STACK_REG_P (*dest))
1404 {
1405 note = find_reg_note (insn, REG_DEAD, *dest);
1406
1407 if (pat != PATTERN (insn))
1408 {
1409 /* The fix_truncdi_1 pattern wants to be able to allocate
1410 it's own scratch register. It does this by clobbering
1411 an fp reg so that it is assured of an empty reg-stack
1412 register. If the register is live, kill it now.
1413 Remove the DEAD/UNUSED note so we don't try to kill it
1414 later too. */
1415
1416 if (note)
1417 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1418 else
1419 {
1420 note = find_reg_note (insn, REG_UNUSED, *dest);
1421 gcc_assert (note);
1422 }
1423 remove_note (insn, note);
1424 replace_reg (dest, FIRST_STACK_REG + 1);
1425 }
1426 else
1427 {
1428 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1429 indicates an uninitialized value. Because reload removed
1430 all other clobbers, this must be due to a function
1431 returning without a value. Load up a NaN. */
1432
1433 if (! note
1434 && get_hard_regnum (regstack, *dest) == -1)
1435 {
1436 pat = gen_rtx_SET (VOIDmode,
1437 FP_MODE_REG (REGNO (*dest), SFmode),
1438 not_a_num);
1439 PATTERN (insn) = pat;
1440 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1441 }
1442 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1443 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1444 {
1445 pat = gen_rtx_SET (VOIDmode,
1446 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1447 not_a_num);
1448 PATTERN (insn) = pat;
1449 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1450 }
1451 }
1452 }
1453 break;
1454 }
1455
1456 case SET:
1457 {
1458 rtx *src1 = (rtx *) 0, *src2;
1459 rtx src1_note, src2_note;
1460 rtx pat_src;
1461
1462 dest = get_true_reg (&SET_DEST (pat));
1463 src = get_true_reg (&SET_SRC (pat));
1464 pat_src = SET_SRC (pat);
1465
1466 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1467 if (STACK_REG_P (*src)
1468 || (STACK_REG_P (*dest)
1469 && (REG_P (*src) || MEM_P (*src)
1470 || GET_CODE (*src) == CONST_DOUBLE)))
1471 {
1472 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1473 break;
1474 }
1475
1476 switch (GET_CODE (pat_src))
1477 {
1478 case COMPARE:
1479 compare_for_stack_reg (insn, regstack, pat_src);
1480 break;
1481
1482 case CALL:
1483 {
1484 int count;
1485 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1486 --count >= 0;)
1487 {
1488 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1489 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1490 }
1491 }
1492 replace_reg (dest, FIRST_STACK_REG);
1493 break;
1494
1495 case REG:
1496 /* This is a `tstM2' case. */
1497 gcc_assert (*dest == cc0_rtx);
1498 src1 = src;
1499
1500 /* Fall through. */
1501
1502 case FLOAT_TRUNCATE:
1503 case SQRT:
1504 case ABS:
1505 case NEG:
1506 /* These insns only operate on the top of the stack. DEST might
1507 be cc0_rtx if we're processing a tstM pattern. Also, it's
1508 possible that the tstM case results in a REG_DEAD note on the
1509 source. */
1510
1511 if (src1 == 0)
1512 src1 = get_true_reg (&XEXP (pat_src, 0));
1513
1514 emit_swap_insn (insn, regstack, *src1);
1515
1516 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1517
1518 if (STACK_REG_P (*dest))
1519 replace_reg (dest, FIRST_STACK_REG);
1520
1521 if (src1_note)
1522 {
1523 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1524 regstack->top--;
1525 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1526 }
1527
1528 replace_reg (src1, FIRST_STACK_REG);
1529 break;
1530
1531 case MINUS:
1532 case DIV:
1533 /* On i386, reversed forms of subM3 and divM3 exist for
1534 MODE_FLOAT, so the same code that works for addM3 and mulM3
1535 can be used. */
1536 case MULT:
1537 case PLUS:
1538 /* These insns can accept the top of stack as a destination
1539 from a stack reg or mem, or can use the top of stack as a
1540 source and some other stack register (possibly top of stack)
1541 as a destination. */
1542
1543 src1 = get_true_reg (&XEXP (pat_src, 0));
1544 src2 = get_true_reg (&XEXP (pat_src, 1));
1545
1546 /* We will fix any death note later. */
1547
1548 if (STACK_REG_P (*src1))
1549 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1550 else
1551 src1_note = NULL_RTX;
1552 if (STACK_REG_P (*src2))
1553 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1554 else
1555 src2_note = NULL_RTX;
1556
1557 /* If either operand is not a stack register, then the dest
1558 must be top of stack. */
1559
1560 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1561 emit_swap_insn (insn, regstack, *dest);
1562 else
1563 {
1564 /* Both operands are REG. If neither operand is already
1565 at the top of stack, choose to make the one that is the dest
1566 the new top of stack. */
1567
1568 int src1_hard_regnum, src2_hard_regnum;
1569
1570 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1571 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1572 gcc_assert (src1_hard_regnum != -1);
1573 gcc_assert (src2_hard_regnum != -1);
1574
1575 if (src1_hard_regnum != FIRST_STACK_REG
1576 && src2_hard_regnum != FIRST_STACK_REG)
1577 emit_swap_insn (insn, regstack, *dest);
1578 }
1579
1580 if (STACK_REG_P (*src1))
1581 replace_reg (src1, get_hard_regnum (regstack, *src1));
1582 if (STACK_REG_P (*src2))
1583 replace_reg (src2, get_hard_regnum (regstack, *src2));
1584
1585 if (src1_note)
1586 {
1587 rtx src1_reg = XEXP (src1_note, 0);
1588
1589 /* If the register that dies is at the top of stack, then
1590 the destination is somewhere else - merely substitute it.
1591 But if the reg that dies is not at top of stack, then
1592 move the top of stack to the dead reg, as though we had
1593 done the insn and then a store-with-pop. */
1594
1595 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1596 {
1597 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1598 replace_reg (dest, get_hard_regnum (regstack, *dest));
1599 }
1600 else
1601 {
1602 int regno = get_hard_regnum (regstack, src1_reg);
1603
1604 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1605 replace_reg (dest, regno);
1606
1607 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1608 = regstack->reg[regstack->top];
1609 }
1610
1611 CLEAR_HARD_REG_BIT (regstack->reg_set,
1612 REGNO (XEXP (src1_note, 0)));
1613 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1614 regstack->top--;
1615 }
1616 else if (src2_note)
1617 {
1618 rtx src2_reg = XEXP (src2_note, 0);
1619 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1620 {
1621 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1622 replace_reg (dest, get_hard_regnum (regstack, *dest));
1623 }
1624 else
1625 {
1626 int regno = get_hard_regnum (regstack, src2_reg);
1627
1628 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1629 replace_reg (dest, regno);
1630
1631 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1632 = regstack->reg[regstack->top];
1633 }
1634
1635 CLEAR_HARD_REG_BIT (regstack->reg_set,
1636 REGNO (XEXP (src2_note, 0)));
1637 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1638 regstack->top--;
1639 }
1640 else
1641 {
1642 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1643 replace_reg (dest, get_hard_regnum (regstack, *dest));
1644 }
1645
1646 /* Keep operand 1 matching with destination. */
1647 if (COMMUTATIVE_ARITH_P (pat_src)
1648 && REG_P (*src1) && REG_P (*src2)
1649 && REGNO (*src1) != REGNO (*dest))
1650 {
1651 int tmp = REGNO (*src1);
1652 replace_reg (src1, REGNO (*src2));
1653 replace_reg (src2, tmp);
1654 }
1655 break;
1656
1657 case UNSPEC:
1658 switch (XINT (pat_src, 1))
1659 {
1660 case UNSPEC_SIN:
1661 case UNSPEC_COS:
1662 case UNSPEC_FRNDINT:
1663 case UNSPEC_F2XM1:
1664
1665 case UNSPEC_FRNDINT_FLOOR:
1666 case UNSPEC_FRNDINT_CEIL:
1667 case UNSPEC_FRNDINT_TRUNC:
1668 case UNSPEC_FRNDINT_MASK_PM:
1669
1670 /* These insns only operate on the top of the stack. */
1671
1672 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1673
1674 emit_swap_insn (insn, regstack, *src1);
1675
1676 /* Input should never die, it is
1677 replaced with output. */
1678 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1679 gcc_assert (!src1_note);
1680
1681 if (STACK_REG_P (*dest))
1682 replace_reg (dest, FIRST_STACK_REG);
1683
1684 replace_reg (src1, FIRST_STACK_REG);
1685 break;
1686
1687 case UNSPEC_FPATAN:
1688 case UNSPEC_FYL2X:
1689 case UNSPEC_FYL2XP1:
1690 /* These insns operate on the top two stack slots. */
1691
1692 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1693 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1694
1695 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1696 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1697
1698 swap_to_top (insn, regstack, *src1, *src2);
1699
1700 replace_reg (src1, FIRST_STACK_REG);
1701 replace_reg (src2, FIRST_STACK_REG + 1);
1702
1703 if (src1_note)
1704 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1705 if (src2_note)
1706 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1707
1708 /* Pop both input operands from the stack. */
1709 CLEAR_HARD_REG_BIT (regstack->reg_set,
1710 regstack->reg[regstack->top]);
1711 CLEAR_HARD_REG_BIT (regstack->reg_set,
1712 regstack->reg[regstack->top - 1]);
1713 regstack->top -= 2;
1714
1715 /* Push the result back onto the stack. */
1716 regstack->reg[++regstack->top] = REGNO (*dest);
1717 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1718 replace_reg (dest, FIRST_STACK_REG);
1719 break;
1720
1721 case UNSPEC_FSCALE_FRACT:
1722 case UNSPEC_FPREM_F:
1723 case UNSPEC_FPREM1_F:
1724 /* These insns operate on the top two stack slots.
1725 first part of double input, double output insn. */
1726
1727 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1728 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1729
1730 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1731 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1732
1733 /* Inputs should never die, they are
1734 replaced with outputs. */
1735 gcc_assert (!src1_note);
1736 gcc_assert (!src2_note);
1737
1738 swap_to_top (insn, regstack, *src1, *src2);
1739
1740 /* Push the result back onto stack. Empty stack slot
1741 will be filled in second part of insn. */
1742 if (STACK_REG_P (*dest)) {
1743 regstack->reg[regstack->top] = REGNO (*dest);
1744 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1745 replace_reg (dest, FIRST_STACK_REG);
1746 }
1747
1748 replace_reg (src1, FIRST_STACK_REG);
1749 replace_reg (src2, FIRST_STACK_REG + 1);
1750 break;
1751
1752 case UNSPEC_FSCALE_EXP:
1753 case UNSPEC_FPREM_U:
1754 case UNSPEC_FPREM1_U:
1755 /* These insns operate on the top two stack slots./
1756 second part of double input, double output insn. */
1757
1758 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1759 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1760
1761 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1762 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1763
1764 /* Inputs should never die, they are
1765 replaced with outputs. */
1766 gcc_assert (!src1_note);
1767 gcc_assert (!src2_note);
1768
1769 swap_to_top (insn, regstack, *src1, *src2);
1770
1771 /* Push the result back onto stack. Fill empty slot from
1772 first part of insn and fix top of stack pointer. */
1773 if (STACK_REG_P (*dest)) {
1774 regstack->reg[regstack->top - 1] = REGNO (*dest);
1775 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1776 replace_reg (dest, FIRST_STACK_REG + 1);
1777 }
1778
1779 replace_reg (src1, FIRST_STACK_REG);
1780 replace_reg (src2, FIRST_STACK_REG + 1);
1781 break;
1782
1783 case UNSPEC_SINCOS_COS:
1784 case UNSPEC_TAN_ONE:
1785 case UNSPEC_XTRACT_FRACT:
1786 /* These insns operate on the top two stack slots,
1787 first part of one input, double output insn. */
1788
1789 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1790
1791 emit_swap_insn (insn, regstack, *src1);
1792
1793 /* Input should never die, it is
1794 replaced with output. */
1795 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1796 gcc_assert (!src1_note);
1797
1798 /* Push the result back onto stack. Empty stack slot
1799 will be filled in second part of insn. */
1800 if (STACK_REG_P (*dest)) {
1801 regstack->reg[regstack->top + 1] = REGNO (*dest);
1802 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1803 replace_reg (dest, FIRST_STACK_REG);
1804 }
1805
1806 replace_reg (src1, FIRST_STACK_REG);
1807 break;
1808
1809 case UNSPEC_SINCOS_SIN:
1810 case UNSPEC_TAN_TAN:
1811 case UNSPEC_XTRACT_EXP:
1812 /* These insns operate on the top two stack slots,
1813 second part of one input, double output insn. */
1814
1815 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1816
1817 emit_swap_insn (insn, regstack, *src1);
1818
1819 /* Input should never die, it is
1820 replaced with output. */
1821 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1822 gcc_assert (!src1_note);
1823
1824 /* Push the result back onto stack. Fill empty slot from
1825 first part of insn and fix top of stack pointer. */
1826 if (STACK_REG_P (*dest)) {
1827 regstack->reg[regstack->top] = REGNO (*dest);
1828 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1829 replace_reg (dest, FIRST_STACK_REG + 1);
1830
1831 regstack->top++;
1832 }
1833
1834 replace_reg (src1, FIRST_STACK_REG);
1835 break;
1836
1837 case UNSPEC_SAHF:
1838 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1839 The combination matches the PPRO fcomi instruction. */
1840
1841 pat_src = XVECEXP (pat_src, 0, 0);
1842 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1843 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1844 /* Fall through. */
1845
1846 case UNSPEC_FNSTSW:
1847 /* Combined fcomp+fnstsw generated for doing well with
1848 CSE. When optimizing this would have been broken
1849 up before now. */
1850
1851 pat_src = XVECEXP (pat_src, 0, 0);
1852 gcc_assert (GET_CODE (pat_src) == COMPARE);
1853
1854 compare_for_stack_reg (insn, regstack, pat_src);
1855 break;
1856
1857 default:
1858 gcc_unreachable ();
1859 }
1860 break;
1861
1862 case IF_THEN_ELSE:
1863 /* This insn requires the top of stack to be the destination. */
1864
1865 src1 = get_true_reg (&XEXP (pat_src, 1));
1866 src2 = get_true_reg (&XEXP (pat_src, 2));
1867
1868 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1869 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1870
1871 /* If the comparison operator is an FP comparison operator,
1872 it is handled correctly by compare_for_stack_reg () who
1873 will move the destination to the top of stack. But if the
1874 comparison operator is not an FP comparison operator, we
1875 have to handle it here. */
1876 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1877 && REGNO (*dest) != regstack->reg[regstack->top])
1878 {
1879 /* In case one of operands is the top of stack and the operands
1880 dies, it is safe to make it the destination operand by
1881 reversing the direction of cmove and avoid fxch. */
1882 if ((REGNO (*src1) == regstack->reg[regstack->top]
1883 && src1_note)
1884 || (REGNO (*src2) == regstack->reg[regstack->top]
1885 && src2_note))
1886 {
1887 int idx1 = (get_hard_regnum (regstack, *src1)
1888 - FIRST_STACK_REG);
1889 int idx2 = (get_hard_regnum (regstack, *src2)
1890 - FIRST_STACK_REG);
1891
1892 /* Make reg-stack believe that the operands are already
1893 swapped on the stack */
1894 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1895 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1896
1897 /* Reverse condition to compensate the operand swap.
1898 i386 do have comparison always reversible. */
1899 PUT_CODE (XEXP (pat_src, 0),
1900 reversed_comparison_code (XEXP (pat_src, 0), insn));
1901 }
1902 else
1903 emit_swap_insn (insn, regstack, *dest);
1904 }
1905
1906 {
1907 rtx src_note [3];
1908 int i;
1909
1910 src_note[0] = 0;
1911 src_note[1] = src1_note;
1912 src_note[2] = src2_note;
1913
1914 if (STACK_REG_P (*src1))
1915 replace_reg (src1, get_hard_regnum (regstack, *src1));
1916 if (STACK_REG_P (*src2))
1917 replace_reg (src2, get_hard_regnum (regstack, *src2));
1918
1919 for (i = 1; i <= 2; i++)
1920 if (src_note [i])
1921 {
1922 int regno = REGNO (XEXP (src_note[i], 0));
1923
1924 /* If the register that dies is not at the top of
1925 stack, then move the top of stack to the dead reg.
1926 Top of stack should never die, as it is the
1927 destination. */
1928 gcc_assert (regno != regstack->reg[regstack->top]);
1929 remove_regno_note (insn, REG_DEAD, regno);
1930 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1931 EMIT_AFTER);
1932 }
1933 }
1934
1935 /* Make dest the top of stack. Add dest to regstack if
1936 not present. */
1937 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1938 regstack->reg[++regstack->top] = REGNO (*dest);
1939 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1940 replace_reg (dest, FIRST_STACK_REG);
1941 break;
1942
1943 default:
1944 gcc_unreachable ();
1945 }
1946 break;
1947 }
1948
1949 default:
1950 break;
1951 }
1952
1953 return control_flow_insn_deleted;
1954 }
1955 \f
1956 /* Substitute hard regnums for any stack regs in INSN, which has
1957 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1958 before the insn, and is updated with changes made here.
1959
1960 There are several requirements and assumptions about the use of
1961 stack-like regs in asm statements. These rules are enforced by
1962 record_asm_stack_regs; see comments there for details. Any
1963 asm_operands left in the RTL at this point may be assume to meet the
1964 requirements, since record_asm_stack_regs removes any problem asm. */
1965
1966 static void
1967 subst_asm_stack_regs (rtx insn, stack regstack)
1968 {
1969 rtx body = PATTERN (insn);
1970 int alt;
1971
1972 rtx *note_reg; /* Array of note contents */
1973 rtx **note_loc; /* Address of REG field of each note */
1974 enum reg_note *note_kind; /* The type of each note */
1975
1976 rtx *clobber_reg = 0;
1977 rtx **clobber_loc = 0;
1978
1979 struct stack_def temp_stack;
1980 int n_notes;
1981 int n_clobbers;
1982 rtx note;
1983 int i;
1984 int n_inputs, n_outputs;
1985
1986 if (! check_asm_stack_operands (insn))
1987 return;
1988
1989 /* Find out what the constraints required. If no constraint
1990 alternative matches, that is a compiler bug: we should have caught
1991 such an insn in check_asm_stack_operands. */
1992 extract_insn (insn);
1993 constrain_operands (1);
1994 alt = which_alternative;
1995
1996 preprocess_constraints ();
1997
1998 n_inputs = get_asm_operand_n_inputs (body);
1999 n_outputs = recog_data.n_operands - n_inputs;
2000
2001 gcc_assert (alt >= 0);
2002
2003 /* Strip SUBREGs here to make the following code simpler. */
2004 for (i = 0; i < recog_data.n_operands; i++)
2005 if (GET_CODE (recog_data.operand[i]) == SUBREG
2006 && REG_P (SUBREG_REG (recog_data.operand[i])))
2007 {
2008 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2009 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2010 }
2011
2012 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2013
2014 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2015 i++;
2016
2017 note_reg = alloca (i * sizeof (rtx));
2018 note_loc = alloca (i * sizeof (rtx *));
2019 note_kind = alloca (i * sizeof (enum reg_note));
2020
2021 n_notes = 0;
2022 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2023 {
2024 rtx reg = XEXP (note, 0);
2025 rtx *loc = & XEXP (note, 0);
2026
2027 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2028 {
2029 loc = & SUBREG_REG (reg);
2030 reg = SUBREG_REG (reg);
2031 }
2032
2033 if (STACK_REG_P (reg)
2034 && (REG_NOTE_KIND (note) == REG_DEAD
2035 || REG_NOTE_KIND (note) == REG_UNUSED))
2036 {
2037 note_reg[n_notes] = reg;
2038 note_loc[n_notes] = loc;
2039 note_kind[n_notes] = REG_NOTE_KIND (note);
2040 n_notes++;
2041 }
2042 }
2043
2044 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2045
2046 n_clobbers = 0;
2047
2048 if (GET_CODE (body) == PARALLEL)
2049 {
2050 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2051 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2052
2053 for (i = 0; i < XVECLEN (body, 0); i++)
2054 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2055 {
2056 rtx clobber = XVECEXP (body, 0, i);
2057 rtx reg = XEXP (clobber, 0);
2058 rtx *loc = & XEXP (clobber, 0);
2059
2060 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2061 {
2062 loc = & SUBREG_REG (reg);
2063 reg = SUBREG_REG (reg);
2064 }
2065
2066 if (STACK_REG_P (reg))
2067 {
2068 clobber_reg[n_clobbers] = reg;
2069 clobber_loc[n_clobbers] = loc;
2070 n_clobbers++;
2071 }
2072 }
2073 }
2074
2075 temp_stack = *regstack;
2076
2077 /* Put the input regs into the desired place in TEMP_STACK. */
2078
2079 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2080 if (STACK_REG_P (recog_data.operand[i])
2081 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2082 FLOAT_REGS)
2083 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2084 {
2085 /* If an operand needs to be in a particular reg in
2086 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2087 these constraints are for single register classes, and
2088 reload guaranteed that operand[i] is already in that class,
2089 we can just use REGNO (recog_data.operand[i]) to know which
2090 actual reg this operand needs to be in. */
2091
2092 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2093
2094 gcc_assert (regno >= 0);
2095
2096 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2097 {
2098 /* recog_data.operand[i] is not in the right place. Find
2099 it and swap it with whatever is already in I's place.
2100 K is where recog_data.operand[i] is now. J is where it
2101 should be. */
2102 int j, k, temp;
2103
2104 k = temp_stack.top - (regno - FIRST_STACK_REG);
2105 j = (temp_stack.top
2106 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2107
2108 temp = temp_stack.reg[k];
2109 temp_stack.reg[k] = temp_stack.reg[j];
2110 temp_stack.reg[j] = temp;
2111 }
2112 }
2113
2114 /* Emit insns before INSN to make sure the reg-stack is in the right
2115 order. */
2116
2117 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2118
2119 /* Make the needed input register substitutions. Do death notes and
2120 clobbers too, because these are for inputs, not outputs. */
2121
2122 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2123 if (STACK_REG_P (recog_data.operand[i]))
2124 {
2125 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2126
2127 gcc_assert (regnum >= 0);
2128
2129 replace_reg (recog_data.operand_loc[i], regnum);
2130 }
2131
2132 for (i = 0; i < n_notes; i++)
2133 if (note_kind[i] == REG_DEAD)
2134 {
2135 int regnum = get_hard_regnum (regstack, note_reg[i]);
2136
2137 gcc_assert (regnum >= 0);
2138
2139 replace_reg (note_loc[i], regnum);
2140 }
2141
2142 for (i = 0; i < n_clobbers; i++)
2143 {
2144 /* It's OK for a CLOBBER to reference a reg that is not live.
2145 Don't try to replace it in that case. */
2146 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2147
2148 if (regnum >= 0)
2149 {
2150 /* Sigh - clobbers always have QImode. But replace_reg knows
2151 that these regs can't be MODE_INT and will assert. Just put
2152 the right reg there without calling replace_reg. */
2153
2154 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2155 }
2156 }
2157
2158 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2159
2160 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2161 if (STACK_REG_P (recog_data.operand[i]))
2162 {
2163 /* An input reg is implicitly popped if it is tied to an
2164 output, or if there is a CLOBBER for it. */
2165 int j;
2166
2167 for (j = 0; j < n_clobbers; j++)
2168 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2169 break;
2170
2171 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2172 {
2173 /* recog_data.operand[i] might not be at the top of stack.
2174 But that's OK, because all we need to do is pop the
2175 right number of regs off of the top of the reg-stack.
2176 record_asm_stack_regs guaranteed that all implicitly
2177 popped regs were grouped at the top of the reg-stack. */
2178
2179 CLEAR_HARD_REG_BIT (regstack->reg_set,
2180 regstack->reg[regstack->top]);
2181 regstack->top--;
2182 }
2183 }
2184
2185 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2186 Note that there isn't any need to substitute register numbers.
2187 ??? Explain why this is true. */
2188
2189 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2190 {
2191 /* See if there is an output for this hard reg. */
2192 int j;
2193
2194 for (j = 0; j < n_outputs; j++)
2195 if (STACK_REG_P (recog_data.operand[j])
2196 && REGNO (recog_data.operand[j]) == (unsigned) i)
2197 {
2198 regstack->reg[++regstack->top] = i;
2199 SET_HARD_REG_BIT (regstack->reg_set, i);
2200 break;
2201 }
2202 }
2203
2204 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2205 input that the asm didn't implicitly pop. If the asm didn't
2206 implicitly pop an input reg, that reg will still be live.
2207
2208 Note that we can't use find_regno_note here: the register numbers
2209 in the death notes have already been substituted. */
2210
2211 for (i = 0; i < n_outputs; i++)
2212 if (STACK_REG_P (recog_data.operand[i]))
2213 {
2214 int j;
2215
2216 for (j = 0; j < n_notes; j++)
2217 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2218 && note_kind[j] == REG_UNUSED)
2219 {
2220 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2221 EMIT_AFTER);
2222 break;
2223 }
2224 }
2225
2226 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2227 if (STACK_REG_P (recog_data.operand[i]))
2228 {
2229 int j;
2230
2231 for (j = 0; j < n_notes; j++)
2232 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2233 && note_kind[j] == REG_DEAD
2234 && TEST_HARD_REG_BIT (regstack->reg_set,
2235 REGNO (recog_data.operand[i])))
2236 {
2237 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2238 EMIT_AFTER);
2239 break;
2240 }
2241 }
2242 }
2243 \f
2244 /* Substitute stack hard reg numbers for stack virtual registers in
2245 INSN. Non-stack register numbers are not changed. REGSTACK is the
2246 current stack content. Insns may be emitted as needed to arrange the
2247 stack for the 387 based on the contents of the insn. Return whether
2248 a control flow insn was deleted in the process. */
2249
2250 static bool
2251 subst_stack_regs (rtx insn, stack regstack)
2252 {
2253 rtx *note_link, note;
2254 bool control_flow_insn_deleted = false;
2255 int i;
2256
2257 if (CALL_P (insn))
2258 {
2259 int top = regstack->top;
2260
2261 /* If there are any floating point parameters to be passed in
2262 registers for this call, make sure they are in the right
2263 order. */
2264
2265 if (top >= 0)
2266 {
2267 straighten_stack (PREV_INSN (insn), regstack);
2268
2269 /* Now mark the arguments as dead after the call. */
2270
2271 while (regstack->top >= 0)
2272 {
2273 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2274 regstack->top--;
2275 }
2276 }
2277 }
2278
2279 /* Do the actual substitution if any stack regs are mentioned.
2280 Since we only record whether entire insn mentions stack regs, and
2281 subst_stack_regs_pat only works for patterns that contain stack regs,
2282 we must check each pattern in a parallel here. A call_value_pop could
2283 fail otherwise. */
2284
2285 if (stack_regs_mentioned (insn))
2286 {
2287 int n_operands = asm_noperands (PATTERN (insn));
2288 if (n_operands >= 0)
2289 {
2290 /* This insn is an `asm' with operands. Decode the operands,
2291 decide how many are inputs, and do register substitution.
2292 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2293
2294 subst_asm_stack_regs (insn, regstack);
2295 return control_flow_insn_deleted;
2296 }
2297
2298 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2299 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2300 {
2301 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2302 {
2303 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2304 XVECEXP (PATTERN (insn), 0, i)
2305 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2306 control_flow_insn_deleted
2307 |= subst_stack_regs_pat (insn, regstack,
2308 XVECEXP (PATTERN (insn), 0, i));
2309 }
2310 }
2311 else
2312 control_flow_insn_deleted
2313 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2314 }
2315
2316 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2317 REG_UNUSED will already have been dealt with, so just return. */
2318
2319 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2320 return control_flow_insn_deleted;
2321
2322 /* If there is a REG_UNUSED note on a stack register on this insn,
2323 the indicated reg must be popped. The REG_UNUSED note is removed,
2324 since the form of the newly emitted pop insn references the reg,
2325 making it no longer `unset'. */
2326
2327 note_link = &REG_NOTES (insn);
2328 for (note = *note_link; note; note = XEXP (note, 1))
2329 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2330 {
2331 *note_link = XEXP (note, 1);
2332 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2333 }
2334 else
2335 note_link = &XEXP (note, 1);
2336
2337 return control_flow_insn_deleted;
2338 }
2339 \f
2340 /* Change the organization of the stack so that it fits a new basic
2341 block. Some registers might have to be popped, but there can never be
2342 a register live in the new block that is not now live.
2343
2344 Insert any needed insns before or after INSN, as indicated by
2345 WHERE. OLD is the original stack layout, and NEW is the desired
2346 form. OLD is updated to reflect the code emitted, i.e., it will be
2347 the same as NEW upon return.
2348
2349 This function will not preserve block_end[]. But that information
2350 is no longer needed once this has executed. */
2351
2352 static void
2353 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2354 {
2355 int reg;
2356 int update_end = 0;
2357
2358 /* We will be inserting new insns "backwards". If we are to insert
2359 after INSN, find the next insn, and insert before it. */
2360
2361 if (where == EMIT_AFTER)
2362 {
2363 if (current_block && BB_END (current_block) == insn)
2364 update_end = 1;
2365 insn = NEXT_INSN (insn);
2366 }
2367
2368 /* Pop any registers that are not needed in the new block. */
2369
2370 /* If the destination block's stack already has a specified layout
2371 and contains two or more registers, use a more intelligent algorithm
2372 to pop registers that minimizes the number number of fxchs below. */
2373 if (new->top > 0)
2374 {
2375 bool slots[REG_STACK_SIZE];
2376 int pops[REG_STACK_SIZE];
2377 int next, dest;
2378
2379 /* First pass to determine the free slots. */
2380 for (reg = 0; reg <= new->top; reg++)
2381 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2382
2383 /* Second pass to allocate preferred slots. */
2384 for (reg = old->top; reg > new->top; reg--)
2385 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2386 {
2387 dest = -1;
2388 for (next = 0; next <= new->top; next++)
2389 if (!slots[next] && new->reg[next] == old->reg[reg])
2390 {
2391 slots[next] = true;
2392 dest = next;
2393 break;
2394 }
2395 pops[reg] = dest;
2396 }
2397 else
2398 pops[reg] = reg;
2399
2400 /* Third pass allocates remaining slots and emits pop insns. */
2401 next = 0;
2402 for (reg = old->top; reg > new->top; reg--)
2403 {
2404 dest = pops[reg];
2405 if (dest == -1)
2406 {
2407 /* Find next free slot. */
2408 while (slots[next])
2409 next++;
2410 dest = next++;
2411 }
2412 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2413 EMIT_BEFORE);
2414 }
2415 }
2416 else
2417 /* The following loop attempts to maximize the number of times we
2418 pop the top of the stack, as this permits the use of the faster
2419 ffreep instruction on platforms that support it. */
2420 for (reg = 0; reg <= old->top; reg++)
2421 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2422 {
2423 while (old->top > reg
2424 && ! TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2425 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2426 EMIT_BEFORE);
2427 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2428 EMIT_BEFORE);
2429 }
2430
2431 if (new->top == -2)
2432 {
2433 /* If the new block has never been processed, then it can inherit
2434 the old stack order. */
2435
2436 new->top = old->top;
2437 memcpy (new->reg, old->reg, sizeof (new->reg));
2438 }
2439 else
2440 {
2441 /* This block has been entered before, and we must match the
2442 previously selected stack order. */
2443
2444 /* By now, the only difference should be the order of the stack,
2445 not their depth or liveliness. */
2446
2447 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2448 gcc_unreachable ();
2449 win:
2450 gcc_assert (old->top == new->top);
2451
2452 /* If the stack is not empty (new->top != -1), loop here emitting
2453 swaps until the stack is correct.
2454
2455 The worst case number of swaps emitted is N + 2, where N is the
2456 depth of the stack. In some cases, the reg at the top of
2457 stack may be correct, but swapped anyway in order to fix
2458 other regs. But since we never swap any other reg away from
2459 its correct slot, this algorithm will converge. */
2460
2461 if (new->top != -1)
2462 do
2463 {
2464 /* Swap the reg at top of stack into the position it is
2465 supposed to be in, until the correct top of stack appears. */
2466
2467 while (old->reg[old->top] != new->reg[new->top])
2468 {
2469 for (reg = new->top; reg >= 0; reg--)
2470 if (new->reg[reg] == old->reg[old->top])
2471 break;
2472
2473 gcc_assert (reg != -1);
2474
2475 emit_swap_insn (insn, old,
2476 FP_MODE_REG (old->reg[reg], DFmode));
2477 }
2478
2479 /* See if any regs remain incorrect. If so, bring an
2480 incorrect reg to the top of stack, and let the while loop
2481 above fix it. */
2482
2483 for (reg = new->top; reg >= 0; reg--)
2484 if (new->reg[reg] != old->reg[reg])
2485 {
2486 emit_swap_insn (insn, old,
2487 FP_MODE_REG (old->reg[reg], DFmode));
2488 break;
2489 }
2490 } while (reg >= 0);
2491
2492 /* At this point there must be no differences. */
2493
2494 for (reg = old->top; reg >= 0; reg--)
2495 gcc_assert (old->reg[reg] == new->reg[reg]);
2496 }
2497
2498 if (update_end)
2499 BB_END (current_block) = PREV_INSN (insn);
2500 }
2501 \f
2502 /* Print stack configuration. */
2503
2504 static void
2505 print_stack (FILE *file, stack s)
2506 {
2507 if (! file)
2508 return;
2509
2510 if (s->top == -2)
2511 fprintf (file, "uninitialized\n");
2512 else if (s->top == -1)
2513 fprintf (file, "empty\n");
2514 else
2515 {
2516 int i;
2517 fputs ("[ ", file);
2518 for (i = 0; i <= s->top; ++i)
2519 fprintf (file, "%d ", s->reg[i]);
2520 fputs ("]\n", file);
2521 }
2522 }
2523 \f
2524 /* This function was doing life analysis. We now let the regular live
2525 code do it's job, so we only need to check some extra invariants
2526 that reg-stack expects. Primary among these being that all registers
2527 are initialized before use.
2528
2529 The function returns true when code was emitted to CFG edges and
2530 commit_edge_insertions needs to be called. */
2531
2532 static int
2533 convert_regs_entry (void)
2534 {
2535 int inserted = 0;
2536 edge e;
2537 edge_iterator ei;
2538 basic_block block;
2539
2540 FOR_EACH_BB_REVERSE (block)
2541 {
2542 block_info bi = BLOCK_INFO (block);
2543 int reg;
2544
2545 /* Set current register status at last instruction `uninitialized'. */
2546 bi->stack_in.top = -2;
2547
2548 /* Copy live_at_end and live_at_start into temporaries. */
2549 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2550 {
2551 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2552 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2553 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2554 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2555 }
2556 }
2557
2558 /* Load something into each stack register live at function entry.
2559 Such live registers can be caused by uninitialized variables or
2560 functions not returning values on all paths. In order to keep
2561 the push/pop code happy, and to not scrog the register stack, we
2562 must put something in these registers. Use a QNaN.
2563
2564 Note that we are inserting converted code here. This code is
2565 never seen by the convert_regs pass. */
2566
2567 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2568 {
2569 basic_block block = e->dest;
2570 block_info bi = BLOCK_INFO (block);
2571 int reg, top = -1;
2572
2573 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2574 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2575 {
2576 rtx init;
2577
2578 bi->stack_in.reg[++top] = reg;
2579
2580 init = gen_rtx_SET (VOIDmode,
2581 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2582 not_a_num);
2583 insert_insn_on_edge (init, e);
2584 inserted = 1;
2585 }
2586
2587 bi->stack_in.top = top;
2588 }
2589
2590 return inserted;
2591 }
2592
2593 /* Construct the desired stack for function exit. This will either
2594 be `empty', or the function return value at top-of-stack. */
2595
2596 static void
2597 convert_regs_exit (void)
2598 {
2599 int value_reg_low, value_reg_high;
2600 stack output_stack;
2601 rtx retvalue;
2602
2603 retvalue = stack_result (current_function_decl);
2604 value_reg_low = value_reg_high = -1;
2605 if (retvalue)
2606 {
2607 value_reg_low = REGNO (retvalue);
2608 value_reg_high = value_reg_low
2609 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2610 }
2611
2612 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2613 if (value_reg_low == -1)
2614 output_stack->top = -1;
2615 else
2616 {
2617 int reg;
2618
2619 output_stack->top = value_reg_high - value_reg_low;
2620 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2621 {
2622 output_stack->reg[value_reg_high - reg] = reg;
2623 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2624 }
2625 }
2626 }
2627
2628 /* Adjust the stack of this block on exit to match the stack of the
2629 target block, or copy stack info into the stack of the successor
2630 of the successor hasn't been processed yet. */
2631 static bool
2632 compensate_edge (edge e, FILE *file)
2633 {
2634 basic_block block = e->src, target = e->dest;
2635 block_info bi = BLOCK_INFO (block);
2636 struct stack_def regstack, tmpstack;
2637 stack target_stack = &BLOCK_INFO (target)->stack_in;
2638 int reg;
2639
2640 current_block = block;
2641 regstack = bi->stack_out;
2642 if (file)
2643 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2644
2645 if (target_stack->top == -2)
2646 {
2647 /* The target block hasn't had a stack order selected.
2648 We need merely ensure that no pops are needed. */
2649 for (reg = regstack.top; reg >= 0; --reg)
2650 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2651 break;
2652
2653 if (reg == -1)
2654 {
2655 if (file)
2656 fprintf (file, "new block; copying stack position\n");
2657
2658 /* change_stack kills values in regstack. */
2659 tmpstack = regstack;
2660
2661 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER);
2662 return false;
2663 }
2664
2665 if (file)
2666 fprintf (file, "new block; pops needed\n");
2667 }
2668 else
2669 {
2670 if (target_stack->top == regstack.top)
2671 {
2672 for (reg = target_stack->top; reg >= 0; --reg)
2673 if (target_stack->reg[reg] != regstack.reg[reg])
2674 break;
2675
2676 if (reg == -1)
2677 {
2678 if (file)
2679 fprintf (file, "no changes needed\n");
2680 return false;
2681 }
2682 }
2683
2684 if (file)
2685 {
2686 fprintf (file, "correcting stack to ");
2687 print_stack (file, target_stack);
2688 }
2689 }
2690
2691 /* Care for non-call EH edges specially. The normal return path have
2692 values in registers. These will be popped en masse by the unwind
2693 library. */
2694 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2695 target_stack->top = -1;
2696
2697 /* Other calls may appear to have values live in st(0), but the
2698 abnormal return path will not have actually loaded the values. */
2699 else if (e->flags & EDGE_ABNORMAL_CALL)
2700 {
2701 /* Assert that the lifetimes are as we expect -- one value
2702 live at st(0) on the end of the source block, and no
2703 values live at the beginning of the destination block. */
2704 HARD_REG_SET tmp;
2705
2706 CLEAR_HARD_REG_SET (tmp);
2707 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2708 gcc_unreachable ();
2709 eh1:
2710
2711 /* We are sure that there is st(0) live, otherwise we won't compensate.
2712 For complex return values, we may have st(1) live as well. */
2713 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2714 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2715 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2716 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2717 gcc_unreachable ();
2718 eh2:
2719
2720 target_stack->top = -1;
2721 }
2722
2723 /* It is better to output directly to the end of the block
2724 instead of to the edge, because emit_swap can do minimal
2725 insn scheduling. We can do this when there is only one
2726 edge out, and it is not abnormal. */
2727 else if (EDGE_COUNT (block->succs) == 1 && !(e->flags & EDGE_ABNORMAL))
2728 {
2729 /* change_stack kills values in regstack. */
2730 tmpstack = regstack;
2731
2732 change_stack (BB_END (block), &tmpstack, target_stack,
2733 (JUMP_P (BB_END (block))
2734 ? EMIT_BEFORE : EMIT_AFTER));
2735 }
2736 else
2737 {
2738 rtx seq, after;
2739
2740 /* We don't support abnormal edges. Global takes care to
2741 avoid any live register across them, so we should never
2742 have to insert instructions on such edges. */
2743 gcc_assert (!(e->flags & EDGE_ABNORMAL));
2744
2745 current_block = NULL;
2746 start_sequence ();
2747
2748 /* ??? change_stack needs some point to emit insns after. */
2749 after = emit_note (NOTE_INSN_DELETED);
2750
2751 tmpstack = regstack;
2752 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2753
2754 seq = get_insns ();
2755 end_sequence ();
2756
2757 insert_insn_on_edge (seq, e);
2758 return true;
2759 }
2760 return false;
2761 }
2762
2763 /* Convert stack register references in one block. */
2764
2765 static int
2766 convert_regs_1 (FILE *file, basic_block block)
2767 {
2768 struct stack_def regstack;
2769 block_info bi = BLOCK_INFO (block);
2770 int deleted, inserted, reg;
2771 rtx insn, next;
2772 edge e, beste = NULL;
2773 bool control_flow_insn_deleted = false;
2774 edge_iterator ei;
2775
2776 inserted = 0;
2777 deleted = 0;
2778 any_malformed_asm = false;
2779
2780 /* Find the edge we will copy stack from. It should be the most frequent
2781 one as it will get cheapest after compensation code is generated,
2782 if multiple such exists, take one with largest count, prefer critical
2783 one (as splitting critical edges is more expensive), or one with lowest
2784 index, to avoid random changes with different orders of the edges. */
2785 FOR_EACH_EDGE (e, ei, block->preds)
2786 {
2787 if (e->flags & EDGE_DFS_BACK)
2788 ;
2789 else if (! beste)
2790 beste = e;
2791 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2792 beste = e;
2793 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2794 ;
2795 else if (beste->count < e->count)
2796 beste = e;
2797 else if (beste->count > e->count)
2798 ;
2799 else if ((EDGE_CRITICAL_P (e) != 0)
2800 != (EDGE_CRITICAL_P (beste) != 0))
2801 {
2802 if (EDGE_CRITICAL_P (e))
2803 beste = e;
2804 }
2805 else if (e->src->index < beste->src->index)
2806 beste = e;
2807 }
2808
2809 /* Initialize stack at block entry. */
2810 if (bi->stack_in.top == -2)
2811 {
2812 if (beste)
2813 inserted |= compensate_edge (beste, file);
2814 else
2815 {
2816 /* No predecessors. Create an arbitrary input stack. */
2817 int reg;
2818
2819 bi->stack_in.top = -1;
2820 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2821 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2822 bi->stack_in.reg[++bi->stack_in.top] = reg;
2823 }
2824 }
2825 else
2826 /* Entry blocks do have stack already initialized. */
2827 beste = NULL;
2828
2829 current_block = block;
2830
2831 if (file)
2832 {
2833 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2834 print_stack (file, &bi->stack_in);
2835 }
2836
2837 /* Process all insns in this block. Keep track of NEXT so that we
2838 don't process insns emitted while substituting in INSN. */
2839 next = BB_HEAD (block);
2840 regstack = bi->stack_in;
2841 do
2842 {
2843 insn = next;
2844 next = NEXT_INSN (insn);
2845
2846 /* Ensure we have not missed a block boundary. */
2847 gcc_assert (next);
2848 if (insn == BB_END (block))
2849 next = NULL;
2850
2851 /* Don't bother processing unless there is a stack reg
2852 mentioned or if it's a CALL_INSN. */
2853 if (stack_regs_mentioned (insn)
2854 || CALL_P (insn))
2855 {
2856 if (file)
2857 {
2858 fprintf (file, " insn %d input stack: ",
2859 INSN_UID (insn));
2860 print_stack (file, &regstack);
2861 }
2862 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2863 }
2864 }
2865 while (next);
2866
2867 if (file)
2868 {
2869 fprintf (file, "Expected live registers [");
2870 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2871 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2872 fprintf (file, " %d", reg);
2873 fprintf (file, " ]\nOutput stack: ");
2874 print_stack (file, &regstack);
2875 }
2876
2877 insn = BB_END (block);
2878 if (JUMP_P (insn))
2879 insn = PREV_INSN (insn);
2880
2881 /* If the function is declared to return a value, but it returns one
2882 in only some cases, some registers might come live here. Emit
2883 necessary moves for them. */
2884
2885 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2886 {
2887 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2888 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2889 {
2890 rtx set;
2891
2892 if (file)
2893 {
2894 fprintf (file, "Emitting insn initializing reg %d\n",
2895 reg);
2896 }
2897
2898 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2899 not_a_num);
2900 insn = emit_insn_after (set, insn);
2901 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2902 }
2903 }
2904
2905 /* Amongst the insns possibly deleted during the substitution process above,
2906 might have been the only trapping insn in the block. We purge the now
2907 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2908 called at the end of convert_regs. The order in which we process the
2909 blocks ensures that we never delete an already processed edge.
2910
2911 Note that, at this point, the CFG may have been damaged by the emission
2912 of instructions after an abnormal call, which moves the basic block end
2913 (and is the reason why we call fixup_abnormal_edges later). So we must
2914 be sure that the trapping insn has been deleted before trying to purge
2915 dead edges, otherwise we risk purging valid edges.
2916
2917 ??? We are normally supposed not to delete trapping insns, so we pretend
2918 that the insns deleted above don't actually trap. It would have been
2919 better to detect this earlier and avoid creating the EH edge in the first
2920 place, still, but we don't have enough information at that time. */
2921
2922 if (control_flow_insn_deleted)
2923 purge_dead_edges (block);
2924
2925 /* Something failed if the stack lives don't match. If we had malformed
2926 asms, we zapped the instruction itself, but that didn't produce the
2927 same pattern of register kills as before. */
2928 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2929 gcc_assert (any_malformed_asm);
2930 win:
2931 bi->stack_out = regstack;
2932
2933 /* Compensate the back edges, as those wasn't visited yet. */
2934 FOR_EACH_EDGE (e, ei, block->succs)
2935 {
2936 if (e->flags & EDGE_DFS_BACK
2937 || (e->dest == EXIT_BLOCK_PTR))
2938 {
2939 gcc_assert (BLOCK_INFO (e->dest)->done
2940 || e->dest == block);
2941 inserted |= compensate_edge (e, file);
2942 }
2943 }
2944 FOR_EACH_EDGE (e, ei, block->preds)
2945 {
2946 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2947 && e->src != ENTRY_BLOCK_PTR)
2948 {
2949 gcc_assert (BLOCK_INFO (e->src)->done);
2950 inserted |= compensate_edge (e, file);
2951 }
2952 }
2953
2954 return inserted;
2955 }
2956
2957 /* Convert registers in all blocks reachable from BLOCK. */
2958
2959 static int
2960 convert_regs_2 (FILE *file, basic_block block)
2961 {
2962 basic_block *stack, *sp;
2963 int inserted;
2964
2965 /* We process the blocks in a top-down manner, in a way such that one block
2966 is only processed after all its predecessors. The number of predecessors
2967 of every block has already been computed. */
2968
2969 stack = xmalloc (sizeof (*stack) * n_basic_blocks);
2970 sp = stack;
2971
2972 *sp++ = block;
2973
2974 inserted = 0;
2975 do
2976 {
2977 edge e;
2978 edge_iterator ei;
2979
2980 block = *--sp;
2981
2982 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2983 some dead EH outgoing edge after the deletion of the trapping
2984 insn inside the block. Since the number of predecessors of
2985 BLOCK's successors was computed based on the initial edge set,
2986 we check the necessity to process some of these successors
2987 before such an edge deletion may happen. However, there is
2988 a pitfall: if BLOCK is the only predecessor of a successor and
2989 the edge between them happens to be deleted, the successor
2990 becomes unreachable and should not be processed. The problem
2991 is that there is no way to preventively detect this case so we
2992 stack the successor in all cases and hand over the task of
2993 fixing up the discrepancy to convert_regs_1. */
2994
2995 FOR_EACH_EDGE (e, ei, block->succs)
2996 if (! (e->flags & EDGE_DFS_BACK))
2997 {
2998 BLOCK_INFO (e->dest)->predecessors--;
2999 if (!BLOCK_INFO (e->dest)->predecessors)
3000 *sp++ = e->dest;
3001 }
3002
3003 inserted |= convert_regs_1 (file, block);
3004 BLOCK_INFO (block)->done = 1;
3005 }
3006 while (sp != stack);
3007
3008 return inserted;
3009 }
3010
3011 /* Traverse all basic blocks in a function, converting the register
3012 references in each insn from the "flat" register file that gcc uses,
3013 to the stack-like registers the 387 uses. */
3014
3015 static int
3016 convert_regs (FILE *file)
3017 {
3018 int inserted;
3019 basic_block b;
3020 edge e;
3021 edge_iterator ei;
3022
3023 /* Initialize uninitialized registers on function entry. */
3024 inserted = convert_regs_entry ();
3025
3026 /* Construct the desired stack for function exit. */
3027 convert_regs_exit ();
3028 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3029
3030 /* ??? Future: process inner loops first, and give them arbitrary
3031 initial stacks which emit_swap_insn can modify. This ought to
3032 prevent double fxch that often appears at the head of a loop. */
3033
3034 /* Process all blocks reachable from all entry points. */
3035 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3036 inserted |= convert_regs_2 (file, e->dest);
3037
3038 /* ??? Process all unreachable blocks. Though there's no excuse
3039 for keeping these even when not optimizing. */
3040 FOR_EACH_BB (b)
3041 {
3042 block_info bi = BLOCK_INFO (b);
3043
3044 if (! bi->done)
3045 inserted |= convert_regs_2 (file, b);
3046 }
3047 clear_aux_for_blocks ();
3048
3049 fixup_abnormal_edges ();
3050 if (inserted)
3051 commit_edge_insertions ();
3052
3053 if (file)
3054 fputc ('\n', file);
3055
3056 return inserted;
3057 }
3058 #endif /* STACK_REGS */
3059
3060 #include "gt-reg-stack.h"