i386.c (size_cost): New static variable.
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
24
25 * The form of the input:
26
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
36
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
44
45 * The form of the output:
46
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
52
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
55
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
59
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
62
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
66
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
71
72 * Methodology:
73
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
77
78 * asm_operands:
79
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
83
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
87
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
91
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
98
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
101
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
104
105 asm ("foo" : "=t" (a) : "f" (b));
106
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
112
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
115
116 The asm above would be written as
117
118 asm ("foo" : "=&t" (a) : "f" (b));
119
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
124
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
128
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
133
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
136
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
140
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
143
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
151
152 */
153 \f
154 #include "config.h"
155 #include "system.h"
156 #include "tree.h"
157 #include "rtl.h"
158 #include "tm_p.h"
159 #include "function.h"
160 #include "insn-config.h"
161 #include "regs.h"
162 #include "hard-reg-set.h"
163 #include "flags.h"
164 #include "toplev.h"
165 #include "recog.h"
166 #include "output.h"
167 #include "basic-block.h"
168 #include "varray.h"
169 #include "reload.h"
170
171 #ifdef STACK_REGS
172
173 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
180 appropriately.
181
182 REG_SET indicates which registers are live. */
183
184 typedef struct stack_def
185 {
186 int top; /* index to top stack element */
187 HARD_REG_SET reg_set; /* set of live registers */
188 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
189 } *stack;
190
191 /* This is used to carry information about basic blocks. It is
192 attached to the AUX field of the standard CFG block. */
193
194 typedef struct block_info_def
195 {
196 struct stack_def stack_in; /* Input stack configuration. */
197 struct stack_def stack_out; /* Output stack configuration. */
198 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
199 int done; /* True if block already converted. */
200 int predecesors; /* Number of predecesors that needs
201 to be visited. */
202 } *block_info;
203
204 #define BLOCK_INFO(B) ((block_info) (B)->aux)
205
206 /* Passed to change_stack to indicate where to emit insns. */
207 enum emit_where
208 {
209 EMIT_AFTER,
210 EMIT_BEFORE
211 };
212
213 /* We use this array to cache info about insns, because otherwise we
214 spend too much time in stack_regs_mentioned_p.
215
216 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
217 the insn uses stack registers, two indicates the insn does not use
218 stack registers. */
219 static varray_type stack_regs_mentioned_data;
220
221 /* The block we're currently working on. */
222 static basic_block current_block;
223
224 /* This is the register file for all register after conversion */
225 static rtx
226 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
227
228 #define FP_MODE_REG(regno,mode) \
229 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
230
231 /* Used to initialize uninitialized registers. */
232 static rtx nan;
233
234 /* Forward declarations */
235
236 static int stack_regs_mentioned_p PARAMS ((rtx pat));
237 static void straighten_stack PARAMS ((rtx, stack));
238 static void pop_stack PARAMS ((stack, int));
239 static rtx *get_true_reg PARAMS ((rtx *));
240
241 static int check_asm_stack_operands PARAMS ((rtx));
242 static int get_asm_operand_n_inputs PARAMS ((rtx));
243 static rtx stack_result PARAMS ((tree));
244 static void replace_reg PARAMS ((rtx *, int));
245 static void remove_regno_note PARAMS ((rtx, enum reg_note,
246 unsigned int));
247 static int get_hard_regnum PARAMS ((stack, rtx));
248 static void delete_insn_for_stacker PARAMS ((rtx));
249 static rtx emit_pop_insn PARAMS ((rtx, stack, rtx,
250 enum emit_where));
251 static void emit_swap_insn PARAMS ((rtx, stack, rtx));
252 static void move_for_stack_reg PARAMS ((rtx, stack, rtx));
253 static int swap_rtx_condition_1 PARAMS ((rtx));
254 static int swap_rtx_condition PARAMS ((rtx));
255 static void compare_for_stack_reg PARAMS ((rtx, stack, rtx));
256 static void subst_stack_regs_pat PARAMS ((rtx, stack, rtx));
257 static void subst_asm_stack_regs PARAMS ((rtx, stack));
258 static void subst_stack_regs PARAMS ((rtx, stack));
259 static void change_stack PARAMS ((rtx, stack, stack,
260 enum emit_where));
261 static int convert_regs_entry PARAMS ((void));
262 static void convert_regs_exit PARAMS ((void));
263 static int convert_regs_1 PARAMS ((FILE *, basic_block));
264 static int convert_regs_2 PARAMS ((FILE *, basic_block));
265 static int convert_regs PARAMS ((FILE *));
266 static void print_stack PARAMS ((FILE *, stack));
267 static rtx next_flags_user PARAMS ((rtx));
268 static void record_label_references PARAMS ((rtx, rtx));
269 static bool compensate_edge PARAMS ((edge, FILE *));
270 \f
271 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
272
273 static int
274 stack_regs_mentioned_p (pat)
275 rtx pat;
276 {
277 register const char *fmt;
278 register int i;
279
280 if (STACK_REG_P (pat))
281 return 1;
282
283 fmt = GET_RTX_FORMAT (GET_CODE (pat));
284 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
285 {
286 if (fmt[i] == 'E')
287 {
288 register int j;
289
290 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
291 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
292 return 1;
293 }
294 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
295 return 1;
296 }
297
298 return 0;
299 }
300
301 /* Return nonzero if INSN mentions stacked registers, else return zero. */
302
303 int
304 stack_regs_mentioned (insn)
305 rtx insn;
306 {
307 unsigned int uid, max;
308 int test;
309
310 if (! INSN_P (insn) || !stack_regs_mentioned_data)
311 return 0;
312
313 uid = INSN_UID (insn);
314 max = VARRAY_SIZE (stack_regs_mentioned_data);
315 if (uid >= max)
316 {
317 /* Allocate some extra size to avoid too many reallocs, but
318 do not grow too quickly. */
319 max = uid + uid / 20;
320 VARRAY_GROW (stack_regs_mentioned_data, max);
321 }
322
323 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
324 if (test == 0)
325 {
326 /* This insn has yet to be examined. Do so now. */
327 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
328 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
329 }
330
331 return test == 1;
332 }
333 \f
334 static rtx ix86_flags_rtx;
335
336 static rtx
337 next_flags_user (insn)
338 rtx insn;
339 {
340 /* Search forward looking for the first use of this value.
341 Stop at block boundaries. */
342
343 while (insn != current_block->end)
344 {
345 insn = NEXT_INSN (insn);
346
347 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
348 return insn;
349
350 if (GET_CODE (insn) == CALL_INSN)
351 return NULL_RTX;
352 }
353 return NULL_RTX;
354 }
355 \f
356 /* Reorganise the stack into ascending numbers,
357 after this insn. */
358
359 static void
360 straighten_stack (insn, regstack)
361 rtx insn;
362 stack regstack;
363 {
364 struct stack_def temp_stack;
365 int top;
366
367 /* If there is only a single register on the stack, then the stack is
368 already in increasing order and no reorganization is needed.
369
370 Similarly if the stack is empty. */
371 if (regstack->top <= 0)
372 return;
373
374 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
375
376 for (top = temp_stack.top = regstack->top; top >= 0; top--)
377 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
378
379 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
380 }
381
382 /* Pop a register from the stack */
383
384 static void
385 pop_stack (regstack, regno)
386 stack regstack;
387 int regno;
388 {
389 int top = regstack->top;
390
391 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
392 regstack->top--;
393 /* If regno was not at the top of stack then adjust stack */
394 if (regstack->reg [top] != regno)
395 {
396 int i;
397 for (i = regstack->top; i >= 0; i--)
398 if (regstack->reg [i] == regno)
399 {
400 int j;
401 for (j = i; j < top; j++)
402 regstack->reg [j] = regstack->reg [j + 1];
403 break;
404 }
405 }
406 }
407 \f
408 /* Convert register usage from "flat" register file usage to a "stack
409 register file. FIRST is the first insn in the function, FILE is the
410 dump file, if used.
411
412 Construct a CFG and run life analysis. Then convert each insn one
413 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
414 code duplication created when the converter inserts pop insns on
415 the edges. */
416
417 void
418 reg_to_stack (first, file)
419 rtx first;
420 FILE *file;
421 {
422 int i;
423 int max_uid;
424 block_info bi;
425
426 /* Clean up previous run. */
427 if (stack_regs_mentioned_data)
428 {
429 VARRAY_FREE (stack_regs_mentioned_data);
430 stack_regs_mentioned_data = 0;
431 }
432
433 if (!optimize)
434 split_all_insns (0);
435
436 /* See if there is something to do. Flow analysis is quite
437 expensive so we might save some compilation time. */
438 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
439 if (regs_ever_live[i])
440 break;
441 if (i > LAST_STACK_REG)
442 return;
443
444 /* Ok, floating point instructions exist. If not optimizing,
445 build the CFG and run life analysis. */
446 if (!optimize)
447 find_basic_blocks (first, max_reg_num (), file);
448 count_or_remove_death_notes (NULL, 1);
449 life_analysis (first, file, PROP_DEATH_NOTES);
450 mark_dfs_back_edges ();
451
452 /* Set up block info for each basic block. */
453 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
454 for (i = n_basic_blocks - 1; i >= 0; --i)
455 {
456 edge e;
457 basic_block bb = BASIC_BLOCK (i);
458 bb->aux = bi + i;
459 for (e = bb->pred; e; e=e->pred_next)
460 if (!(e->flags & EDGE_DFS_BACK)
461 && e->src != ENTRY_BLOCK_PTR)
462 BLOCK_INFO (bb)->predecesors++;
463 }
464 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
465
466 /* Create the replacement registers up front. */
467 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
468 {
469 enum machine_mode mode;
470 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
471 mode != VOIDmode;
472 mode = GET_MODE_WIDER_MODE (mode))
473 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
474 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
475 mode != VOIDmode;
476 mode = GET_MODE_WIDER_MODE (mode))
477 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
478 }
479
480 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
481
482 /* A QNaN for initializing uninitialized variables.
483
484 ??? We can't load from constant memory in PIC mode, because
485 we're insertting these instructions before the prologue and
486 the PIC register hasn't been set up. In that case, fall back
487 on zero, which we can get from `ldz'. */
488
489 if (flag_pic)
490 nan = CONST0_RTX (SFmode);
491 else
492 {
493 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
494 nan = force_const_mem (SFmode, nan);
495 }
496
497 /* Allocate a cache for stack_regs_mentioned. */
498 max_uid = get_max_uid ();
499 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
500 "stack_regs_mentioned cache");
501
502 convert_regs (file);
503
504 free (bi);
505 }
506 \f
507 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
508 label's chain of references, and note which insn contains each
509 reference. */
510
511 static void
512 record_label_references (insn, pat)
513 rtx insn, pat;
514 {
515 register enum rtx_code code = GET_CODE (pat);
516 register int i;
517 register const char *fmt;
518
519 if (code == LABEL_REF)
520 {
521 register rtx label = XEXP (pat, 0);
522 register rtx ref;
523
524 if (GET_CODE (label) != CODE_LABEL)
525 abort ();
526
527 /* If this is an undefined label, LABEL_REFS (label) contains
528 garbage. */
529 if (INSN_UID (label) == 0)
530 return;
531
532 /* Don't make a duplicate in the code_label's chain. */
533
534 for (ref = LABEL_REFS (label);
535 ref && ref != label;
536 ref = LABEL_NEXTREF (ref))
537 if (CONTAINING_INSN (ref) == insn)
538 return;
539
540 CONTAINING_INSN (pat) = insn;
541 LABEL_NEXTREF (pat) = LABEL_REFS (label);
542 LABEL_REFS (label) = pat;
543
544 return;
545 }
546
547 fmt = GET_RTX_FORMAT (code);
548 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
549 {
550 if (fmt[i] == 'e')
551 record_label_references (insn, XEXP (pat, i));
552 if (fmt[i] == 'E')
553 {
554 register int j;
555 for (j = 0; j < XVECLEN (pat, i); j++)
556 record_label_references (insn, XVECEXP (pat, i, j));
557 }
558 }
559 }
560 \f
561 /* Return a pointer to the REG expression within PAT. If PAT is not a
562 REG, possible enclosed by a conversion rtx, return the inner part of
563 PAT that stopped the search. */
564
565 static rtx *
566 get_true_reg (pat)
567 rtx *pat;
568 {
569 for (;;)
570 switch (GET_CODE (*pat))
571 {
572 case SUBREG:
573 /* Eliminate FP subregister accesses in favour of the
574 actual FP register in use. */
575 {
576 rtx subreg;
577 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
578 {
579 int regno_off = subreg_regno_offset (REGNO (subreg),
580 GET_MODE (subreg),
581 SUBREG_BYTE (*pat),
582 GET_MODE (*pat));
583 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
584 GET_MODE (subreg));
585 default:
586 return pat;
587 }
588 }
589 case FLOAT:
590 case FIX:
591 case FLOAT_EXTEND:
592 pat = & XEXP (*pat, 0);
593 }
594 }
595 \f
596 /* There are many rules that an asm statement for stack-like regs must
597 follow. Those rules are explained at the top of this file: the rule
598 numbers below refer to that explanation. */
599
600 static int
601 check_asm_stack_operands (insn)
602 rtx insn;
603 {
604 int i;
605 int n_clobbers;
606 int malformed_asm = 0;
607 rtx body = PATTERN (insn);
608
609 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
610 char implicitly_dies[FIRST_PSEUDO_REGISTER];
611 int alt;
612
613 rtx *clobber_reg = 0;
614 int n_inputs, n_outputs;
615
616 /* Find out what the constraints require. If no constraint
617 alternative matches, this asm is malformed. */
618 extract_insn (insn);
619 constrain_operands (1);
620 alt = which_alternative;
621
622 preprocess_constraints ();
623
624 n_inputs = get_asm_operand_n_inputs (body);
625 n_outputs = recog_data.n_operands - n_inputs;
626
627 if (alt < 0)
628 {
629 malformed_asm = 1;
630 /* Avoid further trouble with this insn. */
631 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
632 return 0;
633 }
634
635 /* Strip SUBREGs here to make the following code simpler. */
636 for (i = 0; i < recog_data.n_operands; i++)
637 if (GET_CODE (recog_data.operand[i]) == SUBREG
638 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
639 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
640
641 /* Set up CLOBBER_REG. */
642
643 n_clobbers = 0;
644
645 if (GET_CODE (body) == PARALLEL)
646 {
647 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
648
649 for (i = 0; i < XVECLEN (body, 0); i++)
650 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
651 {
652 rtx clobber = XVECEXP (body, 0, i);
653 rtx reg = XEXP (clobber, 0);
654
655 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
656 reg = SUBREG_REG (reg);
657
658 if (STACK_REG_P (reg))
659 {
660 clobber_reg[n_clobbers] = reg;
661 n_clobbers++;
662 }
663 }
664 }
665
666 /* Enforce rule #4: Output operands must specifically indicate which
667 reg an output appears in after an asm. "=f" is not allowed: the
668 operand constraints must select a class with a single reg.
669
670 Also enforce rule #5: Output operands must start at the top of
671 the reg-stack: output operands may not "skip" a reg. */
672
673 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
674 for (i = 0; i < n_outputs; i++)
675 if (STACK_REG_P (recog_data.operand[i]))
676 {
677 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
678 {
679 error_for_asm (insn, "Output constraint %d must specify a single register", i);
680 malformed_asm = 1;
681 }
682 else
683 {
684 int j;
685
686 for (j = 0; j < n_clobbers; j++)
687 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
688 {
689 error_for_asm (insn, "Output constraint %d cannot be specified together with \"%s\" clobber",
690 i, reg_names [REGNO (clobber_reg[j])]);
691 malformed_asm = 1;
692 break;
693 }
694 if (j == n_clobbers)
695 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
696 }
697 }
698
699
700 /* Search for first non-popped reg. */
701 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
702 if (! reg_used_as_output[i])
703 break;
704
705 /* If there are any other popped regs, that's an error. */
706 for (; i < LAST_STACK_REG + 1; i++)
707 if (reg_used_as_output[i])
708 break;
709
710 if (i != LAST_STACK_REG + 1)
711 {
712 error_for_asm (insn, "Output regs must be grouped at top of stack");
713 malformed_asm = 1;
714 }
715
716 /* Enforce rule #2: All implicitly popped input regs must be closer
717 to the top of the reg-stack than any input that is not implicitly
718 popped. */
719
720 memset (implicitly_dies, 0, sizeof (implicitly_dies));
721 for (i = n_outputs; i < n_outputs + n_inputs; i++)
722 if (STACK_REG_P (recog_data.operand[i]))
723 {
724 /* An input reg is implicitly popped if it is tied to an
725 output, or if there is a CLOBBER for it. */
726 int j;
727
728 for (j = 0; j < n_clobbers; j++)
729 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
730 break;
731
732 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
733 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
734 }
735
736 /* Search for first non-popped reg. */
737 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
738 if (! implicitly_dies[i])
739 break;
740
741 /* If there are any other popped regs, that's an error. */
742 for (; i < LAST_STACK_REG + 1; i++)
743 if (implicitly_dies[i])
744 break;
745
746 if (i != LAST_STACK_REG + 1)
747 {
748 error_for_asm (insn,
749 "Implicitly popped regs must be grouped at top of stack");
750 malformed_asm = 1;
751 }
752
753 /* Enfore rule #3: If any input operand uses the "f" constraint, all
754 output constraints must use the "&" earlyclobber.
755
756 ??? Detect this more deterministically by having constrain_asm_operands
757 record any earlyclobber. */
758
759 for (i = n_outputs; i < n_outputs + n_inputs; i++)
760 if (recog_op_alt[i][alt].matches == -1)
761 {
762 int j;
763
764 for (j = 0; j < n_outputs; j++)
765 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
766 {
767 error_for_asm (insn,
768 "Output operand %d must use `&' constraint", j);
769 malformed_asm = 1;
770 }
771 }
772
773 if (malformed_asm)
774 {
775 /* Avoid further trouble with this insn. */
776 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
777 return 0;
778 }
779
780 return 1;
781 }
782 \f
783 /* Calculate the number of inputs and outputs in BODY, an
784 asm_operands. N_OPERANDS is the total number of operands, and
785 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
786 placed. */
787
788 static int
789 get_asm_operand_n_inputs (body)
790 rtx body;
791 {
792 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
793 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
794
795 else if (GET_CODE (body) == ASM_OPERANDS)
796 return ASM_OPERANDS_INPUT_LENGTH (body);
797
798 else if (GET_CODE (body) == PARALLEL
799 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
800 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
801
802 else if (GET_CODE (body) == PARALLEL
803 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
804 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
805
806 abort ();
807 }
808
809 /* If current function returns its result in an fp stack register,
810 return the REG. Otherwise, return 0. */
811
812 static rtx
813 stack_result (decl)
814 tree decl;
815 {
816 rtx result;
817
818 /* If the value is supposed to be returned in memory, then clearly
819 it is not returned in a stack register. */
820 if (aggregate_value_p (DECL_RESULT (decl)))
821 return 0;
822
823 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
824 if (result != 0)
825 {
826 #ifdef FUNCTION_OUTGOING_VALUE
827 result
828 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
829 #else
830 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
831 #endif
832 }
833
834 return result != 0 && STACK_REG_P (result) ? result : 0;
835 }
836 \f
837
838 /*
839 * This section deals with stack register substitution, and forms the second
840 * pass over the RTL.
841 */
842
843 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
844 the desired hard REGNO. */
845
846 static void
847 replace_reg (reg, regno)
848 rtx *reg;
849 int regno;
850 {
851 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
852 || ! STACK_REG_P (*reg))
853 abort ();
854
855 switch (GET_MODE_CLASS (GET_MODE (*reg)))
856 {
857 default: abort ();
858 case MODE_FLOAT:
859 case MODE_COMPLEX_FLOAT:;
860 }
861
862 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
863 }
864
865 /* Remove a note of type NOTE, which must be found, for register
866 number REGNO from INSN. Remove only one such note. */
867
868 static void
869 remove_regno_note (insn, note, regno)
870 rtx insn;
871 enum reg_note note;
872 unsigned int regno;
873 {
874 register rtx *note_link, this;
875
876 note_link = &REG_NOTES(insn);
877 for (this = *note_link; this; this = XEXP (this, 1))
878 if (REG_NOTE_KIND (this) == note
879 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
880 {
881 *note_link = XEXP (this, 1);
882 return;
883 }
884 else
885 note_link = &XEXP (this, 1);
886
887 abort ();
888 }
889
890 /* Find the hard register number of virtual register REG in REGSTACK.
891 The hard register number is relative to the top of the stack. -1 is
892 returned if the register is not found. */
893
894 static int
895 get_hard_regnum (regstack, reg)
896 stack regstack;
897 rtx reg;
898 {
899 int i;
900
901 if (! STACK_REG_P (reg))
902 abort ();
903
904 for (i = regstack->top; i >= 0; i--)
905 if (regstack->reg[i] == REGNO (reg))
906 break;
907
908 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
909 }
910
911 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
912 the chain of insns. Doing so could confuse block_begin and block_end
913 if this were the only insn in the block. */
914
915 static void
916 delete_insn_for_stacker (insn)
917 rtx insn;
918 {
919 PUT_CODE (insn, NOTE);
920 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
921 NOTE_SOURCE_FILE (insn) = 0;
922 }
923 \f
924 /* Emit an insn to pop virtual register REG before or after INSN.
925 REGSTACK is the stack state after INSN and is updated to reflect this
926 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
927 is represented as a SET whose destination is the register to be popped
928 and source is the top of stack. A death note for the top of stack
929 cases the movdf pattern to pop. */
930
931 static rtx
932 emit_pop_insn (insn, regstack, reg, where)
933 rtx insn;
934 stack regstack;
935 rtx reg;
936 enum emit_where where;
937 {
938 rtx pop_insn, pop_rtx;
939 int hard_regno;
940
941 /* For complex types take care to pop both halves. These may survive in
942 CLOBBER and USE expressions. */
943 if (COMPLEX_MODE_P (GET_MODE (reg)))
944 {
945 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
946 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
947
948 pop_insn = NULL_RTX;
949 if (get_hard_regnum (regstack, reg1) >= 0)
950 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
951 if (get_hard_regnum (regstack, reg2) >= 0)
952 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
953 if (!pop_insn)
954 abort ();
955 return pop_insn;
956 }
957
958 hard_regno = get_hard_regnum (regstack, reg);
959
960 if (hard_regno < FIRST_STACK_REG)
961 abort ();
962
963 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
964 FP_MODE_REG (FIRST_STACK_REG, DFmode));
965
966 if (where == EMIT_AFTER)
967 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
968 else
969 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
970
971 REG_NOTES (pop_insn)
972 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
973 REG_NOTES (pop_insn));
974
975 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
976 = regstack->reg[regstack->top];
977 regstack->top -= 1;
978 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
979
980 return pop_insn;
981 }
982 \f
983 /* Emit an insn before or after INSN to swap virtual register REG with
984 the top of stack. REGSTACK is the stack state before the swap, and
985 is updated to reflect the swap. A swap insn is represented as a
986 PARALLEL of two patterns: each pattern moves one reg to the other.
987
988 If REG is already at the top of the stack, no insn is emitted. */
989
990 static void
991 emit_swap_insn (insn, regstack, reg)
992 rtx insn;
993 stack regstack;
994 rtx reg;
995 {
996 int hard_regno;
997 rtx swap_rtx;
998 int tmp, other_reg; /* swap regno temps */
999 rtx i1; /* the stack-reg insn prior to INSN */
1000 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
1001
1002 hard_regno = get_hard_regnum (regstack, reg);
1003
1004 if (hard_regno < FIRST_STACK_REG)
1005 abort ();
1006 if (hard_regno == FIRST_STACK_REG)
1007 return;
1008
1009 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1010
1011 tmp = regstack->reg[other_reg];
1012 regstack->reg[other_reg] = regstack->reg[regstack->top];
1013 regstack->reg[regstack->top] = tmp;
1014
1015 /* Find the previous insn involving stack regs, but don't pass a
1016 block boundary. */
1017 i1 = NULL;
1018 if (current_block && insn != current_block->head)
1019 {
1020 rtx tmp = PREV_INSN (insn);
1021 rtx limit = PREV_INSN (current_block->head);
1022 while (tmp != limit)
1023 {
1024 if (GET_CODE (tmp) == CODE_LABEL
1025 || GET_CODE (tmp) == CALL_INSN
1026 || NOTE_INSN_BASIC_BLOCK_P (tmp)
1027 || (GET_CODE (tmp) == INSN
1028 && stack_regs_mentioned (tmp)))
1029 {
1030 i1 = tmp;
1031 break;
1032 }
1033 tmp = PREV_INSN (tmp);
1034 }
1035 }
1036
1037 if (i1 != NULL_RTX
1038 && (i1set = single_set (i1)) != NULL_RTX)
1039 {
1040 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1041 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1042
1043 /* If the previous register stack push was from the reg we are to
1044 swap with, omit the swap. */
1045
1046 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1047 && GET_CODE (i1src) == REG
1048 && REGNO (i1src) == (unsigned) hard_regno - 1
1049 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1050 return;
1051
1052 /* If the previous insn wrote to the reg we are to swap with,
1053 omit the swap. */
1054
1055 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == (unsigned) hard_regno
1056 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1057 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1058 return;
1059 }
1060
1061 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1062 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1063
1064 if (i1)
1065 emit_block_insn_after (swap_rtx, i1, current_block);
1066 else if (current_block)
1067 emit_block_insn_before (swap_rtx, current_block->head, current_block);
1068 else
1069 emit_insn_before (swap_rtx, insn);
1070 }
1071 \f
1072 /* Handle a move to or from a stack register in PAT, which is in INSN.
1073 REGSTACK is the current stack. */
1074
1075 static void
1076 move_for_stack_reg (insn, regstack, pat)
1077 rtx insn;
1078 stack regstack;
1079 rtx pat;
1080 {
1081 rtx *psrc = get_true_reg (&SET_SRC (pat));
1082 rtx *pdest = get_true_reg (&SET_DEST (pat));
1083 rtx src, dest;
1084 rtx note;
1085
1086 src = *psrc; dest = *pdest;
1087
1088 if (STACK_REG_P (src) && STACK_REG_P (dest))
1089 {
1090 /* Write from one stack reg to another. If SRC dies here, then
1091 just change the register mapping and delete the insn. */
1092
1093 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1094 if (note)
1095 {
1096 int i;
1097
1098 /* If this is a no-op move, there must not be a REG_DEAD note. */
1099 if (REGNO (src) == REGNO (dest))
1100 abort ();
1101
1102 for (i = regstack->top; i >= 0; i--)
1103 if (regstack->reg[i] == REGNO (src))
1104 break;
1105
1106 /* The source must be live, and the dest must be dead. */
1107 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1108 abort ();
1109
1110 /* It is possible that the dest is unused after this insn.
1111 If so, just pop the src. */
1112
1113 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1114 {
1115 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1116
1117 delete_insn_for_stacker (insn);
1118 return;
1119 }
1120
1121 regstack->reg[i] = REGNO (dest);
1122
1123 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1124 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1125
1126 delete_insn_for_stacker (insn);
1127
1128 return;
1129 }
1130
1131 /* The source reg does not die. */
1132
1133 /* If this appears to be a no-op move, delete it, or else it
1134 will confuse the machine description output patterns. But if
1135 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1136 for REG_UNUSED will not work for deleted insns. */
1137
1138 if (REGNO (src) == REGNO (dest))
1139 {
1140 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1141 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1142
1143 delete_insn_for_stacker (insn);
1144 return;
1145 }
1146
1147 /* The destination ought to be dead */
1148 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1149 abort ();
1150
1151 replace_reg (psrc, get_hard_regnum (regstack, src));
1152
1153 regstack->reg[++regstack->top] = REGNO (dest);
1154 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1155 replace_reg (pdest, FIRST_STACK_REG);
1156 }
1157 else if (STACK_REG_P (src))
1158 {
1159 /* Save from a stack reg to MEM, or possibly integer reg. Since
1160 only top of stack may be saved, emit an exchange first if
1161 needs be. */
1162
1163 emit_swap_insn (insn, regstack, src);
1164
1165 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1166 if (note)
1167 {
1168 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1169 regstack->top--;
1170 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1171 }
1172 else if ((GET_MODE (src) == XFmode || GET_MODE (src) == TFmode)
1173 && regstack->top < REG_STACK_SIZE - 1)
1174 {
1175 /* A 387 cannot write an XFmode value to a MEM without
1176 clobbering the source reg. The output code can handle
1177 this by reading back the value from the MEM.
1178 But it is more efficient to use a temp register if one is
1179 available. Push the source value here if the register
1180 stack is not full, and then write the value to memory via
1181 a pop. */
1182 rtx push_rtx, push_insn;
1183 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1184
1185 if (GET_MODE (src) == TFmode)
1186 push_rtx = gen_movtf (top_stack_reg, top_stack_reg);
1187 else
1188 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1189 push_insn = emit_insn_before (push_rtx, insn);
1190 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1191 REG_NOTES (insn));
1192 }
1193
1194 replace_reg (psrc, FIRST_STACK_REG);
1195 }
1196 else if (STACK_REG_P (dest))
1197 {
1198 /* Load from MEM, or possibly integer REG or constant, into the
1199 stack regs. The actual target is always the top of the
1200 stack. The stack mapping is changed to reflect that DEST is
1201 now at top of stack. */
1202
1203 /* The destination ought to be dead */
1204 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1205 abort ();
1206
1207 if (regstack->top >= REG_STACK_SIZE)
1208 abort ();
1209
1210 regstack->reg[++regstack->top] = REGNO (dest);
1211 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1212 replace_reg (pdest, FIRST_STACK_REG);
1213 }
1214 else
1215 abort ();
1216 }
1217 \f
1218 /* Swap the condition on a branch, if there is one. Return true if we
1219 found a condition to swap. False if the condition was not used as
1220 such. */
1221
1222 static int
1223 swap_rtx_condition_1 (pat)
1224 rtx pat;
1225 {
1226 register const char *fmt;
1227 register int i, r = 0;
1228
1229 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1230 {
1231 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1232 r = 1;
1233 }
1234 else
1235 {
1236 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1237 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1238 {
1239 if (fmt[i] == 'E')
1240 {
1241 register int j;
1242
1243 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1244 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1245 }
1246 else if (fmt[i] == 'e')
1247 r |= swap_rtx_condition_1 (XEXP (pat, i));
1248 }
1249 }
1250
1251 return r;
1252 }
1253
1254 static int
1255 swap_rtx_condition (insn)
1256 rtx insn;
1257 {
1258 rtx pat = PATTERN (insn);
1259
1260 /* We're looking for a single set to cc0 or an HImode temporary. */
1261
1262 if (GET_CODE (pat) == SET
1263 && GET_CODE (SET_DEST (pat)) == REG
1264 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1265 {
1266 insn = next_flags_user (insn);
1267 if (insn == NULL_RTX)
1268 return 0;
1269 pat = PATTERN (insn);
1270 }
1271
1272 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1273 not doing anything with the cc value right now. We may be able to
1274 search for one though. */
1275
1276 if (GET_CODE (pat) == SET
1277 && GET_CODE (SET_SRC (pat)) == UNSPEC
1278 && XINT (SET_SRC (pat), 1) == 9)
1279 {
1280 rtx dest = SET_DEST (pat);
1281
1282 /* Search forward looking for the first use of this value.
1283 Stop at block boundaries. */
1284 while (insn != current_block->end)
1285 {
1286 insn = NEXT_INSN (insn);
1287 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1288 break;
1289 if (GET_CODE (insn) == CALL_INSN)
1290 return 0;
1291 }
1292
1293 /* So we've found the insn using this value. If it is anything
1294 other than sahf, aka unspec 10, or the value does not die
1295 (meaning we'd have to search further), then we must give up. */
1296 pat = PATTERN (insn);
1297 if (GET_CODE (pat) != SET
1298 || GET_CODE (SET_SRC (pat)) != UNSPEC
1299 || XINT (SET_SRC (pat), 1) != 10
1300 || ! dead_or_set_p (insn, dest))
1301 return 0;
1302
1303 /* Now we are prepared to handle this as a normal cc0 setter. */
1304 insn = next_flags_user (insn);
1305 if (insn == NULL_RTX)
1306 return 0;
1307 pat = PATTERN (insn);
1308 }
1309
1310 if (swap_rtx_condition_1 (pat))
1311 {
1312 int fail = 0;
1313 INSN_CODE (insn) = -1;
1314 if (recog_memoized (insn) == -1)
1315 fail = 1;
1316 /* In case the flags don't die here, recurse to try fix
1317 following user too. */
1318 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1319 {
1320 insn = next_flags_user (insn);
1321 if (!insn || !swap_rtx_condition (insn))
1322 fail = 1;
1323 }
1324 if (fail)
1325 {
1326 swap_rtx_condition_1 (pat);
1327 return 0;
1328 }
1329 return 1;
1330 }
1331 return 0;
1332 }
1333
1334 /* Handle a comparison. Special care needs to be taken to avoid
1335 causing comparisons that a 387 cannot do correctly, such as EQ.
1336
1337 Also, a pop insn may need to be emitted. The 387 does have an
1338 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1339 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1340 set up. */
1341
1342 static void
1343 compare_for_stack_reg (insn, regstack, pat_src)
1344 rtx insn;
1345 stack regstack;
1346 rtx pat_src;
1347 {
1348 rtx *src1, *src2;
1349 rtx src1_note, src2_note;
1350 rtx flags_user;
1351
1352 src1 = get_true_reg (&XEXP (pat_src, 0));
1353 src2 = get_true_reg (&XEXP (pat_src, 1));
1354 flags_user = next_flags_user (insn);
1355
1356 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1357 registers that die in this insn - move those to stack top first. */
1358 if ((! STACK_REG_P (*src1)
1359 || (STACK_REG_P (*src2)
1360 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1361 && swap_rtx_condition (insn))
1362 {
1363 rtx temp;
1364 temp = XEXP (pat_src, 0);
1365 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1366 XEXP (pat_src, 1) = temp;
1367
1368 src1 = get_true_reg (&XEXP (pat_src, 0));
1369 src2 = get_true_reg (&XEXP (pat_src, 1));
1370
1371 INSN_CODE (insn) = -1;
1372 }
1373
1374 /* We will fix any death note later. */
1375
1376 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1377
1378 if (STACK_REG_P (*src2))
1379 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1380 else
1381 src2_note = NULL_RTX;
1382
1383 emit_swap_insn (insn, regstack, *src1);
1384
1385 replace_reg (src1, FIRST_STACK_REG);
1386
1387 if (STACK_REG_P (*src2))
1388 replace_reg (src2, get_hard_regnum (regstack, *src2));
1389
1390 if (src1_note)
1391 {
1392 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1393 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1394 }
1395
1396 /* If the second operand dies, handle that. But if the operands are
1397 the same stack register, don't bother, because only one death is
1398 needed, and it was just handled. */
1399
1400 if (src2_note
1401 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1402 && REGNO (*src1) == REGNO (*src2)))
1403 {
1404 /* As a special case, two regs may die in this insn if src2 is
1405 next to top of stack and the top of stack also dies. Since
1406 we have already popped src1, "next to top of stack" is really
1407 at top (FIRST_STACK_REG) now. */
1408
1409 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1410 && src1_note)
1411 {
1412 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1413 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1414 }
1415 else
1416 {
1417 /* The 386 can only represent death of the first operand in
1418 the case handled above. In all other cases, emit a separate
1419 pop and remove the death note from here. */
1420
1421 /* link_cc0_insns (insn); */
1422
1423 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1424
1425 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1426 EMIT_AFTER);
1427 }
1428 }
1429 }
1430 \f
1431 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1432 is the current register layout. */
1433
1434 static void
1435 subst_stack_regs_pat (insn, regstack, pat)
1436 rtx insn;
1437 stack regstack;
1438 rtx pat;
1439 {
1440 rtx *dest, *src;
1441
1442 switch (GET_CODE (pat))
1443 {
1444 case USE:
1445 /* Deaths in USE insns can happen in non optimizing compilation.
1446 Handle them by popping the dying register. */
1447 src = get_true_reg (&XEXP (pat, 0));
1448 if (STACK_REG_P (*src)
1449 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1450 {
1451 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1452 return;
1453 }
1454 /* ??? Uninitialized USE should not happen. */
1455 else if (get_hard_regnum (regstack, *src) == -1)
1456 abort();
1457 break;
1458
1459 case CLOBBER:
1460 {
1461 rtx note;
1462
1463 dest = get_true_reg (&XEXP (pat, 0));
1464 if (STACK_REG_P (*dest))
1465 {
1466 note = find_reg_note (insn, REG_DEAD, *dest);
1467
1468 if (pat != PATTERN (insn))
1469 {
1470 /* The fix_truncdi_1 pattern wants to be able to allocate
1471 it's own scratch register. It does this by clobbering
1472 an fp reg so that it is assured of an empty reg-stack
1473 register. If the register is live, kill it now.
1474 Remove the DEAD/UNUSED note so we don't try to kill it
1475 later too. */
1476
1477 if (note)
1478 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1479 else
1480 {
1481 note = find_reg_note (insn, REG_UNUSED, *dest);
1482 if (!note)
1483 abort ();
1484 }
1485 remove_note (insn, note);
1486 replace_reg (dest, LAST_STACK_REG);
1487 }
1488 else
1489 {
1490 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1491 indicates an uninitialized value. Because reload removed
1492 all other clobbers, this must be due to a function
1493 returning without a value. Load up a NaN. */
1494
1495 if (! note
1496 && get_hard_regnum (regstack, *dest) == -1)
1497 {
1498 pat = gen_rtx_SET (VOIDmode,
1499 FP_MODE_REG (REGNO (*dest), SFmode),
1500 nan);
1501 PATTERN (insn) = pat;
1502 move_for_stack_reg (insn, regstack, pat);
1503 }
1504 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1505 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1506 {
1507 pat = gen_rtx_SET (VOIDmode,
1508 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1509 nan);
1510 PATTERN (insn) = pat;
1511 move_for_stack_reg (insn, regstack, pat);
1512 }
1513 }
1514 }
1515 break;
1516 }
1517
1518 case SET:
1519 {
1520 rtx *src1 = (rtx *) 0, *src2;
1521 rtx src1_note, src2_note;
1522 rtx pat_src;
1523
1524 dest = get_true_reg (&SET_DEST (pat));
1525 src = get_true_reg (&SET_SRC (pat));
1526 pat_src = SET_SRC (pat);
1527
1528 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1529 if (STACK_REG_P (*src)
1530 || (STACK_REG_P (*dest)
1531 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1532 || GET_CODE (*src) == CONST_DOUBLE)))
1533 {
1534 move_for_stack_reg (insn, regstack, pat);
1535 break;
1536 }
1537
1538 switch (GET_CODE (pat_src))
1539 {
1540 case COMPARE:
1541 compare_for_stack_reg (insn, regstack, pat_src);
1542 break;
1543
1544 case CALL:
1545 {
1546 int count;
1547 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1548 --count >= 0;)
1549 {
1550 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1551 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1552 }
1553 }
1554 replace_reg (dest, FIRST_STACK_REG);
1555 break;
1556
1557 case REG:
1558 /* This is a `tstM2' case. */
1559 if (*dest != cc0_rtx)
1560 abort ();
1561 src1 = src;
1562
1563 /* Fall through. */
1564
1565 case FLOAT_TRUNCATE:
1566 case SQRT:
1567 case ABS:
1568 case NEG:
1569 /* These insns only operate on the top of the stack. DEST might
1570 be cc0_rtx if we're processing a tstM pattern. Also, it's
1571 possible that the tstM case results in a REG_DEAD note on the
1572 source. */
1573
1574 if (src1 == 0)
1575 src1 = get_true_reg (&XEXP (pat_src, 0));
1576
1577 emit_swap_insn (insn, regstack, *src1);
1578
1579 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1580
1581 if (STACK_REG_P (*dest))
1582 replace_reg (dest, FIRST_STACK_REG);
1583
1584 if (src1_note)
1585 {
1586 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1587 regstack->top--;
1588 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1589 }
1590
1591 replace_reg (src1, FIRST_STACK_REG);
1592 break;
1593
1594 case MINUS:
1595 case DIV:
1596 /* On i386, reversed forms of subM3 and divM3 exist for
1597 MODE_FLOAT, so the same code that works for addM3 and mulM3
1598 can be used. */
1599 case MULT:
1600 case PLUS:
1601 /* These insns can accept the top of stack as a destination
1602 from a stack reg or mem, or can use the top of stack as a
1603 source and some other stack register (possibly top of stack)
1604 as a destination. */
1605
1606 src1 = get_true_reg (&XEXP (pat_src, 0));
1607 src2 = get_true_reg (&XEXP (pat_src, 1));
1608
1609 /* We will fix any death note later. */
1610
1611 if (STACK_REG_P (*src1))
1612 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1613 else
1614 src1_note = NULL_RTX;
1615 if (STACK_REG_P (*src2))
1616 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1617 else
1618 src2_note = NULL_RTX;
1619
1620 /* If either operand is not a stack register, then the dest
1621 must be top of stack. */
1622
1623 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1624 emit_swap_insn (insn, regstack, *dest);
1625 else
1626 {
1627 /* Both operands are REG. If neither operand is already
1628 at the top of stack, choose to make the one that is the dest
1629 the new top of stack. */
1630
1631 int src1_hard_regnum, src2_hard_regnum;
1632
1633 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1634 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1635 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1636 abort ();
1637
1638 if (src1_hard_regnum != FIRST_STACK_REG
1639 && src2_hard_regnum != FIRST_STACK_REG)
1640 emit_swap_insn (insn, regstack, *dest);
1641 }
1642
1643 if (STACK_REG_P (*src1))
1644 replace_reg (src1, get_hard_regnum (regstack, *src1));
1645 if (STACK_REG_P (*src2))
1646 replace_reg (src2, get_hard_regnum (regstack, *src2));
1647
1648 if (src1_note)
1649 {
1650 rtx src1_reg = XEXP (src1_note, 0);
1651
1652 /* If the register that dies is at the top of stack, then
1653 the destination is somewhere else - merely substitute it.
1654 But if the reg that dies is not at top of stack, then
1655 move the top of stack to the dead reg, as though we had
1656 done the insn and then a store-with-pop. */
1657
1658 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1659 {
1660 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1661 replace_reg (dest, get_hard_regnum (regstack, *dest));
1662 }
1663 else
1664 {
1665 int regno = get_hard_regnum (regstack, src1_reg);
1666
1667 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1668 replace_reg (dest, regno);
1669
1670 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1671 = regstack->reg[regstack->top];
1672 }
1673
1674 CLEAR_HARD_REG_BIT (regstack->reg_set,
1675 REGNO (XEXP (src1_note, 0)));
1676 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1677 regstack->top--;
1678 }
1679 else if (src2_note)
1680 {
1681 rtx src2_reg = XEXP (src2_note, 0);
1682 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1683 {
1684 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1685 replace_reg (dest, get_hard_regnum (regstack, *dest));
1686 }
1687 else
1688 {
1689 int regno = get_hard_regnum (regstack, src2_reg);
1690
1691 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1692 replace_reg (dest, regno);
1693
1694 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1695 = regstack->reg[regstack->top];
1696 }
1697
1698 CLEAR_HARD_REG_BIT (regstack->reg_set,
1699 REGNO (XEXP (src2_note, 0)));
1700 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1701 regstack->top--;
1702 }
1703 else
1704 {
1705 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1706 replace_reg (dest, get_hard_regnum (regstack, *dest));
1707 }
1708
1709 /* Keep operand 1 maching with destination. */
1710 if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
1711 && REG_P (*src1) && REG_P (*src2)
1712 && REGNO (*src1) != REGNO (*dest))
1713 {
1714 int tmp = REGNO (*src1);
1715 replace_reg (src1, REGNO (*src2));
1716 replace_reg (src2, tmp);
1717 }
1718 break;
1719
1720 case UNSPEC:
1721 switch (XINT (pat_src, 1))
1722 {
1723 case 1: /* sin */
1724 case 2: /* cos */
1725 /* These insns only operate on the top of the stack. */
1726
1727 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1728
1729 emit_swap_insn (insn, regstack, *src1);
1730
1731 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1732
1733 if (STACK_REG_P (*dest))
1734 replace_reg (dest, FIRST_STACK_REG);
1735
1736 if (src1_note)
1737 {
1738 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1739 regstack->top--;
1740 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1741 }
1742
1743 replace_reg (src1, FIRST_STACK_REG);
1744 break;
1745
1746 case 10:
1747 /* (unspec [(unspec [(compare ..)] 9)] 10)
1748 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1749 matches the PPRO fcomi instruction. */
1750
1751 pat_src = XVECEXP (pat_src, 0, 0);
1752 if (GET_CODE (pat_src) != UNSPEC
1753 || XINT (pat_src, 1) != 9)
1754 abort ();
1755 /* FALLTHRU */
1756
1757 case 9:
1758 /* (unspec [(compare ..)] 9) */
1759 /* Combined fcomp+fnstsw generated for doing well with
1760 CSE. When optimizing this would have been broken
1761 up before now. */
1762
1763 pat_src = XVECEXP (pat_src, 0, 0);
1764 if (GET_CODE (pat_src) != COMPARE)
1765 abort ();
1766
1767 compare_for_stack_reg (insn, regstack, pat_src);
1768 break;
1769
1770 default:
1771 abort ();
1772 }
1773 break;
1774
1775 case IF_THEN_ELSE:
1776 /* This insn requires the top of stack to be the destination. */
1777
1778 src1 = get_true_reg (&XEXP (pat_src, 1));
1779 src2 = get_true_reg (&XEXP (pat_src, 2));
1780
1781 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1782 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1783
1784 /* If the comparison operator is an FP comparison operator,
1785 it is handled correctly by compare_for_stack_reg () who
1786 will move the destination to the top of stack. But if the
1787 comparison operator is not an FP comparison operator, we
1788 have to handle it here. */
1789 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1790 && REGNO (*dest) != regstack->reg[regstack->top])
1791 {
1792 /* In case one of operands is the top of stack and the operands
1793 dies, it is safe to make it the destination operand by reversing
1794 the direction of cmove and avoid fxch. */
1795 if ((REGNO (*src1) == regstack->reg[regstack->top]
1796 && src1_note)
1797 || (REGNO (*src2) == regstack->reg[regstack->top]
1798 && src2_note))
1799 {
1800
1801 /* We know that both sources "dies", as one dies and other
1802 is overwriten by the destination. Claim both sources
1803 to be dead, as the code bellow will properly pop the
1804 non-top-of-stack note and replace top-of-stack by the
1805 result by popping source first and then pushing result. */
1806 if (!src1_note)
1807 src1_note = REG_NOTES (insn)
1808 = gen_rtx_EXPR_LIST (REG_DEAD, *src1, REG_NOTES (insn));
1809 if (!src2_note)
1810 src2_note = REG_NOTES (insn)
1811 = gen_rtx_EXPR_LIST (REG_DEAD, *src2, REG_NOTES (insn));
1812
1813 /* i386 do have comparison always reversible. */
1814 PUT_CODE (XEXP (pat_src, 0),
1815 reversed_comparison_code (XEXP (pat_src, 0), insn));
1816 }
1817 else
1818 emit_swap_insn (insn, regstack, *dest);
1819 }
1820
1821 {
1822 rtx src_note [3];
1823 int i;
1824
1825 src_note[0] = 0;
1826 src_note[1] = src1_note;
1827 src_note[2] = src2_note;
1828
1829 if (STACK_REG_P (*src1))
1830 replace_reg (src1, get_hard_regnum (regstack, *src1));
1831 if (STACK_REG_P (*src2))
1832 replace_reg (src2, get_hard_regnum (regstack, *src2));
1833
1834 for (i = 1; i <= 2; i++)
1835 if (src_note [i])
1836 {
1837 int regno = REGNO (XEXP (src_note[i], 0));
1838
1839 /* If the register that dies is not at the top of
1840 stack, then move the top of stack to the dead reg */
1841 if (regno != regstack->reg[regstack->top])
1842 {
1843 remove_regno_note (insn, REG_DEAD, regno);
1844 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1845 EMIT_AFTER);
1846 }
1847 else
1848 {
1849 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1850 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1851 regstack->top--;
1852 }
1853 }
1854 }
1855
1856 /* Make dest the top of stack. Add dest to regstack if
1857 not present. */
1858 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1859 regstack->reg[++regstack->top] = REGNO (*dest);
1860 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1861 replace_reg (dest, FIRST_STACK_REG);
1862 break;
1863
1864 default:
1865 abort ();
1866 }
1867 break;
1868 }
1869
1870 default:
1871 break;
1872 }
1873 }
1874 \f
1875 /* Substitute hard regnums for any stack regs in INSN, which has
1876 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1877 before the insn, and is updated with changes made here.
1878
1879 There are several requirements and assumptions about the use of
1880 stack-like regs in asm statements. These rules are enforced by
1881 record_asm_stack_regs; see comments there for details. Any
1882 asm_operands left in the RTL at this point may be assume to meet the
1883 requirements, since record_asm_stack_regs removes any problem asm. */
1884
1885 static void
1886 subst_asm_stack_regs (insn, regstack)
1887 rtx insn;
1888 stack regstack;
1889 {
1890 rtx body = PATTERN (insn);
1891 int alt;
1892
1893 rtx *note_reg; /* Array of note contents */
1894 rtx **note_loc; /* Address of REG field of each note */
1895 enum reg_note *note_kind; /* The type of each note */
1896
1897 rtx *clobber_reg = 0;
1898 rtx **clobber_loc = 0;
1899
1900 struct stack_def temp_stack;
1901 int n_notes;
1902 int n_clobbers;
1903 rtx note;
1904 int i;
1905 int n_inputs, n_outputs;
1906
1907 if (! check_asm_stack_operands (insn))
1908 return;
1909
1910 /* Find out what the constraints required. If no constraint
1911 alternative matches, that is a compiler bug: we should have caught
1912 such an insn in check_asm_stack_operands. */
1913 extract_insn (insn);
1914 constrain_operands (1);
1915 alt = which_alternative;
1916
1917 preprocess_constraints ();
1918
1919 n_inputs = get_asm_operand_n_inputs (body);
1920 n_outputs = recog_data.n_operands - n_inputs;
1921
1922 if (alt < 0)
1923 abort ();
1924
1925 /* Strip SUBREGs here to make the following code simpler. */
1926 for (i = 0; i < recog_data.n_operands; i++)
1927 if (GET_CODE (recog_data.operand[i]) == SUBREG
1928 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1929 {
1930 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1931 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1932 }
1933
1934 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1935
1936 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1937 i++;
1938
1939 note_reg = (rtx *) alloca (i * sizeof (rtx));
1940 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1941 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1942
1943 n_notes = 0;
1944 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1945 {
1946 rtx reg = XEXP (note, 0);
1947 rtx *loc = & XEXP (note, 0);
1948
1949 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1950 {
1951 loc = & SUBREG_REG (reg);
1952 reg = SUBREG_REG (reg);
1953 }
1954
1955 if (STACK_REG_P (reg)
1956 && (REG_NOTE_KIND (note) == REG_DEAD
1957 || REG_NOTE_KIND (note) == REG_UNUSED))
1958 {
1959 note_reg[n_notes] = reg;
1960 note_loc[n_notes] = loc;
1961 note_kind[n_notes] = REG_NOTE_KIND (note);
1962 n_notes++;
1963 }
1964 }
1965
1966 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1967
1968 n_clobbers = 0;
1969
1970 if (GET_CODE (body) == PARALLEL)
1971 {
1972 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1973 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1974
1975 for (i = 0; i < XVECLEN (body, 0); i++)
1976 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1977 {
1978 rtx clobber = XVECEXP (body, 0, i);
1979 rtx reg = XEXP (clobber, 0);
1980 rtx *loc = & XEXP (clobber, 0);
1981
1982 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1983 {
1984 loc = & SUBREG_REG (reg);
1985 reg = SUBREG_REG (reg);
1986 }
1987
1988 if (STACK_REG_P (reg))
1989 {
1990 clobber_reg[n_clobbers] = reg;
1991 clobber_loc[n_clobbers] = loc;
1992 n_clobbers++;
1993 }
1994 }
1995 }
1996
1997 temp_stack = *regstack;
1998
1999 /* Put the input regs into the desired place in TEMP_STACK. */
2000
2001 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2002 if (STACK_REG_P (recog_data.operand[i])
2003 && reg_class_subset_p (recog_op_alt[i][alt].class,
2004 FLOAT_REGS)
2005 && recog_op_alt[i][alt].class != FLOAT_REGS)
2006 {
2007 /* If an operand needs to be in a particular reg in
2008 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2009 these constraints are for single register classes, and
2010 reload guaranteed that operand[i] is already in that class,
2011 we can just use REGNO (recog_data.operand[i]) to know which
2012 actual reg this operand needs to be in. */
2013
2014 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2015
2016 if (regno < 0)
2017 abort ();
2018
2019 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2020 {
2021 /* recog_data.operand[i] is not in the right place. Find
2022 it and swap it with whatever is already in I's place.
2023 K is where recog_data.operand[i] is now. J is where it
2024 should be. */
2025 int j, k, temp;
2026
2027 k = temp_stack.top - (regno - FIRST_STACK_REG);
2028 j = (temp_stack.top
2029 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2030
2031 temp = temp_stack.reg[k];
2032 temp_stack.reg[k] = temp_stack.reg[j];
2033 temp_stack.reg[j] = temp;
2034 }
2035 }
2036
2037 /* Emit insns before INSN to make sure the reg-stack is in the right
2038 order. */
2039
2040 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2041
2042 /* Make the needed input register substitutions. Do death notes and
2043 clobbers too, because these are for inputs, not outputs. */
2044
2045 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2046 if (STACK_REG_P (recog_data.operand[i]))
2047 {
2048 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2049
2050 if (regnum < 0)
2051 abort ();
2052
2053 replace_reg (recog_data.operand_loc[i], regnum);
2054 }
2055
2056 for (i = 0; i < n_notes; i++)
2057 if (note_kind[i] == REG_DEAD)
2058 {
2059 int regnum = get_hard_regnum (regstack, note_reg[i]);
2060
2061 if (regnum < 0)
2062 abort ();
2063
2064 replace_reg (note_loc[i], regnum);
2065 }
2066
2067 for (i = 0; i < n_clobbers; i++)
2068 {
2069 /* It's OK for a CLOBBER to reference a reg that is not live.
2070 Don't try to replace it in that case. */
2071 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2072
2073 if (regnum >= 0)
2074 {
2075 /* Sigh - clobbers always have QImode. But replace_reg knows
2076 that these regs can't be MODE_INT and will abort. Just put
2077 the right reg there without calling replace_reg. */
2078
2079 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2080 }
2081 }
2082
2083 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2084
2085 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2086 if (STACK_REG_P (recog_data.operand[i]))
2087 {
2088 /* An input reg is implicitly popped if it is tied to an
2089 output, or if there is a CLOBBER for it. */
2090 int j;
2091
2092 for (j = 0; j < n_clobbers; j++)
2093 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2094 break;
2095
2096 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2097 {
2098 /* recog_data.operand[i] might not be at the top of stack.
2099 But that's OK, because all we need to do is pop the
2100 right number of regs off of the top of the reg-stack.
2101 record_asm_stack_regs guaranteed that all implicitly
2102 popped regs were grouped at the top of the reg-stack. */
2103
2104 CLEAR_HARD_REG_BIT (regstack->reg_set,
2105 regstack->reg[regstack->top]);
2106 regstack->top--;
2107 }
2108 }
2109
2110 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2111 Note that there isn't any need to substitute register numbers.
2112 ??? Explain why this is true. */
2113
2114 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2115 {
2116 /* See if there is an output for this hard reg. */
2117 int j;
2118
2119 for (j = 0; j < n_outputs; j++)
2120 if (STACK_REG_P (recog_data.operand[j])
2121 && REGNO (recog_data.operand[j]) == (unsigned) i)
2122 {
2123 regstack->reg[++regstack->top] = i;
2124 SET_HARD_REG_BIT (regstack->reg_set, i);
2125 break;
2126 }
2127 }
2128
2129 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2130 input that the asm didn't implicitly pop. If the asm didn't
2131 implicitly pop an input reg, that reg will still be live.
2132
2133 Note that we can't use find_regno_note here: the register numbers
2134 in the death notes have already been substituted. */
2135
2136 for (i = 0; i < n_outputs; i++)
2137 if (STACK_REG_P (recog_data.operand[i]))
2138 {
2139 int j;
2140
2141 for (j = 0; j < n_notes; j++)
2142 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2143 && note_kind[j] == REG_UNUSED)
2144 {
2145 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2146 EMIT_AFTER);
2147 break;
2148 }
2149 }
2150
2151 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2152 if (STACK_REG_P (recog_data.operand[i]))
2153 {
2154 int j;
2155
2156 for (j = 0; j < n_notes; j++)
2157 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2158 && note_kind[j] == REG_DEAD
2159 && TEST_HARD_REG_BIT (regstack->reg_set,
2160 REGNO (recog_data.operand[i])))
2161 {
2162 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2163 EMIT_AFTER);
2164 break;
2165 }
2166 }
2167 }
2168 \f
2169 /* Substitute stack hard reg numbers for stack virtual registers in
2170 INSN. Non-stack register numbers are not changed. REGSTACK is the
2171 current stack content. Insns may be emitted as needed to arrange the
2172 stack for the 387 based on the contents of the insn. */
2173
2174 static void
2175 subst_stack_regs (insn, regstack)
2176 rtx insn;
2177 stack regstack;
2178 {
2179 register rtx *note_link, note;
2180 register int i;
2181
2182 if (GET_CODE (insn) == CALL_INSN)
2183 {
2184 int top = regstack->top;
2185
2186 /* If there are any floating point parameters to be passed in
2187 registers for this call, make sure they are in the right
2188 order. */
2189
2190 if (top >= 0)
2191 {
2192 straighten_stack (PREV_INSN (insn), regstack);
2193
2194 /* Now mark the arguments as dead after the call. */
2195
2196 while (regstack->top >= 0)
2197 {
2198 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2199 regstack->top--;
2200 }
2201 }
2202 }
2203
2204 /* Do the actual substitution if any stack regs are mentioned.
2205 Since we only record whether entire insn mentions stack regs, and
2206 subst_stack_regs_pat only works for patterns that contain stack regs,
2207 we must check each pattern in a parallel here. A call_value_pop could
2208 fail otherwise. */
2209
2210 if (stack_regs_mentioned (insn))
2211 {
2212 int n_operands = asm_noperands (PATTERN (insn));
2213 if (n_operands >= 0)
2214 {
2215 /* This insn is an `asm' with operands. Decode the operands,
2216 decide how many are inputs, and do register substitution.
2217 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2218
2219 subst_asm_stack_regs (insn, regstack);
2220 return;
2221 }
2222
2223 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2224 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2225 {
2226 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2227 subst_stack_regs_pat (insn, regstack,
2228 XVECEXP (PATTERN (insn), 0, i));
2229 }
2230 else
2231 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2232 }
2233
2234 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2235 REG_UNUSED will already have been dealt with, so just return. */
2236
2237 if (GET_CODE (insn) == NOTE)
2238 return;
2239
2240 /* If there is a REG_UNUSED note on a stack register on this insn,
2241 the indicated reg must be popped. The REG_UNUSED note is removed,
2242 since the form of the newly emitted pop insn references the reg,
2243 making it no longer `unset'. */
2244
2245 note_link = &REG_NOTES(insn);
2246 for (note = *note_link; note; note = XEXP (note, 1))
2247 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2248 {
2249 *note_link = XEXP (note, 1);
2250 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2251 }
2252 else
2253 note_link = &XEXP (note, 1);
2254 }
2255 \f
2256 /* Change the organization of the stack so that it fits a new basic
2257 block. Some registers might have to be popped, but there can never be
2258 a register live in the new block that is not now live.
2259
2260 Insert any needed insns before or after INSN, as indicated by
2261 WHERE. OLD is the original stack layout, and NEW is the desired
2262 form. OLD is updated to reflect the code emitted, ie, it will be
2263 the same as NEW upon return.
2264
2265 This function will not preserve block_end[]. But that information
2266 is no longer needed once this has executed. */
2267
2268 static void
2269 change_stack (insn, old, new, where)
2270 rtx insn;
2271 stack old;
2272 stack new;
2273 enum emit_where where;
2274 {
2275 int reg;
2276 int update_end = 0;
2277
2278 /* We will be inserting new insns "backwards". If we are to insert
2279 after INSN, find the next insn, and insert before it. */
2280
2281 if (where == EMIT_AFTER)
2282 {
2283 if (current_block && current_block->end == insn)
2284 update_end = 1;
2285 insn = NEXT_INSN (insn);
2286 }
2287
2288 /* Pop any registers that are not needed in the new block. */
2289
2290 for (reg = old->top; reg >= 0; reg--)
2291 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2292 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2293 EMIT_BEFORE);
2294
2295 if (new->top == -2)
2296 {
2297 /* If the new block has never been processed, then it can inherit
2298 the old stack order. */
2299
2300 new->top = old->top;
2301 memcpy (new->reg, old->reg, sizeof (new->reg));
2302 }
2303 else
2304 {
2305 /* This block has been entered before, and we must match the
2306 previously selected stack order. */
2307
2308 /* By now, the only difference should be the order of the stack,
2309 not their depth or liveliness. */
2310
2311 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2312 abort ();
2313 win:
2314 if (old->top != new->top)
2315 abort ();
2316
2317 /* If the stack is not empty (new->top != -1), loop here emitting
2318 swaps until the stack is correct.
2319
2320 The worst case number of swaps emitted is N + 2, where N is the
2321 depth of the stack. In some cases, the reg at the top of
2322 stack may be correct, but swapped anyway in order to fix
2323 other regs. But since we never swap any other reg away from
2324 its correct slot, this algorithm will converge. */
2325
2326 if (new->top != -1)
2327 do
2328 {
2329 /* Swap the reg at top of stack into the position it is
2330 supposed to be in, until the correct top of stack appears. */
2331
2332 while (old->reg[old->top] != new->reg[new->top])
2333 {
2334 for (reg = new->top; reg >= 0; reg--)
2335 if (new->reg[reg] == old->reg[old->top])
2336 break;
2337
2338 if (reg == -1)
2339 abort ();
2340
2341 emit_swap_insn (insn, old,
2342 FP_MODE_REG (old->reg[reg], DFmode));
2343 }
2344
2345 /* See if any regs remain incorrect. If so, bring an
2346 incorrect reg to the top of stack, and let the while loop
2347 above fix it. */
2348
2349 for (reg = new->top; reg >= 0; reg--)
2350 if (new->reg[reg] != old->reg[reg])
2351 {
2352 emit_swap_insn (insn, old,
2353 FP_MODE_REG (old->reg[reg], DFmode));
2354 break;
2355 }
2356 } while (reg >= 0);
2357
2358 /* At this point there must be no differences. */
2359
2360 for (reg = old->top; reg >= 0; reg--)
2361 if (old->reg[reg] != new->reg[reg])
2362 abort ();
2363 }
2364
2365 if (update_end)
2366 current_block->end = PREV_INSN (insn);
2367 }
2368 \f
2369 /* Print stack configuration. */
2370
2371 static void
2372 print_stack (file, s)
2373 FILE *file;
2374 stack s;
2375 {
2376 if (! file)
2377 return;
2378
2379 if (s->top == -2)
2380 fprintf (file, "uninitialized\n");
2381 else if (s->top == -1)
2382 fprintf (file, "empty\n");
2383 else
2384 {
2385 int i;
2386 fputs ("[ ", file);
2387 for (i = 0; i <= s->top; ++i)
2388 fprintf (file, "%d ", s->reg[i]);
2389 fputs ("]\n", file);
2390 }
2391 }
2392 \f
2393 /* This function was doing life analysis. We now let the regular live
2394 code do it's job, so we only need to check some extra invariants
2395 that reg-stack expects. Primary among these being that all registers
2396 are initialized before use.
2397
2398 The function returns true when code was emitted to CFG edges and
2399 commit_edge_insertions needs to be called. */
2400
2401 static int
2402 convert_regs_entry ()
2403 {
2404 int inserted = 0, i;
2405 edge e;
2406
2407 for (i = n_basic_blocks - 1; i >= 0; --i)
2408 {
2409 basic_block block = BASIC_BLOCK (i);
2410 block_info bi = BLOCK_INFO (block);
2411 int reg;
2412
2413 /* Set current register status at last instruction `uninitialized'. */
2414 bi->stack_in.top = -2;
2415
2416 /* Copy live_at_end and live_at_start into temporaries. */
2417 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2418 {
2419 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2420 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2421 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2422 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2423 }
2424 }
2425
2426 /* Load something into each stack register live at function entry.
2427 Such live registers can be caused by uninitialized variables or
2428 functions not returning values on all paths. In order to keep
2429 the push/pop code happy, and to not scrog the register stack, we
2430 must put something in these registers. Use a QNaN.
2431
2432 Note that we are insertting converted code here. This code is
2433 never seen by the convert_regs pass. */
2434
2435 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2436 {
2437 basic_block block = e->dest;
2438 block_info bi = BLOCK_INFO (block);
2439 int reg, top = -1;
2440
2441 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2442 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2443 {
2444 rtx init;
2445
2446 bi->stack_in.reg[++top] = reg;
2447
2448 init = gen_rtx_SET (VOIDmode,
2449 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2450 nan);
2451 insert_insn_on_edge (init, e);
2452 inserted = 1;
2453 }
2454
2455 bi->stack_in.top = top;
2456 }
2457
2458 return inserted;
2459 }
2460
2461 /* Construct the desired stack for function exit. This will either
2462 be `empty', or the function return value at top-of-stack. */
2463
2464 static void
2465 convert_regs_exit ()
2466 {
2467 int value_reg_low, value_reg_high;
2468 stack output_stack;
2469 rtx retvalue;
2470
2471 retvalue = stack_result (current_function_decl);
2472 value_reg_low = value_reg_high = -1;
2473 if (retvalue)
2474 {
2475 value_reg_low = REGNO (retvalue);
2476 value_reg_high = value_reg_low
2477 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2478 }
2479
2480 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2481 if (value_reg_low == -1)
2482 output_stack->top = -1;
2483 else
2484 {
2485 int reg;
2486
2487 output_stack->top = value_reg_high - value_reg_low;
2488 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2489 {
2490 output_stack->reg[reg - value_reg_low] = reg;
2491 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2492 }
2493 }
2494 }
2495
2496 /* Adjust the stack of this block on exit to match the stack of the
2497 target block, or copy stack info into the stack of the successor
2498 of the successor hasn't been processed yet. */
2499 static bool
2500 compensate_edge (e, file)
2501 edge e;
2502 FILE *file;
2503 {
2504 basic_block block = e->src, target = e->dest;
2505 block_info bi = BLOCK_INFO (block);
2506 struct stack_def regstack, tmpstack;
2507 stack target_stack = &BLOCK_INFO (target)->stack_in;
2508 int reg;
2509
2510 current_block = block;
2511 regstack = bi->stack_out;
2512 if (file)
2513 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2514
2515 if (target_stack->top == -2)
2516 {
2517 /* The target block hasn't had a stack order selected.
2518 We need merely ensure that no pops are needed. */
2519 for (reg = regstack.top; reg >= 0; --reg)
2520 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2521 break;
2522
2523 if (reg == -1)
2524 {
2525 if (file)
2526 fprintf (file, "new block; copying stack position\n");
2527
2528 /* change_stack kills values in regstack. */
2529 tmpstack = regstack;
2530
2531 change_stack (block->end, &tmpstack, target_stack, EMIT_AFTER);
2532 return false;
2533 }
2534
2535 if (file)
2536 fprintf (file, "new block; pops needed\n");
2537 }
2538 else
2539 {
2540 if (target_stack->top == regstack.top)
2541 {
2542 for (reg = target_stack->top; reg >= 0; --reg)
2543 if (target_stack->reg[reg] != regstack.reg[reg])
2544 break;
2545
2546 if (reg == -1)
2547 {
2548 if (file)
2549 fprintf (file, "no changes needed\n");
2550 return false;
2551 }
2552 }
2553
2554 if (file)
2555 {
2556 fprintf (file, "correcting stack to ");
2557 print_stack (file, target_stack);
2558 }
2559 }
2560
2561 /* Care for non-call EH edges specially. The normal return path have
2562 values in registers. These will be popped en masse by the unwind
2563 library. */
2564 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2565 target_stack->top = -1;
2566
2567 /* Other calls may appear to have values live in st(0), but the
2568 abnormal return path will not have actually loaded the values. */
2569 else if (e->flags & EDGE_ABNORMAL_CALL)
2570 {
2571 /* Assert that the lifetimes are as we expect -- one value
2572 live at st(0) on the end of the source block, and no
2573 values live at the beginning of the destination block. */
2574 HARD_REG_SET tmp;
2575
2576 CLEAR_HARD_REG_SET (tmp);
2577 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2578 abort ();
2579 eh1:
2580
2581 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2582 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2583 abort ();
2584 eh2:
2585
2586 target_stack->top = -1;
2587 }
2588
2589 /* It is better to output directly to the end of the block
2590 instead of to the edge, because emit_swap can do minimal
2591 insn scheduling. We can do this when there is only one
2592 edge out, and it is not abnormal. */
2593 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2594 {
2595 /* change_stack kills values in regstack. */
2596 tmpstack = regstack;
2597
2598 change_stack (block->end, &tmpstack, target_stack,
2599 (GET_CODE (block->end) == JUMP_INSN
2600 ? EMIT_BEFORE : EMIT_AFTER));
2601 }
2602 else
2603 {
2604 rtx seq, after;
2605
2606 /* We don't support abnormal edges. Global takes care to
2607 avoid any live register across them, so we should never
2608 have to insert instructions on such edges. */
2609 if (e->flags & EDGE_ABNORMAL)
2610 abort ();
2611
2612 current_block = NULL;
2613 start_sequence ();
2614
2615 /* ??? change_stack needs some point to emit insns after.
2616 Also needed to keep gen_sequence from returning a
2617 pattern as opposed to a sequence, which would lose
2618 REG_DEAD notes. */
2619 after = emit_note (NULL, NOTE_INSN_DELETED);
2620
2621 tmpstack = regstack;
2622 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2623
2624 seq = gen_sequence ();
2625 end_sequence ();
2626
2627 insert_insn_on_edge (seq, e);
2628 return true;
2629 }
2630 return false;
2631 }
2632
2633 /* Convert stack register references in one block. */
2634
2635 static int
2636 convert_regs_1 (file, block)
2637 FILE *file;
2638 basic_block block;
2639 {
2640 struct stack_def regstack;
2641 block_info bi = BLOCK_INFO (block);
2642 int inserted, reg;
2643 rtx insn, next;
2644 edge e, beste = NULL;
2645
2646 inserted = 0;
2647
2648 /* Find the edge we will copy stack from. It should be the most frequent
2649 one as it will get cheapest after compensation code is generated,
2650 if multiple such exists, take one with largest count, preffer critical
2651 one (as splitting critical edges is more expensive), or one with lowest
2652 index, to avoid random changes with different orders of the edges. */
2653 for (e = block->pred; e ; e = e->pred_next)
2654 {
2655 if (e->flags & EDGE_DFS_BACK)
2656 ;
2657 else if (! beste)
2658 beste = e;
2659 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2660 beste = e;
2661 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2662 ;
2663 else if (beste->count < e->count)
2664 beste = e;
2665 else if (beste->count > e->count)
2666 ;
2667 else if ((e->flags & EDGE_CRITICAL) != (beste->flags & EDGE_CRITICAL))
2668 {
2669 if (e->flags & EDGE_CRITICAL)
2670 beste = e;
2671 }
2672 else if (e->src->index < beste->src->index)
2673 beste = e;
2674 }
2675
2676 /* Entry block does have stack already initialized. */
2677 if (bi->stack_in.top == -2)
2678 inserted |= compensate_edge (beste, file);
2679 else
2680 beste = NULL;
2681
2682 current_block = block;
2683
2684 if (file)
2685 {
2686 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2687 print_stack (file, &bi->stack_in);
2688 }
2689
2690 /* Process all insns in this block. Keep track of NEXT so that we
2691 don't process insns emitted while substituting in INSN. */
2692 next = block->head;
2693 regstack = bi->stack_in;
2694 do
2695 {
2696 insn = next;
2697 next = NEXT_INSN (insn);
2698
2699 /* Ensure we have not missed a block boundary. */
2700 if (next == NULL)
2701 abort ();
2702 if (insn == block->end)
2703 next = NULL;
2704
2705 /* Don't bother processing unless there is a stack reg
2706 mentioned or if it's a CALL_INSN. */
2707 if (stack_regs_mentioned (insn)
2708 || GET_CODE (insn) == CALL_INSN)
2709 {
2710 if (file)
2711 {
2712 fprintf (file, " insn %d input stack: ",
2713 INSN_UID (insn));
2714 print_stack (file, &regstack);
2715 }
2716 subst_stack_regs (insn, &regstack);
2717 }
2718 }
2719 while (next);
2720
2721 if (file)
2722 {
2723 fprintf (file, "Expected live registers [");
2724 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2725 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2726 fprintf (file, " %d", reg);
2727 fprintf (file, " ]\nOutput stack: ");
2728 print_stack (file, &regstack);
2729 }
2730
2731 insn = block->end;
2732 if (GET_CODE (insn) == JUMP_INSN)
2733 insn = PREV_INSN (insn);
2734
2735 /* If the function is declared to return a value, but it returns one
2736 in only some cases, some registers might come live here. Emit
2737 necessary moves for them. */
2738
2739 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2740 {
2741 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2742 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2743 {
2744 rtx set;
2745
2746 if (file)
2747 {
2748 fprintf (file, "Emitting insn initializing reg %d\n",
2749 reg);
2750 }
2751
2752 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2753 nan);
2754 insn = emit_block_insn_after (set, insn, block);
2755 subst_stack_regs (insn, &regstack);
2756 }
2757 }
2758
2759 /* Something failed if the stack lives don't match. */
2760 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2761 abort ();
2762 win:
2763 bi->stack_out = regstack;
2764
2765 /* Compensate the back edges, as those wasn't visited yet. */
2766 for (e = block->succ; e ; e = e->succ_next)
2767 {
2768 if (e->flags & EDGE_DFS_BACK
2769 || (e->dest == EXIT_BLOCK_PTR))
2770 {
2771 if (!BLOCK_INFO (e->dest)->done
2772 && e->dest != block)
2773 abort ();
2774 inserted |= compensate_edge (e, file);
2775 }
2776 }
2777 for (e = block->pred; e ; e = e->pred_next)
2778 {
2779 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2780 && e->src != ENTRY_BLOCK_PTR)
2781 {
2782 if (!BLOCK_INFO (e->src)->done)
2783 abort ();
2784 inserted |= compensate_edge (e, file);
2785 }
2786 }
2787
2788 return inserted;
2789 }
2790
2791 /* Convert registers in all blocks reachable from BLOCK. */
2792
2793 static int
2794 convert_regs_2 (file, block)
2795 FILE *file;
2796 basic_block block;
2797 {
2798 basic_block *stack, *sp;
2799 int inserted;
2800
2801 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2802 sp = stack;
2803
2804 *sp++ = block;
2805
2806 inserted = 0;
2807 do
2808 {
2809 edge e;
2810
2811 block = *--sp;
2812 inserted |= convert_regs_1 (file, block);
2813 BLOCK_INFO (block)->done = 1;
2814
2815 for (e = block->succ; e ; e = e->succ_next)
2816 if (! (e->flags & EDGE_DFS_BACK))
2817 {
2818 BLOCK_INFO (e->dest)->predecesors--;
2819 if (!BLOCK_INFO (e->dest)->predecesors)
2820 *sp++ = e->dest;
2821 }
2822 }
2823 while (sp != stack);
2824
2825 return inserted;
2826 }
2827
2828 /* Traverse all basic blocks in a function, converting the register
2829 references in each insn from the "flat" register file that gcc uses,
2830 to the stack-like registers the 387 uses. */
2831
2832 static int
2833 convert_regs (file)
2834 FILE *file;
2835 {
2836 int inserted, i;
2837 edge e;
2838
2839 /* Initialize uninitialized registers on function entry. */
2840 inserted = convert_regs_entry ();
2841
2842 /* Construct the desired stack for function exit. */
2843 convert_regs_exit ();
2844 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2845
2846 /* ??? Future: process inner loops first, and give them arbitrary
2847 initial stacks which emit_swap_insn can modify. This ought to
2848 prevent double fxch that aften appears at the head of a loop. */
2849
2850 /* Process all blocks reachable from all entry points. */
2851 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2852 inserted |= convert_regs_2 (file, e->dest);
2853
2854 /* ??? Process all unreachable blocks. Though there's no excuse
2855 for keeping these even when not optimizing. */
2856 for (i = 0; i < n_basic_blocks; ++i)
2857 {
2858 basic_block b = BASIC_BLOCK (i);
2859 block_info bi = BLOCK_INFO (b);
2860
2861 if (! bi->done)
2862 {
2863 int reg;
2864
2865 /* Create an arbitrary input stack. */
2866 bi->stack_in.top = -1;
2867 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2868 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2869 bi->stack_in.reg[++bi->stack_in.top] = reg;
2870
2871 inserted |= convert_regs_2 (file, b);
2872 }
2873 }
2874
2875 if (inserted)
2876 commit_edge_insertions ();
2877
2878 if (file)
2879 fputc ('\n', file);
2880
2881 return inserted;
2882 }
2883 #endif /* STACK_REGS */