1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
24 * The form of the input:
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
44 * The form of the output:
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
77 Before life analysis, the mode of each insn is set based on whether
78 or not any stack registers are mentioned within that insn. VOIDmode
79 means that no regs are mentioned anyway, and QImode means that at
80 least one pattern within the insn mentions stack registers. This
81 information is valid until after reg_to_stack returns, and is used
86 There are several rules on the usage of stack-like regs in
87 asm_operands insns. These rules apply only to the operands that are
90 1. Given a set of input regs that die in an asm_operands, it is
91 necessary to know which are implicitly popped by the asm, and
92 which must be explicitly popped by gcc.
94 An input reg that is implicitly popped by the asm must be
95 explicitly clobbered, unless it is constrained to match an
98 2. For any input reg that is implicitly popped by an asm, it is
99 necessary to know how to adjust the stack to compensate for the pop.
100 If any non-popped input is closer to the top of the reg-stack than
101 the implicitly popped reg, it would not be possible to know what the
102 stack looked like - it's not clear how the rest of the stack "slides
105 All implicitly popped input regs must be closer to the top of
106 the reg-stack than any input that is not implicitly popped.
108 3. It is possible that if an input dies in an insn, reload might
109 use the input reg for an output reload. Consider this example:
111 asm ("foo" : "=t" (a) : "f" (b));
113 This asm says that input B is not popped by the asm, and that
114 the asm pushes a result onto the reg-stack, ie, the stack is one
115 deeper after the asm than it was before. But, it is possible that
116 reload will think that it can use the same reg for both the input and
117 the output, if input B dies in this insn.
119 If any input operand uses the "f" constraint, all output reg
120 constraints must use the "&" earlyclobber.
122 The asm above would be written as
124 asm ("foo" : "=&t" (a) : "f" (b));
126 4. Some operands need to be in particular places on the stack. All
127 output operands fall in this category - there is no other way to
128 know which regs the outputs appear in unless the user indicates
129 this in the constraints.
131 Output operands must specifically indicate which reg an output
132 appears in after an asm. "=f" is not allowed: the operand
133 constraints must select a class with a single reg.
135 5. Output operands may not be "inserted" between existing stack regs.
136 Since no 387 opcode uses a read/write operand, all output operands
137 are dead before the asm_operands, and are pushed by the asm_operands.
138 It makes no sense to push anywhere but the top of the reg-stack.
140 Output operands must start at the top of the reg-stack: output
141 operands may not "skip" a reg.
143 6. Some asm statements may need extra stack space for internal
144 calculations. This can be guaranteed by clobbering stack registers
145 unrelated to the inputs and outputs.
147 Here are a couple of reasonable asms to want to write. This asm
148 takes one input, which is internally popped, and produces two outputs.
150 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
152 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
153 and replaces them with one output. The user must code the "st(1)"
154 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
156 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
164 #include "insn-config.h"
166 #include "hard-reg-set.h"
171 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
173 /* This is the basic stack record. TOP is an index into REG[] such
174 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
176 If TOP is -2, REG[] is not yet initialized. Stack initialization
177 consists of placing each live reg in array `reg' and setting `top'
180 REG_SET indicates which registers are live. */
182 typedef struct stack_def
184 int top
; /* index to top stack element */
185 HARD_REG_SET reg_set
; /* set of live registers */
186 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
189 /* highest instruction uid */
190 static int max_uid
= 0;
192 /* Number of basic blocks in the current function. */
195 /* Element N is first insn in basic block N.
196 This info lasts until we finish compiling the function. */
197 static rtx
*block_begin
;
199 /* Element N is last insn in basic block N.
200 This info lasts until we finish compiling the function. */
201 static rtx
*block_end
;
203 /* Element N is nonzero if control can drop into basic block N */
204 static char *block_drops_in
;
206 /* Element N says all about the stack at entry block N */
207 static stack block_stack_in
;
209 /* Element N says all about the stack life at the end of block N */
210 static HARD_REG_SET
*block_out_reg_set
;
212 /* This is where the BLOCK_NUM values are really stored. This is set
213 up by find_blocks and used there and in life_analysis. It can be used
214 later, but only to look up an insn that is the head or tail of some
215 block. life_analysis and the stack register conversion process can
216 add insns within a block. */
217 static int *block_number
;
219 /* This is the register file for all register after conversion */
221 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
223 #define FP_MODE_REG(regno,mode) \
224 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
226 /* Get the basic block number of an insn. See note at block_number
227 definition are validity of this information. */
229 #define BLOCK_NUM(INSN) \
230 ((INSN_UID (INSN) > max_uid) \
231 ? (abort() , -1) : block_number[INSN_UID (INSN)])
233 extern rtx forced_labels
;
234 extern rtx
gen_jump ();
235 extern rtx
gen_movdf (), gen_movxf ();
236 extern rtx
find_regno_note ();
237 extern rtx
emit_jump_insn_before ();
238 extern rtx
emit_label_after ();
240 /* Forward declarations */
242 static void find_blocks ();
243 static uses_reg_or_mem ();
244 static void stack_reg_life_analysis ();
245 static void record_reg_life_pat ();
246 static void change_stack ();
247 static void convert_regs ();
248 static void dump_stack_info ();
250 /* Mark all registers needed for this pattern. */
253 mark_regs_pat (pat
, set
)
257 enum machine_mode mode
;
261 if (GET_CODE (pat
) == SUBREG
)
263 mode
= GET_MODE (pat
);
264 regno
= SUBREG_WORD (pat
);
265 regno
+= REGNO (SUBREG_REG (pat
));
268 regno
= REGNO (pat
), mode
= GET_MODE (pat
);
270 for (count
= HARD_REGNO_NREGS (regno
, mode
);
271 count
; count
--, regno
++)
272 SET_HARD_REG_BIT (*set
, regno
);
275 /* Reorganise the stack into ascending numbers,
279 straighten_stack (insn
, regstack
)
283 struct stack_def temp_stack
;
286 temp_stack
.reg_set
= regstack
->reg_set
;
288 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
289 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
291 change_stack (insn
, regstack
, &temp_stack
, emit_insn_after
);
294 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
297 stack_regs_mentioned_p (pat
)
303 if (STACK_REG_P (pat
))
306 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
307 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
313 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
314 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
317 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
324 /* Convert register usage from "flat" register file usage to a "stack
325 register file. FIRST is the first insn in the function, FILE is the
328 First compute the beginning and end of each basic block. Do a
329 register life analysis on the stack registers, recording the result
330 for the head and tail of each basic block. The convert each insn one
331 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
332 any cross-jumping created when the converter inserts pop insns.*/
335 reg_to_stack (first
, file
)
341 int stack_reg_seen
= 0;
342 enum machine_mode mode
;
343 HARD_REG_SET stackentry
;
345 CLEAR_HARD_REG_SET (stackentry
);
352 initialised
= 1; /* This array can not have been previously
353 initialised, because the rtx's are
354 thrown away between compilations of
357 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
359 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
360 mode
= GET_MODE_WIDER_MODE (mode
))
361 FP_MODE_REG (i
, mode
) = gen_rtx (REG
, mode
, i
);
362 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
); mode
!= VOIDmode
;
363 mode
= GET_MODE_WIDER_MODE (mode
))
364 FP_MODE_REG (i
, mode
) = gen_rtx (REG
, mode
, i
);
369 /* Count the basic blocks. Also find maximum insn uid. */
371 register RTX_CODE prev_code
= BARRIER
;
372 register RTX_CODE code
;
373 register before_function_beg
= 1;
377 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
379 /* Note that this loop must select the same block boundaries
380 as code in find_blocks. Also note that this code is not the
381 same as that used in flow.c. */
383 if (INSN_UID (insn
) > max_uid
)
384 max_uid
= INSN_UID (insn
);
386 code
= GET_CODE (insn
);
388 if (code
== CODE_LABEL
389 || (prev_code
!= INSN
390 && prev_code
!= CALL_INSN
391 && prev_code
!= CODE_LABEL
392 && GET_RTX_CLASS (code
) == 'i'))
395 if (code
== NOTE
&& NOTE_LINE_NUMBER (insn
) == NOTE_INSN_FUNCTION_BEG
)
396 before_function_beg
= 0;
398 /* Remember whether or not this insn mentions an FP regs.
399 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
401 if (GET_RTX_CLASS (code
) == 'i'
402 && stack_regs_mentioned_p (PATTERN (insn
)))
405 PUT_MODE (insn
, QImode
);
407 /* Note any register passing parameters. */
409 if (before_function_beg
&& code
== INSN
410 && GET_CODE (PATTERN (insn
)) == USE
)
411 record_reg_life_pat (PATTERN (insn
), (HARD_REG_SET
*) 0,
415 PUT_MODE (insn
, VOIDmode
);
417 if (code
== CODE_LABEL
)
418 LABEL_REFS (insn
) = insn
; /* delete old chain */
425 /* If no stack register reference exists in this insn, there isn't
426 anything to convert. */
428 if (! stack_reg_seen
)
431 /* If there are stack registers, there must be at least one block. */
436 /* Allocate some tables that last till end of compiling this function
437 and some needed only in find_blocks and life_analysis. */
439 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
440 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
441 block_drops_in
= (char *) alloca (blocks
);
443 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
444 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
445 bzero ((char *) block_stack_in
, blocks
* sizeof (struct stack_def
));
446 bzero ((char *) block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
448 block_number
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
451 stack_reg_life_analysis (first
, &stackentry
);
453 /* Dump the life analysis debug information before jump
454 optimization, as that will destroy the LABEL_REFS we keep the
458 dump_stack_info (file
);
463 jump_optimize (first
, 2, 0, 0);
466 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
467 label's chain of references, and note which insn contains each
471 record_label_references (insn
, pat
)
474 register enum rtx_code code
= GET_CODE (pat
);
478 if (code
== LABEL_REF
)
480 register rtx label
= XEXP (pat
, 0);
483 if (GET_CODE (label
) != CODE_LABEL
)
486 /* If this is an undefined label, LABEL_REFS (label) contains garbage. */
487 if (INSN_UID (label
) == 0)
490 /* Don't make a duplicate in the code_label's chain. */
492 for (ref
= LABEL_REFS (label
);
494 ref
= LABEL_NEXTREF (ref
))
495 if (CONTAINING_INSN (ref
) == insn
)
498 CONTAINING_INSN (pat
) = insn
;
499 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
500 LABEL_REFS (label
) = pat
;
505 fmt
= GET_RTX_FORMAT (code
);
506 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
509 record_label_references (insn
, XEXP (pat
, i
));
513 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
514 record_label_references (insn
, XVECEXP (pat
, i
, j
));
519 /* Return a pointer to the REG expression within PAT. If PAT is not a
520 REG, possible enclosed by a conversion rtx, return the inner part of
521 PAT that stopped the search. */
528 switch (GET_CODE (*pat
))
531 /* eliminate FP subregister accesses in favour of the
532 actual FP register in use. */
535 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
537 *pat
= FP_MODE_REG (REGNO (subreg
) + SUBREG_WORD (*pat
),
546 pat
= & XEXP (*pat
, 0);
550 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
551 N_OPERANDS is the total number of operands. Return which alternative
552 matched, or -1 is no alternative matches.
554 OPERAND_MATCHES is an array which indicates which operand this
555 operand matches due to the constraints, or -1 if no match is required.
556 If two operands match by coincidence, but are not required to match by
557 the constraints, -1 is returned.
559 OPERAND_CLASS is an array which indicates the smallest class
560 required by the constraints. If the alternative that matches calls
561 for some class `class', and the operand matches a subclass of `class',
562 OPERAND_CLASS is set to `class' as required by the constraints, not to
563 the subclass. If an alternative allows more than one class,
564 OPERAND_CLASS is set to the smallest class that is a union of the
568 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
569 operand_matches
, operand_class
)
572 char **operand_constraints
;
573 int *operand_matches
;
574 enum reg_class
*operand_class
;
576 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
578 int this_alternative
, this_operand
;
582 for (j
= 0; j
< n_operands
; j
++)
583 constraints
[j
] = operand_constraints
[j
];
585 /* Compute the number of alternatives in the operands. reload has
586 already guaranteed that all operands have the same number of
590 for (q
= constraints
[0]; *q
; q
++)
591 n_alternatives
+= (*q
== ',');
593 this_alternative
= 0;
594 while (this_alternative
< n_alternatives
)
599 /* No operands match, no narrow class requirements yet. */
600 for (i
= 0; i
< n_operands
; i
++)
602 operand_matches
[i
] = -1;
603 operand_class
[i
] = NO_REGS
;
606 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
608 rtx op
= operands
[this_operand
];
609 enum machine_mode mode
= GET_MODE (op
);
610 char *p
= constraints
[this_operand
];
615 if (GET_CODE (op
) == SUBREG
)
617 if (GET_CODE (SUBREG_REG (op
)) == REG
618 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
619 offset
= SUBREG_WORD (op
);
620 op
= SUBREG_REG (op
);
623 /* An empty constraint or empty alternative
624 allows anything which matched the pattern. */
625 if (*p
== 0 || *p
== ',')
628 while (*p
&& (c
= *p
++) != ',')
642 /* Ignore rest of this alternative. */
643 while (*p
&& *p
!= ',') p
++;
652 /* This operand must be the same as a previous one.
653 This kind of constraint is used for instructions such
654 as add when they take only two operands.
656 Note that the lower-numbered operand is passed first. */
658 if (operands_match_p (operands
[c
- '0'],
659 operands
[this_operand
]))
661 operand_matches
[this_operand
] = c
- '0';
667 /* p is used for address_operands. Since this is an asm,
668 just to make sure that the operand is valid for Pmode. */
670 if (strict_memory_address_p (Pmode
, op
))
675 /* Anything goes unless it is a REG and really has a hard reg
676 but the hard reg is not in the class GENERAL_REGS. */
677 if (GENERAL_REGS
== ALL_REGS
678 || GET_CODE (op
) != REG
679 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
681 if (GET_CODE (op
) == REG
)
682 operand_class
[this_operand
]
683 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
689 if (GET_CODE (op
) == REG
690 && (GENERAL_REGS
== ALL_REGS
691 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
693 operand_class
[this_operand
]
694 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
700 /* This is used for a MATCH_SCRATCH in the cases when we
701 don't actually need anything. So anything goes any time. */
706 if (GET_CODE (op
) == MEM
)
711 if (GET_CODE (op
) == MEM
712 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
713 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
718 if (GET_CODE (op
) == MEM
719 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
720 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
725 /* Match any CONST_DOUBLE, but only if
726 we can examine the bits of it reliably. */
727 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
728 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
729 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
731 if (GET_CODE (op
) == CONST_DOUBLE
)
736 if (GET_CODE (op
) == CONST_DOUBLE
)
742 if (GET_CODE (op
) == CONST_DOUBLE
743 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
748 if (GET_CODE (op
) == CONST_INT
749 || (GET_CODE (op
) == CONST_DOUBLE
750 && GET_MODE (op
) == VOIDmode
))
759 if (GET_CODE (op
) == CONST_INT
760 || (GET_CODE (op
) == CONST_DOUBLE
761 && GET_MODE (op
) == VOIDmode
))
773 if (GET_CODE (op
) == CONST_INT
774 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
778 #ifdef EXTRA_CONSTRAINT
784 if (EXTRA_CONSTRAINT (op
, c
))
790 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
795 if (offsettable_memref_p (op
))
800 if (GET_CODE (op
) == REG
801 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
804 operand_class
[this_operand
]
805 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
810 constraints
[this_operand
] = p
;
811 /* If this operand did not win somehow,
812 this alternative loses. */
816 /* This alternative won; the operands are ok.
817 Change whichever operands this alternative says to change. */
824 /* For operands constrained to match another operand, copy the other
825 operand's class to this operand's class. */
826 for (j
= 0; j
< n_operands
; j
++)
827 if (operand_matches
[j
] >= 0)
828 operand_class
[j
] = operand_class
[operand_matches
[j
]];
830 return this_alternative
== n_alternatives
? -1 : this_alternative
;
833 /* Record the life info of each stack reg in INSN, updating REGSTACK.
834 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
835 is an array of the constraint strings used in the asm statement.
836 OPERANDS is an array of all operands for the insn, and is assumed to
837 contain all output operands, then all inputs operands.
839 There are many rules that an asm statement for stack-like regs must
840 follow. Those rules are explained at the top of this file: the rule
841 numbers below refer to that explanation. */
844 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
850 int n_inputs
, n_outputs
;
853 int n_operands
= n_inputs
+ n_outputs
;
854 int first_input
= n_outputs
;
856 int malformed_asm
= 0;
857 rtx body
= PATTERN (insn
);
859 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
861 enum reg_class
*operand_class
862 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
864 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
865 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
869 /* Find out what the constraints require. If no constraint
870 alternative matches, this asm is malformed. */
871 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
872 operand_matches
, operand_class
);
876 /* Strip SUBREGs here to make the following code simpler. */
877 for (i
= 0; i
< n_operands
; i
++)
878 if (GET_CODE (operands
[i
]) == SUBREG
879 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
880 operands
[i
] = SUBREG_REG (operands
[i
]);
882 /* Set up CLOBBER_REG. */
886 if (GET_CODE (body
) == PARALLEL
)
888 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
890 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
891 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
893 rtx clobber
= XVECEXP (body
, 0, i
);
894 rtx reg
= XEXP (clobber
, 0);
896 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
897 reg
= SUBREG_REG (reg
);
899 if (STACK_REG_P (reg
))
901 clobber_reg
[n_clobbers
] = reg
;
907 /* Enforce rule #4: Output operands must specifically indicate which
908 reg an output appears in after an asm. "=f" is not allowed: the
909 operand constraints must select a class with a single reg.
911 Also enforce rule #5: Output operands must start at the top of
912 the reg-stack: output operands may not "skip" a reg. */
914 bzero ((char *) reg_used_as_output
, sizeof (reg_used_as_output
));
915 for (i
= 0; i
< n_outputs
; i
++)
916 if (STACK_REG_P (operands
[i
]))
917 if (reg_class_size
[(int) operand_class
[i
]] != 1)
920 (insn
, "Output constraint %d must specify a single register", i
);
924 reg_used_as_output
[REGNO (operands
[i
])] = 1;
927 /* Search for first non-popped reg. */
928 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
929 if (! reg_used_as_output
[i
])
932 /* If there are any other popped regs, that's an error. */
933 for (; i
< LAST_STACK_REG
+ 1; i
++)
934 if (reg_used_as_output
[i
])
937 if (i
!= LAST_STACK_REG
+ 1)
939 error_for_asm (insn
, "Output regs must be grouped at top of stack");
943 /* Enforce rule #2: All implicitly popped input regs must be closer
944 to the top of the reg-stack than any input that is not implicitly
947 bzero ((char *) implicitly_dies
, sizeof (implicitly_dies
));
948 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
949 if (STACK_REG_P (operands
[i
]))
951 /* An input reg is implicitly popped if it is tied to an
952 output, or if there is a CLOBBER for it. */
955 for (j
= 0; j
< n_clobbers
; j
++)
956 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
959 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
960 implicitly_dies
[REGNO (operands
[i
])] = 1;
963 /* Search for first non-popped reg. */
964 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
965 if (! implicitly_dies
[i
])
968 /* If there are any other popped regs, that's an error. */
969 for (; i
< LAST_STACK_REG
+ 1; i
++)
970 if (implicitly_dies
[i
])
973 if (i
!= LAST_STACK_REG
+ 1)
976 "Implicitly popped regs must be grouped at top of stack");
980 /* Enfore rule #3: If any input operand uses the "f" constraint, all
981 output constraints must use the "&" earlyclobber.
983 ??? Detect this more deterministically by having constraint_asm_operands
984 record any earlyclobber. */
986 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
987 if (operand_matches
[i
] == -1)
991 for (j
= 0; j
< n_outputs
; j
++)
992 if (operands_match_p (operands
[j
], operands
[i
]))
995 "Output operand %d must use `&' constraint", j
);
1002 /* Avoid further trouble with this insn. */
1003 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
1004 PUT_MODE (insn
, VOIDmode
);
1008 /* Process all outputs */
1009 for (i
= 0; i
< n_outputs
; i
++)
1011 rtx op
= operands
[i
];
1013 if (! STACK_REG_P (op
))
1014 if (stack_regs_mentioned_p (op
))
1019 /* Each destination is dead before this insn. If the
1020 destination is not used after this insn, record this with
1023 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
1024 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
, op
,
1027 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
1030 /* Process all inputs */
1031 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
1033 if (! STACK_REG_P (operands
[i
]))
1034 if (stack_regs_mentioned_p (operands
[i
]))
1039 /* If an input is dead after the insn, record a death note.
1040 But don't record a death note if there is already a death note,
1041 or if the input is also an output. */
1043 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
1044 && operand_matches
[i
] == -1
1045 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])) == NULL_RTX
)
1046 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, operands
[i
],
1049 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
1053 /* Scan PAT, which is part of INSN, and record registers appearing in
1054 a SET_DEST in DEST, and other registers in SRC.
1056 This function does not know about SET_DESTs that are both input and
1057 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
1060 record_reg_life_pat (pat
, src
, dest
, douse
)
1062 HARD_REG_SET
*src
, *dest
;
1068 if (STACK_REG_P (pat
)
1069 || (GET_CODE (pat
) == SUBREG
&& STACK_REG_P (SUBREG_REG (pat
))))
1072 mark_regs_pat (pat
, src
);
1075 mark_regs_pat (pat
, dest
);
1080 if (GET_CODE (pat
) == SET
)
1082 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
, 0);
1083 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
, 0);
1087 /* We don't need to consider either of these cases. */
1088 if (GET_CODE (pat
) == USE
&& !douse
|| GET_CODE (pat
) == CLOBBER
)
1091 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1092 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1098 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1099 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
, 0);
1101 else if (fmt
[i
] == 'e')
1102 record_reg_life_pat (XEXP (pat
, i
), src
, dest
, 0);
1106 /* Calculate the number of inputs and outputs in BODY, an
1107 asm_operands. N_OPERANDS is the total number of operands, and
1108 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1112 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1115 int *n_inputs
, *n_outputs
;
1117 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1118 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1120 else if (GET_CODE (body
) == ASM_OPERANDS
)
1121 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1123 else if (GET_CODE (body
) == PARALLEL
1124 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1125 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1127 else if (GET_CODE (body
) == PARALLEL
1128 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1129 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1133 *n_outputs
= n_operands
- *n_inputs
;
1136 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1137 registers in REGSTACK. This function is called to process insns from
1138 the last insn in a block to the first. The actual scanning is done in
1139 record_reg_life_pat.
1141 If a register is live after a CALL_INSN, but is not a value return
1142 register for that CALL_INSN, then code is emitted to initialize that
1143 register. The block_end[] data is kept accurate.
1145 Existing death and unset notes for stack registers are deleted
1146 before processing the insn. */
1149 record_reg_life (insn
, block
, regstack
)
1154 rtx note
, *note_link
;
1157 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1158 || INSN_DELETED_P (insn
))
1161 /* Strip death notes for stack regs from this insn */
1163 note_link
= ®_NOTES(insn
);
1164 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1165 if (STACK_REG_P (XEXP (note
, 0))
1166 && (REG_NOTE_KIND (note
) == REG_DEAD
1167 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1168 *note_link
= XEXP (note
, 1);
1170 note_link
= &XEXP (note
, 1);
1172 /* Process all patterns in the insn. */
1174 n_operands
= asm_noperands (PATTERN (insn
));
1175 if (n_operands
>= 0)
1177 /* This insn is an `asm' with operands. Decode the operands,
1178 decide how many are inputs, and record the life information. */
1180 rtx operands
[MAX_RECOG_OPERANDS
];
1181 rtx body
= PATTERN (insn
);
1182 int n_inputs
, n_outputs
;
1183 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1185 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1186 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1187 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1188 n_inputs
, n_outputs
);
1193 HARD_REG_SET src
, dest
;
1196 CLEAR_HARD_REG_SET (src
);
1197 CLEAR_HARD_REG_SET (dest
);
1199 if (GET_CODE (insn
) == CALL_INSN
)
1200 for (note
= CALL_INSN_FUNCTION_USAGE (insn
);
1202 note
= XEXP (note
, 1))
1203 if (GET_CODE (XEXP (note
, 0)) == USE
)
1204 record_reg_life_pat (SET_DEST (XEXP (note
, 0)), &src
, NULL_PTR
, 0);
1206 record_reg_life_pat (PATTERN (insn
), &src
, &dest
, 0);
1207 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1208 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1210 if (TEST_HARD_REG_BIT (src
, regno
)
1211 && ! TEST_HARD_REG_BIT (dest
, regno
))
1212 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1213 FP_MODE_REG (regno
, DFmode
),
1215 else if (TEST_HARD_REG_BIT (dest
, regno
))
1216 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
,
1217 FP_MODE_REG (regno
, DFmode
),
1221 if (GET_CODE (insn
) == CALL_INSN
)
1225 /* There might be a reg that is live after a function call.
1226 Initialize it to zero so that the program does not crash. See
1227 comment towards the end of stack_reg_life_analysis(). */
1229 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
1230 if (! TEST_HARD_REG_BIT (dest
, reg
)
1231 && TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1235 /* The insn will use virtual register numbers, and so
1236 convert_regs is expected to process these. But BLOCK_NUM
1237 cannot be used on these insns, because they do not appear in
1240 pat
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG (reg
, DFmode
),
1241 CONST0_RTX (DFmode
));
1242 init
= emit_insn_after (pat
, insn
);
1243 PUT_MODE (init
, QImode
);
1245 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1247 /* If the CALL_INSN was the end of a block, move the
1248 block_end to point to the new insn. */
1250 if (block_end
[block
] == insn
)
1251 block_end
[block
] = init
;
1254 /* Some regs do not survive a CALL */
1255 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1258 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1259 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1263 /* Find all basic blocks of the function, which starts with FIRST.
1264 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1272 register RTX_CODE prev_code
= BARRIER
;
1273 register RTX_CODE code
;
1274 rtx label_value_list
= 0;
1276 /* Record where all the blocks start and end.
1277 Record which basic blocks control can drop in to. */
1280 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1282 /* Note that this loop must select the same block boundaries
1283 as code in reg_to_stack, but that these are not the same
1284 as those selected in flow.c. */
1286 code
= GET_CODE (insn
);
1288 if (code
== CODE_LABEL
1289 || (prev_code
!= INSN
1290 && prev_code
!= CALL_INSN
1291 && prev_code
!= CODE_LABEL
1292 && GET_RTX_CLASS (code
) == 'i'))
1294 block_begin
[++block
] = insn
;
1295 block_end
[block
] = insn
;
1296 block_drops_in
[block
] = prev_code
!= BARRIER
;
1298 else if (GET_RTX_CLASS (code
) == 'i')
1299 block_end
[block
] = insn
;
1301 if (GET_RTX_CLASS (code
) == 'i')
1305 /* Make a list of all labels referred to other than by jumps. */
1306 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1307 if (REG_NOTE_KIND (note
) == REG_LABEL
)
1308 label_value_list
= gen_rtx (EXPR_LIST
, VOIDmode
, XEXP (note
, 0),
1312 block_number
[INSN_UID (insn
)] = block
;
1318 if (block
+ 1 != blocks
)
1321 /* generate all label references to the corresponding jump insn */
1322 for (block
= 0; block
< blocks
; block
++)
1324 insn
= block_end
[block
];
1326 if (GET_CODE (insn
) == JUMP_INSN
)
1328 rtx pat
= PATTERN (insn
);
1329 int computed_jump
= 0;
1332 if (GET_CODE (pat
) == PARALLEL
)
1334 int len
= XVECLEN (pat
, 0);
1335 int has_use_labelref
= 0;
1338 for (i
= len
- 1; i
>= 0; i
--)
1339 if (GET_CODE (XVECEXP (pat
, 0, i
)) == USE
1340 && GET_CODE (XEXP (XVECEXP (pat
, 0, i
), 0)) == LABEL_REF
)
1341 has_use_labelref
= 1;
1343 if (! has_use_labelref
)
1344 for (i
= len
- 1; i
>= 0; i
--)
1345 if (GET_CODE (XVECEXP (pat
, 0, i
)) == SET
1346 && SET_DEST (XVECEXP (pat
, 0, i
)) == pc_rtx
1347 && uses_reg_or_mem (SET_SRC (XVECEXP (pat
, 0, i
))))
1350 else if (GET_CODE (pat
) == SET
1351 && SET_DEST (pat
) == pc_rtx
1352 && uses_reg_or_mem (SET_SRC (pat
)))
1357 for (x
= label_value_list
; x
; x
= XEXP (x
, 1))
1358 record_label_references (insn
,
1359 gen_rtx (LABEL_REF
, VOIDmode
,
1362 for (x
= forced_labels
; x
; x
= XEXP (x
, 1))
1363 record_label_references (insn
,
1364 gen_rtx (LABEL_REF
, VOIDmode
,
1368 record_label_references (insn
, pat
);
1373 /* Return 1 if X contain a REG or MEM that is not in the constant pool. */
1379 enum rtx_code code
= GET_CODE (x
);
1385 && ! (GET_CODE (XEXP (x
, 0)) == SYMBOL_REF
1386 && CONSTANT_POOL_ADDRESS_P (XEXP (x
, 0)))))
1389 fmt
= GET_RTX_FORMAT (code
);
1390 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1393 && uses_reg_or_mem (XEXP (x
, i
)))
1397 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1398 if (uses_reg_or_mem (XVECEXP (x
, i
, j
)))
1405 /* If current function returns its result in an fp stack register,
1406 return the REG. Otherwise, return 0. */
1412 rtx result
= DECL_RTL (DECL_RESULT (decl
));
1415 && ! (GET_CODE (result
) == REG
1416 && REGNO (result
) < FIRST_PSEUDO_REGISTER
))
1418 #ifdef FUNCTION_OUTGOING_VALUE
1420 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1422 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1426 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
1429 /* Determine the which registers are live at the start of each basic
1430 block of the function whose first insn is FIRST.
1432 First, if the function returns a real_type, mark the function
1433 return type as live at each return point, as the RTL may not give any
1434 hint that the register is live.
1436 Then, start with the last block and work back to the first block.
1437 Similarly, work backwards within each block, insn by insn, recording
1438 which regs are dead and which are used (and therefore live) in the
1439 hard reg set of block_stack_in[].
1441 After processing each basic block, if there is a label at the start
1442 of the block, propagate the live registers to all jumps to this block.
1444 As a special case, if there are regs live in this block, that are
1445 not live in a block containing a jump to this label, and the block
1446 containing the jump has already been processed, we must propagate this
1447 block's entry register life back to the block containing the jump, and
1448 restart life analysis from there.
1450 In the worst case, this function may traverse the insns
1451 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1452 of the insns may not know that a reg is live at a target that is early
1453 in the insns. So we back up and start over with the new reg live.
1455 If there are registers that are live at the start of the function,
1456 insns are emitted to initialize these registers. Something similar is
1457 done after CALL_INSNs in record_reg_life. */
1460 stack_reg_life_analysis (first
, stackentry
)
1462 HARD_REG_SET
*stackentry
;
1465 struct stack_def regstack
;
1470 if (retvalue
= stack_result (current_function_decl
))
1472 /* Find all RETURN insns and mark them. */
1474 for (block
= blocks
- 1; --block
>= 0;)
1475 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1476 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1477 mark_regs_pat (retvalue
, block_out_reg_set
+block
);
1479 /* Mark off the end of last block if we "fall off" the end of the
1480 function into the epilogue. */
1482 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1483 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1484 mark_regs_pat (retvalue
, block_out_reg_set
+blocks
-1);
1488 /* now scan all blocks backward for stack register use */
1493 register rtx insn
, prev
;
1495 /* current register status at last instruction */
1497 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1499 prev
= block_end
[block
];
1503 prev
= PREV_INSN (insn
);
1505 /* If the insn is a CALL_INSN, we need to ensure that
1506 everything dies. But otherwise don't process unless there
1507 are some stack regs present. */
1509 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1510 record_reg_life (insn
, block
, ®stack
);
1512 } while (insn
!= block_begin
[block
]);
1514 /* Set the state at the start of the block. Mark that no
1515 register mapping information known yet. */
1517 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1518 block_stack_in
[block
].top
= -2;
1520 /* If there is a label, propagate our register life to all jumps
1523 if (GET_CODE (insn
) == CODE_LABEL
)
1526 int must_restart
= 0;
1528 for (label
= LABEL_REFS (insn
); label
!= insn
;
1529 label
= LABEL_NEXTREF (label
))
1531 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1533 if (jump_block
< block
)
1534 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1535 block_stack_in
[block
].reg_set
);
1538 /* The block containing the jump has already been
1539 processed. If there are registers that were not known
1540 to be live then, but are live now, we must back up
1541 and restart life analysis from that point with the new
1542 life information. */
1544 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1545 block_out_reg_set
[jump_block
],
1548 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1549 block_stack_in
[block
].reg_set
);
1562 if (block_drops_in
[block
])
1563 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1564 block_stack_in
[block
].reg_set
);
1569 /* If any reg is live at the start of the first block of a
1570 function, then we must guarantee that the reg holds some value by
1571 generating our own "load" of that register. Otherwise a 387 would
1572 fault trying to access an empty register. */
1574 /* Load zero into each live register. The fact that a register
1575 appears live at the function start necessarily implies an error
1576 in the user program: it means that (unless the offending code is *never*
1577 executed) this program is using uninitialised floating point
1578 variables. In order to keep broken code like this happy, we initialise
1579 those variables with zero.
1581 Note that we are inserting virtual register references here:
1582 these insns must be processed by convert_regs later. Also, these
1583 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1585 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1586 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
)
1587 && ! TEST_HARD_REG_BIT (*stackentry
, reg
))
1591 init_rtx
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG(reg
, DFmode
),
1592 CONST0_RTX (DFmode
));
1593 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1594 PUT_MODE (block_begin
[0], QImode
);
1596 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1600 /*****************************************************************************
1601 This section deals with stack register substitution, and forms the second
1603 *****************************************************************************/
1605 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1606 the desired hard REGNO. */
1609 replace_reg (reg
, regno
)
1613 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1614 || ! STACK_REG_P (*reg
))
1617 switch (GET_MODE_CLASS (GET_MODE (*reg
)))
1621 case MODE_COMPLEX_FLOAT
:;
1624 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
1627 /* Remove a note of type NOTE, which must be found, for register
1628 number REGNO from INSN. Remove only one such note. */
1631 remove_regno_note (insn
, note
, regno
)
1636 register rtx
*note_link
, this;
1638 note_link
= ®_NOTES(insn
);
1639 for (this = *note_link
; this; this = XEXP (this, 1))
1640 if (REG_NOTE_KIND (this) == note
1641 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1643 *note_link
= XEXP (this, 1);
1647 note_link
= &XEXP (this, 1);
1652 /* Find the hard register number of virtual register REG in REGSTACK.
1653 The hard register number is relative to the top of the stack. -1 is
1654 returned if the register is not found. */
1657 get_hard_regnum (regstack
, reg
)
1663 if (! STACK_REG_P (reg
))
1666 for (i
= regstack
->top
; i
>= 0; i
--)
1667 if (regstack
->reg
[i
] == REGNO (reg
))
1670 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1673 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1674 the chain of insns. Doing so could confuse block_begin and block_end
1675 if this were the only insn in the block. */
1678 delete_insn_for_stacker (insn
)
1681 PUT_CODE (insn
, NOTE
);
1682 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1683 NOTE_SOURCE_FILE (insn
) = 0;
1686 /* Emit an insn to pop virtual register REG before or after INSN.
1687 REGSTACK is the stack state after INSN and is updated to reflect this
1688 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1689 is represented as a SET whose destination is the register to be popped
1690 and source is the top of stack. A death note for the top of stack
1691 cases the movdf pattern to pop. */
1694 emit_pop_insn (insn
, regstack
, reg
, when
)
1700 rtx pop_insn
, pop_rtx
;
1703 hard_regno
= get_hard_regnum (regstack
, reg
);
1705 if (hard_regno
< FIRST_STACK_REG
)
1708 pop_rtx
= gen_rtx (SET
, VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
1709 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1711 pop_insn
= (*when
) (pop_rtx
, insn
);
1712 /* ??? This used to be VOIDmode, but that seems wrong. */
1713 PUT_MODE (pop_insn
, QImode
);
1715 REG_NOTES (pop_insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1716 FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
1717 REG_NOTES (pop_insn
));
1719 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1720 = regstack
->reg
[regstack
->top
];
1722 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1727 /* Emit an insn before or after INSN to swap virtual register REG with the
1728 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1729 REGSTACK is the stack state before the swap, and is updated to reflect
1730 the swap. A swap insn is represented as a PARALLEL of two patterns:
1731 each pattern moves one reg to the other.
1733 If REG is already at the top of the stack, no insn is emitted. */
1736 emit_swap_insn (insn
, regstack
, reg
)
1743 rtx swap_rtx
, swap_insn
;
1744 int tmp
, other_reg
; /* swap regno temps */
1745 rtx i1
; /* the stack-reg insn prior to INSN */
1746 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
1748 hard_regno
= get_hard_regnum (regstack
, reg
);
1750 if (hard_regno
< FIRST_STACK_REG
)
1752 if (hard_regno
== FIRST_STACK_REG
)
1755 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1757 tmp
= regstack
->reg
[other_reg
];
1758 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
1759 regstack
->reg
[regstack
->top
] = tmp
;
1761 /* Find the previous insn involving stack regs, but don't go past
1762 any labels, calls or jumps. */
1763 i1
= prev_nonnote_insn (insn
);
1764 while (i1
&& GET_CODE (i1
) == INSN
&& GET_MODE (i1
) != QImode
)
1765 i1
= prev_nonnote_insn (i1
);
1768 i1set
= single_set (i1
);
1772 rtx i2
; /* the stack-reg insn prior to I1 */
1773 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
1774 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
1776 /* If the previous register stack push was from the reg we are to
1777 swap with, omit the swap. */
1779 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1780 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1781 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1784 /* If the previous insn wrote to the reg we are to swap with,
1787 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1788 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1789 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1793 if (GET_RTX_CLASS (GET_CODE (i1
)) == 'i' && sets_cc0_p (PATTERN (i1
)))
1795 i1
= next_nonnote_insn (i1
);
1800 swap_rtx
= gen_swapdf (FP_MODE_REG (hard_regno
, DFmode
),
1801 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1802 swap_insn
= emit_insn_after (swap_rtx
, i1
);
1803 /* ??? This used to be VOIDmode, but that seems wrong. */
1804 PUT_MODE (swap_insn
, QImode
);
1807 /* Handle a move to or from a stack register in PAT, which is in INSN.
1808 REGSTACK is the current stack. */
1811 move_for_stack_reg (insn
, regstack
, pat
)
1816 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1817 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1821 src
= *psrc
; dest
= *pdest
;
1823 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1825 /* Write from one stack reg to another. If SRC dies here, then
1826 just change the register mapping and delete the insn. */
1828 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1833 /* If this is a no-op move, there must not be a REG_DEAD note. */
1834 if (REGNO (src
) == REGNO (dest
))
1837 for (i
= regstack
->top
; i
>= 0; i
--)
1838 if (regstack
->reg
[i
] == REGNO (src
))
1841 /* The source must be live, and the dest must be dead. */
1842 if (i
< 0 || get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1845 /* It is possible that the dest is unused after this insn.
1846 If so, just pop the src. */
1848 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1850 emit_pop_insn (insn
, regstack
, src
, emit_insn_after
);
1852 delete_insn_for_stacker (insn
);
1856 regstack
->reg
[i
] = REGNO (dest
);
1858 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1859 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1861 delete_insn_for_stacker (insn
);
1866 /* The source reg does not die. */
1868 /* If this appears to be a no-op move, delete it, or else it
1869 will confuse the machine description output patterns. But if
1870 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1871 for REG_UNUSED will not work for deleted insns. */
1873 if (REGNO (src
) == REGNO (dest
))
1875 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1876 emit_pop_insn (insn
, regstack
, dest
, emit_insn_after
);
1878 delete_insn_for_stacker (insn
);
1882 /* The destination ought to be dead */
1883 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1886 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1888 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1889 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1890 replace_reg (pdest
, FIRST_STACK_REG
);
1892 else if (STACK_REG_P (src
))
1894 /* Save from a stack reg to MEM, or possibly integer reg. Since
1895 only top of stack may be saved, emit an exchange first if
1898 emit_swap_insn (insn
, regstack
, src
);
1900 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1903 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1905 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1907 else if (GET_MODE (src
) == XFmode
&& regstack
->top
< REG_STACK_SIZE
- 1)
1909 /* A 387 cannot write an XFmode value to a MEM without
1910 clobbering the source reg. The output code can handle
1911 this by reading back the value from the MEM.
1912 But it is more efficient to use a temp register if one is
1913 available. Push the source value here if the register
1914 stack is not full, and then write the value to memory via
1916 rtx push_rtx
, push_insn
;
1917 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, XFmode
);
1919 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1920 push_insn
= emit_insn_before (push_rtx
, insn
);
1921 PUT_MODE (push_insn
, QImode
);
1922 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, top_stack_reg
,
1926 replace_reg (psrc
, FIRST_STACK_REG
);
1928 else if (STACK_REG_P (dest
))
1930 /* Load from MEM, or possibly integer REG or constant, into the
1931 stack regs. The actual target is always the top of the
1932 stack. The stack mapping is changed to reflect that DEST is
1933 now at top of stack. */
1935 /* The destination ought to be dead */
1936 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1939 if (regstack
->top
>= REG_STACK_SIZE
)
1942 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1943 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1944 replace_reg (pdest
, FIRST_STACK_REG
);
1951 swap_rtx_condition (pat
)
1957 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1959 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1963 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1964 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1970 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1971 swap_rtx_condition (XVECEXP (pat
, i
, j
));
1973 else if (fmt
[i
] == 'e')
1974 swap_rtx_condition (XEXP (pat
, i
));
1978 /* Handle a comparison. Special care needs to be taken to avoid
1979 causing comparisons that a 387 cannot do correctly, such as EQ.
1981 Also, a pop insn may need to be emitted. The 387 does have an
1982 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1983 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1987 compare_for_stack_reg (insn
, regstack
, pat
)
1993 rtx src1_note
, src2_note
;
1995 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1996 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1998 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1999 registers that die in this insn - move those to stack top first. */
2000 if (! STACK_REG_P (*src1
)
2001 || (STACK_REG_P (*src2
)
2002 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
2006 temp
= XEXP (SET_SRC (pat
), 0);
2007 XEXP (SET_SRC (pat
), 0) = XEXP (SET_SRC (pat
), 1);
2008 XEXP (SET_SRC (pat
), 1) = temp
;
2010 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2011 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2013 next
= next_cc0_user (insn
);
2014 if (next
== NULL_RTX
)
2017 swap_rtx_condition (PATTERN (next
));
2018 INSN_CODE (next
) = -1;
2019 INSN_CODE (insn
) = -1;
2022 /* We will fix any death note later. */
2024 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2026 if (STACK_REG_P (*src2
))
2027 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2029 src2_note
= NULL_RTX
;
2031 emit_swap_insn (insn
, regstack
, *src1
);
2033 replace_reg (src1
, FIRST_STACK_REG
);
2035 if (STACK_REG_P (*src2
))
2036 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2040 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src1_note
, 0)));
2041 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2045 /* If the second operand dies, handle that. But if the operands are
2046 the same stack register, don't bother, because only one death is
2047 needed, and it was just handled. */
2050 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
2051 && REGNO (*src1
) == REGNO (*src2
)))
2053 /* As a special case, two regs may die in this insn if src2 is
2054 next to top of stack and the top of stack also dies. Since
2055 we have already popped src1, "next to top of stack" is really
2056 at top (FIRST_STACK_REG) now. */
2058 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
2061 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src2_note
, 0)));
2062 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
2067 /* The 386 can only represent death of the first operand in
2068 the case handled above. In all other cases, emit a separate
2069 pop and remove the death note from here. */
2071 link_cc0_insns (insn
);
2073 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
2075 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
2081 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
2082 is the current register layout. */
2085 subst_stack_regs_pat (insn
, regstack
, pat
)
2091 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
2092 rtx src1_note
, src2_note
;
2094 if (GET_CODE (pat
) != SET
)
2097 dest
= get_true_reg (&SET_DEST (pat
));
2098 src
= get_true_reg (&SET_SRC (pat
));
2100 /* See if this is a `movM' pattern, and handle elsewhere if so. */
2102 if (*dest
!= cc0_rtx
2103 && (STACK_REG_P (*src
)
2104 || (STACK_REG_P (*dest
)
2105 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
2106 || GET_CODE (*src
) == CONST_DOUBLE
))))
2107 move_for_stack_reg (insn
, regstack
, pat
);
2109 switch (GET_CODE (SET_SRC (pat
)))
2112 compare_for_stack_reg (insn
, regstack
, pat
);
2118 for (count
= HARD_REGNO_NREGS (REGNO (*dest
), GET_MODE (*dest
));
2121 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
2122 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
2125 replace_reg (dest
, FIRST_STACK_REG
);
2129 /* This is a `tstM2' case. */
2130 if (*dest
!= cc0_rtx
)
2137 case FLOAT_TRUNCATE
:
2141 /* These insns only operate on the top of the stack. DEST might
2142 be cc0_rtx if we're processing a tstM pattern. Also, it's
2143 possible that the tstM case results in a REG_DEAD note on the
2147 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2149 emit_swap_insn (insn
, regstack
, *src1
);
2151 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2153 if (STACK_REG_P (*dest
))
2154 replace_reg (dest
, FIRST_STACK_REG
);
2158 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2160 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2163 replace_reg (src1
, FIRST_STACK_REG
);
2169 /* On i386, reversed forms of subM3 and divM3 exist for
2170 MODE_FLOAT, so the same code that works for addM3 and mulM3
2174 /* These insns can accept the top of stack as a destination
2175 from a stack reg or mem, or can use the top of stack as a
2176 source and some other stack register (possibly top of stack)
2177 as a destination. */
2179 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2180 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2182 /* We will fix any death note later. */
2184 if (STACK_REG_P (*src1
))
2185 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2187 src1_note
= NULL_RTX
;
2188 if (STACK_REG_P (*src2
))
2189 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2191 src2_note
= NULL_RTX
;
2193 /* If either operand is not a stack register, then the dest
2194 must be top of stack. */
2196 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
2197 emit_swap_insn (insn
, regstack
, *dest
);
2200 /* Both operands are REG. If neither operand is already
2201 at the top of stack, choose to make the one that is the dest
2202 the new top of stack. */
2204 int src1_hard_regnum
, src2_hard_regnum
;
2206 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
2207 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
2208 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
2211 if (src1_hard_regnum
!= FIRST_STACK_REG
2212 && src2_hard_regnum
!= FIRST_STACK_REG
)
2213 emit_swap_insn (insn
, regstack
, *dest
);
2216 if (STACK_REG_P (*src1
))
2217 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2218 if (STACK_REG_P (*src2
))
2219 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2223 /* If the register that dies is at the top of stack, then
2224 the destination is somewhere else - merely substitute it.
2225 But if the reg that dies is not at top of stack, then
2226 move the top of stack to the dead reg, as though we had
2227 done the insn and then a store-with-pop. */
2229 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
2231 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2232 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2236 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
2238 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2239 replace_reg (dest
, regno
);
2241 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2242 = regstack
->reg
[regstack
->top
];
2245 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2246 REGNO (XEXP (src1_note
, 0)));
2247 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2252 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
2254 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2255 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2259 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
2261 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2262 replace_reg (dest
, regno
);
2264 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2265 = regstack
->reg
[regstack
->top
];
2268 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2269 REGNO (XEXP (src2_note
, 0)));
2270 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
2275 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2276 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2282 switch (XINT (SET_SRC (pat
), 1))
2286 /* These insns only operate on the top of the stack. */
2288 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
2290 emit_swap_insn (insn
, regstack
, *src1
);
2292 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2294 if (STACK_REG_P (*dest
))
2295 replace_reg (dest
, FIRST_STACK_REG
);
2299 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2301 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2304 replace_reg (src1
, FIRST_STACK_REG
);
2318 /* Substitute hard regnums for any stack regs in INSN, which has
2319 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2320 before the insn, and is updated with changes made here. CONSTRAINTS is
2321 an array of the constraint strings used in the asm statement.
2323 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2324 parallel array of where the operands were found. The output operands
2325 all precede the input operands.
2327 There are several requirements and assumptions about the use of
2328 stack-like regs in asm statements. These rules are enforced by
2329 record_asm_stack_regs; see comments there for details. Any
2330 asm_operands left in the RTL at this point may be assume to meet the
2331 requirements, since record_asm_stack_regs removes any problem asm. */
2334 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2335 n_inputs
, n_outputs
)
2338 rtx
*operands
, **operands_loc
;
2340 int n_inputs
, n_outputs
;
2342 int n_operands
= n_inputs
+ n_outputs
;
2343 int first_input
= n_outputs
;
2344 rtx body
= PATTERN (insn
);
2346 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2347 enum reg_class
*operand_class
2348 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2350 rtx
*note_reg
; /* Array of note contents */
2351 rtx
**note_loc
; /* Address of REG field of each note */
2352 enum reg_note
*note_kind
; /* The type of each note */
2357 struct stack_def temp_stack
;
2363 /* Find out what the constraints required. If no constraint
2364 alternative matches, that is a compiler bug: we should have caught
2365 such an insn during the life analysis pass (and reload should have
2366 caught it regardless). */
2368 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2369 operand_matches
, operand_class
);
2373 /* Strip SUBREGs here to make the following code simpler. */
2374 for (i
= 0; i
< n_operands
; i
++)
2375 if (GET_CODE (operands
[i
]) == SUBREG
2376 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2378 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2379 operands
[i
] = SUBREG_REG (operands
[i
]);
2382 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2384 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2387 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2388 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2389 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2392 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2394 rtx reg
= XEXP (note
, 0);
2395 rtx
*loc
= & XEXP (note
, 0);
2397 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2399 loc
= & SUBREG_REG (reg
);
2400 reg
= SUBREG_REG (reg
);
2403 if (STACK_REG_P (reg
)
2404 && (REG_NOTE_KIND (note
) == REG_DEAD
2405 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2407 note_reg
[n_notes
] = reg
;
2408 note_loc
[n_notes
] = loc
;
2409 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2414 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2418 if (GET_CODE (body
) == PARALLEL
)
2420 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2421 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2423 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2424 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2426 rtx clobber
= XVECEXP (body
, 0, i
);
2427 rtx reg
= XEXP (clobber
, 0);
2428 rtx
*loc
= & XEXP (clobber
, 0);
2430 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2432 loc
= & SUBREG_REG (reg
);
2433 reg
= SUBREG_REG (reg
);
2436 if (STACK_REG_P (reg
))
2438 clobber_reg
[n_clobbers
] = reg
;
2439 clobber_loc
[n_clobbers
] = loc
;
2445 bcopy ((char *) regstack
, (char *) &temp_stack
, sizeof (temp_stack
));
2447 /* Put the input regs into the desired place in TEMP_STACK. */
2449 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2450 if (STACK_REG_P (operands
[i
])
2451 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2452 && operand_class
[i
] != FLOAT_REGS
)
2454 /* If an operand needs to be in a particular reg in
2455 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2456 these constraints are for single register classes, and reload
2457 guaranteed that operand[i] is already in that class, we can
2458 just use REGNO (operands[i]) to know which actual reg this
2459 operand needs to be in. */
2461 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2466 if (regno
!= REGNO (operands
[i
]))
2468 /* operands[i] is not in the right place. Find it
2469 and swap it with whatever is already in I's place.
2470 K is where operands[i] is now. J is where it should
2474 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2476 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2478 temp
= temp_stack
.reg
[k
];
2479 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2480 temp_stack
.reg
[j
] = temp
;
2484 /* emit insns before INSN to make sure the reg-stack is in the right
2487 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2489 /* Make the needed input register substitutions. Do death notes and
2490 clobbers too, because these are for inputs, not outputs. */
2492 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2493 if (STACK_REG_P (operands
[i
]))
2495 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2500 replace_reg (operands_loc
[i
], regnum
);
2503 for (i
= 0; i
< n_notes
; i
++)
2504 if (note_kind
[i
] == REG_DEAD
)
2506 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2511 replace_reg (note_loc
[i
], regnum
);
2514 for (i
= 0; i
< n_clobbers
; i
++)
2516 /* It's OK for a CLOBBER to reference a reg that is not live.
2517 Don't try to replace it in that case. */
2518 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2522 /* Sigh - clobbers always have QImode. But replace_reg knows
2523 that these regs can't be MODE_INT and will abort. Just put
2524 the right reg there without calling replace_reg. */
2526 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
2530 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2532 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2533 if (STACK_REG_P (operands
[i
]))
2535 /* An input reg is implicitly popped if it is tied to an
2536 output, or if there is a CLOBBER for it. */
2539 for (j
= 0; j
< n_clobbers
; j
++)
2540 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2543 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2545 /* operands[i] might not be at the top of stack. But that's OK,
2546 because all we need to do is pop the right number of regs
2547 off of the top of the reg-stack. record_asm_stack_regs
2548 guaranteed that all implicitly popped regs were grouped
2549 at the top of the reg-stack. */
2551 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2552 regstack
->reg
[regstack
->top
]);
2557 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2558 Note that there isn't any need to substitute register numbers.
2559 ??? Explain why this is true. */
2561 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2563 /* See if there is an output for this hard reg. */
2566 for (j
= 0; j
< n_outputs
; j
++)
2567 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2569 regstack
->reg
[++regstack
->top
] = i
;
2570 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2575 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2576 input that the asm didn't implicitly pop. If the asm didn't
2577 implicitly pop an input reg, that reg will still be live.
2579 Note that we can't use find_regno_note here: the register numbers
2580 in the death notes have already been substituted. */
2582 for (i
= 0; i
< n_outputs
; i
++)
2583 if (STACK_REG_P (operands
[i
]))
2587 for (j
= 0; j
< n_notes
; j
++)
2588 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2589 && note_kind
[j
] == REG_UNUSED
)
2591 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2597 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2598 if (STACK_REG_P (operands
[i
]))
2602 for (j
= 0; j
< n_notes
; j
++)
2603 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2604 && note_kind
[j
] == REG_DEAD
2605 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2607 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2614 /* Substitute stack hard reg numbers for stack virtual registers in
2615 INSN. Non-stack register numbers are not changed. REGSTACK is the
2616 current stack content. Insns may be emitted as needed to arrange the
2617 stack for the 387 based on the contents of the insn. */
2620 subst_stack_regs (insn
, regstack
)
2624 register rtx
*note_link
, note
;
2628 if (GET_CODE (insn
) == CALL_INSN
)
2630 int top
= regstack
->top
;
2632 /* If there are any floating point parameters to be passed in
2633 registers for this call, make sure they are in the right
2638 straighten_stack (PREV_INSN (insn
), regstack
);
2640 /* Now mark the arguments as dead after the call. */
2642 while (regstack
->top
>= 0)
2644 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2650 /* Do the actual substitution if any stack regs are mentioned.
2651 Since we only record whether entire insn mentions stack regs, and
2652 subst_stack_regs_pat only works for patterns that contain stack regs,
2653 we must check each pattern in a parallel here. A call_value_pop could
2656 if (GET_MODE (insn
) == QImode
)
2658 n_operands
= asm_noperands (PATTERN (insn
));
2659 if (n_operands
>= 0)
2661 /* This insn is an `asm' with operands. Decode the operands,
2662 decide how many are inputs, and do register substitution.
2663 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2665 rtx operands
[MAX_RECOG_OPERANDS
];
2666 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2667 rtx body
= PATTERN (insn
);
2668 int n_inputs
, n_outputs
;
2670 = (char **) alloca (n_operands
* sizeof (char *));
2672 decode_asm_operands (body
, operands
, operands_loc
,
2673 constraints
, NULL_PTR
);
2674 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2675 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2676 constraints
, n_inputs
, n_outputs
);
2680 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2681 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2683 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2684 subst_stack_regs_pat (insn
, regstack
,
2685 XVECEXP (PATTERN (insn
), 0, i
));
2688 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2691 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2692 REG_UNUSED will already have been dealt with, so just return. */
2694 if (GET_CODE (insn
) == NOTE
)
2697 /* If there is a REG_UNUSED note on a stack register on this insn,
2698 the indicated reg must be popped. The REG_UNUSED note is removed,
2699 since the form of the newly emitted pop insn references the reg,
2700 making it no longer `unset'. */
2702 note_link
= ®_NOTES(insn
);
2703 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2704 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2706 *note_link
= XEXP (note
, 1);
2707 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2710 note_link
= &XEXP (note
, 1);
2713 /* Change the organization of the stack so that it fits a new basic
2714 block. Some registers might have to be popped, but there can never be
2715 a register live in the new block that is not now live.
2717 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2718 or emit_insn_after. OLD is the original stack layout, and NEW is
2719 the desired form. OLD is updated to reflect the code emitted, ie, it
2720 will be the same as NEW upon return.
2722 This function will not preserve block_end[]. But that information
2723 is no longer needed once this has executed. */
2726 change_stack (insn
, old
, new, when
)
2734 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2735 If we are to insert after INSN, find the next insn, and insert before
2738 if (when
== emit_insn_after
)
2739 insn
= NEXT_INSN (insn
);
2741 /* Pop any registers that are not needed in the new block. */
2743 for (reg
= old
->top
; reg
>= 0; reg
--)
2744 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2745 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[reg
], DFmode
),
2750 /* If the new block has never been processed, then it can inherit
2751 the old stack order. */
2753 new->top
= old
->top
;
2754 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2758 /* This block has been entered before, and we must match the
2759 previously selected stack order. */
2761 /* By now, the only difference should be the order of the stack,
2762 not their depth or liveliness. */
2764 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2770 if (old
->top
!= new->top
)
2773 /* Loop here emitting swaps until the stack is correct. The
2774 worst case number of swaps emitted is N + 2, where N is the
2775 depth of the stack. In some cases, the reg at the top of
2776 stack may be correct, but swapped anyway in order to fix
2777 other regs. But since we never swap any other reg away from
2778 its correct slot, this algorithm will converge. */
2782 /* Swap the reg at top of stack into the position it is
2783 supposed to be in, until the correct top of stack appears. */
2785 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2787 for (reg
= new->top
; reg
>= 0; reg
--)
2788 if (new->reg
[reg
] == old
->reg
[old
->top
])
2794 emit_swap_insn (insn
, old
,
2795 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2798 /* See if any regs remain incorrect. If so, bring an
2799 incorrect reg to the top of stack, and let the while loop
2802 for (reg
= new->top
; reg
>= 0; reg
--)
2803 if (new->reg
[reg
] != old
->reg
[reg
])
2805 emit_swap_insn (insn
, old
,
2806 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2811 /* At this point there must be no differences. */
2813 for (reg
= old
->top
; reg
>= 0; reg
--)
2814 if (old
->reg
[reg
] != new->reg
[reg
])
2819 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2820 found, ensure that a jump from INSN to the code_label to which the
2821 label_ref points ends up with the same stack as that at the
2822 code_label. Do this by inserting insns just before the code_label to
2823 pop and rotate the stack until it is in the correct order. REGSTACK
2824 is the order of the register stack in INSN.
2826 Any code that is emitted here must not be later processed as part
2827 of any block, as it will already contain hard register numbers. */
2830 goto_block_pat (insn
, regstack
, pat
)
2836 rtx new_jump
, new_label
, new_barrier
;
2839 struct stack_def temp_stack
;
2842 switch (GET_CODE (pat
))
2845 straighten_stack (PREV_INSN (insn
), regstack
);
2850 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2852 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2855 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2857 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2858 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2865 label
= XEXP (pat
, 0);
2866 if (GET_CODE (label
) != CODE_LABEL
)
2869 /* First, see if in fact anything needs to be done to the stack at all. */
2870 if (INSN_UID (label
) <= 0)
2873 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2875 if (label_stack
->top
== -2)
2877 /* If the target block hasn't had a stack order selected, then
2878 we need merely ensure that no pops are needed. */
2880 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2881 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2886 /* change_stack will not emit any code in this case. */
2888 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
2892 else if (label_stack
->top
== regstack
->top
)
2894 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
2895 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
2902 /* At least one insn will need to be inserted before label. Insert
2903 a jump around the code we are about to emit. Emit a label for the new
2904 code, and point the original insn at this new label. We can't use
2905 redirect_jump here, because we're using fld[4] of the code labels as
2906 LABEL_REF chains, no NUSES counters. */
2908 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
2909 record_label_references (new_jump
, PATTERN (new_jump
));
2910 JUMP_LABEL (new_jump
) = label
;
2912 new_barrier
= emit_barrier_after (new_jump
);
2914 new_label
= gen_label_rtx ();
2915 emit_label_after (new_label
, new_barrier
);
2916 LABEL_REFS (new_label
) = new_label
;
2918 /* The old label_ref will no longer point to the code_label if now uses,
2919 so strip the label_ref from the code_label's chain of references. */
2921 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
2928 *ref
= LABEL_NEXTREF (*ref
);
2930 XEXP (pat
, 0) = new_label
;
2931 record_label_references (insn
, PATTERN (insn
));
2933 if (JUMP_LABEL (insn
) == label
)
2934 JUMP_LABEL (insn
) = new_label
;
2936 /* Now emit the needed code. */
2938 temp_stack
= *regstack
;
2940 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
2943 /* Traverse all basic blocks in a function, converting the register
2944 references in each insn from the "flat" register file that gcc uses, to
2945 the stack-like registers the 387 uses. */
2950 register int block
, reg
;
2951 register rtx insn
, next
;
2952 struct stack_def regstack
;
2954 for (block
= 0; block
< blocks
; block
++)
2956 if (block_stack_in
[block
].top
== -2)
2958 /* This block has not been previously encountered. Choose a
2959 default mapping for any stack regs live on entry */
2961 block_stack_in
[block
].top
= -1;
2963 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
2964 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
2965 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
2968 /* Process all insns in this block. Keep track of `next' here,
2969 so that we don't process any insns emitted while making
2970 substitutions in INSN. */
2972 next
= block_begin
[block
];
2973 regstack
= block_stack_in
[block
];
2977 next
= NEXT_INSN (insn
);
2979 /* Don't bother processing unless there is a stack reg
2980 mentioned or if it's a CALL_INSN (register passing of
2981 floating point values). */
2983 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
2984 subst_stack_regs (insn
, ®stack
);
2986 } while (insn
!= block_end
[block
]);
2988 /* Something failed if the stack life doesn't match. */
2990 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
2996 /* Adjust the stack of this block on exit to match the stack of
2997 the target block, or copy stack information into stack of
2998 jump target if the target block's stack order hasn't been set
3001 if (GET_CODE (insn
) == JUMP_INSN
)
3002 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
3004 /* Likewise handle the case where we fall into the next block. */
3006 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
3007 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
3011 /* If the last basic block is the end of a loop, and that loop has
3012 regs live at its start, then the last basic block will have regs live
3013 at its end that need to be popped before the function returns. */
3016 int value_reg_low
, value_reg_high
;
3017 value_reg_low
= value_reg_high
= -1;
3020 if (retvalue
= stack_result (current_function_decl
))
3022 value_reg_low
= REGNO (retvalue
);
3023 value_reg_high
= value_reg_low
+
3024 HARD_REGNO_NREGS (value_reg_low
, GET_MODE (retvalue
)) - 1;
3028 for (reg
= regstack
.top
; reg
>= 0; reg
--)
3029 if (regstack
.reg
[reg
] < value_reg_low
||
3030 regstack
.reg
[reg
] > value_reg_high
)
3031 insn
= emit_pop_insn (insn
, ®stack
,
3032 FP_MODE_REG (regstack
.reg
[reg
], DFmode
),
3035 straighten_stack (insn
, ®stack
);
3038 /* Check expression PAT, which is in INSN, for label references. if
3039 one is found, print the block number of destination to FILE. */
3042 print_blocks (file
, insn
, pat
)
3046 register RTX_CODE code
= GET_CODE (pat
);
3050 if (code
== LABEL_REF
)
3052 register rtx label
= XEXP (pat
, 0);
3054 if (GET_CODE (label
) != CODE_LABEL
)
3057 fprintf (file
, " %d", BLOCK_NUM (label
));
3062 fmt
= GET_RTX_FORMAT (code
);
3063 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3066 print_blocks (file
, insn
, XEXP (pat
, i
));
3070 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
3071 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
3076 /* Write information about stack registers and stack blocks into FILE.
3077 This is part of making a debugging dump. */
3079 dump_stack_info (file
)
3084 fprintf (file
, "\n%d stack blocks.\n", blocks
);
3085 for (block
= 0; block
< blocks
; block
++)
3087 register rtx head
, jump
, end
;
3090 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
3091 block
, INSN_UID (block_begin
[block
]),
3092 INSN_UID (block_end
[block
]));
3094 head
= block_begin
[block
];
3096 fprintf (file
, "Reached from blocks: ");
3097 if (GET_CODE (head
) == CODE_LABEL
)
3098 for (jump
= LABEL_REFS (head
);
3100 jump
= LABEL_NEXTREF (jump
))
3102 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
3103 fprintf (file
, " %d", from_block
);
3105 if (block_drops_in
[block
])
3106 fprintf (file
, " previous");
3108 fprintf (file
, "\nlive stack registers on block entry: ");
3109 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3111 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
3112 fprintf (file
, "%d ", regno
);
3115 fprintf (file
, "\nlive stack registers on block exit: ");
3116 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3118 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
3119 fprintf (file
, "%d ", regno
);
3122 end
= block_end
[block
];
3124 fprintf (file
, "\nJumps to blocks: ");
3125 if (GET_CODE (end
) == JUMP_INSN
)
3126 print_blocks (file
, end
, PATTERN (end
));
3128 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
3129 fprintf (file
, " next");
3130 else if (block
+ 1 == blocks
3131 || (GET_CODE (end
) == JUMP_INSN
3132 && GET_CODE (PATTERN (end
)) == RETURN
))
3133 fprintf (file
, " return");
3135 fprintf (file
, "\n");
3138 #endif /* STACK_REGS */