1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 Before life analysis, the mode of each insn is set based on whether
77 or not any stack registers are mentioned within that insn. VOIDmode
78 means that no regs are mentioned anyway, and QImode means that at
79 least one pattern within the insn mentions stack registers. This
80 information is valid until after reg_to_stack returns, and is used
85 There are several rules on the usage of stack-like regs in
86 asm_operands insns. These rules apply only to the operands that are
89 1. Given a set of input regs that die in an asm_operands, it is
90 necessary to know which are implicitly popped by the asm, and
91 which must be explicitly popped by gcc.
93 An input reg that is implicitly popped by the asm must be
94 explicitly clobbered, unless it is constrained to match an
97 2. For any input reg that is implicitly popped by an asm, it is
98 necessary to know how to adjust the stack to compensate for the pop.
99 If any non-popped input is closer to the top of the reg-stack than
100 the implicitly popped reg, it would not be possible to know what the
101 stack looked like - it's not clear how the rest of the stack "slides
104 All implicitly popped input regs must be closer to the top of
105 the reg-stack than any input that is not implicitly popped.
107 3. It is possible that if an input dies in an insn, reload might
108 use the input reg for an output reload. Consider this example:
110 asm ("foo" : "=t" (a) : "f" (b));
112 This asm says that input B is not popped by the asm, and that
113 the asm pushes a result onto the reg-stack, ie, the stack is one
114 deeper after the asm than it was before. But, it is possible that
115 reload will think that it can use the same reg for both the input and
116 the output, if input B dies in this insn.
118 If any input operand uses the "f" constraint, all output reg
119 constraints must use the "&" earlyclobber.
121 The asm above would be written as
123 asm ("foo" : "=&t" (a) : "f" (b));
125 4. Some operands need to be in particular places on the stack. All
126 output operands fall in this category - there is no other way to
127 know which regs the outputs appear in unless the user indicates
128 this in the constraints.
130 Output operands must specifically indicate which reg an output
131 appears in after an asm. "=f" is not allowed: the operand
132 constraints must select a class with a single reg.
134 5. Output operands may not be "inserted" between existing stack regs.
135 Since no 387 opcode uses a read/write operand, all output operands
136 are dead before the asm_operands, and are pushed by the asm_operands.
137 It makes no sense to push anywhere but the top of the reg-stack.
139 Output operands must start at the top of the reg-stack: output
140 operands may not "skip" a reg.
142 6. Some asm statements may need extra stack space for internal
143 calculations. This can be guaranteed by clobbering stack registers
144 unrelated to the inputs and outputs.
146 Here are a couple of reasonable asms to want to write. This asm
147 takes one input, which is internally popped, and produces two outputs.
149 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152 and replaces them with one output. The user must code the "st(1)"
153 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
172 /* True if the current function returns a real value. */
173 static int current_function_returns_real
;
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top
; /* index to top stack element */
187 HARD_REG_SET reg_set
; /* set of live registers */
188 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
191 /* highest instruction uid */
192 static int max_uid
= 0;
194 /* Number of basic blocks in the current function. */
197 /* Element N is first insn in basic block N.
198 This info lasts until we finish compiling the function. */
199 static rtx
*block_begin
;
201 /* Element N is last insn in basic block N.
202 This info lasts until we finish compiling the function. */
203 static rtx
*block_end
;
205 /* Element N is nonzero if control can drop into basic block N */
206 static char *block_drops_in
;
208 /* Element N says all about the stack at entry block N */
209 static stack block_stack_in
;
211 /* Element N says all about the stack life at the end of block N */
212 static HARD_REG_SET
*block_out_reg_set
;
214 /* This is where the BLOCK_NUM values are really stored. This is set
215 up by find_blocks and used there and in life_analysis. It can be used
216 later, but only to look up an insn that is the head or tail of some
217 block. life_analysis and the stack register conversion process can
218 add insns within a block. */
219 static short *block_number
;
221 /* This is the register file for all register after conversion */
222 static rtx FP_mode_reg
[FIRST_PSEUDO_REGISTER
][(int) MAX_MACHINE_MODE
];
224 /* Get the basic block number of an insn. See note at block_number
225 definition are validity of this information. */
227 #define BLOCK_NUM(INSN) \
228 (((INSN_UID (INSN) > max_uid) \
229 ? (short *)(abort() , 0) \
230 : block_number)[INSN_UID (INSN)])
232 extern rtx
gen_jump ();
233 extern rtx
gen_movdf ();
234 extern rtx
find_regno_note ();
235 extern rtx
emit_jump_insn_before ();
236 extern rtx
emit_label_after ();
238 /* Forward declarations */
240 static void find_blocks ();
241 static void stack_reg_life_analysis ();
242 static void change_stack ();
243 static void convert_regs ();
244 static void dump_stack_info ();
246 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
249 stack_regs_mentioned_p (pat
)
255 if (STACK_REG_P (pat
))
258 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
259 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
265 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
266 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
269 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
276 /* Convert register usage from "flat" register file usage to a "stack
277 register file. FIRST is the first insn in the function, FILE is the
280 First compute the beginning and end of each basic block. Do a
281 register life analysis on the stack registers, recording the result
282 for the head and tail of each basic block. The convert each insn one
283 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
284 any cross-jumping created when the converter inserts pop insns.*/
287 reg_to_stack (first
, file
)
293 int stack_reg_seen
= 0;
294 enum machine_mode mode
;
296 current_function_returns_real
297 = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl
))) == REAL_TYPE
;
299 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
300 mode
= GET_MODE_WIDER_MODE (mode
))
301 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
302 FP_mode_reg
[i
][(int) mode
] = gen_rtx (REG
, mode
, i
);
304 /* Count the basic blocks. Also find maximum insn uid. */
306 register RTX_CODE prev_code
= JUMP_INSN
;
307 register RTX_CODE code
;
311 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
313 /* Note that this loop must select the same block boundaries
314 as code in find_blocks. */
316 if (INSN_UID (insn
) > max_uid
)
317 max_uid
= INSN_UID (insn
);
319 code
= GET_CODE (insn
);
321 if (code
== CODE_LABEL
322 || (prev_code
!= INSN
323 && prev_code
!= CALL_INSN
324 && prev_code
!= CODE_LABEL
325 && (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)))
328 /* Remember whether or not this insn mentions an FP regs.
329 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
331 if ((GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
332 || GET_CODE (insn
) == JUMP_INSN
)
333 && stack_regs_mentioned_p (PATTERN (insn
)))
336 PUT_MODE (insn
, QImode
);
339 PUT_MODE (insn
, VOIDmode
);
346 /* If no stack register reference exists in this insn, there isn't
347 anything to convert. */
349 if (! stack_reg_seen
)
352 /* If there are stack registers, there must be at least one block. */
357 /* Allocate some tables that last till end of compiling this function
358 and some needed only in find_blocks and life_analysis. */
360 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
361 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
362 block_drops_in
= (char *) alloca (blocks
);
364 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
365 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
366 bzero (block_stack_in
, blocks
* sizeof (struct stack_def
));
367 bzero (block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
369 block_number
= (short *) alloca ((max_uid
+ 1) * sizeof (short));
372 stack_reg_life_analysis (first
);
374 /* Dump the life analysis debug information before jump
375 optimization, as that will destroy the LABEL_REFS we keep the
379 dump_stack_info (file
);
384 jump_optimize (first
, 2, 0, 0);
387 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
388 label's chain of references, and note which insn contains each
392 record_label_references (insn
, pat
)
395 register enum rtx_code code
= GET_CODE (pat
);
399 if (code
== LABEL_REF
)
401 register rtx label
= XEXP (pat
, 0);
404 if (GET_CODE (label
) != CODE_LABEL
)
407 /* Don't make a duplicate in the code_label's chain. */
409 for (ref
= LABEL_REFS (label
); ref
!= label
; ref
= LABEL_NEXTREF (ref
))
410 if (CONTAINING_INSN (ref
) == insn
)
413 CONTAINING_INSN (pat
) = insn
;
414 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
415 LABEL_REFS (label
) = pat
;
420 fmt
= GET_RTX_FORMAT (code
);
421 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
424 record_label_references (insn
, XEXP (pat
, i
));
428 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
429 record_label_references (insn
, XVECEXP (pat
, i
, j
));
434 /* Return a pointer to the REG expression within PAT. If PAT is not a
435 REG, possible enclosed by a conversion rtx, return the inner part of
436 PAT that stopped the search. */
442 while (GET_CODE (*pat
) == SUBREG
443 || GET_CODE (*pat
) == FLOAT
444 || GET_CODE (*pat
) == FIX
445 || GET_CODE (*pat
) == FLOAT_EXTEND
446 || GET_CODE (*pat
) == FLOAT_TRUNCATE
)
447 pat
= & XEXP (*pat
, 0);
452 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
453 N_OPERANDS is the total number of operands. Return which alternative
454 matched, or -1 is no alternative matches.
456 OPERAND_MATCHES is an array which indicates which operand this
457 operand matches due to the constraints, or -1 if no match is required.
458 If two operands match by coincidence, but are not required to match by
459 the constraints, -1 is returned.
461 OPERAND_CLASS is an array which indicates the smallest class
462 required by the constraints. If the alternative that matches calls
463 for some class `class', and the operand matches a subclass of `class',
464 OPERAND_CLASS is set to `class' as required by the constraints, not to
465 the subclass. If an alternative allows more than one class,
466 OPERAND_CLASS is set to the smallest class that is a union of the
470 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
471 operand_matches
, operand_class
)
474 char **operand_constraints
;
475 int *operand_matches
;
476 enum reg_class
*operand_class
;
478 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
480 int this_alternative
, this_operand
;
484 for (j
= 0; j
< n_operands
; j
++)
485 constraints
[j
] = operand_constraints
[j
];
487 /* Compute the number of alternatives in the operands. reload has
488 already guaranteed that all operands have the same number of
492 for (q
= constraints
[0]; *q
; q
++)
493 n_alternatives
+= (*q
== ',');
495 this_alternative
= 0;
496 while (this_alternative
< n_alternatives
)
501 /* No operands match, no narrow class requirements yet. */
502 for (i
= 0; i
< n_operands
; i
++)
504 operand_matches
[i
] = -1;
505 operand_class
[i
] = NO_REGS
;
508 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
510 rtx op
= operands
[this_operand
];
511 enum machine_mode mode
= GET_MODE (op
);
512 char *p
= constraints
[this_operand
];
517 if (GET_CODE (op
) == SUBREG
)
519 if (GET_CODE (SUBREG_REG (op
)) == REG
520 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
521 offset
= SUBREG_WORD (op
);
522 op
= SUBREG_REG (op
);
525 /* An empty constraint or empty alternative
526 allows anything which matched the pattern. */
527 if (*p
== 0 || *p
== ',')
530 while (*p
&& (c
= *p
++) != ',')
544 /* Ignore rest of this alternative. */
545 while (*p
&& *p
!= ',') p
++;
554 /* This operand must be the same as a previous one.
555 This kind of constraint is used for instructions such
556 as add when they take only two operands.
558 Note that the lower-numbered operand is passed first. */
560 if (operands_match_p (operands
[c
- '0'],
561 operands
[this_operand
]))
563 operand_matches
[this_operand
] = c
- '0';
569 /* p is used for address_operands. Since this is an asm,
570 just to make sure that the operand is valid for Pmode. */
572 if (strict_memory_address_p (Pmode
, op
))
577 /* Anything goes unless it is a REG and really has a hard reg
578 but the hard reg is not in the class GENERAL_REGS. */
579 if (GENERAL_REGS
== ALL_REGS
580 || GET_CODE (op
) != REG
581 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
583 if (GET_CODE (op
) == REG
)
584 operand_class
[this_operand
]
585 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
591 if (GET_CODE (op
) == REG
592 && (GENERAL_REGS
== ALL_REGS
593 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
595 operand_class
[this_operand
]
596 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
602 /* This is used for a MATCH_SCRATCH in the cases when we
603 don't actually need anything. So anything goes any time. */
608 if (GET_CODE (op
) == MEM
)
613 if (GET_CODE (op
) == MEM
614 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
615 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
620 if (GET_CODE (op
) == MEM
621 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
622 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
627 /* Match any CONST_DOUBLE, but only if
628 we can examine the bits of it reliably. */
629 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
630 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
631 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
633 if (GET_CODE (op
) == CONST_DOUBLE
)
638 if (GET_CODE (op
) == CONST_DOUBLE
)
644 if (GET_CODE (op
) == CONST_DOUBLE
645 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
650 if (GET_CODE (op
) == CONST_INT
651 || (GET_CODE (op
) == CONST_DOUBLE
652 && GET_MODE (op
) == VOIDmode
))
661 if (GET_CODE (op
) == CONST_INT
662 || (GET_CODE (op
) == CONST_DOUBLE
663 && GET_MODE (op
) == VOIDmode
))
675 if (GET_CODE (op
) == CONST_INT
676 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
680 #ifdef EXTRA_CONSTRAINT
686 if (EXTRA_CONSTRAINT (op
, c
))
692 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
697 if (offsettable_memref_p (op
))
702 if (GET_CODE (op
) == REG
703 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
706 operand_class
[this_operand
]
707 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
712 constraints
[this_operand
] = p
;
713 /* If this operand did not win somehow,
714 this alternative loses. */
718 /* This alternative won; the operands are ok.
719 Change whichever operands this alternative says to change. */
726 /* For operands constrained to match another operand, copy the other
727 operand's class to this operand's class. */
728 for (j
= 0; j
< n_operands
; j
++)
729 if (operand_matches
[j
] >= 0)
730 operand_class
[j
] = operand_class
[operand_matches
[j
]];
732 return this_alternative
== n_alternatives
? -1 : this_alternative
;
735 /* Record the life info of each stack reg in INSN, updating REGSTACK.
736 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
737 is an array of the constraint strings used in the asm statement.
738 OPERANDS is an array of all operands for the insn, and is assumed to
739 contain all output operands, then all inputs operands.
741 There are many rules that an asm statement for stack-like regs must
742 follow. Those rules are explained at the top of this file: the rule
743 numbers below refer to that explanation. */
746 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
752 int n_inputs
, n_outputs
;
755 int n_operands
= n_inputs
+ n_outputs
;
756 int first_input
= n_outputs
;
758 int malformed_asm
= 0;
759 rtx body
= PATTERN (insn
);
761 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
763 enum reg_class
*operand_class
764 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
766 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
767 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
771 /* Find out what the constraints require. If no constraint
772 alternative matches, that is a compiler bug: we should have caught
773 such an insn during reload. */
774 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
775 operand_matches
, operand_class
);
779 /* Strip SUBREGs here to make the following code simpler. */
780 for (i
= 0; i
< n_operands
; i
++)
781 if (GET_CODE (operands
[i
]) == SUBREG
782 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
783 operands
[i
] = SUBREG_REG (operands
[i
]);
785 /* Set up CLOBBER_REG. */
789 if (GET_CODE (body
) == PARALLEL
)
791 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
793 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
794 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
796 rtx clobber
= XVECEXP (body
, 0, i
);
797 rtx reg
= XEXP (clobber
, 0);
799 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
800 reg
= SUBREG_REG (reg
);
802 if (STACK_REG_P (reg
))
804 clobber_reg
[n_clobbers
] = reg
;
810 /* Enforce rule #4: Output operands must specifically indicate which
811 reg an output appears in after an asm. "=f" is not allowed: the
812 operand constraints must select a class with a single reg.
814 Also enforce rule #5: Output operands must start at the top of
815 the reg-stack: output operands may not "skip" a reg. */
817 bzero (reg_used_as_output
, sizeof (reg_used_as_output
));
818 for (i
= 0; i
< n_outputs
; i
++)
819 if (STACK_REG_P (operands
[i
]))
820 if (reg_class_size
[(int) operand_class
[i
]] != 1)
823 (insn
, "Output constraint %d must specify a single register", i
);
827 reg_used_as_output
[REGNO (operands
[i
])] = 1;
830 /* Search for first non-popped reg. */
831 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
832 if (! reg_used_as_output
[i
])
835 /* If there are any other popped regs, that's an error. */
836 for (; i
< LAST_STACK_REG
+ 1; i
++)
837 if (reg_used_as_output
[i
])
840 if (i
!= LAST_STACK_REG
+ 1)
842 error_for_asm (insn
, "Output regs must be grouped at top of stack");
846 /* Enforce rule #2: All implicitly popped input regs must be closer
847 to the top of the reg-stack than any input that is not implicitly
850 bzero (implicitly_dies
, sizeof (implicitly_dies
));
851 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
852 if (STACK_REG_P (operands
[i
]))
854 /* An input reg is implicitly popped if it is tied to an
855 output, or if there is a CLOBBER for it. */
858 for (j
= 0; j
< n_clobbers
; j
++)
859 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
862 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
863 implicitly_dies
[REGNO (operands
[i
])] = 1;
866 /* Search for first non-popped reg. */
867 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
868 if (! implicitly_dies
[i
])
871 /* If there are any other popped regs, that's an error. */
872 for (; i
< LAST_STACK_REG
+ 1; i
++)
873 if (implicitly_dies
[i
])
876 if (i
!= LAST_STACK_REG
+ 1)
879 "Implicitly popped regs must be grouped at top of stack");
883 /* Enfore rule #3: If any input operand uses the "f" constraint, all
884 output constraints must use the "&" earlyclobber.
886 ??? Detect this more deterministically by having constraint_asm_operands
887 record any earlyclobber. */
889 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
890 if (operand_matches
[i
] == -1)
894 for (j
= 0; j
< n_outputs
; j
++)
895 if (operands_match_p (operands
[j
], operands
[i
]))
898 "Output operand %d must use `&' constraint", j
);
905 /* Avoid further trouble with this insn. */
906 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
907 PUT_MODE (insn
, VOIDmode
);
911 /* Process all outputs */
912 for (i
= 0; i
< n_outputs
; i
++)
914 rtx op
= operands
[i
];
916 if (! STACK_REG_P (op
))
917 if (stack_regs_mentioned_p (op
))
922 /* Each destination is dead before this insn. If the
923 destination is not used after this insn, record this with
926 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
927 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
, op
,
930 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
933 /* Process all inputs */
934 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
936 if (! STACK_REG_P (operands
[i
]))
937 if (stack_regs_mentioned_p (operands
[i
]))
942 /* If an input is dead after the insn, record a death note.
943 But don't record a death note if there is already a death note,
944 or if the input is also an output. */
946 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
947 && operand_matches
[i
] == -1
948 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])) == NULL_RTX
)
949 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, operands
[i
],
952 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
956 /* Scan PAT, which is part of INSN, and record registers appearing in
957 a SET_DEST in DEST, and other registers in SRC.
959 This function does not know about SET_DESTs that are both input and
960 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
963 record_reg_life_pat (pat
, src
, dest
)
965 HARD_REG_SET
*src
, *dest
;
970 if (STACK_REG_P (pat
))
973 SET_HARD_REG_BIT (*src
, REGNO (pat
));
976 SET_HARD_REG_BIT (*dest
, REGNO (pat
));
981 if (GET_CODE (pat
) == SET
)
983 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
);
984 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
);
988 /* We don't need to consider either of these cases. */
989 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
992 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
993 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
999 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1000 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
);
1002 else if (fmt
[i
] == 'e')
1003 record_reg_life_pat (XEXP (pat
, i
), src
, dest
);
1007 /* Calculate the number of inputs and outputs in BODY, an
1008 asm_operands. N_OPERANDS is the total number of operands, and
1009 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1013 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1016 int *n_inputs
, *n_outputs
;
1018 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1019 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1021 else if (GET_CODE (body
) == ASM_OPERANDS
)
1022 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1024 else if (GET_CODE (body
) == PARALLEL
1025 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1026 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1028 else if (GET_CODE (body
) == PARALLEL
1029 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1030 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1034 *n_outputs
= n_operands
- *n_inputs
;
1037 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1038 registers in REGSTACK. This function is called to process insns from
1039 the last insn in a block to the first. The actual scanning is done in
1040 record_reg_life_pat.
1042 If a register is live after a CALL_INSN, but is not a value return
1043 register for that CALL_INSN, then code is emitted to initialize that
1044 register. The block_end[] data is kept accurate.
1046 Existing death and unset notes for stack registers are deleted
1047 before processing the insn. */
1050 record_reg_life (insn
, block
, regstack
)
1055 rtx note
, *note_link
;
1058 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1059 || INSN_DELETED_P (insn
))
1062 /* Strip death notes for stack regs from this insn */
1064 note_link
= ®_NOTES(insn
);
1065 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1066 if (STACK_REG_P (XEXP (note
, 0))
1067 && (REG_NOTE_KIND (note
) == REG_DEAD
1068 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1069 *note_link
= XEXP (note
, 1);
1071 note_link
= &XEXP (note
, 1);
1073 /* Process all patterns in the insn. */
1075 n_operands
= asm_noperands (PATTERN (insn
));
1076 if (n_operands
>= 0)
1078 /* This insn is an `asm' with operands. Decode the operands,
1079 decide how many are inputs, and record the life information. */
1081 rtx operands
[MAX_RECOG_OPERANDS
];
1082 rtx body
= PATTERN (insn
);
1083 int n_inputs
, n_outputs
;
1084 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1086 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1087 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1088 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1089 n_inputs
, n_outputs
);
1093 /* An insn referencing a stack reg has a mode of QImode. */
1094 if (GET_MODE (insn
) == QImode
)
1096 HARD_REG_SET src
, dest
;
1099 CLEAR_HARD_REG_SET (src
);
1100 CLEAR_HARD_REG_SET (dest
);
1101 record_reg_life_pat (PATTERN (insn
), &src
, &dest
);
1103 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1104 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1106 if (TEST_HARD_REG_BIT (src
, regno
)
1107 && ! TEST_HARD_REG_BIT (dest
, regno
))
1108 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1109 FP_mode_reg
[regno
][(int) DFmode
],
1111 else if (TEST_HARD_REG_BIT (dest
, regno
))
1112 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
,
1113 FP_mode_reg
[regno
][(int) DFmode
],
1117 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1118 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1121 /* There might be a reg that is live after a function call.
1122 Initialize it to zero so that the program does not crash. See comment
1123 towards the end of stack_reg_life_analysis(). */
1125 if (GET_CODE (insn
) == CALL_INSN
)
1127 int reg
= FIRST_FLOAT_REG
;
1129 /* If a stack reg is mentioned in a CALL_INSN, it must be as the
1132 if (stack_regs_mentioned_p (PATTERN (insn
)))
1135 for (; reg
<= LAST_STACK_REG
; reg
++)
1136 if (TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1140 /* The insn will use virtual register numbers, and so
1141 convert_regs is expected to process these. But BLOCK_NUM
1142 cannot be used on these insns, because they do not appear in
1145 pat
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1146 CONST0_RTX (DFmode
));
1147 init
= emit_insn_after (pat
, insn
);
1148 PUT_MODE (init
, QImode
);
1150 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1152 /* If the CALL_INSN was the end of a block, move the
1153 block_end to point to the new insn. */
1155 if (block_end
[block
] == insn
)
1156 block_end
[block
] = init
;
1159 /* Some regs do not survive a CALL */
1161 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1165 /* Find all basic blocks of the function, which starts with FIRST.
1166 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1174 register RTX_CODE prev_code
= BARRIER
;
1175 register RTX_CODE code
;
1177 /* Record where all the blocks start and end.
1178 Record which basic blocks control can drop in to. */
1181 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1183 /* Note that this loop must select the same block boundaries
1184 as code in reg_to_stack. */
1186 code
= GET_CODE (insn
);
1188 if (code
== CODE_LABEL
1189 || (prev_code
!= INSN
1190 && prev_code
!= CALL_INSN
1191 && prev_code
!= CODE_LABEL
1192 && (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)))
1194 block_begin
[++block
] = insn
;
1195 block_end
[block
] = insn
;
1196 block_drops_in
[block
] = prev_code
!= BARRIER
;
1198 else if (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)
1199 block_end
[block
] = insn
;
1201 BLOCK_NUM (insn
) = block
;
1203 if (code
== CODE_LABEL
)
1204 LABEL_REFS (insn
) = insn
; /* delete old chain */
1210 if (block
+ 1 != blocks
)
1213 /* generate all label references to the corresponding jump insn */
1214 for (block
= 0; block
< blocks
; block
++)
1216 insn
= block_end
[block
];
1218 if (GET_CODE (insn
) == JUMP_INSN
)
1219 record_label_references (insn
, PATTERN (insn
));
1223 /* Determine the which registers are live at the start of each basic
1224 block of the function whose first insn is FIRST.
1226 First, if the function returns a real_type, mark the function
1227 return type as live at each return point, as the RTL may not give any
1228 hint that the register is live.
1230 Then, start with the last block and work back to the first block.
1231 Similarly, work backwards within each block, insn by insn, recording
1232 which regs are die and which are used (and therefore live) in the
1233 hard reg set of block_stack_in[].
1235 After processing each basic block, if there is a label at the start
1236 of the block, propagate the live registers to all jumps to this block.
1238 As a special case, if there are regs live in this block, that are
1239 not live in a block containing a jump to this label, and the block
1240 containing the jump has already been processed, we must propagate this
1241 block's entry register life back to the block containing the jump, and
1242 restart life analysis from there.
1244 In the worst case, this function may traverse the insns
1245 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1246 of the insns may not know that a reg is live at a target that is early
1247 in the insns. So we back up and start over with the new reg live.
1249 If there are registers that are live at the start of the function,
1250 insns are emitted to initialize these registers. Something similar is
1251 done after CALL_INSNs in record_reg_life. */
1254 stack_reg_life_analysis (first
)
1258 struct stack_def regstack
;
1260 if (current_function_returns_real
1261 && STACK_REG_P (DECL_RTL (DECL_RESULT (current_function_decl
))))
1263 /* Find all RETURN insns and mark them. */
1265 int value_regno
= REGNO (DECL_RTL (DECL_RESULT (current_function_decl
)));
1267 for (block
= blocks
- 1; block
>= 0; block
--)
1268 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1269 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1270 SET_HARD_REG_BIT (block_out_reg_set
[block
], value_regno
);
1272 /* Mark of the end of last block if we "fall off" the end of the
1273 function into the epilogue. */
1275 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1276 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1277 SET_HARD_REG_BIT (block_out_reg_set
[blocks
-1], value_regno
);
1280 /* now scan all blocks backward for stack register use */
1285 register rtx insn
, prev
;
1287 /* current register status at last instruction */
1289 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1291 prev
= block_end
[block
];
1295 prev
= PREV_INSN (insn
);
1297 /* If the insn is a CALL_INSN, we need to ensure that
1298 everything dies. But otherwise don't process unless there
1299 are some stack regs present. */
1301 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1302 record_reg_life (insn
, block
, ®stack
);
1304 } while (insn
!= block_begin
[block
]);
1306 /* Set the state at the start of the block. Mark that no
1307 register mapping information known yet. */
1309 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1310 block_stack_in
[block
].top
= -2;
1312 /* If there is a label, propagate our register life to all jumps
1315 if (GET_CODE (insn
) == CODE_LABEL
)
1318 int must_restart
= 0;
1320 for (label
= LABEL_REFS (insn
); label
!= insn
;
1321 label
= LABEL_NEXTREF (label
))
1323 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1325 if (jump_block
< block
)
1326 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1327 block_stack_in
[block
].reg_set
);
1330 /* The block containing the jump has already been
1331 processed. If there are registers that were not known
1332 to be live then, but are live now, we must back up
1333 and restart life analysis from that point with the new
1334 life information. */
1336 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1337 block_out_reg_set
[jump_block
],
1340 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1341 block_stack_in
[block
].reg_set
);
1354 if (block_drops_in
[block
])
1355 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1356 block_stack_in
[block
].reg_set
);
1362 /* If any reg is live at the start of the first block of a
1363 function, then we must guarantee that the reg holds some value by
1364 generating our own "load" of that register. Otherwise a 387 would
1365 fault trying to access an empty register. */
1367 HARD_REG_SET empty_regs
;
1368 CLEAR_HARD_REG_SET (empty_regs
);
1369 GO_IF_HARD_REG_SUBSET (block_stack_in
[0].reg_set
, empty_regs
,
1373 /* Load zero into each live register. The fact that a register
1374 appears live at the function start does not necessarily imply an error
1375 in the user program: it merely means that we could not determine that
1376 there wasn't such an error, just as -Wunused sometimes gives
1377 "incorrect" warnings. In those cases, these initializations will do
1380 Note that we are inserting virtual register references here:
1381 these insns must be processed by convert_regs later. Also, these
1382 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1384 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1385 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
))
1389 init_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1390 CONST0_RTX (DFmode
));
1391 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1392 PUT_MODE (block_begin
[0], QImode
);
1394 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1401 /*****************************************************************************
1402 This section deals with stack register substitution, and forms the second
1404 *****************************************************************************/
1406 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1407 the desired hard REGNO. */
1410 replace_reg (reg
, regno
)
1414 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1415 || ! STACK_REG_P (*reg
))
1418 if (GET_MODE_CLASS (GET_MODE (*reg
)) != MODE_FLOAT
)
1421 *reg
= FP_mode_reg
[regno
][(int) GET_MODE (*reg
)];
1424 /* Remove a note of type NOTE, which must be found, for register
1425 number REGNO from INSN. Remove only one such note. */
1428 remove_regno_note (insn
, note
, regno
)
1433 register rtx
*note_link
, this;
1435 note_link
= ®_NOTES(insn
);
1436 for (this = *note_link
; this; this = XEXP (this, 1))
1437 if (REG_NOTE_KIND (this) == note
1438 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1440 *note_link
= XEXP (this, 1);
1444 note_link
= &XEXP (this, 1);
1449 /* Find the hard register number of virtual register REG in REGSTACK.
1450 The hard register number is relative to the top of the stack. -1 is
1451 returned if the register is not found. */
1454 get_hard_regnum (regstack
, reg
)
1460 if (! STACK_REG_P (reg
))
1463 for (i
= regstack
->top
; i
>= 0; i
--)
1464 if (regstack
->reg
[i
] == REGNO (reg
))
1467 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1470 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1471 the chain of insns. Doing so could confuse block_begin and block_end
1472 if this were the only insn in the block. */
1475 delete_insn_for_stacker (insn
)
1478 PUT_CODE (insn
, NOTE
);
1479 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1480 NOTE_SOURCE_FILE (insn
) = 0;
1481 INSN_DELETED_P (insn
) = 1;
1484 /* Emit an insn to pop virtual register REG before or after INSN.
1485 REGSTACK is the stack state after INSN and is updated to reflect this
1486 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1487 is represented as a SET whose destination is the register to be popped
1488 and source is the top of stack. A death note for the top of stack
1489 cases the movdf pattern to pop. */
1492 emit_pop_insn (insn
, regstack
, reg
, when
)
1498 rtx pop_insn
, pop_rtx
;
1501 hard_regno
= get_hard_regnum (regstack
, reg
);
1503 if (hard_regno
< FIRST_STACK_REG
)
1506 pop_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[hard_regno
][(int) DFmode
],
1507 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1509 pop_insn
= (*when
) (pop_rtx
, insn
);
1510 /* ??? This used to be VOIDmode, but that seems wrong. */
1511 PUT_MODE (pop_insn
, QImode
);
1513 REG_NOTES (pop_insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1514 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
],
1515 REG_NOTES (pop_insn
));
1517 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1518 = regstack
->reg
[regstack
->top
];
1520 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1525 /* Emit an insn before or after INSN to swap virtual register REG with the
1526 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1527 REGSTACK is the stack state before the swap, and is updated to reflect
1528 the swap. A swap insn is represented as a PARALLEL of two patterns:
1529 each pattern moves one reg to the other.
1531 If REG is already at the top of the stack, no insn is emitted. */
1534 emit_swap_insn (insn
, regstack
, reg
)
1541 rtx swap_rtx
, swap_insn
;
1542 int tmp
, other_reg
; /* swap regno temps */
1543 rtx i1
; /* the stack-reg insn prior to INSN */
1544 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
1546 hard_regno
= get_hard_regnum (regstack
, reg
);
1548 if (hard_regno
< FIRST_STACK_REG
)
1550 if (hard_regno
== FIRST_STACK_REG
)
1553 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1555 tmp
= regstack
->reg
[other_reg
];
1556 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
1557 regstack
->reg
[regstack
->top
] = tmp
;
1559 /* Find the previous insn involving stack regs, but don't go past
1560 any labels, calls or jumps. */
1561 i1
= prev_nonnote_insn (insn
);
1562 while (i1
&& GET_CODE (i1
) == INSN
&& GET_MODE (i1
) != QImode
)
1563 i1
= prev_nonnote_insn (i1
);
1566 i1set
= single_set (i1
);
1570 rtx i2
; /* the stack-reg insn prior to I1 */
1571 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
1572 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
1574 /* If the previous register stack push was from the reg we are to
1575 swap with, omit the swap. */
1577 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1578 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1579 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1582 /* If the previous insn wrote to the reg we are to swap with,
1585 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1586 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1587 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1591 swap_rtx
= gen_swapdf (FP_mode_reg
[hard_regno
][(int) DFmode
],
1592 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1593 swap_insn
= emit_insn_after (swap_rtx
, i1
);
1594 /* ??? This used to be VOIDmode, but that seems wrong. */
1595 PUT_MODE (swap_insn
, QImode
);
1598 /* Handle a move to or from a stack register in PAT, which is in INSN.
1599 REGSTACK is the current stack. */
1602 move_for_stack_reg (insn
, regstack
, pat
)
1607 rtx
*src
= get_true_reg (&SET_SRC (pat
));
1608 rtx
*dest
= get_true_reg (&SET_DEST (pat
));
1611 if (STACK_REG_P (*src
) && STACK_REG_P (*dest
))
1613 /* Write from one stack reg to another. If SRC dies here, then
1614 just change the register mapping and delete the insn. */
1616 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1621 /* If this is a no-op move, there must not be a REG_DEAD note. */
1622 if (REGNO (*src
) == REGNO (*dest
))
1625 for (i
= regstack
->top
; i
>= 0; i
--)
1626 if (regstack
->reg
[i
] == REGNO (*src
))
1629 /* The source must be live, and the dest must be dead. */
1630 if (i
< 0 || get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1633 /* It is possible that the dest is unused after this insn.
1634 If so, just pop the src. */
1636 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1638 emit_pop_insn (insn
, regstack
, *src
, emit_insn_after
);
1640 delete_insn_for_stacker (insn
);
1644 regstack
->reg
[i
] = REGNO (*dest
);
1646 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1647 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1649 delete_insn_for_stacker (insn
);
1654 /* The source reg does not die. */
1656 /* If this appears to be a no-op move, delete it, or else it
1657 will confuse the machine description output patterns. But if
1658 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1659 for REG_UNUSED will not work for deleted insns. */
1661 if (REGNO (*src
) == REGNO (*dest
))
1663 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1664 emit_pop_insn (insn
, regstack
, *dest
, emit_insn_after
);
1666 delete_insn_for_stacker (insn
);
1670 /* The destination ought to be dead */
1671 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1674 replace_reg (src
, get_hard_regnum (regstack
, *src
));
1676 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1677 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1678 replace_reg (dest
, FIRST_STACK_REG
);
1680 else if (STACK_REG_P (*src
))
1682 /* Save from a stack reg to MEM, or possibly integer reg. Since
1683 only top of stack may be saved, emit an exchange first if
1686 emit_swap_insn (insn
, regstack
, *src
);
1688 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1691 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1693 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1696 replace_reg (src
, FIRST_STACK_REG
);
1698 else if (STACK_REG_P (*dest
))
1700 /* Load from MEM, or possibly integer REG or constant, into the
1701 stack regs. The actual target is always the top of the
1702 stack. The stack mapping is changed to reflect that DEST is
1703 now at top of stack. */
1705 /* The destination ought to be dead */
1706 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1709 if (regstack
->top
>= REG_STACK_SIZE
)
1712 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1713 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1714 replace_reg (dest
, FIRST_STACK_REG
);
1721 swap_rtx_condition (pat
)
1727 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1729 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1733 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1734 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1740 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1741 swap_rtx_condition (XVECEXP (pat
, i
, j
));
1743 else if (fmt
[i
] == 'e')
1744 swap_rtx_condition (XEXP (pat
, i
));
1748 /* Handle a comparison. Special care needs to be taken to avoid
1749 causing comparisons that a 387 cannot do correctly, such as EQ.
1751 Also, a pop insn may need to be emitted. The 387 does have an
1752 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1753 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1757 compare_for_stack_reg (insn
, regstack
, pat
)
1763 rtx src1_note
, src2_note
;
1765 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1766 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1768 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1769 registers that die in this insn - move those to stack top first. */
1770 if (! STACK_REG_P (*src1
)
1771 || (STACK_REG_P (*src2
)
1772 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1776 temp
= XEXP (SET_SRC (pat
), 0);
1777 XEXP (SET_SRC (pat
), 0) = XEXP (SET_SRC (pat
), 1);
1778 XEXP (SET_SRC (pat
), 1) = temp
;
1780 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1781 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1783 next
= next_cc0_user (insn
);
1784 if (next
== NULL_RTX
)
1787 swap_rtx_condition (PATTERN (next
));
1788 INSN_CODE (next
) = -1;
1791 /* We will fix any death note later. */
1793 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1795 if (STACK_REG_P (*src2
))
1796 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1798 src2_note
= NULL_RTX
;
1800 emit_swap_insn (insn
, regstack
, *src1
);
1802 replace_reg (src1
, FIRST_STACK_REG
);
1804 if (STACK_REG_P (*src2
))
1805 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1809 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src1_note
, 0)));
1810 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1814 /* If the second operand dies, handle that. But if the operands are
1815 the same stack register, don't bother, because only one death is
1816 needed, and it was just handled. */
1819 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1820 && REGNO (*src1
) == REGNO (*src2
)))
1822 /* As a special case, two regs may die in this insn if src2 is
1823 next to top of stack and the top of stack also dies. Since
1824 we have already popped src1, "next to top of stack" is really
1825 at top (FIRST_STACK_REG) now. */
1827 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1830 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src2_note
, 0)));
1831 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1836 /* The 386 can only represent death of the first operand in
1837 the case handled above. In all other cases, emit a separate
1838 pop and remove the death note from here. */
1840 link_cc0_insns (insn
);
1842 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1844 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1850 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1851 is the current register layout. */
1854 subst_stack_regs_pat (insn
, regstack
, pat
)
1860 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
1861 rtx src1_note
, src2_note
;
1863 if (GET_CODE (pat
) != SET
)
1866 dest
= get_true_reg (&SET_DEST (pat
));
1867 src
= get_true_reg (&SET_SRC (pat
));
1869 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1871 if (*dest
!= cc0_rtx
1872 && (STACK_REG_P (*src
)
1873 || (STACK_REG_P (*dest
)
1874 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
1875 || GET_CODE (*src
) == CONST_DOUBLE
))))
1876 move_for_stack_reg (insn
, regstack
, pat
);
1878 switch (GET_CODE (SET_SRC (pat
)))
1881 compare_for_stack_reg (insn
, regstack
, pat
);
1885 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1886 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1887 replace_reg (dest
, FIRST_STACK_REG
);
1891 /* This is a `tstM2' case. */
1892 if (*dest
!= cc0_rtx
)
1902 /* These insns only operate on the top of the stack. DEST might
1903 be cc0_rtx if we're processing a tstM pattern. Also, it's
1904 possible that the tstM case results in a REG_DEAD note on the
1908 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1910 emit_swap_insn (insn
, regstack
, *src1
);
1912 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1914 if (STACK_REG_P (*dest
))
1915 replace_reg (dest
, FIRST_STACK_REG
);
1919 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1921 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1924 replace_reg (src1
, FIRST_STACK_REG
);
1930 /* On i386, reversed forms of subM3 and divM3 exist for
1931 MODE_FLOAT, so the same code that works for addM3 and mulM3
1935 /* These insns can accept the top of stack as a destination
1936 from a stack reg or mem, or can use the top of stack as a
1937 source and some other stack register (possibly top of stack)
1938 as a destination. */
1940 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1941 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1943 /* We will fix any death note later. */
1945 if (STACK_REG_P (*src1
))
1946 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1948 src1_note
= NULL_RTX
;
1949 if (STACK_REG_P (*src2
))
1950 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1952 src2_note
= NULL_RTX
;
1954 /* If either operand is not a stack register, then the dest
1955 must be top of stack. */
1957 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1958 emit_swap_insn (insn
, regstack
, *dest
);
1961 /* Both operands are REG. If neither operand is already
1962 at the top of stack, choose to make the one that is the dest
1963 the new top of stack. */
1965 int src1_hard_regnum
, src2_hard_regnum
;
1967 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1968 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1969 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
1972 if (src1_hard_regnum
!= FIRST_STACK_REG
1973 && src2_hard_regnum
!= FIRST_STACK_REG
)
1974 emit_swap_insn (insn
, regstack
, *dest
);
1977 if (STACK_REG_P (*src1
))
1978 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1979 if (STACK_REG_P (*src2
))
1980 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1984 /* If the register that dies is at the top of stack, then
1985 the destination is somewhere else - merely substitute it.
1986 But if the reg that dies is not at top of stack, then
1987 move the top of stack to the dead reg, as though we had
1988 done the insn and then a store-with-pop. */
1990 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
1992 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1993 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1997 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
1999 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2000 replace_reg (dest
, regno
);
2002 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2003 = regstack
->reg
[regstack
->top
];
2006 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2007 REGNO (XEXP (src1_note
, 0)));
2008 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2013 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
2015 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2016 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2020 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
2022 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2023 replace_reg (dest
, regno
);
2025 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2026 = regstack
->reg
[regstack
->top
];
2029 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2030 REGNO (XEXP (src2_note
, 0)));
2031 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
2036 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2037 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2043 switch (XINT (SET_SRC (pat
), 1))
2047 /* These insns only operate on the top of the stack. */
2049 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
2051 emit_swap_insn (insn
, regstack
, *src1
);
2053 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2055 if (STACK_REG_P (*dest
))
2056 replace_reg (dest
, FIRST_STACK_REG
);
2060 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2062 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2065 replace_reg (src1
, FIRST_STACK_REG
);
2079 /* Substitute hard regnums for any stack regs in INSN, which has
2080 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2081 before the insn, and is updated with changes made here. CONSTRAINTS is
2082 an array of the constraint strings used in the asm statement.
2084 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2085 parallel array of where the operands were found. The output operands
2086 all precede the input operands.
2088 There are several requirements and assumptions about the use of
2089 stack-like regs in asm statements. These rules are enforced by
2090 record_asm_stack_regs; see comments there for details. Any
2091 asm_operands left in the RTL at this point may be assume to meet the
2092 requirements, since record_asm_stack_regs removes any problem asm. */
2095 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2096 n_inputs
, n_outputs
)
2099 rtx
*operands
, **operands_loc
;
2101 int n_inputs
, n_outputs
;
2103 int n_operands
= n_inputs
+ n_outputs
;
2104 int first_input
= n_outputs
;
2105 rtx body
= PATTERN (insn
);
2107 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2108 enum reg_class
*operand_class
2109 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2111 rtx
*note_reg
; /* Array of note contents */
2112 rtx
**note_loc
; /* Address of REG field of each note */
2113 enum reg_note
*note_kind
; /* The type of each note */
2118 struct stack_def temp_stack
;
2124 /* Find out what the constraints required. If no constraint
2125 alternative matches, that is a compiler bug: we should have caught
2126 such an insn during the life analysis pass (and reload should have
2127 caught it regardless). */
2129 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2130 operand_matches
, operand_class
);
2134 /* Strip SUBREGs here to make the following code simpler. */
2135 for (i
= 0; i
< n_operands
; i
++)
2136 if (GET_CODE (operands
[i
]) == SUBREG
2137 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2139 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2140 operands
[i
] = SUBREG_REG (operands
[i
]);
2143 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2145 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2148 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2149 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2150 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2153 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2155 rtx reg
= XEXP (note
, 0);
2156 rtx
*loc
= & XEXP (note
, 0);
2158 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2160 loc
= & SUBREG_REG (reg
);
2161 reg
= SUBREG_REG (reg
);
2164 if (STACK_REG_P (reg
)
2165 && (REG_NOTE_KIND (note
) == REG_DEAD
2166 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2168 note_reg
[n_notes
] = reg
;
2169 note_loc
[n_notes
] = loc
;
2170 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2175 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2179 if (GET_CODE (body
) == PARALLEL
)
2181 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2182 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2184 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2185 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2187 rtx clobber
= XVECEXP (body
, 0, i
);
2188 rtx reg
= XEXP (clobber
, 0);
2189 rtx
*loc
= & XEXP (clobber
, 0);
2191 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2193 loc
= & SUBREG_REG (reg
);
2194 reg
= SUBREG_REG (reg
);
2197 if (STACK_REG_P (reg
))
2199 clobber_reg
[n_clobbers
] = reg
;
2200 clobber_loc
[n_clobbers
] = loc
;
2206 bcopy (regstack
, &temp_stack
, sizeof (temp_stack
));
2208 /* Put the input regs into the desired place in TEMP_STACK. */
2210 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2211 if (STACK_REG_P (operands
[i
])
2212 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2213 && operand_class
[i
] != FLOAT_REGS
)
2215 /* If an operand needs to be in a particular reg in
2216 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2217 these constraints are for single register classes, and reload
2218 guaranteed that operand[i] is already in that class, we can
2219 just use REGNO (operands[i]) to know which actual reg this
2220 operand needs to be in. */
2222 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2227 if (regno
!= REGNO (operands
[i
]))
2229 /* operands[i] is not in the right place. Find it
2230 and swap it with whatever is already in I's place.
2231 K is where operands[i] is now. J is where it should
2235 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2237 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2239 temp
= temp_stack
.reg
[k
];
2240 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2241 temp_stack
.reg
[j
] = temp
;
2245 /* emit insns before INSN to make sure the reg-stack is in the right
2248 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2250 /* Make the needed input register substitutions. Do death notes and
2251 clobbers too, because these are for inputs, not outputs. */
2253 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2254 if (STACK_REG_P (operands
[i
]))
2256 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2261 replace_reg (operands_loc
[i
], regnum
);
2264 for (i
= 0; i
< n_notes
; i
++)
2265 if (note_kind
[i
] == REG_DEAD
)
2267 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2272 replace_reg (note_loc
[i
], regnum
);
2275 for (i
= 0; i
< n_clobbers
; i
++)
2277 /* It's OK for a CLOBBER to reference a reg that is not live.
2278 Don't try to replace it in that case. */
2279 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2283 /* Sigh - clobbers always have QImode. But replace_reg knows
2284 that these regs can't be MODE_INT and will abort. Just put
2285 the right reg there without calling replace_reg. */
2287 *clobber_loc
[i
] = FP_mode_reg
[regnum
][(int) DFmode
];
2291 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2293 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2294 if (STACK_REG_P (operands
[i
]))
2296 /* An input reg is implicitly popped if it is tied to an
2297 output, or if there is a CLOBBER for it. */
2300 for (j
= 0; j
< n_clobbers
; j
++)
2301 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2304 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2306 /* operands[i] might not be at the top of stack. But that's OK,
2307 because all we need to do is pop the right number of regs
2308 off of the top of the reg-stack. record_asm_stack_regs
2309 guaranteed that all implicitly popped regs were grouped
2310 at the top of the reg-stack. */
2312 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2313 regstack
->reg
[regstack
->top
]);
2318 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2319 Note that there isn't any need to substitute register numbers.
2320 ??? Explain why this is true. */
2322 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2324 /* See if there is an output for this hard reg. */
2327 for (j
= 0; j
< n_outputs
; j
++)
2328 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2330 regstack
->reg
[++regstack
->top
] = i
;
2331 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2336 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2337 input that the asm didn't implicitly pop. If the asm didn't
2338 implicitly pop an input reg, that reg will still be live.
2340 Note that we can't use find_regno_note here: the register numbers
2341 in the death notes have already been substituted. */
2343 for (i
= 0; i
< n_outputs
; i
++)
2344 if (STACK_REG_P (operands
[i
]))
2348 for (j
= 0; j
< n_notes
; j
++)
2349 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2350 && note_kind
[j
] == REG_UNUSED
)
2352 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2358 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2359 if (STACK_REG_P (operands
[i
]))
2363 for (j
= 0; j
< n_notes
; j
++)
2364 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2365 && note_kind
[j
] == REG_DEAD
2366 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2368 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2375 /* Substitute stack hard reg numbers for stack virtual registers in
2376 INSN. Non-stack register numbers are not changed. REGSTACK is the
2377 current stack content. Insns may be emitted as needed to arrange the
2378 stack for the 387 based on the contents of the insn. */
2381 subst_stack_regs (insn
, regstack
)
2385 register rtx
*note_link
, note
;
2389 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
2390 || INSN_DELETED_P (insn
))
2393 /* The stack should be empty at a call. */
2395 if (GET_CODE (insn
) == CALL_INSN
)
2396 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
2397 if (TEST_HARD_REG_BIT (regstack
->reg_set
, i
))
2400 /* Do the actual substitution if any stack regs are mentioned.
2401 Since we only record whether entire insn mentions stack regs, and
2402 subst_stack_regs_pat only works for patterns that contain stack regs,
2403 we must check each pattern in a parallel here. A call_value_pop could
2406 if (GET_MODE (insn
) == QImode
)
2408 n_operands
= asm_noperands (PATTERN (insn
));
2409 if (n_operands
>= 0)
2411 /* This insn is an `asm' with operands. Decode the operands,
2412 decide how many are inputs, and do register substitution.
2413 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2415 rtx operands
[MAX_RECOG_OPERANDS
];
2416 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2417 rtx body
= PATTERN (insn
);
2418 int n_inputs
, n_outputs
;
2420 = (char **) alloca (n_operands
* sizeof (char *));
2422 decode_asm_operands (body
, operands
, operands_loc
,
2423 constraints
, NULL_PTR
);
2424 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2425 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2426 constraints
, n_inputs
, n_outputs
);
2430 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2431 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2433 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2434 subst_stack_regs_pat (insn
, regstack
,
2435 XVECEXP (PATTERN (insn
), 0, i
));
2438 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2441 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2442 REG_UNUSED will already have been dealt with, so just return. */
2444 if (INSN_DELETED_P (insn
))
2447 /* If there is a REG_UNUSED note on a stack register on this insn,
2448 the indicated reg must be popped. The REG_UNUSED note is removed,
2449 since the form of the newly emitted pop insn references the reg,
2450 making it no longer `unset'. */
2452 note_link
= ®_NOTES(insn
);
2453 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2454 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2456 *note_link
= XEXP (note
, 1);
2457 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2460 note_link
= &XEXP (note
, 1);
2463 /* Change the organization of the stack so that it fits a new basic
2464 block. Some registers might have to be popped, but there can never be
2465 a register live in the new block that is not now live.
2467 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2468 or emit_insn_after. OLD is the original stack layout, and NEW is
2469 the desired form. OLD is updated to reflect the code emitted, ie, it
2470 will be the same as NEW upon return.
2472 This function will not preserve block_end[]. But that information
2473 is no longer needed once this has executed. */
2476 change_stack (insn
, old
, new, when
)
2484 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2485 If we are to insert after INSN, find the next insn, and insert before
2488 if (when
== emit_insn_after
)
2489 insn
= NEXT_INSN (insn
);
2491 /* Pop any registers that are not needed in the new block. */
2493 for (reg
= old
->top
; reg
>= 0; reg
--)
2494 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2495 emit_pop_insn (insn
, old
, FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
],
2500 /* If the new block has never been processed, then it can inherit
2501 the old stack order. */
2503 new->top
= old
->top
;
2504 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2508 /* This block has been entered before, and we must match the
2509 previously selected stack order. */
2511 /* By now, the only difference should be the order of the stack,
2512 not their depth or liveliness. */
2514 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2520 if (old
->top
!= new->top
)
2523 /* Loop here emitting swaps until the stack is correct. The
2524 worst case number of swaps emitted is N + 2, where N is the
2525 depth of the stack. In some cases, the reg at the top of
2526 stack may be correct, but swapped anyway in order to fix
2527 other regs. But since we never swap any other reg away from
2528 its correct slot, this algorithm will converge. */
2532 /* Swap the reg at top of stack into the position it is
2533 supposed to be in, until the correct top of stack appears. */
2535 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2537 for (reg
= new->top
; reg
>= 0; reg
--)
2538 if (new->reg
[reg
] == old
->reg
[old
->top
])
2544 emit_swap_insn (insn
, old
,
2545 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
]);
2548 /* See if any regs remain incorrect. If so, bring an
2549 incorrect reg to the top of stack, and let the while loop
2552 for (reg
= new->top
; reg
>= 0; reg
--)
2553 if (new->reg
[reg
] != old
->reg
[reg
])
2555 emit_swap_insn (insn
, old
,
2556 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
]);
2561 /* At this point there must be no differences. */
2563 for (reg
= old
->top
; reg
>= 0; reg
--)
2564 if (old
->reg
[reg
] != new->reg
[reg
])
2569 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2570 found, ensure that a jump from INSN to the code_label to which the
2571 label_ref points ends up with the same stack as that at the
2572 code_label. Do this by inserting insns just before the code_label to
2573 pop and rotate the stack until it is in the correct order. REGSTACK
2574 is the order of the register stack in INSN.
2576 Any code that is emitted here must not be later processed as part
2577 of any block, as it will already contain hard register numbers. */
2580 goto_block_pat (insn
, regstack
, pat
)
2586 rtx new_jump
, new_label
, new_barrier
;
2589 struct stack_def temp_stack
;
2592 if (GET_CODE (pat
) != LABEL_REF
)
2595 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2597 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2600 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2602 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2603 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2608 label
= XEXP (pat
, 0);
2609 if (GET_CODE (label
) != CODE_LABEL
)
2612 /* First, see if in fact anything needs to be done to the stack at all. */
2614 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2616 if (label_stack
->top
== -2)
2618 /* If the target block hasn't had a stack order selected, then
2619 we need merely ensure that no pops are needed. */
2621 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2622 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2627 /* change_stack will not emit any code in this case. */
2629 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
2633 else if (label_stack
->top
== regstack
->top
)
2635 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
2636 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
2643 /* At least one insn will need to be inserted before label. Insert
2644 a jump around the code we are about to emit. Emit a label for the new
2645 code, and point the original insn at this new label. We can't use
2646 redirect_jump here, because we're using fld[4] of the code labels as
2647 LABEL_REF chains, no NUSES counters. */
2649 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
2650 record_label_references (new_jump
, PATTERN (new_jump
));
2651 JUMP_LABEL (new_jump
) = label
;
2653 new_barrier
= emit_barrier_after (new_jump
);
2655 new_label
= gen_label_rtx ();
2656 emit_label_after (new_label
, new_barrier
);
2657 LABEL_REFS (new_label
) = new_label
;
2659 /* The old label_ref will no longer point to the code_label if now uses,
2660 so strip the label_ref from the code_label's chain of references. */
2662 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
2669 *ref
= LABEL_NEXTREF (*ref
);
2671 XEXP (pat
, 0) = new_label
;
2672 record_label_references (insn
, PATTERN (insn
));
2674 if (JUMP_LABEL (insn
) == label
)
2675 JUMP_LABEL (insn
) = new_label
;
2677 /* Now emit the needed code. */
2679 temp_stack
= *regstack
;
2681 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
2684 /* Traverse all basic blocks in a function, converting the register
2685 references in each insn from the "flat" register file that gcc uses, to
2686 the stack-like registers the 387 uses. */
2691 register int block
, reg
;
2692 register rtx insn
, next
;
2693 struct stack_def regstack
;
2695 for (block
= 0; block
< blocks
; block
++)
2697 if (block_stack_in
[block
].top
== -2)
2699 /* This block has not been previously encountered. Choose a
2700 default mapping for any stack regs live on entry */
2702 block_stack_in
[block
].top
= -1;
2704 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
2705 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
2706 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
2709 /* Process all insns in this block. Keep track of `next' here,
2710 so that we don't process any insns emitted while making
2711 substitutions in INSN. */
2713 next
= block_begin
[block
];
2714 regstack
= block_stack_in
[block
];
2718 next
= NEXT_INSN (insn
);
2720 /* Don't bother processing unless there is a stack reg
2723 ??? For now, process CALL_INSNs too to make sure that the
2724 stack regs are dead after a call. Remove this eventually. */
2726 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
2727 subst_stack_regs (insn
, ®stack
);
2729 } while (insn
!= block_end
[block
]);
2731 /* Something failed if the stack life doesn't match. */
2733 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
2739 /* Adjust the stack of this block on exit to match the stack of
2740 the target block, or copy stack information into stack of
2741 jump target if the target block's stack order hasn't been set
2744 if (GET_CODE (insn
) == JUMP_INSN
)
2745 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
2747 /* Likewise handle the case where we fall into the next block. */
2749 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
2750 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
2754 /* If the last basic block is the end of a loop, and that loop has
2755 regs live at its start, then the last basic block will have regs live
2756 at its end that need to be popped before the function returns. */
2758 for (reg
= regstack
.top
; reg
>= 0; reg
--)
2759 if (! current_function_returns_real
2760 || regstack
.reg
[reg
] != FIRST_STACK_REG
)
2761 insn
= emit_pop_insn (insn
, ®stack
,
2762 FP_mode_reg
[regstack
.reg
[reg
]][(int) DFmode
],
2766 /* Check expression PAT, which is in INSN, for label references. if
2767 one is found, print the block number of destination to FILE. */
2770 print_blocks (file
, insn
, pat
)
2774 register RTX_CODE code
= GET_CODE (pat
);
2778 if (code
== LABEL_REF
)
2780 register rtx label
= XEXP (pat
, 0);
2782 if (GET_CODE (label
) != CODE_LABEL
)
2785 fprintf (file
, " %d", BLOCK_NUM (label
));
2790 fmt
= GET_RTX_FORMAT (code
);
2791 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2794 print_blocks (file
, insn
, XEXP (pat
, i
));
2798 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2799 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
2804 /* Write information about stack registers and stack blocks into FILE.
2805 This is part of making a debugging dump. */
2807 dump_stack_info (file
)
2812 fprintf (file
, "\n%d stack blocks.\n", blocks
);
2813 for (block
= 0; block
< blocks
; block
++)
2815 register rtx head
, jump
, end
;
2818 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
2819 block
, INSN_UID (block_begin
[block
]),
2820 INSN_UID (block_end
[block
]));
2822 head
= block_begin
[block
];
2824 fprintf (file
, "Reached from blocks: ");
2825 if (GET_CODE (head
) == CODE_LABEL
)
2826 for (jump
= LABEL_REFS (head
);
2828 jump
= LABEL_NEXTREF (jump
))
2830 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
2831 fprintf (file
, " %d", from_block
);
2833 if (block_drops_in
[block
])
2834 fprintf (file
, " previous");
2836 fprintf (file
, "\nlive stack registers on block entry: ");
2837 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2839 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
2840 fprintf (file
, "%d ", regno
);
2843 fprintf (file
, "\nlive stack registers on block exit: ");
2844 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2846 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
2847 fprintf (file
, "%d ", regno
);
2850 end
= block_end
[block
];
2852 fprintf (file
, "\nJumps to blocks: ");
2853 if (GET_CODE (end
) == JUMP_INSN
)
2854 print_blocks (file
, end
, PATTERN (end
));
2856 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
2857 fprintf (file
, " next");
2858 else if (block
+ 1 == blocks
2859 || (GET_CODE (end
) == JUMP_INSN
2860 && GET_CODE (PATTERN (end
)) == RETURN
))
2861 fprintf (file
, " return");
2863 fprintf (file
, "\n");
2866 #endif /* STACK_REGS */