rtl.h (rtx_format): Constify a char*.
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
23
24 * The form of the input:
25
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
35
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
43
44 * The form of the output:
45
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
51
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
54
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
58
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
61
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
65
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
69 stack.
70
71 * Methodology:
72
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
76
77 * asm_operands:
78
79 There are several rules on the usage of stack-like regs in
80 asm_operands insns. These rules apply only to the operands that are
81 stack-like regs:
82
83 1. Given a set of input regs that die in an asm_operands, it is
84 necessary to know which are implicitly popped by the asm, and
85 which must be explicitly popped by gcc.
86
87 An input reg that is implicitly popped by the asm must be
88 explicitly clobbered, unless it is constrained to match an
89 output operand.
90
91 2. For any input reg that is implicitly popped by an asm, it is
92 necessary to know how to adjust the stack to compensate for the pop.
93 If any non-popped input is closer to the top of the reg-stack than
94 the implicitly popped reg, it would not be possible to know what the
95 stack looked like - it's not clear how the rest of the stack "slides
96 up".
97
98 All implicitly popped input regs must be closer to the top of
99 the reg-stack than any input that is not implicitly popped.
100
101 3. It is possible that if an input dies in an insn, reload might
102 use the input reg for an output reload. Consider this example:
103
104 asm ("foo" : "=t" (a) : "f" (b));
105
106 This asm says that input B is not popped by the asm, and that
107 the asm pushes a result onto the reg-stack, ie, the stack is one
108 deeper after the asm than it was before. But, it is possible that
109 reload will think that it can use the same reg for both the input and
110 the output, if input B dies in this insn.
111
112 If any input operand uses the "f" constraint, all output reg
113 constraints must use the "&" earlyclobber.
114
115 The asm above would be written as
116
117 asm ("foo" : "=&t" (a) : "f" (b));
118
119 4. Some operands need to be in particular places on the stack. All
120 output operands fall in this category - there is no other way to
121 know which regs the outputs appear in unless the user indicates
122 this in the constraints.
123
124 Output operands must specifically indicate which reg an output
125 appears in after an asm. "=f" is not allowed: the operand
126 constraints must select a class with a single reg.
127
128 5. Output operands may not be "inserted" between existing stack regs.
129 Since no 387 opcode uses a read/write operand, all output operands
130 are dead before the asm_operands, and are pushed by the asm_operands.
131 It makes no sense to push anywhere but the top of the reg-stack.
132
133 Output operands must start at the top of the reg-stack: output
134 operands may not "skip" a reg.
135
136 6. Some asm statements may need extra stack space for internal
137 calculations. This can be guaranteed by clobbering stack registers
138 unrelated to the inputs and outputs.
139
140 Here are a couple of reasonable asms to want to write. This asm
141 takes one input, which is internally popped, and produces two outputs.
142
143 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144
145 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
146 and replaces them with one output. The user must code the "st(1)"
147 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148
149 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
150
151 */
152 \f
153 #include "config.h"
154 #include "system.h"
155 #include "tree.h"
156 #include "rtl.h"
157 #include "function.h"
158 #include "insn-config.h"
159 #include "regs.h"
160 #include "hard-reg-set.h"
161 #include "flags.h"
162 #include "insn-flags.h"
163 #include "recog.h"
164 #include "toplev.h"
165 #include "varray.h"
166
167 #ifdef STACK_REGS
168
169 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
170
171 /* This is the basic stack record. TOP is an index into REG[] such
172 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
173
174 If TOP is -2, REG[] is not yet initialized. Stack initialization
175 consists of placing each live reg in array `reg' and setting `top'
176 appropriately.
177
178 REG_SET indicates which registers are live. */
179
180 typedef struct stack_def
181 {
182 int top; /* index to top stack element */
183 HARD_REG_SET reg_set; /* set of live registers */
184 char reg[REG_STACK_SIZE]; /* register - stack mapping */
185 } *stack;
186
187 /* highest instruction uid */
188 static int max_uid = 0;
189
190 /* Number of basic blocks in the current function. */
191 static int blocks;
192
193 /* Element N is first insn in basic block N.
194 This info lasts until we finish compiling the function. */
195 static rtx *block_begin;
196
197 /* Element N is last insn in basic block N.
198 This info lasts until we finish compiling the function. */
199 static rtx *block_end;
200
201 /* Element N is nonzero if control can drop into basic block N */
202 static char *block_drops_in;
203
204 /* Element N says all about the stack at entry block N */
205 static stack block_stack_in;
206
207 /* Element N says all about the stack life at the end of block N */
208 static HARD_REG_SET *block_out_reg_set;
209
210 /* This is where the BLOCK_NUM values are really stored. This is set
211 up by find_blocks and used there and in life_analysis. It can be used
212 later, but only to look up an insn that is the head or tail of some
213 block. life_analysis and the stack register conversion process can
214 add insns within a block. */
215 static int *block_number;
216
217 /* We use this array to cache info about insns, because otherwise we
218 spend too much time in stack_regs_mentioned_p.
219
220 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
221 the insn uses stack registers, two indicates the insn does not use
222 stack registers. */
223 static varray_type stack_regs_mentioned_data;
224
225 /* This is the register file for all register after conversion */
226 static rtx
227 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
228
229 #define FP_MODE_REG(regno,mode) \
230 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
231
232 /* Get the basic block number of an insn. See note at block_number
233 definition are validity of this information. */
234
235 static int BLOCK_NUM PROTO((rtx));
236
237 #ifdef __GNUC__
238 __inline__
239 #endif
240 static int
241 BLOCK_NUM(insn)
242 rtx insn;
243 {
244 int tmp = INSN_UID (insn);
245 if (tmp > max_uid)
246 abort ();
247 tmp = block_number[tmp];
248 if (tmp < 0)
249 abort ();
250 return tmp;
251 }
252
253 /* Forward declarations */
254
255 static void mark_regs_pat PROTO((rtx, HARD_REG_SET *));
256 static void straighten_stack PROTO((rtx, stack));
257 static void pop_stack PROTO((stack, int));
258 static void record_label_references PROTO((rtx, rtx));
259 static rtx *get_true_reg PROTO((rtx *));
260
261 static void record_asm_reg_life PROTO((rtx, stack));
262 static void record_reg_life_pat PROTO((rtx, HARD_REG_SET *,
263 HARD_REG_SET *, int));
264 static int get_asm_operand_n_inputs PROTO((rtx));
265 static void record_reg_life PROTO((rtx, int, stack));
266 static void find_blocks PROTO((rtx));
267 static rtx stack_result PROTO((tree));
268 static void stack_reg_life_analysis PROTO((rtx, HARD_REG_SET *));
269 static void replace_reg PROTO((rtx *, int));
270 static void remove_regno_note PROTO((rtx, enum reg_note, int));
271 static int get_hard_regnum PROTO((stack, rtx));
272 static void delete_insn_for_stacker PROTO((rtx));
273 static rtx emit_pop_insn PROTO((rtx, stack, rtx, rtx (*) ()));
274 static void emit_swap_insn PROTO((rtx, stack, rtx));
275 static void move_for_stack_reg PROTO((rtx, stack, rtx));
276 static void swap_rtx_condition PROTO((rtx));
277 static void compare_for_stack_reg PROTO((rtx, stack, rtx));
278 static void subst_stack_regs_pat PROTO((rtx, stack, rtx));
279 static void subst_asm_stack_regs PROTO((rtx, stack));
280 static void subst_stack_regs PROTO((rtx, stack));
281 static void change_stack PROTO((rtx, stack, stack, rtx (*) ()));
282
283 static void goto_block_pat PROTO((rtx, stack, rtx));
284 static void convert_regs PROTO((void));
285 static void print_blocks PROTO((FILE *, rtx, rtx));
286 static void dump_stack_info PROTO((FILE *));
287 static int check_stack_regs_mentioned PROTO((rtx insn));
288 \f
289 /* Initialize stack_regs_mentioned_data for INSN (growing the virtual array
290 if needed. Return nonzero if INSN mentions stacked registers. */
291
292 static int
293 check_stack_regs_mentioned (insn)
294 rtx insn;
295 {
296 unsigned int uid = INSN_UID (insn);
297 if (uid >= VARRAY_SIZE (stack_regs_mentioned_data))
298 /* Allocate some extra size to avoid too many reallocs, but
299 do not grow exponentially. */
300 VARRAY_GROW (stack_regs_mentioned_data, uid + uid / 20);
301 if (stack_regs_mentioned_p (PATTERN (insn)))
302 {
303 VARRAY_CHAR (stack_regs_mentioned_data, uid) = 1;
304 return 1;
305 }
306 else
307 VARRAY_CHAR (stack_regs_mentioned_data, uid) = 2;
308 return 0;
309 }
310
311 /* Return nonzero if INSN mentions stacked registers, else return
312 zero. */
313
314 int
315 stack_regs_mentioned (insn)
316 rtx insn;
317 {
318 unsigned int uid;
319 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
320 return 0;
321 uid = INSN_UID (insn);
322 if (uid >= VARRAY_SIZE (stack_regs_mentioned_data)
323 || ! VARRAY_CHAR (stack_regs_mentioned_data, uid))
324 return (check_stack_regs_mentioned (insn));
325 return VARRAY_CHAR (stack_regs_mentioned_data, uid) == 1;
326 }
327
328 \f
329 /* Mark all registers needed for this pattern. */
330
331 static void
332 mark_regs_pat (pat, set)
333 rtx pat;
334 HARD_REG_SET *set;
335 {
336 enum machine_mode mode;
337 register int regno;
338 register int count;
339
340 if (GET_CODE (pat) == SUBREG)
341 {
342 mode = GET_MODE (pat);
343 regno = SUBREG_WORD (pat);
344 regno += REGNO (SUBREG_REG (pat));
345 }
346 else
347 regno = REGNO (pat), mode = GET_MODE (pat);
348
349 for (count = HARD_REGNO_NREGS (regno, mode);
350 count; count--, regno++)
351 SET_HARD_REG_BIT (*set, regno);
352 }
353 \f
354 /* Reorganise the stack into ascending numbers,
355 after this insn. */
356
357 static void
358 straighten_stack (insn, regstack)
359 rtx insn;
360 stack regstack;
361 {
362 struct stack_def temp_stack;
363 int top;
364
365 /* If there is only a single register on the stack, then the stack is
366 already in increasing order and no reorganization is needed.
367
368 Similarly if the stack is empty. */
369 if (regstack->top <= 0)
370 return;
371
372 temp_stack.reg_set = regstack->reg_set;
373
374 for (top = temp_stack.top = regstack->top; top >= 0; top--)
375 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
376
377 change_stack (insn, regstack, &temp_stack, emit_insn_after);
378 }
379
380 /* Pop a register from the stack */
381
382 static void
383 pop_stack (regstack, regno)
384 stack regstack;
385 int regno;
386 {
387 int top = regstack->top;
388
389 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
390 regstack->top--;
391 /* If regno was not at the top of stack then adjust stack */
392 if (regstack->reg [top] != regno)
393 {
394 int i;
395 for (i = regstack->top; i >= 0; i--)
396 if (regstack->reg [i] == regno)
397 {
398 int j;
399 for (j = i; j < top; j++)
400 regstack->reg [j] = regstack->reg [j + 1];
401 break;
402 }
403 }
404 }
405 \f
406 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
407
408 int
409 stack_regs_mentioned_p (pat)
410 rtx pat;
411 {
412 register const char *fmt;
413 register int i;
414
415 if (STACK_REG_P (pat))
416 return 1;
417
418 fmt = GET_RTX_FORMAT (GET_CODE (pat));
419 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
420 {
421 if (fmt[i] == 'E')
422 {
423 register int j;
424
425 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
426 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
427 return 1;
428 }
429 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
430 return 1;
431 }
432
433 return 0;
434 }
435 \f
436 /* Convert register usage from "flat" register file usage to a "stack
437 register file. FIRST is the first insn in the function, FILE is the
438 dump file, if used.
439
440 First compute the beginning and end of each basic block. Do a
441 register life analysis on the stack registers, recording the result
442 for the head and tail of each basic block. The convert each insn one
443 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
444 any cross-jumping created when the converter inserts pop insns.*/
445
446 void
447 reg_to_stack (first, file)
448 rtx first;
449 FILE *file;
450 {
451 register rtx insn;
452 register int i;
453 int stack_reg_seen = 0;
454 enum machine_mode mode;
455 HARD_REG_SET stackentry;
456
457 max_uid = get_max_uid ();
458 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
459 "stack_regs_mentioned cache");
460
461 CLEAR_HARD_REG_SET (stackentry);
462
463 {
464 static int initialised;
465 if (!initialised)
466 {
467 #if 0
468 initialised = 1; /* This array can not have been previously
469 initialised, because the rtx's are
470 thrown away between compilations of
471 functions. */
472 #endif
473 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
474 {
475 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
476 mode = GET_MODE_WIDER_MODE (mode))
477 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
478 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT); mode != VOIDmode;
479 mode = GET_MODE_WIDER_MODE (mode))
480 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
481 }
482 }
483 }
484
485 /* Count the basic blocks. Also find maximum insn uid. */
486 {
487 register RTX_CODE prev_code = BARRIER;
488 register RTX_CODE code;
489 register int before_function_beg = 1;
490
491 max_uid = 0;
492 blocks = 0;
493 for (insn = first; insn; insn = NEXT_INSN (insn))
494 {
495 /* Note that this loop must select the same block boundaries
496 as code in find_blocks. Also note that this code is not the
497 same as that used in flow.c. */
498
499 if (INSN_UID (insn) > max_uid)
500 max_uid = INSN_UID (insn);
501
502 code = GET_CODE (insn);
503
504 if (code == CODE_LABEL
505 || (prev_code != INSN
506 && prev_code != CALL_INSN
507 && prev_code != CODE_LABEL
508 && GET_RTX_CLASS (code) == 'i'))
509 blocks++;
510
511 if (code == NOTE && NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_BEG)
512 before_function_beg = 0;
513
514 /* Remember whether or not this insn mentions an FP regs.
515 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
516
517 if (GET_RTX_CLASS (code) == 'i'
518 && stack_regs_mentioned_p (PATTERN (insn)))
519 {
520 stack_reg_seen = 1;
521 VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 1;
522
523 /* Note any register passing parameters. */
524
525 if (before_function_beg && code == INSN
526 && GET_CODE (PATTERN (insn)) == USE)
527 record_reg_life_pat (PATTERN (insn), (HARD_REG_SET *) 0,
528 &stackentry, 1);
529 }
530 else
531 VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
532
533 if (code == CODE_LABEL)
534 LABEL_REFS (insn) = insn; /* delete old chain */
535
536 if (code != NOTE)
537 prev_code = code;
538 }
539 }
540
541 /* If no stack register reference exists in this insn, there isn't
542 anything to convert. */
543
544 if (! stack_reg_seen)
545 {
546 VARRAY_FREE (stack_regs_mentioned_data);
547 return;
548 }
549
550 /* If there are stack registers, there must be at least one block. */
551
552 if (! blocks)
553 abort ();
554
555 /* Allocate some tables that last till end of compiling this function
556 and some needed only in find_blocks and life_analysis. */
557
558 block_begin = (rtx *) alloca (blocks * sizeof (rtx));
559 block_end = (rtx *) alloca (blocks * sizeof (rtx));
560 block_drops_in = (char *) alloca (blocks);
561
562 block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
563 block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
564 bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def));
565 bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET));
566
567 block_number = (int *) alloca ((max_uid + 1) * sizeof (int));
568 memset (block_number, -1, (max_uid + 1) * sizeof (int));
569
570 find_blocks (first);
571 stack_reg_life_analysis (first, &stackentry);
572
573 /* Dump the life analysis debug information before jump
574 optimization, as that will destroy the LABEL_REFS we keep the
575 information in. */
576
577 if (file)
578 dump_stack_info (file);
579
580 convert_regs ();
581
582 if (optimize)
583 jump_optimize (first, 2, 0, 0);
584
585 VARRAY_FREE (stack_regs_mentioned_data);
586 }
587 \f
588 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
589 label's chain of references, and note which insn contains each
590 reference. */
591
592 static void
593 record_label_references (insn, pat)
594 rtx insn, pat;
595 {
596 register enum rtx_code code = GET_CODE (pat);
597 register int i;
598 register const char *fmt;
599
600 if (code == LABEL_REF)
601 {
602 register rtx label = XEXP (pat, 0);
603 register rtx ref;
604
605 if (GET_CODE (label) != CODE_LABEL)
606 abort ();
607
608 /* If this is an undefined label, LABEL_REFS (label) contains
609 garbage. */
610 if (INSN_UID (label) == 0)
611 return;
612
613 /* Don't make a duplicate in the code_label's chain. */
614
615 for (ref = LABEL_REFS (label);
616 ref && ref != label;
617 ref = LABEL_NEXTREF (ref))
618 if (CONTAINING_INSN (ref) == insn)
619 return;
620
621 CONTAINING_INSN (pat) = insn;
622 LABEL_NEXTREF (pat) = LABEL_REFS (label);
623 LABEL_REFS (label) = pat;
624
625 return;
626 }
627
628 fmt = GET_RTX_FORMAT (code);
629 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
630 {
631 if (fmt[i] == 'e')
632 record_label_references (insn, XEXP (pat, i));
633 if (fmt[i] == 'E')
634 {
635 register int j;
636 for (j = 0; j < XVECLEN (pat, i); j++)
637 record_label_references (insn, XVECEXP (pat, i, j));
638 }
639 }
640 }
641 \f
642 /* Return a pointer to the REG expression within PAT. If PAT is not a
643 REG, possible enclosed by a conversion rtx, return the inner part of
644 PAT that stopped the search. */
645
646 static rtx *
647 get_true_reg (pat)
648 rtx *pat;
649 {
650 for (;;)
651 switch (GET_CODE (*pat))
652 {
653 case SUBREG:
654 /* eliminate FP subregister accesses in favour of the
655 actual FP register in use. */
656 {
657 rtx subreg;
658 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
659 {
660 *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
661 GET_MODE (subreg));
662 default:
663 return pat;
664 }
665 }
666 case FLOAT:
667 case FIX:
668 case FLOAT_EXTEND:
669 pat = & XEXP (*pat, 0);
670 }
671 }
672 \f
673 /* Record the life info of each stack reg in INSN, updating REGSTACK.
674 N_INPUTS is the number of inputs; N_OUTPUTS the outputs.
675 OPERANDS is an array of all operands for the insn, and is assumed to
676 contain all output operands, then all inputs operands.
677
678 There are many rules that an asm statement for stack-like regs must
679 follow. Those rules are explained at the top of this file: the rule
680 numbers below refer to that explanation. */
681
682 static void
683 record_asm_reg_life (insn, regstack)
684 rtx insn;
685 stack regstack;
686 {
687 int i;
688 int n_clobbers;
689 int malformed_asm = 0;
690 rtx body = PATTERN (insn);
691
692 int reg_used_as_output[FIRST_PSEUDO_REGISTER];
693 int implicitly_dies[FIRST_PSEUDO_REGISTER];
694 int alt;
695
696 rtx *clobber_reg;
697 int n_inputs, n_outputs;
698
699 /* Find out what the constraints require. If no constraint
700 alternative matches, this asm is malformed. */
701 extract_insn (insn);
702 constrain_operands (1);
703 alt = which_alternative;
704
705 preprocess_constraints ();
706
707 n_inputs = get_asm_operand_n_inputs (body);
708 n_outputs = recog_n_operands - n_inputs;
709
710 if (alt < 0)
711 {
712 malformed_asm = 1;
713 /* Avoid further trouble with this insn. */
714 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
715 VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
716 return;
717 }
718
719 /* Strip SUBREGs here to make the following code simpler. */
720 for (i = 0; i < recog_n_operands; i++)
721 if (GET_CODE (recog_operand[i]) == SUBREG
722 && GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
723 recog_operand[i] = SUBREG_REG (recog_operand[i]);
724
725 /* Set up CLOBBER_REG. */
726
727 n_clobbers = 0;
728
729 if (GET_CODE (body) == PARALLEL)
730 {
731 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
732
733 for (i = 0; i < XVECLEN (body, 0); i++)
734 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
735 {
736 rtx clobber = XVECEXP (body, 0, i);
737 rtx reg = XEXP (clobber, 0);
738
739 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
740 reg = SUBREG_REG (reg);
741
742 if (STACK_REG_P (reg))
743 {
744 clobber_reg[n_clobbers] = reg;
745 n_clobbers++;
746 }
747 }
748 }
749
750 /* Enforce rule #4: Output operands must specifically indicate which
751 reg an output appears in after an asm. "=f" is not allowed: the
752 operand constraints must select a class with a single reg.
753
754 Also enforce rule #5: Output operands must start at the top of
755 the reg-stack: output operands may not "skip" a reg. */
756
757 bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output));
758 for (i = 0; i < n_outputs; i++)
759 if (STACK_REG_P (recog_operand[i]))
760 {
761 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
762 {
763 error_for_asm (insn, "Output constraint %d must specify a single register", i);
764 malformed_asm = 1;
765 }
766 else
767 reg_used_as_output[REGNO (recog_operand[i])] = 1;
768 }
769
770
771 /* Search for first non-popped reg. */
772 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
773 if (! reg_used_as_output[i])
774 break;
775
776 /* If there are any other popped regs, that's an error. */
777 for (; i < LAST_STACK_REG + 1; i++)
778 if (reg_used_as_output[i])
779 break;
780
781 if (i != LAST_STACK_REG + 1)
782 {
783 error_for_asm (insn, "Output regs must be grouped at top of stack");
784 malformed_asm = 1;
785 }
786
787 /* Enforce rule #2: All implicitly popped input regs must be closer
788 to the top of the reg-stack than any input that is not implicitly
789 popped. */
790
791 bzero ((char *) implicitly_dies, sizeof (implicitly_dies));
792 for (i = n_outputs; i < n_outputs + n_inputs; i++)
793 if (STACK_REG_P (recog_operand[i]))
794 {
795 /* An input reg is implicitly popped if it is tied to an
796 output, or if there is a CLOBBER for it. */
797 int j;
798
799 for (j = 0; j < n_clobbers; j++)
800 if (operands_match_p (clobber_reg[j], recog_operand[i]))
801 break;
802
803 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
804 implicitly_dies[REGNO (recog_operand[i])] = 1;
805 }
806
807 /* Search for first non-popped reg. */
808 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
809 if (! implicitly_dies[i])
810 break;
811
812 /* If there are any other popped regs, that's an error. */
813 for (; i < LAST_STACK_REG + 1; i++)
814 if (implicitly_dies[i])
815 break;
816
817 if (i != LAST_STACK_REG + 1)
818 {
819 error_for_asm (insn,
820 "Implicitly popped regs must be grouped at top of stack");
821 malformed_asm = 1;
822 }
823
824 /* Enfore rule #3: If any input operand uses the "f" constraint, all
825 output constraints must use the "&" earlyclobber.
826
827 ??? Detect this more deterministically by having constraint_asm_operands
828 record any earlyclobber. */
829
830 for (i = n_outputs; i < n_outputs + n_inputs; i++)
831 if (recog_op_alt[i][alt].matches == -1)
832 {
833 int j;
834
835 for (j = 0; j < n_outputs; j++)
836 if (operands_match_p (recog_operand[j], recog_operand[i]))
837 {
838 error_for_asm (insn,
839 "Output operand %d must use `&' constraint", j);
840 malformed_asm = 1;
841 }
842 }
843
844 if (malformed_asm)
845 {
846 /* Avoid further trouble with this insn. */
847 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
848 VARRAY_CHAR (stack_regs_mentioned_data, INSN_UID (insn)) = 2;
849 return;
850 }
851
852 /* Process all outputs */
853 for (i = 0; i < n_outputs; i++)
854 {
855 rtx op = recog_operand[i];
856
857 if (! STACK_REG_P (op))
858 {
859 if (stack_regs_mentioned_p (op))
860 abort ();
861 else
862 continue;
863 }
864
865 /* Each destination is dead before this insn. If the
866 destination is not used after this insn, record this with
867 REG_UNUSED. */
868
869 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
870 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED, op,
871 REG_NOTES (insn));
872
873 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
874 }
875
876 /* Process all inputs */
877 for (i = n_outputs; i < n_outputs + n_inputs; i++)
878 {
879 rtx op = recog_operand[i];
880 if (! STACK_REG_P (op))
881 {
882 if (stack_regs_mentioned_p (op))
883 abort ();
884 else
885 continue;
886 }
887
888 /* If an input is dead after the insn, record a death note.
889 But don't record a death note if there is already a death note,
890 or if the input is also an output. */
891
892 if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))
893 && recog_op_alt[i][alt].matches == -1
894 && find_regno_note (insn, REG_DEAD, REGNO (op)) == NULL_RTX)
895 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, op, REG_NOTES (insn));
896
897 SET_HARD_REG_BIT (regstack->reg_set, REGNO (op));
898 }
899 }
900
901 /* Scan PAT, which is part of INSN, and record registers appearing in
902 a SET_DEST in DEST, and other registers in SRC.
903
904 This function does not know about SET_DESTs that are both input and
905 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
906
907 static void
908 record_reg_life_pat (pat, src, dest, douse)
909 rtx pat;
910 HARD_REG_SET *src, *dest;
911 int douse;
912 {
913 register const char *fmt;
914 register int i;
915
916 if (STACK_REG_P (pat)
917 || (GET_CODE (pat) == SUBREG && STACK_REG_P (SUBREG_REG (pat))))
918 {
919 if (src)
920 mark_regs_pat (pat, src);
921
922 if (dest)
923 mark_regs_pat (pat, dest);
924
925 return;
926 }
927
928 if (GET_CODE (pat) == SET)
929 {
930 record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest, 0);
931 record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR, 0);
932 return;
933 }
934
935 /* We don't need to consider either of these cases. */
936 if ((GET_CODE (pat) == USE && !douse) || GET_CODE (pat) == CLOBBER)
937 return;
938
939 fmt = GET_RTX_FORMAT (GET_CODE (pat));
940 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
941 {
942 if (fmt[i] == 'E')
943 {
944 register int j;
945
946 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
947 record_reg_life_pat (XVECEXP (pat, i, j), src, dest, 0);
948 }
949 else if (fmt[i] == 'e')
950 record_reg_life_pat (XEXP (pat, i), src, dest, 0);
951 }
952 }
953 \f
954 /* Calculate the number of inputs and outputs in BODY, an
955 asm_operands. N_OPERANDS is the total number of operands, and
956 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
957 placed. */
958
959 static int
960 get_asm_operand_n_inputs (body)
961 rtx body;
962 {
963 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
964 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
965
966 else if (GET_CODE (body) == ASM_OPERANDS)
967 return ASM_OPERANDS_INPUT_LENGTH (body);
968
969 else if (GET_CODE (body) == PARALLEL
970 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
971 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
972
973 else if (GET_CODE (body) == PARALLEL
974 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
975 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
976
977 abort ();
978 }
979 \f
980 /* Scan INSN, which is in BLOCK, and record the life & death of stack
981 registers in REGSTACK. This function is called to process insns from
982 the last insn in a block to the first. The actual scanning is done in
983 record_reg_life_pat.
984
985 If a register is live after a CALL_INSN, but is not a value return
986 register for that CALL_INSN, then code is emitted to initialize that
987 register. The block_end[] data is kept accurate.
988
989 Existing death and unset notes for stack registers are deleted
990 before processing the insn. */
991
992 static void
993 record_reg_life (insn, block, regstack)
994 rtx insn;
995 int block;
996 stack regstack;
997 {
998 rtx note, *note_link;
999 int n_operands;
1000
1001 if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1002 || INSN_DELETED_P (insn))
1003 return;
1004
1005 /* Strip death notes for stack regs from this insn */
1006
1007 note_link = &REG_NOTES(insn);
1008 for (note = *note_link; note; note = XEXP (note, 1))
1009 if (STACK_REG_P (XEXP (note, 0))
1010 && (REG_NOTE_KIND (note) == REG_DEAD
1011 || REG_NOTE_KIND (note) == REG_UNUSED))
1012 *note_link = XEXP (note, 1);
1013 else
1014 note_link = &XEXP (note, 1);
1015
1016 /* Process all patterns in the insn. */
1017
1018 n_operands = asm_noperands (PATTERN (insn));
1019 if (n_operands >= 0)
1020 {
1021 record_asm_reg_life (insn, regstack);
1022 return;
1023 }
1024
1025 {
1026 HARD_REG_SET src, dest;
1027 int regno;
1028
1029 CLEAR_HARD_REG_SET (src);
1030 CLEAR_HARD_REG_SET (dest);
1031
1032 if (GET_CODE (insn) == CALL_INSN)
1033 for (note = CALL_INSN_FUNCTION_USAGE (insn);
1034 note;
1035 note = XEXP (note, 1))
1036 if (GET_CODE (XEXP (note, 0)) == USE)
1037 record_reg_life_pat (SET_DEST (XEXP (note, 0)), &src, NULL_PTR, 0);
1038
1039 record_reg_life_pat (PATTERN (insn), &src, &dest, 0);
1040 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
1041 if (! TEST_HARD_REG_BIT (regstack->reg_set, regno))
1042 {
1043 if (TEST_HARD_REG_BIT (src, regno)
1044 && ! TEST_HARD_REG_BIT (dest, regno))
1045 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1046 FP_MODE_REG (regno, DFmode),
1047 REG_NOTES (insn));
1048 else if (TEST_HARD_REG_BIT (dest, regno))
1049 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_UNUSED,
1050 FP_MODE_REG (regno, DFmode),
1051 REG_NOTES (insn));
1052 }
1053
1054 if (GET_CODE (insn) == CALL_INSN)
1055 {
1056 int reg;
1057
1058 /* There might be a reg that is live after a function call.
1059 Initialize it to zero so that the program does not crash. See
1060 comment towards the end of stack_reg_life_analysis(). */
1061
1062 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
1063 if (! TEST_HARD_REG_BIT (dest, reg)
1064 && TEST_HARD_REG_BIT (regstack->reg_set, reg))
1065 {
1066 rtx init, pat;
1067
1068 /* The insn will use virtual register numbers, and so
1069 convert_regs is expected to process these. But BLOCK_NUM
1070 cannot be used on these insns, because they do not appear in
1071 block_number[]. */
1072
1073 pat = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, DFmode),
1074 CONST0_RTX (DFmode));
1075 init = emit_insn_after (pat, insn);
1076
1077 CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1078
1079 /* If the CALL_INSN was the end of a block, move the
1080 block_end to point to the new insn. */
1081
1082 if (block_end[block] == insn)
1083 block_end[block] = init;
1084 }
1085
1086 /* Some regs do not survive a CALL */
1087 AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1088 }
1089
1090 AND_COMPL_HARD_REG_SET (regstack->reg_set, dest);
1091 IOR_HARD_REG_SET (regstack->reg_set, src);
1092 }
1093 }
1094 \f
1095 /* Find all basic blocks of the function, which starts with FIRST.
1096 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1097
1098 static void
1099 find_blocks (first)
1100 rtx first;
1101 {
1102 register rtx insn;
1103 register int block;
1104 register RTX_CODE prev_code = BARRIER;
1105 register RTX_CODE code;
1106 rtx label_value_list = 0;
1107
1108 /* Record where all the blocks start and end.
1109 Record which basic blocks control can drop in to. */
1110
1111 block = -1;
1112 for (insn = first; insn; insn = NEXT_INSN (insn))
1113 {
1114 /* Note that this loop must select the same block boundaries
1115 as code in reg_to_stack, but that these are not the same
1116 as those selected in flow.c. */
1117
1118 code = GET_CODE (insn);
1119
1120 if (code == CODE_LABEL
1121 || (prev_code != INSN
1122 && prev_code != CALL_INSN
1123 && prev_code != CODE_LABEL
1124 && GET_RTX_CLASS (code) == 'i'))
1125 {
1126 block_begin[++block] = insn;
1127 block_end[block] = insn;
1128 block_drops_in[block] = prev_code != BARRIER;
1129 }
1130 else if (GET_RTX_CLASS (code) == 'i')
1131 block_end[block] = insn;
1132
1133 if (GET_RTX_CLASS (code) == 'i')
1134 {
1135 rtx note;
1136
1137 /* Make a list of all labels referred to other than by jumps. */
1138 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1139 if (REG_NOTE_KIND (note) == REG_LABEL)
1140 label_value_list = gen_rtx_EXPR_LIST (VOIDmode, XEXP (note, 0),
1141 label_value_list);
1142 }
1143
1144 block_number[INSN_UID (insn)] = block;
1145
1146 if (code != NOTE)
1147 prev_code = code;
1148 }
1149
1150 if (block + 1 != blocks)
1151 abort ();
1152
1153 /* generate all label references to the corresponding jump insn */
1154 for (block = 0; block < blocks; block++)
1155 {
1156 insn = block_end[block];
1157
1158 if (GET_CODE (insn) == JUMP_INSN)
1159 {
1160 rtx pat = PATTERN (insn);
1161 rtx x;
1162
1163 if (computed_jump_p (insn))
1164 {
1165 for (x = label_value_list; x; x = XEXP (x, 1))
1166 record_label_references (insn,
1167 gen_rtx_LABEL_REF (VOIDmode,
1168 XEXP (x, 0)));
1169
1170 for (x = forced_labels; x; x = XEXP (x, 1))
1171 record_label_references (insn,
1172 gen_rtx_LABEL_REF (VOIDmode,
1173 XEXP (x, 0)));
1174 }
1175
1176 record_label_references (insn, pat);
1177 }
1178 }
1179 }
1180
1181 /* If current function returns its result in an fp stack register,
1182 return the REG. Otherwise, return 0. */
1183
1184 static rtx
1185 stack_result (decl)
1186 tree decl;
1187 {
1188 rtx result = DECL_RTL (DECL_RESULT (decl));
1189
1190 if (result != 0
1191 && ! (GET_CODE (result) == REG
1192 && REGNO (result) < FIRST_PSEUDO_REGISTER))
1193 {
1194 #ifdef FUNCTION_OUTGOING_VALUE
1195 result
1196 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1197 #else
1198 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
1199 #endif
1200 }
1201
1202 return result != 0 && STACK_REG_P (result) ? result : 0;
1203 }
1204 \f
1205 /* Determine the which registers are live at the start of each basic
1206 block of the function whose first insn is FIRST.
1207
1208 First, if the function returns a real_type, mark the function
1209 return type as live at each return point, as the RTL may not give any
1210 hint that the register is live.
1211
1212 Then, start with the last block and work back to the first block.
1213 Similarly, work backwards within each block, insn by insn, recording
1214 which regs are dead and which are used (and therefore live) in the
1215 hard reg set of block_stack_in[].
1216
1217 After processing each basic block, if there is a label at the start
1218 of the block, propagate the live registers to all jumps to this block.
1219
1220 As a special case, if there are regs live in this block, that are
1221 not live in a block containing a jump to this label, and the block
1222 containing the jump has already been processed, we must propagate this
1223 block's entry register life back to the block containing the jump, and
1224 restart life analysis from there.
1225
1226 In the worst case, this function may traverse the insns
1227 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1228 of the insns may not know that a reg is live at a target that is early
1229 in the insns. So we back up and start over with the new reg live.
1230
1231 If there are registers that are live at the start of the function,
1232 insns are emitted to initialize these registers. Something similar is
1233 done after CALL_INSNs in record_reg_life. */
1234
1235 static void
1236 stack_reg_life_analysis (first, stackentry)
1237 rtx first;
1238 HARD_REG_SET *stackentry;
1239 {
1240 int reg, block;
1241 struct stack_def regstack;
1242
1243 {
1244 rtx retvalue;
1245
1246 if ((retvalue = stack_result (current_function_decl)))
1247 {
1248 /* Find all RETURN insns and mark them. */
1249
1250 for (block = blocks - 1; --block >= 0;)
1251 if (GET_CODE (block_end[block]) == JUMP_INSN
1252 && returnjump_p (block_end[block]))
1253 mark_regs_pat (retvalue, block_out_reg_set+block);
1254
1255 /* Mark off the end of last block if we "fall off" the end of the
1256 function into the epilogue. */
1257
1258 if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1259 || returnjump_p (block_end[blocks-1]))
1260 mark_regs_pat (retvalue, block_out_reg_set+blocks-1);
1261 }
1262 }
1263
1264 /* now scan all blocks backward for stack register use */
1265
1266 block = blocks - 1;
1267 while (block >= 0)
1268 {
1269 register rtx insn, prev;
1270
1271 /* current register status at last instruction */
1272
1273 COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1274
1275 prev = block_end[block];
1276 do
1277 {
1278 insn = prev;
1279 prev = PREV_INSN (insn);
1280
1281 /* If the insn is a CALL_INSN, we need to ensure that
1282 everything dies. But otherwise don't process unless there
1283 are some stack regs present. */
1284
1285 if (stack_regs_mentioned (insn) || GET_CODE (insn) == CALL_INSN)
1286 record_reg_life (insn, block, &regstack);
1287
1288 } while (insn != block_begin[block]);
1289
1290 /* Set the state at the start of the block. Mark that no
1291 register mapping information known yet. */
1292
1293 COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1294 block_stack_in[block].top = -2;
1295
1296 /* If there is a label, propagate our register life to all jumps
1297 to this label. */
1298
1299 if (GET_CODE (insn) == CODE_LABEL)
1300 {
1301 register rtx label;
1302 int must_restart = 0;
1303
1304 for (label = LABEL_REFS (insn); label != insn;
1305 label = LABEL_NEXTREF (label))
1306 {
1307 int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1308
1309 if (jump_block < block)
1310 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1311 block_stack_in[block].reg_set);
1312 else
1313 {
1314 /* The block containing the jump has already been
1315 processed. If there are registers that were not known
1316 to be live then, but are live now, we must back up
1317 and restart life analysis from that point with the new
1318 life information. */
1319
1320 GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1321 block_out_reg_set[jump_block],
1322 win);
1323
1324 IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1325 block_stack_in[block].reg_set);
1326
1327 block = jump_block;
1328 must_restart = 1;
1329 break;
1330
1331 win:
1332 ;
1333 }
1334 }
1335 if (must_restart)
1336 continue;
1337 }
1338
1339 if (block_drops_in[block])
1340 IOR_HARD_REG_SET (block_out_reg_set[block-1],
1341 block_stack_in[block].reg_set);
1342
1343 block -= 1;
1344 }
1345
1346 /* If any reg is live at the start of the first block of a
1347 function, then we must guarantee that the reg holds some value by
1348 generating our own "load" of that register. Otherwise a 387 would
1349 fault trying to access an empty register. */
1350
1351 /* Load zero into each live register. The fact that a register
1352 appears live at the function start necessarily implies an error
1353 in the user program: it means that (unless the offending code is *never*
1354 executed) this program is using uninitialised floating point
1355 variables. In order to keep broken code like this happy, we initialise
1356 those variables with zero.
1357
1358 Note that we are inserting virtual register references here:
1359 these insns must be processed by convert_regs later. Also, these
1360 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1361
1362 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1363 if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)
1364 && ! TEST_HARD_REG_BIT (*stackentry, reg))
1365 {
1366 rtx init_rtx;
1367
1368 init_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG(reg, DFmode),
1369 CONST0_RTX (DFmode));
1370 block_begin[0] = emit_insn_after (init_rtx, first);
1371
1372 CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1373 }
1374 }
1375 \f
1376 /*****************************************************************************
1377 This section deals with stack register substitution, and forms the second
1378 pass over the RTL.
1379 *****************************************************************************/
1380
1381 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1382 the desired hard REGNO. */
1383
1384 static void
1385 replace_reg (reg, regno)
1386 rtx *reg;
1387 int regno;
1388 {
1389 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1390 || ! STACK_REG_P (*reg))
1391 abort ();
1392
1393 switch (GET_MODE_CLASS (GET_MODE (*reg)))
1394 {
1395 default: abort ();
1396 case MODE_FLOAT:
1397 case MODE_COMPLEX_FLOAT:;
1398 }
1399
1400 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
1401 }
1402
1403 /* Remove a note of type NOTE, which must be found, for register
1404 number REGNO from INSN. Remove only one such note. */
1405
1406 static void
1407 remove_regno_note (insn, note, regno)
1408 rtx insn;
1409 enum reg_note note;
1410 int regno;
1411 {
1412 register rtx *note_link, this;
1413
1414 note_link = &REG_NOTES(insn);
1415 for (this = *note_link; this; this = XEXP (this, 1))
1416 if (REG_NOTE_KIND (this) == note
1417 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1418 {
1419 *note_link = XEXP (this, 1);
1420 return;
1421 }
1422 else
1423 note_link = &XEXP (this, 1);
1424
1425 abort ();
1426 }
1427
1428 /* Find the hard register number of virtual register REG in REGSTACK.
1429 The hard register number is relative to the top of the stack. -1 is
1430 returned if the register is not found. */
1431
1432 static int
1433 get_hard_regnum (regstack, reg)
1434 stack regstack;
1435 rtx reg;
1436 {
1437 int i;
1438
1439 if (! STACK_REG_P (reg))
1440 abort ();
1441
1442 for (i = regstack->top; i >= 0; i--)
1443 if (regstack->reg[i] == REGNO (reg))
1444 break;
1445
1446 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1447 }
1448
1449 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1450 the chain of insns. Doing so could confuse block_begin and block_end
1451 if this were the only insn in the block. */
1452
1453 static void
1454 delete_insn_for_stacker (insn)
1455 rtx insn;
1456 {
1457 int i;
1458
1459 /* Ensure that the side effects were clobbers when deleting a PARALLEL. */
1460 if (GET_CODE (PATTERN (insn)) == PARALLEL)
1461 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
1462 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) != CLOBBER)
1463 abort ();
1464
1465 PUT_CODE (insn, NOTE);
1466 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1467 NOTE_SOURCE_FILE (insn) = 0;
1468 }
1469 \f
1470 /* Emit an insn to pop virtual register REG before or after INSN.
1471 REGSTACK is the stack state after INSN and is updated to reflect this
1472 pop. WHEN is either emit_insn_before, emit_insn_after or NULL.
1473 in case WHEN is NULL we don't really emit the insn, just modify stack
1474 information. Caller is expected to emit insn himself.
1475
1476 A pop insn is represented as a SET whose destination is the register to
1477 be popped and source is the top of stack. A death note for the top of stack
1478 cases the movdf pattern to pop. */
1479
1480 static rtx
1481 emit_pop_insn (insn, regstack, reg, when)
1482 rtx insn;
1483 stack regstack;
1484 rtx reg;
1485 rtx (*when)();
1486 {
1487 rtx pop_insn, pop_rtx;
1488 int hard_regno;
1489
1490 hard_regno = get_hard_regnum (regstack, reg);
1491
1492 if (hard_regno < FIRST_STACK_REG)
1493 abort ();
1494
1495 if (when)
1496 {
1497 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
1498 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1499
1500 pop_insn = (*when) (pop_rtx, insn);
1501
1502 REG_NOTES (pop_insn) = gen_rtx_EXPR_LIST (REG_DEAD,
1503 FP_MODE_REG (FIRST_STACK_REG,
1504 DFmode),
1505 REG_NOTES (pop_insn));
1506 }
1507
1508 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1509 = regstack->reg[regstack->top];
1510 regstack->top -= 1;
1511 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1512
1513 return pop_insn;
1514 }
1515 \f
1516 /* Emit an insn before or after INSN to swap virtual register REG with the
1517 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1518 REGSTACK is the stack state before the swap, and is updated to reflect
1519 the swap. A swap insn is represented as a PARALLEL of two patterns:
1520 each pattern moves one reg to the other.
1521
1522 If REG is already at the top of the stack, no insn is emitted. */
1523
1524 static void
1525 emit_swap_insn (insn, regstack, reg)
1526 rtx insn;
1527 stack regstack;
1528 rtx reg;
1529 {
1530 int hard_regno;
1531 rtx gen_swapdf();
1532 rtx swap_rtx, swap_insn;
1533 int tmp, other_reg; /* swap regno temps */
1534 rtx i1; /* the stack-reg insn prior to INSN */
1535 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
1536
1537 hard_regno = get_hard_regnum (regstack, reg);
1538
1539 if (hard_regno < FIRST_STACK_REG)
1540 abort ();
1541 if (hard_regno == FIRST_STACK_REG)
1542 return;
1543
1544 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
1545
1546 tmp = regstack->reg[other_reg];
1547 regstack->reg[other_reg] = regstack->reg[regstack->top];
1548 regstack->reg[regstack->top] = tmp;
1549
1550 /* Find the previous insn involving stack regs, but don't go past
1551 any labels, calls or jumps. */
1552 i1 = prev_nonnote_insn (insn);
1553 while (i1 && GET_CODE (i1) == INSN && !stack_regs_mentioned (i1))
1554 i1 = prev_nonnote_insn (i1);
1555
1556 if (i1)
1557 i1set = single_set (i1);
1558
1559 if (i1set)
1560 {
1561 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1562 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1563
1564 /* If the previous register stack push was from the reg we are to
1565 swap with, omit the swap. */
1566
1567 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
1568 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1569 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1570 return;
1571
1572 /* If the previous insn wrote to the reg we are to swap with,
1573 omit the swap. */
1574
1575 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1576 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1577 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1578 return;
1579 }
1580
1581 if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1)))
1582 {
1583 i1 = next_nonnote_insn (i1);
1584 if (i1 == insn)
1585 abort ();
1586 }
1587
1588 swap_rtx = gen_swapdf (FP_MODE_REG (hard_regno, DFmode),
1589 FP_MODE_REG (FIRST_STACK_REG, DFmode));
1590 swap_insn = emit_insn_after (swap_rtx, i1);
1591 }
1592 \f
1593 /* Handle a move to or from a stack register in PAT, which is in INSN.
1594 REGSTACK is the current stack. */
1595
1596 static void
1597 move_for_stack_reg (insn, regstack, pat)
1598 rtx insn;
1599 stack regstack;
1600 rtx pat;
1601 {
1602 rtx *psrc = get_true_reg (&SET_SRC (pat));
1603 rtx *pdest = get_true_reg (&SET_DEST (pat));
1604 rtx src, dest;
1605 rtx note;
1606
1607 src = *psrc; dest = *pdest;
1608
1609 if (STACK_REG_P (src) && STACK_REG_P (dest))
1610 {
1611 /* Write from one stack reg to another. If SRC dies here, then
1612 just change the register mapping and delete the insn. */
1613
1614 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1615 if (note)
1616 {
1617 int i;
1618
1619 /* If this is a no-op move, there must not be a REG_DEAD note. */
1620 if (REGNO (src) == REGNO (dest))
1621 abort ();
1622
1623 for (i = regstack->top; i >= 0; i--)
1624 if (regstack->reg[i] == REGNO (src))
1625 break;
1626
1627 /* The source must be live, and the dest must be dead. */
1628 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1629 abort ();
1630
1631 /* It is possible that the dest is unused after this insn.
1632 If so, just pop the src. */
1633
1634 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1635 {
1636 emit_pop_insn (insn, regstack, src, emit_insn_after);
1637
1638 delete_insn_for_stacker (insn);
1639 return;
1640 }
1641
1642 regstack->reg[i] = REGNO (dest);
1643
1644 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1645 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1646
1647 delete_insn_for_stacker (insn);
1648
1649 return;
1650 }
1651
1652 /* The source reg does not die. */
1653
1654 /* If this appears to be a no-op move, delete it, or else it
1655 will confuse the machine description output patterns. But if
1656 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1657 for REG_UNUSED will not work for deleted insns. */
1658
1659 if (REGNO (src) == REGNO (dest))
1660 {
1661 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1662 emit_pop_insn (insn, regstack, dest, emit_insn_after);
1663
1664 delete_insn_for_stacker (insn);
1665 return;
1666 }
1667
1668 /* The destination ought to be dead */
1669 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1670 abort ();
1671
1672 replace_reg (psrc, get_hard_regnum (regstack, src));
1673
1674 regstack->reg[++regstack->top] = REGNO (dest);
1675 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1676 replace_reg (pdest, FIRST_STACK_REG);
1677 }
1678 else if (STACK_REG_P (src))
1679 {
1680 /* Save from a stack reg to MEM, or possibly integer reg. Since
1681 only top of stack may be saved, emit an exchange first if
1682 needs be. */
1683
1684 emit_swap_insn (insn, regstack, src);
1685
1686 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1687 if (note)
1688 {
1689 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1690 regstack->top--;
1691 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1692 }
1693 else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1)
1694 {
1695 /* A 387 cannot write an XFmode value to a MEM without
1696 clobbering the source reg. The output code can handle
1697 this by reading back the value from the MEM.
1698 But it is more efficient to use a temp register if one is
1699 available. Push the source value here if the register
1700 stack is not full, and then write the value to memory via
1701 a pop. */
1702 rtx push_rtx, push_insn;
1703 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1704
1705 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1706 push_insn = emit_insn_before (push_rtx, insn);
1707 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1708 REG_NOTES (insn));
1709 }
1710
1711 replace_reg (psrc, FIRST_STACK_REG);
1712 }
1713 else if (STACK_REG_P (dest))
1714 {
1715 /* Load from MEM, or possibly integer REG or constant, into the
1716 stack regs. The actual target is always the top of the
1717 stack. The stack mapping is changed to reflect that DEST is
1718 now at top of stack. */
1719
1720 /* The destination ought to be dead */
1721 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1722 abort ();
1723
1724 if (regstack->top >= REG_STACK_SIZE)
1725 abort ();
1726
1727 regstack->reg[++regstack->top] = REGNO (dest);
1728 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1729 replace_reg (pdest, FIRST_STACK_REG);
1730 }
1731 else
1732 abort ();
1733 }
1734 \f
1735 static void
1736 swap_rtx_condition (pat)
1737 rtx pat;
1738 {
1739 register const char *fmt;
1740 register int i;
1741
1742 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1743 {
1744 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1745 return;
1746 }
1747
1748 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1749 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1750 {
1751 if (fmt[i] == 'E')
1752 {
1753 register int j;
1754
1755 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1756 swap_rtx_condition (XVECEXP (pat, i, j));
1757 }
1758 else if (fmt[i] == 'e')
1759 swap_rtx_condition (XEXP (pat, i));
1760 }
1761 }
1762
1763 /* Handle a comparison. Special care needs to be taken to avoid
1764 causing comparisons that a 387 cannot do correctly, such as EQ.
1765
1766 Also, a fstp instruction may need to be emitted. The 387 does have an
1767 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1768 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1769 set up.
1770
1771 We can not handle this by emiting fpop instruction after compare, because
1772 it appears between cc0 setter and user. So we emit only
1773 REG_DEAD note and handle it as a special case in machine description.
1774
1775 This code used trick with delay_slot filling to emit pop insn after
1776 comparsion but it didn't worked because it caused confusion with cc_status
1777 in final pass. */
1778
1779 static void
1780 compare_for_stack_reg (insn, regstack, pat)
1781 rtx insn;
1782 stack regstack;
1783 rtx pat;
1784 {
1785 rtx *src1, *src2;
1786 rtx src1_note, src2_note;
1787 rtx cc0_user;
1788 int have_cmove;
1789 int hard_regno;
1790
1791 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1792 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1793 cc0_user = next_cc0_user (insn);
1794
1795 /* If the insn that uses cc0 is an FP-conditional move, then the destination
1796 must be the top of stack */
1797 if (GET_CODE (PATTERN (cc0_user)) == SET
1798 && SET_DEST (PATTERN (cc0_user)) != pc_rtx
1799 && GET_CODE (SET_SRC (PATTERN (cc0_user))) == IF_THEN_ELSE
1800 && (GET_MODE_CLASS (GET_MODE (SET_DEST (PATTERN (cc0_user))))
1801 == MODE_FLOAT))
1802 {
1803 rtx *dest;
1804
1805 dest = get_true_reg (&SET_DEST (PATTERN (cc0_user)));
1806
1807 have_cmove = 1;
1808 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1809 && REGNO (*dest) != regstack->reg[regstack->top])
1810 {
1811 emit_swap_insn (insn, regstack, *dest);
1812 }
1813 }
1814 else
1815 have_cmove = 0;
1816
1817 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1818 registers that die in this insn - move those to stack top first. */
1819 if (! STACK_REG_P (*src1)
1820 || (STACK_REG_P (*src2)
1821 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1822 {
1823 rtx temp, next;
1824
1825 temp = XEXP (SET_SRC (pat), 0);
1826 XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1);
1827 XEXP (SET_SRC (pat), 1) = temp;
1828
1829 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1830 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1831
1832 next = next_cc0_user (insn);
1833 if (next == NULL_RTX)
1834 abort ();
1835
1836 swap_rtx_condition (PATTERN (next));
1837 INSN_CODE (next) = -1;
1838 INSN_CODE (insn) = -1;
1839 }
1840
1841 /* We will fix any death note later. */
1842
1843 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1844
1845 if (STACK_REG_P (*src2))
1846 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1847 else
1848 src2_note = NULL_RTX;
1849
1850 if (! have_cmove)
1851 emit_swap_insn (insn, regstack, *src1);
1852
1853 replace_reg (src1, FIRST_STACK_REG);
1854
1855 if (STACK_REG_P (*src2))
1856 {
1857 hard_regno = get_hard_regnum (regstack, *src2);
1858 replace_reg (src2, hard_regno);
1859 }
1860
1861 if (src1_note)
1862 {
1863 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1864 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1865 }
1866
1867 /* If the second operand dies, handle that. But if the operands are
1868 the same stack register, don't bother, because only one death is
1869 needed, and it was just handled. */
1870
1871 if (src2_note
1872 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1873 && REGNO (*src1) == REGNO (*src2)))
1874 {
1875 /* As a special case, two regs may die in this insn if src2 is
1876 next to top of stack and the top of stack also dies. Since
1877 we have already popped src1, "next to top of stack" is really
1878 at top (FIRST_STACK_REG) now. */
1879
1880 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1881 && src1_note)
1882 {
1883 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1884 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1885 }
1886 else
1887 {
1888 /* Pop of second operand is handled using special REG_DEAD note
1889 because we can't emit pop insn after cc0 setter. */
1890
1891 emit_pop_insn (insn, regstack, XEXP (src2_note, 0), NULL);
1892 replace_reg (&XEXP (src2_note, 0), hard_regno);
1893 }
1894 }
1895 }
1896 \f
1897 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1898 is the current register layout. */
1899
1900 static void
1901 subst_stack_regs_pat (insn, regstack, pat)
1902 rtx insn;
1903 stack regstack;
1904 rtx pat;
1905 {
1906 rtx *dest, *src;
1907 rtx *src1 = (rtx *) NULL_PTR, *src2;
1908 rtx src1_note, src2_note;
1909
1910 if (GET_CODE (pat) != SET)
1911 return;
1912
1913 dest = get_true_reg (&SET_DEST (pat));
1914 src = get_true_reg (&SET_SRC (pat));
1915
1916 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1917
1918 if (*dest != cc0_rtx
1919 && (STACK_REG_P (*src)
1920 || (STACK_REG_P (*dest)
1921 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1922 || GET_CODE (*src) == CONST_DOUBLE))))
1923 move_for_stack_reg (insn, regstack, pat);
1924 else
1925 switch (GET_CODE (SET_SRC (pat)))
1926 {
1927 case COMPARE:
1928 compare_for_stack_reg (insn, regstack, pat);
1929 break;
1930
1931 case CALL:
1932 {
1933 int count;
1934 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1935 --count >= 0;)
1936 {
1937 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1938 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1939 }
1940 }
1941 replace_reg (dest, FIRST_STACK_REG);
1942 break;
1943
1944 case REG:
1945 /* This is a `tstM2' case. */
1946 if (*dest != cc0_rtx)
1947 abort ();
1948
1949 src1 = src;
1950
1951 /* Fall through. */
1952
1953 case FLOAT_TRUNCATE:
1954 case SQRT:
1955 case ABS:
1956 case NEG:
1957 /* These insns only operate on the top of the stack. DEST might
1958 be cc0_rtx if we're processing a tstM pattern. Also, it's
1959 possible that the tstM case results in a REG_DEAD note on the
1960 source. */
1961
1962 if (src1 == 0)
1963 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1964
1965 emit_swap_insn (insn, regstack, *src1);
1966
1967 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1968
1969 if (STACK_REG_P (*dest))
1970 replace_reg (dest, FIRST_STACK_REG);
1971
1972 if (src1_note)
1973 {
1974 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1975 regstack->top--;
1976 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1977 }
1978
1979 replace_reg (src1, FIRST_STACK_REG);
1980
1981 break;
1982
1983 case MINUS:
1984 case DIV:
1985 /* On i386, reversed forms of subM3 and divM3 exist for
1986 MODE_FLOAT, so the same code that works for addM3 and mulM3
1987 can be used. */
1988 case MULT:
1989 case PLUS:
1990 /* These insns can accept the top of stack as a destination
1991 from a stack reg or mem, or can use the top of stack as a
1992 source and some other stack register (possibly top of stack)
1993 as a destination. */
1994
1995 src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1996 src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1997
1998 /* We will fix any death note later. */
1999
2000 if (STACK_REG_P (*src1))
2001 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2002 else
2003 src1_note = NULL_RTX;
2004 if (STACK_REG_P (*src2))
2005 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2006 else
2007 src2_note = NULL_RTX;
2008
2009 /* If either operand is not a stack register, then the dest
2010 must be top of stack. */
2011
2012 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
2013 emit_swap_insn (insn, regstack, *dest);
2014 else
2015 {
2016 /* Both operands are REG. If neither operand is already
2017 at the top of stack, choose to make the one that is the dest
2018 the new top of stack. */
2019
2020 int src1_hard_regnum, src2_hard_regnum;
2021
2022 src1_hard_regnum = get_hard_regnum (regstack, *src1);
2023 src2_hard_regnum = get_hard_regnum (regstack, *src2);
2024 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
2025 abort ();
2026
2027 if (src1_hard_regnum != FIRST_STACK_REG
2028 && src2_hard_regnum != FIRST_STACK_REG)
2029 emit_swap_insn (insn, regstack, *dest);
2030 }
2031
2032 if (STACK_REG_P (*src1))
2033 replace_reg (src1, get_hard_regnum (regstack, *src1));
2034 if (STACK_REG_P (*src2))
2035 replace_reg (src2, get_hard_regnum (regstack, *src2));
2036
2037 if (src1_note)
2038 {
2039 /* If the register that dies is at the top of stack, then
2040 the destination is somewhere else - merely substitute it.
2041 But if the reg that dies is not at top of stack, then
2042 move the top of stack to the dead reg, as though we had
2043 done the insn and then a store-with-pop. */
2044
2045 if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
2046 {
2047 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2048 replace_reg (dest, get_hard_regnum (regstack, *dest));
2049 }
2050 else
2051 {
2052 int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
2053
2054 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2055 replace_reg (dest, regno);
2056
2057 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2058 = regstack->reg[regstack->top];
2059 }
2060
2061 CLEAR_HARD_REG_BIT (regstack->reg_set,
2062 REGNO (XEXP (src1_note, 0)));
2063 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2064 regstack->top--;
2065 }
2066 else if (src2_note)
2067 {
2068 if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2069 {
2070 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2071 replace_reg (dest, get_hard_regnum (regstack, *dest));
2072 }
2073 else
2074 {
2075 int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2076
2077 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2078 replace_reg (dest, regno);
2079
2080 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2081 = regstack->reg[regstack->top];
2082 }
2083
2084 CLEAR_HARD_REG_BIT (regstack->reg_set,
2085 REGNO (XEXP (src2_note, 0)));
2086 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2087 regstack->top--;
2088 }
2089 else
2090 {
2091 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2092 replace_reg (dest, get_hard_regnum (regstack, *dest));
2093 }
2094
2095 break;
2096
2097 case UNSPEC:
2098 switch (XINT (SET_SRC (pat), 1))
2099 {
2100 case 1: /* sin */
2101 case 2: /* cos */
2102 /* These insns only operate on the top of the stack. */
2103
2104 src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0));
2105
2106 emit_swap_insn (insn, regstack, *src1);
2107
2108 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2109
2110 if (STACK_REG_P (*dest))
2111 replace_reg (dest, FIRST_STACK_REG);
2112
2113 if (src1_note)
2114 {
2115 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
2116 regstack->top--;
2117 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
2118 }
2119
2120 replace_reg (src1, FIRST_STACK_REG);
2121
2122 break;
2123
2124 default:
2125 abort ();
2126 }
2127 break;
2128
2129 case IF_THEN_ELSE:
2130 /* dest has to be on stack. */
2131 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2132 abort ();
2133
2134 /* This insn requires the top of stack to be the destination. */
2135
2136 /* If the comparison operator is an FP comparison operator,
2137 it is handled correctly by compare_for_stack_reg () who
2138 will move the destination to the top of stack. But if the
2139 comparison operator is not an FP comparison operator, we
2140 have to handle it here. */
2141 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
2142 && REGNO (*dest) != regstack->reg[regstack->top])
2143 emit_swap_insn (insn, regstack, *dest);
2144
2145 src1 = get_true_reg (&XEXP (SET_SRC (pat), 1));
2146 src2 = get_true_reg (&XEXP (SET_SRC (pat), 2));
2147
2148 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
2149 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
2150
2151 {
2152 rtx src_note [3];
2153 int i;
2154
2155 src_note[0] = 0;
2156 src_note[1] = src1_note;
2157 src_note[2] = src2_note;
2158
2159 if (STACK_REG_P (*src1))
2160 replace_reg (src1, get_hard_regnum (regstack, *src1));
2161 if (STACK_REG_P (*src2))
2162 replace_reg (src2, get_hard_regnum (regstack, *src2));
2163
2164 for (i = 1; i <= 2; i++)
2165 if (src_note [i])
2166 {
2167 /* If the register that dies is not at the top of stack, then
2168 move the top of stack to the dead reg */
2169 if (REGNO (XEXP (src_note[i], 0))
2170 != regstack->reg[regstack->top])
2171 {
2172 remove_regno_note (insn, REG_DEAD,
2173 REGNO (XEXP (src_note [i], 0)));
2174 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2175 emit_insn_after);
2176 }
2177 else
2178 {
2179 CLEAR_HARD_REG_BIT (regstack->reg_set,
2180 REGNO (XEXP (src_note[i], 0)));
2181 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
2182 regstack->top--;
2183 }
2184 }
2185 }
2186
2187 /* Make dest the top of stack. */
2188 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2189 replace_reg (dest, FIRST_STACK_REG);
2190
2191 break;
2192
2193 default:
2194 abort ();
2195 }
2196 }
2197 \f
2198 /* Substitute hard regnums for any stack regs in INSN, which has
2199 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2200 before the insn, and is updated with changes made here.
2201
2202 There are several requirements and assumptions about the use of
2203 stack-like regs in asm statements. These rules are enforced by
2204 record_asm_stack_regs; see comments there for details. Any
2205 asm_operands left in the RTL at this point may be assume to meet the
2206 requirements, since record_asm_stack_regs removes any problem asm. */
2207
2208 static void
2209 subst_asm_stack_regs (insn, regstack)
2210 rtx insn;
2211 stack regstack;
2212 {
2213 rtx body = PATTERN (insn);
2214 int alt;
2215
2216 rtx *note_reg; /* Array of note contents */
2217 rtx **note_loc; /* Address of REG field of each note */
2218 enum reg_note *note_kind; /* The type of each note */
2219
2220 rtx *clobber_reg;
2221 rtx **clobber_loc;
2222
2223 struct stack_def temp_stack;
2224 int n_notes;
2225 int n_clobbers;
2226 rtx note;
2227 int i;
2228 int n_inputs, n_outputs;
2229
2230 /* Find out what the constraints required. If no constraint
2231 alternative matches, that is a compiler bug: we should have caught
2232 such an insn during the life analysis pass (and reload should have
2233 caught it regardless). */
2234 extract_insn (insn);
2235 constrain_operands (1);
2236 alt = which_alternative;
2237
2238 preprocess_constraints ();
2239
2240 n_inputs = get_asm_operand_n_inputs (body);
2241 n_outputs = recog_n_operands - n_inputs;
2242
2243 if (alt < 0)
2244 abort ();
2245
2246 /* Strip SUBREGs here to make the following code simpler. */
2247 for (i = 0; i < recog_n_operands; i++)
2248 if (GET_CODE (recog_operand[i]) == SUBREG
2249 && GET_CODE (SUBREG_REG (recog_operand[i])) == REG)
2250 {
2251 recog_operand_loc[i] = & SUBREG_REG (recog_operand[i]);
2252 recog_operand[i] = SUBREG_REG (recog_operand[i]);
2253 }
2254
2255 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2256
2257 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2258 i++;
2259
2260 note_reg = (rtx *) alloca (i * sizeof (rtx));
2261 note_loc = (rtx **) alloca (i * sizeof (rtx *));
2262 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2263
2264 n_notes = 0;
2265 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2266 {
2267 rtx reg = XEXP (note, 0);
2268 rtx *loc = & XEXP (note, 0);
2269
2270 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2271 {
2272 loc = & SUBREG_REG (reg);
2273 reg = SUBREG_REG (reg);
2274 }
2275
2276 if (STACK_REG_P (reg)
2277 && (REG_NOTE_KIND (note) == REG_DEAD
2278 || REG_NOTE_KIND (note) == REG_UNUSED))
2279 {
2280 note_reg[n_notes] = reg;
2281 note_loc[n_notes] = loc;
2282 note_kind[n_notes] = REG_NOTE_KIND (note);
2283 n_notes++;
2284 }
2285 }
2286
2287 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2288
2289 n_clobbers = 0;
2290
2291 if (GET_CODE (body) == PARALLEL)
2292 {
2293 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
2294 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
2295
2296 for (i = 0; i < XVECLEN (body, 0); i++)
2297 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2298 {
2299 rtx clobber = XVECEXP (body, 0, i);
2300 rtx reg = XEXP (clobber, 0);
2301 rtx *loc = & XEXP (clobber, 0);
2302
2303 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2304 {
2305 loc = & SUBREG_REG (reg);
2306 reg = SUBREG_REG (reg);
2307 }
2308
2309 if (STACK_REG_P (reg))
2310 {
2311 clobber_reg[n_clobbers] = reg;
2312 clobber_loc[n_clobbers] = loc;
2313 n_clobbers++;
2314 }
2315 }
2316 }
2317
2318 bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack));
2319
2320 /* Put the input regs into the desired place in TEMP_STACK. */
2321
2322 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2323 if (STACK_REG_P (recog_operand[i])
2324 && reg_class_subset_p (recog_op_alt[i][alt].class,
2325 FLOAT_REGS)
2326 && recog_op_alt[i][alt].class != FLOAT_REGS)
2327 {
2328 /* If an operand needs to be in a particular reg in
2329 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2330 these constraints are for single register classes, and reload
2331 guaranteed that operand[i] is already in that class, we can
2332 just use REGNO (recog_operand[i]) to know which actual reg this
2333 operand needs to be in. */
2334
2335 int regno = get_hard_regnum (&temp_stack, recog_operand[i]);
2336
2337 if (regno < 0)
2338 abort ();
2339
2340 if (regno != REGNO (recog_operand[i]))
2341 {
2342 /* recog_operand[i] is not in the right place. Find it
2343 and swap it with whatever is already in I's place.
2344 K is where recog_operand[i] is now. J is where it should
2345 be. */
2346 int j, k, temp;
2347
2348 k = temp_stack.top - (regno - FIRST_STACK_REG);
2349 j = (temp_stack.top
2350 - (REGNO (recog_operand[i]) - FIRST_STACK_REG));
2351
2352 temp = temp_stack.reg[k];
2353 temp_stack.reg[k] = temp_stack.reg[j];
2354 temp_stack.reg[j] = temp;
2355 }
2356 }
2357
2358 /* emit insns before INSN to make sure the reg-stack is in the right
2359 order. */
2360
2361 change_stack (insn, regstack, &temp_stack, emit_insn_before);
2362
2363 /* Make the needed input register substitutions. Do death notes and
2364 clobbers too, because these are for inputs, not outputs. */
2365
2366 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2367 if (STACK_REG_P (recog_operand[i]))
2368 {
2369 int regnum = get_hard_regnum (regstack, recog_operand[i]);
2370
2371 if (regnum < 0)
2372 abort ();
2373
2374 replace_reg (recog_operand_loc[i], regnum);
2375 }
2376
2377 for (i = 0; i < n_notes; i++)
2378 if (note_kind[i] == REG_DEAD)
2379 {
2380 int regnum = get_hard_regnum (regstack, note_reg[i]);
2381
2382 if (regnum < 0)
2383 abort ();
2384
2385 replace_reg (note_loc[i], regnum);
2386 }
2387
2388 for (i = 0; i < n_clobbers; i++)
2389 {
2390 /* It's OK for a CLOBBER to reference a reg that is not live.
2391 Don't try to replace it in that case. */
2392 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2393
2394 if (regnum >= 0)
2395 {
2396 /* Sigh - clobbers always have QImode. But replace_reg knows
2397 that these regs can't be MODE_INT and will abort. Just put
2398 the right reg there without calling replace_reg. */
2399
2400 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2401 }
2402 }
2403
2404 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2405
2406 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2407 if (STACK_REG_P (recog_operand[i]))
2408 {
2409 /* An input reg is implicitly popped if it is tied to an
2410 output, or if there is a CLOBBER for it. */
2411 int j;
2412
2413 for (j = 0; j < n_clobbers; j++)
2414 if (operands_match_p (clobber_reg[j], recog_operand[i]))
2415 break;
2416
2417 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2418 {
2419 /* recog_operand[i] might not be at the top of stack. But that's
2420 OK, because all we need to do is pop the right number of regs
2421 off of the top of the reg-stack. record_asm_stack_regs
2422 guaranteed that all implicitly popped regs were grouped
2423 at the top of the reg-stack. */
2424
2425 CLEAR_HARD_REG_BIT (regstack->reg_set,
2426 regstack->reg[regstack->top]);
2427 regstack->top--;
2428 }
2429 }
2430
2431 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2432 Note that there isn't any need to substitute register numbers.
2433 ??? Explain why this is true. */
2434
2435 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2436 {
2437 /* See if there is an output for this hard reg. */
2438 int j;
2439
2440 for (j = 0; j < n_outputs; j++)
2441 if (STACK_REG_P (recog_operand[j]) && REGNO (recog_operand[j]) == i)
2442 {
2443 regstack->reg[++regstack->top] = i;
2444 SET_HARD_REG_BIT (regstack->reg_set, i);
2445 break;
2446 }
2447 }
2448
2449 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2450 input that the asm didn't implicitly pop. If the asm didn't
2451 implicitly pop an input reg, that reg will still be live.
2452
2453 Note that we can't use find_regno_note here: the register numbers
2454 in the death notes have already been substituted. */
2455
2456 for (i = 0; i < n_outputs; i++)
2457 if (STACK_REG_P (recog_operand[i]))
2458 {
2459 int j;
2460
2461 for (j = 0; j < n_notes; j++)
2462 if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2463 && note_kind[j] == REG_UNUSED)
2464 {
2465 insn = emit_pop_insn (insn, regstack, recog_operand[i],
2466 emit_insn_after);
2467 break;
2468 }
2469 }
2470
2471 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2472 if (STACK_REG_P (recog_operand[i]))
2473 {
2474 int j;
2475
2476 for (j = 0; j < n_notes; j++)
2477 if (REGNO (recog_operand[i]) == REGNO (note_reg[j])
2478 && note_kind[j] == REG_DEAD
2479 && TEST_HARD_REG_BIT (regstack->reg_set,
2480 REGNO (recog_operand[i])))
2481 {
2482 insn = emit_pop_insn (insn, regstack, recog_operand[i],
2483 emit_insn_after);
2484 break;
2485 }
2486 }
2487 }
2488 \f
2489 /* Substitute stack hard reg numbers for stack virtual registers in
2490 INSN. Non-stack register numbers are not changed. REGSTACK is the
2491 current stack content. Insns may be emitted as needed to arrange the
2492 stack for the 387 based on the contents of the insn. */
2493
2494 static void
2495 subst_stack_regs (insn, regstack)
2496 rtx insn;
2497 stack regstack;
2498 {
2499 register rtx *note_link, note;
2500 register int i;
2501
2502 if (GET_CODE (insn) == CALL_INSN)
2503 {
2504 int top = regstack->top;
2505
2506 /* If there are any floating point parameters to be passed in
2507 registers for this call, make sure they are in the right
2508 order. */
2509
2510 if (top >= 0)
2511 {
2512 straighten_stack (PREV_INSN (insn), regstack);
2513
2514 /* Now mark the arguments as dead after the call. */
2515
2516 while (regstack->top >= 0)
2517 {
2518 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2519 regstack->top--;
2520 }
2521 }
2522 }
2523
2524 /* Do the actual substitution if any stack regs are mentioned.
2525 Since we only record whether entire insn mentions stack regs, and
2526 subst_stack_regs_pat only works for patterns that contain stack regs,
2527 we must check each pattern in a parallel here. A call_value_pop could
2528 fail otherwise. */
2529
2530 if (stack_regs_mentioned (insn))
2531 {
2532 int n_operands = asm_noperands (PATTERN (insn));
2533 if (n_operands >= 0)
2534 {
2535 /* This insn is an `asm' with operands. Decode the operands,
2536 decide how many are inputs, and do register substitution.
2537 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2538
2539 subst_asm_stack_regs (insn, regstack);
2540 return;
2541 }
2542
2543 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2544 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2545 {
2546 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2547 {
2548 subst_stack_regs_pat (insn, regstack,
2549 XVECEXP (PATTERN (insn), 0, i));
2550
2551 /* subst_stack_regs_pat may have deleted a no-op insn. */
2552 if (GET_CODE (insn) == NOTE)
2553 break;
2554 }
2555 }
2556 else
2557 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2558 }
2559
2560 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2561 REG_UNUSED will already have been dealt with, so just return. */
2562
2563 if (GET_CODE (insn) == NOTE)
2564 return;
2565
2566 /* If there is a REG_UNUSED note on a stack register on this insn,
2567 the indicated reg must be popped. The REG_UNUSED note is removed,
2568 since the form of the newly emitted pop insn references the reg,
2569 making it no longer `unset'. */
2570
2571 note_link = &REG_NOTES(insn);
2572 for (note = *note_link; note; note = XEXP (note, 1))
2573 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2574 {
2575 *note_link = XEXP (note, 1);
2576 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2577 }
2578 else
2579 note_link = &XEXP (note, 1);
2580 }
2581 \f
2582 /* Change the organization of the stack so that it fits a new basic
2583 block. Some registers might have to be popped, but there can never be
2584 a register live in the new block that is not now live.
2585
2586 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2587 or emit_insn_after. OLD is the original stack layout, and NEW is
2588 the desired form. OLD is updated to reflect the code emitted, ie, it
2589 will be the same as NEW upon return.
2590
2591 This function will not preserve block_end[]. But that information
2592 is no longer needed once this has executed. */
2593
2594 static void
2595 change_stack (insn, old, new, when)
2596 rtx insn;
2597 stack old;
2598 stack new;
2599 rtx (*when)();
2600 {
2601 int reg;
2602
2603 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2604 If we are to insert after INSN, find the next insn, and insert before
2605 it. */
2606
2607 if (when == emit_insn_after)
2608 insn = NEXT_INSN (insn);
2609
2610 /* Pop any registers that are not needed in the new block. */
2611
2612 for (reg = old->top; reg >= 0; reg--)
2613 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2614 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2615 emit_insn_before);
2616
2617 if (new->top == -2)
2618 {
2619 /* If the new block has never been processed, then it can inherit
2620 the old stack order. */
2621
2622 new->top = old->top;
2623 bcopy (old->reg, new->reg, sizeof (new->reg));
2624 }
2625 else
2626 {
2627 /* This block has been entered before, and we must match the
2628 previously selected stack order. */
2629
2630 /* By now, the only difference should be the order of the stack,
2631 not their depth or liveliness. */
2632
2633 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2634
2635 abort ();
2636
2637 win:
2638
2639 if (old->top != new->top)
2640 abort ();
2641
2642 /* If the stack is not empty (new->top != -1), loop here emitting
2643 swaps until the stack is correct.
2644
2645 The worst case number of swaps emitted is N + 2, where N is the
2646 depth of the stack. In some cases, the reg at the top of
2647 stack may be correct, but swapped anyway in order to fix
2648 other regs. But since we never swap any other reg away from
2649 its correct slot, this algorithm will converge. */
2650
2651 if (new->top != -1)
2652 do
2653 {
2654 /* Swap the reg at top of stack into the position it is
2655 supposed to be in, until the correct top of stack appears. */
2656
2657 while (old->reg[old->top] != new->reg[new->top])
2658 {
2659 for (reg = new->top; reg >= 0; reg--)
2660 if (new->reg[reg] == old->reg[old->top])
2661 break;
2662
2663 if (reg == -1)
2664 abort ();
2665
2666 emit_swap_insn (insn, old,
2667 FP_MODE_REG (old->reg[reg], DFmode));
2668 }
2669
2670 /* See if any regs remain incorrect. If so, bring an
2671 incorrect reg to the top of stack, and let the while loop
2672 above fix it. */
2673
2674 for (reg = new->top; reg >= 0; reg--)
2675 if (new->reg[reg] != old->reg[reg])
2676 {
2677 emit_swap_insn (insn, old,
2678 FP_MODE_REG (old->reg[reg], DFmode));
2679 break;
2680 }
2681 } while (reg >= 0);
2682
2683 /* At this point there must be no differences. */
2684
2685 for (reg = old->top; reg >= 0; reg--)
2686 if (old->reg[reg] != new->reg[reg])
2687 abort ();
2688 }
2689 }
2690 \f
2691 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2692 found, ensure that a jump from INSN to the code_label to which the
2693 label_ref points ends up with the same stack as that at the
2694 code_label. Do this by inserting insns just before the code_label to
2695 pop and rotate the stack until it is in the correct order. REGSTACK
2696 is the order of the register stack in INSN.
2697
2698 Any code that is emitted here must not be later processed as part
2699 of any block, as it will already contain hard register numbers. */
2700
2701 static void
2702 goto_block_pat (insn, regstack, pat)
2703 rtx insn;
2704 stack regstack;
2705 rtx pat;
2706 {
2707 rtx label;
2708 rtx new_jump, new_label, new_barrier;
2709 rtx *ref;
2710 stack label_stack;
2711 struct stack_def temp_stack;
2712 int reg;
2713
2714 switch (GET_CODE (pat))
2715 {
2716 case RETURN:
2717 straighten_stack (PREV_INSN (insn), regstack);
2718 return;
2719 default:
2720 {
2721 int i, j;
2722 const char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2723
2724 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2725 {
2726 if (fmt[i] == 'e')
2727 goto_block_pat (insn, regstack, XEXP (pat, i));
2728 if (fmt[i] == 'E')
2729 for (j = 0; j < XVECLEN (pat, i); j++)
2730 goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2731 }
2732 return;
2733 }
2734 case LABEL_REF:;
2735 }
2736
2737 label = XEXP (pat, 0);
2738 if (GET_CODE (label) != CODE_LABEL)
2739 abort ();
2740
2741 /* First, see if in fact anything needs to be done to the stack at all. */
2742 if (INSN_UID (label) <= 0)
2743 return;
2744
2745 label_stack = &block_stack_in[BLOCK_NUM (label)];
2746
2747 if (label_stack->top == -2)
2748 {
2749 /* If the target block hasn't had a stack order selected, then
2750 we need merely ensure that no pops are needed. */
2751
2752 for (reg = regstack->top; reg >= 0; reg--)
2753 if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2754 break;
2755
2756 if (reg == -1)
2757 {
2758 /* change_stack will not emit any code in this case. */
2759
2760 change_stack (label, regstack, label_stack, emit_insn_after);
2761 return;
2762 }
2763 }
2764 else if (label_stack->top == regstack->top)
2765 {
2766 for (reg = label_stack->top; reg >= 0; reg--)
2767 if (label_stack->reg[reg] != regstack->reg[reg])
2768 break;
2769
2770 if (reg == -1)
2771 return;
2772 }
2773
2774 /* At least one insn will need to be inserted before label. Insert
2775 a jump around the code we are about to emit. Emit a label for the new
2776 code, and point the original insn at this new label. We can't use
2777 redirect_jump here, because we're using fld[4] of the code labels as
2778 LABEL_REF chains, no NUSES counters. */
2779
2780 new_jump = emit_jump_insn_before (gen_jump (label), label);
2781 record_label_references (new_jump, PATTERN (new_jump));
2782 JUMP_LABEL (new_jump) = label;
2783
2784 new_barrier = emit_barrier_after (new_jump);
2785
2786 new_label = gen_label_rtx ();
2787 emit_label_after (new_label, new_barrier);
2788 LABEL_REFS (new_label) = new_label;
2789
2790 /* The old label_ref will no longer point to the code_label if now uses,
2791 so strip the label_ref from the code_label's chain of references. */
2792
2793 for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2794 if (*ref == pat)
2795 break;
2796
2797 if (*ref == label)
2798 abort ();
2799
2800 *ref = LABEL_NEXTREF (*ref);
2801
2802 XEXP (pat, 0) = new_label;
2803 record_label_references (insn, PATTERN (insn));
2804
2805 if (JUMP_LABEL (insn) == label)
2806 JUMP_LABEL (insn) = new_label;
2807
2808 /* Now emit the needed code. */
2809
2810 temp_stack = *regstack;
2811
2812 change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2813 }
2814 \f
2815 /* Traverse all basic blocks in a function, converting the register
2816 references in each insn from the "flat" register file that gcc uses, to
2817 the stack-like registers the 387 uses. */
2818
2819 static void
2820 convert_regs ()
2821 {
2822 register int block, reg;
2823 register rtx insn, next;
2824 struct stack_def regstack;
2825
2826 for (block = 0; block < blocks; block++)
2827 {
2828 if (block_stack_in[block].top == -2)
2829 {
2830 /* This block has not been previously encountered. Choose a
2831 default mapping for any stack regs live on entry */
2832
2833 block_stack_in[block].top = -1;
2834
2835 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2836 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2837 block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2838 }
2839
2840 /* Process all insns in this block. Keep track of `next' here,
2841 so that we don't process any insns emitted while making
2842 substitutions in INSN. */
2843
2844 next = block_begin[block];
2845 regstack = block_stack_in[block];
2846 do
2847 {
2848 insn = next;
2849 next = NEXT_INSN (insn);
2850
2851 /* Don't bother processing unless there is a stack reg
2852 mentioned or if it's a CALL_INSN (register passing of
2853 floating point values). */
2854
2855 if (stack_regs_mentioned (insn) || GET_CODE (insn) == CALL_INSN)
2856 subst_stack_regs (insn, &regstack);
2857
2858 } while (insn != block_end[block]);
2859
2860 /* For all further actions, INSN needs to be the last insn in
2861 this basic block. If subst_stack_regs inserted additional
2862 instructions after INSN, it is no longer the last one at
2863 this point. */
2864 next = PREV_INSN (next);
2865
2866 /* If subst_stack_regs inserted something after a JUMP_INSN, that
2867 is almost certainly a bug. */
2868 if (GET_CODE (insn) == JUMP_INSN && insn != next)
2869 abort ();
2870 insn = next;
2871
2872 /* Something failed if the stack life doesn't match. */
2873
2874 GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2875
2876 abort ();
2877
2878 win:
2879
2880 /* Adjust the stack of this block on exit to match the stack of
2881 the target block, or copy stack information into stack of
2882 jump target if the target block's stack order hasn't been set
2883 yet. */
2884
2885 if (GET_CODE (insn) == JUMP_INSN)
2886 goto_block_pat (insn, &regstack, PATTERN (insn));
2887
2888 /* Likewise handle the case where we fall into the next block. */
2889
2890 if ((block < blocks - 1) && block_drops_in[block+1])
2891 change_stack (insn, &regstack, &block_stack_in[block+1],
2892 emit_insn_after);
2893 }
2894
2895 /* If the last basic block is the end of a loop, and that loop has
2896 regs live at its start, then the last basic block will have regs live
2897 at its end that need to be popped before the function returns. */
2898
2899 {
2900 int value_reg_low, value_reg_high;
2901 value_reg_low = value_reg_high = -1;
2902 {
2903 rtx retvalue;
2904 if ((retvalue = stack_result (current_function_decl)))
2905 {
2906 value_reg_low = REGNO (retvalue);
2907 value_reg_high = value_reg_low +
2908 HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2909 }
2910
2911 }
2912 for (reg = regstack.top; reg >= 0; reg--)
2913 if (regstack.reg[reg] < value_reg_low
2914 || regstack.reg[reg] > value_reg_high)
2915 insn = emit_pop_insn (insn, &regstack,
2916 FP_MODE_REG (regstack.reg[reg], DFmode),
2917 emit_insn_after);
2918 }
2919 straighten_stack (insn, &regstack);
2920 }
2921 \f
2922 /* Check expression PAT, which is in INSN, for label references. if
2923 one is found, print the block number of destination to FILE. */
2924
2925 static void
2926 print_blocks (file, insn, pat)
2927 FILE *file;
2928 rtx insn, pat;
2929 {
2930 register RTX_CODE code = GET_CODE (pat);
2931 register int i;
2932 register const char *fmt;
2933
2934 if (code == LABEL_REF)
2935 {
2936 register rtx label = XEXP (pat, 0);
2937
2938 if (GET_CODE (label) != CODE_LABEL)
2939 abort ();
2940
2941 fprintf (file, " %d", BLOCK_NUM (label));
2942
2943 return;
2944 }
2945
2946 fmt = GET_RTX_FORMAT (code);
2947 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2948 {
2949 if (fmt[i] == 'e')
2950 print_blocks (file, insn, XEXP (pat, i));
2951 if (fmt[i] == 'E')
2952 {
2953 register int j;
2954 for (j = 0; j < XVECLEN (pat, i); j++)
2955 print_blocks (file, insn, XVECEXP (pat, i, j));
2956 }
2957 }
2958 }
2959 \f
2960 /* Write information about stack registers and stack blocks into FILE.
2961 This is part of making a debugging dump. */
2962
2963 static void
2964 dump_stack_info (file)
2965 FILE *file;
2966 {
2967 register int block;
2968
2969 fprintf (file, "\n%d stack blocks.\n", blocks);
2970 for (block = 0; block < blocks; block++)
2971 {
2972 register rtx head, jump, end;
2973 register int regno;
2974
2975 fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
2976 block, INSN_UID (block_begin[block]),
2977 INSN_UID (block_end[block]));
2978
2979 head = block_begin[block];
2980
2981 fprintf (file, "Reached from blocks: ");
2982 if (GET_CODE (head) == CODE_LABEL)
2983 for (jump = LABEL_REFS (head);
2984 jump != head;
2985 jump = LABEL_NEXTREF (jump))
2986 {
2987 register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2988 fprintf (file, " %d", from_block);
2989 }
2990 if (block_drops_in[block])
2991 fprintf (file, " previous");
2992
2993 fprintf (file, "\nlive stack registers on block entry: ");
2994 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
2995 {
2996 if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
2997 fprintf (file, "%d ", regno);
2998 }
2999
3000 fprintf (file, "\nlive stack registers on block exit: ");
3001 for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++)
3002 {
3003 if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
3004 fprintf (file, "%d ", regno);
3005 }
3006
3007 end = block_end[block];
3008
3009 fprintf (file, "\nJumps to blocks: ");
3010 if (GET_CODE (end) == JUMP_INSN)
3011 print_blocks (file, end, PATTERN (end));
3012
3013 if (block + 1 < blocks && block_drops_in[block+1])
3014 fprintf (file, " next");
3015 else if (block + 1 == blocks
3016 || (GET_CODE (end) == JUMP_INSN
3017 && GET_CODE (PATTERN (end)) == RETURN))
3018 fprintf (file, " return");
3019
3020 fprintf (file, "\n");
3021 }
3022 }
3023 #endif /* STACK_REGS */