1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
24 * The form of the input:
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
44 * The form of the output:
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
77 Before life analysis, the mode of each insn is set based on whether
78 or not any stack registers are mentioned within that insn. VOIDmode
79 means that no regs are mentioned anyway, and QImode means that at
80 least one pattern within the insn mentions stack registers. This
81 information is valid until after reg_to_stack returns, and is used
86 There are several rules on the usage of stack-like regs in
87 asm_operands insns. These rules apply only to the operands that are
90 1. Given a set of input regs that die in an asm_operands, it is
91 necessary to know which are implicitly popped by the asm, and
92 which must be explicitly popped by gcc.
94 An input reg that is implicitly popped by the asm must be
95 explicitly clobbered, unless it is constrained to match an
98 2. For any input reg that is implicitly popped by an asm, it is
99 necessary to know how to adjust the stack to compensate for the pop.
100 If any non-popped input is closer to the top of the reg-stack than
101 the implicitly popped reg, it would not be possible to know what the
102 stack looked like - it's not clear how the rest of the stack "slides
105 All implicitly popped input regs must be closer to the top of
106 the reg-stack than any input that is not implicitly popped.
108 3. It is possible that if an input dies in an insn, reload might
109 use the input reg for an output reload. Consider this example:
111 asm ("foo" : "=t" (a) : "f" (b));
113 This asm says that input B is not popped by the asm, and that
114 the asm pushes a result onto the reg-stack, ie, the stack is one
115 deeper after the asm than it was before. But, it is possible that
116 reload will think that it can use the same reg for both the input and
117 the output, if input B dies in this insn.
119 If any input operand uses the "f" constraint, all output reg
120 constraints must use the "&" earlyclobber.
122 The asm above would be written as
124 asm ("foo" : "=&t" (a) : "f" (b));
126 4. Some operands need to be in particular places on the stack. All
127 output operands fall in this category - there is no other way to
128 know which regs the outputs appear in unless the user indicates
129 this in the constraints.
131 Output operands must specifically indicate which reg an output
132 appears in after an asm. "=f" is not allowed: the operand
133 constraints must select a class with a single reg.
135 5. Output operands may not be "inserted" between existing stack regs.
136 Since no 387 opcode uses a read/write operand, all output operands
137 are dead before the asm_operands, and are pushed by the asm_operands.
138 It makes no sense to push anywhere but the top of the reg-stack.
140 Output operands must start at the top of the reg-stack: output
141 operands may not "skip" a reg.
143 6. Some asm statements may need extra stack space for internal
144 calculations. This can be guaranteed by clobbering stack registers
145 unrelated to the inputs and outputs.
147 Here are a couple of reasonable asms to want to write. This asm
148 takes one input, which is internally popped, and produces two outputs.
150 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
152 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
153 and replaces them with one output. The user must code the "st(1)"
154 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
156 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
164 #include "insn-config.h"
166 #include "hard-reg-set.h"
168 #include "insn-flags.h"
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
181 REG_SET indicates which registers are live. */
183 typedef struct stack_def
185 int top
; /* index to top stack element */
186 HARD_REG_SET reg_set
; /* set of live registers */
187 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
190 /* highest instruction uid */
191 static int max_uid
= 0;
193 /* Number of basic blocks in the current function. */
196 /* Element N is first insn in basic block N.
197 This info lasts until we finish compiling the function. */
198 static rtx
*block_begin
;
200 /* Element N is last insn in basic block N.
201 This info lasts until we finish compiling the function. */
202 static rtx
*block_end
;
204 /* Element N is nonzero if control can drop into basic block N */
205 static char *block_drops_in
;
207 /* Element N says all about the stack at entry block N */
208 static stack block_stack_in
;
210 /* Element N says all about the stack life at the end of block N */
211 static HARD_REG_SET
*block_out_reg_set
;
213 /* This is where the BLOCK_NUM values are really stored. This is set
214 up by find_blocks and used there and in life_analysis. It can be used
215 later, but only to look up an insn that is the head or tail of some
216 block. life_analysis and the stack register conversion process can
217 add insns within a block. */
218 static int *block_number
;
220 /* This is the register file for all register after conversion */
222 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
227 /* Get the basic block number of an insn. See note at block_number
228 definition are validity of this information. */
230 #define BLOCK_NUM(INSN) \
231 ((INSN_UID (INSN) > max_uid) \
232 ? (abort() , -1) : block_number[INSN_UID (INSN)])
234 extern rtx forced_labels
;
236 /* Forward declarations */
238 static void mark_regs_pat
PROTO((rtx
, HARD_REG_SET
*));
239 static void straighten_stack
PROTO((rtx
, stack
));
240 static void record_label_references
PROTO((rtx
, rtx
));
241 static rtx
*get_true_reg
PROTO((rtx
*));
242 static int constrain_asm_operands
PROTO((int, rtx
*, char **, int *,
245 static void record_asm_reg_life
PROTO((rtx
,stack
, rtx
*, char **,
247 static void record_reg_life_pat
PROTO((rtx
, HARD_REG_SET
*,
248 HARD_REG_SET
*, int));
249 static void get_asm_operand_lengths
PROTO((rtx
, int, int *, int *));
250 static void record_reg_life
PROTO((rtx
, int, stack
));
251 static void find_blocks
PROTO((rtx
));
252 static rtx stack_result
PROTO((tree
));
253 static void stack_reg_life_analysis
PROTO((rtx
, HARD_REG_SET
*));
254 static void replace_reg
PROTO((rtx
*, int));
255 static void remove_regno_note
PROTO((rtx
, enum reg_note
, int));
256 static int get_hard_regnum
PROTO((stack
, rtx
));
257 static void delete_insn_for_stacker
PROTO((rtx
));
258 static rtx emit_pop_insn
PROTO((rtx
, stack
, rtx
, rtx (*) ()));
259 static void emit_swap_insn
PROTO((rtx
, stack
, rtx
));
260 static void move_for_stack_reg
PROTO((rtx
, stack
, rtx
));
261 static void swap_rtx_condition
PROTO((rtx
));
262 static void compare_for_stack_reg
PROTO((rtx
, stack
, rtx
));
263 static void subst_stack_regs_pat
PROTO((rtx
, stack
, rtx
));
264 static void subst_asm_stack_regs
PROTO((rtx
, stack
, rtx
*, rtx
**,
266 static void subst_stack_regs
PROTO((rtx
, stack
));
267 static void change_stack
PROTO((rtx
, stack
, stack
, rtx (*) ()));
269 static void goto_block_pat
PROTO((rtx
, stack
, rtx
));
270 static void convert_regs
PROTO((void));
271 static void print_blocks
PROTO((FILE *, rtx
, rtx
));
272 static void dump_stack_info
PROTO((FILE *));
274 /* Mark all registers needed for this pattern. */
277 mark_regs_pat (pat
, set
)
281 enum machine_mode mode
;
285 if (GET_CODE (pat
) == SUBREG
)
287 mode
= GET_MODE (pat
);
288 regno
= SUBREG_WORD (pat
);
289 regno
+= REGNO (SUBREG_REG (pat
));
292 regno
= REGNO (pat
), mode
= GET_MODE (pat
);
294 for (count
= HARD_REGNO_NREGS (regno
, mode
);
295 count
; count
--, regno
++)
296 SET_HARD_REG_BIT (*set
, regno
);
299 /* Reorganise the stack into ascending numbers,
303 straighten_stack (insn
, regstack
)
307 struct stack_def temp_stack
;
310 temp_stack
.reg_set
= regstack
->reg_set
;
312 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
313 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
315 change_stack (insn
, regstack
, &temp_stack
, emit_insn_after
);
318 /* Pop a register from the stack */
321 pop_stack (regstack
, regno
)
325 int top
= regstack
->top
;
327 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
329 /* If regno was not at the top of stack then adjust stack */
330 if (regstack
->reg
[top
] != regno
)
333 for (i
= regstack
->top
; i
>= 0; i
--)
334 if (regstack
->reg
[i
] == regno
)
337 for (j
= i
; j
< top
; j
++)
338 regstack
->reg
[j
] = regstack
->reg
[j
+ 1];
344 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
347 stack_regs_mentioned_p (pat
)
353 if (STACK_REG_P (pat
))
356 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
357 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
363 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
364 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
367 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
374 /* Convert register usage from "flat" register file usage to a "stack
375 register file. FIRST is the first insn in the function, FILE is the
378 First compute the beginning and end of each basic block. Do a
379 register life analysis on the stack registers, recording the result
380 for the head and tail of each basic block. The convert each insn one
381 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
382 any cross-jumping created when the converter inserts pop insns.*/
385 reg_to_stack (first
, file
)
391 int stack_reg_seen
= 0;
392 enum machine_mode mode
;
393 HARD_REG_SET stackentry
;
395 CLEAR_HARD_REG_SET (stackentry
);
398 static int initialised
;
402 initialised
= 1; /* This array can not have been previously
403 initialised, because the rtx's are
404 thrown away between compilations of
407 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
409 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
410 mode
= GET_MODE_WIDER_MODE (mode
))
411 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
412 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
); mode
!= VOIDmode
;
413 mode
= GET_MODE_WIDER_MODE (mode
))
414 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
419 /* Count the basic blocks. Also find maximum insn uid. */
421 register RTX_CODE prev_code
= BARRIER
;
422 register RTX_CODE code
;
423 register int before_function_beg
= 1;
427 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
429 /* Note that this loop must select the same block boundaries
430 as code in find_blocks. Also note that this code is not the
431 same as that used in flow.c. */
433 if (INSN_UID (insn
) > max_uid
)
434 max_uid
= INSN_UID (insn
);
436 code
= GET_CODE (insn
);
438 if (code
== CODE_LABEL
439 || (prev_code
!= INSN
440 && prev_code
!= CALL_INSN
441 && prev_code
!= CODE_LABEL
442 && GET_RTX_CLASS (code
) == 'i'))
445 if (code
== NOTE
&& NOTE_LINE_NUMBER (insn
) == NOTE_INSN_FUNCTION_BEG
)
446 before_function_beg
= 0;
448 /* Remember whether or not this insn mentions an FP regs.
449 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
451 if (GET_RTX_CLASS (code
) == 'i'
452 && stack_regs_mentioned_p (PATTERN (insn
)))
455 PUT_MODE (insn
, QImode
);
457 /* Note any register passing parameters. */
459 if (before_function_beg
&& code
== INSN
460 && GET_CODE (PATTERN (insn
)) == USE
)
461 record_reg_life_pat (PATTERN (insn
), (HARD_REG_SET
*) 0,
465 PUT_MODE (insn
, VOIDmode
);
467 if (code
== CODE_LABEL
)
468 LABEL_REFS (insn
) = insn
; /* delete old chain */
475 /* If no stack register reference exists in this insn, there isn't
476 anything to convert. */
478 if (! stack_reg_seen
)
481 /* If there are stack registers, there must be at least one block. */
486 /* Allocate some tables that last till end of compiling this function
487 and some needed only in find_blocks and life_analysis. */
489 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
490 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
491 block_drops_in
= (char *) alloca (blocks
);
493 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
494 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
495 bzero ((char *) block_stack_in
, blocks
* sizeof (struct stack_def
));
496 bzero ((char *) block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
498 block_number
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
501 stack_reg_life_analysis (first
, &stackentry
);
503 /* Dump the life analysis debug information before jump
504 optimization, as that will destroy the LABEL_REFS we keep the
508 dump_stack_info (file
);
513 jump_optimize (first
, 2, 0, 0);
516 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
517 label's chain of references, and note which insn contains each
521 record_label_references (insn
, pat
)
524 register enum rtx_code code
= GET_CODE (pat
);
528 if (code
== LABEL_REF
)
530 register rtx label
= XEXP (pat
, 0);
533 if (GET_CODE (label
) != CODE_LABEL
)
536 /* If this is an undefined label, LABEL_REFS (label) contains
538 if (INSN_UID (label
) == 0)
541 /* Don't make a duplicate in the code_label's chain. */
543 for (ref
= LABEL_REFS (label
);
545 ref
= LABEL_NEXTREF (ref
))
546 if (CONTAINING_INSN (ref
) == insn
)
549 CONTAINING_INSN (pat
) = insn
;
550 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
551 LABEL_REFS (label
) = pat
;
556 fmt
= GET_RTX_FORMAT (code
);
557 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
560 record_label_references (insn
, XEXP (pat
, i
));
564 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
565 record_label_references (insn
, XVECEXP (pat
, i
, j
));
570 /* Return a pointer to the REG expression within PAT. If PAT is not a
571 REG, possible enclosed by a conversion rtx, return the inner part of
572 PAT that stopped the search. */
579 switch (GET_CODE (*pat
))
582 /* eliminate FP subregister accesses in favour of the
583 actual FP register in use. */
586 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
588 *pat
= FP_MODE_REG (REGNO (subreg
) + SUBREG_WORD (*pat
),
597 pat
= & XEXP (*pat
, 0);
601 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
602 N_OPERANDS is the total number of operands. Return which alternative
603 matched, or -1 is no alternative matches.
605 OPERAND_MATCHES is an array which indicates which operand this
606 operand matches due to the constraints, or -1 if no match is required.
607 If two operands match by coincidence, but are not required to match by
608 the constraints, -1 is returned.
610 OPERAND_CLASS is an array which indicates the smallest class
611 required by the constraints. If the alternative that matches calls
612 for some class `class', and the operand matches a subclass of `class',
613 OPERAND_CLASS is set to `class' as required by the constraints, not to
614 the subclass. If an alternative allows more than one class,
615 OPERAND_CLASS is set to the smallest class that is a union of the
619 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
620 operand_matches
, operand_class
)
623 char **operand_constraints
;
624 int *operand_matches
;
625 enum reg_class
*operand_class
;
627 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
629 int this_alternative
, this_operand
;
633 for (j
= 0; j
< n_operands
; j
++)
634 constraints
[j
] = operand_constraints
[j
];
636 /* Compute the number of alternatives in the operands. reload has
637 already guaranteed that all operands have the same number of
645 for (q
= constraints
[0]; *q
; q
++)
646 n_alternatives
+= (*q
== ',');
649 this_alternative
= 0;
650 while (this_alternative
< n_alternatives
)
655 /* No operands match, no narrow class requirements yet. */
656 for (i
= 0; i
< n_operands
; i
++)
658 operand_matches
[i
] = -1;
659 operand_class
[i
] = NO_REGS
;
662 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
664 rtx op
= operands
[this_operand
];
665 enum machine_mode mode
= GET_MODE (op
);
666 char *p
= constraints
[this_operand
];
671 if (GET_CODE (op
) == SUBREG
)
673 if (GET_CODE (SUBREG_REG (op
)) == REG
674 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
675 offset
= SUBREG_WORD (op
);
676 op
= SUBREG_REG (op
);
679 /* An empty constraint or empty alternative
680 allows anything which matched the pattern. */
681 if (*p
== 0 || *p
== ',')
684 while (*p
&& (c
= *p
++) != ',')
698 /* Ignore rest of this alternative. */
699 while (*p
&& *p
!= ',') p
++;
708 /* This operand must be the same as a previous one.
709 This kind of constraint is used for instructions such
710 as add when they take only two operands.
712 Note that the lower-numbered operand is passed first. */
714 if (operands_match_p (operands
[c
- '0'],
715 operands
[this_operand
]))
717 operand_matches
[this_operand
] = c
- '0';
723 /* p is used for address_operands. Since this is an asm,
724 just to make sure that the operand is valid for Pmode. */
726 if (strict_memory_address_p (Pmode
, op
))
731 /* Anything goes unless it is a REG and really has a hard reg
732 but the hard reg is not in the class GENERAL_REGS. */
733 if (GENERAL_REGS
== ALL_REGS
734 || GET_CODE (op
) != REG
735 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
737 if (GET_CODE (op
) == REG
)
738 operand_class
[this_operand
]
739 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
745 if (GET_CODE (op
) == REG
746 && (GENERAL_REGS
== ALL_REGS
747 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
749 operand_class
[this_operand
]
750 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
756 /* This is used for a MATCH_SCRATCH in the cases when we
757 don't actually need anything. So anything goes any time. */
762 if (GET_CODE (op
) == MEM
)
767 if (GET_CODE (op
) == MEM
768 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
769 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
774 if (GET_CODE (op
) == MEM
775 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
776 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
781 /* Match any CONST_DOUBLE, but only if
782 we can examine the bits of it reliably. */
783 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
784 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
785 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
787 if (GET_CODE (op
) == CONST_DOUBLE
)
792 if (GET_CODE (op
) == CONST_DOUBLE
)
798 if (GET_CODE (op
) == CONST_DOUBLE
799 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
804 if (GET_CODE (op
) == CONST_INT
805 || (GET_CODE (op
) == CONST_DOUBLE
806 && GET_MODE (op
) == VOIDmode
))
815 if (GET_CODE (op
) == CONST_INT
816 || (GET_CODE (op
) == CONST_DOUBLE
817 && GET_MODE (op
) == VOIDmode
))
829 if (GET_CODE (op
) == CONST_INT
830 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
834 #ifdef EXTRA_CONSTRAINT
840 if (EXTRA_CONSTRAINT (op
, c
))
846 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
851 if (offsettable_memref_p (op
))
856 if (GET_CODE (op
) == REG
857 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
860 operand_class
[this_operand
]
861 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
866 constraints
[this_operand
] = p
;
867 /* If this operand did not win somehow,
868 this alternative loses. */
872 /* This alternative won; the operands are ok.
873 Change whichever operands this alternative says to change. */
880 /* For operands constrained to match another operand, copy the other
881 operand's class to this operand's class. */
882 for (j
= 0; j
< n_operands
; j
++)
883 if (operand_matches
[j
] >= 0)
884 operand_class
[j
] = operand_class
[operand_matches
[j
]];
886 return this_alternative
== n_alternatives
? -1 : this_alternative
;
889 /* Record the life info of each stack reg in INSN, updating REGSTACK.
890 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
891 is an array of the constraint strings used in the asm statement.
892 OPERANDS is an array of all operands for the insn, and is assumed to
893 contain all output operands, then all inputs operands.
895 There are many rules that an asm statement for stack-like regs must
896 follow. Those rules are explained at the top of this file: the rule
897 numbers below refer to that explanation. */
900 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
906 int n_inputs
, n_outputs
;
909 int n_operands
= n_inputs
+ n_outputs
;
910 int first_input
= n_outputs
;
912 int malformed_asm
= 0;
913 rtx body
= PATTERN (insn
);
915 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
917 enum reg_class
*operand_class
918 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
920 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
921 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
925 /* Find out what the constraints require. If no constraint
926 alternative matches, this asm is malformed. */
927 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
928 operand_matches
, operand_class
);
932 /* Strip SUBREGs here to make the following code simpler. */
933 for (i
= 0; i
< n_operands
; i
++)
934 if (GET_CODE (operands
[i
]) == SUBREG
935 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
936 operands
[i
] = SUBREG_REG (operands
[i
]);
938 /* Set up CLOBBER_REG. */
942 if (GET_CODE (body
) == PARALLEL
)
944 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
946 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
947 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
949 rtx clobber
= XVECEXP (body
, 0, i
);
950 rtx reg
= XEXP (clobber
, 0);
952 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
953 reg
= SUBREG_REG (reg
);
955 if (STACK_REG_P (reg
))
957 clobber_reg
[n_clobbers
] = reg
;
963 /* Enforce rule #4: Output operands must specifically indicate which
964 reg an output appears in after an asm. "=f" is not allowed: the
965 operand constraints must select a class with a single reg.
967 Also enforce rule #5: Output operands must start at the top of
968 the reg-stack: output operands may not "skip" a reg. */
970 bzero ((char *) reg_used_as_output
, sizeof (reg_used_as_output
));
971 for (i
= 0; i
< n_outputs
; i
++)
972 if (STACK_REG_P (operands
[i
]))
974 if (reg_class_size
[(int) operand_class
[i
]] != 1)
976 error_for_asm (insn
, "Output constraint %d must specify a single register", i
);
980 reg_used_as_output
[REGNO (operands
[i
])] = 1;
984 /* Search for first non-popped reg. */
985 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
986 if (! reg_used_as_output
[i
])
989 /* If there are any other popped regs, that's an error. */
990 for (; i
< LAST_STACK_REG
+ 1; i
++)
991 if (reg_used_as_output
[i
])
994 if (i
!= LAST_STACK_REG
+ 1)
996 error_for_asm (insn
, "Output regs must be grouped at top of stack");
1000 /* Enforce rule #2: All implicitly popped input regs must be closer
1001 to the top of the reg-stack than any input that is not implicitly
1004 bzero ((char *) implicitly_dies
, sizeof (implicitly_dies
));
1005 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
1006 if (STACK_REG_P (operands
[i
]))
1008 /* An input reg is implicitly popped if it is tied to an
1009 output, or if there is a CLOBBER for it. */
1012 for (j
= 0; j
< n_clobbers
; j
++)
1013 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
1016 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
1017 implicitly_dies
[REGNO (operands
[i
])] = 1;
1020 /* Search for first non-popped reg. */
1021 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
1022 if (! implicitly_dies
[i
])
1025 /* If there are any other popped regs, that's an error. */
1026 for (; i
< LAST_STACK_REG
+ 1; i
++)
1027 if (implicitly_dies
[i
])
1030 if (i
!= LAST_STACK_REG
+ 1)
1032 error_for_asm (insn
,
1033 "Implicitly popped regs must be grouped at top of stack");
1037 /* Enfore rule #3: If any input operand uses the "f" constraint, all
1038 output constraints must use the "&" earlyclobber.
1040 ??? Detect this more deterministically by having constraint_asm_operands
1041 record any earlyclobber. */
1043 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
1044 if (operand_matches
[i
] == -1)
1048 for (j
= 0; j
< n_outputs
; j
++)
1049 if (operands_match_p (operands
[j
], operands
[i
]))
1051 error_for_asm (insn
,
1052 "Output operand %d must use `&' constraint", j
);
1059 /* Avoid further trouble with this insn. */
1060 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1061 PUT_MODE (insn
, VOIDmode
);
1065 /* Process all outputs */
1066 for (i
= 0; i
< n_outputs
; i
++)
1068 rtx op
= operands
[i
];
1070 if (! STACK_REG_P (op
))
1072 if (stack_regs_mentioned_p (op
))
1078 /* Each destination is dead before this insn. If the
1079 destination is not used after this insn, record this with
1082 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
1083 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_UNUSED
, op
,
1086 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
1089 /* Process all inputs */
1090 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
1092 if (! STACK_REG_P (operands
[i
]))
1094 if (stack_regs_mentioned_p (operands
[i
]))
1100 /* If an input is dead after the insn, record a death note.
1101 But don't record a death note if there is already a death note,
1102 or if the input is also an output. */
1104 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
1105 && operand_matches
[i
] == -1
1106 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])) == NULL_RTX
)
1107 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
, operands
[i
],
1110 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
1114 /* Scan PAT, which is part of INSN, and record registers appearing in
1115 a SET_DEST in DEST, and other registers in SRC.
1117 This function does not know about SET_DESTs that are both input and
1118 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
1121 record_reg_life_pat (pat
, src
, dest
, douse
)
1123 HARD_REG_SET
*src
, *dest
;
1129 if (STACK_REG_P (pat
)
1130 || (GET_CODE (pat
) == SUBREG
&& STACK_REG_P (SUBREG_REG (pat
))))
1133 mark_regs_pat (pat
, src
);
1136 mark_regs_pat (pat
, dest
);
1141 if (GET_CODE (pat
) == SET
)
1143 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
, 0);
1144 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
, 0);
1148 /* We don't need to consider either of these cases. */
1149 if ((GET_CODE (pat
) == USE
&& !douse
) || GET_CODE (pat
) == CLOBBER
)
1152 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1153 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1159 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1160 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
, 0);
1162 else if (fmt
[i
] == 'e')
1163 record_reg_life_pat (XEXP (pat
, i
), src
, dest
, 0);
1167 /* Calculate the number of inputs and outputs in BODY, an
1168 asm_operands. N_OPERANDS is the total number of operands, and
1169 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1173 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1176 int *n_inputs
, *n_outputs
;
1178 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1179 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1181 else if (GET_CODE (body
) == ASM_OPERANDS
)
1182 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1184 else if (GET_CODE (body
) == PARALLEL
1185 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1186 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1188 else if (GET_CODE (body
) == PARALLEL
1189 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1190 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1194 *n_outputs
= n_operands
- *n_inputs
;
1197 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1198 registers in REGSTACK. This function is called to process insns from
1199 the last insn in a block to the first. The actual scanning is done in
1200 record_reg_life_pat.
1202 If a register is live after a CALL_INSN, but is not a value return
1203 register for that CALL_INSN, then code is emitted to initialize that
1204 register. The block_end[] data is kept accurate.
1206 Existing death and unset notes for stack registers are deleted
1207 before processing the insn. */
1210 record_reg_life (insn
, block
, regstack
)
1215 rtx note
, *note_link
;
1218 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1219 || INSN_DELETED_P (insn
))
1222 /* Strip death notes for stack regs from this insn */
1224 note_link
= ®_NOTES(insn
);
1225 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1226 if (STACK_REG_P (XEXP (note
, 0))
1227 && (REG_NOTE_KIND (note
) == REG_DEAD
1228 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1229 *note_link
= XEXP (note
, 1);
1231 note_link
= &XEXP (note
, 1);
1233 /* Process all patterns in the insn. */
1235 n_operands
= asm_noperands (PATTERN (insn
));
1236 if (n_operands
>= 0)
1238 /* This insn is an `asm' with operands. Decode the operands,
1239 decide how many are inputs, and record the life information. */
1241 rtx operands
[MAX_RECOG_OPERANDS
];
1242 rtx body
= PATTERN (insn
);
1243 int n_inputs
, n_outputs
;
1244 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1246 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1247 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1248 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1249 n_inputs
, n_outputs
);
1254 HARD_REG_SET src
, dest
;
1257 CLEAR_HARD_REG_SET (src
);
1258 CLEAR_HARD_REG_SET (dest
);
1260 if (GET_CODE (insn
) == CALL_INSN
)
1261 for (note
= CALL_INSN_FUNCTION_USAGE (insn
);
1263 note
= XEXP (note
, 1))
1264 if (GET_CODE (XEXP (note
, 0)) == USE
)
1265 record_reg_life_pat (SET_DEST (XEXP (note
, 0)), &src
, NULL_PTR
, 0);
1267 record_reg_life_pat (PATTERN (insn
), &src
, &dest
, 0);
1268 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1269 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1271 if (TEST_HARD_REG_BIT (src
, regno
)
1272 && ! TEST_HARD_REG_BIT (dest
, regno
))
1273 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
,
1274 FP_MODE_REG (regno
, DFmode
),
1276 else if (TEST_HARD_REG_BIT (dest
, regno
))
1277 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_UNUSED
,
1278 FP_MODE_REG (regno
, DFmode
),
1282 if (GET_CODE (insn
) == CALL_INSN
)
1286 /* There might be a reg that is live after a function call.
1287 Initialize it to zero so that the program does not crash. See
1288 comment towards the end of stack_reg_life_analysis(). */
1290 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
1291 if (! TEST_HARD_REG_BIT (dest
, reg
)
1292 && TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1296 /* The insn will use virtual register numbers, and so
1297 convert_regs is expected to process these. But BLOCK_NUM
1298 cannot be used on these insns, because they do not appear in
1301 pat
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (reg
, DFmode
),
1302 CONST0_RTX (DFmode
));
1303 init
= emit_insn_after (pat
, insn
);
1304 PUT_MODE (init
, QImode
);
1306 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1308 /* If the CALL_INSN was the end of a block, move the
1309 block_end to point to the new insn. */
1311 if (block_end
[block
] == insn
)
1312 block_end
[block
] = init
;
1315 /* Some regs do not survive a CALL */
1316 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1319 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1320 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1324 /* Find all basic blocks of the function, which starts with FIRST.
1325 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1333 register RTX_CODE prev_code
= BARRIER
;
1334 register RTX_CODE code
;
1335 rtx label_value_list
= 0;
1337 /* Record where all the blocks start and end.
1338 Record which basic blocks control can drop in to. */
1341 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1343 /* Note that this loop must select the same block boundaries
1344 as code in reg_to_stack, but that these are not the same
1345 as those selected in flow.c. */
1347 code
= GET_CODE (insn
);
1349 if (code
== CODE_LABEL
1350 || (prev_code
!= INSN
1351 && prev_code
!= CALL_INSN
1352 && prev_code
!= CODE_LABEL
1353 && GET_RTX_CLASS (code
) == 'i'))
1355 block_begin
[++block
] = insn
;
1356 block_end
[block
] = insn
;
1357 block_drops_in
[block
] = prev_code
!= BARRIER
;
1359 else if (GET_RTX_CLASS (code
) == 'i')
1360 block_end
[block
] = insn
;
1362 if (GET_RTX_CLASS (code
) == 'i')
1366 /* Make a list of all labels referred to other than by jumps. */
1367 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
1368 if (REG_NOTE_KIND (note
) == REG_LABEL
)
1369 label_value_list
= gen_rtx_EXPR_LIST (VOIDmode
, XEXP (note
, 0),
1373 block_number
[INSN_UID (insn
)] = block
;
1379 if (block
+ 1 != blocks
)
1382 /* generate all label references to the corresponding jump insn */
1383 for (block
= 0; block
< blocks
; block
++)
1385 insn
= block_end
[block
];
1387 if (GET_CODE (insn
) == JUMP_INSN
)
1389 rtx pat
= PATTERN (insn
);
1392 if (computed_jump_p (insn
))
1394 for (x
= label_value_list
; x
; x
= XEXP (x
, 1))
1395 record_label_references (insn
,
1396 gen_rtx_LABEL_REF (VOIDmode
,
1399 for (x
= forced_labels
; x
; x
= XEXP (x
, 1))
1400 record_label_references (insn
,
1401 gen_rtx_LABEL_REF (VOIDmode
,
1405 record_label_references (insn
, pat
);
1410 /* If current function returns its result in an fp stack register,
1411 return the REG. Otherwise, return 0. */
1417 rtx result
= DECL_RTL (DECL_RESULT (decl
));
1420 && ! (GET_CODE (result
) == REG
1421 && REGNO (result
) < FIRST_PSEUDO_REGISTER
))
1423 #ifdef FUNCTION_OUTGOING_VALUE
1425 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1427 result
= FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl
)), decl
);
1431 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
1434 /* Determine the which registers are live at the start of each basic
1435 block of the function whose first insn is FIRST.
1437 First, if the function returns a real_type, mark the function
1438 return type as live at each return point, as the RTL may not give any
1439 hint that the register is live.
1441 Then, start with the last block and work back to the first block.
1442 Similarly, work backwards within each block, insn by insn, recording
1443 which regs are dead and which are used (and therefore live) in the
1444 hard reg set of block_stack_in[].
1446 After processing each basic block, if there is a label at the start
1447 of the block, propagate the live registers to all jumps to this block.
1449 As a special case, if there are regs live in this block, that are
1450 not live in a block containing a jump to this label, and the block
1451 containing the jump has already been processed, we must propagate this
1452 block's entry register life back to the block containing the jump, and
1453 restart life analysis from there.
1455 In the worst case, this function may traverse the insns
1456 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1457 of the insns may not know that a reg is live at a target that is early
1458 in the insns. So we back up and start over with the new reg live.
1460 If there are registers that are live at the start of the function,
1461 insns are emitted to initialize these registers. Something similar is
1462 done after CALL_INSNs in record_reg_life. */
1465 stack_reg_life_analysis (first
, stackentry
)
1467 HARD_REG_SET
*stackentry
;
1470 struct stack_def regstack
;
1475 if ((retvalue
= stack_result (current_function_decl
)))
1477 /* Find all RETURN insns and mark them. */
1479 for (block
= blocks
- 1; --block
>= 0;)
1480 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1481 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1482 mark_regs_pat (retvalue
, block_out_reg_set
+block
);
1484 /* Mark off the end of last block if we "fall off" the end of the
1485 function into the epilogue. */
1487 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1488 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1489 mark_regs_pat (retvalue
, block_out_reg_set
+blocks
-1);
1493 /* now scan all blocks backward for stack register use */
1498 register rtx insn
, prev
;
1500 /* current register status at last instruction */
1502 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1504 prev
= block_end
[block
];
1508 prev
= PREV_INSN (insn
);
1510 /* If the insn is a CALL_INSN, we need to ensure that
1511 everything dies. But otherwise don't process unless there
1512 are some stack regs present. */
1514 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1515 record_reg_life (insn
, block
, ®stack
);
1517 } while (insn
!= block_begin
[block
]);
1519 /* Set the state at the start of the block. Mark that no
1520 register mapping information known yet. */
1522 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1523 block_stack_in
[block
].top
= -2;
1525 /* If there is a label, propagate our register life to all jumps
1528 if (GET_CODE (insn
) == CODE_LABEL
)
1531 int must_restart
= 0;
1533 for (label
= LABEL_REFS (insn
); label
!= insn
;
1534 label
= LABEL_NEXTREF (label
))
1536 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1538 if (jump_block
< block
)
1539 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1540 block_stack_in
[block
].reg_set
);
1543 /* The block containing the jump has already been
1544 processed. If there are registers that were not known
1545 to be live then, but are live now, we must back up
1546 and restart life analysis from that point with the new
1547 life information. */
1549 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1550 block_out_reg_set
[jump_block
],
1553 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1554 block_stack_in
[block
].reg_set
);
1568 if (block_drops_in
[block
])
1569 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1570 block_stack_in
[block
].reg_set
);
1575 /* If any reg is live at the start of the first block of a
1576 function, then we must guarantee that the reg holds some value by
1577 generating our own "load" of that register. Otherwise a 387 would
1578 fault trying to access an empty register. */
1580 /* Load zero into each live register. The fact that a register
1581 appears live at the function start necessarily implies an error
1582 in the user program: it means that (unless the offending code is *never*
1583 executed) this program is using uninitialised floating point
1584 variables. In order to keep broken code like this happy, we initialise
1585 those variables with zero.
1587 Note that we are inserting virtual register references here:
1588 these insns must be processed by convert_regs later. Also, these
1589 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1591 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1592 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
)
1593 && ! TEST_HARD_REG_BIT (*stackentry
, reg
))
1597 init_rtx
= gen_rtx_SET (VOIDmode
, FP_MODE_REG(reg
, DFmode
),
1598 CONST0_RTX (DFmode
));
1599 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1600 PUT_MODE (block_begin
[0], QImode
);
1602 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1606 /*****************************************************************************
1607 This section deals with stack register substitution, and forms the second
1609 *****************************************************************************/
1611 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1612 the desired hard REGNO. */
1615 replace_reg (reg
, regno
)
1619 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1620 || ! STACK_REG_P (*reg
))
1623 switch (GET_MODE_CLASS (GET_MODE (*reg
)))
1627 case MODE_COMPLEX_FLOAT
:;
1630 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
1633 /* Remove a note of type NOTE, which must be found, for register
1634 number REGNO from INSN. Remove only one such note. */
1637 remove_regno_note (insn
, note
, regno
)
1642 register rtx
*note_link
, this;
1644 note_link
= ®_NOTES(insn
);
1645 for (this = *note_link
; this; this = XEXP (this, 1))
1646 if (REG_NOTE_KIND (this) == note
1647 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1649 *note_link
= XEXP (this, 1);
1653 note_link
= &XEXP (this, 1);
1658 /* Find the hard register number of virtual register REG in REGSTACK.
1659 The hard register number is relative to the top of the stack. -1 is
1660 returned if the register is not found. */
1663 get_hard_regnum (regstack
, reg
)
1669 if (! STACK_REG_P (reg
))
1672 for (i
= regstack
->top
; i
>= 0; i
--)
1673 if (regstack
->reg
[i
] == REGNO (reg
))
1676 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1679 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1680 the chain of insns. Doing so could confuse block_begin and block_end
1681 if this were the only insn in the block. */
1684 delete_insn_for_stacker (insn
)
1687 PUT_CODE (insn
, NOTE
);
1688 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1689 NOTE_SOURCE_FILE (insn
) = 0;
1692 /* Emit an insn to pop virtual register REG before or after INSN.
1693 REGSTACK is the stack state after INSN and is updated to reflect this
1694 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1695 is represented as a SET whose destination is the register to be popped
1696 and source is the top of stack. A death note for the top of stack
1697 cases the movdf pattern to pop. */
1700 emit_pop_insn (insn
, regstack
, reg
, when
)
1706 rtx pop_insn
, pop_rtx
;
1709 hard_regno
= get_hard_regnum (regstack
, reg
);
1711 if (hard_regno
< FIRST_STACK_REG
)
1714 pop_rtx
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
1715 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1717 pop_insn
= (*when
) (pop_rtx
, insn
);
1718 /* ??? This used to be VOIDmode, but that seems wrong. */
1719 PUT_MODE (pop_insn
, QImode
);
1721 REG_NOTES (pop_insn
) = gen_rtx_EXPR_LIST (REG_DEAD
,
1722 FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
1723 REG_NOTES (pop_insn
));
1725 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1726 = regstack
->reg
[regstack
->top
];
1728 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1733 /* Emit an insn before or after INSN to swap virtual register REG with the
1734 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1735 REGSTACK is the stack state before the swap, and is updated to reflect
1736 the swap. A swap insn is represented as a PARALLEL of two patterns:
1737 each pattern moves one reg to the other.
1739 If REG is already at the top of the stack, no insn is emitted. */
1742 emit_swap_insn (insn
, regstack
, reg
)
1749 rtx swap_rtx
, swap_insn
;
1750 int tmp
, other_reg
; /* swap regno temps */
1751 rtx i1
; /* the stack-reg insn prior to INSN */
1752 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
1754 hard_regno
= get_hard_regnum (regstack
, reg
);
1756 if (hard_regno
< FIRST_STACK_REG
)
1758 if (hard_regno
== FIRST_STACK_REG
)
1761 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1763 tmp
= regstack
->reg
[other_reg
];
1764 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
1765 regstack
->reg
[regstack
->top
] = tmp
;
1767 /* Find the previous insn involving stack regs, but don't go past
1768 any labels, calls or jumps. */
1769 i1
= prev_nonnote_insn (insn
);
1770 while (i1
&& GET_CODE (i1
) == INSN
&& GET_MODE (i1
) != QImode
)
1771 i1
= prev_nonnote_insn (i1
);
1774 i1set
= single_set (i1
);
1778 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
1779 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
1781 /* If the previous register stack push was from the reg we are to
1782 swap with, omit the swap. */
1784 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1785 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1786 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1789 /* If the previous insn wrote to the reg we are to swap with,
1792 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1793 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1794 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1798 if (GET_RTX_CLASS (GET_CODE (i1
)) == 'i' && sets_cc0_p (PATTERN (i1
)))
1800 i1
= next_nonnote_insn (i1
);
1805 swap_rtx
= gen_swapdf (FP_MODE_REG (hard_regno
, DFmode
),
1806 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
1807 swap_insn
= emit_insn_after (swap_rtx
, i1
);
1808 /* ??? This used to be VOIDmode, but that seems wrong. */
1809 PUT_MODE (swap_insn
, QImode
);
1812 /* Handle a move to or from a stack register in PAT, which is in INSN.
1813 REGSTACK is the current stack. */
1816 move_for_stack_reg (insn
, regstack
, pat
)
1821 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
1822 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
1826 src
= *psrc
; dest
= *pdest
;
1828 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
1830 /* Write from one stack reg to another. If SRC dies here, then
1831 just change the register mapping and delete the insn. */
1833 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1838 /* If this is a no-op move, there must not be a REG_DEAD note. */
1839 if (REGNO (src
) == REGNO (dest
))
1842 for (i
= regstack
->top
; i
>= 0; i
--)
1843 if (regstack
->reg
[i
] == REGNO (src
))
1846 /* The source must be live, and the dest must be dead. */
1847 if (i
< 0 || get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1850 /* It is possible that the dest is unused after this insn.
1851 If so, just pop the src. */
1853 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1855 emit_pop_insn (insn
, regstack
, src
, emit_insn_after
);
1857 delete_insn_for_stacker (insn
);
1861 regstack
->reg
[i
] = REGNO (dest
);
1863 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1864 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1866 delete_insn_for_stacker (insn
);
1871 /* The source reg does not die. */
1873 /* If this appears to be a no-op move, delete it, or else it
1874 will confuse the machine description output patterns. But if
1875 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1876 for REG_UNUSED will not work for deleted insns. */
1878 if (REGNO (src
) == REGNO (dest
))
1880 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1881 emit_pop_insn (insn
, regstack
, dest
, emit_insn_after
);
1883 delete_insn_for_stacker (insn
);
1887 /* The destination ought to be dead */
1888 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1891 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1893 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1894 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1895 replace_reg (pdest
, FIRST_STACK_REG
);
1897 else if (STACK_REG_P (src
))
1899 /* Save from a stack reg to MEM, or possibly integer reg. Since
1900 only top of stack may be saved, emit an exchange first if
1903 emit_swap_insn (insn
, regstack
, src
);
1905 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1908 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1910 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1912 else if (GET_MODE (src
) == XFmode
&& regstack
->top
< REG_STACK_SIZE
- 1)
1914 /* A 387 cannot write an XFmode value to a MEM without
1915 clobbering the source reg. The output code can handle
1916 this by reading back the value from the MEM.
1917 But it is more efficient to use a temp register if one is
1918 available. Push the source value here if the register
1919 stack is not full, and then write the value to memory via
1921 rtx push_rtx
, push_insn
;
1922 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, XFmode
);
1924 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1925 push_insn
= emit_insn_before (push_rtx
, insn
);
1926 PUT_MODE (push_insn
, QImode
);
1927 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
, top_stack_reg
,
1931 replace_reg (psrc
, FIRST_STACK_REG
);
1933 else if (STACK_REG_P (dest
))
1935 /* Load from MEM, or possibly integer REG or constant, into the
1936 stack regs. The actual target is always the top of the
1937 stack. The stack mapping is changed to reflect that DEST is
1938 now at top of stack. */
1940 /* The destination ought to be dead */
1941 if (get_hard_regnum (regstack
, dest
) >= FIRST_STACK_REG
)
1944 if (regstack
->top
>= REG_STACK_SIZE
)
1947 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1948 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1949 replace_reg (pdest
, FIRST_STACK_REG
);
1956 swap_rtx_condition (pat
)
1962 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1964 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1968 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1969 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1975 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1976 swap_rtx_condition (XVECEXP (pat
, i
, j
));
1978 else if (fmt
[i
] == 'e')
1979 swap_rtx_condition (XEXP (pat
, i
));
1983 /* Handle a comparison. Special care needs to be taken to avoid
1984 causing comparisons that a 387 cannot do correctly, such as EQ.
1986 Also, a pop insn may need to be emitted. The 387 does have an
1987 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1988 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1992 compare_for_stack_reg (insn
, regstack
, pat
)
1998 rtx src1_note
, src2_note
;
2002 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2003 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2004 cc0_user
= next_cc0_user (insn
);
2006 /* If the insn that uses cc0 is an FP-conditional move, then the destination
2007 must be the top of stack */
2008 if (GET_CODE (PATTERN (cc0_user
)) == SET
2009 && SET_DEST (PATTERN (cc0_user
)) != pc_rtx
2010 && GET_CODE (SET_SRC (PATTERN (cc0_user
))) == IF_THEN_ELSE
2011 && (GET_MODE_CLASS (GET_MODE (SET_DEST (PATTERN (cc0_user
))))
2016 dest
= get_true_reg (&SET_DEST (PATTERN (cc0_user
)));
2019 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
2020 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
2022 emit_swap_insn (insn
, regstack
, *dest
);
2028 /* ??? If fxch turns out to be cheaper than fstp, give priority to
2029 registers that die in this insn - move those to stack top first. */
2030 if (! STACK_REG_P (*src1
)
2031 || (STACK_REG_P (*src2
)
2032 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
2036 temp
= XEXP (SET_SRC (pat
), 0);
2037 XEXP (SET_SRC (pat
), 0) = XEXP (SET_SRC (pat
), 1);
2038 XEXP (SET_SRC (pat
), 1) = temp
;
2040 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2041 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2043 next
= next_cc0_user (insn
);
2044 if (next
== NULL_RTX
)
2047 swap_rtx_condition (PATTERN (next
));
2048 INSN_CODE (next
) = -1;
2049 INSN_CODE (insn
) = -1;
2052 /* We will fix any death note later. */
2054 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2056 if (STACK_REG_P (*src2
))
2057 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2059 src2_note
= NULL_RTX
;
2062 emit_swap_insn (insn
, regstack
, *src1
);
2064 replace_reg (src1
, FIRST_STACK_REG
);
2066 if (STACK_REG_P (*src2
))
2067 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2071 pop_stack (regstack
, REGNO (XEXP (src1_note
, 0)));
2072 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2075 /* If the second operand dies, handle that. But if the operands are
2076 the same stack register, don't bother, because only one death is
2077 needed, and it was just handled. */
2080 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
2081 && REGNO (*src1
) == REGNO (*src2
)))
2083 /* As a special case, two regs may die in this insn if src2 is
2084 next to top of stack and the top of stack also dies. Since
2085 we have already popped src1, "next to top of stack" is really
2086 at top (FIRST_STACK_REG) now. */
2088 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
2091 pop_stack (regstack
, REGNO (XEXP (src2_note
, 0)));
2092 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
2096 /* The 386 can only represent death of the first operand in
2097 the case handled above. In all other cases, emit a separate
2098 pop and remove the death note from here. */
2100 link_cc0_insns (insn
);
2102 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
2104 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
2110 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
2111 is the current register layout. */
2114 subst_stack_regs_pat (insn
, regstack
, pat
)
2120 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
2121 rtx src1_note
, src2_note
;
2123 if (GET_CODE (pat
) != SET
)
2126 dest
= get_true_reg (&SET_DEST (pat
));
2127 src
= get_true_reg (&SET_SRC (pat
));
2129 /* See if this is a `movM' pattern, and handle elsewhere if so. */
2131 if (*dest
!= cc0_rtx
2132 && (STACK_REG_P (*src
)
2133 || (STACK_REG_P (*dest
)
2134 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
2135 || GET_CODE (*src
) == CONST_DOUBLE
))))
2136 move_for_stack_reg (insn
, regstack
, pat
);
2138 switch (GET_CODE (SET_SRC (pat
)))
2141 compare_for_stack_reg (insn
, regstack
, pat
);
2147 for (count
= HARD_REGNO_NREGS (REGNO (*dest
), GET_MODE (*dest
));
2150 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
2151 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
2154 replace_reg (dest
, FIRST_STACK_REG
);
2158 /* This is a `tstM2' case. */
2159 if (*dest
!= cc0_rtx
)
2166 case FLOAT_TRUNCATE
:
2170 /* These insns only operate on the top of the stack. DEST might
2171 be cc0_rtx if we're processing a tstM pattern. Also, it's
2172 possible that the tstM case results in a REG_DEAD note on the
2176 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2178 emit_swap_insn (insn
, regstack
, *src1
);
2180 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2182 if (STACK_REG_P (*dest
))
2183 replace_reg (dest
, FIRST_STACK_REG
);
2187 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2189 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2192 replace_reg (src1
, FIRST_STACK_REG
);
2198 /* On i386, reversed forms of subM3 and divM3 exist for
2199 MODE_FLOAT, so the same code that works for addM3 and mulM3
2203 /* These insns can accept the top of stack as a destination
2204 from a stack reg or mem, or can use the top of stack as a
2205 source and some other stack register (possibly top of stack)
2206 as a destination. */
2208 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
2209 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2211 /* We will fix any death note later. */
2213 if (STACK_REG_P (*src1
))
2214 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2216 src1_note
= NULL_RTX
;
2217 if (STACK_REG_P (*src2
))
2218 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2220 src2_note
= NULL_RTX
;
2222 /* If either operand is not a stack register, then the dest
2223 must be top of stack. */
2225 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
2226 emit_swap_insn (insn
, regstack
, *dest
);
2229 /* Both operands are REG. If neither operand is already
2230 at the top of stack, choose to make the one that is the dest
2231 the new top of stack. */
2233 int src1_hard_regnum
, src2_hard_regnum
;
2235 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
2236 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
2237 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
2240 if (src1_hard_regnum
!= FIRST_STACK_REG
2241 && src2_hard_regnum
!= FIRST_STACK_REG
)
2242 emit_swap_insn (insn
, regstack
, *dest
);
2245 if (STACK_REG_P (*src1
))
2246 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2247 if (STACK_REG_P (*src2
))
2248 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2252 /* If the register that dies is at the top of stack, then
2253 the destination is somewhere else - merely substitute it.
2254 But if the reg that dies is not at top of stack, then
2255 move the top of stack to the dead reg, as though we had
2256 done the insn and then a store-with-pop. */
2258 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
2260 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2261 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2265 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
2267 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2268 replace_reg (dest
, regno
);
2270 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2271 = regstack
->reg
[regstack
->top
];
2274 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2275 REGNO (XEXP (src1_note
, 0)));
2276 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2281 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
2283 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2284 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2288 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
2290 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2291 replace_reg (dest
, regno
);
2293 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2294 = regstack
->reg
[regstack
->top
];
2297 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2298 REGNO (XEXP (src2_note
, 0)));
2299 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
2304 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2305 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2311 switch (XINT (SET_SRC (pat
), 1))
2315 /* These insns only operate on the top of the stack. */
2317 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
2319 emit_swap_insn (insn
, regstack
, *src1
);
2321 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2323 if (STACK_REG_P (*dest
))
2324 replace_reg (dest
, FIRST_STACK_REG
);
2328 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2330 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2333 replace_reg (src1
, FIRST_STACK_REG
);
2343 /* This insn requires the top of stack to be the destination. */
2345 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
2346 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 2));
2348 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2349 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
2356 src_note
[1] = src1_note
;
2357 src_note
[2] = src2_note
;
2359 if (STACK_REG_P (*src1
))
2360 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
2361 if (STACK_REG_P (*src2
))
2362 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
2364 for (i
= 1; i
<= 2; i
++)
2367 /* If the register that dies is not at the top of stack, then
2368 move the top of stack to the dead reg */
2369 if (REGNO (XEXP (src_note
[i
], 0))
2370 != regstack
->reg
[regstack
->top
])
2372 remove_regno_note (insn
, REG_DEAD
,
2373 REGNO (XEXP (src_note
[i
], 0)));
2374 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
2379 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2380 REGNO (XEXP (src_note
[i
], 0)));
2381 replace_reg (&XEXP (src_note
[i
], 0), FIRST_STACK_REG
);
2387 /* Make dest the top of stack. Add dest to regstack if not present. */
2388 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
2389 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
2390 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2391 replace_reg (dest
, FIRST_STACK_REG
);
2400 /* Substitute hard regnums for any stack regs in INSN, which has
2401 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2402 before the insn, and is updated with changes made here. CONSTRAINTS is
2403 an array of the constraint strings used in the asm statement.
2405 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2406 parallel array of where the operands were found. The output operands
2407 all precede the input operands.
2409 There are several requirements and assumptions about the use of
2410 stack-like regs in asm statements. These rules are enforced by
2411 record_asm_stack_regs; see comments there for details. Any
2412 asm_operands left in the RTL at this point may be assume to meet the
2413 requirements, since record_asm_stack_regs removes any problem asm. */
2416 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2417 n_inputs
, n_outputs
)
2420 rtx
*operands
, **operands_loc
;
2422 int n_inputs
, n_outputs
;
2424 int n_operands
= n_inputs
+ n_outputs
;
2425 int first_input
= n_outputs
;
2426 rtx body
= PATTERN (insn
);
2428 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2429 enum reg_class
*operand_class
2430 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2432 rtx
*note_reg
; /* Array of note contents */
2433 rtx
**note_loc
; /* Address of REG field of each note */
2434 enum reg_note
*note_kind
; /* The type of each note */
2439 struct stack_def temp_stack
;
2445 /* Find out what the constraints required. If no constraint
2446 alternative matches, that is a compiler bug: we should have caught
2447 such an insn during the life analysis pass (and reload should have
2448 caught it regardless). */
2450 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2451 operand_matches
, operand_class
);
2455 /* Strip SUBREGs here to make the following code simpler. */
2456 for (i
= 0; i
< n_operands
; i
++)
2457 if (GET_CODE (operands
[i
]) == SUBREG
2458 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2460 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2461 operands
[i
] = SUBREG_REG (operands
[i
]);
2464 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2466 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2469 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2470 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2471 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2474 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2476 rtx reg
= XEXP (note
, 0);
2477 rtx
*loc
= & XEXP (note
, 0);
2479 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2481 loc
= & SUBREG_REG (reg
);
2482 reg
= SUBREG_REG (reg
);
2485 if (STACK_REG_P (reg
)
2486 && (REG_NOTE_KIND (note
) == REG_DEAD
2487 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2489 note_reg
[n_notes
] = reg
;
2490 note_loc
[n_notes
] = loc
;
2491 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2496 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2500 if (GET_CODE (body
) == PARALLEL
)
2502 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2503 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2505 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2506 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2508 rtx clobber
= XVECEXP (body
, 0, i
);
2509 rtx reg
= XEXP (clobber
, 0);
2510 rtx
*loc
= & XEXP (clobber
, 0);
2512 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2514 loc
= & SUBREG_REG (reg
);
2515 reg
= SUBREG_REG (reg
);
2518 if (STACK_REG_P (reg
))
2520 clobber_reg
[n_clobbers
] = reg
;
2521 clobber_loc
[n_clobbers
] = loc
;
2527 bcopy ((char *) regstack
, (char *) &temp_stack
, sizeof (temp_stack
));
2529 /* Put the input regs into the desired place in TEMP_STACK. */
2531 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2532 if (STACK_REG_P (operands
[i
])
2533 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2534 && operand_class
[i
] != FLOAT_REGS
)
2536 /* If an operand needs to be in a particular reg in
2537 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2538 these constraints are for single register classes, and reload
2539 guaranteed that operand[i] is already in that class, we can
2540 just use REGNO (operands[i]) to know which actual reg this
2541 operand needs to be in. */
2543 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2548 if (regno
!= REGNO (operands
[i
]))
2550 /* operands[i] is not in the right place. Find it
2551 and swap it with whatever is already in I's place.
2552 K is where operands[i] is now. J is where it should
2556 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2558 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2560 temp
= temp_stack
.reg
[k
];
2561 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2562 temp_stack
.reg
[j
] = temp
;
2566 /* emit insns before INSN to make sure the reg-stack is in the right
2569 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2571 /* Make the needed input register substitutions. Do death notes and
2572 clobbers too, because these are for inputs, not outputs. */
2574 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2575 if (STACK_REG_P (operands
[i
]))
2577 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2582 replace_reg (operands_loc
[i
], regnum
);
2585 for (i
= 0; i
< n_notes
; i
++)
2586 if (note_kind
[i
] == REG_DEAD
)
2588 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2593 replace_reg (note_loc
[i
], regnum
);
2596 for (i
= 0; i
< n_clobbers
; i
++)
2598 /* It's OK for a CLOBBER to reference a reg that is not live.
2599 Don't try to replace it in that case. */
2600 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2604 /* Sigh - clobbers always have QImode. But replace_reg knows
2605 that these regs can't be MODE_INT and will abort. Just put
2606 the right reg there without calling replace_reg. */
2608 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
2612 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2614 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2615 if (STACK_REG_P (operands
[i
]))
2617 /* An input reg is implicitly popped if it is tied to an
2618 output, or if there is a CLOBBER for it. */
2621 for (j
= 0; j
< n_clobbers
; j
++)
2622 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2625 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2627 /* operands[i] might not be at the top of stack. But that's OK,
2628 because all we need to do is pop the right number of regs
2629 off of the top of the reg-stack. record_asm_stack_regs
2630 guaranteed that all implicitly popped regs were grouped
2631 at the top of the reg-stack. */
2633 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2634 regstack
->reg
[regstack
->top
]);
2639 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2640 Note that there isn't any need to substitute register numbers.
2641 ??? Explain why this is true. */
2643 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2645 /* See if there is an output for this hard reg. */
2648 for (j
= 0; j
< n_outputs
; j
++)
2649 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2651 regstack
->reg
[++regstack
->top
] = i
;
2652 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2657 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2658 input that the asm didn't implicitly pop. If the asm didn't
2659 implicitly pop an input reg, that reg will still be live.
2661 Note that we can't use find_regno_note here: the register numbers
2662 in the death notes have already been substituted. */
2664 for (i
= 0; i
< n_outputs
; i
++)
2665 if (STACK_REG_P (operands
[i
]))
2669 for (j
= 0; j
< n_notes
; j
++)
2670 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2671 && note_kind
[j
] == REG_UNUSED
)
2673 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2679 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2680 if (STACK_REG_P (operands
[i
]))
2684 for (j
= 0; j
< n_notes
; j
++)
2685 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2686 && note_kind
[j
] == REG_DEAD
2687 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2689 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2696 /* Substitute stack hard reg numbers for stack virtual registers in
2697 INSN. Non-stack register numbers are not changed. REGSTACK is the
2698 current stack content. Insns may be emitted as needed to arrange the
2699 stack for the 387 based on the contents of the insn. */
2702 subst_stack_regs (insn
, regstack
)
2706 register rtx
*note_link
, note
;
2710 if (GET_CODE (insn
) == CALL_INSN
)
2712 int top
= regstack
->top
;
2714 /* If there are any floating point parameters to be passed in
2715 registers for this call, make sure they are in the right
2720 straighten_stack (PREV_INSN (insn
), regstack
);
2722 /* Now mark the arguments as dead after the call. */
2724 while (regstack
->top
>= 0)
2726 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2732 /* Do the actual substitution if any stack regs are mentioned.
2733 Since we only record whether entire insn mentions stack regs, and
2734 subst_stack_regs_pat only works for patterns that contain stack regs,
2735 we must check each pattern in a parallel here. A call_value_pop could
2738 if (GET_MODE (insn
) == QImode
)
2740 n_operands
= asm_noperands (PATTERN (insn
));
2741 if (n_operands
>= 0)
2743 /* This insn is an `asm' with operands. Decode the operands,
2744 decide how many are inputs, and do register substitution.
2745 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2747 rtx operands
[MAX_RECOG_OPERANDS
];
2748 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2749 rtx body
= PATTERN (insn
);
2750 int n_inputs
, n_outputs
;
2752 = (char **) alloca (n_operands
* sizeof (char *));
2754 decode_asm_operands (body
, operands
, operands_loc
,
2755 constraints
, NULL_PTR
);
2756 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2757 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2758 constraints
, n_inputs
, n_outputs
);
2762 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2763 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2765 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2766 subst_stack_regs_pat (insn
, regstack
,
2767 XVECEXP (PATTERN (insn
), 0, i
));
2770 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2773 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2774 REG_UNUSED will already have been dealt with, so just return. */
2776 if (GET_CODE (insn
) == NOTE
)
2779 /* If there is a REG_UNUSED note on a stack register on this insn,
2780 the indicated reg must be popped. The REG_UNUSED note is removed,
2781 since the form of the newly emitted pop insn references the reg,
2782 making it no longer `unset'. */
2784 note_link
= ®_NOTES(insn
);
2785 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2786 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2788 *note_link
= XEXP (note
, 1);
2789 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2792 note_link
= &XEXP (note
, 1);
2795 /* Change the organization of the stack so that it fits a new basic
2796 block. Some registers might have to be popped, but there can never be
2797 a register live in the new block that is not now live.
2799 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2800 or emit_insn_after. OLD is the original stack layout, and NEW is
2801 the desired form. OLD is updated to reflect the code emitted, ie, it
2802 will be the same as NEW upon return.
2804 This function will not preserve block_end[]. But that information
2805 is no longer needed once this has executed. */
2808 change_stack (insn
, old
, new, when
)
2816 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2817 If we are to insert after INSN, find the next insn, and insert before
2820 if (when
== emit_insn_after
)
2821 insn
= NEXT_INSN (insn
);
2823 /* Pop any registers that are not needed in the new block. */
2825 for (reg
= old
->top
; reg
>= 0; reg
--)
2826 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2827 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[reg
], DFmode
),
2832 /* If the new block has never been processed, then it can inherit
2833 the old stack order. */
2835 new->top
= old
->top
;
2836 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2840 /* This block has been entered before, and we must match the
2841 previously selected stack order. */
2843 /* By now, the only difference should be the order of the stack,
2844 not their depth or liveliness. */
2846 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2852 if (old
->top
!= new->top
)
2855 /* Loop here emitting swaps until the stack is correct. The
2856 worst case number of swaps emitted is N + 2, where N is the
2857 depth of the stack. In some cases, the reg at the top of
2858 stack may be correct, but swapped anyway in order to fix
2859 other regs. But since we never swap any other reg away from
2860 its correct slot, this algorithm will converge. */
2864 /* Swap the reg at top of stack into the position it is
2865 supposed to be in, until the correct top of stack appears. */
2867 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2869 for (reg
= new->top
; reg
>= 0; reg
--)
2870 if (new->reg
[reg
] == old
->reg
[old
->top
])
2876 emit_swap_insn (insn
, old
,
2877 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2880 /* See if any regs remain incorrect. If so, bring an
2881 incorrect reg to the top of stack, and let the while loop
2884 for (reg
= new->top
; reg
>= 0; reg
--)
2885 if (new->reg
[reg
] != old
->reg
[reg
])
2887 emit_swap_insn (insn
, old
,
2888 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2893 /* At this point there must be no differences. */
2895 for (reg
= old
->top
; reg
>= 0; reg
--)
2896 if (old
->reg
[reg
] != new->reg
[reg
])
2901 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2902 found, ensure that a jump from INSN to the code_label to which the
2903 label_ref points ends up with the same stack as that at the
2904 code_label. Do this by inserting insns just before the code_label to
2905 pop and rotate the stack until it is in the correct order. REGSTACK
2906 is the order of the register stack in INSN.
2908 Any code that is emitted here must not be later processed as part
2909 of any block, as it will already contain hard register numbers. */
2912 goto_block_pat (insn
, regstack
, pat
)
2918 rtx new_jump
, new_label
, new_barrier
;
2921 struct stack_def temp_stack
;
2924 switch (GET_CODE (pat
))
2927 straighten_stack (PREV_INSN (insn
), regstack
);
2932 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2934 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2937 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2939 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2940 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2947 label
= XEXP (pat
, 0);
2948 if (GET_CODE (label
) != CODE_LABEL
)
2951 /* First, see if in fact anything needs to be done to the stack at all. */
2952 if (INSN_UID (label
) <= 0)
2955 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2957 if (label_stack
->top
== -2)
2959 /* If the target block hasn't had a stack order selected, then
2960 we need merely ensure that no pops are needed. */
2962 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2963 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2968 /* change_stack will not emit any code in this case. */
2970 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
2974 else if (label_stack
->top
== regstack
->top
)
2976 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
2977 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
2984 /* At least one insn will need to be inserted before label. Insert
2985 a jump around the code we are about to emit. Emit a label for the new
2986 code, and point the original insn at this new label. We can't use
2987 redirect_jump here, because we're using fld[4] of the code labels as
2988 LABEL_REF chains, no NUSES counters. */
2990 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
2991 record_label_references (new_jump
, PATTERN (new_jump
));
2992 JUMP_LABEL (new_jump
) = label
;
2994 new_barrier
= emit_barrier_after (new_jump
);
2996 new_label
= gen_label_rtx ();
2997 emit_label_after (new_label
, new_barrier
);
2998 LABEL_REFS (new_label
) = new_label
;
3000 /* The old label_ref will no longer point to the code_label if now uses,
3001 so strip the label_ref from the code_label's chain of references. */
3003 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
3010 *ref
= LABEL_NEXTREF (*ref
);
3012 XEXP (pat
, 0) = new_label
;
3013 record_label_references (insn
, PATTERN (insn
));
3015 if (JUMP_LABEL (insn
) == label
)
3016 JUMP_LABEL (insn
) = new_label
;
3018 /* Now emit the needed code. */
3020 temp_stack
= *regstack
;
3022 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
3025 /* Traverse all basic blocks in a function, converting the register
3026 references in each insn from the "flat" register file that gcc uses, to
3027 the stack-like registers the 387 uses. */
3032 register int block
, reg
;
3033 register rtx insn
, next
;
3034 struct stack_def regstack
;
3036 for (block
= 0; block
< blocks
; block
++)
3038 if (block_stack_in
[block
].top
== -2)
3040 /* This block has not been previously encountered. Choose a
3041 default mapping for any stack regs live on entry */
3043 block_stack_in
[block
].top
= -1;
3045 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
3046 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
3047 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
3050 /* Process all insns in this block. Keep track of `next' here,
3051 so that we don't process any insns emitted while making
3052 substitutions in INSN. */
3054 next
= block_begin
[block
];
3055 regstack
= block_stack_in
[block
];
3059 next
= NEXT_INSN (insn
);
3061 /* Don't bother processing unless there is a stack reg
3062 mentioned or if it's a CALL_INSN (register passing of
3063 floating point values). */
3065 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
3066 subst_stack_regs (insn
, ®stack
);
3068 } while (insn
!= block_end
[block
]);
3070 /* Something failed if the stack life doesn't match. */
3072 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
3078 /* Adjust the stack of this block on exit to match the stack of
3079 the target block, or copy stack information into stack of
3080 jump target if the target block's stack order hasn't been set
3083 if (GET_CODE (insn
) == JUMP_INSN
)
3084 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
3086 /* Likewise handle the case where we fall into the next block. */
3088 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
3089 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
3093 /* If the last basic block is the end of a loop, and that loop has
3094 regs live at its start, then the last basic block will have regs live
3095 at its end that need to be popped before the function returns. */
3098 int value_reg_low
, value_reg_high
;
3099 value_reg_low
= value_reg_high
= -1;
3102 if ((retvalue
= stack_result (current_function_decl
)))
3104 value_reg_low
= REGNO (retvalue
);
3105 value_reg_high
= value_reg_low
+
3106 HARD_REGNO_NREGS (value_reg_low
, GET_MODE (retvalue
)) - 1;
3110 for (reg
= regstack
.top
; reg
>= 0; reg
--)
3111 if (regstack
.reg
[reg
] < value_reg_low
3112 || regstack
.reg
[reg
] > value_reg_high
)
3113 insn
= emit_pop_insn (insn
, ®stack
,
3114 FP_MODE_REG (regstack
.reg
[reg
], DFmode
),
3117 straighten_stack (insn
, ®stack
);
3120 /* Check expression PAT, which is in INSN, for label references. if
3121 one is found, print the block number of destination to FILE. */
3124 print_blocks (file
, insn
, pat
)
3128 register RTX_CODE code
= GET_CODE (pat
);
3132 if (code
== LABEL_REF
)
3134 register rtx label
= XEXP (pat
, 0);
3136 if (GET_CODE (label
) != CODE_LABEL
)
3139 fprintf (file
, " %d", BLOCK_NUM (label
));
3144 fmt
= GET_RTX_FORMAT (code
);
3145 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3148 print_blocks (file
, insn
, XEXP (pat
, i
));
3152 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
3153 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
3158 /* Write information about stack registers and stack blocks into FILE.
3159 This is part of making a debugging dump. */
3162 dump_stack_info (file
)
3167 fprintf (file
, "\n%d stack blocks.\n", blocks
);
3168 for (block
= 0; block
< blocks
; block
++)
3170 register rtx head
, jump
, end
;
3173 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
3174 block
, INSN_UID (block_begin
[block
]),
3175 INSN_UID (block_end
[block
]));
3177 head
= block_begin
[block
];
3179 fprintf (file
, "Reached from blocks: ");
3180 if (GET_CODE (head
) == CODE_LABEL
)
3181 for (jump
= LABEL_REFS (head
);
3183 jump
= LABEL_NEXTREF (jump
))
3185 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
3186 fprintf (file
, " %d", from_block
);
3188 if (block_drops_in
[block
])
3189 fprintf (file
, " previous");
3191 fprintf (file
, "\nlive stack registers on block entry: ");
3192 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3194 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
3195 fprintf (file
, "%d ", regno
);
3198 fprintf (file
, "\nlive stack registers on block exit: ");
3199 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
3201 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
3202 fprintf (file
, "%d ", regno
);
3205 end
= block_end
[block
];
3207 fprintf (file
, "\nJumps to blocks: ");
3208 if (GET_CODE (end
) == JUMP_INSN
)
3209 print_blocks (file
, end
, PATTERN (end
));
3211 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
3212 fprintf (file
, " next");
3213 else if (block
+ 1 == blocks
3214 || (GET_CODE (end
) == JUMP_INSN
3215 && GET_CODE (PATTERN (end
)) == RETURN
))
3216 fprintf (file
, " return");
3218 fprintf (file
, "\n");
3221 #endif /* STACK_REGS */