1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
20 /* This pass converts stack-like registers from the "flat register
21 file" model that gcc uses, to a stack convention that the 387 uses.
23 * The form of the input:
25 On input, the function consists of insn that have had their
26 registers fully allocated to a set of "virtual" registers. Note that
27 the word "virtual" is used differently here than elsewhere in gcc: for
28 each virtual stack reg, there is a hard reg, but the mapping between
29 them is not known until this pass is run. On output, hard register
30 numbers have been substituted, and various pop and exchange insns have
31 been emitted. The hard register numbers and the virtual register
32 numbers completely overlap - before this pass, all stack register
33 numbers are virtual, and afterward they are all hard.
35 The virtual registers can be manipulated normally by gcc, and their
36 semantics are the same as for normal registers. After the hard
37 register numbers are substituted, the semantics of an insn containing
38 stack-like regs are not the same as for an insn with normal regs: for
39 instance, it is not safe to delete an insn that appears to be a no-op
40 move. In general, no insn containing hard regs should be changed
41 after this pass is done.
43 * The form of the output:
45 After this pass, hard register numbers represent the distance from
46 the current top of stack to the desired register. A reference to
47 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48 represents the register just below that, and so forth. Also, REG_DEAD
49 notes indicate whether or not a stack register should be popped.
51 A "swap" insn looks like a parallel of two patterns, where each
52 pattern is a SET: one sets A to B, the other B to A.
54 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56 will replace the existing stack top, not push a new value.
58 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59 SET_SRC is REG or MEM.
61 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
62 appears ambiguous. As a special case, the presence of a REG_DEAD note
63 for FIRST_STACK_REG differentiates between a load insn and a pop.
65 If a REG_DEAD is present, the insn represents a "pop" that discards
66 the top of the register stack. If there is no REG_DEAD note, then the
67 insn represents a "dup" or a push of the current top of stack onto the
72 Existing REG_DEAD and REG_UNUSED notes for stack registers are
73 deleted and recreated from scratch. REG_DEAD is never created for a
74 SET_DEST, only REG_UNUSED.
76 Before life analysis, the mode of each insn is set based on whether
77 or not any stack registers are mentioned within that insn. VOIDmode
78 means that no regs are mentioned anyway, and QImode means that at
79 least one pattern within the insn mentions stack registers. This
80 information is valid until after reg_to_stack returns, and is used
85 There are several rules on the usage of stack-like regs in
86 asm_operands insns. These rules apply only to the operands that are
89 1. Given a set of input regs that die in an asm_operands, it is
90 necessary to know which are implicitly popped by the asm, and
91 which must be explicitly popped by gcc.
93 An input reg that is implicitly popped by the asm must be
94 explicitly clobbered, unless it is constrained to match an
97 2. For any input reg that is implicitly popped by an asm, it is
98 necessary to know how to adjust the stack to compensate for the pop.
99 If any non-popped input is closer to the top of the reg-stack than
100 the implicitly popped reg, it would not be possible to know what the
101 stack looked like - it's not clear how the rest of the stack "slides
104 All implicitly popped input regs must be closer to the top of
105 the reg-stack than any input that is not implicitly popped.
107 3. It is possible that if an input dies in an insn, reload might
108 use the input reg for an output reload. Consider this example:
110 asm ("foo" : "=t" (a) : "f" (b));
112 This asm says that input B is not popped by the asm, and that
113 the asm pushes a result onto the reg-stack, ie, the stack is one
114 deeper after the asm than it was before. But, it is possible that
115 reload will think that it can use the same reg for both the input and
116 the output, if input B dies in this insn.
118 If any input operand uses the "f" constraint, all output reg
119 constraints must use the "&" earlyclobber.
121 The asm above would be written as
123 asm ("foo" : "=&t" (a) : "f" (b));
125 4. Some operands need to be in particular places on the stack. All
126 output operands fall in this category - there is no other way to
127 know which regs the outputs appear in unless the user indicates
128 this in the constraints.
130 Output operands must specifically indicate which reg an output
131 appears in after an asm. "=f" is not allowed: the operand
132 constraints must select a class with a single reg.
134 5. Output operands may not be "inserted" between existing stack regs.
135 Since no 387 opcode uses a read/write operand, all output operands
136 are dead before the asm_operands, and are pushed by the asm_operands.
137 It makes no sense to push anywhere but the top of the reg-stack.
139 Output operands must start at the top of the reg-stack: output
140 operands may not "skip" a reg.
142 6. Some asm statements may need extra stack space for internal
143 calculations. This can be guaranteed by clobbering stack registers
144 unrelated to the inputs and outputs.
146 Here are a couple of reasonable asms to want to write. This asm
147 takes one input, which is internally popped, and produces two outputs.
149 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
151 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152 and replaces them with one output. The user must code the "st(1)"
153 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
155 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
163 #include "insn-config.h"
165 #include "hard-reg-set.h"
170 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
172 /* True if the current function returns a real value. */
173 static int current_function_returns_real
;
175 /* This is the basic stack record. TOP is an index into REG[] such
176 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
178 If TOP is -2, REG[] is not yet initialized. Stack initialization
179 consists of placing each live reg in array `reg' and setting `top'
182 REG_SET indicates which registers are live. */
184 typedef struct stack_def
186 int top
; /* index to top stack element */
187 HARD_REG_SET reg_set
; /* set of live registers */
188 char reg
[REG_STACK_SIZE
]; /* register - stack mapping */
191 /* highest instruction uid */
192 static int max_uid
= 0;
194 /* Number of basic blocks in the current function. */
197 /* Element N is first insn in basic block N.
198 This info lasts until we finish compiling the function. */
199 static rtx
*block_begin
;
201 /* Element N is last insn in basic block N.
202 This info lasts until we finish compiling the function. */
203 static rtx
*block_end
;
205 /* Element N is nonzero if control can drop into basic block N */
206 static char *block_drops_in
;
208 /* Element N says all about the stack at entry block N */
209 static stack block_stack_in
;
211 /* Element N says all about the stack life at the end of block N */
212 static HARD_REG_SET
*block_out_reg_set
;
214 /* This is where the BLOCK_NUM values are really stored. This is set
215 up by find_blocks and used there and in life_analysis. It can be used
216 later, but only to look up an insn that is the head or tail of some
217 block. life_analysis and the stack register conversion process can
218 add insns within a block. */
219 static int *block_number
;
221 /* This is the register file for all register after conversion */
222 static rtx FP_mode_reg
[FIRST_PSEUDO_REGISTER
][(int) MAX_MACHINE_MODE
];
224 /* Get the basic block number of an insn. See note at block_number
225 definition are validity of this information. */
227 #define BLOCK_NUM(INSN) \
228 (((INSN_UID (INSN) > max_uid) \
229 ? (int *)(abort() , 0) \
230 : block_number)[INSN_UID (INSN)])
232 extern rtx
gen_jump ();
233 extern rtx
gen_movdf ();
234 extern rtx
find_regno_note ();
235 extern rtx
emit_jump_insn_before ();
236 extern rtx
emit_label_after ();
238 /* Forward declarations */
240 static void find_blocks ();
241 static void stack_reg_life_analysis ();
242 static void change_stack ();
243 static void convert_regs ();
244 static void dump_stack_info ();
246 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
249 stack_regs_mentioned_p (pat
)
255 if (STACK_REG_P (pat
))
258 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
259 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
265 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
266 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
269 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
276 /* Convert register usage from "flat" register file usage to a "stack
277 register file. FIRST is the first insn in the function, FILE is the
280 First compute the beginning and end of each basic block. Do a
281 register life analysis on the stack registers, recording the result
282 for the head and tail of each basic block. The convert each insn one
283 by one. Run a last jump_optimize() pass, if optimizing, to eliminate
284 any cross-jumping created when the converter inserts pop insns.*/
287 reg_to_stack (first
, file
)
293 int stack_reg_seen
= 0;
294 enum machine_mode mode
;
296 current_function_returns_real
297 = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl
))) == REAL_TYPE
;
299 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
300 mode
= GET_MODE_WIDER_MODE (mode
))
301 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
302 FP_mode_reg
[i
][(int) mode
] = gen_rtx (REG
, mode
, i
);
304 /* Count the basic blocks. Also find maximum insn uid. */
306 register RTX_CODE prev_code
= JUMP_INSN
;
307 register RTX_CODE code
;
311 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
313 /* Note that this loop must select the same block boundaries
314 as code in find_blocks. */
316 if (INSN_UID (insn
) > max_uid
)
317 max_uid
= INSN_UID (insn
);
319 code
= GET_CODE (insn
);
321 if (code
== CODE_LABEL
322 || (prev_code
!= INSN
323 && prev_code
!= CALL_INSN
324 && prev_code
!= CODE_LABEL
325 && (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)))
328 /* Remember whether or not this insn mentions an FP regs.
329 Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
331 if ((GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
332 || GET_CODE (insn
) == JUMP_INSN
)
333 && stack_regs_mentioned_p (PATTERN (insn
)))
336 PUT_MODE (insn
, QImode
);
339 PUT_MODE (insn
, VOIDmode
);
346 /* If no stack register reference exists in this insn, there isn't
347 anything to convert. */
349 if (! stack_reg_seen
)
352 /* If there are stack registers, there must be at least one block. */
357 /* Allocate some tables that last till end of compiling this function
358 and some needed only in find_blocks and life_analysis. */
360 block_begin
= (rtx
*) alloca (blocks
* sizeof (rtx
));
361 block_end
= (rtx
*) alloca (blocks
* sizeof (rtx
));
362 block_drops_in
= (char *) alloca (blocks
);
364 block_stack_in
= (stack
) alloca (blocks
* sizeof (struct stack_def
));
365 block_out_reg_set
= (HARD_REG_SET
*) alloca (blocks
* sizeof (HARD_REG_SET
));
366 bzero (block_stack_in
, blocks
* sizeof (struct stack_def
));
367 bzero (block_out_reg_set
, blocks
* sizeof (HARD_REG_SET
));
369 block_number
= (int *) alloca ((max_uid
+ 1) * sizeof (int));
372 stack_reg_life_analysis (first
);
374 /* Dump the life analysis debug information before jump
375 optimization, as that will destroy the LABEL_REFS we keep the
379 dump_stack_info (file
);
384 jump_optimize (first
, 2, 0, 0);
387 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
388 label's chain of references, and note which insn contains each
392 record_label_references (insn
, pat
)
395 register enum rtx_code code
= GET_CODE (pat
);
399 if (code
== LABEL_REF
)
401 register rtx label
= XEXP (pat
, 0);
404 if (GET_CODE (label
) != CODE_LABEL
)
407 /* Don't make a duplicate in the code_label's chain. */
409 for (ref
= LABEL_REFS (label
); ref
!= label
; ref
= LABEL_NEXTREF (ref
))
410 if (CONTAINING_INSN (ref
) == insn
)
413 CONTAINING_INSN (pat
) = insn
;
414 LABEL_NEXTREF (pat
) = LABEL_REFS (label
);
415 LABEL_REFS (label
) = pat
;
420 fmt
= GET_RTX_FORMAT (code
);
421 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
424 record_label_references (insn
, XEXP (pat
, i
));
428 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
429 record_label_references (insn
, XVECEXP (pat
, i
, j
));
434 /* Return a pointer to the REG expression within PAT. If PAT is not a
435 REG, possible enclosed by a conversion rtx, return the inner part of
436 PAT that stopped the search. */
442 while (GET_CODE (*pat
) == SUBREG
443 || GET_CODE (*pat
) == FLOAT
444 || GET_CODE (*pat
) == FIX
445 || GET_CODE (*pat
) == FLOAT_EXTEND
)
446 pat
= & XEXP (*pat
, 0);
451 /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
452 N_OPERANDS is the total number of operands. Return which alternative
453 matched, or -1 is no alternative matches.
455 OPERAND_MATCHES is an array which indicates which operand this
456 operand matches due to the constraints, or -1 if no match is required.
457 If two operands match by coincidence, but are not required to match by
458 the constraints, -1 is returned.
460 OPERAND_CLASS is an array which indicates the smallest class
461 required by the constraints. If the alternative that matches calls
462 for some class `class', and the operand matches a subclass of `class',
463 OPERAND_CLASS is set to `class' as required by the constraints, not to
464 the subclass. If an alternative allows more than one class,
465 OPERAND_CLASS is set to the smallest class that is a union of the
469 constrain_asm_operands (n_operands
, operands
, operand_constraints
,
470 operand_matches
, operand_class
)
473 char **operand_constraints
;
474 int *operand_matches
;
475 enum reg_class
*operand_class
;
477 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
479 int this_alternative
, this_operand
;
483 for (j
= 0; j
< n_operands
; j
++)
484 constraints
[j
] = operand_constraints
[j
];
486 /* Compute the number of alternatives in the operands. reload has
487 already guaranteed that all operands have the same number of
491 for (q
= constraints
[0]; *q
; q
++)
492 n_alternatives
+= (*q
== ',');
494 this_alternative
= 0;
495 while (this_alternative
< n_alternatives
)
500 /* No operands match, no narrow class requirements yet. */
501 for (i
= 0; i
< n_operands
; i
++)
503 operand_matches
[i
] = -1;
504 operand_class
[i
] = NO_REGS
;
507 for (this_operand
= 0; this_operand
< n_operands
; this_operand
++)
509 rtx op
= operands
[this_operand
];
510 enum machine_mode mode
= GET_MODE (op
);
511 char *p
= constraints
[this_operand
];
516 if (GET_CODE (op
) == SUBREG
)
518 if (GET_CODE (SUBREG_REG (op
)) == REG
519 && REGNO (SUBREG_REG (op
)) < FIRST_PSEUDO_REGISTER
)
520 offset
= SUBREG_WORD (op
);
521 op
= SUBREG_REG (op
);
524 /* An empty constraint or empty alternative
525 allows anything which matched the pattern. */
526 if (*p
== 0 || *p
== ',')
529 while (*p
&& (c
= *p
++) != ',')
543 /* Ignore rest of this alternative. */
544 while (*p
&& *p
!= ',') p
++;
553 /* This operand must be the same as a previous one.
554 This kind of constraint is used for instructions such
555 as add when they take only two operands.
557 Note that the lower-numbered operand is passed first. */
559 if (operands_match_p (operands
[c
- '0'],
560 operands
[this_operand
]))
562 operand_matches
[this_operand
] = c
- '0';
568 /* p is used for address_operands. Since this is an asm,
569 just to make sure that the operand is valid for Pmode. */
571 if (strict_memory_address_p (Pmode
, op
))
576 /* Anything goes unless it is a REG and really has a hard reg
577 but the hard reg is not in the class GENERAL_REGS. */
578 if (GENERAL_REGS
== ALL_REGS
579 || GET_CODE (op
) != REG
580 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
))
582 if (GET_CODE (op
) == REG
)
583 operand_class
[this_operand
]
584 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
590 if (GET_CODE (op
) == REG
591 && (GENERAL_REGS
== ALL_REGS
592 || reg_fits_class_p (op
, GENERAL_REGS
, offset
, mode
)))
594 operand_class
[this_operand
]
595 = reg_class_subunion
[(int) operand_class
[this_operand
]][(int) GENERAL_REGS
];
601 /* This is used for a MATCH_SCRATCH in the cases when we
602 don't actually need anything. So anything goes any time. */
607 if (GET_CODE (op
) == MEM
)
612 if (GET_CODE (op
) == MEM
613 && (GET_CODE (XEXP (op
, 0)) == PRE_DEC
614 || GET_CODE (XEXP (op
, 0)) == POST_DEC
))
619 if (GET_CODE (op
) == MEM
620 && (GET_CODE (XEXP (op
, 0)) == PRE_INC
621 || GET_CODE (XEXP (op
, 0)) == POST_INC
))
626 /* Match any CONST_DOUBLE, but only if
627 we can examine the bits of it reliably. */
628 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
629 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
630 && GET_CODE (op
) != VOIDmode
&& ! flag_pretend_float
)
632 if (GET_CODE (op
) == CONST_DOUBLE
)
637 if (GET_CODE (op
) == CONST_DOUBLE
)
643 if (GET_CODE (op
) == CONST_DOUBLE
644 && CONST_DOUBLE_OK_FOR_LETTER_P (op
, c
))
649 if (GET_CODE (op
) == CONST_INT
650 || (GET_CODE (op
) == CONST_DOUBLE
651 && GET_MODE (op
) == VOIDmode
))
660 if (GET_CODE (op
) == CONST_INT
661 || (GET_CODE (op
) == CONST_DOUBLE
662 && GET_MODE (op
) == VOIDmode
))
674 if (GET_CODE (op
) == CONST_INT
675 && CONST_OK_FOR_LETTER_P (INTVAL (op
), c
))
679 #ifdef EXTRA_CONSTRAINT
685 if (EXTRA_CONSTRAINT (op
, c
))
691 if (GET_CODE (op
) == MEM
&& ! offsettable_memref_p (op
))
696 if (offsettable_memref_p (op
))
701 if (GET_CODE (op
) == REG
702 && reg_fits_class_p (op
, REG_CLASS_FROM_LETTER (c
),
705 operand_class
[this_operand
]
706 = reg_class_subunion
[(int)operand_class
[this_operand
]][(int) REG_CLASS_FROM_LETTER (c
)];
711 constraints
[this_operand
] = p
;
712 /* If this operand did not win somehow,
713 this alternative loses. */
717 /* This alternative won; the operands are ok.
718 Change whichever operands this alternative says to change. */
725 /* For operands constrained to match another operand, copy the other
726 operand's class to this operand's class. */
727 for (j
= 0; j
< n_operands
; j
++)
728 if (operand_matches
[j
] >= 0)
729 operand_class
[j
] = operand_class
[operand_matches
[j
]];
731 return this_alternative
== n_alternatives
? -1 : this_alternative
;
734 /* Record the life info of each stack reg in INSN, updating REGSTACK.
735 N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
736 is an array of the constraint strings used in the asm statement.
737 OPERANDS is an array of all operands for the insn, and is assumed to
738 contain all output operands, then all inputs operands.
740 There are many rules that an asm statement for stack-like regs must
741 follow. Those rules are explained at the top of this file: the rule
742 numbers below refer to that explanation. */
745 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
751 int n_inputs
, n_outputs
;
754 int n_operands
= n_inputs
+ n_outputs
;
755 int first_input
= n_outputs
;
757 int malformed_asm
= 0;
758 rtx body
= PATTERN (insn
);
760 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
762 enum reg_class
*operand_class
763 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
765 int reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
766 int implicitly_dies
[FIRST_PSEUDO_REGISTER
];
770 /* Find out what the constraints require. If no constraint
771 alternative matches, this asm is malformed. */
772 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
773 operand_matches
, operand_class
);
777 /* Strip SUBREGs here to make the following code simpler. */
778 for (i
= 0; i
< n_operands
; i
++)
779 if (GET_CODE (operands
[i
]) == SUBREG
780 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
781 operands
[i
] = SUBREG_REG (operands
[i
]);
783 /* Set up CLOBBER_REG. */
787 if (GET_CODE (body
) == PARALLEL
)
789 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
791 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
792 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
794 rtx clobber
= XVECEXP (body
, 0, i
);
795 rtx reg
= XEXP (clobber
, 0);
797 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
798 reg
= SUBREG_REG (reg
);
800 if (STACK_REG_P (reg
))
802 clobber_reg
[n_clobbers
] = reg
;
808 /* Enforce rule #4: Output operands must specifically indicate which
809 reg an output appears in after an asm. "=f" is not allowed: the
810 operand constraints must select a class with a single reg.
812 Also enforce rule #5: Output operands must start at the top of
813 the reg-stack: output operands may not "skip" a reg. */
815 bzero (reg_used_as_output
, sizeof (reg_used_as_output
));
816 for (i
= 0; i
< n_outputs
; i
++)
817 if (STACK_REG_P (operands
[i
]))
818 if (reg_class_size
[(int) operand_class
[i
]] != 1)
821 (insn
, "Output constraint %d must specify a single register", i
);
825 reg_used_as_output
[REGNO (operands
[i
])] = 1;
828 /* Search for first non-popped reg. */
829 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
830 if (! reg_used_as_output
[i
])
833 /* If there are any other popped regs, that's an error. */
834 for (; i
< LAST_STACK_REG
+ 1; i
++)
835 if (reg_used_as_output
[i
])
838 if (i
!= LAST_STACK_REG
+ 1)
840 error_for_asm (insn
, "Output regs must be grouped at top of stack");
844 /* Enforce rule #2: All implicitly popped input regs must be closer
845 to the top of the reg-stack than any input that is not implicitly
848 bzero (implicitly_dies
, sizeof (implicitly_dies
));
849 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
850 if (STACK_REG_P (operands
[i
]))
852 /* An input reg is implicitly popped if it is tied to an
853 output, or if there is a CLOBBER for it. */
856 for (j
= 0; j
< n_clobbers
; j
++)
857 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
860 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
861 implicitly_dies
[REGNO (operands
[i
])] = 1;
864 /* Search for first non-popped reg. */
865 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
866 if (! implicitly_dies
[i
])
869 /* If there are any other popped regs, that's an error. */
870 for (; i
< LAST_STACK_REG
+ 1; i
++)
871 if (implicitly_dies
[i
])
874 if (i
!= LAST_STACK_REG
+ 1)
877 "Implicitly popped regs must be grouped at top of stack");
881 /* Enfore rule #3: If any input operand uses the "f" constraint, all
882 output constraints must use the "&" earlyclobber.
884 ??? Detect this more deterministically by having constraint_asm_operands
885 record any earlyclobber. */
887 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
888 if (operand_matches
[i
] == -1)
892 for (j
= 0; j
< n_outputs
; j
++)
893 if (operands_match_p (operands
[j
], operands
[i
]))
896 "Output operand %d must use `&' constraint", j
);
903 /* Avoid further trouble with this insn. */
904 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
905 PUT_MODE (insn
, VOIDmode
);
909 /* Process all outputs */
910 for (i
= 0; i
< n_outputs
; i
++)
912 rtx op
= operands
[i
];
914 if (! STACK_REG_P (op
))
915 if (stack_regs_mentioned_p (op
))
920 /* Each destination is dead before this insn. If the
921 destination is not used after this insn, record this with
924 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
)))
925 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
, op
,
928 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (op
));
931 /* Process all inputs */
932 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
934 if (! STACK_REG_P (operands
[i
]))
935 if (stack_regs_mentioned_p (operands
[i
]))
940 /* If an input is dead after the insn, record a death note.
941 But don't record a death note if there is already a death note,
942 or if the input is also an output. */
944 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]))
945 && operand_matches
[i
] == -1
946 && find_regno_note (insn
, REG_DEAD
, REGNO (operands
[i
])) == NULL_RTX
)
947 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
, operands
[i
],
950 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
]));
954 /* Scan PAT, which is part of INSN, and record registers appearing in
955 a SET_DEST in DEST, and other registers in SRC.
957 This function does not know about SET_DESTs that are both input and
958 output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
961 record_reg_life_pat (pat
, src
, dest
)
963 HARD_REG_SET
*src
, *dest
;
968 if (STACK_REG_P (pat
))
971 SET_HARD_REG_BIT (*src
, REGNO (pat
));
974 SET_HARD_REG_BIT (*dest
, REGNO (pat
));
979 if (GET_CODE (pat
) == SET
)
981 record_reg_life_pat (XEXP (pat
, 0), NULL_PTR
, dest
);
982 record_reg_life_pat (XEXP (pat
, 1), src
, NULL_PTR
);
986 /* We don't need to consider either of these cases. */
987 if (GET_CODE (pat
) == USE
|| GET_CODE (pat
) == CLOBBER
)
990 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
991 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
997 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
998 record_reg_life_pat (XVECEXP (pat
, i
, j
), src
, dest
);
1000 else if (fmt
[i
] == 'e')
1001 record_reg_life_pat (XEXP (pat
, i
), src
, dest
);
1005 /* Calculate the number of inputs and outputs in BODY, an
1006 asm_operands. N_OPERANDS is the total number of operands, and
1007 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1011 get_asm_operand_lengths (body
, n_operands
, n_inputs
, n_outputs
)
1014 int *n_inputs
, *n_outputs
;
1016 if (GET_CODE (body
) == SET
&& GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
)
1017 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
1019 else if (GET_CODE (body
) == ASM_OPERANDS
)
1020 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (body
);
1022 else if (GET_CODE (body
) == PARALLEL
1023 && GET_CODE (XVECEXP (body
, 0, 0)) == SET
)
1024 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body
, 0, 0)));
1026 else if (GET_CODE (body
) == PARALLEL
1027 && GET_CODE (XVECEXP (body
, 0, 0)) == ASM_OPERANDS
)
1028 *n_inputs
= ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body
, 0, 0));
1032 *n_outputs
= n_operands
- *n_inputs
;
1035 /* Scan INSN, which is in BLOCK, and record the life & death of stack
1036 registers in REGSTACK. This function is called to process insns from
1037 the last insn in a block to the first. The actual scanning is done in
1038 record_reg_life_pat.
1040 If a register is live after a CALL_INSN, but is not a value return
1041 register for that CALL_INSN, then code is emitted to initialize that
1042 register. The block_end[] data is kept accurate.
1044 Existing death and unset notes for stack registers are deleted
1045 before processing the insn. */
1048 record_reg_life (insn
, block
, regstack
)
1053 rtx note
, *note_link
;
1056 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
1057 || INSN_DELETED_P (insn
))
1060 /* Strip death notes for stack regs from this insn */
1062 note_link
= ®_NOTES(insn
);
1063 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
1064 if (STACK_REG_P (XEXP (note
, 0))
1065 && (REG_NOTE_KIND (note
) == REG_DEAD
1066 || REG_NOTE_KIND (note
) == REG_UNUSED
))
1067 *note_link
= XEXP (note
, 1);
1069 note_link
= &XEXP (note
, 1);
1071 /* Process all patterns in the insn. */
1073 n_operands
= asm_noperands (PATTERN (insn
));
1074 if (n_operands
>= 0)
1076 /* This insn is an `asm' with operands. Decode the operands,
1077 decide how many are inputs, and record the life information. */
1079 rtx operands
[MAX_RECOG_OPERANDS
];
1080 rtx body
= PATTERN (insn
);
1081 int n_inputs
, n_outputs
;
1082 char **constraints
= (char **) alloca (n_operands
* sizeof (char *));
1084 decode_asm_operands (body
, operands
, NULL_PTR
, constraints
, NULL_PTR
);
1085 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
1086 record_asm_reg_life (insn
, regstack
, operands
, constraints
,
1087 n_inputs
, n_outputs
);
1091 /* An insn referencing a stack reg has a mode of QImode. */
1092 if (GET_MODE (insn
) == QImode
)
1094 HARD_REG_SET src
, dest
;
1097 CLEAR_HARD_REG_SET (src
);
1098 CLEAR_HARD_REG_SET (dest
);
1099 record_reg_life_pat (PATTERN (insn
), &src
, &dest
);
1101 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
1102 if (! TEST_HARD_REG_BIT (regstack
->reg_set
, regno
))
1104 if (TEST_HARD_REG_BIT (src
, regno
)
1105 && ! TEST_HARD_REG_BIT (dest
, regno
))
1106 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1107 FP_mode_reg
[regno
][(int) DFmode
],
1109 else if (TEST_HARD_REG_BIT (dest
, regno
))
1110 REG_NOTES (insn
) = gen_rtx (EXPR_LIST
, REG_UNUSED
,
1111 FP_mode_reg
[regno
][(int) DFmode
],
1115 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, dest
);
1116 IOR_HARD_REG_SET (regstack
->reg_set
, src
);
1119 /* There might be a reg that is live after a function call.
1120 Initialize it to zero so that the program does not crash. See comment
1121 towards the end of stack_reg_life_analysis(). */
1123 if (GET_CODE (insn
) == CALL_INSN
)
1125 int reg
= FIRST_FLOAT_REG
;
1127 /* If a stack reg is mentioned in a CALL_INSN, it must be as the
1130 if (stack_regs_mentioned_p (PATTERN (insn
)))
1133 for (; reg
<= LAST_STACK_REG
; reg
++)
1134 if (TEST_HARD_REG_BIT (regstack
->reg_set
, reg
))
1138 /* The insn will use virtual register numbers, and so
1139 convert_regs is expected to process these. But BLOCK_NUM
1140 cannot be used on these insns, because they do not appear in
1143 pat
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1144 CONST0_RTX (DFmode
));
1145 init
= emit_insn_after (pat
, insn
);
1146 PUT_MODE (init
, QImode
);
1148 CLEAR_HARD_REG_BIT (regstack
->reg_set
, reg
);
1150 /* If the CALL_INSN was the end of a block, move the
1151 block_end to point to the new insn. */
1153 if (block_end
[block
] == insn
)
1154 block_end
[block
] = init
;
1157 /* Some regs do not survive a CALL */
1159 AND_COMPL_HARD_REG_SET (regstack
->reg_set
, call_used_reg_set
);
1163 /* Find all basic blocks of the function, which starts with FIRST.
1164 For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1172 register RTX_CODE prev_code
= BARRIER
;
1173 register RTX_CODE code
;
1175 /* Record where all the blocks start and end.
1176 Record which basic blocks control can drop in to. */
1179 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1181 /* Note that this loop must select the same block boundaries
1182 as code in reg_to_stack. */
1184 code
= GET_CODE (insn
);
1186 if (code
== CODE_LABEL
1187 || (prev_code
!= INSN
1188 && prev_code
!= CALL_INSN
1189 && prev_code
!= CODE_LABEL
1190 && (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)))
1192 block_begin
[++block
] = insn
;
1193 block_end
[block
] = insn
;
1194 block_drops_in
[block
] = prev_code
!= BARRIER
;
1196 else if (code
== INSN
|| code
== CALL_INSN
|| code
== JUMP_INSN
)
1197 block_end
[block
] = insn
;
1199 BLOCK_NUM (insn
) = block
;
1201 if (code
== CODE_LABEL
)
1202 LABEL_REFS (insn
) = insn
; /* delete old chain */
1208 if (block
+ 1 != blocks
)
1211 /* generate all label references to the corresponding jump insn */
1212 for (block
= 0; block
< blocks
; block
++)
1214 insn
= block_end
[block
];
1216 if (GET_CODE (insn
) == JUMP_INSN
)
1217 record_label_references (insn
, PATTERN (insn
));
1221 /* Determine the which registers are live at the start of each basic
1222 block of the function whose first insn is FIRST.
1224 First, if the function returns a real_type, mark the function
1225 return type as live at each return point, as the RTL may not give any
1226 hint that the register is live.
1228 Then, start with the last block and work back to the first block.
1229 Similarly, work backwards within each block, insn by insn, recording
1230 which regs are die and which are used (and therefore live) in the
1231 hard reg set of block_stack_in[].
1233 After processing each basic block, if there is a label at the start
1234 of the block, propagate the live registers to all jumps to this block.
1236 As a special case, if there are regs live in this block, that are
1237 not live in a block containing a jump to this label, and the block
1238 containing the jump has already been processed, we must propagate this
1239 block's entry register life back to the block containing the jump, and
1240 restart life analysis from there.
1242 In the worst case, this function may traverse the insns
1243 REG_STACK_SIZE times. This is necessary, since a jump towards the end
1244 of the insns may not know that a reg is live at a target that is early
1245 in the insns. So we back up and start over with the new reg live.
1247 If there are registers that are live at the start of the function,
1248 insns are emitted to initialize these registers. Something similar is
1249 done after CALL_INSNs in record_reg_life. */
1252 stack_reg_life_analysis (first
)
1256 struct stack_def regstack
;
1258 if (current_function_returns_real
1259 && STACK_REG_P (DECL_RTL (DECL_RESULT (current_function_decl
))))
1261 /* Find all RETURN insns and mark them. */
1263 int value_regno
= REGNO (DECL_RTL (DECL_RESULT (current_function_decl
)));
1265 for (block
= blocks
- 1; block
>= 0; block
--)
1266 if (GET_CODE (block_end
[block
]) == JUMP_INSN
1267 && GET_CODE (PATTERN (block_end
[block
])) == RETURN
)
1268 SET_HARD_REG_BIT (block_out_reg_set
[block
], value_regno
);
1270 /* Mark of the end of last block if we "fall off" the end of the
1271 function into the epilogue. */
1273 if (GET_CODE (block_end
[blocks
-1]) != JUMP_INSN
1274 || GET_CODE (PATTERN (block_end
[blocks
-1])) == RETURN
)
1275 SET_HARD_REG_BIT (block_out_reg_set
[blocks
-1], value_regno
);
1278 /* now scan all blocks backward for stack register use */
1283 register rtx insn
, prev
;
1285 /* current register status at last instruction */
1287 COPY_HARD_REG_SET (regstack
.reg_set
, block_out_reg_set
[block
]);
1289 prev
= block_end
[block
];
1293 prev
= PREV_INSN (insn
);
1295 /* If the insn is a CALL_INSN, we need to ensure that
1296 everything dies. But otherwise don't process unless there
1297 are some stack regs present. */
1299 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
1300 record_reg_life (insn
, block
, ®stack
);
1302 } while (insn
!= block_begin
[block
]);
1304 /* Set the state at the start of the block. Mark that no
1305 register mapping information known yet. */
1307 COPY_HARD_REG_SET (block_stack_in
[block
].reg_set
, regstack
.reg_set
);
1308 block_stack_in
[block
].top
= -2;
1310 /* If there is a label, propagate our register life to all jumps
1313 if (GET_CODE (insn
) == CODE_LABEL
)
1316 int must_restart
= 0;
1318 for (label
= LABEL_REFS (insn
); label
!= insn
;
1319 label
= LABEL_NEXTREF (label
))
1321 int jump_block
= BLOCK_NUM (CONTAINING_INSN (label
));
1323 if (jump_block
< block
)
1324 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1325 block_stack_in
[block
].reg_set
);
1328 /* The block containing the jump has already been
1329 processed. If there are registers that were not known
1330 to be live then, but are live now, we must back up
1331 and restart life analysis from that point with the new
1332 life information. */
1334 GO_IF_HARD_REG_SUBSET (block_stack_in
[block
].reg_set
,
1335 block_out_reg_set
[jump_block
],
1338 IOR_HARD_REG_SET (block_out_reg_set
[jump_block
],
1339 block_stack_in
[block
].reg_set
);
1352 if (block_drops_in
[block
])
1353 IOR_HARD_REG_SET (block_out_reg_set
[block
-1],
1354 block_stack_in
[block
].reg_set
);
1360 /* If any reg is live at the start of the first block of a
1361 function, then we must guarantee that the reg holds some value by
1362 generating our own "load" of that register. Otherwise a 387 would
1363 fault trying to access an empty register. */
1365 HARD_REG_SET empty_regs
;
1366 CLEAR_HARD_REG_SET (empty_regs
);
1367 GO_IF_HARD_REG_SUBSET (block_stack_in
[0].reg_set
, empty_regs
,
1371 /* Load zero into each live register. The fact that a register
1372 appears live at the function start does not necessarily imply an error
1373 in the user program: it merely means that we could not determine that
1374 there wasn't such an error, just as -Wunused sometimes gives
1375 "incorrect" warnings. In those cases, these initializations will do
1378 Note that we are inserting virtual register references here:
1379 these insns must be processed by convert_regs later. Also, these
1380 insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1382 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
1383 if (TEST_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
))
1387 init_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[reg
][(int) DFmode
],
1388 CONST0_RTX (DFmode
));
1389 block_begin
[0] = emit_insn_after (init_rtx
, first
);
1390 PUT_MODE (block_begin
[0], QImode
);
1392 CLEAR_HARD_REG_BIT (block_stack_in
[0].reg_set
, reg
);
1399 /*****************************************************************************
1400 This section deals with stack register substitution, and forms the second
1402 *****************************************************************************/
1404 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1405 the desired hard REGNO. */
1408 replace_reg (reg
, regno
)
1412 if (regno
< FIRST_STACK_REG
|| regno
> LAST_STACK_REG
1413 || ! STACK_REG_P (*reg
))
1416 if (GET_MODE_CLASS (GET_MODE (*reg
)) != MODE_FLOAT
)
1419 *reg
= FP_mode_reg
[regno
][(int) GET_MODE (*reg
)];
1422 /* Remove a note of type NOTE, which must be found, for register
1423 number REGNO from INSN. Remove only one such note. */
1426 remove_regno_note (insn
, note
, regno
)
1431 register rtx
*note_link
, this;
1433 note_link
= ®_NOTES(insn
);
1434 for (this = *note_link
; this; this = XEXP (this, 1))
1435 if (REG_NOTE_KIND (this) == note
1436 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
1438 *note_link
= XEXP (this, 1);
1442 note_link
= &XEXP (this, 1);
1447 /* Find the hard register number of virtual register REG in REGSTACK.
1448 The hard register number is relative to the top of the stack. -1 is
1449 returned if the register is not found. */
1452 get_hard_regnum (regstack
, reg
)
1458 if (! STACK_REG_P (reg
))
1461 for (i
= regstack
->top
; i
>= 0; i
--)
1462 if (regstack
->reg
[i
] == REGNO (reg
))
1465 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
1468 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1469 the chain of insns. Doing so could confuse block_begin and block_end
1470 if this were the only insn in the block. */
1473 delete_insn_for_stacker (insn
)
1476 PUT_CODE (insn
, NOTE
);
1477 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1478 NOTE_SOURCE_FILE (insn
) = 0;
1479 INSN_DELETED_P (insn
) = 1;
1482 /* Emit an insn to pop virtual register REG before or after INSN.
1483 REGSTACK is the stack state after INSN and is updated to reflect this
1484 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1485 is represented as a SET whose destination is the register to be popped
1486 and source is the top of stack. A death note for the top of stack
1487 cases the movdf pattern to pop. */
1490 emit_pop_insn (insn
, regstack
, reg
, when
)
1496 rtx pop_insn
, pop_rtx
;
1499 hard_regno
= get_hard_regnum (regstack
, reg
);
1501 if (hard_regno
< FIRST_STACK_REG
)
1504 pop_rtx
= gen_rtx (SET
, VOIDmode
, FP_mode_reg
[hard_regno
][(int) DFmode
],
1505 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1507 pop_insn
= (*when
) (pop_rtx
, insn
);
1508 /* ??? This used to be VOIDmode, but that seems wrong. */
1509 PUT_MODE (pop_insn
, QImode
);
1511 REG_NOTES (pop_insn
) = gen_rtx (EXPR_LIST
, REG_DEAD
,
1512 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
],
1513 REG_NOTES (pop_insn
));
1515 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
1516 = regstack
->reg
[regstack
->top
];
1518 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
1523 /* Emit an insn before or after INSN to swap virtual register REG with the
1524 top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1525 REGSTACK is the stack state before the swap, and is updated to reflect
1526 the swap. A swap insn is represented as a PARALLEL of two patterns:
1527 each pattern moves one reg to the other.
1529 If REG is already at the top of the stack, no insn is emitted. */
1532 emit_swap_insn (insn
, regstack
, reg
)
1539 rtx swap_rtx
, swap_insn
;
1540 int tmp
, other_reg
; /* swap regno temps */
1541 rtx i1
; /* the stack-reg insn prior to INSN */
1542 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
1544 hard_regno
= get_hard_regnum (regstack
, reg
);
1546 if (hard_regno
< FIRST_STACK_REG
)
1548 if (hard_regno
== FIRST_STACK_REG
)
1551 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
1553 tmp
= regstack
->reg
[other_reg
];
1554 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
1555 regstack
->reg
[regstack
->top
] = tmp
;
1557 /* Find the previous insn involving stack regs, but don't go past
1558 any labels, calls or jumps. */
1559 i1
= prev_nonnote_insn (insn
);
1560 while (i1
&& GET_CODE (i1
) == INSN
&& GET_MODE (i1
) != QImode
)
1561 i1
= prev_nonnote_insn (i1
);
1564 i1set
= single_set (i1
);
1568 rtx i2
; /* the stack-reg insn prior to I1 */
1569 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
1570 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
1572 /* If the previous register stack push was from the reg we are to
1573 swap with, omit the swap. */
1575 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == FIRST_STACK_REG
1576 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == hard_regno
- 1
1577 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1580 /* If the previous insn wrote to the reg we are to swap with,
1583 if (GET_CODE (i1dest
) == REG
&& REGNO (i1dest
) == hard_regno
1584 && GET_CODE (i1src
) == REG
&& REGNO (i1src
) == FIRST_STACK_REG
1585 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
1589 if (GET_RTX_CLASS (GET_CODE (i1
)) == 'i' && sets_cc0_p (PATTERN (i1
)))
1591 i1
= next_nonnote_insn (i1
);
1596 swap_rtx
= gen_swapdf (FP_mode_reg
[hard_regno
][(int) DFmode
],
1597 FP_mode_reg
[FIRST_STACK_REG
][(int) DFmode
]);
1598 swap_insn
= emit_insn_after (swap_rtx
, i1
);
1599 /* ??? This used to be VOIDmode, but that seems wrong. */
1600 PUT_MODE (swap_insn
, QImode
);
1603 /* Handle a move to or from a stack register in PAT, which is in INSN.
1604 REGSTACK is the current stack. */
1607 move_for_stack_reg (insn
, regstack
, pat
)
1612 rtx
*src
= get_true_reg (&SET_SRC (pat
));
1613 rtx
*dest
= get_true_reg (&SET_DEST (pat
));
1616 if (STACK_REG_P (*src
) && STACK_REG_P (*dest
))
1618 /* Write from one stack reg to another. If SRC dies here, then
1619 just change the register mapping and delete the insn. */
1621 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1626 /* If this is a no-op move, there must not be a REG_DEAD note. */
1627 if (REGNO (*src
) == REGNO (*dest
))
1630 for (i
= regstack
->top
; i
>= 0; i
--)
1631 if (regstack
->reg
[i
] == REGNO (*src
))
1634 /* The source must be live, and the dest must be dead. */
1635 if (i
< 0 || get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1638 /* It is possible that the dest is unused after this insn.
1639 If so, just pop the src. */
1641 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1643 emit_pop_insn (insn
, regstack
, *src
, emit_insn_after
);
1645 delete_insn_for_stacker (insn
);
1649 regstack
->reg
[i
] = REGNO (*dest
);
1651 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1652 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1654 delete_insn_for_stacker (insn
);
1659 /* The source reg does not die. */
1661 /* If this appears to be a no-op move, delete it, or else it
1662 will confuse the machine description output patterns. But if
1663 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1664 for REG_UNUSED will not work for deleted insns. */
1666 if (REGNO (*src
) == REGNO (*dest
))
1668 if (find_regno_note (insn
, REG_UNUSED
, REGNO (*dest
)))
1669 emit_pop_insn (insn
, regstack
, *dest
, emit_insn_after
);
1671 delete_insn_for_stacker (insn
);
1675 /* The destination ought to be dead */
1676 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1679 replace_reg (src
, get_hard_regnum (regstack
, *src
));
1681 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1682 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1683 replace_reg (dest
, FIRST_STACK_REG
);
1685 else if (STACK_REG_P (*src
))
1687 /* Save from a stack reg to MEM, or possibly integer reg. Since
1688 only top of stack may be saved, emit an exchange first if
1691 emit_swap_insn (insn
, regstack
, *src
);
1693 note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src
));
1696 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1698 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src
));
1701 replace_reg (src
, FIRST_STACK_REG
);
1703 else if (STACK_REG_P (*dest
))
1705 /* Load from MEM, or possibly integer REG or constant, into the
1706 stack regs. The actual target is always the top of the
1707 stack. The stack mapping is changed to reflect that DEST is
1708 now at top of stack. */
1710 /* The destination ought to be dead */
1711 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
)
1714 if (regstack
->top
>= REG_STACK_SIZE
)
1717 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1718 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1719 replace_reg (dest
, FIRST_STACK_REG
);
1726 swap_rtx_condition (pat
)
1732 if (GET_RTX_CLASS (GET_CODE (pat
)) == '<')
1734 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1738 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1739 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1745 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1746 swap_rtx_condition (XVECEXP (pat
, i
, j
));
1748 else if (fmt
[i
] == 'e')
1749 swap_rtx_condition (XEXP (pat
, i
));
1753 /* Handle a comparison. Special care needs to be taken to avoid
1754 causing comparisons that a 387 cannot do correctly, such as EQ.
1756 Also, a pop insn may need to be emitted. The 387 does have an
1757 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1758 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1762 compare_for_stack_reg (insn
, regstack
, pat
)
1768 rtx src1_note
, src2_note
;
1770 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1771 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1773 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1774 registers that die in this insn - move those to stack top first. */
1775 if (! STACK_REG_P (*src1
)
1776 || (STACK_REG_P (*src2
)
1777 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1781 temp
= XEXP (SET_SRC (pat
), 0);
1782 XEXP (SET_SRC (pat
), 0) = XEXP (SET_SRC (pat
), 1);
1783 XEXP (SET_SRC (pat
), 1) = temp
;
1785 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1786 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1788 next
= next_cc0_user (insn
);
1789 if (next
== NULL_RTX
)
1792 swap_rtx_condition (PATTERN (next
));
1793 INSN_CODE (next
) = -1;
1794 INSN_CODE (insn
) = -1;
1797 /* We will fix any death note later. */
1799 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1801 if (STACK_REG_P (*src2
))
1802 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1804 src2_note
= NULL_RTX
;
1806 emit_swap_insn (insn
, regstack
, *src1
);
1808 replace_reg (src1
, FIRST_STACK_REG
);
1810 if (STACK_REG_P (*src2
))
1811 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1815 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src1_note
, 0)));
1816 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1820 /* If the second operand dies, handle that. But if the operands are
1821 the same stack register, don't bother, because only one death is
1822 needed, and it was just handled. */
1825 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1826 && REGNO (*src1
) == REGNO (*src2
)))
1828 /* As a special case, two regs may die in this insn if src2 is
1829 next to top of stack and the top of stack also dies. Since
1830 we have already popped src1, "next to top of stack" is really
1831 at top (FIRST_STACK_REG) now. */
1833 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1836 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (XEXP (src2_note
, 0)));
1837 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1842 /* The 386 can only represent death of the first operand in
1843 the case handled above. In all other cases, emit a separate
1844 pop and remove the death note from here. */
1846 link_cc0_insns (insn
);
1848 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1850 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1856 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1857 is the current register layout. */
1860 subst_stack_regs_pat (insn
, regstack
, pat
)
1866 rtx
*src1
= (rtx
*) NULL_PTR
, *src2
;
1867 rtx src1_note
, src2_note
;
1869 if (GET_CODE (pat
) != SET
)
1872 dest
= get_true_reg (&SET_DEST (pat
));
1873 src
= get_true_reg (&SET_SRC (pat
));
1875 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1877 if (*dest
!= cc0_rtx
1878 && (STACK_REG_P (*src
)
1879 || (STACK_REG_P (*dest
)
1880 && (GET_CODE (*src
) == REG
|| GET_CODE (*src
) == MEM
1881 || GET_CODE (*src
) == CONST_DOUBLE
))))
1882 move_for_stack_reg (insn
, regstack
, pat
);
1884 switch (GET_CODE (SET_SRC (pat
)))
1887 compare_for_stack_reg (insn
, regstack
, pat
);
1891 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1892 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1893 replace_reg (dest
, FIRST_STACK_REG
);
1897 /* This is a `tstM2' case. */
1898 if (*dest
!= cc0_rtx
)
1905 case FLOAT_TRUNCATE
:
1909 /* These insns only operate on the top of the stack. DEST might
1910 be cc0_rtx if we're processing a tstM pattern. Also, it's
1911 possible that the tstM case results in a REG_DEAD note on the
1915 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1917 emit_swap_insn (insn
, regstack
, *src1
);
1919 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1921 if (STACK_REG_P (*dest
))
1922 replace_reg (dest
, FIRST_STACK_REG
);
1926 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1928 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1931 replace_reg (src1
, FIRST_STACK_REG
);
1937 /* On i386, reversed forms of subM3 and divM3 exist for
1938 MODE_FLOAT, so the same code that works for addM3 and mulM3
1942 /* These insns can accept the top of stack as a destination
1943 from a stack reg or mem, or can use the top of stack as a
1944 source and some other stack register (possibly top of stack)
1945 as a destination. */
1947 src1
= get_true_reg (&XEXP (SET_SRC (pat
), 0));
1948 src2
= get_true_reg (&XEXP (SET_SRC (pat
), 1));
1950 /* We will fix any death note later. */
1952 if (STACK_REG_P (*src1
))
1953 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1955 src1_note
= NULL_RTX
;
1956 if (STACK_REG_P (*src2
))
1957 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1959 src2_note
= NULL_RTX
;
1961 /* If either operand is not a stack register, then the dest
1962 must be top of stack. */
1964 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1965 emit_swap_insn (insn
, regstack
, *dest
);
1968 /* Both operands are REG. If neither operand is already
1969 at the top of stack, choose to make the one that is the dest
1970 the new top of stack. */
1972 int src1_hard_regnum
, src2_hard_regnum
;
1974 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1975 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1976 if (src1_hard_regnum
== -1 || src2_hard_regnum
== -1)
1979 if (src1_hard_regnum
!= FIRST_STACK_REG
1980 && src2_hard_regnum
!= FIRST_STACK_REG
)
1981 emit_swap_insn (insn
, regstack
, *dest
);
1984 if (STACK_REG_P (*src1
))
1985 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1986 if (STACK_REG_P (*src2
))
1987 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1991 /* If the register that dies is at the top of stack, then
1992 the destination is somewhere else - merely substitute it.
1993 But if the reg that dies is not at top of stack, then
1994 move the top of stack to the dead reg, as though we had
1995 done the insn and then a store-with-pop. */
1997 if (REGNO (XEXP (src1_note
, 0)) == regstack
->reg
[regstack
->top
])
1999 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2000 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2004 int regno
= get_hard_regnum (regstack
, XEXP (src1_note
, 0));
2006 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2007 replace_reg (dest
, regno
);
2009 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2010 = regstack
->reg
[regstack
->top
];
2013 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2014 REGNO (XEXP (src1_note
, 0)));
2015 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2020 if (REGNO (XEXP (src2_note
, 0)) == regstack
->reg
[regstack
->top
])
2022 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2023 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2027 int regno
= get_hard_regnum (regstack
, XEXP (src2_note
, 0));
2029 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2030 replace_reg (dest
, regno
);
2032 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
2033 = regstack
->reg
[regstack
->top
];
2036 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2037 REGNO (XEXP (src2_note
, 0)));
2038 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
2043 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
2044 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
2050 switch (XINT (SET_SRC (pat
), 1))
2054 /* These insns only operate on the top of the stack. */
2056 src1
= get_true_reg (&XVECEXP (SET_SRC (pat
), 0, 0));
2058 emit_swap_insn (insn
, regstack
, *src1
);
2060 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
2062 if (STACK_REG_P (*dest
))
2063 replace_reg (dest
, FIRST_STACK_REG
);
2067 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
2069 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
2072 replace_reg (src1
, FIRST_STACK_REG
);
2086 /* Substitute hard regnums for any stack regs in INSN, which has
2087 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2088 before the insn, and is updated with changes made here. CONSTRAINTS is
2089 an array of the constraint strings used in the asm statement.
2091 OPERANDS is an array of the operands, and OPERANDS_LOC is a
2092 parallel array of where the operands were found. The output operands
2093 all precede the input operands.
2095 There are several requirements and assumptions about the use of
2096 stack-like regs in asm statements. These rules are enforced by
2097 record_asm_stack_regs; see comments there for details. Any
2098 asm_operands left in the RTL at this point may be assume to meet the
2099 requirements, since record_asm_stack_regs removes any problem asm. */
2102 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
, constraints
,
2103 n_inputs
, n_outputs
)
2106 rtx
*operands
, **operands_loc
;
2108 int n_inputs
, n_outputs
;
2110 int n_operands
= n_inputs
+ n_outputs
;
2111 int first_input
= n_outputs
;
2112 rtx body
= PATTERN (insn
);
2114 int *operand_matches
= (int *) alloca (n_operands
* sizeof (int *));
2115 enum reg_class
*operand_class
2116 = (enum reg_class
*) alloca (n_operands
* sizeof (enum reg_class
*));
2118 rtx
*note_reg
; /* Array of note contents */
2119 rtx
**note_loc
; /* Address of REG field of each note */
2120 enum reg_note
*note_kind
; /* The type of each note */
2125 struct stack_def temp_stack
;
2131 /* Find out what the constraints required. If no constraint
2132 alternative matches, that is a compiler bug: we should have caught
2133 such an insn during the life analysis pass (and reload should have
2134 caught it regardless). */
2136 i
= constrain_asm_operands (n_operands
, operands
, constraints
,
2137 operand_matches
, operand_class
);
2141 /* Strip SUBREGs here to make the following code simpler. */
2142 for (i
= 0; i
< n_operands
; i
++)
2143 if (GET_CODE (operands
[i
]) == SUBREG
2144 && GET_CODE (SUBREG_REG (operands
[i
])) == REG
)
2146 operands_loc
[i
] = & SUBREG_REG (operands
[i
]);
2147 operands
[i
] = SUBREG_REG (operands
[i
]);
2150 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2152 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2155 note_reg
= (rtx
*) alloca (i
* sizeof (rtx
));
2156 note_loc
= (rtx
**) alloca (i
* sizeof (rtx
*));
2157 note_kind
= (enum reg_note
*) alloca (i
* sizeof (enum reg_note
));
2160 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2162 rtx reg
= XEXP (note
, 0);
2163 rtx
*loc
= & XEXP (note
, 0);
2165 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2167 loc
= & SUBREG_REG (reg
);
2168 reg
= SUBREG_REG (reg
);
2171 if (STACK_REG_P (reg
)
2172 && (REG_NOTE_KIND (note
) == REG_DEAD
2173 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2175 note_reg
[n_notes
] = reg
;
2176 note_loc
[n_notes
] = loc
;
2177 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2182 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2186 if (GET_CODE (body
) == PARALLEL
)
2188 clobber_reg
= (rtx
*) alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2189 clobber_loc
= (rtx
**) alloca (XVECLEN (body
, 0) * sizeof (rtx
**));
2191 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2192 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2194 rtx clobber
= XVECEXP (body
, 0, i
);
2195 rtx reg
= XEXP (clobber
, 0);
2196 rtx
*loc
= & XEXP (clobber
, 0);
2198 if (GET_CODE (reg
) == SUBREG
&& GET_CODE (SUBREG_REG (reg
)) == REG
)
2200 loc
= & SUBREG_REG (reg
);
2201 reg
= SUBREG_REG (reg
);
2204 if (STACK_REG_P (reg
))
2206 clobber_reg
[n_clobbers
] = reg
;
2207 clobber_loc
[n_clobbers
] = loc
;
2213 bcopy (regstack
, &temp_stack
, sizeof (temp_stack
));
2215 /* Put the input regs into the desired place in TEMP_STACK. */
2217 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2218 if (STACK_REG_P (operands
[i
])
2219 && reg_class_subset_p (operand_class
[i
], FLOAT_REGS
)
2220 && operand_class
[i
] != FLOAT_REGS
)
2222 /* If an operand needs to be in a particular reg in
2223 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2224 these constraints are for single register classes, and reload
2225 guaranteed that operand[i] is already in that class, we can
2226 just use REGNO (operands[i]) to know which actual reg this
2227 operand needs to be in. */
2229 int regno
= get_hard_regnum (&temp_stack
, operands
[i
]);
2234 if (regno
!= REGNO (operands
[i
]))
2236 /* operands[i] is not in the right place. Find it
2237 and swap it with whatever is already in I's place.
2238 K is where operands[i] is now. J is where it should
2242 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2244 - (REGNO (operands
[i
]) - FIRST_STACK_REG
));
2246 temp
= temp_stack
.reg
[k
];
2247 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2248 temp_stack
.reg
[j
] = temp
;
2252 /* emit insns before INSN to make sure the reg-stack is in the right
2255 change_stack (insn
, regstack
, &temp_stack
, emit_insn_before
);
2257 /* Make the needed input register substitutions. Do death notes and
2258 clobbers too, because these are for inputs, not outputs. */
2260 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2261 if (STACK_REG_P (operands
[i
]))
2263 int regnum
= get_hard_regnum (regstack
, operands
[i
]);
2268 replace_reg (operands_loc
[i
], regnum
);
2271 for (i
= 0; i
< n_notes
; i
++)
2272 if (note_kind
[i
] == REG_DEAD
)
2274 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2279 replace_reg (note_loc
[i
], regnum
);
2282 for (i
= 0; i
< n_clobbers
; i
++)
2284 /* It's OK for a CLOBBER to reference a reg that is not live.
2285 Don't try to replace it in that case. */
2286 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2290 /* Sigh - clobbers always have QImode. But replace_reg knows
2291 that these regs can't be MODE_INT and will abort. Just put
2292 the right reg there without calling replace_reg. */
2294 *clobber_loc
[i
] = FP_mode_reg
[regnum
][(int) DFmode
];
2298 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2300 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2301 if (STACK_REG_P (operands
[i
]))
2303 /* An input reg is implicitly popped if it is tied to an
2304 output, or if there is a CLOBBER for it. */
2307 for (j
= 0; j
< n_clobbers
; j
++)
2308 if (operands_match_p (clobber_reg
[j
], operands
[i
]))
2311 if (j
< n_clobbers
|| operand_matches
[i
] >= 0)
2313 /* operands[i] might not be at the top of stack. But that's OK,
2314 because all we need to do is pop the right number of regs
2315 off of the top of the reg-stack. record_asm_stack_regs
2316 guaranteed that all implicitly popped regs were grouped
2317 at the top of the reg-stack. */
2319 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2320 regstack
->reg
[regstack
->top
]);
2325 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2326 Note that there isn't any need to substitute register numbers.
2327 ??? Explain why this is true. */
2329 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2331 /* See if there is an output for this hard reg. */
2334 for (j
= 0; j
< n_outputs
; j
++)
2335 if (STACK_REG_P (operands
[j
]) && REGNO (operands
[j
]) == i
)
2337 regstack
->reg
[++regstack
->top
] = i
;
2338 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2343 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2344 input that the asm didn't implicitly pop. If the asm didn't
2345 implicitly pop an input reg, that reg will still be live.
2347 Note that we can't use find_regno_note here: the register numbers
2348 in the death notes have already been substituted. */
2350 for (i
= 0; i
< n_outputs
; i
++)
2351 if (STACK_REG_P (operands
[i
]))
2355 for (j
= 0; j
< n_notes
; j
++)
2356 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2357 && note_kind
[j
] == REG_UNUSED
)
2359 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2365 for (i
= first_input
; i
< first_input
+ n_inputs
; i
++)
2366 if (STACK_REG_P (operands
[i
]))
2370 for (j
= 0; j
< n_notes
; j
++)
2371 if (REGNO (operands
[i
]) == REGNO (note_reg
[j
])
2372 && note_kind
[j
] == REG_DEAD
2373 && TEST_HARD_REG_BIT (regstack
->reg_set
, REGNO (operands
[i
])))
2375 insn
= emit_pop_insn (insn
, regstack
, operands
[i
],
2382 /* Substitute stack hard reg numbers for stack virtual registers in
2383 INSN. Non-stack register numbers are not changed. REGSTACK is the
2384 current stack content. Insns may be emitted as needed to arrange the
2385 stack for the 387 based on the contents of the insn. */
2388 subst_stack_regs (insn
, regstack
)
2392 register rtx
*note_link
, note
;
2396 if ((GET_CODE (insn
) != INSN
&& GET_CODE (insn
) != CALL_INSN
)
2397 || INSN_DELETED_P (insn
))
2400 /* The stack should be empty at a call. */
2402 if (GET_CODE (insn
) == CALL_INSN
)
2403 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
2404 if (TEST_HARD_REG_BIT (regstack
->reg_set
, i
))
2407 /* Do the actual substitution if any stack regs are mentioned.
2408 Since we only record whether entire insn mentions stack regs, and
2409 subst_stack_regs_pat only works for patterns that contain stack regs,
2410 we must check each pattern in a parallel here. A call_value_pop could
2413 if (GET_MODE (insn
) == QImode
)
2415 n_operands
= asm_noperands (PATTERN (insn
));
2416 if (n_operands
>= 0)
2418 /* This insn is an `asm' with operands. Decode the operands,
2419 decide how many are inputs, and do register substitution.
2420 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2422 rtx operands
[MAX_RECOG_OPERANDS
];
2423 rtx
*operands_loc
[MAX_RECOG_OPERANDS
];
2424 rtx body
= PATTERN (insn
);
2425 int n_inputs
, n_outputs
;
2427 = (char **) alloca (n_operands
* sizeof (char *));
2429 decode_asm_operands (body
, operands
, operands_loc
,
2430 constraints
, NULL_PTR
);
2431 get_asm_operand_lengths (body
, n_operands
, &n_inputs
, &n_outputs
);
2432 subst_asm_stack_regs (insn
, regstack
, operands
, operands_loc
,
2433 constraints
, n_inputs
, n_outputs
);
2437 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2438 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2440 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2441 subst_stack_regs_pat (insn
, regstack
,
2442 XVECEXP (PATTERN (insn
), 0, i
));
2445 subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2448 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2449 REG_UNUSED will already have been dealt with, so just return. */
2451 if (INSN_DELETED_P (insn
))
2454 /* If there is a REG_UNUSED note on a stack register on this insn,
2455 the indicated reg must be popped. The REG_UNUSED note is removed,
2456 since the form of the newly emitted pop insn references the reg,
2457 making it no longer `unset'. */
2459 note_link
= ®_NOTES(insn
);
2460 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2461 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2463 *note_link
= XEXP (note
, 1);
2464 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), emit_insn_after
);
2467 note_link
= &XEXP (note
, 1);
2470 /* Change the organization of the stack so that it fits a new basic
2471 block. Some registers might have to be popped, but there can never be
2472 a register live in the new block that is not now live.
2474 Insert any needed insns before or after INSN. WHEN is emit_insn_before
2475 or emit_insn_after. OLD is the original stack layout, and NEW is
2476 the desired form. OLD is updated to reflect the code emitted, ie, it
2477 will be the same as NEW upon return.
2479 This function will not preserve block_end[]. But that information
2480 is no longer needed once this has executed. */
2483 change_stack (insn
, old
, new, when
)
2491 /* We will be inserting new insns "backwards", by calling emit_insn_before.
2492 If we are to insert after INSN, find the next insn, and insert before
2495 if (when
== emit_insn_after
)
2496 insn
= NEXT_INSN (insn
);
2498 /* Pop any registers that are not needed in the new block. */
2500 for (reg
= old
->top
; reg
>= 0; reg
--)
2501 if (! TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2502 emit_pop_insn (insn
, old
, FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
],
2507 /* If the new block has never been processed, then it can inherit
2508 the old stack order. */
2510 new->top
= old
->top
;
2511 bcopy (old
->reg
, new->reg
, sizeof (new->reg
));
2515 /* This block has been entered before, and we must match the
2516 previously selected stack order. */
2518 /* By now, the only difference should be the order of the stack,
2519 not their depth or liveliness. */
2521 GO_IF_HARD_REG_EQUAL (old
->reg_set
, new->reg_set
, win
);
2527 if (old
->top
!= new->top
)
2530 /* Loop here emitting swaps until the stack is correct. The
2531 worst case number of swaps emitted is N + 2, where N is the
2532 depth of the stack. In some cases, the reg at the top of
2533 stack may be correct, but swapped anyway in order to fix
2534 other regs. But since we never swap any other reg away from
2535 its correct slot, this algorithm will converge. */
2539 /* Swap the reg at top of stack into the position it is
2540 supposed to be in, until the correct top of stack appears. */
2542 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2544 for (reg
= new->top
; reg
>= 0; reg
--)
2545 if (new->reg
[reg
] == old
->reg
[old
->top
])
2551 emit_swap_insn (insn
, old
,
2552 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
]);
2555 /* See if any regs remain incorrect. If so, bring an
2556 incorrect reg to the top of stack, and let the while loop
2559 for (reg
= new->top
; reg
>= 0; reg
--)
2560 if (new->reg
[reg
] != old
->reg
[reg
])
2562 emit_swap_insn (insn
, old
,
2563 FP_mode_reg
[old
->reg
[reg
]][(int) DFmode
]);
2568 /* At this point there must be no differences. */
2570 for (reg
= old
->top
; reg
>= 0; reg
--)
2571 if (old
->reg
[reg
] != new->reg
[reg
])
2576 /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2577 found, ensure that a jump from INSN to the code_label to which the
2578 label_ref points ends up with the same stack as that at the
2579 code_label. Do this by inserting insns just before the code_label to
2580 pop and rotate the stack until it is in the correct order. REGSTACK
2581 is the order of the register stack in INSN.
2583 Any code that is emitted here must not be later processed as part
2584 of any block, as it will already contain hard register numbers. */
2587 goto_block_pat (insn
, regstack
, pat
)
2593 rtx new_jump
, new_label
, new_barrier
;
2596 struct stack_def temp_stack
;
2599 if (GET_CODE (pat
) != LABEL_REF
)
2602 char *fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
2604 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
2607 goto_block_pat (insn
, regstack
, XEXP (pat
, i
));
2609 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2610 goto_block_pat (insn
, regstack
, XVECEXP (pat
, i
, j
));
2615 label
= XEXP (pat
, 0);
2616 if (GET_CODE (label
) != CODE_LABEL
)
2619 /* First, see if in fact anything needs to be done to the stack at all. */
2621 label_stack
= &block_stack_in
[BLOCK_NUM (label
)];
2623 if (label_stack
->top
== -2)
2625 /* If the target block hasn't had a stack order selected, then
2626 we need merely ensure that no pops are needed. */
2628 for (reg
= regstack
->top
; reg
>= 0; reg
--)
2629 if (! TEST_HARD_REG_BIT (label_stack
->reg_set
, regstack
->reg
[reg
]))
2634 /* change_stack will not emit any code in this case. */
2636 change_stack (label
, regstack
, label_stack
, emit_insn_after
);
2640 else if (label_stack
->top
== regstack
->top
)
2642 for (reg
= label_stack
->top
; reg
>= 0; reg
--)
2643 if (label_stack
->reg
[reg
] != regstack
->reg
[reg
])
2650 /* At least one insn will need to be inserted before label. Insert
2651 a jump around the code we are about to emit. Emit a label for the new
2652 code, and point the original insn at this new label. We can't use
2653 redirect_jump here, because we're using fld[4] of the code labels as
2654 LABEL_REF chains, no NUSES counters. */
2656 new_jump
= emit_jump_insn_before (gen_jump (label
), label
);
2657 record_label_references (new_jump
, PATTERN (new_jump
));
2658 JUMP_LABEL (new_jump
) = label
;
2660 new_barrier
= emit_barrier_after (new_jump
);
2662 new_label
= gen_label_rtx ();
2663 emit_label_after (new_label
, new_barrier
);
2664 LABEL_REFS (new_label
) = new_label
;
2666 /* The old label_ref will no longer point to the code_label if now uses,
2667 so strip the label_ref from the code_label's chain of references. */
2669 for (ref
= &LABEL_REFS (label
); *ref
!= label
; ref
= &LABEL_NEXTREF (*ref
))
2676 *ref
= LABEL_NEXTREF (*ref
);
2678 XEXP (pat
, 0) = new_label
;
2679 record_label_references (insn
, PATTERN (insn
));
2681 if (JUMP_LABEL (insn
) == label
)
2682 JUMP_LABEL (insn
) = new_label
;
2684 /* Now emit the needed code. */
2686 temp_stack
= *regstack
;
2688 change_stack (new_label
, &temp_stack
, label_stack
, emit_insn_after
);
2691 /* Traverse all basic blocks in a function, converting the register
2692 references in each insn from the "flat" register file that gcc uses, to
2693 the stack-like registers the 387 uses. */
2698 register int block
, reg
;
2699 register rtx insn
, next
;
2700 struct stack_def regstack
;
2702 for (block
= 0; block
< blocks
; block
++)
2704 if (block_stack_in
[block
].top
== -2)
2706 /* This block has not been previously encountered. Choose a
2707 default mapping for any stack regs live on entry */
2709 block_stack_in
[block
].top
= -1;
2711 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; reg
--)
2712 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, reg
))
2713 block_stack_in
[block
].reg
[++block_stack_in
[block
].top
] = reg
;
2716 /* Process all insns in this block. Keep track of `next' here,
2717 so that we don't process any insns emitted while making
2718 substitutions in INSN. */
2720 next
= block_begin
[block
];
2721 regstack
= block_stack_in
[block
];
2725 next
= NEXT_INSN (insn
);
2727 /* Don't bother processing unless there is a stack reg
2730 ??? For now, process CALL_INSNs too to make sure that the
2731 stack regs are dead after a call. Remove this eventually. */
2733 if (GET_MODE (insn
) == QImode
|| GET_CODE (insn
) == CALL_INSN
)
2734 subst_stack_regs (insn
, ®stack
);
2736 } while (insn
!= block_end
[block
]);
2738 /* Something failed if the stack life doesn't match. */
2740 GO_IF_HARD_REG_EQUAL (regstack
.reg_set
, block_out_reg_set
[block
], win
);
2746 /* Adjust the stack of this block on exit to match the stack of
2747 the target block, or copy stack information into stack of
2748 jump target if the target block's stack order hasn't been set
2751 if (GET_CODE (insn
) == JUMP_INSN
)
2752 goto_block_pat (insn
, ®stack
, PATTERN (insn
));
2754 /* Likewise handle the case where we fall into the next block. */
2756 if ((block
< blocks
- 1) && block_drops_in
[block
+1])
2757 change_stack (insn
, ®stack
, &block_stack_in
[block
+1],
2761 /* If the last basic block is the end of a loop, and that loop has
2762 regs live at its start, then the last basic block will have regs live
2763 at its end that need to be popped before the function returns. */
2765 for (reg
= regstack
.top
; reg
>= 0; reg
--)
2766 if (! current_function_returns_real
2767 || regstack
.reg
[reg
] != FIRST_STACK_REG
)
2768 insn
= emit_pop_insn (insn
, ®stack
,
2769 FP_mode_reg
[regstack
.reg
[reg
]][(int) DFmode
],
2773 /* Check expression PAT, which is in INSN, for label references. if
2774 one is found, print the block number of destination to FILE. */
2777 print_blocks (file
, insn
, pat
)
2781 register RTX_CODE code
= GET_CODE (pat
);
2785 if (code
== LABEL_REF
)
2787 register rtx label
= XEXP (pat
, 0);
2789 if (GET_CODE (label
) != CODE_LABEL
)
2792 fprintf (file
, " %d", BLOCK_NUM (label
));
2797 fmt
= GET_RTX_FORMAT (code
);
2798 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2801 print_blocks (file
, insn
, XEXP (pat
, i
));
2805 for (j
= 0; j
< XVECLEN (pat
, i
); j
++)
2806 print_blocks (file
, insn
, XVECEXP (pat
, i
, j
));
2811 /* Write information about stack registers and stack blocks into FILE.
2812 This is part of making a debugging dump. */
2814 dump_stack_info (file
)
2819 fprintf (file
, "\n%d stack blocks.\n", blocks
);
2820 for (block
= 0; block
< blocks
; block
++)
2822 register rtx head
, jump
, end
;
2825 fprintf (file
, "\nStack block %d: first insn %d, last %d.\n",
2826 block
, INSN_UID (block_begin
[block
]),
2827 INSN_UID (block_end
[block
]));
2829 head
= block_begin
[block
];
2831 fprintf (file
, "Reached from blocks: ");
2832 if (GET_CODE (head
) == CODE_LABEL
)
2833 for (jump
= LABEL_REFS (head
);
2835 jump
= LABEL_NEXTREF (jump
))
2837 register int from_block
= BLOCK_NUM (CONTAINING_INSN (jump
));
2838 fprintf (file
, " %d", from_block
);
2840 if (block_drops_in
[block
])
2841 fprintf (file
, " previous");
2843 fprintf (file
, "\nlive stack registers on block entry: ");
2844 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2846 if (TEST_HARD_REG_BIT (block_stack_in
[block
].reg_set
, regno
))
2847 fprintf (file
, "%d ", regno
);
2850 fprintf (file
, "\nlive stack registers on block exit: ");
2851 for (regno
= FIRST_STACK_REG
; regno
<= LAST_STACK_REG
; regno
++)
2853 if (TEST_HARD_REG_BIT (block_out_reg_set
[block
], regno
))
2854 fprintf (file
, "%d ", regno
);
2857 end
= block_end
[block
];
2859 fprintf (file
, "\nJumps to blocks: ");
2860 if (GET_CODE (end
) == JUMP_INSN
)
2861 print_blocks (file
, end
, PATTERN (end
));
2863 if (block
+ 1 < blocks
&& block_drops_in
[block
+1])
2864 fprintf (file
, " next");
2865 else if (block
+ 1 == blocks
2866 || (GET_CODE (end
) == JUMP_INSN
2867 && GET_CODE (PATTERN (end
)) == RETURN
))
2868 fprintf (file
, " return");
2870 fprintf (file
, "\n");
2873 #endif /* STACK_REGS */