1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
25 * The form of the input:
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
45 * The form of the output:
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
105 asm ("foo" : "=t" (a) : "f" (b));
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
116 The asm above would be written as
118 asm ("foo" : "=&t" (a) : "f" (b));
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156 #include "coretypes.h"
161 #include "function.h"
162 #include "insn-config.h"
164 #include "hard-reg-set.h"
169 #include "basic-block.h"
170 #include "cfglayout.h"
175 #include "tree-pass.h"
181 /* We use this array to cache info about insns, because otherwise we
182 spend too much time in stack_regs_mentioned_p.
184 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
185 the insn uses stack registers, two indicates the insn does not use
187 static VEC(char,heap
) *stack_regs_mentioned_data
;
189 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
191 int regstack_completed
= 0;
193 /* This is the basic stack record. TOP is an index into REG[] such
194 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
196 If TOP is -2, REG[] is not yet initialized. Stack initialization
197 consists of placing each live reg in array `reg' and setting `top'
200 REG_SET indicates which registers are live. */
202 typedef struct stack_def
204 int top
; /* index to top stack element */
205 HARD_REG_SET reg_set
; /* set of live registers */
206 unsigned char reg
[REG_STACK_SIZE
];/* register - stack mapping */
209 /* This is used to carry information about basic blocks. It is
210 attached to the AUX field of the standard CFG block. */
212 typedef struct block_info_def
214 struct stack_def stack_in
; /* Input stack configuration. */
215 struct stack_def stack_out
; /* Output stack configuration. */
216 HARD_REG_SET out_reg_set
; /* Stack regs live on output. */
217 int done
; /* True if block already converted. */
218 int predecessors
; /* Number of predecessors that need
222 #define BLOCK_INFO(B) ((block_info) (B)->aux)
224 /* Passed to change_stack to indicate where to emit insns. */
231 /* The block we're currently working on. */
232 static basic_block current_block
;
234 /* In the current_block, whether we're processing the first register
235 stack or call instruction, i.e. the regstack is currently the
236 same as BLOCK_INFO(current_block)->stack_in. */
237 static bool starting_stack_p
;
239 /* This is the register file for all register after conversion. */
241 FP_mode_reg
[LAST_STACK_REG
+1-FIRST_STACK_REG
][(int) MAX_MACHINE_MODE
];
243 #define FP_MODE_REG(regno,mode) \
244 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
246 /* Used to initialize uninitialized registers. */
247 static rtx not_a_num
;
249 /* Forward declarations */
251 static int stack_regs_mentioned_p (rtx pat
);
252 static void pop_stack (stack
, int);
253 static rtx
*get_true_reg (rtx
*);
255 static int check_asm_stack_operands (rtx
);
256 static int get_asm_operand_n_inputs (rtx
);
257 static rtx
stack_result (tree
);
258 static void replace_reg (rtx
*, int);
259 static void remove_regno_note (rtx
, enum reg_note
, unsigned int);
260 static int get_hard_regnum (stack
, rtx
);
261 static rtx
emit_pop_insn (rtx
, stack
, rtx
, enum emit_where
);
262 static void swap_to_top(rtx
, stack
, rtx
, rtx
);
263 static bool move_for_stack_reg (rtx
, stack
, rtx
);
264 static bool move_nan_for_stack_reg (rtx
, stack
, rtx
);
265 static int swap_rtx_condition_1 (rtx
);
266 static int swap_rtx_condition (rtx
);
267 static void compare_for_stack_reg (rtx
, stack
, rtx
);
268 static bool subst_stack_regs_pat (rtx
, stack
, rtx
);
269 static void subst_asm_stack_regs (rtx
, stack
);
270 static bool subst_stack_regs (rtx
, stack
);
271 static void change_stack (rtx
, stack
, stack
, enum emit_where
);
272 static void print_stack (FILE *, stack
);
273 static rtx
next_flags_user (rtx
);
275 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
278 stack_regs_mentioned_p (rtx pat
)
283 if (STACK_REG_P (pat
))
286 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
287 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
293 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
294 if (stack_regs_mentioned_p (XVECEXP (pat
, i
, j
)))
297 else if (fmt
[i
] == 'e' && stack_regs_mentioned_p (XEXP (pat
, i
)))
304 /* Return nonzero if INSN mentions stacked registers, else return zero. */
307 stack_regs_mentioned (rtx insn
)
309 unsigned int uid
, max
;
312 if (! INSN_P (insn
) || !stack_regs_mentioned_data
)
315 uid
= INSN_UID (insn
);
316 max
= VEC_length (char, stack_regs_mentioned_data
);
319 /* Allocate some extra size to avoid too many reallocs, but
320 do not grow too quickly. */
321 max
= uid
+ uid
/ 20 + 1;
322 VEC_safe_grow_cleared (char, heap
, stack_regs_mentioned_data
, max
);
325 test
= VEC_index (char, stack_regs_mentioned_data
, uid
);
328 /* This insn has yet to be examined. Do so now. */
329 test
= stack_regs_mentioned_p (PATTERN (insn
)) ? 1 : 2;
330 VEC_replace (char, stack_regs_mentioned_data
, uid
, test
);
336 static rtx ix86_flags_rtx
;
339 next_flags_user (rtx insn
)
341 /* Search forward looking for the first use of this value.
342 Stop at block boundaries. */
344 while (insn
!= BB_END (current_block
))
346 insn
= NEXT_INSN (insn
);
348 if (INSN_P (insn
) && reg_mentioned_p (ix86_flags_rtx
, PATTERN (insn
)))
357 /* Reorganize the stack into ascending numbers, before this insn. */
360 straighten_stack (rtx insn
, stack regstack
)
362 struct stack_def temp_stack
;
365 /* If there is only a single register on the stack, then the stack is
366 already in increasing order and no reorganization is needed.
368 Similarly if the stack is empty. */
369 if (regstack
->top
<= 0)
372 COPY_HARD_REG_SET (temp_stack
.reg_set
, regstack
->reg_set
);
374 for (top
= temp_stack
.top
= regstack
->top
; top
>= 0; top
--)
375 temp_stack
.reg
[top
] = FIRST_STACK_REG
+ temp_stack
.top
- top
;
377 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
380 /* Pop a register from the stack. */
383 pop_stack (stack regstack
, int regno
)
385 int top
= regstack
->top
;
387 CLEAR_HARD_REG_BIT (regstack
->reg_set
, regno
);
389 /* If regno was not at the top of stack then adjust stack. */
390 if (regstack
->reg
[top
] != regno
)
393 for (i
= regstack
->top
; i
>= 0; i
--)
394 if (regstack
->reg
[i
] == regno
)
397 for (j
= i
; j
< top
; j
++)
398 regstack
->reg
[j
] = regstack
->reg
[j
+ 1];
404 /* Return a pointer to the REG expression within PAT. If PAT is not a
405 REG, possible enclosed by a conversion rtx, return the inner part of
406 PAT that stopped the search. */
409 get_true_reg (rtx
*pat
)
412 switch (GET_CODE (*pat
))
415 /* Eliminate FP subregister accesses in favor of the
416 actual FP register in use. */
419 if (FP_REG_P (subreg
= SUBREG_REG (*pat
)))
421 int regno_off
= subreg_regno_offset (REGNO (subreg
),
425 *pat
= FP_MODE_REG (REGNO (subreg
) + regno_off
,
433 pat
= & XEXP (*pat
, 0);
437 if (XINT (*pat
, 1) == UNSPEC_TRUNC_NOOP
)
438 pat
= & XVECEXP (*pat
, 0, 0);
442 if (!flag_unsafe_math_optimizations
)
444 pat
= & XEXP (*pat
, 0);
452 /* Set if we find any malformed asms in a block. */
453 static bool any_malformed_asm
;
455 /* There are many rules that an asm statement for stack-like regs must
456 follow. Those rules are explained at the top of this file: the rule
457 numbers below refer to that explanation. */
460 check_asm_stack_operands (rtx insn
)
464 int malformed_asm
= 0;
465 rtx body
= PATTERN (insn
);
467 char reg_used_as_output
[FIRST_PSEUDO_REGISTER
];
468 char implicitly_dies
[FIRST_PSEUDO_REGISTER
];
471 rtx
*clobber_reg
= 0;
472 int n_inputs
, n_outputs
;
474 /* Find out what the constraints require. If no constraint
475 alternative matches, this asm is malformed. */
477 constrain_operands (1);
478 alt
= which_alternative
;
480 preprocess_constraints ();
482 n_inputs
= get_asm_operand_n_inputs (body
);
483 n_outputs
= recog_data
.n_operands
- n_inputs
;
488 /* Avoid further trouble with this insn. */
489 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
493 /* Strip SUBREGs here to make the following code simpler. */
494 for (i
= 0; i
< recog_data
.n_operands
; i
++)
495 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
496 && REG_P (SUBREG_REG (recog_data
.operand
[i
])))
497 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
499 /* Set up CLOBBER_REG. */
503 if (GET_CODE (body
) == PARALLEL
)
505 clobber_reg
= alloca (XVECLEN (body
, 0) * sizeof (rtx
));
507 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
508 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
510 rtx clobber
= XVECEXP (body
, 0, i
);
511 rtx reg
= XEXP (clobber
, 0);
513 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
514 reg
= SUBREG_REG (reg
);
516 if (STACK_REG_P (reg
))
518 clobber_reg
[n_clobbers
] = reg
;
524 /* Enforce rule #4: Output operands must specifically indicate which
525 reg an output appears in after an asm. "=f" is not allowed: the
526 operand constraints must select a class with a single reg.
528 Also enforce rule #5: Output operands must start at the top of
529 the reg-stack: output operands may not "skip" a reg. */
531 memset (reg_used_as_output
, 0, sizeof (reg_used_as_output
));
532 for (i
= 0; i
< n_outputs
; i
++)
533 if (STACK_REG_P (recog_data
.operand
[i
]))
535 if (reg_class_size
[(int) recog_op_alt
[i
][alt
].cl
] != 1)
537 error_for_asm (insn
, "output constraint %d must specify a single register", i
);
544 for (j
= 0; j
< n_clobbers
; j
++)
545 if (REGNO (recog_data
.operand
[i
]) == REGNO (clobber_reg
[j
]))
547 error_for_asm (insn
, "output constraint %d cannot be specified together with \"%s\" clobber",
548 i
, reg_names
[REGNO (clobber_reg
[j
])]);
553 reg_used_as_output
[REGNO (recog_data
.operand
[i
])] = 1;
558 /* Search for first non-popped reg. */
559 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
560 if (! reg_used_as_output
[i
])
563 /* If there are any other popped regs, that's an error. */
564 for (; i
< LAST_STACK_REG
+ 1; i
++)
565 if (reg_used_as_output
[i
])
568 if (i
!= LAST_STACK_REG
+ 1)
570 error_for_asm (insn
, "output regs must be grouped at top of stack");
574 /* Enforce rule #2: All implicitly popped input regs must be closer
575 to the top of the reg-stack than any input that is not implicitly
578 memset (implicitly_dies
, 0, sizeof (implicitly_dies
));
579 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
580 if (STACK_REG_P (recog_data
.operand
[i
]))
582 /* An input reg is implicitly popped if it is tied to an
583 output, or if there is a CLOBBER for it. */
586 for (j
= 0; j
< n_clobbers
; j
++)
587 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
590 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
591 implicitly_dies
[REGNO (recog_data
.operand
[i
])] = 1;
594 /* Search for first non-popped reg. */
595 for (i
= FIRST_STACK_REG
; i
< LAST_STACK_REG
+ 1; i
++)
596 if (! implicitly_dies
[i
])
599 /* If there are any other popped regs, that's an error. */
600 for (; i
< LAST_STACK_REG
+ 1; i
++)
601 if (implicitly_dies
[i
])
604 if (i
!= LAST_STACK_REG
+ 1)
607 "implicitly popped regs must be grouped at top of stack");
611 /* Enforce rule #3: If any input operand uses the "f" constraint, all
612 output constraints must use the "&" earlyclobber.
614 ??? Detect this more deterministically by having constrain_asm_operands
615 record any earlyclobber. */
617 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
618 if (recog_op_alt
[i
][alt
].matches
== -1)
622 for (j
= 0; j
< n_outputs
; j
++)
623 if (operands_match_p (recog_data
.operand
[j
], recog_data
.operand
[i
]))
626 "output operand %d must use %<&%> constraint", j
);
633 /* Avoid further trouble with this insn. */
634 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
635 any_malformed_asm
= true;
642 /* Calculate the number of inputs and outputs in BODY, an
643 asm_operands. N_OPERANDS is the total number of operands, and
644 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
648 get_asm_operand_n_inputs (rtx body
)
650 switch (GET_CODE (body
))
653 gcc_assert (GET_CODE (SET_SRC (body
)) == ASM_OPERANDS
);
654 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body
));
657 return ASM_OPERANDS_INPUT_LENGTH (body
);
660 return get_asm_operand_n_inputs (XVECEXP (body
, 0, 0));
667 /* If current function returns its result in an fp stack register,
668 return the REG. Otherwise, return 0. */
671 stack_result (tree decl
)
675 /* If the value is supposed to be returned in memory, then clearly
676 it is not returned in a stack register. */
677 if (aggregate_value_p (DECL_RESULT (decl
), decl
))
680 result
= DECL_RTL_IF_SET (DECL_RESULT (decl
));
682 result
= targetm
.calls
.function_value (TREE_TYPE (DECL_RESULT (decl
)),
685 return result
!= 0 && STACK_REG_P (result
) ? result
: 0;
690 * This section deals with stack register substitution, and forms the second
694 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
695 the desired hard REGNO. */
698 replace_reg (rtx
*reg
, int regno
)
700 gcc_assert (IN_RANGE (regno
, FIRST_STACK_REG
, LAST_STACK_REG
));
701 gcc_assert (STACK_REG_P (*reg
));
703 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg
))
704 || GET_MODE_CLASS (GET_MODE (*reg
)) == MODE_COMPLEX_FLOAT
);
706 *reg
= FP_MODE_REG (regno
, GET_MODE (*reg
));
709 /* Remove a note of type NOTE, which must be found, for register
710 number REGNO from INSN. Remove only one such note. */
713 remove_regno_note (rtx insn
, enum reg_note note
, unsigned int regno
)
715 rtx
*note_link
, this;
717 note_link
= ®_NOTES (insn
);
718 for (this = *note_link
; this; this = XEXP (this, 1))
719 if (REG_NOTE_KIND (this) == note
720 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno
)
722 *note_link
= XEXP (this, 1);
726 note_link
= &XEXP (this, 1);
731 /* Find the hard register number of virtual register REG in REGSTACK.
732 The hard register number is relative to the top of the stack. -1 is
733 returned if the register is not found. */
736 get_hard_regnum (stack regstack
, rtx reg
)
740 gcc_assert (STACK_REG_P (reg
));
742 for (i
= regstack
->top
; i
>= 0; i
--)
743 if (regstack
->reg
[i
] == REGNO (reg
))
746 return i
>= 0 ? (FIRST_STACK_REG
+ regstack
->top
- i
) : -1;
749 /* Emit an insn to pop virtual register REG before or after INSN.
750 REGSTACK is the stack state after INSN and is updated to reflect this
751 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
752 is represented as a SET whose destination is the register to be popped
753 and source is the top of stack. A death note for the top of stack
754 cases the movdf pattern to pop. */
757 emit_pop_insn (rtx insn
, stack regstack
, rtx reg
, enum emit_where where
)
759 rtx pop_insn
, pop_rtx
;
762 /* For complex types take care to pop both halves. These may survive in
763 CLOBBER and USE expressions. */
764 if (COMPLEX_MODE_P (GET_MODE (reg
)))
766 rtx reg1
= FP_MODE_REG (REGNO (reg
), DFmode
);
767 rtx reg2
= FP_MODE_REG (REGNO (reg
) + 1, DFmode
);
770 if (get_hard_regnum (regstack
, reg1
) >= 0)
771 pop_insn
= emit_pop_insn (insn
, regstack
, reg1
, where
);
772 if (get_hard_regnum (regstack
, reg2
) >= 0)
773 pop_insn
= emit_pop_insn (insn
, regstack
, reg2
, where
);
774 gcc_assert (pop_insn
);
778 hard_regno
= get_hard_regnum (regstack
, reg
);
780 gcc_assert (hard_regno
>= FIRST_STACK_REG
);
782 pop_rtx
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (hard_regno
, DFmode
),
783 FP_MODE_REG (FIRST_STACK_REG
, DFmode
));
785 if (where
== EMIT_AFTER
)
786 pop_insn
= emit_insn_after (pop_rtx
, insn
);
788 pop_insn
= emit_insn_before (pop_rtx
, insn
);
791 = gen_rtx_EXPR_LIST (REG_DEAD
, FP_MODE_REG (FIRST_STACK_REG
, DFmode
),
792 REG_NOTES (pop_insn
));
794 regstack
->reg
[regstack
->top
- (hard_regno
- FIRST_STACK_REG
)]
795 = regstack
->reg
[regstack
->top
];
797 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (reg
));
802 /* Emit an insn before or after INSN to swap virtual register REG with
803 the top of stack. REGSTACK is the stack state before the swap, and
804 is updated to reflect the swap. A swap insn is represented as a
805 PARALLEL of two patterns: each pattern moves one reg to the other.
807 If REG is already at the top of the stack, no insn is emitted. */
810 emit_swap_insn (rtx insn
, stack regstack
, rtx reg
)
814 int tmp
, other_reg
; /* swap regno temps */
815 rtx i1
; /* the stack-reg insn prior to INSN */
816 rtx i1set
= NULL_RTX
; /* the SET rtx within I1 */
818 hard_regno
= get_hard_regnum (regstack
, reg
);
820 if (hard_regno
== FIRST_STACK_REG
)
822 if (hard_regno
== -1)
824 /* Something failed if the register wasn't on the stack. If we had
825 malformed asms, we zapped the instruction itself, but that didn't
826 produce the same pattern of register sets as before. To prevent
827 further failure, adjust REGSTACK to include REG at TOP. */
828 gcc_assert (any_malformed_asm
);
829 regstack
->reg
[++regstack
->top
] = REGNO (reg
);
832 gcc_assert (hard_regno
>= FIRST_STACK_REG
);
834 other_reg
= regstack
->top
- (hard_regno
- FIRST_STACK_REG
);
836 tmp
= regstack
->reg
[other_reg
];
837 regstack
->reg
[other_reg
] = regstack
->reg
[regstack
->top
];
838 regstack
->reg
[regstack
->top
] = tmp
;
840 /* Find the previous insn involving stack regs, but don't pass a
843 if (current_block
&& insn
!= BB_HEAD (current_block
))
845 rtx tmp
= PREV_INSN (insn
);
846 rtx limit
= PREV_INSN (BB_HEAD (current_block
));
851 || NOTE_INSN_BASIC_BLOCK_P (tmp
)
852 || (NONJUMP_INSN_P (tmp
)
853 && stack_regs_mentioned (tmp
)))
858 tmp
= PREV_INSN (tmp
);
863 && (i1set
= single_set (i1
)) != NULL_RTX
)
865 rtx i1src
= *get_true_reg (&SET_SRC (i1set
));
866 rtx i1dest
= *get_true_reg (&SET_DEST (i1set
));
868 /* If the previous register stack push was from the reg we are to
869 swap with, omit the swap. */
871 if (REG_P (i1dest
) && REGNO (i1dest
) == FIRST_STACK_REG
873 && REGNO (i1src
) == (unsigned) hard_regno
- 1
874 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
877 /* If the previous insn wrote to the reg we are to swap with,
880 if (REG_P (i1dest
) && REGNO (i1dest
) == (unsigned) hard_regno
881 && REG_P (i1src
) && REGNO (i1src
) == FIRST_STACK_REG
882 && find_regno_note (i1
, REG_DEAD
, FIRST_STACK_REG
) == NULL_RTX
)
886 /* Avoid emitting the swap if this is the first register stack insn
887 of the current_block. Instead update the current_block's stack_in
888 and let compensate edges take care of this for us. */
889 if (current_block
&& starting_stack_p
)
891 BLOCK_INFO (current_block
)->stack_in
= *regstack
;
892 starting_stack_p
= false;
896 swap_rtx
= gen_swapxf (FP_MODE_REG (hard_regno
, XFmode
),
897 FP_MODE_REG (FIRST_STACK_REG
, XFmode
));
900 emit_insn_after (swap_rtx
, i1
);
901 else if (current_block
)
902 emit_insn_before (swap_rtx
, BB_HEAD (current_block
));
904 emit_insn_before (swap_rtx
, insn
);
907 /* Emit an insns before INSN to swap virtual register SRC1 with
908 the top of stack and virtual register SRC2 with second stack
909 slot. REGSTACK is the stack state before the swaps, and
910 is updated to reflect the swaps. A swap insn is represented as a
911 PARALLEL of two patterns: each pattern moves one reg to the other.
913 If SRC1 and/or SRC2 are already at the right place, no swap insn
917 swap_to_top (rtx insn
, stack regstack
, rtx src1
, rtx src2
)
919 struct stack_def temp_stack
;
920 int regno
, j
, k
, temp
;
922 temp_stack
= *regstack
;
924 /* Place operand 1 at the top of stack. */
925 regno
= get_hard_regnum (&temp_stack
, src1
);
926 gcc_assert (regno
>= 0);
927 if (regno
!= FIRST_STACK_REG
)
929 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
932 temp
= temp_stack
.reg
[k
];
933 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
934 temp_stack
.reg
[j
] = temp
;
937 /* Place operand 2 next on the stack. */
938 regno
= get_hard_regnum (&temp_stack
, src2
);
939 gcc_assert (regno
>= 0);
940 if (regno
!= FIRST_STACK_REG
+ 1)
942 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
943 j
= temp_stack
.top
- 1;
945 temp
= temp_stack
.reg
[k
];
946 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
947 temp_stack
.reg
[j
] = temp
;
950 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
953 /* Handle a move to or from a stack register in PAT, which is in INSN.
954 REGSTACK is the current stack. Return whether a control flow insn
955 was deleted in the process. */
958 move_for_stack_reg (rtx insn
, stack regstack
, rtx pat
)
960 rtx
*psrc
= get_true_reg (&SET_SRC (pat
));
961 rtx
*pdest
= get_true_reg (&SET_DEST (pat
));
964 bool control_flow_insn_deleted
= false;
966 src
= *psrc
; dest
= *pdest
;
968 if (STACK_REG_P (src
) && STACK_REG_P (dest
))
970 /* Write from one stack reg to another. If SRC dies here, then
971 just change the register mapping and delete the insn. */
973 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
978 /* If this is a no-op move, there must not be a REG_DEAD note. */
979 gcc_assert (REGNO (src
) != REGNO (dest
));
981 for (i
= regstack
->top
; i
>= 0; i
--)
982 if (regstack
->reg
[i
] == REGNO (src
))
985 /* The destination must be dead, or life analysis is borked. */
986 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
);
988 /* If the source is not live, this is yet another case of
989 uninitialized variables. Load up a NaN instead. */
991 return move_nan_for_stack_reg (insn
, regstack
, dest
);
993 /* It is possible that the dest is unused after this insn.
994 If so, just pop the src. */
996 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
997 emit_pop_insn (insn
, regstack
, src
, EMIT_AFTER
);
1000 regstack
->reg
[i
] = REGNO (dest
);
1001 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1002 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1005 control_flow_insn_deleted
|= control_flow_insn_p (insn
);
1007 return control_flow_insn_deleted
;
1010 /* The source reg does not die. */
1012 /* If this appears to be a no-op move, delete it, or else it
1013 will confuse the machine description output patterns. But if
1014 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1015 for REG_UNUSED will not work for deleted insns. */
1017 if (REGNO (src
) == REGNO (dest
))
1019 if (find_regno_note (insn
, REG_UNUSED
, REGNO (dest
)))
1020 emit_pop_insn (insn
, regstack
, dest
, EMIT_AFTER
);
1022 control_flow_insn_deleted
|= control_flow_insn_p (insn
);
1024 return control_flow_insn_deleted
;
1027 /* The destination ought to be dead. */
1028 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
);
1030 replace_reg (psrc
, get_hard_regnum (regstack
, src
));
1032 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1033 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1034 replace_reg (pdest
, FIRST_STACK_REG
);
1036 else if (STACK_REG_P (src
))
1038 /* Save from a stack reg to MEM, or possibly integer reg. Since
1039 only top of stack may be saved, emit an exchange first if
1042 emit_swap_insn (insn
, regstack
, src
);
1044 note
= find_regno_note (insn
, REG_DEAD
, REGNO (src
));
1047 replace_reg (&XEXP (note
, 0), FIRST_STACK_REG
);
1049 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (src
));
1051 else if ((GET_MODE (src
) == XFmode
)
1052 && regstack
->top
< REG_STACK_SIZE
- 1)
1054 /* A 387 cannot write an XFmode value to a MEM without
1055 clobbering the source reg. The output code can handle
1056 this by reading back the value from the MEM.
1057 But it is more efficient to use a temp register if one is
1058 available. Push the source value here if the register
1059 stack is not full, and then write the value to memory via
1062 rtx top_stack_reg
= FP_MODE_REG (FIRST_STACK_REG
, GET_MODE (src
));
1064 push_rtx
= gen_movxf (top_stack_reg
, top_stack_reg
);
1065 emit_insn_before (push_rtx
, insn
);
1066 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_DEAD
, top_stack_reg
,
1070 replace_reg (psrc
, FIRST_STACK_REG
);
1074 rtx pat
= PATTERN (insn
);
1076 gcc_assert (STACK_REG_P (dest
));
1078 /* Load from MEM, or possibly integer REG or constant, into the
1079 stack regs. The actual target is always the top of the
1080 stack. The stack mapping is changed to reflect that DEST is
1081 now at top of stack. */
1083 /* The destination ought to be dead. However, there is a
1084 special case with i387 UNSPEC_TAN, where destination is live
1085 (an argument to fptan) but inherent load of 1.0 is modelled
1086 as a load from a constant. */
1087 if (! (GET_CODE (pat
) == PARALLEL
1088 && XVECLEN (pat
, 0) == 2
1089 && GET_CODE (XVECEXP (pat
, 0, 1)) == SET
1090 && GET_CODE (SET_SRC (XVECEXP (pat
, 0, 1))) == UNSPEC
1091 && XINT (SET_SRC (XVECEXP (pat
, 0, 1)), 1) == UNSPEC_TAN
))
1092 gcc_assert (get_hard_regnum (regstack
, dest
) < FIRST_STACK_REG
);
1094 gcc_assert (regstack
->top
< REG_STACK_SIZE
);
1096 regstack
->reg
[++regstack
->top
] = REGNO (dest
);
1097 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (dest
));
1098 replace_reg (pdest
, FIRST_STACK_REG
);
1101 return control_flow_insn_deleted
;
1104 /* A helper function which replaces INSN with a pattern that loads up
1105 a NaN into DEST, then invokes move_for_stack_reg. */
1108 move_nan_for_stack_reg (rtx insn
, stack regstack
, rtx dest
)
1112 dest
= FP_MODE_REG (REGNO (dest
), SFmode
);
1113 pat
= gen_rtx_SET (VOIDmode
, dest
, not_a_num
);
1114 PATTERN (insn
) = pat
;
1115 INSN_CODE (insn
) = -1;
1117 return move_for_stack_reg (insn
, regstack
, pat
);
1120 /* Swap the condition on a branch, if there is one. Return true if we
1121 found a condition to swap. False if the condition was not used as
1125 swap_rtx_condition_1 (rtx pat
)
1130 if (COMPARISON_P (pat
))
1132 PUT_CODE (pat
, swap_condition (GET_CODE (pat
)));
1137 fmt
= GET_RTX_FORMAT (GET_CODE (pat
));
1138 for (i
= GET_RTX_LENGTH (GET_CODE (pat
)) - 1; i
>= 0; i
--)
1144 for (j
= XVECLEN (pat
, i
) - 1; j
>= 0; j
--)
1145 r
|= swap_rtx_condition_1 (XVECEXP (pat
, i
, j
));
1147 else if (fmt
[i
] == 'e')
1148 r
|= swap_rtx_condition_1 (XEXP (pat
, i
));
1156 swap_rtx_condition (rtx insn
)
1158 rtx pat
= PATTERN (insn
);
1160 /* We're looking for a single set to cc0 or an HImode temporary. */
1162 if (GET_CODE (pat
) == SET
1163 && REG_P (SET_DEST (pat
))
1164 && REGNO (SET_DEST (pat
)) == FLAGS_REG
)
1166 insn
= next_flags_user (insn
);
1167 if (insn
== NULL_RTX
)
1169 pat
= PATTERN (insn
);
1172 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1173 with the cc value right now. We may be able to search for one
1176 if (GET_CODE (pat
) == SET
1177 && GET_CODE (SET_SRC (pat
)) == UNSPEC
1178 && XINT (SET_SRC (pat
), 1) == UNSPEC_FNSTSW
)
1180 rtx dest
= SET_DEST (pat
);
1182 /* Search forward looking for the first use of this value.
1183 Stop at block boundaries. */
1184 while (insn
!= BB_END (current_block
))
1186 insn
= NEXT_INSN (insn
);
1187 if (INSN_P (insn
) && reg_mentioned_p (dest
, insn
))
1193 /* We haven't found it. */
1194 if (insn
== BB_END (current_block
))
1197 /* So we've found the insn using this value. If it is anything
1198 other than sahf or the value does not die (meaning we'd have
1199 to search further), then we must give up. */
1200 pat
= PATTERN (insn
);
1201 if (GET_CODE (pat
) != SET
1202 || GET_CODE (SET_SRC (pat
)) != UNSPEC
1203 || XINT (SET_SRC (pat
), 1) != UNSPEC_SAHF
1204 || ! dead_or_set_p (insn
, dest
))
1207 /* Now we are prepared to handle this as a normal cc0 setter. */
1208 insn
= next_flags_user (insn
);
1209 if (insn
== NULL_RTX
)
1211 pat
= PATTERN (insn
);
1214 if (swap_rtx_condition_1 (pat
))
1217 INSN_CODE (insn
) = -1;
1218 if (recog_memoized (insn
) == -1)
1220 /* In case the flags don't die here, recurse to try fix
1221 following user too. */
1222 else if (! dead_or_set_p (insn
, ix86_flags_rtx
))
1224 insn
= next_flags_user (insn
);
1225 if (!insn
|| !swap_rtx_condition (insn
))
1230 swap_rtx_condition_1 (pat
);
1238 /* Handle a comparison. Special care needs to be taken to avoid
1239 causing comparisons that a 387 cannot do correctly, such as EQ.
1241 Also, a pop insn may need to be emitted. The 387 does have an
1242 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1243 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1247 compare_for_stack_reg (rtx insn
, stack regstack
, rtx pat_src
)
1250 rtx src1_note
, src2_note
;
1252 src1
= get_true_reg (&XEXP (pat_src
, 0));
1253 src2
= get_true_reg (&XEXP (pat_src
, 1));
1255 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1256 registers that die in this insn - move those to stack top first. */
1257 if ((! STACK_REG_P (*src1
)
1258 || (STACK_REG_P (*src2
)
1259 && get_hard_regnum (regstack
, *src2
) == FIRST_STACK_REG
))
1260 && swap_rtx_condition (insn
))
1263 temp
= XEXP (pat_src
, 0);
1264 XEXP (pat_src
, 0) = XEXP (pat_src
, 1);
1265 XEXP (pat_src
, 1) = temp
;
1267 src1
= get_true_reg (&XEXP (pat_src
, 0));
1268 src2
= get_true_reg (&XEXP (pat_src
, 1));
1270 INSN_CODE (insn
) = -1;
1273 /* We will fix any death note later. */
1275 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1277 if (STACK_REG_P (*src2
))
1278 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1280 src2_note
= NULL_RTX
;
1282 emit_swap_insn (insn
, regstack
, *src1
);
1284 replace_reg (src1
, FIRST_STACK_REG
);
1286 if (STACK_REG_P (*src2
))
1287 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1291 pop_stack (regstack
, REGNO (XEXP (src1_note
, 0)));
1292 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1295 /* If the second operand dies, handle that. But if the operands are
1296 the same stack register, don't bother, because only one death is
1297 needed, and it was just handled. */
1300 && ! (STACK_REG_P (*src1
) && STACK_REG_P (*src2
)
1301 && REGNO (*src1
) == REGNO (*src2
)))
1303 /* As a special case, two regs may die in this insn if src2 is
1304 next to top of stack and the top of stack also dies. Since
1305 we have already popped src1, "next to top of stack" is really
1306 at top (FIRST_STACK_REG) now. */
1308 if (get_hard_regnum (regstack
, XEXP (src2_note
, 0)) == FIRST_STACK_REG
1311 pop_stack (regstack
, REGNO (XEXP (src2_note
, 0)));
1312 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1316 /* The 386 can only represent death of the first operand in
1317 the case handled above. In all other cases, emit a separate
1318 pop and remove the death note from here. */
1320 /* link_cc0_insns (insn); */
1322 remove_regno_note (insn
, REG_DEAD
, REGNO (XEXP (src2_note
, 0)));
1324 emit_pop_insn (insn
, regstack
, XEXP (src2_note
, 0),
1330 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1331 is the current register layout. Return whether a control flow insn
1332 was deleted in the process. */
1335 subst_stack_regs_pat (rtx insn
, stack regstack
, rtx pat
)
1338 bool control_flow_insn_deleted
= false;
1340 switch (GET_CODE (pat
))
1343 /* Deaths in USE insns can happen in non optimizing compilation.
1344 Handle them by popping the dying register. */
1345 src
= get_true_reg (&XEXP (pat
, 0));
1346 if (STACK_REG_P (*src
)
1347 && find_regno_note (insn
, REG_DEAD
, REGNO (*src
)))
1349 emit_pop_insn (insn
, regstack
, *src
, EMIT_AFTER
);
1350 return control_flow_insn_deleted
;
1352 /* ??? Uninitialized USE should not happen. */
1354 gcc_assert (get_hard_regnum (regstack
, *src
) != -1);
1361 dest
= get_true_reg (&XEXP (pat
, 0));
1362 if (STACK_REG_P (*dest
))
1364 note
= find_reg_note (insn
, REG_DEAD
, *dest
);
1366 if (pat
!= PATTERN (insn
))
1368 /* The fix_truncdi_1 pattern wants to be able to allocate
1369 its own scratch register. It does this by clobbering
1370 an fp reg so that it is assured of an empty reg-stack
1371 register. If the register is live, kill it now.
1372 Remove the DEAD/UNUSED note so we don't try to kill it
1376 emit_pop_insn (insn
, regstack
, *dest
, EMIT_BEFORE
);
1379 note
= find_reg_note (insn
, REG_UNUSED
, *dest
);
1382 remove_note (insn
, note
);
1383 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1387 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1388 indicates an uninitialized value. Because reload removed
1389 all other clobbers, this must be due to a function
1390 returning without a value. Load up a NaN. */
1395 if (COMPLEX_MODE_P (GET_MODE (t
)))
1397 rtx u
= FP_MODE_REG (REGNO (t
) + 1, SFmode
);
1398 if (get_hard_regnum (regstack
, u
) == -1)
1400 rtx pat2
= gen_rtx_CLOBBER (VOIDmode
, u
);
1401 rtx insn2
= emit_insn_before (pat2
, insn
);
1402 control_flow_insn_deleted
1403 |= move_nan_for_stack_reg (insn2
, regstack
, u
);
1406 if (get_hard_regnum (regstack
, t
) == -1)
1407 control_flow_insn_deleted
1408 |= move_nan_for_stack_reg (insn
, regstack
, t
);
1417 rtx
*src1
= (rtx
*) 0, *src2
;
1418 rtx src1_note
, src2_note
;
1421 dest
= get_true_reg (&SET_DEST (pat
));
1422 src
= get_true_reg (&SET_SRC (pat
));
1423 pat_src
= SET_SRC (pat
);
1425 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1426 if (STACK_REG_P (*src
)
1427 || (STACK_REG_P (*dest
)
1428 && (REG_P (*src
) || MEM_P (*src
)
1429 || GET_CODE (*src
) == CONST_DOUBLE
)))
1431 control_flow_insn_deleted
|= move_for_stack_reg (insn
, regstack
, pat
);
1435 switch (GET_CODE (pat_src
))
1438 compare_for_stack_reg (insn
, regstack
, pat_src
);
1444 for (count
= hard_regno_nregs
[REGNO (*dest
)][GET_MODE (*dest
)];
1447 regstack
->reg
[++regstack
->top
] = REGNO (*dest
) + count
;
1448 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
) + count
);
1451 replace_reg (dest
, FIRST_STACK_REG
);
1455 /* This is a `tstM2' case. */
1456 gcc_assert (*dest
== cc0_rtx
);
1461 case FLOAT_TRUNCATE
:
1465 /* These insns only operate on the top of the stack. DEST might
1466 be cc0_rtx if we're processing a tstM pattern. Also, it's
1467 possible that the tstM case results in a REG_DEAD note on the
1471 src1
= get_true_reg (&XEXP (pat_src
, 0));
1473 emit_swap_insn (insn
, regstack
, *src1
);
1475 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1477 if (STACK_REG_P (*dest
))
1478 replace_reg (dest
, FIRST_STACK_REG
);
1482 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1484 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1487 replace_reg (src1
, FIRST_STACK_REG
);
1492 /* On i386, reversed forms of subM3 and divM3 exist for
1493 MODE_FLOAT, so the same code that works for addM3 and mulM3
1497 /* These insns can accept the top of stack as a destination
1498 from a stack reg or mem, or can use the top of stack as a
1499 source and some other stack register (possibly top of stack)
1500 as a destination. */
1502 src1
= get_true_reg (&XEXP (pat_src
, 0));
1503 src2
= get_true_reg (&XEXP (pat_src
, 1));
1505 /* We will fix any death note later. */
1507 if (STACK_REG_P (*src1
))
1508 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1510 src1_note
= NULL_RTX
;
1511 if (STACK_REG_P (*src2
))
1512 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1514 src2_note
= NULL_RTX
;
1516 /* If either operand is not a stack register, then the dest
1517 must be top of stack. */
1519 if (! STACK_REG_P (*src1
) || ! STACK_REG_P (*src2
))
1520 emit_swap_insn (insn
, regstack
, *dest
);
1523 /* Both operands are REG. If neither operand is already
1524 at the top of stack, choose to make the one that is the dest
1525 the new top of stack. */
1527 int src1_hard_regnum
, src2_hard_regnum
;
1529 src1_hard_regnum
= get_hard_regnum (regstack
, *src1
);
1530 src2_hard_regnum
= get_hard_regnum (regstack
, *src2
);
1531 gcc_assert (src1_hard_regnum
!= -1);
1532 gcc_assert (src2_hard_regnum
!= -1);
1534 if (src1_hard_regnum
!= FIRST_STACK_REG
1535 && src2_hard_regnum
!= FIRST_STACK_REG
)
1536 emit_swap_insn (insn
, regstack
, *dest
);
1539 if (STACK_REG_P (*src1
))
1540 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1541 if (STACK_REG_P (*src2
))
1542 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1546 rtx src1_reg
= XEXP (src1_note
, 0);
1548 /* If the register that dies is at the top of stack, then
1549 the destination is somewhere else - merely substitute it.
1550 But if the reg that dies is not at top of stack, then
1551 move the top of stack to the dead reg, as though we had
1552 done the insn and then a store-with-pop. */
1554 if (REGNO (src1_reg
) == regstack
->reg
[regstack
->top
])
1556 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1557 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1561 int regno
= get_hard_regnum (regstack
, src1_reg
);
1563 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1564 replace_reg (dest
, regno
);
1566 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1567 = regstack
->reg
[regstack
->top
];
1570 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1571 REGNO (XEXP (src1_note
, 0)));
1572 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1577 rtx src2_reg
= XEXP (src2_note
, 0);
1578 if (REGNO (src2_reg
) == regstack
->reg
[regstack
->top
])
1580 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1581 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1585 int regno
= get_hard_regnum (regstack
, src2_reg
);
1587 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1588 replace_reg (dest
, regno
);
1590 regstack
->reg
[regstack
->top
- (regno
- FIRST_STACK_REG
)]
1591 = regstack
->reg
[regstack
->top
];
1594 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1595 REGNO (XEXP (src2_note
, 0)));
1596 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
);
1601 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1602 replace_reg (dest
, get_hard_regnum (regstack
, *dest
));
1605 /* Keep operand 1 matching with destination. */
1606 if (COMMUTATIVE_ARITH_P (pat_src
)
1607 && REG_P (*src1
) && REG_P (*src2
)
1608 && REGNO (*src1
) != REGNO (*dest
))
1610 int tmp
= REGNO (*src1
);
1611 replace_reg (src1
, REGNO (*src2
));
1612 replace_reg (src2
, tmp
);
1617 switch (XINT (pat_src
, 1))
1621 case UNSPEC_FIST_FLOOR
:
1622 case UNSPEC_FIST_CEIL
:
1624 /* These insns only operate on the top of the stack. */
1626 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1627 emit_swap_insn (insn
, regstack
, *src1
);
1629 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1631 if (STACK_REG_P (*dest
))
1632 replace_reg (dest
, FIRST_STACK_REG
);
1636 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1638 CLEAR_HARD_REG_BIT (regstack
->reg_set
, REGNO (*src1
));
1641 replace_reg (src1
, FIRST_STACK_REG
);
1646 /* This insn only operate on the top of the stack. */
1648 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1649 emit_swap_insn (insn
, regstack
, *src1
);
1651 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1653 replace_reg (src1
, FIRST_STACK_REG
);
1657 remove_regno_note (insn
, REG_DEAD
,
1658 REGNO (XEXP (src1_note
, 0)));
1659 emit_pop_insn (insn
, regstack
, XEXP (src1_note
, 0),
1667 case UNSPEC_FRNDINT
:
1670 case UNSPEC_FRNDINT_FLOOR
:
1671 case UNSPEC_FRNDINT_CEIL
:
1672 case UNSPEC_FRNDINT_TRUNC
:
1673 case UNSPEC_FRNDINT_MASK_PM
:
1675 /* Above insns operate on the top of the stack. */
1677 case UNSPEC_SINCOS_COS
:
1678 case UNSPEC_XTRACT_FRACT
:
1680 /* Above insns operate on the top two stack slots,
1681 first part of one input, double output insn. */
1683 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1685 emit_swap_insn (insn
, regstack
, *src1
);
1687 /* Input should never die, it is replaced with output. */
1688 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1689 gcc_assert (!src1_note
);
1691 if (STACK_REG_P (*dest
))
1692 replace_reg (dest
, FIRST_STACK_REG
);
1694 replace_reg (src1
, FIRST_STACK_REG
);
1697 case UNSPEC_SINCOS_SIN
:
1698 case UNSPEC_XTRACT_EXP
:
1700 /* These insns operate on the top two stack slots,
1701 second part of one input, double output insn. */
1708 /* For UNSPEC_TAN, regstack->top is already increased
1709 by inherent load of constant 1.0. */
1711 /* Output value is generated in the second stack slot.
1712 Move current value from second slot to the top. */
1713 regstack
->reg
[regstack
->top
]
1714 = regstack
->reg
[regstack
->top
- 1];
1716 gcc_assert (STACK_REG_P (*dest
));
1718 regstack
->reg
[regstack
->top
- 1] = REGNO (*dest
);
1719 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1720 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1722 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1724 replace_reg (src1
, FIRST_STACK_REG
);
1729 case UNSPEC_FYL2XP1
:
1730 /* These insns operate on the top two stack slots. */
1732 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1733 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1735 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1736 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1738 swap_to_top (insn
, regstack
, *src1
, *src2
);
1740 replace_reg (src1
, FIRST_STACK_REG
);
1741 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1744 replace_reg (&XEXP (src1_note
, 0), FIRST_STACK_REG
);
1746 replace_reg (&XEXP (src2_note
, 0), FIRST_STACK_REG
+ 1);
1748 /* Pop both input operands from the stack. */
1749 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1750 regstack
->reg
[regstack
->top
]);
1751 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
1752 regstack
->reg
[regstack
->top
- 1]);
1755 /* Push the result back onto the stack. */
1756 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1757 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1758 replace_reg (dest
, FIRST_STACK_REG
);
1761 case UNSPEC_FSCALE_FRACT
:
1762 case UNSPEC_FPREM_F
:
1763 case UNSPEC_FPREM1_F
:
1764 /* These insns operate on the top two stack slots,
1765 first part of double input, double output insn. */
1767 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1768 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1770 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1771 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1773 /* Inputs should never die, they are
1774 replaced with outputs. */
1775 gcc_assert (!src1_note
);
1776 gcc_assert (!src2_note
);
1778 swap_to_top (insn
, regstack
, *src1
, *src2
);
1780 /* Push the result back onto stack. Empty stack slot
1781 will be filled in second part of insn. */
1782 if (STACK_REG_P (*dest
))
1784 regstack
->reg
[regstack
->top
] = REGNO (*dest
);
1785 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1786 replace_reg (dest
, FIRST_STACK_REG
);
1789 replace_reg (src1
, FIRST_STACK_REG
);
1790 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1793 case UNSPEC_FSCALE_EXP
:
1794 case UNSPEC_FPREM_U
:
1795 case UNSPEC_FPREM1_U
:
1796 /* These insns operate on the top two stack slots,
1797 second part of double input, double output insn. */
1799 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1800 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1802 /* Push the result back onto stack. Fill empty slot from
1803 first part of insn and fix top of stack pointer. */
1804 if (STACK_REG_P (*dest
))
1806 regstack
->reg
[regstack
->top
- 1] = REGNO (*dest
);
1807 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1808 replace_reg (dest
, FIRST_STACK_REG
+ 1);
1811 replace_reg (src1
, FIRST_STACK_REG
);
1812 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1815 case UNSPEC_C2_FLAG
:
1816 /* This insn operates on the top two stack slots,
1817 third part of C2 setting double input insn. */
1819 src1
= get_true_reg (&XVECEXP (pat_src
, 0, 0));
1820 src2
= get_true_reg (&XVECEXP (pat_src
, 0, 1));
1822 replace_reg (src1
, FIRST_STACK_REG
);
1823 replace_reg (src2
, FIRST_STACK_REG
+ 1);
1827 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1828 The combination matches the PPRO fcomi instruction. */
1830 pat_src
= XVECEXP (pat_src
, 0, 0);
1831 gcc_assert (GET_CODE (pat_src
) == UNSPEC
);
1832 gcc_assert (XINT (pat_src
, 1) == UNSPEC_FNSTSW
);
1836 /* Combined fcomp+fnstsw generated for doing well with
1837 CSE. When optimizing this would have been broken
1840 pat_src
= XVECEXP (pat_src
, 0, 0);
1841 gcc_assert (GET_CODE (pat_src
) == COMPARE
);
1843 compare_for_stack_reg (insn
, regstack
, pat_src
);
1852 /* This insn requires the top of stack to be the destination. */
1854 src1
= get_true_reg (&XEXP (pat_src
, 1));
1855 src2
= get_true_reg (&XEXP (pat_src
, 2));
1857 src1_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src1
));
1858 src2_note
= find_regno_note (insn
, REG_DEAD
, REGNO (*src2
));
1860 /* If the comparison operator is an FP comparison operator,
1861 it is handled correctly by compare_for_stack_reg () who
1862 will move the destination to the top of stack. But if the
1863 comparison operator is not an FP comparison operator, we
1864 have to handle it here. */
1865 if (get_hard_regnum (regstack
, *dest
) >= FIRST_STACK_REG
1866 && REGNO (*dest
) != regstack
->reg
[regstack
->top
])
1868 /* In case one of operands is the top of stack and the operands
1869 dies, it is safe to make it the destination operand by
1870 reversing the direction of cmove and avoid fxch. */
1871 if ((REGNO (*src1
) == regstack
->reg
[regstack
->top
]
1873 || (REGNO (*src2
) == regstack
->reg
[regstack
->top
]
1876 int idx1
= (get_hard_regnum (regstack
, *src1
)
1878 int idx2
= (get_hard_regnum (regstack
, *src2
)
1881 /* Make reg-stack believe that the operands are already
1882 swapped on the stack */
1883 regstack
->reg
[regstack
->top
- idx1
] = REGNO (*src2
);
1884 regstack
->reg
[regstack
->top
- idx2
] = REGNO (*src1
);
1886 /* Reverse condition to compensate the operand swap.
1887 i386 do have comparison always reversible. */
1888 PUT_CODE (XEXP (pat_src
, 0),
1889 reversed_comparison_code (XEXP (pat_src
, 0), insn
));
1892 emit_swap_insn (insn
, regstack
, *dest
);
1900 src_note
[1] = src1_note
;
1901 src_note
[2] = src2_note
;
1903 if (STACK_REG_P (*src1
))
1904 replace_reg (src1
, get_hard_regnum (regstack
, *src1
));
1905 if (STACK_REG_P (*src2
))
1906 replace_reg (src2
, get_hard_regnum (regstack
, *src2
));
1908 for (i
= 1; i
<= 2; i
++)
1911 int regno
= REGNO (XEXP (src_note
[i
], 0));
1913 /* If the register that dies is not at the top of
1914 stack, then move the top of stack to the dead reg.
1915 Top of stack should never die, as it is the
1917 gcc_assert (regno
!= regstack
->reg
[regstack
->top
]);
1918 remove_regno_note (insn
, REG_DEAD
, regno
);
1919 emit_pop_insn (insn
, regstack
, XEXP (src_note
[i
], 0),
1924 /* Make dest the top of stack. Add dest to regstack if
1926 if (get_hard_regnum (regstack
, *dest
) < FIRST_STACK_REG
)
1927 regstack
->reg
[++regstack
->top
] = REGNO (*dest
);
1928 SET_HARD_REG_BIT (regstack
->reg_set
, REGNO (*dest
));
1929 replace_reg (dest
, FIRST_STACK_REG
);
1942 return control_flow_insn_deleted
;
1945 /* Substitute hard regnums for any stack regs in INSN, which has
1946 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1947 before the insn, and is updated with changes made here.
1949 There are several requirements and assumptions about the use of
1950 stack-like regs in asm statements. These rules are enforced by
1951 record_asm_stack_regs; see comments there for details. Any
1952 asm_operands left in the RTL at this point may be assume to meet the
1953 requirements, since record_asm_stack_regs removes any problem asm. */
1956 subst_asm_stack_regs (rtx insn
, stack regstack
)
1958 rtx body
= PATTERN (insn
);
1961 rtx
*note_reg
; /* Array of note contents */
1962 rtx
**note_loc
; /* Address of REG field of each note */
1963 enum reg_note
*note_kind
; /* The type of each note */
1965 rtx
*clobber_reg
= 0;
1966 rtx
**clobber_loc
= 0;
1968 struct stack_def temp_stack
;
1973 int n_inputs
, n_outputs
;
1975 if (! check_asm_stack_operands (insn
))
1978 /* Find out what the constraints required. If no constraint
1979 alternative matches, that is a compiler bug: we should have caught
1980 such an insn in check_asm_stack_operands. */
1981 extract_insn (insn
);
1982 constrain_operands (1);
1983 alt
= which_alternative
;
1985 preprocess_constraints ();
1987 n_inputs
= get_asm_operand_n_inputs (body
);
1988 n_outputs
= recog_data
.n_operands
- n_inputs
;
1990 gcc_assert (alt
>= 0);
1992 /* Strip SUBREGs here to make the following code simpler. */
1993 for (i
= 0; i
< recog_data
.n_operands
; i
++)
1994 if (GET_CODE (recog_data
.operand
[i
]) == SUBREG
1995 && REG_P (SUBREG_REG (recog_data
.operand
[i
])))
1997 recog_data
.operand_loc
[i
] = & SUBREG_REG (recog_data
.operand
[i
]);
1998 recog_data
.operand
[i
] = SUBREG_REG (recog_data
.operand
[i
]);
2001 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2003 for (i
= 0, note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2006 note_reg
= alloca (i
* sizeof (rtx
));
2007 note_loc
= alloca (i
* sizeof (rtx
*));
2008 note_kind
= alloca (i
* sizeof (enum reg_note
));
2011 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2013 rtx reg
= XEXP (note
, 0);
2014 rtx
*loc
= & XEXP (note
, 0);
2016 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
2018 loc
= & SUBREG_REG (reg
);
2019 reg
= SUBREG_REG (reg
);
2022 if (STACK_REG_P (reg
)
2023 && (REG_NOTE_KIND (note
) == REG_DEAD
2024 || REG_NOTE_KIND (note
) == REG_UNUSED
))
2026 note_reg
[n_notes
] = reg
;
2027 note_loc
[n_notes
] = loc
;
2028 note_kind
[n_notes
] = REG_NOTE_KIND (note
);
2033 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2037 if (GET_CODE (body
) == PARALLEL
)
2039 clobber_reg
= alloca (XVECLEN (body
, 0) * sizeof (rtx
));
2040 clobber_loc
= alloca (XVECLEN (body
, 0) * sizeof (rtx
*));
2042 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
2043 if (GET_CODE (XVECEXP (body
, 0, i
)) == CLOBBER
)
2045 rtx clobber
= XVECEXP (body
, 0, i
);
2046 rtx reg
= XEXP (clobber
, 0);
2047 rtx
*loc
= & XEXP (clobber
, 0);
2049 if (GET_CODE (reg
) == SUBREG
&& REG_P (SUBREG_REG (reg
)))
2051 loc
= & SUBREG_REG (reg
);
2052 reg
= SUBREG_REG (reg
);
2055 if (STACK_REG_P (reg
))
2057 clobber_reg
[n_clobbers
] = reg
;
2058 clobber_loc
[n_clobbers
] = loc
;
2064 temp_stack
= *regstack
;
2066 /* Put the input regs into the desired place in TEMP_STACK. */
2068 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2069 if (STACK_REG_P (recog_data
.operand
[i
])
2070 && reg_class_subset_p (recog_op_alt
[i
][alt
].cl
,
2072 && recog_op_alt
[i
][alt
].cl
!= FLOAT_REGS
)
2074 /* If an operand needs to be in a particular reg in
2075 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2076 these constraints are for single register classes, and
2077 reload guaranteed that operand[i] is already in that class,
2078 we can just use REGNO (recog_data.operand[i]) to know which
2079 actual reg this operand needs to be in. */
2081 int regno
= get_hard_regnum (&temp_stack
, recog_data
.operand
[i
]);
2083 gcc_assert (regno
>= 0);
2085 if ((unsigned int) regno
!= REGNO (recog_data
.operand
[i
]))
2087 /* recog_data.operand[i] is not in the right place. Find
2088 it and swap it with whatever is already in I's place.
2089 K is where recog_data.operand[i] is now. J is where it
2093 k
= temp_stack
.top
- (regno
- FIRST_STACK_REG
);
2095 - (REGNO (recog_data
.operand
[i
]) - FIRST_STACK_REG
));
2097 temp
= temp_stack
.reg
[k
];
2098 temp_stack
.reg
[k
] = temp_stack
.reg
[j
];
2099 temp_stack
.reg
[j
] = temp
;
2103 /* Emit insns before INSN to make sure the reg-stack is in the right
2106 change_stack (insn
, regstack
, &temp_stack
, EMIT_BEFORE
);
2108 /* Make the needed input register substitutions. Do death notes and
2109 clobbers too, because these are for inputs, not outputs. */
2111 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2112 if (STACK_REG_P (recog_data
.operand
[i
]))
2114 int regnum
= get_hard_regnum (regstack
, recog_data
.operand
[i
]);
2116 gcc_assert (regnum
>= 0);
2118 replace_reg (recog_data
.operand_loc
[i
], regnum
);
2121 for (i
= 0; i
< n_notes
; i
++)
2122 if (note_kind
[i
] == REG_DEAD
)
2124 int regnum
= get_hard_regnum (regstack
, note_reg
[i
]);
2126 gcc_assert (regnum
>= 0);
2128 replace_reg (note_loc
[i
], regnum
);
2131 for (i
= 0; i
< n_clobbers
; i
++)
2133 /* It's OK for a CLOBBER to reference a reg that is not live.
2134 Don't try to replace it in that case. */
2135 int regnum
= get_hard_regnum (regstack
, clobber_reg
[i
]);
2139 /* Sigh - clobbers always have QImode. But replace_reg knows
2140 that these regs can't be MODE_INT and will assert. Just put
2141 the right reg there without calling replace_reg. */
2143 *clobber_loc
[i
] = FP_MODE_REG (regnum
, DFmode
);
2147 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2149 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2150 if (STACK_REG_P (recog_data
.operand
[i
]))
2152 /* An input reg is implicitly popped if it is tied to an
2153 output, or if there is a CLOBBER for it. */
2156 for (j
= 0; j
< n_clobbers
; j
++)
2157 if (operands_match_p (clobber_reg
[j
], recog_data
.operand
[i
]))
2160 if (j
< n_clobbers
|| recog_op_alt
[i
][alt
].matches
>= 0)
2162 /* recog_data.operand[i] might not be at the top of stack.
2163 But that's OK, because all we need to do is pop the
2164 right number of regs off of the top of the reg-stack.
2165 record_asm_stack_regs guaranteed that all implicitly
2166 popped regs were grouped at the top of the reg-stack. */
2168 CLEAR_HARD_REG_BIT (regstack
->reg_set
,
2169 regstack
->reg
[regstack
->top
]);
2174 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2175 Note that there isn't any need to substitute register numbers.
2176 ??? Explain why this is true. */
2178 for (i
= LAST_STACK_REG
; i
>= FIRST_STACK_REG
; i
--)
2180 /* See if there is an output for this hard reg. */
2183 for (j
= 0; j
< n_outputs
; j
++)
2184 if (STACK_REG_P (recog_data
.operand
[j
])
2185 && REGNO (recog_data
.operand
[j
]) == (unsigned) i
)
2187 regstack
->reg
[++regstack
->top
] = i
;
2188 SET_HARD_REG_BIT (regstack
->reg_set
, i
);
2193 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2194 input that the asm didn't implicitly pop. If the asm didn't
2195 implicitly pop an input reg, that reg will still be live.
2197 Note that we can't use find_regno_note here: the register numbers
2198 in the death notes have already been substituted. */
2200 for (i
= 0; i
< n_outputs
; i
++)
2201 if (STACK_REG_P (recog_data
.operand
[i
]))
2205 for (j
= 0; j
< n_notes
; j
++)
2206 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2207 && note_kind
[j
] == REG_UNUSED
)
2209 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2215 for (i
= n_outputs
; i
< n_outputs
+ n_inputs
; i
++)
2216 if (STACK_REG_P (recog_data
.operand
[i
]))
2220 for (j
= 0; j
< n_notes
; j
++)
2221 if (REGNO (recog_data
.operand
[i
]) == REGNO (note_reg
[j
])
2222 && note_kind
[j
] == REG_DEAD
2223 && TEST_HARD_REG_BIT (regstack
->reg_set
,
2224 REGNO (recog_data
.operand
[i
])))
2226 insn
= emit_pop_insn (insn
, regstack
, recog_data
.operand
[i
],
2233 /* Substitute stack hard reg numbers for stack virtual registers in
2234 INSN. Non-stack register numbers are not changed. REGSTACK is the
2235 current stack content. Insns may be emitted as needed to arrange the
2236 stack for the 387 based on the contents of the insn. Return whether
2237 a control flow insn was deleted in the process. */
2240 subst_stack_regs (rtx insn
, stack regstack
)
2242 rtx
*note_link
, note
;
2243 bool control_flow_insn_deleted
= false;
2248 int top
= regstack
->top
;
2250 /* If there are any floating point parameters to be passed in
2251 registers for this call, make sure they are in the right
2256 straighten_stack (insn
, regstack
);
2258 /* Now mark the arguments as dead after the call. */
2260 while (regstack
->top
>= 0)
2262 CLEAR_HARD_REG_BIT (regstack
->reg_set
, FIRST_STACK_REG
+ regstack
->top
);
2268 /* Do the actual substitution if any stack regs are mentioned.
2269 Since we only record whether entire insn mentions stack regs, and
2270 subst_stack_regs_pat only works for patterns that contain stack regs,
2271 we must check each pattern in a parallel here. A call_value_pop could
2274 if (stack_regs_mentioned (insn
))
2276 int n_operands
= asm_noperands (PATTERN (insn
));
2277 if (n_operands
>= 0)
2279 /* This insn is an `asm' with operands. Decode the operands,
2280 decide how many are inputs, and do register substitution.
2281 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2283 subst_asm_stack_regs (insn
, regstack
);
2284 return control_flow_insn_deleted
;
2287 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
2288 for (i
= 0; i
< XVECLEN (PATTERN (insn
), 0); i
++)
2290 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn
), 0, i
)))
2292 if (GET_CODE (XVECEXP (PATTERN (insn
), 0, i
)) == CLOBBER
)
2293 XVECEXP (PATTERN (insn
), 0, i
)
2294 = shallow_copy_rtx (XVECEXP (PATTERN (insn
), 0, i
));
2295 control_flow_insn_deleted
2296 |= subst_stack_regs_pat (insn
, regstack
,
2297 XVECEXP (PATTERN (insn
), 0, i
));
2301 control_flow_insn_deleted
2302 |= subst_stack_regs_pat (insn
, regstack
, PATTERN (insn
));
2305 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2306 REG_UNUSED will already have been dealt with, so just return. */
2308 if (NOTE_P (insn
) || INSN_DELETED_P (insn
))
2309 return control_flow_insn_deleted
;
2311 /* If this a noreturn call, we can't insert pop insns after it.
2312 Instead, reset the stack state to empty. */
2314 && find_reg_note (insn
, REG_NORETURN
, NULL
))
2317 CLEAR_HARD_REG_SET (regstack
->reg_set
);
2318 return control_flow_insn_deleted
;
2321 /* If there is a REG_UNUSED note on a stack register on this insn,
2322 the indicated reg must be popped. The REG_UNUSED note is removed,
2323 since the form of the newly emitted pop insn references the reg,
2324 making it no longer `unset'. */
2326 note_link
= ®_NOTES (insn
);
2327 for (note
= *note_link
; note
; note
= XEXP (note
, 1))
2328 if (REG_NOTE_KIND (note
) == REG_UNUSED
&& STACK_REG_P (XEXP (note
, 0)))
2330 *note_link
= XEXP (note
, 1);
2331 insn
= emit_pop_insn (insn
, regstack
, XEXP (note
, 0), EMIT_AFTER
);
2334 note_link
= &XEXP (note
, 1);
2336 return control_flow_insn_deleted
;
2339 /* Change the organization of the stack so that it fits a new basic
2340 block. Some registers might have to be popped, but there can never be
2341 a register live in the new block that is not now live.
2343 Insert any needed insns before or after INSN, as indicated by
2344 WHERE. OLD is the original stack layout, and NEW is the desired
2345 form. OLD is updated to reflect the code emitted, i.e., it will be
2346 the same as NEW upon return.
2348 This function will not preserve block_end[]. But that information
2349 is no longer needed once this has executed. */
2352 change_stack (rtx insn
, stack old
, stack
new, enum emit_where where
)
2357 /* Stack adjustments for the first insn in a block update the
2358 current_block's stack_in instead of inserting insns directly.
2359 compensate_edges will add the necessary code later. */
2362 && where
== EMIT_BEFORE
)
2364 BLOCK_INFO (current_block
)->stack_in
= *new;
2365 starting_stack_p
= false;
2370 /* We will be inserting new insns "backwards". If we are to insert
2371 after INSN, find the next insn, and insert before it. */
2373 if (where
== EMIT_AFTER
)
2375 if (current_block
&& BB_END (current_block
) == insn
)
2377 insn
= NEXT_INSN (insn
);
2380 /* Pop any registers that are not needed in the new block. */
2382 /* If the destination block's stack already has a specified layout
2383 and contains two or more registers, use a more intelligent algorithm
2384 to pop registers that minimizes the number number of fxchs below. */
2387 bool slots
[REG_STACK_SIZE
];
2388 int pops
[REG_STACK_SIZE
];
2389 int next
, dest
, topsrc
;
2391 /* First pass to determine the free slots. */
2392 for (reg
= 0; reg
<= new->top
; reg
++)
2393 slots
[reg
] = TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]);
2395 /* Second pass to allocate preferred slots. */
2397 for (reg
= old
->top
; reg
> new->top
; reg
--)
2398 if (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2401 for (next
= 0; next
<= new->top
; next
++)
2402 if (!slots
[next
] && new->reg
[next
] == old
->reg
[reg
])
2404 /* If this is a preference for the new top of stack, record
2405 the fact by remembering it's old->reg in topsrc. */
2406 if (next
== new->top
)
2417 /* Intentionally, avoid placing the top of stack in it's correct
2418 location, if we still need to permute the stack below and we
2419 can usefully place it somewhere else. This is the case if any
2420 slot is still unallocated, in which case we should place the
2421 top of stack there. */
2423 for (reg
= 0; reg
< new->top
; reg
++)
2427 slots
[new->top
] = false;
2432 /* Third pass allocates remaining slots and emits pop insns. */
2434 for (reg
= old
->top
; reg
> new->top
; reg
--)
2439 /* Find next free slot. */
2444 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[dest
], DFmode
),
2450 /* The following loop attempts to maximize the number of times we
2451 pop the top of the stack, as this permits the use of the faster
2452 ffreep instruction on platforms that support it. */
2456 for (reg
= 0; reg
<= old
->top
; reg
++)
2457 if (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[reg
]))
2461 while (old
->top
>= live
)
2462 if (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[old
->top
]))
2464 while (TEST_HARD_REG_BIT (new->reg_set
, old
->reg
[next
]))
2466 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[next
], DFmode
),
2470 emit_pop_insn (insn
, old
, FP_MODE_REG (old
->reg
[old
->top
], DFmode
),
2476 /* If the new block has never been processed, then it can inherit
2477 the old stack order. */
2479 new->top
= old
->top
;
2480 memcpy (new->reg
, old
->reg
, sizeof (new->reg
));
2484 /* This block has been entered before, and we must match the
2485 previously selected stack order. */
2487 /* By now, the only difference should be the order of the stack,
2488 not their depth or liveliness. */
2490 gcc_assert (hard_reg_set_equal_p (old
->reg_set
, new->reg_set
));
2491 gcc_assert (old
->top
== new->top
);
2493 /* If the stack is not empty (new->top != -1), loop here emitting
2494 swaps until the stack is correct.
2496 The worst case number of swaps emitted is N + 2, where N is the
2497 depth of the stack. In some cases, the reg at the top of
2498 stack may be correct, but swapped anyway in order to fix
2499 other regs. But since we never swap any other reg away from
2500 its correct slot, this algorithm will converge. */
2505 /* Swap the reg at top of stack into the position it is
2506 supposed to be in, until the correct top of stack appears. */
2508 while (old
->reg
[old
->top
] != new->reg
[new->top
])
2510 for (reg
= new->top
; reg
>= 0; reg
--)
2511 if (new->reg
[reg
] == old
->reg
[old
->top
])
2514 gcc_assert (reg
!= -1);
2516 emit_swap_insn (insn
, old
,
2517 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2520 /* See if any regs remain incorrect. If so, bring an
2521 incorrect reg to the top of stack, and let the while loop
2524 for (reg
= new->top
; reg
>= 0; reg
--)
2525 if (new->reg
[reg
] != old
->reg
[reg
])
2527 emit_swap_insn (insn
, old
,
2528 FP_MODE_REG (old
->reg
[reg
], DFmode
));
2533 /* At this point there must be no differences. */
2535 for (reg
= old
->top
; reg
>= 0; reg
--)
2536 gcc_assert (old
->reg
[reg
] == new->reg
[reg
]);
2540 BB_END (current_block
) = PREV_INSN (insn
);
2543 /* Print stack configuration. */
2546 print_stack (FILE *file
, stack s
)
2552 fprintf (file
, "uninitialized\n");
2553 else if (s
->top
== -1)
2554 fprintf (file
, "empty\n");
2559 for (i
= 0; i
<= s
->top
; ++i
)
2560 fprintf (file
, "%d ", s
->reg
[i
]);
2561 fputs ("]\n", file
);
2565 /* This function was doing life analysis. We now let the regular live
2566 code do it's job, so we only need to check some extra invariants
2567 that reg-stack expects. Primary among these being that all registers
2568 are initialized before use.
2570 The function returns true when code was emitted to CFG edges and
2571 commit_edge_insertions needs to be called. */
2574 convert_regs_entry (void)
2580 /* Load something into each stack register live at function entry.
2581 Such live registers can be caused by uninitialized variables or
2582 functions not returning values on all paths. In order to keep
2583 the push/pop code happy, and to not scrog the register stack, we
2584 must put something in these registers. Use a QNaN.
2586 Note that we are inserting converted code here. This code is
2587 never seen by the convert_regs pass. */
2589 FOR_EACH_EDGE (e
, ei
, ENTRY_BLOCK_PTR
->succs
)
2591 basic_block block
= e
->dest
;
2592 block_info bi
= BLOCK_INFO (block
);
2595 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2596 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2600 bi
->stack_in
.reg
[++top
] = reg
;
2602 init
= gen_rtx_SET (VOIDmode
,
2603 FP_MODE_REG (FIRST_STACK_REG
, SFmode
),
2605 insert_insn_on_edge (init
, e
);
2609 bi
->stack_in
.top
= top
;
2615 /* Construct the desired stack for function exit. This will either
2616 be `empty', or the function return value at top-of-stack. */
2619 convert_regs_exit (void)
2621 int value_reg_low
, value_reg_high
;
2625 retvalue
= stack_result (current_function_decl
);
2626 value_reg_low
= value_reg_high
= -1;
2629 value_reg_low
= REGNO (retvalue
);
2630 value_reg_high
= END_HARD_REGNO (retvalue
) - 1;
2633 output_stack
= &BLOCK_INFO (EXIT_BLOCK_PTR
)->stack_in
;
2634 if (value_reg_low
== -1)
2635 output_stack
->top
= -1;
2640 output_stack
->top
= value_reg_high
- value_reg_low
;
2641 for (reg
= value_reg_low
; reg
<= value_reg_high
; ++reg
)
2643 output_stack
->reg
[value_reg_high
- reg
] = reg
;
2644 SET_HARD_REG_BIT (output_stack
->reg_set
, reg
);
2649 /* Copy the stack info from the end of edge E's source block to the
2650 start of E's destination block. */
2653 propagate_stack (edge e
)
2655 stack src_stack
= &BLOCK_INFO (e
->src
)->stack_out
;
2656 stack dest_stack
= &BLOCK_INFO (e
->dest
)->stack_in
;
2659 /* Preserve the order of the original stack, but check whether
2660 any pops are needed. */
2661 dest_stack
->top
= -1;
2662 for (reg
= 0; reg
<= src_stack
->top
; ++reg
)
2663 if (TEST_HARD_REG_BIT (dest_stack
->reg_set
, src_stack
->reg
[reg
]))
2664 dest_stack
->reg
[++dest_stack
->top
] = src_stack
->reg
[reg
];
2668 /* Adjust the stack of edge E's source block on exit to match the stack
2669 of it's target block upon input. The stack layouts of both blocks
2670 should have been defined by now. */
2673 compensate_edge (edge e
)
2675 basic_block source
= e
->src
, target
= e
->dest
;
2676 stack target_stack
= &BLOCK_INFO (target
)->stack_in
;
2677 stack source_stack
= &BLOCK_INFO (source
)->stack_out
;
2678 struct stack_def regstack
;
2682 fprintf (dump_file
, "Edge %d->%d: ", source
->index
, target
->index
);
2684 gcc_assert (target_stack
->top
!= -2);
2686 /* Check whether stacks are identical. */
2687 if (target_stack
->top
== source_stack
->top
)
2689 for (reg
= target_stack
->top
; reg
>= 0; --reg
)
2690 if (target_stack
->reg
[reg
] != source_stack
->reg
[reg
])
2696 fprintf (dump_file
, "no changes needed\n");
2703 fprintf (dump_file
, "correcting stack to ");
2704 print_stack (dump_file
, target_stack
);
2707 /* Abnormal calls may appear to have values live in st(0), but the
2708 abnormal return path will not have actually loaded the values. */
2709 if (e
->flags
& EDGE_ABNORMAL_CALL
)
2711 /* Assert that the lifetimes are as we expect -- one value
2712 live at st(0) on the end of the source block, and no
2713 values live at the beginning of the destination block.
2714 For complex return values, we may have st(1) live as well. */
2715 gcc_assert (source_stack
->top
== 0 || source_stack
->top
== 1);
2716 gcc_assert (target_stack
->top
== -1);
2720 /* Handle non-call EH edges specially. The normal return path have
2721 values in registers. These will be popped en masse by the unwind
2723 if (e
->flags
& EDGE_EH
)
2725 gcc_assert (target_stack
->top
== -1);
2729 /* We don't support abnormal edges. Global takes care to
2730 avoid any live register across them, so we should never
2731 have to insert instructions on such edges. */
2732 gcc_assert (! (e
->flags
& EDGE_ABNORMAL
));
2734 /* Make a copy of source_stack as change_stack is destructive. */
2735 regstack
= *source_stack
;
2737 /* It is better to output directly to the end of the block
2738 instead of to the edge, because emit_swap can do minimal
2739 insn scheduling. We can do this when there is only one
2740 edge out, and it is not abnormal. */
2741 if (EDGE_COUNT (source
->succs
) == 1)
2743 current_block
= source
;
2744 change_stack (BB_END (source
), ®stack
, target_stack
,
2745 (JUMP_P (BB_END (source
)) ? EMIT_BEFORE
: EMIT_AFTER
));
2751 current_block
= NULL
;
2754 /* ??? change_stack needs some point to emit insns after. */
2755 after
= emit_note (NOTE_INSN_DELETED
);
2757 change_stack (after
, ®stack
, target_stack
, EMIT_BEFORE
);
2762 insert_insn_on_edge (seq
, e
);
2768 /* Traverse all non-entry edges in the CFG, and emit the necessary
2769 edge compensation code to change the stack from stack_out of the
2770 source block to the stack_in of the destination block. */
2773 compensate_edges (void)
2775 bool inserted
= false;
2778 starting_stack_p
= false;
2781 if (bb
!= ENTRY_BLOCK_PTR
)
2786 FOR_EACH_EDGE (e
, ei
, bb
->succs
)
2787 inserted
|= compensate_edge (e
);
2792 /* Select the better of two edges E1 and E2 to use to determine the
2793 stack layout for their shared destination basic block. This is
2794 typically the more frequently executed. The edge E1 may be NULL
2795 (in which case E2 is returned), but E2 is always non-NULL. */
2798 better_edge (edge e1
, edge e2
)
2803 if (EDGE_FREQUENCY (e1
) > EDGE_FREQUENCY (e2
))
2805 if (EDGE_FREQUENCY (e1
) < EDGE_FREQUENCY (e2
))
2808 if (e1
->count
> e2
->count
)
2810 if (e1
->count
< e2
->count
)
2813 /* Prefer critical edges to minimize inserting compensation code on
2816 if (EDGE_CRITICAL_P (e1
) != EDGE_CRITICAL_P (e2
))
2817 return EDGE_CRITICAL_P (e1
) ? e1
: e2
;
2819 /* Avoid non-deterministic behavior. */
2820 return (e1
->src
->index
< e2
->src
->index
) ? e1
: e2
;
2823 /* Convert stack register references in one block. */
2826 convert_regs_1 (basic_block block
)
2828 struct stack_def regstack
;
2829 block_info bi
= BLOCK_INFO (block
);
2832 bool control_flow_insn_deleted
= false;
2834 any_malformed_asm
= false;
2836 /* Choose an initial stack layout, if one hasn't already been chosen. */
2837 if (bi
->stack_in
.top
== -2)
2839 edge e
, beste
= NULL
;
2842 /* Select the best incoming edge (typically the most frequent) to
2843 use as a template for this basic block. */
2844 FOR_EACH_EDGE (e
, ei
, block
->preds
)
2845 if (BLOCK_INFO (e
->src
)->done
)
2846 beste
= better_edge (beste
, e
);
2849 propagate_stack (beste
);
2852 /* No predecessors. Create an arbitrary input stack. */
2853 bi
->stack_in
.top
= -1;
2854 for (reg
= LAST_STACK_REG
; reg
>= FIRST_STACK_REG
; --reg
)
2855 if (TEST_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
))
2856 bi
->stack_in
.reg
[++bi
->stack_in
.top
] = reg
;
2862 fprintf (dump_file
, "\nBasic block %d\nInput stack: ", block
->index
);
2863 print_stack (dump_file
, &bi
->stack_in
);
2866 /* Process all insns in this block. Keep track of NEXT so that we
2867 don't process insns emitted while substituting in INSN. */
2868 current_block
= block
;
2869 next
= BB_HEAD (block
);
2870 regstack
= bi
->stack_in
;
2871 starting_stack_p
= true;
2876 next
= NEXT_INSN (insn
);
2878 /* Ensure we have not missed a block boundary. */
2880 if (insn
== BB_END (block
))
2883 /* Don't bother processing unless there is a stack reg
2884 mentioned or if it's a CALL_INSN. */
2885 if (stack_regs_mentioned (insn
)
2890 fprintf (dump_file
, " insn %d input stack: ",
2892 print_stack (dump_file
, ®stack
);
2894 control_flow_insn_deleted
|= subst_stack_regs (insn
, ®stack
);
2895 starting_stack_p
= false;
2902 fprintf (dump_file
, "Expected live registers [");
2903 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2904 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
))
2905 fprintf (dump_file
, " %d", reg
);
2906 fprintf (dump_file
, " ]\nOutput stack: ");
2907 print_stack (dump_file
, ®stack
);
2910 insn
= BB_END (block
);
2912 insn
= PREV_INSN (insn
);
2914 /* If the function is declared to return a value, but it returns one
2915 in only some cases, some registers might come live here. Emit
2916 necessary moves for them. */
2918 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; ++reg
)
2920 if (TEST_HARD_REG_BIT (bi
->out_reg_set
, reg
)
2921 && ! TEST_HARD_REG_BIT (regstack
.reg_set
, reg
))
2926 fprintf (dump_file
, "Emitting insn initializing reg %d\n", reg
);
2928 set
= gen_rtx_SET (VOIDmode
, FP_MODE_REG (reg
, SFmode
), not_a_num
);
2929 insn
= emit_insn_after (set
, insn
);
2930 control_flow_insn_deleted
|= subst_stack_regs (insn
, ®stack
);
2934 /* Amongst the insns possibly deleted during the substitution process above,
2935 might have been the only trapping insn in the block. We purge the now
2936 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2937 called at the end of convert_regs. The order in which we process the
2938 blocks ensures that we never delete an already processed edge.
2940 Note that, at this point, the CFG may have been damaged by the emission
2941 of instructions after an abnormal call, which moves the basic block end
2942 (and is the reason why we call fixup_abnormal_edges later). So we must
2943 be sure that the trapping insn has been deleted before trying to purge
2944 dead edges, otherwise we risk purging valid edges.
2946 ??? We are normally supposed not to delete trapping insns, so we pretend
2947 that the insns deleted above don't actually trap. It would have been
2948 better to detect this earlier and avoid creating the EH edge in the first
2949 place, still, but we don't have enough information at that time. */
2951 if (control_flow_insn_deleted
)
2952 purge_dead_edges (block
);
2954 /* Something failed if the stack lives don't match. If we had malformed
2955 asms, we zapped the instruction itself, but that didn't produce the
2956 same pattern of register kills as before. */
2957 gcc_assert (hard_reg_set_equal_p (regstack
.reg_set
, bi
->out_reg_set
)
2958 || any_malformed_asm
);
2959 bi
->stack_out
= regstack
;
2963 /* Convert registers in all blocks reachable from BLOCK. */
2966 convert_regs_2 (basic_block block
)
2968 basic_block
*stack
, *sp
;
2970 /* We process the blocks in a top-down manner, in a way such that one block
2971 is only processed after all its predecessors. The number of predecessors
2972 of every block has already been computed. */
2974 stack
= XNEWVEC (basic_block
, n_basic_blocks
);
2986 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2987 some dead EH outgoing edge after the deletion of the trapping
2988 insn inside the block. Since the number of predecessors of
2989 BLOCK's successors was computed based on the initial edge set,
2990 we check the necessity to process some of these successors
2991 before such an edge deletion may happen. However, there is
2992 a pitfall: if BLOCK is the only predecessor of a successor and
2993 the edge between them happens to be deleted, the successor
2994 becomes unreachable and should not be processed. The problem
2995 is that there is no way to preventively detect this case so we
2996 stack the successor in all cases and hand over the task of
2997 fixing up the discrepancy to convert_regs_1. */
2999 FOR_EACH_EDGE (e
, ei
, block
->succs
)
3000 if (! (e
->flags
& EDGE_DFS_BACK
))
3002 BLOCK_INFO (e
->dest
)->predecessors
--;
3003 if (!BLOCK_INFO (e
->dest
)->predecessors
)
3007 convert_regs_1 (block
);
3009 while (sp
!= stack
);
3014 /* Traverse all basic blocks in a function, converting the register
3015 references in each insn from the "flat" register file that gcc uses,
3016 to the stack-like registers the 387 uses. */
3026 /* Initialize uninitialized registers on function entry. */
3027 inserted
= convert_regs_entry ();
3029 /* Construct the desired stack for function exit. */
3030 convert_regs_exit ();
3031 BLOCK_INFO (EXIT_BLOCK_PTR
)->done
= 1;
3033 /* ??? Future: process inner loops first, and give them arbitrary
3034 initial stacks which emit_swap_insn can modify. This ought to
3035 prevent double fxch that often appears at the head of a loop. */
3037 /* Process all blocks reachable from all entry points. */
3038 FOR_EACH_EDGE (e
, ei
, ENTRY_BLOCK_PTR
->succs
)
3039 convert_regs_2 (e
->dest
);
3041 /* ??? Process all unreachable blocks. Though there's no excuse
3042 for keeping these even when not optimizing. */
3045 block_info bi
= BLOCK_INFO (b
);
3051 inserted
|= compensate_edges ();
3053 clear_aux_for_blocks ();
3055 fixup_abnormal_edges ();
3057 commit_edge_insertions ();
3060 fputc ('\n', dump_file
);
3063 /* Convert register usage from "flat" register file usage to a "stack
3064 register file. FILE is the dump file, if used.
3066 Construct a CFG and run life analysis. Then convert each insn one
3067 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3068 code duplication created when the converter inserts pop insns on
3078 /* Clean up previous run. */
3079 if (stack_regs_mentioned_data
!= NULL
)
3080 VEC_free (char, heap
, stack_regs_mentioned_data
);
3082 /* See if there is something to do. Flow analysis is quite
3083 expensive so we might save some compilation time. */
3084 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
3085 if (regs_ever_live
[i
])
3087 if (i
> LAST_STACK_REG
)
3090 /* Ok, floating point instructions exist. If not optimizing,
3091 build the CFG and run life analysis.
3092 Also need to rebuild life when superblock scheduling is done
3093 as it don't update liveness yet. */
3095 || ((flag_sched2_use_superblocks
|| flag_sched2_use_traces
)
3096 && flag_schedule_insns_after_reload
))
3098 count_or_remove_death_notes (NULL
, 1);
3099 life_analysis (PROP_DEATH_NOTES
);
3101 mark_dfs_back_edges ();
3103 /* Set up block info for each basic block. */
3104 alloc_aux_for_blocks (sizeof (struct block_info_def
));
3107 block_info bi
= BLOCK_INFO (bb
);
3112 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
3113 if (!(e
->flags
& EDGE_DFS_BACK
)
3114 && e
->src
!= ENTRY_BLOCK_PTR
)
3117 /* Set current register status at last instruction `uninitialized'. */
3118 bi
->stack_in
.top
= -2;
3120 /* Copy live_at_end and live_at_start into temporaries. */
3121 for (reg
= FIRST_STACK_REG
; reg
<= LAST_STACK_REG
; reg
++)
3123 if (REGNO_REG_SET_P (bb
->il
.rtl
->global_live_at_end
, reg
))
3124 SET_HARD_REG_BIT (bi
->out_reg_set
, reg
);
3125 if (REGNO_REG_SET_P (bb
->il
.rtl
->global_live_at_start
, reg
))
3126 SET_HARD_REG_BIT (bi
->stack_in
.reg_set
, reg
);
3130 /* Create the replacement registers up front. */
3131 for (i
= FIRST_STACK_REG
; i
<= LAST_STACK_REG
; i
++)
3133 enum machine_mode mode
;
3134 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
);
3136 mode
= GET_MODE_WIDER_MODE (mode
))
3137 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
3138 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT
);
3140 mode
= GET_MODE_WIDER_MODE (mode
))
3141 FP_MODE_REG (i
, mode
) = gen_rtx_REG (mode
, i
);
3144 ix86_flags_rtx
= gen_rtx_REG (CCmode
, FLAGS_REG
);
3146 /* A QNaN for initializing uninitialized variables.
3148 ??? We can't load from constant memory in PIC mode, because
3149 we're inserting these instructions before the prologue and
3150 the PIC register hasn't been set up. In that case, fall back
3151 on zero, which we can get from `ldz'. */
3153 if ((flag_pic
&& !TARGET_64BIT
)
3154 || ix86_cmodel
== CM_LARGE
|| ix86_cmodel
== CM_LARGE_PIC
)
3155 not_a_num
= CONST0_RTX (SFmode
);
3158 not_a_num
= gen_lowpart (SFmode
, GEN_INT (0x7fc00000));
3159 not_a_num
= force_const_mem (SFmode
, not_a_num
);
3162 /* Allocate a cache for stack_regs_mentioned. */
3163 max_uid
= get_max_uid ();
3164 stack_regs_mentioned_data
= VEC_alloc (char, heap
, max_uid
+ 1);
3165 memset (VEC_address (char, stack_regs_mentioned_data
),
3166 0, sizeof (char) * max_uid
+ 1);
3170 free_aux_for_blocks ();
3173 #endif /* STACK_REGS */
3176 gate_handle_stack_regs (void)
3185 /* Convert register usage from flat register file usage to a stack
3188 rest_of_handle_stack_regs (void)
3191 if (reg_to_stack () && optimize
)
3193 regstack_completed
= 1;
3194 if (cleanup_cfg (CLEANUP_EXPENSIVE
| CLEANUP_POST_REGSTACK
3195 | (flag_crossjumping
? CLEANUP_CROSSJUMP
: 0))
3196 && (flag_reorder_blocks
|| flag_reorder_blocks_and_partition
))
3200 cfg_layout_initialize (0);
3202 reorder_basic_blocks ();
3203 cleanup_cfg (CLEANUP_EXPENSIVE
| CLEANUP_POST_REGSTACK
);
3206 if (bb
->next_bb
!= EXIT_BLOCK_PTR
)
3207 bb
->aux
= bb
->next_bb
;
3208 cfg_layout_finalize ();
3212 regstack_completed
= 1;
3217 struct tree_opt_pass pass_stack_regs
=
3220 gate_handle_stack_regs
, /* gate */
3221 rest_of_handle_stack_regs
, /* execute */
3224 0, /* static_pass_number */
3225 TV_REG_STACK
, /* tv_id */
3226 0, /* properties_required */
3227 0, /* properties_provided */
3228 0, /* properties_destroyed */
3229 0, /* todo_flags_start */
3231 TODO_ggc_collect
, /* todo_flags_finish */