Makefile.in (tree-into-ssa.o, [...]): Depend on vecprim.h.
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
20 02110-1301, USA. */
21
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
24
25 * The form of the input:
26
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
36
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
44
45 * The form of the output:
46
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
52
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
55
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
59
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
62
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
66
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
71
72 * Methodology:
73
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
77
78 * asm_operands:
79
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
83
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
87
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
91
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
98
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
101
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
104
105 asm ("foo" : "=t" (a) : "f" (b));
106
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, i.e., the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
112
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
115
116 The asm above would be written as
117
118 asm ("foo" : "=&t" (a) : "f" (b));
119
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
124
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
128
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
133
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
136
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
140
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
143
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
151
152 */
153 \f
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
173 #include "timevar.h"
174 #include "tree-pass.h"
175 #include "target.h"
176 #include "vecprim.h"
177
178 #ifdef STACK_REGS
179
180 /* We use this array to cache info about insns, because otherwise we
181 spend too much time in stack_regs_mentioned_p.
182
183 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
184 the insn uses stack registers, two indicates the insn does not use
185 stack registers. */
186 static VEC(char,heap) *stack_regs_mentioned_data;
187
188 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
189
190 /* This is the basic stack record. TOP is an index into REG[] such
191 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
192
193 If TOP is -2, REG[] is not yet initialized. Stack initialization
194 consists of placing each live reg in array `reg' and setting `top'
195 appropriately.
196
197 REG_SET indicates which registers are live. */
198
199 typedef struct stack_def
200 {
201 int top; /* index to top stack element */
202 HARD_REG_SET reg_set; /* set of live registers */
203 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
204 } *stack;
205
206 /* This is used to carry information about basic blocks. It is
207 attached to the AUX field of the standard CFG block. */
208
209 typedef struct block_info_def
210 {
211 struct stack_def stack_in; /* Input stack configuration. */
212 struct stack_def stack_out; /* Output stack configuration. */
213 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
214 int done; /* True if block already converted. */
215 int predecessors; /* Number of predecessors that need
216 to be visited. */
217 } *block_info;
218
219 #define BLOCK_INFO(B) ((block_info) (B)->aux)
220
221 /* Passed to change_stack to indicate where to emit insns. */
222 enum emit_where
223 {
224 EMIT_AFTER,
225 EMIT_BEFORE
226 };
227
228 /* The block we're currently working on. */
229 static basic_block current_block;
230
231 /* In the current_block, whether we're processing the first register
232 stack or call instruction, i.e. the regstack is currently the
233 same as BLOCK_INFO(current_block)->stack_in. */
234 static bool starting_stack_p;
235
236 /* This is the register file for all register after conversion. */
237 static rtx
238 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
239
240 #define FP_MODE_REG(regno,mode) \
241 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
242
243 /* Used to initialize uninitialized registers. */
244 static rtx not_a_num;
245
246 /* Forward declarations */
247
248 static int stack_regs_mentioned_p (rtx pat);
249 static void pop_stack (stack, int);
250 static rtx *get_true_reg (rtx *);
251
252 static int check_asm_stack_operands (rtx);
253 static int get_asm_operand_n_inputs (rtx);
254 static rtx stack_result (tree);
255 static void replace_reg (rtx *, int);
256 static void remove_regno_note (rtx, enum reg_note, unsigned int);
257 static int get_hard_regnum (stack, rtx);
258 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
259 static void swap_to_top(rtx, stack, rtx, rtx);
260 static bool move_for_stack_reg (rtx, stack, rtx);
261 static bool move_nan_for_stack_reg (rtx, stack, rtx);
262 static int swap_rtx_condition_1 (rtx);
263 static int swap_rtx_condition (rtx);
264 static void compare_for_stack_reg (rtx, stack, rtx);
265 static bool subst_stack_regs_pat (rtx, stack, rtx);
266 static void subst_asm_stack_regs (rtx, stack);
267 static bool subst_stack_regs (rtx, stack);
268 static void change_stack (rtx, stack, stack, enum emit_where);
269 static void print_stack (FILE *, stack);
270 static rtx next_flags_user (rtx);
271 \f
272 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
273
274 static int
275 stack_regs_mentioned_p (rtx pat)
276 {
277 const char *fmt;
278 int i;
279
280 if (STACK_REG_P (pat))
281 return 1;
282
283 fmt = GET_RTX_FORMAT (GET_CODE (pat));
284 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
285 {
286 if (fmt[i] == 'E')
287 {
288 int j;
289
290 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
291 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
292 return 1;
293 }
294 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
295 return 1;
296 }
297
298 return 0;
299 }
300
301 /* Return nonzero if INSN mentions stacked registers, else return zero. */
302
303 int
304 stack_regs_mentioned (rtx insn)
305 {
306 unsigned int uid, max;
307 int test;
308
309 if (! INSN_P (insn) || !stack_regs_mentioned_data)
310 return 0;
311
312 uid = INSN_UID (insn);
313 max = VEC_length (char, stack_regs_mentioned_data);
314 if (uid >= max)
315 {
316 char *p;
317 unsigned int old_max = max;
318
319 /* Allocate some extra size to avoid too many reallocs, but
320 do not grow too quickly. */
321 max = uid + uid / 20 + 1;
322 VEC_safe_grow (char, heap, stack_regs_mentioned_data, max);
323 p = VEC_address (char, stack_regs_mentioned_data);
324 memset (&p[old_max], 0,
325 sizeof (char) * (max - old_max));
326 }
327
328 test = VEC_index (char, stack_regs_mentioned_data, uid);
329 if (test == 0)
330 {
331 /* This insn has yet to be examined. Do so now. */
332 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
333 VEC_replace (char, stack_regs_mentioned_data, uid, test);
334 }
335
336 return test == 1;
337 }
338 \f
339 static rtx ix86_flags_rtx;
340
341 static rtx
342 next_flags_user (rtx insn)
343 {
344 /* Search forward looking for the first use of this value.
345 Stop at block boundaries. */
346
347 while (insn != BB_END (current_block))
348 {
349 insn = NEXT_INSN (insn);
350
351 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
352 return insn;
353
354 if (CALL_P (insn))
355 return NULL_RTX;
356 }
357 return NULL_RTX;
358 }
359 \f
360 /* Reorganize the stack into ascending numbers, before this insn. */
361
362 static void
363 straighten_stack (rtx insn, stack regstack)
364 {
365 struct stack_def temp_stack;
366 int top;
367
368 /* If there is only a single register on the stack, then the stack is
369 already in increasing order and no reorganization is needed.
370
371 Similarly if the stack is empty. */
372 if (regstack->top <= 0)
373 return;
374
375 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
376
377 for (top = temp_stack.top = regstack->top; top >= 0; top--)
378 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
379
380 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
381 }
382
383 /* Pop a register from the stack. */
384
385 static void
386 pop_stack (stack regstack, int regno)
387 {
388 int top = regstack->top;
389
390 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
391 regstack->top--;
392 /* If regno was not at the top of stack then adjust stack. */
393 if (regstack->reg [top] != regno)
394 {
395 int i;
396 for (i = regstack->top; i >= 0; i--)
397 if (regstack->reg [i] == regno)
398 {
399 int j;
400 for (j = i; j < top; j++)
401 regstack->reg [j] = regstack->reg [j + 1];
402 break;
403 }
404 }
405 }
406 \f
407 /* Return a pointer to the REG expression within PAT. If PAT is not a
408 REG, possible enclosed by a conversion rtx, return the inner part of
409 PAT that stopped the search. */
410
411 static rtx *
412 get_true_reg (rtx *pat)
413 {
414 for (;;)
415 switch (GET_CODE (*pat))
416 {
417 case SUBREG:
418 /* Eliminate FP subregister accesses in favor of the
419 actual FP register in use. */
420 {
421 rtx subreg;
422 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
423 {
424 int regno_off = subreg_regno_offset (REGNO (subreg),
425 GET_MODE (subreg),
426 SUBREG_BYTE (*pat),
427 GET_MODE (*pat));
428 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
429 GET_MODE (subreg));
430 default:
431 return pat;
432 }
433 }
434 case FLOAT:
435 case FIX:
436 case FLOAT_EXTEND:
437 pat = & XEXP (*pat, 0);
438 break;
439
440 case FLOAT_TRUNCATE:
441 if (!flag_unsafe_math_optimizations)
442 return pat;
443 pat = & XEXP (*pat, 0);
444 break;
445 }
446 }
447 \f
448 /* Set if we find any malformed asms in a block. */
449 static bool any_malformed_asm;
450
451 /* There are many rules that an asm statement for stack-like regs must
452 follow. Those rules are explained at the top of this file: the rule
453 numbers below refer to that explanation. */
454
455 static int
456 check_asm_stack_operands (rtx insn)
457 {
458 int i;
459 int n_clobbers;
460 int malformed_asm = 0;
461 rtx body = PATTERN (insn);
462
463 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
464 char implicitly_dies[FIRST_PSEUDO_REGISTER];
465 int alt;
466
467 rtx *clobber_reg = 0;
468 int n_inputs, n_outputs;
469
470 /* Find out what the constraints require. If no constraint
471 alternative matches, this asm is malformed. */
472 extract_insn (insn);
473 constrain_operands (1);
474 alt = which_alternative;
475
476 preprocess_constraints ();
477
478 n_inputs = get_asm_operand_n_inputs (body);
479 n_outputs = recog_data.n_operands - n_inputs;
480
481 if (alt < 0)
482 {
483 malformed_asm = 1;
484 /* Avoid further trouble with this insn. */
485 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
486 return 0;
487 }
488
489 /* Strip SUBREGs here to make the following code simpler. */
490 for (i = 0; i < recog_data.n_operands; i++)
491 if (GET_CODE (recog_data.operand[i]) == SUBREG
492 && REG_P (SUBREG_REG (recog_data.operand[i])))
493 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
494
495 /* Set up CLOBBER_REG. */
496
497 n_clobbers = 0;
498
499 if (GET_CODE (body) == PARALLEL)
500 {
501 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
502
503 for (i = 0; i < XVECLEN (body, 0); i++)
504 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
505 {
506 rtx clobber = XVECEXP (body, 0, i);
507 rtx reg = XEXP (clobber, 0);
508
509 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
510 reg = SUBREG_REG (reg);
511
512 if (STACK_REG_P (reg))
513 {
514 clobber_reg[n_clobbers] = reg;
515 n_clobbers++;
516 }
517 }
518 }
519
520 /* Enforce rule #4: Output operands must specifically indicate which
521 reg an output appears in after an asm. "=f" is not allowed: the
522 operand constraints must select a class with a single reg.
523
524 Also enforce rule #5: Output operands must start at the top of
525 the reg-stack: output operands may not "skip" a reg. */
526
527 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
528 for (i = 0; i < n_outputs; i++)
529 if (STACK_REG_P (recog_data.operand[i]))
530 {
531 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
532 {
533 error_for_asm (insn, "output constraint %d must specify a single register", i);
534 malformed_asm = 1;
535 }
536 else
537 {
538 int j;
539
540 for (j = 0; j < n_clobbers; j++)
541 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
542 {
543 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
544 i, reg_names [REGNO (clobber_reg[j])]);
545 malformed_asm = 1;
546 break;
547 }
548 if (j == n_clobbers)
549 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
550 }
551 }
552
553
554 /* Search for first non-popped reg. */
555 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
556 if (! reg_used_as_output[i])
557 break;
558
559 /* If there are any other popped regs, that's an error. */
560 for (; i < LAST_STACK_REG + 1; i++)
561 if (reg_used_as_output[i])
562 break;
563
564 if (i != LAST_STACK_REG + 1)
565 {
566 error_for_asm (insn, "output regs must be grouped at top of stack");
567 malformed_asm = 1;
568 }
569
570 /* Enforce rule #2: All implicitly popped input regs must be closer
571 to the top of the reg-stack than any input that is not implicitly
572 popped. */
573
574 memset (implicitly_dies, 0, sizeof (implicitly_dies));
575 for (i = n_outputs; i < n_outputs + n_inputs; i++)
576 if (STACK_REG_P (recog_data.operand[i]))
577 {
578 /* An input reg is implicitly popped if it is tied to an
579 output, or if there is a CLOBBER for it. */
580 int j;
581
582 for (j = 0; j < n_clobbers; j++)
583 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
584 break;
585
586 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
587 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
588 }
589
590 /* Search for first non-popped reg. */
591 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
592 if (! implicitly_dies[i])
593 break;
594
595 /* If there are any other popped regs, that's an error. */
596 for (; i < LAST_STACK_REG + 1; i++)
597 if (implicitly_dies[i])
598 break;
599
600 if (i != LAST_STACK_REG + 1)
601 {
602 error_for_asm (insn,
603 "implicitly popped regs must be grouped at top of stack");
604 malformed_asm = 1;
605 }
606
607 /* Enforce rule #3: If any input operand uses the "f" constraint, all
608 output constraints must use the "&" earlyclobber.
609
610 ??? Detect this more deterministically by having constrain_asm_operands
611 record any earlyclobber. */
612
613 for (i = n_outputs; i < n_outputs + n_inputs; i++)
614 if (recog_op_alt[i][alt].matches == -1)
615 {
616 int j;
617
618 for (j = 0; j < n_outputs; j++)
619 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
620 {
621 error_for_asm (insn,
622 "output operand %d must use %<&%> constraint", j);
623 malformed_asm = 1;
624 }
625 }
626
627 if (malformed_asm)
628 {
629 /* Avoid further trouble with this insn. */
630 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
631 any_malformed_asm = true;
632 return 0;
633 }
634
635 return 1;
636 }
637 \f
638 /* Calculate the number of inputs and outputs in BODY, an
639 asm_operands. N_OPERANDS is the total number of operands, and
640 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
641 placed. */
642
643 static int
644 get_asm_operand_n_inputs (rtx body)
645 {
646 switch (GET_CODE (body))
647 {
648 case SET:
649 gcc_assert (GET_CODE (SET_SRC (body)) == ASM_OPERANDS);
650 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
651
652 case ASM_OPERANDS:
653 return ASM_OPERANDS_INPUT_LENGTH (body);
654
655 case PARALLEL:
656 return get_asm_operand_n_inputs (XVECEXP (body, 0, 0));
657
658 default:
659 gcc_unreachable ();
660 }
661 }
662
663 /* If current function returns its result in an fp stack register,
664 return the REG. Otherwise, return 0. */
665
666 static rtx
667 stack_result (tree decl)
668 {
669 rtx result;
670
671 /* If the value is supposed to be returned in memory, then clearly
672 it is not returned in a stack register. */
673 if (aggregate_value_p (DECL_RESULT (decl), decl))
674 return 0;
675
676 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
677 if (result != 0)
678 result = targetm.calls.function_value (TREE_TYPE (DECL_RESULT (decl)),
679 decl, true);
680
681 return result != 0 && STACK_REG_P (result) ? result : 0;
682 }
683 \f
684
685 /*
686 * This section deals with stack register substitution, and forms the second
687 * pass over the RTL.
688 */
689
690 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
691 the desired hard REGNO. */
692
693 static void
694 replace_reg (rtx *reg, int regno)
695 {
696 gcc_assert (regno >= FIRST_STACK_REG);
697 gcc_assert (regno <= LAST_STACK_REG);
698 gcc_assert (STACK_REG_P (*reg));
699
700 gcc_assert (SCALAR_FLOAT_MODE_P (GET_MODE (*reg))
701 || GET_MODE_CLASS (GET_MODE (*reg)) == MODE_COMPLEX_FLOAT);
702
703 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
704 }
705
706 /* Remove a note of type NOTE, which must be found, for register
707 number REGNO from INSN. Remove only one such note. */
708
709 static void
710 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
711 {
712 rtx *note_link, this;
713
714 note_link = &REG_NOTES (insn);
715 for (this = *note_link; this; this = XEXP (this, 1))
716 if (REG_NOTE_KIND (this) == note
717 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
718 {
719 *note_link = XEXP (this, 1);
720 return;
721 }
722 else
723 note_link = &XEXP (this, 1);
724
725 gcc_unreachable ();
726 }
727
728 /* Find the hard register number of virtual register REG in REGSTACK.
729 The hard register number is relative to the top of the stack. -1 is
730 returned if the register is not found. */
731
732 static int
733 get_hard_regnum (stack regstack, rtx reg)
734 {
735 int i;
736
737 gcc_assert (STACK_REG_P (reg));
738
739 for (i = regstack->top; i >= 0; i--)
740 if (regstack->reg[i] == REGNO (reg))
741 break;
742
743 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
744 }
745 \f
746 /* Emit an insn to pop virtual register REG before or after INSN.
747 REGSTACK is the stack state after INSN and is updated to reflect this
748 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
749 is represented as a SET whose destination is the register to be popped
750 and source is the top of stack. A death note for the top of stack
751 cases the movdf pattern to pop. */
752
753 static rtx
754 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
755 {
756 rtx pop_insn, pop_rtx;
757 int hard_regno;
758
759 /* For complex types take care to pop both halves. These may survive in
760 CLOBBER and USE expressions. */
761 if (COMPLEX_MODE_P (GET_MODE (reg)))
762 {
763 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
764 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
765
766 pop_insn = NULL_RTX;
767 if (get_hard_regnum (regstack, reg1) >= 0)
768 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
769 if (get_hard_regnum (regstack, reg2) >= 0)
770 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
771 gcc_assert (pop_insn);
772 return pop_insn;
773 }
774
775 hard_regno = get_hard_regnum (regstack, reg);
776
777 gcc_assert (hard_regno >= FIRST_STACK_REG);
778
779 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
780 FP_MODE_REG (FIRST_STACK_REG, DFmode));
781
782 if (where == EMIT_AFTER)
783 pop_insn = emit_insn_after (pop_rtx, insn);
784 else
785 pop_insn = emit_insn_before (pop_rtx, insn);
786
787 REG_NOTES (pop_insn)
788 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
789 REG_NOTES (pop_insn));
790
791 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
792 = regstack->reg[regstack->top];
793 regstack->top -= 1;
794 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
795
796 return pop_insn;
797 }
798 \f
799 /* Emit an insn before or after INSN to swap virtual register REG with
800 the top of stack. REGSTACK is the stack state before the swap, and
801 is updated to reflect the swap. A swap insn is represented as a
802 PARALLEL of two patterns: each pattern moves one reg to the other.
803
804 If REG is already at the top of the stack, no insn is emitted. */
805
806 static void
807 emit_swap_insn (rtx insn, stack regstack, rtx reg)
808 {
809 int hard_regno;
810 rtx swap_rtx;
811 int tmp, other_reg; /* swap regno temps */
812 rtx i1; /* the stack-reg insn prior to INSN */
813 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
814
815 hard_regno = get_hard_regnum (regstack, reg);
816
817 gcc_assert (hard_regno >= FIRST_STACK_REG);
818 if (hard_regno == FIRST_STACK_REG)
819 return;
820
821 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
822
823 tmp = regstack->reg[other_reg];
824 regstack->reg[other_reg] = regstack->reg[regstack->top];
825 regstack->reg[regstack->top] = tmp;
826
827 /* Find the previous insn involving stack regs, but don't pass a
828 block boundary. */
829 i1 = NULL;
830 if (current_block && insn != BB_HEAD (current_block))
831 {
832 rtx tmp = PREV_INSN (insn);
833 rtx limit = PREV_INSN (BB_HEAD (current_block));
834 while (tmp != limit)
835 {
836 if (LABEL_P (tmp)
837 || CALL_P (tmp)
838 || NOTE_INSN_BASIC_BLOCK_P (tmp)
839 || (NONJUMP_INSN_P (tmp)
840 && stack_regs_mentioned (tmp)))
841 {
842 i1 = tmp;
843 break;
844 }
845 tmp = PREV_INSN (tmp);
846 }
847 }
848
849 if (i1 != NULL_RTX
850 && (i1set = single_set (i1)) != NULL_RTX)
851 {
852 rtx i1src = *get_true_reg (&SET_SRC (i1set));
853 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
854
855 /* If the previous register stack push was from the reg we are to
856 swap with, omit the swap. */
857
858 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
859 && REG_P (i1src)
860 && REGNO (i1src) == (unsigned) hard_regno - 1
861 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
862 return;
863
864 /* If the previous insn wrote to the reg we are to swap with,
865 omit the swap. */
866
867 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
868 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
869 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
870 return;
871 }
872
873 /* Avoid emitting the swap if this is the first register stack insn
874 of the current_block. Instead update the current_block's stack_in
875 and let compensate edges take care of this for us. */
876 if (current_block && starting_stack_p)
877 {
878 BLOCK_INFO (current_block)->stack_in = *regstack;
879 starting_stack_p = false;
880 return;
881 }
882
883 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
884 FP_MODE_REG (FIRST_STACK_REG, XFmode));
885
886 if (i1)
887 emit_insn_after (swap_rtx, i1);
888 else if (current_block)
889 emit_insn_before (swap_rtx, BB_HEAD (current_block));
890 else
891 emit_insn_before (swap_rtx, insn);
892 }
893 \f
894 /* Emit an insns before INSN to swap virtual register SRC1 with
895 the top of stack and virtual register SRC2 with second stack
896 slot. REGSTACK is the stack state before the swaps, and
897 is updated to reflect the swaps. A swap insn is represented as a
898 PARALLEL of two patterns: each pattern moves one reg to the other.
899
900 If SRC1 and/or SRC2 are already at the right place, no swap insn
901 is emitted. */
902
903 static void
904 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
905 {
906 struct stack_def temp_stack;
907 int regno, j, k, temp;
908
909 temp_stack = *regstack;
910
911 /* Place operand 1 at the top of stack. */
912 regno = get_hard_regnum (&temp_stack, src1);
913 gcc_assert (regno >= 0);
914 if (regno != FIRST_STACK_REG)
915 {
916 k = temp_stack.top - (regno - FIRST_STACK_REG);
917 j = temp_stack.top;
918
919 temp = temp_stack.reg[k];
920 temp_stack.reg[k] = temp_stack.reg[j];
921 temp_stack.reg[j] = temp;
922 }
923
924 /* Place operand 2 next on the stack. */
925 regno = get_hard_regnum (&temp_stack, src2);
926 gcc_assert (regno >= 0);
927 if (regno != FIRST_STACK_REG + 1)
928 {
929 k = temp_stack.top - (regno - FIRST_STACK_REG);
930 j = temp_stack.top - 1;
931
932 temp = temp_stack.reg[k];
933 temp_stack.reg[k] = temp_stack.reg[j];
934 temp_stack.reg[j] = temp;
935 }
936
937 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
938 }
939 \f
940 /* Handle a move to or from a stack register in PAT, which is in INSN.
941 REGSTACK is the current stack. Return whether a control flow insn
942 was deleted in the process. */
943
944 static bool
945 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
946 {
947 rtx *psrc = get_true_reg (&SET_SRC (pat));
948 rtx *pdest = get_true_reg (&SET_DEST (pat));
949 rtx src, dest;
950 rtx note;
951 bool control_flow_insn_deleted = false;
952
953 src = *psrc; dest = *pdest;
954
955 if (STACK_REG_P (src) && STACK_REG_P (dest))
956 {
957 /* Write from one stack reg to another. If SRC dies here, then
958 just change the register mapping and delete the insn. */
959
960 note = find_regno_note (insn, REG_DEAD, REGNO (src));
961 if (note)
962 {
963 int i;
964
965 /* If this is a no-op move, there must not be a REG_DEAD note. */
966 gcc_assert (REGNO (src) != REGNO (dest));
967
968 for (i = regstack->top; i >= 0; i--)
969 if (regstack->reg[i] == REGNO (src))
970 break;
971
972 /* The destination must be dead, or life analysis is borked. */
973 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
974
975 /* If the source is not live, this is yet another case of
976 uninitialized variables. Load up a NaN instead. */
977 if (i < 0)
978 return move_nan_for_stack_reg (insn, regstack, dest);
979
980 /* It is possible that the dest is unused after this insn.
981 If so, just pop the src. */
982
983 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
984 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
985 else
986 {
987 regstack->reg[i] = REGNO (dest);
988 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
989 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
990 }
991
992 control_flow_insn_deleted |= control_flow_insn_p (insn);
993 delete_insn (insn);
994 return control_flow_insn_deleted;
995 }
996
997 /* The source reg does not die. */
998
999 /* If this appears to be a no-op move, delete it, or else it
1000 will confuse the machine description output patterns. But if
1001 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1002 for REG_UNUSED will not work for deleted insns. */
1003
1004 if (REGNO (src) == REGNO (dest))
1005 {
1006 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1007 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1008
1009 control_flow_insn_deleted |= control_flow_insn_p (insn);
1010 delete_insn (insn);
1011 return control_flow_insn_deleted;
1012 }
1013
1014 /* The destination ought to be dead. */
1015 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1016
1017 replace_reg (psrc, get_hard_regnum (regstack, src));
1018
1019 regstack->reg[++regstack->top] = REGNO (dest);
1020 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1021 replace_reg (pdest, FIRST_STACK_REG);
1022 }
1023 else if (STACK_REG_P (src))
1024 {
1025 /* Save from a stack reg to MEM, or possibly integer reg. Since
1026 only top of stack may be saved, emit an exchange first if
1027 needs be. */
1028
1029 emit_swap_insn (insn, regstack, src);
1030
1031 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1032 if (note)
1033 {
1034 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1035 regstack->top--;
1036 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1037 }
1038 else if ((GET_MODE (src) == XFmode)
1039 && regstack->top < REG_STACK_SIZE - 1)
1040 {
1041 /* A 387 cannot write an XFmode value to a MEM without
1042 clobbering the source reg. The output code can handle
1043 this by reading back the value from the MEM.
1044 But it is more efficient to use a temp register if one is
1045 available. Push the source value here if the register
1046 stack is not full, and then write the value to memory via
1047 a pop. */
1048 rtx push_rtx;
1049 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1050
1051 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1052 emit_insn_before (push_rtx, insn);
1053 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1054 REG_NOTES (insn));
1055 }
1056
1057 replace_reg (psrc, FIRST_STACK_REG);
1058 }
1059 else
1060 {
1061 gcc_assert (STACK_REG_P (dest));
1062
1063 /* Load from MEM, or possibly integer REG or constant, into the
1064 stack regs. The actual target is always the top of the
1065 stack. The stack mapping is changed to reflect that DEST is
1066 now at top of stack. */
1067
1068 /* The destination ought to be dead. */
1069 gcc_assert (get_hard_regnum (regstack, dest) < FIRST_STACK_REG);
1070
1071 gcc_assert (regstack->top < REG_STACK_SIZE);
1072
1073 regstack->reg[++regstack->top] = REGNO (dest);
1074 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1075 replace_reg (pdest, FIRST_STACK_REG);
1076 }
1077
1078 return control_flow_insn_deleted;
1079 }
1080
1081 /* A helper function which replaces INSN with a pattern that loads up
1082 a NaN into DEST, then invokes move_for_stack_reg. */
1083
1084 static bool
1085 move_nan_for_stack_reg (rtx insn, stack regstack, rtx dest)
1086 {
1087 rtx pat;
1088
1089 dest = FP_MODE_REG (REGNO (dest), SFmode);
1090 pat = gen_rtx_SET (VOIDmode, dest, not_a_num);
1091 PATTERN (insn) = pat;
1092 INSN_CODE (insn) = -1;
1093
1094 return move_for_stack_reg (insn, regstack, pat);
1095 }
1096 \f
1097 /* Swap the condition on a branch, if there is one. Return true if we
1098 found a condition to swap. False if the condition was not used as
1099 such. */
1100
1101 static int
1102 swap_rtx_condition_1 (rtx pat)
1103 {
1104 const char *fmt;
1105 int i, r = 0;
1106
1107 if (COMPARISON_P (pat))
1108 {
1109 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1110 r = 1;
1111 }
1112 else
1113 {
1114 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1115 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1116 {
1117 if (fmt[i] == 'E')
1118 {
1119 int j;
1120
1121 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1122 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1123 }
1124 else if (fmt[i] == 'e')
1125 r |= swap_rtx_condition_1 (XEXP (pat, i));
1126 }
1127 }
1128
1129 return r;
1130 }
1131
1132 static int
1133 swap_rtx_condition (rtx insn)
1134 {
1135 rtx pat = PATTERN (insn);
1136
1137 /* We're looking for a single set to cc0 or an HImode temporary. */
1138
1139 if (GET_CODE (pat) == SET
1140 && REG_P (SET_DEST (pat))
1141 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1142 {
1143 insn = next_flags_user (insn);
1144 if (insn == NULL_RTX)
1145 return 0;
1146 pat = PATTERN (insn);
1147 }
1148
1149 /* See if this is, or ends in, a fnstsw. If so, we're not doing anything
1150 with the cc value right now. We may be able to search for one
1151 though. */
1152
1153 if (GET_CODE (pat) == SET
1154 && GET_CODE (SET_SRC (pat)) == UNSPEC
1155 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1156 {
1157 rtx dest = SET_DEST (pat);
1158
1159 /* Search forward looking for the first use of this value.
1160 Stop at block boundaries. */
1161 while (insn != BB_END (current_block))
1162 {
1163 insn = NEXT_INSN (insn);
1164 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1165 break;
1166 if (CALL_P (insn))
1167 return 0;
1168 }
1169
1170 /* We haven't found it. */
1171 if (insn == BB_END (current_block))
1172 return 0;
1173
1174 /* So we've found the insn using this value. If it is anything
1175 other than sahf or the value does not die (meaning we'd have
1176 to search further), then we must give up. */
1177 pat = PATTERN (insn);
1178 if (GET_CODE (pat) != SET
1179 || GET_CODE (SET_SRC (pat)) != UNSPEC
1180 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1181 || ! dead_or_set_p (insn, dest))
1182 return 0;
1183
1184 /* Now we are prepared to handle this as a normal cc0 setter. */
1185 insn = next_flags_user (insn);
1186 if (insn == NULL_RTX)
1187 return 0;
1188 pat = PATTERN (insn);
1189 }
1190
1191 if (swap_rtx_condition_1 (pat))
1192 {
1193 int fail = 0;
1194 INSN_CODE (insn) = -1;
1195 if (recog_memoized (insn) == -1)
1196 fail = 1;
1197 /* In case the flags don't die here, recurse to try fix
1198 following user too. */
1199 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1200 {
1201 insn = next_flags_user (insn);
1202 if (!insn || !swap_rtx_condition (insn))
1203 fail = 1;
1204 }
1205 if (fail)
1206 {
1207 swap_rtx_condition_1 (pat);
1208 return 0;
1209 }
1210 return 1;
1211 }
1212 return 0;
1213 }
1214
1215 /* Handle a comparison. Special care needs to be taken to avoid
1216 causing comparisons that a 387 cannot do correctly, such as EQ.
1217
1218 Also, a pop insn may need to be emitted. The 387 does have an
1219 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1220 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1221 set up. */
1222
1223 static void
1224 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1225 {
1226 rtx *src1, *src2;
1227 rtx src1_note, src2_note;
1228
1229 src1 = get_true_reg (&XEXP (pat_src, 0));
1230 src2 = get_true_reg (&XEXP (pat_src, 1));
1231
1232 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1233 registers that die in this insn - move those to stack top first. */
1234 if ((! STACK_REG_P (*src1)
1235 || (STACK_REG_P (*src2)
1236 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1237 && swap_rtx_condition (insn))
1238 {
1239 rtx temp;
1240 temp = XEXP (pat_src, 0);
1241 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1242 XEXP (pat_src, 1) = temp;
1243
1244 src1 = get_true_reg (&XEXP (pat_src, 0));
1245 src2 = get_true_reg (&XEXP (pat_src, 1));
1246
1247 INSN_CODE (insn) = -1;
1248 }
1249
1250 /* We will fix any death note later. */
1251
1252 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1253
1254 if (STACK_REG_P (*src2))
1255 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1256 else
1257 src2_note = NULL_RTX;
1258
1259 emit_swap_insn (insn, regstack, *src1);
1260
1261 replace_reg (src1, FIRST_STACK_REG);
1262
1263 if (STACK_REG_P (*src2))
1264 replace_reg (src2, get_hard_regnum (regstack, *src2));
1265
1266 if (src1_note)
1267 {
1268 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1269 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1270 }
1271
1272 /* If the second operand dies, handle that. But if the operands are
1273 the same stack register, don't bother, because only one death is
1274 needed, and it was just handled. */
1275
1276 if (src2_note
1277 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1278 && REGNO (*src1) == REGNO (*src2)))
1279 {
1280 /* As a special case, two regs may die in this insn if src2 is
1281 next to top of stack and the top of stack also dies. Since
1282 we have already popped src1, "next to top of stack" is really
1283 at top (FIRST_STACK_REG) now. */
1284
1285 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1286 && src1_note)
1287 {
1288 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1289 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1290 }
1291 else
1292 {
1293 /* The 386 can only represent death of the first operand in
1294 the case handled above. In all other cases, emit a separate
1295 pop and remove the death note from here. */
1296
1297 /* link_cc0_insns (insn); */
1298
1299 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1300
1301 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1302 EMIT_AFTER);
1303 }
1304 }
1305 }
1306 \f
1307 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1308 is the current register layout. Return whether a control flow insn
1309 was deleted in the process. */
1310
1311 static bool
1312 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1313 {
1314 rtx *dest, *src;
1315 bool control_flow_insn_deleted = false;
1316
1317 switch (GET_CODE (pat))
1318 {
1319 case USE:
1320 /* Deaths in USE insns can happen in non optimizing compilation.
1321 Handle them by popping the dying register. */
1322 src = get_true_reg (&XEXP (pat, 0));
1323 if (STACK_REG_P (*src)
1324 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1325 {
1326 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1327 return control_flow_insn_deleted;
1328 }
1329 /* ??? Uninitialized USE should not happen. */
1330 else
1331 gcc_assert (get_hard_regnum (regstack, *src) != -1);
1332 break;
1333
1334 case CLOBBER:
1335 {
1336 rtx note;
1337
1338 dest = get_true_reg (&XEXP (pat, 0));
1339 if (STACK_REG_P (*dest))
1340 {
1341 note = find_reg_note (insn, REG_DEAD, *dest);
1342
1343 if (pat != PATTERN (insn))
1344 {
1345 /* The fix_truncdi_1 pattern wants to be able to allocate
1346 its own scratch register. It does this by clobbering
1347 an fp reg so that it is assured of an empty reg-stack
1348 register. If the register is live, kill it now.
1349 Remove the DEAD/UNUSED note so we don't try to kill it
1350 later too. */
1351
1352 if (note)
1353 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1354 else
1355 {
1356 note = find_reg_note (insn, REG_UNUSED, *dest);
1357 gcc_assert (note);
1358 }
1359 remove_note (insn, note);
1360 replace_reg (dest, FIRST_STACK_REG + 1);
1361 }
1362 else
1363 {
1364 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1365 indicates an uninitialized value. Because reload removed
1366 all other clobbers, this must be due to a function
1367 returning without a value. Load up a NaN. */
1368
1369 if (!note)
1370 {
1371 rtx t = *dest;
1372 if (get_hard_regnum (regstack, t) == -1)
1373 control_flow_insn_deleted
1374 |= move_nan_for_stack_reg (insn, regstack, t);
1375 if (COMPLEX_MODE_P (GET_MODE (t)))
1376 {
1377 t = FP_MODE_REG (REGNO (t) + 1, DFmode);
1378 if (get_hard_regnum (regstack, t) == -1)
1379 control_flow_insn_deleted
1380 |= move_nan_for_stack_reg (insn, regstack, t);
1381 }
1382 }
1383 }
1384 }
1385 break;
1386 }
1387
1388 case SET:
1389 {
1390 rtx *src1 = (rtx *) 0, *src2;
1391 rtx src1_note, src2_note;
1392 rtx pat_src;
1393
1394 dest = get_true_reg (&SET_DEST (pat));
1395 src = get_true_reg (&SET_SRC (pat));
1396 pat_src = SET_SRC (pat);
1397
1398 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1399 if (STACK_REG_P (*src)
1400 || (STACK_REG_P (*dest)
1401 && (REG_P (*src) || MEM_P (*src)
1402 || GET_CODE (*src) == CONST_DOUBLE)))
1403 {
1404 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1405 break;
1406 }
1407
1408 switch (GET_CODE (pat_src))
1409 {
1410 case COMPARE:
1411 compare_for_stack_reg (insn, regstack, pat_src);
1412 break;
1413
1414 case CALL:
1415 {
1416 int count;
1417 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1418 --count >= 0;)
1419 {
1420 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1421 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1422 }
1423 }
1424 replace_reg (dest, FIRST_STACK_REG);
1425 break;
1426
1427 case REG:
1428 /* This is a `tstM2' case. */
1429 gcc_assert (*dest == cc0_rtx);
1430 src1 = src;
1431
1432 /* Fall through. */
1433
1434 case FLOAT_TRUNCATE:
1435 case SQRT:
1436 case ABS:
1437 case NEG:
1438 /* These insns only operate on the top of the stack. DEST might
1439 be cc0_rtx if we're processing a tstM pattern. Also, it's
1440 possible that the tstM case results in a REG_DEAD note on the
1441 source. */
1442
1443 if (src1 == 0)
1444 src1 = get_true_reg (&XEXP (pat_src, 0));
1445
1446 emit_swap_insn (insn, regstack, *src1);
1447
1448 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1449
1450 if (STACK_REG_P (*dest))
1451 replace_reg (dest, FIRST_STACK_REG);
1452
1453 if (src1_note)
1454 {
1455 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1456 regstack->top--;
1457 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1458 }
1459
1460 replace_reg (src1, FIRST_STACK_REG);
1461 break;
1462
1463 case MINUS:
1464 case DIV:
1465 /* On i386, reversed forms of subM3 and divM3 exist for
1466 MODE_FLOAT, so the same code that works for addM3 and mulM3
1467 can be used. */
1468 case MULT:
1469 case PLUS:
1470 /* These insns can accept the top of stack as a destination
1471 from a stack reg or mem, or can use the top of stack as a
1472 source and some other stack register (possibly top of stack)
1473 as a destination. */
1474
1475 src1 = get_true_reg (&XEXP (pat_src, 0));
1476 src2 = get_true_reg (&XEXP (pat_src, 1));
1477
1478 /* We will fix any death note later. */
1479
1480 if (STACK_REG_P (*src1))
1481 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1482 else
1483 src1_note = NULL_RTX;
1484 if (STACK_REG_P (*src2))
1485 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1486 else
1487 src2_note = NULL_RTX;
1488
1489 /* If either operand is not a stack register, then the dest
1490 must be top of stack. */
1491
1492 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1493 emit_swap_insn (insn, regstack, *dest);
1494 else
1495 {
1496 /* Both operands are REG. If neither operand is already
1497 at the top of stack, choose to make the one that is the dest
1498 the new top of stack. */
1499
1500 int src1_hard_regnum, src2_hard_regnum;
1501
1502 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1503 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1504 gcc_assert (src1_hard_regnum != -1);
1505 gcc_assert (src2_hard_regnum != -1);
1506
1507 if (src1_hard_regnum != FIRST_STACK_REG
1508 && src2_hard_regnum != FIRST_STACK_REG)
1509 emit_swap_insn (insn, regstack, *dest);
1510 }
1511
1512 if (STACK_REG_P (*src1))
1513 replace_reg (src1, get_hard_regnum (regstack, *src1));
1514 if (STACK_REG_P (*src2))
1515 replace_reg (src2, get_hard_regnum (regstack, *src2));
1516
1517 if (src1_note)
1518 {
1519 rtx src1_reg = XEXP (src1_note, 0);
1520
1521 /* If the register that dies is at the top of stack, then
1522 the destination is somewhere else - merely substitute it.
1523 But if the reg that dies is not at top of stack, then
1524 move the top of stack to the dead reg, as though we had
1525 done the insn and then a store-with-pop. */
1526
1527 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1528 {
1529 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1530 replace_reg (dest, get_hard_regnum (regstack, *dest));
1531 }
1532 else
1533 {
1534 int regno = get_hard_regnum (regstack, src1_reg);
1535
1536 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1537 replace_reg (dest, regno);
1538
1539 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1540 = regstack->reg[regstack->top];
1541 }
1542
1543 CLEAR_HARD_REG_BIT (regstack->reg_set,
1544 REGNO (XEXP (src1_note, 0)));
1545 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1546 regstack->top--;
1547 }
1548 else if (src2_note)
1549 {
1550 rtx src2_reg = XEXP (src2_note, 0);
1551 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1552 {
1553 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1554 replace_reg (dest, get_hard_regnum (regstack, *dest));
1555 }
1556 else
1557 {
1558 int regno = get_hard_regnum (regstack, src2_reg);
1559
1560 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1561 replace_reg (dest, regno);
1562
1563 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1564 = regstack->reg[regstack->top];
1565 }
1566
1567 CLEAR_HARD_REG_BIT (regstack->reg_set,
1568 REGNO (XEXP (src2_note, 0)));
1569 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1570 regstack->top--;
1571 }
1572 else
1573 {
1574 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1575 replace_reg (dest, get_hard_regnum (regstack, *dest));
1576 }
1577
1578 /* Keep operand 1 matching with destination. */
1579 if (COMMUTATIVE_ARITH_P (pat_src)
1580 && REG_P (*src1) && REG_P (*src2)
1581 && REGNO (*src1) != REGNO (*dest))
1582 {
1583 int tmp = REGNO (*src1);
1584 replace_reg (src1, REGNO (*src2));
1585 replace_reg (src2, tmp);
1586 }
1587 break;
1588
1589 case UNSPEC:
1590 switch (XINT (pat_src, 1))
1591 {
1592 case UNSPEC_FIST:
1593
1594 case UNSPEC_FIST_FLOOR:
1595 case UNSPEC_FIST_CEIL:
1596
1597 /* These insns only operate on the top of the stack. */
1598
1599 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1600 emit_swap_insn (insn, regstack, *src1);
1601
1602 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1603
1604 if (STACK_REG_P (*dest))
1605 replace_reg (dest, FIRST_STACK_REG);
1606
1607 if (src1_note)
1608 {
1609 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1610 regstack->top--;
1611 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1612 }
1613
1614 replace_reg (src1, FIRST_STACK_REG);
1615 break;
1616
1617 case UNSPEC_SIN:
1618 case UNSPEC_COS:
1619 case UNSPEC_FRNDINT:
1620 case UNSPEC_F2XM1:
1621
1622 case UNSPEC_FRNDINT_FLOOR:
1623 case UNSPEC_FRNDINT_CEIL:
1624 case UNSPEC_FRNDINT_TRUNC:
1625 case UNSPEC_FRNDINT_MASK_PM:
1626
1627 /* These insns only operate on the top of the stack. */
1628
1629 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1630
1631 emit_swap_insn (insn, regstack, *src1);
1632
1633 /* Input should never die, it is
1634 replaced with output. */
1635 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1636 gcc_assert (!src1_note);
1637
1638 if (STACK_REG_P (*dest))
1639 replace_reg (dest, FIRST_STACK_REG);
1640
1641 replace_reg (src1, FIRST_STACK_REG);
1642 break;
1643
1644 case UNSPEC_FPATAN:
1645 case UNSPEC_FYL2X:
1646 case UNSPEC_FYL2XP1:
1647 /* These insns operate on the top two stack slots. */
1648
1649 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1650 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1651
1652 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1653 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1654
1655 swap_to_top (insn, regstack, *src1, *src2);
1656
1657 replace_reg (src1, FIRST_STACK_REG);
1658 replace_reg (src2, FIRST_STACK_REG + 1);
1659
1660 if (src1_note)
1661 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1662 if (src2_note)
1663 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1664
1665 /* Pop both input operands from the stack. */
1666 CLEAR_HARD_REG_BIT (regstack->reg_set,
1667 regstack->reg[regstack->top]);
1668 CLEAR_HARD_REG_BIT (regstack->reg_set,
1669 regstack->reg[regstack->top - 1]);
1670 regstack->top -= 2;
1671
1672 /* Push the result back onto the stack. */
1673 regstack->reg[++regstack->top] = REGNO (*dest);
1674 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1675 replace_reg (dest, FIRST_STACK_REG);
1676 break;
1677
1678 case UNSPEC_FSCALE_FRACT:
1679 case UNSPEC_FPREM_F:
1680 case UNSPEC_FPREM1_F:
1681 /* These insns operate on the top two stack slots.
1682 first part of double input, double output insn. */
1683
1684 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1685 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1686
1687 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1688 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1689
1690 /* Inputs should never die, they are
1691 replaced with outputs. */
1692 gcc_assert (!src1_note);
1693 gcc_assert (!src2_note);
1694
1695 swap_to_top (insn, regstack, *src1, *src2);
1696
1697 /* Push the result back onto stack. Empty stack slot
1698 will be filled in second part of insn. */
1699 if (STACK_REG_P (*dest)) {
1700 regstack->reg[regstack->top] = REGNO (*dest);
1701 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1702 replace_reg (dest, FIRST_STACK_REG);
1703 }
1704
1705 replace_reg (src1, FIRST_STACK_REG);
1706 replace_reg (src2, FIRST_STACK_REG + 1);
1707 break;
1708
1709 case UNSPEC_FSCALE_EXP:
1710 case UNSPEC_FPREM_U:
1711 case UNSPEC_FPREM1_U:
1712 /* These insns operate on the top two stack slots./
1713 second part of double input, double output insn. */
1714
1715 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1716 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1717
1718 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1719 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1720
1721 /* Inputs should never die, they are
1722 replaced with outputs. */
1723 gcc_assert (!src1_note);
1724 gcc_assert (!src2_note);
1725
1726 swap_to_top (insn, regstack, *src1, *src2);
1727
1728 /* Push the result back onto stack. Fill empty slot from
1729 first part of insn and fix top of stack pointer. */
1730 if (STACK_REG_P (*dest)) {
1731 regstack->reg[regstack->top - 1] = REGNO (*dest);
1732 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1733 replace_reg (dest, FIRST_STACK_REG + 1);
1734 }
1735
1736 replace_reg (src1, FIRST_STACK_REG);
1737 replace_reg (src2, FIRST_STACK_REG + 1);
1738 break;
1739
1740 case UNSPEC_SINCOS_COS:
1741 case UNSPEC_TAN_ONE:
1742 case UNSPEC_XTRACT_FRACT:
1743 /* These insns operate on the top two stack slots,
1744 first part of one input, double output insn. */
1745
1746 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1747
1748 emit_swap_insn (insn, regstack, *src1);
1749
1750 /* Input should never die, it is
1751 replaced with output. */
1752 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1753 gcc_assert (!src1_note);
1754
1755 /* Push the result back onto stack. Empty stack slot
1756 will be filled in second part of insn. */
1757 if (STACK_REG_P (*dest)) {
1758 regstack->reg[regstack->top + 1] = REGNO (*dest);
1759 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1760 replace_reg (dest, FIRST_STACK_REG);
1761 }
1762
1763 replace_reg (src1, FIRST_STACK_REG);
1764 break;
1765
1766 case UNSPEC_SINCOS_SIN:
1767 case UNSPEC_TAN_TAN:
1768 case UNSPEC_XTRACT_EXP:
1769 /* These insns operate on the top two stack slots,
1770 second part of one input, double output insn. */
1771
1772 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1773
1774 emit_swap_insn (insn, regstack, *src1);
1775
1776 /* Input should never die, it is
1777 replaced with output. */
1778 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1779 gcc_assert (!src1_note);
1780
1781 /* Push the result back onto stack. Fill empty slot from
1782 first part of insn and fix top of stack pointer. */
1783 if (STACK_REG_P (*dest)) {
1784 regstack->reg[regstack->top] = REGNO (*dest);
1785 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1786 replace_reg (dest, FIRST_STACK_REG + 1);
1787
1788 regstack->top++;
1789 }
1790
1791 replace_reg (src1, FIRST_STACK_REG);
1792 break;
1793
1794 case UNSPEC_SAHF:
1795 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1796 The combination matches the PPRO fcomi instruction. */
1797
1798 pat_src = XVECEXP (pat_src, 0, 0);
1799 gcc_assert (GET_CODE (pat_src) == UNSPEC);
1800 gcc_assert (XINT (pat_src, 1) == UNSPEC_FNSTSW);
1801 /* Fall through. */
1802
1803 case UNSPEC_FNSTSW:
1804 /* Combined fcomp+fnstsw generated for doing well with
1805 CSE. When optimizing this would have been broken
1806 up before now. */
1807
1808 pat_src = XVECEXP (pat_src, 0, 0);
1809 gcc_assert (GET_CODE (pat_src) == COMPARE);
1810
1811 compare_for_stack_reg (insn, regstack, pat_src);
1812 break;
1813
1814 default:
1815 gcc_unreachable ();
1816 }
1817 break;
1818
1819 case IF_THEN_ELSE:
1820 /* This insn requires the top of stack to be the destination. */
1821
1822 src1 = get_true_reg (&XEXP (pat_src, 1));
1823 src2 = get_true_reg (&XEXP (pat_src, 2));
1824
1825 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1826 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1827
1828 /* If the comparison operator is an FP comparison operator,
1829 it is handled correctly by compare_for_stack_reg () who
1830 will move the destination to the top of stack. But if the
1831 comparison operator is not an FP comparison operator, we
1832 have to handle it here. */
1833 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1834 && REGNO (*dest) != regstack->reg[regstack->top])
1835 {
1836 /* In case one of operands is the top of stack and the operands
1837 dies, it is safe to make it the destination operand by
1838 reversing the direction of cmove and avoid fxch. */
1839 if ((REGNO (*src1) == regstack->reg[regstack->top]
1840 && src1_note)
1841 || (REGNO (*src2) == regstack->reg[regstack->top]
1842 && src2_note))
1843 {
1844 int idx1 = (get_hard_regnum (regstack, *src1)
1845 - FIRST_STACK_REG);
1846 int idx2 = (get_hard_regnum (regstack, *src2)
1847 - FIRST_STACK_REG);
1848
1849 /* Make reg-stack believe that the operands are already
1850 swapped on the stack */
1851 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1852 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1853
1854 /* Reverse condition to compensate the operand swap.
1855 i386 do have comparison always reversible. */
1856 PUT_CODE (XEXP (pat_src, 0),
1857 reversed_comparison_code (XEXP (pat_src, 0), insn));
1858 }
1859 else
1860 emit_swap_insn (insn, regstack, *dest);
1861 }
1862
1863 {
1864 rtx src_note [3];
1865 int i;
1866
1867 src_note[0] = 0;
1868 src_note[1] = src1_note;
1869 src_note[2] = src2_note;
1870
1871 if (STACK_REG_P (*src1))
1872 replace_reg (src1, get_hard_regnum (regstack, *src1));
1873 if (STACK_REG_P (*src2))
1874 replace_reg (src2, get_hard_regnum (regstack, *src2));
1875
1876 for (i = 1; i <= 2; i++)
1877 if (src_note [i])
1878 {
1879 int regno = REGNO (XEXP (src_note[i], 0));
1880
1881 /* If the register that dies is not at the top of
1882 stack, then move the top of stack to the dead reg.
1883 Top of stack should never die, as it is the
1884 destination. */
1885 gcc_assert (regno != regstack->reg[regstack->top]);
1886 remove_regno_note (insn, REG_DEAD, regno);
1887 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1888 EMIT_AFTER);
1889 }
1890 }
1891
1892 /* Make dest the top of stack. Add dest to regstack if
1893 not present. */
1894 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1895 regstack->reg[++regstack->top] = REGNO (*dest);
1896 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1897 replace_reg (dest, FIRST_STACK_REG);
1898 break;
1899
1900 default:
1901 gcc_unreachable ();
1902 }
1903 break;
1904 }
1905
1906 default:
1907 break;
1908 }
1909
1910 return control_flow_insn_deleted;
1911 }
1912 \f
1913 /* Substitute hard regnums for any stack regs in INSN, which has
1914 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1915 before the insn, and is updated with changes made here.
1916
1917 There are several requirements and assumptions about the use of
1918 stack-like regs in asm statements. These rules are enforced by
1919 record_asm_stack_regs; see comments there for details. Any
1920 asm_operands left in the RTL at this point may be assume to meet the
1921 requirements, since record_asm_stack_regs removes any problem asm. */
1922
1923 static void
1924 subst_asm_stack_regs (rtx insn, stack regstack)
1925 {
1926 rtx body = PATTERN (insn);
1927 int alt;
1928
1929 rtx *note_reg; /* Array of note contents */
1930 rtx **note_loc; /* Address of REG field of each note */
1931 enum reg_note *note_kind; /* The type of each note */
1932
1933 rtx *clobber_reg = 0;
1934 rtx **clobber_loc = 0;
1935
1936 struct stack_def temp_stack;
1937 int n_notes;
1938 int n_clobbers;
1939 rtx note;
1940 int i;
1941 int n_inputs, n_outputs;
1942
1943 if (! check_asm_stack_operands (insn))
1944 return;
1945
1946 /* Find out what the constraints required. If no constraint
1947 alternative matches, that is a compiler bug: we should have caught
1948 such an insn in check_asm_stack_operands. */
1949 extract_insn (insn);
1950 constrain_operands (1);
1951 alt = which_alternative;
1952
1953 preprocess_constraints ();
1954
1955 n_inputs = get_asm_operand_n_inputs (body);
1956 n_outputs = recog_data.n_operands - n_inputs;
1957
1958 gcc_assert (alt >= 0);
1959
1960 /* Strip SUBREGs here to make the following code simpler. */
1961 for (i = 0; i < recog_data.n_operands; i++)
1962 if (GET_CODE (recog_data.operand[i]) == SUBREG
1963 && REG_P (SUBREG_REG (recog_data.operand[i])))
1964 {
1965 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1966 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1967 }
1968
1969 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1970
1971 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1972 i++;
1973
1974 note_reg = alloca (i * sizeof (rtx));
1975 note_loc = alloca (i * sizeof (rtx *));
1976 note_kind = alloca (i * sizeof (enum reg_note));
1977
1978 n_notes = 0;
1979 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1980 {
1981 rtx reg = XEXP (note, 0);
1982 rtx *loc = & XEXP (note, 0);
1983
1984 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
1985 {
1986 loc = & SUBREG_REG (reg);
1987 reg = SUBREG_REG (reg);
1988 }
1989
1990 if (STACK_REG_P (reg)
1991 && (REG_NOTE_KIND (note) == REG_DEAD
1992 || REG_NOTE_KIND (note) == REG_UNUSED))
1993 {
1994 note_reg[n_notes] = reg;
1995 note_loc[n_notes] = loc;
1996 note_kind[n_notes] = REG_NOTE_KIND (note);
1997 n_notes++;
1998 }
1999 }
2000
2001 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2002
2003 n_clobbers = 0;
2004
2005 if (GET_CODE (body) == PARALLEL)
2006 {
2007 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2008 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2009
2010 for (i = 0; i < XVECLEN (body, 0); i++)
2011 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2012 {
2013 rtx clobber = XVECEXP (body, 0, i);
2014 rtx reg = XEXP (clobber, 0);
2015 rtx *loc = & XEXP (clobber, 0);
2016
2017 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2018 {
2019 loc = & SUBREG_REG (reg);
2020 reg = SUBREG_REG (reg);
2021 }
2022
2023 if (STACK_REG_P (reg))
2024 {
2025 clobber_reg[n_clobbers] = reg;
2026 clobber_loc[n_clobbers] = loc;
2027 n_clobbers++;
2028 }
2029 }
2030 }
2031
2032 temp_stack = *regstack;
2033
2034 /* Put the input regs into the desired place in TEMP_STACK. */
2035
2036 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2037 if (STACK_REG_P (recog_data.operand[i])
2038 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2039 FLOAT_REGS)
2040 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2041 {
2042 /* If an operand needs to be in a particular reg in
2043 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2044 these constraints are for single register classes, and
2045 reload guaranteed that operand[i] is already in that class,
2046 we can just use REGNO (recog_data.operand[i]) to know which
2047 actual reg this operand needs to be in. */
2048
2049 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2050
2051 gcc_assert (regno >= 0);
2052
2053 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2054 {
2055 /* recog_data.operand[i] is not in the right place. Find
2056 it and swap it with whatever is already in I's place.
2057 K is where recog_data.operand[i] is now. J is where it
2058 should be. */
2059 int j, k, temp;
2060
2061 k = temp_stack.top - (regno - FIRST_STACK_REG);
2062 j = (temp_stack.top
2063 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2064
2065 temp = temp_stack.reg[k];
2066 temp_stack.reg[k] = temp_stack.reg[j];
2067 temp_stack.reg[j] = temp;
2068 }
2069 }
2070
2071 /* Emit insns before INSN to make sure the reg-stack is in the right
2072 order. */
2073
2074 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2075
2076 /* Make the needed input register substitutions. Do death notes and
2077 clobbers too, because these are for inputs, not outputs. */
2078
2079 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2080 if (STACK_REG_P (recog_data.operand[i]))
2081 {
2082 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2083
2084 gcc_assert (regnum >= 0);
2085
2086 replace_reg (recog_data.operand_loc[i], regnum);
2087 }
2088
2089 for (i = 0; i < n_notes; i++)
2090 if (note_kind[i] == REG_DEAD)
2091 {
2092 int regnum = get_hard_regnum (regstack, note_reg[i]);
2093
2094 gcc_assert (regnum >= 0);
2095
2096 replace_reg (note_loc[i], regnum);
2097 }
2098
2099 for (i = 0; i < n_clobbers; i++)
2100 {
2101 /* It's OK for a CLOBBER to reference a reg that is not live.
2102 Don't try to replace it in that case. */
2103 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2104
2105 if (regnum >= 0)
2106 {
2107 /* Sigh - clobbers always have QImode. But replace_reg knows
2108 that these regs can't be MODE_INT and will assert. Just put
2109 the right reg there without calling replace_reg. */
2110
2111 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2112 }
2113 }
2114
2115 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2116
2117 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2118 if (STACK_REG_P (recog_data.operand[i]))
2119 {
2120 /* An input reg is implicitly popped if it is tied to an
2121 output, or if there is a CLOBBER for it. */
2122 int j;
2123
2124 for (j = 0; j < n_clobbers; j++)
2125 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2126 break;
2127
2128 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2129 {
2130 /* recog_data.operand[i] might not be at the top of stack.
2131 But that's OK, because all we need to do is pop the
2132 right number of regs off of the top of the reg-stack.
2133 record_asm_stack_regs guaranteed that all implicitly
2134 popped regs were grouped at the top of the reg-stack. */
2135
2136 CLEAR_HARD_REG_BIT (regstack->reg_set,
2137 regstack->reg[regstack->top]);
2138 regstack->top--;
2139 }
2140 }
2141
2142 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2143 Note that there isn't any need to substitute register numbers.
2144 ??? Explain why this is true. */
2145
2146 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2147 {
2148 /* See if there is an output for this hard reg. */
2149 int j;
2150
2151 for (j = 0; j < n_outputs; j++)
2152 if (STACK_REG_P (recog_data.operand[j])
2153 && REGNO (recog_data.operand[j]) == (unsigned) i)
2154 {
2155 regstack->reg[++regstack->top] = i;
2156 SET_HARD_REG_BIT (regstack->reg_set, i);
2157 break;
2158 }
2159 }
2160
2161 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2162 input that the asm didn't implicitly pop. If the asm didn't
2163 implicitly pop an input reg, that reg will still be live.
2164
2165 Note that we can't use find_regno_note here: the register numbers
2166 in the death notes have already been substituted. */
2167
2168 for (i = 0; i < n_outputs; i++)
2169 if (STACK_REG_P (recog_data.operand[i]))
2170 {
2171 int j;
2172
2173 for (j = 0; j < n_notes; j++)
2174 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2175 && note_kind[j] == REG_UNUSED)
2176 {
2177 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2178 EMIT_AFTER);
2179 break;
2180 }
2181 }
2182
2183 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2184 if (STACK_REG_P (recog_data.operand[i]))
2185 {
2186 int j;
2187
2188 for (j = 0; j < n_notes; j++)
2189 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2190 && note_kind[j] == REG_DEAD
2191 && TEST_HARD_REG_BIT (regstack->reg_set,
2192 REGNO (recog_data.operand[i])))
2193 {
2194 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2195 EMIT_AFTER);
2196 break;
2197 }
2198 }
2199 }
2200 \f
2201 /* Substitute stack hard reg numbers for stack virtual registers in
2202 INSN. Non-stack register numbers are not changed. REGSTACK is the
2203 current stack content. Insns may be emitted as needed to arrange the
2204 stack for the 387 based on the contents of the insn. Return whether
2205 a control flow insn was deleted in the process. */
2206
2207 static bool
2208 subst_stack_regs (rtx insn, stack regstack)
2209 {
2210 rtx *note_link, note;
2211 bool control_flow_insn_deleted = false;
2212 int i;
2213
2214 if (CALL_P (insn))
2215 {
2216 int top = regstack->top;
2217
2218 /* If there are any floating point parameters to be passed in
2219 registers for this call, make sure they are in the right
2220 order. */
2221
2222 if (top >= 0)
2223 {
2224 straighten_stack (insn, regstack);
2225
2226 /* Now mark the arguments as dead after the call. */
2227
2228 while (regstack->top >= 0)
2229 {
2230 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2231 regstack->top--;
2232 }
2233 }
2234 }
2235
2236 /* Do the actual substitution if any stack regs are mentioned.
2237 Since we only record whether entire insn mentions stack regs, and
2238 subst_stack_regs_pat only works for patterns that contain stack regs,
2239 we must check each pattern in a parallel here. A call_value_pop could
2240 fail otherwise. */
2241
2242 if (stack_regs_mentioned (insn))
2243 {
2244 int n_operands = asm_noperands (PATTERN (insn));
2245 if (n_operands >= 0)
2246 {
2247 /* This insn is an `asm' with operands. Decode the operands,
2248 decide how many are inputs, and do register substitution.
2249 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2250
2251 subst_asm_stack_regs (insn, regstack);
2252 return control_flow_insn_deleted;
2253 }
2254
2255 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2256 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2257 {
2258 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2259 {
2260 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2261 XVECEXP (PATTERN (insn), 0, i)
2262 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2263 control_flow_insn_deleted
2264 |= subst_stack_regs_pat (insn, regstack,
2265 XVECEXP (PATTERN (insn), 0, i));
2266 }
2267 }
2268 else
2269 control_flow_insn_deleted
2270 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2271 }
2272
2273 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2274 REG_UNUSED will already have been dealt with, so just return. */
2275
2276 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2277 return control_flow_insn_deleted;
2278
2279 /* If there is a REG_UNUSED note on a stack register on this insn,
2280 the indicated reg must be popped. The REG_UNUSED note is removed,
2281 since the form of the newly emitted pop insn references the reg,
2282 making it no longer `unset'. */
2283
2284 note_link = &REG_NOTES (insn);
2285 for (note = *note_link; note; note = XEXP (note, 1))
2286 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2287 {
2288 *note_link = XEXP (note, 1);
2289 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2290 }
2291 else
2292 note_link = &XEXP (note, 1);
2293
2294 return control_flow_insn_deleted;
2295 }
2296 \f
2297 /* Change the organization of the stack so that it fits a new basic
2298 block. Some registers might have to be popped, but there can never be
2299 a register live in the new block that is not now live.
2300
2301 Insert any needed insns before or after INSN, as indicated by
2302 WHERE. OLD is the original stack layout, and NEW is the desired
2303 form. OLD is updated to reflect the code emitted, i.e., it will be
2304 the same as NEW upon return.
2305
2306 This function will not preserve block_end[]. But that information
2307 is no longer needed once this has executed. */
2308
2309 static void
2310 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2311 {
2312 int reg;
2313 int update_end = 0;
2314
2315 /* Stack adjustments for the first insn in a block update the
2316 current_block's stack_in instead of inserting insns directly.
2317 compensate_edges will add the necessary code later. */
2318 if (current_block
2319 && starting_stack_p
2320 && where == EMIT_BEFORE)
2321 {
2322 BLOCK_INFO (current_block)->stack_in = *new;
2323 starting_stack_p = false;
2324 *old = *new;
2325 return;
2326 }
2327
2328 /* We will be inserting new insns "backwards". If we are to insert
2329 after INSN, find the next insn, and insert before it. */
2330
2331 if (where == EMIT_AFTER)
2332 {
2333 if (current_block && BB_END (current_block) == insn)
2334 update_end = 1;
2335 insn = NEXT_INSN (insn);
2336 }
2337
2338 /* Pop any registers that are not needed in the new block. */
2339
2340 /* If the destination block's stack already has a specified layout
2341 and contains two or more registers, use a more intelligent algorithm
2342 to pop registers that minimizes the number number of fxchs below. */
2343 if (new->top > 0)
2344 {
2345 bool slots[REG_STACK_SIZE];
2346 int pops[REG_STACK_SIZE];
2347 int next, dest, topsrc;
2348
2349 /* First pass to determine the free slots. */
2350 for (reg = 0; reg <= new->top; reg++)
2351 slots[reg] = TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]);
2352
2353 /* Second pass to allocate preferred slots. */
2354 topsrc = -1;
2355 for (reg = old->top; reg > new->top; reg--)
2356 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2357 {
2358 dest = -1;
2359 for (next = 0; next <= new->top; next++)
2360 if (!slots[next] && new->reg[next] == old->reg[reg])
2361 {
2362 /* If this is a preference for the new top of stack, record
2363 the fact by remembering it's old->reg in topsrc. */
2364 if (next == new->top)
2365 topsrc = reg;
2366 slots[next] = true;
2367 dest = next;
2368 break;
2369 }
2370 pops[reg] = dest;
2371 }
2372 else
2373 pops[reg] = reg;
2374
2375 /* Intentionally, avoid placing the top of stack in it's correct
2376 location, if we still need to permute the stack below and we
2377 can usefully place it somewhere else. This is the case if any
2378 slot is still unallocated, in which case we should place the
2379 top of stack there. */
2380 if (topsrc != -1)
2381 for (reg = 0; reg < new->top; reg++)
2382 if (!slots[reg])
2383 {
2384 pops[topsrc] = reg;
2385 slots[new->top] = false;
2386 slots[reg] = true;
2387 break;
2388 }
2389
2390 /* Third pass allocates remaining slots and emits pop insns. */
2391 next = new->top;
2392 for (reg = old->top; reg > new->top; reg--)
2393 {
2394 dest = pops[reg];
2395 if (dest == -1)
2396 {
2397 /* Find next free slot. */
2398 while (slots[next])
2399 next--;
2400 dest = next--;
2401 }
2402 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[dest], DFmode),
2403 EMIT_BEFORE);
2404 }
2405 }
2406 else
2407 {
2408 /* The following loop attempts to maximize the number of times we
2409 pop the top of the stack, as this permits the use of the faster
2410 ffreep instruction on platforms that support it. */
2411 int live, next;
2412
2413 live = 0;
2414 for (reg = 0; reg <= old->top; reg++)
2415 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2416 live++;
2417
2418 next = live;
2419 while (old->top >= live)
2420 if (TEST_HARD_REG_BIT (new->reg_set, old->reg[old->top]))
2421 {
2422 while (TEST_HARD_REG_BIT (new->reg_set, old->reg[next]))
2423 next--;
2424 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[next], DFmode),
2425 EMIT_BEFORE);
2426 }
2427 else
2428 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[old->top], DFmode),
2429 EMIT_BEFORE);
2430 }
2431
2432 if (new->top == -2)
2433 {
2434 /* If the new block has never been processed, then it can inherit
2435 the old stack order. */
2436
2437 new->top = old->top;
2438 memcpy (new->reg, old->reg, sizeof (new->reg));
2439 }
2440 else
2441 {
2442 /* This block has been entered before, and we must match the
2443 previously selected stack order. */
2444
2445 /* By now, the only difference should be the order of the stack,
2446 not their depth or liveliness. */
2447
2448 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2449 gcc_unreachable ();
2450 win:
2451 gcc_assert (old->top == new->top);
2452
2453 /* If the stack is not empty (new->top != -1), loop here emitting
2454 swaps until the stack is correct.
2455
2456 The worst case number of swaps emitted is N + 2, where N is the
2457 depth of the stack. In some cases, the reg at the top of
2458 stack may be correct, but swapped anyway in order to fix
2459 other regs. But since we never swap any other reg away from
2460 its correct slot, this algorithm will converge. */
2461
2462 if (new->top != -1)
2463 do
2464 {
2465 /* Swap the reg at top of stack into the position it is
2466 supposed to be in, until the correct top of stack appears. */
2467
2468 while (old->reg[old->top] != new->reg[new->top])
2469 {
2470 for (reg = new->top; reg >= 0; reg--)
2471 if (new->reg[reg] == old->reg[old->top])
2472 break;
2473
2474 gcc_assert (reg != -1);
2475
2476 emit_swap_insn (insn, old,
2477 FP_MODE_REG (old->reg[reg], DFmode));
2478 }
2479
2480 /* See if any regs remain incorrect. If so, bring an
2481 incorrect reg to the top of stack, and let the while loop
2482 above fix it. */
2483
2484 for (reg = new->top; reg >= 0; reg--)
2485 if (new->reg[reg] != old->reg[reg])
2486 {
2487 emit_swap_insn (insn, old,
2488 FP_MODE_REG (old->reg[reg], DFmode));
2489 break;
2490 }
2491 } while (reg >= 0);
2492
2493 /* At this point there must be no differences. */
2494
2495 for (reg = old->top; reg >= 0; reg--)
2496 gcc_assert (old->reg[reg] == new->reg[reg]);
2497 }
2498
2499 if (update_end)
2500 BB_END (current_block) = PREV_INSN (insn);
2501 }
2502 \f
2503 /* Print stack configuration. */
2504
2505 static void
2506 print_stack (FILE *file, stack s)
2507 {
2508 if (! file)
2509 return;
2510
2511 if (s->top == -2)
2512 fprintf (file, "uninitialized\n");
2513 else if (s->top == -1)
2514 fprintf (file, "empty\n");
2515 else
2516 {
2517 int i;
2518 fputs ("[ ", file);
2519 for (i = 0; i <= s->top; ++i)
2520 fprintf (file, "%d ", s->reg[i]);
2521 fputs ("]\n", file);
2522 }
2523 }
2524 \f
2525 /* This function was doing life analysis. We now let the regular live
2526 code do it's job, so we only need to check some extra invariants
2527 that reg-stack expects. Primary among these being that all registers
2528 are initialized before use.
2529
2530 The function returns true when code was emitted to CFG edges and
2531 commit_edge_insertions needs to be called. */
2532
2533 static int
2534 convert_regs_entry (void)
2535 {
2536 int inserted = 0;
2537 edge e;
2538 edge_iterator ei;
2539
2540 /* Load something into each stack register live at function entry.
2541 Such live registers can be caused by uninitialized variables or
2542 functions not returning values on all paths. In order to keep
2543 the push/pop code happy, and to not scrog the register stack, we
2544 must put something in these registers. Use a QNaN.
2545
2546 Note that we are inserting converted code here. This code is
2547 never seen by the convert_regs pass. */
2548
2549 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
2550 {
2551 basic_block block = e->dest;
2552 block_info bi = BLOCK_INFO (block);
2553 int reg, top = -1;
2554
2555 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2556 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2557 {
2558 rtx init;
2559
2560 bi->stack_in.reg[++top] = reg;
2561
2562 init = gen_rtx_SET (VOIDmode,
2563 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2564 not_a_num);
2565 insert_insn_on_edge (init, e);
2566 inserted = 1;
2567 }
2568
2569 bi->stack_in.top = top;
2570 }
2571
2572 return inserted;
2573 }
2574
2575 /* Construct the desired stack for function exit. This will either
2576 be `empty', or the function return value at top-of-stack. */
2577
2578 static void
2579 convert_regs_exit (void)
2580 {
2581 int value_reg_low, value_reg_high;
2582 stack output_stack;
2583 rtx retvalue;
2584
2585 retvalue = stack_result (current_function_decl);
2586 value_reg_low = value_reg_high = -1;
2587 if (retvalue)
2588 {
2589 value_reg_low = REGNO (retvalue);
2590 value_reg_high = value_reg_low
2591 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2592 }
2593
2594 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2595 if (value_reg_low == -1)
2596 output_stack->top = -1;
2597 else
2598 {
2599 int reg;
2600
2601 output_stack->top = value_reg_high - value_reg_low;
2602 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2603 {
2604 output_stack->reg[value_reg_high - reg] = reg;
2605 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2606 }
2607 }
2608 }
2609
2610 /* Copy the stack info from the end of edge E's source block to the
2611 start of E's destination block. */
2612
2613 static void
2614 propagate_stack (edge e)
2615 {
2616 stack src_stack = &BLOCK_INFO (e->src)->stack_out;
2617 stack dest_stack = &BLOCK_INFO (e->dest)->stack_in;
2618 int reg;
2619
2620 /* Preserve the order of the original stack, but check whether
2621 any pops are needed. */
2622 dest_stack->top = -1;
2623 for (reg = 0; reg <= src_stack->top; ++reg)
2624 if (TEST_HARD_REG_BIT (dest_stack->reg_set, src_stack->reg[reg]))
2625 dest_stack->reg[++dest_stack->top] = src_stack->reg[reg];
2626 }
2627
2628
2629 /* Adjust the stack of edge E's source block on exit to match the stack
2630 of it's target block upon input. The stack layouts of both blocks
2631 should have been defined by now. */
2632
2633 static bool
2634 compensate_edge (edge e)
2635 {
2636 basic_block source = e->src, target = e->dest;
2637 stack target_stack = &BLOCK_INFO (target)->stack_in;
2638 stack source_stack = &BLOCK_INFO (source)->stack_out;
2639 struct stack_def regstack;
2640 int reg;
2641
2642 if (dump_file)
2643 fprintf (dump_file, "Edge %d->%d: ", source->index, target->index);
2644
2645 gcc_assert (target_stack->top != -2);
2646
2647 /* Check whether stacks are identical. */
2648 if (target_stack->top == source_stack->top)
2649 {
2650 for (reg = target_stack->top; reg >= 0; --reg)
2651 if (target_stack->reg[reg] != source_stack->reg[reg])
2652 break;
2653
2654 if (reg == -1)
2655 {
2656 if (dump_file)
2657 fprintf (dump_file, "no changes needed\n");
2658 return false;
2659 }
2660 }
2661
2662 if (dump_file)
2663 {
2664 fprintf (dump_file, "correcting stack to ");
2665 print_stack (dump_file, target_stack);
2666 }
2667
2668 /* Abnormal calls may appear to have values live in st(0), but the
2669 abnormal return path will not have actually loaded the values. */
2670 if (e->flags & EDGE_ABNORMAL_CALL)
2671 {
2672 /* Assert that the lifetimes are as we expect -- one value
2673 live at st(0) on the end of the source block, and no
2674 values live at the beginning of the destination block.
2675 For complex return values, we may have st(1) live as well. */
2676 gcc_assert (source_stack->top == 0 || source_stack->top == 1);
2677 gcc_assert (target_stack->top == -1);
2678 return false;
2679 }
2680
2681 /* Handle non-call EH edges specially. The normal return path have
2682 values in registers. These will be popped en masse by the unwind
2683 library. */
2684 if (e->flags & EDGE_EH)
2685 {
2686 gcc_assert (target_stack->top == -1);
2687 return false;
2688 }
2689
2690 /* We don't support abnormal edges. Global takes care to
2691 avoid any live register across them, so we should never
2692 have to insert instructions on such edges. */
2693 gcc_assert (! (e->flags & EDGE_ABNORMAL));
2694
2695 /* Make a copy of source_stack as change_stack is destructive. */
2696 regstack = *source_stack;
2697
2698 /* It is better to output directly to the end of the block
2699 instead of to the edge, because emit_swap can do minimal
2700 insn scheduling. We can do this when there is only one
2701 edge out, and it is not abnormal. */
2702 if (EDGE_COUNT (source->succs) == 1)
2703 {
2704 current_block = source;
2705 change_stack (BB_END (source), &regstack, target_stack,
2706 (JUMP_P (BB_END (source)) ? EMIT_BEFORE : EMIT_AFTER));
2707 }
2708 else
2709 {
2710 rtx seq, after;
2711
2712 current_block = NULL;
2713 start_sequence ();
2714
2715 /* ??? change_stack needs some point to emit insns after. */
2716 after = emit_note (NOTE_INSN_DELETED);
2717
2718 change_stack (after, &regstack, target_stack, EMIT_BEFORE);
2719
2720 seq = get_insns ();
2721 end_sequence ();
2722
2723 insert_insn_on_edge (seq, e);
2724 return true;
2725 }
2726 return false;
2727 }
2728
2729 /* Traverse all non-entry edges in the CFG, and emit the necessary
2730 edge compensation code to change the stack from stack_out of the
2731 source block to the stack_in of the destination block. */
2732
2733 static bool
2734 compensate_edges (void)
2735 {
2736 bool inserted = false;
2737 basic_block bb;
2738
2739 starting_stack_p = false;
2740
2741 FOR_EACH_BB (bb)
2742 if (bb != ENTRY_BLOCK_PTR)
2743 {
2744 edge e;
2745 edge_iterator ei;
2746
2747 FOR_EACH_EDGE (e, ei, bb->succs)
2748 inserted |= compensate_edge (e);
2749 }
2750 return inserted;
2751 }
2752
2753 /* Select the better of two edges E1 and E2 to use to determine the
2754 stack layout for their shared destination basic block. This is
2755 typically the more frequently executed. The edge E1 may be NULL
2756 (in which case E2 is returned), but E2 is always non-NULL. */
2757
2758 static edge
2759 better_edge (edge e1, edge e2)
2760 {
2761 if (!e1)
2762 return e2;
2763
2764 if (EDGE_FREQUENCY (e1) > EDGE_FREQUENCY (e2))
2765 return e1;
2766 if (EDGE_FREQUENCY (e1) < EDGE_FREQUENCY (e2))
2767 return e2;
2768
2769 if (e1->count > e2->count)
2770 return e1;
2771 if (e1->count < e2->count)
2772 return e2;
2773
2774 /* Prefer critical edges to minimize inserting compensation code on
2775 critical edges. */
2776
2777 if (EDGE_CRITICAL_P (e1) != EDGE_CRITICAL_P (e2))
2778 return EDGE_CRITICAL_P (e1) ? e1 : e2;
2779
2780 /* Avoid non-deterministic behavior. */
2781 return (e1->src->index < e2->src->index) ? e1 : e2;
2782 }
2783
2784 /* Convert stack register references in one block. */
2785
2786 static void
2787 convert_regs_1 (basic_block block)
2788 {
2789 struct stack_def regstack;
2790 block_info bi = BLOCK_INFO (block);
2791 int reg;
2792 rtx insn, next;
2793 bool control_flow_insn_deleted = false;
2794
2795 any_malformed_asm = false;
2796
2797 /* Choose an initial stack layout, if one hasn't already been chosen. */
2798 if (bi->stack_in.top == -2)
2799 {
2800 edge e, beste = NULL;
2801 edge_iterator ei;
2802
2803 /* Select the best incoming edge (typically the most frequent) to
2804 use as a template for this basic block. */
2805 FOR_EACH_EDGE (e, ei, block->preds)
2806 if (BLOCK_INFO (e->src)->done)
2807 beste = better_edge (beste, e);
2808
2809 if (beste)
2810 propagate_stack (beste);
2811 else
2812 {
2813 /* No predecessors. Create an arbitrary input stack. */
2814 bi->stack_in.top = -1;
2815 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2816 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2817 bi->stack_in.reg[++bi->stack_in.top] = reg;
2818 }
2819 }
2820
2821 if (dump_file)
2822 {
2823 fprintf (dump_file, "\nBasic block %d\nInput stack: ", block->index);
2824 print_stack (dump_file, &bi->stack_in);
2825 }
2826
2827 /* Process all insns in this block. Keep track of NEXT so that we
2828 don't process insns emitted while substituting in INSN. */
2829 current_block = block;
2830 next = BB_HEAD (block);
2831 regstack = bi->stack_in;
2832 starting_stack_p = true;
2833
2834 do
2835 {
2836 insn = next;
2837 next = NEXT_INSN (insn);
2838
2839 /* Ensure we have not missed a block boundary. */
2840 gcc_assert (next);
2841 if (insn == BB_END (block))
2842 next = NULL;
2843
2844 /* Don't bother processing unless there is a stack reg
2845 mentioned or if it's a CALL_INSN. */
2846 if (stack_regs_mentioned (insn)
2847 || CALL_P (insn))
2848 {
2849 if (dump_file)
2850 {
2851 fprintf (dump_file, " insn %d input stack: ",
2852 INSN_UID (insn));
2853 print_stack (dump_file, &regstack);
2854 }
2855 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2856 starting_stack_p = false;
2857 }
2858 }
2859 while (next);
2860
2861 if (dump_file)
2862 {
2863 fprintf (dump_file, "Expected live registers [");
2864 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2865 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2866 fprintf (dump_file, " %d", reg);
2867 fprintf (dump_file, " ]\nOutput stack: ");
2868 print_stack (dump_file, &regstack);
2869 }
2870
2871 insn = BB_END (block);
2872 if (JUMP_P (insn))
2873 insn = PREV_INSN (insn);
2874
2875 /* If the function is declared to return a value, but it returns one
2876 in only some cases, some registers might come live here. Emit
2877 necessary moves for them. */
2878
2879 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2880 {
2881 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2882 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2883 {
2884 rtx set;
2885
2886 if (dump_file)
2887 fprintf (dump_file, "Emitting insn initializing reg %d\n", reg);
2888
2889 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2890 insn = emit_insn_after (set, insn);
2891 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2892 }
2893 }
2894
2895 /* Amongst the insns possibly deleted during the substitution process above,
2896 might have been the only trapping insn in the block. We purge the now
2897 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2898 called at the end of convert_regs. The order in which we process the
2899 blocks ensures that we never delete an already processed edge.
2900
2901 Note that, at this point, the CFG may have been damaged by the emission
2902 of instructions after an abnormal call, which moves the basic block end
2903 (and is the reason why we call fixup_abnormal_edges later). So we must
2904 be sure that the trapping insn has been deleted before trying to purge
2905 dead edges, otherwise we risk purging valid edges.
2906
2907 ??? We are normally supposed not to delete trapping insns, so we pretend
2908 that the insns deleted above don't actually trap. It would have been
2909 better to detect this earlier and avoid creating the EH edge in the first
2910 place, still, but we don't have enough information at that time. */
2911
2912 if (control_flow_insn_deleted)
2913 purge_dead_edges (block);
2914
2915 /* Something failed if the stack lives don't match. If we had malformed
2916 asms, we zapped the instruction itself, but that didn't produce the
2917 same pattern of register kills as before. */
2918 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2919 gcc_assert (any_malformed_asm);
2920 win:
2921 bi->stack_out = regstack;
2922 bi->done = true;
2923 }
2924
2925 /* Convert registers in all blocks reachable from BLOCK. */
2926
2927 static void
2928 convert_regs_2 (basic_block block)
2929 {
2930 basic_block *stack, *sp;
2931
2932 /* We process the blocks in a top-down manner, in a way such that one block
2933 is only processed after all its predecessors. The number of predecessors
2934 of every block has already been computed. */
2935
2936 stack = XNEWVEC (basic_block, n_basic_blocks);
2937 sp = stack;
2938
2939 *sp++ = block;
2940
2941 do
2942 {
2943 edge e;
2944 edge_iterator ei;
2945
2946 block = *--sp;
2947
2948 /* Processing BLOCK is achieved by convert_regs_1, which may purge
2949 some dead EH outgoing edge after the deletion of the trapping
2950 insn inside the block. Since the number of predecessors of
2951 BLOCK's successors was computed based on the initial edge set,
2952 we check the necessity to process some of these successors
2953 before such an edge deletion may happen. However, there is
2954 a pitfall: if BLOCK is the only predecessor of a successor and
2955 the edge between them happens to be deleted, the successor
2956 becomes unreachable and should not be processed. The problem
2957 is that there is no way to preventively detect this case so we
2958 stack the successor in all cases and hand over the task of
2959 fixing up the discrepancy to convert_regs_1. */
2960
2961 FOR_EACH_EDGE (e, ei, block->succs)
2962 if (! (e->flags & EDGE_DFS_BACK))
2963 {
2964 BLOCK_INFO (e->dest)->predecessors--;
2965 if (!BLOCK_INFO (e->dest)->predecessors)
2966 *sp++ = e->dest;
2967 }
2968
2969 convert_regs_1 (block);
2970 }
2971 while (sp != stack);
2972
2973 free (stack);
2974 }
2975
2976 /* Traverse all basic blocks in a function, converting the register
2977 references in each insn from the "flat" register file that gcc uses,
2978 to the stack-like registers the 387 uses. */
2979
2980 static void
2981 convert_regs (void)
2982 {
2983 int inserted;
2984 basic_block b;
2985 edge e;
2986 edge_iterator ei;
2987
2988 /* Initialize uninitialized registers on function entry. */
2989 inserted = convert_regs_entry ();
2990
2991 /* Construct the desired stack for function exit. */
2992 convert_regs_exit ();
2993 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2994
2995 /* ??? Future: process inner loops first, and give them arbitrary
2996 initial stacks which emit_swap_insn can modify. This ought to
2997 prevent double fxch that often appears at the head of a loop. */
2998
2999 /* Process all blocks reachable from all entry points. */
3000 FOR_EACH_EDGE (e, ei, ENTRY_BLOCK_PTR->succs)
3001 convert_regs_2 (e->dest);
3002
3003 /* ??? Process all unreachable blocks. Though there's no excuse
3004 for keeping these even when not optimizing. */
3005 FOR_EACH_BB (b)
3006 {
3007 block_info bi = BLOCK_INFO (b);
3008
3009 if (! bi->done)
3010 convert_regs_2 (b);
3011 }
3012
3013 inserted |= compensate_edges ();
3014
3015 clear_aux_for_blocks ();
3016
3017 fixup_abnormal_edges ();
3018 if (inserted)
3019 commit_edge_insertions ();
3020
3021 if (dump_file)
3022 fputc ('\n', dump_file);
3023 }
3024 \f
3025 /* Convert register usage from "flat" register file usage to a "stack
3026 register file. FILE is the dump file, if used.
3027
3028 Construct a CFG and run life analysis. Then convert each insn one
3029 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
3030 code duplication created when the converter inserts pop insns on
3031 the edges. */
3032
3033 static bool
3034 reg_to_stack (void)
3035 {
3036 basic_block bb;
3037 int i;
3038 int max_uid;
3039
3040 /* Clean up previous run. */
3041 if (stack_regs_mentioned_data != NULL)
3042 VEC_free (char, heap, stack_regs_mentioned_data);
3043
3044 /* See if there is something to do. Flow analysis is quite
3045 expensive so we might save some compilation time. */
3046 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3047 if (regs_ever_live[i])
3048 break;
3049 if (i > LAST_STACK_REG)
3050 return false;
3051
3052 /* Ok, floating point instructions exist. If not optimizing,
3053 build the CFG and run life analysis.
3054 Also need to rebuild life when superblock scheduling is done
3055 as it don't update liveness yet. */
3056 if (!optimize
3057 || ((flag_sched2_use_superblocks || flag_sched2_use_traces)
3058 && flag_schedule_insns_after_reload))
3059 {
3060 count_or_remove_death_notes (NULL, 1);
3061 life_analysis (PROP_DEATH_NOTES);
3062 }
3063 mark_dfs_back_edges ();
3064
3065 /* Set up block info for each basic block. */
3066 alloc_aux_for_blocks (sizeof (struct block_info_def));
3067 FOR_EACH_BB (bb)
3068 {
3069 block_info bi = BLOCK_INFO (bb);
3070 edge_iterator ei;
3071 edge e;
3072 int reg;
3073
3074 FOR_EACH_EDGE (e, ei, bb->preds)
3075 if (!(e->flags & EDGE_DFS_BACK)
3076 && e->src != ENTRY_BLOCK_PTR)
3077 bi->predecessors++;
3078
3079 /* Set current register status at last instruction `uninitialized'. */
3080 bi->stack_in.top = -2;
3081
3082 /* Copy live_at_end and live_at_start into temporaries. */
3083 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
3084 {
3085 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_end, reg))
3086 SET_HARD_REG_BIT (bi->out_reg_set, reg);
3087 if (REGNO_REG_SET_P (bb->il.rtl->global_live_at_start, reg))
3088 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
3089 }
3090 }
3091
3092 /* Create the replacement registers up front. */
3093 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
3094 {
3095 enum machine_mode mode;
3096 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
3097 mode != VOIDmode;
3098 mode = GET_MODE_WIDER_MODE (mode))
3099 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3100 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
3101 mode != VOIDmode;
3102 mode = GET_MODE_WIDER_MODE (mode))
3103 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
3104 }
3105
3106 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
3107
3108 /* A QNaN for initializing uninitialized variables.
3109
3110 ??? We can't load from constant memory in PIC mode, because
3111 we're inserting these instructions before the prologue and
3112 the PIC register hasn't been set up. In that case, fall back
3113 on zero, which we can get from `ldz'. */
3114
3115 if (flag_pic)
3116 not_a_num = CONST0_RTX (SFmode);
3117 else
3118 {
3119 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
3120 not_a_num = force_const_mem (SFmode, not_a_num);
3121 }
3122
3123 /* Allocate a cache for stack_regs_mentioned. */
3124 max_uid = get_max_uid ();
3125 stack_regs_mentioned_data = VEC_alloc (char, heap, max_uid + 1);
3126 memset (VEC_address (char, stack_regs_mentioned_data),
3127 0, sizeof (char) * max_uid + 1);
3128
3129 convert_regs ();
3130
3131 free_aux_for_blocks ();
3132 return true;
3133 }
3134 #endif /* STACK_REGS */
3135 \f
3136 static bool
3137 gate_handle_stack_regs (void)
3138 {
3139 #ifdef STACK_REGS
3140 return 1;
3141 #else
3142 return 0;
3143 #endif
3144 }
3145
3146 /* Convert register usage from flat register file usage to a stack
3147 register file. */
3148 static unsigned int
3149 rest_of_handle_stack_regs (void)
3150 {
3151 #ifdef STACK_REGS
3152 if (reg_to_stack () && optimize)
3153 {
3154 if (cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK
3155 | (flag_crossjumping ? CLEANUP_CROSSJUMP : 0))
3156 && (flag_reorder_blocks || flag_reorder_blocks_and_partition))
3157 {
3158 reorder_basic_blocks (0);
3159 cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_POST_REGSTACK);
3160 }
3161 }
3162 #endif
3163 return 0;
3164 }
3165
3166 struct tree_opt_pass pass_stack_regs =
3167 {
3168 "stack", /* name */
3169 gate_handle_stack_regs, /* gate */
3170 rest_of_handle_stack_regs, /* execute */
3171 NULL, /* sub */
3172 NULL, /* next */
3173 0, /* static_pass_number */
3174 TV_REG_STACK, /* tv_id */
3175 0, /* properties_required */
3176 0, /* properties_provided */
3177 0, /* properties_destroyed */
3178 0, /* todo_flags_start */
3179 TODO_dump_func |
3180 TODO_ggc_collect, /* todo_flags_finish */
3181 'k' /* letter */
3182 };