builtins.c (expand_builtin_mathfn): Handle BUILT_IN_RINT{,F,L} using rint_optab.
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
20 02111-1307, USA. */
21
22 /* This pass converts stack-like registers from the "flat register
23 file" model that gcc uses, to a stack convention that the 387 uses.
24
25 * The form of the input:
26
27 On input, the function consists of insn that have had their
28 registers fully allocated to a set of "virtual" registers. Note that
29 the word "virtual" is used differently here than elsewhere in gcc: for
30 each virtual stack reg, there is a hard reg, but the mapping between
31 them is not known until this pass is run. On output, hard register
32 numbers have been substituted, and various pop and exchange insns have
33 been emitted. The hard register numbers and the virtual register
34 numbers completely overlap - before this pass, all stack register
35 numbers are virtual, and afterward they are all hard.
36
37 The virtual registers can be manipulated normally by gcc, and their
38 semantics are the same as for normal registers. After the hard
39 register numbers are substituted, the semantics of an insn containing
40 stack-like regs are not the same as for an insn with normal regs: for
41 instance, it is not safe to delete an insn that appears to be a no-op
42 move. In general, no insn containing hard regs should be changed
43 after this pass is done.
44
45 * The form of the output:
46
47 After this pass, hard register numbers represent the distance from
48 the current top of stack to the desired register. A reference to
49 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
50 represents the register just below that, and so forth. Also, REG_DEAD
51 notes indicate whether or not a stack register should be popped.
52
53 A "swap" insn looks like a parallel of two patterns, where each
54 pattern is a SET: one sets A to B, the other B to A.
55
56 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
57 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
58 will replace the existing stack top, not push a new value.
59
60 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
61 SET_SRC is REG or MEM.
62
63 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
64 appears ambiguous. As a special case, the presence of a REG_DEAD note
65 for FIRST_STACK_REG differentiates between a load insn and a pop.
66
67 If a REG_DEAD is present, the insn represents a "pop" that discards
68 the top of the register stack. If there is no REG_DEAD note, then the
69 insn represents a "dup" or a push of the current top of stack onto the
70 stack.
71
72 * Methodology:
73
74 Existing REG_DEAD and REG_UNUSED notes for stack registers are
75 deleted and recreated from scratch. REG_DEAD is never created for a
76 SET_DEST, only REG_UNUSED.
77
78 * asm_operands:
79
80 There are several rules on the usage of stack-like regs in
81 asm_operands insns. These rules apply only to the operands that are
82 stack-like regs:
83
84 1. Given a set of input regs that die in an asm_operands, it is
85 necessary to know which are implicitly popped by the asm, and
86 which must be explicitly popped by gcc.
87
88 An input reg that is implicitly popped by the asm must be
89 explicitly clobbered, unless it is constrained to match an
90 output operand.
91
92 2. For any input reg that is implicitly popped by an asm, it is
93 necessary to know how to adjust the stack to compensate for the pop.
94 If any non-popped input is closer to the top of the reg-stack than
95 the implicitly popped reg, it would not be possible to know what the
96 stack looked like - it's not clear how the rest of the stack "slides
97 up".
98
99 All implicitly popped input regs must be closer to the top of
100 the reg-stack than any input that is not implicitly popped.
101
102 3. It is possible that if an input dies in an insn, reload might
103 use the input reg for an output reload. Consider this example:
104
105 asm ("foo" : "=t" (a) : "f" (b));
106
107 This asm says that input B is not popped by the asm, and that
108 the asm pushes a result onto the reg-stack, ie, the stack is one
109 deeper after the asm than it was before. But, it is possible that
110 reload will think that it can use the same reg for both the input and
111 the output, if input B dies in this insn.
112
113 If any input operand uses the "f" constraint, all output reg
114 constraints must use the "&" earlyclobber.
115
116 The asm above would be written as
117
118 asm ("foo" : "=&t" (a) : "f" (b));
119
120 4. Some operands need to be in particular places on the stack. All
121 output operands fall in this category - there is no other way to
122 know which regs the outputs appear in unless the user indicates
123 this in the constraints.
124
125 Output operands must specifically indicate which reg an output
126 appears in after an asm. "=f" is not allowed: the operand
127 constraints must select a class with a single reg.
128
129 5. Output operands may not be "inserted" between existing stack regs.
130 Since no 387 opcode uses a read/write operand, all output operands
131 are dead before the asm_operands, and are pushed by the asm_operands.
132 It makes no sense to push anywhere but the top of the reg-stack.
133
134 Output operands must start at the top of the reg-stack: output
135 operands may not "skip" a reg.
136
137 6. Some asm statements may need extra stack space for internal
138 calculations. This can be guaranteed by clobbering stack registers
139 unrelated to the inputs and outputs.
140
141 Here are a couple of reasonable asms to want to write. This asm
142 takes one input, which is internally popped, and produces two outputs.
143
144 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
145
146 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
147 and replaces them with one output. The user must code the "st(1)"
148 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
149
150 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
151
152 */
153 \f
154 #include "config.h"
155 #include "system.h"
156 #include "coretypes.h"
157 #include "tm.h"
158 #include "tree.h"
159 #include "rtl.h"
160 #include "tm_p.h"
161 #include "function.h"
162 #include "insn-config.h"
163 #include "regs.h"
164 #include "hard-reg-set.h"
165 #include "flags.h"
166 #include "toplev.h"
167 #include "recog.h"
168 #include "output.h"
169 #include "basic-block.h"
170 #include "varray.h"
171 #include "reload.h"
172 #include "ggc.h"
173
174 /* We use this array to cache info about insns, because otherwise we
175 spend too much time in stack_regs_mentioned_p.
176
177 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
178 the insn uses stack registers, two indicates the insn does not use
179 stack registers. */
180 static GTY(()) varray_type stack_regs_mentioned_data;
181
182 #ifdef STACK_REGS
183
184 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
185
186 /* This is the basic stack record. TOP is an index into REG[] such
187 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
188
189 If TOP is -2, REG[] is not yet initialized. Stack initialization
190 consists of placing each live reg in array `reg' and setting `top'
191 appropriately.
192
193 REG_SET indicates which registers are live. */
194
195 typedef struct stack_def
196 {
197 int top; /* index to top stack element */
198 HARD_REG_SET reg_set; /* set of live registers */
199 unsigned char reg[REG_STACK_SIZE];/* register - stack mapping */
200 } *stack;
201
202 /* This is used to carry information about basic blocks. It is
203 attached to the AUX field of the standard CFG block. */
204
205 typedef struct block_info_def
206 {
207 struct stack_def stack_in; /* Input stack configuration. */
208 struct stack_def stack_out; /* Output stack configuration. */
209 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
210 int done; /* True if block already converted. */
211 int predecessors; /* Number of predecessors that needs
212 to be visited. */
213 } *block_info;
214
215 #define BLOCK_INFO(B) ((block_info) (B)->aux)
216
217 /* Passed to change_stack to indicate where to emit insns. */
218 enum emit_where
219 {
220 EMIT_AFTER,
221 EMIT_BEFORE
222 };
223
224 /* The block we're currently working on. */
225 static basic_block current_block;
226
227 /* This is the register file for all register after conversion. */
228 static rtx
229 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
230
231 #define FP_MODE_REG(regno,mode) \
232 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int) (mode)])
233
234 /* Used to initialize uninitialized registers. */
235 static rtx not_a_num;
236
237 /* Forward declarations */
238
239 static int stack_regs_mentioned_p (rtx pat);
240 static void straighten_stack (rtx, stack);
241 static void pop_stack (stack, int);
242 static rtx *get_true_reg (rtx *);
243
244 static int check_asm_stack_operands (rtx);
245 static int get_asm_operand_n_inputs (rtx);
246 static rtx stack_result (tree);
247 static void replace_reg (rtx *, int);
248 static void remove_regno_note (rtx, enum reg_note, unsigned int);
249 static int get_hard_regnum (stack, rtx);
250 static rtx emit_pop_insn (rtx, stack, rtx, enum emit_where);
251 static void emit_swap_insn (rtx, stack, rtx);
252 static void swap_to_top(rtx, stack, rtx, rtx);
253 static bool move_for_stack_reg (rtx, stack, rtx);
254 static int swap_rtx_condition_1 (rtx);
255 static int swap_rtx_condition (rtx);
256 static void compare_for_stack_reg (rtx, stack, rtx);
257 static bool subst_stack_regs_pat (rtx, stack, rtx);
258 static void subst_asm_stack_regs (rtx, stack);
259 static bool subst_stack_regs (rtx, stack);
260 static void change_stack (rtx, stack, stack, enum emit_where);
261 static int convert_regs_entry (void);
262 static void convert_regs_exit (void);
263 static int convert_regs_1 (FILE *, basic_block);
264 static int convert_regs_2 (FILE *, basic_block);
265 static int convert_regs (FILE *);
266 static void print_stack (FILE *, stack);
267 static rtx next_flags_user (rtx);
268 static void record_label_references (rtx, rtx);
269 static bool compensate_edge (edge, FILE *);
270 \f
271 /* Return nonzero if any stack register is mentioned somewhere within PAT. */
272
273 static int
274 stack_regs_mentioned_p (rtx pat)
275 {
276 const char *fmt;
277 int i;
278
279 if (STACK_REG_P (pat))
280 return 1;
281
282 fmt = GET_RTX_FORMAT (GET_CODE (pat));
283 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
284 {
285 if (fmt[i] == 'E')
286 {
287 int j;
288
289 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
290 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
291 return 1;
292 }
293 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
294 return 1;
295 }
296
297 return 0;
298 }
299
300 /* Return nonzero if INSN mentions stacked registers, else return zero. */
301
302 int
303 stack_regs_mentioned (rtx insn)
304 {
305 unsigned int uid, max;
306 int test;
307
308 if (! INSN_P (insn) || !stack_regs_mentioned_data)
309 return 0;
310
311 uid = INSN_UID (insn);
312 max = VARRAY_SIZE (stack_regs_mentioned_data);
313 if (uid >= max)
314 {
315 /* Allocate some extra size to avoid too many reallocs, but
316 do not grow too quickly. */
317 max = uid + uid / 20;
318 VARRAY_GROW (stack_regs_mentioned_data, max);
319 }
320
321 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
322 if (test == 0)
323 {
324 /* This insn has yet to be examined. Do so now. */
325 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
326 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
327 }
328
329 return test == 1;
330 }
331 \f
332 static rtx ix86_flags_rtx;
333
334 static rtx
335 next_flags_user (rtx insn)
336 {
337 /* Search forward looking for the first use of this value.
338 Stop at block boundaries. */
339
340 while (insn != BB_END (current_block))
341 {
342 insn = NEXT_INSN (insn);
343
344 if (INSN_P (insn) && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
345 return insn;
346
347 if (CALL_P (insn))
348 return NULL_RTX;
349 }
350 return NULL_RTX;
351 }
352 \f
353 /* Reorganize the stack into ascending numbers,
354 after this insn. */
355
356 static void
357 straighten_stack (rtx insn, stack regstack)
358 {
359 struct stack_def temp_stack;
360 int top;
361
362 /* If there is only a single register on the stack, then the stack is
363 already in increasing order and no reorganization is needed.
364
365 Similarly if the stack is empty. */
366 if (regstack->top <= 0)
367 return;
368
369 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
370
371 for (top = temp_stack.top = regstack->top; top >= 0; top--)
372 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
373
374 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
375 }
376
377 /* Pop a register from the stack. */
378
379 static void
380 pop_stack (stack regstack, int regno)
381 {
382 int top = regstack->top;
383
384 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
385 regstack->top--;
386 /* If regno was not at the top of stack then adjust stack. */
387 if (regstack->reg [top] != regno)
388 {
389 int i;
390 for (i = regstack->top; i >= 0; i--)
391 if (regstack->reg [i] == regno)
392 {
393 int j;
394 for (j = i; j < top; j++)
395 regstack->reg [j] = regstack->reg [j + 1];
396 break;
397 }
398 }
399 }
400 \f
401 /* Convert register usage from "flat" register file usage to a "stack
402 register file. FILE is the dump file, if used.
403
404 Construct a CFG and run life analysis. Then convert each insn one
405 by one. Run a last cleanup_cfg pass, if optimizing, to eliminate
406 code duplication created when the converter inserts pop insns on
407 the edges. */
408
409 bool
410 reg_to_stack (FILE *file)
411 {
412 basic_block bb;
413 int i;
414 int max_uid;
415
416 /* Clean up previous run. */
417 stack_regs_mentioned_data = 0;
418
419 /* See if there is something to do. Flow analysis is quite
420 expensive so we might save some compilation time. */
421 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
422 if (regs_ever_live[i])
423 break;
424 if (i > LAST_STACK_REG)
425 return false;
426
427 /* Ok, floating point instructions exist. If not optimizing,
428 build the CFG and run life analysis.
429 Also need to rebuild life when superblock scheduling is done
430 as it don't update liveness yet. */
431 if (!optimize
432 || (flag_sched2_use_superblocks
433 && flag_schedule_insns_after_reload))
434 {
435 count_or_remove_death_notes (NULL, 1);
436 life_analysis (file, PROP_DEATH_NOTES);
437 }
438 mark_dfs_back_edges ();
439
440 /* Set up block info for each basic block. */
441 alloc_aux_for_blocks (sizeof (struct block_info_def));
442 FOR_EACH_BB_REVERSE (bb)
443 {
444 edge e;
445 for (e = bb->pred; e; e = e->pred_next)
446 if (!(e->flags & EDGE_DFS_BACK)
447 && e->src != ENTRY_BLOCK_PTR)
448 BLOCK_INFO (bb)->predecessors++;
449 }
450
451 /* Create the replacement registers up front. */
452 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
453 {
454 enum machine_mode mode;
455 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
456 mode != VOIDmode;
457 mode = GET_MODE_WIDER_MODE (mode))
458 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
459 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
460 mode != VOIDmode;
461 mode = GET_MODE_WIDER_MODE (mode))
462 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
463 }
464
465 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
466
467 /* A QNaN for initializing uninitialized variables.
468
469 ??? We can't load from constant memory in PIC mode, because
470 we're inserting these instructions before the prologue and
471 the PIC register hasn't been set up. In that case, fall back
472 on zero, which we can get from `ldz'. */
473
474 if (flag_pic)
475 not_a_num = CONST0_RTX (SFmode);
476 else
477 {
478 not_a_num = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
479 not_a_num = force_const_mem (SFmode, not_a_num);
480 }
481
482 /* Allocate a cache for stack_regs_mentioned. */
483 max_uid = get_max_uid ();
484 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
485 "stack_regs_mentioned cache");
486
487 convert_regs (file);
488
489 free_aux_for_blocks ();
490 return true;
491 }
492 \f
493 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
494 label's chain of references, and note which insn contains each
495 reference. */
496
497 static void
498 record_label_references (rtx insn, rtx pat)
499 {
500 enum rtx_code code = GET_CODE (pat);
501 int i;
502 const char *fmt;
503
504 if (code == LABEL_REF)
505 {
506 rtx label = XEXP (pat, 0);
507 rtx ref;
508
509 if (!LABEL_P (label))
510 abort ();
511
512 /* If this is an undefined label, LABEL_REFS (label) contains
513 garbage. */
514 if (INSN_UID (label) == 0)
515 return;
516
517 /* Don't make a duplicate in the code_label's chain. */
518
519 for (ref = LABEL_REFS (label);
520 ref && ref != label;
521 ref = LABEL_NEXTREF (ref))
522 if (CONTAINING_INSN (ref) == insn)
523 return;
524
525 CONTAINING_INSN (pat) = insn;
526 LABEL_NEXTREF (pat) = LABEL_REFS (label);
527 LABEL_REFS (label) = pat;
528
529 return;
530 }
531
532 fmt = GET_RTX_FORMAT (code);
533 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
534 {
535 if (fmt[i] == 'e')
536 record_label_references (insn, XEXP (pat, i));
537 if (fmt[i] == 'E')
538 {
539 int j;
540 for (j = 0; j < XVECLEN (pat, i); j++)
541 record_label_references (insn, XVECEXP (pat, i, j));
542 }
543 }
544 }
545 \f
546 /* Return a pointer to the REG expression within PAT. If PAT is not a
547 REG, possible enclosed by a conversion rtx, return the inner part of
548 PAT that stopped the search. */
549
550 static rtx *
551 get_true_reg (rtx *pat)
552 {
553 for (;;)
554 switch (GET_CODE (*pat))
555 {
556 case SUBREG:
557 /* Eliminate FP subregister accesses in favor of the
558 actual FP register in use. */
559 {
560 rtx subreg;
561 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
562 {
563 int regno_off = subreg_regno_offset (REGNO (subreg),
564 GET_MODE (subreg),
565 SUBREG_BYTE (*pat),
566 GET_MODE (*pat));
567 *pat = FP_MODE_REG (REGNO (subreg) + regno_off,
568 GET_MODE (subreg));
569 default:
570 return pat;
571 }
572 }
573 case FLOAT:
574 case FIX:
575 case FLOAT_EXTEND:
576 pat = & XEXP (*pat, 0);
577 break;
578
579 case FLOAT_TRUNCATE:
580 if (!flag_unsafe_math_optimizations)
581 return pat;
582 pat = & XEXP (*pat, 0);
583 break;
584 }
585 }
586 \f
587 /* Set if we find any malformed asms in a block. */
588 static bool any_malformed_asm;
589
590 /* There are many rules that an asm statement for stack-like regs must
591 follow. Those rules are explained at the top of this file: the rule
592 numbers below refer to that explanation. */
593
594 static int
595 check_asm_stack_operands (rtx insn)
596 {
597 int i;
598 int n_clobbers;
599 int malformed_asm = 0;
600 rtx body = PATTERN (insn);
601
602 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
603 char implicitly_dies[FIRST_PSEUDO_REGISTER];
604 int alt;
605
606 rtx *clobber_reg = 0;
607 int n_inputs, n_outputs;
608
609 /* Find out what the constraints require. If no constraint
610 alternative matches, this asm is malformed. */
611 extract_insn (insn);
612 constrain_operands (1);
613 alt = which_alternative;
614
615 preprocess_constraints ();
616
617 n_inputs = get_asm_operand_n_inputs (body);
618 n_outputs = recog_data.n_operands - n_inputs;
619
620 if (alt < 0)
621 {
622 malformed_asm = 1;
623 /* Avoid further trouble with this insn. */
624 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
625 return 0;
626 }
627
628 /* Strip SUBREGs here to make the following code simpler. */
629 for (i = 0; i < recog_data.n_operands; i++)
630 if (GET_CODE (recog_data.operand[i]) == SUBREG
631 && REG_P (SUBREG_REG (recog_data.operand[i])))
632 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
633
634 /* Set up CLOBBER_REG. */
635
636 n_clobbers = 0;
637
638 if (GET_CODE (body) == PARALLEL)
639 {
640 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
641
642 for (i = 0; i < XVECLEN (body, 0); i++)
643 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
644 {
645 rtx clobber = XVECEXP (body, 0, i);
646 rtx reg = XEXP (clobber, 0);
647
648 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
649 reg = SUBREG_REG (reg);
650
651 if (STACK_REG_P (reg))
652 {
653 clobber_reg[n_clobbers] = reg;
654 n_clobbers++;
655 }
656 }
657 }
658
659 /* Enforce rule #4: Output operands must specifically indicate which
660 reg an output appears in after an asm. "=f" is not allowed: the
661 operand constraints must select a class with a single reg.
662
663 Also enforce rule #5: Output operands must start at the top of
664 the reg-stack: output operands may not "skip" a reg. */
665
666 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
667 for (i = 0; i < n_outputs; i++)
668 if (STACK_REG_P (recog_data.operand[i]))
669 {
670 if (reg_class_size[(int) recog_op_alt[i][alt].cl] != 1)
671 {
672 error_for_asm (insn, "output constraint %d must specify a single register", i);
673 malformed_asm = 1;
674 }
675 else
676 {
677 int j;
678
679 for (j = 0; j < n_clobbers; j++)
680 if (REGNO (recog_data.operand[i]) == REGNO (clobber_reg[j]))
681 {
682 error_for_asm (insn, "output constraint %d cannot be specified together with \"%s\" clobber",
683 i, reg_names [REGNO (clobber_reg[j])]);
684 malformed_asm = 1;
685 break;
686 }
687 if (j == n_clobbers)
688 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
689 }
690 }
691
692
693 /* Search for first non-popped reg. */
694 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
695 if (! reg_used_as_output[i])
696 break;
697
698 /* If there are any other popped regs, that's an error. */
699 for (; i < LAST_STACK_REG + 1; i++)
700 if (reg_used_as_output[i])
701 break;
702
703 if (i != LAST_STACK_REG + 1)
704 {
705 error_for_asm (insn, "output regs must be grouped at top of stack");
706 malformed_asm = 1;
707 }
708
709 /* Enforce rule #2: All implicitly popped input regs must be closer
710 to the top of the reg-stack than any input that is not implicitly
711 popped. */
712
713 memset (implicitly_dies, 0, sizeof (implicitly_dies));
714 for (i = n_outputs; i < n_outputs + n_inputs; i++)
715 if (STACK_REG_P (recog_data.operand[i]))
716 {
717 /* An input reg is implicitly popped if it is tied to an
718 output, or if there is a CLOBBER for it. */
719 int j;
720
721 for (j = 0; j < n_clobbers; j++)
722 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
723 break;
724
725 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
726 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
727 }
728
729 /* Search for first non-popped reg. */
730 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
731 if (! implicitly_dies[i])
732 break;
733
734 /* If there are any other popped regs, that's an error. */
735 for (; i < LAST_STACK_REG + 1; i++)
736 if (implicitly_dies[i])
737 break;
738
739 if (i != LAST_STACK_REG + 1)
740 {
741 error_for_asm (insn,
742 "implicitly popped regs must be grouped at top of stack");
743 malformed_asm = 1;
744 }
745
746 /* Enforce rule #3: If any input operand uses the "f" constraint, all
747 output constraints must use the "&" earlyclobber.
748
749 ??? Detect this more deterministically by having constrain_asm_operands
750 record any earlyclobber. */
751
752 for (i = n_outputs; i < n_outputs + n_inputs; i++)
753 if (recog_op_alt[i][alt].matches == -1)
754 {
755 int j;
756
757 for (j = 0; j < n_outputs; j++)
758 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
759 {
760 error_for_asm (insn,
761 "output operand %d must use `&' constraint", j);
762 malformed_asm = 1;
763 }
764 }
765
766 if (malformed_asm)
767 {
768 /* Avoid further trouble with this insn. */
769 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
770 any_malformed_asm = true;
771 return 0;
772 }
773
774 return 1;
775 }
776 \f
777 /* Calculate the number of inputs and outputs in BODY, an
778 asm_operands. N_OPERANDS is the total number of operands, and
779 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
780 placed. */
781
782 static int
783 get_asm_operand_n_inputs (rtx body)
784 {
785 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
786 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
787
788 else if (GET_CODE (body) == ASM_OPERANDS)
789 return ASM_OPERANDS_INPUT_LENGTH (body);
790
791 else if (GET_CODE (body) == PARALLEL
792 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
793 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
794
795 else if (GET_CODE (body) == PARALLEL
796 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
797 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
798
799 abort ();
800 }
801
802 /* If current function returns its result in an fp stack register,
803 return the REG. Otherwise, return 0. */
804
805 static rtx
806 stack_result (tree decl)
807 {
808 rtx result;
809
810 /* If the value is supposed to be returned in memory, then clearly
811 it is not returned in a stack register. */
812 if (aggregate_value_p (DECL_RESULT (decl), decl))
813 return 0;
814
815 result = DECL_RTL_IF_SET (DECL_RESULT (decl));
816 if (result != 0)
817 {
818 #ifdef FUNCTION_OUTGOING_VALUE
819 result
820 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
821 #else
822 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
823 #endif
824 }
825
826 return result != 0 && STACK_REG_P (result) ? result : 0;
827 }
828 \f
829
830 /*
831 * This section deals with stack register substitution, and forms the second
832 * pass over the RTL.
833 */
834
835 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
836 the desired hard REGNO. */
837
838 static void
839 replace_reg (rtx *reg, int regno)
840 {
841 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
842 || ! STACK_REG_P (*reg))
843 abort ();
844
845 switch (GET_MODE_CLASS (GET_MODE (*reg)))
846 {
847 default: abort ();
848 case MODE_FLOAT:
849 case MODE_COMPLEX_FLOAT:;
850 }
851
852 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
853 }
854
855 /* Remove a note of type NOTE, which must be found, for register
856 number REGNO from INSN. Remove only one such note. */
857
858 static void
859 remove_regno_note (rtx insn, enum reg_note note, unsigned int regno)
860 {
861 rtx *note_link, this;
862
863 note_link = &REG_NOTES (insn);
864 for (this = *note_link; this; this = XEXP (this, 1))
865 if (REG_NOTE_KIND (this) == note
866 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
867 {
868 *note_link = XEXP (this, 1);
869 return;
870 }
871 else
872 note_link = &XEXP (this, 1);
873
874 abort ();
875 }
876
877 /* Find the hard register number of virtual register REG in REGSTACK.
878 The hard register number is relative to the top of the stack. -1 is
879 returned if the register is not found. */
880
881 static int
882 get_hard_regnum (stack regstack, rtx reg)
883 {
884 int i;
885
886 if (! STACK_REG_P (reg))
887 abort ();
888
889 for (i = regstack->top; i >= 0; i--)
890 if (regstack->reg[i] == REGNO (reg))
891 break;
892
893 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
894 }
895 \f
896 /* Emit an insn to pop virtual register REG before or after INSN.
897 REGSTACK is the stack state after INSN and is updated to reflect this
898 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
899 is represented as a SET whose destination is the register to be popped
900 and source is the top of stack. A death note for the top of stack
901 cases the movdf pattern to pop. */
902
903 static rtx
904 emit_pop_insn (rtx insn, stack regstack, rtx reg, enum emit_where where)
905 {
906 rtx pop_insn, pop_rtx;
907 int hard_regno;
908
909 /* For complex types take care to pop both halves. These may survive in
910 CLOBBER and USE expressions. */
911 if (COMPLEX_MODE_P (GET_MODE (reg)))
912 {
913 rtx reg1 = FP_MODE_REG (REGNO (reg), DFmode);
914 rtx reg2 = FP_MODE_REG (REGNO (reg) + 1, DFmode);
915
916 pop_insn = NULL_RTX;
917 if (get_hard_regnum (regstack, reg1) >= 0)
918 pop_insn = emit_pop_insn (insn, regstack, reg1, where);
919 if (get_hard_regnum (regstack, reg2) >= 0)
920 pop_insn = emit_pop_insn (insn, regstack, reg2, where);
921 if (!pop_insn)
922 abort ();
923 return pop_insn;
924 }
925
926 hard_regno = get_hard_regnum (regstack, reg);
927
928 if (hard_regno < FIRST_STACK_REG)
929 abort ();
930
931 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
932 FP_MODE_REG (FIRST_STACK_REG, DFmode));
933
934 if (where == EMIT_AFTER)
935 pop_insn = emit_insn_after (pop_rtx, insn);
936 else
937 pop_insn = emit_insn_before (pop_rtx, insn);
938
939 REG_NOTES (pop_insn)
940 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
941 REG_NOTES (pop_insn));
942
943 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
944 = regstack->reg[regstack->top];
945 regstack->top -= 1;
946 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
947
948 return pop_insn;
949 }
950 \f
951 /* Emit an insn before or after INSN to swap virtual register REG with
952 the top of stack. REGSTACK is the stack state before the swap, and
953 is updated to reflect the swap. A swap insn is represented as a
954 PARALLEL of two patterns: each pattern moves one reg to the other.
955
956 If REG is already at the top of the stack, no insn is emitted. */
957
958 static void
959 emit_swap_insn (rtx insn, stack regstack, rtx reg)
960 {
961 int hard_regno;
962 rtx swap_rtx;
963 int tmp, other_reg; /* swap regno temps */
964 rtx i1; /* the stack-reg insn prior to INSN */
965 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
966
967 hard_regno = get_hard_regnum (regstack, reg);
968
969 if (hard_regno < FIRST_STACK_REG)
970 abort ();
971 if (hard_regno == FIRST_STACK_REG)
972 return;
973
974 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
975
976 tmp = regstack->reg[other_reg];
977 regstack->reg[other_reg] = regstack->reg[regstack->top];
978 regstack->reg[regstack->top] = tmp;
979
980 /* Find the previous insn involving stack regs, but don't pass a
981 block boundary. */
982 i1 = NULL;
983 if (current_block && insn != BB_HEAD (current_block))
984 {
985 rtx tmp = PREV_INSN (insn);
986 rtx limit = PREV_INSN (BB_HEAD (current_block));
987 while (tmp != limit)
988 {
989 if (LABEL_P (tmp)
990 || CALL_P (tmp)
991 || NOTE_INSN_BASIC_BLOCK_P (tmp)
992 || (NOTE_P (tmp)
993 && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_UNLIKELY_EXECUTED_CODE)
994 || (NONJUMP_INSN_P (tmp)
995 && stack_regs_mentioned (tmp)))
996 {
997 i1 = tmp;
998 break;
999 }
1000 tmp = PREV_INSN (tmp);
1001 }
1002 }
1003
1004 if (i1 != NULL_RTX
1005 && (i1set = single_set (i1)) != NULL_RTX)
1006 {
1007 rtx i1src = *get_true_reg (&SET_SRC (i1set));
1008 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
1009
1010 /* If the previous register stack push was from the reg we are to
1011 swap with, omit the swap. */
1012
1013 if (REG_P (i1dest) && REGNO (i1dest) == FIRST_STACK_REG
1014 && REG_P (i1src)
1015 && REGNO (i1src) == (unsigned) hard_regno - 1
1016 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1017 return;
1018
1019 /* If the previous insn wrote to the reg we are to swap with,
1020 omit the swap. */
1021
1022 if (REG_P (i1dest) && REGNO (i1dest) == (unsigned) hard_regno
1023 && REG_P (i1src) && REGNO (i1src) == FIRST_STACK_REG
1024 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1025 return;
1026 }
1027
1028 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1029 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1030
1031 if (i1)
1032 emit_insn_after (swap_rtx, i1);
1033 else if (current_block)
1034 emit_insn_before (swap_rtx, BB_HEAD (current_block));
1035 else
1036 emit_insn_before (swap_rtx, insn);
1037 }
1038 \f
1039 /* Emit an insns before INSN to swap virtual register SRC1 with
1040 the top of stack and virtual register SRC2 with second stack
1041 slot. REGSTACK is the stack state before the swaps, and
1042 is updated to reflect the swaps. A swap insn is represented as a
1043 PARALLEL of two patterns: each pattern moves one reg to the other.
1044
1045 If SRC1 and/or SRC2 are already at the right place, no swap insn
1046 is emitted. */
1047
1048 static void
1049 swap_to_top (rtx insn, stack regstack, rtx src1, rtx src2)
1050 {
1051 struct stack_def temp_stack;
1052 int regno, j, k, temp;
1053
1054 temp_stack = *regstack;
1055
1056 /* Place operand 1 at the top of stack. */
1057 regno = get_hard_regnum (&temp_stack, src1);
1058 if (regno < 0)
1059 abort ();
1060 if (regno != FIRST_STACK_REG)
1061 {
1062 k = temp_stack.top - (regno - FIRST_STACK_REG);
1063 j = temp_stack.top;
1064
1065 temp = temp_stack.reg[k];
1066 temp_stack.reg[k] = temp_stack.reg[j];
1067 temp_stack.reg[j] = temp;
1068 }
1069
1070 /* Place operand 2 next on the stack. */
1071 regno = get_hard_regnum (&temp_stack, src2);
1072 if (regno < 0)
1073 abort ();
1074 if (regno != FIRST_STACK_REG + 1)
1075 {
1076 k = temp_stack.top - (regno - FIRST_STACK_REG);
1077 j = temp_stack.top - 1;
1078
1079 temp = temp_stack.reg[k];
1080 temp_stack.reg[k] = temp_stack.reg[j];
1081 temp_stack.reg[j] = temp;
1082 }
1083
1084 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1085 }
1086 \f
1087 /* Handle a move to or from a stack register in PAT, which is in INSN.
1088 REGSTACK is the current stack. Return whether a control flow insn
1089 was deleted in the process. */
1090
1091 static bool
1092 move_for_stack_reg (rtx insn, stack regstack, rtx pat)
1093 {
1094 rtx *psrc = get_true_reg (&SET_SRC (pat));
1095 rtx *pdest = get_true_reg (&SET_DEST (pat));
1096 rtx src, dest;
1097 rtx note;
1098 bool control_flow_insn_deleted = false;
1099
1100 src = *psrc; dest = *pdest;
1101
1102 if (STACK_REG_P (src) && STACK_REG_P (dest))
1103 {
1104 /* Write from one stack reg to another. If SRC dies here, then
1105 just change the register mapping and delete the insn. */
1106
1107 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1108 if (note)
1109 {
1110 int i;
1111
1112 /* If this is a no-op move, there must not be a REG_DEAD note. */
1113 if (REGNO (src) == REGNO (dest))
1114 abort ();
1115
1116 for (i = regstack->top; i >= 0; i--)
1117 if (regstack->reg[i] == REGNO (src))
1118 break;
1119
1120 /* The source must be live, and the dest must be dead. */
1121 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1122 abort ();
1123
1124 /* It is possible that the dest is unused after this insn.
1125 If so, just pop the src. */
1126
1127 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1128 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1129 else
1130 {
1131 regstack->reg[i] = REGNO (dest);
1132 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1133 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1134 }
1135
1136 control_flow_insn_deleted |= control_flow_insn_p (insn);
1137 delete_insn (insn);
1138 return control_flow_insn_deleted;
1139 }
1140
1141 /* The source reg does not die. */
1142
1143 /* If this appears to be a no-op move, delete it, or else it
1144 will confuse the machine description output patterns. But if
1145 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1146 for REG_UNUSED will not work for deleted insns. */
1147
1148 if (REGNO (src) == REGNO (dest))
1149 {
1150 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1151 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1152
1153 control_flow_insn_deleted |= control_flow_insn_p (insn);
1154 delete_insn (insn);
1155 return control_flow_insn_deleted;
1156 }
1157
1158 /* The destination ought to be dead. */
1159 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1160 abort ();
1161
1162 replace_reg (psrc, get_hard_regnum (regstack, src));
1163
1164 regstack->reg[++regstack->top] = REGNO (dest);
1165 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1166 replace_reg (pdest, FIRST_STACK_REG);
1167 }
1168 else if (STACK_REG_P (src))
1169 {
1170 /* Save from a stack reg to MEM, or possibly integer reg. Since
1171 only top of stack may be saved, emit an exchange first if
1172 needs be. */
1173
1174 emit_swap_insn (insn, regstack, src);
1175
1176 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1177 if (note)
1178 {
1179 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1180 regstack->top--;
1181 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1182 }
1183 else if ((GET_MODE (src) == XFmode)
1184 && regstack->top < REG_STACK_SIZE - 1)
1185 {
1186 /* A 387 cannot write an XFmode value to a MEM without
1187 clobbering the source reg. The output code can handle
1188 this by reading back the value from the MEM.
1189 But it is more efficient to use a temp register if one is
1190 available. Push the source value here if the register
1191 stack is not full, and then write the value to memory via
1192 a pop. */
1193 rtx push_rtx, push_insn;
1194 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, GET_MODE (src));
1195
1196 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1197 push_insn = emit_insn_before (push_rtx, insn);
1198 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1199 REG_NOTES (insn));
1200 }
1201
1202 replace_reg (psrc, FIRST_STACK_REG);
1203 }
1204 else if (STACK_REG_P (dest))
1205 {
1206 /* Load from MEM, or possibly integer REG or constant, into the
1207 stack regs. The actual target is always the top of the
1208 stack. The stack mapping is changed to reflect that DEST is
1209 now at top of stack. */
1210
1211 /* The destination ought to be dead. */
1212 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1213 abort ();
1214
1215 if (regstack->top >= REG_STACK_SIZE)
1216 abort ();
1217
1218 regstack->reg[++regstack->top] = REGNO (dest);
1219 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1220 replace_reg (pdest, FIRST_STACK_REG);
1221 }
1222 else
1223 abort ();
1224
1225 return control_flow_insn_deleted;
1226 }
1227 \f
1228 /* Swap the condition on a branch, if there is one. Return true if we
1229 found a condition to swap. False if the condition was not used as
1230 such. */
1231
1232 static int
1233 swap_rtx_condition_1 (rtx pat)
1234 {
1235 const char *fmt;
1236 int i, r = 0;
1237
1238 if (COMPARISON_P (pat))
1239 {
1240 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1241 r = 1;
1242 }
1243 else
1244 {
1245 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1246 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1247 {
1248 if (fmt[i] == 'E')
1249 {
1250 int j;
1251
1252 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1253 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1254 }
1255 else if (fmt[i] == 'e')
1256 r |= swap_rtx_condition_1 (XEXP (pat, i));
1257 }
1258 }
1259
1260 return r;
1261 }
1262
1263 static int
1264 swap_rtx_condition (rtx insn)
1265 {
1266 rtx pat = PATTERN (insn);
1267
1268 /* We're looking for a single set to cc0 or an HImode temporary. */
1269
1270 if (GET_CODE (pat) == SET
1271 && REG_P (SET_DEST (pat))
1272 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1273 {
1274 insn = next_flags_user (insn);
1275 if (insn == NULL_RTX)
1276 return 0;
1277 pat = PATTERN (insn);
1278 }
1279
1280 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1281 not doing anything with the cc value right now. We may be able to
1282 search for one though. */
1283
1284 if (GET_CODE (pat) == SET
1285 && GET_CODE (SET_SRC (pat)) == UNSPEC
1286 && XINT (SET_SRC (pat), 1) == UNSPEC_FNSTSW)
1287 {
1288 rtx dest = SET_DEST (pat);
1289
1290 /* Search forward looking for the first use of this value.
1291 Stop at block boundaries. */
1292 while (insn != BB_END (current_block))
1293 {
1294 insn = NEXT_INSN (insn);
1295 if (INSN_P (insn) && reg_mentioned_p (dest, insn))
1296 break;
1297 if (CALL_P (insn))
1298 return 0;
1299 }
1300
1301 /* So we've found the insn using this value. If it is anything
1302 other than sahf, aka unspec 10, or the value does not die
1303 (meaning we'd have to search further), then we must give up. */
1304 pat = PATTERN (insn);
1305 if (GET_CODE (pat) != SET
1306 || GET_CODE (SET_SRC (pat)) != UNSPEC
1307 || XINT (SET_SRC (pat), 1) != UNSPEC_SAHF
1308 || ! dead_or_set_p (insn, dest))
1309 return 0;
1310
1311 /* Now we are prepared to handle this as a normal cc0 setter. */
1312 insn = next_flags_user (insn);
1313 if (insn == NULL_RTX)
1314 return 0;
1315 pat = PATTERN (insn);
1316 }
1317
1318 if (swap_rtx_condition_1 (pat))
1319 {
1320 int fail = 0;
1321 INSN_CODE (insn) = -1;
1322 if (recog_memoized (insn) == -1)
1323 fail = 1;
1324 /* In case the flags don't die here, recurse to try fix
1325 following user too. */
1326 else if (! dead_or_set_p (insn, ix86_flags_rtx))
1327 {
1328 insn = next_flags_user (insn);
1329 if (!insn || !swap_rtx_condition (insn))
1330 fail = 1;
1331 }
1332 if (fail)
1333 {
1334 swap_rtx_condition_1 (pat);
1335 return 0;
1336 }
1337 return 1;
1338 }
1339 return 0;
1340 }
1341
1342 /* Handle a comparison. Special care needs to be taken to avoid
1343 causing comparisons that a 387 cannot do correctly, such as EQ.
1344
1345 Also, a pop insn may need to be emitted. The 387 does have an
1346 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1347 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1348 set up. */
1349
1350 static void
1351 compare_for_stack_reg (rtx insn, stack regstack, rtx pat_src)
1352 {
1353 rtx *src1, *src2;
1354 rtx src1_note, src2_note;
1355 rtx flags_user;
1356
1357 src1 = get_true_reg (&XEXP (pat_src, 0));
1358 src2 = get_true_reg (&XEXP (pat_src, 1));
1359 flags_user = next_flags_user (insn);
1360
1361 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1362 registers that die in this insn - move those to stack top first. */
1363 if ((! STACK_REG_P (*src1)
1364 || (STACK_REG_P (*src2)
1365 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1366 && swap_rtx_condition (insn))
1367 {
1368 rtx temp;
1369 temp = XEXP (pat_src, 0);
1370 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1371 XEXP (pat_src, 1) = temp;
1372
1373 src1 = get_true_reg (&XEXP (pat_src, 0));
1374 src2 = get_true_reg (&XEXP (pat_src, 1));
1375
1376 INSN_CODE (insn) = -1;
1377 }
1378
1379 /* We will fix any death note later. */
1380
1381 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1382
1383 if (STACK_REG_P (*src2))
1384 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1385 else
1386 src2_note = NULL_RTX;
1387
1388 emit_swap_insn (insn, regstack, *src1);
1389
1390 replace_reg (src1, FIRST_STACK_REG);
1391
1392 if (STACK_REG_P (*src2))
1393 replace_reg (src2, get_hard_regnum (regstack, *src2));
1394
1395 if (src1_note)
1396 {
1397 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1398 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1399 }
1400
1401 /* If the second operand dies, handle that. But if the operands are
1402 the same stack register, don't bother, because only one death is
1403 needed, and it was just handled. */
1404
1405 if (src2_note
1406 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1407 && REGNO (*src1) == REGNO (*src2)))
1408 {
1409 /* As a special case, two regs may die in this insn if src2 is
1410 next to top of stack and the top of stack also dies. Since
1411 we have already popped src1, "next to top of stack" is really
1412 at top (FIRST_STACK_REG) now. */
1413
1414 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1415 && src1_note)
1416 {
1417 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1418 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1419 }
1420 else
1421 {
1422 /* The 386 can only represent death of the first operand in
1423 the case handled above. In all other cases, emit a separate
1424 pop and remove the death note from here. */
1425
1426 /* link_cc0_insns (insn); */
1427
1428 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1429
1430 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1431 EMIT_AFTER);
1432 }
1433 }
1434 }
1435 \f
1436 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1437 is the current register layout. Return whether a control flow insn
1438 was deleted in the process. */
1439
1440 static bool
1441 subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
1442 {
1443 rtx *dest, *src;
1444 bool control_flow_insn_deleted = false;
1445
1446 switch (GET_CODE (pat))
1447 {
1448 case USE:
1449 /* Deaths in USE insns can happen in non optimizing compilation.
1450 Handle them by popping the dying register. */
1451 src = get_true_reg (&XEXP (pat, 0));
1452 if (STACK_REG_P (*src)
1453 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1454 {
1455 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1456 return control_flow_insn_deleted;
1457 }
1458 /* ??? Uninitialized USE should not happen. */
1459 else if (get_hard_regnum (regstack, *src) == -1)
1460 abort ();
1461 break;
1462
1463 case CLOBBER:
1464 {
1465 rtx note;
1466
1467 dest = get_true_reg (&XEXP (pat, 0));
1468 if (STACK_REG_P (*dest))
1469 {
1470 note = find_reg_note (insn, REG_DEAD, *dest);
1471
1472 if (pat != PATTERN (insn))
1473 {
1474 /* The fix_truncdi_1 pattern wants to be able to allocate
1475 it's own scratch register. It does this by clobbering
1476 an fp reg so that it is assured of an empty reg-stack
1477 register. If the register is live, kill it now.
1478 Remove the DEAD/UNUSED note so we don't try to kill it
1479 later too. */
1480
1481 if (note)
1482 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1483 else
1484 {
1485 note = find_reg_note (insn, REG_UNUSED, *dest);
1486 if (!note)
1487 abort ();
1488 }
1489 remove_note (insn, note);
1490 replace_reg (dest, FIRST_STACK_REG + 1);
1491 }
1492 else
1493 {
1494 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1495 indicates an uninitialized value. Because reload removed
1496 all other clobbers, this must be due to a function
1497 returning without a value. Load up a NaN. */
1498
1499 if (! note
1500 && get_hard_regnum (regstack, *dest) == -1)
1501 {
1502 pat = gen_rtx_SET (VOIDmode,
1503 FP_MODE_REG (REGNO (*dest), SFmode),
1504 not_a_num);
1505 PATTERN (insn) = pat;
1506 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1507 }
1508 if (! note && COMPLEX_MODE_P (GET_MODE (*dest))
1509 && get_hard_regnum (regstack, FP_MODE_REG (REGNO (*dest), DFmode)) == -1)
1510 {
1511 pat = gen_rtx_SET (VOIDmode,
1512 FP_MODE_REG (REGNO (*dest) + 1, SFmode),
1513 not_a_num);
1514 PATTERN (insn) = pat;
1515 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1516 }
1517 }
1518 }
1519 break;
1520 }
1521
1522 case SET:
1523 {
1524 rtx *src1 = (rtx *) 0, *src2;
1525 rtx src1_note, src2_note;
1526 rtx pat_src;
1527
1528 dest = get_true_reg (&SET_DEST (pat));
1529 src = get_true_reg (&SET_SRC (pat));
1530 pat_src = SET_SRC (pat);
1531
1532 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1533 if (STACK_REG_P (*src)
1534 || (STACK_REG_P (*dest)
1535 && (REG_P (*src) || MEM_P (*src)
1536 || GET_CODE (*src) == CONST_DOUBLE)))
1537 {
1538 control_flow_insn_deleted |= move_for_stack_reg (insn, regstack, pat);
1539 break;
1540 }
1541
1542 switch (GET_CODE (pat_src))
1543 {
1544 case COMPARE:
1545 compare_for_stack_reg (insn, regstack, pat_src);
1546 break;
1547
1548 case CALL:
1549 {
1550 int count;
1551 for (count = hard_regno_nregs[REGNO (*dest)][GET_MODE (*dest)];
1552 --count >= 0;)
1553 {
1554 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1555 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1556 }
1557 }
1558 replace_reg (dest, FIRST_STACK_REG);
1559 break;
1560
1561 case REG:
1562 /* This is a `tstM2' case. */
1563 if (*dest != cc0_rtx)
1564 abort ();
1565 src1 = src;
1566
1567 /* Fall through. */
1568
1569 case FLOAT_TRUNCATE:
1570 case SQRT:
1571 case ABS:
1572 case NEG:
1573 /* These insns only operate on the top of the stack. DEST might
1574 be cc0_rtx if we're processing a tstM pattern. Also, it's
1575 possible that the tstM case results in a REG_DEAD note on the
1576 source. */
1577
1578 if (src1 == 0)
1579 src1 = get_true_reg (&XEXP (pat_src, 0));
1580
1581 emit_swap_insn (insn, regstack, *src1);
1582
1583 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1584
1585 if (STACK_REG_P (*dest))
1586 replace_reg (dest, FIRST_STACK_REG);
1587
1588 if (src1_note)
1589 {
1590 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1591 regstack->top--;
1592 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1593 }
1594
1595 replace_reg (src1, FIRST_STACK_REG);
1596 break;
1597
1598 case MINUS:
1599 case DIV:
1600 /* On i386, reversed forms of subM3 and divM3 exist for
1601 MODE_FLOAT, so the same code that works for addM3 and mulM3
1602 can be used. */
1603 case MULT:
1604 case PLUS:
1605 /* These insns can accept the top of stack as a destination
1606 from a stack reg or mem, or can use the top of stack as a
1607 source and some other stack register (possibly top of stack)
1608 as a destination. */
1609
1610 src1 = get_true_reg (&XEXP (pat_src, 0));
1611 src2 = get_true_reg (&XEXP (pat_src, 1));
1612
1613 /* We will fix any death note later. */
1614
1615 if (STACK_REG_P (*src1))
1616 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1617 else
1618 src1_note = NULL_RTX;
1619 if (STACK_REG_P (*src2))
1620 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1621 else
1622 src2_note = NULL_RTX;
1623
1624 /* If either operand is not a stack register, then the dest
1625 must be top of stack. */
1626
1627 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1628 emit_swap_insn (insn, regstack, *dest);
1629 else
1630 {
1631 /* Both operands are REG. If neither operand is already
1632 at the top of stack, choose to make the one that is the dest
1633 the new top of stack. */
1634
1635 int src1_hard_regnum, src2_hard_regnum;
1636
1637 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1638 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1639 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1640 abort ();
1641
1642 if (src1_hard_regnum != FIRST_STACK_REG
1643 && src2_hard_regnum != FIRST_STACK_REG)
1644 emit_swap_insn (insn, regstack, *dest);
1645 }
1646
1647 if (STACK_REG_P (*src1))
1648 replace_reg (src1, get_hard_regnum (regstack, *src1));
1649 if (STACK_REG_P (*src2))
1650 replace_reg (src2, get_hard_regnum (regstack, *src2));
1651
1652 if (src1_note)
1653 {
1654 rtx src1_reg = XEXP (src1_note, 0);
1655
1656 /* If the register that dies is at the top of stack, then
1657 the destination is somewhere else - merely substitute it.
1658 But if the reg that dies is not at top of stack, then
1659 move the top of stack to the dead reg, as though we had
1660 done the insn and then a store-with-pop. */
1661
1662 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1663 {
1664 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1665 replace_reg (dest, get_hard_regnum (regstack, *dest));
1666 }
1667 else
1668 {
1669 int regno = get_hard_regnum (regstack, src1_reg);
1670
1671 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1672 replace_reg (dest, regno);
1673
1674 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1675 = regstack->reg[regstack->top];
1676 }
1677
1678 CLEAR_HARD_REG_BIT (regstack->reg_set,
1679 REGNO (XEXP (src1_note, 0)));
1680 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1681 regstack->top--;
1682 }
1683 else if (src2_note)
1684 {
1685 rtx src2_reg = XEXP (src2_note, 0);
1686 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1687 {
1688 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1689 replace_reg (dest, get_hard_regnum (regstack, *dest));
1690 }
1691 else
1692 {
1693 int regno = get_hard_regnum (regstack, src2_reg);
1694
1695 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1696 replace_reg (dest, regno);
1697
1698 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1699 = regstack->reg[regstack->top];
1700 }
1701
1702 CLEAR_HARD_REG_BIT (regstack->reg_set,
1703 REGNO (XEXP (src2_note, 0)));
1704 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1705 regstack->top--;
1706 }
1707 else
1708 {
1709 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1710 replace_reg (dest, get_hard_regnum (regstack, *dest));
1711 }
1712
1713 /* Keep operand 1 matching with destination. */
1714 if (COMMUTATIVE_ARITH_P (pat_src)
1715 && REG_P (*src1) && REG_P (*src2)
1716 && REGNO (*src1) != REGNO (*dest))
1717 {
1718 int tmp = REGNO (*src1);
1719 replace_reg (src1, REGNO (*src2));
1720 replace_reg (src2, tmp);
1721 }
1722 break;
1723
1724 case UNSPEC:
1725 switch (XINT (pat_src, 1))
1726 {
1727 case UNSPEC_SIN:
1728 case UNSPEC_COS:
1729 case UNSPEC_FRNDINT:
1730 case UNSPEC_F2XM1:
1731
1732 case UNSPEC_FRNDINT_FLOOR:
1733 case UNSPEC_FRNDINT_CEIL:
1734 case UNSPEC_FRNDINT_TRUNC:
1735 case UNSPEC_FRNDINT_MASK_PM:
1736
1737 /* These insns only operate on the top of the stack. */
1738
1739 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1740
1741 emit_swap_insn (insn, regstack, *src1);
1742
1743 /* Input should never die, it is
1744 replaced with output. */
1745 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1746 if (src1_note)
1747 abort();
1748
1749 if (STACK_REG_P (*dest))
1750 replace_reg (dest, FIRST_STACK_REG);
1751
1752 replace_reg (src1, FIRST_STACK_REG);
1753 break;
1754
1755 case UNSPEC_FPATAN:
1756 case UNSPEC_FYL2X:
1757 case UNSPEC_FYL2XP1:
1758 /* These insns operate on the top two stack slots. */
1759
1760 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1761 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1762
1763 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1764 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1765
1766 swap_to_top (insn, regstack, *src1, *src2);
1767
1768 replace_reg (src1, FIRST_STACK_REG);
1769 replace_reg (src2, FIRST_STACK_REG + 1);
1770
1771 if (src1_note)
1772 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1773 if (src2_note)
1774 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1775
1776 /* Pop both input operands from the stack. */
1777 CLEAR_HARD_REG_BIT (regstack->reg_set,
1778 regstack->reg[regstack->top]);
1779 CLEAR_HARD_REG_BIT (regstack->reg_set,
1780 regstack->reg[regstack->top - 1]);
1781 regstack->top -= 2;
1782
1783 /* Push the result back onto the stack. */
1784 regstack->reg[++regstack->top] = REGNO (*dest);
1785 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1786 replace_reg (dest, FIRST_STACK_REG);
1787 break;
1788
1789 case UNSPEC_FSCALE_FRACT:
1790 case UNSPEC_FPREM_F:
1791 case UNSPEC_FPREM1_F:
1792 /* These insns operate on the top two stack slots.
1793 first part of double input, double output insn. */
1794
1795 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1796 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1797
1798 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1799 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1800
1801 /* Inputs should never die, they are
1802 replaced with outputs. */
1803 if ((src1_note) || (src2_note))
1804 abort();
1805
1806 swap_to_top (insn, regstack, *src1, *src2);
1807
1808 /* Push the result back onto stack. Empty stack slot
1809 will be filled in second part of insn. */
1810 if (STACK_REG_P (*dest)) {
1811 regstack->reg[regstack->top] = REGNO (*dest);
1812 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1813 replace_reg (dest, FIRST_STACK_REG);
1814 }
1815
1816 replace_reg (src1, FIRST_STACK_REG);
1817 replace_reg (src2, FIRST_STACK_REG + 1);
1818 break;
1819
1820 case UNSPEC_FSCALE_EXP:
1821 case UNSPEC_FPREM_U:
1822 case UNSPEC_FPREM1_U:
1823 /* These insns operate on the top two stack slots./
1824 second part of double input, double output insn. */
1825
1826 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1827 src2 = get_true_reg (&XVECEXP (pat_src, 0, 1));
1828
1829 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1830 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1831
1832 /* Inputs should never die, they are
1833 replaced with outputs. */
1834 if ((src1_note) || (src2_note))
1835 abort();
1836
1837 swap_to_top (insn, regstack, *src1, *src2);
1838
1839 /* Push the result back onto stack. Fill empty slot from
1840 first part of insn and fix top of stack pointer. */
1841 if (STACK_REG_P (*dest)) {
1842 regstack->reg[regstack->top - 1] = REGNO (*dest);
1843 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1844 replace_reg (dest, FIRST_STACK_REG + 1);
1845 }
1846
1847 replace_reg (src1, FIRST_STACK_REG);
1848 replace_reg (src2, FIRST_STACK_REG + 1);
1849 break;
1850
1851 case UNSPEC_SINCOS_COS:
1852 case UNSPEC_TAN_ONE:
1853 case UNSPEC_XTRACT_FRACT:
1854 /* These insns operate on the top two stack slots,
1855 first part of one input, double output insn. */
1856
1857 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1858
1859 emit_swap_insn (insn, regstack, *src1);
1860
1861 /* Input should never die, it is
1862 replaced with output. */
1863 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1864 if (src1_note)
1865 abort();
1866
1867 /* Push the result back onto stack. Empty stack slot
1868 will be filled in second part of insn. */
1869 if (STACK_REG_P (*dest)) {
1870 regstack->reg[regstack->top + 1] = REGNO (*dest);
1871 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1872 replace_reg (dest, FIRST_STACK_REG);
1873 }
1874
1875 replace_reg (src1, FIRST_STACK_REG);
1876 break;
1877
1878 case UNSPEC_SINCOS_SIN:
1879 case UNSPEC_TAN_TAN:
1880 case UNSPEC_XTRACT_EXP:
1881 /* These insns operate on the top two stack slots,
1882 second part of one input, double output insn. */
1883
1884 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1885
1886 emit_swap_insn (insn, regstack, *src1);
1887
1888 /* Input should never die, it is
1889 replaced with output. */
1890 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1891 if (src1_note)
1892 abort();
1893
1894 /* Push the result back onto stack. Fill empty slot from
1895 first part of insn and fix top of stack pointer. */
1896 if (STACK_REG_P (*dest)) {
1897 regstack->reg[regstack->top] = REGNO (*dest);
1898 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1899 replace_reg (dest, FIRST_STACK_REG + 1);
1900
1901 regstack->top++;
1902 }
1903
1904 replace_reg (src1, FIRST_STACK_REG);
1905 break;
1906
1907 case UNSPEC_SAHF:
1908 /* (unspec [(unspec [(compare)] UNSPEC_FNSTSW)] UNSPEC_SAHF)
1909 The combination matches the PPRO fcomi instruction. */
1910
1911 pat_src = XVECEXP (pat_src, 0, 0);
1912 if (GET_CODE (pat_src) != UNSPEC
1913 || XINT (pat_src, 1) != UNSPEC_FNSTSW)
1914 abort ();
1915 /* Fall through. */
1916
1917 case UNSPEC_FNSTSW:
1918 /* Combined fcomp+fnstsw generated for doing well with
1919 CSE. When optimizing this would have been broken
1920 up before now. */
1921
1922 pat_src = XVECEXP (pat_src, 0, 0);
1923 if (GET_CODE (pat_src) != COMPARE)
1924 abort ();
1925
1926 compare_for_stack_reg (insn, regstack, pat_src);
1927 break;
1928
1929 default:
1930 abort ();
1931 }
1932 break;
1933
1934 case IF_THEN_ELSE:
1935 /* This insn requires the top of stack to be the destination. */
1936
1937 src1 = get_true_reg (&XEXP (pat_src, 1));
1938 src2 = get_true_reg (&XEXP (pat_src, 2));
1939
1940 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1941 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1942
1943 /* If the comparison operator is an FP comparison operator,
1944 it is handled correctly by compare_for_stack_reg () who
1945 will move the destination to the top of stack. But if the
1946 comparison operator is not an FP comparison operator, we
1947 have to handle it here. */
1948 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1949 && REGNO (*dest) != regstack->reg[regstack->top])
1950 {
1951 /* In case one of operands is the top of stack and the operands
1952 dies, it is safe to make it the destination operand by
1953 reversing the direction of cmove and avoid fxch. */
1954 if ((REGNO (*src1) == regstack->reg[regstack->top]
1955 && src1_note)
1956 || (REGNO (*src2) == regstack->reg[regstack->top]
1957 && src2_note))
1958 {
1959 int idx1 = (get_hard_regnum (regstack, *src1)
1960 - FIRST_STACK_REG);
1961 int idx2 = (get_hard_regnum (regstack, *src2)
1962 - FIRST_STACK_REG);
1963
1964 /* Make reg-stack believe that the operands are already
1965 swapped on the stack */
1966 regstack->reg[regstack->top - idx1] = REGNO (*src2);
1967 regstack->reg[regstack->top - idx2] = REGNO (*src1);
1968
1969 /* Reverse condition to compensate the operand swap.
1970 i386 do have comparison always reversible. */
1971 PUT_CODE (XEXP (pat_src, 0),
1972 reversed_comparison_code (XEXP (pat_src, 0), insn));
1973 }
1974 else
1975 emit_swap_insn (insn, regstack, *dest);
1976 }
1977
1978 {
1979 rtx src_note [3];
1980 int i;
1981
1982 src_note[0] = 0;
1983 src_note[1] = src1_note;
1984 src_note[2] = src2_note;
1985
1986 if (STACK_REG_P (*src1))
1987 replace_reg (src1, get_hard_regnum (regstack, *src1));
1988 if (STACK_REG_P (*src2))
1989 replace_reg (src2, get_hard_regnum (regstack, *src2));
1990
1991 for (i = 1; i <= 2; i++)
1992 if (src_note [i])
1993 {
1994 int regno = REGNO (XEXP (src_note[i], 0));
1995
1996 /* If the register that dies is not at the top of
1997 stack, then move the top of stack to the dead reg */
1998 if (regno != regstack->reg[regstack->top])
1999 {
2000 remove_regno_note (insn, REG_DEAD, regno);
2001 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
2002 EMIT_AFTER);
2003 }
2004 else
2005 /* Top of stack never dies, as it is the
2006 destination. */
2007 abort ();
2008 }
2009 }
2010
2011 /* Make dest the top of stack. Add dest to regstack if
2012 not present. */
2013 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
2014 regstack->reg[++regstack->top] = REGNO (*dest);
2015 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2016 replace_reg (dest, FIRST_STACK_REG);
2017 break;
2018
2019 default:
2020 abort ();
2021 }
2022 break;
2023 }
2024
2025 default:
2026 break;
2027 }
2028
2029 return control_flow_insn_deleted;
2030 }
2031 \f
2032 /* Substitute hard regnums for any stack regs in INSN, which has
2033 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2034 before the insn, and is updated with changes made here.
2035
2036 There are several requirements and assumptions about the use of
2037 stack-like regs in asm statements. These rules are enforced by
2038 record_asm_stack_regs; see comments there for details. Any
2039 asm_operands left in the RTL at this point may be assume to meet the
2040 requirements, since record_asm_stack_regs removes any problem asm. */
2041
2042 static void
2043 subst_asm_stack_regs (rtx insn, stack regstack)
2044 {
2045 rtx body = PATTERN (insn);
2046 int alt;
2047
2048 rtx *note_reg; /* Array of note contents */
2049 rtx **note_loc; /* Address of REG field of each note */
2050 enum reg_note *note_kind; /* The type of each note */
2051
2052 rtx *clobber_reg = 0;
2053 rtx **clobber_loc = 0;
2054
2055 struct stack_def temp_stack;
2056 int n_notes;
2057 int n_clobbers;
2058 rtx note;
2059 int i;
2060 int n_inputs, n_outputs;
2061
2062 if (! check_asm_stack_operands (insn))
2063 return;
2064
2065 /* Find out what the constraints required. If no constraint
2066 alternative matches, that is a compiler bug: we should have caught
2067 such an insn in check_asm_stack_operands. */
2068 extract_insn (insn);
2069 constrain_operands (1);
2070 alt = which_alternative;
2071
2072 preprocess_constraints ();
2073
2074 n_inputs = get_asm_operand_n_inputs (body);
2075 n_outputs = recog_data.n_operands - n_inputs;
2076
2077 if (alt < 0)
2078 abort ();
2079
2080 /* Strip SUBREGs here to make the following code simpler. */
2081 for (i = 0; i < recog_data.n_operands; i++)
2082 if (GET_CODE (recog_data.operand[i]) == SUBREG
2083 && REG_P (SUBREG_REG (recog_data.operand[i])))
2084 {
2085 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
2086 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
2087 }
2088
2089 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2090
2091 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2092 i++;
2093
2094 note_reg = alloca (i * sizeof (rtx));
2095 note_loc = alloca (i * sizeof (rtx *));
2096 note_kind = alloca (i * sizeof (enum reg_note));
2097
2098 n_notes = 0;
2099 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2100 {
2101 rtx reg = XEXP (note, 0);
2102 rtx *loc = & XEXP (note, 0);
2103
2104 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2105 {
2106 loc = & SUBREG_REG (reg);
2107 reg = SUBREG_REG (reg);
2108 }
2109
2110 if (STACK_REG_P (reg)
2111 && (REG_NOTE_KIND (note) == REG_DEAD
2112 || REG_NOTE_KIND (note) == REG_UNUSED))
2113 {
2114 note_reg[n_notes] = reg;
2115 note_loc[n_notes] = loc;
2116 note_kind[n_notes] = REG_NOTE_KIND (note);
2117 n_notes++;
2118 }
2119 }
2120
2121 /* Set up CLOBBER_REG and CLOBBER_LOC. */
2122
2123 n_clobbers = 0;
2124
2125 if (GET_CODE (body) == PARALLEL)
2126 {
2127 clobber_reg = alloca (XVECLEN (body, 0) * sizeof (rtx));
2128 clobber_loc = alloca (XVECLEN (body, 0) * sizeof (rtx *));
2129
2130 for (i = 0; i < XVECLEN (body, 0); i++)
2131 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
2132 {
2133 rtx clobber = XVECEXP (body, 0, i);
2134 rtx reg = XEXP (clobber, 0);
2135 rtx *loc = & XEXP (clobber, 0);
2136
2137 if (GET_CODE (reg) == SUBREG && REG_P (SUBREG_REG (reg)))
2138 {
2139 loc = & SUBREG_REG (reg);
2140 reg = SUBREG_REG (reg);
2141 }
2142
2143 if (STACK_REG_P (reg))
2144 {
2145 clobber_reg[n_clobbers] = reg;
2146 clobber_loc[n_clobbers] = loc;
2147 n_clobbers++;
2148 }
2149 }
2150 }
2151
2152 temp_stack = *regstack;
2153
2154 /* Put the input regs into the desired place in TEMP_STACK. */
2155
2156 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2157 if (STACK_REG_P (recog_data.operand[i])
2158 && reg_class_subset_p (recog_op_alt[i][alt].cl,
2159 FLOAT_REGS)
2160 && recog_op_alt[i][alt].cl != FLOAT_REGS)
2161 {
2162 /* If an operand needs to be in a particular reg in
2163 FLOAT_REGS, the constraint was either 't' or 'u'. Since
2164 these constraints are for single register classes, and
2165 reload guaranteed that operand[i] is already in that class,
2166 we can just use REGNO (recog_data.operand[i]) to know which
2167 actual reg this operand needs to be in. */
2168
2169 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
2170
2171 if (regno < 0)
2172 abort ();
2173
2174 if ((unsigned int) regno != REGNO (recog_data.operand[i]))
2175 {
2176 /* recog_data.operand[i] is not in the right place. Find
2177 it and swap it with whatever is already in I's place.
2178 K is where recog_data.operand[i] is now. J is where it
2179 should be. */
2180 int j, k, temp;
2181
2182 k = temp_stack.top - (regno - FIRST_STACK_REG);
2183 j = (temp_stack.top
2184 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
2185
2186 temp = temp_stack.reg[k];
2187 temp_stack.reg[k] = temp_stack.reg[j];
2188 temp_stack.reg[j] = temp;
2189 }
2190 }
2191
2192 /* Emit insns before INSN to make sure the reg-stack is in the right
2193 order. */
2194
2195 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
2196
2197 /* Make the needed input register substitutions. Do death notes and
2198 clobbers too, because these are for inputs, not outputs. */
2199
2200 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2201 if (STACK_REG_P (recog_data.operand[i]))
2202 {
2203 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
2204
2205 if (regnum < 0)
2206 abort ();
2207
2208 replace_reg (recog_data.operand_loc[i], regnum);
2209 }
2210
2211 for (i = 0; i < n_notes; i++)
2212 if (note_kind[i] == REG_DEAD)
2213 {
2214 int regnum = get_hard_regnum (regstack, note_reg[i]);
2215
2216 if (regnum < 0)
2217 abort ();
2218
2219 replace_reg (note_loc[i], regnum);
2220 }
2221
2222 for (i = 0; i < n_clobbers; i++)
2223 {
2224 /* It's OK for a CLOBBER to reference a reg that is not live.
2225 Don't try to replace it in that case. */
2226 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2227
2228 if (regnum >= 0)
2229 {
2230 /* Sigh - clobbers always have QImode. But replace_reg knows
2231 that these regs can't be MODE_INT and will abort. Just put
2232 the right reg there without calling replace_reg. */
2233
2234 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
2235 }
2236 }
2237
2238 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2239
2240 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2241 if (STACK_REG_P (recog_data.operand[i]))
2242 {
2243 /* An input reg is implicitly popped if it is tied to an
2244 output, or if there is a CLOBBER for it. */
2245 int j;
2246
2247 for (j = 0; j < n_clobbers; j++)
2248 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
2249 break;
2250
2251 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
2252 {
2253 /* recog_data.operand[i] might not be at the top of stack.
2254 But that's OK, because all we need to do is pop the
2255 right number of regs off of the top of the reg-stack.
2256 record_asm_stack_regs guaranteed that all implicitly
2257 popped regs were grouped at the top of the reg-stack. */
2258
2259 CLEAR_HARD_REG_BIT (regstack->reg_set,
2260 regstack->reg[regstack->top]);
2261 regstack->top--;
2262 }
2263 }
2264
2265 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2266 Note that there isn't any need to substitute register numbers.
2267 ??? Explain why this is true. */
2268
2269 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2270 {
2271 /* See if there is an output for this hard reg. */
2272 int j;
2273
2274 for (j = 0; j < n_outputs; j++)
2275 if (STACK_REG_P (recog_data.operand[j])
2276 && REGNO (recog_data.operand[j]) == (unsigned) i)
2277 {
2278 regstack->reg[++regstack->top] = i;
2279 SET_HARD_REG_BIT (regstack->reg_set, i);
2280 break;
2281 }
2282 }
2283
2284 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2285 input that the asm didn't implicitly pop. If the asm didn't
2286 implicitly pop an input reg, that reg will still be live.
2287
2288 Note that we can't use find_regno_note here: the register numbers
2289 in the death notes have already been substituted. */
2290
2291 for (i = 0; i < n_outputs; i++)
2292 if (STACK_REG_P (recog_data.operand[i]))
2293 {
2294 int j;
2295
2296 for (j = 0; j < n_notes; j++)
2297 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2298 && note_kind[j] == REG_UNUSED)
2299 {
2300 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2301 EMIT_AFTER);
2302 break;
2303 }
2304 }
2305
2306 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2307 if (STACK_REG_P (recog_data.operand[i]))
2308 {
2309 int j;
2310
2311 for (j = 0; j < n_notes; j++)
2312 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2313 && note_kind[j] == REG_DEAD
2314 && TEST_HARD_REG_BIT (regstack->reg_set,
2315 REGNO (recog_data.operand[i])))
2316 {
2317 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2318 EMIT_AFTER);
2319 break;
2320 }
2321 }
2322 }
2323 \f
2324 /* Substitute stack hard reg numbers for stack virtual registers in
2325 INSN. Non-stack register numbers are not changed. REGSTACK is the
2326 current stack content. Insns may be emitted as needed to arrange the
2327 stack for the 387 based on the contents of the insn. Return whether
2328 a control flow insn was deleted in the process. */
2329
2330 static bool
2331 subst_stack_regs (rtx insn, stack regstack)
2332 {
2333 rtx *note_link, note;
2334 bool control_flow_insn_deleted = false;
2335 int i;
2336
2337 if (CALL_P (insn))
2338 {
2339 int top = regstack->top;
2340
2341 /* If there are any floating point parameters to be passed in
2342 registers for this call, make sure they are in the right
2343 order. */
2344
2345 if (top >= 0)
2346 {
2347 straighten_stack (PREV_INSN (insn), regstack);
2348
2349 /* Now mark the arguments as dead after the call. */
2350
2351 while (regstack->top >= 0)
2352 {
2353 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2354 regstack->top--;
2355 }
2356 }
2357 }
2358
2359 /* Do the actual substitution if any stack regs are mentioned.
2360 Since we only record whether entire insn mentions stack regs, and
2361 subst_stack_regs_pat only works for patterns that contain stack regs,
2362 we must check each pattern in a parallel here. A call_value_pop could
2363 fail otherwise. */
2364
2365 if (stack_regs_mentioned (insn))
2366 {
2367 int n_operands = asm_noperands (PATTERN (insn));
2368 if (n_operands >= 0)
2369 {
2370 /* This insn is an `asm' with operands. Decode the operands,
2371 decide how many are inputs, and do register substitution.
2372 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2373
2374 subst_asm_stack_regs (insn, regstack);
2375 return control_flow_insn_deleted;
2376 }
2377
2378 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2379 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2380 {
2381 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2382 {
2383 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
2384 XVECEXP (PATTERN (insn), 0, i)
2385 = shallow_copy_rtx (XVECEXP (PATTERN (insn), 0, i));
2386 control_flow_insn_deleted
2387 |= subst_stack_regs_pat (insn, regstack,
2388 XVECEXP (PATTERN (insn), 0, i));
2389 }
2390 }
2391 else
2392 control_flow_insn_deleted
2393 |= subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2394 }
2395
2396 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2397 REG_UNUSED will already have been dealt with, so just return. */
2398
2399 if (NOTE_P (insn) || INSN_DELETED_P (insn))
2400 return control_flow_insn_deleted;
2401
2402 /* If there is a REG_UNUSED note on a stack register on this insn,
2403 the indicated reg must be popped. The REG_UNUSED note is removed,
2404 since the form of the newly emitted pop insn references the reg,
2405 making it no longer `unset'. */
2406
2407 note_link = &REG_NOTES (insn);
2408 for (note = *note_link; note; note = XEXP (note, 1))
2409 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2410 {
2411 *note_link = XEXP (note, 1);
2412 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2413 }
2414 else
2415 note_link = &XEXP (note, 1);
2416
2417 return control_flow_insn_deleted;
2418 }
2419 \f
2420 /* Change the organization of the stack so that it fits a new basic
2421 block. Some registers might have to be popped, but there can never be
2422 a register live in the new block that is not now live.
2423
2424 Insert any needed insns before or after INSN, as indicated by
2425 WHERE. OLD is the original stack layout, and NEW is the desired
2426 form. OLD is updated to reflect the code emitted, ie, it will be
2427 the same as NEW upon return.
2428
2429 This function will not preserve block_end[]. But that information
2430 is no longer needed once this has executed. */
2431
2432 static void
2433 change_stack (rtx insn, stack old, stack new, enum emit_where where)
2434 {
2435 int reg;
2436 int update_end = 0;
2437
2438 /* We will be inserting new insns "backwards". If we are to insert
2439 after INSN, find the next insn, and insert before it. */
2440
2441 if (where == EMIT_AFTER)
2442 {
2443 if (current_block && BB_END (current_block) == insn)
2444 update_end = 1;
2445 insn = NEXT_INSN (insn);
2446 }
2447
2448 /* Pop any registers that are not needed in the new block. */
2449
2450 for (reg = old->top; reg >= 0; reg--)
2451 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2452 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2453 EMIT_BEFORE);
2454
2455 if (new->top == -2)
2456 {
2457 /* If the new block has never been processed, then it can inherit
2458 the old stack order. */
2459
2460 new->top = old->top;
2461 memcpy (new->reg, old->reg, sizeof (new->reg));
2462 }
2463 else
2464 {
2465 /* This block has been entered before, and we must match the
2466 previously selected stack order. */
2467
2468 /* By now, the only difference should be the order of the stack,
2469 not their depth or liveliness. */
2470
2471 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2472 abort ();
2473 win:
2474 if (old->top != new->top)
2475 abort ();
2476
2477 /* If the stack is not empty (new->top != -1), loop here emitting
2478 swaps until the stack is correct.
2479
2480 The worst case number of swaps emitted is N + 2, where N is the
2481 depth of the stack. In some cases, the reg at the top of
2482 stack may be correct, but swapped anyway in order to fix
2483 other regs. But since we never swap any other reg away from
2484 its correct slot, this algorithm will converge. */
2485
2486 if (new->top != -1)
2487 do
2488 {
2489 /* Swap the reg at top of stack into the position it is
2490 supposed to be in, until the correct top of stack appears. */
2491
2492 while (old->reg[old->top] != new->reg[new->top])
2493 {
2494 for (reg = new->top; reg >= 0; reg--)
2495 if (new->reg[reg] == old->reg[old->top])
2496 break;
2497
2498 if (reg == -1)
2499 abort ();
2500
2501 emit_swap_insn (insn, old,
2502 FP_MODE_REG (old->reg[reg], DFmode));
2503 }
2504
2505 /* See if any regs remain incorrect. If so, bring an
2506 incorrect reg to the top of stack, and let the while loop
2507 above fix it. */
2508
2509 for (reg = new->top; reg >= 0; reg--)
2510 if (new->reg[reg] != old->reg[reg])
2511 {
2512 emit_swap_insn (insn, old,
2513 FP_MODE_REG (old->reg[reg], DFmode));
2514 break;
2515 }
2516 } while (reg >= 0);
2517
2518 /* At this point there must be no differences. */
2519
2520 for (reg = old->top; reg >= 0; reg--)
2521 if (old->reg[reg] != new->reg[reg])
2522 abort ();
2523 }
2524
2525 if (update_end)
2526 BB_END (current_block) = PREV_INSN (insn);
2527 }
2528 \f
2529 /* Print stack configuration. */
2530
2531 static void
2532 print_stack (FILE *file, stack s)
2533 {
2534 if (! file)
2535 return;
2536
2537 if (s->top == -2)
2538 fprintf (file, "uninitialized\n");
2539 else if (s->top == -1)
2540 fprintf (file, "empty\n");
2541 else
2542 {
2543 int i;
2544 fputs ("[ ", file);
2545 for (i = 0; i <= s->top; ++i)
2546 fprintf (file, "%d ", s->reg[i]);
2547 fputs ("]\n", file);
2548 }
2549 }
2550 \f
2551 /* This function was doing life analysis. We now let the regular live
2552 code do it's job, so we only need to check some extra invariants
2553 that reg-stack expects. Primary among these being that all registers
2554 are initialized before use.
2555
2556 The function returns true when code was emitted to CFG edges and
2557 commit_edge_insertions needs to be called. */
2558
2559 static int
2560 convert_regs_entry (void)
2561 {
2562 int inserted = 0;
2563 edge e;
2564 basic_block block;
2565
2566 FOR_EACH_BB_REVERSE (block)
2567 {
2568 block_info bi = BLOCK_INFO (block);
2569 int reg;
2570
2571 /* Set current register status at last instruction `uninitialized'. */
2572 bi->stack_in.top = -2;
2573
2574 /* Copy live_at_end and live_at_start into temporaries. */
2575 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2576 {
2577 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2578 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2579 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2580 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2581 }
2582 }
2583
2584 /* Load something into each stack register live at function entry.
2585 Such live registers can be caused by uninitialized variables or
2586 functions not returning values on all paths. In order to keep
2587 the push/pop code happy, and to not scrog the register stack, we
2588 must put something in these registers. Use a QNaN.
2589
2590 Note that we are inserting converted code here. This code is
2591 never seen by the convert_regs pass. */
2592
2593 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2594 {
2595 basic_block block = e->dest;
2596 block_info bi = BLOCK_INFO (block);
2597 int reg, top = -1;
2598
2599 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2600 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2601 {
2602 rtx init;
2603
2604 bi->stack_in.reg[++top] = reg;
2605
2606 init = gen_rtx_SET (VOIDmode,
2607 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2608 not_a_num);
2609 insert_insn_on_edge (init, e);
2610 inserted = 1;
2611 }
2612
2613 bi->stack_in.top = top;
2614 }
2615
2616 return inserted;
2617 }
2618
2619 /* Construct the desired stack for function exit. This will either
2620 be `empty', or the function return value at top-of-stack. */
2621
2622 static void
2623 convert_regs_exit (void)
2624 {
2625 int value_reg_low, value_reg_high;
2626 stack output_stack;
2627 rtx retvalue;
2628
2629 retvalue = stack_result (current_function_decl);
2630 value_reg_low = value_reg_high = -1;
2631 if (retvalue)
2632 {
2633 value_reg_low = REGNO (retvalue);
2634 value_reg_high = value_reg_low
2635 + hard_regno_nregs[value_reg_low][GET_MODE (retvalue)] - 1;
2636 }
2637
2638 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2639 if (value_reg_low == -1)
2640 output_stack->top = -1;
2641 else
2642 {
2643 int reg;
2644
2645 output_stack->top = value_reg_high - value_reg_low;
2646 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2647 {
2648 output_stack->reg[value_reg_high - reg] = reg;
2649 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2650 }
2651 }
2652 }
2653
2654 /* Adjust the stack of this block on exit to match the stack of the
2655 target block, or copy stack info into the stack of the successor
2656 of the successor hasn't been processed yet. */
2657 static bool
2658 compensate_edge (edge e, FILE *file)
2659 {
2660 basic_block block = e->src, target = e->dest;
2661 block_info bi = BLOCK_INFO (block);
2662 struct stack_def regstack, tmpstack;
2663 stack target_stack = &BLOCK_INFO (target)->stack_in;
2664 int reg;
2665
2666 current_block = block;
2667 regstack = bi->stack_out;
2668 if (file)
2669 fprintf (file, "Edge %d->%d: ", block->index, target->index);
2670
2671 if (target_stack->top == -2)
2672 {
2673 /* The target block hasn't had a stack order selected.
2674 We need merely ensure that no pops are needed. */
2675 for (reg = regstack.top; reg >= 0; --reg)
2676 if (!TEST_HARD_REG_BIT (target_stack->reg_set, regstack.reg[reg]))
2677 break;
2678
2679 if (reg == -1)
2680 {
2681 if (file)
2682 fprintf (file, "new block; copying stack position\n");
2683
2684 /* change_stack kills values in regstack. */
2685 tmpstack = regstack;
2686
2687 change_stack (BB_END (block), &tmpstack, target_stack, EMIT_AFTER);
2688 return false;
2689 }
2690
2691 if (file)
2692 fprintf (file, "new block; pops needed\n");
2693 }
2694 else
2695 {
2696 if (target_stack->top == regstack.top)
2697 {
2698 for (reg = target_stack->top; reg >= 0; --reg)
2699 if (target_stack->reg[reg] != regstack.reg[reg])
2700 break;
2701
2702 if (reg == -1)
2703 {
2704 if (file)
2705 fprintf (file, "no changes needed\n");
2706 return false;
2707 }
2708 }
2709
2710 if (file)
2711 {
2712 fprintf (file, "correcting stack to ");
2713 print_stack (file, target_stack);
2714 }
2715 }
2716
2717 /* Care for non-call EH edges specially. The normal return path have
2718 values in registers. These will be popped en masse by the unwind
2719 library. */
2720 if ((e->flags & (EDGE_EH | EDGE_ABNORMAL_CALL)) == EDGE_EH)
2721 target_stack->top = -1;
2722
2723 /* Other calls may appear to have values live in st(0), but the
2724 abnormal return path will not have actually loaded the values. */
2725 else if (e->flags & EDGE_ABNORMAL_CALL)
2726 {
2727 /* Assert that the lifetimes are as we expect -- one value
2728 live at st(0) on the end of the source block, and no
2729 values live at the beginning of the destination block. */
2730 HARD_REG_SET tmp;
2731
2732 CLEAR_HARD_REG_SET (tmp);
2733 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2734 abort ();
2735 eh1:
2736
2737 /* We are sure that there is st(0) live, otherwise we won't compensate.
2738 For complex return values, we may have st(1) live as well. */
2739 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2740 if (TEST_HARD_REG_BIT (regstack.reg_set, FIRST_STACK_REG + 1))
2741 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG + 1);
2742 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2743 abort ();
2744 eh2:
2745
2746 target_stack->top = -1;
2747 }
2748
2749 /* It is better to output directly to the end of the block
2750 instead of to the edge, because emit_swap can do minimal
2751 insn scheduling. We can do this when there is only one
2752 edge out, and it is not abnormal. */
2753 else if (block->succ->succ_next == NULL && !(e->flags & EDGE_ABNORMAL))
2754 {
2755 /* change_stack kills values in regstack. */
2756 tmpstack = regstack;
2757
2758 change_stack (BB_END (block), &tmpstack, target_stack,
2759 (JUMP_P (BB_END (block))
2760 ? EMIT_BEFORE : EMIT_AFTER));
2761 }
2762 else
2763 {
2764 rtx seq, after;
2765
2766 /* We don't support abnormal edges. Global takes care to
2767 avoid any live register across them, so we should never
2768 have to insert instructions on such edges. */
2769 if (e->flags & EDGE_ABNORMAL)
2770 abort ();
2771
2772 current_block = NULL;
2773 start_sequence ();
2774
2775 /* ??? change_stack needs some point to emit insns after. */
2776 after = emit_note (NOTE_INSN_DELETED);
2777
2778 tmpstack = regstack;
2779 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2780
2781 seq = get_insns ();
2782 end_sequence ();
2783
2784 insert_insn_on_edge (seq, e);
2785 return true;
2786 }
2787 return false;
2788 }
2789
2790 /* Convert stack register references in one block. */
2791
2792 static int
2793 convert_regs_1 (FILE *file, basic_block block)
2794 {
2795 struct stack_def regstack;
2796 block_info bi = BLOCK_INFO (block);
2797 int deleted, inserted, reg;
2798 rtx insn, next;
2799 edge e, beste = NULL;
2800 bool control_flow_insn_deleted = false;
2801
2802 inserted = 0;
2803 deleted = 0;
2804 any_malformed_asm = false;
2805
2806 /* Find the edge we will copy stack from. It should be the most frequent
2807 one as it will get cheapest after compensation code is generated,
2808 if multiple such exists, take one with largest count, prefer critical
2809 one (as splitting critical edges is more expensive), or one with lowest
2810 index, to avoid random changes with different orders of the edges. */
2811 for (e = block->pred; e ; e = e->pred_next)
2812 {
2813 if (e->flags & EDGE_DFS_BACK)
2814 ;
2815 else if (! beste)
2816 beste = e;
2817 else if (EDGE_FREQUENCY (beste) < EDGE_FREQUENCY (e))
2818 beste = e;
2819 else if (EDGE_FREQUENCY (beste) > EDGE_FREQUENCY (e))
2820 ;
2821 else if (beste->count < e->count)
2822 beste = e;
2823 else if (beste->count > e->count)
2824 ;
2825 else if ((EDGE_CRITICAL_P (e) != 0)
2826 != (EDGE_CRITICAL_P (beste) != 0))
2827 {
2828 if (EDGE_CRITICAL_P (e))
2829 beste = e;
2830 }
2831 else if (e->src->index < beste->src->index)
2832 beste = e;
2833 }
2834
2835 /* Initialize stack at block entry. */
2836 if (bi->stack_in.top == -2)
2837 {
2838 if (beste)
2839 inserted |= compensate_edge (beste, file);
2840 else
2841 {
2842 /* No predecessors. Create an arbitrary input stack. */
2843 int reg;
2844
2845 bi->stack_in.top = -1;
2846 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2847 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2848 bi->stack_in.reg[++bi->stack_in.top] = reg;
2849 }
2850 }
2851 else
2852 /* Entry blocks do have stack already initialized. */
2853 beste = NULL;
2854
2855 current_block = block;
2856
2857 if (file)
2858 {
2859 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2860 print_stack (file, &bi->stack_in);
2861 }
2862
2863 /* Process all insns in this block. Keep track of NEXT so that we
2864 don't process insns emitted while substituting in INSN. */
2865 next = BB_HEAD (block);
2866 regstack = bi->stack_in;
2867 do
2868 {
2869 insn = next;
2870 next = NEXT_INSN (insn);
2871
2872 /* Ensure we have not missed a block boundary. */
2873 if (next == NULL)
2874 abort ();
2875 if (insn == BB_END (block))
2876 next = NULL;
2877
2878 /* Don't bother processing unless there is a stack reg
2879 mentioned or if it's a CALL_INSN. */
2880 if (stack_regs_mentioned (insn)
2881 || CALL_P (insn))
2882 {
2883 if (file)
2884 {
2885 fprintf (file, " insn %d input stack: ",
2886 INSN_UID (insn));
2887 print_stack (file, &regstack);
2888 }
2889 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2890 }
2891 }
2892 while (next);
2893
2894 if (file)
2895 {
2896 fprintf (file, "Expected live registers [");
2897 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2898 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2899 fprintf (file, " %d", reg);
2900 fprintf (file, " ]\nOutput stack: ");
2901 print_stack (file, &regstack);
2902 }
2903
2904 insn = BB_END (block);
2905 if (JUMP_P (insn))
2906 insn = PREV_INSN (insn);
2907
2908 /* If the function is declared to return a value, but it returns one
2909 in only some cases, some registers might come live here. Emit
2910 necessary moves for them. */
2911
2912 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2913 {
2914 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2915 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2916 {
2917 rtx set;
2918
2919 if (file)
2920 {
2921 fprintf (file, "Emitting insn initializing reg %d\n",
2922 reg);
2923 }
2924
2925 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2926 not_a_num);
2927 insn = emit_insn_after (set, insn);
2928 control_flow_insn_deleted |= subst_stack_regs (insn, &regstack);
2929 }
2930 }
2931
2932 /* Amongst the insns possibly deleted during the substitution process above,
2933 might have been the only trapping insn in the block. We purge the now
2934 possibly dead EH edges here to avoid an ICE from fixup_abnormal_edges,
2935 called at the end of convert_regs. The order in which we process the
2936 blocks ensures that we never delete an already processed edge.
2937
2938 Note that, at this point, the CFG may have been damaged by the emission
2939 of instructions after an abnormal call, which moves the basic block end
2940 (and is the reason why we call fixup_abnormal_edges later). So we must
2941 be sure that the trapping insn has been deleted before trying to purge
2942 dead edges, otherwise we risk purging valid edges.
2943
2944 ??? We are normally supposed not to delete trapping insns, so we pretend
2945 that the insns deleted above don't actually trap. It would have been
2946 better to detect this earlier and avoid creating the EH edge in the first
2947 place, still, but we don't have enough information at that time. */
2948
2949 if (control_flow_insn_deleted)
2950 purge_dead_edges (block);
2951
2952 /* Something failed if the stack lives don't match. If we had malformed
2953 asms, we zapped the instruction itself, but that didn't produce the
2954 same pattern of register kills as before. */
2955 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2956 if (!any_malformed_asm)
2957 abort ();
2958 win:
2959 bi->stack_out = regstack;
2960
2961 /* Compensate the back edges, as those wasn't visited yet. */
2962 for (e = block->succ; e ; e = e->succ_next)
2963 {
2964 if (e->flags & EDGE_DFS_BACK
2965 || (e->dest == EXIT_BLOCK_PTR))
2966 {
2967 if (!BLOCK_INFO (e->dest)->done
2968 && e->dest != block)
2969 abort ();
2970 inserted |= compensate_edge (e, file);
2971 }
2972 }
2973 for (e = block->pred; e ; e = e->pred_next)
2974 {
2975 if (e != beste && !(e->flags & EDGE_DFS_BACK)
2976 && e->src != ENTRY_BLOCK_PTR)
2977 {
2978 if (!BLOCK_INFO (e->src)->done)
2979 abort ();
2980 inserted |= compensate_edge (e, file);
2981 }
2982 }
2983
2984 return inserted;
2985 }
2986
2987 /* Convert registers in all blocks reachable from BLOCK. */
2988
2989 static int
2990 convert_regs_2 (FILE *file, basic_block block)
2991 {
2992 basic_block *stack, *sp;
2993 int inserted;
2994
2995 /* We process the blocks in a top-down manner, in a way such that one block
2996 is only processed after all its predecessors. The number of predecessors
2997 of every block has already been computed. */
2998
2999 stack = xmalloc (sizeof (*stack) * n_basic_blocks);
3000 sp = stack;
3001
3002 *sp++ = block;
3003
3004 inserted = 0;
3005 do
3006 {
3007 edge e;
3008
3009 block = *--sp;
3010
3011 /* Processing BLOCK is achieved by convert_regs_1, which may purge
3012 some dead EH outgoing edge after the deletion of the trapping
3013 insn inside the block. Since the number of predecessors of
3014 BLOCK's successors was computed based on the initial edge set,
3015 we check the necessity to process some of these successors
3016 before such an edge deletion may happen. However, there is
3017 a pitfall: if BLOCK is the only predecessor of a successor and
3018 the edge between them happens to be deleted, the successor
3019 becomes unreachable and should not be processed. The problem
3020 is that there is no way to preventively detect this case so we
3021 stack the successor in all cases and hand over the task of
3022 fixing up the discrepancy to convert_regs_1. */
3023
3024 for (e = block->succ; e ; e = e->succ_next)
3025 if (! (e->flags & EDGE_DFS_BACK))
3026 {
3027 BLOCK_INFO (e->dest)->predecessors--;
3028 if (!BLOCK_INFO (e->dest)->predecessors)
3029 *sp++ = e->dest;
3030 }
3031
3032 inserted |= convert_regs_1 (file, block);
3033 BLOCK_INFO (block)->done = 1;
3034 }
3035 while (sp != stack);
3036
3037 return inserted;
3038 }
3039
3040 /* Traverse all basic blocks in a function, converting the register
3041 references in each insn from the "flat" register file that gcc uses,
3042 to the stack-like registers the 387 uses. */
3043
3044 static int
3045 convert_regs (FILE *file)
3046 {
3047 int inserted;
3048 basic_block b;
3049 edge e;
3050
3051 /* Initialize uninitialized registers on function entry. */
3052 inserted = convert_regs_entry ();
3053
3054 /* Construct the desired stack for function exit. */
3055 convert_regs_exit ();
3056 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
3057
3058 /* ??? Future: process inner loops first, and give them arbitrary
3059 initial stacks which emit_swap_insn can modify. This ought to
3060 prevent double fxch that often appears at the head of a loop. */
3061
3062 /* Process all blocks reachable from all entry points. */
3063 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
3064 inserted |= convert_regs_2 (file, e->dest);
3065
3066 /* ??? Process all unreachable blocks. Though there's no excuse
3067 for keeping these even when not optimizing. */
3068 FOR_EACH_BB (b)
3069 {
3070 block_info bi = BLOCK_INFO (b);
3071
3072 if (! bi->done)
3073 inserted |= convert_regs_2 (file, b);
3074 }
3075 clear_aux_for_blocks ();
3076
3077 fixup_abnormal_edges ();
3078 if (inserted)
3079 commit_edge_insertions ();
3080
3081 if (file)
3082 fputc ('\n', file);
3083
3084 return inserted;
3085 }
3086 #endif /* STACK_REGS */
3087
3088 #include "gt-reg-stack.h"