local-alloc.c (local_alloc): Use xmalloc/xcalloc, not alloca.
[gcc.git] / gcc / reg-stack.c
1 /* Register to Stack convert for GNU compiler.
2 Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 /* This pass converts stack-like registers from the "flat register
22 file" model that gcc uses, to a stack convention that the 387 uses.
23
24 * The form of the input:
25
26 On input, the function consists of insn that have had their
27 registers fully allocated to a set of "virtual" registers. Note that
28 the word "virtual" is used differently here than elsewhere in gcc: for
29 each virtual stack reg, there is a hard reg, but the mapping between
30 them is not known until this pass is run. On output, hard register
31 numbers have been substituted, and various pop and exchange insns have
32 been emitted. The hard register numbers and the virtual register
33 numbers completely overlap - before this pass, all stack register
34 numbers are virtual, and afterward they are all hard.
35
36 The virtual registers can be manipulated normally by gcc, and their
37 semantics are the same as for normal registers. After the hard
38 register numbers are substituted, the semantics of an insn containing
39 stack-like regs are not the same as for an insn with normal regs: for
40 instance, it is not safe to delete an insn that appears to be a no-op
41 move. In general, no insn containing hard regs should be changed
42 after this pass is done.
43
44 * The form of the output:
45
46 After this pass, hard register numbers represent the distance from
47 the current top of stack to the desired register. A reference to
48 FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
49 represents the register just below that, and so forth. Also, REG_DEAD
50 notes indicate whether or not a stack register should be popped.
51
52 A "swap" insn looks like a parallel of two patterns, where each
53 pattern is a SET: one sets A to B, the other B to A.
54
55 A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
56 and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
57 will replace the existing stack top, not push a new value.
58
59 A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
60 SET_SRC is REG or MEM.
61
62 The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
63 appears ambiguous. As a special case, the presence of a REG_DEAD note
64 for FIRST_STACK_REG differentiates between a load insn and a pop.
65
66 If a REG_DEAD is present, the insn represents a "pop" that discards
67 the top of the register stack. If there is no REG_DEAD note, then the
68 insn represents a "dup" or a push of the current top of stack onto the
69 stack.
70
71 * Methodology:
72
73 Existing REG_DEAD and REG_UNUSED notes for stack registers are
74 deleted and recreated from scratch. REG_DEAD is never created for a
75 SET_DEST, only REG_UNUSED.
76
77 * asm_operands:
78
79 There are several rules on the usage of stack-like regs in
80 asm_operands insns. These rules apply only to the operands that are
81 stack-like regs:
82
83 1. Given a set of input regs that die in an asm_operands, it is
84 necessary to know which are implicitly popped by the asm, and
85 which must be explicitly popped by gcc.
86
87 An input reg that is implicitly popped by the asm must be
88 explicitly clobbered, unless it is constrained to match an
89 output operand.
90
91 2. For any input reg that is implicitly popped by an asm, it is
92 necessary to know how to adjust the stack to compensate for the pop.
93 If any non-popped input is closer to the top of the reg-stack than
94 the implicitly popped reg, it would not be possible to know what the
95 stack looked like - it's not clear how the rest of the stack "slides
96 up".
97
98 All implicitly popped input regs must be closer to the top of
99 the reg-stack than any input that is not implicitly popped.
100
101 3. It is possible that if an input dies in an insn, reload might
102 use the input reg for an output reload. Consider this example:
103
104 asm ("foo" : "=t" (a) : "f" (b));
105
106 This asm says that input B is not popped by the asm, and that
107 the asm pushes a result onto the reg-stack, ie, the stack is one
108 deeper after the asm than it was before. But, it is possible that
109 reload will think that it can use the same reg for both the input and
110 the output, if input B dies in this insn.
111
112 If any input operand uses the "f" constraint, all output reg
113 constraints must use the "&" earlyclobber.
114
115 The asm above would be written as
116
117 asm ("foo" : "=&t" (a) : "f" (b));
118
119 4. Some operands need to be in particular places on the stack. All
120 output operands fall in this category - there is no other way to
121 know which regs the outputs appear in unless the user indicates
122 this in the constraints.
123
124 Output operands must specifically indicate which reg an output
125 appears in after an asm. "=f" is not allowed: the operand
126 constraints must select a class with a single reg.
127
128 5. Output operands may not be "inserted" between existing stack regs.
129 Since no 387 opcode uses a read/write operand, all output operands
130 are dead before the asm_operands, and are pushed by the asm_operands.
131 It makes no sense to push anywhere but the top of the reg-stack.
132
133 Output operands must start at the top of the reg-stack: output
134 operands may not "skip" a reg.
135
136 6. Some asm statements may need extra stack space for internal
137 calculations. This can be guaranteed by clobbering stack registers
138 unrelated to the inputs and outputs.
139
140 Here are a couple of reasonable asms to want to write. This asm
141 takes one input, which is internally popped, and produces two outputs.
142
143 asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
144
145 This asm takes two inputs, which are popped by the fyl2xp1 opcode,
146 and replaces them with one output. The user must code the "st(1)"
147 clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
148
149 asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
150
151 */
152 \f
153 #include "config.h"
154 #include "system.h"
155 #include "tree.h"
156 #include "rtl.h"
157 #include "tm_p.h"
158 #include "function.h"
159 #include "insn-config.h"
160 #include "regs.h"
161 #include "hard-reg-set.h"
162 #include "flags.h"
163 #include "insn-flags.h"
164 #include "toplev.h"
165 #include "recog.h"
166 #include "output.h"
167 #include "basic-block.h"
168 #include "varray.h"
169
170 #ifdef STACK_REGS
171
172 #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
173
174 /* This is the basic stack record. TOP is an index into REG[] such
175 that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
176
177 If TOP is -2, REG[] is not yet initialized. Stack initialization
178 consists of placing each live reg in array `reg' and setting `top'
179 appropriately.
180
181 REG_SET indicates which registers are live. */
182
183 typedef struct stack_def
184 {
185 int top; /* index to top stack element */
186 HARD_REG_SET reg_set; /* set of live registers */
187 char reg[REG_STACK_SIZE]; /* register - stack mapping */
188 } *stack;
189
190 /* This is used to carry information about basic blocks. It is
191 attached to the AUX field of the standard CFG block. */
192
193 typedef struct block_info_def
194 {
195 struct stack_def stack_in; /* Input stack configuration. */
196 HARD_REG_SET out_reg_set; /* Stack regs live on output. */
197 int done; /* True if block already converted. */
198 } *block_info;
199
200 #define BLOCK_INFO(B) ((block_info) (B)->aux)
201
202 /* Passed to change_stack to indicate where to emit insns. */
203 enum emit_where
204 {
205 EMIT_AFTER,
206 EMIT_BEFORE
207 };
208
209 /* We use this array to cache info about insns, because otherwise we
210 spend too much time in stack_regs_mentioned_p.
211
212 Indexed by insn UIDs. A value of zero is uninitialized, one indicates
213 the insn uses stack registers, two indicates the insn does not use
214 stack registers. */
215 static varray_type stack_regs_mentioned_data;
216
217 /* The block we're currently working on. */
218 static basic_block current_block;
219
220 /* This is the register file for all register after conversion */
221 static rtx
222 FP_mode_reg[LAST_STACK_REG+1-FIRST_STACK_REG][(int) MAX_MACHINE_MODE];
223
224 #define FP_MODE_REG(regno,mode) \
225 (FP_mode_reg[(regno)-FIRST_STACK_REG][(int)(mode)])
226
227 /* Used to initialize uninitialized registers. */
228 static rtx nan;
229
230 /* Forward declarations */
231
232 static int stack_regs_mentioned_p PROTO((rtx pat));
233 static void straighten_stack PROTO((rtx, stack));
234 static void pop_stack PROTO((stack, int));
235 static rtx *get_true_reg PROTO((rtx *));
236
237 static int check_asm_stack_operands PROTO((rtx));
238 static int get_asm_operand_n_inputs PROTO((rtx));
239 static rtx stack_result PROTO((tree));
240 static void replace_reg PROTO((rtx *, int));
241 static void remove_regno_note PROTO((rtx, enum reg_note, int));
242 static int get_hard_regnum PROTO((stack, rtx));
243 static void delete_insn_for_stacker PROTO((rtx));
244 static rtx emit_pop_insn PROTO((rtx, stack, rtx,
245 enum emit_where));
246 static void emit_swap_insn PROTO((rtx, stack, rtx));
247 static void move_for_stack_reg PROTO((rtx, stack, rtx));
248 static int swap_rtx_condition_1 PROTO((rtx));
249 static int swap_rtx_condition PROTO((rtx));
250 static void compare_for_stack_reg PROTO((rtx, stack, rtx));
251 static void subst_stack_regs_pat PROTO((rtx, stack, rtx));
252 static void subst_asm_stack_regs PROTO((rtx, stack));
253 static void subst_stack_regs PROTO((rtx, stack));
254 static void change_stack PROTO((rtx, stack, stack,
255 enum emit_where));
256 static int convert_regs_entry PROTO((void));
257 static void convert_regs_exit PROTO((void));
258 static int convert_regs_1 PROTO((FILE *, basic_block));
259 static int convert_regs_2 PROTO((FILE *, basic_block));
260 static int convert_regs PROTO((FILE *));
261 static void print_stack PROTO((FILE *, stack));
262 \f
263 /* Return non-zero if any stack register is mentioned somewhere within PAT. */
264
265 static int
266 stack_regs_mentioned_p (pat)
267 rtx pat;
268 {
269 register const char *fmt;
270 register int i;
271
272 if (STACK_REG_P (pat))
273 return 1;
274
275 fmt = GET_RTX_FORMAT (GET_CODE (pat));
276 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
277 {
278 if (fmt[i] == 'E')
279 {
280 register int j;
281
282 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
283 if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
284 return 1;
285 }
286 else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
287 return 1;
288 }
289
290 return 0;
291 }
292
293 /* Return nonzero if INSN mentions stacked registers, else return zero. */
294
295 int
296 stack_regs_mentioned (insn)
297 rtx insn;
298 {
299 unsigned int uid, max;
300 int test;
301
302 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
303 return 0;
304
305 uid = INSN_UID (insn);
306 max = VARRAY_SIZE (stack_regs_mentioned_data);
307 if (uid >= max)
308 {
309 /* Allocate some extra size to avoid too many reallocs, but
310 do not grow too quickly. */
311 max = uid + uid / 20;
312 VARRAY_GROW (stack_regs_mentioned_data, max);
313 }
314
315 test = VARRAY_CHAR (stack_regs_mentioned_data, uid);
316 if (test == 0)
317 {
318 /* This insn has yet to be examined. Do so now. */
319 test = stack_regs_mentioned_p (PATTERN (insn)) ? 1 : 2;
320 VARRAY_CHAR (stack_regs_mentioned_data, uid) = test;
321 }
322
323 return test == 1;
324 }
325 \f
326 static rtx ix86_flags_rtx;
327
328 static rtx
329 next_flags_user (insn)
330 rtx insn;
331 {
332 /* Search forward looking for the first use of this value.
333 Stop at block boundaries. */
334 /* ??? This really cries for BLOCK_END! */
335
336 while (1)
337 {
338 insn = NEXT_INSN (insn);
339 if (!insn)
340 return NULL_RTX;
341
342 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
343 && reg_mentioned_p (ix86_flags_rtx, PATTERN (insn)))
344 return insn;
345
346 if (GET_CODE (insn) == JUMP_INSN
347 || GET_CODE (insn) == CODE_LABEL
348 || GET_CODE (insn) == CALL_INSN)
349 return NULL_RTX;
350 }
351 }
352 \f
353 /* Reorganise the stack into ascending numbers,
354 after this insn. */
355
356 static void
357 straighten_stack (insn, regstack)
358 rtx insn;
359 stack regstack;
360 {
361 struct stack_def temp_stack;
362 int top;
363
364 /* If there is only a single register on the stack, then the stack is
365 already in increasing order and no reorganization is needed.
366
367 Similarly if the stack is empty. */
368 if (regstack->top <= 0)
369 return;
370
371 COPY_HARD_REG_SET (temp_stack.reg_set, regstack->reg_set);
372
373 for (top = temp_stack.top = regstack->top; top >= 0; top--)
374 temp_stack.reg[top] = FIRST_STACK_REG + temp_stack.top - top;
375
376 change_stack (insn, regstack, &temp_stack, EMIT_AFTER);
377 }
378
379 /* Pop a register from the stack */
380
381 static void
382 pop_stack (regstack, regno)
383 stack regstack;
384 int regno;
385 {
386 int top = regstack->top;
387
388 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
389 regstack->top--;
390 /* If regno was not at the top of stack then adjust stack */
391 if (regstack->reg [top] != regno)
392 {
393 int i;
394 for (i = regstack->top; i >= 0; i--)
395 if (regstack->reg [i] == regno)
396 {
397 int j;
398 for (j = i; j < top; j++)
399 regstack->reg [j] = regstack->reg [j + 1];
400 break;
401 }
402 }
403 }
404 \f
405 /* Convert register usage from "flat" register file usage to a "stack
406 register file. FIRST is the first insn in the function, FILE is the
407 dump file, if used.
408
409 Construct a CFG and run life analysis. Then convert each insn one
410 by one. Run a last jump_optimize pass, if optimizing, to eliminate
411 code duplication created when the converter inserts pop insns on
412 the edges. */
413
414 void
415 reg_to_stack (first, file)
416 rtx first;
417 FILE *file;
418 {
419 int i;
420 int max_uid;
421 block_info bi;
422
423 /* See if there is something to do. Flow analysis is quite
424 expensive so we might save some compilation time. */
425 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
426 if (regs_ever_live[i])
427 break;
428 if (i > LAST_STACK_REG)
429 return;
430
431 /* Ok, floating point instructions exist. If not optimizing,
432 build the CFG and run life analysis. */
433 find_basic_blocks (first, max_reg_num (), file, 0);
434 count_or_remove_death_notes (NULL, 1);
435 life_analysis (first, max_reg_num (), file, 0);
436
437 /* Set up block info for each basic block. */
438 bi = (block_info) xcalloc ((n_basic_blocks + 1), sizeof (*bi));
439 for (i = n_basic_blocks - 1; i >= 0; --i)
440 BASIC_BLOCK (i)->aux = bi + i;
441 EXIT_BLOCK_PTR->aux = bi + n_basic_blocks;
442
443 /* Create the replacement registers up front. */
444 for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
445 {
446 enum machine_mode mode;
447 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
448 mode != VOIDmode;
449 mode = GET_MODE_WIDER_MODE (mode))
450 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
451 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
452 mode != VOIDmode;
453 mode = GET_MODE_WIDER_MODE (mode))
454 FP_MODE_REG (i, mode) = gen_rtx_REG (mode, i);
455 }
456
457 ix86_flags_rtx = gen_rtx_REG (CCmode, FLAGS_REG);
458
459 /* A QNaN for initializing uninitialized variables.
460
461 ??? We can't load from constant memory in PIC mode, because
462 we're insertting these instructions before the prologue and
463 the PIC register hasn't been set up. In that case, fall back
464 on zero, which we can get from `ldz'. */
465
466 if (flag_pic)
467 nan = CONST0_RTX (SFmode);
468 else
469 {
470 nan = gen_lowpart (SFmode, GEN_INT (0x7fc00000));
471 nan = force_const_mem (SFmode, nan);
472 }
473
474 /* Allocate a cache for stack_regs_mentioned. */
475 max_uid = get_max_uid ();
476 VARRAY_CHAR_INIT (stack_regs_mentioned_data, max_uid + 1,
477 "stack_regs_mentioned cache");
478
479 if (convert_regs (file) && optimize)
480 {
481 jump_optimize (first, JUMP_CROSS_JUMP_DEATH_MATTERS,
482 !JUMP_NOOP_MOVES, !JUMP_AFTER_REGSCAN);
483 }
484
485 /* Clean up. */
486 VARRAY_FREE (stack_regs_mentioned_data);
487 free (bi);
488 }
489 \f
490 /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
491 label's chain of references, and note which insn contains each
492 reference. */
493
494 static void
495 record_label_references (insn, pat)
496 rtx insn, pat;
497 {
498 register enum rtx_code code = GET_CODE (pat);
499 register int i;
500 register const char *fmt;
501
502 if (code == LABEL_REF)
503 {
504 register rtx label = XEXP (pat, 0);
505 register rtx ref;
506
507 if (GET_CODE (label) != CODE_LABEL)
508 abort ();
509
510 /* If this is an undefined label, LABEL_REFS (label) contains
511 garbage. */
512 if (INSN_UID (label) == 0)
513 return;
514
515 /* Don't make a duplicate in the code_label's chain. */
516
517 for (ref = LABEL_REFS (label);
518 ref && ref != label;
519 ref = LABEL_NEXTREF (ref))
520 if (CONTAINING_INSN (ref) == insn)
521 return;
522
523 CONTAINING_INSN (pat) = insn;
524 LABEL_NEXTREF (pat) = LABEL_REFS (label);
525 LABEL_REFS (label) = pat;
526
527 return;
528 }
529
530 fmt = GET_RTX_FORMAT (code);
531 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
532 {
533 if (fmt[i] == 'e')
534 record_label_references (insn, XEXP (pat, i));
535 if (fmt[i] == 'E')
536 {
537 register int j;
538 for (j = 0; j < XVECLEN (pat, i); j++)
539 record_label_references (insn, XVECEXP (pat, i, j));
540 }
541 }
542 }
543 \f
544 /* Return a pointer to the REG expression within PAT. If PAT is not a
545 REG, possible enclosed by a conversion rtx, return the inner part of
546 PAT that stopped the search. */
547
548 static rtx *
549 get_true_reg (pat)
550 rtx *pat;
551 {
552 for (;;)
553 switch (GET_CODE (*pat))
554 {
555 case SUBREG:
556 /* Eliminate FP subregister accesses in favour of the
557 actual FP register in use. */
558 {
559 rtx subreg;
560 if (FP_REG_P (subreg = SUBREG_REG (*pat)))
561 {
562 *pat = FP_MODE_REG (REGNO (subreg) + SUBREG_WORD (*pat),
563 GET_MODE (subreg));
564 default:
565 return pat;
566 }
567 }
568 case FLOAT:
569 case FIX:
570 case FLOAT_EXTEND:
571 pat = & XEXP (*pat, 0);
572 }
573 }
574 \f
575 /* There are many rules that an asm statement for stack-like regs must
576 follow. Those rules are explained at the top of this file: the rule
577 numbers below refer to that explanation. */
578
579 static int
580 check_asm_stack_operands (insn)
581 rtx insn;
582 {
583 int i;
584 int n_clobbers;
585 int malformed_asm = 0;
586 rtx body = PATTERN (insn);
587
588 char reg_used_as_output[FIRST_PSEUDO_REGISTER];
589 char implicitly_dies[FIRST_PSEUDO_REGISTER];
590 int alt;
591
592 rtx *clobber_reg;
593 int n_inputs, n_outputs;
594
595 /* Find out what the constraints require. If no constraint
596 alternative matches, this asm is malformed. */
597 extract_insn (insn);
598 constrain_operands (1);
599 alt = which_alternative;
600
601 preprocess_constraints ();
602
603 n_inputs = get_asm_operand_n_inputs (body);
604 n_outputs = recog_data.n_operands - n_inputs;
605
606 if (alt < 0)
607 {
608 malformed_asm = 1;
609 /* Avoid further trouble with this insn. */
610 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
611 return 0;
612 }
613
614 /* Strip SUBREGs here to make the following code simpler. */
615 for (i = 0; i < recog_data.n_operands; i++)
616 if (GET_CODE (recog_data.operand[i]) == SUBREG
617 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
618 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
619
620 /* Set up CLOBBER_REG. */
621
622 n_clobbers = 0;
623
624 if (GET_CODE (body) == PARALLEL)
625 {
626 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
627
628 for (i = 0; i < XVECLEN (body, 0); i++)
629 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
630 {
631 rtx clobber = XVECEXP (body, 0, i);
632 rtx reg = XEXP (clobber, 0);
633
634 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
635 reg = SUBREG_REG (reg);
636
637 if (STACK_REG_P (reg))
638 {
639 clobber_reg[n_clobbers] = reg;
640 n_clobbers++;
641 }
642 }
643 }
644
645 /* Enforce rule #4: Output operands must specifically indicate which
646 reg an output appears in after an asm. "=f" is not allowed: the
647 operand constraints must select a class with a single reg.
648
649 Also enforce rule #5: Output operands must start at the top of
650 the reg-stack: output operands may not "skip" a reg. */
651
652 memset (reg_used_as_output, 0, sizeof (reg_used_as_output));
653 for (i = 0; i < n_outputs; i++)
654 if (STACK_REG_P (recog_data.operand[i]))
655 {
656 if (reg_class_size[(int) recog_op_alt[i][alt].class] != 1)
657 {
658 error_for_asm (insn, "Output constraint %d must specify a single register", i);
659 malformed_asm = 1;
660 }
661 else
662 reg_used_as_output[REGNO (recog_data.operand[i])] = 1;
663 }
664
665
666 /* Search for first non-popped reg. */
667 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
668 if (! reg_used_as_output[i])
669 break;
670
671 /* If there are any other popped regs, that's an error. */
672 for (; i < LAST_STACK_REG + 1; i++)
673 if (reg_used_as_output[i])
674 break;
675
676 if (i != LAST_STACK_REG + 1)
677 {
678 error_for_asm (insn, "Output regs must be grouped at top of stack");
679 malformed_asm = 1;
680 }
681
682 /* Enforce rule #2: All implicitly popped input regs must be closer
683 to the top of the reg-stack than any input that is not implicitly
684 popped. */
685
686 memset (implicitly_dies, 0, sizeof (implicitly_dies));
687 for (i = n_outputs; i < n_outputs + n_inputs; i++)
688 if (STACK_REG_P (recog_data.operand[i]))
689 {
690 /* An input reg is implicitly popped if it is tied to an
691 output, or if there is a CLOBBER for it. */
692 int j;
693
694 for (j = 0; j < n_clobbers; j++)
695 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
696 break;
697
698 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
699 implicitly_dies[REGNO (recog_data.operand[i])] = 1;
700 }
701
702 /* Search for first non-popped reg. */
703 for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
704 if (! implicitly_dies[i])
705 break;
706
707 /* If there are any other popped regs, that's an error. */
708 for (; i < LAST_STACK_REG + 1; i++)
709 if (implicitly_dies[i])
710 break;
711
712 if (i != LAST_STACK_REG + 1)
713 {
714 error_for_asm (insn,
715 "Implicitly popped regs must be grouped at top of stack");
716 malformed_asm = 1;
717 }
718
719 /* Enfore rule #3: If any input operand uses the "f" constraint, all
720 output constraints must use the "&" earlyclobber.
721
722 ??? Detect this more deterministically by having constrain_asm_operands
723 record any earlyclobber. */
724
725 for (i = n_outputs; i < n_outputs + n_inputs; i++)
726 if (recog_op_alt[i][alt].matches == -1)
727 {
728 int j;
729
730 for (j = 0; j < n_outputs; j++)
731 if (operands_match_p (recog_data.operand[j], recog_data.operand[i]))
732 {
733 error_for_asm (insn,
734 "Output operand %d must use `&' constraint", j);
735 malformed_asm = 1;
736 }
737 }
738
739 if (malformed_asm)
740 {
741 /* Avoid further trouble with this insn. */
742 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
743 return 0;
744 }
745
746 return 1;
747 }
748 \f
749 /* Calculate the number of inputs and outputs in BODY, an
750 asm_operands. N_OPERANDS is the total number of operands, and
751 N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
752 placed. */
753
754 static int
755 get_asm_operand_n_inputs (body)
756 rtx body;
757 {
758 if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
759 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
760
761 else if (GET_CODE (body) == ASM_OPERANDS)
762 return ASM_OPERANDS_INPUT_LENGTH (body);
763
764 else if (GET_CODE (body) == PARALLEL
765 && GET_CODE (XVECEXP (body, 0, 0)) == SET)
766 return ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
767
768 else if (GET_CODE (body) == PARALLEL
769 && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
770 return ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
771
772 abort ();
773 }
774
775 /* If current function returns its result in an fp stack register,
776 return the REG. Otherwise, return 0. */
777
778 static rtx
779 stack_result (decl)
780 tree decl;
781 {
782 rtx result;
783
784 /* If the value is supposed to be returned in memory, then clearly
785 it is not returned in a stack register. */
786 if (aggregate_value_p (DECL_RESULT (decl)))
787 return 0;
788
789 result = DECL_RTL (DECL_RESULT (decl));
790 /* ?!? What is this code supposed to do? Can this code actually
791 trigger if we kick out aggregates above? */
792 if (result != 0
793 && ! (GET_CODE (result) == REG
794 && REGNO (result) < FIRST_PSEUDO_REGISTER))
795 {
796 #ifdef FUNCTION_OUTGOING_VALUE
797 result
798 = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
799 #else
800 result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl);
801 #endif
802 }
803
804 return result != 0 && STACK_REG_P (result) ? result : 0;
805 }
806 \f
807
808 /*
809 * This section deals with stack register substitution, and forms the second
810 * pass over the RTL.
811 */
812
813 /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
814 the desired hard REGNO. */
815
816 static void
817 replace_reg (reg, regno)
818 rtx *reg;
819 int regno;
820 {
821 if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
822 || ! STACK_REG_P (*reg))
823 abort ();
824
825 switch (GET_MODE_CLASS (GET_MODE (*reg)))
826 {
827 default: abort ();
828 case MODE_FLOAT:
829 case MODE_COMPLEX_FLOAT:;
830 }
831
832 *reg = FP_MODE_REG (regno, GET_MODE (*reg));
833 }
834
835 /* Remove a note of type NOTE, which must be found, for register
836 number REGNO from INSN. Remove only one such note. */
837
838 static void
839 remove_regno_note (insn, note, regno)
840 rtx insn;
841 enum reg_note note;
842 int regno;
843 {
844 register rtx *note_link, this;
845
846 note_link = &REG_NOTES(insn);
847 for (this = *note_link; this; this = XEXP (this, 1))
848 if (REG_NOTE_KIND (this) == note
849 && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
850 {
851 *note_link = XEXP (this, 1);
852 return;
853 }
854 else
855 note_link = &XEXP (this, 1);
856
857 abort ();
858 }
859
860 /* Find the hard register number of virtual register REG in REGSTACK.
861 The hard register number is relative to the top of the stack. -1 is
862 returned if the register is not found. */
863
864 static int
865 get_hard_regnum (regstack, reg)
866 stack regstack;
867 rtx reg;
868 {
869 int i;
870
871 if (! STACK_REG_P (reg))
872 abort ();
873
874 for (i = regstack->top; i >= 0; i--)
875 if (regstack->reg[i] == REGNO (reg))
876 break;
877
878 return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
879 }
880
881 /* Delete INSN from the RTL. Mark the insn, but don't remove it from
882 the chain of insns. Doing so could confuse block_begin and block_end
883 if this were the only insn in the block. */
884
885 static void
886 delete_insn_for_stacker (insn)
887 rtx insn;
888 {
889 PUT_CODE (insn, NOTE);
890 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
891 NOTE_SOURCE_FILE (insn) = 0;
892 }
893 \f
894 /* Emit an insn to pop virtual register REG before or after INSN.
895 REGSTACK is the stack state after INSN and is updated to reflect this
896 pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
897 is represented as a SET whose destination is the register to be popped
898 and source is the top of stack. A death note for the top of stack
899 cases the movdf pattern to pop. */
900
901 static rtx
902 emit_pop_insn (insn, regstack, reg, where)
903 rtx insn;
904 stack regstack;
905 rtx reg;
906 enum emit_where where;
907 {
908 rtx pop_insn, pop_rtx;
909 int hard_regno;
910
911 hard_regno = get_hard_regnum (regstack, reg);
912
913 if (hard_regno < FIRST_STACK_REG)
914 abort ();
915
916 pop_rtx = gen_rtx_SET (VOIDmode, FP_MODE_REG (hard_regno, DFmode),
917 FP_MODE_REG (FIRST_STACK_REG, DFmode));
918
919 if (where == EMIT_AFTER)
920 pop_insn = emit_block_insn_after (pop_rtx, insn, current_block);
921 else
922 pop_insn = emit_block_insn_before (pop_rtx, insn, current_block);
923
924 REG_NOTES (pop_insn)
925 = gen_rtx_EXPR_LIST (REG_DEAD, FP_MODE_REG (FIRST_STACK_REG, DFmode),
926 REG_NOTES (pop_insn));
927
928 regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
929 = regstack->reg[regstack->top];
930 regstack->top -= 1;
931 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
932
933 return pop_insn;
934 }
935 \f
936 /* Emit an insn before or after INSN to swap virtual register REG with
937 the top of stack. REGSTACK is the stack state before the swap, and
938 is updated to reflect the swap. A swap insn is represented as a
939 PARALLEL of two patterns: each pattern moves one reg to the other.
940
941 If REG is already at the top of the stack, no insn is emitted. */
942
943 static void
944 emit_swap_insn (insn, regstack, reg)
945 rtx insn;
946 stack regstack;
947 rtx reg;
948 {
949 int hard_regno;
950 rtx swap_rtx;
951 int tmp, other_reg; /* swap regno temps */
952 rtx i1; /* the stack-reg insn prior to INSN */
953 rtx i1set = NULL_RTX; /* the SET rtx within I1 */
954
955 hard_regno = get_hard_regnum (regstack, reg);
956
957 if (hard_regno < FIRST_STACK_REG)
958 abort ();
959 if (hard_regno == FIRST_STACK_REG)
960 return;
961
962 other_reg = regstack->top - (hard_regno - FIRST_STACK_REG);
963
964 tmp = regstack->reg[other_reg];
965 regstack->reg[other_reg] = regstack->reg[regstack->top];
966 regstack->reg[regstack->top] = tmp;
967
968 /* Find the previous insn involving stack regs, but don't pass a
969 block boundary. */
970 i1 = NULL;
971 if (current_block && insn != current_block->head)
972 {
973 rtx tmp = PREV_INSN (insn);
974 while (tmp != current_block->head)
975 {
976 if (GET_CODE (tmp) == CODE_LABEL
977 || (GET_CODE (tmp) == NOTE
978 && NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BASIC_BLOCK)
979 || (GET_CODE (tmp) == INSN
980 && stack_regs_mentioned (tmp)))
981 {
982 i1 = tmp;
983 break;
984 }
985 tmp = PREV_INSN (tmp);
986 }
987 }
988
989 if (i1 != NULL_RTX
990 && (i1set = single_set (i1)) != NULL_RTX)
991 {
992 rtx i1src = *get_true_reg (&SET_SRC (i1set));
993 rtx i1dest = *get_true_reg (&SET_DEST (i1set));
994
995 /* If the previous register stack push was from the reg we are to
996 swap with, omit the swap. */
997
998 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG
999 && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1
1000 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1001 return;
1002
1003 /* If the previous insn wrote to the reg we are to swap with,
1004 omit the swap. */
1005
1006 if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno
1007 && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG
1008 && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX)
1009 return;
1010 }
1011
1012 swap_rtx = gen_swapxf (FP_MODE_REG (hard_regno, XFmode),
1013 FP_MODE_REG (FIRST_STACK_REG, XFmode));
1014
1015 if (i1)
1016 emit_block_insn_after (swap_rtx, i1, current_block);
1017 else if (current_block)
1018 {
1019 i1 = emit_insn_before (swap_rtx, current_block->head);
1020 current_block->head = i1;
1021 }
1022 else
1023 emit_insn_before (swap_rtx, insn);
1024 }
1025 \f
1026 /* Handle a move to or from a stack register in PAT, which is in INSN.
1027 REGSTACK is the current stack. */
1028
1029 static void
1030 move_for_stack_reg (insn, regstack, pat)
1031 rtx insn;
1032 stack regstack;
1033 rtx pat;
1034 {
1035 rtx *psrc = get_true_reg (&SET_SRC (pat));
1036 rtx *pdest = get_true_reg (&SET_DEST (pat));
1037 rtx src, dest;
1038 rtx note;
1039
1040 src = *psrc; dest = *pdest;
1041
1042 if (STACK_REG_P (src) && STACK_REG_P (dest))
1043 {
1044 /* Write from one stack reg to another. If SRC dies here, then
1045 just change the register mapping and delete the insn. */
1046
1047 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1048 if (note)
1049 {
1050 int i;
1051
1052 /* If this is a no-op move, there must not be a REG_DEAD note. */
1053 if (REGNO (src) == REGNO (dest))
1054 abort ();
1055
1056 for (i = regstack->top; i >= 0; i--)
1057 if (regstack->reg[i] == REGNO (src))
1058 break;
1059
1060 /* The source must be live, and the dest must be dead. */
1061 if (i < 0 || get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1062 abort ();
1063
1064 /* It is possible that the dest is unused after this insn.
1065 If so, just pop the src. */
1066
1067 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1068 {
1069 emit_pop_insn (insn, regstack, src, EMIT_AFTER);
1070
1071 delete_insn_for_stacker (insn);
1072 return;
1073 }
1074
1075 regstack->reg[i] = REGNO (dest);
1076
1077 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1078 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1079
1080 delete_insn_for_stacker (insn);
1081
1082 return;
1083 }
1084
1085 /* The source reg does not die. */
1086
1087 /* If this appears to be a no-op move, delete it, or else it
1088 will confuse the machine description output patterns. But if
1089 it is REG_UNUSED, we must pop the reg now, as per-insn processing
1090 for REG_UNUSED will not work for deleted insns. */
1091
1092 if (REGNO (src) == REGNO (dest))
1093 {
1094 if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1095 emit_pop_insn (insn, regstack, dest, EMIT_AFTER);
1096
1097 delete_insn_for_stacker (insn);
1098 return;
1099 }
1100
1101 /* The destination ought to be dead */
1102 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1103 abort ();
1104
1105 replace_reg (psrc, get_hard_regnum (regstack, src));
1106
1107 regstack->reg[++regstack->top] = REGNO (dest);
1108 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1109 replace_reg (pdest, FIRST_STACK_REG);
1110 }
1111 else if (STACK_REG_P (src))
1112 {
1113 /* Save from a stack reg to MEM, or possibly integer reg. Since
1114 only top of stack may be saved, emit an exchange first if
1115 needs be. */
1116
1117 emit_swap_insn (insn, regstack, src);
1118
1119 note = find_regno_note (insn, REG_DEAD, REGNO (src));
1120 if (note)
1121 {
1122 replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1123 regstack->top--;
1124 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (src));
1125 }
1126 else if (GET_MODE (src) == XFmode && regstack->top < REG_STACK_SIZE - 1)
1127 {
1128 /* A 387 cannot write an XFmode value to a MEM without
1129 clobbering the source reg. The output code can handle
1130 this by reading back the value from the MEM.
1131 But it is more efficient to use a temp register if one is
1132 available. Push the source value here if the register
1133 stack is not full, and then write the value to memory via
1134 a pop. */
1135 rtx push_rtx, push_insn;
1136 rtx top_stack_reg = FP_MODE_REG (FIRST_STACK_REG, XFmode);
1137
1138 push_rtx = gen_movxf (top_stack_reg, top_stack_reg);
1139 push_insn = emit_insn_before (push_rtx, insn);
1140 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_DEAD, top_stack_reg,
1141 REG_NOTES (insn));
1142 }
1143
1144 replace_reg (psrc, FIRST_STACK_REG);
1145 }
1146 else if (STACK_REG_P (dest))
1147 {
1148 /* Load from MEM, or possibly integer REG or constant, into the
1149 stack regs. The actual target is always the top of the
1150 stack. The stack mapping is changed to reflect that DEST is
1151 now at top of stack. */
1152
1153 /* The destination ought to be dead */
1154 if (get_hard_regnum (regstack, dest) >= FIRST_STACK_REG)
1155 abort ();
1156
1157 if (regstack->top >= REG_STACK_SIZE)
1158 abort ();
1159
1160 regstack->reg[++regstack->top] = REGNO (dest);
1161 SET_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1162 replace_reg (pdest, FIRST_STACK_REG);
1163 }
1164 else
1165 abort ();
1166 }
1167 \f
1168 /* Swap the condition on a branch, if there is one. Return true if we
1169 found a condition to swap. False if the condition was not used as
1170 such. */
1171
1172 static int
1173 swap_rtx_condition_1 (pat)
1174 rtx pat;
1175 {
1176 register const char *fmt;
1177 register int i, r = 0;
1178
1179 if (GET_RTX_CLASS (GET_CODE (pat)) == '<')
1180 {
1181 PUT_CODE (pat, swap_condition (GET_CODE (pat)));
1182 r = 1;
1183 }
1184 else
1185 {
1186 fmt = GET_RTX_FORMAT (GET_CODE (pat));
1187 for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
1188 {
1189 if (fmt[i] == 'E')
1190 {
1191 register int j;
1192
1193 for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
1194 r |= swap_rtx_condition_1 (XVECEXP (pat, i, j));
1195 }
1196 else if (fmt[i] == 'e')
1197 r |= swap_rtx_condition_1 (XEXP (pat, i));
1198 }
1199 }
1200
1201 return r;
1202 }
1203
1204 static int
1205 swap_rtx_condition (insn)
1206 rtx insn;
1207 {
1208 rtx pat = PATTERN (insn);
1209
1210 /* We're looking for a single set to cc0 or an HImode temporary. */
1211
1212 if (GET_CODE (pat) == SET
1213 && GET_CODE (SET_DEST (pat)) == REG
1214 && REGNO (SET_DEST (pat)) == FLAGS_REG)
1215 {
1216 insn = next_flags_user (insn);
1217 if (insn == NULL_RTX)
1218 return 0;
1219 pat = PATTERN (insn);
1220 }
1221
1222 /* See if this is, or ends in, a fnstsw, aka unspec 9. If so, we're
1223 not doing anything with the cc value right now. We may be able to
1224 search for one though. */
1225
1226 if (GET_CODE (pat) == SET
1227 && GET_CODE (SET_SRC (pat)) == UNSPEC
1228 && XINT (SET_SRC (pat), 1) == 9)
1229 {
1230 rtx dest = SET_DEST (pat);
1231
1232 /* Search forward looking for the first use of this value.
1233 Stop at block boundaries. */
1234 /* ??? This really cries for BLOCK_END! */
1235 while (1)
1236 {
1237 insn = NEXT_INSN (insn);
1238 if (insn == NULL_RTX)
1239 return 0;
1240 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1241 && reg_mentioned_p (dest, insn))
1242 break;
1243 if (GET_CODE (insn) == JUMP_INSN)
1244 return 0;
1245 if (GET_CODE (insn) == CODE_LABEL)
1246 return 0;
1247 }
1248
1249 /* So we've found the insn using this value. If it is anything
1250 other than sahf, aka unspec 10, or the value does not die
1251 (meaning we'd have to search further), then we must give up. */
1252 pat = PATTERN (insn);
1253 if (GET_CODE (pat) != SET
1254 || GET_CODE (SET_SRC (pat)) != UNSPEC
1255 || XINT (SET_SRC (pat), 1) != 10
1256 || ! dead_or_set_p (insn, dest))
1257 return 0;
1258
1259 /* Now we are prepared to handle this as a normal cc0 setter. */
1260 insn = next_flags_user (insn);
1261 if (insn == NULL_RTX)
1262 return 0;
1263 pat = PATTERN (insn);
1264 }
1265
1266 return swap_rtx_condition_1 (pat);
1267 }
1268
1269 /* Handle a comparison. Special care needs to be taken to avoid
1270 causing comparisons that a 387 cannot do correctly, such as EQ.
1271
1272 Also, a pop insn may need to be emitted. The 387 does have an
1273 `fcompp' insn that can pop two regs, but it is sometimes too expensive
1274 to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1275 set up. */
1276
1277 static void
1278 compare_for_stack_reg (insn, regstack, pat_src)
1279 rtx insn;
1280 stack regstack;
1281 rtx pat_src;
1282 {
1283 rtx *src1, *src2;
1284 rtx src1_note, src2_note;
1285 rtx flags_user;
1286
1287 src1 = get_true_reg (&XEXP (pat_src, 0));
1288 src2 = get_true_reg (&XEXP (pat_src, 1));
1289 flags_user = next_flags_user (insn);
1290
1291 /* ??? If fxch turns out to be cheaper than fstp, give priority to
1292 registers that die in this insn - move those to stack top first. */
1293 if ((! STACK_REG_P (*src1)
1294 || (STACK_REG_P (*src2)
1295 && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG))
1296 && swap_rtx_condition (insn))
1297 {
1298 rtx temp;
1299 temp = XEXP (pat_src, 0);
1300 XEXP (pat_src, 0) = XEXP (pat_src, 1);
1301 XEXP (pat_src, 1) = temp;
1302
1303 src1 = get_true_reg (&XEXP (pat_src, 0));
1304 src2 = get_true_reg (&XEXP (pat_src, 1));
1305
1306 INSN_CODE (insn) = -1;
1307 }
1308
1309 /* We will fix any death note later. */
1310
1311 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1312
1313 if (STACK_REG_P (*src2))
1314 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1315 else
1316 src2_note = NULL_RTX;
1317
1318 emit_swap_insn (insn, regstack, *src1);
1319
1320 replace_reg (src1, FIRST_STACK_REG);
1321
1322 if (STACK_REG_P (*src2))
1323 replace_reg (src2, get_hard_regnum (regstack, *src2));
1324
1325 if (src1_note)
1326 {
1327 pop_stack (regstack, REGNO (XEXP (src1_note, 0)));
1328 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1329 }
1330
1331 /* If the second operand dies, handle that. But if the operands are
1332 the same stack register, don't bother, because only one death is
1333 needed, and it was just handled. */
1334
1335 if (src2_note
1336 && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2)
1337 && REGNO (*src1) == REGNO (*src2)))
1338 {
1339 /* As a special case, two regs may die in this insn if src2 is
1340 next to top of stack and the top of stack also dies. Since
1341 we have already popped src1, "next to top of stack" is really
1342 at top (FIRST_STACK_REG) now. */
1343
1344 if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1345 && src1_note)
1346 {
1347 pop_stack (regstack, REGNO (XEXP (src2_note, 0)));
1348 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1349 }
1350 else
1351 {
1352 /* The 386 can only represent death of the first operand in
1353 the case handled above. In all other cases, emit a separate
1354 pop and remove the death note from here. */
1355
1356 /* link_cc0_insns (insn); */
1357
1358 remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1359
1360 emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1361 EMIT_AFTER);
1362 }
1363 }
1364 }
1365 \f
1366 /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1367 is the current register layout. */
1368
1369 static void
1370 subst_stack_regs_pat (insn, regstack, pat)
1371 rtx insn;
1372 stack regstack;
1373 rtx pat;
1374 {
1375 rtx *dest, *src;
1376
1377 switch (GET_CODE (pat))
1378 {
1379 case USE:
1380 /* Deaths in USE insns can happen in non optimizing compilation.
1381 Handle them by popping the dying register. */
1382 src = get_true_reg (&XEXP (pat, 0));
1383 if (STACK_REG_P (*src)
1384 && find_regno_note (insn, REG_DEAD, REGNO (*src)))
1385 {
1386 emit_pop_insn (insn, regstack, *src, EMIT_AFTER);
1387 return;
1388 }
1389 /* ??? Uninitialized USE should not happen. */
1390 else if (get_hard_regnum (regstack, *src) == -1)
1391 abort();
1392 break;
1393
1394 case CLOBBER:
1395 {
1396 rtx note;
1397
1398 dest = get_true_reg (&XEXP (pat, 0));
1399 if (STACK_REG_P (*dest))
1400 {
1401 note = find_reg_note (insn, REG_DEAD, *dest);
1402
1403 if (pat != PATTERN (insn))
1404 {
1405 /* The fix_truncdi_1 pattern wants to be able to allocate
1406 it's own scratch register. It does this by clobbering
1407 an fp reg so that it is assured of an empty reg-stack
1408 register. If the register is live, kill it now.
1409 Remove the DEAD/UNUSED note so we don't try to kill it
1410 later too. */
1411
1412 if (note)
1413 emit_pop_insn (insn, regstack, *dest, EMIT_BEFORE);
1414 else
1415 {
1416 note = find_reg_note (insn, REG_UNUSED, *dest);
1417 if (!note)
1418 abort ();
1419 }
1420 remove_note (insn, note);
1421 replace_reg (dest, LAST_STACK_REG);
1422 }
1423 else
1424 {
1425 /* A top-level clobber with no REG_DEAD, and no hard-regnum
1426 indicates an uninitialized value. Because reload removed
1427 all other clobbers, this must be due to a function
1428 returning without a value. Load up a NaN. */
1429
1430 if (! note
1431 && get_hard_regnum (regstack, *dest) == -1)
1432 {
1433 pat = gen_rtx_SET (VOIDmode,
1434 FP_MODE_REG (REGNO (*dest), SFmode),
1435 nan);
1436 PATTERN (insn) = pat;
1437 move_for_stack_reg (insn, regstack, pat);
1438 }
1439 }
1440 }
1441 break;
1442 }
1443
1444 case SET:
1445 {
1446 rtx *src1 = (rtx *) NULL_PTR, *src2;
1447 rtx src1_note, src2_note;
1448 rtx pat_src;
1449
1450 dest = get_true_reg (&SET_DEST (pat));
1451 src = get_true_reg (&SET_SRC (pat));
1452 pat_src = SET_SRC (pat);
1453
1454 /* See if this is a `movM' pattern, and handle elsewhere if so. */
1455 if (STACK_REG_P (*src)
1456 || (STACK_REG_P (*dest)
1457 && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1458 || GET_CODE (*src) == CONST_DOUBLE)))
1459 {
1460 move_for_stack_reg (insn, regstack, pat);
1461 break;
1462 }
1463
1464 switch (GET_CODE (pat_src))
1465 {
1466 case COMPARE:
1467 compare_for_stack_reg (insn, regstack, pat_src);
1468 break;
1469
1470 case CALL:
1471 {
1472 int count;
1473 for (count = HARD_REGNO_NREGS (REGNO (*dest), GET_MODE (*dest));
1474 --count >= 0;)
1475 {
1476 regstack->reg[++regstack->top] = REGNO (*dest) + count;
1477 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest) + count);
1478 }
1479 }
1480 replace_reg (dest, FIRST_STACK_REG);
1481 break;
1482
1483 case REG:
1484 /* This is a `tstM2' case. */
1485 if (*dest != cc0_rtx)
1486 abort ();
1487 src1 = src;
1488
1489 /* Fall through. */
1490
1491 case FLOAT_TRUNCATE:
1492 case SQRT:
1493 case ABS:
1494 case NEG:
1495 /* These insns only operate on the top of the stack. DEST might
1496 be cc0_rtx if we're processing a tstM pattern. Also, it's
1497 possible that the tstM case results in a REG_DEAD note on the
1498 source. */
1499
1500 if (src1 == 0)
1501 src1 = get_true_reg (&XEXP (pat_src, 0));
1502
1503 emit_swap_insn (insn, regstack, *src1);
1504
1505 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1506
1507 if (STACK_REG_P (*dest))
1508 replace_reg (dest, FIRST_STACK_REG);
1509
1510 if (src1_note)
1511 {
1512 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1513 regstack->top--;
1514 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1515 }
1516
1517 replace_reg (src1, FIRST_STACK_REG);
1518 break;
1519
1520 case MINUS:
1521 case DIV:
1522 /* On i386, reversed forms of subM3 and divM3 exist for
1523 MODE_FLOAT, so the same code that works for addM3 and mulM3
1524 can be used. */
1525 case MULT:
1526 case PLUS:
1527 /* These insns can accept the top of stack as a destination
1528 from a stack reg or mem, or can use the top of stack as a
1529 source and some other stack register (possibly top of stack)
1530 as a destination. */
1531
1532 src1 = get_true_reg (&XEXP (pat_src, 0));
1533 src2 = get_true_reg (&XEXP (pat_src, 1));
1534
1535 /* We will fix any death note later. */
1536
1537 if (STACK_REG_P (*src1))
1538 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1539 else
1540 src1_note = NULL_RTX;
1541 if (STACK_REG_P (*src2))
1542 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1543 else
1544 src2_note = NULL_RTX;
1545
1546 /* If either operand is not a stack register, then the dest
1547 must be top of stack. */
1548
1549 if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1550 emit_swap_insn (insn, regstack, *dest);
1551 else
1552 {
1553 /* Both operands are REG. If neither operand is already
1554 at the top of stack, choose to make the one that is the dest
1555 the new top of stack. */
1556
1557 int src1_hard_regnum, src2_hard_regnum;
1558
1559 src1_hard_regnum = get_hard_regnum (regstack, *src1);
1560 src2_hard_regnum = get_hard_regnum (regstack, *src2);
1561 if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1562 abort ();
1563
1564 if (src1_hard_regnum != FIRST_STACK_REG
1565 && src2_hard_regnum != FIRST_STACK_REG)
1566 emit_swap_insn (insn, regstack, *dest);
1567 }
1568
1569 if (STACK_REG_P (*src1))
1570 replace_reg (src1, get_hard_regnum (regstack, *src1));
1571 if (STACK_REG_P (*src2))
1572 replace_reg (src2, get_hard_regnum (regstack, *src2));
1573
1574 if (src1_note)
1575 {
1576 rtx src1_reg = XEXP (src1_note, 0);
1577
1578 /* If the register that dies is at the top of stack, then
1579 the destination is somewhere else - merely substitute it.
1580 But if the reg that dies is not at top of stack, then
1581 move the top of stack to the dead reg, as though we had
1582 done the insn and then a store-with-pop. */
1583
1584 if (REGNO (src1_reg) == regstack->reg[regstack->top])
1585 {
1586 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1587 replace_reg (dest, get_hard_regnum (regstack, *dest));
1588 }
1589 else
1590 {
1591 int regno = get_hard_regnum (regstack, src1_reg);
1592
1593 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1594 replace_reg (dest, regno);
1595
1596 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1597 = regstack->reg[regstack->top];
1598 }
1599
1600 CLEAR_HARD_REG_BIT (regstack->reg_set,
1601 REGNO (XEXP (src1_note, 0)));
1602 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1603 regstack->top--;
1604 }
1605 else if (src2_note)
1606 {
1607 rtx src2_reg = XEXP (src2_note, 0);
1608 if (REGNO (src2_reg) == regstack->reg[regstack->top])
1609 {
1610 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1611 replace_reg (dest, get_hard_regnum (regstack, *dest));
1612 }
1613 else
1614 {
1615 int regno = get_hard_regnum (regstack, src2_reg);
1616
1617 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1618 replace_reg (dest, regno);
1619
1620 regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1621 = regstack->reg[regstack->top];
1622 }
1623
1624 CLEAR_HARD_REG_BIT (regstack->reg_set,
1625 REGNO (XEXP (src2_note, 0)));
1626 replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
1627 regstack->top--;
1628 }
1629 else
1630 {
1631 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1632 replace_reg (dest, get_hard_regnum (regstack, *dest));
1633 }
1634 break;
1635
1636 case UNSPEC:
1637 switch (XINT (pat_src, 1))
1638 {
1639 case 1: /* sin */
1640 case 2: /* cos */
1641 /* These insns only operate on the top of the stack. */
1642
1643 src1 = get_true_reg (&XVECEXP (pat_src, 0, 0));
1644
1645 emit_swap_insn (insn, regstack, *src1);
1646
1647 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1648
1649 if (STACK_REG_P (*dest))
1650 replace_reg (dest, FIRST_STACK_REG);
1651
1652 if (src1_note)
1653 {
1654 replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1655 regstack->top--;
1656 CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1657 }
1658
1659 replace_reg (src1, FIRST_STACK_REG);
1660 break;
1661
1662 case 10:
1663 /* (unspec [(unspec [(compare ..)] 9)] 10)
1664 Unspec 9 is fnstsw; unspec 10 is sahf. The combination
1665 matches the PPRO fcomi instruction. */
1666
1667 pat_src = XVECEXP (pat_src, 0, 0);
1668 if (GET_CODE (pat_src) != UNSPEC
1669 || XINT (pat_src, 1) != 9)
1670 abort ();
1671 /* FALLTHRU */
1672
1673 case 9:
1674 /* (unspec [(compare ..)] 9) */
1675 /* Combined fcomp+fnstsw generated for doing well with
1676 CSE. When optimizing this would have been broken
1677 up before now. */
1678
1679 pat_src = XVECEXP (pat_src, 0, 0);
1680 if (GET_CODE (pat_src) != COMPARE)
1681 abort ();
1682
1683 compare_for_stack_reg (insn, regstack, pat_src);
1684 break;
1685
1686 default:
1687 abort ();
1688 }
1689 break;
1690
1691 case IF_THEN_ELSE:
1692 /* This insn requires the top of stack to be the destination. */
1693
1694 /* If the comparison operator is an FP comparison operator,
1695 it is handled correctly by compare_for_stack_reg () who
1696 will move the destination to the top of stack. But if the
1697 comparison operator is not an FP comparison operator, we
1698 have to handle it here. */
1699 if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG
1700 && REGNO (*dest) != regstack->reg[regstack->top])
1701 emit_swap_insn (insn, regstack, *dest);
1702
1703 src1 = get_true_reg (&XEXP (pat_src, 1));
1704 src2 = get_true_reg (&XEXP (pat_src, 2));
1705
1706 src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1707 src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1708
1709 {
1710 rtx src_note [3];
1711 int i;
1712
1713 src_note[0] = 0;
1714 src_note[1] = src1_note;
1715 src_note[2] = src2_note;
1716
1717 if (STACK_REG_P (*src1))
1718 replace_reg (src1, get_hard_regnum (regstack, *src1));
1719 if (STACK_REG_P (*src2))
1720 replace_reg (src2, get_hard_regnum (regstack, *src2));
1721
1722 for (i = 1; i <= 2; i++)
1723 if (src_note [i])
1724 {
1725 int regno = REGNO (XEXP (src_note[i], 0));
1726
1727 /* If the register that dies is not at the top of
1728 stack, then move the top of stack to the dead reg */
1729 if (regno != regstack->reg[regstack->top])
1730 {
1731 remove_regno_note (insn, REG_DEAD, regno);
1732 emit_pop_insn (insn, regstack, XEXP (src_note[i], 0),
1733 EMIT_AFTER);
1734 }
1735 else
1736 {
1737 CLEAR_HARD_REG_BIT (regstack->reg_set, regno);
1738 replace_reg (&XEXP (src_note[i], 0), FIRST_STACK_REG);
1739 regstack->top--;
1740 }
1741 }
1742 }
1743
1744 /* Make dest the top of stack. Add dest to regstack if
1745 not present. */
1746 if (get_hard_regnum (regstack, *dest) < FIRST_STACK_REG)
1747 regstack->reg[++regstack->top] = REGNO (*dest);
1748 SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1749 replace_reg (dest, FIRST_STACK_REG);
1750 break;
1751
1752 default:
1753 abort ();
1754 }
1755 break;
1756 }
1757
1758 default:
1759 break;
1760 }
1761 }
1762 \f
1763 /* Substitute hard regnums for any stack regs in INSN, which has
1764 N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
1765 before the insn, and is updated with changes made here.
1766
1767 There are several requirements and assumptions about the use of
1768 stack-like regs in asm statements. These rules are enforced by
1769 record_asm_stack_regs; see comments there for details. Any
1770 asm_operands left in the RTL at this point may be assume to meet the
1771 requirements, since record_asm_stack_regs removes any problem asm. */
1772
1773 static void
1774 subst_asm_stack_regs (insn, regstack)
1775 rtx insn;
1776 stack regstack;
1777 {
1778 rtx body = PATTERN (insn);
1779 int alt;
1780
1781 rtx *note_reg; /* Array of note contents */
1782 rtx **note_loc; /* Address of REG field of each note */
1783 enum reg_note *note_kind; /* The type of each note */
1784
1785 rtx *clobber_reg;
1786 rtx **clobber_loc;
1787
1788 struct stack_def temp_stack;
1789 int n_notes;
1790 int n_clobbers;
1791 rtx note;
1792 int i;
1793 int n_inputs, n_outputs;
1794
1795 if (! check_asm_stack_operands (insn))
1796 return;
1797
1798 /* Find out what the constraints required. If no constraint
1799 alternative matches, that is a compiler bug: we should have caught
1800 such an insn in check_asm_stack_operands. */
1801 extract_insn (insn);
1802 constrain_operands (1);
1803 alt = which_alternative;
1804
1805 preprocess_constraints ();
1806
1807 n_inputs = get_asm_operand_n_inputs (body);
1808 n_outputs = recog_data.n_operands - n_inputs;
1809
1810 if (alt < 0)
1811 abort ();
1812
1813 /* Strip SUBREGs here to make the following code simpler. */
1814 for (i = 0; i < recog_data.n_operands; i++)
1815 if (GET_CODE (recog_data.operand[i]) == SUBREG
1816 && GET_CODE (SUBREG_REG (recog_data.operand[i])) == REG)
1817 {
1818 recog_data.operand_loc[i] = & SUBREG_REG (recog_data.operand[i]);
1819 recog_data.operand[i] = SUBREG_REG (recog_data.operand[i]);
1820 }
1821
1822 /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
1823
1824 for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
1825 i++;
1826
1827 note_reg = (rtx *) alloca (i * sizeof (rtx));
1828 note_loc = (rtx **) alloca (i * sizeof (rtx *));
1829 note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
1830
1831 n_notes = 0;
1832 for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
1833 {
1834 rtx reg = XEXP (note, 0);
1835 rtx *loc = & XEXP (note, 0);
1836
1837 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1838 {
1839 loc = & SUBREG_REG (reg);
1840 reg = SUBREG_REG (reg);
1841 }
1842
1843 if (STACK_REG_P (reg)
1844 && (REG_NOTE_KIND (note) == REG_DEAD
1845 || REG_NOTE_KIND (note) == REG_UNUSED))
1846 {
1847 note_reg[n_notes] = reg;
1848 note_loc[n_notes] = loc;
1849 note_kind[n_notes] = REG_NOTE_KIND (note);
1850 n_notes++;
1851 }
1852 }
1853
1854 /* Set up CLOBBER_REG and CLOBBER_LOC. */
1855
1856 n_clobbers = 0;
1857
1858 if (GET_CODE (body) == PARALLEL)
1859 {
1860 clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx));
1861 clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1862
1863 for (i = 0; i < XVECLEN (body, 0); i++)
1864 if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
1865 {
1866 rtx clobber = XVECEXP (body, 0, i);
1867 rtx reg = XEXP (clobber, 0);
1868 rtx *loc = & XEXP (clobber, 0);
1869
1870 if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
1871 {
1872 loc = & SUBREG_REG (reg);
1873 reg = SUBREG_REG (reg);
1874 }
1875
1876 if (STACK_REG_P (reg))
1877 {
1878 clobber_reg[n_clobbers] = reg;
1879 clobber_loc[n_clobbers] = loc;
1880 n_clobbers++;
1881 }
1882 }
1883 }
1884
1885 temp_stack = *regstack;
1886
1887 /* Put the input regs into the desired place in TEMP_STACK. */
1888
1889 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1890 if (STACK_REG_P (recog_data.operand[i])
1891 && reg_class_subset_p (recog_op_alt[i][alt].class,
1892 FLOAT_REGS)
1893 && recog_op_alt[i][alt].class != FLOAT_REGS)
1894 {
1895 /* If an operand needs to be in a particular reg in
1896 FLOAT_REGS, the constraint was either 't' or 'u'. Since
1897 these constraints are for single register classes, and
1898 reload guaranteed that operand[i] is already in that class,
1899 we can just use REGNO (recog_data.operand[i]) to know which
1900 actual reg this operand needs to be in. */
1901
1902 int regno = get_hard_regnum (&temp_stack, recog_data.operand[i]);
1903
1904 if (regno < 0)
1905 abort ();
1906
1907 if (regno != REGNO (recog_data.operand[i]))
1908 {
1909 /* recog_data.operand[i] is not in the right place. Find
1910 it and swap it with whatever is already in I's place.
1911 K is where recog_data.operand[i] is now. J is where it
1912 should be. */
1913 int j, k, temp;
1914
1915 k = temp_stack.top - (regno - FIRST_STACK_REG);
1916 j = (temp_stack.top
1917 - (REGNO (recog_data.operand[i]) - FIRST_STACK_REG));
1918
1919 temp = temp_stack.reg[k];
1920 temp_stack.reg[k] = temp_stack.reg[j];
1921 temp_stack.reg[j] = temp;
1922 }
1923 }
1924
1925 /* Emit insns before INSN to make sure the reg-stack is in the right
1926 order. */
1927
1928 change_stack (insn, regstack, &temp_stack, EMIT_BEFORE);
1929
1930 /* Make the needed input register substitutions. Do death notes and
1931 clobbers too, because these are for inputs, not outputs. */
1932
1933 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1934 if (STACK_REG_P (recog_data.operand[i]))
1935 {
1936 int regnum = get_hard_regnum (regstack, recog_data.operand[i]);
1937
1938 if (regnum < 0)
1939 abort ();
1940
1941 replace_reg (recog_data.operand_loc[i], regnum);
1942 }
1943
1944 for (i = 0; i < n_notes; i++)
1945 if (note_kind[i] == REG_DEAD)
1946 {
1947 int regnum = get_hard_regnum (regstack, note_reg[i]);
1948
1949 if (regnum < 0)
1950 abort ();
1951
1952 replace_reg (note_loc[i], regnum);
1953 }
1954
1955 for (i = 0; i < n_clobbers; i++)
1956 {
1957 /* It's OK for a CLOBBER to reference a reg that is not live.
1958 Don't try to replace it in that case. */
1959 int regnum = get_hard_regnum (regstack, clobber_reg[i]);
1960
1961 if (regnum >= 0)
1962 {
1963 /* Sigh - clobbers always have QImode. But replace_reg knows
1964 that these regs can't be MODE_INT and will abort. Just put
1965 the right reg there without calling replace_reg. */
1966
1967 *clobber_loc[i] = FP_MODE_REG (regnum, DFmode);
1968 }
1969 }
1970
1971 /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
1972
1973 for (i = n_outputs; i < n_outputs + n_inputs; i++)
1974 if (STACK_REG_P (recog_data.operand[i]))
1975 {
1976 /* An input reg is implicitly popped if it is tied to an
1977 output, or if there is a CLOBBER for it. */
1978 int j;
1979
1980 for (j = 0; j < n_clobbers; j++)
1981 if (operands_match_p (clobber_reg[j], recog_data.operand[i]))
1982 break;
1983
1984 if (j < n_clobbers || recog_op_alt[i][alt].matches >= 0)
1985 {
1986 /* recog_data.operand[i] might not be at the top of stack.
1987 But that's OK, because all we need to do is pop the
1988 right number of regs off of the top of the reg-stack.
1989 record_asm_stack_regs guaranteed that all implicitly
1990 popped regs were grouped at the top of the reg-stack. */
1991
1992 CLEAR_HARD_REG_BIT (regstack->reg_set,
1993 regstack->reg[regstack->top]);
1994 regstack->top--;
1995 }
1996 }
1997
1998 /* Now add to REGSTACK any outputs that the asm implicitly pushed.
1999 Note that there isn't any need to substitute register numbers.
2000 ??? Explain why this is true. */
2001
2002 for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2003 {
2004 /* See if there is an output for this hard reg. */
2005 int j;
2006
2007 for (j = 0; j < n_outputs; j++)
2008 if (STACK_REG_P (recog_data.operand[j])
2009 && REGNO (recog_data.operand[j]) == i)
2010 {
2011 regstack->reg[++regstack->top] = i;
2012 SET_HARD_REG_BIT (regstack->reg_set, i);
2013 break;
2014 }
2015 }
2016
2017 /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2018 input that the asm didn't implicitly pop. If the asm didn't
2019 implicitly pop an input reg, that reg will still be live.
2020
2021 Note that we can't use find_regno_note here: the register numbers
2022 in the death notes have already been substituted. */
2023
2024 for (i = 0; i < n_outputs; i++)
2025 if (STACK_REG_P (recog_data.operand[i]))
2026 {
2027 int j;
2028
2029 for (j = 0; j < n_notes; j++)
2030 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2031 && note_kind[j] == REG_UNUSED)
2032 {
2033 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2034 EMIT_AFTER);
2035 break;
2036 }
2037 }
2038
2039 for (i = n_outputs; i < n_outputs + n_inputs; i++)
2040 if (STACK_REG_P (recog_data.operand[i]))
2041 {
2042 int j;
2043
2044 for (j = 0; j < n_notes; j++)
2045 if (REGNO (recog_data.operand[i]) == REGNO (note_reg[j])
2046 && note_kind[j] == REG_DEAD
2047 && TEST_HARD_REG_BIT (regstack->reg_set,
2048 REGNO (recog_data.operand[i])))
2049 {
2050 insn = emit_pop_insn (insn, regstack, recog_data.operand[i],
2051 EMIT_AFTER);
2052 break;
2053 }
2054 }
2055 }
2056 \f
2057 /* Substitute stack hard reg numbers for stack virtual registers in
2058 INSN. Non-stack register numbers are not changed. REGSTACK is the
2059 current stack content. Insns may be emitted as needed to arrange the
2060 stack for the 387 based on the contents of the insn. */
2061
2062 static void
2063 subst_stack_regs (insn, regstack)
2064 rtx insn;
2065 stack regstack;
2066 {
2067 register rtx *note_link, note;
2068 register int i;
2069
2070 if (GET_CODE (insn) == CALL_INSN)
2071 {
2072 int top = regstack->top;
2073
2074 /* If there are any floating point parameters to be passed in
2075 registers for this call, make sure they are in the right
2076 order. */
2077
2078 if (top >= 0)
2079 {
2080 straighten_stack (PREV_INSN (insn), regstack);
2081
2082 /* Now mark the arguments as dead after the call. */
2083
2084 while (regstack->top >= 0)
2085 {
2086 CLEAR_HARD_REG_BIT (regstack->reg_set, FIRST_STACK_REG + regstack->top);
2087 regstack->top--;
2088 }
2089 }
2090 }
2091
2092 /* Do the actual substitution if any stack regs are mentioned.
2093 Since we only record whether entire insn mentions stack regs, and
2094 subst_stack_regs_pat only works for patterns that contain stack regs,
2095 we must check each pattern in a parallel here. A call_value_pop could
2096 fail otherwise. */
2097
2098 if (stack_regs_mentioned (insn))
2099 {
2100 int n_operands = asm_noperands (PATTERN (insn));
2101 if (n_operands >= 0)
2102 {
2103 /* This insn is an `asm' with operands. Decode the operands,
2104 decide how many are inputs, and do register substitution.
2105 Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2106
2107 subst_asm_stack_regs (insn, regstack);
2108 return;
2109 }
2110
2111 if (GET_CODE (PATTERN (insn)) == PARALLEL)
2112 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
2113 {
2114 if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2115 subst_stack_regs_pat (insn, regstack,
2116 XVECEXP (PATTERN (insn), 0, i));
2117 }
2118 else
2119 subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2120 }
2121
2122 /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2123 REG_UNUSED will already have been dealt with, so just return. */
2124
2125 if (GET_CODE (insn) == NOTE)
2126 return;
2127
2128 /* If there is a REG_UNUSED note on a stack register on this insn,
2129 the indicated reg must be popped. The REG_UNUSED note is removed,
2130 since the form of the newly emitted pop insn references the reg,
2131 making it no longer `unset'. */
2132
2133 note_link = &REG_NOTES(insn);
2134 for (note = *note_link; note; note = XEXP (note, 1))
2135 if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2136 {
2137 *note_link = XEXP (note, 1);
2138 insn = emit_pop_insn (insn, regstack, XEXP (note, 0), EMIT_AFTER);
2139 }
2140 else
2141 note_link = &XEXP (note, 1);
2142 }
2143 \f
2144 /* Change the organization of the stack so that it fits a new basic
2145 block. Some registers might have to be popped, but there can never be
2146 a register live in the new block that is not now live.
2147
2148 Insert any needed insns before or after INSN, as indicated by
2149 WHERE. OLD is the original stack layout, and NEW is the desired
2150 form. OLD is updated to reflect the code emitted, ie, it will be
2151 the same as NEW upon return.
2152
2153 This function will not preserve block_end[]. But that information
2154 is no longer needed once this has executed. */
2155
2156 static void
2157 change_stack (insn, old, new, where)
2158 rtx insn;
2159 stack old;
2160 stack new;
2161 enum emit_where where;
2162 {
2163 int reg;
2164 int update_end = 0;
2165
2166 /* We will be inserting new insns "backwards". If we are to insert
2167 after INSN, find the next insn, and insert before it. */
2168
2169 if (where == EMIT_AFTER)
2170 {
2171 if (current_block && current_block->end == insn)
2172 update_end = 1;
2173 insn = NEXT_INSN (insn);
2174 }
2175
2176 /* Pop any registers that are not needed in the new block. */
2177
2178 for (reg = old->top; reg >= 0; reg--)
2179 if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2180 emit_pop_insn (insn, old, FP_MODE_REG (old->reg[reg], DFmode),
2181 EMIT_BEFORE);
2182
2183 if (new->top == -2)
2184 {
2185 /* If the new block has never been processed, then it can inherit
2186 the old stack order. */
2187
2188 new->top = old->top;
2189 memcpy (new->reg, old->reg, sizeof (new->reg));
2190 }
2191 else
2192 {
2193 /* This block has been entered before, and we must match the
2194 previously selected stack order. */
2195
2196 /* By now, the only difference should be the order of the stack,
2197 not their depth or liveliness. */
2198
2199 GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2200 abort ();
2201 win:
2202 if (old->top != new->top)
2203 abort ();
2204
2205 /* If the stack is not empty (new->top != -1), loop here emitting
2206 swaps until the stack is correct.
2207
2208 The worst case number of swaps emitted is N + 2, where N is the
2209 depth of the stack. In some cases, the reg at the top of
2210 stack may be correct, but swapped anyway in order to fix
2211 other regs. But since we never swap any other reg away from
2212 its correct slot, this algorithm will converge. */
2213
2214 if (new->top != -1)
2215 do
2216 {
2217 /* Swap the reg at top of stack into the position it is
2218 supposed to be in, until the correct top of stack appears. */
2219
2220 while (old->reg[old->top] != new->reg[new->top])
2221 {
2222 for (reg = new->top; reg >= 0; reg--)
2223 if (new->reg[reg] == old->reg[old->top])
2224 break;
2225
2226 if (reg == -1)
2227 abort ();
2228
2229 emit_swap_insn (insn, old,
2230 FP_MODE_REG (old->reg[reg], DFmode));
2231 }
2232
2233 /* See if any regs remain incorrect. If so, bring an
2234 incorrect reg to the top of stack, and let the while loop
2235 above fix it. */
2236
2237 for (reg = new->top; reg >= 0; reg--)
2238 if (new->reg[reg] != old->reg[reg])
2239 {
2240 emit_swap_insn (insn, old,
2241 FP_MODE_REG (old->reg[reg], DFmode));
2242 break;
2243 }
2244 } while (reg >= 0);
2245
2246 /* At this point there must be no differences. */
2247
2248 for (reg = old->top; reg >= 0; reg--)
2249 if (old->reg[reg] != new->reg[reg])
2250 abort ();
2251 }
2252
2253 if (update_end)
2254 current_block->end = PREV_INSN (insn);
2255 }
2256 \f
2257 /* Print stack configuration. */
2258
2259 static void
2260 print_stack (file, s)
2261 FILE *file;
2262 stack s;
2263 {
2264 if (! file)
2265 return;
2266
2267 if (s->top == -2)
2268 fprintf (file, "uninitialized\n");
2269 else if (s->top == -1)
2270 fprintf (file, "empty\n");
2271 else
2272 {
2273 int i;
2274 fputs ("[ ", file);
2275 for (i = 0; i <= s->top; ++i)
2276 fprintf (file, "%d ", s->reg[i]);
2277 fputs ("]\n", file);
2278 }
2279 }
2280 \f
2281 /* This function was doing life analysis. We now let the regular live
2282 code do it's job, so we only need to check some extra invariants
2283 that reg-stack expects. Primary among these being that all registers
2284 are initialized before use.
2285
2286 The function returns true when code was emitted to CFG edges and
2287 commit_edge_insertions needs to be called. */
2288
2289 static int
2290 convert_regs_entry ()
2291 {
2292 int inserted = 0, i;
2293 edge e;
2294
2295 for (i = n_basic_blocks - 1; i >= 0; --i)
2296 {
2297 basic_block block = BASIC_BLOCK (i);
2298 block_info bi = BLOCK_INFO (block);
2299 int reg;
2300
2301 /* Set current register status at last instruction `uninitialized'. */
2302 bi->stack_in.top = -2;
2303
2304 /* Copy live_at_end and live_at_start into temporaries. */
2305 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; reg++)
2306 {
2307 if (REGNO_REG_SET_P (block->global_live_at_end, reg))
2308 SET_HARD_REG_BIT (bi->out_reg_set, reg);
2309 if (REGNO_REG_SET_P (block->global_live_at_start, reg))
2310 SET_HARD_REG_BIT (bi->stack_in.reg_set, reg);
2311 }
2312 }
2313
2314 /* Load something into each stack register live at function entry.
2315 Such live registers can be caused by uninitialized variables or
2316 functions not returning values on all paths. In order to keep
2317 the push/pop code happy, and to not scrog the register stack, we
2318 must put something in these registers. Use a QNaN.
2319
2320 Note that we are insertting converted code here. This code is
2321 never seen by the convert_regs pass. */
2322
2323 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2324 {
2325 basic_block block = e->dest;
2326 block_info bi = BLOCK_INFO (block);
2327 int reg, top = -1;
2328
2329 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2330 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2331 {
2332 rtx init;
2333
2334 bi->stack_in.reg[++top] = reg;
2335
2336 init = gen_rtx_SET (VOIDmode,
2337 FP_MODE_REG (FIRST_STACK_REG, SFmode),
2338 nan);
2339 insert_insn_on_edge (init, e);
2340 inserted = 1;
2341 }
2342
2343 bi->stack_in.top = top;
2344 }
2345
2346 return inserted;
2347 }
2348
2349 /* Construct the desired stack for function exit. This will either
2350 be `empty', or the function return value at top-of-stack. */
2351
2352 static void
2353 convert_regs_exit ()
2354 {
2355 int value_reg_low, value_reg_high;
2356 stack output_stack;
2357 rtx retvalue;
2358
2359 retvalue = stack_result (current_function_decl);
2360 value_reg_low = value_reg_high = -1;
2361 if (retvalue)
2362 {
2363 value_reg_low = REGNO (retvalue);
2364 value_reg_high = value_reg_low
2365 + HARD_REGNO_NREGS (value_reg_low, GET_MODE (retvalue)) - 1;
2366 }
2367
2368 output_stack = &BLOCK_INFO (EXIT_BLOCK_PTR)->stack_in;
2369 if (value_reg_low == -1)
2370 output_stack->top = -1;
2371 else
2372 {
2373 int reg;
2374
2375 output_stack->top = value_reg_high - value_reg_low;
2376 for (reg = value_reg_low; reg <= value_reg_high; ++reg)
2377 {
2378 output_stack->reg[reg - value_reg_low] = reg;
2379 SET_HARD_REG_BIT (output_stack->reg_set, reg);
2380 }
2381 }
2382 }
2383
2384 /* Convert stack register references in one block. */
2385
2386 static int
2387 convert_regs_1 (file, block)
2388 FILE *file;
2389 basic_block block;
2390 {
2391 struct stack_def regstack, tmpstack;
2392 block_info bi = BLOCK_INFO (block);
2393 int inserted, reg;
2394 rtx insn, next;
2395 edge e;
2396
2397 current_block = block;
2398
2399 if (file)
2400 {
2401 fprintf (file, "\nBasic block %d\nInput stack: ", block->index);
2402 print_stack (file, &bi->stack_in);
2403 }
2404
2405 /* Process all insns in this block. Keep track of NEXT so that we
2406 don't process insns emitted while substituting in INSN. */
2407 next = block->head;
2408 regstack = bi->stack_in;
2409 do
2410 {
2411 insn = next;
2412 next = NEXT_INSN (insn);
2413
2414 /* Ensure we have not missed a block boundary. */
2415 if (next == NULL)
2416 abort ();
2417 if (insn == block->end)
2418 next = NULL;
2419
2420 /* Don't bother processing unless there is a stack reg
2421 mentioned or if it's a CALL_INSN. */
2422 if (stack_regs_mentioned (insn)
2423 || GET_CODE (insn) == CALL_INSN)
2424 {
2425 if (file)
2426 {
2427 fprintf (file, " insn %d input stack: ",
2428 INSN_UID (insn));
2429 print_stack (file, &regstack);
2430 }
2431 subst_stack_regs (insn, &regstack);
2432 }
2433 }
2434 while (next);
2435
2436 if (file)
2437 {
2438 fprintf (file, "Expected live registers [");
2439 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2440 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg))
2441 fprintf (file, " %d", reg);
2442 fprintf (file, " ]\nOutput stack: ");
2443 print_stack (file, &regstack);
2444 }
2445
2446 insn = block->end;
2447 if (GET_CODE (insn) == JUMP_INSN)
2448 insn = PREV_INSN (insn);
2449
2450 /* If the function is declared to return a value, but it returns one
2451 in only some cases, some registers might come live here. Emit
2452 necessary moves for them. */
2453
2454 for (reg = FIRST_STACK_REG; reg <= LAST_STACK_REG; ++reg)
2455 {
2456 if (TEST_HARD_REG_BIT (bi->out_reg_set, reg)
2457 && ! TEST_HARD_REG_BIT (regstack.reg_set, reg))
2458 {
2459 rtx set;
2460
2461 if (file)
2462 {
2463 fprintf (file, "Emitting insn initializing reg %d\n",
2464 reg);
2465 }
2466
2467 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode),
2468 nan);
2469 insn = emit_block_insn_after (set, insn, block);
2470 subst_stack_regs (insn, &regstack);
2471 }
2472 }
2473
2474 /* Something failed if the stack lives don't match. */
2475 GO_IF_HARD_REG_EQUAL (regstack.reg_set, bi->out_reg_set, win);
2476 abort ();
2477 win:
2478
2479 /* Adjust the stack of this block on exit to match the stack of the
2480 target block, or copy stack info into the stack of the successor
2481 of the successor hasn't been processed yet. */
2482 inserted = 0;
2483 for (e = block->succ; e ; e = e->succ_next)
2484 {
2485 basic_block target = e->dest;
2486 stack target_stack = &BLOCK_INFO (target)->stack_in;
2487
2488 if (file)
2489 fprintf (file, "Edge to block %d: ", target->index);
2490
2491 if (target_stack->top == -2)
2492 {
2493 /* The target block hasn't had a stack order selected.
2494 We need merely ensure that no pops are needed. */
2495 for (reg = regstack.top; reg >= 0; --reg)
2496 if (! TEST_HARD_REG_BIT (target_stack->reg_set,
2497 regstack.reg[reg]))
2498 break;
2499
2500 if (reg == -1)
2501 {
2502 if (file)
2503 fprintf (file, "new block; copying stack position\n");
2504
2505 /* change_stack kills values in regstack. */
2506 tmpstack = regstack;
2507
2508 change_stack (block->end, &tmpstack,
2509 target_stack, EMIT_AFTER);
2510 continue;
2511 }
2512
2513 if (file)
2514 fprintf (file, "new block; pops needed\n");
2515 }
2516 else
2517 {
2518 if (target_stack->top == regstack.top)
2519 {
2520 for (reg = target_stack->top; reg >= 0; --reg)
2521 if (target_stack->reg[reg] != regstack.reg[reg])
2522 break;
2523
2524 if (reg == -1)
2525 {
2526 if (file)
2527 fprintf (file, "no changes needed\n");
2528 continue;
2529 }
2530 }
2531
2532 if (file)
2533 {
2534 fprintf (file, "correcting stack to ");
2535 print_stack (file, target_stack);
2536 }
2537 }
2538
2539 /* Care for EH edges specially. The normal return path may return
2540 a value in st(0), but the EH path will not, and there's no need
2541 to add popping code to the edge. */
2542 if (e->flags & EDGE_EH)
2543 {
2544 /* Assert that the lifetimes are as we expect -- one value
2545 live at st(0) on the end of the source block, and no
2546 values live at the beginning of the destination block. */
2547 HARD_REG_SET tmp;
2548
2549 CLEAR_HARD_REG_SET (tmp);
2550 GO_IF_HARD_REG_EQUAL (target_stack->reg_set, tmp, eh1);
2551 abort();
2552 eh1:
2553
2554 SET_HARD_REG_BIT (tmp, FIRST_STACK_REG);
2555 GO_IF_HARD_REG_EQUAL (regstack.reg_set, tmp, eh2);
2556 abort();
2557 eh2:
2558
2559 target_stack->top = -1;
2560 }
2561
2562 /* It is better to output directly to the end of the block
2563 instead of to the edge, because emit_swap can do minimal
2564 insn scheduling. We can do this when there is only one
2565 edge out, and it is not abnormal. */
2566 else if (block->succ->succ_next == NULL
2567 && ! (e->flags & EDGE_ABNORMAL))
2568 {
2569 /* change_stack kills values in regstack. */
2570 tmpstack = regstack;
2571
2572 change_stack (block->end, &tmpstack, target_stack,
2573 (GET_CODE (block->end) == JUMP_INSN
2574 ? EMIT_BEFORE : EMIT_AFTER));
2575 }
2576 else
2577 {
2578 rtx seq, after;
2579
2580 /* We don't support abnormal edges. Global takes care to
2581 avoid any live register across them, so we should never
2582 have to insert instructions on such edges. */
2583 if (e->flags & EDGE_ABNORMAL)
2584 abort ();
2585
2586 current_block = NULL;
2587 start_sequence ();
2588
2589 /* ??? change_stack needs some point to emit insns after.
2590 Also needed to keep gen_sequence from returning a
2591 pattern as opposed to a sequence, which would lose
2592 REG_DEAD notes. */
2593 after = emit_note (NULL, NOTE_INSN_DELETED);
2594
2595 tmpstack = regstack;
2596 change_stack (after, &tmpstack, target_stack, EMIT_BEFORE);
2597
2598 seq = gen_sequence ();
2599 end_sequence ();
2600
2601 insert_insn_on_edge (seq, e);
2602 inserted = 1;
2603 current_block = block;
2604 }
2605 }
2606
2607 return inserted;
2608 }
2609
2610 /* Convert registers in all blocks reachable from BLOCK. */
2611
2612 static int
2613 convert_regs_2 (file, block)
2614 FILE *file;
2615 basic_block block;
2616 {
2617 basic_block *stack, *sp;
2618 int inserted;
2619
2620 stack = (basic_block *) xmalloc (sizeof (*stack) * n_basic_blocks);
2621 sp = stack;
2622
2623 *sp++ = block;
2624 BLOCK_INFO (block)->done = 1;
2625
2626 inserted = 0;
2627 do
2628 {
2629 edge e;
2630
2631 block = *--sp;
2632 inserted |= convert_regs_1 (file, block);
2633
2634 for (e = block->succ; e ; e = e->succ_next)
2635 if (! BLOCK_INFO (e->dest)->done)
2636 {
2637 *sp++ = e->dest;
2638 BLOCK_INFO (e->dest)->done = 1;
2639 }
2640 }
2641 while (sp != stack);
2642
2643 return inserted;
2644 }
2645
2646 /* Traverse all basic blocks in a function, converting the register
2647 references in each insn from the "flat" register file that gcc uses,
2648 to the stack-like registers the 387 uses. */
2649
2650 static int
2651 convert_regs (file)
2652 FILE *file;
2653 {
2654 int inserted, i;
2655 edge e;
2656
2657 /* Initialize uninitialized registers on function entry. */
2658 inserted = convert_regs_entry ();
2659
2660 /* Construct the desired stack for function exit. */
2661 convert_regs_exit ();
2662 BLOCK_INFO (EXIT_BLOCK_PTR)->done = 1;
2663
2664 /* ??? Future: process inner loops first, and give them arbitrary
2665 initial stacks which emit_swap_insn can modify. This ought to
2666 prevent double fxch that aften appears at the head of a loop. */
2667
2668 /* Process all blocks reachable from all entry points. */
2669 for (e = ENTRY_BLOCK_PTR->succ; e ; e = e->succ_next)
2670 inserted |= convert_regs_2 (file, e->dest);
2671
2672 /* ??? Process all unreachable blocks. Though there's no excuse
2673 for keeping these even when not optimizing. */
2674 for (i = 0; i < n_basic_blocks; ++i)
2675 {
2676 basic_block b = BASIC_BLOCK (i);
2677 block_info bi = BLOCK_INFO (b);
2678
2679 if (! bi->done)
2680 {
2681 int reg;
2682
2683 /* Create an arbitrary input stack. */
2684 bi->stack_in.top = -1;
2685 for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; --reg)
2686 if (TEST_HARD_REG_BIT (bi->stack_in.reg_set, reg))
2687 bi->stack_in.reg[++bi->stack_in.top] = reg;
2688
2689 inserted |= convert_regs_2 (file, b);
2690 }
2691 }
2692
2693 if (inserted)
2694 commit_edge_insertions ();
2695
2696 if (file)
2697 fputc ('\n', file);
2698
2699 return inserted;
2700 }
2701 #endif /* STACK_REGS */