lto-cgraph.c (get_alias_symbol): Remove weakref sanity check.
[gcc.git] / gcc / reginfo.c
1 /* Compute different info about registers.
2 Copyright (C) 1987-2013 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20
21 /* This file contains regscan pass of the compiler and passes for
22 dealing with info about modes of pseudo-registers inside
23 subregisters. It also defines some tables of information about the
24 hardware registers, function init_reg_sets to initialize the
25 tables, and other auxiliary functions to deal with info about
26 registers and their classes. */
27
28 #include "config.h"
29 #include "system.h"
30 #include "coretypes.h"
31 #include "tm.h"
32 #include "hard-reg-set.h"
33 #include "rtl.h"
34 #include "expr.h"
35 #include "tm_p.h"
36 #include "flags.h"
37 #include "basic-block.h"
38 #include "regs.h"
39 #include "addresses.h"
40 #include "function.h"
41 #include "insn-config.h"
42 #include "recog.h"
43 #include "reload.h"
44 #include "diagnostic-core.h"
45 #include "output.h"
46 #include "hashtab.h"
47 #include "target.h"
48 #include "tree-pass.h"
49 #include "df.h"
50 #include "ira.h"
51
52 /* Maximum register number used in this function, plus one. */
53
54 int max_regno;
55
56 \f
57 struct target_hard_regs default_target_hard_regs;
58 struct target_regs default_target_regs;
59 #if SWITCHABLE_TARGET
60 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
61 struct target_regs *this_target_regs = &default_target_regs;
62 #endif
63
64 /* Data for initializing fixed_regs. */
65 static const char initial_fixed_regs[] = FIXED_REGISTERS;
66
67 /* Data for initializing call_used_regs. */
68 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
69
70 #ifdef CALL_REALLY_USED_REGISTERS
71 /* Data for initializing call_really_used_regs. */
72 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
73 #endif
74
75 #ifdef CALL_REALLY_USED_REGISTERS
76 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
77 #else
78 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
79 #endif
80
81 /* Indexed by hard register number, contains 1 for registers
82 that are being used for global register decls.
83 These must be exempt from ordinary flow analysis
84 and are also considered fixed. */
85 char global_regs[FIRST_PSEUDO_REGISTER];
86
87 /* Declaration for the global register. */
88 static tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];
89
90 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
91 in dataflow more conveniently. */
92 regset regs_invalidated_by_call_regset;
93
94 /* Same information as FIXED_REG_SET but in regset form. */
95 regset fixed_reg_set_regset;
96
97 /* The bitmap_obstack is used to hold some static variables that
98 should not be reset after each function is compiled. */
99 static bitmap_obstack persistent_obstack;
100
101 /* Used to initialize reg_alloc_order. */
102 #ifdef REG_ALLOC_ORDER
103 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
104 #endif
105
106 /* The same information, but as an array of unsigned ints. We copy from
107 these unsigned ints to the table above. We do this so the tm.h files
108 do not have to be aware of the wordsize for machines with <= 64 regs.
109 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
110 #define N_REG_INTS \
111 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
112
113 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
114 = REG_CLASS_CONTENTS;
115
116 /* Array containing all of the register names. */
117 static const char *const initial_reg_names[] = REGISTER_NAMES;
118
119 /* Array containing all of the register class names. */
120 const char * reg_class_names[] = REG_CLASS_NAMES;
121
122 /* No more global register variables may be declared; true once
123 reginfo has been initialized. */
124 static int no_global_reg_vars = 0;
125
126 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
127 correspond to the hard registers, if any, set in that map. This
128 could be done far more efficiently by having all sorts of special-cases
129 with moving single words, but probably isn't worth the trouble. */
130 void
131 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
132 {
133 unsigned i;
134 bitmap_iterator bi;
135
136 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
137 {
138 if (i >= FIRST_PSEUDO_REGISTER)
139 return;
140 SET_HARD_REG_BIT (*to, i);
141 }
142 }
143
144 /* Function called only once per target_globals to initialize the
145 target_hard_regs structure. Once this is done, various switches
146 may override. */
147 void
148 init_reg_sets (void)
149 {
150 int i, j;
151
152 /* First copy the register information from the initial int form into
153 the regsets. */
154
155 for (i = 0; i < N_REG_CLASSES; i++)
156 {
157 CLEAR_HARD_REG_SET (reg_class_contents[i]);
158
159 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
160 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
161 if (int_reg_class_contents[i][j / 32]
162 & ((unsigned) 1 << (j % 32)))
163 SET_HARD_REG_BIT (reg_class_contents[i], j);
164 }
165
166 /* Sanity check: make sure the target macros FIXED_REGISTERS and
167 CALL_USED_REGISTERS had the right number of initializers. */
168 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
169 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
170 #ifdef CALL_REALLY_USED_REGISTERS
171 gcc_assert (sizeof call_really_used_regs
172 == sizeof initial_call_really_used_regs);
173 #endif
174 #ifdef REG_ALLOC_ORDER
175 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
176 #endif
177 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
178
179 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
180 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
181 #ifdef CALL_REALLY_USED_REGISTERS
182 memcpy (call_really_used_regs, initial_call_really_used_regs,
183 sizeof call_really_used_regs);
184 #endif
185 #ifdef REG_ALLOC_ORDER
186 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
187 #endif
188 memcpy (reg_names, initial_reg_names, sizeof reg_names);
189
190 SET_HARD_REG_SET (accessible_reg_set);
191 SET_HARD_REG_SET (operand_reg_set);
192 }
193
194 /* We need to save copies of some of the register information which
195 can be munged by command-line switches so we can restore it during
196 subsequent back-end reinitialization. */
197 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
198 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
199 #ifdef CALL_REALLY_USED_REGISTERS
200 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
201 #endif
202 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
203 static HARD_REG_SET saved_accessible_reg_set;
204 static HARD_REG_SET saved_operand_reg_set;
205
206 /* Save the register information. */
207 void
208 save_register_info (void)
209 {
210 /* Sanity check: make sure the target macros FIXED_REGISTERS and
211 CALL_USED_REGISTERS had the right number of initializers. */
212 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
213 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
214 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
215 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
216
217 /* Likewise for call_really_used_regs. */
218 #ifdef CALL_REALLY_USED_REGISTERS
219 gcc_assert (sizeof call_really_used_regs
220 == sizeof saved_call_really_used_regs);
221 memcpy (saved_call_really_used_regs, call_really_used_regs,
222 sizeof call_really_used_regs);
223 #endif
224
225 /* And similarly for reg_names. */
226 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
227 memcpy (saved_reg_names, reg_names, sizeof reg_names);
228 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
229 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
230 }
231
232 /* Restore the register information. */
233 static void
234 restore_register_info (void)
235 {
236 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
237 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
238
239 #ifdef CALL_REALLY_USED_REGISTERS
240 memcpy (call_really_used_regs, saved_call_really_used_regs,
241 sizeof call_really_used_regs);
242 #endif
243
244 memcpy (reg_names, saved_reg_names, sizeof reg_names);
245 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
246 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
247 }
248
249 /* After switches have been processed, which perhaps alter
250 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
251 static void
252 init_reg_sets_1 (void)
253 {
254 unsigned int i, j;
255 unsigned int /* enum machine_mode */ m;
256
257 restore_register_info ();
258
259 #ifdef REG_ALLOC_ORDER
260 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
261 inv_reg_alloc_order[reg_alloc_order[i]] = i;
262 #endif
263
264 /* Let the target tweak things if necessary. */
265
266 targetm.conditional_register_usage ();
267
268 /* Compute number of hard regs in each class. */
269
270 memset (reg_class_size, 0, sizeof reg_class_size);
271 for (i = 0; i < N_REG_CLASSES; i++)
272 {
273 bool any_nonfixed = false;
274 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
275 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
276 {
277 reg_class_size[i]++;
278 if (!fixed_regs[j])
279 any_nonfixed = true;
280 }
281 class_only_fixed_regs[i] = !any_nonfixed;
282 }
283
284 /* Initialize the table of subunions.
285 reg_class_subunion[I][J] gets the largest-numbered reg-class
286 that is contained in the union of classes I and J. */
287
288 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
289 for (i = 0; i < N_REG_CLASSES; i++)
290 {
291 for (j = 0; j < N_REG_CLASSES; j++)
292 {
293 HARD_REG_SET c;
294 int k;
295
296 COPY_HARD_REG_SET (c, reg_class_contents[i]);
297 IOR_HARD_REG_SET (c, reg_class_contents[j]);
298 for (k = 0; k < N_REG_CLASSES; k++)
299 if (hard_reg_set_subset_p (reg_class_contents[k], c)
300 && !hard_reg_set_subset_p (reg_class_contents[k],
301 reg_class_contents
302 [(int) reg_class_subunion[i][j]]))
303 reg_class_subunion[i][j] = (enum reg_class) k;
304 }
305 }
306
307 /* Initialize the table of superunions.
308 reg_class_superunion[I][J] gets the smallest-numbered reg-class
309 containing the union of classes I and J. */
310
311 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
312 for (i = 0; i < N_REG_CLASSES; i++)
313 {
314 for (j = 0; j < N_REG_CLASSES; j++)
315 {
316 HARD_REG_SET c;
317 int k;
318
319 COPY_HARD_REG_SET (c, reg_class_contents[i]);
320 IOR_HARD_REG_SET (c, reg_class_contents[j]);
321 for (k = 0; k < N_REG_CLASSES; k++)
322 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
323 break;
324
325 reg_class_superunion[i][j] = (enum reg_class) k;
326 }
327 }
328
329 /* Initialize the tables of subclasses and superclasses of each reg class.
330 First clear the whole table, then add the elements as they are found. */
331
332 for (i = 0; i < N_REG_CLASSES; i++)
333 {
334 for (j = 0; j < N_REG_CLASSES; j++)
335 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
336 }
337
338 for (i = 0; i < N_REG_CLASSES; i++)
339 {
340 if (i == (int) NO_REGS)
341 continue;
342
343 for (j = i + 1; j < N_REG_CLASSES; j++)
344 if (hard_reg_set_subset_p (reg_class_contents[i],
345 reg_class_contents[j]))
346 {
347 /* Reg class I is a subclass of J.
348 Add J to the table of superclasses of I. */
349 enum reg_class *p;
350
351 /* Add I to the table of superclasses of J. */
352 p = &reg_class_subclasses[j][0];
353 while (*p != LIM_REG_CLASSES) p++;
354 *p = (enum reg_class) i;
355 }
356 }
357
358 /* Initialize "constant" tables. */
359
360 CLEAR_HARD_REG_SET (fixed_reg_set);
361 CLEAR_HARD_REG_SET (call_used_reg_set);
362 CLEAR_HARD_REG_SET (call_fixed_reg_set);
363 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
364 if (!regs_invalidated_by_call_regset)
365 {
366 bitmap_obstack_initialize (&persistent_obstack);
367 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
368 }
369 else
370 CLEAR_REG_SET (regs_invalidated_by_call_regset);
371 if (!fixed_reg_set_regset)
372 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
373 else
374 CLEAR_REG_SET (fixed_reg_set_regset);
375
376 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
377 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
378 {
379 /* As a special exception, registers whose class is NO_REGS are
380 not accepted by `register_operand'. The reason for this change
381 is to allow the representation of special architecture artifacts
382 (such as a condition code register) without extending the rtl
383 definitions. Since registers of class NO_REGS cannot be used
384 as registers in any case where register classes are examined,
385 it is better to apply this exception in a target-independent way. */
386 if (REGNO_REG_CLASS (i) == NO_REGS)
387 CLEAR_HARD_REG_BIT (operand_reg_set, i);
388
389 /* If a register is too limited to be treated as a register operand,
390 then it should never be allocated to a pseudo. */
391 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
392 {
393 fixed_regs[i] = 1;
394 call_used_regs[i] = 1;
395 }
396
397 /* call_used_regs must include fixed_regs. */
398 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
399 #ifdef CALL_REALLY_USED_REGISTERS
400 /* call_used_regs must include call_really_used_regs. */
401 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
402 #endif
403
404 if (fixed_regs[i])
405 {
406 SET_HARD_REG_BIT (fixed_reg_set, i);
407 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
408 }
409
410 if (call_used_regs[i])
411 SET_HARD_REG_BIT (call_used_reg_set, i);
412
413 /* There are a couple of fixed registers that we know are safe to
414 exclude from being clobbered by calls:
415
416 The frame pointer is always preserved across calls. The arg
417 pointer is if it is fixed. The stack pointer usually is,
418 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
419 CLOBBER will be present. If we are generating PIC code, the
420 PIC offset table register is preserved across calls, though the
421 target can override that. */
422
423 if (i == STACK_POINTER_REGNUM)
424 ;
425 else if (global_regs[i])
426 {
427 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
428 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
429 }
430 else if (i == FRAME_POINTER_REGNUM)
431 ;
432 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
433 else if (i == HARD_FRAME_POINTER_REGNUM)
434 ;
435 #endif
436 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
437 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
438 ;
439 #endif
440 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
441 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
442 ;
443 else if (CALL_REALLY_USED_REGNO_P (i))
444 {
445 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
446 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
447 }
448 }
449
450 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
451
452 /* Preserve global registers if called more than once. */
453 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
454 {
455 if (global_regs[i])
456 {
457 fixed_regs[i] = call_used_regs[i] = 1;
458 SET_HARD_REG_BIT (fixed_reg_set, i);
459 SET_HARD_REG_BIT (call_used_reg_set, i);
460 SET_HARD_REG_BIT (call_fixed_reg_set, i);
461 }
462 }
463
464 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
465 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
466 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
467 {
468 HARD_REG_SET ok_regs;
469 CLEAR_HARD_REG_SET (ok_regs);
470 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
471 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
472 SET_HARD_REG_BIT (ok_regs, j);
473
474 for (i = 0; i < N_REG_CLASSES; i++)
475 if ((targetm.class_max_nregs ((reg_class_t) i, (enum machine_mode) m)
476 <= reg_class_size[i])
477 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
478 {
479 contains_reg_of_mode [i][m] = 1;
480 have_regs_of_mode [m] = 1;
481 }
482 }
483 }
484
485 /* Compute the table of register modes.
486 These values are used to record death information for individual registers
487 (as opposed to a multi-register mode).
488 This function might be invoked more than once, if the target has support
489 for changing register usage conventions on a per-function basis.
490 */
491 void
492 init_reg_modes_target (void)
493 {
494 int i, j;
495
496 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
497 for (j = 0; j < MAX_MACHINE_MODE; j++)
498 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
499
500 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
501 {
502 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
503
504 /* If we couldn't find a valid mode, just use the previous mode
505 if it is suitable, otherwise fall back on word_mode. */
506 if (reg_raw_mode[i] == VOIDmode)
507 {
508 if (i > 0 && hard_regno_nregs[i][reg_raw_mode[i - 1]] == 1)
509 reg_raw_mode[i] = reg_raw_mode[i - 1];
510 else
511 reg_raw_mode[i] = word_mode;
512 }
513 }
514 }
515
516 /* Finish initializing the register sets and initialize the register modes.
517 This function might be invoked more than once, if the target has support
518 for changing register usage conventions on a per-function basis.
519 */
520 void
521 init_regs (void)
522 {
523 /* This finishes what was started by init_reg_sets, but couldn't be done
524 until after register usage was specified. */
525 init_reg_sets_1 ();
526 }
527
528 /* The same as previous function plus initializing IRA. */
529 void
530 reinit_regs (void)
531 {
532 init_regs ();
533 /* caller_save needs to be re-initialized. */
534 caller_save_initialized_p = false;
535 ira_init ();
536 }
537
538 /* Initialize some fake stack-frame MEM references for use in
539 memory_move_secondary_cost. */
540 void
541 init_fake_stack_mems (void)
542 {
543 int i;
544
545 for (i = 0; i < MAX_MACHINE_MODE; i++)
546 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
547 }
548
549
550 /* Compute cost of moving data from a register of class FROM to one of
551 TO, using MODE. */
552
553 int
554 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
555 {
556 return targetm.register_move_cost (mode, from, to);
557 }
558
559 /* Compute cost of moving registers to/from memory. */
560
561 int
562 memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
563 {
564 return targetm.memory_move_cost (mode, rclass, in);
565 }
566
567 /* Compute extra cost of moving registers to/from memory due to reloads.
568 Only needed if secondary reloads are required for memory moves. */
569 int
570 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
571 bool in)
572 {
573 reg_class_t altclass;
574 int partial_cost = 0;
575 /* We need a memory reference to feed to SECONDARY... macros. */
576 /* mem may be unused even if the SECONDARY_ macros are defined. */
577 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
578
579 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
580
581 if (altclass == NO_REGS)
582 return 0;
583
584 if (in)
585 partial_cost = register_move_cost (mode, altclass, rclass);
586 else
587 partial_cost = register_move_cost (mode, rclass, altclass);
588
589 if (rclass == altclass)
590 /* This isn't simply a copy-to-temporary situation. Can't guess
591 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
592 calling here in that case.
593
594 I'm tempted to put in an assert here, but returning this will
595 probably only give poor estimates, which is what we would've
596 had before this code anyways. */
597 return partial_cost;
598
599 /* Check if the secondary reload register will also need a
600 secondary reload. */
601 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
602 }
603
604 /* Return a machine mode that is legitimate for hard reg REGNO and large
605 enough to save nregs. If we can't find one, return VOIDmode.
606 If CALL_SAVED is true, only consider modes that are call saved. */
607 enum machine_mode
608 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
609 unsigned int nregs, bool call_saved)
610 {
611 unsigned int /* enum machine_mode */ m;
612 enum machine_mode found_mode = VOIDmode, mode;
613
614 /* We first look for the largest integer mode that can be validly
615 held in REGNO. If none, we look for the largest floating-point mode.
616 If we still didn't find a valid mode, try CCmode. */
617
618 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
619 mode != VOIDmode;
620 mode = GET_MODE_WIDER_MODE (mode))
621 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
622 && HARD_REGNO_MODE_OK (regno, mode)
623 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
624 found_mode = mode;
625
626 if (found_mode != VOIDmode)
627 return found_mode;
628
629 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
630 mode != VOIDmode;
631 mode = GET_MODE_WIDER_MODE (mode))
632 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
633 && HARD_REGNO_MODE_OK (regno, mode)
634 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
635 found_mode = mode;
636
637 if (found_mode != VOIDmode)
638 return found_mode;
639
640 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
641 mode != VOIDmode;
642 mode = GET_MODE_WIDER_MODE (mode))
643 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
644 && HARD_REGNO_MODE_OK (regno, mode)
645 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
646 found_mode = mode;
647
648 if (found_mode != VOIDmode)
649 return found_mode;
650
651 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
652 mode != VOIDmode;
653 mode = GET_MODE_WIDER_MODE (mode))
654 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
655 && HARD_REGNO_MODE_OK (regno, mode)
656 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
657 found_mode = mode;
658
659 if (found_mode != VOIDmode)
660 return found_mode;
661
662 /* Iterate over all of the CCmodes. */
663 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
664 {
665 mode = (enum machine_mode) m;
666 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
667 && HARD_REGNO_MODE_OK (regno, mode)
668 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
669 return mode;
670 }
671
672 /* We can't find a mode valid for this register. */
673 return VOIDmode;
674 }
675
676 /* Specify the usage characteristics of the register named NAME.
677 It should be a fixed register if FIXED and a
678 call-used register if CALL_USED. */
679 void
680 fix_register (const char *name, int fixed, int call_used)
681 {
682 int i;
683 int reg, nregs;
684
685 /* Decode the name and update the primary form of
686 the register info. */
687
688 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
689 {
690 gcc_assert (nregs >= 1);
691 for (i = reg; i < reg + nregs; i++)
692 {
693 if ((i == STACK_POINTER_REGNUM
694 #ifdef HARD_FRAME_POINTER_REGNUM
695 || i == HARD_FRAME_POINTER_REGNUM
696 #else
697 || i == FRAME_POINTER_REGNUM
698 #endif
699 )
700 && (fixed == 0 || call_used == 0))
701 {
702 switch (fixed)
703 {
704 case 0:
705 switch (call_used)
706 {
707 case 0:
708 error ("can%'t use %qs as a call-saved register", name);
709 break;
710
711 case 1:
712 error ("can%'t use %qs as a call-used register", name);
713 break;
714
715 default:
716 gcc_unreachable ();
717 }
718 break;
719
720 case 1:
721 switch (call_used)
722 {
723 case 1:
724 error ("can%'t use %qs as a fixed register", name);
725 break;
726
727 case 0:
728 default:
729 gcc_unreachable ();
730 }
731 break;
732
733 default:
734 gcc_unreachable ();
735 }
736 }
737 else
738 {
739 fixed_regs[i] = fixed;
740 call_used_regs[i] = call_used;
741 #ifdef CALL_REALLY_USED_REGISTERS
742 if (fixed == 0)
743 call_really_used_regs[i] = call_used;
744 #endif
745 }
746 }
747 }
748 else
749 {
750 warning (0, "unknown register name: %s", name);
751 }
752 }
753
754 /* Mark register number I as global. */
755 void
756 globalize_reg (tree decl, int i)
757 {
758 location_t loc = DECL_SOURCE_LOCATION (decl);
759
760 #ifdef STACK_REGS
761 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
762 {
763 error ("stack register used for global register variable");
764 return;
765 }
766 #endif
767
768 if (fixed_regs[i] == 0 && no_global_reg_vars)
769 error_at (loc, "global register variable follows a function definition");
770
771 if (global_regs[i])
772 {
773 warning_at (loc, 0,
774 "register of %qD used for multiple global register variables",
775 decl);
776 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
777 "conflicts with %qD", global_regs_decl[i]);
778 return;
779 }
780
781 if (call_used_regs[i] && ! fixed_regs[i])
782 warning_at (loc, 0, "call-clobbered register used for global register variable");
783
784 global_regs[i] = 1;
785 global_regs_decl[i] = decl;
786
787 /* If we're globalizing the frame pointer, we need to set the
788 appropriate regs_invalidated_by_call bit, even if it's already
789 set in fixed_regs. */
790 if (i != STACK_POINTER_REGNUM)
791 {
792 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
793 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
794 }
795
796 /* If already fixed, nothing else to do. */
797 if (fixed_regs[i])
798 return;
799
800 fixed_regs[i] = call_used_regs[i] = 1;
801 #ifdef CALL_REALLY_USED_REGISTERS
802 call_really_used_regs[i] = 1;
803 #endif
804
805 SET_HARD_REG_BIT (fixed_reg_set, i);
806 SET_HARD_REG_BIT (call_used_reg_set, i);
807 SET_HARD_REG_BIT (call_fixed_reg_set, i);
808
809 reinit_regs ();
810 }
811 \f
812
813 /* Structure used to record preferences of given pseudo. */
814 struct reg_pref
815 {
816 /* (enum reg_class) prefclass is the preferred class. May be
817 NO_REGS if no class is better than memory. */
818 char prefclass;
819
820 /* altclass is a register class that we should use for allocating
821 pseudo if no register in the preferred class is available.
822 If no register in this class is available, memory is preferred.
823
824 It might appear to be more general to have a bitmask of classes here,
825 but since it is recommended that there be a class corresponding to the
826 union of most major pair of classes, that generality is not required. */
827 char altclass;
828
829 /* allocnoclass is a register class that IRA uses for allocating
830 the pseudo. */
831 char allocnoclass;
832 };
833
834 /* Record preferences of each pseudo. This is available after RA is
835 run. */
836 static struct reg_pref *reg_pref;
837
838 /* Current size of reg_info. */
839 static int reg_info_size;
840 /* Max_reg_num still last resize_reg_info call. */
841 static int max_regno_since_last_resize;
842
843 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
844 This function is sometimes called before the info has been computed.
845 When that happens, just return GENERAL_REGS, which is innocuous. */
846 enum reg_class
847 reg_preferred_class (int regno)
848 {
849 if (reg_pref == 0)
850 return GENERAL_REGS;
851
852 gcc_assert (regno < reg_info_size);
853 return (enum reg_class) reg_pref[regno].prefclass;
854 }
855
856 enum reg_class
857 reg_alternate_class (int regno)
858 {
859 if (reg_pref == 0)
860 return ALL_REGS;
861
862 gcc_assert (regno < reg_info_size);
863 return (enum reg_class) reg_pref[regno].altclass;
864 }
865
866 /* Return the reg_class which is used by IRA for its allocation. */
867 enum reg_class
868 reg_allocno_class (int regno)
869 {
870 if (reg_pref == 0)
871 return NO_REGS;
872
873 gcc_assert (regno < reg_info_size);
874 return (enum reg_class) reg_pref[regno].allocnoclass;
875 }
876
877 \f
878
879 /* Allocate space for reg info and initilize it. */
880 static void
881 allocate_reg_info (void)
882 {
883 int i;
884
885 max_regno_since_last_resize = max_reg_num ();
886 reg_info_size = max_regno_since_last_resize * 3 / 2 + 1;
887 gcc_assert (! reg_pref && ! reg_renumber);
888 reg_renumber = XNEWVEC (short, reg_info_size);
889 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
890 memset (reg_renumber, -1, reg_info_size * sizeof (short));
891 for (i = 0; i < reg_info_size; i++)
892 {
893 reg_pref[i].prefclass = GENERAL_REGS;
894 reg_pref[i].altclass = ALL_REGS;
895 reg_pref[i].allocnoclass = GENERAL_REGS;
896 }
897 }
898
899
900 /* Resize reg info. The new elements will be initialized. Return TRUE
901 if new pseudos were added since the last call. */
902 bool
903 resize_reg_info (void)
904 {
905 int old, i;
906 bool change_p;
907
908 if (reg_pref == NULL)
909 {
910 allocate_reg_info ();
911 return true;
912 }
913 change_p = max_regno_since_last_resize != max_reg_num ();
914 max_regno_since_last_resize = max_reg_num ();
915 if (reg_info_size >= max_reg_num ())
916 return change_p;
917 old = reg_info_size;
918 reg_info_size = max_reg_num () * 3 / 2 + 1;
919 gcc_assert (reg_pref && reg_renumber);
920 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
921 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
922 memset (reg_pref + old, -1,
923 (reg_info_size - old) * sizeof (struct reg_pref));
924 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
925 for (i = old; i < reg_info_size; i++)
926 {
927 reg_pref[i].prefclass = GENERAL_REGS;
928 reg_pref[i].altclass = ALL_REGS;
929 reg_pref[i].allocnoclass = GENERAL_REGS;
930 }
931 return true;
932 }
933
934
935 /* Free up the space allocated by allocate_reg_info. */
936 void
937 free_reg_info (void)
938 {
939 if (reg_pref)
940 {
941 free (reg_pref);
942 reg_pref = NULL;
943 }
944
945 if (reg_renumber)
946 {
947 free (reg_renumber);
948 reg_renumber = NULL;
949 }
950 }
951
952 /* Initialize some global data for this pass. */
953 static unsigned int
954 reginfo_init (void)
955 {
956 if (df)
957 df_compute_regs_ever_live (true);
958
959 /* This prevents dump_reg_info from losing if called
960 before reginfo is run. */
961 reg_pref = NULL;
962 reg_info_size = max_regno_since_last_resize = 0;
963 /* No more global register variables may be declared. */
964 no_global_reg_vars = 1;
965 return 1;
966 }
967
968 struct rtl_opt_pass pass_reginfo_init =
969 {
970 {
971 RTL_PASS,
972 "reginfo", /* name */
973 OPTGROUP_NONE, /* optinfo_flags */
974 NULL, /* gate */
975 reginfo_init, /* execute */
976 NULL, /* sub */
977 NULL, /* next */
978 0, /* static_pass_number */
979 TV_NONE, /* tv_id */
980 0, /* properties_required */
981 0, /* properties_provided */
982 0, /* properties_destroyed */
983 0, /* todo_flags_start */
984 0 /* todo_flags_finish */
985 }
986 };
987
988 \f
989
990 /* Set up preferred, alternate, and allocno classes for REGNO as
991 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
992 void
993 setup_reg_classes (int regno,
994 enum reg_class prefclass, enum reg_class altclass,
995 enum reg_class allocnoclass)
996 {
997 if (reg_pref == NULL)
998 return;
999 gcc_assert (reg_info_size >= max_reg_num ());
1000 reg_pref[regno].prefclass = prefclass;
1001 reg_pref[regno].altclass = altclass;
1002 reg_pref[regno].allocnoclass = allocnoclass;
1003 }
1004
1005 \f
1006 /* This is the `regscan' pass of the compiler, run just before cse and
1007 again just before loop. It finds the first and last use of each
1008 pseudo-register. */
1009
1010 static void reg_scan_mark_refs (rtx, rtx);
1011
1012 void
1013 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1014 {
1015 rtx insn;
1016
1017 timevar_push (TV_REG_SCAN);
1018
1019 for (insn = f; insn; insn = NEXT_INSN (insn))
1020 if (INSN_P (insn))
1021 {
1022 reg_scan_mark_refs (PATTERN (insn), insn);
1023 if (REG_NOTES (insn))
1024 reg_scan_mark_refs (REG_NOTES (insn), insn);
1025 }
1026
1027 timevar_pop (TV_REG_SCAN);
1028 }
1029
1030
1031 /* X is the expression to scan. INSN is the insn it appears in.
1032 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1033 We should only record information for REGs with numbers
1034 greater than or equal to MIN_REGNO. */
1035 static void
1036 reg_scan_mark_refs (rtx x, rtx insn)
1037 {
1038 enum rtx_code code;
1039 rtx dest;
1040 rtx note;
1041
1042 if (!x)
1043 return;
1044 code = GET_CODE (x);
1045 switch (code)
1046 {
1047 case CONST:
1048 CASE_CONST_ANY:
1049 case CC0:
1050 case PC:
1051 case SYMBOL_REF:
1052 case LABEL_REF:
1053 case ADDR_VEC:
1054 case ADDR_DIFF_VEC:
1055 case REG:
1056 return;
1057
1058 case EXPR_LIST:
1059 if (XEXP (x, 0))
1060 reg_scan_mark_refs (XEXP (x, 0), insn);
1061 if (XEXP (x, 1))
1062 reg_scan_mark_refs (XEXP (x, 1), insn);
1063 break;
1064
1065 case INSN_LIST:
1066 if (XEXP (x, 1))
1067 reg_scan_mark_refs (XEXP (x, 1), insn);
1068 break;
1069
1070 case CLOBBER:
1071 if (MEM_P (XEXP (x, 0)))
1072 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1073 break;
1074
1075 case SET:
1076 /* Count a set of the destination if it is a register. */
1077 for (dest = SET_DEST (x);
1078 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1079 || GET_CODE (dest) == ZERO_EXTEND;
1080 dest = XEXP (dest, 0))
1081 ;
1082
1083 /* If this is setting a pseudo from another pseudo or the sum of a
1084 pseudo and a constant integer and the other pseudo is known to be
1085 a pointer, set the destination to be a pointer as well.
1086
1087 Likewise if it is setting the destination from an address or from a
1088 value equivalent to an address or to the sum of an address and
1089 something else.
1090
1091 But don't do any of this if the pseudo corresponds to a user
1092 variable since it should have already been set as a pointer based
1093 on the type. */
1094
1095 if (REG_P (SET_DEST (x))
1096 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1097 /* If the destination pseudo is set more than once, then other
1098 sets might not be to a pointer value (consider access to a
1099 union in two threads of control in the presence of global
1100 optimizations). So only set REG_POINTER on the destination
1101 pseudo if this is the only set of that pseudo. */
1102 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1103 && ! REG_USERVAR_P (SET_DEST (x))
1104 && ! REG_POINTER (SET_DEST (x))
1105 && ((REG_P (SET_SRC (x))
1106 && REG_POINTER (SET_SRC (x)))
1107 || ((GET_CODE (SET_SRC (x)) == PLUS
1108 || GET_CODE (SET_SRC (x)) == LO_SUM)
1109 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1110 && REG_P (XEXP (SET_SRC (x), 0))
1111 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1112 || GET_CODE (SET_SRC (x)) == CONST
1113 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1114 || GET_CODE (SET_SRC (x)) == LABEL_REF
1115 || (GET_CODE (SET_SRC (x)) == HIGH
1116 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1117 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1118 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1119 || ((GET_CODE (SET_SRC (x)) == PLUS
1120 || GET_CODE (SET_SRC (x)) == LO_SUM)
1121 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1122 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1123 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1124 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1125 && (GET_CODE (XEXP (note, 0)) == CONST
1126 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1127 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1128 REG_POINTER (SET_DEST (x)) = 1;
1129
1130 /* If this is setting a register from a register or from a simple
1131 conversion of a register, propagate REG_EXPR. */
1132 if (REG_P (dest) && !REG_ATTRS (dest))
1133 set_reg_attrs_from_value (dest, SET_SRC (x));
1134
1135 /* ... fall through ... */
1136
1137 default:
1138 {
1139 const char *fmt = GET_RTX_FORMAT (code);
1140 int i;
1141 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1142 {
1143 if (fmt[i] == 'e')
1144 reg_scan_mark_refs (XEXP (x, i), insn);
1145 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1146 {
1147 int j;
1148 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1149 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1150 }
1151 }
1152 }
1153 }
1154 }
1155 \f
1156
1157 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1158 is also in C2. */
1159 int
1160 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1161 {
1162 return (c1 == c2
1163 || c2 == ALL_REGS
1164 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1165 reg_class_contents[(int) c2]));
1166 }
1167
1168 /* Return nonzero if there is a register that is in both C1 and C2. */
1169 int
1170 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1171 {
1172 return (c1 == c2
1173 || c1 == ALL_REGS
1174 || c2 == ALL_REGS
1175 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1176 reg_class_contents[(int) c2]));
1177 }
1178
1179 \f
1180
1181 /* Passes for keeping and updating info about modes of registers
1182 inside subregisters. */
1183
1184 #ifdef CANNOT_CHANGE_MODE_CLASS
1185
1186 static bitmap invalid_mode_changes;
1187
1188 static void
1189 record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode)
1190 {
1191 enum machine_mode mode;
1192 unsigned int regno;
1193
1194 if (!REG_P (SUBREG_REG (subreg)))
1195 return;
1196
1197 regno = REGNO (SUBREG_REG (subreg));
1198 mode = GET_MODE (subreg);
1199
1200 if (regno < FIRST_PSEUDO_REGISTER)
1201 return;
1202
1203 if (bitmap_set_bit (subregs_of_mode,
1204 regno * NUM_MACHINE_MODES + (unsigned int) mode))
1205 {
1206 unsigned int rclass;
1207 for (rclass = 0; rclass < N_REG_CLASSES; rclass++)
1208 if (!bitmap_bit_p (invalid_mode_changes,
1209 regno * N_REG_CLASSES + rclass)
1210 && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno),
1211 mode, (enum reg_class) rclass))
1212 bitmap_set_bit (invalid_mode_changes,
1213 regno * N_REG_CLASSES + rclass);
1214 }
1215 }
1216
1217 /* Call record_subregs_of_mode for all the subregs in X. */
1218 static void
1219 find_subregs_of_mode (rtx x, bitmap subregs_of_mode)
1220 {
1221 enum rtx_code code = GET_CODE (x);
1222 const char * const fmt = GET_RTX_FORMAT (code);
1223 int i;
1224
1225 if (code == SUBREG)
1226 record_subregs_of_mode (x, subregs_of_mode);
1227
1228 /* Time for some deep diving. */
1229 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1230 {
1231 if (fmt[i] == 'e')
1232 find_subregs_of_mode (XEXP (x, i), subregs_of_mode);
1233 else if (fmt[i] == 'E')
1234 {
1235 int j;
1236 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1237 find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode);
1238 }
1239 }
1240 }
1241
1242 void
1243 init_subregs_of_mode (void)
1244 {
1245 basic_block bb;
1246 rtx insn;
1247 bitmap_obstack srom_obstack;
1248 bitmap subregs_of_mode;
1249
1250 gcc_assert (invalid_mode_changes == NULL);
1251 invalid_mode_changes = BITMAP_ALLOC (NULL);
1252 bitmap_obstack_initialize (&srom_obstack);
1253 subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1254
1255 FOR_EACH_BB (bb)
1256 FOR_BB_INSNS (bb, insn)
1257 if (NONDEBUG_INSN_P (insn))
1258 find_subregs_of_mode (PATTERN (insn), subregs_of_mode);
1259
1260 BITMAP_FREE (subregs_of_mode);
1261 bitmap_obstack_release (&srom_obstack);
1262 }
1263
1264 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1265 mode. */
1266 bool
1267 invalid_mode_change_p (unsigned int regno,
1268 enum reg_class rclass)
1269 {
1270 return bitmap_bit_p (invalid_mode_changes,
1271 regno * N_REG_CLASSES + (unsigned) rclass);
1272 }
1273
1274 void
1275 finish_subregs_of_mode (void)
1276 {
1277 BITMAP_FREE (invalid_mode_changes);
1278 }
1279 #else
1280 void
1281 init_subregs_of_mode (void)
1282 {
1283 }
1284 void
1285 finish_subregs_of_mode (void)
1286 {
1287 }
1288
1289 #endif /* CANNOT_CHANGE_MODE_CLASS */