pr39543-2.c: Skip if ilp32 && pic.
[gcc.git] / gcc / reginfo.c
1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009 Free Software Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
29
30 #include "config.h"
31 #include "system.h"
32 #include "coretypes.h"
33 #include "tm.h"
34 #include "hard-reg-set.h"
35 #include "rtl.h"
36 #include "expr.h"
37 #include "tm_p.h"
38 #include "flags.h"
39 #include "basic-block.h"
40 #include "regs.h"
41 #include "addresses.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h"
45 #include "reload.h"
46 #include "real.h"
47 #include "toplev.h"
48 #include "output.h"
49 #include "ggc.h"
50 #include "timevar.h"
51 #include "hashtab.h"
52 #include "target.h"
53 #include "tree-pass.h"
54 #include "df.h"
55 #include "ira.h"
56
57 /* Maximum register number used in this function, plus one. */
58
59 int max_regno;
60
61 \f
62 /* Register tables used by many passes. */
63
64 /* Indexed by hard register number, contains 1 for registers
65 that are fixed use (stack pointer, pc, frame pointer, etc.).
66 These are the registers that cannot be used to allocate
67 a pseudo reg for general use. */
68 char fixed_regs[FIRST_PSEUDO_REGISTER];
69
70 /* Same info as a HARD_REG_SET. */
71 HARD_REG_SET fixed_reg_set;
72
73 /* Data for initializing the above. */
74 static const char initial_fixed_regs[] = FIXED_REGISTERS;
75
76 /* Indexed by hard register number, contains 1 for registers
77 that are fixed use or are clobbered by function calls.
78 These are the registers that cannot be used to allocate
79 a pseudo reg whose life crosses calls unless we are able
80 to save/restore them across the calls. */
81 char call_used_regs[FIRST_PSEUDO_REGISTER];
82
83 /* Same info as a HARD_REG_SET. */
84 HARD_REG_SET call_used_reg_set;
85
86 /* Data for initializing the above. */
87 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
88
89 /* This is much like call_used_regs, except it doesn't have to
90 be a superset of FIXED_REGISTERS. This vector indicates
91 what is really call clobbered, and is used when defining
92 regs_invalidated_by_call. */
93 #ifdef CALL_REALLY_USED_REGISTERS
94 char call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
95 #endif
96
97 #ifdef CALL_REALLY_USED_REGISTERS
98 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
99 #else
100 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
101 #endif
102
103
104 /* Indexed by hard register number, contains 1 for registers that are
105 fixed use or call used registers that cannot hold quantities across
106 calls even if we are willing to save and restore them. call fixed
107 registers are a subset of call used registers. */
108 char call_fixed_regs[FIRST_PSEUDO_REGISTER];
109
110 /* The same info as a HARD_REG_SET. */
111 HARD_REG_SET call_fixed_reg_set;
112
113 /* Indexed by hard register number, contains 1 for registers
114 that are being used for global register decls.
115 These must be exempt from ordinary flow analysis
116 and are also considered fixed. */
117 char global_regs[FIRST_PSEUDO_REGISTER];
118
119 /* Contains 1 for registers that are set or clobbered by calls. */
120 /* ??? Ideally, this would be just call_used_regs plus global_regs, but
121 for someone's bright idea to have call_used_regs strictly include
122 fixed_regs. Which leaves us guessing as to the set of fixed_regs
123 that are actually preserved. We know for sure that those associated
124 with the local stack frame are safe, but scant others. */
125 HARD_REG_SET regs_invalidated_by_call;
126
127 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
128 in dataflow more conveniently. */
129 regset regs_invalidated_by_call_regset;
130
131 /* The bitmap_obstack is used to hold some static variables that
132 should not be reset after each function is compiled. */
133 static bitmap_obstack persistent_obstack;
134
135 /* Table of register numbers in the order in which to try to use them. */
136 #ifdef REG_ALLOC_ORDER
137 int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
138
139 /* The inverse of reg_alloc_order. */
140 int inv_reg_alloc_order[FIRST_PSEUDO_REGISTER];
141 #endif
142
143 /* For each reg class, a HARD_REG_SET saying which registers are in it. */
144 HARD_REG_SET reg_class_contents[N_REG_CLASSES];
145
146 /* The same information, but as an array of unsigned ints. We copy from
147 these unsigned ints to the table above. We do this so the tm.h files
148 do not have to be aware of the wordsize for machines with <= 64 regs.
149 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
150 #define N_REG_INTS \
151 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
152
153 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
154 = REG_CLASS_CONTENTS;
155
156 /* For each reg class, number of regs it contains. */
157 unsigned int reg_class_size[N_REG_CLASSES];
158
159 /* For each reg class, table listing all the classes contained in it. */
160 enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
161
162 /* For each pair of reg classes,
163 a largest reg class contained in their union. */
164 enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES];
165
166 /* For each pair of reg classes,
167 the smallest reg class containing their union. */
168 enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES];
169
170 /* Array containing all of the register names. */
171 const char * reg_names[] = REGISTER_NAMES;
172
173 /* Array containing all of the register class names. */
174 const char * reg_class_names[] = REG_CLASS_NAMES;
175
176 /* For each hard register, the widest mode object that it can contain.
177 This will be a MODE_INT mode if the register can hold integers. Otherwise
178 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
179 register. */
180 enum machine_mode reg_raw_mode[FIRST_PSEUDO_REGISTER];
181
182 /* 1 if there is a register of given mode. */
183 bool have_regs_of_mode [MAX_MACHINE_MODE];
184
185 /* 1 if class does contain register of given mode. */
186 char contains_reg_of_mode [N_REG_CLASSES] [MAX_MACHINE_MODE];
187
188 /* Maximum cost of moving from a register in one class to a register in
189 another class. Based on REGISTER_MOVE_COST. */
190 move_table *move_cost[MAX_MACHINE_MODE];
191
192 /* Similar, but here we don't have to move if the first index is a subset
193 of the second so in that case the cost is zero. */
194 move_table *may_move_in_cost[MAX_MACHINE_MODE];
195
196 /* Similar, but here we don't have to move if the first index is a superset
197 of the second so in that case the cost is zero. */
198 move_table *may_move_out_cost[MAX_MACHINE_MODE];
199
200 /* Keep track of the last mode we initialized move costs for. */
201 static int last_mode_for_init_move_cost;
202
203 /* Sample MEM values for use by memory_move_secondary_cost. */
204 static GTY(()) rtx top_of_stack[MAX_MACHINE_MODE];
205
206 /* No more global register variables may be declared; true once
207 reginfo has been initialized. */
208 static int no_global_reg_vars = 0;
209
210 /* Specify number of hard registers given machine mode occupy. */
211 unsigned char hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
212
213 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
214 correspond to the hard registers, if any, set in that map. This
215 could be done far more efficiently by having all sorts of special-cases
216 with moving single words, but probably isn't worth the trouble. */
217 void
218 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
219 {
220 unsigned i;
221 bitmap_iterator bi;
222
223 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
224 {
225 if (i >= FIRST_PSEUDO_REGISTER)
226 return;
227 SET_HARD_REG_BIT (*to, i);
228 }
229 }
230
231 /* Function called only once to initialize the above data on reg usage.
232 Once this is done, various switches may override. */
233 void
234 init_reg_sets (void)
235 {
236 int i, j;
237
238 /* First copy the register information from the initial int form into
239 the regsets. */
240
241 for (i = 0; i < N_REG_CLASSES; i++)
242 {
243 CLEAR_HARD_REG_SET (reg_class_contents[i]);
244
245 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
246 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
247 if (int_reg_class_contents[i][j / 32]
248 & ((unsigned) 1 << (j % 32)))
249 SET_HARD_REG_BIT (reg_class_contents[i], j);
250 }
251
252 /* Sanity check: make sure the target macros FIXED_REGISTERS and
253 CALL_USED_REGISTERS had the right number of initializers. */
254 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
255 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
256
257 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
258 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
259 memset (global_regs, 0, sizeof global_regs);
260 }
261
262 /* Initialize may_move_cost and friends for mode M. */
263 void
264 init_move_cost (enum machine_mode m)
265 {
266 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
267 bool all_match = true;
268 unsigned int i, j;
269
270 gcc_assert (have_regs_of_mode[m]);
271 for (i = 0; i < N_REG_CLASSES; i++)
272 if (contains_reg_of_mode[i][m])
273 for (j = 0; j < N_REG_CLASSES; j++)
274 {
275 int cost;
276 if (!contains_reg_of_mode[j][m])
277 cost = 65535;
278 else
279 {
280 cost = REGISTER_MOVE_COST (m, (enum reg_class) i,
281 (enum reg_class) j);
282 gcc_assert (cost < 65535);
283 }
284 all_match &= (last_move_cost[i][j] == cost);
285 last_move_cost[i][j] = cost;
286 }
287 if (all_match && last_mode_for_init_move_cost != -1)
288 {
289 move_cost[m] = move_cost[last_mode_for_init_move_cost];
290 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
291 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
292 return;
293 }
294 last_mode_for_init_move_cost = m;
295 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
296 * N_REG_CLASSES);
297 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
298 * N_REG_CLASSES);
299 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
300 * N_REG_CLASSES);
301 for (i = 0; i < N_REG_CLASSES; i++)
302 if (contains_reg_of_mode[i][m])
303 for (j = 0; j < N_REG_CLASSES; j++)
304 {
305 int cost;
306 enum reg_class *p1, *p2;
307
308 if (last_move_cost[i][j] == 65535)
309 {
310 move_cost[m][i][j] = 65535;
311 may_move_in_cost[m][i][j] = 65535;
312 may_move_out_cost[m][i][j] = 65535;
313 }
314 else
315 {
316 cost = last_move_cost[i][j];
317
318 for (p2 = &reg_class_subclasses[j][0];
319 *p2 != LIM_REG_CLASSES; p2++)
320 if (*p2 != i && contains_reg_of_mode[*p2][m])
321 cost = MAX (cost, move_cost[m][i][*p2]);
322
323 for (p1 = &reg_class_subclasses[i][0];
324 *p1 != LIM_REG_CLASSES; p1++)
325 if (*p1 != j && contains_reg_of_mode[*p1][m])
326 cost = MAX (cost, move_cost[m][*p1][j]);
327
328 gcc_assert (cost <= 65535);
329 move_cost[m][i][j] = cost;
330
331 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
332 may_move_in_cost[m][i][j] = 0;
333 else
334 may_move_in_cost[m][i][j] = cost;
335
336 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
337 may_move_out_cost[m][i][j] = 0;
338 else
339 may_move_out_cost[m][i][j] = cost;
340 }
341 }
342 else
343 for (j = 0; j < N_REG_CLASSES; j++)
344 {
345 move_cost[m][i][j] = 65535;
346 may_move_in_cost[m][i][j] = 65535;
347 may_move_out_cost[m][i][j] = 65535;
348 }
349 }
350
351 /* We need to save copies of some of the register information which
352 can be munged by command-line switches so we can restore it during
353 subsequent back-end reinitialization. */
354 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
355 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
356 #ifdef CALL_REALLY_USED_REGISTERS
357 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
358 #endif
359 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
360
361 /* Save the register information. */
362 void
363 save_register_info (void)
364 {
365 /* Sanity check: make sure the target macros FIXED_REGISTERS and
366 CALL_USED_REGISTERS had the right number of initializers. */
367 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
368 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
369 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
370 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
371
372 /* Likewise for call_really_used_regs. */
373 #ifdef CALL_REALLY_USED_REGISTERS
374 gcc_assert (sizeof call_really_used_regs
375 == sizeof saved_call_really_used_regs);
376 memcpy (saved_call_really_used_regs, call_really_used_regs,
377 sizeof call_really_used_regs);
378 #endif
379
380 /* And similarly for reg_names. */
381 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
382 memcpy (saved_reg_names, reg_names, sizeof reg_names);
383 }
384
385 /* Restore the register information. */
386 static void
387 restore_register_info (void)
388 {
389 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
390 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
391
392 #ifdef CALL_REALLY_USED_REGISTERS
393 memcpy (call_really_used_regs, saved_call_really_used_regs,
394 sizeof call_really_used_regs);
395 #endif
396
397 memcpy (reg_names, saved_reg_names, sizeof reg_names);
398 }
399
400 /* After switches have been processed, which perhaps alter
401 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
402 static void
403 init_reg_sets_1 (void)
404 {
405 unsigned int i, j;
406 unsigned int /* enum machine_mode */ m;
407
408 restore_register_info ();
409
410 #ifdef REG_ALLOC_ORDER
411 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
412 inv_reg_alloc_order[reg_alloc_order[i]] = i;
413 #endif
414
415 /* This macro allows the fixed or call-used registers
416 and the register classes to depend on target flags. */
417
418 #ifdef CONDITIONAL_REGISTER_USAGE
419 CONDITIONAL_REGISTER_USAGE;
420 #endif
421
422 /* Compute number of hard regs in each class. */
423
424 memset (reg_class_size, 0, sizeof reg_class_size);
425 for (i = 0; i < N_REG_CLASSES; i++)
426 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
427 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
428 reg_class_size[i]++;
429
430 /* Initialize the table of subunions.
431 reg_class_subunion[I][J] gets the largest-numbered reg-class
432 that is contained in the union of classes I and J. */
433
434 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
435 for (i = 0; i < N_REG_CLASSES; i++)
436 {
437 for (j = 0; j < N_REG_CLASSES; j++)
438 {
439 HARD_REG_SET c;
440 int k;
441
442 COPY_HARD_REG_SET (c, reg_class_contents[i]);
443 IOR_HARD_REG_SET (c, reg_class_contents[j]);
444 for (k = 0; k < N_REG_CLASSES; k++)
445 if (hard_reg_set_subset_p (reg_class_contents[k], c)
446 && !hard_reg_set_subset_p (reg_class_contents[k],
447 reg_class_contents
448 [(int) reg_class_subunion[i][j]]))
449 reg_class_subunion[i][j] = (enum reg_class) k;
450 }
451 }
452
453 /* Initialize the table of superunions.
454 reg_class_superunion[I][J] gets the smallest-numbered reg-class
455 containing the union of classes I and J. */
456
457 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
458 for (i = 0; i < N_REG_CLASSES; i++)
459 {
460 for (j = 0; j < N_REG_CLASSES; j++)
461 {
462 HARD_REG_SET c;
463 int k;
464
465 COPY_HARD_REG_SET (c, reg_class_contents[i]);
466 IOR_HARD_REG_SET (c, reg_class_contents[j]);
467 for (k = 0; k < N_REG_CLASSES; k++)
468 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
469 break;
470
471 reg_class_superunion[i][j] = (enum reg_class) k;
472 }
473 }
474
475 /* Initialize the tables of subclasses and superclasses of each reg class.
476 First clear the whole table, then add the elements as they are found. */
477
478 for (i = 0; i < N_REG_CLASSES; i++)
479 {
480 for (j = 0; j < N_REG_CLASSES; j++)
481 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
482 }
483
484 for (i = 0; i < N_REG_CLASSES; i++)
485 {
486 if (i == (int) NO_REGS)
487 continue;
488
489 for (j = i + 1; j < N_REG_CLASSES; j++)
490 if (hard_reg_set_subset_p (reg_class_contents[i],
491 reg_class_contents[j]))
492 {
493 /* Reg class I is a subclass of J.
494 Add J to the table of superclasses of I. */
495 enum reg_class *p;
496
497 /* Add I to the table of superclasses of J. */
498 p = &reg_class_subclasses[j][0];
499 while (*p != LIM_REG_CLASSES) p++;
500 *p = (enum reg_class) i;
501 }
502 }
503
504 /* Initialize "constant" tables. */
505
506 CLEAR_HARD_REG_SET (fixed_reg_set);
507 CLEAR_HARD_REG_SET (call_used_reg_set);
508 CLEAR_HARD_REG_SET (call_fixed_reg_set);
509 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
510 if (!regs_invalidated_by_call_regset)
511 {
512 bitmap_obstack_initialize (&persistent_obstack);
513 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
514 }
515 else
516 CLEAR_REG_SET (regs_invalidated_by_call_regset);
517
518 memcpy (call_fixed_regs, fixed_regs, sizeof call_fixed_regs);
519
520 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
521 {
522 /* call_used_regs must include fixed_regs. */
523 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
524 #ifdef CALL_REALLY_USED_REGISTERS
525 /* call_used_regs must include call_really_used_regs. */
526 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
527 #endif
528
529 if (fixed_regs[i])
530 SET_HARD_REG_BIT (fixed_reg_set, i);
531
532 if (call_used_regs[i])
533 SET_HARD_REG_BIT (call_used_reg_set, i);
534 if (call_fixed_regs[i])
535 SET_HARD_REG_BIT (call_fixed_reg_set, i);
536
537 /* There are a couple of fixed registers that we know are safe to
538 exclude from being clobbered by calls:
539
540 The frame pointer is always preserved across calls. The arg pointer
541 is if it is fixed. The stack pointer usually is, unless
542 RETURN_POPS_ARGS, in which case an explicit CLOBBER will be present.
543 If we are generating PIC code, the PIC offset table register is
544 preserved across calls, though the target can override that. */
545
546 if (i == STACK_POINTER_REGNUM)
547 ;
548 else if (global_regs[i])
549 {
550 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
551 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
552 }
553 else if (i == FRAME_POINTER_REGNUM)
554 ;
555 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
556 else if (i == HARD_FRAME_POINTER_REGNUM)
557 ;
558 #endif
559 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
560 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
561 ;
562 #endif
563 #ifndef PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
564 else if (i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
565 ;
566 #endif
567 else if (CALL_REALLY_USED_REGNO_P (i))
568 {
569 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
570 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
571 }
572 }
573
574 /* Preserve global registers if called more than once. */
575 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
576 {
577 if (global_regs[i])
578 {
579 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
580 SET_HARD_REG_BIT (fixed_reg_set, i);
581 SET_HARD_REG_BIT (call_used_reg_set, i);
582 SET_HARD_REG_BIT (call_fixed_reg_set, i);
583 }
584 }
585
586 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
587 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
588 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
589 {
590 HARD_REG_SET ok_regs;
591 CLEAR_HARD_REG_SET (ok_regs);
592 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
593 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
594 SET_HARD_REG_BIT (ok_regs, j);
595
596 for (i = 0; i < N_REG_CLASSES; i++)
597 if (((unsigned) CLASS_MAX_NREGS ((enum reg_class) i,
598 (enum machine_mode) m)
599 <= reg_class_size[i])
600 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
601 {
602 contains_reg_of_mode [i][m] = 1;
603 have_regs_of_mode [m] = 1;
604 }
605 }
606
607 /* Reset move_cost and friends, making sure we only free shared
608 table entries once. */
609 for (i = 0; i < MAX_MACHINE_MODE; i++)
610 if (move_cost[i])
611 {
612 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
613 ;
614 if (i == j)
615 {
616 free (move_cost[i]);
617 free (may_move_in_cost[i]);
618 free (may_move_out_cost[i]);
619 }
620 }
621 memset (move_cost, 0, sizeof move_cost);
622 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
623 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
624 last_mode_for_init_move_cost = -1;
625 }
626
627 /* Compute the table of register modes.
628 These values are used to record death information for individual registers
629 (as opposed to a multi-register mode).
630 This function might be invoked more than once, if the target has support
631 for changing register usage conventions on a per-function basis.
632 */
633 void
634 init_reg_modes_target (void)
635 {
636 int i, j;
637
638 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
639 for (j = 0; j < MAX_MACHINE_MODE; j++)
640 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
641
642 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
643 {
644 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
645
646 /* If we couldn't find a valid mode, just use the previous mode.
647 ??? One situation in which we need to do this is on the mips where
648 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
649 to use DF mode for the even registers and VOIDmode for the odd
650 (for the cpu models where the odd ones are inaccessible). */
651 if (reg_raw_mode[i] == VOIDmode)
652 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
653 }
654 }
655
656 /* Finish initializing the register sets and initialize the register modes.
657 This function might be invoked more than once, if the target has support
658 for changing register usage conventions on a per-function basis.
659 */
660 void
661 init_regs (void)
662 {
663 /* This finishes what was started by init_reg_sets, but couldn't be done
664 until after register usage was specified. */
665 init_reg_sets_1 ();
666 }
667
668 /* The same as previous function plus initializing IRA. */
669 void
670 reinit_regs (void)
671 {
672 init_regs ();
673 ira_init ();
674 }
675
676 /* Initialize some fake stack-frame MEM references for use in
677 memory_move_secondary_cost. */
678 void
679 init_fake_stack_mems (void)
680 {
681 int i;
682
683 for (i = 0; i < MAX_MACHINE_MODE; i++)
684 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
685 }
686
687
688 /* Compute extra cost of moving registers to/from memory due to reloads.
689 Only needed if secondary reloads are required for memory moves. */
690 int
691 memory_move_secondary_cost (enum machine_mode mode, enum reg_class rclass,
692 int in)
693 {
694 enum reg_class altclass;
695 int partial_cost = 0;
696 /* We need a memory reference to feed to SECONDARY... macros. */
697 /* mem may be unused even if the SECONDARY_ macros are defined. */
698 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
699
700 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
701
702 if (altclass == NO_REGS)
703 return 0;
704
705 if (in)
706 partial_cost = REGISTER_MOVE_COST (mode, altclass, rclass);
707 else
708 partial_cost = REGISTER_MOVE_COST (mode, rclass, altclass);
709
710 if (rclass == altclass)
711 /* This isn't simply a copy-to-temporary situation. Can't guess
712 what it is, so MEMORY_MOVE_COST really ought not to be calling
713 here in that case.
714
715 I'm tempted to put in an assert here, but returning this will
716 probably only give poor estimates, which is what we would've
717 had before this code anyways. */
718 return partial_cost;
719
720 /* Check if the secondary reload register will also need a
721 secondary reload. */
722 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
723 }
724
725 /* Return a machine mode that is legitimate for hard reg REGNO and large
726 enough to save nregs. If we can't find one, return VOIDmode.
727 If CALL_SAVED is true, only consider modes that are call saved. */
728 enum machine_mode
729 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
730 unsigned int nregs, bool call_saved)
731 {
732 unsigned int /* enum machine_mode */ m;
733 enum machine_mode found_mode = VOIDmode, mode;
734
735 /* We first look for the largest integer mode that can be validly
736 held in REGNO. If none, we look for the largest floating-point mode.
737 If we still didn't find a valid mode, try CCmode. */
738
739 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
740 mode != VOIDmode;
741 mode = GET_MODE_WIDER_MODE (mode))
742 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
743 && HARD_REGNO_MODE_OK (regno, mode)
744 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
745 found_mode = mode;
746
747 if (found_mode != VOIDmode)
748 return found_mode;
749
750 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
751 mode != VOIDmode;
752 mode = GET_MODE_WIDER_MODE (mode))
753 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
754 && HARD_REGNO_MODE_OK (regno, mode)
755 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
756 found_mode = mode;
757
758 if (found_mode != VOIDmode)
759 return found_mode;
760
761 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
762 mode != VOIDmode;
763 mode = GET_MODE_WIDER_MODE (mode))
764 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
765 && HARD_REGNO_MODE_OK (regno, mode)
766 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
767 found_mode = mode;
768
769 if (found_mode != VOIDmode)
770 return found_mode;
771
772 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
773 mode != VOIDmode;
774 mode = GET_MODE_WIDER_MODE (mode))
775 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
776 && HARD_REGNO_MODE_OK (regno, mode)
777 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
778 found_mode = mode;
779
780 if (found_mode != VOIDmode)
781 return found_mode;
782
783 /* Iterate over all of the CCmodes. */
784 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
785 {
786 mode = (enum machine_mode) m;
787 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
788 && HARD_REGNO_MODE_OK (regno, mode)
789 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
790 return mode;
791 }
792
793 /* We can't find a mode valid for this register. */
794 return VOIDmode;
795 }
796
797 /* Specify the usage characteristics of the register named NAME.
798 It should be a fixed register if FIXED and a
799 call-used register if CALL_USED. */
800 void
801 fix_register (const char *name, int fixed, int call_used)
802 {
803 int i;
804
805 /* Decode the name and update the primary form of
806 the register info. */
807
808 if ((i = decode_reg_name (name)) >= 0)
809 {
810 if ((i == STACK_POINTER_REGNUM
811 #ifdef HARD_FRAME_POINTER_REGNUM
812 || i == HARD_FRAME_POINTER_REGNUM
813 #else
814 || i == FRAME_POINTER_REGNUM
815 #endif
816 )
817 && (fixed == 0 || call_used == 0))
818 {
819 static const char * const what_option[2][2] = {
820 { "call-saved", "call-used" },
821 { "no-such-option", "fixed" }};
822
823 error ("can't use '%s' as a %s register", name,
824 what_option[fixed][call_used]);
825 }
826 else
827 {
828 fixed_regs[i] = fixed;
829 call_used_regs[i] = call_used;
830 #ifdef CALL_REALLY_USED_REGISTERS
831 if (fixed == 0)
832 call_really_used_regs[i] = call_used;
833 #endif
834 }
835 }
836 else
837 {
838 warning (0, "unknown register name: %s", name);
839 }
840 }
841
842 /* Mark register number I as global. */
843 void
844 globalize_reg (int i)
845 {
846 if (fixed_regs[i] == 0 && no_global_reg_vars)
847 error ("global register variable follows a function definition");
848
849 if (global_regs[i])
850 {
851 warning (0, "register used for two global register variables");
852 return;
853 }
854
855 if (call_used_regs[i] && ! fixed_regs[i])
856 warning (0, "call-clobbered register used for global register variable");
857
858 global_regs[i] = 1;
859
860 /* If we're globalizing the frame pointer, we need to set the
861 appropriate regs_invalidated_by_call bit, even if it's already
862 set in fixed_regs. */
863 if (i != STACK_POINTER_REGNUM)
864 {
865 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
866 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
867 }
868
869 /* If already fixed, nothing else to do. */
870 if (fixed_regs[i])
871 return;
872
873 fixed_regs[i] = call_used_regs[i] = call_fixed_regs[i] = 1;
874 #ifdef CALL_REALLY_USED_REGISTERS
875 call_really_used_regs[i] = 1;
876 #endif
877
878 SET_HARD_REG_BIT (fixed_reg_set, i);
879 SET_HARD_REG_BIT (call_used_reg_set, i);
880 SET_HARD_REG_BIT (call_fixed_reg_set, i);
881
882 reinit_regs ();
883 }
884 \f
885
886 /* Structure used to record preferences of given pseudo. */
887 struct reg_pref
888 {
889 /* (enum reg_class) prefclass is the preferred class. May be
890 NO_REGS if no class is better than memory. */
891 char prefclass;
892
893 /* altclass is a register class that we should use for allocating
894 pseudo if no register in the preferred class is available.
895 If no register in this class is available, memory is preferred.
896
897 It might appear to be more general to have a bitmask of classes here,
898 but since it is recommended that there be a class corresponding to the
899 union of most major pair of classes, that generality is not required. */
900 char altclass;
901 };
902
903 /* Record preferences of each pseudo. This is available after RA is
904 run. */
905 static struct reg_pref *reg_pref;
906
907 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
908 This function is sometimes called before the info has been computed.
909 When that happens, just return GENERAL_REGS, which is innocuous. */
910 enum reg_class
911 reg_preferred_class (int regno)
912 {
913 if (reg_pref == 0)
914 return GENERAL_REGS;
915
916 return (enum reg_class) reg_pref[regno].prefclass;
917 }
918
919 enum reg_class
920 reg_alternate_class (int regno)
921 {
922 if (reg_pref == 0)
923 return ALL_REGS;
924
925 return (enum reg_class) reg_pref[regno].altclass;
926 }
927
928 /* Initialize some global data for this pass. */
929 static unsigned int
930 reginfo_init (void)
931 {
932 if (df)
933 df_compute_regs_ever_live (true);
934
935 /* This prevents dump_flow_info from losing if called
936 before reginfo is run. */
937 reg_pref = NULL;
938
939 /* No more global register variables may be declared. */
940 no_global_reg_vars = 1;
941 return 1;
942 }
943
944 struct rtl_opt_pass pass_reginfo_init =
945 {
946 {
947 RTL_PASS,
948 "reginfo", /* name */
949 NULL, /* gate */
950 reginfo_init, /* execute */
951 NULL, /* sub */
952 NULL, /* next */
953 0, /* static_pass_number */
954 TV_NONE, /* tv_id */
955 0, /* properties_required */
956 0, /* properties_provided */
957 0, /* properties_destroyed */
958 0, /* todo_flags_start */
959 0 /* todo_flags_finish */
960 }
961 };
962
963 \f
964
965 /* Allocate space for reg info. */
966 void
967 allocate_reg_info (void)
968 {
969 int size = max_reg_num ();
970
971 gcc_assert (! reg_pref && ! reg_renumber);
972 reg_renumber = XNEWVEC (short, size);
973 reg_pref = XCNEWVEC (struct reg_pref, size);
974 memset (reg_renumber, -1, size * sizeof (short));
975 }
976
977
978 /* Resize reg info. The new elements will be uninitialized. */
979 void
980 resize_reg_info (void)
981 {
982 int size = max_reg_num ();
983
984 gcc_assert (reg_pref && reg_renumber);
985 reg_renumber = XRESIZEVEC (short, reg_renumber, size);
986 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, size);
987 }
988
989
990 /* Free up the space allocated by allocate_reg_info. */
991 void
992 free_reg_info (void)
993 {
994 if (reg_pref)
995 {
996 free (reg_pref);
997 reg_pref = NULL;
998 }
999
1000 if (reg_renumber)
1001 {
1002 free (reg_renumber);
1003 reg_renumber = NULL;
1004 }
1005 }
1006
1007
1008 \f
1009
1010 /* Set up preferred and alternate classes for REGNO as PREFCLASS and
1011 ALTCLASS. */
1012 void
1013 setup_reg_classes (int regno,
1014 enum reg_class prefclass, enum reg_class altclass)
1015 {
1016 if (reg_pref == NULL)
1017 return;
1018 reg_pref[regno].prefclass = prefclass;
1019 reg_pref[regno].altclass = altclass;
1020 }
1021
1022 \f
1023 /* This is the `regscan' pass of the compiler, run just before cse and
1024 again just before loop. It finds the first and last use of each
1025 pseudo-register. */
1026
1027 static void reg_scan_mark_refs (rtx, rtx);
1028
1029 void
1030 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1031 {
1032 rtx insn;
1033
1034 timevar_push (TV_REG_SCAN);
1035
1036 for (insn = f; insn; insn = NEXT_INSN (insn))
1037 if (INSN_P (insn))
1038 {
1039 reg_scan_mark_refs (PATTERN (insn), insn);
1040 if (REG_NOTES (insn))
1041 reg_scan_mark_refs (REG_NOTES (insn), insn);
1042 }
1043
1044 timevar_pop (TV_REG_SCAN);
1045 }
1046
1047
1048 /* X is the expression to scan. INSN is the insn it appears in.
1049 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1050 We should only record information for REGs with numbers
1051 greater than or equal to MIN_REGNO. */
1052 static void
1053 reg_scan_mark_refs (rtx x, rtx insn)
1054 {
1055 enum rtx_code code;
1056 rtx dest;
1057 rtx note;
1058
1059 if (!x)
1060 return;
1061 code = GET_CODE (x);
1062 switch (code)
1063 {
1064 case CONST:
1065 case CONST_INT:
1066 case CONST_DOUBLE:
1067 case CONST_FIXED:
1068 case CONST_VECTOR:
1069 case CC0:
1070 case PC:
1071 case SYMBOL_REF:
1072 case LABEL_REF:
1073 case ADDR_VEC:
1074 case ADDR_DIFF_VEC:
1075 case REG:
1076 return;
1077
1078 case EXPR_LIST:
1079 if (XEXP (x, 0))
1080 reg_scan_mark_refs (XEXP (x, 0), insn);
1081 if (XEXP (x, 1))
1082 reg_scan_mark_refs (XEXP (x, 1), insn);
1083 break;
1084
1085 case INSN_LIST:
1086 if (XEXP (x, 1))
1087 reg_scan_mark_refs (XEXP (x, 1), insn);
1088 break;
1089
1090 case CLOBBER:
1091 if (MEM_P (XEXP (x, 0)))
1092 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1093 break;
1094
1095 case SET:
1096 /* Count a set of the destination if it is a register. */
1097 for (dest = SET_DEST (x);
1098 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1099 || GET_CODE (dest) == ZERO_EXTEND;
1100 dest = XEXP (dest, 0))
1101 ;
1102
1103 /* If this is setting a pseudo from another pseudo or the sum of a
1104 pseudo and a constant integer and the other pseudo is known to be
1105 a pointer, set the destination to be a pointer as well.
1106
1107 Likewise if it is setting the destination from an address or from a
1108 value equivalent to an address or to the sum of an address and
1109 something else.
1110
1111 But don't do any of this if the pseudo corresponds to a user
1112 variable since it should have already been set as a pointer based
1113 on the type. */
1114
1115 if (REG_P (SET_DEST (x))
1116 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1117 /* If the destination pseudo is set more than once, then other
1118 sets might not be to a pointer value (consider access to a
1119 union in two threads of control in the presence of global
1120 optimizations). So only set REG_POINTER on the destination
1121 pseudo if this is the only set of that pseudo. */
1122 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1123 && ! REG_USERVAR_P (SET_DEST (x))
1124 && ! REG_POINTER (SET_DEST (x))
1125 && ((REG_P (SET_SRC (x))
1126 && REG_POINTER (SET_SRC (x)))
1127 || ((GET_CODE (SET_SRC (x)) == PLUS
1128 || GET_CODE (SET_SRC (x)) == LO_SUM)
1129 && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
1130 && REG_P (XEXP (SET_SRC (x), 0))
1131 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1132 || GET_CODE (SET_SRC (x)) == CONST
1133 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1134 || GET_CODE (SET_SRC (x)) == LABEL_REF
1135 || (GET_CODE (SET_SRC (x)) == HIGH
1136 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1137 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1138 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1139 || ((GET_CODE (SET_SRC (x)) == PLUS
1140 || GET_CODE (SET_SRC (x)) == LO_SUM)
1141 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1142 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1143 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1144 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1145 && (GET_CODE (XEXP (note, 0)) == CONST
1146 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1147 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1148 REG_POINTER (SET_DEST (x)) = 1;
1149
1150 /* If this is setting a register from a register or from a simple
1151 conversion of a register, propagate REG_EXPR. */
1152 if (REG_P (dest) && !REG_ATTRS (dest))
1153 {
1154 rtx src = SET_SRC (x);
1155
1156 while (GET_CODE (src) == SIGN_EXTEND
1157 || GET_CODE (src) == ZERO_EXTEND
1158 || GET_CODE (src) == TRUNCATE
1159 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1160 src = XEXP (src, 0);
1161
1162 set_reg_attrs_from_value (dest, src);
1163 }
1164
1165 /* ... fall through ... */
1166
1167 default:
1168 {
1169 const char *fmt = GET_RTX_FORMAT (code);
1170 int i;
1171 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1172 {
1173 if (fmt[i] == 'e')
1174 reg_scan_mark_refs (XEXP (x, i), insn);
1175 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1176 {
1177 int j;
1178 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1179 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1180 }
1181 }
1182 }
1183 }
1184 }
1185 \f
1186
1187 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1188 is also in C2. */
1189 int
1190 reg_class_subset_p (enum reg_class c1, enum reg_class c2)
1191 {
1192 return (c1 == c2
1193 || c2 == ALL_REGS
1194 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1195 reg_class_contents[(int) c2]));
1196 }
1197
1198 /* Return nonzero if there is a register that is in both C1 and C2. */
1199 int
1200 reg_classes_intersect_p (enum reg_class c1, enum reg_class c2)
1201 {
1202 return (c1 == c2
1203 || c1 == ALL_REGS
1204 || c2 == ALL_REGS
1205 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1206 reg_class_contents[(int) c2]));
1207 }
1208
1209 \f
1210
1211 /* Passes for keeping and updating info about modes of registers
1212 inside subregisters. */
1213
1214 #ifdef CANNOT_CHANGE_MODE_CLASS
1215
1216 struct subregs_of_mode_node
1217 {
1218 unsigned int block;
1219 unsigned char modes[MAX_MACHINE_MODE];
1220 };
1221
1222 static htab_t subregs_of_mode;
1223
1224 static hashval_t
1225 som_hash (const void *x)
1226 {
1227 const struct subregs_of_mode_node *const a =
1228 (const struct subregs_of_mode_node *) x;
1229 return a->block;
1230 }
1231
1232 static int
1233 som_eq (const void *x, const void *y)
1234 {
1235 const struct subregs_of_mode_node *const a =
1236 (const struct subregs_of_mode_node *) x;
1237 const struct subregs_of_mode_node *const b =
1238 (const struct subregs_of_mode_node *) y;
1239 return a->block == b->block;
1240 }
1241
1242 static void
1243 record_subregs_of_mode (rtx subreg)
1244 {
1245 struct subregs_of_mode_node dummy, *node;
1246 enum machine_mode mode;
1247 unsigned int regno;
1248 void **slot;
1249
1250 if (!REG_P (SUBREG_REG (subreg)))
1251 return;
1252
1253 regno = REGNO (SUBREG_REG (subreg));
1254 mode = GET_MODE (subreg);
1255
1256 if (regno < FIRST_PSEUDO_REGISTER)
1257 return;
1258
1259 dummy.block = regno & -8;
1260 slot = htab_find_slot_with_hash (subregs_of_mode, &dummy,
1261 dummy.block, INSERT);
1262 node = (struct subregs_of_mode_node *) *slot;
1263 if (node == NULL)
1264 {
1265 node = XCNEW (struct subregs_of_mode_node);
1266 node->block = regno & -8;
1267 *slot = node;
1268 }
1269
1270 node->modes[mode] |= 1 << (regno & 7);
1271 }
1272
1273 /* Call record_subregs_of_mode for all the subregs in X. */
1274 static void
1275 find_subregs_of_mode (rtx x)
1276 {
1277 enum rtx_code code = GET_CODE (x);
1278 const char * const fmt = GET_RTX_FORMAT (code);
1279 int i;
1280
1281 if (code == SUBREG)
1282 record_subregs_of_mode (x);
1283
1284 /* Time for some deep diving. */
1285 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1286 {
1287 if (fmt[i] == 'e')
1288 find_subregs_of_mode (XEXP (x, i));
1289 else if (fmt[i] == 'E')
1290 {
1291 int j;
1292 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1293 find_subregs_of_mode (XVECEXP (x, i, j));
1294 }
1295 }
1296 }
1297
1298 static unsigned int
1299 init_subregs_of_mode (void)
1300 {
1301 basic_block bb;
1302 rtx insn;
1303
1304 if (subregs_of_mode)
1305 htab_empty (subregs_of_mode);
1306 else
1307 subregs_of_mode = htab_create (100, som_hash, som_eq, free);
1308
1309 FOR_EACH_BB (bb)
1310 FOR_BB_INSNS (bb, insn)
1311 if (INSN_P (insn))
1312 find_subregs_of_mode (PATTERN (insn));
1313
1314 return 0;
1315 }
1316
1317 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1318 mode. */
1319 bool
1320 invalid_mode_change_p (unsigned int regno,
1321 enum reg_class rclass ATTRIBUTE_UNUSED,
1322 enum machine_mode from)
1323 {
1324 struct subregs_of_mode_node dummy, *node;
1325 enum machine_mode to;
1326 unsigned char mask;
1327
1328 gcc_assert (subregs_of_mode);
1329 dummy.block = regno & -8;
1330 node = (struct subregs_of_mode_node *)
1331 htab_find_with_hash (subregs_of_mode, &dummy, dummy.block);
1332 if (node == NULL)
1333 return false;
1334
1335 mask = 1 << (regno & 7);
1336 for (to = VOIDmode; to < NUM_MACHINE_MODES; to++)
1337 if (node->modes[to] & mask)
1338 if (CANNOT_CHANGE_MODE_CLASS (from, to, rclass))
1339 return true;
1340
1341 return false;
1342 }
1343
1344 static unsigned int
1345 finish_subregs_of_mode (void)
1346 {
1347 htab_delete (subregs_of_mode);
1348 subregs_of_mode = 0;
1349 return 0;
1350 }
1351 #else
1352 static unsigned int
1353 init_subregs_of_mode (void)
1354 {
1355 return 0;
1356 }
1357 static unsigned int
1358 finish_subregs_of_mode (void)
1359 {
1360 return 0;
1361 }
1362
1363 #endif /* CANNOT_CHANGE_MODE_CLASS */
1364
1365 static bool
1366 gate_subregs_of_mode_init (void)
1367 {
1368 #ifdef CANNOT_CHANGE_MODE_CLASS
1369 return true;
1370 #else
1371 return false;
1372 #endif
1373 }
1374
1375 struct rtl_opt_pass pass_subregs_of_mode_init =
1376 {
1377 {
1378 RTL_PASS,
1379 "subregs_of_mode_init", /* name */
1380 gate_subregs_of_mode_init, /* gate */
1381 init_subregs_of_mode, /* execute */
1382 NULL, /* sub */
1383 NULL, /* next */
1384 0, /* static_pass_number */
1385 TV_NONE, /* tv_id */
1386 0, /* properties_required */
1387 0, /* properties_provided */
1388 0, /* properties_destroyed */
1389 0, /* todo_flags_start */
1390 0 /* todo_flags_finish */
1391 }
1392 };
1393
1394 struct rtl_opt_pass pass_subregs_of_mode_finish =
1395 {
1396 {
1397 RTL_PASS,
1398 "subregs_of_mode_finish", /* name */
1399 gate_subregs_of_mode_init, /* gate */
1400 finish_subregs_of_mode, /* execute */
1401 NULL, /* sub */
1402 NULL, /* next */
1403 0, /* static_pass_number */
1404 TV_NONE, /* tv_id */
1405 0, /* properties_required */
1406 0, /* properties_provided */
1407 0, /* properties_destroyed */
1408 0, /* todo_flags_start */
1409 0 /* todo_flags_finish */
1410 }
1411 };
1412
1413
1414 #include "gt-reginfo.h"