1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This module looks for cases where matching constraints would force
24 an instruction to need a reload, and this reload would be a register
25 to register move. It then attempts to change the registers used by the
26 instruction to avoid the move instruction. */
30 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
32 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "insn-flags.h"
41 #include "basic-block.h"
44 static int perhaps_ends_bb_p
PARAMS ((rtx
));
45 static int optimize_reg_copy_1
PARAMS ((rtx
, rtx
, rtx
));
46 static void optimize_reg_copy_2
PARAMS ((rtx
, rtx
, rtx
));
47 static void optimize_reg_copy_3
PARAMS ((rtx
, rtx
, rtx
));
48 static rtx gen_add3_insn
PARAMS ((rtx
, rtx
, rtx
));
49 static void copy_src_to_dest
PARAMS ((rtx
, rtx
, rtx
, int));
50 static int *regmove_bb_head
;
53 int with
[MAX_RECOG_OPERANDS
];
54 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
55 int commutative
[MAX_RECOG_OPERANDS
];
56 int early_clobber
[MAX_RECOG_OPERANDS
];
59 static rtx discover_flags_reg
PARAMS ((void));
60 static void mark_flags_life_zones
PARAMS ((rtx
));
61 static void flags_set_1
PARAMS ((rtx
, rtx
, void *));
63 static int try_auto_increment
PARAMS ((rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int));
64 static int find_matches
PARAMS ((rtx
, struct match
*));
65 static int fixup_match_1
PARAMS ((rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int, FILE *))
67 static int reg_is_remote_constant_p
PARAMS ((rtx
, rtx
, rtx
));
68 static int stable_and_no_regs_but_for_p
PARAMS ((rtx
, rtx
, rtx
));
69 static int regclass_compatible_p
PARAMS ((int, int));
70 static int replacement_quality
PARAMS ((rtx
));
71 static int fixup_match_2
PARAMS ((rtx
, rtx
, rtx
, rtx
, FILE *));
73 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
74 causing too much register allocation problems. */
76 regclass_compatible_p (class0
, class1
)
79 return (class0
== class1
80 || (reg_class_subset_p (class0
, class1
)
81 && ! CLASS_LIKELY_SPILLED_P (class0
))
82 || (reg_class_subset_p (class1
, class0
)
83 && ! CLASS_LIKELY_SPILLED_P (class1
)));
86 /* Generate and return an insn body to add r1 and c,
87 storing the result in r0. */
89 gen_add3_insn (r0
, r1
, c
)
92 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
94 if (icode
== CODE_FOR_nothing
95 || ! ((*insn_data
[icode
].operand
[0].predicate
)
96 (r0
, insn_data
[icode
].operand
[0].mode
))
97 || ! ((*insn_data
[icode
].operand
[1].predicate
)
98 (r1
, insn_data
[icode
].operand
[1].mode
))
99 || ! ((*insn_data
[icode
].operand
[2].predicate
)
100 (c
, insn_data
[icode
].operand
[2].mode
)))
103 return (GEN_FCN (icode
) (r0
, r1
, c
));
107 /* INC_INSN is an instruction that adds INCREMENT to REG.
108 Try to fold INC_INSN as a post/pre in/decrement into INSN.
109 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
110 Return nonzero for success. */
112 try_auto_increment (insn
, inc_insn
, inc_insn_set
, reg
, increment
, pre
)
113 rtx reg
, insn
, inc_insn
,inc_insn_set
;
114 HOST_WIDE_INT increment
;
117 enum rtx_code inc_code
;
119 rtx pset
= single_set (insn
);
122 /* Can't use the size of SET_SRC, we might have something like
123 (sign_extend:SI (mem:QI ... */
124 rtx use
= find_use_as_address (pset
, reg
, 0);
125 if (use
!= 0 && use
!= (rtx
) 1)
127 int size
= GET_MODE_SIZE (GET_MODE (use
));
129 || (HAVE_POST_INCREMENT
130 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
131 || (HAVE_PRE_INCREMENT
132 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
133 || (HAVE_POST_DECREMENT
134 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
135 || (HAVE_PRE_DECREMENT
136 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
142 &SET_SRC (inc_insn_set
),
143 XEXP (SET_SRC (inc_insn_set
), 0), 1);
144 validate_change (insn
, &XEXP (use
, 0),
145 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
146 if (apply_change_group ())
149 = gen_rtx_EXPR_LIST (REG_INC
,
150 reg
, REG_NOTES (insn
));
153 PUT_CODE (inc_insn
, NOTE
);
154 NOTE_LINE_NUMBER (inc_insn
) = NOTE_INSN_DELETED
;
155 NOTE_SOURCE_FILE (inc_insn
) = 0;
165 /* Determine if the pattern generated by add_optab has a clobber,
166 such as might be issued for a flags hard register. To make the
167 code elsewhere simpler, we handle cc0 in this same framework.
169 Return the register if one was discovered. Return NULL_RTX if
170 if no flags were found. Return pc_rtx if we got confused. */
173 discover_flags_reg ()
176 tmp
= gen_rtx_REG (word_mode
, 10000);
177 tmp
= gen_add3_insn (tmp
, tmp
, GEN_INT (2));
179 /* If we get something that isn't a simple set, or a
180 [(set ..) (clobber ..)], this whole function will go wrong. */
181 if (GET_CODE (tmp
) == SET
)
183 else if (GET_CODE (tmp
) == PARALLEL
)
187 if (XVECLEN (tmp
, 0) != 2)
189 tmp
= XVECEXP (tmp
, 0, 1);
190 if (GET_CODE (tmp
) != CLOBBER
)
194 /* Don't do anything foolish if the md wanted to clobber a
195 scratch or something. We only care about hard regs.
196 Moreover we don't like the notion of subregs of hard regs. */
197 if (GET_CODE (tmp
) == SUBREG
198 && GET_CODE (SUBREG_REG (tmp
)) == REG
199 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
201 found
= (GET_CODE (tmp
) == REG
&& REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
203 return (found
? tmp
: NULL_RTX
);
209 /* It is a tedious task identifying when the flags register is live and
210 when it is safe to optimize. Since we process the instruction stream
211 multiple times, locate and record these live zones by marking the
212 mode of the instructions --
214 QImode is used on the instruction at which the flags becomes live.
216 HImode is used within the range (exclusive) that the flags are
217 live. Thus the user of the flags is not marked.
219 All other instructions are cleared to VOIDmode. */
221 /* Used to communicate with flags_set_1. */
222 static rtx flags_set_1_rtx
;
223 static int flags_set_1_set
;
226 mark_flags_life_zones (flags
)
234 /* If we found a flags register on a cc0 host, bail. */
235 if (flags
== NULL_RTX
)
237 else if (flags
!= cc0_rtx
)
241 /* Simple cases first: if no flags, clear all modes. If confusing,
242 mark the entire function as being in a flags shadow. */
243 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
245 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
247 for (insn
= get_insns(); insn
; insn
= NEXT_INSN (insn
))
248 PUT_MODE (insn
, mode
);
256 flags_regno
= REGNO (flags
);
257 flags_nregs
= HARD_REGNO_NREGS (flags_regno
, GET_MODE (flags
));
259 flags_set_1_rtx
= flags
;
261 /* Process each basic block. */
262 for (block
= n_basic_blocks
- 1; block
>= 0; block
--)
267 insn
= BLOCK_HEAD (block
);
268 end
= BLOCK_END (block
);
270 /* Look out for the (unlikely) case of flags being live across
271 basic block boundaries. */
276 for (i
= 0; i
< flags_nregs
; ++i
)
277 live
|= REGNO_REG_SET_P (BASIC_BLOCK (block
)->global_live_at_start
,
284 /* Process liveness in reverse order of importance --
285 alive, death, birth. This lets more important info
286 overwrite the mode of lesser info. */
291 /* In the cc0 case, death is not marked in reg notes,
292 but is instead the mere use of cc0 when it is alive. */
293 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
296 /* In the hard reg case, we watch death notes. */
297 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
300 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
302 /* In either case, birth is denoted simply by it's presence
303 as the destination of a set. */
305 note_stores (PATTERN (insn
), flags_set_1
, NULL
);
309 PUT_MODE (insn
, QImode
);
313 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
317 insn
= NEXT_INSN (insn
);
322 /* A subroutine of mark_flags_life_zones, called through note_stores. */
325 flags_set_1 (x
, pat
, data
)
327 void *data ATTRIBUTE_UNUSED
;
329 if (GET_CODE (pat
) == SET
330 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
334 static int *regno_src_regno
;
336 /* Indicate how good a choice REG (which appears as a source) is to replace
337 a destination register with. The higher the returned value, the better
338 the choice. The main objective is to avoid using a register that is
339 a candidate for tying to a hard register, since the output might in
340 turn be a candidate to be tied to a different hard register. */
342 replacement_quality(reg
)
347 /* Bad if this isn't a register at all. */
348 if (GET_CODE (reg
) != REG
)
351 /* If this register is not meant to get a hard register,
352 it is a poor choice. */
353 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
356 src_regno
= regno_src_regno
[REGNO (reg
)];
358 /* If it was not copied from another register, it is fine. */
362 /* Copied from a hard register? */
363 if (src_regno
< FIRST_PSEUDO_REGISTER
)
366 /* Copied from a pseudo register - not as bad as from a hard register,
367 yet still cumbersome, since the register live length will be lengthened
368 when the registers get tied. */
372 /* Return 1 if INSN might end a basic block. */
374 static int perhaps_ends_bb_p (insn
)
377 switch (GET_CODE (insn
))
381 /* These always end a basic block. */
385 /* A CALL_INSN might be the last insn of a basic block, if it is inside
386 an EH region or if there are nonlocal gotos. Note that this test is
387 very conservative. */
388 return flag_exceptions
|| nonlocal_goto_handler_labels
;
391 /* All others never end a basic block. */
396 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
399 Search forward to see if SRC dies before either it or DEST is modified,
400 but don't scan past the end of a basic block. If so, we can replace SRC
401 with DEST and let SRC die in INSN.
403 This will reduce the number of registers live in that range and may enable
404 DEST to be tied to SRC, thus often saving one register in addition to a
405 register-register copy. */
408 optimize_reg_copy_1 (insn
, dest
, src
)
416 int sregno
= REGNO (src
);
417 int dregno
= REGNO (dest
);
419 /* We don't want to mess with hard regs if register classes are small. */
421 || (SMALL_REGISTER_CLASSES
422 && (sregno
< FIRST_PSEUDO_REGISTER
423 || dregno
< FIRST_PSEUDO_REGISTER
))
424 /* We don't see all updates to SP if they are in an auto-inc memory
425 reference, so we must disallow this optimization on them. */
426 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
429 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
431 /* ??? We can't scan past the end of a basic block without updating
432 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
433 if (perhaps_ends_bb_p (p
))
435 else if (! INSN_P (p
))
438 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
439 /* Don't change a USE of a register. */
440 || (GET_CODE (PATTERN (p
)) == USE
441 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
444 /* See if all of SRC dies in P. This test is slightly more
445 conservative than it needs to be. */
446 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
447 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
455 /* We can do the optimization. Scan forward from INSN again,
456 replacing regs as we go. Set FAILED if a replacement can't
457 be done. In that case, we can't move the death note for SRC.
458 This should be rare. */
460 /* Set to stop at next insn. */
461 for (q
= next_real_insn (insn
);
462 q
!= next_real_insn (p
);
463 q
= next_real_insn (q
))
465 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
467 /* If SRC is a hard register, we might miss some
468 overlapping registers with validate_replace_rtx,
469 so we would have to undo it. We can't if DEST is
470 present in the insn, so fail in that combination
472 if (sregno
< FIRST_PSEUDO_REGISTER
473 && reg_mentioned_p (dest
, PATTERN (q
)))
476 /* Replace all uses and make sure that the register
477 isn't still present. */
478 else if (validate_replace_rtx (src
, dest
, q
)
479 && (sregno
>= FIRST_PSEUDO_REGISTER
480 || ! reg_overlap_mentioned_p (src
,
485 validate_replace_rtx (dest
, src
, q
);
490 /* For SREGNO, count the total number of insns scanned.
491 For DREGNO, count the total number of insns scanned after
492 passing the death note for DREGNO. */
497 /* If the insn in which SRC dies is a CALL_INSN, don't count it
498 as a call that has been crossed. Otherwise, count it. */
499 if (q
!= p
&& GET_CODE (q
) == CALL_INSN
)
501 /* Similarly, total calls for SREGNO, total calls beyond
502 the death note for DREGNO. */
508 /* If DEST dies here, remove the death note and save it for
509 later. Make sure ALL of DEST dies here; again, this is
510 overly conservative. */
512 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
514 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
515 failed
= 1, dest_death
= 0;
517 remove_note (q
, dest_death
);
523 /* These counters need to be updated if and only if we are
524 going to move the REG_DEAD note. */
525 if (sregno
>= FIRST_PSEUDO_REGISTER
)
527 if (REG_LIVE_LENGTH (sregno
) >= 0)
529 REG_LIVE_LENGTH (sregno
) -= s_length
;
530 /* REG_LIVE_LENGTH is only an approximation after
531 combine if sched is not run, so make sure that we
532 still have a reasonable value. */
533 if (REG_LIVE_LENGTH (sregno
) < 2)
534 REG_LIVE_LENGTH (sregno
) = 2;
537 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
540 /* Move death note of SRC from P to INSN. */
541 remove_note (p
, note
);
542 XEXP (note
, 1) = REG_NOTES (insn
);
543 REG_NOTES (insn
) = note
;
546 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
548 && (dest_death
= find_regno_note (insn
, REG_UNUSED
, dregno
)))
550 PUT_REG_NOTE_KIND (dest_death
, REG_DEAD
);
551 remove_note (insn
, dest_death
);
554 /* Put death note of DEST on P if we saw it die. */
557 XEXP (dest_death
, 1) = REG_NOTES (p
);
558 REG_NOTES (p
) = dest_death
;
560 if (dregno
>= FIRST_PSEUDO_REGISTER
)
562 /* If and only if we are moving the death note for DREGNO,
563 then we need to update its counters. */
564 if (REG_LIVE_LENGTH (dregno
) >= 0)
565 REG_LIVE_LENGTH (dregno
) += d_length
;
566 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
573 /* If SRC is a hard register which is set or killed in some other
574 way, we can't do this optimization. */
575 else if (sregno
< FIRST_PSEUDO_REGISTER
576 && dead_or_set_p (p
, src
))
582 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
583 a sequence of insns that modify DEST followed by an insn that sets
584 SRC to DEST in which DEST dies, with no prior modification of DEST.
585 (There is no need to check if the insns in between actually modify
586 DEST. We should not have cases where DEST is not modified, but
587 the optimization is safe if no such modification is detected.)
588 In that case, we can replace all uses of DEST, starting with INSN and
589 ending with the set of SRC to DEST, with SRC. We do not do this
590 optimization if a CALL_INSN is crossed unless SRC already crosses a
591 call or if DEST dies before the copy back to SRC.
593 It is assumed that DEST and SRC are pseudos; it is too complicated to do
594 this for hard registers since the substitutions we may make might fail. */
597 optimize_reg_copy_2 (insn
, dest
, src
)
604 int sregno
= REGNO (src
);
605 int dregno
= REGNO (dest
);
607 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
609 /* ??? We can't scan past the end of a basic block without updating
610 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
611 if (perhaps_ends_bb_p (p
))
613 else if (! INSN_P (p
))
616 set
= single_set (p
);
617 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
618 && find_reg_note (p
, REG_DEAD
, dest
))
620 /* We can do the optimization. Scan forward from INSN again,
621 replacing regs as we go. */
623 /* Set to stop at next insn. */
624 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
627 if (reg_mentioned_p (dest
, PATTERN (q
)))
628 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
631 if (GET_CODE (q
) == CALL_INSN
)
633 REG_N_CALLS_CROSSED (dregno
)--;
634 REG_N_CALLS_CROSSED (sregno
)++;
638 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
639 REG_N_DEATHS (dregno
)--;
640 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
641 REG_N_DEATHS (sregno
)--;
645 if (reg_set_p (src
, p
)
646 || find_reg_note (p
, REG_DEAD
, dest
)
647 || (GET_CODE (p
) == CALL_INSN
&& REG_N_CALLS_CROSSED (sregno
) == 0))
651 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
652 Look if SRC dies there, and if it is only set once, by loading
653 it from memory. If so, try to encorporate the zero/sign extension
654 into the memory read, change SRC to the mode of DEST, and alter
655 the remaining accesses to use the appropriate SUBREG. This allows
656 SRC and DEST to be tied later. */
658 optimize_reg_copy_3 (insn
, dest
, src
)
663 rtx src_reg
= XEXP (src
, 0);
664 int src_no
= REGNO (src_reg
);
665 int dst_no
= REGNO (dest
);
667 enum machine_mode old_mode
;
669 if (src_no
< FIRST_PSEUDO_REGISTER
670 || dst_no
< FIRST_PSEUDO_REGISTER
671 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
672 || REG_N_SETS (src_no
) != 1)
674 for (p
= PREV_INSN (insn
); p
&& ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
675 /* ??? We can't scan past the end of a basic block without updating
676 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
677 if (perhaps_ends_bb_p (p
))
683 if (! (set
= single_set (p
))
684 || GET_CODE (SET_SRC (set
)) != MEM
685 || SET_DEST (set
) != src_reg
)
688 /* Be conserative: although this optimization is also valid for
689 volatile memory references, that could cause trouble in later passes. */
690 if (MEM_VOLATILE_P (SET_SRC (set
)))
693 /* Do not use a SUBREG to truncate from one mode to another if truncation
695 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
696 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
697 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
700 old_mode
= GET_MODE (src_reg
);
701 PUT_MODE (src_reg
, GET_MODE (src
));
702 XEXP (src
, 0) = SET_SRC (set
);
704 /* Include this change in the group so that it's easily undone if
705 one of the changes in the group is invalid. */
706 validate_change (p
, &SET_SRC (set
), src
, 1);
708 /* Now walk forward making additional replacements. We want to be able
709 to undo all the changes if a later substitution fails. */
710 subreg
= gen_rtx_SUBREG (old_mode
, src_reg
, 0);
711 while (p
= NEXT_INSN (p
), p
!= insn
)
716 /* Make a tenative change. */
717 validate_replace_rtx_group (src_reg
, subreg
, p
);
720 validate_replace_rtx_group (src
, src_reg
, insn
);
722 /* Now see if all the changes are valid. */
723 if (! apply_change_group ())
725 /* One or more changes were no good. Back out everything. */
726 PUT_MODE (src_reg
, old_mode
);
727 XEXP (src
, 0) = src_reg
;
732 /* If we were not able to update the users of src to use dest directly, try
733 instead moving the value to dest directly before the operation. */
736 copy_src_to_dest (insn
, src
, dest
, old_max_uid
)
755 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
756 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
757 parameter when there is no frame pointer that is not allocated a register.
758 For now, we just reject them, rather than incrementing the live length. */
760 if (GET_CODE (src
) == REG
761 && REG_LIVE_LENGTH (REGNO (src
)) > 0
762 && GET_CODE (dest
) == REG
763 && !RTX_UNCHANGING_P (dest
)
764 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
765 && (set
= single_set (insn
)) != NULL_RTX
766 && !reg_mentioned_p (dest
, SET_SRC (set
))
767 && GET_MODE (src
) == GET_MODE (dest
))
769 int old_num_regs
= reg_rtx_no
;
771 /* Generate the src->dest move. */
773 emit_move_insn (dest
, src
);
774 seq
= gen_sequence ();
776 /* If this sequence uses new registers, we may not use it. */
777 if (old_num_regs
!= reg_rtx_no
778 || ! validate_replace_rtx (src
, dest
, insn
))
780 /* We have to restore reg_rtx_no to its old value, lest
781 recompute_reg_usage will try to compute the usage of the
782 new regs, yet reg_n_info is not valid for them. */
783 reg_rtx_no
= old_num_regs
;
786 emit_insn_before (seq
, insn
);
787 move_insn
= PREV_INSN (insn
);
788 p_move_notes
= ®_NOTES (move_insn
);
789 p_insn_notes
= ®_NOTES (insn
);
791 /* Move any notes mentioning src to the move instruction */
792 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
794 next
= XEXP (link
, 1);
795 if (XEXP (link
, 0) == src
)
797 *p_move_notes
= link
;
798 p_move_notes
= &XEXP (link
, 1);
802 *p_insn_notes
= link
;
803 p_insn_notes
= &XEXP (link
, 1);
807 *p_move_notes
= NULL_RTX
;
808 *p_insn_notes
= NULL_RTX
;
810 /* Is the insn the head of a basic block? If so extend it */
811 insn_uid
= INSN_UID (insn
);
812 move_uid
= INSN_UID (move_insn
);
813 if (insn_uid
< old_max_uid
)
815 bb
= regmove_bb_head
[insn_uid
];
818 BLOCK_HEAD (bb
) = move_insn
;
819 regmove_bb_head
[insn_uid
] = -1;
823 /* Update the various register tables. */
824 dest_regno
= REGNO (dest
);
825 REG_N_SETS (dest_regno
) ++;
826 REG_LIVE_LENGTH (dest_regno
)++;
827 if (REGNO_FIRST_UID (dest_regno
) == insn_uid
)
828 REGNO_FIRST_UID (dest_regno
) = move_uid
;
830 src_regno
= REGNO (src
);
831 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
832 REG_LIVE_LENGTH (src_regno
)++;
834 if (REGNO_FIRST_UID (src_regno
) == insn_uid
)
835 REGNO_FIRST_UID (src_regno
) = move_uid
;
837 if (REGNO_LAST_UID (src_regno
) == insn_uid
)
838 REGNO_LAST_UID (src_regno
) = move_uid
;
840 if (REGNO_LAST_NOTE_UID (src_regno
) == insn_uid
)
841 REGNO_LAST_NOTE_UID (src_regno
) = move_uid
;
846 /* Return whether REG is set in only one location, and is set to a
847 constant, but is set in a different basic block from INSN (an
848 instructions which uses REG). In this case REG is equivalent to a
849 constant, and we don't want to break that equivalence, because that
850 may increase register pressure and make reload harder. If REG is
851 set in the same basic block as INSN, we don't worry about it,
852 because we'll probably need a register anyhow (??? but what if REG
853 is used in a different basic block as well as this one?). FIRST is
854 the first insn in the function. */
857 reg_is_remote_constant_p (reg
, insn
, first
)
864 if (REG_N_SETS (REGNO (reg
)) != 1)
867 /* Look for the set. */
868 for (p
= LOG_LINKS (insn
); p
; p
= XEXP (p
, 1))
872 if (REG_NOTE_KIND (p
) != 0)
874 s
= single_set (XEXP (p
, 0));
876 && GET_CODE (SET_DEST (s
)) == REG
877 && REGNO (SET_DEST (s
)) == REGNO (reg
))
879 /* The register is set in the same basic block. */
884 for (p
= first
; p
&& p
!= insn
; p
= NEXT_INSN (p
))
892 && GET_CODE (SET_DEST (s
)) == REG
893 && REGNO (SET_DEST (s
)) == REGNO (reg
))
895 /* This is the instruction which sets REG. If there is a
896 REG_EQUAL note, then REG is equivalent to a constant. */
897 if (find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
906 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
907 another add immediate instruction with the same source and dest registers,
908 and if we find one, we change INSN to an increment, and return 1. If
909 no changes are made, we return 0.
912 (set (reg100) (plus reg1 offset1))
914 (set (reg100) (plus reg1 offset2))
916 (set (reg100) (plus reg1 offset1))
918 (set (reg100) (plus reg100 offset2-offset1)) */
920 /* ??? What does this comment mean? */
921 /* cse disrupts preincrement / postdecrement squences when it finds a
922 hard register as ultimate source, like the frame pointer. */
925 fixup_match_2 (insn
, dst
, src
, offset
, regmove_dump_file
)
926 rtx insn
, dst
, src
, offset
;
927 FILE *regmove_dump_file
;
929 rtx p
, dst_death
= 0;
930 int length
, num_calls
= 0;
932 /* If SRC dies in INSN, we'd have to move the death note. This is
933 considered to be very unlikely, so we just skip the optimization
935 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
938 /* Scan backward to find the first instruction that sets DST. */
940 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
944 /* ??? We can't scan past the end of a basic block without updating
945 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
946 if (perhaps_ends_bb_p (p
))
948 else if (! INSN_P (p
))
951 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
956 pset
= single_set (p
);
957 if (pset
&& SET_DEST (pset
) == dst
958 && GET_CODE (SET_SRC (pset
)) == PLUS
959 && XEXP (SET_SRC (pset
), 0) == src
960 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
962 HOST_WIDE_INT newconst
963 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
964 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
966 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
968 /* Remove the death note for DST from DST_DEATH. */
971 remove_death (REGNO (dst
), dst_death
);
972 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
973 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
976 if (regmove_dump_file
)
977 fprintf (regmove_dump_file
,
978 "Fixed operand of insn %d.\n",
982 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
984 if (GET_CODE (p
) == CODE_LABEL
985 || GET_CODE (p
) == JUMP_INSN
)
989 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
991 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
996 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
998 if (GET_CODE (p
) == CODE_LABEL
999 || GET_CODE (p
) == JUMP_INSN
)
1003 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1005 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
1014 if (reg_set_p (dst
, PATTERN (p
)))
1017 /* If we have passed a call instruction, and the
1018 pseudo-reg SRC is not already live across a call,
1019 then don't perform the optimization. */
1020 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1021 hard regs are clobbered. Thus, we only use it for src for
1023 if (GET_CODE (p
) == CALL_INSN
)
1028 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1031 if (call_used_regs
[REGNO (dst
)]
1032 || find_reg_fusage (p
, CLOBBER
, dst
))
1035 else if (reg_set_p (src
, PATTERN (p
)))
1043 regmove_optimize (f
, nregs
, regmove_dump_file
)
1046 FILE *regmove_dump_file
;
1048 int old_max_uid
= get_max_uid ();
1053 rtx copy_src
, copy_dst
;
1055 /* Find out where a potential flags register is live, and so that we
1056 can supress some optimizations in those zones. */
1057 mark_flags_life_zones (discover_flags_reg ());
1059 regno_src_regno
= (int *) xmalloc (sizeof *regno_src_regno
* nregs
);
1060 for (i
= nregs
; --i
>= 0; ) regno_src_regno
[i
] = -1;
1062 regmove_bb_head
= (int *) xmalloc (sizeof (int) * (old_max_uid
+ 1));
1063 for (i
= old_max_uid
; i
>= 0; i
--) regmove_bb_head
[i
] = -1;
1064 for (i
= 0; i
< n_basic_blocks
; i
++)
1065 regmove_bb_head
[INSN_UID (BLOCK_HEAD (i
))] = i
;
1067 /* A forward/backward pass. Replace output operands with input operands. */
1069 for (pass
= 0; pass
<= 2; pass
++)
1071 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
1074 if (regmove_dump_file
)
1075 fprintf (regmove_dump_file
, "Starting %s pass...\n",
1076 pass
? "backward" : "forward");
1078 for (insn
= pass
? get_last_insn () : f
; insn
;
1079 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1082 int op_no
, match_no
;
1084 set
= single_set (insn
);
1088 if (flag_expensive_optimizations
&& ! pass
1089 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1090 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1091 && GET_CODE (XEXP (SET_SRC (set
), 0)) == REG
1092 && GET_CODE (SET_DEST(set
)) == REG
)
1093 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1095 if (flag_expensive_optimizations
&& ! pass
1096 && GET_CODE (SET_SRC (set
)) == REG
1097 && GET_CODE (SET_DEST(set
)) == REG
)
1099 /* If this is a register-register copy where SRC is not dead,
1100 see if we can optimize it. If this optimization succeeds,
1101 it will become a copy where SRC is dead. */
1102 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1103 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1104 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1106 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1107 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1108 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1109 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1110 && SET_SRC (set
) != SET_DEST (set
))
1112 int srcregno
= REGNO (SET_SRC(set
));
1113 if (regno_src_regno
[srcregno
] >= 0)
1114 srcregno
= regno_src_regno
[srcregno
];
1115 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1122 if (! find_matches (insn
, &match
))
1125 /* Now scan through the operands looking for a source operand
1126 which is supposed to match the destination operand.
1127 Then scan forward for an instruction which uses the dest
1129 If it dies there, then replace the dest in both operands with
1130 the source operand. */
1132 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1134 rtx src
, dst
, src_subreg
;
1135 enum reg_class src_class
, dst_class
;
1137 match_no
= match
.with
[op_no
];
1139 /* Nothing to do if the two operands aren't supposed to match. */
1143 src
= recog_data
.operand
[op_no
];
1144 dst
= recog_data
.operand
[match_no
];
1146 if (GET_CODE (src
) != REG
)
1150 if (GET_CODE (dst
) == SUBREG
1151 && GET_MODE_SIZE (GET_MODE (dst
))
1152 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1155 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst
)),
1156 src
, SUBREG_WORD (dst
));
1157 dst
= SUBREG_REG (dst
);
1159 if (GET_CODE (dst
) != REG
1160 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1163 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1165 if (match
.commutative
[op_no
] < op_no
)
1166 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1170 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1173 /* op_no/src must be a read-only operand, and
1174 match_operand/dst must be a write-only operand. */
1175 if (match
.use
[op_no
] != READ
1176 || match
.use
[match_no
] != WRITE
)
1179 if (match
.early_clobber
[match_no
]
1180 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1183 /* Make sure match_operand is the destination. */
1184 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1187 /* If the operands already match, then there is nothing to do. */
1188 if (operands_match_p (src
, dst
))
1191 /* But in the commutative case, we might find a better match. */
1192 if (match
.commutative
[op_no
] >= 0)
1194 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1195 if (operands_match_p (comm
, dst
)
1196 && (replacement_quality (comm
)
1197 >= replacement_quality (src
)))
1201 src_class
= reg_preferred_class (REGNO (src
));
1202 dst_class
= reg_preferred_class (REGNO (dst
));
1203 if (! regclass_compatible_p (src_class
, dst_class
))
1206 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1214 /* A backward pass. Replace input operands with output operands. */
1216 if (regmove_dump_file
)
1217 fprintf (regmove_dump_file
, "Starting backward pass...\n");
1219 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1223 int op_no
, match_no
;
1226 if (! find_matches (insn
, &match
))
1229 /* Now scan through the operands looking for a destination operand
1230 which is supposed to match a source operand.
1231 Then scan backward for an instruction which sets the source
1232 operand. If safe, then replace the source operand with the
1233 dest operand in both instructions. */
1235 copy_src
= NULL_RTX
;
1236 copy_dst
= NULL_RTX
;
1237 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1239 rtx set
, p
, src
, dst
;
1240 rtx src_note
, dst_note
;
1242 enum reg_class src_class
, dst_class
;
1245 match_no
= match
.with
[op_no
];
1247 /* Nothing to do if the two operands aren't supposed to match. */
1251 dst
= recog_data
.operand
[match_no
];
1252 src
= recog_data
.operand
[op_no
];
1254 if (GET_CODE (src
) != REG
)
1257 if (GET_CODE (dst
) != REG
1258 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1259 || REG_LIVE_LENGTH (REGNO (dst
)) < 0)
1262 /* If the operands already match, then there is nothing to do. */
1263 if (operands_match_p (src
, dst
))
1266 if (match
.commutative
[op_no
] >= 0)
1268 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1269 if (operands_match_p (comm
, dst
))
1273 set
= single_set (insn
);
1277 /* match_no/dst must be a write-only operand, and
1278 operand_operand/src must be a read-only operand. */
1279 if (match
.use
[op_no
] != READ
1280 || match
.use
[match_no
] != WRITE
)
1283 if (match
.early_clobber
[match_no
]
1284 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1287 /* Make sure match_no is the destination. */
1288 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1291 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1293 if (GET_CODE (SET_SRC (set
)) == PLUS
1294 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1295 && XEXP (SET_SRC (set
), 0) == src
1296 && fixup_match_2 (insn
, dst
, src
,
1297 XEXP (SET_SRC (set
), 1),
1302 src_class
= reg_preferred_class (REGNO (src
));
1303 dst_class
= reg_preferred_class (REGNO (dst
));
1304 if (! regclass_compatible_p (src_class
, dst_class
))
1314 /* Can not modify an earlier insn to set dst if this insn
1315 uses an old value in the source. */
1316 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1326 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1337 /* If src is set once in a different basic block,
1338 and is set equal to a constant, then do not use
1339 it for this optimization, as this would make it
1340 no longer equivalent to a constant. */
1342 if (reg_is_remote_constant_p (src
, insn
, f
))
1353 if (regmove_dump_file
)
1354 fprintf (regmove_dump_file
,
1355 "Could fix operand %d of insn %d matching operand %d.\n",
1356 op_no
, INSN_UID (insn
), match_no
);
1358 /* Scan backward to find the first instruction that uses
1359 the input operand. If the operand is set here, then
1360 replace it in both instructions with match_no. */
1362 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1366 /* ??? We can't scan past the end of a basic block without
1367 updating the register lifetime info
1368 (REG_DEAD/basic_block_live_at_start). */
1369 if (perhaps_ends_bb_p (p
))
1371 else if (! INSN_P (p
))
1376 /* ??? See if all of SRC is set in P. This test is much
1377 more conservative than it needs to be. */
1378 pset
= single_set (p
);
1379 if (pset
&& SET_DEST (pset
) == src
)
1381 /* We use validate_replace_rtx, in case there
1382 are multiple identical source operands. All of
1383 them have to be changed at the same time. */
1384 if (validate_replace_rtx (src
, dst
, insn
))
1386 if (validate_change (p
, &SET_DEST (pset
),
1391 /* Change all source operands back.
1392 This modifies the dst as a side-effect. */
1393 validate_replace_rtx (dst
, src
, insn
);
1394 /* Now make sure the dst is right. */
1395 validate_change (insn
,
1396 recog_data
.operand_loc
[match_no
],
1403 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1404 || reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1407 /* If we have passed a call instruction, and the
1408 pseudo-reg DST is not already live across a call,
1409 then don't perform the optimization. */
1410 if (GET_CODE (p
) == CALL_INSN
)
1414 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1423 /* Remove the death note for SRC from INSN. */
1424 remove_note (insn
, src_note
);
1425 /* Move the death note for SRC to P if it is used
1427 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1429 XEXP (src_note
, 1) = REG_NOTES (p
);
1430 REG_NOTES (p
) = src_note
;
1432 /* If there is a REG_DEAD note for DST on P, then remove
1433 it, because DST is now set there. */
1434 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1435 remove_note (p
, dst_note
);
1437 dstno
= REGNO (dst
);
1438 srcno
= REGNO (src
);
1440 REG_N_SETS (dstno
)++;
1441 REG_N_SETS (srcno
)--;
1443 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1444 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1446 REG_LIVE_LENGTH (dstno
) += length
;
1447 if (REG_LIVE_LENGTH (srcno
) >= 0)
1449 REG_LIVE_LENGTH (srcno
) -= length
;
1450 /* REG_LIVE_LENGTH is only an approximation after
1451 combine if sched is not run, so make sure that we
1452 still have a reasonable value. */
1453 if (REG_LIVE_LENGTH (srcno
) < 2)
1454 REG_LIVE_LENGTH (srcno
) = 2;
1457 if (regmove_dump_file
)
1458 fprintf (regmove_dump_file
,
1459 "Fixed operand %d of insn %d matching operand %d.\n",
1460 op_no
, INSN_UID (insn
), match_no
);
1466 /* If we weren't able to replace any of the alternatives, try an
1467 alternative appoach of copying the source to the destination. */
1468 if (!success
&& copy_src
!= NULL_RTX
)
1469 copy_src_to_dest (insn
, copy_src
, copy_dst
, old_max_uid
);
1474 /* In fixup_match_1, some insns may have been inserted after basic block
1475 ends. Fix that here. */
1476 for (i
= 0; i
< n_basic_blocks
; i
++)
1478 rtx end
= BLOCK_END (i
);
1480 rtx next
= NEXT_INSN (new);
1481 while (next
!= 0 && INSN_UID (next
) >= old_max_uid
1482 && (i
== n_basic_blocks
- 1 || BLOCK_HEAD (i
+ 1) != next
))
1483 new = next
, next
= NEXT_INSN (new);
1484 BLOCK_END (i
) = new;
1489 free (regno_src_regno
);
1490 free (regmove_bb_head
);
1493 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1494 Returns 0 if INSN can't be recognized, or if the alternative can't be
1497 Initialize the info in MATCHP based on the constraints. */
1500 find_matches (insn
, matchp
)
1502 struct match
*matchp
;
1504 int likely_spilled
[MAX_RECOG_OPERANDS
];
1506 int any_matches
= 0;
1508 extract_insn (insn
);
1509 if (! constrain_operands (0))
1512 /* Must initialize this before main loop, because the code for
1513 the commutative case may set matches for operands other than
1515 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1516 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1518 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1524 p
= recog_data
.constraints
[op_no
];
1526 likely_spilled
[op_no
] = 0;
1527 matchp
->use
[op_no
] = READ
;
1528 matchp
->early_clobber
[op_no
] = 0;
1530 matchp
->use
[op_no
] = WRITE
;
1532 matchp
->use
[op_no
] = READWRITE
;
1534 for (;*p
&& i
< which_alternative
; p
++)
1538 while ((c
= *p
++) != '\0' && c
!= ',')
1546 matchp
->early_clobber
[op_no
] = 1;
1549 matchp
->commutative
[op_no
] = op_no
+ 1;
1550 matchp
->commutative
[op_no
+ 1] = op_no
;
1552 case '0': case '1': case '2': case '3': case '4':
1553 case '5': case '6': case '7': case '8': case '9':
1555 if (c
< op_no
&& likely_spilled
[(unsigned char) c
])
1557 matchp
->with
[op_no
] = c
;
1559 if (matchp
->commutative
[op_no
] >= 0)
1560 matchp
->with
[matchp
->commutative
[op_no
]] = c
;
1562 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1563 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1564 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1565 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1566 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c
)))
1567 likely_spilled
[op_no
] = 1;
1574 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1575 the only set in INSN. INSN has just been recognized and constrained.
1576 SRC is operand number OPERAND_NUMBER in INSN.
1577 DST is operand number MATCH_NUMBER in INSN.
1578 If BACKWARD is nonzero, we have been called in a backward pass.
1579 Return nonzero for success. */
1582 fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, backward
, operand_number
,
1583 match_number
, regmove_dump_file
)
1584 rtx insn
, set
, src
, src_subreg
, dst
;
1585 int backward
, operand_number
, match_number
;
1586 FILE *regmove_dump_file
;
1589 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1591 int num_calls
= 0, s_num_calls
= 0;
1592 enum rtx_code code
= NOTE
;
1593 HOST_WIDE_INT insn_const
= 0, newconst
;
1594 rtx overlap
= 0; /* need to move insn ? */
1595 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
= NULL_RTX
;
1596 int length
, s_length
;
1598 /* If SRC is marked as unchanging, we may not change it.
1599 ??? Maybe we could get better code by removing the unchanging bit
1600 instead, and changing it back if we don't succeed? */
1601 if (RTX_UNCHANGING_P (src
))
1606 /* Look for (set (regX) (op regA constX))
1607 (set (regY) (op regA constY))
1609 (set (regA) (op regA constX)).
1610 (set (regY) (op regA constY-constX)).
1611 This works for add and shift operations, if
1612 regA is dead after or set by the second insn. */
1614 code
= GET_CODE (SET_SRC (set
));
1615 if ((code
== PLUS
|| code
== LSHIFTRT
1616 || code
== ASHIFT
|| code
== ASHIFTRT
)
1617 && XEXP (SET_SRC (set
), 0) == src
1618 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1619 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1620 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1623 /* We might find a src_note while scanning. */
1627 if (regmove_dump_file
)
1628 fprintf (regmove_dump_file
,
1629 "Could fix operand %d of insn %d matching operand %d.\n",
1630 operand_number
, INSN_UID (insn
), match_number
);
1632 /* If SRC is equivalent to a constant set in a different basic block,
1633 then do not use it for this optimization. We want the equivalence
1634 so that if we have to reload this register, we can reload the
1635 constant, rather than extending the lifespan of the register. */
1636 if (reg_is_remote_constant_p (src
, insn
, get_insns ()))
1639 /* Scan forward to find the next instruction that
1640 uses the output operand. If the operand dies here,
1641 then replace it in both instructions with
1644 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1646 /* ??? We can't scan past the end of a basic block without updating
1647 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1648 if (perhaps_ends_bb_p (p
))
1650 else if (! INSN_P (p
))
1657 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1658 || (GET_CODE (PATTERN (p
)) == USE
1659 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1662 /* See if all of DST dies in P. This test is
1663 slightly more conservative than it needs to be. */
1664 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1665 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1667 /* If we would be moving INSN, check that we won't move it
1668 into the shadow of a live a live flags register. */
1669 /* ??? We only try to move it in front of P, although
1670 we could move it anywhere between OVERLAP and P. */
1671 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1677 rtx set2
= NULL_RTX
;
1679 /* If an optimization is done, the value of SRC while P
1680 is executed will be changed. Check that this is OK. */
1681 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1683 for (q
= p
; q
; q
= NEXT_INSN (q
))
1685 /* ??? We can't scan past the end of a basic block without
1686 updating the register lifetime info
1687 (REG_DEAD/basic_block_live_at_start). */
1688 if (perhaps_ends_bb_p (q
))
1693 else if (! INSN_P (q
))
1695 else if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1696 || reg_set_p (src
, q
))
1700 set2
= single_set (q
);
1701 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1702 || XEXP (SET_SRC (set2
), 0) != src
1703 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1704 || (SET_DEST (set2
) != src
1705 && ! find_reg_note (q
, REG_DEAD
, src
)))
1707 /* If this is a PLUS, we can still save a register by doing
1710 src -= insn_const; .
1711 This also gives opportunities for subsequent
1712 optimizations in the backward pass, so do it there. */
1713 if (code
== PLUS
&& backward
1714 /* Don't do this if we can likely tie DST to SET_DEST
1715 of P later; we can't do this tying here if we got a
1717 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1719 && GET_CODE (SET_DEST (single_set (p
))) == REG
1720 && (REGNO (SET_DEST (single_set (p
)))
1721 < FIRST_PSEUDO_REGISTER
))
1722 /* We may only emit an insn directly after P if we
1723 are not in the shadow of a live flags register. */
1724 && GET_MODE (p
) == VOIDmode
)
1729 newconst
= -insn_const
;
1737 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1738 /* Reject out of range shifts. */
1741 || ((unsigned HOST_WIDE_INT
) newconst
1742 >= (GET_MODE_BITSIZE (GET_MODE
1743 (SET_SRC (set2
)))))))
1748 if (SET_DEST (set2
) != src
)
1749 post_inc_set
= set2
;
1752 /* We use 1 as last argument to validate_change so that all
1753 changes are accepted or rejected together by apply_change_group
1754 when it is called by validate_replace_rtx . */
1755 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1756 GEN_INT (newconst
), 1);
1758 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1759 if (validate_replace_rtx (dst
, src_subreg
, p
))
1764 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1766 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1768 /* INSN was already checked to be movable wrt. the registers that it
1769 sets / uses when we found no REG_DEAD note for src on it, but it
1770 still might clobber the flags register. We'll have to check that
1771 we won't insert it into the shadow of a live flags register when
1772 we finally know where we are to move it. */
1774 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1777 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1778 already live across a call, then don't perform the optimization. */
1779 if (GET_CODE (p
) == CALL_INSN
)
1781 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1795 /* Remove the death note for DST from P. */
1796 remove_note (p
, dst_note
);
1799 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1800 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1802 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1804 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1805 REG_N_SETS (REGNO (src
))++;
1806 REG_LIVE_LENGTH (REGNO (src
))++;
1810 /* The lifetime of src and dest overlap,
1811 but we can change this by moving insn. */
1812 rtx pat
= PATTERN (insn
);
1814 remove_note (overlap
, src_note
);
1815 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1817 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1821 rtx notes
= REG_NOTES (insn
);
1823 emit_insn_after_with_line_notes (pat
, PREV_INSN (p
), insn
);
1824 PUT_CODE (insn
, NOTE
);
1825 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1826 NOTE_SOURCE_FILE (insn
) = 0;
1827 /* emit_insn_after_with_line_notes has no
1828 return value, so search for the new insn. */
1830 while (! INSN_P (insn
) || PATTERN (insn
) != pat
)
1831 insn
= PREV_INSN (insn
);
1833 REG_NOTES (insn
) = notes
;
1836 /* Sometimes we'd generate src = const; src += n;
1837 if so, replace the instruction that set src
1838 in the first place. */
1840 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1842 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1843 rtx q
, set2
= NULL_RTX
;
1844 int num_calls2
= 0, s_length2
= 0;
1846 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1848 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN(q
))
1850 /* ??? We can't scan past the end of a basic block without
1851 updating the register lifetime info
1852 (REG_DEAD/basic_block_live_at_start). */
1853 if (perhaps_ends_bb_p (q
))
1858 else if (! INSN_P (q
))
1862 if (reg_set_p (src
, q
))
1864 set2
= single_set (q
);
1867 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1872 if (GET_CODE (p
) == CALL_INSN
)
1875 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1876 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1879 NOTE_LINE_NUMBER (q
) = NOTE_INSN_DELETED
;
1880 NOTE_SOURCE_FILE (q
) = 0;
1881 REG_N_SETS (REGNO (src
))--;
1882 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1883 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1889 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1890 && (code
== PLUS
|| code
== MINUS
) && insn_const
1891 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1893 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1895 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1897 /* If post_inc still prevails, try to find an
1898 insn where it can be used as a pre-in/decrement.
1899 If code is MINUS, this was already tried. */
1900 if (post_inc
&& code
== PLUS
1901 /* Check that newconst is likely to be usable
1902 in a pre-in/decrement before starting the search. */
1903 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
1904 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
1905 && exact_log2 (newconst
))
1909 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
1910 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
1912 /* ??? We can't scan past the end of a basic block without updating
1913 the register lifetime info
1914 (REG_DEAD/basic_block_live_at_start). */
1915 if (perhaps_ends_bb_p (q
))
1917 else if (! INSN_P (q
))
1919 else if (src
!= inc_dest
1920 && (reg_overlap_mentioned_p (src
, PATTERN (q
))
1921 || reg_set_p (src
, q
)))
1923 else if (reg_set_p (inc_dest
, q
))
1925 else if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
1927 try_auto_increment (q
, post_inc
,
1928 post_inc_set
, inc_dest
, newconst
, 1);
1934 /* Move the death note for DST to INSN if it is used
1936 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
1938 XEXP (dst_note
, 1) = REG_NOTES (insn
);
1939 REG_NOTES (insn
) = dst_note
;
1944 /* Move the death note for SRC from INSN to P. */
1946 remove_note (insn
, src_note
);
1947 XEXP (src_note
, 1) = REG_NOTES (p
);
1948 REG_NOTES (p
) = src_note
;
1950 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
1953 REG_N_SETS (REGNO (src
))++;
1954 REG_N_SETS (REGNO (dst
))--;
1956 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
1958 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
1959 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
1961 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
1962 /* REG_LIVE_LENGTH is only an approximation after
1963 combine if sched is not run, so make sure that we
1964 still have a reasonable value. */
1965 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
1966 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
1968 if (regmove_dump_file
)
1969 fprintf (regmove_dump_file
,
1970 "Fixed operand %d of insn %d matching operand %d.\n",
1971 operand_number
, INSN_UID (insn
), match_number
);
1976 /* return nonzero if X is stable and mentions no regsiters but for
1977 mentioning SRC or mentioning / changing DST . If in doubt, presume
1979 The rationale is that we want to check if we can move an insn easily
1980 while just paying attention to SRC and DST. A register is considered
1981 stable if it has the RTX_UNCHANGING_P bit set, but that would still
1982 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
1983 want any registers but SRC and DST. */
1985 stable_and_no_regs_but_for_p (x
, src
, dst
)
1988 RTX_CODE code
= GET_CODE (x
);
1989 switch (GET_RTX_CLASS (code
))
1991 case '<': case '1': case 'c': case '2': case 'b': case '3':
1994 const char *fmt
= GET_RTX_FORMAT (code
);
1995 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1997 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2003 return x
== src
|| x
== dst
;
2004 /* If this is a MEM, look inside - there might be a register hidden in
2005 the address of an unchanging MEM. */
2007 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2011 return ! rtx_unstable_p (x
);
2015 /* Track stack adjustments and stack memory references. Attempt to
2016 reduce the number of stack adjustments by back-propogating across
2017 the memory references.
2019 This is intended primarily for use with targets that do not define
2020 ACCUMULATE_OUTGOING_ARGS. It is of significantly more value to
2021 targets that define PREFERRED_STACK_BOUNDARY more aligned than
2022 STACK_BOUNDARY (e.g. x86), or if not all registers can be pushed
2023 (e.g. x86 fp regs) which would ordinarily have to be implemented
2024 as a sub/mov pair due to restrictions in calls.c.
2026 Propogation stops when any of the insns that need adjusting are
2027 (a) no longer valid because we've exceeded their range, (b) a
2028 non-trivial push instruction, or (c) a call instruction.
2030 Restriction B is based on the assumption that push instructions
2031 are smaller or faster. If a port really wants to remove all
2032 pushes, it should have defined ACCUMULATE_OUTGOING_ARGS. The
2033 one exception that is made is for an add immediately followed
2036 /* This structure records stack memory references between stack adjusting
2041 HOST_WIDE_INT sp_offset
;
2043 struct csa_memlist
*next
;
2046 static int stack_memref_p
PARAMS ((rtx
));
2047 static rtx single_set_for_csa
PARAMS ((rtx
));
2048 static void free_csa_memlist
PARAMS ((struct csa_memlist
*));
2049 static struct csa_memlist
*record_one_stack_memref
2050 PARAMS ((rtx
, rtx
*, struct csa_memlist
*));
2051 static int try_apply_stack_adjustment
2052 PARAMS ((rtx
, struct csa_memlist
*, HOST_WIDE_INT
, HOST_WIDE_INT
));
2053 static void combine_stack_adjustments_for_block
PARAMS ((basic_block
));
2054 static int record_stack_memrefs
PARAMS ((rtx
*, void *));
2057 /* Main entry point for stack adjustment combination. */
2060 combine_stack_adjustments ()
2064 for (i
= 0; i
< n_basic_blocks
; ++i
)
2065 combine_stack_adjustments_for_block (BASIC_BLOCK (i
));
2068 /* Recognize a MEM of the form (sp) or (plus sp const). */
2074 if (GET_CODE (x
) != MEM
)
2078 if (x
== stack_pointer_rtx
)
2080 if (GET_CODE (x
) == PLUS
2081 && XEXP (x
, 0) == stack_pointer_rtx
2082 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2088 /* Recognize either normal single_set or the hack in i386.md for
2089 tying fp and sp adjustments. */
2092 single_set_for_csa (insn
)
2096 rtx tmp
= single_set (insn
);
2100 if (GET_CODE (insn
) != INSN
2101 || GET_CODE (PATTERN (insn
)) != PARALLEL
)
2104 tmp
= PATTERN (insn
);
2105 if (GET_CODE (XVECEXP (tmp
, 0, 0)) != SET
)
2108 for (i
= 1; i
< XVECLEN (tmp
, 0); ++i
)
2110 rtx
this = XVECEXP (tmp
, 0, i
);
2112 /* The special case is allowing a no-op set. */
2113 if (GET_CODE (this) == SET
2114 && SET_SRC (this) == SET_DEST (this))
2116 else if (GET_CODE (this) != CLOBBER
2117 && GET_CODE (this) != USE
)
2121 return XVECEXP (tmp
, 0, 0);
2124 /* Free the list of csa_memlist nodes. */
2127 free_csa_memlist (memlist
)
2128 struct csa_memlist
*memlist
;
2130 struct csa_memlist
*next
;
2131 for (; memlist
; memlist
= next
)
2133 next
= memlist
->next
;
2138 /* Create a new csa_memlist node from the given memory reference.
2139 It is already known that the memory is stack_memref_p. */
2141 static struct csa_memlist
*
2142 record_one_stack_memref (insn
, mem
, next_memlist
)
2144 struct csa_memlist
*next_memlist
;
2146 struct csa_memlist
*ml
;
2148 ml
= (struct csa_memlist
*) xmalloc (sizeof (*ml
));
2150 if (XEXP (*mem
, 0) == stack_pointer_rtx
)
2153 ml
->sp_offset
= INTVAL (XEXP (XEXP (*mem
, 0), 1));
2157 ml
->next
= next_memlist
;
2162 /* Attempt to apply ADJUST to the stack adjusting insn INSN, as well
2163 as each of the memories in MEMLIST. Return true on success. */
2166 try_apply_stack_adjustment (insn
, memlist
, new_adjust
, delta
)
2168 struct csa_memlist
*memlist
;
2169 HOST_WIDE_INT new_adjust
, delta
;
2171 struct csa_memlist
*ml
;
2174 /* We know INSN matches single_set_for_csa, because that's what we
2175 recognized earlier. However, if INSN is not single_set, it is
2176 doing double duty as a barrier for frame pointer memory accesses,
2177 which we are not recording. Therefore, an adjust insn that is not
2178 single_set may not have a positive delta applied. */
2180 if (delta
> 0 && ! single_set (insn
))
2182 set
= single_set_for_csa (insn
);
2183 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (new_adjust
), 1);
2185 for (ml
= memlist
; ml
; ml
= ml
->next
)
2187 HOST_WIDE_INT c
= ml
->sp_offset
- delta
;
2188 rtx
new = gen_rtx_MEM (GET_MODE (*ml
->mem
),
2189 plus_constant (stack_pointer_rtx
, c
));
2191 /* Don't reference memory below the stack pointer. */
2198 MEM_COPY_ATTRIBUTES (new, *ml
->mem
);
2199 validate_change (ml
->insn
, ml
->mem
, new, 1);
2202 if (apply_change_group ())
2204 /* Succeeded. Update our knowledge of the memory references. */
2205 for (ml
= memlist
; ml
; ml
= ml
->next
)
2206 ml
->sp_offset
-= delta
;
2214 /* Called via for_each_rtx and used to record all stack memory references in
2215 the insn and discard all other stack pointer references. */
2216 struct record_stack_memrefs_data
2219 struct csa_memlist
*memlist
;
2223 record_stack_memrefs (xp
, data
)
2228 struct record_stack_memrefs_data
*d
=
2229 (struct record_stack_memrefs_data
*) data
;
2232 switch (GET_CODE (x
))
2235 if (!reg_mentioned_p (stack_pointer_rtx
, x
))
2237 /* We are not able to handle correctly all possible memrefs containing
2238 stack pointer, so this check is neccesary. */
2239 if (stack_memref_p (x
))
2241 d
->memlist
= record_one_stack_memref (d
->insn
, xp
, d
->memlist
);
2246 /* ??? We want be able to handle non-memory stack pointer references
2247 later. For now just discard all insns refering to stack pointer
2248 outside mem expressions. We would probably want to teach
2249 validate_replace to simplify expressions first. */
2250 if (x
== stack_pointer_rtx
)
2259 /* Subroutine of combine_stack_adjustments, called for each basic block. */
2262 combine_stack_adjustments_for_block (bb
)
2265 HOST_WIDE_INT last_sp_adjust
= 0;
2266 rtx last_sp_set
= NULL_RTX
;
2267 struct csa_memlist
*memlist
= NULL
;
2270 struct record_stack_memrefs_data data
;
2272 for (insn
= bb
->head
; ; insn
= next
)
2276 pending_delete
= NULL_RTX
;
2277 next
= NEXT_INSN (insn
);
2279 if (! INSN_P (insn
))
2282 set
= single_set_for_csa (insn
);
2285 rtx dest
= SET_DEST (set
);
2286 rtx src
= SET_SRC (set
);
2288 /* Find constant additions to the stack pointer. */
2289 if (dest
== stack_pointer_rtx
2290 && GET_CODE (src
) == PLUS
2291 && XEXP (src
, 0) == stack_pointer_rtx
2292 && GET_CODE (XEXP (src
, 1)) == CONST_INT
)
2294 HOST_WIDE_INT this_adjust
= INTVAL (XEXP (src
, 1));
2296 /* If we've not seen an adjustment previously, record
2297 it now and continue. */
2301 last_sp_adjust
= this_adjust
;
2305 /* If not all recorded memrefs can be adjusted, or the
2306 adjustment is now too large for a constant addition,
2307 we cannot merge the two stack adjustments. */
2308 if (! try_apply_stack_adjustment (last_sp_set
, memlist
,
2309 last_sp_adjust
+ this_adjust
,
2312 free_csa_memlist (memlist
);
2315 last_sp_adjust
= this_adjust
;
2320 pending_delete
= insn
;
2321 last_sp_adjust
+= this_adjust
;
2323 /* If, by some accident, the adjustments cancel out,
2324 delete both insns and start from scratch. */
2325 if (last_sp_adjust
== 0)
2327 if (last_sp_set
== bb
->head
)
2328 bb
->head
= NEXT_INSN (last_sp_set
);
2329 flow_delete_insn (last_sp_set
);
2331 free_csa_memlist (memlist
);
2333 last_sp_set
= NULL_RTX
;
2339 /* Find a predecrement of exactly the previous adjustment and
2340 turn it into a direct store. Obviously we can't do this if
2341 there were any intervening uses of the stack pointer. */
2343 && GET_CODE (dest
) == MEM
2344 && ((GET_CODE (XEXP (dest
, 0)) == PRE_DEC
2346 == (HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (dest
))))
2347 || (GET_CODE (XEXP (dest
, 0)) == PRE_MODIFY
2348 && GET_CODE (XEXP (XEXP (dest
, 0), 1)) == PLUS
2349 && XEXP (XEXP (XEXP (dest
, 0), 1), 0) == stack_pointer_rtx
2350 && (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2352 && (INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2353 == -last_sp_adjust
)))
2354 && XEXP (XEXP (dest
, 0), 0) == stack_pointer_rtx
2355 && ! reg_mentioned_p (stack_pointer_rtx
, src
)
2356 && memory_address_p (GET_MODE (dest
), stack_pointer_rtx
)
2357 && validate_change (insn
, &SET_DEST (set
),
2358 change_address (dest
, VOIDmode
,
2359 stack_pointer_rtx
), 0))
2361 if (last_sp_set
== bb
->head
)
2362 bb
->head
= NEXT_INSN (last_sp_set
);
2363 flow_delete_insn (last_sp_set
);
2365 free_csa_memlist (memlist
);
2367 last_sp_set
= NULL_RTX
;
2374 data
.memlist
= memlist
;
2375 if (GET_CODE (insn
) != CALL_INSN
&& last_sp_set
2376 && !for_each_rtx (&PATTERN (insn
), record_stack_memrefs
, &data
))
2378 memlist
= data
.memlist
;
2381 memlist
= data
.memlist
;
2383 /* Otherwise, we were not able to process the instruction.
2384 Do not continue collecting data across such a one. */
2386 && (GET_CODE (insn
) == CALL_INSN
2387 || reg_mentioned_p (stack_pointer_rtx
, PATTERN (insn
))))
2389 free_csa_memlist (memlist
);
2391 last_sp_set
= NULL_RTX
;
2396 if (insn
== bb
->end
)
2400 flow_delete_insn (pending_delete
);
2405 bb
->end
= PREV_INSN (pending_delete
);
2406 flow_delete_insn (pending_delete
);