1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
30 #include "insn-config.h"
35 #include "hard-reg-set.h"
38 #include "insn-flags.h"
39 #include "basic-block.h"
42 static int optimize_reg_copy_1
PROTO((rtx
, rtx
, rtx
));
43 static void optimize_reg_copy_2
PROTO((rtx
, rtx
, rtx
));
44 static void optimize_reg_copy_3
PROTO((rtx
, rtx
, rtx
));
45 static rtx gen_add3_insn
PROTO((rtx
, rtx
, rtx
));
46 static void copy_src_to_dest
PROTO((rtx
, rtx
, rtx
, int));
47 static int *regmove_bb_head
;
50 int with
[MAX_RECOG_OPERANDS
];
51 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
52 int commutative
[MAX_RECOG_OPERANDS
];
53 int early_clobber
[MAX_RECOG_OPERANDS
];
56 static int try_auto_increment
PROTO((rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int));
57 static int find_matches
PROTO((rtx
, struct match
*));
58 static int fixup_match_1
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int, FILE *))
60 static int reg_is_remote_constant_p
PROTO((rtx
, rtx
, rtx
));
61 static int stable_but_for_p
PROTO((rtx
, rtx
, rtx
));
62 static int regclass_compatible_p
PROTO((int, int));
63 static int loop_depth
;
65 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
66 causing too much register allocation problems. */
68 regclass_compatible_p (class0
, class1
)
71 return (class0
== class1
72 || (reg_class_subset_p (class0
, class1
)
73 && ! CLASS_LIKELY_SPILLED_P (class0
))
74 || (reg_class_subset_p (class1
, class0
)
75 && ! CLASS_LIKELY_SPILLED_P (class1
)));
78 /* Generate and return an insn body to add r1 and c,
79 storing the result in r0. */
81 gen_add3_insn (r0
, r1
, c
)
84 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
86 if (icode
== CODE_FOR_nothing
87 || ! (*insn_operand_predicate
[icode
][0]) (r0
, insn_operand_mode
[icode
][0])
88 || ! (*insn_operand_predicate
[icode
][1]) (r1
, insn_operand_mode
[icode
][1])
89 || ! (*insn_operand_predicate
[icode
][2]) (c
, insn_operand_mode
[icode
][2]))
92 return (GEN_FCN (icode
) (r0
, r1
, c
));
96 /* INC_INSN is an instruction that adds INCREMENT to REG.
97 Try to fold INC_INSN as a post/pre in/decrement into INSN.
98 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
99 Return nonzero for success. */
101 try_auto_increment (insn
, inc_insn
, inc_insn_set
, reg
, increment
, pre
)
102 rtx reg
, insn
, inc_insn
,inc_insn_set
;
103 HOST_WIDE_INT increment
;
106 enum rtx_code inc_code
;
108 rtx pset
= single_set (insn
);
111 /* Can't use the size of SET_SRC, we might have something like
112 (sign_extend:SI (mem:QI ... */
113 rtx use
= find_use_as_address (pset
, reg
, 0);
114 if (use
!= 0 && use
!= (rtx
) 1)
116 int size
= GET_MODE_SIZE (GET_MODE (use
));
118 || (HAVE_POST_INCREMENT
119 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
120 || (HAVE_PRE_INCREMENT
121 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
122 || (HAVE_POST_DECREMENT
123 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
124 || (HAVE_PRE_DECREMENT
125 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
131 &SET_SRC (inc_insn_set
),
132 XEXP (SET_SRC (inc_insn_set
), 0), 1);
133 validate_change (insn
, &XEXP (use
, 0),
134 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
135 if (apply_change_group ())
138 = gen_rtx_EXPR_LIST (REG_INC
,
139 reg
, REG_NOTES (insn
));
142 PUT_CODE (inc_insn
, NOTE
);
143 NOTE_LINE_NUMBER (inc_insn
) = NOTE_INSN_DELETED
;
144 NOTE_SOURCE_FILE (inc_insn
) = 0;
154 static int *regno_src_regno
;
156 /* Indicate how good a choice REG (which appears as a source) is to replace
157 a destination register with. The higher the returned value, the better
158 the choice. The main objective is to avoid using a register that is
159 a candidate for tying to a hard register, since the output might in
160 turn be a candidate to be tied to a different hard register. */
162 replacement_quality(reg
)
167 /* Bad if this isn't a register at all. */
168 if (GET_CODE (reg
) != REG
)
171 /* If this register is not meant to get a hard register,
172 it is a poor choice. */
173 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
176 src_regno
= regno_src_regno
[REGNO (reg
)];
178 /* If it was not copied from another register, it is fine. */
182 /* Copied from a hard register? */
183 if (src_regno
< FIRST_PSEUDO_REGISTER
)
186 /* Copied from a pseudo register - not as bad as from a hard register,
187 yet still cumbersome, since the register live length will be lengthened
188 when the registers get tied. */
192 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
195 Search forward to see if SRC dies before either it or DEST is modified,
196 but don't scan past the end of a basic block. If so, we can replace SRC
197 with DEST and let SRC die in INSN.
199 This will reduce the number of registers live in that range and may enable
200 DEST to be tied to SRC, thus often saving one register in addition to a
201 register-register copy. */
204 optimize_reg_copy_1 (insn
, dest
, src
)
212 int sregno
= REGNO (src
);
213 int dregno
= REGNO (dest
);
215 /* We don't want to mess with hard regs if register classes are small. */
217 || (SMALL_REGISTER_CLASSES
218 && (sregno
< FIRST_PSEUDO_REGISTER
219 || dregno
< FIRST_PSEUDO_REGISTER
))
220 /* We don't see all updates to SP if they are in an auto-inc memory
221 reference, so we must disallow this optimization on them. */
222 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
225 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
227 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
228 || (GET_CODE (p
) == NOTE
229 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
230 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
233 /* ??? We can't scan past the end of a basic block without updating
234 the register lifetime info (REG_DEAD/basic_block_live_at_start).
235 A CALL_INSN might be the last insn of a basic block, if it is inside
236 an EH region. There is no easy way to tell, so we just always break
237 when we see a CALL_INSN if flag_exceptions is nonzero. */
238 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
241 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
244 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
245 /* Don't change a USE of a register. */
246 || (GET_CODE (PATTERN (p
)) == USE
247 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
250 /* See if all of SRC dies in P. This test is slightly more
251 conservative than it needs to be. */
252 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
253 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
261 /* We can do the optimization. Scan forward from INSN again,
262 replacing regs as we go. Set FAILED if a replacement can't
263 be done. In that case, we can't move the death note for SRC.
264 This should be rare. */
266 /* Set to stop at next insn. */
267 for (q
= next_real_insn (insn
);
268 q
!= next_real_insn (p
);
269 q
= next_real_insn (q
))
271 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
273 /* If SRC is a hard register, we might miss some
274 overlapping registers with validate_replace_rtx,
275 so we would have to undo it. We can't if DEST is
276 present in the insn, so fail in that combination
278 if (sregno
< FIRST_PSEUDO_REGISTER
279 && reg_mentioned_p (dest
, PATTERN (q
)))
282 /* Replace all uses and make sure that the register
283 isn't still present. */
284 else if (validate_replace_rtx (src
, dest
, q
)
285 && (sregno
>= FIRST_PSEUDO_REGISTER
286 || ! reg_overlap_mentioned_p (src
,
289 /* We assume that a register is used exactly once per
290 insn in the REG_N_REFS updates below. If this is not
291 correct, no great harm is done.
294 We do not undo this substitution if something later
295 fails. Therefore, we must update the other REG_N_*
296 counters now to keep them accurate. */
297 if (sregno
>= FIRST_PSEUDO_REGISTER
)
299 REG_N_REFS (sregno
) -= loop_depth
;
301 if (REG_LIVE_LENGTH (sregno
) >= 0)
303 REG_LIVE_LENGTH (sregno
) -= length
;
304 /* REG_LIVE_LENGTH is only an approximation after
305 combine if sched is not run, so make sure that
306 we still have a reasonable value. */
307 if (REG_LIVE_LENGTH (sregno
) < 2)
308 REG_LIVE_LENGTH (sregno
) = 2;
311 REG_N_CALLS_CROSSED (sregno
) -= n_calls
;
314 if (dregno
>= FIRST_PSEUDO_REGISTER
)
316 REG_N_REFS (dregno
) += loop_depth
;
318 if (REG_LIVE_LENGTH (dregno
) >= 0)
319 REG_LIVE_LENGTH (dregno
) += d_length
;
321 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
324 /* We've done a substitution, clear the counters. */
332 validate_replace_rtx (dest
, src
, q
);
337 /* Count the insns and CALL_INSNs passed. If we passed the
338 death note of DEST, show increased live length. */
343 /* If the insn in which SRC dies is a CALL_INSN, don't count it
344 as a call that has been crossed. Otherwise, count it. */
345 if (q
!= p
&& GET_CODE (q
) == CALL_INSN
)
352 /* If DEST dies here, remove the death note and save it for
353 later. Make sure ALL of DEST dies here; again, this is
354 overly conservative. */
356 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
358 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
359 failed
= 1, dest_death
= 0;
361 remove_note (q
, dest_death
);
367 if (sregno
>= FIRST_PSEUDO_REGISTER
)
369 if (REG_LIVE_LENGTH (sregno
) >= 0)
371 REG_LIVE_LENGTH (sregno
) -= length
;
372 /* REG_LIVE_LENGTH is only an approximation after
373 combine if sched is not run, so make sure that we
374 still have a reasonable value. */
375 if (REG_LIVE_LENGTH (sregno
) < 2)
376 REG_LIVE_LENGTH (sregno
) = 2;
379 REG_N_CALLS_CROSSED (sregno
) -= n_calls
;
382 if (dregno
>= FIRST_PSEUDO_REGISTER
)
384 if (REG_LIVE_LENGTH (dregno
) >= 0)
385 REG_LIVE_LENGTH (dregno
) += d_length
;
387 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
390 /* Move death note of SRC from P to INSN. */
391 remove_note (p
, note
);
392 XEXP (note
, 1) = REG_NOTES (insn
);
393 REG_NOTES (insn
) = note
;
396 /* Put death note of DEST on P if we saw it die. */
399 XEXP (dest_death
, 1) = REG_NOTES (p
);
400 REG_NOTES (p
) = dest_death
;
406 /* If SRC is a hard register which is set or killed in some other
407 way, we can't do this optimization. */
408 else if (sregno
< FIRST_PSEUDO_REGISTER
409 && dead_or_set_p (p
, src
))
415 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
416 a sequence of insns that modify DEST followed by an insn that sets
417 SRC to DEST in which DEST dies, with no prior modification of DEST.
418 (There is no need to check if the insns in between actually modify
419 DEST. We should not have cases where DEST is not modified, but
420 the optimization is safe if no such modification is detected.)
421 In that case, we can replace all uses of DEST, starting with INSN and
422 ending with the set of SRC to DEST, with SRC. We do not do this
423 optimization if a CALL_INSN is crossed unless SRC already crosses a
424 call or if DEST dies before the copy back to SRC.
426 It is assumed that DEST and SRC are pseudos; it is too complicated to do
427 this for hard registers since the substitutions we may make might fail. */
430 optimize_reg_copy_2 (insn
, dest
, src
)
437 int sregno
= REGNO (src
);
438 int dregno
= REGNO (dest
);
440 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
442 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
443 || (GET_CODE (p
) == NOTE
444 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
445 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
448 /* ??? We can't scan past the end of a basic block without updating
449 the register lifetime info (REG_DEAD/basic_block_live_at_start).
450 A CALL_INSN might be the last insn of a basic block, if it is inside
451 an EH region. There is no easy way to tell, so we just always break
452 when we see a CALL_INSN if flag_exceptions is nonzero. */
453 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
456 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
459 set
= single_set (p
);
460 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
461 && find_reg_note (p
, REG_DEAD
, dest
))
463 /* We can do the optimization. Scan forward from INSN again,
464 replacing regs as we go. */
466 /* Set to stop at next insn. */
467 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
468 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
470 if (reg_mentioned_p (dest
, PATTERN (q
)))
472 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
474 /* We assume that a register is used exactly once per
475 insn in the updates below. If this is not correct,
476 no great harm is done. */
477 REG_N_REFS (dregno
) -= loop_depth
;
478 REG_N_REFS (sregno
) += loop_depth
;
482 if (GET_CODE (q
) == CALL_INSN
)
484 REG_N_CALLS_CROSSED (dregno
)--;
485 REG_N_CALLS_CROSSED (sregno
)++;
489 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
490 REG_N_DEATHS (dregno
)--;
491 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
492 REG_N_DEATHS (sregno
)--;
496 if (reg_set_p (src
, p
)
497 || find_reg_note (p
, REG_DEAD
, dest
)
498 || (GET_CODE (p
) == CALL_INSN
&& REG_N_CALLS_CROSSED (sregno
) == 0))
502 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
503 Look if SRC dies there, and if it is only set once, by loading
504 it from memory. If so, try to encorporate the zero/sign extension
505 into the memory read, change SRC to the mode of DEST, and alter
506 the remaining accesses to use the appropriate SUBREG. This allows
507 SRC and DEST to be tied later. */
509 optimize_reg_copy_3 (insn
, dest
, src
)
514 rtx src_reg
= XEXP (src
, 0);
515 int src_no
= REGNO (src_reg
);
516 int dst_no
= REGNO (dest
);
518 enum machine_mode old_mode
;
520 if (src_no
< FIRST_PSEUDO_REGISTER
521 || dst_no
< FIRST_PSEUDO_REGISTER
522 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
523 || REG_N_SETS (src_no
) != 1)
525 for (p
= PREV_INSN (insn
); ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
527 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
528 || (GET_CODE (p
) == NOTE
529 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
530 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
533 /* ??? We can't scan past the end of a basic block without updating
534 the register lifetime info (REG_DEAD/basic_block_live_at_start).
535 A CALL_INSN might be the last insn of a basic block, if it is inside
536 an EH region. There is no easy way to tell, so we just always break
537 when we see a CALL_INSN if flag_exceptions is nonzero. */
538 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
541 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
544 if (! (set
= single_set (p
))
545 || GET_CODE (SET_SRC (set
)) != MEM
546 || SET_DEST (set
) != src_reg
)
549 /* Be conserative: although this optimization is also valid for
550 volatile memory references, that could cause trouble in later passes. */
551 if (MEM_VOLATILE_P (SET_SRC (set
)))
554 /* Do not use a SUBREG to truncate from one mode to another if truncation
556 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
557 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
558 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
561 old_mode
= GET_MODE (src_reg
);
562 PUT_MODE (src_reg
, GET_MODE (src
));
563 XEXP (src
, 0) = SET_SRC (set
);
565 /* Include this change in the group so that it's easily undone if
566 one of the changes in the group is invalid. */
567 validate_change (p
, &SET_SRC (set
), src
, 1);
569 /* Now walk forward making additional replacements. We want to be able
570 to undo all the changes if a later substitution fails. */
571 subreg
= gen_rtx_SUBREG (old_mode
, src_reg
, 0);
572 while (p
= NEXT_INSN (p
), p
!= insn
)
574 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
577 /* Make a tenative change. */
578 validate_replace_rtx_group (src_reg
, subreg
, p
);
581 validate_replace_rtx_group (src
, src_reg
, insn
);
583 /* Now see if all the changes are valid. */
584 if (! apply_change_group ())
586 /* One or more changes were no good. Back out everything. */
587 PUT_MODE (src_reg
, old_mode
);
588 XEXP (src
, 0) = src_reg
;
593 /* If we were not able to update the users of src to use dest directly, try
594 instead moving the value to dest directly before the operation. */
597 copy_src_to_dest (insn
, src
, dest
, loop_depth
)
616 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
617 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
618 parameter when there is no frame pointer that is not allocated a register.
619 For now, we just reject them, rather than incrementing the live length. */
621 if (GET_CODE (src
) == REG
622 && REG_LIVE_LENGTH (REGNO (src
)) > 0
623 && GET_CODE (dest
) == REG
624 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
625 && (set
= single_set (insn
)) != NULL_RTX
626 && !reg_mentioned_p (dest
, SET_SRC (set
))
627 && GET_MODE (src
) == GET_MODE (dest
))
629 int old_num_regs
= reg_rtx_no
;
631 /* Generate the src->dest move. */
633 emit_move_insn (dest
, src
);
634 seq
= gen_sequence ();
636 /* If this sequence uses new registers, we may not use it. */
637 if (old_num_regs
!= reg_rtx_no
638 || ! validate_replace_rtx (src
, dest
, insn
))
640 /* We have to restore reg_rtx_no to its old value, lest
641 recompute_reg_usage will try to compute the usage of the
642 new regs, yet reg_n_info is not valid for them. */
643 reg_rtx_no
= old_num_regs
;
646 emit_insn_before (seq
, insn
);
647 move_insn
= PREV_INSN (insn
);
648 p_move_notes
= ®_NOTES (move_insn
);
649 p_insn_notes
= ®_NOTES (insn
);
651 /* Move any notes mentioning src to the move instruction */
652 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
654 next
= XEXP (link
, 1);
655 if (XEXP (link
, 0) == src
)
657 *p_move_notes
= link
;
658 p_move_notes
= &XEXP (link
, 1);
662 *p_insn_notes
= link
;
663 p_insn_notes
= &XEXP (link
, 1);
667 *p_move_notes
= NULL_RTX
;
668 *p_insn_notes
= NULL_RTX
;
670 /* Is the insn the head of a basic block? If so extend it */
671 insn_uid
= INSN_UID (insn
);
672 move_uid
= INSN_UID (move_insn
);
673 bb
= regmove_bb_head
[insn_uid
];
676 BLOCK_HEAD (bb
) = move_insn
;
677 regmove_bb_head
[insn_uid
] = -1;
680 /* Update the various register tables. */
681 dest_regno
= REGNO (dest
);
682 REG_N_SETS (dest_regno
) += loop_depth
;
683 REG_N_REFS (dest_regno
) += loop_depth
;
684 REG_LIVE_LENGTH (dest_regno
)++;
685 if (REGNO_FIRST_UID (dest_regno
) == insn_uid
)
686 REGNO_FIRST_UID (dest_regno
) = move_uid
;
688 src_regno
= REGNO (src
);
689 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
690 REG_LIVE_LENGTH (src_regno
)++;
692 if (REGNO_FIRST_UID (src_regno
) == insn_uid
)
693 REGNO_FIRST_UID (src_regno
) = move_uid
;
695 if (REGNO_LAST_UID (src_regno
) == insn_uid
)
696 REGNO_LAST_UID (src_regno
) = move_uid
;
698 if (REGNO_LAST_NOTE_UID (src_regno
) == insn_uid
)
699 REGNO_LAST_NOTE_UID (src_regno
) = move_uid
;
704 /* Return whether REG is set in only one location, and is set to a
705 constant, but is set in a different basic block from INSN (an
706 instructions which uses REG). In this case REG is equivalent to a
707 constant, and we don't want to break that equivalence, because that
708 may increase register pressure and make reload harder. If REG is
709 set in the same basic block as INSN, we don't worry about it,
710 because we'll probably need a register anyhow (??? but what if REG
711 is used in a different basic block as well as this one?). FIRST is
712 the first insn in the function. */
715 reg_is_remote_constant_p (reg
, insn
, first
)
722 if (REG_N_SETS (REGNO (reg
)) != 1)
725 /* Look for the set. */
726 for (p
= LOG_LINKS (insn
); p
; p
= XEXP (p
, 1))
730 if (REG_NOTE_KIND (p
) != 0)
732 s
= single_set (XEXP (p
, 0));
734 && GET_CODE (SET_DEST (s
)) == REG
735 && REGNO (SET_DEST (s
)) == REGNO (reg
))
737 /* The register is set in the same basic block. */
742 for (p
= first
; p
&& p
!= insn
; p
= NEXT_INSN (p
))
746 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
750 && GET_CODE (SET_DEST (s
)) == REG
751 && REGNO (SET_DEST (s
)) == REGNO (reg
))
753 /* This is the instruction which sets REG. If there is a
754 REG_EQUAL note, then REG is equivalent to a constant. */
755 if (find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
764 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
765 another add immediate instruction with the same source and dest registers,
766 and if we find one, we change INSN to an increment, and return 1. If
767 no changes are made, we return 0.
770 (set (reg100) (plus reg1 offset1))
772 (set (reg100) (plus reg1 offset2))
774 (set (reg100) (plus reg1 offset1))
776 (set (reg100) (plus reg100 offset2-offset1)) */
778 /* ??? What does this comment mean? */
779 /* cse disrupts preincrement / postdecrement squences when it finds a
780 hard register as ultimate source, like the frame pointer. */
783 fixup_match_2 (insn
, dst
, src
, offset
, regmove_dump_file
)
784 rtx insn
, dst
, src
, offset
;
785 FILE *regmove_dump_file
;
787 rtx p
, dst_death
= 0;
788 int length
, num_calls
= 0;
790 /* If SRC dies in INSN, we'd have to move the death note. This is
791 considered to be very unlikely, so we just skip the optimization
793 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
796 /* Scan backward to find the first instruction that sets DST. */
798 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
802 if (GET_CODE (p
) == CODE_LABEL
803 || GET_CODE (p
) == JUMP_INSN
804 || (GET_CODE (p
) == NOTE
805 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
806 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
809 /* ??? We can't scan past the end of a basic block without updating
810 the register lifetime info (REG_DEAD/basic_block_live_at_start).
811 A CALL_INSN might be the last insn of a basic block, if it is inside
812 an EH region. There is no easy way to tell, so we just always break
813 when we see a CALL_INSN if flag_exceptions is nonzero. */
814 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
817 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
820 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
825 pset
= single_set (p
);
826 if (pset
&& SET_DEST (pset
) == dst
827 && GET_CODE (SET_SRC (pset
)) == PLUS
828 && XEXP (SET_SRC (pset
), 0) == src
829 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
831 HOST_WIDE_INT newconst
832 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
833 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
835 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
837 /* Remove the death note for DST from DST_DEATH. */
840 remove_death (REGNO (dst
), dst_death
);
841 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
842 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
845 REG_N_REFS (REGNO (dst
)) += loop_depth
;
846 REG_N_REFS (REGNO (src
)) -= loop_depth
;
848 if (regmove_dump_file
)
849 fprintf (regmove_dump_file
,
850 "Fixed operand of insn %d.\n",
854 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
856 if (GET_CODE (p
) == CODE_LABEL
857 || GET_CODE (p
) == JUMP_INSN
858 || (GET_CODE (p
) == NOTE
859 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
860 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
862 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
864 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
866 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
871 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
873 if (GET_CODE (p
) == CODE_LABEL
874 || GET_CODE (p
) == JUMP_INSN
875 || (GET_CODE (p
) == NOTE
876 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
877 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
879 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
881 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
883 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
892 if (reg_set_p (dst
, PATTERN (p
)))
895 /* If we have passed a call instruction, and the
896 pseudo-reg SRC is not already live across a call,
897 then don't perform the optimization. */
898 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
899 hard regs are clobbered. Thus, we only use it for src for
901 if (GET_CODE (p
) == CALL_INSN
)
906 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
909 if (call_used_regs
[REGNO (dst
)]
910 || find_reg_fusage (p
, CLOBBER
, dst
))
913 else if (reg_set_p (src
, PATTERN (p
)))
921 regmove_optimize (f
, nregs
, regmove_dump_file
)
924 FILE *regmove_dump_file
;
926 int old_max_uid
= get_max_uid ();
931 rtx copy_src
, copy_dst
;
933 regno_src_regno
= (int *)alloca (sizeof *regno_src_regno
* nregs
);
934 for (i
= nregs
; --i
>= 0; ) regno_src_regno
[i
] = -1;
936 regmove_bb_head
= (int *)alloca (sizeof (int) * (old_max_uid
+ 1));
937 for (i
= old_max_uid
; i
>= 0; i
--) regmove_bb_head
[i
] = -1;
938 for (i
= 0; i
< n_basic_blocks
; i
++)
939 regmove_bb_head
[INSN_UID (BLOCK_HEAD (i
))] = i
;
941 /* A forward/backward pass. Replace output operands with input operands. */
945 for (pass
= 0; pass
<= 2; pass
++)
947 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
950 if (regmove_dump_file
)
951 fprintf (regmove_dump_file
, "Starting %s pass...\n",
952 pass
? "backward" : "forward");
954 for (insn
= pass
? get_last_insn () : f
; insn
;
955 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
960 if (GET_CODE (insn
) == NOTE
)
962 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
964 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
968 set
= single_set (insn
);
972 if (flag_expensive_optimizations
&& ! pass
973 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
974 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
975 && GET_CODE (XEXP (SET_SRC (set
), 0)) == REG
976 && GET_CODE (SET_DEST(set
)) == REG
)
977 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
979 if (flag_expensive_optimizations
&& ! pass
980 && GET_CODE (SET_SRC (set
)) == REG
981 && GET_CODE (SET_DEST(set
)) == REG
)
983 /* If this is a register-register copy where SRC is not dead,
984 see if we can optimize it. If this optimization succeeds,
985 it will become a copy where SRC is dead. */
986 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
987 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
988 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
990 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
991 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
992 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
993 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
994 && SET_SRC (set
) != SET_DEST (set
))
996 int srcregno
= REGNO (SET_SRC(set
));
997 if (regno_src_regno
[srcregno
] >= 0)
998 srcregno
= regno_src_regno
[srcregno
];
999 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1006 #ifdef REGISTER_CONSTRAINTS
1007 if (! find_matches (insn
, &match
))
1010 /* Now scan through the operands looking for a source operand
1011 which is supposed to match the destination operand.
1012 Then scan forward for an instruction which uses the dest
1014 If it dies there, then replace the dest in both operands with
1015 the source operand. */
1017 for (op_no
= 0; op_no
< recog_n_operands
; op_no
++)
1019 rtx src
, dst
, src_subreg
;
1020 enum reg_class src_class
, dst_class
;
1022 match_no
= match
.with
[op_no
];
1024 /* Nothing to do if the two operands aren't supposed to match. */
1028 src
= recog_operand
[op_no
];
1029 dst
= recog_operand
[match_no
];
1031 if (GET_CODE (src
) != REG
)
1035 if (GET_CODE (dst
) == SUBREG
1036 && GET_MODE_SIZE (GET_MODE (dst
))
1037 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1040 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst
)),
1041 src
, SUBREG_WORD (dst
));
1042 dst
= SUBREG_REG (dst
);
1044 if (GET_CODE (dst
) != REG
1045 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1048 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1050 if (match
.commutative
[op_no
] < op_no
)
1051 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1055 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1058 /* op_no/src must be a read-only operand, and
1059 match_operand/dst must be a write-only operand. */
1060 if (match
.use
[op_no
] != READ
1061 || match
.use
[match_no
] != WRITE
)
1064 if (match
.early_clobber
[match_no
]
1065 && count_occurrences (PATTERN (insn
), src
) > 1)
1068 /* Make sure match_operand is the destination. */
1069 if (recog_operand
[match_no
] != SET_DEST (set
))
1072 /* If the operands already match, then there is nothing to do. */
1073 /* But in the commutative case, we might find a better match. */
1074 if (operands_match_p (src
, dst
)
1075 || (match
.commutative
[op_no
] >= 0
1076 && operands_match_p (recog_operand
[match
.commutative
1078 && (replacement_quality (recog_operand
[match
.commutative
1080 >= replacement_quality (src
))))
1083 src_class
= reg_preferred_class (REGNO (src
));
1084 dst_class
= reg_preferred_class (REGNO (dst
));
1085 if (! regclass_compatible_p (src_class
, dst_class
))
1088 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1096 /* A backward pass. Replace input operands with output operands. */
1098 if (regmove_dump_file
)
1099 fprintf (regmove_dump_file
, "Starting backward pass...\n");
1103 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1105 if (GET_CODE (insn
) == NOTE
)
1107 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
1109 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
1112 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
1114 int op_no
, match_no
;
1117 if (! find_matches (insn
, &match
))
1120 /* Now scan through the operands looking for a destination operand
1121 which is supposed to match a source operand.
1122 Then scan backward for an instruction which sets the source
1123 operand. If safe, then replace the source operand with the
1124 dest operand in both instructions. */
1126 copy_src
= NULL_RTX
;
1127 copy_dst
= NULL_RTX
;
1128 for (op_no
= 0; op_no
< recog_n_operands
; op_no
++)
1130 rtx set
, p
, src
, dst
;
1131 rtx src_note
, dst_note
;
1133 enum reg_class src_class
, dst_class
;
1136 match_no
= match
.with
[op_no
];
1138 /* Nothing to do if the two operands aren't supposed to match. */
1142 dst
= recog_operand
[match_no
];
1143 src
= recog_operand
[op_no
];
1145 if (GET_CODE (src
) != REG
)
1148 if (GET_CODE (dst
) != REG
1149 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1150 || REG_LIVE_LENGTH (REGNO (dst
)) < 0)
1153 /* If the operands already match, then there is nothing to do. */
1154 if (operands_match_p (src
, dst
)
1155 || (match
.commutative
[op_no
] >= 0
1156 && operands_match_p (recog_operand
[match
.commutative
[op_no
]], dst
)))
1159 set
= single_set (insn
);
1163 /* match_no/dst must be a write-only operand, and
1164 operand_operand/src must be a read-only operand. */
1165 if (match
.use
[op_no
] != READ
1166 || match
.use
[match_no
] != WRITE
)
1169 if (match
.early_clobber
[match_no
]
1170 && count_occurrences (PATTERN (insn
), src
) > 1)
1173 /* Make sure match_no is the destination. */
1174 if (recog_operand
[match_no
] != SET_DEST (set
))
1177 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1179 if (GET_CODE (SET_SRC (set
)) == PLUS
1180 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1181 && XEXP (SET_SRC (set
), 0) == src
1182 && fixup_match_2 (insn
, dst
, src
,
1183 XEXP (SET_SRC (set
), 1),
1188 src_class
= reg_preferred_class (REGNO (src
));
1189 dst_class
= reg_preferred_class (REGNO (dst
));
1190 if (! regclass_compatible_p (src_class
, dst_class
))
1200 /* Can not modify an earlier insn to set dst if this insn
1201 uses an old value in the source. */
1202 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1212 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1223 /* If src is set once in a different basic block,
1224 and is set equal to a constant, then do not use
1225 it for this optimization, as this would make it
1226 no longer equivalent to a constant. */
1228 if (reg_is_remote_constant_p (src
, insn
, f
))
1239 if (regmove_dump_file
)
1240 fprintf (regmove_dump_file
,
1241 "Could fix operand %d of insn %d matching operand %d.\n",
1242 op_no
, INSN_UID (insn
), match_no
);
1244 /* Scan backward to find the first instruction that uses
1245 the input operand. If the operand is set here, then
1246 replace it in both instructions with match_no. */
1248 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1252 if (GET_CODE (p
) == CODE_LABEL
1253 || GET_CODE (p
) == JUMP_INSN
1254 || (GET_CODE (p
) == NOTE
1255 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
1256 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
1259 /* ??? We can't scan past the end of a basic block without
1260 updating the register lifetime info
1261 (REG_DEAD/basic_block_live_at_start).
1262 A CALL_INSN might be the last insn of a basic block, if
1263 it is inside an EH region. There is no easy way to tell,
1264 so we just always break when we see a CALL_INSN if
1265 flag_exceptions is nonzero. */
1266 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
1269 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
1274 /* ??? See if all of SRC is set in P. This test is much
1275 more conservative than it needs to be. */
1276 pset
= single_set (p
);
1277 if (pset
&& SET_DEST (pset
) == src
)
1279 /* We use validate_replace_rtx, in case there
1280 are multiple identical source operands. All of
1281 them have to be changed at the same time. */
1282 if (validate_replace_rtx (src
, dst
, insn
))
1284 if (validate_change (p
, &SET_DEST (pset
),
1289 /* Change all source operands back.
1290 This modifies the dst as a side-effect. */
1291 validate_replace_rtx (dst
, src
, insn
);
1292 /* Now make sure the dst is right. */
1293 validate_change (insn
,
1294 recog_operand_loc
[match_no
],
1301 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1302 || reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1305 /* If we have passed a call instruction, and the
1306 pseudo-reg DST is not already live across a call,
1307 then don't perform the optimization. */
1308 if (GET_CODE (p
) == CALL_INSN
)
1312 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1321 /* Remove the death note for SRC from INSN. */
1322 remove_note (insn
, src_note
);
1323 /* Move the death note for SRC to P if it is used
1325 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1327 XEXP (src_note
, 1) = REG_NOTES (p
);
1328 REG_NOTES (p
) = src_note
;
1330 /* If there is a REG_DEAD note for DST on P, then remove
1331 it, because DST is now set there. */
1332 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1333 remove_note (p
, dst_note
);
1335 dstno
= REGNO (dst
);
1336 srcno
= REGNO (src
);
1338 REG_N_SETS (dstno
)++;
1339 REG_N_SETS (srcno
)--;
1341 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1342 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1344 REG_LIVE_LENGTH (dstno
) += length
;
1345 if (REG_LIVE_LENGTH (srcno
) >= 0)
1347 REG_LIVE_LENGTH (srcno
) -= length
;
1348 /* REG_LIVE_LENGTH is only an approximation after
1349 combine if sched is not run, so make sure that we
1350 still have a reasonable value. */
1351 if (REG_LIVE_LENGTH (srcno
) < 2)
1352 REG_LIVE_LENGTH (srcno
) = 2;
1355 /* We assume that a register is used exactly once per
1356 insn in the updates above. If this is not correct,
1357 no great harm is done. */
1359 REG_N_REFS (dstno
) += 2 * loop_depth
;
1360 REG_N_REFS (srcno
) -= 2 * loop_depth
;
1362 /* If that was the only time src was set,
1363 and src was not live at the start of the
1364 function, we know that we have no more
1365 references to src; clear REG_N_REFS so it
1366 won't make reload do any work. */
1367 if (REG_N_SETS (REGNO (src
)) == 0
1368 && ! regno_uninitialized (REGNO (src
)))
1369 REG_N_REFS (REGNO (src
)) = 0;
1371 if (regmove_dump_file
)
1372 fprintf (regmove_dump_file
,
1373 "Fixed operand %d of insn %d matching operand %d.\n",
1374 op_no
, INSN_UID (insn
), match_no
);
1380 /* If we weren't able to replace any of the alternatives, try an
1381 alternative appoach of copying the source to the destination. */
1382 if (!success
&& copy_src
!= NULL_RTX
)
1383 copy_src_to_dest (insn
, copy_src
, copy_dst
, loop_depth
);
1387 #endif /* REGISTER_CONSTRAINTS */
1389 /* In fixup_match_1, some insns may have been inserted after basic block
1390 ends. Fix that here. */
1391 for (i
= 0; i
< n_basic_blocks
; i
++)
1393 rtx end
= BLOCK_END (i
);
1395 rtx next
= NEXT_INSN (new);
1396 while (next
!= 0 && INSN_UID (next
) >= old_max_uid
1397 && (i
== n_basic_blocks
- 1 || BLOCK_HEAD (i
+ 1) != next
))
1398 new = next
, next
= NEXT_INSN (new);
1399 BLOCK_END (i
) = new;
1403 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1404 Returns 0 if INSN can't be recognized, or if the alternative can't be
1407 Initialize the info in MATCHP based on the constraints. */
1410 find_matches (insn
, matchp
)
1412 struct match
*matchp
;
1414 int likely_spilled
[MAX_RECOG_OPERANDS
];
1416 int any_matches
= 0;
1418 extract_insn (insn
);
1419 if (! constrain_operands (0))
1422 /* Must initialize this before main loop, because the code for
1423 the commutative case may set matches for operands other than
1425 for (op_no
= recog_n_operands
; --op_no
>= 0; )
1426 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1428 for (op_no
= 0; op_no
< recog_n_operands
; op_no
++)
1433 p
= recog_constraints
[op_no
];
1435 likely_spilled
[op_no
] = 0;
1436 matchp
->use
[op_no
] = READ
;
1437 matchp
->early_clobber
[op_no
] = 0;
1439 matchp
->use
[op_no
] = WRITE
;
1441 matchp
->use
[op_no
] = READWRITE
;
1443 for (;*p
&& i
< which_alternative
; p
++)
1447 while ((c
= *p
++) != '\0' && c
!= ',')
1455 matchp
->early_clobber
[op_no
] = 1;
1458 matchp
->commutative
[op_no
] = op_no
+ 1;
1459 matchp
->commutative
[op_no
+ 1] = op_no
;
1461 case '0': case '1': case '2': case '3': case '4':
1462 case '5': case '6': case '7': case '8': case '9':
1464 if (c
< op_no
&& likely_spilled
[(unsigned char) c
])
1466 matchp
->with
[op_no
] = c
;
1468 if (matchp
->commutative
[op_no
] >= 0)
1469 matchp
->with
[matchp
->commutative
[op_no
]] = c
;
1471 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1472 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1473 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1474 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1475 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c
)))
1476 likely_spilled
[op_no
] = 1;
1483 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1484 the only set in INSN. INSN has just been recgnized and constrained.
1485 SRC is operand number OPERAND_NUMBER in INSN.
1486 DST is operand number MATCH_NUMBER in INSN.
1487 If BACKWARD is nonzero, we have been called in a backward pass.
1488 Return nonzero for success. */
1490 fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, backward
, operand_number
,
1491 match_number
, regmove_dump_file
)
1492 rtx insn
, set
, src
, src_subreg
, dst
;
1493 int backward
, operand_number
, match_number
;
1494 FILE *regmove_dump_file
;
1497 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1499 int num_calls
= 0, s_num_calls
= 0;
1500 enum rtx_code code
= NOTE
;
1501 HOST_WIDE_INT insn_const
, newconst
;
1502 rtx overlap
= 0; /* need to move insn ? */
1503 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
;
1504 int length
, s_length
, true_loop_depth
;
1508 /* Look for (set (regX) (op regA constX))
1509 (set (regY) (op regA constY))
1511 (set (regA) (op regA constX)).
1512 (set (regY) (op regA constY-constX)).
1513 This works for add and shift operations, if
1514 regA is dead after or set by the second insn. */
1516 code
= GET_CODE (SET_SRC (set
));
1517 if ((code
== PLUS
|| code
== LSHIFTRT
1518 || code
== ASHIFT
|| code
== ASHIFTRT
)
1519 && XEXP (SET_SRC (set
), 0) == src
1520 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1521 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1522 else if (! stable_but_for_p (SET_SRC (set
), src
, dst
))
1525 /* We might find a src_note while scanning. */
1529 if (regmove_dump_file
)
1530 fprintf (regmove_dump_file
,
1531 "Could fix operand %d of insn %d matching operand %d.\n",
1532 operand_number
, INSN_UID (insn
), match_number
);
1534 /* If SRC is equivalent to a constant set in a different basic block,
1535 then do not use it for this optimization. We want the equivalence
1536 so that if we have to reload this register, we can reload the
1537 constant, rather than extending the lifespan of the register. */
1538 if (reg_is_remote_constant_p (src
, insn
, get_insns ()))
1541 /* Scan forward to find the next instruction that
1542 uses the output operand. If the operand dies here,
1543 then replace it in both instructions with
1546 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1548 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
1549 || (GET_CODE (p
) == NOTE
1550 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
1551 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
1554 /* ??? We can't scan past the end of a basic block without updating
1555 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1556 A CALL_INSN might be the last insn of a basic block, if it is
1557 inside an EH region. There is no easy way to tell, so we just
1558 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1559 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
1562 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
1569 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1570 || (GET_CODE (PATTERN (p
)) == USE
1571 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1574 /* See if all of DST dies in P. This test is
1575 slightly more conservative than it needs to be. */
1576 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1577 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1584 /* If an optimization is done, the value of SRC while P
1585 is executed will be changed. Check that this is OK. */
1586 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1588 for (q
= p
; q
; q
= NEXT_INSN (q
))
1590 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
1591 || (GET_CODE (q
) == NOTE
1592 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
1593 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
1599 /* ??? We can't scan past the end of a basic block without
1600 updating the register lifetime info
1601 (REG_DEAD/basic_block_live_at_start).
1602 A CALL_INSN might be the last insn of a basic block, if
1603 it is inside an EH region. There is no easy way to tell,
1604 so we just always break when we see a CALL_INSN if
1605 flag_exceptions is nonzero. */
1606 if (flag_exceptions
&& GET_CODE (q
) == CALL_INSN
)
1612 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1614 if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1615 || reg_set_p (src
, q
))
1619 set2
= single_set (q
);
1620 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1621 || XEXP (SET_SRC (set2
), 0) != src
1622 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1623 || (SET_DEST (set2
) != src
1624 && ! find_reg_note (q
, REG_DEAD
, src
)))
1626 /* If this is a PLUS, we can still save a register by doing
1629 src -= insn_const; .
1630 This also gives opportunities for subsequent
1631 optimizations in the backward pass, so do it there. */
1632 if (code
== PLUS
&& backward
1633 /* Don't do this if we can likely tie DST to SET_DEST
1634 of P later; we can't do this tying here if we got a
1636 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1638 && GET_CODE (SET_DEST (single_set (p
))) == REG
1639 && (REGNO (SET_DEST (single_set (p
)))
1640 < FIRST_PSEUDO_REGISTER
))
1642 /* We may not emit an insn directly
1643 after P if the latter sets CC0. */
1644 && ! sets_cc0_p (PATTERN (p
))
1652 newconst
= -insn_const
;
1660 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1661 /* Reject out of range shifts. */
1665 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2
))))))
1670 if (SET_DEST (set2
) != src
)
1671 post_inc_set
= set2
;
1674 /* We use 1 as last argument to validate_change so that all
1675 changes are accepted or rejected together by apply_change_group
1676 when it is called by validate_replace_rtx . */
1677 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1678 GEN_INT (newconst
), 1);
1680 validate_change (insn
, recog_operand_loc
[match_number
], src
, 1);
1681 if (validate_replace_rtx (dst
, src_subreg
, p
))
1686 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1688 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1690 /* INSN was already checked to be movable when
1691 we found no REG_DEAD note for src on it. */
1693 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1696 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1697 already live across a call, then don't perform the optimization. */
1698 if (GET_CODE (p
) == CALL_INSN
)
1700 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1714 true_loop_depth
= backward
? 2 - loop_depth
: loop_depth
;
1716 /* Remove the death note for DST from P. */
1717 remove_note (p
, dst_note
);
1720 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1721 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1723 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1725 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1726 REG_N_SETS (REGNO (src
))++;
1727 REG_N_REFS (REGNO (src
)) += true_loop_depth
;
1728 REG_LIVE_LENGTH (REGNO (src
))++;
1732 /* The lifetime of src and dest overlap,
1733 but we can change this by moving insn. */
1734 rtx pat
= PATTERN (insn
);
1736 remove_note (overlap
, src_note
);
1737 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1739 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1744 rtx notes
= REG_NOTES (insn
);
1746 emit_insn_after_with_line_notes (pat
, PREV_INSN (p
), insn
);
1747 PUT_CODE (insn
, NOTE
);
1748 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1749 NOTE_SOURCE_FILE (insn
) = 0;
1750 /* emit_insn_after_with_line_notes has no
1751 return value, so search for the new insn. */
1752 for (insn
= p
; PATTERN (insn
) != pat
; )
1753 insn
= PREV_INSN (insn
);
1755 REG_NOTES (insn
) = notes
;
1758 /* Sometimes we'd generate src = const; src += n;
1759 if so, replace the instruction that set src
1760 in the first place. */
1762 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1764 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1766 int num_calls2
= 0, s_length2
= 0;
1768 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1770 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN(q
))
1772 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
1773 || (GET_CODE (q
) == NOTE
1774 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
1775 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
1781 /* ??? We can't scan past the end of a basic block without
1782 updating the register lifetime info
1783 (REG_DEAD/basic_block_live_at_start).
1784 A CALL_INSN might be the last insn of a basic block, if
1785 it is inside an EH region. There is no easy way to tell,
1786 so we just always break when we see a CALL_INSN if
1787 flag_exceptions is nonzero. */
1788 if (flag_exceptions
&& GET_CODE (q
) == CALL_INSN
)
1794 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1797 if (reg_set_p (src
, q
))
1799 set2
= single_set (q
);
1802 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1807 if (GET_CODE (p
) == CALL_INSN
)
1810 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1811 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1814 NOTE_LINE_NUMBER (q
) = NOTE_INSN_DELETED
;
1815 NOTE_SOURCE_FILE (q
) = 0;
1816 REG_N_SETS (REGNO (src
))--;
1817 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1818 REG_N_REFS (REGNO (src
)) -= true_loop_depth
;
1819 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1825 /* Don't remove this seemingly useless if, it is needed to pair with the
1826 else in the next two conditionally included code blocks. */
1829 else if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1830 && (code
== PLUS
|| code
== MINUS
) && insn_const
1831 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1833 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1835 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1837 /* If post_inc still prevails, try to find an
1838 insn where it can be used as a pre-in/decrement.
1839 If code is MINUS, this was already tried. */
1840 if (post_inc
&& code
== PLUS
1841 /* Check that newconst is likely to be usable
1842 in a pre-in/decrement before starting the search. */
1843 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
1844 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
1845 && exact_log2 (newconst
))
1849 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
1850 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
1852 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
1853 || (GET_CODE (q
) == NOTE
1854 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
1855 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
1858 /* ??? We can't scan past the end of a basic block without updating
1859 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1860 A CALL_INSN might be the last insn of a basic block, if it
1861 is inside an EH region. There is no easy way to tell so we
1862 just always break when we see a CALL_INSN if flag_exceptions
1864 if (flag_exceptions
&& GET_CODE (q
) == CALL_INSN
)
1867 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1869 if (src
!= inc_dest
&& (reg_overlap_mentioned_p (src
, PATTERN (q
))
1870 || reg_set_p (src
, q
)))
1872 if (reg_set_p (inc_dest
, q
))
1874 if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
1876 try_auto_increment (q
, post_inc
,
1877 post_inc_set
, inc_dest
, newconst
, 1);
1882 /* Move the death note for DST to INSN if it is used
1884 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
1886 XEXP (dst_note
, 1) = REG_NOTES (insn
);
1887 REG_NOTES (insn
) = dst_note
;
1892 /* Move the death note for SRC from INSN to P. */
1894 remove_note (insn
, src_note
);
1895 XEXP (src_note
, 1) = REG_NOTES (p
);
1896 REG_NOTES (p
) = src_note
;
1898 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
1901 REG_N_SETS (REGNO (src
))++;
1902 REG_N_SETS (REGNO (dst
))--;
1904 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
1906 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
1907 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
1909 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
1910 /* REG_LIVE_LENGTH is only an approximation after
1911 combine if sched is not run, so make sure that we
1912 still have a reasonable value. */
1913 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
1914 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
1917 /* We assume that a register is used exactly once per
1918 insn in the updates above. If this is not correct,
1919 no great harm is done. */
1921 REG_N_REFS (REGNO (src
)) += 2 * true_loop_depth
;
1922 REG_N_REFS (REGNO (dst
)) -= 2 * true_loop_depth
;
1924 /* If that was the only time dst was set,
1925 and dst was not live at the start of the
1926 function, we know that we have no more
1927 references to dst; clear REG_N_REFS so it
1928 won't make reload do any work. */
1929 if (REG_N_SETS (REGNO (dst
)) == 0
1930 && ! regno_uninitialized (REGNO (dst
)))
1931 REG_N_REFS (REGNO (dst
)) = 0;
1933 if (regmove_dump_file
)
1934 fprintf (regmove_dump_file
,
1935 "Fixed operand %d of insn %d matching operand %d.\n",
1936 operand_number
, INSN_UID (insn
), match_number
);
1941 /* return nonzero if X is stable but for mentioning SRC or mentioning /
1942 changing DST . If in doubt, presume it is unstable. */
1944 stable_but_for_p (x
, src
, dst
)
1947 RTX_CODE code
= GET_CODE (x
);
1948 switch (GET_RTX_CLASS (code
))
1950 case '<': case '1': case 'c': case '2': case 'b': case '3':
1953 char *fmt
= GET_RTX_FORMAT (code
);
1954 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1955 if (fmt
[i
] == 'e' && ! stable_but_for_p (XEXP (x
, i
), src
, dst
))
1960 if (x
== src
|| x
== dst
)
1964 return ! rtx_unstable_p (x
);
1968 /* Test if regmove seems profitable for this target. Regmove is useful only
1969 if some common patterns are two address, i.e. require matching constraints,
1970 so we check that condition here. */
1973 regmove_profitable_p ()
1975 #ifdef REGISTER_CONSTRAINTS
1977 enum machine_mode mode
;
1978 optab tstoptab
= add_optab
;
1979 do /* check add_optab and ashl_optab */
1980 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
1981 mode
= GET_MODE_WIDER_MODE (mode
))
1983 int icode
= (int) tstoptab
->handlers
[(int) mode
].insn_code
;
1984 rtx reg0
, reg1
, reg2
, pat
;
1987 if (GET_MODE_BITSIZE (mode
) < 32 || icode
== CODE_FOR_nothing
)
1989 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1990 if (TEST_HARD_REG_BIT (reg_class_contents
[GENERAL_REGS
], i
))
1992 if (i
+ 2 >= FIRST_PSEUDO_REGISTER
)
1994 reg0
= gen_rtx_REG (insn_operand_mode
[icode
][0], i
);
1995 reg1
= gen_rtx_REG (insn_operand_mode
[icode
][1], i
+ 1);
1996 reg2
= gen_rtx_REG (insn_operand_mode
[icode
][2], i
+ 2);
1997 if (! (*insn_operand_predicate
[icode
][0]) (reg0
, VOIDmode
)
1998 || ! (*insn_operand_predicate
[icode
][1]) (reg1
, VOIDmode
)
1999 || ! (*insn_operand_predicate
[icode
][2]) (reg2
, VOIDmode
))
2001 pat
= GEN_FCN (icode
) (reg0
, reg1
, reg2
);
2004 if (GET_CODE (pat
) == SEQUENCE
)
2005 pat
= XVECEXP (pat
, 0, XVECLEN (pat
, 0) - 1);
2007 pat
= make_insn_raw (pat
);
2008 if (! single_set (pat
)
2009 || GET_CODE (SET_SRC (single_set (pat
))) != tstoptab
->code
)
2010 /* Unexpected complexity; don't need to handle this unless
2011 we find a machine where this occurs and regmove should
2014 if (find_matches (pat
, &match
))
2018 while (tstoptab
!= ashl_optab
&& (tstoptab
= ashl_optab
, 1));
2019 #endif /* REGISTER_CONSTRAINTS */