regmove.c (optimize_reg_copy_1): Undo Aug 18 change.
[gcc.git] / gcc / regmove.c
1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
3
4 This file is part of GNU CC.
5
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
10
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
26
27 #include "config.h"
28 #include "system.h"
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
30 #include "insn-config.h"
31 #include "recog.h"
32 #include "output.h"
33 #include "reload.h"
34 #include "regs.h"
35 #include "hard-reg-set.h"
36 #include "flags.h"
37 #include "expr.h"
38 #include "insn-flags.h"
39 #include "basic-block.h"
40 #include "toplev.h"
41
42 static int optimize_reg_copy_1 PROTO((rtx, rtx, rtx));
43 static void optimize_reg_copy_2 PROTO((rtx, rtx, rtx));
44 static void optimize_reg_copy_3 PROTO((rtx, rtx, rtx));
45 static rtx gen_add3_insn PROTO((rtx, rtx, rtx));
46 static void copy_src_to_dest PROTO((rtx, rtx, rtx, int));
47 static int *regmove_bb_head;
48
49 struct match {
50 int with[MAX_RECOG_OPERANDS];
51 enum { READ, WRITE, READWRITE } use[MAX_RECOG_OPERANDS];
52 int commutative[MAX_RECOG_OPERANDS];
53 int early_clobber[MAX_RECOG_OPERANDS];
54 };
55
56 static int try_auto_increment PROTO((rtx, rtx, rtx, rtx, HOST_WIDE_INT, int));
57 static int find_matches PROTO((rtx, struct match *));
58 static int fixup_match_1 PROTO((rtx, rtx, rtx, rtx, rtx, int, int, int, FILE *))
59 ;
60 static int reg_is_remote_constant_p PROTO((rtx, rtx, rtx));
61 static int stable_but_for_p PROTO((rtx, rtx, rtx));
62 static int regclass_compatible_p PROTO((int, int));
63 static int loop_depth;
64
65 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
66 causing too much register allocation problems. */
67 static int
68 regclass_compatible_p (class0, class1)
69 int class0, class1;
70 {
71 return (class0 == class1
72 || (reg_class_subset_p (class0, class1)
73 && ! CLASS_LIKELY_SPILLED_P (class0))
74 || (reg_class_subset_p (class1, class0)
75 && ! CLASS_LIKELY_SPILLED_P (class1)));
76 }
77
78 /* Generate and return an insn body to add r1 and c,
79 storing the result in r0. */
80 static rtx
81 gen_add3_insn (r0, r1, c)
82 rtx r0, r1, c;
83 {
84 int icode = (int) add_optab->handlers[(int) GET_MODE (r0)].insn_code;
85
86 if (icode == CODE_FOR_nothing
87 || ! (*insn_operand_predicate[icode][0]) (r0, insn_operand_mode[icode][0])
88 || ! (*insn_operand_predicate[icode][1]) (r1, insn_operand_mode[icode][1])
89 || ! (*insn_operand_predicate[icode][2]) (c, insn_operand_mode[icode][2]))
90 return NULL_RTX;
91
92 return (GEN_FCN (icode) (r0, r1, c));
93 }
94
95
96 /* INC_INSN is an instruction that adds INCREMENT to REG.
97 Try to fold INC_INSN as a post/pre in/decrement into INSN.
98 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
99 Return nonzero for success. */
100 static int
101 try_auto_increment (insn, inc_insn, inc_insn_set, reg, increment, pre)
102 rtx reg, insn, inc_insn ,inc_insn_set;
103 HOST_WIDE_INT increment;
104 int pre;
105 {
106 enum rtx_code inc_code;
107
108 rtx pset = single_set (insn);
109 if (pset)
110 {
111 /* Can't use the size of SET_SRC, we might have something like
112 (sign_extend:SI (mem:QI ... */
113 rtx use = find_use_as_address (pset, reg, 0);
114 if (use != 0 && use != (rtx) 1)
115 {
116 int size = GET_MODE_SIZE (GET_MODE (use));
117 if (0
118 || (HAVE_POST_INCREMENT
119 && pre == 0 && (inc_code = POST_INC, increment == size))
120 || (HAVE_PRE_INCREMENT
121 && pre == 1 && (inc_code = PRE_INC, increment == size))
122 || (HAVE_POST_DECREMENT
123 && pre == 0 && (inc_code = POST_DEC, increment == -size))
124 || (HAVE_PRE_DECREMENT
125 && pre == 1 && (inc_code = PRE_DEC, increment == -size))
126 )
127 {
128 if (inc_insn_set)
129 validate_change
130 (inc_insn,
131 &SET_SRC (inc_insn_set),
132 XEXP (SET_SRC (inc_insn_set), 0), 1);
133 validate_change (insn, &XEXP (use, 0),
134 gen_rtx_fmt_e (inc_code, Pmode, reg), 1);
135 if (apply_change_group ())
136 {
137 REG_NOTES (insn)
138 = gen_rtx_EXPR_LIST (REG_INC,
139 reg, REG_NOTES (insn));
140 if (! inc_insn_set)
141 {
142 PUT_CODE (inc_insn, NOTE);
143 NOTE_LINE_NUMBER (inc_insn) = NOTE_INSN_DELETED;
144 NOTE_SOURCE_FILE (inc_insn) = 0;
145 }
146 return 1;
147 }
148 }
149 }
150 }
151 return 0;
152 }
153
154 static int *regno_src_regno;
155
156 /* Indicate how good a choice REG (which appears as a source) is to replace
157 a destination register with. The higher the returned value, the better
158 the choice. The main objective is to avoid using a register that is
159 a candidate for tying to a hard register, since the output might in
160 turn be a candidate to be tied to a different hard register. */
161 int
162 replacement_quality(reg)
163 rtx reg;
164 {
165 int src_regno;
166
167 /* Bad if this isn't a register at all. */
168 if (GET_CODE (reg) != REG)
169 return 0;
170
171 /* If this register is not meant to get a hard register,
172 it is a poor choice. */
173 if (REG_LIVE_LENGTH (REGNO (reg)) < 0)
174 return 0;
175
176 src_regno = regno_src_regno[REGNO (reg)];
177
178 /* If it was not copied from another register, it is fine. */
179 if (src_regno < 0)
180 return 3;
181
182 /* Copied from a hard register? */
183 if (src_regno < FIRST_PSEUDO_REGISTER)
184 return 1;
185
186 /* Copied from a pseudo register - not as bad as from a hard register,
187 yet still cumbersome, since the register live length will be lengthened
188 when the registers get tied. */
189 return 2;
190 }
191
192 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
193 in INSN.
194
195 Search forward to see if SRC dies before either it or DEST is modified,
196 but don't scan past the end of a basic block. If so, we can replace SRC
197 with DEST and let SRC die in INSN.
198
199 This will reduce the number of registers live in that range and may enable
200 DEST to be tied to SRC, thus often saving one register in addition to a
201 register-register copy. */
202
203 static int
204 optimize_reg_copy_1 (insn, dest, src)
205 rtx insn;
206 rtx dest;
207 rtx src;
208 {
209 rtx p, q;
210 rtx note;
211 rtx dest_death = 0;
212 int sregno = REGNO (src);
213 int dregno = REGNO (dest);
214
215 /* We don't want to mess with hard regs if register classes are small. */
216 if (sregno == dregno
217 || (SMALL_REGISTER_CLASSES
218 && (sregno < FIRST_PSEUDO_REGISTER
219 || dregno < FIRST_PSEUDO_REGISTER))
220 /* We don't see all updates to SP if they are in an auto-inc memory
221 reference, so we must disallow this optimization on them. */
222 || sregno == STACK_POINTER_REGNUM || dregno == STACK_POINTER_REGNUM)
223 return 0;
224
225 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
226 {
227 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
228 || (GET_CODE (p) == NOTE
229 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
230 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
231 break;
232
233 /* ??? We can't scan past the end of a basic block without updating
234 the register lifetime info (REG_DEAD/basic_block_live_at_start).
235 A CALL_INSN might be the last insn of a basic block, if it is inside
236 an EH region. There is no easy way to tell, so we just always break
237 when we see a CALL_INSN if flag_exceptions is nonzero. */
238 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
239 break;
240
241 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
242 continue;
243
244 if (reg_set_p (src, p) || reg_set_p (dest, p)
245 /* Don't change a USE of a register. */
246 || (GET_CODE (PATTERN (p)) == USE
247 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
248 break;
249
250 /* See if all of SRC dies in P. This test is slightly more
251 conservative than it needs to be. */
252 if ((note = find_regno_note (p, REG_DEAD, sregno)) != 0
253 && GET_MODE (XEXP (note, 0)) == GET_MODE (src))
254 {
255 int failed = 0;
256 int d_length = 0;
257 int s_length = 0;
258 int d_n_calls = 0;
259 int s_n_calls = 0;
260
261 /* We can do the optimization. Scan forward from INSN again,
262 replacing regs as we go. Set FAILED if a replacement can't
263 be done. In that case, we can't move the death note for SRC.
264 This should be rare. */
265
266 /* Set to stop at next insn. */
267 for (q = next_real_insn (insn);
268 q != next_real_insn (p);
269 q = next_real_insn (q))
270 {
271 if (reg_overlap_mentioned_p (src, PATTERN (q)))
272 {
273 /* If SRC is a hard register, we might miss some
274 overlapping registers with validate_replace_rtx,
275 so we would have to undo it. We can't if DEST is
276 present in the insn, so fail in that combination
277 of cases. */
278 if (sregno < FIRST_PSEUDO_REGISTER
279 && reg_mentioned_p (dest, PATTERN (q)))
280 failed = 1;
281
282 /* Replace all uses and make sure that the register
283 isn't still present. */
284 else if (validate_replace_rtx (src, dest, q)
285 && (sregno >= FIRST_PSEUDO_REGISTER
286 || ! reg_overlap_mentioned_p (src,
287 PATTERN (q))))
288 {
289 /* We assume that a register is used exactly once per
290 insn in the REG_N_REFS updates below. If this is not
291 correct, no great harm is done.
292
293 Since we do not know if we will change the lifetime of
294 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH
295 or REG_N_CALLS_CROSSED at this time. */
296 if (sregno >= FIRST_PSEUDO_REGISTER)
297 REG_N_REFS (sregno) -= loop_depth;
298
299 if (dregno >= FIRST_PSEUDO_REGISTER)
300 REG_N_REFS (dregno) += loop_depth;
301 }
302 else
303 {
304 validate_replace_rtx (dest, src, q);
305 failed = 1;
306 }
307 }
308
309 /* For SREGNO, count the total number of insns scanned.
310 For DREGNO, count the total number of insns scanned after
311 passing the death note for DREGNO. */
312 s_length++;
313 if (dest_death)
314 d_length++;
315
316 /* If the insn in which SRC dies is a CALL_INSN, don't count it
317 as a call that has been crossed. Otherwise, count it. */
318 if (q != p && GET_CODE (q) == CALL_INSN)
319 {
320 /* Similarly, total calls for SREGNO, total calls beyond
321 the death note for DREGNO. */
322 s_n_calls++;
323 if (dest_death)
324 d_n_calls++;
325 }
326
327 /* If DEST dies here, remove the death note and save it for
328 later. Make sure ALL of DEST dies here; again, this is
329 overly conservative. */
330 if (dest_death == 0
331 && (dest_death = find_regno_note (q, REG_DEAD, dregno)) != 0)
332 {
333 if (GET_MODE (XEXP (dest_death, 0)) != GET_MODE (dest))
334 failed = 1, dest_death = 0;
335 else
336 remove_note (q, dest_death);
337 }
338 }
339
340 if (! failed)
341 {
342 /* These counters need to be updated if and only if we are
343 going to move the REG_DEAD note. */
344 if (sregno >= FIRST_PSEUDO_REGISTER)
345 {
346 if (REG_LIVE_LENGTH (sregno) >= 0)
347 {
348 REG_LIVE_LENGTH (sregno) -= s_length;
349 /* REG_LIVE_LENGTH is only an approximation after
350 combine if sched is not run, so make sure that we
351 still have a reasonable value. */
352 if (REG_LIVE_LENGTH (sregno) < 2)
353 REG_LIVE_LENGTH (sregno) = 2;
354 }
355
356 REG_N_CALLS_CROSSED (sregno) -= s_n_calls;
357 }
358
359 /* Move death note of SRC from P to INSN. */
360 remove_note (p, note);
361 XEXP (note, 1) = REG_NOTES (insn);
362 REG_NOTES (insn) = note;
363 }
364
365 /* Put death note of DEST on P if we saw it die. */
366 if (dest_death)
367 {
368 XEXP (dest_death, 1) = REG_NOTES (p);
369 REG_NOTES (p) = dest_death;
370
371 if (dregno >= FIRST_PSEUDO_REGISTER)
372 {
373 /* If and only if we are moving the death note for DREGNO,
374 then we need to update its counters. */
375 if (REG_LIVE_LENGTH (dregno) >= 0)
376 REG_LIVE_LENGTH (dregno) += d_length;
377 REG_N_CALLS_CROSSED (dregno) += d_n_calls;
378 }
379 }
380
381 return ! failed;
382 }
383
384 /* If SRC is a hard register which is set or killed in some other
385 way, we can't do this optimization. */
386 else if (sregno < FIRST_PSEUDO_REGISTER
387 && dead_or_set_p (p, src))
388 break;
389 }
390 return 0;
391 }
392 \f
393 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
394 a sequence of insns that modify DEST followed by an insn that sets
395 SRC to DEST in which DEST dies, with no prior modification of DEST.
396 (There is no need to check if the insns in between actually modify
397 DEST. We should not have cases where DEST is not modified, but
398 the optimization is safe if no such modification is detected.)
399 In that case, we can replace all uses of DEST, starting with INSN and
400 ending with the set of SRC to DEST, with SRC. We do not do this
401 optimization if a CALL_INSN is crossed unless SRC already crosses a
402 call or if DEST dies before the copy back to SRC.
403
404 It is assumed that DEST and SRC are pseudos; it is too complicated to do
405 this for hard registers since the substitutions we may make might fail. */
406
407 static void
408 optimize_reg_copy_2 (insn, dest, src)
409 rtx insn;
410 rtx dest;
411 rtx src;
412 {
413 rtx p, q;
414 rtx set;
415 int sregno = REGNO (src);
416 int dregno = REGNO (dest);
417
418 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
419 {
420 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
421 || (GET_CODE (p) == NOTE
422 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
423 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
424 break;
425
426 /* ??? We can't scan past the end of a basic block without updating
427 the register lifetime info (REG_DEAD/basic_block_live_at_start).
428 A CALL_INSN might be the last insn of a basic block, if it is inside
429 an EH region. There is no easy way to tell, so we just always break
430 when we see a CALL_INSN if flag_exceptions is nonzero. */
431 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
432 break;
433
434 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
435 continue;
436
437 set = single_set (p);
438 if (set && SET_SRC (set) == dest && SET_DEST (set) == src
439 && find_reg_note (p, REG_DEAD, dest))
440 {
441 /* We can do the optimization. Scan forward from INSN again,
442 replacing regs as we go. */
443
444 /* Set to stop at next insn. */
445 for (q = insn; q != NEXT_INSN (p); q = NEXT_INSN (q))
446 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
447 {
448 if (reg_mentioned_p (dest, PATTERN (q)))
449 {
450 PATTERN (q) = replace_rtx (PATTERN (q), dest, src);
451
452 /* We assume that a register is used exactly once per
453 insn in the updates below. If this is not correct,
454 no great harm is done. */
455 REG_N_REFS (dregno) -= loop_depth;
456 REG_N_REFS (sregno) += loop_depth;
457 }
458
459
460 if (GET_CODE (q) == CALL_INSN)
461 {
462 REG_N_CALLS_CROSSED (dregno)--;
463 REG_N_CALLS_CROSSED (sregno)++;
464 }
465 }
466
467 remove_note (p, find_reg_note (p, REG_DEAD, dest));
468 REG_N_DEATHS (dregno)--;
469 remove_note (insn, find_reg_note (insn, REG_DEAD, src));
470 REG_N_DEATHS (sregno)--;
471 return;
472 }
473
474 if (reg_set_p (src, p)
475 || find_reg_note (p, REG_DEAD, dest)
476 || (GET_CODE (p) == CALL_INSN && REG_N_CALLS_CROSSED (sregno) == 0))
477 break;
478 }
479 }
480 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
481 Look if SRC dies there, and if it is only set once, by loading
482 it from memory. If so, try to encorporate the zero/sign extension
483 into the memory read, change SRC to the mode of DEST, and alter
484 the remaining accesses to use the appropriate SUBREG. This allows
485 SRC and DEST to be tied later. */
486 static void
487 optimize_reg_copy_3 (insn, dest, src)
488 rtx insn;
489 rtx dest;
490 rtx src;
491 {
492 rtx src_reg = XEXP (src, 0);
493 int src_no = REGNO (src_reg);
494 int dst_no = REGNO (dest);
495 rtx p, set, subreg;
496 enum machine_mode old_mode;
497
498 if (src_no < FIRST_PSEUDO_REGISTER
499 || dst_no < FIRST_PSEUDO_REGISTER
500 || ! find_reg_note (insn, REG_DEAD, src_reg)
501 || REG_N_SETS (src_no) != 1)
502 return;
503 for (p = PREV_INSN (insn); ! reg_set_p (src_reg, p); p = PREV_INSN (p))
504 {
505 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
506 || (GET_CODE (p) == NOTE
507 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
508 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
509 return;
510
511 /* ??? We can't scan past the end of a basic block without updating
512 the register lifetime info (REG_DEAD/basic_block_live_at_start).
513 A CALL_INSN might be the last insn of a basic block, if it is inside
514 an EH region. There is no easy way to tell, so we just always break
515 when we see a CALL_INSN if flag_exceptions is nonzero. */
516 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
517 return;
518
519 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
520 continue;
521 }
522 if (! (set = single_set (p))
523 || GET_CODE (SET_SRC (set)) != MEM
524 || SET_DEST (set) != src_reg)
525 return;
526
527 /* Be conserative: although this optimization is also valid for
528 volatile memory references, that could cause trouble in later passes. */
529 if (MEM_VOLATILE_P (SET_SRC (set)))
530 return;
531
532 /* Do not use a SUBREG to truncate from one mode to another if truncation
533 is not a nop. */
534 if (GET_MODE_BITSIZE (GET_MODE (src_reg)) <= GET_MODE_BITSIZE (GET_MODE (src))
535 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src)),
536 GET_MODE_BITSIZE (GET_MODE (src_reg))))
537 return;
538
539 old_mode = GET_MODE (src_reg);
540 PUT_MODE (src_reg, GET_MODE (src));
541 XEXP (src, 0) = SET_SRC (set);
542
543 /* Include this change in the group so that it's easily undone if
544 one of the changes in the group is invalid. */
545 validate_change (p, &SET_SRC (set), src, 1);
546
547 /* Now walk forward making additional replacements. We want to be able
548 to undo all the changes if a later substitution fails. */
549 subreg = gen_rtx_SUBREG (old_mode, src_reg, 0);
550 while (p = NEXT_INSN (p), p != insn)
551 {
552 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
553 continue;
554
555 /* Make a tenative change. */
556 validate_replace_rtx_group (src_reg, subreg, p);
557 }
558
559 validate_replace_rtx_group (src, src_reg, insn);
560
561 /* Now see if all the changes are valid. */
562 if (! apply_change_group ())
563 {
564 /* One or more changes were no good. Back out everything. */
565 PUT_MODE (src_reg, old_mode);
566 XEXP (src, 0) = src_reg;
567 }
568 }
569
570 \f
571 /* If we were not able to update the users of src to use dest directly, try
572 instead moving the value to dest directly before the operation. */
573
574 static void
575 copy_src_to_dest (insn, src, dest, loop_depth)
576 rtx insn;
577 rtx src;
578 rtx dest;
579 int loop_depth;
580 {
581 rtx seq;
582 rtx link;
583 rtx next;
584 rtx set;
585 rtx move_insn;
586 rtx *p_insn_notes;
587 rtx *p_move_notes;
588 int src_regno;
589 int dest_regno;
590 int bb;
591 int insn_uid;
592 int move_uid;
593
594 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
595 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
596 parameter when there is no frame pointer that is not allocated a register.
597 For now, we just reject them, rather than incrementing the live length. */
598
599 if (GET_CODE (src) == REG
600 && REG_LIVE_LENGTH (REGNO (src)) > 0
601 && GET_CODE (dest) == REG
602 && REG_LIVE_LENGTH (REGNO (dest)) > 0
603 && (set = single_set (insn)) != NULL_RTX
604 && !reg_mentioned_p (dest, SET_SRC (set))
605 && GET_MODE (src) == GET_MODE (dest))
606 {
607 int old_num_regs = reg_rtx_no;
608
609 /* Generate the src->dest move. */
610 start_sequence ();
611 emit_move_insn (dest, src);
612 seq = gen_sequence ();
613 end_sequence ();
614 /* If this sequence uses new registers, we may not use it. */
615 if (old_num_regs != reg_rtx_no
616 || ! validate_replace_rtx (src, dest, insn))
617 {
618 /* We have to restore reg_rtx_no to its old value, lest
619 recompute_reg_usage will try to compute the usage of the
620 new regs, yet reg_n_info is not valid for them. */
621 reg_rtx_no = old_num_regs;
622 return;
623 }
624 emit_insn_before (seq, insn);
625 move_insn = PREV_INSN (insn);
626 p_move_notes = &REG_NOTES (move_insn);
627 p_insn_notes = &REG_NOTES (insn);
628
629 /* Move any notes mentioning src to the move instruction */
630 for (link = REG_NOTES (insn); link != NULL_RTX; link = next)
631 {
632 next = XEXP (link, 1);
633 if (XEXP (link, 0) == src)
634 {
635 *p_move_notes = link;
636 p_move_notes = &XEXP (link, 1);
637 }
638 else
639 {
640 *p_insn_notes = link;
641 p_insn_notes = &XEXP (link, 1);
642 }
643 }
644
645 *p_move_notes = NULL_RTX;
646 *p_insn_notes = NULL_RTX;
647
648 /* Is the insn the head of a basic block? If so extend it */
649 insn_uid = INSN_UID (insn);
650 move_uid = INSN_UID (move_insn);
651 bb = regmove_bb_head[insn_uid];
652 if (bb >= 0)
653 {
654 BLOCK_HEAD (bb) = move_insn;
655 regmove_bb_head[insn_uid] = -1;
656 }
657
658 /* Update the various register tables. */
659 dest_regno = REGNO (dest);
660 REG_N_SETS (dest_regno) += loop_depth;
661 REG_N_REFS (dest_regno) += loop_depth;
662 REG_LIVE_LENGTH (dest_regno)++;
663 if (REGNO_FIRST_UID (dest_regno) == insn_uid)
664 REGNO_FIRST_UID (dest_regno) = move_uid;
665
666 src_regno = REGNO (src);
667 if (! find_reg_note (move_insn, REG_DEAD, src))
668 REG_LIVE_LENGTH (src_regno)++;
669
670 if (REGNO_FIRST_UID (src_regno) == insn_uid)
671 REGNO_FIRST_UID (src_regno) = move_uid;
672
673 if (REGNO_LAST_UID (src_regno) == insn_uid)
674 REGNO_LAST_UID (src_regno) = move_uid;
675
676 if (REGNO_LAST_NOTE_UID (src_regno) == insn_uid)
677 REGNO_LAST_NOTE_UID (src_regno) = move_uid;
678 }
679 }
680
681 \f
682 /* Return whether REG is set in only one location, and is set to a
683 constant, but is set in a different basic block from INSN (an
684 instructions which uses REG). In this case REG is equivalent to a
685 constant, and we don't want to break that equivalence, because that
686 may increase register pressure and make reload harder. If REG is
687 set in the same basic block as INSN, we don't worry about it,
688 because we'll probably need a register anyhow (??? but what if REG
689 is used in a different basic block as well as this one?). FIRST is
690 the first insn in the function. */
691
692 static int
693 reg_is_remote_constant_p (reg, insn, first)
694 rtx reg;
695 rtx insn;
696 rtx first;
697 {
698 register rtx p;
699
700 if (REG_N_SETS (REGNO (reg)) != 1)
701 return 0;
702
703 /* Look for the set. */
704 for (p = LOG_LINKS (insn); p; p = XEXP (p, 1))
705 {
706 rtx s;
707
708 if (REG_NOTE_KIND (p) != 0)
709 continue;
710 s = single_set (XEXP (p, 0));
711 if (s != 0
712 && GET_CODE (SET_DEST (s)) == REG
713 && REGNO (SET_DEST (s)) == REGNO (reg))
714 {
715 /* The register is set in the same basic block. */
716 return 0;
717 }
718 }
719
720 for (p = first; p && p != insn; p = NEXT_INSN (p))
721 {
722 rtx s;
723
724 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
725 continue;
726 s = single_set (p);
727 if (s != 0
728 && GET_CODE (SET_DEST (s)) == REG
729 && REGNO (SET_DEST (s)) == REGNO (reg))
730 {
731 /* This is the instruction which sets REG. If there is a
732 REG_EQUAL note, then REG is equivalent to a constant. */
733 if (find_reg_note (p, REG_EQUAL, NULL_RTX))
734 return 1;
735 return 0;
736 }
737 }
738
739 return 0;
740 }
741
742 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
743 another add immediate instruction with the same source and dest registers,
744 and if we find one, we change INSN to an increment, and return 1. If
745 no changes are made, we return 0.
746
747 This changes
748 (set (reg100) (plus reg1 offset1))
749 ...
750 (set (reg100) (plus reg1 offset2))
751 to
752 (set (reg100) (plus reg1 offset1))
753 ...
754 (set (reg100) (plus reg100 offset2-offset1)) */
755
756 /* ??? What does this comment mean? */
757 /* cse disrupts preincrement / postdecrement squences when it finds a
758 hard register as ultimate source, like the frame pointer. */
759
760 int
761 fixup_match_2 (insn, dst, src, offset, regmove_dump_file)
762 rtx insn, dst, src, offset;
763 FILE *regmove_dump_file;
764 {
765 rtx p, dst_death = 0;
766 int length, num_calls = 0;
767
768 /* If SRC dies in INSN, we'd have to move the death note. This is
769 considered to be very unlikely, so we just skip the optimization
770 in this case. */
771 if (find_regno_note (insn, REG_DEAD, REGNO (src)))
772 return 0;
773
774 /* Scan backward to find the first instruction that sets DST. */
775
776 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
777 {
778 rtx pset;
779
780 if (GET_CODE (p) == CODE_LABEL
781 || GET_CODE (p) == JUMP_INSN
782 || (GET_CODE (p) == NOTE
783 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
784 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
785 break;
786
787 /* ??? We can't scan past the end of a basic block without updating
788 the register lifetime info (REG_DEAD/basic_block_live_at_start).
789 A CALL_INSN might be the last insn of a basic block, if it is inside
790 an EH region. There is no easy way to tell, so we just always break
791 when we see a CALL_INSN if flag_exceptions is nonzero. */
792 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
793 break;
794
795 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
796 continue;
797
798 if (find_regno_note (p, REG_DEAD, REGNO (dst)))
799 dst_death = p;
800 if (! dst_death)
801 length++;
802
803 pset = single_set (p);
804 if (pset && SET_DEST (pset) == dst
805 && GET_CODE (SET_SRC (pset)) == PLUS
806 && XEXP (SET_SRC (pset), 0) == src
807 && GET_CODE (XEXP (SET_SRC (pset), 1)) == CONST_INT)
808 {
809 HOST_WIDE_INT newconst
810 = INTVAL (offset) - INTVAL (XEXP (SET_SRC (pset), 1));
811 rtx add = gen_add3_insn (dst, dst, GEN_INT (newconst));
812
813 if (add && validate_change (insn, &PATTERN (insn), add, 0))
814 {
815 /* Remove the death note for DST from DST_DEATH. */
816 if (dst_death)
817 {
818 remove_death (REGNO (dst), dst_death);
819 REG_LIVE_LENGTH (REGNO (dst)) += length;
820 REG_N_CALLS_CROSSED (REGNO (dst)) += num_calls;
821 }
822
823 REG_N_REFS (REGNO (dst)) += loop_depth;
824 REG_N_REFS (REGNO (src)) -= loop_depth;
825
826 if (regmove_dump_file)
827 fprintf (regmove_dump_file,
828 "Fixed operand of insn %d.\n",
829 INSN_UID (insn));
830
831 #ifdef AUTO_INC_DEC
832 for (p = PREV_INSN (insn); p; p = PREV_INSN (p))
833 {
834 if (GET_CODE (p) == CODE_LABEL
835 || GET_CODE (p) == JUMP_INSN
836 || (GET_CODE (p) == NOTE
837 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
838 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
839 break;
840 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
841 continue;
842 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
843 {
844 if (try_auto_increment (p, insn, 0, dst, newconst, 0))
845 return 1;
846 break;
847 }
848 }
849 for (p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
850 {
851 if (GET_CODE (p) == CODE_LABEL
852 || GET_CODE (p) == JUMP_INSN
853 || (GET_CODE (p) == NOTE
854 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
855 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
856 break;
857 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
858 continue;
859 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
860 {
861 try_auto_increment (p, insn, 0, dst, newconst, 1);
862 break;
863 }
864 }
865 #endif
866 return 1;
867 }
868 }
869
870 if (reg_set_p (dst, PATTERN (p)))
871 break;
872
873 /* If we have passed a call instruction, and the
874 pseudo-reg SRC is not already live across a call,
875 then don't perform the optimization. */
876 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
877 hard regs are clobbered. Thus, we only use it for src for
878 non-call insns. */
879 if (GET_CODE (p) == CALL_INSN)
880 {
881 if (! dst_death)
882 num_calls++;
883
884 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
885 break;
886
887 if (call_used_regs [REGNO (dst)]
888 || find_reg_fusage (p, CLOBBER, dst))
889 break;
890 }
891 else if (reg_set_p (src, PATTERN (p)))
892 break;
893 }
894
895 return 0;
896 }
897
898 void
899 regmove_optimize (f, nregs, regmove_dump_file)
900 rtx f;
901 int nregs;
902 FILE *regmove_dump_file;
903 {
904 int old_max_uid = get_max_uid ();
905 rtx insn;
906 struct match match;
907 int pass;
908 int i;
909 rtx copy_src, copy_dst;
910
911 regno_src_regno = (int *)alloca (sizeof *regno_src_regno * nregs);
912 for (i = nregs; --i >= 0; ) regno_src_regno[i] = -1;
913
914 regmove_bb_head = (int *)alloca (sizeof (int) * (old_max_uid + 1));
915 for (i = old_max_uid; i >= 0; i--) regmove_bb_head[i] = -1;
916 for (i = 0; i < n_basic_blocks; i++)
917 regmove_bb_head[INSN_UID (BLOCK_HEAD (i))] = i;
918
919 /* A forward/backward pass. Replace output operands with input operands. */
920
921 loop_depth = 1;
922
923 for (pass = 0; pass <= 2; pass++)
924 {
925 if (! flag_regmove && pass >= flag_expensive_optimizations)
926 return;
927
928 if (regmove_dump_file)
929 fprintf (regmove_dump_file, "Starting %s pass...\n",
930 pass ? "backward" : "forward");
931
932 for (insn = pass ? get_last_insn () : f; insn;
933 insn = pass ? PREV_INSN (insn) : NEXT_INSN (insn))
934 {
935 rtx set;
936 int op_no, match_no;
937
938 if (GET_CODE (insn) == NOTE)
939 {
940 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
941 loop_depth++;
942 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
943 loop_depth--;
944 }
945
946 set = single_set (insn);
947 if (! set)
948 continue;
949
950 if (flag_expensive_optimizations && ! pass
951 && (GET_CODE (SET_SRC (set)) == SIGN_EXTEND
952 || GET_CODE (SET_SRC (set)) == ZERO_EXTEND)
953 && GET_CODE (XEXP (SET_SRC (set), 0)) == REG
954 && GET_CODE (SET_DEST(set)) == REG)
955 optimize_reg_copy_3 (insn, SET_DEST (set), SET_SRC (set));
956
957 if (flag_expensive_optimizations && ! pass
958 && GET_CODE (SET_SRC (set)) == REG
959 && GET_CODE (SET_DEST(set)) == REG)
960 {
961 /* If this is a register-register copy where SRC is not dead,
962 see if we can optimize it. If this optimization succeeds,
963 it will become a copy where SRC is dead. */
964 if ((find_reg_note (insn, REG_DEAD, SET_SRC (set))
965 || optimize_reg_copy_1 (insn, SET_DEST (set), SET_SRC (set)))
966 && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER)
967 {
968 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
969 if (REGNO (SET_SRC (set)) >= FIRST_PSEUDO_REGISTER)
970 optimize_reg_copy_2 (insn, SET_DEST (set), SET_SRC (set));
971 if (regno_src_regno[REGNO (SET_DEST (set))] < 0
972 && SET_SRC (set) != SET_DEST (set))
973 {
974 int srcregno = REGNO (SET_SRC(set));
975 if (regno_src_regno[srcregno] >= 0)
976 srcregno = regno_src_regno[srcregno];
977 regno_src_regno[REGNO (SET_DEST (set))] = srcregno;
978 }
979 }
980 }
981 if (! flag_regmove)
982 continue;
983
984 #ifdef REGISTER_CONSTRAINTS
985 if (! find_matches (insn, &match))
986 continue;
987
988 /* Now scan through the operands looking for a source operand
989 which is supposed to match the destination operand.
990 Then scan forward for an instruction which uses the dest
991 operand.
992 If it dies there, then replace the dest in both operands with
993 the source operand. */
994
995 for (op_no = 0; op_no < recog_n_operands; op_no++)
996 {
997 rtx src, dst, src_subreg;
998 enum reg_class src_class, dst_class;
999
1000 match_no = match.with[op_no];
1001
1002 /* Nothing to do if the two operands aren't supposed to match. */
1003 if (match_no < 0)
1004 continue;
1005
1006 src = recog_operand[op_no];
1007 dst = recog_operand[match_no];
1008
1009 if (GET_CODE (src) != REG)
1010 continue;
1011
1012 src_subreg = src;
1013 if (GET_CODE (dst) == SUBREG
1014 && GET_MODE_SIZE (GET_MODE (dst))
1015 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst))))
1016 {
1017 src_subreg
1018 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst)),
1019 src, SUBREG_WORD (dst));
1020 dst = SUBREG_REG (dst);
1021 }
1022 if (GET_CODE (dst) != REG
1023 || REGNO (dst) < FIRST_PSEUDO_REGISTER)
1024 continue;
1025
1026 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1027 {
1028 if (match.commutative[op_no] < op_no)
1029 regno_src_regno[REGNO (dst)] = REGNO (src);
1030 continue;
1031 }
1032
1033 if (REG_LIVE_LENGTH (REGNO (src)) < 0)
1034 continue;
1035
1036 /* op_no/src must be a read-only operand, and
1037 match_operand/dst must be a write-only operand. */
1038 if (match.use[op_no] != READ
1039 || match.use[match_no] != WRITE)
1040 continue;
1041
1042 if (match.early_clobber[match_no]
1043 && count_occurrences (PATTERN (insn), src) > 1)
1044 continue;
1045
1046 /* Make sure match_operand is the destination. */
1047 if (recog_operand[match_no] != SET_DEST (set))
1048 continue;
1049
1050 /* If the operands already match, then there is nothing to do. */
1051 /* But in the commutative case, we might find a better match. */
1052 if (operands_match_p (src, dst)
1053 || (match.commutative[op_no] >= 0
1054 && operands_match_p (recog_operand[match.commutative
1055 [op_no]], dst)
1056 && (replacement_quality (recog_operand[match.commutative
1057 [op_no]])
1058 >= replacement_quality (src))))
1059 continue;
1060
1061 src_class = reg_preferred_class (REGNO (src));
1062 dst_class = reg_preferred_class (REGNO (dst));
1063 if (! regclass_compatible_p (src_class, dst_class))
1064 continue;
1065
1066 if (fixup_match_1 (insn, set, src, src_subreg, dst, pass,
1067 op_no, match_no,
1068 regmove_dump_file))
1069 break;
1070 }
1071 }
1072 }
1073
1074 /* A backward pass. Replace input operands with output operands. */
1075
1076 if (regmove_dump_file)
1077 fprintf (regmove_dump_file, "Starting backward pass...\n");
1078
1079 loop_depth = 1;
1080
1081 for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
1082 {
1083 if (GET_CODE (insn) == NOTE)
1084 {
1085 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
1086 loop_depth++;
1087 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
1088 loop_depth--;
1089 }
1090 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1091 {
1092 int op_no, match_no;
1093 int success = 0;
1094
1095 if (! find_matches (insn, &match))
1096 continue;
1097
1098 /* Now scan through the operands looking for a destination operand
1099 which is supposed to match a source operand.
1100 Then scan backward for an instruction which sets the source
1101 operand. If safe, then replace the source operand with the
1102 dest operand in both instructions. */
1103
1104 copy_src = NULL_RTX;
1105 copy_dst = NULL_RTX;
1106 for (op_no = 0; op_no < recog_n_operands; op_no++)
1107 {
1108 rtx set, p, src, dst;
1109 rtx src_note, dst_note;
1110 int num_calls = 0;
1111 enum reg_class src_class, dst_class;
1112 int length;
1113
1114 match_no = match.with[op_no];
1115
1116 /* Nothing to do if the two operands aren't supposed to match. */
1117 if (match_no < 0)
1118 continue;
1119
1120 dst = recog_operand[match_no];
1121 src = recog_operand[op_no];
1122
1123 if (GET_CODE (src) != REG)
1124 continue;
1125
1126 if (GET_CODE (dst) != REG
1127 || REGNO (dst) < FIRST_PSEUDO_REGISTER
1128 || REG_LIVE_LENGTH (REGNO (dst)) < 0)
1129 continue;
1130
1131 /* If the operands already match, then there is nothing to do. */
1132 if (operands_match_p (src, dst)
1133 || (match.commutative[op_no] >= 0
1134 && operands_match_p (recog_operand[match.commutative[op_no]], dst)))
1135 continue;
1136
1137 set = single_set (insn);
1138 if (! set)
1139 continue;
1140
1141 /* match_no/dst must be a write-only operand, and
1142 operand_operand/src must be a read-only operand. */
1143 if (match.use[op_no] != READ
1144 || match.use[match_no] != WRITE)
1145 continue;
1146
1147 if (match.early_clobber[match_no]
1148 && count_occurrences (PATTERN (insn), src) > 1)
1149 continue;
1150
1151 /* Make sure match_no is the destination. */
1152 if (recog_operand[match_no] != SET_DEST (set))
1153 continue;
1154
1155 if (REGNO (src) < FIRST_PSEUDO_REGISTER)
1156 {
1157 if (GET_CODE (SET_SRC (set)) == PLUS
1158 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT
1159 && XEXP (SET_SRC (set), 0) == src
1160 && fixup_match_2 (insn, dst, src,
1161 XEXP (SET_SRC (set), 1),
1162 regmove_dump_file))
1163 break;
1164 continue;
1165 }
1166 src_class = reg_preferred_class (REGNO (src));
1167 dst_class = reg_preferred_class (REGNO (dst));
1168 if (! regclass_compatible_p (src_class, dst_class))
1169 {
1170 if (!copy_src)
1171 {
1172 copy_src = src;
1173 copy_dst = dst;
1174 }
1175 continue;
1176 }
1177
1178 /* Can not modify an earlier insn to set dst if this insn
1179 uses an old value in the source. */
1180 if (reg_overlap_mentioned_p (dst, SET_SRC (set)))
1181 {
1182 if (!copy_src)
1183 {
1184 copy_src = src;
1185 copy_dst = dst;
1186 }
1187 continue;
1188 }
1189
1190 if (! (src_note = find_reg_note (insn, REG_DEAD, src)))
1191 {
1192 if (!copy_src)
1193 {
1194 copy_src = src;
1195 copy_dst = dst;
1196 }
1197 continue;
1198 }
1199
1200
1201 /* If src is set once in a different basic block,
1202 and is set equal to a constant, then do not use
1203 it for this optimization, as this would make it
1204 no longer equivalent to a constant. */
1205
1206 if (reg_is_remote_constant_p (src, insn, f))
1207 {
1208 if (!copy_src)
1209 {
1210 copy_src = src;
1211 copy_dst = dst;
1212 }
1213 continue;
1214 }
1215
1216
1217 if (regmove_dump_file)
1218 fprintf (regmove_dump_file,
1219 "Could fix operand %d of insn %d matching operand %d.\n",
1220 op_no, INSN_UID (insn), match_no);
1221
1222 /* Scan backward to find the first instruction that uses
1223 the input operand. If the operand is set here, then
1224 replace it in both instructions with match_no. */
1225
1226 for (length = 0, p = PREV_INSN (insn); p; p = PREV_INSN (p))
1227 {
1228 rtx pset;
1229
1230 if (GET_CODE (p) == CODE_LABEL
1231 || GET_CODE (p) == JUMP_INSN
1232 || (GET_CODE (p) == NOTE
1233 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1234 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1235 break;
1236
1237 /* ??? We can't scan past the end of a basic block without
1238 updating the register lifetime info
1239 (REG_DEAD/basic_block_live_at_start).
1240 A CALL_INSN might be the last insn of a basic block, if
1241 it is inside an EH region. There is no easy way to tell,
1242 so we just always break when we see a CALL_INSN if
1243 flag_exceptions is nonzero. */
1244 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1245 break;
1246
1247 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1248 continue;
1249
1250 length++;
1251
1252 /* ??? See if all of SRC is set in P. This test is much
1253 more conservative than it needs to be. */
1254 pset = single_set (p);
1255 if (pset && SET_DEST (pset) == src)
1256 {
1257 /* We use validate_replace_rtx, in case there
1258 are multiple identical source operands. All of
1259 them have to be changed at the same time. */
1260 if (validate_replace_rtx (src, dst, insn))
1261 {
1262 if (validate_change (p, &SET_DEST (pset),
1263 dst, 0))
1264 success = 1;
1265 else
1266 {
1267 /* Change all source operands back.
1268 This modifies the dst as a side-effect. */
1269 validate_replace_rtx (dst, src, insn);
1270 /* Now make sure the dst is right. */
1271 validate_change (insn,
1272 recog_operand_loc[match_no],
1273 dst, 0);
1274 }
1275 }
1276 break;
1277 }
1278
1279 if (reg_overlap_mentioned_p (src, PATTERN (p))
1280 || reg_overlap_mentioned_p (dst, PATTERN (p)))
1281 break;
1282
1283 /* If we have passed a call instruction, and the
1284 pseudo-reg DST is not already live across a call,
1285 then don't perform the optimization. */
1286 if (GET_CODE (p) == CALL_INSN)
1287 {
1288 num_calls++;
1289
1290 if (REG_N_CALLS_CROSSED (REGNO (dst)) == 0)
1291 break;
1292 }
1293 }
1294
1295 if (success)
1296 {
1297 int dstno, srcno;
1298
1299 /* Remove the death note for SRC from INSN. */
1300 remove_note (insn, src_note);
1301 /* Move the death note for SRC to P if it is used
1302 there. */
1303 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1304 {
1305 XEXP (src_note, 1) = REG_NOTES (p);
1306 REG_NOTES (p) = src_note;
1307 }
1308 /* If there is a REG_DEAD note for DST on P, then remove
1309 it, because DST is now set there. */
1310 if ((dst_note = find_reg_note (p, REG_DEAD, dst)))
1311 remove_note (p, dst_note);
1312
1313 dstno = REGNO (dst);
1314 srcno = REGNO (src);
1315
1316 REG_N_SETS (dstno)++;
1317 REG_N_SETS (srcno)--;
1318
1319 REG_N_CALLS_CROSSED (dstno) += num_calls;
1320 REG_N_CALLS_CROSSED (srcno) -= num_calls;
1321
1322 REG_LIVE_LENGTH (dstno) += length;
1323 if (REG_LIVE_LENGTH (srcno) >= 0)
1324 {
1325 REG_LIVE_LENGTH (srcno) -= length;
1326 /* REG_LIVE_LENGTH is only an approximation after
1327 combine if sched is not run, so make sure that we
1328 still have a reasonable value. */
1329 if (REG_LIVE_LENGTH (srcno) < 2)
1330 REG_LIVE_LENGTH (srcno) = 2;
1331 }
1332
1333 /* We assume that a register is used exactly once per
1334 insn in the updates above. If this is not correct,
1335 no great harm is done. */
1336
1337 REG_N_REFS (dstno) += 2 * loop_depth;
1338 REG_N_REFS (srcno) -= 2 * loop_depth;
1339
1340 /* If that was the only time src was set,
1341 and src was not live at the start of the
1342 function, we know that we have no more
1343 references to src; clear REG_N_REFS so it
1344 won't make reload do any work. */
1345 if (REG_N_SETS (REGNO (src)) == 0
1346 && ! regno_uninitialized (REGNO (src)))
1347 REG_N_REFS (REGNO (src)) = 0;
1348
1349 if (regmove_dump_file)
1350 fprintf (regmove_dump_file,
1351 "Fixed operand %d of insn %d matching operand %d.\n",
1352 op_no, INSN_UID (insn), match_no);
1353
1354 break;
1355 }
1356 }
1357
1358 /* If we weren't able to replace any of the alternatives, try an
1359 alternative appoach of copying the source to the destination. */
1360 if (!success && copy_src != NULL_RTX)
1361 copy_src_to_dest (insn, copy_src, copy_dst, loop_depth);
1362
1363 }
1364 }
1365 #endif /* REGISTER_CONSTRAINTS */
1366
1367 /* In fixup_match_1, some insns may have been inserted after basic block
1368 ends. Fix that here. */
1369 for (i = 0; i < n_basic_blocks; i++)
1370 {
1371 rtx end = BLOCK_END (i);
1372 rtx new = end;
1373 rtx next = NEXT_INSN (new);
1374 while (next != 0 && INSN_UID (next) >= old_max_uid
1375 && (i == n_basic_blocks - 1 || BLOCK_HEAD (i + 1) != next))
1376 new = next, next = NEXT_INSN (new);
1377 BLOCK_END (i) = new;
1378 }
1379 }
1380
1381 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1382 Returns 0 if INSN can't be recognized, or if the alternative can't be
1383 determined.
1384
1385 Initialize the info in MATCHP based on the constraints. */
1386
1387 static int
1388 find_matches (insn, matchp)
1389 rtx insn;
1390 struct match *matchp;
1391 {
1392 int likely_spilled[MAX_RECOG_OPERANDS];
1393 int op_no;
1394 int any_matches = 0;
1395
1396 extract_insn (insn);
1397 if (! constrain_operands (0))
1398 return 0;
1399
1400 /* Must initialize this before main loop, because the code for
1401 the commutative case may set matches for operands other than
1402 the current one. */
1403 for (op_no = recog_n_operands; --op_no >= 0; )
1404 matchp->with[op_no] = matchp->commutative[op_no] = -1;
1405
1406 for (op_no = 0; op_no < recog_n_operands; op_no++)
1407 {
1408 char *p, c;
1409 int i = 0;
1410
1411 p = recog_constraints[op_no];
1412
1413 likely_spilled[op_no] = 0;
1414 matchp->use[op_no] = READ;
1415 matchp->early_clobber[op_no] = 0;
1416 if (*p == '=')
1417 matchp->use[op_no] = WRITE;
1418 else if (*p == '+')
1419 matchp->use[op_no] = READWRITE;
1420
1421 for (;*p && i < which_alternative; p++)
1422 if (*p == ',')
1423 i++;
1424
1425 while ((c = *p++) != '\0' && c != ',')
1426 switch (c)
1427 {
1428 case '=':
1429 break;
1430 case '+':
1431 break;
1432 case '&':
1433 matchp->early_clobber[op_no] = 1;
1434 break;
1435 case '%':
1436 matchp->commutative[op_no] = op_no + 1;
1437 matchp->commutative[op_no + 1] = op_no;
1438 break;
1439 case '0': case '1': case '2': case '3': case '4':
1440 case '5': case '6': case '7': case '8': case '9':
1441 c -= '0';
1442 if (c < op_no && likely_spilled[(unsigned char) c])
1443 break;
1444 matchp->with[op_no] = c;
1445 any_matches = 1;
1446 if (matchp->commutative[op_no] >= 0)
1447 matchp->with[matchp->commutative[op_no]] = c;
1448 break;
1449 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1450 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1451 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1452 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1453 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c)))
1454 likely_spilled[op_no] = 1;
1455 break;
1456 }
1457 }
1458 return any_matches;
1459 }
1460
1461 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1462 the only set in INSN. INSN has just been recgnized and constrained.
1463 SRC is operand number OPERAND_NUMBER in INSN.
1464 DST is operand number MATCH_NUMBER in INSN.
1465 If BACKWARD is nonzero, we have been called in a backward pass.
1466 Return nonzero for success. */
1467 static int
1468 fixup_match_1 (insn, set, src, src_subreg, dst, backward, operand_number,
1469 match_number, regmove_dump_file)
1470 rtx insn, set, src, src_subreg, dst;
1471 int backward, operand_number, match_number;
1472 FILE *regmove_dump_file;
1473 {
1474 rtx p;
1475 rtx post_inc = 0, post_inc_set = 0, search_end = 0;
1476 int success = 0;
1477 int num_calls = 0, s_num_calls = 0;
1478 enum rtx_code code = NOTE;
1479 HOST_WIDE_INT insn_const, newconst;
1480 rtx overlap = 0; /* need to move insn ? */
1481 rtx src_note = find_reg_note (insn, REG_DEAD, src), dst_note;
1482 int length, s_length, true_loop_depth;
1483
1484 if (! src_note)
1485 {
1486 /* Look for (set (regX) (op regA constX))
1487 (set (regY) (op regA constY))
1488 and change that to
1489 (set (regA) (op regA constX)).
1490 (set (regY) (op regA constY-constX)).
1491 This works for add and shift operations, if
1492 regA is dead after or set by the second insn. */
1493
1494 code = GET_CODE (SET_SRC (set));
1495 if ((code == PLUS || code == LSHIFTRT
1496 || code == ASHIFT || code == ASHIFTRT)
1497 && XEXP (SET_SRC (set), 0) == src
1498 && GET_CODE (XEXP (SET_SRC (set), 1)) == CONST_INT)
1499 insn_const = INTVAL (XEXP (SET_SRC (set), 1));
1500 else if (! stable_but_for_p (SET_SRC (set), src, dst))
1501 return 0;
1502 else
1503 /* We might find a src_note while scanning. */
1504 code = NOTE;
1505 }
1506
1507 if (regmove_dump_file)
1508 fprintf (regmove_dump_file,
1509 "Could fix operand %d of insn %d matching operand %d.\n",
1510 operand_number, INSN_UID (insn), match_number);
1511
1512 /* If SRC is equivalent to a constant set in a different basic block,
1513 then do not use it for this optimization. We want the equivalence
1514 so that if we have to reload this register, we can reload the
1515 constant, rather than extending the lifespan of the register. */
1516 if (reg_is_remote_constant_p (src, insn, get_insns ()))
1517 return 0;
1518
1519 /* Scan forward to find the next instruction that
1520 uses the output operand. If the operand dies here,
1521 then replace it in both instructions with
1522 operand_number. */
1523
1524 for (length = s_length = 0, p = NEXT_INSN (insn); p; p = NEXT_INSN (p))
1525 {
1526 if (GET_CODE (p) == CODE_LABEL || GET_CODE (p) == JUMP_INSN
1527 || (GET_CODE (p) == NOTE
1528 && (NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_BEG
1529 || NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)))
1530 break;
1531
1532 /* ??? We can't scan past the end of a basic block without updating
1533 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1534 A CALL_INSN might be the last insn of a basic block, if it is
1535 inside an EH region. There is no easy way to tell, so we just
1536 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1537 if (flag_exceptions && GET_CODE (p) == CALL_INSN)
1538 break;
1539
1540 if (GET_RTX_CLASS (GET_CODE (p)) != 'i')
1541 continue;
1542
1543 length++;
1544 if (src_note)
1545 s_length++;
1546
1547 if (reg_set_p (src, p) || reg_set_p (dst, p)
1548 || (GET_CODE (PATTERN (p)) == USE
1549 && reg_overlap_mentioned_p (src, XEXP (PATTERN (p), 0))))
1550 break;
1551
1552 /* See if all of DST dies in P. This test is
1553 slightly more conservative than it needs to be. */
1554 if ((dst_note = find_regno_note (p, REG_DEAD, REGNO (dst)))
1555 && (GET_MODE (XEXP (dst_note, 0)) == GET_MODE (dst)))
1556 {
1557 if (! src_note)
1558 {
1559 rtx q;
1560 rtx set2;
1561
1562 /* If an optimization is done, the value of SRC while P
1563 is executed will be changed. Check that this is OK. */
1564 if (reg_overlap_mentioned_p (src, PATTERN (p)))
1565 break;
1566 for (q = p; q; q = NEXT_INSN (q))
1567 {
1568 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1569 || (GET_CODE (q) == NOTE
1570 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1571 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1572 {
1573 q = 0;
1574 break;
1575 }
1576
1577 /* ??? We can't scan past the end of a basic block without
1578 updating the register lifetime info
1579 (REG_DEAD/basic_block_live_at_start).
1580 A CALL_INSN might be the last insn of a basic block, if
1581 it is inside an EH region. There is no easy way to tell,
1582 so we just always break when we see a CALL_INSN if
1583 flag_exceptions is nonzero. */
1584 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1585 {
1586 q = 0;
1587 break;
1588 }
1589
1590 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1591 continue;
1592 if (reg_overlap_mentioned_p (src, PATTERN (q))
1593 || reg_set_p (src, q))
1594 break;
1595 }
1596 if (q)
1597 set2 = single_set (q);
1598 if (! q || ! set2 || GET_CODE (SET_SRC (set2)) != code
1599 || XEXP (SET_SRC (set2), 0) != src
1600 || GET_CODE (XEXP (SET_SRC (set2), 1)) != CONST_INT
1601 || (SET_DEST (set2) != src
1602 && ! find_reg_note (q, REG_DEAD, src)))
1603 {
1604 /* If this is a PLUS, we can still save a register by doing
1605 src += insn_const;
1606 P;
1607 src -= insn_const; .
1608 This also gives opportunities for subsequent
1609 optimizations in the backward pass, so do it there. */
1610 if (code == PLUS && backward
1611 /* Don't do this if we can likely tie DST to SET_DEST
1612 of P later; we can't do this tying here if we got a
1613 hard register. */
1614 && ! (dst_note && ! REG_N_CALLS_CROSSED (REGNO (dst))
1615 && single_set (p)
1616 && GET_CODE (SET_DEST (single_set (p))) == REG
1617 && (REGNO (SET_DEST (single_set (p)))
1618 < FIRST_PSEUDO_REGISTER))
1619 #ifdef HAVE_cc0
1620 /* We may not emit an insn directly
1621 after P if the latter sets CC0. */
1622 && ! sets_cc0_p (PATTERN (p))
1623 #endif
1624 )
1625
1626 {
1627 search_end = q;
1628 q = insn;
1629 set2 = set;
1630 newconst = -insn_const;
1631 code = MINUS;
1632 }
1633 else
1634 break;
1635 }
1636 else
1637 {
1638 newconst = INTVAL (XEXP (SET_SRC (set2), 1)) - insn_const;
1639 /* Reject out of range shifts. */
1640 if (code != PLUS
1641 && (newconst < 0
1642 || (newconst
1643 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2))))))
1644 break;
1645 if (code == PLUS)
1646 {
1647 post_inc = q;
1648 if (SET_DEST (set2) != src)
1649 post_inc_set = set2;
1650 }
1651 }
1652 /* We use 1 as last argument to validate_change so that all
1653 changes are accepted or rejected together by apply_change_group
1654 when it is called by validate_replace_rtx . */
1655 validate_change (q, &XEXP (SET_SRC (set2), 1),
1656 GEN_INT (newconst), 1);
1657 }
1658 validate_change (insn, recog_operand_loc[match_number], src, 1);
1659 if (validate_replace_rtx (dst, src_subreg, p))
1660 success = 1;
1661 break;
1662 }
1663
1664 if (reg_overlap_mentioned_p (dst, PATTERN (p)))
1665 break;
1666 if (! src_note && reg_overlap_mentioned_p (src, PATTERN (p)))
1667 {
1668 /* INSN was already checked to be movable when
1669 we found no REG_DEAD note for src on it. */
1670 overlap = p;
1671 src_note = find_reg_note (p, REG_DEAD, src);
1672 }
1673
1674 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1675 already live across a call, then don't perform the optimization. */
1676 if (GET_CODE (p) == CALL_INSN)
1677 {
1678 if (REG_N_CALLS_CROSSED (REGNO (src)) == 0)
1679 break;
1680
1681 num_calls++;
1682
1683 if (src_note)
1684 s_num_calls++;
1685
1686 }
1687 }
1688
1689 if (! success)
1690 return 0;
1691
1692 true_loop_depth = backward ? 2 - loop_depth : loop_depth;
1693
1694 /* Remove the death note for DST from P. */
1695 remove_note (p, dst_note);
1696 if (code == MINUS)
1697 {
1698 post_inc = emit_insn_after (copy_rtx (PATTERN (insn)), p);
1699 if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1700 && search_end
1701 && try_auto_increment (search_end, post_inc, 0, src, newconst, 1))
1702 post_inc = 0;
1703 validate_change (insn, &XEXP (SET_SRC (set), 1), GEN_INT (insn_const), 0);
1704 REG_N_SETS (REGNO (src))++;
1705 REG_N_REFS (REGNO (src)) += true_loop_depth;
1706 REG_LIVE_LENGTH (REGNO (src))++;
1707 }
1708 if (overlap)
1709 {
1710 /* The lifetime of src and dest overlap,
1711 but we can change this by moving insn. */
1712 rtx pat = PATTERN (insn);
1713 if (src_note)
1714 remove_note (overlap, src_note);
1715 #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1716 if (code == PLUS
1717 && try_auto_increment (overlap, insn, 0, src, insn_const, 0))
1718 insn = overlap;
1719 else
1720 #endif
1721 {
1722 rtx notes = REG_NOTES (insn);
1723
1724 emit_insn_after_with_line_notes (pat, PREV_INSN (p), insn);
1725 PUT_CODE (insn, NOTE);
1726 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1727 NOTE_SOURCE_FILE (insn) = 0;
1728 /* emit_insn_after_with_line_notes has no
1729 return value, so search for the new insn. */
1730 for (insn = p; PATTERN (insn) != pat; )
1731 insn = PREV_INSN (insn);
1732
1733 REG_NOTES (insn) = notes;
1734 }
1735 }
1736 /* Sometimes we'd generate src = const; src += n;
1737 if so, replace the instruction that set src
1738 in the first place. */
1739
1740 if (! overlap && (code == PLUS || code == MINUS))
1741 {
1742 rtx note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1743 rtx q, set2;
1744 int num_calls2 = 0, s_length2 = 0;
1745
1746 if (note && CONSTANT_P (XEXP (note, 0)))
1747 {
1748 for (q = PREV_INSN (insn); q; q = PREV_INSN(q))
1749 {
1750 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1751 || (GET_CODE (q) == NOTE
1752 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1753 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1754 {
1755 q = 0;
1756 break;
1757 }
1758
1759 /* ??? We can't scan past the end of a basic block without
1760 updating the register lifetime info
1761 (REG_DEAD/basic_block_live_at_start).
1762 A CALL_INSN might be the last insn of a basic block, if
1763 it is inside an EH region. There is no easy way to tell,
1764 so we just always break when we see a CALL_INSN if
1765 flag_exceptions is nonzero. */
1766 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1767 {
1768 q = 0;
1769 break;
1770 }
1771
1772 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1773 continue;
1774 s_length2++;
1775 if (reg_set_p (src, q))
1776 {
1777 set2 = single_set (q);
1778 break;
1779 }
1780 if (reg_overlap_mentioned_p (src, PATTERN (q)))
1781 {
1782 q = 0;
1783 break;
1784 }
1785 if (GET_CODE (p) == CALL_INSN)
1786 num_calls2++;
1787 }
1788 if (q && set2 && SET_DEST (set2) == src && CONSTANT_P (SET_SRC (set2))
1789 && validate_change (insn, &SET_SRC (set), XEXP (note, 0), 0))
1790 {
1791 PUT_CODE (q, NOTE);
1792 NOTE_LINE_NUMBER (q) = NOTE_INSN_DELETED;
1793 NOTE_SOURCE_FILE (q) = 0;
1794 REG_N_SETS (REGNO (src))--;
1795 REG_N_CALLS_CROSSED (REGNO (src)) -= num_calls2;
1796 REG_N_REFS (REGNO (src)) -= true_loop_depth;
1797 REG_LIVE_LENGTH (REGNO (src)) -= s_length2;
1798 insn_const = 0;
1799 }
1800 }
1801 }
1802
1803 /* Don't remove this seemingly useless if, it is needed to pair with the
1804 else in the next two conditionally included code blocks. */
1805 if (0)
1806 {;}
1807 else if ((HAVE_PRE_INCREMENT || HAVE_PRE_DECREMENT)
1808 && (code == PLUS || code == MINUS) && insn_const
1809 && try_auto_increment (p, insn, 0, src, insn_const, 1))
1810 insn = p;
1811 else if ((HAVE_POST_INCREMENT || HAVE_POST_DECREMENT)
1812 && post_inc
1813 && try_auto_increment (p, post_inc, post_inc_set, src, newconst, 0))
1814 post_inc = 0;
1815 /* If post_inc still prevails, try to find an
1816 insn where it can be used as a pre-in/decrement.
1817 If code is MINUS, this was already tried. */
1818 if (post_inc && code == PLUS
1819 /* Check that newconst is likely to be usable
1820 in a pre-in/decrement before starting the search. */
1821 && ((HAVE_PRE_INCREMENT && newconst > 0 && newconst <= MOVE_MAX)
1822 || (HAVE_PRE_DECREMENT && newconst < 0 && newconst >= -MOVE_MAX))
1823 && exact_log2 (newconst))
1824 {
1825 rtx q, inc_dest;
1826
1827 inc_dest = post_inc_set ? SET_DEST (post_inc_set) : src;
1828 for (q = post_inc; (q = NEXT_INSN (q)); )
1829 {
1830 if (GET_CODE (q) == CODE_LABEL || GET_CODE (q) == JUMP_INSN
1831 || (GET_CODE (q) == NOTE
1832 && (NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_BEG
1833 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END)))
1834 break;
1835
1836 /* ??? We can't scan past the end of a basic block without updating
1837 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1838 A CALL_INSN might be the last insn of a basic block, if it
1839 is inside an EH region. There is no easy way to tell so we
1840 just always break when we see a CALL_INSN if flag_exceptions
1841 is nonzero. */
1842 if (flag_exceptions && GET_CODE (q) == CALL_INSN)
1843 break;
1844
1845 if (GET_RTX_CLASS (GET_CODE (q)) != 'i')
1846 continue;
1847 if (src != inc_dest && (reg_overlap_mentioned_p (src, PATTERN (q))
1848 || reg_set_p (src, q)))
1849 break;
1850 if (reg_set_p (inc_dest, q))
1851 break;
1852 if (reg_overlap_mentioned_p (inc_dest, PATTERN (q)))
1853 {
1854 try_auto_increment (q, post_inc,
1855 post_inc_set, inc_dest, newconst, 1);
1856 break;
1857 }
1858 }
1859 }
1860 /* Move the death note for DST to INSN if it is used
1861 there. */
1862 if (reg_overlap_mentioned_p (dst, PATTERN (insn)))
1863 {
1864 XEXP (dst_note, 1) = REG_NOTES (insn);
1865 REG_NOTES (insn) = dst_note;
1866 }
1867
1868 if (src_note)
1869 {
1870 /* Move the death note for SRC from INSN to P. */
1871 if (! overlap)
1872 remove_note (insn, src_note);
1873 XEXP (src_note, 1) = REG_NOTES (p);
1874 REG_NOTES (p) = src_note;
1875
1876 REG_N_CALLS_CROSSED (REGNO (src)) += s_num_calls;
1877 }
1878
1879 REG_N_SETS (REGNO (src))++;
1880 REG_N_SETS (REGNO (dst))--;
1881
1882 REG_N_CALLS_CROSSED (REGNO (dst)) -= num_calls;
1883
1884 REG_LIVE_LENGTH (REGNO (src)) += s_length;
1885 if (REG_LIVE_LENGTH (REGNO (dst)) >= 0)
1886 {
1887 REG_LIVE_LENGTH (REGNO (dst)) -= length;
1888 /* REG_LIVE_LENGTH is only an approximation after
1889 combine if sched is not run, so make sure that we
1890 still have a reasonable value. */
1891 if (REG_LIVE_LENGTH (REGNO (dst)) < 2)
1892 REG_LIVE_LENGTH (REGNO (dst)) = 2;
1893 }
1894
1895 /* We assume that a register is used exactly once per
1896 insn in the updates above. If this is not correct,
1897 no great harm is done. */
1898
1899 REG_N_REFS (REGNO (src)) += 2 * true_loop_depth;
1900 REG_N_REFS (REGNO (dst)) -= 2 * true_loop_depth;
1901
1902 /* If that was the only time dst was set,
1903 and dst was not live at the start of the
1904 function, we know that we have no more
1905 references to dst; clear REG_N_REFS so it
1906 won't make reload do any work. */
1907 if (REG_N_SETS (REGNO (dst)) == 0
1908 && ! regno_uninitialized (REGNO (dst)))
1909 REG_N_REFS (REGNO (dst)) = 0;
1910
1911 if (regmove_dump_file)
1912 fprintf (regmove_dump_file,
1913 "Fixed operand %d of insn %d matching operand %d.\n",
1914 operand_number, INSN_UID (insn), match_number);
1915 return 1;
1916 }
1917
1918
1919 /* return nonzero if X is stable but for mentioning SRC or mentioning /
1920 changing DST . If in doubt, presume it is unstable. */
1921 static int
1922 stable_but_for_p (x, src, dst)
1923 rtx x, src, dst;
1924 {
1925 RTX_CODE code = GET_CODE (x);
1926 switch (GET_RTX_CLASS (code))
1927 {
1928 case '<': case '1': case 'c': case '2': case 'b': case '3':
1929 {
1930 int i;
1931 char *fmt = GET_RTX_FORMAT (code);
1932 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1933 if (fmt[i] == 'e' && ! stable_but_for_p (XEXP (x, i), src, dst))
1934 return 0;
1935 return 1;
1936 }
1937 case 'o':
1938 if (x == src || x == dst)
1939 return 1;
1940 /* fall through */
1941 default:
1942 return ! rtx_unstable_p (x);
1943 }
1944 }
1945
1946 /* Test if regmove seems profitable for this target. Regmove is useful only
1947 if some common patterns are two address, i.e. require matching constraints,
1948 so we check that condition here. */
1949
1950 int
1951 regmove_profitable_p ()
1952 {
1953 #ifdef REGISTER_CONSTRAINTS
1954 struct match match;
1955 enum machine_mode mode;
1956 optab tstoptab = add_optab;
1957 do /* check add_optab and ashl_optab */
1958 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
1959 mode = GET_MODE_WIDER_MODE (mode))
1960 {
1961 int icode = (int) tstoptab->handlers[(int) mode].insn_code;
1962 rtx reg0, reg1, reg2, pat;
1963 int i;
1964
1965 if (GET_MODE_BITSIZE (mode) < 32 || icode == CODE_FOR_nothing)
1966 continue;
1967 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1968 if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i))
1969 break;
1970 if (i + 2 >= FIRST_PSEUDO_REGISTER)
1971 break;
1972 reg0 = gen_rtx_REG (insn_operand_mode[icode][0], i);
1973 reg1 = gen_rtx_REG (insn_operand_mode[icode][1], i + 1);
1974 reg2 = gen_rtx_REG (insn_operand_mode[icode][2], i + 2);
1975 if (! (*insn_operand_predicate[icode][0]) (reg0, VOIDmode)
1976 || ! (*insn_operand_predicate[icode][1]) (reg1, VOIDmode)
1977 || ! (*insn_operand_predicate[icode][2]) (reg2, VOIDmode))
1978 break;
1979 pat = GEN_FCN (icode) (reg0, reg1, reg2);
1980 if (! pat)
1981 continue;
1982 if (GET_CODE (pat) == SEQUENCE)
1983 pat = XVECEXP (pat, 0, XVECLEN (pat, 0) - 1);
1984 else
1985 pat = make_insn_raw (pat);
1986 if (! single_set (pat)
1987 || GET_CODE (SET_SRC (single_set (pat))) != tstoptab->code)
1988 /* Unexpected complexity; don't need to handle this unless
1989 we find a machine where this occurs and regmove should
1990 be enabled. */
1991 break;
1992 if (find_matches (pat, &match))
1993 return 1;
1994 break;
1995 }
1996 while (tstoptab != ashl_optab && (tstoptab = ashl_optab, 1));
1997 #endif /* REGISTER_CONSTRAINTS */
1998 return 0;
1999 }