1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This module looks for cases where matching constraints would force
24 an instruction to need a reload, and this reload would be a register
25 to register move. It then attempts to change the registers used by the
26 instruction to avoid the move instruction. */
30 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
32 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "basic-block.h"
46 /* Turn STACK_GROWS_DOWNWARD into a boolean. */
47 #ifdef STACK_GROWS_DOWNWARD
48 #undef STACK_GROWS_DOWNWARD
49 #define STACK_GROWS_DOWNWARD 1
51 #define STACK_GROWS_DOWNWARD 0
54 static int perhaps_ends_bb_p
PARAMS ((rtx
));
55 static int optimize_reg_copy_1
PARAMS ((rtx
, rtx
, rtx
));
56 static void optimize_reg_copy_2
PARAMS ((rtx
, rtx
, rtx
));
57 static void optimize_reg_copy_3
PARAMS ((rtx
, rtx
, rtx
));
58 static void copy_src_to_dest
PARAMS ((rtx
, rtx
, rtx
, int));
59 static int *regmove_bb_head
;
62 int with
[MAX_RECOG_OPERANDS
];
63 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
64 int commutative
[MAX_RECOG_OPERANDS
];
65 int early_clobber
[MAX_RECOG_OPERANDS
];
68 static rtx discover_flags_reg
PARAMS ((void));
69 static void mark_flags_life_zones
PARAMS ((rtx
));
70 static void flags_set_1
PARAMS ((rtx
, rtx
, void *));
72 static int try_auto_increment
PARAMS ((rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int));
73 static int find_matches
PARAMS ((rtx
, struct match
*));
74 static void replace_in_call_usage
PARAMS ((rtx
*, unsigned int, rtx
, rtx
));
75 static int fixup_match_1
PARAMS ((rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int, FILE *))
77 static int reg_is_remote_constant_p
PARAMS ((rtx
, rtx
, rtx
));
78 static int stable_and_no_regs_but_for_p
PARAMS ((rtx
, rtx
, rtx
));
79 static int regclass_compatible_p
PARAMS ((int, int));
80 static int replacement_quality
PARAMS ((rtx
));
81 static int fixup_match_2
PARAMS ((rtx
, rtx
, rtx
, rtx
, FILE *));
83 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
84 causing too much register allocation problems. */
86 regclass_compatible_p (class0
, class1
)
89 return (class0
== class1
90 || (reg_class_subset_p (class0
, class1
)
91 && ! CLASS_LIKELY_SPILLED_P (class0
))
92 || (reg_class_subset_p (class1
, class0
)
93 && ! CLASS_LIKELY_SPILLED_P (class1
)));
96 /* INC_INSN is an instruction that adds INCREMENT to REG.
97 Try to fold INC_INSN as a post/pre in/decrement into INSN.
98 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
99 Return nonzero for success. */
101 try_auto_increment (insn
, inc_insn
, inc_insn_set
, reg
, increment
, pre
)
102 rtx reg
, insn
, inc_insn
,inc_insn_set
;
103 HOST_WIDE_INT increment
;
106 enum rtx_code inc_code
;
108 rtx pset
= single_set (insn
);
111 /* Can't use the size of SET_SRC, we might have something like
112 (sign_extend:SI (mem:QI ... */
113 rtx use
= find_use_as_address (pset
, reg
, 0);
114 if (use
!= 0 && use
!= (rtx
) 1)
116 int size
= GET_MODE_SIZE (GET_MODE (use
));
118 || (HAVE_POST_INCREMENT
119 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
120 || (HAVE_PRE_INCREMENT
121 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
122 || (HAVE_POST_DECREMENT
123 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
124 || (HAVE_PRE_DECREMENT
125 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
131 &SET_SRC (inc_insn_set
),
132 XEXP (SET_SRC (inc_insn_set
), 0), 1);
133 validate_change (insn
, &XEXP (use
, 0),
134 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
135 if (apply_change_group ())
137 /* If there is a REG_DEAD note on this insn, we must
138 change this not to REG_UNUSED meaning that the register
139 is set, but the value is dead. Failure to do so will
140 result in a sched1 abort -- when it recomputes lifetime
141 information, the number of REG_DEAD notes will have
143 rtx note
= find_reg_note (insn
, REG_DEAD
, reg
);
145 PUT_MODE (note
, REG_UNUSED
);
148 = gen_rtx_EXPR_LIST (REG_INC
,
149 reg
, REG_NOTES (insn
));
152 PUT_CODE (inc_insn
, NOTE
);
153 NOTE_LINE_NUMBER (inc_insn
) = NOTE_INSN_DELETED
;
154 NOTE_SOURCE_FILE (inc_insn
) = 0;
164 /* Determine if the pattern generated by add_optab has a clobber,
165 such as might be issued for a flags hard register. To make the
166 code elsewhere simpler, we handle cc0 in this same framework.
168 Return the register if one was discovered. Return NULL_RTX if
169 if no flags were found. Return pc_rtx if we got confused. */
172 discover_flags_reg ()
175 tmp
= gen_rtx_REG (word_mode
, 10000);
176 tmp
= gen_add3_insn (tmp
, tmp
, GEN_INT (2));
178 /* If we get something that isn't a simple set, or a
179 [(set ..) (clobber ..)], this whole function will go wrong. */
180 if (GET_CODE (tmp
) == SET
)
182 else if (GET_CODE (tmp
) == PARALLEL
)
186 if (XVECLEN (tmp
, 0) != 2)
188 tmp
= XVECEXP (tmp
, 0, 1);
189 if (GET_CODE (tmp
) != CLOBBER
)
193 /* Don't do anything foolish if the md wanted to clobber a
194 scratch or something. We only care about hard regs.
195 Moreover we don't like the notion of subregs of hard regs. */
196 if (GET_CODE (tmp
) == SUBREG
197 && GET_CODE (SUBREG_REG (tmp
)) == REG
198 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
200 found
= (GET_CODE (tmp
) == REG
&& REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
202 return (found
? tmp
: NULL_RTX
);
208 /* It is a tedious task identifying when the flags register is live and
209 when it is safe to optimize. Since we process the instruction stream
210 multiple times, locate and record these live zones by marking the
211 mode of the instructions --
213 QImode is used on the instruction at which the flags becomes live.
215 HImode is used within the range (exclusive) that the flags are
216 live. Thus the user of the flags is not marked.
218 All other instructions are cleared to VOIDmode. */
220 /* Used to communicate with flags_set_1. */
221 static rtx flags_set_1_rtx
;
222 static int flags_set_1_set
;
225 mark_flags_life_zones (flags
)
233 /* If we found a flags register on a cc0 host, bail. */
234 if (flags
== NULL_RTX
)
236 else if (flags
!= cc0_rtx
)
240 /* Simple cases first: if no flags, clear all modes. If confusing,
241 mark the entire function as being in a flags shadow. */
242 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
244 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
246 for (insn
= get_insns(); insn
; insn
= NEXT_INSN (insn
))
247 PUT_MODE (insn
, mode
);
255 flags_regno
= REGNO (flags
);
256 flags_nregs
= HARD_REGNO_NREGS (flags_regno
, GET_MODE (flags
));
258 flags_set_1_rtx
= flags
;
260 /* Process each basic block. */
261 for (block
= n_basic_blocks
- 1; block
>= 0; block
--)
266 insn
= BLOCK_HEAD (block
);
267 end
= BLOCK_END (block
);
269 /* Look out for the (unlikely) case of flags being live across
270 basic block boundaries. */
275 for (i
= 0; i
< flags_nregs
; ++i
)
276 live
|= REGNO_REG_SET_P (BASIC_BLOCK (block
)->global_live_at_start
,
283 /* Process liveness in reverse order of importance --
284 alive, death, birth. This lets more important info
285 overwrite the mode of lesser info. */
290 /* In the cc0 case, death is not marked in reg notes,
291 but is instead the mere use of cc0 when it is alive. */
292 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
295 /* In the hard reg case, we watch death notes. */
296 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
299 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
301 /* In either case, birth is denoted simply by it's presence
302 as the destination of a set. */
304 note_stores (PATTERN (insn
), flags_set_1
, NULL
);
308 PUT_MODE (insn
, QImode
);
312 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
316 insn
= NEXT_INSN (insn
);
321 /* A subroutine of mark_flags_life_zones, called through note_stores. */
324 flags_set_1 (x
, pat
, data
)
326 void *data ATTRIBUTE_UNUSED
;
328 if (GET_CODE (pat
) == SET
329 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
333 static int *regno_src_regno
;
335 /* Indicate how good a choice REG (which appears as a source) is to replace
336 a destination register with. The higher the returned value, the better
337 the choice. The main objective is to avoid using a register that is
338 a candidate for tying to a hard register, since the output might in
339 turn be a candidate to be tied to a different hard register. */
341 replacement_quality(reg
)
346 /* Bad if this isn't a register at all. */
347 if (GET_CODE (reg
) != REG
)
350 /* If this register is not meant to get a hard register,
351 it is a poor choice. */
352 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
355 src_regno
= regno_src_regno
[REGNO (reg
)];
357 /* If it was not copied from another register, it is fine. */
361 /* Copied from a hard register? */
362 if (src_regno
< FIRST_PSEUDO_REGISTER
)
365 /* Copied from a pseudo register - not as bad as from a hard register,
366 yet still cumbersome, since the register live length will be lengthened
367 when the registers get tied. */
371 /* Return 1 if INSN might end a basic block. */
373 static int perhaps_ends_bb_p (insn
)
376 switch (GET_CODE (insn
))
380 /* These always end a basic block. */
384 /* A CALL_INSN might be the last insn of a basic block, if it is inside
385 an EH region or if there are nonlocal gotos. Note that this test is
386 very conservative. */
387 if (nonlocal_goto_handler_labels
)
391 return can_throw_internal (insn
);
395 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
398 Search forward to see if SRC dies before either it or DEST is modified,
399 but don't scan past the end of a basic block. If so, we can replace SRC
400 with DEST and let SRC die in INSN.
402 This will reduce the number of registers live in that range and may enable
403 DEST to be tied to SRC, thus often saving one register in addition to a
404 register-register copy. */
407 optimize_reg_copy_1 (insn
, dest
, src
)
415 int sregno
= REGNO (src
);
416 int dregno
= REGNO (dest
);
418 /* We don't want to mess with hard regs if register classes are small. */
420 || (SMALL_REGISTER_CLASSES
421 && (sregno
< FIRST_PSEUDO_REGISTER
422 || dregno
< FIRST_PSEUDO_REGISTER
))
423 /* We don't see all updates to SP if they are in an auto-inc memory
424 reference, so we must disallow this optimization on them. */
425 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
428 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
430 /* ??? We can't scan past the end of a basic block without updating
431 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
432 if (perhaps_ends_bb_p (p
))
434 else if (! INSN_P (p
))
437 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
438 /* Don't change a USE of a register. */
439 || (GET_CODE (PATTERN (p
)) == USE
440 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
443 /* See if all of SRC dies in P. This test is slightly more
444 conservative than it needs to be. */
445 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
446 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
454 /* We can do the optimization. Scan forward from INSN again,
455 replacing regs as we go. Set FAILED if a replacement can't
456 be done. In that case, we can't move the death note for SRC.
457 This should be rare. */
459 /* Set to stop at next insn. */
460 for (q
= next_real_insn (insn
);
461 q
!= next_real_insn (p
);
462 q
= next_real_insn (q
))
464 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
466 /* If SRC is a hard register, we might miss some
467 overlapping registers with validate_replace_rtx,
468 so we would have to undo it. We can't if DEST is
469 present in the insn, so fail in that combination
471 if (sregno
< FIRST_PSEUDO_REGISTER
472 && reg_mentioned_p (dest
, PATTERN (q
)))
475 /* Replace all uses and make sure that the register
476 isn't still present. */
477 else if (validate_replace_rtx (src
, dest
, q
)
478 && (sregno
>= FIRST_PSEUDO_REGISTER
479 || ! reg_overlap_mentioned_p (src
,
484 validate_replace_rtx (dest
, src
, q
);
489 /* For SREGNO, count the total number of insns scanned.
490 For DREGNO, count the total number of insns scanned after
491 passing the death note for DREGNO. */
496 /* If the insn in which SRC dies is a CALL_INSN, don't count it
497 as a call that has been crossed. Otherwise, count it. */
498 if (q
!= p
&& GET_CODE (q
) == CALL_INSN
)
500 /* Similarly, total calls for SREGNO, total calls beyond
501 the death note for DREGNO. */
507 /* If DEST dies here, remove the death note and save it for
508 later. Make sure ALL of DEST dies here; again, this is
509 overly conservative. */
511 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
513 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
514 failed
= 1, dest_death
= 0;
516 remove_note (q
, dest_death
);
522 /* These counters need to be updated if and only if we are
523 going to move the REG_DEAD note. */
524 if (sregno
>= FIRST_PSEUDO_REGISTER
)
526 if (REG_LIVE_LENGTH (sregno
) >= 0)
528 REG_LIVE_LENGTH (sregno
) -= s_length
;
529 /* REG_LIVE_LENGTH is only an approximation after
530 combine if sched is not run, so make sure that we
531 still have a reasonable value. */
532 if (REG_LIVE_LENGTH (sregno
) < 2)
533 REG_LIVE_LENGTH (sregno
) = 2;
536 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
539 /* Move death note of SRC from P to INSN. */
540 remove_note (p
, note
);
541 XEXP (note
, 1) = REG_NOTES (insn
);
542 REG_NOTES (insn
) = note
;
545 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
547 && (dest_death
= find_regno_note (insn
, REG_UNUSED
, dregno
)))
549 PUT_REG_NOTE_KIND (dest_death
, REG_DEAD
);
550 remove_note (insn
, dest_death
);
553 /* Put death note of DEST on P if we saw it die. */
556 XEXP (dest_death
, 1) = REG_NOTES (p
);
557 REG_NOTES (p
) = dest_death
;
559 if (dregno
>= FIRST_PSEUDO_REGISTER
)
561 /* If and only if we are moving the death note for DREGNO,
562 then we need to update its counters. */
563 if (REG_LIVE_LENGTH (dregno
) >= 0)
564 REG_LIVE_LENGTH (dregno
) += d_length
;
565 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
572 /* If SRC is a hard register which is set or killed in some other
573 way, we can't do this optimization. */
574 else if (sregno
< FIRST_PSEUDO_REGISTER
575 && dead_or_set_p (p
, src
))
581 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
582 a sequence of insns that modify DEST followed by an insn that sets
583 SRC to DEST in which DEST dies, with no prior modification of DEST.
584 (There is no need to check if the insns in between actually modify
585 DEST. We should not have cases where DEST is not modified, but
586 the optimization is safe if no such modification is detected.)
587 In that case, we can replace all uses of DEST, starting with INSN and
588 ending with the set of SRC to DEST, with SRC. We do not do this
589 optimization if a CALL_INSN is crossed unless SRC already crosses a
590 call or if DEST dies before the copy back to SRC.
592 It is assumed that DEST and SRC are pseudos; it is too complicated to do
593 this for hard registers since the substitutions we may make might fail. */
596 optimize_reg_copy_2 (insn
, dest
, src
)
603 int sregno
= REGNO (src
);
604 int dregno
= REGNO (dest
);
606 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
608 /* ??? We can't scan past the end of a basic block without updating
609 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
610 if (perhaps_ends_bb_p (p
))
612 else if (! INSN_P (p
))
615 set
= single_set (p
);
616 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
617 && find_reg_note (p
, REG_DEAD
, dest
))
619 /* We can do the optimization. Scan forward from INSN again,
620 replacing regs as we go. */
622 /* Set to stop at next insn. */
623 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
626 if (reg_mentioned_p (dest
, PATTERN (q
)))
627 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
630 if (GET_CODE (q
) == CALL_INSN
)
632 REG_N_CALLS_CROSSED (dregno
)--;
633 REG_N_CALLS_CROSSED (sregno
)++;
637 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
638 REG_N_DEATHS (dregno
)--;
639 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
640 REG_N_DEATHS (sregno
)--;
644 if (reg_set_p (src
, p
)
645 || find_reg_note (p
, REG_DEAD
, dest
)
646 || (GET_CODE (p
) == CALL_INSN
&& REG_N_CALLS_CROSSED (sregno
) == 0))
650 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
651 Look if SRC dies there, and if it is only set once, by loading
652 it from memory. If so, try to encorporate the zero/sign extension
653 into the memory read, change SRC to the mode of DEST, and alter
654 the remaining accesses to use the appropriate SUBREG. This allows
655 SRC and DEST to be tied later. */
657 optimize_reg_copy_3 (insn
, dest
, src
)
662 rtx src_reg
= XEXP (src
, 0);
663 int src_no
= REGNO (src_reg
);
664 int dst_no
= REGNO (dest
);
666 enum machine_mode old_mode
;
668 if (src_no
< FIRST_PSEUDO_REGISTER
669 || dst_no
< FIRST_PSEUDO_REGISTER
670 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
671 || REG_N_SETS (src_no
) != 1)
673 for (p
= PREV_INSN (insn
); p
&& ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
674 /* ??? We can't scan past the end of a basic block without updating
675 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
676 if (perhaps_ends_bb_p (p
))
682 if (! (set
= single_set (p
))
683 || GET_CODE (SET_SRC (set
)) != MEM
684 /* If there's a REG_EQUIV note, this must be an insn that loads an
685 argument. Prefer keeping the note over doing this optimization. */
686 || find_reg_note (p
, REG_EQUIV
, NULL_RTX
)
687 || SET_DEST (set
) != src_reg
)
690 /* Be conserative: although this optimization is also valid for
691 volatile memory references, that could cause trouble in later passes. */
692 if (MEM_VOLATILE_P (SET_SRC (set
)))
695 /* Do not use a SUBREG to truncate from one mode to another if truncation
697 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
698 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
699 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
702 old_mode
= GET_MODE (src_reg
);
703 PUT_MODE (src_reg
, GET_MODE (src
));
704 XEXP (src
, 0) = SET_SRC (set
);
706 /* Include this change in the group so that it's easily undone if
707 one of the changes in the group is invalid. */
708 validate_change (p
, &SET_SRC (set
), src
, 1);
710 /* Now walk forward making additional replacements. We want to be able
711 to undo all the changes if a later substitution fails. */
712 subreg
= gen_lowpart_SUBREG (old_mode
, src_reg
);
713 while (p
= NEXT_INSN (p
), p
!= insn
)
718 /* Make a tenative change. */
719 validate_replace_rtx_group (src_reg
, subreg
, p
);
722 validate_replace_rtx_group (src
, src_reg
, insn
);
724 /* Now see if all the changes are valid. */
725 if (! apply_change_group ())
727 /* One or more changes were no good. Back out everything. */
728 PUT_MODE (src_reg
, old_mode
);
729 XEXP (src
, 0) = src_reg
;
733 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
735 remove_note (p
, note
);
740 /* If we were not able to update the users of src to use dest directly, try
741 instead moving the value to dest directly before the operation. */
744 copy_src_to_dest (insn
, src
, dest
, old_max_uid
)
763 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
764 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
765 parameter when there is no frame pointer that is not allocated a register.
766 For now, we just reject them, rather than incrementing the live length. */
768 if (GET_CODE (src
) == REG
769 && REG_LIVE_LENGTH (REGNO (src
)) > 0
770 && GET_CODE (dest
) == REG
771 && !RTX_UNCHANGING_P (dest
)
772 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
773 && (set
= single_set (insn
)) != NULL_RTX
774 && !reg_mentioned_p (dest
, SET_SRC (set
))
775 && GET_MODE (src
) == GET_MODE (dest
))
777 int old_num_regs
= reg_rtx_no
;
779 /* Generate the src->dest move. */
781 emit_move_insn (dest
, src
);
782 seq
= gen_sequence ();
784 /* If this sequence uses new registers, we may not use it. */
785 if (old_num_regs
!= reg_rtx_no
786 || ! validate_replace_rtx (src
, dest
, insn
))
788 /* We have to restore reg_rtx_no to its old value, lest
789 recompute_reg_usage will try to compute the usage of the
790 new regs, yet reg_n_info is not valid for them. */
791 reg_rtx_no
= old_num_regs
;
794 emit_insn_before (seq
, insn
);
795 move_insn
= PREV_INSN (insn
);
796 p_move_notes
= ®_NOTES (move_insn
);
797 p_insn_notes
= ®_NOTES (insn
);
799 /* Move any notes mentioning src to the move instruction */
800 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
802 next
= XEXP (link
, 1);
803 if (XEXP (link
, 0) == src
)
805 *p_move_notes
= link
;
806 p_move_notes
= &XEXP (link
, 1);
810 *p_insn_notes
= link
;
811 p_insn_notes
= &XEXP (link
, 1);
815 *p_move_notes
= NULL_RTX
;
816 *p_insn_notes
= NULL_RTX
;
818 /* Is the insn the head of a basic block? If so extend it */
819 insn_uid
= INSN_UID (insn
);
820 move_uid
= INSN_UID (move_insn
);
821 if (insn_uid
< old_max_uid
)
823 bb
= regmove_bb_head
[insn_uid
];
826 BLOCK_HEAD (bb
) = move_insn
;
827 regmove_bb_head
[insn_uid
] = -1;
831 /* Update the various register tables. */
832 dest_regno
= REGNO (dest
);
833 REG_N_SETS (dest_regno
) ++;
834 REG_LIVE_LENGTH (dest_regno
)++;
835 if (REGNO_FIRST_UID (dest_regno
) == insn_uid
)
836 REGNO_FIRST_UID (dest_regno
) = move_uid
;
838 src_regno
= REGNO (src
);
839 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
840 REG_LIVE_LENGTH (src_regno
)++;
842 if (REGNO_FIRST_UID (src_regno
) == insn_uid
)
843 REGNO_FIRST_UID (src_regno
) = move_uid
;
845 if (REGNO_LAST_UID (src_regno
) == insn_uid
)
846 REGNO_LAST_UID (src_regno
) = move_uid
;
848 if (REGNO_LAST_NOTE_UID (src_regno
) == insn_uid
)
849 REGNO_LAST_NOTE_UID (src_regno
) = move_uid
;
854 /* Return whether REG is set in only one location, and is set to a
855 constant, but is set in a different basic block from INSN (an
856 instructions which uses REG). In this case REG is equivalent to a
857 constant, and we don't want to break that equivalence, because that
858 may increase register pressure and make reload harder. If REG is
859 set in the same basic block as INSN, we don't worry about it,
860 because we'll probably need a register anyhow (??? but what if REG
861 is used in a different basic block as well as this one?). FIRST is
862 the first insn in the function. */
865 reg_is_remote_constant_p (reg
, insn
, first
)
872 if (REG_N_SETS (REGNO (reg
)) != 1)
875 /* Look for the set. */
876 for (p
= LOG_LINKS (insn
); p
; p
= XEXP (p
, 1))
880 if (REG_NOTE_KIND (p
) != 0)
882 s
= single_set (XEXP (p
, 0));
884 && GET_CODE (SET_DEST (s
)) == REG
885 && REGNO (SET_DEST (s
)) == REGNO (reg
))
887 /* The register is set in the same basic block. */
892 for (p
= first
; p
&& p
!= insn
; p
= NEXT_INSN (p
))
900 && GET_CODE (SET_DEST (s
)) == REG
901 && REGNO (SET_DEST (s
)) == REGNO (reg
))
903 /* This is the instruction which sets REG. If there is a
904 REG_EQUAL note, then REG is equivalent to a constant. */
905 if (find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
914 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
915 another add immediate instruction with the same source and dest registers,
916 and if we find one, we change INSN to an increment, and return 1. If
917 no changes are made, we return 0.
920 (set (reg100) (plus reg1 offset1))
922 (set (reg100) (plus reg1 offset2))
924 (set (reg100) (plus reg1 offset1))
926 (set (reg100) (plus reg100 offset2-offset1)) */
928 /* ??? What does this comment mean? */
929 /* cse disrupts preincrement / postdecrement squences when it finds a
930 hard register as ultimate source, like the frame pointer. */
933 fixup_match_2 (insn
, dst
, src
, offset
, regmove_dump_file
)
934 rtx insn
, dst
, src
, offset
;
935 FILE *regmove_dump_file
;
937 rtx p
, dst_death
= 0;
938 int length
, num_calls
= 0;
940 /* If SRC dies in INSN, we'd have to move the death note. This is
941 considered to be very unlikely, so we just skip the optimization
943 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
946 /* Scan backward to find the first instruction that sets DST. */
948 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
952 /* ??? We can't scan past the end of a basic block without updating
953 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
954 if (perhaps_ends_bb_p (p
))
956 else if (! INSN_P (p
))
959 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
964 pset
= single_set (p
);
965 if (pset
&& SET_DEST (pset
) == dst
966 && GET_CODE (SET_SRC (pset
)) == PLUS
967 && XEXP (SET_SRC (pset
), 0) == src
968 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
970 HOST_WIDE_INT newconst
971 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
972 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
974 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
976 /* Remove the death note for DST from DST_DEATH. */
979 remove_death (REGNO (dst
), dst_death
);
980 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
981 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
984 if (regmove_dump_file
)
985 fprintf (regmove_dump_file
,
986 "Fixed operand of insn %d.\n",
990 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
992 if (GET_CODE (p
) == CODE_LABEL
993 || GET_CODE (p
) == JUMP_INSN
)
997 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
999 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
1004 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1006 if (GET_CODE (p
) == CODE_LABEL
1007 || GET_CODE (p
) == JUMP_INSN
)
1011 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1013 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
1022 if (reg_set_p (dst
, PATTERN (p
)))
1025 /* If we have passed a call instruction, and the
1026 pseudo-reg SRC is not already live across a call,
1027 then don't perform the optimization. */
1028 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1029 hard regs are clobbered. Thus, we only use it for src for
1031 if (GET_CODE (p
) == CALL_INSN
)
1036 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1039 if (call_used_regs
[REGNO (dst
)]
1040 || find_reg_fusage (p
, CLOBBER
, dst
))
1043 else if (reg_set_p (src
, PATTERN (p
)))
1050 /* Main entry for the register move optimization.
1051 F is the first instruction.
1052 NREGS is one plus the highest pseudo-reg number used in the instruction.
1053 REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
1054 (or 0 if none should be output). */
1057 regmove_optimize (f
, nregs
, regmove_dump_file
)
1060 FILE *regmove_dump_file
;
1062 int old_max_uid
= get_max_uid ();
1067 rtx copy_src
, copy_dst
;
1069 /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
1070 confused by non-call exceptions ending blocks. */
1071 if (flag_non_call_exceptions
)
1074 /* Find out where a potential flags register is live, and so that we
1075 can supress some optimizations in those zones. */
1076 mark_flags_life_zones (discover_flags_reg ());
1078 regno_src_regno
= (int *) xmalloc (sizeof *regno_src_regno
* nregs
);
1079 for (i
= nregs
; --i
>= 0; ) regno_src_regno
[i
] = -1;
1081 regmove_bb_head
= (int *) xmalloc (sizeof (int) * (old_max_uid
+ 1));
1082 for (i
= old_max_uid
; i
>= 0; i
--) regmove_bb_head
[i
] = -1;
1083 for (i
= 0; i
< n_basic_blocks
; i
++)
1084 regmove_bb_head
[INSN_UID (BLOCK_HEAD (i
))] = i
;
1086 /* A forward/backward pass. Replace output operands with input operands. */
1088 for (pass
= 0; pass
<= 2; pass
++)
1090 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
1093 if (regmove_dump_file
)
1094 fprintf (regmove_dump_file
, "Starting %s pass...\n",
1095 pass
? "backward" : "forward");
1097 for (insn
= pass
? get_last_insn () : f
; insn
;
1098 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1101 int op_no
, match_no
;
1103 set
= single_set (insn
);
1107 if (flag_expensive_optimizations
&& ! pass
1108 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1109 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1110 && GET_CODE (XEXP (SET_SRC (set
), 0)) == REG
1111 && GET_CODE (SET_DEST(set
)) == REG
)
1112 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1114 if (flag_expensive_optimizations
&& ! pass
1115 && GET_CODE (SET_SRC (set
)) == REG
1116 && GET_CODE (SET_DEST(set
)) == REG
)
1118 /* If this is a register-register copy where SRC is not dead,
1119 see if we can optimize it. If this optimization succeeds,
1120 it will become a copy where SRC is dead. */
1121 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1122 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1123 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1125 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1126 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1127 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1128 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1129 && SET_SRC (set
) != SET_DEST (set
))
1131 int srcregno
= REGNO (SET_SRC(set
));
1132 if (regno_src_regno
[srcregno
] >= 0)
1133 srcregno
= regno_src_regno
[srcregno
];
1134 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1141 if (! find_matches (insn
, &match
))
1144 /* Now scan through the operands looking for a source operand
1145 which is supposed to match the destination operand.
1146 Then scan forward for an instruction which uses the dest
1148 If it dies there, then replace the dest in both operands with
1149 the source operand. */
1151 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1153 rtx src
, dst
, src_subreg
;
1154 enum reg_class src_class
, dst_class
;
1156 match_no
= match
.with
[op_no
];
1158 /* Nothing to do if the two operands aren't supposed to match. */
1162 src
= recog_data
.operand
[op_no
];
1163 dst
= recog_data
.operand
[match_no
];
1165 if (GET_CODE (src
) != REG
)
1169 if (GET_CODE (dst
) == SUBREG
1170 && GET_MODE_SIZE (GET_MODE (dst
))
1171 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1174 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst
)),
1175 src
, SUBREG_BYTE (dst
));
1176 dst
= SUBREG_REG (dst
);
1178 if (GET_CODE (dst
) != REG
1179 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1182 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1184 if (match
.commutative
[op_no
] < op_no
)
1185 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1189 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1192 /* op_no/src must be a read-only operand, and
1193 match_operand/dst must be a write-only operand. */
1194 if (match
.use
[op_no
] != READ
1195 || match
.use
[match_no
] != WRITE
)
1198 if (match
.early_clobber
[match_no
]
1199 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1202 /* Make sure match_operand is the destination. */
1203 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1206 /* If the operands already match, then there is nothing to do. */
1207 if (operands_match_p (src
, dst
))
1210 /* But in the commutative case, we might find a better match. */
1211 if (match
.commutative
[op_no
] >= 0)
1213 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1214 if (operands_match_p (comm
, dst
)
1215 && (replacement_quality (comm
)
1216 >= replacement_quality (src
)))
1220 src_class
= reg_preferred_class (REGNO (src
));
1221 dst_class
= reg_preferred_class (REGNO (dst
));
1222 if (! regclass_compatible_p (src_class
, dst_class
))
1225 if (GET_MODE (src
) != GET_MODE (dst
))
1228 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1236 /* A backward pass. Replace input operands with output operands. */
1238 if (regmove_dump_file
)
1239 fprintf (regmove_dump_file
, "Starting backward pass...\n");
1241 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1245 int op_no
, match_no
;
1248 if (! find_matches (insn
, &match
))
1251 /* Now scan through the operands looking for a destination operand
1252 which is supposed to match a source operand.
1253 Then scan backward for an instruction which sets the source
1254 operand. If safe, then replace the source operand with the
1255 dest operand in both instructions. */
1257 copy_src
= NULL_RTX
;
1258 copy_dst
= NULL_RTX
;
1259 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1261 rtx set
, p
, src
, dst
;
1262 rtx src_note
, dst_note
;
1264 enum reg_class src_class
, dst_class
;
1267 match_no
= match
.with
[op_no
];
1269 /* Nothing to do if the two operands aren't supposed to match. */
1273 dst
= recog_data
.operand
[match_no
];
1274 src
= recog_data
.operand
[op_no
];
1276 if (GET_CODE (src
) != REG
)
1279 if (GET_CODE (dst
) != REG
1280 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1281 || REG_LIVE_LENGTH (REGNO (dst
)) < 0
1282 || RTX_UNCHANGING_P (dst
))
1285 /* If the operands already match, then there is nothing to do. */
1286 if (operands_match_p (src
, dst
))
1289 if (match
.commutative
[op_no
] >= 0)
1291 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1292 if (operands_match_p (comm
, dst
))
1296 set
= single_set (insn
);
1300 /* Note that single_set ignores parts of a parallel set for
1301 which one of the destinations is REG_UNUSED. We can't
1302 handle that here, since we can wind up rewriting things
1303 such that a single register is set twice within a single
1305 if (reg_set_p (src
, insn
))
1308 /* match_no/dst must be a write-only operand, and
1309 operand_operand/src must be a read-only operand. */
1310 if (match
.use
[op_no
] != READ
1311 || match
.use
[match_no
] != WRITE
)
1314 if (match
.early_clobber
[match_no
]
1315 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1318 /* Make sure match_no is the destination. */
1319 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1322 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1324 if (GET_CODE (SET_SRC (set
)) == PLUS
1325 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1326 && XEXP (SET_SRC (set
), 0) == src
1327 && fixup_match_2 (insn
, dst
, src
,
1328 XEXP (SET_SRC (set
), 1),
1333 src_class
= reg_preferred_class (REGNO (src
));
1334 dst_class
= reg_preferred_class (REGNO (dst
));
1335 if (! regclass_compatible_p (src_class
, dst_class
))
1345 /* Can not modify an earlier insn to set dst if this insn
1346 uses an old value in the source. */
1347 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1357 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1368 /* If src is set once in a different basic block,
1369 and is set equal to a constant, then do not use
1370 it for this optimization, as this would make it
1371 no longer equivalent to a constant. */
1373 if (reg_is_remote_constant_p (src
, insn
, f
))
1384 if (regmove_dump_file
)
1385 fprintf (regmove_dump_file
,
1386 "Could fix operand %d of insn %d matching operand %d.\n",
1387 op_no
, INSN_UID (insn
), match_no
);
1389 /* Scan backward to find the first instruction that uses
1390 the input operand. If the operand is set here, then
1391 replace it in both instructions with match_no. */
1393 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1397 /* ??? We can't scan past the end of a basic block without
1398 updating the register lifetime info
1399 (REG_DEAD/basic_block_live_at_start). */
1400 if (perhaps_ends_bb_p (p
))
1402 else if (! INSN_P (p
))
1407 /* ??? See if all of SRC is set in P. This test is much
1408 more conservative than it needs to be. */
1409 pset
= single_set (p
);
1410 if (pset
&& SET_DEST (pset
) == src
)
1412 /* We use validate_replace_rtx, in case there
1413 are multiple identical source operands. All of
1414 them have to be changed at the same time. */
1415 if (validate_replace_rtx (src
, dst
, insn
))
1417 if (validate_change (p
, &SET_DEST (pset
),
1422 /* Change all source operands back.
1423 This modifies the dst as a side-effect. */
1424 validate_replace_rtx (dst
, src
, insn
);
1425 /* Now make sure the dst is right. */
1426 validate_change (insn
,
1427 recog_data
.operand_loc
[match_no
],
1434 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1435 || reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1438 /* If we have passed a call instruction, and the
1439 pseudo-reg DST is not already live across a call,
1440 then don't perform the optimization. */
1441 if (GET_CODE (p
) == CALL_INSN
)
1445 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1454 /* Remove the death note for SRC from INSN. */
1455 remove_note (insn
, src_note
);
1456 /* Move the death note for SRC to P if it is used
1458 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1460 XEXP (src_note
, 1) = REG_NOTES (p
);
1461 REG_NOTES (p
) = src_note
;
1463 /* If there is a REG_DEAD note for DST on P, then remove
1464 it, because DST is now set there. */
1465 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1466 remove_note (p
, dst_note
);
1468 dstno
= REGNO (dst
);
1469 srcno
= REGNO (src
);
1471 REG_N_SETS (dstno
)++;
1472 REG_N_SETS (srcno
)--;
1474 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1475 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1477 REG_LIVE_LENGTH (dstno
) += length
;
1478 if (REG_LIVE_LENGTH (srcno
) >= 0)
1480 REG_LIVE_LENGTH (srcno
) -= length
;
1481 /* REG_LIVE_LENGTH is only an approximation after
1482 combine if sched is not run, so make sure that we
1483 still have a reasonable value. */
1484 if (REG_LIVE_LENGTH (srcno
) < 2)
1485 REG_LIVE_LENGTH (srcno
) = 2;
1488 if (regmove_dump_file
)
1489 fprintf (regmove_dump_file
,
1490 "Fixed operand %d of insn %d matching operand %d.\n",
1491 op_no
, INSN_UID (insn
), match_no
);
1497 /* If we weren't able to replace any of the alternatives, try an
1498 alternative appoach of copying the source to the destination. */
1499 if (!success
&& copy_src
!= NULL_RTX
)
1500 copy_src_to_dest (insn
, copy_src
, copy_dst
, old_max_uid
);
1505 /* In fixup_match_1, some insns may have been inserted after basic block
1506 ends. Fix that here. */
1507 for (i
= 0; i
< n_basic_blocks
; i
++)
1509 rtx end
= BLOCK_END (i
);
1511 rtx next
= NEXT_INSN (new);
1512 while (next
!= 0 && INSN_UID (next
) >= old_max_uid
1513 && (i
== n_basic_blocks
- 1 || BLOCK_HEAD (i
+ 1) != next
))
1514 new = next
, next
= NEXT_INSN (new);
1515 BLOCK_END (i
) = new;
1520 free (regno_src_regno
);
1521 free (regmove_bb_head
);
1524 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1525 Returns 0 if INSN can't be recognized, or if the alternative can't be
1528 Initialize the info in MATCHP based on the constraints. */
1531 find_matches (insn
, matchp
)
1533 struct match
*matchp
;
1535 int likely_spilled
[MAX_RECOG_OPERANDS
];
1537 int any_matches
= 0;
1539 extract_insn (insn
);
1540 if (! constrain_operands (0))
1543 /* Must initialize this before main loop, because the code for
1544 the commutative case may set matches for operands other than
1546 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1547 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1549 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1555 p
= recog_data
.constraints
[op_no
];
1557 likely_spilled
[op_no
] = 0;
1558 matchp
->use
[op_no
] = READ
;
1559 matchp
->early_clobber
[op_no
] = 0;
1561 matchp
->use
[op_no
] = WRITE
;
1563 matchp
->use
[op_no
] = READWRITE
;
1565 for (;*p
&& i
< which_alternative
; p
++)
1569 while ((c
= *p
++) != '\0' && c
!= ',')
1577 matchp
->early_clobber
[op_no
] = 1;
1580 matchp
->commutative
[op_no
] = op_no
+ 1;
1581 matchp
->commutative
[op_no
+ 1] = op_no
;
1583 case '0': case '1': case '2': case '3': case '4':
1584 case '5': case '6': case '7': case '8': case '9':
1586 if (c
< op_no
&& likely_spilled
[(unsigned char) c
])
1588 matchp
->with
[op_no
] = c
;
1590 if (matchp
->commutative
[op_no
] >= 0)
1591 matchp
->with
[matchp
->commutative
[op_no
]] = c
;
1593 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1594 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1595 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1596 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1597 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c
)))
1598 likely_spilled
[op_no
] = 1;
1605 /* Try to replace all occurrences of DST_REG with SRC in LOC, that is
1606 assumed to be in INSN. */
1609 replace_in_call_usage (loc
, dst_reg
, src
, insn
)
1611 unsigned int dst_reg
;
1623 code
= GET_CODE (x
);
1626 if (REGNO (x
) != dst_reg
)
1629 validate_change (insn
, loc
, src
, 1);
1634 /* Process each of our operands recursively. */
1635 fmt
= GET_RTX_FORMAT (code
);
1636 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++, fmt
++)
1638 replace_in_call_usage (&XEXP (x
, i
), dst_reg
, src
, insn
);
1639 else if (*fmt
== 'E')
1640 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1641 replace_in_call_usage (& XVECEXP (x
, i
, j
), dst_reg
, src
, insn
);
1644 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1645 the only set in INSN. INSN has just been recognized and constrained.
1646 SRC is operand number OPERAND_NUMBER in INSN.
1647 DST is operand number MATCH_NUMBER in INSN.
1648 If BACKWARD is nonzero, we have been called in a backward pass.
1649 Return nonzero for success. */
1652 fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, backward
, operand_number
,
1653 match_number
, regmove_dump_file
)
1654 rtx insn
, set
, src
, src_subreg
, dst
;
1655 int backward
, operand_number
, match_number
;
1656 FILE *regmove_dump_file
;
1659 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1661 int num_calls
= 0, s_num_calls
= 0;
1662 enum rtx_code code
= NOTE
;
1663 HOST_WIDE_INT insn_const
= 0, newconst
;
1664 rtx overlap
= 0; /* need to move insn ? */
1665 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
= NULL_RTX
;
1666 int length
, s_length
;
1668 /* If SRC is marked as unchanging, we may not change it.
1669 ??? Maybe we could get better code by removing the unchanging bit
1670 instead, and changing it back if we don't succeed? */
1671 if (RTX_UNCHANGING_P (src
))
1676 /* Look for (set (regX) (op regA constX))
1677 (set (regY) (op regA constY))
1679 (set (regA) (op regA constX)).
1680 (set (regY) (op regA constY-constX)).
1681 This works for add and shift operations, if
1682 regA is dead after or set by the second insn. */
1684 code
= GET_CODE (SET_SRC (set
));
1685 if ((code
== PLUS
|| code
== LSHIFTRT
1686 || code
== ASHIFT
|| code
== ASHIFTRT
)
1687 && XEXP (SET_SRC (set
), 0) == src
1688 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1689 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1690 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1693 /* We might find a src_note while scanning. */
1697 if (regmove_dump_file
)
1698 fprintf (regmove_dump_file
,
1699 "Could fix operand %d of insn %d matching operand %d.\n",
1700 operand_number
, INSN_UID (insn
), match_number
);
1702 /* If SRC is equivalent to a constant set in a different basic block,
1703 then do not use it for this optimization. We want the equivalence
1704 so that if we have to reload this register, we can reload the
1705 constant, rather than extending the lifespan of the register. */
1706 if (reg_is_remote_constant_p (src
, insn
, get_insns ()))
1709 /* Scan forward to find the next instruction that
1710 uses the output operand. If the operand dies here,
1711 then replace it in both instructions with
1714 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1716 if (GET_CODE (p
) == CALL_INSN
)
1717 replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p
),
1718 REGNO (dst
), src
, p
);
1720 /* ??? We can't scan past the end of a basic block without updating
1721 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1722 if (perhaps_ends_bb_p (p
))
1724 else if (! INSN_P (p
))
1731 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1732 || (GET_CODE (PATTERN (p
)) == USE
1733 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1736 /* See if all of DST dies in P. This test is
1737 slightly more conservative than it needs to be. */
1738 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1739 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1741 /* If we would be moving INSN, check that we won't move it
1742 into the shadow of a live a live flags register. */
1743 /* ??? We only try to move it in front of P, although
1744 we could move it anywhere between OVERLAP and P. */
1745 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1751 rtx set2
= NULL_RTX
;
1753 /* If an optimization is done, the value of SRC while P
1754 is executed will be changed. Check that this is OK. */
1755 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1757 for (q
= p
; q
; q
= NEXT_INSN (q
))
1759 /* ??? We can't scan past the end of a basic block without
1760 updating the register lifetime info
1761 (REG_DEAD/basic_block_live_at_start). */
1762 if (perhaps_ends_bb_p (q
))
1767 else if (! INSN_P (q
))
1769 else if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1770 || reg_set_p (src
, q
))
1774 set2
= single_set (q
);
1775 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1776 || XEXP (SET_SRC (set2
), 0) != src
1777 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1778 || (SET_DEST (set2
) != src
1779 && ! find_reg_note (q
, REG_DEAD
, src
)))
1781 /* If this is a PLUS, we can still save a register by doing
1784 src -= insn_const; .
1785 This also gives opportunities for subsequent
1786 optimizations in the backward pass, so do it there. */
1787 if (code
== PLUS
&& backward
1788 /* Don't do this if we can likely tie DST to SET_DEST
1789 of P later; we can't do this tying here if we got a
1791 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1793 && GET_CODE (SET_DEST (single_set (p
))) == REG
1794 && (REGNO (SET_DEST (single_set (p
)))
1795 < FIRST_PSEUDO_REGISTER
))
1796 /* We may only emit an insn directly after P if we
1797 are not in the shadow of a live flags register. */
1798 && GET_MODE (p
) == VOIDmode
)
1803 newconst
= -insn_const
;
1811 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1812 /* Reject out of range shifts. */
1815 || ((unsigned HOST_WIDE_INT
) newconst
1816 >= (GET_MODE_BITSIZE (GET_MODE
1817 (SET_SRC (set2
)))))))
1822 if (SET_DEST (set2
) != src
)
1823 post_inc_set
= set2
;
1826 /* We use 1 as last argument to validate_change so that all
1827 changes are accepted or rejected together by apply_change_group
1828 when it is called by validate_replace_rtx . */
1829 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1830 GEN_INT (newconst
), 1);
1832 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1833 if (validate_replace_rtx (dst
, src_subreg
, p
))
1838 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1840 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1842 /* INSN was already checked to be movable wrt. the registers that it
1843 sets / uses when we found no REG_DEAD note for src on it, but it
1844 still might clobber the flags register. We'll have to check that
1845 we won't insert it into the shadow of a live flags register when
1846 we finally know where we are to move it. */
1848 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1851 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1852 already live across a call, then don't perform the optimization. */
1853 if (GET_CODE (p
) == CALL_INSN
)
1855 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1869 /* Remove the death note for DST from P. */
1870 remove_note (p
, dst_note
);
1873 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1874 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1876 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1878 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1879 REG_N_SETS (REGNO (src
))++;
1880 REG_LIVE_LENGTH (REGNO (src
))++;
1884 /* The lifetime of src and dest overlap,
1885 but we can change this by moving insn. */
1886 rtx pat
= PATTERN (insn
);
1888 remove_note (overlap
, src_note
);
1889 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1891 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1895 rtx notes
= REG_NOTES (insn
);
1897 emit_insn_after_with_line_notes (pat
, PREV_INSN (p
), insn
);
1898 PUT_CODE (insn
, NOTE
);
1899 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1900 NOTE_SOURCE_FILE (insn
) = 0;
1901 /* emit_insn_after_with_line_notes has no
1902 return value, so search for the new insn. */
1904 while (! INSN_P (insn
) || PATTERN (insn
) != pat
)
1905 insn
= PREV_INSN (insn
);
1907 REG_NOTES (insn
) = notes
;
1910 /* Sometimes we'd generate src = const; src += n;
1911 if so, replace the instruction that set src
1912 in the first place. */
1914 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1916 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1917 rtx q
, set2
= NULL_RTX
;
1918 int num_calls2
= 0, s_length2
= 0;
1920 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1922 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN(q
))
1924 /* ??? We can't scan past the end of a basic block without
1925 updating the register lifetime info
1926 (REG_DEAD/basic_block_live_at_start). */
1927 if (perhaps_ends_bb_p (q
))
1932 else if (! INSN_P (q
))
1936 if (reg_set_p (src
, q
))
1938 set2
= single_set (q
);
1941 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1946 if (GET_CODE (p
) == CALL_INSN
)
1949 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1950 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1953 NOTE_LINE_NUMBER (q
) = NOTE_INSN_DELETED
;
1954 NOTE_SOURCE_FILE (q
) = 0;
1955 REG_N_SETS (REGNO (src
))--;
1956 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1957 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1963 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1964 && (code
== PLUS
|| code
== MINUS
) && insn_const
1965 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1967 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1969 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1971 /* If post_inc still prevails, try to find an
1972 insn where it can be used as a pre-in/decrement.
1973 If code is MINUS, this was already tried. */
1974 if (post_inc
&& code
== PLUS
1975 /* Check that newconst is likely to be usable
1976 in a pre-in/decrement before starting the search. */
1977 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
1978 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
1979 && exact_log2 (newconst
))
1983 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
1984 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
1986 /* ??? We can't scan past the end of a basic block without updating
1987 the register lifetime info
1988 (REG_DEAD/basic_block_live_at_start). */
1989 if (perhaps_ends_bb_p (q
))
1991 else if (! INSN_P (q
))
1993 else if (src
!= inc_dest
1994 && (reg_overlap_mentioned_p (src
, PATTERN (q
))
1995 || reg_set_p (src
, q
)))
1997 else if (reg_set_p (inc_dest
, q
))
1999 else if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
2001 try_auto_increment (q
, post_inc
,
2002 post_inc_set
, inc_dest
, newconst
, 1);
2008 /* Move the death note for DST to INSN if it is used
2010 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
2012 XEXP (dst_note
, 1) = REG_NOTES (insn
);
2013 REG_NOTES (insn
) = dst_note
;
2018 /* Move the death note for SRC from INSN to P. */
2020 remove_note (insn
, src_note
);
2021 XEXP (src_note
, 1) = REG_NOTES (p
);
2022 REG_NOTES (p
) = src_note
;
2024 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
2027 REG_N_SETS (REGNO (src
))++;
2028 REG_N_SETS (REGNO (dst
))--;
2030 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
2032 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
2033 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
2035 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
2036 /* REG_LIVE_LENGTH is only an approximation after
2037 combine if sched is not run, so make sure that we
2038 still have a reasonable value. */
2039 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
2040 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
2042 if (regmove_dump_file
)
2043 fprintf (regmove_dump_file
,
2044 "Fixed operand %d of insn %d matching operand %d.\n",
2045 operand_number
, INSN_UID (insn
), match_number
);
2050 /* return nonzero if X is stable and mentions no regsiters but for
2051 mentioning SRC or mentioning / changing DST . If in doubt, presume
2053 The rationale is that we want to check if we can move an insn easily
2054 while just paying attention to SRC and DST. A register is considered
2055 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2056 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2057 want any registers but SRC and DST. */
2059 stable_and_no_regs_but_for_p (x
, src
, dst
)
2062 RTX_CODE code
= GET_CODE (x
);
2063 switch (GET_RTX_CLASS (code
))
2065 case '<': case '1': case 'c': case '2': case 'b': case '3':
2068 const char *fmt
= GET_RTX_FORMAT (code
);
2069 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2071 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2077 return x
== src
|| x
== dst
;
2078 /* If this is a MEM, look inside - there might be a register hidden in
2079 the address of an unchanging MEM. */
2081 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2085 return ! rtx_unstable_p (x
);
2089 /* Track stack adjustments and stack memory references. Attempt to
2090 reduce the number of stack adjustments by back-propogating across
2091 the memory references.
2093 This is intended primarily for use with targets that do not define
2094 ACCUMULATE_OUTGOING_ARGS. It is of significantly more value to
2095 targets that define PREFERRED_STACK_BOUNDARY more aligned than
2096 STACK_BOUNDARY (e.g. x86), or if not all registers can be pushed
2097 (e.g. x86 fp regs) which would ordinarily have to be implemented
2098 as a sub/mov pair due to restrictions in calls.c.
2100 Propogation stops when any of the insns that need adjusting are
2101 (a) no longer valid because we've exceeded their range, (b) a
2102 non-trivial push instruction, or (c) a call instruction.
2104 Restriction B is based on the assumption that push instructions
2105 are smaller or faster. If a port really wants to remove all
2106 pushes, it should have defined ACCUMULATE_OUTGOING_ARGS. The
2107 one exception that is made is for an add immediately followed
2110 /* This structure records stack memory references between stack adjusting
2115 HOST_WIDE_INT sp_offset
;
2117 struct csa_memlist
*next
;
2120 static int stack_memref_p
PARAMS ((rtx
));
2121 static rtx single_set_for_csa
PARAMS ((rtx
));
2122 static void free_csa_memlist
PARAMS ((struct csa_memlist
*));
2123 static struct csa_memlist
*record_one_stack_memref
2124 PARAMS ((rtx
, rtx
*, struct csa_memlist
*));
2125 static int try_apply_stack_adjustment
2126 PARAMS ((rtx
, struct csa_memlist
*, HOST_WIDE_INT
, HOST_WIDE_INT
));
2127 static void combine_stack_adjustments_for_block
PARAMS ((basic_block
));
2128 static int record_stack_memrefs
PARAMS ((rtx
*, void *));
2131 /* Main entry point for stack adjustment combination. */
2134 combine_stack_adjustments ()
2138 for (i
= 0; i
< n_basic_blocks
; ++i
)
2139 combine_stack_adjustments_for_block (BASIC_BLOCK (i
));
2142 /* Recognize a MEM of the form (sp) or (plus sp const). */
2148 if (GET_CODE (x
) != MEM
)
2152 if (x
== stack_pointer_rtx
)
2154 if (GET_CODE (x
) == PLUS
2155 && XEXP (x
, 0) == stack_pointer_rtx
2156 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2162 /* Recognize either normal single_set or the hack in i386.md for
2163 tying fp and sp adjustments. */
2166 single_set_for_csa (insn
)
2170 rtx tmp
= single_set (insn
);
2174 if (GET_CODE (insn
) != INSN
2175 || GET_CODE (PATTERN (insn
)) != PARALLEL
)
2178 tmp
= PATTERN (insn
);
2179 if (GET_CODE (XVECEXP (tmp
, 0, 0)) != SET
)
2182 for (i
= 1; i
< XVECLEN (tmp
, 0); ++i
)
2184 rtx
this = XVECEXP (tmp
, 0, i
);
2186 /* The special case is allowing a no-op set. */
2187 if (GET_CODE (this) == SET
2188 && SET_SRC (this) == SET_DEST (this))
2190 else if (GET_CODE (this) != CLOBBER
2191 && GET_CODE (this) != USE
)
2195 return XVECEXP (tmp
, 0, 0);
2198 /* Free the list of csa_memlist nodes. */
2201 free_csa_memlist (memlist
)
2202 struct csa_memlist
*memlist
;
2204 struct csa_memlist
*next
;
2205 for (; memlist
; memlist
= next
)
2207 next
= memlist
->next
;
2212 /* Create a new csa_memlist node from the given memory reference.
2213 It is already known that the memory is stack_memref_p. */
2215 static struct csa_memlist
*
2216 record_one_stack_memref (insn
, mem
, next_memlist
)
2218 struct csa_memlist
*next_memlist
;
2220 struct csa_memlist
*ml
;
2222 ml
= (struct csa_memlist
*) xmalloc (sizeof (*ml
));
2224 if (XEXP (*mem
, 0) == stack_pointer_rtx
)
2227 ml
->sp_offset
= INTVAL (XEXP (XEXP (*mem
, 0), 1));
2231 ml
->next
= next_memlist
;
2236 /* Attempt to apply ADJUST to the stack adjusting insn INSN, as well
2237 as each of the memories in MEMLIST. Return true on success. */
2240 try_apply_stack_adjustment (insn
, memlist
, new_adjust
, delta
)
2242 struct csa_memlist
*memlist
;
2243 HOST_WIDE_INT new_adjust
, delta
;
2245 struct csa_memlist
*ml
;
2248 set
= single_set_for_csa (insn
);
2249 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (new_adjust
), 1);
2251 for (ml
= memlist
; ml
; ml
= ml
->next
)
2254 replace_equiv_address_nv (*ml
->mem
,
2255 plus_constant (stack_pointer_rtx
,
2256 ml
->sp_offset
- delta
)), 1);
2258 if (apply_change_group ())
2260 /* Succeeded. Update our knowledge of the memory references. */
2261 for (ml
= memlist
; ml
; ml
= ml
->next
)
2262 ml
->sp_offset
-= delta
;
2270 /* Called via for_each_rtx and used to record all stack memory references in
2271 the insn and discard all other stack pointer references. */
2272 struct record_stack_memrefs_data
2275 struct csa_memlist
*memlist
;
2279 record_stack_memrefs (xp
, data
)
2284 struct record_stack_memrefs_data
*d
=
2285 (struct record_stack_memrefs_data
*) data
;
2288 switch (GET_CODE (x
))
2291 if (!reg_mentioned_p (stack_pointer_rtx
, x
))
2293 /* We are not able to handle correctly all possible memrefs containing
2294 stack pointer, so this check is neccesary. */
2295 if (stack_memref_p (x
))
2297 d
->memlist
= record_one_stack_memref (d
->insn
, xp
, d
->memlist
);
2302 /* ??? We want be able to handle non-memory stack pointer
2303 references later. For now just discard all insns refering to
2304 stack pointer outside mem expressions. We would probably
2305 want to teach validate_replace to simplify expressions first.
2307 We can't just compare with STACK_POINTER_RTX because the
2308 reference to the stack pointer might be in some other mode.
2309 In particular, an explict clobber in an asm statement will
2310 result in a QImode clober. */
2311 if (REGNO (x
) == STACK_POINTER_REGNUM
)
2320 /* Subroutine of combine_stack_adjustments, called for each basic block. */
2323 combine_stack_adjustments_for_block (bb
)
2326 HOST_WIDE_INT last_sp_adjust
= 0;
2327 rtx last_sp_set
= NULL_RTX
;
2328 struct csa_memlist
*memlist
= NULL
;
2331 struct record_stack_memrefs_data data
;
2333 for (insn
= bb
->head
; ; insn
= next
)
2337 pending_delete
= NULL_RTX
;
2338 next
= NEXT_INSN (insn
);
2340 if (! INSN_P (insn
))
2343 set
= single_set_for_csa (insn
);
2346 rtx dest
= SET_DEST (set
);
2347 rtx src
= SET_SRC (set
);
2349 /* Find constant additions to the stack pointer. */
2350 if (dest
== stack_pointer_rtx
2351 && GET_CODE (src
) == PLUS
2352 && XEXP (src
, 0) == stack_pointer_rtx
2353 && GET_CODE (XEXP (src
, 1)) == CONST_INT
)
2355 HOST_WIDE_INT this_adjust
= INTVAL (XEXP (src
, 1));
2357 /* If we've not seen an adjustment previously, record
2358 it now and continue. */
2362 last_sp_adjust
= this_adjust
;
2366 /* If not all recorded memrefs can be adjusted, or the
2367 adjustment is now too large for a constant addition,
2368 we cannot merge the two stack adjustments.
2370 Also we need to be carefull to not move stack pointer
2371 such that we create stack accesses outside the allocated
2372 area. We can combine an allocation into the first insn,
2373 or a deallocation into the second insn. We can not
2374 combine an allocation followed by a deallocation.
2376 The only somewhat frequent ocurrence of the later is when
2377 a function allocates a stack frame but does not use it.
2378 For this case, we would need to analyze rtl stream to be
2379 sure that allocated area is really unused. This means not
2380 only checking the memory references, but also all registers
2381 or global memory references possibly containing a stack
2384 Perhaps the best way to address this problem is to teach
2385 gcc not to allocate stack for objects never used. */
2387 /* Combine an allocation into the first instruction. */
2388 if (STACK_GROWS_DOWNWARD
? this_adjust
<= 0 : this_adjust
>= 0)
2390 if (try_apply_stack_adjustment (last_sp_set
, memlist
,
2391 last_sp_adjust
+ this_adjust
,
2395 pending_delete
= insn
;
2396 last_sp_adjust
+= this_adjust
;
2401 /* Otherwise we have a deallocation. Do not combine with
2402 a previous allocation. Combine into the second insn. */
2403 else if (STACK_GROWS_DOWNWARD
2404 ? last_sp_adjust
>= 0 : last_sp_adjust
<= 0)
2406 if (try_apply_stack_adjustment (insn
, memlist
,
2407 last_sp_adjust
+ this_adjust
,
2411 flow_delete_insn (last_sp_set
);
2413 last_sp_adjust
+= this_adjust
;
2414 free_csa_memlist (memlist
);
2420 /* Combination failed. Restart processing from here. */
2421 free_csa_memlist (memlist
);
2424 last_sp_adjust
= this_adjust
;
2428 /* Find a predecrement of exactly the previous adjustment and
2429 turn it into a direct store. Obviously we can't do this if
2430 there were any intervening uses of the stack pointer. */
2432 && GET_CODE (dest
) == MEM
2433 && ((GET_CODE (XEXP (dest
, 0)) == PRE_DEC
2435 == (HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (dest
))))
2436 || (GET_CODE (XEXP (dest
, 0)) == PRE_MODIFY
2437 && GET_CODE (XEXP (XEXP (dest
, 0), 1)) == PLUS
2438 && XEXP (XEXP (XEXP (dest
, 0), 1), 0) == stack_pointer_rtx
2439 && (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2441 && (INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2442 == -last_sp_adjust
)))
2443 && XEXP (XEXP (dest
, 0), 0) == stack_pointer_rtx
2444 && ! reg_mentioned_p (stack_pointer_rtx
, src
)
2445 && memory_address_p (GET_MODE (dest
), stack_pointer_rtx
)
2446 && validate_change (insn
, &SET_DEST (set
),
2447 replace_equiv_address (dest
,
2451 if (last_sp_set
== bb
->head
)
2452 bb
->head
= NEXT_INSN (last_sp_set
);
2453 flow_delete_insn (last_sp_set
);
2455 free_csa_memlist (memlist
);
2457 last_sp_set
= NULL_RTX
;
2464 data
.memlist
= memlist
;
2465 if (GET_CODE (insn
) != CALL_INSN
&& last_sp_set
2466 && !for_each_rtx (&PATTERN (insn
), record_stack_memrefs
, &data
))
2468 memlist
= data
.memlist
;
2471 memlist
= data
.memlist
;
2473 /* Otherwise, we were not able to process the instruction.
2474 Do not continue collecting data across such a one. */
2476 && (GET_CODE (insn
) == CALL_INSN
2477 || reg_mentioned_p (stack_pointer_rtx
, PATTERN (insn
))))
2479 free_csa_memlist (memlist
);
2481 last_sp_set
= NULL_RTX
;
2486 if (insn
== bb
->end
)
2490 flow_delete_insn (pending_delete
);
2495 bb
->end
= PREV_INSN (pending_delete
);
2496 flow_delete_insn (pending_delete
);