1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This module looks for cases where matching constraints would force
24 an instruction to need a reload, and this reload would be a register
25 to register move. It then attempts to change the registers used by the
26 instruction to avoid the move instruction. */
30 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
32 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "basic-block.h"
46 /* Turn STACK_GROWS_DOWNWARD into a boolean. */
47 #ifdef STACK_GROWS_DOWNWARD
48 #undef STACK_GROWS_DOWNWARD
49 #define STACK_GROWS_DOWNWARD 1
51 #define STACK_GROWS_DOWNWARD 0
54 static int perhaps_ends_bb_p
PARAMS ((rtx
));
55 static int optimize_reg_copy_1
PARAMS ((rtx
, rtx
, rtx
));
56 static void optimize_reg_copy_2
PARAMS ((rtx
, rtx
, rtx
));
57 static void optimize_reg_copy_3
PARAMS ((rtx
, rtx
, rtx
));
58 static rtx gen_add3_insn
PARAMS ((rtx
, rtx
, rtx
));
59 static void copy_src_to_dest
PARAMS ((rtx
, rtx
, rtx
, int));
60 static int *regmove_bb_head
;
63 int with
[MAX_RECOG_OPERANDS
];
64 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
65 int commutative
[MAX_RECOG_OPERANDS
];
66 int early_clobber
[MAX_RECOG_OPERANDS
];
69 static rtx discover_flags_reg
PARAMS ((void));
70 static void mark_flags_life_zones
PARAMS ((rtx
));
71 static void flags_set_1
PARAMS ((rtx
, rtx
, void *));
73 static int try_auto_increment
PARAMS ((rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int));
74 static int find_matches
PARAMS ((rtx
, struct match
*));
75 static void replace_in_call_usage
PARAMS ((rtx
*, unsigned int, rtx
, rtx
));
76 static int fixup_match_1
PARAMS ((rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int, FILE *))
78 static int reg_is_remote_constant_p
PARAMS ((rtx
, rtx
, rtx
));
79 static int stable_and_no_regs_but_for_p
PARAMS ((rtx
, rtx
, rtx
));
80 static int regclass_compatible_p
PARAMS ((int, int));
81 static int replacement_quality
PARAMS ((rtx
));
82 static int fixup_match_2
PARAMS ((rtx
, rtx
, rtx
, rtx
, FILE *));
84 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
85 causing too much register allocation problems. */
87 regclass_compatible_p (class0
, class1
)
90 return (class0
== class1
91 || (reg_class_subset_p (class0
, class1
)
92 && ! CLASS_LIKELY_SPILLED_P (class0
))
93 || (reg_class_subset_p (class1
, class0
)
94 && ! CLASS_LIKELY_SPILLED_P (class1
)));
97 /* Generate and return an insn body to add r1 and c,
98 storing the result in r0. */
100 gen_add3_insn (r0
, r1
, c
)
103 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
105 if (icode
== CODE_FOR_nothing
106 || ! ((*insn_data
[icode
].operand
[0].predicate
)
107 (r0
, insn_data
[icode
].operand
[0].mode
))
108 || ! ((*insn_data
[icode
].operand
[1].predicate
)
109 (r1
, insn_data
[icode
].operand
[1].mode
))
110 || ! ((*insn_data
[icode
].operand
[2].predicate
)
111 (c
, insn_data
[icode
].operand
[2].mode
)))
114 return (GEN_FCN (icode
) (r0
, r1
, c
));
118 /* INC_INSN is an instruction that adds INCREMENT to REG.
119 Try to fold INC_INSN as a post/pre in/decrement into INSN.
120 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
121 Return nonzero for success. */
123 try_auto_increment (insn
, inc_insn
, inc_insn_set
, reg
, increment
, pre
)
124 rtx reg
, insn
, inc_insn
,inc_insn_set
;
125 HOST_WIDE_INT increment
;
128 enum rtx_code inc_code
;
130 rtx pset
= single_set (insn
);
133 /* Can't use the size of SET_SRC, we might have something like
134 (sign_extend:SI (mem:QI ... */
135 rtx use
= find_use_as_address (pset
, reg
, 0);
136 if (use
!= 0 && use
!= (rtx
) 1)
138 int size
= GET_MODE_SIZE (GET_MODE (use
));
140 || (HAVE_POST_INCREMENT
141 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
142 || (HAVE_PRE_INCREMENT
143 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
144 || (HAVE_POST_DECREMENT
145 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
146 || (HAVE_PRE_DECREMENT
147 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
153 &SET_SRC (inc_insn_set
),
154 XEXP (SET_SRC (inc_insn_set
), 0), 1);
155 validate_change (insn
, &XEXP (use
, 0),
156 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
157 if (apply_change_group ())
159 /* If there is a REG_DEAD note on this insn, we must
160 change this not to REG_UNUSED meaning that the register
161 is set, but the value is dead. Failure to do so will
162 result in a sched1 abort -- when it recomputes lifetime
163 information, the number of REG_DEAD notes will have
165 rtx note
= find_reg_note (insn
, REG_DEAD
, reg
);
167 PUT_MODE (note
, REG_UNUSED
);
170 = gen_rtx_EXPR_LIST (REG_INC
,
171 reg
, REG_NOTES (insn
));
174 PUT_CODE (inc_insn
, NOTE
);
175 NOTE_LINE_NUMBER (inc_insn
) = NOTE_INSN_DELETED
;
176 NOTE_SOURCE_FILE (inc_insn
) = 0;
186 /* Determine if the pattern generated by add_optab has a clobber,
187 such as might be issued for a flags hard register. To make the
188 code elsewhere simpler, we handle cc0 in this same framework.
190 Return the register if one was discovered. Return NULL_RTX if
191 if no flags were found. Return pc_rtx if we got confused. */
194 discover_flags_reg ()
197 tmp
= gen_rtx_REG (word_mode
, 10000);
198 tmp
= gen_add3_insn (tmp
, tmp
, GEN_INT (2));
200 /* If we get something that isn't a simple set, or a
201 [(set ..) (clobber ..)], this whole function will go wrong. */
202 if (GET_CODE (tmp
) == SET
)
204 else if (GET_CODE (tmp
) == PARALLEL
)
208 if (XVECLEN (tmp
, 0) != 2)
210 tmp
= XVECEXP (tmp
, 0, 1);
211 if (GET_CODE (tmp
) != CLOBBER
)
215 /* Don't do anything foolish if the md wanted to clobber a
216 scratch or something. We only care about hard regs.
217 Moreover we don't like the notion of subregs of hard regs. */
218 if (GET_CODE (tmp
) == SUBREG
219 && GET_CODE (SUBREG_REG (tmp
)) == REG
220 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
222 found
= (GET_CODE (tmp
) == REG
&& REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
224 return (found
? tmp
: NULL_RTX
);
230 /* It is a tedious task identifying when the flags register is live and
231 when it is safe to optimize. Since we process the instruction stream
232 multiple times, locate and record these live zones by marking the
233 mode of the instructions --
235 QImode is used on the instruction at which the flags becomes live.
237 HImode is used within the range (exclusive) that the flags are
238 live. Thus the user of the flags is not marked.
240 All other instructions are cleared to VOIDmode. */
242 /* Used to communicate with flags_set_1. */
243 static rtx flags_set_1_rtx
;
244 static int flags_set_1_set
;
247 mark_flags_life_zones (flags
)
255 /* If we found a flags register on a cc0 host, bail. */
256 if (flags
== NULL_RTX
)
258 else if (flags
!= cc0_rtx
)
262 /* Simple cases first: if no flags, clear all modes. If confusing,
263 mark the entire function as being in a flags shadow. */
264 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
266 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
268 for (insn
= get_insns(); insn
; insn
= NEXT_INSN (insn
))
269 PUT_MODE (insn
, mode
);
277 flags_regno
= REGNO (flags
);
278 flags_nregs
= HARD_REGNO_NREGS (flags_regno
, GET_MODE (flags
));
280 flags_set_1_rtx
= flags
;
282 /* Process each basic block. */
283 for (block
= n_basic_blocks
- 1; block
>= 0; block
--)
288 insn
= BLOCK_HEAD (block
);
289 end
= BLOCK_END (block
);
291 /* Look out for the (unlikely) case of flags being live across
292 basic block boundaries. */
297 for (i
= 0; i
< flags_nregs
; ++i
)
298 live
|= REGNO_REG_SET_P (BASIC_BLOCK (block
)->global_live_at_start
,
305 /* Process liveness in reverse order of importance --
306 alive, death, birth. This lets more important info
307 overwrite the mode of lesser info. */
312 /* In the cc0 case, death is not marked in reg notes,
313 but is instead the mere use of cc0 when it is alive. */
314 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
317 /* In the hard reg case, we watch death notes. */
318 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
321 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
323 /* In either case, birth is denoted simply by it's presence
324 as the destination of a set. */
326 note_stores (PATTERN (insn
), flags_set_1
, NULL
);
330 PUT_MODE (insn
, QImode
);
334 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
338 insn
= NEXT_INSN (insn
);
343 /* A subroutine of mark_flags_life_zones, called through note_stores. */
346 flags_set_1 (x
, pat
, data
)
348 void *data ATTRIBUTE_UNUSED
;
350 if (GET_CODE (pat
) == SET
351 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
355 static int *regno_src_regno
;
357 /* Indicate how good a choice REG (which appears as a source) is to replace
358 a destination register with. The higher the returned value, the better
359 the choice. The main objective is to avoid using a register that is
360 a candidate for tying to a hard register, since the output might in
361 turn be a candidate to be tied to a different hard register. */
363 replacement_quality(reg
)
368 /* Bad if this isn't a register at all. */
369 if (GET_CODE (reg
) != REG
)
372 /* If this register is not meant to get a hard register,
373 it is a poor choice. */
374 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
377 src_regno
= regno_src_regno
[REGNO (reg
)];
379 /* If it was not copied from another register, it is fine. */
383 /* Copied from a hard register? */
384 if (src_regno
< FIRST_PSEUDO_REGISTER
)
387 /* Copied from a pseudo register - not as bad as from a hard register,
388 yet still cumbersome, since the register live length will be lengthened
389 when the registers get tied. */
393 /* Return 1 if INSN might end a basic block. */
395 static int perhaps_ends_bb_p (insn
)
398 switch (GET_CODE (insn
))
402 /* These always end a basic block. */
406 /* A CALL_INSN might be the last insn of a basic block, if it is inside
407 an EH region or if there are nonlocal gotos. Note that this test is
408 very conservative. */
409 if (nonlocal_goto_handler_labels
)
413 return can_throw_internal (insn
);
417 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
420 Search forward to see if SRC dies before either it or DEST is modified,
421 but don't scan past the end of a basic block. If so, we can replace SRC
422 with DEST and let SRC die in INSN.
424 This will reduce the number of registers live in that range and may enable
425 DEST to be tied to SRC, thus often saving one register in addition to a
426 register-register copy. */
429 optimize_reg_copy_1 (insn
, dest
, src
)
437 int sregno
= REGNO (src
);
438 int dregno
= REGNO (dest
);
440 /* We don't want to mess with hard regs if register classes are small. */
442 || (SMALL_REGISTER_CLASSES
443 && (sregno
< FIRST_PSEUDO_REGISTER
444 || dregno
< FIRST_PSEUDO_REGISTER
))
445 /* We don't see all updates to SP if they are in an auto-inc memory
446 reference, so we must disallow this optimization on them. */
447 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
450 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
452 /* ??? We can't scan past the end of a basic block without updating
453 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
454 if (perhaps_ends_bb_p (p
))
456 else if (! INSN_P (p
))
459 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
460 /* Don't change a USE of a register. */
461 || (GET_CODE (PATTERN (p
)) == USE
462 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
465 /* See if all of SRC dies in P. This test is slightly more
466 conservative than it needs to be. */
467 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
468 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
476 /* We can do the optimization. Scan forward from INSN again,
477 replacing regs as we go. Set FAILED if a replacement can't
478 be done. In that case, we can't move the death note for SRC.
479 This should be rare. */
481 /* Set to stop at next insn. */
482 for (q
= next_real_insn (insn
);
483 q
!= next_real_insn (p
);
484 q
= next_real_insn (q
))
486 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
488 /* If SRC is a hard register, we might miss some
489 overlapping registers with validate_replace_rtx,
490 so we would have to undo it. We can't if DEST is
491 present in the insn, so fail in that combination
493 if (sregno
< FIRST_PSEUDO_REGISTER
494 && reg_mentioned_p (dest
, PATTERN (q
)))
497 /* Replace all uses and make sure that the register
498 isn't still present. */
499 else if (validate_replace_rtx (src
, dest
, q
)
500 && (sregno
>= FIRST_PSEUDO_REGISTER
501 || ! reg_overlap_mentioned_p (src
,
506 validate_replace_rtx (dest
, src
, q
);
511 /* For SREGNO, count the total number of insns scanned.
512 For DREGNO, count the total number of insns scanned after
513 passing the death note for DREGNO. */
518 /* If the insn in which SRC dies is a CALL_INSN, don't count it
519 as a call that has been crossed. Otherwise, count it. */
520 if (q
!= p
&& GET_CODE (q
) == CALL_INSN
)
522 /* Similarly, total calls for SREGNO, total calls beyond
523 the death note for DREGNO. */
529 /* If DEST dies here, remove the death note and save it for
530 later. Make sure ALL of DEST dies here; again, this is
531 overly conservative. */
533 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
535 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
536 failed
= 1, dest_death
= 0;
538 remove_note (q
, dest_death
);
544 /* These counters need to be updated if and only if we are
545 going to move the REG_DEAD note. */
546 if (sregno
>= FIRST_PSEUDO_REGISTER
)
548 if (REG_LIVE_LENGTH (sregno
) >= 0)
550 REG_LIVE_LENGTH (sregno
) -= s_length
;
551 /* REG_LIVE_LENGTH is only an approximation after
552 combine if sched is not run, so make sure that we
553 still have a reasonable value. */
554 if (REG_LIVE_LENGTH (sregno
) < 2)
555 REG_LIVE_LENGTH (sregno
) = 2;
558 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
561 /* Move death note of SRC from P to INSN. */
562 remove_note (p
, note
);
563 XEXP (note
, 1) = REG_NOTES (insn
);
564 REG_NOTES (insn
) = note
;
567 /* DEST is also dead if INSN has a REG_UNUSED note for DEST. */
569 && (dest_death
= find_regno_note (insn
, REG_UNUSED
, dregno
)))
571 PUT_REG_NOTE_KIND (dest_death
, REG_DEAD
);
572 remove_note (insn
, dest_death
);
575 /* Put death note of DEST on P if we saw it die. */
578 XEXP (dest_death
, 1) = REG_NOTES (p
);
579 REG_NOTES (p
) = dest_death
;
581 if (dregno
>= FIRST_PSEUDO_REGISTER
)
583 /* If and only if we are moving the death note for DREGNO,
584 then we need to update its counters. */
585 if (REG_LIVE_LENGTH (dregno
) >= 0)
586 REG_LIVE_LENGTH (dregno
) += d_length
;
587 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
594 /* If SRC is a hard register which is set or killed in some other
595 way, we can't do this optimization. */
596 else if (sregno
< FIRST_PSEUDO_REGISTER
597 && dead_or_set_p (p
, src
))
603 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
604 a sequence of insns that modify DEST followed by an insn that sets
605 SRC to DEST in which DEST dies, with no prior modification of DEST.
606 (There is no need to check if the insns in between actually modify
607 DEST. We should not have cases where DEST is not modified, but
608 the optimization is safe if no such modification is detected.)
609 In that case, we can replace all uses of DEST, starting with INSN and
610 ending with the set of SRC to DEST, with SRC. We do not do this
611 optimization if a CALL_INSN is crossed unless SRC already crosses a
612 call or if DEST dies before the copy back to SRC.
614 It is assumed that DEST and SRC are pseudos; it is too complicated to do
615 this for hard registers since the substitutions we may make might fail. */
618 optimize_reg_copy_2 (insn
, dest
, src
)
625 int sregno
= REGNO (src
);
626 int dregno
= REGNO (dest
);
628 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
630 /* ??? We can't scan past the end of a basic block without updating
631 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
632 if (perhaps_ends_bb_p (p
))
634 else if (! INSN_P (p
))
637 set
= single_set (p
);
638 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
639 && find_reg_note (p
, REG_DEAD
, dest
))
641 /* We can do the optimization. Scan forward from INSN again,
642 replacing regs as we go. */
644 /* Set to stop at next insn. */
645 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
648 if (reg_mentioned_p (dest
, PATTERN (q
)))
649 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
652 if (GET_CODE (q
) == CALL_INSN
)
654 REG_N_CALLS_CROSSED (dregno
)--;
655 REG_N_CALLS_CROSSED (sregno
)++;
659 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
660 REG_N_DEATHS (dregno
)--;
661 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
662 REG_N_DEATHS (sregno
)--;
666 if (reg_set_p (src
, p
)
667 || find_reg_note (p
, REG_DEAD
, dest
)
668 || (GET_CODE (p
) == CALL_INSN
&& REG_N_CALLS_CROSSED (sregno
) == 0))
672 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
673 Look if SRC dies there, and if it is only set once, by loading
674 it from memory. If so, try to encorporate the zero/sign extension
675 into the memory read, change SRC to the mode of DEST, and alter
676 the remaining accesses to use the appropriate SUBREG. This allows
677 SRC and DEST to be tied later. */
679 optimize_reg_copy_3 (insn
, dest
, src
)
684 rtx src_reg
= XEXP (src
, 0);
685 int src_no
= REGNO (src_reg
);
686 int dst_no
= REGNO (dest
);
688 enum machine_mode old_mode
;
690 if (src_no
< FIRST_PSEUDO_REGISTER
691 || dst_no
< FIRST_PSEUDO_REGISTER
692 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
693 || REG_N_SETS (src_no
) != 1)
695 for (p
= PREV_INSN (insn
); p
&& ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
696 /* ??? We can't scan past the end of a basic block without updating
697 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
698 if (perhaps_ends_bb_p (p
))
704 if (! (set
= single_set (p
))
705 || GET_CODE (SET_SRC (set
)) != MEM
706 /* If there's a REG_EQUIV note, this must be an insn that loads an
707 argument. Prefer keeping the note over doing this optimization. */
708 || find_reg_note (p
, REG_EQUIV
, NULL_RTX
)
709 || SET_DEST (set
) != src_reg
)
712 /* Be conserative: although this optimization is also valid for
713 volatile memory references, that could cause trouble in later passes. */
714 if (MEM_VOLATILE_P (SET_SRC (set
)))
717 /* Do not use a SUBREG to truncate from one mode to another if truncation
719 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
720 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
721 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
724 old_mode
= GET_MODE (src_reg
);
725 PUT_MODE (src_reg
, GET_MODE (src
));
726 XEXP (src
, 0) = SET_SRC (set
);
728 /* Include this change in the group so that it's easily undone if
729 one of the changes in the group is invalid. */
730 validate_change (p
, &SET_SRC (set
), src
, 1);
732 /* Now walk forward making additional replacements. We want to be able
733 to undo all the changes if a later substitution fails. */
734 subreg
= gen_lowpart_SUBREG (old_mode
, src_reg
);
735 while (p
= NEXT_INSN (p
), p
!= insn
)
740 /* Make a tenative change. */
741 validate_replace_rtx_group (src_reg
, subreg
, p
);
744 validate_replace_rtx_group (src
, src_reg
, insn
);
746 /* Now see if all the changes are valid. */
747 if (! apply_change_group ())
749 /* One or more changes were no good. Back out everything. */
750 PUT_MODE (src_reg
, old_mode
);
751 XEXP (src
, 0) = src_reg
;
755 rtx note
= find_reg_note (p
, REG_EQUAL
, NULL_RTX
);
757 remove_note (p
, note
);
762 /* If we were not able to update the users of src to use dest directly, try
763 instead moving the value to dest directly before the operation. */
766 copy_src_to_dest (insn
, src
, dest
, old_max_uid
)
785 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
786 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
787 parameter when there is no frame pointer that is not allocated a register.
788 For now, we just reject them, rather than incrementing the live length. */
790 if (GET_CODE (src
) == REG
791 && REG_LIVE_LENGTH (REGNO (src
)) > 0
792 && GET_CODE (dest
) == REG
793 && !RTX_UNCHANGING_P (dest
)
794 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
795 && (set
= single_set (insn
)) != NULL_RTX
796 && !reg_mentioned_p (dest
, SET_SRC (set
))
797 && GET_MODE (src
) == GET_MODE (dest
))
799 int old_num_regs
= reg_rtx_no
;
801 /* Generate the src->dest move. */
803 emit_move_insn (dest
, src
);
804 seq
= gen_sequence ();
806 /* If this sequence uses new registers, we may not use it. */
807 if (old_num_regs
!= reg_rtx_no
808 || ! validate_replace_rtx (src
, dest
, insn
))
810 /* We have to restore reg_rtx_no to its old value, lest
811 recompute_reg_usage will try to compute the usage of the
812 new regs, yet reg_n_info is not valid for them. */
813 reg_rtx_no
= old_num_regs
;
816 emit_insn_before (seq
, insn
);
817 move_insn
= PREV_INSN (insn
);
818 p_move_notes
= ®_NOTES (move_insn
);
819 p_insn_notes
= ®_NOTES (insn
);
821 /* Move any notes mentioning src to the move instruction */
822 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
824 next
= XEXP (link
, 1);
825 if (XEXP (link
, 0) == src
)
827 *p_move_notes
= link
;
828 p_move_notes
= &XEXP (link
, 1);
832 *p_insn_notes
= link
;
833 p_insn_notes
= &XEXP (link
, 1);
837 *p_move_notes
= NULL_RTX
;
838 *p_insn_notes
= NULL_RTX
;
840 /* Is the insn the head of a basic block? If so extend it */
841 insn_uid
= INSN_UID (insn
);
842 move_uid
= INSN_UID (move_insn
);
843 if (insn_uid
< old_max_uid
)
845 bb
= regmove_bb_head
[insn_uid
];
848 BLOCK_HEAD (bb
) = move_insn
;
849 regmove_bb_head
[insn_uid
] = -1;
853 /* Update the various register tables. */
854 dest_regno
= REGNO (dest
);
855 REG_N_SETS (dest_regno
) ++;
856 REG_LIVE_LENGTH (dest_regno
)++;
857 if (REGNO_FIRST_UID (dest_regno
) == insn_uid
)
858 REGNO_FIRST_UID (dest_regno
) = move_uid
;
860 src_regno
= REGNO (src
);
861 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
862 REG_LIVE_LENGTH (src_regno
)++;
864 if (REGNO_FIRST_UID (src_regno
) == insn_uid
)
865 REGNO_FIRST_UID (src_regno
) = move_uid
;
867 if (REGNO_LAST_UID (src_regno
) == insn_uid
)
868 REGNO_LAST_UID (src_regno
) = move_uid
;
870 if (REGNO_LAST_NOTE_UID (src_regno
) == insn_uid
)
871 REGNO_LAST_NOTE_UID (src_regno
) = move_uid
;
876 /* Return whether REG is set in only one location, and is set to a
877 constant, but is set in a different basic block from INSN (an
878 instructions which uses REG). In this case REG is equivalent to a
879 constant, and we don't want to break that equivalence, because that
880 may increase register pressure and make reload harder. If REG is
881 set in the same basic block as INSN, we don't worry about it,
882 because we'll probably need a register anyhow (??? but what if REG
883 is used in a different basic block as well as this one?). FIRST is
884 the first insn in the function. */
887 reg_is_remote_constant_p (reg
, insn
, first
)
894 if (REG_N_SETS (REGNO (reg
)) != 1)
897 /* Look for the set. */
898 for (p
= LOG_LINKS (insn
); p
; p
= XEXP (p
, 1))
902 if (REG_NOTE_KIND (p
) != 0)
904 s
= single_set (XEXP (p
, 0));
906 && GET_CODE (SET_DEST (s
)) == REG
907 && REGNO (SET_DEST (s
)) == REGNO (reg
))
909 /* The register is set in the same basic block. */
914 for (p
= first
; p
&& p
!= insn
; p
= NEXT_INSN (p
))
922 && GET_CODE (SET_DEST (s
)) == REG
923 && REGNO (SET_DEST (s
)) == REGNO (reg
))
925 /* This is the instruction which sets REG. If there is a
926 REG_EQUAL note, then REG is equivalent to a constant. */
927 if (find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
936 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
937 another add immediate instruction with the same source and dest registers,
938 and if we find one, we change INSN to an increment, and return 1. If
939 no changes are made, we return 0.
942 (set (reg100) (plus reg1 offset1))
944 (set (reg100) (plus reg1 offset2))
946 (set (reg100) (plus reg1 offset1))
948 (set (reg100) (plus reg100 offset2-offset1)) */
950 /* ??? What does this comment mean? */
951 /* cse disrupts preincrement / postdecrement squences when it finds a
952 hard register as ultimate source, like the frame pointer. */
955 fixup_match_2 (insn
, dst
, src
, offset
, regmove_dump_file
)
956 rtx insn
, dst
, src
, offset
;
957 FILE *regmove_dump_file
;
959 rtx p
, dst_death
= 0;
960 int length
, num_calls
= 0;
962 /* If SRC dies in INSN, we'd have to move the death note. This is
963 considered to be very unlikely, so we just skip the optimization
965 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
968 /* Scan backward to find the first instruction that sets DST. */
970 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
974 /* ??? We can't scan past the end of a basic block without updating
975 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
976 if (perhaps_ends_bb_p (p
))
978 else if (! INSN_P (p
))
981 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
986 pset
= single_set (p
);
987 if (pset
&& SET_DEST (pset
) == dst
988 && GET_CODE (SET_SRC (pset
)) == PLUS
989 && XEXP (SET_SRC (pset
), 0) == src
990 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
992 HOST_WIDE_INT newconst
993 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
994 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
996 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
998 /* Remove the death note for DST from DST_DEATH. */
1001 remove_death (REGNO (dst
), dst_death
);
1002 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
1003 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
1006 if (regmove_dump_file
)
1007 fprintf (regmove_dump_file
,
1008 "Fixed operand of insn %d.\n",
1012 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1014 if (GET_CODE (p
) == CODE_LABEL
1015 || GET_CODE (p
) == JUMP_INSN
)
1019 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1021 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
1026 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1028 if (GET_CODE (p
) == CODE_LABEL
1029 || GET_CODE (p
) == JUMP_INSN
)
1033 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1035 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
1044 if (reg_set_p (dst
, PATTERN (p
)))
1047 /* If we have passed a call instruction, and the
1048 pseudo-reg SRC is not already live across a call,
1049 then don't perform the optimization. */
1050 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1051 hard regs are clobbered. Thus, we only use it for src for
1053 if (GET_CODE (p
) == CALL_INSN
)
1058 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1061 if (call_used_regs
[REGNO (dst
)]
1062 || find_reg_fusage (p
, CLOBBER
, dst
))
1065 else if (reg_set_p (src
, PATTERN (p
)))
1072 /* Main entry for the register move optimization.
1073 F is the first instruction.
1074 NREGS is one plus the highest pseudo-reg number used in the instruction.
1075 REGMOVE_DUMP_FILE is a stream for output of a trace of actions taken
1076 (or 0 if none should be output). */
1079 regmove_optimize (f
, nregs
, regmove_dump_file
)
1082 FILE *regmove_dump_file
;
1084 int old_max_uid
= get_max_uid ();
1089 rtx copy_src
, copy_dst
;
1091 /* ??? Hack. Regmove doesn't examine the CFG, and gets mightily
1092 confused by non-call exceptions ending blocks. */
1093 if (flag_non_call_exceptions
)
1096 /* Find out where a potential flags register is live, and so that we
1097 can supress some optimizations in those zones. */
1098 mark_flags_life_zones (discover_flags_reg ());
1100 regno_src_regno
= (int *) xmalloc (sizeof *regno_src_regno
* nregs
);
1101 for (i
= nregs
; --i
>= 0; ) regno_src_regno
[i
] = -1;
1103 regmove_bb_head
= (int *) xmalloc (sizeof (int) * (old_max_uid
+ 1));
1104 for (i
= old_max_uid
; i
>= 0; i
--) regmove_bb_head
[i
] = -1;
1105 for (i
= 0; i
< n_basic_blocks
; i
++)
1106 regmove_bb_head
[INSN_UID (BLOCK_HEAD (i
))] = i
;
1108 /* A forward/backward pass. Replace output operands with input operands. */
1110 for (pass
= 0; pass
<= 2; pass
++)
1112 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
1115 if (regmove_dump_file
)
1116 fprintf (regmove_dump_file
, "Starting %s pass...\n",
1117 pass
? "backward" : "forward");
1119 for (insn
= pass
? get_last_insn () : f
; insn
;
1120 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1123 int op_no
, match_no
;
1125 set
= single_set (insn
);
1129 if (flag_expensive_optimizations
&& ! pass
1130 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1131 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1132 && GET_CODE (XEXP (SET_SRC (set
), 0)) == REG
1133 && GET_CODE (SET_DEST(set
)) == REG
)
1134 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1136 if (flag_expensive_optimizations
&& ! pass
1137 && GET_CODE (SET_SRC (set
)) == REG
1138 && GET_CODE (SET_DEST(set
)) == REG
)
1140 /* If this is a register-register copy where SRC is not dead,
1141 see if we can optimize it. If this optimization succeeds,
1142 it will become a copy where SRC is dead. */
1143 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1144 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1145 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1147 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1148 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1149 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1150 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1151 && SET_SRC (set
) != SET_DEST (set
))
1153 int srcregno
= REGNO (SET_SRC(set
));
1154 if (regno_src_regno
[srcregno
] >= 0)
1155 srcregno
= regno_src_regno
[srcregno
];
1156 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1163 if (! find_matches (insn
, &match
))
1166 /* Now scan through the operands looking for a source operand
1167 which is supposed to match the destination operand.
1168 Then scan forward for an instruction which uses the dest
1170 If it dies there, then replace the dest in both operands with
1171 the source operand. */
1173 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1175 rtx src
, dst
, src_subreg
;
1176 enum reg_class src_class
, dst_class
;
1178 match_no
= match
.with
[op_no
];
1180 /* Nothing to do if the two operands aren't supposed to match. */
1184 src
= recog_data
.operand
[op_no
];
1185 dst
= recog_data
.operand
[match_no
];
1187 if (GET_CODE (src
) != REG
)
1191 if (GET_CODE (dst
) == SUBREG
1192 && GET_MODE_SIZE (GET_MODE (dst
))
1193 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1196 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst
)),
1197 src
, SUBREG_BYTE (dst
));
1198 dst
= SUBREG_REG (dst
);
1200 if (GET_CODE (dst
) != REG
1201 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1204 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1206 if (match
.commutative
[op_no
] < op_no
)
1207 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1211 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1214 /* op_no/src must be a read-only operand, and
1215 match_operand/dst must be a write-only operand. */
1216 if (match
.use
[op_no
] != READ
1217 || match
.use
[match_no
] != WRITE
)
1220 if (match
.early_clobber
[match_no
]
1221 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1224 /* Make sure match_operand is the destination. */
1225 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1228 /* If the operands already match, then there is nothing to do. */
1229 if (operands_match_p (src
, dst
))
1232 /* But in the commutative case, we might find a better match. */
1233 if (match
.commutative
[op_no
] >= 0)
1235 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1236 if (operands_match_p (comm
, dst
)
1237 && (replacement_quality (comm
)
1238 >= replacement_quality (src
)))
1242 src_class
= reg_preferred_class (REGNO (src
));
1243 dst_class
= reg_preferred_class (REGNO (dst
));
1244 if (! regclass_compatible_p (src_class
, dst_class
))
1247 if (GET_MODE (src
) != GET_MODE (dst
))
1250 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1258 /* A backward pass. Replace input operands with output operands. */
1260 if (regmove_dump_file
)
1261 fprintf (regmove_dump_file
, "Starting backward pass...\n");
1263 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1267 int op_no
, match_no
;
1270 if (! find_matches (insn
, &match
))
1273 /* Now scan through the operands looking for a destination operand
1274 which is supposed to match a source operand.
1275 Then scan backward for an instruction which sets the source
1276 operand. If safe, then replace the source operand with the
1277 dest operand in both instructions. */
1279 copy_src
= NULL_RTX
;
1280 copy_dst
= NULL_RTX
;
1281 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1283 rtx set
, p
, src
, dst
;
1284 rtx src_note
, dst_note
;
1286 enum reg_class src_class
, dst_class
;
1289 match_no
= match
.with
[op_no
];
1291 /* Nothing to do if the two operands aren't supposed to match. */
1295 dst
= recog_data
.operand
[match_no
];
1296 src
= recog_data
.operand
[op_no
];
1298 if (GET_CODE (src
) != REG
)
1301 if (GET_CODE (dst
) != REG
1302 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1303 || REG_LIVE_LENGTH (REGNO (dst
)) < 0
1304 || RTX_UNCHANGING_P (dst
))
1307 /* If the operands already match, then there is nothing to do. */
1308 if (operands_match_p (src
, dst
))
1311 if (match
.commutative
[op_no
] >= 0)
1313 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1314 if (operands_match_p (comm
, dst
))
1318 set
= single_set (insn
);
1322 /* Note that single_set ignores parts of a parallel set for
1323 which one of the destinations is REG_UNUSED. We can't
1324 handle that here, since we can wind up rewriting things
1325 such that a single register is set twice within a single
1327 if (reg_set_p (src
, insn
))
1330 /* match_no/dst must be a write-only operand, and
1331 operand_operand/src must be a read-only operand. */
1332 if (match
.use
[op_no
] != READ
1333 || match
.use
[match_no
] != WRITE
)
1336 if (match
.early_clobber
[match_no
]
1337 && count_occurrences (PATTERN (insn
), src
, 0) > 1)
1340 /* Make sure match_no is the destination. */
1341 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1344 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1346 if (GET_CODE (SET_SRC (set
)) == PLUS
1347 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1348 && XEXP (SET_SRC (set
), 0) == src
1349 && fixup_match_2 (insn
, dst
, src
,
1350 XEXP (SET_SRC (set
), 1),
1355 src_class
= reg_preferred_class (REGNO (src
));
1356 dst_class
= reg_preferred_class (REGNO (dst
));
1357 if (! regclass_compatible_p (src_class
, dst_class
))
1367 /* Can not modify an earlier insn to set dst if this insn
1368 uses an old value in the source. */
1369 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1379 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1390 /* If src is set once in a different basic block,
1391 and is set equal to a constant, then do not use
1392 it for this optimization, as this would make it
1393 no longer equivalent to a constant. */
1395 if (reg_is_remote_constant_p (src
, insn
, f
))
1406 if (regmove_dump_file
)
1407 fprintf (regmove_dump_file
,
1408 "Could fix operand %d of insn %d matching operand %d.\n",
1409 op_no
, INSN_UID (insn
), match_no
);
1411 /* Scan backward to find the first instruction that uses
1412 the input operand. If the operand is set here, then
1413 replace it in both instructions with match_no. */
1415 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1419 /* ??? We can't scan past the end of a basic block without
1420 updating the register lifetime info
1421 (REG_DEAD/basic_block_live_at_start). */
1422 if (perhaps_ends_bb_p (p
))
1424 else if (! INSN_P (p
))
1429 /* ??? See if all of SRC is set in P. This test is much
1430 more conservative than it needs to be. */
1431 pset
= single_set (p
);
1432 if (pset
&& SET_DEST (pset
) == src
)
1434 /* We use validate_replace_rtx, in case there
1435 are multiple identical source operands. All of
1436 them have to be changed at the same time. */
1437 if (validate_replace_rtx (src
, dst
, insn
))
1439 if (validate_change (p
, &SET_DEST (pset
),
1444 /* Change all source operands back.
1445 This modifies the dst as a side-effect. */
1446 validate_replace_rtx (dst
, src
, insn
);
1447 /* Now make sure the dst is right. */
1448 validate_change (insn
,
1449 recog_data
.operand_loc
[match_no
],
1456 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1457 || reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1460 /* If we have passed a call instruction, and the
1461 pseudo-reg DST is not already live across a call,
1462 then don't perform the optimization. */
1463 if (GET_CODE (p
) == CALL_INSN
)
1467 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1476 /* Remove the death note for SRC from INSN. */
1477 remove_note (insn
, src_note
);
1478 /* Move the death note for SRC to P if it is used
1480 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1482 XEXP (src_note
, 1) = REG_NOTES (p
);
1483 REG_NOTES (p
) = src_note
;
1485 /* If there is a REG_DEAD note for DST on P, then remove
1486 it, because DST is now set there. */
1487 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1488 remove_note (p
, dst_note
);
1490 dstno
= REGNO (dst
);
1491 srcno
= REGNO (src
);
1493 REG_N_SETS (dstno
)++;
1494 REG_N_SETS (srcno
)--;
1496 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1497 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1499 REG_LIVE_LENGTH (dstno
) += length
;
1500 if (REG_LIVE_LENGTH (srcno
) >= 0)
1502 REG_LIVE_LENGTH (srcno
) -= length
;
1503 /* REG_LIVE_LENGTH is only an approximation after
1504 combine if sched is not run, so make sure that we
1505 still have a reasonable value. */
1506 if (REG_LIVE_LENGTH (srcno
) < 2)
1507 REG_LIVE_LENGTH (srcno
) = 2;
1510 if (regmove_dump_file
)
1511 fprintf (regmove_dump_file
,
1512 "Fixed operand %d of insn %d matching operand %d.\n",
1513 op_no
, INSN_UID (insn
), match_no
);
1519 /* If we weren't able to replace any of the alternatives, try an
1520 alternative appoach of copying the source to the destination. */
1521 if (!success
&& copy_src
!= NULL_RTX
)
1522 copy_src_to_dest (insn
, copy_src
, copy_dst
, old_max_uid
);
1527 /* In fixup_match_1, some insns may have been inserted after basic block
1528 ends. Fix that here. */
1529 for (i
= 0; i
< n_basic_blocks
; i
++)
1531 rtx end
= BLOCK_END (i
);
1533 rtx next
= NEXT_INSN (new);
1534 while (next
!= 0 && INSN_UID (next
) >= old_max_uid
1535 && (i
== n_basic_blocks
- 1 || BLOCK_HEAD (i
+ 1) != next
))
1536 new = next
, next
= NEXT_INSN (new);
1537 BLOCK_END (i
) = new;
1542 free (regno_src_regno
);
1543 free (regmove_bb_head
);
1546 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1547 Returns 0 if INSN can't be recognized, or if the alternative can't be
1550 Initialize the info in MATCHP based on the constraints. */
1553 find_matches (insn
, matchp
)
1555 struct match
*matchp
;
1557 int likely_spilled
[MAX_RECOG_OPERANDS
];
1559 int any_matches
= 0;
1561 extract_insn (insn
);
1562 if (! constrain_operands (0))
1565 /* Must initialize this before main loop, because the code for
1566 the commutative case may set matches for operands other than
1568 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1569 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1571 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1577 p
= recog_data
.constraints
[op_no
];
1579 likely_spilled
[op_no
] = 0;
1580 matchp
->use
[op_no
] = READ
;
1581 matchp
->early_clobber
[op_no
] = 0;
1583 matchp
->use
[op_no
] = WRITE
;
1585 matchp
->use
[op_no
] = READWRITE
;
1587 for (;*p
&& i
< which_alternative
; p
++)
1591 while ((c
= *p
++) != '\0' && c
!= ',')
1599 matchp
->early_clobber
[op_no
] = 1;
1602 matchp
->commutative
[op_no
] = op_no
+ 1;
1603 matchp
->commutative
[op_no
+ 1] = op_no
;
1605 case '0': case '1': case '2': case '3': case '4':
1606 case '5': case '6': case '7': case '8': case '9':
1608 if (c
< op_no
&& likely_spilled
[(unsigned char) c
])
1610 matchp
->with
[op_no
] = c
;
1612 if (matchp
->commutative
[op_no
] >= 0)
1613 matchp
->with
[matchp
->commutative
[op_no
]] = c
;
1615 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1616 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1617 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1618 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1619 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c
)))
1620 likely_spilled
[op_no
] = 1;
1627 /* Try to replace all occurrences of DST_REG with SRC in LOC, that is
1628 assumed to be in INSN. */
1631 replace_in_call_usage (loc
, dst_reg
, src
, insn
)
1633 unsigned int dst_reg
;
1645 code
= GET_CODE (x
);
1648 if (REGNO (x
) != dst_reg
)
1651 validate_change (insn
, loc
, src
, 1);
1656 /* Process each of our operands recursively. */
1657 fmt
= GET_RTX_FORMAT (code
);
1658 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++, fmt
++)
1660 replace_in_call_usage (&XEXP (x
, i
), dst_reg
, src
, insn
);
1661 else if (*fmt
== 'E')
1662 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1663 replace_in_call_usage (& XVECEXP (x
, i
, j
), dst_reg
, src
, insn
);
1666 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1667 the only set in INSN. INSN has just been recognized and constrained.
1668 SRC is operand number OPERAND_NUMBER in INSN.
1669 DST is operand number MATCH_NUMBER in INSN.
1670 If BACKWARD is nonzero, we have been called in a backward pass.
1671 Return nonzero for success. */
1674 fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, backward
, operand_number
,
1675 match_number
, regmove_dump_file
)
1676 rtx insn
, set
, src
, src_subreg
, dst
;
1677 int backward
, operand_number
, match_number
;
1678 FILE *regmove_dump_file
;
1681 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1683 int num_calls
= 0, s_num_calls
= 0;
1684 enum rtx_code code
= NOTE
;
1685 HOST_WIDE_INT insn_const
= 0, newconst
;
1686 rtx overlap
= 0; /* need to move insn ? */
1687 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
= NULL_RTX
;
1688 int length
, s_length
;
1690 /* If SRC is marked as unchanging, we may not change it.
1691 ??? Maybe we could get better code by removing the unchanging bit
1692 instead, and changing it back if we don't succeed? */
1693 if (RTX_UNCHANGING_P (src
))
1698 /* Look for (set (regX) (op regA constX))
1699 (set (regY) (op regA constY))
1701 (set (regA) (op regA constX)).
1702 (set (regY) (op regA constY-constX)).
1703 This works for add and shift operations, if
1704 regA is dead after or set by the second insn. */
1706 code
= GET_CODE (SET_SRC (set
));
1707 if ((code
== PLUS
|| code
== LSHIFTRT
1708 || code
== ASHIFT
|| code
== ASHIFTRT
)
1709 && XEXP (SET_SRC (set
), 0) == src
1710 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1711 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1712 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1715 /* We might find a src_note while scanning. */
1719 if (regmove_dump_file
)
1720 fprintf (regmove_dump_file
,
1721 "Could fix operand %d of insn %d matching operand %d.\n",
1722 operand_number
, INSN_UID (insn
), match_number
);
1724 /* If SRC is equivalent to a constant set in a different basic block,
1725 then do not use it for this optimization. We want the equivalence
1726 so that if we have to reload this register, we can reload the
1727 constant, rather than extending the lifespan of the register. */
1728 if (reg_is_remote_constant_p (src
, insn
, get_insns ()))
1731 /* Scan forward to find the next instruction that
1732 uses the output operand. If the operand dies here,
1733 then replace it in both instructions with
1736 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1738 if (GET_CODE (p
) == CALL_INSN
)
1739 replace_in_call_usage (& CALL_INSN_FUNCTION_USAGE (p
),
1740 REGNO (dst
), src
, p
);
1742 /* ??? We can't scan past the end of a basic block without updating
1743 the register lifetime info (REG_DEAD/basic_block_live_at_start). */
1744 if (perhaps_ends_bb_p (p
))
1746 else if (! INSN_P (p
))
1753 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1754 || (GET_CODE (PATTERN (p
)) == USE
1755 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1758 /* See if all of DST dies in P. This test is
1759 slightly more conservative than it needs to be. */
1760 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1761 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1763 /* If we would be moving INSN, check that we won't move it
1764 into the shadow of a live a live flags register. */
1765 /* ??? We only try to move it in front of P, although
1766 we could move it anywhere between OVERLAP and P. */
1767 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1773 rtx set2
= NULL_RTX
;
1775 /* If an optimization is done, the value of SRC while P
1776 is executed will be changed. Check that this is OK. */
1777 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1779 for (q
= p
; q
; q
= NEXT_INSN (q
))
1781 /* ??? We can't scan past the end of a basic block without
1782 updating the register lifetime info
1783 (REG_DEAD/basic_block_live_at_start). */
1784 if (perhaps_ends_bb_p (q
))
1789 else if (! INSN_P (q
))
1791 else if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1792 || reg_set_p (src
, q
))
1796 set2
= single_set (q
);
1797 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1798 || XEXP (SET_SRC (set2
), 0) != src
1799 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1800 || (SET_DEST (set2
) != src
1801 && ! find_reg_note (q
, REG_DEAD
, src
)))
1803 /* If this is a PLUS, we can still save a register by doing
1806 src -= insn_const; .
1807 This also gives opportunities for subsequent
1808 optimizations in the backward pass, so do it there. */
1809 if (code
== PLUS
&& backward
1810 /* Don't do this if we can likely tie DST to SET_DEST
1811 of P later; we can't do this tying here if we got a
1813 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1815 && GET_CODE (SET_DEST (single_set (p
))) == REG
1816 && (REGNO (SET_DEST (single_set (p
)))
1817 < FIRST_PSEUDO_REGISTER
))
1818 /* We may only emit an insn directly after P if we
1819 are not in the shadow of a live flags register. */
1820 && GET_MODE (p
) == VOIDmode
)
1825 newconst
= -insn_const
;
1833 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1834 /* Reject out of range shifts. */
1837 || ((unsigned HOST_WIDE_INT
) newconst
1838 >= (GET_MODE_BITSIZE (GET_MODE
1839 (SET_SRC (set2
)))))))
1844 if (SET_DEST (set2
) != src
)
1845 post_inc_set
= set2
;
1848 /* We use 1 as last argument to validate_change so that all
1849 changes are accepted or rejected together by apply_change_group
1850 when it is called by validate_replace_rtx . */
1851 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1852 GEN_INT (newconst
), 1);
1854 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1855 if (validate_replace_rtx (dst
, src_subreg
, p
))
1860 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1862 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1864 /* INSN was already checked to be movable wrt. the registers that it
1865 sets / uses when we found no REG_DEAD note for src on it, but it
1866 still might clobber the flags register. We'll have to check that
1867 we won't insert it into the shadow of a live flags register when
1868 we finally know where we are to move it. */
1870 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1873 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1874 already live across a call, then don't perform the optimization. */
1875 if (GET_CODE (p
) == CALL_INSN
)
1877 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1891 /* Remove the death note for DST from P. */
1892 remove_note (p
, dst_note
);
1895 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1896 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1898 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1900 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1901 REG_N_SETS (REGNO (src
))++;
1902 REG_LIVE_LENGTH (REGNO (src
))++;
1906 /* The lifetime of src and dest overlap,
1907 but we can change this by moving insn. */
1908 rtx pat
= PATTERN (insn
);
1910 remove_note (overlap
, src_note
);
1911 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1913 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1917 rtx notes
= REG_NOTES (insn
);
1919 emit_insn_after_with_line_notes (pat
, PREV_INSN (p
), insn
);
1920 PUT_CODE (insn
, NOTE
);
1921 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1922 NOTE_SOURCE_FILE (insn
) = 0;
1923 /* emit_insn_after_with_line_notes has no
1924 return value, so search for the new insn. */
1926 while (! INSN_P (insn
) || PATTERN (insn
) != pat
)
1927 insn
= PREV_INSN (insn
);
1929 REG_NOTES (insn
) = notes
;
1932 /* Sometimes we'd generate src = const; src += n;
1933 if so, replace the instruction that set src
1934 in the first place. */
1936 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1938 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1939 rtx q
, set2
= NULL_RTX
;
1940 int num_calls2
= 0, s_length2
= 0;
1942 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1944 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN(q
))
1946 /* ??? We can't scan past the end of a basic block without
1947 updating the register lifetime info
1948 (REG_DEAD/basic_block_live_at_start). */
1949 if (perhaps_ends_bb_p (q
))
1954 else if (! INSN_P (q
))
1958 if (reg_set_p (src
, q
))
1960 set2
= single_set (q
);
1963 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1968 if (GET_CODE (p
) == CALL_INSN
)
1971 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1972 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
1975 NOTE_LINE_NUMBER (q
) = NOTE_INSN_DELETED
;
1976 NOTE_SOURCE_FILE (q
) = 0;
1977 REG_N_SETS (REGNO (src
))--;
1978 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
1979 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
1985 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1986 && (code
== PLUS
|| code
== MINUS
) && insn_const
1987 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
1989 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1991 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
1993 /* If post_inc still prevails, try to find an
1994 insn where it can be used as a pre-in/decrement.
1995 If code is MINUS, this was already tried. */
1996 if (post_inc
&& code
== PLUS
1997 /* Check that newconst is likely to be usable
1998 in a pre-in/decrement before starting the search. */
1999 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
2000 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
2001 && exact_log2 (newconst
))
2005 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
2006 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
2008 /* ??? We can't scan past the end of a basic block without updating
2009 the register lifetime info
2010 (REG_DEAD/basic_block_live_at_start). */
2011 if (perhaps_ends_bb_p (q
))
2013 else if (! INSN_P (q
))
2015 else if (src
!= inc_dest
2016 && (reg_overlap_mentioned_p (src
, PATTERN (q
))
2017 || reg_set_p (src
, q
)))
2019 else if (reg_set_p (inc_dest
, q
))
2021 else if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
2023 try_auto_increment (q
, post_inc
,
2024 post_inc_set
, inc_dest
, newconst
, 1);
2030 /* Move the death note for DST to INSN if it is used
2032 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
2034 XEXP (dst_note
, 1) = REG_NOTES (insn
);
2035 REG_NOTES (insn
) = dst_note
;
2040 /* Move the death note for SRC from INSN to P. */
2042 remove_note (insn
, src_note
);
2043 XEXP (src_note
, 1) = REG_NOTES (p
);
2044 REG_NOTES (p
) = src_note
;
2046 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
2049 REG_N_SETS (REGNO (src
))++;
2050 REG_N_SETS (REGNO (dst
))--;
2052 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
2054 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
2055 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
2057 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
2058 /* REG_LIVE_LENGTH is only an approximation after
2059 combine if sched is not run, so make sure that we
2060 still have a reasonable value. */
2061 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
2062 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
2064 if (regmove_dump_file
)
2065 fprintf (regmove_dump_file
,
2066 "Fixed operand %d of insn %d matching operand %d.\n",
2067 operand_number
, INSN_UID (insn
), match_number
);
2072 /* return nonzero if X is stable and mentions no regsiters but for
2073 mentioning SRC or mentioning / changing DST . If in doubt, presume
2075 The rationale is that we want to check if we can move an insn easily
2076 while just paying attention to SRC and DST. A register is considered
2077 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2078 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2079 want any registers but SRC and DST. */
2081 stable_and_no_regs_but_for_p (x
, src
, dst
)
2084 RTX_CODE code
= GET_CODE (x
);
2085 switch (GET_RTX_CLASS (code
))
2087 case '<': case '1': case 'c': case '2': case 'b': case '3':
2090 const char *fmt
= GET_RTX_FORMAT (code
);
2091 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2093 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2099 return x
== src
|| x
== dst
;
2100 /* If this is a MEM, look inside - there might be a register hidden in
2101 the address of an unchanging MEM. */
2103 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2107 return ! rtx_unstable_p (x
);
2111 /* Track stack adjustments and stack memory references. Attempt to
2112 reduce the number of stack adjustments by back-propogating across
2113 the memory references.
2115 This is intended primarily for use with targets that do not define
2116 ACCUMULATE_OUTGOING_ARGS. It is of significantly more value to
2117 targets that define PREFERRED_STACK_BOUNDARY more aligned than
2118 STACK_BOUNDARY (e.g. x86), or if not all registers can be pushed
2119 (e.g. x86 fp regs) which would ordinarily have to be implemented
2120 as a sub/mov pair due to restrictions in calls.c.
2122 Propogation stops when any of the insns that need adjusting are
2123 (a) no longer valid because we've exceeded their range, (b) a
2124 non-trivial push instruction, or (c) a call instruction.
2126 Restriction B is based on the assumption that push instructions
2127 are smaller or faster. If a port really wants to remove all
2128 pushes, it should have defined ACCUMULATE_OUTGOING_ARGS. The
2129 one exception that is made is for an add immediately followed
2132 /* This structure records stack memory references between stack adjusting
2137 HOST_WIDE_INT sp_offset
;
2139 struct csa_memlist
*next
;
2142 static int stack_memref_p
PARAMS ((rtx
));
2143 static rtx single_set_for_csa
PARAMS ((rtx
));
2144 static void free_csa_memlist
PARAMS ((struct csa_memlist
*));
2145 static struct csa_memlist
*record_one_stack_memref
2146 PARAMS ((rtx
, rtx
*, struct csa_memlist
*));
2147 static int try_apply_stack_adjustment
2148 PARAMS ((rtx
, struct csa_memlist
*, HOST_WIDE_INT
, HOST_WIDE_INT
));
2149 static void combine_stack_adjustments_for_block
PARAMS ((basic_block
));
2150 static int record_stack_memrefs
PARAMS ((rtx
*, void *));
2153 /* Main entry point for stack adjustment combination. */
2156 combine_stack_adjustments ()
2160 for (i
= 0; i
< n_basic_blocks
; ++i
)
2161 combine_stack_adjustments_for_block (BASIC_BLOCK (i
));
2164 /* Recognize a MEM of the form (sp) or (plus sp const). */
2170 if (GET_CODE (x
) != MEM
)
2174 if (x
== stack_pointer_rtx
)
2176 if (GET_CODE (x
) == PLUS
2177 && XEXP (x
, 0) == stack_pointer_rtx
2178 && GET_CODE (XEXP (x
, 1)) == CONST_INT
)
2184 /* Recognize either normal single_set or the hack in i386.md for
2185 tying fp and sp adjustments. */
2188 single_set_for_csa (insn
)
2192 rtx tmp
= single_set (insn
);
2196 if (GET_CODE (insn
) != INSN
2197 || GET_CODE (PATTERN (insn
)) != PARALLEL
)
2200 tmp
= PATTERN (insn
);
2201 if (GET_CODE (XVECEXP (tmp
, 0, 0)) != SET
)
2204 for (i
= 1; i
< XVECLEN (tmp
, 0); ++i
)
2206 rtx
this = XVECEXP (tmp
, 0, i
);
2208 /* The special case is allowing a no-op set. */
2209 if (GET_CODE (this) == SET
2210 && SET_SRC (this) == SET_DEST (this))
2212 else if (GET_CODE (this) != CLOBBER
2213 && GET_CODE (this) != USE
)
2217 return XVECEXP (tmp
, 0, 0);
2220 /* Free the list of csa_memlist nodes. */
2223 free_csa_memlist (memlist
)
2224 struct csa_memlist
*memlist
;
2226 struct csa_memlist
*next
;
2227 for (; memlist
; memlist
= next
)
2229 next
= memlist
->next
;
2234 /* Create a new csa_memlist node from the given memory reference.
2235 It is already known that the memory is stack_memref_p. */
2237 static struct csa_memlist
*
2238 record_one_stack_memref (insn
, mem
, next_memlist
)
2240 struct csa_memlist
*next_memlist
;
2242 struct csa_memlist
*ml
;
2244 ml
= (struct csa_memlist
*) xmalloc (sizeof (*ml
));
2246 if (XEXP (*mem
, 0) == stack_pointer_rtx
)
2249 ml
->sp_offset
= INTVAL (XEXP (XEXP (*mem
, 0), 1));
2253 ml
->next
= next_memlist
;
2258 /* Attempt to apply ADJUST to the stack adjusting insn INSN, as well
2259 as each of the memories in MEMLIST. Return true on success. */
2262 try_apply_stack_adjustment (insn
, memlist
, new_adjust
, delta
)
2264 struct csa_memlist
*memlist
;
2265 HOST_WIDE_INT new_adjust
, delta
;
2267 struct csa_memlist
*ml
;
2270 set
= single_set_for_csa (insn
);
2271 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (new_adjust
), 1);
2273 for (ml
= memlist
; ml
; ml
= ml
->next
)
2276 replace_equiv_address_nv (*ml
->mem
,
2277 plus_constant (stack_pointer_rtx
,
2278 ml
->sp_offset
- delta
)), 1);
2280 if (apply_change_group ())
2282 /* Succeeded. Update our knowledge of the memory references. */
2283 for (ml
= memlist
; ml
; ml
= ml
->next
)
2284 ml
->sp_offset
-= delta
;
2292 /* Called via for_each_rtx and used to record all stack memory references in
2293 the insn and discard all other stack pointer references. */
2294 struct record_stack_memrefs_data
2297 struct csa_memlist
*memlist
;
2301 record_stack_memrefs (xp
, data
)
2306 struct record_stack_memrefs_data
*d
=
2307 (struct record_stack_memrefs_data
*) data
;
2310 switch (GET_CODE (x
))
2313 if (!reg_mentioned_p (stack_pointer_rtx
, x
))
2315 /* We are not able to handle correctly all possible memrefs containing
2316 stack pointer, so this check is neccesary. */
2317 if (stack_memref_p (x
))
2319 d
->memlist
= record_one_stack_memref (d
->insn
, xp
, d
->memlist
);
2324 /* ??? We want be able to handle non-memory stack pointer
2325 references later. For now just discard all insns refering to
2326 stack pointer outside mem expressions. We would probably
2327 want to teach validate_replace to simplify expressions first.
2329 We can't just compare with STACK_POINTER_RTX because the
2330 reference to the stack pointer might be in some other mode.
2331 In particular, an explict clobber in an asm statement will
2332 result in a QImode clober. */
2333 if (REGNO (x
) == STACK_POINTER_REGNUM
)
2342 /* Subroutine of combine_stack_adjustments, called for each basic block. */
2345 combine_stack_adjustments_for_block (bb
)
2348 HOST_WIDE_INT last_sp_adjust
= 0;
2349 rtx last_sp_set
= NULL_RTX
;
2350 struct csa_memlist
*memlist
= NULL
;
2353 struct record_stack_memrefs_data data
;
2355 for (insn
= bb
->head
; ; insn
= next
)
2359 pending_delete
= NULL_RTX
;
2360 next
= NEXT_INSN (insn
);
2362 if (! INSN_P (insn
))
2365 set
= single_set_for_csa (insn
);
2368 rtx dest
= SET_DEST (set
);
2369 rtx src
= SET_SRC (set
);
2371 /* Find constant additions to the stack pointer. */
2372 if (dest
== stack_pointer_rtx
2373 && GET_CODE (src
) == PLUS
2374 && XEXP (src
, 0) == stack_pointer_rtx
2375 && GET_CODE (XEXP (src
, 1)) == CONST_INT
)
2377 HOST_WIDE_INT this_adjust
= INTVAL (XEXP (src
, 1));
2379 /* If we've not seen an adjustment previously, record
2380 it now and continue. */
2384 last_sp_adjust
= this_adjust
;
2388 /* If not all recorded memrefs can be adjusted, or the
2389 adjustment is now too large for a constant addition,
2390 we cannot merge the two stack adjustments.
2392 Also we need to be carefull to not move stack pointer
2393 such that we create stack accesses outside the allocated
2394 area. We can combine an allocation into the first insn,
2395 or a deallocation into the second insn. We can not
2396 combine an allocation followed by a deallocation.
2398 The only somewhat frequent ocurrence of the later is when
2399 a function allocates a stack frame but does not use it.
2400 For this case, we would need to analyze rtl stream to be
2401 sure that allocated area is really unused. This means not
2402 only checking the memory references, but also all registers
2403 or global memory references possibly containing a stack
2406 Perhaps the best way to address this problem is to teach
2407 gcc not to allocate stack for objects never used. */
2409 /* Combine an allocation into the first instruction. */
2410 if (STACK_GROWS_DOWNWARD
? this_adjust
<= 0 : this_adjust
>= 0)
2412 if (try_apply_stack_adjustment (last_sp_set
, memlist
,
2413 last_sp_adjust
+ this_adjust
,
2417 pending_delete
= insn
;
2418 last_sp_adjust
+= this_adjust
;
2423 /* Otherwise we have a deallocation. Do not combine with
2424 a previous allocation. Combine into the second insn. */
2425 else if (STACK_GROWS_DOWNWARD
2426 ? last_sp_adjust
>= 0 : last_sp_adjust
<= 0)
2428 if (try_apply_stack_adjustment (insn
, memlist
,
2429 last_sp_adjust
+ this_adjust
,
2433 flow_delete_insn (last_sp_set
);
2435 last_sp_adjust
+= this_adjust
;
2436 free_csa_memlist (memlist
);
2442 /* Combination failed. Restart processing from here. */
2443 free_csa_memlist (memlist
);
2446 last_sp_adjust
= this_adjust
;
2450 /* Find a predecrement of exactly the previous adjustment and
2451 turn it into a direct store. Obviously we can't do this if
2452 there were any intervening uses of the stack pointer. */
2454 && GET_CODE (dest
) == MEM
2455 && ((GET_CODE (XEXP (dest
, 0)) == PRE_DEC
2457 == (HOST_WIDE_INT
) GET_MODE_SIZE (GET_MODE (dest
))))
2458 || (GET_CODE (XEXP (dest
, 0)) == PRE_MODIFY
2459 && GET_CODE (XEXP (XEXP (dest
, 0), 1)) == PLUS
2460 && XEXP (XEXP (XEXP (dest
, 0), 1), 0) == stack_pointer_rtx
2461 && (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2463 && (INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
2464 == -last_sp_adjust
)))
2465 && XEXP (XEXP (dest
, 0), 0) == stack_pointer_rtx
2466 && ! reg_mentioned_p (stack_pointer_rtx
, src
)
2467 && memory_address_p (GET_MODE (dest
), stack_pointer_rtx
)
2468 && validate_change (insn
, &SET_DEST (set
),
2469 replace_equiv_address (dest
,
2473 if (last_sp_set
== bb
->head
)
2474 bb
->head
= NEXT_INSN (last_sp_set
);
2475 flow_delete_insn (last_sp_set
);
2477 free_csa_memlist (memlist
);
2479 last_sp_set
= NULL_RTX
;
2486 data
.memlist
= memlist
;
2487 if (GET_CODE (insn
) != CALL_INSN
&& last_sp_set
2488 && !for_each_rtx (&PATTERN (insn
), record_stack_memrefs
, &data
))
2490 memlist
= data
.memlist
;
2493 memlist
= data
.memlist
;
2495 /* Otherwise, we were not able to process the instruction.
2496 Do not continue collecting data across such a one. */
2498 && (GET_CODE (insn
) == CALL_INSN
2499 || reg_mentioned_p (stack_pointer_rtx
, PATTERN (insn
))))
2501 free_csa_memlist (memlist
);
2503 last_sp_set
= NULL_RTX
;
2508 if (insn
== bb
->end
)
2512 flow_delete_insn (pending_delete
);
2517 bb
->end
= PREV_INSN (pending_delete
);
2518 flow_delete_insn (pending_delete
);