recog.c (reg_fits_class_p): Check both regno and regno + offset are hard registers.
[gcc.git] / gcc / regs.h
1 /* Define per-register tables for data flow info and register allocation.
2 Copyright (C) 1987, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free Software
4 Foundation, Inc.
5
6 This file is part of GCC.
7
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
12
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
21
22 #ifndef GCC_REGS_H
23 #define GCC_REGS_H
24
25 #include "machmode.h"
26 #include "hard-reg-set.h"
27 #include "rtl.h"
28
29 #define REG_BYTES(R) mode_size[(int) GET_MODE (R)]
30
31 /* When you only have the mode of a pseudo register before it has a hard
32 register chosen for it, this reports the size of each hard register
33 a pseudo in such a mode would get allocated to. A target may
34 override this. */
35
36 #ifndef REGMODE_NATURAL_SIZE
37 #define REGMODE_NATURAL_SIZE(MODE) UNITS_PER_WORD
38 #endif
39
40 /* Maximum register number used in this function, plus one. */
41
42 extern int max_regno;
43
44 /* REG_N_REFS and REG_N_SETS are initialized by a call to
45 regstat_init_n_sets_and_refs from the current values of
46 DF_REG_DEF_COUNT and DF_REG_USE_COUNT. REG_N_REFS and REG_N_SETS
47 should only be used if a pass need to change these values in some
48 magical way or the pass needs to have accurate values for these
49 and is not using incremental df scanning.
50
51 At the end of a pass that uses REG_N_REFS and REG_N_SETS, a call
52 should be made to regstat_free_n_sets_and_refs.
53
54 Local alloc seems to play pretty loose with these values.
55 REG_N_REFS is set to 0 if the register is used in an asm.
56 Furthermore, local_alloc calls regclass to hack both REG_N_REFS and
57 REG_N_SETS for three address insns. Other passes seem to have
58 other special values. */
59
60
61
62 /* Structure to hold values for REG_N_SETS (i) and REG_N_REFS (i). */
63
64 struct regstat_n_sets_and_refs_t
65 {
66 int sets; /* # of times (REG n) is set */
67 int refs; /* # of times (REG n) is used or set */
68 };
69
70 extern struct regstat_n_sets_and_refs_t *regstat_n_sets_and_refs;
71
72 /* Indexed by n, gives number of times (REG n) is used or set. */
73 static inline int
74 REG_N_REFS(int regno)
75 {
76 return regstat_n_sets_and_refs[regno].refs;
77 }
78
79 /* Indexed by n, gives number of times (REG n) is used or set. */
80 #define SET_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs = V)
81 #define INC_REG_N_REFS(N,V) (regstat_n_sets_and_refs[N].refs += V)
82
83 /* Indexed by n, gives number of times (REG n) is set. */
84 static inline int
85 REG_N_SETS (int regno)
86 {
87 return regstat_n_sets_and_refs[regno].sets;
88 }
89
90 /* Indexed by n, gives number of times (REG n) is set. */
91 #define SET_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets = V)
92 #define INC_REG_N_SETS(N,V) (regstat_n_sets_and_refs[N].sets += V)
93
94
95 /* Functions defined in reg-stat.c. */
96 extern void regstat_init_n_sets_and_refs (void);
97 extern void regstat_free_n_sets_and_refs (void);
98 extern void regstat_compute_ri (void);
99 extern void regstat_free_ri (void);
100 extern bitmap regstat_get_setjmp_crosses (void);
101 extern void regstat_compute_calls_crossed (void);
102 extern void regstat_free_calls_crossed (void);
103
104
105 /* Register information indexed by register number. This structure is
106 initialized by calling regstat_compute_ri and is destroyed by
107 calling regstat_free_ri. */
108 struct reg_info_t
109 {
110 int freq; /* # estimated frequency (REG n) is used or set */
111 int deaths; /* # of times (REG n) dies */
112 int live_length; /* # of instructions (REG n) is live */
113 int calls_crossed; /* # of calls (REG n) is live across */
114 int freq_calls_crossed; /* # estimated frequency (REG n) crosses call */
115 int throw_calls_crossed; /* # of calls that may throw (REG n) is live across */
116 int basic_block; /* # of basic blocks (REG n) is used in */
117 };
118
119 extern struct reg_info_t *reg_info_p;
120
121 /* The number allocated elements of reg_info_p. */
122 extern size_t reg_info_p_size;
123
124 /* Estimate frequency of references to register N. */
125
126 #define REG_FREQ(N) (reg_info_p[N].freq)
127
128 /* The weights for each insn varies from 0 to REG_FREQ_BASE.
129 This constant does not need to be high, as in infrequently executed
130 regions we want to count instructions equivalently to optimize for
131 size instead of speed. */
132 #define REG_FREQ_MAX 1000
133
134 /* Compute register frequency from the BB frequency. When optimizing for size,
135 or profile driven feedback is available and the function is never executed,
136 frequency is always equivalent. Otherwise rescale the basic block
137 frequency. */
138 #define REG_FREQ_FROM_BB(bb) (optimize_size \
139 || (flag_branch_probabilities \
140 && !ENTRY_BLOCK_PTR->count) \
141 ? REG_FREQ_MAX \
142 : ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
143 ? ((bb)->frequency * REG_FREQ_MAX / BB_FREQ_MAX)\
144 : 1)
145
146 /* Indexed by N, gives number of insns in which register N dies.
147 Note that if register N is live around loops, it can die
148 in transitions between basic blocks, and that is not counted here.
149 So this is only a reliable indicator of how many regions of life there are
150 for registers that are contained in one basic block. */
151
152 #define REG_N_DEATHS(N) (reg_info_p[N].deaths)
153
154 /* Get the number of consecutive words required to hold pseudo-reg N. */
155
156 #define PSEUDO_REGNO_SIZE(N) \
157 ((GET_MODE_SIZE (PSEUDO_REGNO_MODE (N)) + UNITS_PER_WORD - 1) \
158 / UNITS_PER_WORD)
159
160 /* Get the number of bytes required to hold pseudo-reg N. */
161
162 #define PSEUDO_REGNO_BYTES(N) \
163 GET_MODE_SIZE (PSEUDO_REGNO_MODE (N))
164
165 /* Get the machine mode of pseudo-reg N. */
166
167 #define PSEUDO_REGNO_MODE(N) GET_MODE (regno_reg_rtx[N])
168
169 /* Indexed by N, gives number of CALL_INSNS across which (REG n) is live. */
170
171 #define REG_N_CALLS_CROSSED(N) (reg_info_p[N].calls_crossed)
172 #define REG_FREQ_CALLS_CROSSED(N) (reg_info_p[N].freq_calls_crossed)
173
174 /* Indexed by N, gives number of CALL_INSNS that may throw, across which
175 (REG n) is live. */
176
177 #define REG_N_THROWING_CALLS_CROSSED(N) (reg_info_p[N].throw_calls_crossed)
178
179 /* Total number of instructions at which (REG n) is live. The larger
180 this is, the less priority (REG n) gets for allocation in a hard
181 register (in global-alloc). This is set in df-problems.c whenever
182 register info is requested and remains valid for the rest of the
183 compilation of the function; it is used to control register
184 allocation.
185
186 local-alloc.c may alter this number to change the priority.
187
188 Negative values are special.
189 -1 is used to mark a pseudo reg which has a constant or memory equivalent
190 and is used infrequently enough that it should not get a hard register.
191 -2 is used to mark a pseudo reg for a parameter, when a frame pointer
192 is not required. global.c makes an allocno for this but does
193 not try to assign a hard register to it. */
194
195 #define REG_LIVE_LENGTH(N) (reg_info_p[N].live_length)
196
197 /* Indexed by n, gives number of basic block that (REG n) is used in.
198 If the value is REG_BLOCK_GLOBAL (-1),
199 it means (REG n) is used in more than one basic block.
200 REG_BLOCK_UNKNOWN (0) means it hasn't been seen yet so we don't know.
201 This information remains valid for the rest of the compilation
202 of the current function; it is used to control register allocation. */
203
204 #define REG_BLOCK_UNKNOWN 0
205 #define REG_BLOCK_GLOBAL -1
206
207 #define REG_BASIC_BLOCK(N) (reg_info_p[N].basic_block)
208
209 /* Vector of substitutions of register numbers,
210 used to map pseudo regs into hardware regs.
211
212 This can't be folded into reg_n_info without changing all of the
213 machine dependent directories, since the reload functions
214 in the machine dependent files access it. */
215
216 extern short *reg_renumber;
217
218 /* Flag set by local-alloc or global-alloc if they decide to allocate
219 something in a call-clobbered register. */
220
221 extern int caller_save_needed;
222
223 /* Predicate to decide whether to give a hard reg to a pseudo which
224 is referenced REFS times and would need to be saved and restored
225 around a call CALLS times. */
226
227 #ifndef CALLER_SAVE_PROFITABLE
228 #define CALLER_SAVE_PROFITABLE(REFS, CALLS) (4 * (CALLS) < (REFS))
229 #endif
230
231 /* Select a register mode required for caller save of hard regno REGNO. */
232 #ifndef HARD_REGNO_CALLER_SAVE_MODE
233 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
234 choose_hard_reg_mode (REGNO, NREGS, false)
235 #endif
236
237 /* Registers that get partially clobbered by a call in a given mode.
238 These must not be call used registers. */
239 #ifndef HARD_REGNO_CALL_PART_CLOBBERED
240 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) 0
241 #endif
242
243 typedef unsigned short move_table[N_REG_CLASSES];
244
245 /* Target-dependent globals. */
246 struct target_regs {
247 /* For each starting hard register, the number of consecutive hard
248 registers that a given machine mode occupies. */
249 unsigned char x_hard_regno_nregs[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE];
250
251 /* For each hard register, the widest mode object that it can contain.
252 This will be a MODE_INT mode if the register can hold integers. Otherwise
253 it will be a MODE_FLOAT or a MODE_CC mode, whichever is valid for the
254 register. */
255 enum machine_mode x_reg_raw_mode[FIRST_PSEUDO_REGISTER];
256
257 /* Vector indexed by machine mode saying whether there are regs of
258 that mode. */
259 bool x_have_regs_of_mode[MAX_MACHINE_MODE];
260
261 /* 1 if the corresponding class contains a register of the given mode. */
262 char x_contains_reg_of_mode[N_REG_CLASSES][MAX_MACHINE_MODE];
263
264 /* Maximum cost of moving from a register in one class to a register
265 in another class. Based on TARGET_REGISTER_MOVE_COST. */
266 move_table *x_move_cost[MAX_MACHINE_MODE];
267
268 /* Similar, but here we don't have to move if the first index is a
269 subset of the second so in that case the cost is zero. */
270 move_table *x_may_move_in_cost[MAX_MACHINE_MODE];
271
272 /* Similar, but here we don't have to move if the first index is a
273 superset of the second so in that case the cost is zero. */
274 move_table *x_may_move_out_cost[MAX_MACHINE_MODE];
275
276 /* Keep track of the last mode we initialized move costs for. */
277 int x_last_mode_for_init_move_cost;
278
279 /* Record for each mode whether we can move a register directly to or
280 from an object of that mode in memory. If we can't, we won't try
281 to use that mode directly when accessing a field of that mode. */
282 char x_direct_load[NUM_MACHINE_MODES];
283 char x_direct_store[NUM_MACHINE_MODES];
284
285 /* Record for each mode whether we can float-extend from memory. */
286 bool x_float_extend_from_mem[NUM_MACHINE_MODES][NUM_MACHINE_MODES];
287 };
288
289 extern struct target_regs default_target_regs;
290 #if SWITCHABLE_TARGET
291 extern struct target_regs *this_target_regs;
292 #else
293 #define this_target_regs (&default_target_regs)
294 #endif
295
296 #define hard_regno_nregs \
297 (this_target_regs->x_hard_regno_nregs)
298 #define reg_raw_mode \
299 (this_target_regs->x_reg_raw_mode)
300 #define have_regs_of_mode \
301 (this_target_regs->x_have_regs_of_mode)
302 #define contains_reg_of_mode \
303 (this_target_regs->x_contains_reg_of_mode)
304 #define move_cost \
305 (this_target_regs->x_move_cost)
306 #define may_move_in_cost \
307 (this_target_regs->x_may_move_in_cost)
308 #define may_move_out_cost \
309 (this_target_regs->x_may_move_out_cost)
310 #define direct_load \
311 (this_target_regs->x_direct_load)
312 #define direct_store \
313 (this_target_regs->x_direct_store)
314 #define float_extend_from_mem \
315 (this_target_regs->x_float_extend_from_mem)
316
317 /* Return an exclusive upper bound on the registers occupied by hard
318 register (reg:MODE REGNO). */
319
320 static inline unsigned int
321 end_hard_regno (enum machine_mode mode, unsigned int regno)
322 {
323 return regno + hard_regno_nregs[regno][(int) mode];
324 }
325
326 /* Likewise for hard register X. */
327
328 #define END_HARD_REGNO(X) end_hard_regno (GET_MODE (X), REGNO (X))
329
330 /* Likewise for hard or pseudo register X. */
331
332 #define END_REGNO(X) (HARD_REGISTER_P (X) ? END_HARD_REGNO (X) : REGNO (X) + 1)
333
334 /* Add to REGS all the registers required to store a value of mode MODE
335 in register REGNO. */
336
337 static inline void
338 add_to_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
339 unsigned int regno)
340 {
341 unsigned int end_regno;
342
343 end_regno = end_hard_regno (mode, regno);
344 do
345 SET_HARD_REG_BIT (*regs, regno);
346 while (++regno < end_regno);
347 }
348
349 /* Likewise, but remove the registers. */
350
351 static inline void
352 remove_from_hard_reg_set (HARD_REG_SET *regs, enum machine_mode mode,
353 unsigned int regno)
354 {
355 unsigned int end_regno;
356
357 end_regno = end_hard_regno (mode, regno);
358 do
359 CLEAR_HARD_REG_BIT (*regs, regno);
360 while (++regno < end_regno);
361 }
362
363 /* Return true if REGS contains the whole of (reg:MODE REGNO). */
364
365 static inline bool
366 in_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
367 unsigned int regno)
368 {
369 unsigned int end_regno;
370
371 gcc_assert (HARD_REGISTER_NUM_P (regno));
372
373 if (!TEST_HARD_REG_BIT (regs, regno))
374 return false;
375
376 end_regno = end_hard_regno (mode, regno);
377
378 if (!HARD_REGISTER_NUM_P (end_regno - 1))
379 return false;
380
381 while (++regno < end_regno)
382 if (!TEST_HARD_REG_BIT (regs, regno))
383 return false;
384
385 return true;
386 }
387
388 /* Return true if (reg:MODE REGNO) includes an element of REGS. */
389
390 static inline bool
391 overlaps_hard_reg_set_p (const HARD_REG_SET regs, enum machine_mode mode,
392 unsigned int regno)
393 {
394 unsigned int end_regno;
395
396 if (TEST_HARD_REG_BIT (regs, regno))
397 return true;
398
399 end_regno = end_hard_regno (mode, regno);
400 while (++regno < end_regno)
401 if (TEST_HARD_REG_BIT (regs, regno))
402 return true;
403
404 return false;
405 }
406
407 /* Like add_to_hard_reg_set, but use a REGNO/NREGS range instead of
408 REGNO and MODE. */
409
410 static inline void
411 add_range_to_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
412 int nregs)
413 {
414 while (nregs-- > 0)
415 SET_HARD_REG_BIT (*regs, regno + nregs);
416 }
417
418 /* Likewise, but remove the registers. */
419
420 static inline void
421 remove_range_from_hard_reg_set (HARD_REG_SET *regs, unsigned int regno,
422 int nregs)
423 {
424 while (nregs-- > 0)
425 CLEAR_HARD_REG_BIT (*regs, regno + nregs);
426 }
427
428 /* Like overlaps_hard_reg_set_p, but use a REGNO/NREGS range instead of
429 REGNO and MODE. */
430 static inline bool
431 range_overlaps_hard_reg_set_p (const HARD_REG_SET set, unsigned regno,
432 int nregs)
433 {
434 while (nregs-- > 0)
435 if (TEST_HARD_REG_BIT (set, regno + nregs))
436 return true;
437 return false;
438 }
439
440 /* Like in_hard_reg_set_p, but use a REGNO/NREGS range instead of
441 REGNO and MODE. */
442 static inline bool
443 range_in_hard_reg_set_p (const HARD_REG_SET set, unsigned regno, int nregs)
444 {
445 while (nregs-- > 0)
446 if (!TEST_HARD_REG_BIT (set, regno + nregs))
447 return false;
448 return true;
449 }
450
451 #endif /* GCC_REGS_H */