1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2020 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with CHECKING_P, since it is awfully slow. */
93 #include "coretypes.h"
105 #include "rtl-error.h"
107 #include "addresses.h"
108 #include "function-abi.h"
110 /* True if X is a constant that can be forced into the constant pool.
111 MODE is the mode of the operand, or VOIDmode if not known. */
112 #define CONST_POOL_OK_P(MODE, X) \
113 ((MODE) != VOIDmode \
115 && GET_CODE (X) != HIGH \
116 && !targetm.cannot_force_const_mem (MODE, X))
118 /* True if C is a non-empty register class that has too few registers
119 to be safely used as a reload target class. */
122 small_register_class_p (reg_class_t rclass
)
124 return (reg_class_size
[(int) rclass
] == 1
125 || (reg_class_size
[(int) rclass
] >= 1
126 && targetm
.class_likely_spilled_p (rclass
)));
130 /* All reloads of the current insn are recorded here. See reload.h for
133 struct reload rld
[MAX_RELOADS
];
135 /* All the "earlyclobber" operands of the current insn
136 are recorded here. */
138 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
140 int reload_n_operands
;
142 /* Replacing reloads.
144 If `replace_reloads' is nonzero, then as each reload is recorded
145 an entry is made for it in the table `replacements'.
146 Then later `subst_reloads' can look through that table and
147 perform all the replacements needed. */
149 /* Nonzero means record the places to replace. */
150 static int replace_reloads
;
152 /* Each replacement is recorded with a structure like this. */
155 rtx
*where
; /* Location to store in */
156 int what
; /* which reload this is for */
157 machine_mode mode
; /* mode it must have */
160 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
162 /* Number of replacements currently recorded. */
163 static int n_replacements
;
165 /* Used to track what is modified by an operand. */
168 int reg_flag
; /* Nonzero if referencing a register. */
169 int safe
; /* Nonzero if this can't conflict with anything. */
170 rtx base
; /* Base address for MEM. */
171 poly_int64_pod start
; /* Starting offset or register number. */
172 poly_int64_pod end
; /* Ending offset or register number. */
175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
183 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
184 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
185 static int secondary_memlocs_elim_used
= 0;
187 /* The instruction we are doing reloads for;
188 so we can test whether a register dies in it. */
189 static rtx_insn
*this_insn
;
191 /* Nonzero if this instruction is a user-specified asm with operands. */
192 static int this_insn_is_asm
;
194 /* If hard_regs_live_known is nonzero,
195 we can tell which hard regs are currently live,
196 at least enough to succeed in choosing dummy reloads. */
197 static int hard_regs_live_known
;
199 /* Indexed by hard reg number,
200 element is nonnegative if hard reg has been spilled.
201 This vector is passed to `find_reloads' as an argument
202 and is not changed here. */
203 static short *static_reload_reg_p
;
205 /* Set to 1 in subst_reg_equivs if it changes anything. */
206 static int subst_reg_equivs_changed
;
208 /* On return from push_reload, holds the reload-number for the OUT
209 operand, which can be different for that from the input operand. */
210 static int output_reloadnum
;
212 /* Compare two RTX's. */
213 #define MATCHES(x, y) \
214 (x == y || (x != 0 && (REG_P (x) \
215 ? REG_P (y) && REGNO (x) == REGNO (y) \
216 : rtx_equal_p (x, y) && ! side_effects_p (x))))
218 /* Indicates if two reloads purposes are for similar enough things that we
219 can merge their reloads. */
220 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
221 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
222 || ((when1) == (when2) && (op1) == (op2)) \
223 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
224 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
225 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
226 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
227 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
229 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
230 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
231 ((when1) != (when2) \
232 || ! ((op1) == (op2) \
233 || (when1) == RELOAD_FOR_INPUT \
234 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
235 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
237 /* If we are going to reload an address, compute the reload type to
239 #define ADDR_TYPE(type) \
240 ((type) == RELOAD_FOR_INPUT_ADDRESS \
241 ? RELOAD_FOR_INPADDR_ADDRESS \
242 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
243 ? RELOAD_FOR_OUTADDR_ADDRESS \
246 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
247 machine_mode
, enum reload_type
,
248 enum insn_code
*, secondary_reload_info
*);
249 static enum reg_class
find_valid_class (machine_mode
, machine_mode
,
251 static void push_replacement (rtx
*, int, machine_mode
);
252 static void dup_replacements (rtx
*, rtx
*);
253 static void combine_reloads (void);
254 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
255 enum reload_type
, int, int);
256 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, machine_mode
,
257 machine_mode
, reg_class_t
, int, int);
258 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
259 static struct decomposition
decompose (rtx
);
260 static int immune_p (rtx
, rtx
, struct decomposition
);
261 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
262 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int,
264 static rtx
make_memloc (rtx
, int);
265 static int maybe_memory_address_addr_space_p (machine_mode
, rtx
,
266 addr_space_t
, rtx
*);
267 static int find_reloads_address (machine_mode
, rtx
*, rtx
, rtx
*,
268 int, enum reload_type
, int, rtx_insn
*);
269 static rtx
subst_reg_equivs (rtx
, rtx_insn
*);
270 static rtx
subst_indexed_address (rtx
);
271 static void update_auto_inc_notes (rtx_insn
*, int, int);
272 static int find_reloads_address_1 (machine_mode
, addr_space_t
, rtx
, int,
273 enum rtx_code
, enum rtx_code
, rtx
*,
274 int, enum reload_type
,int, rtx_insn
*);
275 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
277 enum reload_type
, int);
278 static rtx
find_reloads_subreg_address (rtx
, int, enum reload_type
,
279 int, rtx_insn
*, int *);
280 static void copy_replacements_1 (rtx
*, rtx
*, int);
281 static poly_int64
find_inc_amount (rtx
, rtx
);
282 static int refers_to_mem_for_reload_p (rtx
);
283 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
286 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
290 push_reg_equiv_alt_mem (int regno
, rtx mem
)
294 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
295 if (rtx_equal_p (XEXP (it
, 0), mem
))
298 reg_equiv_alt_mem_list (regno
)
299 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
300 reg_equiv_alt_mem_list (regno
));
303 /* Determine if any secondary reloads are needed for loading (if IN_P is
304 nonzero) or storing (if IN_P is zero) X to or from a reload register of
305 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
306 are needed, push them.
308 Return the reload number of the secondary reload we made, or -1 if
309 we didn't need one. *PICODE is set to the insn_code to use if we do
310 need a secondary reload. */
313 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
314 enum reg_class reload_class
,
315 machine_mode reload_mode
, enum reload_type type
,
316 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
318 enum reg_class rclass
= NO_REGS
;
319 enum reg_class scratch_class
;
320 machine_mode mode
= reload_mode
;
321 enum insn_code icode
= CODE_FOR_nothing
;
322 enum insn_code t_icode
= CODE_FOR_nothing
;
323 enum reload_type secondary_type
;
324 int s_reload
, t_reload
= -1;
325 const char *scratch_constraint
;
326 secondary_reload_info sri
;
328 if (type
== RELOAD_FOR_INPUT_ADDRESS
329 || type
== RELOAD_FOR_OUTPUT_ADDRESS
330 || type
== RELOAD_FOR_INPADDR_ADDRESS
331 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
332 secondary_type
= type
;
334 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
336 *picode
= CODE_FOR_nothing
;
338 /* If X is a paradoxical SUBREG, use the inner value to determine both the
339 mode and object being reloaded. */
340 if (paradoxical_subreg_p (x
))
343 reload_mode
= GET_MODE (x
);
346 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
347 is still a pseudo-register by now, it *must* have an equivalent MEM
348 but we don't want to assume that), use that equivalent when seeing if
349 a secondary reload is needed since whether or not a reload is needed
350 might be sensitive to the form of the MEM. */
352 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
353 && reg_equiv_mem (REGNO (x
)))
354 x
= reg_equiv_mem (REGNO (x
));
356 sri
.icode
= CODE_FOR_nothing
;
357 sri
.prev_sri
= prev_sri
;
358 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
360 icode
= (enum insn_code
) sri
.icode
;
362 /* If we don't need any secondary registers, done. */
363 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
366 if (rclass
!= NO_REGS
)
367 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
368 reload_mode
, type
, &t_icode
, &sri
);
370 /* If we will be using an insn, the secondary reload is for a
373 if (icode
!= CODE_FOR_nothing
)
375 /* If IN_P is nonzero, the reload register will be the output in
376 operand 0. If IN_P is zero, the reload register will be the input
377 in operand 1. Outputs should have an initial "=", which we must
380 /* ??? It would be useful to be able to handle only two, or more than
381 three, operands, but for now we can only handle the case of having
382 exactly three: output, input and one temp/scratch. */
383 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
385 /* ??? We currently have no way to represent a reload that needs
386 an icode to reload from an intermediate tertiary reload register.
387 We should probably have a new field in struct reload to tag a
388 chain of scratch operand reloads onto. */
389 gcc_assert (rclass
== NO_REGS
);
391 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
392 gcc_assert (*scratch_constraint
== '=');
393 scratch_constraint
++;
394 if (*scratch_constraint
== '&')
395 scratch_constraint
++;
396 scratch_class
= (reg_class_for_constraint
397 (lookup_constraint (scratch_constraint
)));
399 rclass
= scratch_class
;
400 mode
= insn_data
[(int) icode
].operand
[2].mode
;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 cannot use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
418 || t_icode
!= CODE_FOR_nothing
);
420 /* See if we can reuse an existing secondary reload. */
421 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
422 if (rld
[s_reload
].secondary_p
423 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
424 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
425 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
426 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
427 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
428 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
429 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
430 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
431 && (small_register_class_p (rclass
)
432 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
433 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
434 opnum
, rld
[s_reload
].opnum
))
437 rld
[s_reload
].inmode
= mode
;
439 rld
[s_reload
].outmode
= mode
;
441 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
442 rld
[s_reload
].rclass
= rclass
;
444 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
445 rld
[s_reload
].optional
&= optional
;
446 rld
[s_reload
].secondary_p
= 1;
447 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
448 opnum
, rld
[s_reload
].opnum
))
449 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
454 if (s_reload
== n_reloads
)
456 /* If we need a memory location to copy between the two reload regs,
457 set it up now. Note that we do the input case before making
458 the reload and the output case after. This is due to the
459 way reloads are output. */
461 if (in_p
&& icode
== CODE_FOR_nothing
462 && targetm
.secondary_memory_needed (mode
, rclass
, reload_class
))
464 get_secondary_mem (x
, reload_mode
, opnum
, type
);
466 /* We may have just added new reloads. Make sure we add
467 the new reload at the end. */
468 s_reload
= n_reloads
;
471 /* We need to make a new secondary reload for this register class. */
472 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
473 rld
[s_reload
].rclass
= rclass
;
475 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
476 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
477 rld
[s_reload
].reg_rtx
= 0;
478 rld
[s_reload
].optional
= optional
;
479 rld
[s_reload
].inc
= 0;
480 /* Maybe we could combine these, but it seems too tricky. */
481 rld
[s_reload
].nocombine
= 1;
482 rld
[s_reload
].in_reg
= 0;
483 rld
[s_reload
].out_reg
= 0;
484 rld
[s_reload
].opnum
= opnum
;
485 rld
[s_reload
].when_needed
= secondary_type
;
486 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
487 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
488 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
489 rld
[s_reload
].secondary_out_icode
490 = ! in_p
? t_icode
: CODE_FOR_nothing
;
491 rld
[s_reload
].secondary_p
= 1;
495 if (! in_p
&& icode
== CODE_FOR_nothing
496 && targetm
.secondary_memory_needed (mode
, reload_class
, rclass
))
497 get_secondary_mem (x
, mode
, opnum
, type
);
504 /* If a secondary reload is needed, return its class. If both an intermediate
505 register and a scratch register is needed, we return the class of the
506 intermediate register. */
508 secondary_reload_class (bool in_p
, reg_class_t rclass
, machine_mode mode
,
511 enum insn_code icode
;
512 secondary_reload_info sri
;
514 sri
.icode
= CODE_FOR_nothing
;
517 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
518 icode
= (enum insn_code
) sri
.icode
;
520 /* If there are no secondary reloads at all, we return NO_REGS.
521 If an intermediate register is needed, we return its class. */
522 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
525 /* No intermediate register is needed, but we have a special reload
526 pattern, which we assume for now needs a scratch register. */
527 return scratch_reload_class (icode
);
530 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
531 three operands, verify that operand 2 is an output operand, and return
533 ??? We'd like to be able to handle any pattern with at least 2 operands,
534 for zero or more scratch registers, but that needs more infrastructure. */
536 scratch_reload_class (enum insn_code icode
)
538 const char *scratch_constraint
;
539 enum reg_class rclass
;
541 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
542 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
543 gcc_assert (*scratch_constraint
== '=');
544 scratch_constraint
++;
545 if (*scratch_constraint
== '&')
546 scratch_constraint
++;
547 rclass
= reg_class_for_constraint (lookup_constraint (scratch_constraint
));
548 gcc_assert (rclass
!= NO_REGS
);
552 /* Return a memory location that will be used to copy X in mode MODE.
553 If we haven't already made a location for this mode in this insn,
554 call find_reloads_address on the location being returned. */
557 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, machine_mode mode
,
558 int opnum
, enum reload_type type
)
563 /* By default, if MODE is narrower than a word, widen it to a word.
564 This is required because most machines that require these memory
565 locations do not support short load and stores from all registers
566 (e.g., FP registers). */
568 mode
= targetm
.secondary_memory_needed_mode (mode
);
570 /* If we already have made a MEM for this operand in MODE, return it. */
571 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
572 return secondary_memlocs_elim
[(int) mode
][opnum
];
574 /* If this is the first time we've tried to get a MEM for this mode,
575 allocate a new one. `something_changed' in reload will get set
576 by noticing that the frame size has changed. */
578 if (secondary_memlocs
[(int) mode
] == 0)
580 #ifdef SECONDARY_MEMORY_NEEDED_RTX
581 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
583 secondary_memlocs
[(int) mode
]
584 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
588 /* Get a version of the address doing any eliminations needed. If that
589 didn't give us a new MEM, make a new one if it isn't valid. */
591 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
592 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
593 MEM_ADDR_SPACE (loc
));
595 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
596 loc
= copy_rtx (loc
);
598 /* The only time the call below will do anything is if the stack
599 offset is too large. In that case IND_LEVELS doesn't matter, so we
600 can just pass a zero. Adjust the type to be the address of the
601 corresponding object. If the address was valid, save the eliminated
602 address. If it wasn't valid, we need to make a reload each time, so
607 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
608 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
611 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
615 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
616 if (secondary_memlocs_elim_used
<= (int)mode
)
617 secondary_memlocs_elim_used
= (int)mode
+ 1;
621 /* Clear any secondary memory locations we've made. */
624 clear_secondary_mem (void)
626 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
630 /* Find the largest class which has at least one register valid in
631 mode INNER, and which for every such register, that register number
632 plus N is also valid in OUTER (if in range) and is cheap to move
633 into REGNO. Such a class must exist. */
635 static enum reg_class
636 find_valid_class (machine_mode outer ATTRIBUTE_UNUSED
,
637 machine_mode inner ATTRIBUTE_UNUSED
, int n
,
638 unsigned int dest_regno ATTRIBUTE_UNUSED
)
643 enum reg_class best_class
= NO_REGS
;
644 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
645 unsigned int best_size
= 0;
648 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
652 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
653 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
655 if (targetm
.hard_regno_mode_ok (regno
, inner
))
658 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
659 && !targetm
.hard_regno_mode_ok (regno
+ n
, outer
))
666 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
668 if ((reg_class_size
[rclass
] > best_size
669 && (best_cost
< 0 || best_cost
>= cost
))
672 best_class
= (enum reg_class
) rclass
;
673 best_size
= reg_class_size
[rclass
];
674 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
679 gcc_assert (best_size
!= 0);
684 /* We are trying to reload a subreg of something that is not a register.
685 Find the largest class which contains only registers valid in
686 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
687 which we would eventually like to obtain the object. */
689 static enum reg_class
690 find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED
,
691 machine_mode mode ATTRIBUTE_UNUSED
,
692 enum reg_class dest_class ATTRIBUTE_UNUSED
)
697 enum reg_class best_class
= NO_REGS
;
698 unsigned int best_size
= 0;
701 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
703 unsigned int computed_rclass_size
= 0;
705 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
707 if (in_hard_reg_set_p (reg_class_contents
[rclass
], mode
, regno
)
708 && targetm
.hard_regno_mode_ok (regno
, mode
))
709 computed_rclass_size
++;
712 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
714 if ((computed_rclass_size
> best_size
715 && (best_cost
< 0 || best_cost
>= cost
))
718 best_class
= (enum reg_class
) rclass
;
719 best_size
= computed_rclass_size
;
720 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
725 gcc_assert (best_size
!= 0);
727 #ifdef LIMIT_RELOAD_CLASS
728 best_class
= LIMIT_RELOAD_CLASS (mode
, best_class
);
733 /* Return the number of a previously made reload that can be combined with
734 a new one, or n_reloads if none of the existing reloads can be used.
735 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
736 push_reload, they determine the kind of the new reload that we try to
737 combine. P_IN points to the corresponding value of IN, which can be
738 modified by this function.
739 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
742 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
743 enum reload_type type
, int opnum
, int dont_share
)
747 /* We can't merge two reloads if the output of either one is
750 if (earlyclobber_operand_p (out
))
753 /* We can use an existing reload if the class is right
754 and at least one of IN and OUT is a match
755 and the other is at worst neutral.
756 (A zero compared against anything is neutral.)
758 For targets with small register classes, don't use existing reloads
759 unless they are for the same thing since that can cause us to need
760 more reload registers than we otherwise would. */
762 for (i
= 0; i
< n_reloads
; i
++)
763 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
764 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
765 /* If the existing reload has a register, it must fit our class. */
766 && (rld
[i
].reg_rtx
== 0
767 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
768 true_regnum (rld
[i
].reg_rtx
)))
769 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
770 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
771 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
772 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
773 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
774 && (small_register_class_p (rclass
)
775 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
776 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
779 /* Reloading a plain reg for input can match a reload to postincrement
780 that reg, since the postincrement's value is the right value.
781 Likewise, it can match a preincrement reload, since we regard
782 the preincrementation as happening before any ref in this insn
784 for (i
= 0; i
< n_reloads
; i
++)
785 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
786 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
787 /* If the existing reload has a register, it must fit our
789 && (rld
[i
].reg_rtx
== 0
790 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
791 true_regnum (rld
[i
].reg_rtx
)))
792 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
794 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
795 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
796 || (REG_P (rld
[i
].in
)
797 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
798 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
799 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
800 && (small_register_class_p (rclass
)
801 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
802 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
803 opnum
, rld
[i
].opnum
))
805 /* Make sure reload_in ultimately has the increment,
806 not the plain register. */
816 (a) (subreg:OUTER_MODE REG ...) represents a word or subword subreg
817 of a multiword value; and
819 (b) the number of *words* in REG does not match the number of *registers*
823 complex_word_subreg_p (machine_mode outer_mode
, rtx reg
)
825 machine_mode inner_mode
= GET_MODE (reg
);
826 poly_uint64 reg_words
= REG_NREGS (reg
) * UNITS_PER_WORD
;
827 return (known_le (GET_MODE_SIZE (outer_mode
), UNITS_PER_WORD
)
828 && maybe_gt (GET_MODE_SIZE (inner_mode
), UNITS_PER_WORD
)
829 && !known_equal_after_align_up (GET_MODE_SIZE (inner_mode
),
830 reg_words
, UNITS_PER_WORD
));
833 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
834 expression. MODE is the mode that X will be used in. OUTPUT is true if
835 the function is invoked for the output part of an enclosing reload. */
838 reload_inner_reg_of_subreg (rtx x
, machine_mode mode
, bool output
)
842 /* Only SUBREGs are problematical. */
843 if (GET_CODE (x
) != SUBREG
)
846 inner
= SUBREG_REG (x
);
848 /* If INNER is a constant or PLUS, then INNER will need reloading. */
849 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
852 /* If INNER is not a hard register, then INNER will not need reloading. */
853 if (!(REG_P (inner
) && HARD_REGISTER_P (inner
)))
856 /* If INNER is not ok for MODE, then INNER will need reloading. */
857 if (!targetm
.hard_regno_mode_ok (subreg_regno (x
), mode
))
860 /* If this is for an output, and the outer part is a word or smaller,
861 INNER is larger than a word and the number of registers in INNER is
862 not the same as the number of words in INNER, then INNER will need
863 reloading (with an in-out reload). */
864 return output
&& complex_word_subreg_p (mode
, inner
);
867 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
868 requiring an extra reload register. The caller has already found that
869 IN contains some reference to REGNO, so check that we can produce the
870 new value in a single step. E.g. if we have
871 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
872 instruction that adds one to a register, this should succeed.
873 However, if we have something like
874 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
875 needs to be loaded into a register first, we need a separate reload
877 Such PLUS reloads are generated by find_reload_address_part.
878 The out-of-range PLUS expressions are usually introduced in the instruction
879 patterns by register elimination and substituting pseudos without a home
880 by their function-invariant equivalences. */
882 can_reload_into (rtx in
, int regno
, machine_mode mode
)
887 struct recog_data_d save_recog_data
;
889 /* For matching constraints, we often get notional input reloads where
890 we want to use the original register as the reload register. I.e.
891 technically this is a non-optional input-output reload, but IN is
892 already a valid register, and has been chosen as the reload register.
893 Speed this up, since it trivially works. */
897 /* To test MEMs properly, we'd have to take into account all the reloads
898 that are already scheduled, which can become quite complicated.
899 And since we've already handled address reloads for this MEM, it
900 should always succeed anyway. */
904 /* If we can make a simple SET insn that does the job, everything should
906 dst
= gen_rtx_REG (mode
, regno
);
907 test_insn
= make_insn_raw (gen_rtx_SET (dst
, in
));
908 save_recog_data
= recog_data
;
909 if (recog_memoized (test_insn
) >= 0)
911 extract_insn (test_insn
);
912 r
= constrain_operands (1, get_enabled_alternatives (test_insn
));
914 recog_data
= save_recog_data
;
918 /* Record one reload that needs to be performed.
919 IN is an rtx saying where the data are to be found before this instruction.
920 OUT says where they must be stored after the instruction.
921 (IN is zero for data not read, and OUT is zero for data not written.)
922 INLOC and OUTLOC point to the places in the instructions where
923 IN and OUT were found.
924 If IN and OUT are both nonzero, it means the same register must be used
925 to reload both IN and OUT.
927 RCLASS is a register class required for the reloaded data.
928 INMODE is the machine mode that the instruction requires
929 for the reg that replaces IN and OUTMODE is likewise for OUT.
931 If IN is zero, then OUT's location and mode should be passed as
934 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
936 OPTIONAL nonzero means this reload does not need to be performed:
937 it can be discarded if that is more convenient.
939 OPNUM and TYPE say what the purpose of this reload is.
941 The return value is the reload-number for this reload.
943 If both IN and OUT are nonzero, in some rare cases we might
944 want to make two separate reloads. (Actually we never do this now.)
945 Therefore, the reload-number for OUT is stored in
946 output_reloadnum when we return; the return value applies to IN.
947 Usually (presently always), when IN and OUT are nonzero,
948 the two reload-numbers are equal, but the caller should be careful to
952 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
953 enum reg_class rclass
, machine_mode inmode
,
954 machine_mode outmode
, int strict_low
, int optional
,
955 int opnum
, enum reload_type type
)
959 int dont_remove_subreg
= 0;
960 #ifdef LIMIT_RELOAD_CLASS
961 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
963 int secondary_in_reload
= -1, secondary_out_reload
= -1;
964 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
965 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
966 enum reg_class subreg_in_class ATTRIBUTE_UNUSED
;
967 subreg_in_class
= NO_REGS
;
969 /* INMODE and/or OUTMODE could be VOIDmode if no mode
970 has been specified for the operand. In that case,
971 use the operand's mode as the mode to reload. */
972 if (inmode
== VOIDmode
&& in
!= 0)
973 inmode
= GET_MODE (in
);
974 if (outmode
== VOIDmode
&& out
!= 0)
975 outmode
= GET_MODE (out
);
977 /* If find_reloads and friends until now missed to replace a pseudo
978 with a constant of reg_equiv_constant something went wrong
980 Note that it can't simply be done here if we missed it earlier
981 since the constant might need to be pushed into the literal pool
982 and the resulting memref would probably need further
984 if (in
!= 0 && REG_P (in
))
986 int regno
= REGNO (in
);
988 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
989 || reg_renumber
[regno
] >= 0
990 || reg_equiv_constant (regno
) == NULL_RTX
);
993 /* reg_equiv_constant only contains constants which are obviously
994 not appropriate as destination. So if we would need to replace
995 the destination pseudo with a constant we are in real
997 if (out
!= 0 && REG_P (out
))
999 int regno
= REGNO (out
);
1001 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1002 || reg_renumber
[regno
] >= 0
1003 || reg_equiv_constant (regno
) == NULL_RTX
);
1006 /* If we have a read-write operand with an address side-effect,
1007 change either IN or OUT so the side-effect happens only once. */
1008 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
1009 switch (GET_CODE (XEXP (in
, 0)))
1011 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
1012 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
1015 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
1016 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
1023 /* If we are reloading a (SUBREG constant ...), really reload just the
1024 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1025 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1026 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1027 register is a pseudo, also reload the inside expression.
1028 For machines that extend byte loads, do this for any SUBREG of a pseudo
1029 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1030 M2 is an integral mode that gets extended when loaded.
1031 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1032 where either M1 is not valid for R or M2 is wider than a word but we
1033 only need one register to store an M2-sized quantity in R.
1034 (However, if OUT is nonzero, we need to reload the reg *and*
1035 the subreg, so do nothing here, and let following statement handle it.)
1037 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1038 we can't handle it here because CONST_INT does not indicate a mode.
1040 Similarly, we must reload the inside expression if we have a
1041 STRICT_LOW_PART (presumably, in == out in this case).
1043 Also reload the inner expression if it does not require a secondary
1044 reload but the SUBREG does.
1046 Also reload the inner expression if it is a register that is in
1047 the class whose registers cannot be referenced in a different size
1048 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1049 cannot reload just the inside since we might end up with the wrong
1050 register class. But if it is inside a STRICT_LOW_PART, we have
1051 no choice, so we hope we do get the right register class there.
1053 Finally, reload the inner expression if it is a pseudo that will
1054 become a MEM and the MEM has a mode-dependent address, as in that
1055 case we obviously cannot change the mode of the MEM to that of the
1056 containing SUBREG as that would change the interpretation of the
1059 scalar_int_mode inner_mode
;
1060 if (in
!= 0 && GET_CODE (in
) == SUBREG
1061 && targetm
.can_change_mode_class (GET_MODE (SUBREG_REG (in
)),
1063 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (in
))]
1065 || (subreg_lowpart_p (in
)
1066 && (CONSTANT_P (SUBREG_REG (in
))
1067 || GET_CODE (SUBREG_REG (in
)) == PLUS
1068 || (((REG_P (SUBREG_REG (in
))
1069 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1070 || MEM_P (SUBREG_REG (in
)))
1071 && (paradoxical_subreg_p (inmode
,
1072 GET_MODE (SUBREG_REG (in
)))
1073 || (known_le (GET_MODE_SIZE (inmode
), UNITS_PER_WORD
)
1074 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG
1077 && GET_MODE_SIZE (inner_mode
) <= UNITS_PER_WORD
1078 && paradoxical_subreg_p (inmode
, inner_mode
)
1079 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)
1080 || (WORD_REGISTER_OPERATIONS
1081 && partial_subreg_p (inmode
,
1082 GET_MODE (SUBREG_REG (in
)))
1083 && (known_equal_after_align_down
1084 (GET_MODE_SIZE (inmode
) - 1,
1085 GET_MODE_SIZE (GET_MODE (SUBREG_REG
1088 || (REG_P (SUBREG_REG (in
))
1089 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1090 /* The case where out is nonzero
1091 is handled differently in the following statement. */
1092 && (out
== 0 || subreg_lowpart_p (in
))
1093 && (complex_word_subreg_p (inmode
, SUBREG_REG (in
))
1094 || !targetm
.hard_regno_mode_ok (subreg_regno (in
),
1096 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1097 && (secondary_reload_class (1, rclass
,
1098 GET_MODE (SUBREG_REG (in
)),
1101 || (REG_P (SUBREG_REG (in
))
1102 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1103 && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (in
)),
1104 GET_MODE (SUBREG_REG (in
)),
1106 || (REG_P (SUBREG_REG (in
))
1107 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
1108 && reg_equiv_mem (REGNO (SUBREG_REG (in
)))
1109 && (mode_dependent_address_p
1110 (XEXP (reg_equiv_mem (REGNO (SUBREG_REG (in
))), 0),
1111 MEM_ADDR_SPACE (reg_equiv_mem (REGNO (SUBREG_REG (in
)))))))))
1113 #ifdef LIMIT_RELOAD_CLASS
1114 in_subreg_loc
= inloc
;
1116 inloc
= &SUBREG_REG (in
);
1119 if (!WORD_REGISTER_OPERATIONS
1120 && LOAD_EXTEND_OP (GET_MODE (in
)) == UNKNOWN
1122 /* This is supposed to happen only for paradoxical subregs made by
1123 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1124 gcc_assert (known_le (GET_MODE_SIZE (GET_MODE (in
)),
1125 GET_MODE_SIZE (inmode
)));
1127 inmode
= GET_MODE (in
);
1130 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1131 where M1 is not valid for R if it was not handled by the code above.
1133 Similar issue for (SUBREG constant ...) if it was not handled by the
1134 code above. This can happen if SUBREG_BYTE != 0.
1136 However, we must reload the inner reg *as well as* the subreg in
1139 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, false))
1141 if (REG_P (SUBREG_REG (in
)))
1143 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1144 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1145 GET_MODE (SUBREG_REG (in
)),
1148 REGNO (SUBREG_REG (in
)));
1149 else if (CONSTANT_P (SUBREG_REG (in
))
1150 || GET_CODE (SUBREG_REG (in
)) == PLUS
)
1151 subreg_in_class
= find_valid_class_1 (inmode
,
1152 GET_MODE (SUBREG_REG (in
)),
1155 /* This relies on the fact that emit_reload_insns outputs the
1156 instructions for input reloads of type RELOAD_OTHER in the same
1157 order as the reloads. Thus if the outer reload is also of type
1158 RELOAD_OTHER, we are guaranteed that this inner reload will be
1159 output before the outer reload. */
1160 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1161 subreg_in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1162 dont_remove_subreg
= 1;
1165 /* Similarly for paradoxical and problematical SUBREGs on the output.
1166 Note that there is no reason we need worry about the previous value
1167 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1168 entitled to clobber it all (except in the case of a word mode subreg
1169 or of a STRICT_LOW_PART, in that latter case the constraint should
1170 label it input-output.) */
1171 if (out
!= 0 && GET_CODE (out
) == SUBREG
1172 && (subreg_lowpart_p (out
) || strict_low
)
1173 && targetm
.can_change_mode_class (GET_MODE (SUBREG_REG (out
)),
1175 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (out
))]
1176 && (CONSTANT_P (SUBREG_REG (out
))
1178 || (((REG_P (SUBREG_REG (out
))
1179 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1180 || MEM_P (SUBREG_REG (out
)))
1181 && (paradoxical_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1182 || (WORD_REGISTER_OPERATIONS
1183 && partial_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1184 && (known_equal_after_align_down
1185 (GET_MODE_SIZE (outmode
) - 1,
1186 GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1,
1188 || (REG_P (SUBREG_REG (out
))
1189 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1190 /* The case of a word mode subreg
1191 is handled differently in the following statement. */
1192 && ! (known_le (GET_MODE_SIZE (outmode
), UNITS_PER_WORD
)
1193 && maybe_gt (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))),
1195 && !targetm
.hard_regno_mode_ok (subreg_regno (out
), outmode
))
1196 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1197 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1200 || (REG_P (SUBREG_REG (out
))
1201 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1202 && !REG_CAN_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1203 GET_MODE (SUBREG_REG (out
)),
1206 #ifdef LIMIT_RELOAD_CLASS
1207 out_subreg_loc
= outloc
;
1209 outloc
= &SUBREG_REG (out
);
1211 gcc_assert (WORD_REGISTER_OPERATIONS
|| !MEM_P (out
)
1212 || known_le (GET_MODE_SIZE (GET_MODE (out
)),
1213 GET_MODE_SIZE (outmode
)));
1214 outmode
= GET_MODE (out
);
1217 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1218 where either M1 is not valid for R or M2 is wider than a word but we
1219 only need one register to store an M2-sized quantity in R.
1221 However, we must reload the inner reg *as well as* the subreg in
1222 that case and the inner reg is an in-out reload. */
1224 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, true))
1226 enum reg_class in_out_class
1227 = find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1228 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1229 GET_MODE (SUBREG_REG (out
)),
1232 REGNO (SUBREG_REG (out
)));
1234 /* This relies on the fact that emit_reload_insns outputs the
1235 instructions for output reloads of type RELOAD_OTHER in reverse
1236 order of the reloads. Thus if the outer reload is also of type
1237 RELOAD_OTHER, we are guaranteed that this inner reload will be
1238 output after the outer reload. */
1239 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1240 &SUBREG_REG (out
), in_out_class
, VOIDmode
, VOIDmode
,
1241 0, 0, opnum
, RELOAD_OTHER
);
1242 dont_remove_subreg
= 1;
1245 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1246 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1247 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1248 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1251 /* If IN is a SUBREG of a hard register, make a new REG. This
1252 simplifies some of the cases below. */
1254 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1255 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1256 && ! dont_remove_subreg
)
1257 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1259 /* Similarly for OUT. */
1260 if (out
!= 0 && GET_CODE (out
) == SUBREG
1261 && REG_P (SUBREG_REG (out
))
1262 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1263 && ! dont_remove_subreg
)
1264 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1266 /* Narrow down the class of register wanted if that is
1267 desirable on this machine for efficiency. */
1269 reg_class_t preferred_class
= rclass
;
1272 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1274 /* Output reloads may need analogous treatment, different in detail. */
1277 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1279 /* Discard what the target said if we cannot do it. */
1280 if (preferred_class
!= NO_REGS
1281 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1282 rclass
= (enum reg_class
) preferred_class
;
1285 /* Make sure we use a class that can handle the actual pseudo
1286 inside any subreg. For example, on the 386, QImode regs
1287 can appear within SImode subregs. Although GENERAL_REGS
1288 can handle SImode, QImode needs a smaller class. */
1289 #ifdef LIMIT_RELOAD_CLASS
1291 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1292 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1293 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1296 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1297 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1298 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1301 /* Verify that this class is at least possible for the mode that
1303 if (this_insn_is_asm
)
1306 if (paradoxical_subreg_p (inmode
, outmode
))
1310 if (mode
== VOIDmode
)
1312 error_for_asm (this_insn
, "cannot reload integer constant "
1313 "operand in %<asm%>");
1318 outmode
= word_mode
;
1320 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1321 if (targetm
.hard_regno_mode_ok (i
, mode
)
1322 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1324 if (i
== FIRST_PSEUDO_REGISTER
)
1326 error_for_asm (this_insn
, "impossible register constraint "
1328 /* Avoid further trouble with this insn. */
1329 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1330 /* We used to continue here setting class to ALL_REGS, but it triggers
1331 sanity check on i386 for:
1332 void foo(long double d)
1336 Returning zero here ought to be safe as we take care in
1337 find_reloads to not process the reloads when instruction was
1344 /* Optional output reloads are always OK even if we have no register class,
1345 since the function of these reloads is only to have spill_reg_store etc.
1346 set, so that the storing insn can be deleted later. */
1347 gcc_assert (rclass
!= NO_REGS
1348 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1350 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1354 /* See if we need a secondary reload register to move between CLASS
1355 and IN or CLASS and OUT. Get the icode and push any required reloads
1356 needed for each of them if so. */
1360 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1361 &secondary_in_icode
, NULL
);
1362 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1363 secondary_out_reload
1364 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1365 type
, &secondary_out_icode
, NULL
);
1367 /* We found no existing reload suitable for re-use.
1368 So add an additional reload. */
1370 if (subreg_in_class
== NO_REGS
1373 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1374 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
)
1375 subreg_in_class
= REGNO_REG_CLASS (reg_or_subregno (in
));
1376 /* If a memory location is needed for the copy, make one. */
1377 if (subreg_in_class
!= NO_REGS
1378 && targetm
.secondary_memory_needed (inmode
, subreg_in_class
, rclass
))
1379 get_secondary_mem (in
, inmode
, opnum
, type
);
1384 rld
[i
].rclass
= rclass
;
1385 rld
[i
].inmode
= inmode
;
1386 rld
[i
].outmode
= outmode
;
1388 rld
[i
].optional
= optional
;
1390 rld
[i
].nocombine
= 0;
1391 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1392 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1393 rld
[i
].opnum
= opnum
;
1394 rld
[i
].when_needed
= type
;
1395 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1396 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1397 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1398 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1399 rld
[i
].secondary_p
= 0;
1405 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1406 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1407 && (targetm
.secondary_memory_needed
1408 (outmode
, rclass
, REGNO_REG_CLASS (reg_or_subregno (out
)))))
1409 get_secondary_mem (out
, outmode
, opnum
, type
);
1413 /* We are reusing an existing reload,
1414 but we may have additional information for it.
1415 For example, we may now have both IN and OUT
1416 while the old one may have just one of them. */
1418 /* The modes can be different. If they are, we want to reload in
1419 the larger mode, so that the value is valid for both modes. */
1420 if (inmode
!= VOIDmode
1421 && partial_subreg_p (rld
[i
].inmode
, inmode
))
1422 rld
[i
].inmode
= inmode
;
1423 if (outmode
!= VOIDmode
1424 && partial_subreg_p (rld
[i
].outmode
, outmode
))
1425 rld
[i
].outmode
= outmode
;
1428 rtx in_reg
= inloc
? *inloc
: 0;
1429 /* If we merge reloads for two distinct rtl expressions that
1430 are identical in content, there might be duplicate address
1431 reloads. Remove the extra set now, so that if we later find
1432 that we can inherit this reload, we can get rid of the
1433 address reloads altogether.
1435 Do not do this if both reloads are optional since the result
1436 would be an optional reload which could potentially leave
1437 unresolved address replacements.
1439 It is not sufficient to call transfer_replacements since
1440 choose_reload_regs will remove the replacements for address
1441 reloads of inherited reloads which results in the same
1443 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1444 && ! (rld
[i
].optional
&& optional
))
1446 /* We must keep the address reload with the lower operand
1448 if (opnum
> rld
[i
].opnum
)
1450 remove_address_replacements (in
);
1452 in_reg
= rld
[i
].in_reg
;
1455 remove_address_replacements (rld
[i
].in
);
1457 /* When emitting reloads we don't necessarily look at the in-
1458 and outmode, but also directly at the operands (in and out).
1459 So we can't simply overwrite them with whatever we have found
1460 for this (to-be-merged) reload, we have to "merge" that too.
1461 Reusing another reload already verified that we deal with the
1462 same operands, just possibly in different modes. So we
1463 overwrite the operands only when the new mode is larger.
1464 See also PR33613. */
1466 || partial_subreg_p (GET_MODE (rld
[i
].in
), GET_MODE (in
)))
1470 && partial_subreg_p (GET_MODE (rld
[i
].in_reg
),
1471 GET_MODE (in_reg
))))
1472 rld
[i
].in_reg
= in_reg
;
1478 && partial_subreg_p (GET_MODE (rld
[i
].out
),
1483 || partial_subreg_p (GET_MODE (rld
[i
].out_reg
),
1484 GET_MODE (*outloc
))))
1485 rld
[i
].out_reg
= *outloc
;
1487 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1488 rld
[i
].rclass
= rclass
;
1489 rld
[i
].optional
&= optional
;
1490 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1491 opnum
, rld
[i
].opnum
))
1492 rld
[i
].when_needed
= RELOAD_OTHER
;
1493 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1496 /* If the ostensible rtx being reloaded differs from the rtx found
1497 in the location to substitute, this reload is not safe to combine
1498 because we cannot reliably tell whether it appears in the insn. */
1500 if (in
!= 0 && in
!= *inloc
)
1501 rld
[i
].nocombine
= 1;
1504 /* This was replaced by changes in find_reloads_address_1 and the new
1505 function inc_for_reload, which go with a new meaning of reload_inc. */
1507 /* If this is an IN/OUT reload in an insn that sets the CC,
1508 it must be for an autoincrement. It doesn't work to store
1509 the incremented value after the insn because that would clobber the CC.
1510 So we must do the increment of the value reloaded from,
1511 increment it, store it back, then decrement again. */
1512 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1516 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1517 /* If we did not find a nonzero amount-to-increment-by,
1518 that contradicts the belief that IN is being incremented
1519 in an address in this insn. */
1520 gcc_assert (rld
[i
].inc
!= 0);
1524 /* If we will replace IN and OUT with the reload-reg,
1525 record where they are located so that substitution need
1526 not do a tree walk. */
1528 if (replace_reloads
)
1532 struct replacement
*r
= &replacements
[n_replacements
++];
1537 if (outloc
!= 0 && outloc
!= inloc
)
1539 struct replacement
*r
= &replacements
[n_replacements
++];
1546 /* If this reload is just being introduced and it has both
1547 an incoming quantity and an outgoing quantity that are
1548 supposed to be made to match, see if either one of the two
1549 can serve as the place to reload into.
1551 If one of them is acceptable, set rld[i].reg_rtx
1554 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1556 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1559 earlyclobber_operand_p (out
));
1561 /* If the outgoing register already contains the same value
1562 as the incoming one, we can dispense with loading it.
1563 The easiest way to tell the caller that is to give a phony
1564 value for the incoming operand (same as outgoing one). */
1565 if (rld
[i
].reg_rtx
== out
1566 && (REG_P (in
) || CONSTANT_P (in
))
1567 && find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1568 static_reload_reg_p
, i
, inmode
) != 0)
1572 /* If this is an input reload and the operand contains a register that
1573 dies in this insn and is used nowhere else, see if it is the right class
1574 to be used for this reload. Use it if so. (This occurs most commonly
1575 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1576 this if it is also an output reload that mentions the register unless
1577 the output is a SUBREG that clobbers an entire register.
1579 Note that the operand might be one of the spill regs, if it is a
1580 pseudo reg and we are in a block where spilling has not taken place.
1581 But if there is no spilling in this block, that is OK.
1582 An explicitly used hard reg cannot be a spill reg. */
1584 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1588 machine_mode rel_mode
= inmode
;
1590 if (out
&& partial_subreg_p (rel_mode
, outmode
))
1593 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1594 if (REG_NOTE_KIND (note
) == REG_DEAD
1595 && REG_P (XEXP (note
, 0))
1596 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1597 && reg_mentioned_p (XEXP (note
, 0), in
)
1598 /* Check that a former pseudo is valid; see find_dummy_reload. */
1599 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1600 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1601 ORIGINAL_REGNO (XEXP (note
, 0)))
1602 && REG_NREGS (XEXP (note
, 0)) == 1))
1603 && ! refers_to_regno_for_reload_p (regno
,
1604 end_hard_regno (rel_mode
,
1606 PATTERN (this_insn
), inloc
)
1607 && ! find_reg_fusage (this_insn
, USE
, XEXP (note
, 0))
1608 /* If this is also an output reload, IN cannot be used as
1609 the reload register if it is set in this insn unless IN
1611 && (out
== 0 || in
== out
1612 || ! hard_reg_set_here_p (regno
,
1613 end_hard_regno (rel_mode
, regno
),
1614 PATTERN (this_insn
)))
1615 /* ??? Why is this code so different from the previous?
1616 Is there any simple coherent way to describe the two together?
1617 What's going on here. */
1619 || (GET_CODE (in
) == SUBREG
1620 && (known_equal_after_align_up
1621 (GET_MODE_SIZE (GET_MODE (in
)),
1622 GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))),
1624 /* Make sure the operand fits in the reg that dies. */
1625 && known_le (GET_MODE_SIZE (rel_mode
),
1626 GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1627 && targetm
.hard_regno_mode_ok (regno
, inmode
)
1628 && targetm
.hard_regno_mode_ok (regno
, outmode
))
1631 unsigned int nregs
= MAX (hard_regno_nregs (regno
, inmode
),
1632 hard_regno_nregs (regno
, outmode
));
1634 for (offs
= 0; offs
< nregs
; offs
++)
1635 if (fixed_regs
[regno
+ offs
]
1636 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1641 && (! (refers_to_regno_for_reload_p
1642 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1643 || can_reload_into (in
, regno
, inmode
)))
1645 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1652 output_reloadnum
= i
;
1657 /* Record an additional place we must replace a value
1658 for which we have already recorded a reload.
1659 RELOADNUM is the value returned by push_reload
1660 when the reload was recorded.
1661 This is used in insn patterns that use match_dup. */
1664 push_replacement (rtx
*loc
, int reloadnum
, machine_mode mode
)
1666 if (replace_reloads
)
1668 struct replacement
*r
= &replacements
[n_replacements
++];
1669 r
->what
= reloadnum
;
1675 /* Duplicate any replacement we have recorded to apply at
1676 location ORIG_LOC to also be performed at DUP_LOC.
1677 This is used in insn patterns that use match_dup. */
1680 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1682 int i
, n
= n_replacements
;
1684 for (i
= 0; i
< n
; i
++)
1686 struct replacement
*r
= &replacements
[i
];
1687 if (r
->where
== orig_loc
)
1688 push_replacement (dup_loc
, r
->what
, r
->mode
);
1692 /* Transfer all replacements that used to be in reload FROM to be in
1696 transfer_replacements (int to
, int from
)
1700 for (i
= 0; i
< n_replacements
; i
++)
1701 if (replacements
[i
].what
== from
)
1702 replacements
[i
].what
= to
;
1705 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1706 or a subpart of it. If we have any replacements registered for IN_RTX,
1707 cancel the reloads that were supposed to load them.
1708 Return nonzero if we canceled any reloads. */
1710 remove_address_replacements (rtx in_rtx
)
1713 char reload_flags
[MAX_RELOADS
];
1714 int something_changed
= 0;
1716 memset (reload_flags
, 0, sizeof reload_flags
);
1717 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1719 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1720 reload_flags
[replacements
[i
].what
] |= 1;
1723 replacements
[j
++] = replacements
[i
];
1724 reload_flags
[replacements
[i
].what
] |= 2;
1727 /* Note that the following store must be done before the recursive calls. */
1730 for (i
= n_reloads
- 1; i
>= 0; i
--)
1732 if (reload_flags
[i
] == 1)
1734 deallocate_reload_reg (i
);
1735 remove_address_replacements (rld
[i
].in
);
1737 something_changed
= 1;
1740 return something_changed
;
1743 /* If there is only one output reload, and it is not for an earlyclobber
1744 operand, try to combine it with a (logically unrelated) input reload
1745 to reduce the number of reload registers needed.
1747 This is safe if the input reload does not appear in
1748 the value being output-reloaded, because this implies
1749 it is not needed any more once the original insn completes.
1751 If that doesn't work, see we can use any of the registers that
1752 die in this insn as a reload register. We can if it is of the right
1753 class and does not appear in the value being output-reloaded. */
1756 combine_reloads (void)
1759 int output_reload
= -1;
1760 int secondary_out
= -1;
1763 /* Find the output reload; return unless there is exactly one
1764 and that one is mandatory. */
1766 for (i
= 0; i
< n_reloads
; i
++)
1767 if (rld
[i
].out
!= 0)
1769 if (output_reload
>= 0)
1774 if (output_reload
< 0 || rld
[output_reload
].optional
)
1777 /* An input-output reload isn't combinable. */
1779 if (rld
[output_reload
].in
!= 0)
1782 /* If this reload is for an earlyclobber operand, we can't do anything. */
1783 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1786 /* If there is a reload for part of the address of this operand, we would
1787 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1788 its life to the point where doing this combine would not lower the
1789 number of spill registers needed. */
1790 for (i
= 0; i
< n_reloads
; i
++)
1791 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1792 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1793 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1796 /* Check each input reload; can we combine it? */
1798 for (i
= 0; i
< n_reloads
; i
++)
1799 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1800 /* Life span of this reload must not extend past main insn. */
1801 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1802 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1803 && rld
[i
].when_needed
!= RELOAD_OTHER
1804 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1805 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1806 [(int) rld
[output_reload
].outmode
])
1807 && known_eq (rld
[i
].inc
, 0)
1808 && rld
[i
].reg_rtx
== 0
1809 /* Don't combine two reloads with different secondary
1810 memory locations. */
1811 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1812 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1813 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1814 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1815 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1816 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1817 : (reg_class_subset_p (rld
[i
].rclass
,
1818 rld
[output_reload
].rclass
)
1819 || reg_class_subset_p (rld
[output_reload
].rclass
,
1821 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1822 /* Args reversed because the first arg seems to be
1823 the one that we imagine being modified
1824 while the second is the one that might be affected. */
1825 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1827 /* However, if the input is a register that appears inside
1828 the output, then we also can't share.
1829 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1830 If the same reload reg is used for both reg 69 and the
1831 result to be stored in memory, then that result
1832 will clobber the address of the memory ref. */
1833 && ! (REG_P (rld
[i
].in
)
1834 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1835 rld
[output_reload
].out
))))
1836 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1837 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1838 && (reg_class_size
[(int) rld
[i
].rclass
]
1839 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1840 /* We will allow making things slightly worse by combining an
1841 input and an output, but no worse than that. */
1842 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1843 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1847 /* We have found a reload to combine with! */
1848 rld
[i
].out
= rld
[output_reload
].out
;
1849 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1850 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1851 /* Mark the old output reload as inoperative. */
1852 rld
[output_reload
].out
= 0;
1853 /* The combined reload is needed for the entire insn. */
1854 rld
[i
].when_needed
= RELOAD_OTHER
;
1855 /* If the output reload had a secondary reload, copy it. */
1856 if (rld
[output_reload
].secondary_out_reload
!= -1)
1858 rld
[i
].secondary_out_reload
1859 = rld
[output_reload
].secondary_out_reload
;
1860 rld
[i
].secondary_out_icode
1861 = rld
[output_reload
].secondary_out_icode
;
1864 /* Copy any secondary MEM. */
1865 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1866 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1867 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1868 /* If required, minimize the register class. */
1869 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1871 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1873 /* Transfer all replacements from the old reload to the combined. */
1874 for (j
= 0; j
< n_replacements
; j
++)
1875 if (replacements
[j
].what
== output_reload
)
1876 replacements
[j
].what
= i
;
1881 /* If this insn has only one operand that is modified or written (assumed
1882 to be the first), it must be the one corresponding to this reload. It
1883 is safe to use anything that dies in this insn for that output provided
1884 that it does not occur in the output (we already know it isn't an
1885 earlyclobber. If this is an asm insn, give up. */
1887 if (INSN_CODE (this_insn
) == -1)
1890 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1891 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1892 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1895 /* See if some hard register that dies in this insn and is not used in
1896 the output is the right class. Only works if the register we pick
1897 up can fully hold our output reload. */
1898 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1899 if (REG_NOTE_KIND (note
) == REG_DEAD
1900 && REG_P (XEXP (note
, 0))
1901 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1902 rld
[output_reload
].out
)
1903 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1904 && targetm
.hard_regno_mode_ok (regno
, rld
[output_reload
].outmode
)
1905 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1907 && (hard_regno_nregs (regno
, rld
[output_reload
].outmode
)
1908 <= REG_NREGS (XEXP (note
, 0)))
1909 /* Ensure that a secondary or tertiary reload for this output
1910 won't want this register. */
1911 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1912 || (!(TEST_HARD_REG_BIT
1913 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1914 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1915 || !(TEST_HARD_REG_BIT
1916 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1918 && !fixed_regs
[regno
]
1919 /* Check that a former pseudo is valid; see find_dummy_reload. */
1920 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1921 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1922 ORIGINAL_REGNO (XEXP (note
, 0)))
1923 && REG_NREGS (XEXP (note
, 0)) == 1)))
1925 rld
[output_reload
].reg_rtx
1926 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1931 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1932 See if one of IN and OUT is a register that may be used;
1933 this is desirable since a spill-register won't be needed.
1934 If so, return the register rtx that proves acceptable.
1936 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1937 RCLASS is the register class required for the reload.
1939 If FOR_REAL is >= 0, it is the number of the reload,
1940 and in some cases when it can be discovered that OUT doesn't need
1941 to be computed, clear out rld[FOR_REAL].out.
1943 If FOR_REAL is -1, this should not be done, because this call
1944 is just to see if a register can be found, not to find and install it.
1946 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1947 puts an additional constraint on being able to use IN for OUT since
1948 IN must not appear elsewhere in the insn (it is assumed that IN itself
1949 is safe from the earlyclobber). */
1952 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1953 machine_mode inmode
, machine_mode outmode
,
1954 reg_class_t rclass
, int for_real
, int earlyclobber
)
1962 /* If operands exceed a word, we can't use either of them
1963 unless they have the same size. */
1964 if (maybe_ne (GET_MODE_SIZE (outmode
), GET_MODE_SIZE (inmode
))
1965 && (maybe_gt (GET_MODE_SIZE (outmode
), UNITS_PER_WORD
)
1966 || maybe_gt (GET_MODE_SIZE (inmode
), UNITS_PER_WORD
)))
1969 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1970 respectively refers to a hard register. */
1972 /* Find the inside of any subregs. */
1973 while (GET_CODE (out
) == SUBREG
)
1975 if (REG_P (SUBREG_REG (out
))
1976 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1977 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1978 GET_MODE (SUBREG_REG (out
)),
1981 out
= SUBREG_REG (out
);
1983 while (GET_CODE (in
) == SUBREG
)
1985 if (REG_P (SUBREG_REG (in
))
1986 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1987 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1988 GET_MODE (SUBREG_REG (in
)),
1991 in
= SUBREG_REG (in
);
1994 /* Narrow down the reg class, the same way push_reload will;
1995 otherwise we might find a dummy now, but push_reload won't. */
1997 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1998 if (preferred_class
!= NO_REGS
)
1999 rclass
= (enum reg_class
) preferred_class
;
2002 /* See if OUT will do. */
2004 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
2006 unsigned int regno
= REGNO (out
) + out_offset
;
2007 unsigned int nwords
= hard_regno_nregs (regno
, outmode
);
2010 /* When we consider whether the insn uses OUT,
2011 ignore references within IN. They don't prevent us
2012 from copying IN into OUT, because those refs would
2013 move into the insn that reloads IN.
2015 However, we only ignore IN in its role as this reload.
2016 If the insn uses IN elsewhere and it contains OUT,
2017 that counts. We can't be sure it's the "same" operand
2018 so it might not go through this reload.
2020 We also need to avoid using OUT if it, or part of it, is a
2021 fixed register. Modifying such registers, even transiently,
2022 may have undefined effects on the machine, such as modifying
2023 the stack pointer. */
2025 *inloc
= const0_rtx
;
2027 if (regno
< FIRST_PSEUDO_REGISTER
2028 && targetm
.hard_regno_mode_ok (regno
, outmode
)
2029 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2030 PATTERN (this_insn
), outloc
))
2034 for (i
= 0; i
< nwords
; i
++)
2035 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2037 || fixed_regs
[regno
+ i
])
2042 if (REG_P (real_out
))
2045 value
= gen_rtx_REG (outmode
, regno
);
2052 /* Consider using IN if OUT was not acceptable
2053 or if OUT dies in this insn (like the quotient in a divmod insn).
2054 We can't use IN unless it is dies in this insn,
2055 which means we must know accurately which hard regs are live.
2056 Also, the result can't go in IN if IN is used within OUT,
2057 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2058 if (hard_regs_live_known
2060 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2062 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2063 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2064 && !fixed_regs
[REGNO (in
)]
2065 && targetm
.hard_regno_mode_ok (REGNO (in
),
2066 /* The only case where out and real_out
2067 might have different modes is where
2068 real_out is a subreg, and in that
2069 case, out has a real mode. */
2070 (GET_MODE (out
) != VOIDmode
2071 ? GET_MODE (out
) : outmode
))
2072 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2073 /* However only do this if we can be sure that this input
2074 operand doesn't correspond with an uninitialized pseudo.
2075 global can assign some hardreg to it that is the same as
2076 the one assigned to a different, also live pseudo (as it
2077 can ignore the conflict). We must never introduce writes
2078 to such hardregs, as they would clobber the other live
2079 pseudo. See PR 20973. */
2080 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
2081 ORIGINAL_REGNO (in
))
2082 /* Similarly, only do this if we can be sure that the death
2083 note is still valid. global can assign some hardreg to
2084 the pseudo referenced in the note and simultaneously a
2085 subword of this hardreg to a different, also live pseudo,
2086 because only another subword of the hardreg is actually
2087 used in the insn. This cannot happen if the pseudo has
2088 been assigned exactly one hardreg. See PR 33732. */
2089 && REG_NREGS (in
) == 1)))
2091 unsigned int regno
= REGNO (in
) + in_offset
;
2092 unsigned int nwords
= hard_regno_nregs (regno
, inmode
);
2094 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2095 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2096 PATTERN (this_insn
))
2098 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2099 PATTERN (this_insn
), inloc
)))
2103 for (i
= 0; i
< nwords
; i
++)
2104 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2110 /* If we were going to use OUT as the reload reg
2111 and changed our mind, it means OUT is a dummy that
2112 dies here. So don't bother copying value to it. */
2113 if (for_real
>= 0 && value
== real_out
)
2114 rld
[for_real
].out
= 0;
2115 if (REG_P (real_in
))
2118 value
= gen_rtx_REG (inmode
, regno
);
2126 /* This page contains subroutines used mainly for determining
2127 whether the IN or an OUT of a reload can serve as the
2130 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2133 earlyclobber_operand_p (rtx x
)
2137 for (i
= 0; i
< n_earlyclobbers
; i
++)
2138 if (reload_earlyclobbers
[i
] == x
)
2144 /* Return 1 if expression X alters a hard reg in the range
2145 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2146 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2147 X should be the body of an instruction. */
2150 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2152 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2154 rtx op0
= SET_DEST (x
);
2156 while (GET_CODE (op0
) == SUBREG
)
2157 op0
= SUBREG_REG (op0
);
2160 unsigned int r
= REGNO (op0
);
2162 /* See if this reg overlaps range under consideration. */
2164 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2168 else if (GET_CODE (x
) == PARALLEL
)
2170 int i
= XVECLEN (x
, 0) - 1;
2173 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2180 /* Return 1 if ADDR is a valid memory address for mode MODE
2181 in address space AS, and check that each pseudo reg has the
2182 proper kind of hard reg. */
2185 strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED
,
2186 rtx addr
, addr_space_t as
)
2188 #ifdef GO_IF_LEGITIMATE_ADDRESS
2189 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2190 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2196 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2200 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2201 if they are the same hard reg, and has special hacks for
2202 autoincrement and autodecrement.
2203 This is specifically intended for find_reloads to use
2204 in determining whether two operands match.
2205 X is the operand whose number is the lower of the two.
2207 The value is 2 if Y contains a pre-increment that matches
2208 a non-incrementing address in X. */
2210 /* ??? To be completely correct, we should arrange to pass
2211 for X the output operand and for Y the input operand.
2212 For now, we assume that the output operand has the lower number
2213 because that is natural in (SET output (... input ...)). */
2216 operands_match_p (rtx x
, rtx y
)
2219 RTX_CODE code
= GET_CODE (x
);
2225 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2226 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2227 && REG_P (SUBREG_REG (y
)))))
2233 i
= REGNO (SUBREG_REG (x
));
2234 if (i
>= FIRST_PSEUDO_REGISTER
)
2236 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2237 GET_MODE (SUBREG_REG (x
)),
2244 if (GET_CODE (y
) == SUBREG
)
2246 j
= REGNO (SUBREG_REG (y
));
2247 if (j
>= FIRST_PSEUDO_REGISTER
)
2249 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2250 GET_MODE (SUBREG_REG (y
)),
2257 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2258 multiple hard register group of scalar integer registers, so that
2259 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2261 scalar_int_mode xmode
;
2262 if (REG_WORDS_BIG_ENDIAN
2263 && is_a
<scalar_int_mode
> (GET_MODE (x
), &xmode
)
2264 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
2265 && i
< FIRST_PSEUDO_REGISTER
)
2266 i
+= hard_regno_nregs (i
, xmode
) - 1;
2267 scalar_int_mode ymode
;
2268 if (REG_WORDS_BIG_ENDIAN
2269 && is_a
<scalar_int_mode
> (GET_MODE (y
), &ymode
)
2270 && GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
2271 && j
< FIRST_PSEUDO_REGISTER
)
2272 j
+= hard_regno_nregs (j
, ymode
) - 1;
2276 /* If two operands must match, because they are really a single
2277 operand of an assembler insn, then two postincrements are invalid
2278 because the assembler insn would increment only once.
2279 On the other hand, a postincrement matches ordinary indexing
2280 if the postincrement is the output operand. */
2281 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2282 return operands_match_p (XEXP (x
, 0), y
);
2283 /* Two preincrements are invalid
2284 because the assembler insn would increment only once.
2285 On the other hand, a preincrement matches ordinary indexing
2286 if the preincrement is the input operand.
2287 In this case, return 2, since some callers need to do special
2288 things when this happens. */
2289 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2290 || GET_CODE (y
) == PRE_MODIFY
)
2291 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2295 /* Now we have disposed of all the cases in which different rtx codes
2297 if (code
!= GET_CODE (y
))
2300 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2301 if (GET_MODE (x
) != GET_MODE (y
))
2304 /* MEMs referring to different address space are not equivalent. */
2305 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2314 return label_ref_label (x
) == label_ref_label (y
);
2316 return XSTR (x
, 0) == XSTR (y
, 0);
2322 /* Compare the elements. If any pair of corresponding elements
2323 fail to match, return 0 for the whole things. */
2326 fmt
= GET_RTX_FORMAT (code
);
2327 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2333 if (XWINT (x
, i
) != XWINT (y
, i
))
2338 if (XINT (x
, i
) != XINT (y
, i
))
2343 if (maybe_ne (SUBREG_BYTE (x
), SUBREG_BYTE (y
)))
2348 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2351 /* If any subexpression returns 2,
2352 we should return 2 if we are successful. */
2361 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2363 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2365 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2373 /* It is believed that rtx's at this level will never
2374 contain anything but integers and other rtx's,
2375 except for within LABEL_REFs and SYMBOL_REFs. */
2380 return 1 + success_2
;
2383 /* Describe the range of registers or memory referenced by X.
2384 If X is a register, set REG_FLAG and put the first register
2385 number into START and the last plus one into END.
2386 If X is a memory reference, put a base address into BASE
2387 and a range of integer offsets into START and END.
2388 If X is pushing on the stack, we can assume it causes no trouble,
2389 so we set the SAFE field. */
2391 static struct decomposition
2394 struct decomposition val
;
2395 int all_const
= 0, regno
;
2397 memset (&val
, 0, sizeof (val
));
2399 switch (GET_CODE (x
))
2403 rtx base
= NULL_RTX
, offset
= 0;
2404 rtx addr
= XEXP (x
, 0);
2406 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2407 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2409 val
.base
= XEXP (addr
, 0);
2410 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2411 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2412 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2416 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2418 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2419 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2420 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2422 val
.base
= XEXP (addr
, 0);
2423 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2424 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2425 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2430 if (GET_CODE (addr
) == CONST
)
2432 addr
= XEXP (addr
, 0);
2435 if (GET_CODE (addr
) == PLUS
)
2437 if (CONSTANT_P (XEXP (addr
, 0)))
2439 base
= XEXP (addr
, 1);
2440 offset
= XEXP (addr
, 0);
2442 else if (CONSTANT_P (XEXP (addr
, 1)))
2444 base
= XEXP (addr
, 0);
2445 offset
= XEXP (addr
, 1);
2452 offset
= const0_rtx
;
2454 if (GET_CODE (offset
) == CONST
)
2455 offset
= XEXP (offset
, 0);
2456 if (GET_CODE (offset
) == PLUS
)
2458 if (CONST_INT_P (XEXP (offset
, 0)))
2460 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2461 offset
= XEXP (offset
, 0);
2463 else if (CONST_INT_P (XEXP (offset
, 1)))
2465 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2466 offset
= XEXP (offset
, 1);
2470 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2471 offset
= const0_rtx
;
2474 else if (!CONST_INT_P (offset
))
2476 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2477 offset
= const0_rtx
;
2480 if (all_const
&& GET_CODE (base
) == PLUS
)
2481 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2483 gcc_assert (CONST_INT_P (offset
));
2485 val
.start
= INTVAL (offset
);
2486 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2493 regno
= true_regnum (x
);
2494 if (regno
< 0 || regno
>= FIRST_PSEUDO_REGISTER
)
2496 /* A pseudo with no hard reg. */
2497 val
.start
= REGNO (x
);
2498 val
.end
= val
.start
+ 1;
2504 val
.end
= end_hard_regno (GET_MODE (x
), regno
);
2509 if (!REG_P (SUBREG_REG (x
)))
2510 /* This could be more precise, but it's good enough. */
2511 return decompose (SUBREG_REG (x
));
2512 regno
= true_regnum (x
);
2513 if (regno
< 0 || regno
>= FIRST_PSEUDO_REGISTER
)
2514 return decompose (SUBREG_REG (x
));
2519 val
.end
= regno
+ subreg_nregs (x
);
2523 /* This hasn't been assigned yet, so it can't conflict yet. */
2528 gcc_assert (CONSTANT_P (x
));
2535 /* Return 1 if altering Y will not modify the value of X.
2536 Y is also described by YDATA, which should be decompose (Y). */
2539 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2541 struct decomposition xdata
;
2544 /* In this case the decomposition structure contains register
2545 numbers rather than byte offsets. */
2546 return !refers_to_regno_for_reload_p (ydata
.start
.to_constant (),
2547 ydata
.end
.to_constant (),
2552 gcc_assert (MEM_P (y
));
2553 /* If Y is memory and X is not, Y can't affect X. */
2557 xdata
= decompose (x
);
2559 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2561 /* If bases are distinct symbolic constants, there is no overlap. */
2562 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2564 /* Constants and stack slots never overlap. */
2565 if (CONSTANT_P (xdata
.base
)
2566 && (ydata
.base
== frame_pointer_rtx
2567 || ydata
.base
== hard_frame_pointer_rtx
2568 || ydata
.base
== stack_pointer_rtx
))
2570 if (CONSTANT_P (ydata
.base
)
2571 && (xdata
.base
== frame_pointer_rtx
2572 || xdata
.base
== hard_frame_pointer_rtx
2573 || xdata
.base
== stack_pointer_rtx
))
2575 /* If either base is variable, we don't know anything. */
2579 return known_ge (xdata
.start
, ydata
.end
) || known_ge (ydata
.start
, xdata
.end
);
2582 /* Similar, but calls decompose. */
2585 safe_from_earlyclobber (rtx op
, rtx clobber
)
2587 struct decomposition early_data
;
2589 early_data
= decompose (clobber
);
2590 return immune_p (op
, clobber
, early_data
);
2593 /* Main entry point of this file: search the body of INSN
2594 for values that need reloading and record them with push_reload.
2595 REPLACE nonzero means record also where the values occur
2596 so that subst_reloads can be used.
2598 IND_LEVELS says how many levels of indirection are supported by this
2599 machine; a value of zero means that a memory reference is not a valid
2602 LIVE_KNOWN says we have valid information about which hard
2603 regs are live at each point in the program; this is true when
2604 we are called from global_alloc but false when stupid register
2605 allocation has been done.
2607 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2608 which is nonnegative if the reg has been commandeered for reloading into.
2609 It is copied into STATIC_RELOAD_REG_P and referenced from there
2610 by various subroutines.
2612 Return TRUE if some operands need to be changed, because of swapping
2613 commutative operands, reg_equiv_address substitution, or whatever. */
2616 find_reloads (rtx_insn
*insn
, int replace
, int ind_levels
, int live_known
,
2617 short *reload_reg_p
)
2619 int insn_code_number
;
2622 /* These start out as the constraints for the insn
2623 and they are chewed up as we consider alternatives. */
2624 const char *constraints
[MAX_RECOG_OPERANDS
];
2625 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2627 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2628 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2629 /* Nonzero for a MEM operand whose entire address needs a reload.
2630 May be -1 to indicate the entire address may or may not need a reload. */
2631 int address_reloaded
[MAX_RECOG_OPERANDS
];
2632 /* Nonzero for an address operand that needs to be completely reloaded.
2633 May be -1 to indicate the entire operand may or may not need a reload. */
2634 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2635 /* Value of enum reload_type to use for operand. */
2636 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2637 /* Value of enum reload_type to use within address of operand. */
2638 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2639 /* Save the usage of each operand. */
2640 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2641 int no_input_reloads
= 0, no_output_reloads
= 0;
2643 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2644 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2645 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2646 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2647 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2648 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2649 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2650 int this_alternative_number
;
2651 int goal_alternative_number
= 0;
2652 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2653 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2654 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2655 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2656 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2657 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2658 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2659 int goal_alternative_swapped
;
2662 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2663 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2664 rtx body
= PATTERN (insn
);
2665 rtx set
= single_set (insn
);
2666 int goal_earlyclobber
= 0, this_earlyclobber
;
2667 machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2673 n_earlyclobbers
= 0;
2674 replace_reloads
= replace
;
2675 hard_regs_live_known
= live_known
;
2676 static_reload_reg_p
= reload_reg_p
;
2678 if (JUMP_P (insn
) && INSN_CODE (insn
) < 0)
2680 extract_insn (insn
);
2681 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2682 if (recog_data
.operand_type
[i
] != OP_IN
)
2684 if (i
< recog_data
.n_operands
)
2686 error_for_asm (insn
,
2687 "the target does not support %<asm goto%> "
2688 "with outputs in %<asm%>");
2689 ira_nullify_asm_goto (insn
);
2694 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2695 neither are insns that SET cc0. Insns that use CC0 are not allowed
2696 to have any input reloads. */
2697 if (JUMP_P (insn
) || CALL_P (insn
))
2698 no_output_reloads
= 1;
2700 if (HAVE_cc0
&& reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2701 no_input_reloads
= 1;
2702 if (HAVE_cc0
&& reg_set_p (cc0_rtx
, PATTERN (insn
)))
2703 no_output_reloads
= 1;
2705 /* The eliminated forms of any secondary memory locations are per-insn, so
2706 clear them out here. */
2708 if (secondary_memlocs_elim_used
)
2710 memset (secondary_memlocs_elim
, 0,
2711 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2712 secondary_memlocs_elim_used
= 0;
2715 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2716 is cheap to move between them. If it is not, there may not be an insn
2717 to do the copy, so we may need a reload. */
2718 if (GET_CODE (body
) == SET
2719 && REG_P (SET_DEST (body
))
2720 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2721 && REG_P (SET_SRC (body
))
2722 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2723 && register_move_cost (GET_MODE (SET_SRC (body
)),
2724 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2725 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2728 extract_insn (insn
);
2730 noperands
= reload_n_operands
= recog_data
.n_operands
;
2731 n_alternatives
= recog_data
.n_alternatives
;
2733 /* Just return "no reloads" if insn has no operands with constraints. */
2734 if (noperands
== 0 || n_alternatives
== 0)
2737 insn_code_number
= INSN_CODE (insn
);
2738 this_insn_is_asm
= insn_code_number
< 0;
2740 memcpy (operand_mode
, recog_data
.operand_mode
,
2741 noperands
* sizeof (machine_mode
));
2742 memcpy (constraints
, recog_data
.constraints
,
2743 noperands
* sizeof (const char *));
2747 /* If we will need to know, later, whether some pair of operands
2748 are the same, we must compare them now and save the result.
2749 Reloading the base and index registers will clobber them
2750 and afterward they will fail to match. */
2752 for (i
= 0; i
< noperands
; i
++)
2758 substed_operand
[i
] = recog_data
.operand
[i
];
2761 modified
[i
] = RELOAD_READ
;
2763 /* Scan this operand's constraint to see if it is an output operand,
2764 an in-out operand, is commutative, or should match another. */
2768 p
+= CONSTRAINT_LEN (c
, p
);
2772 modified
[i
] = RELOAD_WRITE
;
2775 modified
[i
] = RELOAD_READ_WRITE
;
2779 /* The last operand should not be marked commutative. */
2780 gcc_assert (i
!= noperands
- 1);
2782 /* We currently only support one commutative pair of
2783 operands. Some existing asm code currently uses more
2784 than one pair. Previously, that would usually work,
2785 but sometimes it would crash the compiler. We
2786 continue supporting that case as well as we can by
2787 silently ignoring all but the first pair. In the
2788 future we may handle it correctly. */
2789 if (commutative
< 0)
2792 gcc_assert (this_insn_is_asm
);
2795 /* Use of ISDIGIT is tempting here, but it may get expensive because
2796 of locale support we don't want. */
2797 case '0': case '1': case '2': case '3': case '4':
2798 case '5': case '6': case '7': case '8': case '9':
2800 c
= strtoul (p
- 1, &end
, 10);
2803 operands_match
[c
][i
]
2804 = operands_match_p (recog_data
.operand
[c
],
2805 recog_data
.operand
[i
]);
2807 /* An operand may not match itself. */
2808 gcc_assert (c
!= i
);
2810 /* If C can be commuted with C+1, and C might need to match I,
2811 then C+1 might also need to match I. */
2812 if (commutative
>= 0)
2814 if (c
== commutative
|| c
== commutative
+ 1)
2816 int other
= c
+ (c
== commutative
? 1 : -1);
2817 operands_match
[other
][i
]
2818 = operands_match_p (recog_data
.operand
[other
],
2819 recog_data
.operand
[i
]);
2821 if (i
== commutative
|| i
== commutative
+ 1)
2823 int other
= i
+ (i
== commutative
? 1 : -1);
2824 operands_match
[c
][other
]
2825 = operands_match_p (recog_data
.operand
[c
],
2826 recog_data
.operand
[other
]);
2828 /* Note that C is supposed to be less than I.
2829 No need to consider altering both C and I because in
2830 that case we would alter one into the other. */
2837 /* Examine each operand that is a memory reference or memory address
2838 and reload parts of the addresses into index registers.
2839 Also here any references to pseudo regs that didn't get hard regs
2840 but are equivalent to constants get replaced in the insn itself
2841 with those constants. Nobody will ever see them again.
2843 Finally, set up the preferred classes of each operand. */
2845 for (i
= 0; i
< noperands
; i
++)
2847 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2849 address_reloaded
[i
] = 0;
2850 address_operand_reloaded
[i
] = 0;
2851 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2852 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2855 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2856 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2859 if (*constraints
[i
] == 0)
2860 /* Ignore things like match_operator operands. */
2862 else if (insn_extra_address_constraint
2863 (lookup_constraint (constraints
[i
])))
2865 address_operand_reloaded
[i
]
2866 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2867 recog_data
.operand
[i
],
2868 recog_data
.operand_loc
[i
],
2869 i
, operand_type
[i
], ind_levels
, insn
);
2871 /* If we now have a simple operand where we used to have a
2872 PLUS or MULT, re-recognize and try again. */
2873 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2874 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2875 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2876 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2878 INSN_CODE (insn
) = -1;
2879 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2884 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2885 substed_operand
[i
] = recog_data
.operand
[i
];
2887 /* Address operands are reloaded in their existing mode,
2888 no matter what is specified in the machine description. */
2889 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2891 /* If the address is a single CONST_INT pick address mode
2892 instead otherwise we will later not know in which mode
2893 the reload should be performed. */
2894 if (operand_mode
[i
] == VOIDmode
)
2895 operand_mode
[i
] = Pmode
;
2898 else if (code
== MEM
)
2901 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2902 recog_data
.operand_loc
[i
],
2903 XEXP (recog_data
.operand
[i
], 0),
2904 &XEXP (recog_data
.operand
[i
], 0),
2905 i
, address_type
[i
], ind_levels
, insn
);
2906 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2907 substed_operand
[i
] = recog_data
.operand
[i
];
2909 else if (code
== SUBREG
)
2911 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2913 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2916 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2918 &address_reloaded
[i
]);
2920 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2921 that didn't get a hard register, emit a USE with a REG_EQUAL
2922 note in front so that we might inherit a previous, possibly
2928 && known_ge (GET_MODE_SIZE (GET_MODE (reg
)),
2929 GET_MODE_SIZE (GET_MODE (op
)))
2930 && reg_equiv_constant (REGNO (reg
)) == 0)
2931 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2933 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2935 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2937 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2938 /* We can get a PLUS as an "operand" as a result of register
2939 elimination. See eliminate_regs and gen_reload. We handle
2940 a unary operator by reloading the operand. */
2941 substed_operand
[i
] = recog_data
.operand
[i
]
2942 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2943 ind_levels
, 0, insn
,
2944 &address_reloaded
[i
]);
2945 else if (code
== REG
)
2947 /* This is equivalent to calling find_reloads_toplev.
2948 The code is duplicated for speed.
2949 When we find a pseudo always equivalent to a constant,
2950 we replace it by the constant. We must be sure, however,
2951 that we don't try to replace it in the insn in which it
2953 int regno
= REGNO (recog_data
.operand
[i
]);
2954 if (reg_equiv_constant (regno
) != 0
2955 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2957 /* Record the existing mode so that the check if constants are
2958 allowed will work when operand_mode isn't specified. */
2960 if (operand_mode
[i
] == VOIDmode
)
2961 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2963 substed_operand
[i
] = recog_data
.operand
[i
]
2964 = reg_equiv_constant (regno
);
2966 if (reg_equiv_memory_loc (regno
) != 0
2967 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2968 /* We need not give a valid is_set_dest argument since the case
2969 of a constant equivalence was checked above. */
2970 substed_operand
[i
] = recog_data
.operand
[i
]
2971 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2972 ind_levels
, 0, insn
,
2973 &address_reloaded
[i
]);
2975 /* If the operand is still a register (we didn't replace it with an
2976 equivalent), get the preferred class to reload it into. */
2977 code
= GET_CODE (recog_data
.operand
[i
]);
2979 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2980 >= FIRST_PSEUDO_REGISTER
)
2981 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2985 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2986 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2989 /* If this is simply a copy from operand 1 to operand 0, merge the
2990 preferred classes for the operands. */
2991 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2992 && recog_data
.operand
[1] == SET_SRC (set
))
2994 preferred_class
[0] = preferred_class
[1]
2995 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2996 pref_or_nothing
[0] |= pref_or_nothing
[1];
2997 pref_or_nothing
[1] |= pref_or_nothing
[0];
3000 /* Now see what we need for pseudo-regs that didn't get hard regs
3001 or got the wrong kind of hard reg. For this, we must consider
3002 all the operands together against the register constraints. */
3004 best
= MAX_RECOG_OPERANDS
* 2 + 600;
3006 goal_alternative_swapped
= 0;
3008 /* The constraints are made of several alternatives.
3009 Each operand's constraint looks like foo,bar,... with commas
3010 separating the alternatives. The first alternatives for all
3011 operands go together, the second alternatives go together, etc.
3013 First loop over alternatives. */
3015 alternative_mask enabled
= get_enabled_alternatives (insn
);
3016 for (this_alternative_number
= 0;
3017 this_alternative_number
< n_alternatives
;
3018 this_alternative_number
++)
3022 if (!TEST_BIT (enabled
, this_alternative_number
))
3026 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3027 constraints
[i
] = skip_alternative (constraints
[i
]);
3032 /* If insn is commutative (it's safe to exchange a certain pair
3033 of operands) then we need to try each alternative twice, the
3034 second time matching those two operands as if we had
3035 exchanged them. To do this, really exchange them in
3037 for (swapped
= 0; swapped
< (commutative
>= 0 ? 2 : 1); swapped
++)
3039 /* Loop over operands for one constraint alternative. */
3040 /* LOSERS counts those that don't fit this alternative
3041 and would require loading. */
3043 /* BAD is set to 1 if it some operand can't fit this alternative
3044 even after reloading. */
3046 /* REJECT is a count of how undesirable this alternative says it is
3047 if any reloading is required. If the alternative matches exactly
3048 then REJECT is ignored, but otherwise it gets this much
3049 counted against it in addition to the reloading needed. Each
3050 ? counts three times here since we want the disparaging caused by
3051 a bad register class to only count 1/3 as much. */
3056 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3057 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3058 /* Swap the duplicates too. */
3059 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3060 if (recog_data
.dup_num
[i
] == commutative
3061 || recog_data
.dup_num
[i
] == commutative
+ 1)
3062 *recog_data
.dup_loc
[i
]
3063 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3065 std::swap (preferred_class
[commutative
],
3066 preferred_class
[commutative
+ 1]);
3067 std::swap (pref_or_nothing
[commutative
],
3068 pref_or_nothing
[commutative
+ 1]);
3069 std::swap (address_reloaded
[commutative
],
3070 address_reloaded
[commutative
+ 1]);
3073 this_earlyclobber
= 0;
3075 for (i
= 0; i
< noperands
; i
++)
3077 const char *p
= constraints
[i
];
3082 /* 0 => this operand can be reloaded somehow for this alternative. */
3084 /* 0 => this operand can be reloaded if the alternative allows regs. */
3088 rtx operand
= recog_data
.operand
[i
];
3090 /* Nonzero means this is a MEM that must be reloaded into a reg
3091 regardless of what the constraint says. */
3092 int force_reload
= 0;
3094 /* Nonzero if a constant forced into memory would be OK for this
3097 int earlyclobber
= 0;
3098 enum constraint_num cn
;
3101 /* If the predicate accepts a unary operator, it means that
3102 we need to reload the operand, but do not do this for
3103 match_operator and friends. */
3104 if (UNARY_P (operand
) && *p
!= 0)
3105 operand
= XEXP (operand
, 0);
3107 /* If the operand is a SUBREG, extract
3108 the REG or MEM (or maybe even a constant) within.
3109 (Constants can occur as a result of reg_equiv_constant.) */
3111 while (GET_CODE (operand
) == SUBREG
)
3113 /* Offset only matters when operand is a REG and
3114 it is a hard reg. This is because it is passed
3115 to reg_fits_class_p if it is a REG and all pseudos
3116 return 0 from that function. */
3117 if (REG_P (SUBREG_REG (operand
))
3118 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3120 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3121 GET_MODE (SUBREG_REG (operand
)),
3122 SUBREG_BYTE (operand
),
3123 GET_MODE (operand
)) < 0)
3125 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3126 GET_MODE (SUBREG_REG (operand
)),
3127 SUBREG_BYTE (operand
),
3128 GET_MODE (operand
));
3130 operand
= SUBREG_REG (operand
);
3131 /* Force reload if this is a constant or PLUS or if there may
3132 be a problem accessing OPERAND in the outer mode. */
3133 scalar_int_mode inner_mode
;
3134 if (CONSTANT_P (operand
)
3135 || GET_CODE (operand
) == PLUS
3136 /* We must force a reload of paradoxical SUBREGs
3137 of a MEM because the alignment of the inner value
3138 may not be enough to do the outer reference. On
3139 big-endian machines, it may also reference outside
3142 On machines that extend byte operations and we have a
3143 SUBREG where both the inner and outer modes are no wider
3144 than a word and the inner mode is narrower, is integral,
3145 and gets extended when loaded from memory, combine.c has
3146 made assumptions about the behavior of the machine in such
3147 register access. If the data is, in fact, in memory we
3148 must always load using the size assumed to be in the
3149 register and let the insn do the different-sized
3152 This is doubly true if WORD_REGISTER_OPERATIONS. In
3153 this case eliminate_regs has left non-paradoxical
3154 subregs for push_reload to see. Make sure it does
3155 by forcing the reload.
3157 ??? When is it right at this stage to have a subreg
3158 of a mem that is _not_ to be handled specially? IMO
3159 those should have been reduced to just a mem. */
3160 || ((MEM_P (operand
)
3162 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3163 && (WORD_REGISTER_OPERATIONS
3165 (GET_MODE_BITSIZE (GET_MODE (operand
)),
3167 && (paradoxical_subreg_p
3168 (operand_mode
[i
], GET_MODE (operand
)))))
3170 || (known_le (GET_MODE_SIZE (operand_mode
[i
]),
3172 && (is_a
<scalar_int_mode
>
3173 (GET_MODE (operand
), &inner_mode
))
3174 && (GET_MODE_SIZE (inner_mode
)
3176 && paradoxical_subreg_p (operand_mode
[i
],
3178 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)))
3179 /* We must force a reload of a SUBREG's inner expression
3180 if it is a pseudo that will become a MEM and the MEM
3181 has a mode-dependent address, as in that case we
3182 obviously cannot change the mode of the MEM to that
3183 of the containing SUBREG as that would change the
3184 interpretation of the address. */
3186 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3187 && reg_equiv_mem (REGNO (operand
))
3188 && (mode_dependent_address_p
3189 (XEXP (reg_equiv_mem (REGNO (operand
)), 0),
3191 (reg_equiv_mem (REGNO (operand
)))))))
3196 this_alternative
[i
] = NO_REGS
;
3197 this_alternative_win
[i
] = 0;
3198 this_alternative_match_win
[i
] = 0;
3199 this_alternative_offmemok
[i
] = 0;
3200 this_alternative_earlyclobber
[i
] = 0;
3201 this_alternative_matches
[i
] = -1;
3203 /* An empty constraint or empty alternative
3204 allows anything which matched the pattern. */
3205 if (*p
== 0 || *p
== ',')
3208 /* Scan this alternative's specs for this operand;
3209 set WIN if the operand fits any letter in this alternative.
3210 Otherwise, clear BADOP if this operand could
3211 fit some letter after reloads,
3212 or set WINREG if this operand could fit after reloads
3213 provided the constraint allows some registers. */
3216 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3234 /* Ignore rest of this alternative as far as
3235 reloading is concerned. */
3238 while (*p
&& *p
!= ',');
3242 case '0': case '1': case '2': case '3': case '4':
3243 case '5': case '6': case '7': case '8': case '9':
3244 m
= strtoul (p
, &end
, 10);
3248 this_alternative_matches
[i
] = m
;
3249 /* We are supposed to match a previous operand.
3250 If we do, we win if that one did.
3251 If we do not, count both of the operands as losers.
3252 (This is too conservative, since most of the time
3253 only a single reload insn will be needed to make
3254 the two operands win. As a result, this alternative
3255 may be rejected when it is actually desirable.) */
3256 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3257 /* If we are matching as if two operands were swapped,
3258 also pretend that operands_match had been computed
3260 But if I is the second of those and C is the first,
3261 don't exchange them, because operands_match is valid
3262 only on one side of its diagonal. */
3264 [(m
== commutative
|| m
== commutative
+ 1)
3265 ? 2 * commutative
+ 1 - m
: m
]
3266 [(i
== commutative
|| i
== commutative
+ 1)
3267 ? 2 * commutative
+ 1 - i
: i
])
3268 : operands_match
[m
][i
])
3270 /* If we are matching a non-offsettable address where an
3271 offsettable address was expected, then we must reject
3272 this combination, because we can't reload it. */
3273 if (this_alternative_offmemok
[m
]
3274 && MEM_P (recog_data
.operand
[m
])
3275 && this_alternative
[m
] == NO_REGS
3276 && ! this_alternative_win
[m
])
3279 did_match
= this_alternative_win
[m
];
3283 /* Operands don't match. */
3286 /* Retroactively mark the operand we had to match
3287 as a loser, if it wasn't already. */
3288 if (this_alternative_win
[m
])
3290 this_alternative_win
[m
] = 0;
3291 if (this_alternative
[m
] == NO_REGS
)
3293 /* But count the pair only once in the total badness of
3294 this alternative, if the pair can be a dummy reload.
3295 The pointers in operand_loc are not swapped; swap
3296 them by hand if necessary. */
3297 if (swapped
&& i
== commutative
)
3298 loc1
= commutative
+ 1;
3299 else if (swapped
&& i
== commutative
+ 1)
3303 if (swapped
&& m
== commutative
)
3304 loc2
= commutative
+ 1;
3305 else if (swapped
&& m
== commutative
+ 1)
3310 = find_dummy_reload (recog_data
.operand
[i
],
3311 recog_data
.operand
[m
],
3312 recog_data
.operand_loc
[loc1
],
3313 recog_data
.operand_loc
[loc2
],
3314 operand_mode
[i
], operand_mode
[m
],
3315 this_alternative
[m
], -1,
3316 this_alternative_earlyclobber
[m
]);
3321 /* This can be fixed with reloads if the operand
3322 we are supposed to match can be fixed with reloads. */
3324 this_alternative
[i
] = this_alternative
[m
];
3326 /* If we have to reload this operand and some previous
3327 operand also had to match the same thing as this
3328 operand, we don't know how to do that. So reject this
3330 if (! did_match
|| force_reload
)
3331 for (j
= 0; j
< i
; j
++)
3332 if (this_alternative_matches
[j
]
3333 == this_alternative_matches
[i
])
3341 /* All necessary reloads for an address_operand
3342 were handled in find_reloads_address. */
3344 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3350 case TARGET_MEM_CONSTRAINT
:
3355 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3356 && reg_renumber
[REGNO (operand
)] < 0))
3358 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3365 && ! address_reloaded
[i
]
3366 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3367 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3373 && ! address_reloaded
[i
]
3374 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3375 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3379 /* Memory operand whose address is not offsettable. */
3384 && ! (ind_levels
? offsettable_memref_p (operand
)
3385 : offsettable_nonstrict_memref_p (operand
))
3386 /* Certain mem addresses will become offsettable
3387 after they themselves are reloaded. This is important;
3388 we don't want our own handling of unoffsettables
3389 to override the handling of reg_equiv_address. */
3390 && !(REG_P (XEXP (operand
, 0))
3392 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3396 /* Memory operand whose address is offsettable. */
3400 if ((MEM_P (operand
)
3401 /* If IND_LEVELS, find_reloads_address won't reload a
3402 pseudo that didn't get a hard reg, so we have to
3403 reject that case. */
3404 && ((ind_levels
? offsettable_memref_p (operand
)
3405 : offsettable_nonstrict_memref_p (operand
))
3406 /* A reloaded address is offsettable because it is now
3407 just a simple register indirect. */
3408 || address_reloaded
[i
] == 1))
3410 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3411 && reg_renumber
[REGNO (operand
)] < 0
3412 /* If reg_equiv_address is nonzero, we will be
3413 loading it into a register; hence it will be
3414 offsettable, but we cannot say that reg_equiv_mem
3415 is offsettable without checking. */
3416 && ((reg_equiv_mem (REGNO (operand
)) != 0
3417 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3418 || (reg_equiv_address (REGNO (operand
)) != 0))))
3420 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3428 /* Output operand that is stored before the need for the
3429 input operands (and their index registers) is over. */
3430 earlyclobber
= 1, this_earlyclobber
= 1;
3440 /* A PLUS is never a valid operand, but reload can make
3441 it from a register when eliminating registers. */
3442 && GET_CODE (operand
) != PLUS
3443 /* A SCRATCH is not a valid operand. */
3444 && GET_CODE (operand
) != SCRATCH
3445 && (! CONSTANT_P (operand
)
3447 || LEGITIMATE_PIC_OPERAND_P (operand
))
3448 && (GENERAL_REGS
== ALL_REGS
3450 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3451 && reg_renumber
[REGNO (operand
)] < 0)))
3457 cn
= lookup_constraint (p
);
3458 switch (get_constraint_type (cn
))
3461 cl
= reg_class_for_constraint (cn
);
3467 if (CONST_INT_P (operand
)
3468 && (insn_const_int_ok_for_constraint
3469 (INTVAL (operand
), cn
)))
3476 if (constraint_satisfied_p (operand
, cn
))
3478 /* If the address was already reloaded,
3480 else if (MEM_P (operand
) && address_reloaded
[i
] == 1)
3482 /* Likewise if the address will be reloaded because
3483 reg_equiv_address is nonzero. For reg_equiv_mem
3484 we have to check. */
3485 else if (REG_P (operand
)
3486 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3487 && reg_renumber
[REGNO (operand
)] < 0
3488 && ((reg_equiv_mem (REGNO (operand
)) != 0
3489 && (constraint_satisfied_p
3490 (reg_equiv_mem (REGNO (operand
)),
3492 || (reg_equiv_address (REGNO (operand
))
3496 /* If we didn't already win, we can reload
3497 constants via force_const_mem, and other
3498 MEMs by reloading the address like for 'o'. */
3499 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3506 case CT_SPECIAL_MEMORY
:
3509 if (constraint_satisfied_p (operand
, cn
))
3511 /* Likewise if the address will be reloaded because
3512 reg_equiv_address is nonzero. For reg_equiv_mem
3513 we have to check. */
3514 else if (REG_P (operand
)
3515 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3516 && reg_renumber
[REGNO (operand
)] < 0
3517 && reg_equiv_mem (REGNO (operand
)) != 0
3518 && (constraint_satisfied_p
3519 (reg_equiv_mem (REGNO (operand
)), cn
)))
3524 if (constraint_satisfied_p (operand
, cn
))
3527 /* If we didn't already win, we can reload
3528 the address into a base register. */
3530 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3536 if (constraint_satisfied_p (operand
, cn
))
3544 = reg_class_subunion
[this_alternative
[i
]][cl
];
3545 if (GET_MODE (operand
) == BLKmode
)
3549 && reg_fits_class_p (operand
, this_alternative
[i
],
3550 offset
, GET_MODE (recog_data
.operand
[i
])))
3554 while ((p
+= len
), c
);
3556 if (swapped
== (commutative
>= 0 ? 1 : 0))
3559 /* If this operand could be handled with a reg,
3560 and some reg is allowed, then this operand can be handled. */
3561 if (winreg
&& this_alternative
[i
] != NO_REGS
3562 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3565 /* Record which operands fit this alternative. */
3566 this_alternative_earlyclobber
[i
] = earlyclobber
;
3567 if (win
&& ! force_reload
)
3568 this_alternative_win
[i
] = 1;
3569 else if (did_match
&& ! force_reload
)
3570 this_alternative_match_win
[i
] = 1;
3573 int const_to_mem
= 0;
3575 this_alternative_offmemok
[i
] = offmemok
;
3579 /* Alternative loses if it has no regs for a reg operand. */
3581 && this_alternative
[i
] == NO_REGS
3582 && this_alternative_matches
[i
] < 0)
3585 /* If this is a constant that is reloaded into the desired
3586 class by copying it to memory first, count that as another
3587 reload. This is consistent with other code and is
3588 required to avoid choosing another alternative when
3589 the constant is moved into memory by this function on
3590 an early reload pass. Note that the test here is
3591 precisely the same as in the code below that calls
3593 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3594 && ((targetm
.preferred_reload_class (operand
,
3595 this_alternative
[i
])
3597 || no_input_reloads
))
3600 if (this_alternative
[i
] != NO_REGS
)
3604 /* Alternative loses if it requires a type of reload not
3605 permitted for this insn. We can always reload SCRATCH
3606 and objects with a REG_UNUSED note. */
3607 if (GET_CODE (operand
) != SCRATCH
3608 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3609 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3611 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3615 /* If we can't reload this value at all, reject this
3616 alternative. Note that we could also lose due to
3617 LIMIT_RELOAD_CLASS, but we don't check that
3620 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3622 if (targetm
.preferred_reload_class (operand
,
3623 this_alternative
[i
])
3627 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3628 && (targetm
.preferred_output_reload_class (operand
,
3629 this_alternative
[i
])
3634 /* We prefer to reload pseudos over reloading other things,
3635 since such reloads may be able to be eliminated later.
3636 If we are reloading a SCRATCH, we won't be generating any
3637 insns, just using a register, so it is also preferred.
3638 So bump REJECT in other cases. Don't do this in the
3639 case where we are forcing a constant into memory and
3640 it will then win since we don't want to have a different
3641 alternative match then. */
3642 if (! (REG_P (operand
)
3643 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3644 && GET_CODE (operand
) != SCRATCH
3645 && ! (const_to_mem
&& constmemok
))
3648 /* Input reloads can be inherited more often than output
3649 reloads can be removed, so penalize output reloads. */
3650 if (operand_type
[i
] != RELOAD_FOR_INPUT
3651 && GET_CODE (operand
) != SCRATCH
)
3655 /* If this operand is a pseudo register that didn't get
3656 a hard reg and this alternative accepts some
3657 register, see if the class that we want is a subset
3658 of the preferred class for this register. If not,
3659 but it intersects that class, use the preferred class
3660 instead. If it does not intersect the preferred
3661 class, show that usage of this alternative should be
3662 discouraged; it will be discouraged more still if the
3663 register is `preferred or nothing'. We do this
3664 because it increases the chance of reusing our spill
3665 register in a later insn and avoiding a pair of
3666 memory stores and loads.
3668 Don't bother with this if this alternative will
3669 accept this operand.
3671 Don't do this for a multiword operand, since it is
3672 only a small win and has the risk of requiring more
3673 spill registers, which could cause a large loss.
3675 Don't do this if the preferred class has only one
3676 register because we might otherwise exhaust the
3679 if (! win
&& ! did_match
3680 && this_alternative
[i
] != NO_REGS
3681 && known_le (GET_MODE_SIZE (operand_mode
[i
]), UNITS_PER_WORD
)
3682 && reg_class_size
[(int) preferred_class
[i
]] > 0
3683 && ! small_register_class_p (preferred_class
[i
]))
3685 if (! reg_class_subset_p (this_alternative
[i
],
3686 preferred_class
[i
]))
3688 /* Since we don't have a way of forming the intersection,
3689 we just do something special if the preferred class
3690 is a subset of the class we have; that's the most
3691 common case anyway. */
3692 if (reg_class_subset_p (preferred_class
[i
],
3693 this_alternative
[i
]))
3694 this_alternative
[i
] = preferred_class
[i
];
3696 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3701 /* Now see if any output operands that are marked "earlyclobber"
3702 in this alternative conflict with any input operands
3703 or any memory addresses. */
3705 for (i
= 0; i
< noperands
; i
++)
3706 if (this_alternative_earlyclobber
[i
]
3707 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3709 struct decomposition early_data
;
3711 early_data
= decompose (recog_data
.operand
[i
]);
3713 gcc_assert (modified
[i
] != RELOAD_READ
);
3715 if (this_alternative
[i
] == NO_REGS
)
3717 this_alternative_earlyclobber
[i
] = 0;
3718 gcc_assert (this_insn_is_asm
);
3719 error_for_asm (this_insn
,
3720 "%<&%> constraint used with no register class");
3723 for (j
= 0; j
< noperands
; j
++)
3724 /* Is this an input operand or a memory ref? */
3725 if ((MEM_P (recog_data
.operand
[j
])
3726 || modified
[j
] != RELOAD_WRITE
)
3728 /* Ignore things like match_operator operands. */
3729 && !recog_data
.is_operator
[j
]
3730 /* Don't count an input operand that is constrained to match
3731 the early clobber operand. */
3732 && ! (this_alternative_matches
[j
] == i
3733 && rtx_equal_p (recog_data
.operand
[i
],
3734 recog_data
.operand
[j
]))
3735 /* Is it altered by storing the earlyclobber operand? */
3736 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3739 /* If the output is in a non-empty few-regs class,
3740 it's costly to reload it, so reload the input instead. */
3741 if (small_register_class_p (this_alternative
[i
])
3742 && (REG_P (recog_data
.operand
[j
])
3743 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3746 this_alternative_win
[j
] = 0;
3747 this_alternative_match_win
[j
] = 0;
3752 /* If an earlyclobber operand conflicts with something,
3753 it must be reloaded, so request this and count the cost. */
3757 this_alternative_win
[i
] = 0;
3758 this_alternative_match_win
[j
] = 0;
3759 for (j
= 0; j
< noperands
; j
++)
3760 if (this_alternative_matches
[j
] == i
3761 && this_alternative_match_win
[j
])
3763 this_alternative_win
[j
] = 0;
3764 this_alternative_match_win
[j
] = 0;
3770 /* If one alternative accepts all the operands, no reload required,
3771 choose that alternative; don't consider the remaining ones. */
3774 /* Unswap these so that they are never swapped at `finish'. */
3777 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3778 recog_data
.operand
[commutative
+ 1]
3779 = substed_operand
[commutative
+ 1];
3781 for (i
= 0; i
< noperands
; i
++)
3783 goal_alternative_win
[i
] = this_alternative_win
[i
];
3784 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3785 goal_alternative
[i
] = this_alternative
[i
];
3786 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3787 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3788 goal_alternative_earlyclobber
[i
]
3789 = this_alternative_earlyclobber
[i
];
3791 goal_alternative_number
= this_alternative_number
;
3792 goal_alternative_swapped
= swapped
;
3793 goal_earlyclobber
= this_earlyclobber
;
3797 /* REJECT, set by the ! and ? constraint characters and when a register
3798 would be reloaded into a non-preferred class, discourages the use of
3799 this alternative for a reload goal. REJECT is incremented by six
3800 for each ? and two for each non-preferred class. */
3801 losers
= losers
* 6 + reject
;
3803 /* If this alternative can be made to work by reloading,
3804 and it needs less reloading than the others checked so far,
3805 record it as the chosen goal for reloading. */
3810 for (i
= 0; i
< noperands
; i
++)
3812 goal_alternative
[i
] = this_alternative
[i
];
3813 goal_alternative_win
[i
] = this_alternative_win
[i
];
3814 goal_alternative_match_win
[i
]
3815 = this_alternative_match_win
[i
];
3816 goal_alternative_offmemok
[i
]
3817 = this_alternative_offmemok
[i
];
3818 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3819 goal_alternative_earlyclobber
[i
]
3820 = this_alternative_earlyclobber
[i
];
3822 goal_alternative_swapped
= swapped
;
3824 goal_alternative_number
= this_alternative_number
;
3825 goal_earlyclobber
= this_earlyclobber
;
3831 /* If the commutative operands have been swapped, swap
3832 them back in order to check the next alternative. */
3833 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3834 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3835 /* Unswap the duplicates too. */
3836 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3837 if (recog_data
.dup_num
[i
] == commutative
3838 || recog_data
.dup_num
[i
] == commutative
+ 1)
3839 *recog_data
.dup_loc
[i
]
3840 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3842 /* Unswap the operand related information as well. */
3843 std::swap (preferred_class
[commutative
],
3844 preferred_class
[commutative
+ 1]);
3845 std::swap (pref_or_nothing
[commutative
],
3846 pref_or_nothing
[commutative
+ 1]);
3847 std::swap (address_reloaded
[commutative
],
3848 address_reloaded
[commutative
+ 1]);
3853 /* The operands don't meet the constraints.
3854 goal_alternative describes the alternative
3855 that we could reach by reloading the fewest operands.
3856 Reload so as to fit it. */
3858 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3860 /* No alternative works with reloads?? */
3861 if (insn_code_number
>= 0)
3862 fatal_insn ("unable to generate reloads for:", insn
);
3863 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3864 /* Avoid further trouble with this insn. */
3865 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3870 /* Jump to `finish' from above if all operands are valid already.
3871 In that case, goal_alternative_win is all 1. */
3874 /* Right now, for any pair of operands I and J that are required to match,
3876 goal_alternative_matches[J] is I.
3877 Set up goal_alternative_matched as the inverse function:
3878 goal_alternative_matched[I] = J. */
3880 for (i
= 0; i
< noperands
; i
++)
3881 goal_alternative_matched
[i
] = -1;
3883 for (i
= 0; i
< noperands
; i
++)
3884 if (! goal_alternative_win
[i
]
3885 && goal_alternative_matches
[i
] >= 0)
3886 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3888 for (i
= 0; i
< noperands
; i
++)
3889 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3891 /* If the best alternative is with operands 1 and 2 swapped,
3892 consider them swapped before reporting the reloads. Update the
3893 operand numbers of any reloads already pushed. */
3895 if (goal_alternative_swapped
)
3897 std::swap (substed_operand
[commutative
],
3898 substed_operand
[commutative
+ 1]);
3899 std::swap (recog_data
.operand
[commutative
],
3900 recog_data
.operand
[commutative
+ 1]);
3901 std::swap (*recog_data
.operand_loc
[commutative
],
3902 *recog_data
.operand_loc
[commutative
+ 1]);
3904 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3905 if (recog_data
.dup_num
[i
] == commutative
3906 || recog_data
.dup_num
[i
] == commutative
+ 1)
3907 *recog_data
.dup_loc
[i
]
3908 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3910 for (i
= 0; i
< n_reloads
; i
++)
3912 if (rld
[i
].opnum
== commutative
)
3913 rld
[i
].opnum
= commutative
+ 1;
3914 else if (rld
[i
].opnum
== commutative
+ 1)
3915 rld
[i
].opnum
= commutative
;
3919 for (i
= 0; i
< noperands
; i
++)
3921 operand_reloadnum
[i
] = -1;
3923 /* If this is an earlyclobber operand, we need to widen the scope.
3924 The reload must remain valid from the start of the insn being
3925 reloaded until after the operand is stored into its destination.
3926 We approximate this with RELOAD_OTHER even though we know that we
3927 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3929 One special case that is worth checking is when we have an
3930 output that is earlyclobber but isn't used past the insn (typically
3931 a SCRATCH). In this case, we only need have the reload live
3932 through the insn itself, but not for any of our input or output
3934 But we must not accidentally narrow the scope of an existing
3935 RELOAD_OTHER reload - leave these alone.
3937 In any case, anything needed to address this operand can remain
3938 however they were previously categorized. */
3940 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3942 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3943 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3946 /* Any constants that aren't allowed and can't be reloaded
3947 into registers are here changed into memory references. */
3948 for (i
= 0; i
< noperands
; i
++)
3949 if (! goal_alternative_win
[i
])
3951 rtx op
= recog_data
.operand
[i
];
3952 rtx subreg
= NULL_RTX
;
3953 rtx plus
= NULL_RTX
;
3954 machine_mode mode
= operand_mode
[i
];
3956 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3957 push_reload so we have to let them pass here. */
3958 if (GET_CODE (op
) == SUBREG
)
3961 op
= SUBREG_REG (op
);
3962 mode
= GET_MODE (op
);
3965 if (GET_CODE (op
) == PLUS
)
3971 if (CONST_POOL_OK_P (mode
, op
)
3972 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3974 || no_input_reloads
))
3976 int this_address_reloaded
;
3977 rtx tem
= force_const_mem (mode
, op
);
3979 /* If we stripped a SUBREG or a PLUS above add it back. */
3980 if (plus
!= NULL_RTX
)
3981 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
3983 if (subreg
!= NULL_RTX
)
3984 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
3986 this_address_reloaded
= 0;
3987 substed_operand
[i
] = recog_data
.operand
[i
]
3988 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
3989 0, insn
, &this_address_reloaded
);
3991 /* If the alternative accepts constant pool refs directly
3992 there will be no reload needed at all. */
3993 if (plus
== NULL_RTX
3994 && subreg
== NULL_RTX
3995 && alternative_allows_const_pool_ref (this_address_reloaded
!= 1
3996 ? substed_operand
[i
]
3998 recog_data
.constraints
[i
],
3999 goal_alternative_number
))
4000 goal_alternative_win
[i
] = 1;
4004 /* Record the values of the earlyclobber operands for the caller. */
4005 if (goal_earlyclobber
)
4006 for (i
= 0; i
< noperands
; i
++)
4007 if (goal_alternative_earlyclobber
[i
])
4008 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
4010 /* Now record reloads for all the operands that need them. */
4011 for (i
= 0; i
< noperands
; i
++)
4012 if (! goal_alternative_win
[i
])
4014 /* Operands that match previous ones have already been handled. */
4015 if (goal_alternative_matches
[i
] >= 0)
4017 /* Handle an operand with a nonoffsettable address
4018 appearing where an offsettable address will do
4019 by reloading the address into a base register.
4021 ??? We can also do this when the operand is a register and
4022 reg_equiv_mem is not offsettable, but this is a bit tricky,
4023 so we don't bother with it. It may not be worth doing. */
4024 else if (goal_alternative_matched
[i
] == -1
4025 && goal_alternative_offmemok
[i
]
4026 && MEM_P (recog_data
.operand
[i
]))
4028 /* If the address to be reloaded is a VOIDmode constant,
4029 use the default address mode as mode of the reload register,
4030 as would have been done by find_reloads_address. */
4031 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
4032 machine_mode address_mode
;
4034 address_mode
= get_address_mode (recog_data
.operand
[i
]);
4035 operand_reloadnum
[i
]
4036 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
4037 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
4038 base_reg_class (VOIDmode
, as
, MEM
, SCRATCH
),
4040 VOIDmode
, 0, 0, i
, RELOAD_OTHER
);
4041 rld
[operand_reloadnum
[i
]].inc
4042 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4044 /* If this operand is an output, we will have made any
4045 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4046 now we are treating part of the operand as an input, so
4047 we must change these to RELOAD_FOR_OTHER_ADDRESS. */
4049 if (modified
[i
] == RELOAD_WRITE
)
4051 for (j
= 0; j
< n_reloads
; j
++)
4053 if (rld
[j
].opnum
== i
)
4055 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4056 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4057 else if (rld
[j
].when_needed
4058 == RELOAD_FOR_OUTADDR_ADDRESS
)
4059 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4064 else if (goal_alternative_matched
[i
] == -1)
4066 operand_reloadnum
[i
]
4067 = push_reload ((modified
[i
] != RELOAD_WRITE
4068 ? recog_data
.operand
[i
] : 0),
4069 (modified
[i
] != RELOAD_READ
4070 ? recog_data
.operand
[i
] : 0),
4071 (modified
[i
] != RELOAD_WRITE
4072 ? recog_data
.operand_loc
[i
] : 0),
4073 (modified
[i
] != RELOAD_READ
4074 ? recog_data
.operand_loc
[i
] : 0),
4075 (enum reg_class
) goal_alternative
[i
],
4076 (modified
[i
] == RELOAD_WRITE
4077 ? VOIDmode
: operand_mode
[i
]),
4078 (modified
[i
] == RELOAD_READ
4079 ? VOIDmode
: operand_mode
[i
]),
4080 (insn_code_number
< 0 ? 0
4081 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4082 0, i
, operand_type
[i
]);
4084 /* In a matching pair of operands, one must be input only
4085 and the other must be output only.
4086 Pass the input operand as IN and the other as OUT. */
4087 else if (modified
[i
] == RELOAD_READ
4088 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4090 operand_reloadnum
[i
]
4091 = push_reload (recog_data
.operand
[i
],
4092 recog_data
.operand
[goal_alternative_matched
[i
]],
4093 recog_data
.operand_loc
[i
],
4094 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4095 (enum reg_class
) goal_alternative
[i
],
4097 operand_mode
[goal_alternative_matched
[i
]],
4098 0, 0, i
, RELOAD_OTHER
);
4099 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4101 else if (modified
[i
] == RELOAD_WRITE
4102 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4104 operand_reloadnum
[goal_alternative_matched
[i
]]
4105 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4106 recog_data
.operand
[i
],
4107 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4108 recog_data
.operand_loc
[i
],
4109 (enum reg_class
) goal_alternative
[i
],
4110 operand_mode
[goal_alternative_matched
[i
]],
4112 0, 0, i
, RELOAD_OTHER
);
4113 operand_reloadnum
[i
] = output_reloadnum
;
4117 gcc_assert (insn_code_number
< 0);
4118 error_for_asm (insn
, "inconsistent operand constraints "
4120 /* Avoid further trouble with this insn. */
4121 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4126 else if (goal_alternative_matched
[i
] < 0
4127 && goal_alternative_matches
[i
] < 0
4128 && address_operand_reloaded
[i
] != 1
4131 /* For each non-matching operand that's a MEM or a pseudo-register
4132 that didn't get a hard register, make an optional reload.
4133 This may get done even if the insn needs no reloads otherwise. */
4135 rtx operand
= recog_data
.operand
[i
];
4137 while (GET_CODE (operand
) == SUBREG
)
4138 operand
= SUBREG_REG (operand
);
4139 if ((MEM_P (operand
)
4141 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4142 /* If this is only for an output, the optional reload would not
4143 actually cause us to use a register now, just note that
4144 something is stored here. */
4145 && (goal_alternative
[i
] != NO_REGS
4146 || modified
[i
] == RELOAD_WRITE
)
4147 && ! no_input_reloads
4148 /* An optional output reload might allow to delete INSN later.
4149 We mustn't make in-out reloads on insns that are not permitted
4151 If this is an asm, we can't delete it; we must not even call
4152 push_reload for an optional output reload in this case,
4153 because we can't be sure that the constraint allows a register,
4154 and push_reload verifies the constraints for asms. */
4155 && (modified
[i
] == RELOAD_READ
4156 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4157 operand_reloadnum
[i
]
4158 = push_reload ((modified
[i
] != RELOAD_WRITE
4159 ? recog_data
.operand
[i
] : 0),
4160 (modified
[i
] != RELOAD_READ
4161 ? recog_data
.operand
[i
] : 0),
4162 (modified
[i
] != RELOAD_WRITE
4163 ? recog_data
.operand_loc
[i
] : 0),
4164 (modified
[i
] != RELOAD_READ
4165 ? recog_data
.operand_loc
[i
] : 0),
4166 (enum reg_class
) goal_alternative
[i
],
4167 (modified
[i
] == RELOAD_WRITE
4168 ? VOIDmode
: operand_mode
[i
]),
4169 (modified
[i
] == RELOAD_READ
4170 ? VOIDmode
: operand_mode
[i
]),
4171 (insn_code_number
< 0 ? 0
4172 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4173 1, i
, operand_type
[i
]);
4174 /* If a memory reference remains (either as a MEM or a pseudo that
4175 did not get a hard register), yet we can't make an optional
4176 reload, check if this is actually a pseudo register reference;
4177 we then need to emit a USE and/or a CLOBBER so that reload
4178 inheritance will do the right thing. */
4182 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4183 && reg_renumber
[REGNO (operand
)] < 0)))
4185 operand
= *recog_data
.operand_loc
[i
];
4187 while (GET_CODE (operand
) == SUBREG
)
4188 operand
= SUBREG_REG (operand
);
4189 if (REG_P (operand
))
4191 if (modified
[i
] != RELOAD_WRITE
)
4192 /* We mark the USE with QImode so that we recognize
4193 it as one that can be safely deleted at the end
4195 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4197 if (modified
[i
] != RELOAD_READ
)
4198 emit_insn_after (gen_clobber (operand
), insn
);
4202 else if (goal_alternative_matches
[i
] >= 0
4203 && goal_alternative_win
[goal_alternative_matches
[i
]]
4204 && modified
[i
] == RELOAD_READ
4205 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4206 && ! no_input_reloads
&& ! no_output_reloads
4209 /* Similarly, make an optional reload for a pair of matching
4210 objects that are in MEM or a pseudo that didn't get a hard reg. */
4212 rtx operand
= recog_data
.operand
[i
];
4214 while (GET_CODE (operand
) == SUBREG
)
4215 operand
= SUBREG_REG (operand
);
4216 if ((MEM_P (operand
)
4218 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4219 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4220 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4221 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4222 recog_data
.operand
[i
],
4223 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4224 recog_data
.operand_loc
[i
],
4225 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4226 operand_mode
[goal_alternative_matches
[i
]],
4228 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4231 /* Perform whatever substitutions on the operands we are supposed
4232 to make due to commutativity or replacement of registers
4233 with equivalent constants or memory slots. */
4235 for (i
= 0; i
< noperands
; i
++)
4237 /* We only do this on the last pass through reload, because it is
4238 possible for some data (like reg_equiv_address) to be changed during
4239 later passes. Moreover, we lose the opportunity to get a useful
4240 reload_{in,out}_reg when we do these replacements. */
4244 rtx substitution
= substed_operand
[i
];
4246 *recog_data
.operand_loc
[i
] = substitution
;
4248 /* If we're replacing an operand with a LABEL_REF, we need to
4249 make sure that there's a REG_LABEL_OPERAND note attached to
4250 this instruction. */
4251 if (GET_CODE (substitution
) == LABEL_REF
4252 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4253 label_ref_label (substitution
))
4254 /* For a JUMP_P, if it was a branch target it must have
4255 already been recorded as such. */
4257 || !label_is_jump_target_p (label_ref_label (substitution
),
4260 add_reg_note (insn
, REG_LABEL_OPERAND
,
4261 label_ref_label (substitution
));
4262 if (LABEL_P (label_ref_label (substitution
)))
4263 ++LABEL_NUSES (label_ref_label (substitution
));
4268 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4271 /* If this insn pattern contains any MATCH_DUP's, make sure that
4272 they will be substituted if the operands they match are substituted.
4273 Also do now any substitutions we already did on the operands.
4275 Don't do this if we aren't making replacements because we might be
4276 propagating things allocated by frame pointer elimination into places
4277 it doesn't expect. */
4279 if (insn_code_number
>= 0 && replace
)
4280 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4282 int opno
= recog_data
.dup_num
[i
];
4283 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4284 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4288 /* This loses because reloading of prior insns can invalidate the equivalence
4289 (or at least find_equiv_reg isn't smart enough to find it any more),
4290 causing this insn to need more reload regs than it needed before.
4291 It may be too late to make the reload regs available.
4292 Now this optimization is done safely in choose_reload_regs. */
4294 /* For each reload of a reg into some other class of reg,
4295 search for an existing equivalent reg (same value now) in the right class.
4296 We can use it as long as we don't need to change its contents. */
4297 for (i
= 0; i
< n_reloads
; i
++)
4298 if (rld
[i
].reg_rtx
== 0
4300 && REG_P (rld
[i
].in
)
4304 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4305 static_reload_reg_p
, 0, rld
[i
].inmode
);
4306 /* Prevent generation of insn to load the value
4307 because the one we found already has the value. */
4309 rld
[i
].in
= rld
[i
].reg_rtx
;
4313 /* If we detected error and replaced asm instruction by USE, forget about the
4315 if (GET_CODE (PATTERN (insn
)) == USE
4316 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4319 /* Perhaps an output reload can be combined with another
4320 to reduce needs by one. */
4321 if (!goal_earlyclobber
)
4324 /* If we have a pair of reloads for parts of an address, they are reloading
4325 the same object, the operands themselves were not reloaded, and they
4326 are for two operands that are supposed to match, merge the reloads and
4327 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4329 for (i
= 0; i
< n_reloads
; i
++)
4333 for (j
= i
+ 1; j
< n_reloads
; j
++)
4334 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4335 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4336 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4337 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4338 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4339 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4340 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4341 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4342 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4343 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4344 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4345 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4346 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4347 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4348 || (goal_alternative_matches
[rld
[j
].opnum
]
4351 for (k
= 0; k
< n_replacements
; k
++)
4352 if (replacements
[k
].what
== j
)
4353 replacements
[k
].what
= i
;
4355 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4356 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4357 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4359 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4364 /* Scan all the reloads and update their type.
4365 If a reload is for the address of an operand and we didn't reload
4366 that operand, change the type. Similarly, change the operand number
4367 of a reload when two operands match. If a reload is optional, treat it
4368 as though the operand isn't reloaded.
4370 ??? This latter case is somewhat odd because if we do the optional
4371 reload, it means the object is hanging around. Thus we need only
4372 do the address reload if the optional reload was NOT done.
4374 Change secondary reloads to be the address type of their operand, not
4377 If an operand's reload is now RELOAD_OTHER, change any
4378 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4379 RELOAD_FOR_OTHER_ADDRESS. */
4381 for (i
= 0; i
< n_reloads
; i
++)
4383 if (rld
[i
].secondary_p
4384 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4385 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4387 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4388 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4389 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4390 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4391 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4392 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4394 /* If we have a secondary reload to go along with this reload,
4395 change its type to RELOAD_FOR_OPADDR_ADDR. */
4397 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4398 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4399 && rld
[i
].secondary_in_reload
!= -1)
4401 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4403 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4405 /* If there's a tertiary reload we have to change it also. */
4406 if (secondary_in_reload
> 0
4407 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4408 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4409 = RELOAD_FOR_OPADDR_ADDR
;
4412 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4413 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4414 && rld
[i
].secondary_out_reload
!= -1)
4416 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4418 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4420 /* If there's a tertiary reload we have to change it also. */
4421 if (secondary_out_reload
4422 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4423 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4424 = RELOAD_FOR_OPADDR_ADDR
;
4427 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4428 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4429 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4431 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4434 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4435 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4436 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4437 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4439 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4441 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4442 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4445 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4446 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4447 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4449 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4450 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4451 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4452 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4453 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4454 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4455 This is complicated by the fact that a single operand can have more
4456 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4457 choose_reload_regs without affecting code quality, and cases that
4458 actually fail are extremely rare, so it turns out to be better to fix
4459 the problem here by not generating cases that choose_reload_regs will
4461 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4462 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4464 We can reduce the register pressure by exploiting that a
4465 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4466 does not conflict with any of them, if it is only used for the first of
4467 the RELOAD_FOR_X_ADDRESS reloads. */
4469 int first_op_addr_num
= -2;
4470 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4471 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4472 int need_change
= 0;
4473 /* We use last_op_addr_reload and the contents of the above arrays
4474 first as flags - -2 means no instance encountered, -1 means exactly
4475 one instance encountered.
4476 If more than one instance has been encountered, we store the reload
4477 number of the first reload of the kind in question; reload numbers
4478 are known to be non-negative. */
4479 for (i
= 0; i
< noperands
; i
++)
4480 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4481 for (i
= n_reloads
- 1; i
>= 0; i
--)
4483 switch (rld
[i
].when_needed
)
4485 case RELOAD_FOR_OPERAND_ADDRESS
:
4486 if (++first_op_addr_num
>= 0)
4488 first_op_addr_num
= i
;
4492 case RELOAD_FOR_INPUT_ADDRESS
:
4493 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4495 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4499 case RELOAD_FOR_OUTPUT_ADDRESS
:
4500 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4502 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4513 for (i
= 0; i
< n_reloads
; i
++)
4516 enum reload_type type
;
4518 switch (rld
[i
].when_needed
)
4520 case RELOAD_FOR_OPADDR_ADDR
:
4521 first_num
= first_op_addr_num
;
4522 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4524 case RELOAD_FOR_INPADDR_ADDRESS
:
4525 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4526 type
= RELOAD_FOR_INPUT_ADDRESS
;
4528 case RELOAD_FOR_OUTADDR_ADDRESS
:
4529 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4530 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4537 else if (i
> first_num
)
4538 rld
[i
].when_needed
= type
;
4541 /* Check if the only TYPE reload that uses reload I is
4542 reload FIRST_NUM. */
4543 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4545 if (rld
[j
].when_needed
== type
4546 && (rld
[i
].secondary_p
4547 ? rld
[j
].secondary_in_reload
== i
4548 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4550 rld
[i
].when_needed
= type
;
4559 /* See if we have any reloads that are now allowed to be merged
4560 because we've changed when the reload is needed to
4561 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4562 check for the most common cases. */
4564 for (i
= 0; i
< n_reloads
; i
++)
4565 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4566 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4567 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4568 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4569 for (j
= 0; j
< n_reloads
; j
++)
4570 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4571 && rld
[j
].when_needed
== rld
[i
].when_needed
4572 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4573 && rld
[i
].rclass
== rld
[j
].rclass
4574 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4575 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4577 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4578 transfer_replacements (i
, j
);
4582 /* If we made any reloads for addresses, see if they violate a
4583 "no input reloads" requirement for this insn. But loads that we
4584 do after the insn (such as for output addresses) are fine. */
4585 if (HAVE_cc0
&& no_input_reloads
)
4586 for (i
= 0; i
< n_reloads
; i
++)
4587 gcc_assert (rld
[i
].in
== 0
4588 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4589 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4591 /* Compute reload_mode and reload_nregs. */
4592 for (i
= 0; i
< n_reloads
; i
++)
4594 rld
[i
].mode
= rld
[i
].inmode
;
4595 if (rld
[i
].mode
== VOIDmode
4596 || partial_subreg_p (rld
[i
].mode
, rld
[i
].outmode
))
4597 rld
[i
].mode
= rld
[i
].outmode
;
4599 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4602 /* Special case a simple move with an input reload and a
4603 destination of a hard reg, if the hard reg is ok, use it. */
4604 for (i
= 0; i
< n_reloads
; i
++)
4605 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4606 && GET_CODE (PATTERN (insn
)) == SET
4607 && REG_P (SET_DEST (PATTERN (insn
)))
4608 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4609 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4610 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4612 rtx dest
= SET_DEST (PATTERN (insn
));
4613 unsigned int regno
= REGNO (dest
);
4615 if (regno
< FIRST_PSEUDO_REGISTER
4616 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4617 && targetm
.hard_regno_mode_ok (regno
, rld
[i
].mode
))
4619 int nr
= hard_regno_nregs (regno
, rld
[i
].mode
);
4622 for (nri
= 1; nri
< nr
; nri
++)
4623 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4630 rld
[i
].reg_rtx
= dest
;
4637 /* Return true if alternative number ALTNUM in constraint-string
4638 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4639 MEM gives the reference if its address hasn't been fully reloaded,
4640 otherwise it is NULL. */
4643 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4644 const char *constraint
, int altnum
)
4648 /* Skip alternatives before the one requested. */
4651 while (*constraint
++ != ',')
4655 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4656 If one of them is present, this alternative accepts the result of
4657 passing a constant-pool reference through find_reloads_toplev.
4659 The same is true of extra memory constraints if the address
4660 was reloaded into a register. However, the target may elect
4661 to disallow the original constant address, forcing it to be
4662 reloaded into a register instead. */
4663 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4664 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4666 enum constraint_num cn
= lookup_constraint (constraint
);
4667 if (insn_extra_memory_constraint (cn
)
4668 && (mem
== NULL
|| constraint_satisfied_p (mem
, cn
)))
4674 /* Scan X for memory references and scan the addresses for reloading.
4675 Also checks for references to "constant" regs that we want to eliminate
4676 and replaces them with the values they stand for.
4677 We may alter X destructively if it contains a reference to such.
4678 If X is just a constant reg, we return the equivalent value
4681 IND_LEVELS says how many levels of indirect addressing this machine
4684 OPNUM and TYPE identify the purpose of the reload.
4686 IS_SET_DEST is true if X is the destination of a SET, which is not
4687 appropriate to be replaced by a constant.
4689 INSN, if nonzero, is the insn in which we do the reload. It is used
4690 to determine if we may generate output reloads, and where to put USEs
4691 for pseudos that we have to replace with stack slots.
4693 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4694 result of find_reloads_address. */
4697 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4698 int ind_levels
, int is_set_dest
, rtx_insn
*insn
,
4699 int *address_reloaded
)
4701 RTX_CODE code
= GET_CODE (x
);
4703 const char *fmt
= GET_RTX_FORMAT (code
);
4709 /* This code is duplicated for speed in find_reloads. */
4710 int regno
= REGNO (x
);
4711 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4712 x
= reg_equiv_constant (regno
);
4714 /* This creates (subreg (mem...)) which would cause an unnecessary
4715 reload of the mem. */
4716 else if (reg_equiv_mem (regno
) != 0)
4717 x
= reg_equiv_mem (regno
);
4719 else if (reg_equiv_memory_loc (regno
)
4720 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4722 rtx mem
= make_memloc (x
, regno
);
4723 if (reg_equiv_address (regno
)
4724 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4726 /* If this is not a toplevel operand, find_reloads doesn't see
4727 this substitution. We have to emit a USE of the pseudo so
4728 that delete_output_reload can see it. */
4729 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4730 /* We mark the USE with QImode so that we recognize it
4731 as one that can be safely deleted at the end of
4733 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4736 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4737 opnum
, type
, ind_levels
, insn
);
4738 if (!rtx_equal_p (x
, mem
))
4739 push_reg_equiv_alt_mem (regno
, x
);
4740 if (address_reloaded
)
4741 *address_reloaded
= i
;
4750 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4751 opnum
, type
, ind_levels
, insn
);
4752 if (address_reloaded
)
4753 *address_reloaded
= i
;
4758 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4760 /* Check for SUBREG containing a REG that's equivalent to a
4761 constant. If the constant has a known value, truncate it
4762 right now. Similarly if we are extracting a single-word of a
4763 multi-word constant. If the constant is symbolic, allow it
4764 to be substituted normally. push_reload will strip the
4765 subreg later. The constant must not be VOIDmode, because we
4766 will lose the mode of the register (this should never happen
4767 because one of the cases above should handle it). */
4769 int regno
= REGNO (SUBREG_REG (x
));
4772 if (regno
>= FIRST_PSEUDO_REGISTER
4773 && reg_renumber
[regno
] < 0
4774 && reg_equiv_constant (regno
) != 0)
4777 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4778 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4780 if (CONSTANT_P (tem
)
4781 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4783 tem
= force_const_mem (GET_MODE (x
), tem
);
4784 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4785 &XEXP (tem
, 0), opnum
, type
,
4787 if (address_reloaded
)
4788 *address_reloaded
= i
;
4793 /* If the subreg contains a reg that will be converted to a mem,
4794 attempt to convert the whole subreg to a (narrower or wider)
4795 memory reference instead. If this succeeds, we're done --
4796 otherwise fall through to check whether the inner reg still
4797 needs address reloads anyway. */
4799 if (regno
>= FIRST_PSEUDO_REGISTER
4800 && reg_equiv_memory_loc (regno
) != 0)
4802 tem
= find_reloads_subreg_address (x
, opnum
, type
, ind_levels
,
4803 insn
, address_reloaded
);
4809 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4813 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4814 ind_levels
, is_set_dest
, insn
,
4816 /* If we have replaced a reg with it's equivalent memory loc -
4817 that can still be handled here e.g. if it's in a paradoxical
4818 subreg - we must make the change in a copy, rather than using
4819 a destructive change. This way, find_reloads can still elect
4820 not to do the change. */
4821 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4823 x
= shallow_copy_rtx (x
);
4826 XEXP (x
, i
) = new_part
;
4832 /* Return a mem ref for the memory equivalent of reg REGNO.
4833 This mem ref is not shared with anything. */
4836 make_memloc (rtx ad
, int regno
)
4838 /* We must rerun eliminate_regs, in case the elimination
4839 offsets have changed. */
4841 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4844 /* If TEM might contain a pseudo, we must copy it to avoid
4845 modifying it when we do the substitution for the reload. */
4846 if (rtx_varies_p (tem
, 0))
4847 tem
= copy_rtx (tem
);
4849 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4850 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4852 /* Copy the result if it's still the same as the equivalence, to avoid
4853 modifying it when we do the substitution for the reload. */
4854 if (tem
== reg_equiv_memory_loc (regno
))
4855 tem
= copy_rtx (tem
);
4859 /* Returns true if AD could be turned into a valid memory reference
4860 to mode MODE in address space AS by reloading the part pointed to
4861 by PART into a register. */
4864 maybe_memory_address_addr_space_p (machine_mode mode
, rtx ad
,
4865 addr_space_t as
, rtx
*part
)
4869 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4872 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4878 /* Record all reloads needed for handling memory address AD
4879 which appears in *LOC in a memory reference to mode MODE
4880 which itself is found in location *MEMREFLOC.
4881 Note that we take shortcuts assuming that no multi-reg machine mode
4882 occurs as part of an address.
4884 OPNUM and TYPE specify the purpose of this reload.
4886 IND_LEVELS says how many levels of indirect addressing this machine
4889 INSN, if nonzero, is the insn in which we do the reload. It is used
4890 to determine if we may generate output reloads, and where to put USEs
4891 for pseudos that we have to replace with stack slots.
4893 Value is one if this address is reloaded or replaced as a whole; it is
4894 zero if the top level of this address was not reloaded or replaced, and
4895 it is -1 if it may or may not have been reloaded or replaced.
4897 Note that there is no verification that the address will be valid after
4898 this routine does its work. Instead, we rely on the fact that the address
4899 was valid when reload started. So we need only undo things that reload
4900 could have broken. These are wrong register types, pseudos not allocated
4901 to a hard register, and frame pointer elimination. */
4904 find_reloads_address (machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4905 rtx
*loc
, int opnum
, enum reload_type type
,
4906 int ind_levels
, rtx_insn
*insn
)
4908 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4909 : ADDR_SPACE_GENERIC
;
4911 int removed_and
= 0;
4915 /* If the address is a register, see if it is a legitimate address and
4916 reload if not. We first handle the cases where we need not reload
4917 or where we must reload in a non-standard way. */
4923 if (reg_equiv_constant (regno
) != 0)
4925 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4926 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4927 GET_MODE (ad
), opnum
, type
, ind_levels
);
4931 tem
= reg_equiv_memory_loc (regno
);
4934 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4936 tem
= make_memloc (ad
, regno
);
4937 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4939 MEM_ADDR_SPACE (tem
)))
4943 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4944 &XEXP (tem
, 0), opnum
,
4945 ADDR_TYPE (type
), ind_levels
, insn
);
4946 if (!rtx_equal_p (tem
, orig
))
4947 push_reg_equiv_alt_mem (regno
, tem
);
4949 /* We can avoid a reload if the register's equivalent memory
4950 expression is valid as an indirect memory address.
4951 But not all addresses are valid in a mem used as an indirect
4952 address: only reg or reg+constant. */
4955 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4956 && (REG_P (XEXP (tem
, 0))
4957 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4958 && REG_P (XEXP (XEXP (tem
, 0), 0))
4959 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4961 /* TEM is not the same as what we'll be replacing the
4962 pseudo with after reload, put a USE in front of INSN
4963 in the final reload pass. */
4965 && num_not_at_initial_offset
4966 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4969 /* We mark the USE with QImode so that we
4970 recognize it as one that can be safely
4971 deleted at the end of reload. */
4972 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4975 /* This doesn't really count as replacing the address
4976 as a whole, since it is still a memory access. */
4984 /* The only remaining case where we can avoid a reload is if this is a
4985 hard register that is valid as a base register and which is not the
4986 subject of a CLOBBER in this insn. */
4988 else if (regno
< FIRST_PSEUDO_REGISTER
4989 && regno_ok_for_base_p (regno
, mode
, as
, MEM
, SCRATCH
)
4990 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4993 /* If we do not have one of the cases above, we must do the reload. */
4994 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0,
4995 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4996 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
5000 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
5002 /* The address appears valid, so reloads are not needed.
5003 But the address may contain an eliminable register.
5004 This can happen because a machine with indirect addressing
5005 may consider a pseudo register by itself a valid address even when
5006 it has failed to get a hard reg.
5007 So do a tree-walk to find and eliminate all such regs. */
5009 /* But first quickly dispose of a common case. */
5010 if (GET_CODE (ad
) == PLUS
5011 && CONST_INT_P (XEXP (ad
, 1))
5012 && REG_P (XEXP (ad
, 0))
5013 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
5016 subst_reg_equivs_changed
= 0;
5017 *loc
= subst_reg_equivs (ad
, insn
);
5019 if (! subst_reg_equivs_changed
)
5022 /* Check result for validity after substitution. */
5023 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
5027 #ifdef LEGITIMIZE_RELOAD_ADDRESS
5030 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
5032 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
5037 *memrefloc
= copy_rtx (*memrefloc
);
5038 XEXP (*memrefloc
, 0) = ad
;
5039 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5045 /* The address is not valid. We have to figure out why. First see if
5046 we have an outer AND and remove it if so. Then analyze what's inside. */
5048 if (GET_CODE (ad
) == AND
)
5051 loc
= &XEXP (ad
, 0);
5055 /* One possibility for why the address is invalid is that it is itself
5056 a MEM. This can happen when the frame pointer is being eliminated, a
5057 pseudo is not allocated to a hard register, and the offset between the
5058 frame and stack pointers is not its initial value. In that case the
5059 pseudo will have been replaced by a MEM referring to the
5063 /* First ensure that the address in this MEM is valid. Then, unless
5064 indirect addresses are valid, reload the MEM into a register. */
5066 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5067 opnum
, ADDR_TYPE (type
),
5068 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5070 /* If tem was changed, then we must create a new memory reference to
5071 hold it and store it back into memrefloc. */
5072 if (tem
!= ad
&& memrefloc
)
5074 *memrefloc
= copy_rtx (*memrefloc
);
5075 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5076 loc
= &XEXP (*memrefloc
, 0);
5078 loc
= &XEXP (*loc
, 0);
5081 /* Check similar cases as for indirect addresses as above except
5082 that we can allow pseudos and a MEM since they should have been
5083 taken care of above. */
5086 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5087 || MEM_P (XEXP (tem
, 0))
5088 || ! (REG_P (XEXP (tem
, 0))
5089 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5090 && REG_P (XEXP (XEXP (tem
, 0), 0))
5091 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5093 /* Must use TEM here, not AD, since it is the one that will
5094 have any subexpressions reloaded, if needed. */
5095 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5096 base_reg_class (mode
, as
, MEM
, SCRATCH
), GET_MODE (tem
),
5099 return ! removed_and
;
5105 /* If we have address of a stack slot but it's not valid because the
5106 displacement is too large, compute the sum in a register.
5107 Handle all base registers here, not just fp/ap/sp, because on some
5108 targets (namely SH) we can also get too large displacements from
5109 big-endian corrections. */
5110 else if (GET_CODE (ad
) == PLUS
5111 && REG_P (XEXP (ad
, 0))
5112 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5113 && CONST_INT_P (XEXP (ad
, 1))
5114 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
, PLUS
,
5116 /* Similarly, if we were to reload the base register and the
5117 mem+offset address is still invalid, then we want to reload
5118 the whole address, not just the base register. */
5119 || ! maybe_memory_address_addr_space_p
5120 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5123 /* Unshare the MEM rtx so we can safely alter it. */
5126 *memrefloc
= copy_rtx (*memrefloc
);
5127 loc
= &XEXP (*memrefloc
, 0);
5129 loc
= &XEXP (*loc
, 0);
5132 if (double_reg_address_ok
[mode
]
5133 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
,
5136 /* Unshare the sum as well. */
5137 *loc
= ad
= copy_rtx (ad
);
5139 /* Reload the displacement into an index reg.
5140 We assume the frame pointer or arg pointer is a base reg. */
5141 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5142 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5148 /* If the sum of two regs is not necessarily valid,
5149 reload the sum into a base reg.
5150 That will at least work. */
5151 find_reloads_address_part (ad
, loc
,
5152 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5153 GET_MODE (ad
), opnum
, type
, ind_levels
);
5155 return ! removed_and
;
5158 /* If we have an indexed stack slot, there are three possible reasons why
5159 it might be invalid: The index might need to be reloaded, the address
5160 might have been made by frame pointer elimination and hence have a
5161 constant out of range, or both reasons might apply.
5163 We can easily check for an index needing reload, but even if that is the
5164 case, we might also have an invalid constant. To avoid making the
5165 conservative assumption and requiring two reloads, we see if this address
5166 is valid when not interpreted strictly. If it is, the only problem is
5167 that the index needs a reload and find_reloads_address_1 will take care
5170 Handle all base registers here, not just fp/ap/sp, because on some
5171 targets (namely SPARC) we can also get invalid addresses from preventive
5172 subreg big-endian corrections made by find_reloads_toplev. We
5173 can also get expressions involving LO_SUM (rather than PLUS) from
5174 find_reloads_subreg_address.
5176 If we decide to do something, it must be that `double_reg_address_ok'
5177 is true. We generate a reload of the base register + constant and
5178 rework the sum so that the reload register will be added to the index.
5179 This is safe because we know the address isn't shared.
5181 We check for the base register as both the first and second operand of
5182 the innermost PLUS and/or LO_SUM. */
5184 for (op_index
= 0; op_index
< 2; ++op_index
)
5186 rtx operand
, addend
;
5187 enum rtx_code inner_code
;
5189 if (GET_CODE (ad
) != PLUS
)
5192 inner_code
= GET_CODE (XEXP (ad
, 0));
5193 if (!(GET_CODE (ad
) == PLUS
5194 && CONST_INT_P (XEXP (ad
, 1))
5195 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5198 operand
= XEXP (XEXP (ad
, 0), op_index
);
5199 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5202 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5204 if ((regno_ok_for_base_p (REGNO (operand
), mode
, as
, inner_code
,
5206 || operand
== frame_pointer_rtx
5207 || (!HARD_FRAME_POINTER_IS_FRAME_POINTER
5208 && operand
== hard_frame_pointer_rtx
)
5209 || (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
5210 && operand
== arg_pointer_rtx
)
5211 || operand
== stack_pointer_rtx
)
5212 && ! maybe_memory_address_addr_space_p
5213 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5218 offset_reg
= plus_constant (GET_MODE (ad
), operand
,
5219 INTVAL (XEXP (ad
, 1)));
5221 /* Form the adjusted address. */
5222 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5223 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5224 op_index
== 0 ? offset_reg
: addend
,
5225 op_index
== 0 ? addend
: offset_reg
);
5227 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5228 op_index
== 0 ? offset_reg
: addend
,
5229 op_index
== 0 ? addend
: offset_reg
);
5232 cls
= base_reg_class (mode
, as
, MEM
, GET_CODE (addend
));
5233 find_reloads_address_part (XEXP (ad
, op_index
),
5234 &XEXP (ad
, op_index
), cls
,
5235 GET_MODE (ad
), opnum
, type
, ind_levels
);
5236 find_reloads_address_1 (mode
, as
,
5237 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5238 GET_CODE (XEXP (ad
, op_index
)),
5239 &XEXP (ad
, 1 - op_index
), opnum
,
5246 /* See if address becomes valid when an eliminable register
5247 in a sum is replaced. */
5250 if (GET_CODE (ad
) == PLUS
)
5251 tem
= subst_indexed_address (ad
);
5252 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5254 /* Ok, we win that way. Replace any additional eliminable
5257 subst_reg_equivs_changed
= 0;
5258 tem
= subst_reg_equivs (tem
, insn
);
5260 /* Make sure that didn't make the address invalid again. */
5262 if (! subst_reg_equivs_changed
5263 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5270 /* If constants aren't valid addresses, reload the constant address
5272 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5274 machine_mode address_mode
= GET_MODE (ad
);
5275 if (address_mode
== VOIDmode
)
5276 address_mode
= targetm
.addr_space
.address_mode (as
);
5278 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5279 Unshare it so we can safely alter it. */
5280 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5281 && CONSTANT_POOL_ADDRESS_P (ad
))
5283 *memrefloc
= copy_rtx (*memrefloc
);
5284 loc
= &XEXP (*memrefloc
, 0);
5286 loc
= &XEXP (*loc
, 0);
5289 find_reloads_address_part (ad
, loc
,
5290 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5291 address_mode
, opnum
, type
, ind_levels
);
5292 return ! removed_and
;
5295 return find_reloads_address_1 (mode
, as
, ad
, 0, MEM
, SCRATCH
, loc
,
5296 opnum
, type
, ind_levels
, insn
);
5299 /* Find all pseudo regs appearing in AD
5300 that are eliminable in favor of equivalent values
5301 and do not have hard regs; replace them by their equivalents.
5302 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5303 front of it for pseudos that we have to replace with stack slots. */
5306 subst_reg_equivs (rtx ad
, rtx_insn
*insn
)
5308 RTX_CODE code
= GET_CODE (ad
);
5325 int regno
= REGNO (ad
);
5327 if (reg_equiv_constant (regno
) != 0)
5329 subst_reg_equivs_changed
= 1;
5330 return reg_equiv_constant (regno
);
5332 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5334 rtx mem
= make_memloc (ad
, regno
);
5335 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5337 subst_reg_equivs_changed
= 1;
5338 /* We mark the USE with QImode so that we recognize it
5339 as one that can be safely deleted at the end of
5341 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5350 /* Quickly dispose of a common case. */
5351 if (XEXP (ad
, 0) == frame_pointer_rtx
5352 && CONST_INT_P (XEXP (ad
, 1)))
5360 fmt
= GET_RTX_FORMAT (code
);
5361 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5363 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5367 /* Compute the sum of X and Y, making canonicalizations assumed in an
5368 address, namely: sum constant integers, surround the sum of two
5369 constants with a CONST, put the constant as the second operand, and
5370 group the constant on the outermost sum.
5372 This routine assumes both inputs are already in canonical form. */
5375 form_sum (machine_mode mode
, rtx x
, rtx y
)
5379 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5380 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5382 if (CONST_INT_P (x
))
5383 return plus_constant (mode
, y
, INTVAL (x
));
5384 else if (CONST_INT_P (y
))
5385 return plus_constant (mode
, x
, INTVAL (y
));
5386 else if (CONSTANT_P (x
))
5387 tem
= x
, x
= y
, y
= tem
;
5389 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5390 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5392 /* Note that if the operands of Y are specified in the opposite
5393 order in the recursive calls below, infinite recursion will occur. */
5394 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5395 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5397 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5398 constant will have been placed second. */
5399 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5401 if (GET_CODE (x
) == CONST
)
5403 if (GET_CODE (y
) == CONST
)
5406 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5409 return gen_rtx_PLUS (mode
, x
, y
);
5412 /* If ADDR is a sum containing a pseudo register that should be
5413 replaced with a constant (from reg_equiv_constant),
5414 return the result of doing so, and also apply the associative
5415 law so that the result is more likely to be a valid address.
5416 (But it is not guaranteed to be one.)
5418 Note that at most one register is replaced, even if more are
5419 replaceable. Also, we try to put the result into a canonical form
5420 so it is more likely to be a valid address.
5422 In all other cases, return ADDR. */
5425 subst_indexed_address (rtx addr
)
5427 rtx op0
= 0, op1
= 0, op2
= 0;
5431 if (GET_CODE (addr
) == PLUS
)
5433 /* Try to find a register to replace. */
5434 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5436 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5437 && reg_renumber
[regno
] < 0
5438 && reg_equiv_constant (regno
) != 0)
5439 op0
= reg_equiv_constant (regno
);
5440 else if (REG_P (op1
)
5441 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5442 && reg_renumber
[regno
] < 0
5443 && reg_equiv_constant (regno
) != 0)
5444 op1
= reg_equiv_constant (regno
);
5445 else if (GET_CODE (op0
) == PLUS
5446 && (tem
= subst_indexed_address (op0
)) != op0
)
5448 else if (GET_CODE (op1
) == PLUS
5449 && (tem
= subst_indexed_address (op1
)) != op1
)
5454 /* Pick out up to three things to add. */
5455 if (GET_CODE (op1
) == PLUS
)
5456 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5457 else if (GET_CODE (op0
) == PLUS
)
5458 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5460 /* Compute the sum. */
5462 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5464 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5471 /* Update the REG_INC notes for an insn. It updates all REG_INC
5472 notes for the instruction which refer to REGNO the to refer
5473 to the reload number.
5475 INSN is the insn for which any REG_INC notes need updating.
5477 REGNO is the register number which has been reloaded.
5479 RELOADNUM is the reload number. */
5482 update_auto_inc_notes (rtx_insn
*insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5483 int reloadnum ATTRIBUTE_UNUSED
)
5488 for (rtx link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5489 if (REG_NOTE_KIND (link
) == REG_INC
5490 && (int) REGNO (XEXP (link
, 0)) == regno
)
5491 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5494 /* Record the pseudo registers we must reload into hard registers in a
5495 subexpression of a would-be memory address, X referring to a value
5496 in mode MODE. (This function is not called if the address we find
5499 CONTEXT = 1 means we are considering regs as index regs,
5500 = 0 means we are considering them as base regs.
5501 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5503 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5504 is the code of the index part of the address. Otherwise, pass SCRATCH
5506 OPNUM and TYPE specify the purpose of any reloads made.
5508 IND_LEVELS says how many levels of indirect addressing are
5509 supported at this point in the address.
5511 INSN, if nonzero, is the insn in which we do the reload. It is used
5512 to determine if we may generate output reloads.
5514 We return nonzero if X, as a whole, is reloaded or replaced. */
5516 /* Note that we take shortcuts assuming that no multi-reg machine mode
5517 occurs as part of an address.
5518 Also, this is not fully machine-customizable; it works for machines
5519 such as VAXen and 68000's and 32000's, but other possible machines
5520 could have addressing modes that this does not handle right.
5521 If you add push_reload calls here, you need to make sure gen_reload
5522 handles those cases gracefully. */
5525 find_reloads_address_1 (machine_mode mode
, addr_space_t as
,
5527 enum rtx_code outer_code
, enum rtx_code index_code
,
5528 rtx
*loc
, int opnum
, enum reload_type type
,
5529 int ind_levels
, rtx_insn
*insn
)
5531 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5533 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5534 : REGNO_OK_FOR_INDEX_P (REGNO))
5536 enum reg_class context_reg_class
;
5537 RTX_CODE code
= GET_CODE (x
);
5538 bool reloaded_inner_of_autoinc
= false;
5541 context_reg_class
= INDEX_REG_CLASS
;
5543 context_reg_class
= base_reg_class (mode
, as
, outer_code
, index_code
);
5549 rtx orig_op0
= XEXP (x
, 0);
5550 rtx orig_op1
= XEXP (x
, 1);
5551 RTX_CODE code0
= GET_CODE (orig_op0
);
5552 RTX_CODE code1
= GET_CODE (orig_op1
);
5556 if (GET_CODE (op0
) == SUBREG
)
5558 op0
= SUBREG_REG (op0
);
5559 code0
= GET_CODE (op0
);
5560 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5561 op0
= gen_rtx_REG (word_mode
,
5563 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5564 GET_MODE (SUBREG_REG (orig_op0
)),
5565 SUBREG_BYTE (orig_op0
),
5566 GET_MODE (orig_op0
))));
5569 if (GET_CODE (op1
) == SUBREG
)
5571 op1
= SUBREG_REG (op1
);
5572 code1
= GET_CODE (op1
);
5573 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5574 /* ??? Why is this given op1's mode and above for
5575 ??? op0 SUBREGs we use word_mode? */
5576 op1
= gen_rtx_REG (GET_MODE (op1
),
5578 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5579 GET_MODE (SUBREG_REG (orig_op1
)),
5580 SUBREG_BYTE (orig_op1
),
5581 GET_MODE (orig_op1
))));
5583 /* Plus in the index register may be created only as a result of
5584 register rematerialization for expression like &localvar*4. Reload it.
5585 It may be possible to combine the displacement on the outer level,
5586 but it is probably not worthwhile to do so. */
5589 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5590 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5591 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5593 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5597 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5598 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5600 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5601 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5603 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5604 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5608 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5609 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5611 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5612 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5614 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5615 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5619 else if (code0
== CONST_INT
|| code0
== CONST
5620 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5621 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5622 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5625 else if (code1
== CONST_INT
|| code1
== CONST
5626 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5627 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5628 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5631 else if (code0
== REG
&& code1
== REG
)
5633 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5634 && regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5636 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5637 && regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5639 else if (regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5640 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5641 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5643 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5644 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5645 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5647 else if (regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5648 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5649 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5651 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5652 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5653 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5657 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5658 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5660 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5661 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5666 else if (code0
== REG
)
5668 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5669 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5671 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5672 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5676 else if (code1
== REG
)
5678 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5679 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5681 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5682 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5692 rtx op0
= XEXP (x
, 0);
5693 rtx op1
= XEXP (x
, 1);
5694 enum rtx_code index_code
;
5698 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5701 /* Currently, we only support {PRE,POST}_MODIFY constructs
5702 where a base register is {inc,dec}remented by the contents
5703 of another register or by a constant value. Thus, these
5704 operands must match. */
5705 gcc_assert (op0
== XEXP (op1
, 0));
5707 /* Require index register (or constant). Let's just handle the
5708 register case in the meantime... If the target allows
5709 auto-modify by a constant then we could try replacing a pseudo
5710 register with its equivalent constant where applicable.
5712 We also handle the case where the register was eliminated
5713 resulting in a PLUS subexpression.
5715 If we later decide to reload the whole PRE_MODIFY or
5716 POST_MODIFY, inc_for_reload might clobber the reload register
5717 before reading the index. The index register might therefore
5718 need to live longer than a TYPE reload normally would, so be
5719 conservative and class it as RELOAD_OTHER. */
5720 if ((REG_P (XEXP (op1
, 1))
5721 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5722 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5723 find_reloads_address_1 (mode
, as
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5724 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5727 gcc_assert (REG_P (XEXP (op1
, 0)));
5729 regno
= REGNO (XEXP (op1
, 0));
5730 index_code
= GET_CODE (XEXP (op1
, 1));
5732 /* A register that is incremented cannot be constant! */
5733 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5734 || reg_equiv_constant (regno
) == 0);
5736 /* Handle a register that is equivalent to a memory location
5737 which cannot be addressed directly. */
5738 if (reg_equiv_memory_loc (regno
) != 0
5739 && (reg_equiv_address (regno
) != 0
5740 || num_not_at_initial_offset
))
5742 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5744 if (reg_equiv_address (regno
)
5745 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5749 /* First reload the memory location's address.
5750 We can't use ADDR_TYPE (type) here, because we need to
5751 write back the value after reading it, hence we actually
5752 need two registers. */
5753 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5754 &XEXP (tem
, 0), opnum
,
5758 if (!rtx_equal_p (tem
, orig
))
5759 push_reg_equiv_alt_mem (regno
, tem
);
5761 /* Then reload the memory location into a base
5763 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5765 base_reg_class (mode
, as
,
5767 GET_MODE (x
), GET_MODE (x
), 0,
5768 0, opnum
, RELOAD_OTHER
);
5770 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5775 if (reg_renumber
[regno
] >= 0)
5776 regno
= reg_renumber
[regno
];
5778 /* We require a base register here... */
5779 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), as
, code
, index_code
))
5781 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5782 &XEXP (op1
, 0), &XEXP (x
, 0),
5783 base_reg_class (mode
, as
,
5785 GET_MODE (x
), GET_MODE (x
), 0, 0,
5786 opnum
, RELOAD_OTHER
);
5788 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5798 if (REG_P (XEXP (x
, 0)))
5800 int regno
= REGNO (XEXP (x
, 0));
5804 /* A register that is incremented cannot be constant! */
5805 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5806 || reg_equiv_constant (regno
) == 0);
5808 /* Handle a register that is equivalent to a memory location
5809 which cannot be addressed directly. */
5810 if (reg_equiv_memory_loc (regno
) != 0
5811 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5813 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5814 if (reg_equiv_address (regno
)
5815 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5819 /* First reload the memory location's address.
5820 We can't use ADDR_TYPE (type) here, because we need to
5821 write back the value after reading it, hence we actually
5822 need two registers. */
5823 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5824 &XEXP (tem
, 0), opnum
, type
,
5826 reloaded_inner_of_autoinc
= true;
5827 if (!rtx_equal_p (tem
, orig
))
5828 push_reg_equiv_alt_mem (regno
, tem
);
5829 /* Put this inside a new increment-expression. */
5830 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5831 /* Proceed to reload that, as if it contained a register. */
5835 /* If we have a hard register that is ok in this incdec context,
5836 don't make a reload. If the register isn't nice enough for
5837 autoincdec, we can reload it. But, if an autoincrement of a
5838 register that we here verified as playing nice, still outside
5839 isn't "valid", it must be that no autoincrement is "valid".
5840 If that is true and something made an autoincrement anyway,
5841 this must be a special context where one is allowed.
5842 (For example, a "push" instruction.)
5843 We can't improve this address, so leave it alone. */
5845 /* Otherwise, reload the autoincrement into a suitable hard reg
5846 and record how much to increment by. */
5848 if (reg_renumber
[regno
] >= 0)
5849 regno
= reg_renumber
[regno
];
5850 if (regno
>= FIRST_PSEUDO_REGISTER
5851 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, code
,
5856 /* If we can output the register afterwards, do so, this
5857 saves the extra update.
5858 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5859 CALL_INSN - and it does not set CC0.
5860 But don't do this if we cannot directly address the
5861 memory location, since this will make it harder to
5862 reuse address reloads, and increases register pressure.
5863 Also don't do this if we can probably update x directly. */
5864 rtx equiv
= (MEM_P (XEXP (x
, 0))
5866 : reg_equiv_mem (regno
));
5867 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5868 if (insn
&& NONJUMP_INSN_P (insn
)
5870 && ! sets_cc0_p (PATTERN (insn
))
5872 && (regno
< FIRST_PSEUDO_REGISTER
5874 && memory_operand (equiv
, GET_MODE (equiv
))
5875 && ! (icode
!= CODE_FOR_nothing
5876 && insn_operand_matches (icode
, 0, equiv
)
5877 && insn_operand_matches (icode
, 1, equiv
))))
5878 /* Using RELOAD_OTHER means we emit this and the reload we
5879 made earlier in the wrong order. */
5880 && !reloaded_inner_of_autoinc
)
5882 /* We use the original pseudo for loc, so that
5883 emit_reload_insns() knows which pseudo this
5884 reload refers to and updates the pseudo rtx, not
5885 its equivalent memory location, as well as the
5886 corresponding entry in reg_last_reload_reg. */
5887 loc
= &XEXP (x_orig
, 0);
5890 = push_reload (x
, x
, loc
, loc
,
5892 GET_MODE (x
), GET_MODE (x
), 0, 0,
5893 opnum
, RELOAD_OTHER
);
5898 = push_reload (x
, x
, loc
, (rtx
*) 0,
5900 GET_MODE (x
), GET_MODE (x
), 0, 0,
5903 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5908 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5918 /* Look for parts to reload in the inner expression and reload them
5919 too, in addition to this operation. Reloading all inner parts in
5920 addition to this one shouldn't be necessary, but at this point,
5921 we don't know if we can possibly omit any part that *can* be
5922 reloaded. Targets that are better off reloading just either part
5923 (or perhaps even a different part of an outer expression), should
5924 define LEGITIMIZE_RELOAD_ADDRESS. */
5925 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), as
, XEXP (x
, 0),
5926 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5927 type
, ind_levels
, insn
);
5928 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5930 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5934 /* This is probably the result of a substitution, by eliminate_regs, of
5935 an equivalent address for a pseudo that was not allocated to a hard
5936 register. Verify that the specified address is valid and reload it
5939 Since we know we are going to reload this item, don't decrement for
5940 the indirection level.
5942 Note that this is actually conservative: it would be slightly more
5943 efficient to use the value of SPILL_INDIRECT_LEVELS from
5946 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5947 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5948 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5950 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5955 int regno
= REGNO (x
);
5957 if (reg_equiv_constant (regno
) != 0)
5959 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5961 GET_MODE (x
), opnum
, type
, ind_levels
);
5965 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5966 that feeds this insn. */
5967 if (reg_equiv_mem (regno
) != 0)
5969 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
5971 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5976 if (reg_equiv_memory_loc (regno
)
5977 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5979 rtx tem
= make_memloc (x
, regno
);
5980 if (reg_equiv_address (regno
) != 0
5981 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5984 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5985 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5987 if (!rtx_equal_p (x
, tem
))
5988 push_reg_equiv_alt_mem (regno
, x
);
5992 if (reg_renumber
[regno
] >= 0)
5993 regno
= reg_renumber
[regno
];
5995 if (regno
>= FIRST_PSEUDO_REGISTER
5996 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5999 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6001 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6005 /* If a register appearing in an address is the subject of a CLOBBER
6006 in this insn, reload it into some other register to be safe.
6007 The CLOBBER is supposed to make the register unavailable
6008 from before this insn to after it. */
6009 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
6011 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6013 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6020 if (REG_P (SUBREG_REG (x
)))
6022 /* If this is a SUBREG of a hard register and the resulting register
6023 is of the wrong class, reload the whole SUBREG. This avoids
6024 needless copies if SUBREG_REG is multi-word. */
6025 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6027 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
6029 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
6032 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
6034 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6038 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6039 is larger than the class size, then reload the whole SUBREG. */
6042 enum reg_class rclass
= context_reg_class
;
6043 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6044 > reg_class_size
[(int) rclass
])
6046 /* If the inner register will be replaced by a memory
6047 reference, we can do this only if we can replace the
6048 whole subreg by a (narrower) memory reference. If
6049 this is not possible, fall through and reload just
6050 the inner register (including address reloads). */
6051 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x
))) != 0)
6053 rtx tem
= find_reloads_subreg_address (x
, opnum
,
6059 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6060 GET_MODE (tem
), VOIDmode
, 0, 0,
6067 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6068 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6081 const char *fmt
= GET_RTX_FORMAT (code
);
6084 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6087 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6089 find_reloads_address_1 (mode
, as
, XEXP (x
, i
), context
,
6090 code
, SCRATCH
, &XEXP (x
, i
),
6091 opnum
, type
, ind_levels
, insn
);
6095 #undef REG_OK_FOR_CONTEXT
6099 /* X, which is found at *LOC, is a part of an address that needs to be
6100 reloaded into a register of class RCLASS. If X is a constant, or if
6101 X is a PLUS that contains a constant, check that the constant is a
6102 legitimate operand and that we are supposed to be able to load
6103 it into the register.
6105 If not, force the constant into memory and reload the MEM instead.
6107 MODE is the mode to use, in case X is an integer constant.
6109 OPNUM and TYPE describe the purpose of any reloads made.
6111 IND_LEVELS says how many levels of indirect addressing this machine
6115 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6116 machine_mode mode
, int opnum
,
6117 enum reload_type type
, int ind_levels
)
6120 && (!targetm
.legitimate_constant_p (mode
, x
)
6121 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6123 x
= force_const_mem (mode
, x
);
6124 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6125 opnum
, type
, ind_levels
, 0);
6128 else if (GET_CODE (x
) == PLUS
6129 && CONSTANT_P (XEXP (x
, 1))
6130 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6131 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6136 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6137 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6138 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6139 opnum
, type
, ind_levels
, 0);
6142 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6143 mode
, VOIDmode
, 0, 0, opnum
, type
);
6146 /* X, a subreg of a pseudo, is a part of an address that needs to be
6147 reloaded, and the pseusdo is equivalent to a memory location.
6149 Attempt to replace the whole subreg by a (possibly narrower or wider)
6150 memory reference. If this is possible, return this new memory
6151 reference, and push all required address reloads. Otherwise,
6154 OPNUM and TYPE identify the purpose of the reload.
6156 IND_LEVELS says how many levels of indirect addressing are
6157 supported at this point in the address.
6159 INSN, if nonzero, is the insn in which we do the reload. It is used
6160 to determine where to put USEs for pseudos that we have to replace with
6164 find_reloads_subreg_address (rtx x
, int opnum
, enum reload_type type
,
6165 int ind_levels
, rtx_insn
*insn
,
6166 int *address_reloaded
)
6168 machine_mode outer_mode
= GET_MODE (x
);
6169 machine_mode inner_mode
= GET_MODE (SUBREG_REG (x
));
6170 int regno
= REGNO (SUBREG_REG (x
));
6175 gcc_assert (reg_equiv_memory_loc (regno
) != 0);
6177 /* We cannot replace the subreg with a modified memory reference if:
6179 - we have a paradoxical subreg that implicitly acts as a zero or
6180 sign extension operation due to LOAD_EXTEND_OP;
6182 - we have a subreg that is implicitly supposed to act on the full
6183 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6185 - the address of the equivalent memory location is mode-dependent; or
6187 - we have a paradoxical subreg and the resulting memory is not
6188 sufficiently aligned to allow access in the wider mode.
6190 In addition, we choose not to perform the replacement for *any*
6191 paradoxical subreg, even if it were possible in principle. This
6192 is to avoid generating wider memory references than necessary.
6194 This corresponds to how previous versions of reload used to handle
6195 paradoxical subregs where no address reload was required. */
6197 if (paradoxical_subreg_p (x
))
6200 if (WORD_REGISTER_OPERATIONS
6201 && partial_subreg_p (outer_mode
, inner_mode
)
6202 && known_equal_after_align_down (GET_MODE_SIZE (outer_mode
) - 1,
6203 GET_MODE_SIZE (inner_mode
) - 1,
6207 /* Since we don't attempt to handle paradoxical subregs, we can just
6208 call into simplify_subreg, which will handle all remaining checks
6210 orig
= make_memloc (SUBREG_REG (x
), regno
);
6211 offset
= SUBREG_BYTE (x
);
6212 tem
= simplify_subreg (outer_mode
, orig
, inner_mode
, offset
);
6213 if (!tem
|| !MEM_P (tem
))
6216 /* Now push all required address reloads, if any. */
6217 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6218 XEXP (tem
, 0), &XEXP (tem
, 0),
6219 opnum
, type
, ind_levels
, insn
);
6220 /* ??? Do we need to handle nonzero offsets somehow? */
6221 if (known_eq (offset
, 0) && !rtx_equal_p (tem
, orig
))
6222 push_reg_equiv_alt_mem (regno
, tem
);
6224 /* For some processors an address may be valid in the original mode but
6225 not in a smaller mode. For example, ARM accepts a scaled index register
6226 in SImode but not in HImode. Note that this is only a problem if the
6227 address in reg_equiv_mem is already invalid in the new mode; other
6228 cases would be fixed by find_reloads_address as usual.
6230 ??? We attempt to handle such cases here by doing an additional reload
6231 of the full address after the usual processing by find_reloads_address.
6232 Note that this may not work in the general case, but it seems to cover
6233 the cases where this situation currently occurs. A more general fix
6234 might be to reload the *value* instead of the address, but this would
6235 not be expected by the callers of this routine as-is.
6237 If find_reloads_address already completed replaced the address, there
6238 is nothing further to do. */
6240 && reg_equiv_mem (regno
) != 0
6241 && !strict_memory_address_addr_space_p
6242 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6243 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6245 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6246 base_reg_class (GET_MODE (tem
), MEM_ADDR_SPACE (tem
),
6248 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0, opnum
, type
);
6252 /* If this is not a toplevel operand, find_reloads doesn't see this
6253 substitution. We have to emit a USE of the pseudo so that
6254 delete_output_reload can see it. */
6255 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6256 /* We mark the USE with QImode so that we recognize it as one that
6257 can be safely deleted at the end of reload. */
6258 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
),
6261 if (address_reloaded
)
6262 *address_reloaded
= reloaded
;
6267 /* Substitute into the current INSN the registers into which we have reloaded
6268 the things that need reloading. The array `replacements'
6269 contains the locations of all pointers that must be changed
6270 and says what to replace them with.
6272 Return the rtx that X translates into; usually X, but modified. */
6275 subst_reloads (rtx_insn
*insn
)
6279 for (i
= 0; i
< n_replacements
; i
++)
6281 struct replacement
*r
= &replacements
[i
];
6282 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6286 /* This checking takes a very long time on some platforms
6287 causing the gcc.c-torture/compile/limits-fnargs.c test
6288 to time out during testing. See PR 31850.
6290 Internal consistency test. Check that we don't modify
6291 anything in the equivalence arrays. Whenever something from
6292 those arrays needs to be reloaded, it must be unshared before
6293 being substituted into; the equivalence must not be modified.
6294 Otherwise, if the equivalence is used after that, it will
6295 have been modified, and the thing substituted (probably a
6296 register) is likely overwritten and not a usable equivalence. */
6299 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6301 #define CHECK_MODF(ARRAY) \
6302 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6303 || !loc_mentioned_in_p (r->where, \
6304 (*reg_equivs)[check_regno].ARRAY))
6306 CHECK_MODF (constant
);
6307 CHECK_MODF (memory_loc
);
6308 CHECK_MODF (address
);
6312 #endif /* DEBUG_RELOAD */
6314 /* If we're replacing a LABEL_REF with a register, there must
6315 already be an indication (to e.g. flow) which label this
6316 register refers to. */
6317 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6319 || find_reg_note (insn
,
6321 XEXP (*r
->where
, 0))
6322 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6324 /* Encapsulate RELOADREG so its machine mode matches what
6325 used to be there. Note that gen_lowpart_common will
6326 do the wrong thing if RELOADREG is multi-word. RELOADREG
6327 will always be a REG here. */
6328 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6329 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6331 *r
->where
= reloadreg
;
6333 /* If reload got no reg and isn't optional, something's wrong. */
6335 gcc_assert (rld
[r
->what
].optional
);
6339 /* Make a copy of any replacements being done into X and move those
6340 copies to locations in Y, a copy of X. */
6343 copy_replacements (rtx x
, rtx y
)
6345 copy_replacements_1 (&x
, &y
, n_replacements
);
6349 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6353 struct replacement
*r
;
6357 for (j
= 0; j
< orig_replacements
; j
++)
6358 if (replacements
[j
].where
== px
)
6360 r
= &replacements
[n_replacements
++];
6362 r
->what
= replacements
[j
].what
;
6363 r
->mode
= replacements
[j
].mode
;
6368 code
= GET_CODE (x
);
6369 fmt
= GET_RTX_FORMAT (code
);
6371 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6374 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6375 else if (fmt
[i
] == 'E')
6376 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6377 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6382 /* Change any replacements being done to *X to be done to *Y. */
6385 move_replacements (rtx
*x
, rtx
*y
)
6389 for (i
= 0; i
< n_replacements
; i
++)
6390 if (replacements
[i
].where
== x
)
6391 replacements
[i
].where
= y
;
6394 /* If LOC was scheduled to be replaced by something, return the replacement.
6395 Otherwise, return *LOC. */
6398 find_replacement (rtx
*loc
)
6400 struct replacement
*r
;
6402 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6404 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6406 if (reloadreg
&& r
->where
== loc
)
6408 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6409 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6413 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6414 && r
->where
== &SUBREG_REG (*loc
))
6416 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6417 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6419 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6420 GET_MODE (SUBREG_REG (*loc
)),
6421 SUBREG_BYTE (*loc
));
6425 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6426 what's inside and make a new rtl if so. */
6427 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6428 || GET_CODE (*loc
) == MULT
)
6430 rtx x
= find_replacement (&XEXP (*loc
, 0));
6431 rtx y
= find_replacement (&XEXP (*loc
, 1));
6433 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6434 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6440 /* Return nonzero if register in range [REGNO, ENDREGNO)
6441 appears either explicitly or implicitly in X
6442 other than being stored into (except for earlyclobber operands).
6444 References contained within the substructure at LOC do not count.
6445 LOC may be zero, meaning don't ignore anything.
6447 This is similar to refers_to_regno_p in rtlanal.c except that we
6448 look at equivalences for pseudos that didn't get hard registers. */
6451 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6463 code
= GET_CODE (x
);
6470 /* If this is a pseudo, a hard register must not have been allocated.
6471 X must therefore either be a constant or be in memory. */
6472 if (r
>= FIRST_PSEUDO_REGISTER
)
6474 if (reg_equiv_memory_loc (r
))
6475 return refers_to_regno_for_reload_p (regno
, endregno
,
6476 reg_equiv_memory_loc (r
),
6479 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6483 return endregno
> r
&& regno
< END_REGNO (x
);
6486 /* If this is a SUBREG of a hard reg, we can see exactly which
6487 registers are being modified. Otherwise, handle normally. */
6488 if (REG_P (SUBREG_REG (x
))
6489 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6491 unsigned int inner_regno
= subreg_regno (x
);
6492 unsigned int inner_endregno
6493 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6494 ? subreg_nregs (x
) : 1);
6496 return endregno
> inner_regno
&& regno
< inner_endregno
;
6502 if (&SET_DEST (x
) != loc
6503 /* Note setting a SUBREG counts as referring to the REG it is in for
6504 a pseudo but not for hard registers since we can
6505 treat each word individually. */
6506 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6507 && loc
!= &SUBREG_REG (SET_DEST (x
))
6508 && REG_P (SUBREG_REG (SET_DEST (x
)))
6509 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6510 && refers_to_regno_for_reload_p (regno
, endregno
,
6511 SUBREG_REG (SET_DEST (x
)),
6513 /* If the output is an earlyclobber operand, this is
6515 || ((!REG_P (SET_DEST (x
))
6516 || earlyclobber_operand_p (SET_DEST (x
)))
6517 && refers_to_regno_for_reload_p (regno
, endregno
,
6518 SET_DEST (x
), loc
))))
6521 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6530 /* X does not match, so try its subexpressions. */
6532 fmt
= GET_RTX_FORMAT (code
);
6533 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6535 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6543 if (refers_to_regno_for_reload_p (regno
, endregno
,
6547 else if (fmt
[i
] == 'E')
6550 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6551 if (loc
!= &XVECEXP (x
, i
, j
)
6552 && refers_to_regno_for_reload_p (regno
, endregno
,
6553 XVECEXP (x
, i
, j
), loc
))
6560 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6561 we check if any register number in X conflicts with the relevant register
6562 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6563 contains a MEM (we don't bother checking for memory addresses that can't
6564 conflict because we expect this to be a rare case.
6566 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6567 that we look at equivalences for pseudos that didn't get hard registers. */
6570 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6572 int regno
, endregno
;
6574 /* Overly conservative. */
6575 if (GET_CODE (x
) == STRICT_LOW_PART
6576 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6579 /* If either argument is a constant, then modifying X cannot affect IN. */
6580 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6582 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6583 return refers_to_mem_for_reload_p (in
);
6584 else if (GET_CODE (x
) == SUBREG
)
6586 regno
= REGNO (SUBREG_REG (x
));
6587 if (regno
< FIRST_PSEUDO_REGISTER
)
6588 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6589 GET_MODE (SUBREG_REG (x
)),
6592 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6593 ? subreg_nregs (x
) : 1);
6595 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6601 /* If this is a pseudo, it must not have been assigned a hard register.
6602 Therefore, it must either be in memory or be a constant. */
6604 if (regno
>= FIRST_PSEUDO_REGISTER
)
6606 if (reg_equiv_memory_loc (regno
))
6607 return refers_to_mem_for_reload_p (in
);
6608 gcc_assert (reg_equiv_constant (regno
));
6612 endregno
= END_REGNO (x
);
6614 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6617 return refers_to_mem_for_reload_p (in
);
6618 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6619 || GET_CODE (x
) == CC0
)
6620 return reg_mentioned_p (x
, in
);
6623 gcc_assert (GET_CODE (x
) == PLUS
);
6625 /* We actually want to know if X is mentioned somewhere inside IN.
6626 We must not say that (plus (sp) (const_int 124)) is in
6627 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6628 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6629 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6634 else if (GET_CODE (in
) == PLUS
)
6635 return (rtx_equal_p (x
, in
)
6636 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6637 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6638 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6639 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6645 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6649 refers_to_mem_for_reload_p (rtx x
)
6658 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6659 && reg_equiv_memory_loc (REGNO (x
)));
6661 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6662 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6664 && (MEM_P (XEXP (x
, i
))
6665 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6671 /* Check the insns before INSN to see if there is a suitable register
6672 containing the same value as GOAL.
6673 If OTHER is -1, look for a register in class RCLASS.
6674 Otherwise, just see if register number OTHER shares GOAL's value.
6676 Return an rtx for the register found, or zero if none is found.
6678 If RELOAD_REG_P is (short *)1,
6679 we reject any hard reg that appears in reload_reg_rtx
6680 because such a hard reg is also needed coming into this insn.
6682 If RELOAD_REG_P is any other nonzero value,
6683 it is a vector indexed by hard reg number
6684 and we reject any hard reg whose element in the vector is nonnegative
6685 as well as any that appears in reload_reg_rtx.
6687 If GOAL is zero, then GOALREG is a register number; we look
6688 for an equivalent for that register.
6690 MODE is the machine mode of the value we want an equivalence for.
6691 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6693 This function is used by jump.c as well as in the reload pass.
6695 If GOAL is the sum of the stack pointer and a constant, we treat it
6696 as if it were a constant except that sp is required to be unchanging. */
6699 find_equiv_reg (rtx goal
, rtx_insn
*insn
, enum reg_class rclass
, int other
,
6700 short *reload_reg_p
, int goalreg
, machine_mode mode
)
6703 rtx goaltry
, valtry
, value
;
6710 int goal_mem_addr_varies
= 0;
6711 int need_stable_sp
= 0;
6718 else if (REG_P (goal
))
6719 regno
= REGNO (goal
);
6720 else if (MEM_P (goal
))
6722 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6723 if (MEM_VOLATILE_P (goal
))
6725 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6727 /* An address with side effects must be reexecuted. */
6742 else if (CONSTANT_P (goal
))
6744 else if (GET_CODE (goal
) == PLUS
6745 && XEXP (goal
, 0) == stack_pointer_rtx
6746 && CONSTANT_P (XEXP (goal
, 1)))
6747 goal_const
= need_stable_sp
= 1;
6748 else if (GET_CODE (goal
) == PLUS
6749 && XEXP (goal
, 0) == frame_pointer_rtx
6750 && CONSTANT_P (XEXP (goal
, 1)))
6756 /* Scan insns back from INSN, looking for one that copies
6757 a value into or out of GOAL.
6758 Stop and give up if we reach a label. */
6763 if (p
&& DEBUG_INSN_P (p
))
6766 if (p
== 0 || LABEL_P (p
)
6767 || num
> param_max_reload_search_insns
)
6770 /* Don't reuse register contents from before a setjmp-type
6771 function call; on the second return (from the longjmp) it
6772 might have been clobbered by a later reuse. It doesn't
6773 seem worthwhile to actually go and see if it is actually
6774 reused even if that information would be readily available;
6775 just don't reuse it across the setjmp call. */
6776 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6779 if (NONJUMP_INSN_P (p
)
6780 /* If we don't want spill regs ... */
6781 && (! (reload_reg_p
!= 0
6782 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6783 /* ... then ignore insns introduced by reload; they aren't
6784 useful and can cause results in reload_as_needed to be
6785 different from what they were when calculating the need for
6786 spills. If we notice an input-reload insn here, we will
6787 reject it below, but it might hide a usable equivalent.
6788 That makes bad code. It may even fail: perhaps no reg was
6789 spilled for this insn because it was assumed we would find
6791 || INSN_UID (p
) < reload_first_uid
))
6794 pat
= single_set (p
);
6796 /* First check for something that sets some reg equal to GOAL. */
6799 && true_regnum (SET_SRC (pat
)) == regno
6800 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6803 && true_regnum (SET_DEST (pat
)) == regno
6804 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6806 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6807 /* When looking for stack pointer + const,
6808 make sure we don't use a stack adjust. */
6809 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6810 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6812 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6813 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6815 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6816 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6817 /* If we are looking for a constant,
6818 and something equivalent to that constant was copied
6819 into a reg, we can use that reg. */
6820 || (goal_const
&& REG_NOTES (p
) != 0
6821 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6822 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6824 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6825 || (REG_P (SET_DEST (pat
))
6826 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6827 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6828 && CONST_INT_P (goal
)
6829 && (goaltry
= operand_subword (XEXP (tem
, 0), 0,
6831 && rtx_equal_p (goal
, goaltry
)
6833 = operand_subword (SET_DEST (pat
), 0, 0,
6835 && (valueno
= true_regnum (valtry
)) >= 0)))
6836 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6838 && REG_P (SET_DEST (pat
))
6839 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6840 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6841 && CONST_INT_P (goal
)
6842 && (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6844 && rtx_equal_p (goal
, goaltry
)
6846 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6847 && (valueno
= true_regnum (valtry
)) >= 0)))
6851 if (valueno
!= other
)
6854 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6856 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6866 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6867 (or copying VALUE into GOAL, if GOAL is also a register).
6868 Now verify that VALUE is really valid. */
6870 /* VALUENO is the register number of VALUE; a hard register. */
6872 /* Don't try to re-use something that is killed in this insn. We want
6873 to be able to trust REG_UNUSED notes. */
6874 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6877 /* If we propose to get the value from the stack pointer or if GOAL is
6878 a MEM based on the stack pointer, we need a stable SP. */
6879 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6880 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6884 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6885 if (GET_MODE (value
) != mode
)
6888 /* Reject VALUE if it was loaded from GOAL
6889 and is also a register that appears in the address of GOAL. */
6891 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6892 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6896 /* Reject registers that overlap GOAL. */
6898 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6899 nregs
= hard_regno_nregs (regno
, mode
);
6902 valuenregs
= hard_regno_nregs (valueno
, mode
);
6904 if (!goal_mem
&& !goal_const
6905 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6908 /* Reject VALUE if it is one of the regs reserved for reloads.
6909 Reload1 knows how to reuse them anyway, and it would get
6910 confused if we allocated one without its knowledge.
6911 (Now that insns introduced by reload are ignored above,
6912 this case shouldn't happen, but I'm not positive.) */
6914 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6917 for (i
= 0; i
< valuenregs
; ++i
)
6918 if (reload_reg_p
[valueno
+ i
] >= 0)
6922 /* Reject VALUE if it is a register being used for an input reload
6923 even if it is not one of those reserved. */
6925 if (reload_reg_p
!= 0)
6928 for (i
= 0; i
< n_reloads
; i
++)
6929 if (rld
[i
].reg_rtx
!= 0
6931 && (int) REGNO (rld
[i
].reg_rtx
) < valueno
+ valuenregs
6932 && (int) END_REGNO (rld
[i
].reg_rtx
) > valueno
)
6937 /* We must treat frame pointer as varying here,
6938 since it can vary--in a nonlocal goto as generated by expand_goto. */
6939 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6941 /* Now verify that the values of GOAL and VALUE remain unaltered
6942 until INSN is reached. */
6951 /* Don't trust the conversion past a function call
6952 if either of the two is in a call-clobbered register, or memory. */
6955 if (goal_mem
|| need_stable_sp
)
6958 function_abi callee_abi
= insn_callee_abi (p
);
6960 && regno
< FIRST_PSEUDO_REGISTER
6961 && callee_abi
.clobbers_reg_p (mode
, regno
))
6965 && valueno
< FIRST_PSEUDO_REGISTER
6966 && callee_abi
.clobbers_reg_p (mode
, valueno
))
6974 /* Watch out for unspec_volatile, and volatile asms. */
6975 if (volatile_insn_p (pat
))
6978 /* If this insn P stores in either GOAL or VALUE, return 0.
6979 If GOAL is a memory ref and this insn writes memory, return 0.
6980 If GOAL is a memory ref and its address is not constant,
6981 and this insn P changes a register used in GOAL, return 0. */
6983 if (GET_CODE (pat
) == COND_EXEC
)
6984 pat
= COND_EXEC_CODE (pat
);
6985 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6987 rtx dest
= SET_DEST (pat
);
6988 while (GET_CODE (dest
) == SUBREG
6989 || GET_CODE (dest
) == ZERO_EXTRACT
6990 || GET_CODE (dest
) == STRICT_LOW_PART
)
6991 dest
= XEXP (dest
, 0);
6994 int xregno
= REGNO (dest
);
6995 int end_xregno
= END_REGNO (dest
);
6996 if (xregno
< regno
+ nregs
&& end_xregno
> regno
)
6998 if (xregno
< valueno
+ valuenregs
6999 && end_xregno
> valueno
)
7001 if (goal_mem_addr_varies
7002 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
7004 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7007 else if (goal_mem
&& MEM_P (dest
)
7008 && ! push_operand (dest
, GET_MODE (dest
)))
7010 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7011 && reg_equiv_memory_loc (regno
) != 0)
7013 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
7016 else if (GET_CODE (pat
) == PARALLEL
)
7019 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
7021 rtx v1
= XVECEXP (pat
, 0, i
);
7022 if (GET_CODE (v1
) == COND_EXEC
)
7023 v1
= COND_EXEC_CODE (v1
);
7024 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
7026 rtx dest
= SET_DEST (v1
);
7027 while (GET_CODE (dest
) == SUBREG
7028 || GET_CODE (dest
) == ZERO_EXTRACT
7029 || GET_CODE (dest
) == STRICT_LOW_PART
)
7030 dest
= XEXP (dest
, 0);
7033 int xregno
= REGNO (dest
);
7034 int end_xregno
= END_REGNO (dest
);
7035 if (xregno
< regno
+ nregs
7036 && end_xregno
> regno
)
7038 if (xregno
< valueno
+ valuenregs
7039 && end_xregno
> valueno
)
7041 if (goal_mem_addr_varies
7042 && reg_overlap_mentioned_for_reload_p (dest
,
7045 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7048 else if (goal_mem
&& MEM_P (dest
)
7049 && ! push_operand (dest
, GET_MODE (dest
)))
7051 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7052 && reg_equiv_memory_loc (regno
) != 0)
7054 else if (need_stable_sp
7055 && push_operand (dest
, GET_MODE (dest
)))
7061 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7065 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7066 link
= XEXP (link
, 1))
7068 pat
= XEXP (link
, 0);
7069 if (GET_CODE (pat
) == CLOBBER
)
7071 rtx dest
= SET_DEST (pat
);
7075 int xregno
= REGNO (dest
);
7076 int end_xregno
= END_REGNO (dest
);
7078 if (xregno
< regno
+ nregs
7079 && end_xregno
> regno
)
7081 else if (xregno
< valueno
+ valuenregs
7082 && end_xregno
> valueno
)
7084 else if (goal_mem_addr_varies
7085 && reg_overlap_mentioned_for_reload_p (dest
,
7090 else if (goal_mem
&& MEM_P (dest
)
7091 && ! push_operand (dest
, GET_MODE (dest
)))
7093 else if (need_stable_sp
7094 && push_operand (dest
, GET_MODE (dest
)))
7101 /* If this insn auto-increments or auto-decrements
7102 either regno or valueno, return 0 now.
7103 If GOAL is a memory ref and its address is not constant,
7104 and this insn P increments a register used in GOAL, return 0. */
7108 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7109 if (REG_NOTE_KIND (link
) == REG_INC
7110 && REG_P (XEXP (link
, 0)))
7112 int incno
= REGNO (XEXP (link
, 0));
7113 if (incno
< regno
+ nregs
&& incno
>= regno
)
7115 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7117 if (goal_mem_addr_varies
7118 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7128 /* Find a place where INCED appears in an increment or decrement operator
7129 within X, and return the amount INCED is incremented or decremented by.
7130 The value is always positive. */
7133 find_inc_amount (rtx x
, rtx inced
)
7135 enum rtx_code code
= GET_CODE (x
);
7141 rtx addr
= XEXP (x
, 0);
7142 if ((GET_CODE (addr
) == PRE_DEC
7143 || GET_CODE (addr
) == POST_DEC
7144 || GET_CODE (addr
) == PRE_INC
7145 || GET_CODE (addr
) == POST_INC
)
7146 && XEXP (addr
, 0) == inced
)
7147 return GET_MODE_SIZE (GET_MODE (x
));
7148 else if ((GET_CODE (addr
) == PRE_MODIFY
7149 || GET_CODE (addr
) == POST_MODIFY
)
7150 && GET_CODE (XEXP (addr
, 1)) == PLUS
7151 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7152 && XEXP (addr
, 0) == inced
7153 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7155 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7156 return i
< 0 ? -i
: i
;
7160 fmt
= GET_RTX_FORMAT (code
);
7161 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7165 poly_int64 tem
= find_inc_amount (XEXP (x
, i
), inced
);
7166 if (maybe_ne (tem
, 0))
7172 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7174 poly_int64 tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7175 if (maybe_ne (tem
, 0))
7184 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7185 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7188 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7198 if (! INSN_P (insn
))
7201 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7202 if (REG_NOTE_KIND (link
) == REG_INC
)
7204 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7205 if (test
>= regno
&& test
< endregno
)
7211 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7212 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7213 REG_INC. REGNO must refer to a hard register. */
7216 regno_clobbered_p (unsigned int regno
, rtx_insn
*insn
, machine_mode mode
,
7219 /* regno must be a hard register. */
7220 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7222 unsigned int endregno
= end_hard_regno (mode
, regno
);
7224 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7225 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7226 && REG_P (XEXP (PATTERN (insn
), 0)))
7228 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7230 return test
>= regno
&& test
< endregno
;
7233 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7236 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7238 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7242 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7243 if ((GET_CODE (elt
) == CLOBBER
7244 || (sets
== 1 && GET_CODE (elt
) == SET
))
7245 && REG_P (XEXP (elt
, 0)))
7247 unsigned int test
= REGNO (XEXP (elt
, 0));
7249 if (test
>= regno
&& test
< endregno
)
7253 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7261 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7263 reload_adjust_reg_for_mode (rtx reloadreg
, machine_mode mode
)
7267 if (GET_MODE (reloadreg
) == mode
)
7270 regno
= REGNO (reloadreg
);
7272 if (REG_WORDS_BIG_ENDIAN
)
7273 regno
+= ((int) REG_NREGS (reloadreg
)
7274 - (int) hard_regno_nregs (regno
, mode
));
7276 return gen_rtx_REG (mode
, regno
);
7279 static const char *const reload_when_needed_name
[] =
7282 "RELOAD_FOR_OUTPUT",
7284 "RELOAD_FOR_INPUT_ADDRESS",
7285 "RELOAD_FOR_INPADDR_ADDRESS",
7286 "RELOAD_FOR_OUTPUT_ADDRESS",
7287 "RELOAD_FOR_OUTADDR_ADDRESS",
7288 "RELOAD_FOR_OPERAND_ADDRESS",
7289 "RELOAD_FOR_OPADDR_ADDR",
7291 "RELOAD_FOR_OTHER_ADDRESS"
7294 /* These functions are used to print the variables set by 'find_reloads' */
7297 debug_reload_to_stream (FILE *f
)
7304 for (r
= 0; r
< n_reloads
; r
++)
7306 fprintf (f
, "Reload %d: ", r
);
7310 fprintf (f
, "reload_in (%s) = ",
7311 GET_MODE_NAME (rld
[r
].inmode
));
7312 print_inline_rtx (f
, rld
[r
].in
, 24);
7313 fprintf (f
, "\n\t");
7316 if (rld
[r
].out
!= 0)
7318 fprintf (f
, "reload_out (%s) = ",
7319 GET_MODE_NAME (rld
[r
].outmode
));
7320 print_inline_rtx (f
, rld
[r
].out
, 24);
7321 fprintf (f
, "\n\t");
7324 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7326 fprintf (f
, "%s (opnum = %d)",
7327 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7330 if (rld
[r
].optional
)
7331 fprintf (f
, ", optional");
7333 if (rld
[r
].nongroup
)
7334 fprintf (f
, ", nongroup");
7336 if (maybe_ne (rld
[r
].inc
, 0))
7338 fprintf (f
, ", inc by ");
7339 print_dec (rld
[r
].inc
, f
, SIGNED
);
7342 if (rld
[r
].nocombine
)
7343 fprintf (f
, ", can't combine");
7345 if (rld
[r
].secondary_p
)
7346 fprintf (f
, ", secondary_reload_p");
7348 if (rld
[r
].in_reg
!= 0)
7350 fprintf (f
, "\n\treload_in_reg: ");
7351 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7354 if (rld
[r
].out_reg
!= 0)
7356 fprintf (f
, "\n\treload_out_reg: ");
7357 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7360 if (rld
[r
].reg_rtx
!= 0)
7362 fprintf (f
, "\n\treload_reg_rtx: ");
7363 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7367 if (rld
[r
].secondary_in_reload
!= -1)
7369 fprintf (f
, "%ssecondary_in_reload = %d",
7370 prefix
, rld
[r
].secondary_in_reload
);
7374 if (rld
[r
].secondary_out_reload
!= -1)
7375 fprintf (f
, "%ssecondary_out_reload = %d\n",
7376 prefix
, rld
[r
].secondary_out_reload
);
7379 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7381 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7382 insn_data
[rld
[r
].secondary_in_icode
].name
);
7386 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7387 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7388 insn_data
[rld
[r
].secondary_out_icode
].name
);
7397 debug_reload_to_stream (stderr
);