1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
94 #include "insn-codes.h"
98 #include "hard-reg-set.h"
102 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld
[MAX_RELOADS
];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
128 int reload_n_operands
;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads
;
140 /* Each replacement is recorded with a structure like this. */
143 rtx
*where
; /* Location to store in */
144 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what
; /* which reload this is for */
147 enum machine_mode mode
; /* mode it must have */
150 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements
;
155 /* Used to track what is modified by an operand. */
158 int reg_flag
; /* Nonzero if referencing a register. */
159 int safe
; /* Nonzero if this can't conflict with anything. */
160 rtx base
; /* Base address for MEM. */
161 HOST_WIDE_INT start
; /* Starting offset or register number. */
162 HOST_WIDE_INT end
; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
176 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn
;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm
;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known
;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p
;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed
;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum
;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
240 enum machine_mode
, enum reload_type
,
243 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
244 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
));
245 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
246 enum machine_mode
, enum machine_mode
,
247 int, int, int, enum reload_type
));
248 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
249 static void combine_reloads
PARAMS ((void));
250 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
251 enum reload_type
, int, int));
252 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
253 enum machine_mode
, enum machine_mode
,
254 enum reg_class
, int, int));
255 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
256 static struct decomposition decompose
PARAMS ((rtx
));
257 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
258 static int alternative_allows_memconst
PARAMS ((const char *, int));
259 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
261 static rtx make_memloc
PARAMS ((rtx
, int));
262 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
263 int, enum reload_type
, int, rtx
));
264 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
265 static rtx subst_indexed_address
PARAMS ((rtx
));
266 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
267 int, enum reload_type
,int, rtx
));
268 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
269 enum machine_mode
, int,
270 enum reload_type
, int));
271 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
273 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 #ifdef HAVE_SECONDARY_RELOADS
277 /* Determine if any secondary reloads are needed for loading (if IN_P is
278 non-zero) or storing (if IN_P is zero) X to or from a reload register of
279 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
280 are needed, push them.
282 Return the reload number of the secondary reload we made, or -1 if
283 we didn't need one. *PICODE is set to the insn_code to use if we do
284 need a secondary reload. */
287 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
293 enum reg_class reload_class
;
294 enum machine_mode reload_mode
;
295 enum reload_type type
;
296 enum insn_code
*picode
;
298 enum reg_class
class = NO_REGS
;
299 enum machine_mode mode
= reload_mode
;
300 enum insn_code icode
= CODE_FOR_nothing
;
301 enum reg_class t_class
= NO_REGS
;
302 enum machine_mode t_mode
= VOIDmode
;
303 enum insn_code t_icode
= CODE_FOR_nothing
;
304 enum reload_type secondary_type
;
305 int s_reload
, t_reload
= -1;
307 if (type
== RELOAD_FOR_INPUT_ADDRESS
308 || type
== RELOAD_FOR_OUTPUT_ADDRESS
309 || type
== RELOAD_FOR_INPADDR_ADDRESS
310 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
311 secondary_type
= type
;
313 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
315 *picode
= CODE_FOR_nothing
;
317 /* If X is a paradoxical SUBREG, use the inner value to determine both the
318 mode and object being reloaded. */
319 if (GET_CODE (x
) == SUBREG
320 && (GET_MODE_SIZE (GET_MODE (x
))
321 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
324 reload_mode
= GET_MODE (x
);
327 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
328 is still a pseudo-register by now, it *must* have an equivalent MEM
329 but we don't want to assume that), use that equivalent when seeing if
330 a secondary reload is needed since whether or not a reload is needed
331 might be sensitive to the form of the MEM. */
333 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
334 && reg_equiv_mem
[REGNO (x
)] != 0)
335 x
= reg_equiv_mem
[REGNO (x
)];
337 #ifdef SECONDARY_INPUT_RELOAD_CLASS
339 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
342 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
344 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 /* If we don't need any secondary registers, done. */
348 if (class == NO_REGS
)
351 /* Get a possible insn to use. If the predicate doesn't accept X, don't
354 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
355 : reload_out_optab
[(int) reload_mode
]);
357 if (icode
!= CODE_FOR_nothing
358 && insn_data
[(int) icode
].operand
[in_p
].predicate
359 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
360 icode
= CODE_FOR_nothing
;
362 /* If we will be using an insn, see if it can directly handle the reload
363 register we will be using. If it can, the secondary reload is for a
364 scratch register. If it can't, we will use the secondary reload for
365 an intermediate register and require a tertiary reload for the scratch
368 if (icode
!= CODE_FOR_nothing
)
370 /* If IN_P is non-zero, the reload register will be the output in
371 operand 0. If IN_P is zero, the reload register will be the input
372 in operand 1. Outputs should have an initial "=", which we must
376 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
377 enum reg_class insn_class
378 = (insn_letter
== 'r' ? GENERAL_REGS
379 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
381 if (insn_class
== NO_REGS
383 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
384 /* The scratch register's constraint must start with "=&". */
385 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
386 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
389 if (reg_class_subset_p (reload_class
, insn_class
))
390 mode
= insn_data
[(int) icode
].operand
[2].mode
;
393 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
395 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 t_class
= (t_letter
== 'r' ? GENERAL_REGS
397 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
399 icode
= CODE_FOR_nothing
;
403 /* This case isn't valid, so fail. Reload is allowed to use the same
404 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
405 in the case of a secondary register, we actually need two different
406 registers for correct code. We fail here to prevent the possibility of
407 silently generating incorrect code later.
409 The convention is that secondary input reloads are valid only if the
410 secondary_class is different from class. If you have such a case, you
411 can not use secondary reloads, you must work around the problem some
414 Allow this when a reload_in/out pattern is being used. I.e. assume
415 that the generated code handles this case. */
417 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
418 && t_icode
== CODE_FOR_nothing
)
421 /* If we need a tertiary reload, see if we have one we can reuse or else
424 if (t_class
!= NO_REGS
)
426 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
427 if (rld
[t_reload
].secondary_p
428 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
429 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
430 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
431 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
432 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
433 == CODE_FOR_nothing
))
434 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
435 == CODE_FOR_nothing
)))
436 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
437 && MERGABLE_RELOADS (secondary_type
,
438 rld
[t_reload
].when_needed
,
439 opnum
, rld
[t_reload
].opnum
))
442 rld
[t_reload
].inmode
= t_mode
;
444 rld
[t_reload
].outmode
= t_mode
;
446 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
447 rld
[t_reload
].class = t_class
;
449 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
450 rld
[t_reload
].optional
&= optional
;
451 rld
[t_reload
].secondary_p
= 1;
452 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
453 opnum
, rld
[t_reload
].opnum
))
454 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
457 if (t_reload
== n_reloads
)
459 /* We need to make a new tertiary reload for this register class. */
460 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
461 rld
[t_reload
].class = t_class
;
462 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
463 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
464 rld
[t_reload
].reg_rtx
= 0;
465 rld
[t_reload
].optional
= optional
;
466 rld
[t_reload
].inc
= 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld
[t_reload
].nocombine
= 1;
469 rld
[t_reload
].in_reg
= 0;
470 rld
[t_reload
].out_reg
= 0;
471 rld
[t_reload
].opnum
= opnum
;
472 rld
[t_reload
].when_needed
= secondary_type
;
473 rld
[t_reload
].secondary_in_reload
= -1;
474 rld
[t_reload
].secondary_out_reload
= -1;
475 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
476 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
477 rld
[t_reload
].secondary_p
= 1;
483 /* See if we can reuse an existing secondary reload. */
484 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
485 if (rld
[s_reload
].secondary_p
486 && (reg_class_subset_p (class, rld
[s_reload
].class)
487 || reg_class_subset_p (rld
[s_reload
].class, class))
488 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
489 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
490 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
491 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
492 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
493 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
494 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
495 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
496 opnum
, rld
[s_reload
].opnum
))
499 rld
[s_reload
].inmode
= mode
;
501 rld
[s_reload
].outmode
= mode
;
503 if (reg_class_subset_p (class, rld
[s_reload
].class))
504 rld
[s_reload
].class = class;
506 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
507 rld
[s_reload
].optional
&= optional
;
508 rld
[s_reload
].secondary_p
= 1;
509 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
510 opnum
, rld
[s_reload
].opnum
))
511 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
514 if (s_reload
== n_reloads
)
516 #ifdef SECONDARY_MEMORY_NEEDED
517 /* If we need a memory location to copy between the two reload regs,
518 set it up now. Note that we do the input case before making
519 the reload and the output case after. This is due to the
520 way reloads are output. */
522 if (in_p
&& icode
== CODE_FOR_nothing
523 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
525 get_secondary_mem (x
, reload_mode
, opnum
, type
);
527 /* We may have just added new reloads. Make sure we add
528 the new reload at the end. */
529 s_reload
= n_reloads
;
533 /* We need to make a new secondary reload for this register class. */
534 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
535 rld
[s_reload
].class = class;
537 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
538 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
539 rld
[s_reload
].reg_rtx
= 0;
540 rld
[s_reload
].optional
= optional
;
541 rld
[s_reload
].inc
= 0;
542 /* Maybe we could combine these, but it seems too tricky. */
543 rld
[s_reload
].nocombine
= 1;
544 rld
[s_reload
].in_reg
= 0;
545 rld
[s_reload
].out_reg
= 0;
546 rld
[s_reload
].opnum
= opnum
;
547 rld
[s_reload
].when_needed
= secondary_type
;
548 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
549 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
550 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
551 rld
[s_reload
].secondary_out_icode
552 = ! in_p
? t_icode
: CODE_FOR_nothing
;
553 rld
[s_reload
].secondary_p
= 1;
557 #ifdef SECONDARY_MEMORY_NEEDED
558 if (! in_p
&& icode
== CODE_FOR_nothing
559 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
560 get_secondary_mem (x
, mode
, opnum
, type
);
567 #endif /* HAVE_SECONDARY_RELOADS */
569 #ifdef SECONDARY_MEMORY_NEEDED
571 /* Return a memory location that will be used to copy X in mode MODE.
572 If we haven't already made a location for this mode in this insn,
573 call find_reloads_address on the location being returned. */
576 get_secondary_mem (x
, mode
, opnum
, type
)
577 rtx x ATTRIBUTE_UNUSED
;
578 enum machine_mode mode
;
580 enum reload_type type
;
585 /* By default, if MODE is narrower than a word, widen it to a word.
586 This is required because most machines that require these memory
587 locations do not support short load and stores from all registers
588 (e.g., FP registers). */
590 #ifdef SECONDARY_MEMORY_NEEDED_MODE
591 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
593 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
594 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
597 /* If we already have made a MEM for this operand in MODE, return it. */
598 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
599 return secondary_memlocs_elim
[(int) mode
][opnum
];
601 /* If this is the first time we've tried to get a MEM for this mode,
602 allocate a new one. `something_changed' in reload will get set
603 by noticing that the frame size has changed. */
605 if (secondary_memlocs
[(int) mode
] == 0)
607 #ifdef SECONDARY_MEMORY_NEEDED_RTX
608 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
610 secondary_memlocs
[(int) mode
]
611 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
615 /* Get a version of the address doing any eliminations needed. If that
616 didn't give us a new MEM, make a new one if it isn't valid. */
618 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
619 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
621 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
622 loc
= copy_rtx (loc
);
624 /* The only time the call below will do anything is if the stack
625 offset is too large. In that case IND_LEVELS doesn't matter, so we
626 can just pass a zero. Adjust the type to be the address of the
627 corresponding object. If the address was valid, save the eliminated
628 address. If it wasn't valid, we need to make a reload each time, so
633 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
634 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
637 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
641 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
645 /* Clear any secondary memory locations we've made. */
648 clear_secondary_mem ()
650 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
652 #endif /* SECONDARY_MEMORY_NEEDED */
654 /* Find the largest class for which every register number plus N is valid in
655 M1 (if in range). Abort if no such class exists. */
657 static enum reg_class
658 find_valid_class (m1
, n
)
659 enum machine_mode m1 ATTRIBUTE_UNUSED
;
664 enum reg_class best_class
= NO_REGS
;
665 unsigned int best_size
= 0;
667 for (class = 1; class < N_REG_CLASSES
; class++)
670 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
671 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
672 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
673 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
676 if (! bad
&& reg_class_size
[class] > best_size
)
677 best_class
= class, best_size
= reg_class_size
[class];
686 /* Return the number of a previously made reload that can be combined with
687 a new one, or n_reloads if none of the existing reloads can be used.
688 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
689 push_reload, they determine the kind of the new reload that we try to
690 combine. P_IN points to the corresponding value of IN, which can be
691 modified by this function.
692 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
694 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
696 enum reg_class
class;
697 enum reload_type type
;
698 int opnum
, dont_share
;
702 /* We can't merge two reloads if the output of either one is
705 if (earlyclobber_operand_p (out
))
708 /* We can use an existing reload if the class is right
709 and at least one of IN and OUT is a match
710 and the other is at worst neutral.
711 (A zero compared against anything is neutral.)
713 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
714 for the same thing since that can cause us to need more reload registers
715 than we otherwise would. */
717 for (i
= 0; i
< n_reloads
; i
++)
718 if ((reg_class_subset_p (class, rld
[i
].class)
719 || reg_class_subset_p (rld
[i
].class, class))
720 /* If the existing reload has a register, it must fit our class. */
721 && (rld
[i
].reg_rtx
== 0
722 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
723 true_regnum (rld
[i
].reg_rtx
)))
724 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
725 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
726 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
727 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
728 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
729 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
730 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
733 /* Reloading a plain reg for input can match a reload to postincrement
734 that reg, since the postincrement's value is the right value.
735 Likewise, it can match a preincrement reload, since we regard
736 the preincrementation as happening before any ref in this insn
738 for (i
= 0; i
< n_reloads
; i
++)
739 if ((reg_class_subset_p (class, rld
[i
].class)
740 || reg_class_subset_p (rld
[i
].class, class))
741 /* If the existing reload has a register, it must fit our
743 && (rld
[i
].reg_rtx
== 0
744 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
745 true_regnum (rld
[i
].reg_rtx
)))
746 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
747 && ((GET_CODE (in
) == REG
748 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
749 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
750 || (GET_CODE (rld
[i
].in
) == REG
751 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
752 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
753 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
754 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
755 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
756 opnum
, rld
[i
].opnum
))
758 /* Make sure reload_in ultimately has the increment,
759 not the plain register. */
760 if (GET_CODE (in
) == REG
)
767 /* Return nonzero if X is a SUBREG which will require reloading of its
768 SUBREG_REG expression. */
771 reload_inner_reg_of_subreg (x
, mode
)
773 enum machine_mode mode
;
777 /* Only SUBREGs are problematical. */
778 if (GET_CODE (x
) != SUBREG
)
781 inner
= SUBREG_REG (x
);
783 /* If INNER is a constant, then INNER must be reloaded. */
784 if (CONSTANT_P (inner
))
787 /* If INNER is not a hard register, then INNER will not need to
789 if (GET_CODE (inner
) != REG
790 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
793 /* If INNER is not ok for MODE, then INNER will need reloading. */
794 if (! HARD_REGNO_MODE_OK (REGNO (inner
) + SUBREG_WORD (x
), mode
))
797 /* If the outer part is a word or smaller, INNER larger than a
798 word and the number of regs for INNER is not the same as the
799 number of words in INNER, then INNER will need reloading. */
800 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
801 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
802 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
803 != HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
806 /* Record one reload that needs to be performed.
807 IN is an rtx saying where the data are to be found before this instruction.
808 OUT says where they must be stored after the instruction.
809 (IN is zero for data not read, and OUT is zero for data not written.)
810 INLOC and OUTLOC point to the places in the instructions where
811 IN and OUT were found.
812 If IN and OUT are both non-zero, it means the same register must be used
813 to reload both IN and OUT.
815 CLASS is a register class required for the reloaded data.
816 INMODE is the machine mode that the instruction requires
817 for the reg that replaces IN and OUTMODE is likewise for OUT.
819 If IN is zero, then OUT's location and mode should be passed as
822 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
824 OPTIONAL nonzero means this reload does not need to be performed:
825 it can be discarded if that is more convenient.
827 OPNUM and TYPE say what the purpose of this reload is.
829 The return value is the reload-number for this reload.
831 If both IN and OUT are nonzero, in some rare cases we might
832 want to make two separate reloads. (Actually we never do this now.)
833 Therefore, the reload-number for OUT is stored in
834 output_reloadnum when we return; the return value applies to IN.
835 Usually (presently always), when IN and OUT are nonzero,
836 the two reload-numbers are equal, but the caller should be careful to
840 push_reload (in
, out
, inloc
, outloc
, class,
841 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
844 enum reg_class
class;
845 enum machine_mode inmode
, outmode
;
849 enum reload_type type
;
853 int dont_remove_subreg
= 0;
854 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
855 int secondary_in_reload
= -1, secondary_out_reload
= -1;
856 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
857 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
859 /* INMODE and/or OUTMODE could be VOIDmode if no mode
860 has been specified for the operand. In that case,
861 use the operand's mode as the mode to reload. */
862 if (inmode
== VOIDmode
&& in
!= 0)
863 inmode
= GET_MODE (in
);
864 if (outmode
== VOIDmode
&& out
!= 0)
865 outmode
= GET_MODE (out
);
867 /* If IN is a pseudo register everywhere-equivalent to a constant, and
868 it is not in a hard register, reload straight from the constant,
869 since we want to get rid of such pseudo registers.
870 Often this is done earlier, but not always in find_reloads_address. */
871 if (in
!= 0 && GET_CODE (in
) == REG
)
873 register int regno
= REGNO (in
);
875 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
876 && reg_equiv_constant
[regno
] != 0)
877 in
= reg_equiv_constant
[regno
];
880 /* Likewise for OUT. Of course, OUT will never be equivalent to
881 an actual constant, but it might be equivalent to a memory location
882 (in the case of a parameter). */
883 if (out
!= 0 && GET_CODE (out
) == REG
)
885 register int regno
= REGNO (out
);
887 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
888 && reg_equiv_constant
[regno
] != 0)
889 out
= reg_equiv_constant
[regno
];
892 /* If we have a read-write operand with an address side-effect,
893 change either IN or OUT so the side-effect happens only once. */
894 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
896 if (GET_CODE (XEXP (in
, 0)) == POST_INC
897 || GET_CODE (XEXP (in
, 0)) == POST_DEC
898 || GET_CODE (XEXP (in
, 0)) == POST_MODIFY
)
900 rtx
new = gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
902 MEM_COPY_ATTRIBUTES (new, in
);
905 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
906 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
907 || GET_CODE (XEXP (in
, 0)) == PRE_MODIFY
)
909 rtx
new = gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
911 MEM_COPY_ATTRIBUTES (new, out
);
916 /* If we are reloading a (SUBREG constant ...), really reload just the
917 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
918 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
919 a pseudo and hence will become a MEM) with M1 wider than M2 and the
920 register is a pseudo, also reload the inside expression.
921 For machines that extend byte loads, do this for any SUBREG of a pseudo
922 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
923 M2 is an integral mode that gets extended when loaded.
924 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
925 either M1 is not valid for R or M2 is wider than a word but we only
926 need one word to store an M2-sized quantity in R.
927 (However, if OUT is nonzero, we need to reload the reg *and*
928 the subreg, so do nothing here, and let following statement handle it.)
930 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
931 we can't handle it here because CONST_INT does not indicate a mode.
933 Similarly, we must reload the inside expression if we have a
934 STRICT_LOW_PART (presumably, in == out in the cas).
936 Also reload the inner expression if it does not require a secondary
937 reload but the SUBREG does.
939 Finally, reload the inner expression if it is a register that is in
940 the class whose registers cannot be referenced in a different size
941 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
942 cannot reload just the inside since we might end up with the wrong
943 register class. But if it is inside a STRICT_LOW_PART, we have
944 no choice, so we hope we do get the right register class there. */
946 if (in
!= 0 && GET_CODE (in
) == SUBREG
947 && (SUBREG_WORD (in
) == 0 || strict_low
)
948 #ifdef CLASS_CANNOT_CHANGE_MODE
949 && (class != CLASS_CANNOT_CHANGE_MODE
950 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)), inmode
))
952 && (CONSTANT_P (SUBREG_REG (in
))
953 || GET_CODE (SUBREG_REG (in
)) == PLUS
955 || (((GET_CODE (SUBREG_REG (in
)) == REG
956 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
957 || GET_CODE (SUBREG_REG (in
)) == MEM
)
958 && ((GET_MODE_SIZE (inmode
)
959 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
960 #ifdef LOAD_EXTEND_OP
961 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
962 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
964 && (GET_MODE_SIZE (inmode
)
965 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
966 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
967 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
969 #ifdef WORD_REGISTER_OPERATIONS
970 || ((GET_MODE_SIZE (inmode
)
971 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
972 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
973 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
977 || (GET_CODE (SUBREG_REG (in
)) == REG
978 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
979 /* The case where out is nonzero
980 is handled differently in the following statement. */
981 && (out
== 0 || SUBREG_WORD (in
) == 0)
982 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
983 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
985 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
987 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
988 GET_MODE (SUBREG_REG (in
)))))
989 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
992 #ifdef SECONDARY_INPUT_RELOAD_CLASS
993 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
994 && (SECONDARY_INPUT_RELOAD_CLASS (class,
995 GET_MODE (SUBREG_REG (in
)),
999 #ifdef CLASS_CANNOT_CHANGE_MODE
1000 || (GET_CODE (SUBREG_REG (in
)) == REG
1001 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1002 && (TEST_HARD_REG_BIT
1003 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1004 REGNO (SUBREG_REG (in
))))
1005 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
1010 in_subreg_loc
= inloc
;
1011 inloc
= &SUBREG_REG (in
);
1013 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1014 if (GET_CODE (in
) == MEM
)
1015 /* This is supposed to happen only for paradoxical subregs made by
1016 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1017 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1020 inmode
= GET_MODE (in
);
1023 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1024 either M1 is not valid for R or M2 is wider than a word but we only
1025 need one word to store an M2-sized quantity in R.
1027 However, we must reload the inner reg *as well as* the subreg in
1030 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1031 code above. This can happen if SUBREG_WORD != 0. */
1033 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
))
1035 /* This relies on the fact that emit_reload_insns outputs the
1036 instructions for input reloads of type RELOAD_OTHER in the same
1037 order as the reloads. Thus if the outer reload is also of type
1038 RELOAD_OTHER, we are guaranteed that this inner reload will be
1039 output before the outer reload. */
1040 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1041 find_valid_class (inmode
, SUBREG_WORD (in
)),
1042 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1043 dont_remove_subreg
= 1;
1046 /* Similarly for paradoxical and problematical SUBREGs on the output.
1047 Note that there is no reason we need worry about the previous value
1048 of SUBREG_REG (out); even if wider than out,
1049 storing in a subreg is entitled to clobber it all
1050 (except in the case of STRICT_LOW_PART,
1051 and in that case the constraint should label it input-output.) */
1052 if (out
!= 0 && GET_CODE (out
) == SUBREG
1053 && (SUBREG_WORD (out
) == 0 || strict_low
)
1054 #ifdef CLASS_CANNOT_CHANGE_MODE
1055 && (class != CLASS_CANNOT_CHANGE_MODE
1056 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1059 && (CONSTANT_P (SUBREG_REG (out
))
1061 || (((GET_CODE (SUBREG_REG (out
)) == REG
1062 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1063 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1064 && ((GET_MODE_SIZE (outmode
)
1065 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1066 #ifdef WORD_REGISTER_OPERATIONS
1067 || ((GET_MODE_SIZE (outmode
)
1068 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1069 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1070 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1074 || (GET_CODE (SUBREG_REG (out
)) == REG
1075 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1076 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1077 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1079 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1081 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1082 GET_MODE (SUBREG_REG (out
)))))
1083 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1084 + SUBREG_WORD (out
)),
1086 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1087 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1088 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1089 GET_MODE (SUBREG_REG (out
)),
1093 #ifdef CLASS_CANNOT_CHANGE_MODE
1094 || (GET_CODE (SUBREG_REG (out
)) == REG
1095 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1096 && (TEST_HARD_REG_BIT
1097 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1098 REGNO (SUBREG_REG (out
))))
1099 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1104 out_subreg_loc
= outloc
;
1105 outloc
= &SUBREG_REG (out
);
1107 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1108 if (GET_CODE (out
) == MEM
1109 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1112 outmode
= GET_MODE (out
);
1115 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1116 either M1 is not valid for R or M2 is wider than a word but we only
1117 need one word to store an M2-sized quantity in R.
1119 However, we must reload the inner reg *as well as* the subreg in
1120 that case. In this case, the inner reg is an in-out reload. */
1122 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
))
1124 /* This relies on the fact that emit_reload_insns outputs the
1125 instructions for output reloads of type RELOAD_OTHER in reverse
1126 order of the reloads. Thus if the outer reload is also of type
1127 RELOAD_OTHER, we are guaranteed that this inner reload will be
1128 output after the outer reload. */
1129 dont_remove_subreg
= 1;
1130 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1132 find_valid_class (outmode
, SUBREG_WORD (out
)),
1133 VOIDmode
, VOIDmode
, 0, 0,
1134 opnum
, RELOAD_OTHER
);
1137 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1138 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1139 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1140 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1143 /* If IN is a SUBREG of a hard register, make a new REG. This
1144 simplifies some of the cases below. */
1146 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1147 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1148 && ! dont_remove_subreg
)
1149 in
= gen_rtx_REG (GET_MODE (in
),
1150 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1152 /* Similarly for OUT. */
1153 if (out
!= 0 && GET_CODE (out
) == SUBREG
1154 && GET_CODE (SUBREG_REG (out
)) == REG
1155 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1156 && ! dont_remove_subreg
)
1157 out
= gen_rtx_REG (GET_MODE (out
),
1158 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1160 /* Narrow down the class of register wanted if that is
1161 desirable on this machine for efficiency. */
1163 class = PREFERRED_RELOAD_CLASS (in
, class);
1165 /* Output reloads may need analogous treatment, different in detail. */
1166 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1168 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1171 /* Make sure we use a class that can handle the actual pseudo
1172 inside any subreg. For example, on the 386, QImode regs
1173 can appear within SImode subregs. Although GENERAL_REGS
1174 can handle SImode, QImode needs a smaller class. */
1175 #ifdef LIMIT_RELOAD_CLASS
1177 class = LIMIT_RELOAD_CLASS (inmode
, class);
1178 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1179 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1182 class = LIMIT_RELOAD_CLASS (outmode
, class);
1183 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1184 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1187 /* Verify that this class is at least possible for the mode that
1189 if (this_insn_is_asm
)
1191 enum machine_mode mode
;
1192 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1196 if (mode
== VOIDmode
)
1198 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1203 outmode
= word_mode
;
1205 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1206 if (HARD_REGNO_MODE_OK (i
, mode
)
1207 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1209 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1212 for (j
= 1; j
< nregs
; j
++)
1213 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1218 if (i
== FIRST_PSEUDO_REGISTER
)
1220 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1225 /* Optional output reloads are always OK even if we have no register class,
1226 since the function of these reloads is only to have spill_reg_store etc.
1227 set, so that the storing insn can be deleted later. */
1228 if (class == NO_REGS
1229 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1232 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1236 /* See if we need a secondary reload register to move between CLASS
1237 and IN or CLASS and OUT. Get the icode and push any required reloads
1238 needed for each of them if so. */
1240 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1243 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1244 &secondary_in_icode
);
1247 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1248 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1249 secondary_out_reload
1250 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1251 type
, &secondary_out_icode
);
1254 /* We found no existing reload suitable for re-use.
1255 So add an additional reload. */
1257 #ifdef SECONDARY_MEMORY_NEEDED
1258 /* If a memory location is needed for the copy, make one. */
1259 if (in
!= 0 && GET_CODE (in
) == REG
1260 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1261 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1263 get_secondary_mem (in
, inmode
, opnum
, type
);
1269 rld
[i
].class = class;
1270 rld
[i
].inmode
= inmode
;
1271 rld
[i
].outmode
= outmode
;
1273 rld
[i
].optional
= optional
;
1275 rld
[i
].nocombine
= 0;
1276 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1277 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1278 rld
[i
].opnum
= opnum
;
1279 rld
[i
].when_needed
= type
;
1280 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1281 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1282 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1283 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1284 rld
[i
].secondary_p
= 0;
1288 #ifdef SECONDARY_MEMORY_NEEDED
1289 if (out
!= 0 && GET_CODE (out
) == REG
1290 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1291 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1293 get_secondary_mem (out
, outmode
, opnum
, type
);
1298 /* We are reusing an existing reload,
1299 but we may have additional information for it.
1300 For example, we may now have both IN and OUT
1301 while the old one may have just one of them. */
1303 /* The modes can be different. If they are, we want to reload in
1304 the larger mode, so that the value is valid for both modes. */
1305 if (inmode
!= VOIDmode
1306 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1307 rld
[i
].inmode
= inmode
;
1308 if (outmode
!= VOIDmode
1309 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1310 rld
[i
].outmode
= outmode
;
1313 rtx in_reg
= inloc
? *inloc
: 0;
1314 /* If we merge reloads for two distinct rtl expressions that
1315 are identical in content, there might be duplicate address
1316 reloads. Remove the extra set now, so that if we later find
1317 that we can inherit this reload, we can get rid of the
1318 address reloads altogether.
1320 Do not do this if both reloads are optional since the result
1321 would be an optional reload which could potentially leave
1322 unresolved address replacements.
1324 It is not sufficient to call transfer_replacements since
1325 choose_reload_regs will remove the replacements for address
1326 reloads of inherited reloads which results in the same
1328 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1329 && ! (rld
[i
].optional
&& optional
))
1331 /* We must keep the address reload with the lower operand
1333 if (opnum
> rld
[i
].opnum
)
1335 remove_address_replacements (in
);
1337 in_reg
= rld
[i
].in_reg
;
1340 remove_address_replacements (rld
[i
].in
);
1343 rld
[i
].in_reg
= in_reg
;
1348 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1350 if (reg_class_subset_p (class, rld
[i
].class))
1351 rld
[i
].class = class;
1352 rld
[i
].optional
&= optional
;
1353 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1354 opnum
, rld
[i
].opnum
))
1355 rld
[i
].when_needed
= RELOAD_OTHER
;
1356 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1359 /* If the ostensible rtx being reload differs from the rtx found
1360 in the location to substitute, this reload is not safe to combine
1361 because we cannot reliably tell whether it appears in the insn. */
1363 if (in
!= 0 && in
!= *inloc
)
1364 rld
[i
].nocombine
= 1;
1367 /* This was replaced by changes in find_reloads_address_1 and the new
1368 function inc_for_reload, which go with a new meaning of reload_inc. */
1370 /* If this is an IN/OUT reload in an insn that sets the CC,
1371 it must be for an autoincrement. It doesn't work to store
1372 the incremented value after the insn because that would clobber the CC.
1373 So we must do the increment of the value reloaded from,
1374 increment it, store it back, then decrement again. */
1375 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1379 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1380 /* If we did not find a nonzero amount-to-increment-by,
1381 that contradicts the belief that IN is being incremented
1382 in an address in this insn. */
1383 if (rld
[i
].inc
== 0)
1388 /* If we will replace IN and OUT with the reload-reg,
1389 record where they are located so that substitution need
1390 not do a tree walk. */
1392 if (replace_reloads
)
1396 register struct replacement
*r
= &replacements
[n_replacements
++];
1398 r
->subreg_loc
= in_subreg_loc
;
1402 if (outloc
!= 0 && outloc
!= inloc
)
1404 register struct replacement
*r
= &replacements
[n_replacements
++];
1407 r
->subreg_loc
= out_subreg_loc
;
1412 /* If this reload is just being introduced and it has both
1413 an incoming quantity and an outgoing quantity that are
1414 supposed to be made to match, see if either one of the two
1415 can serve as the place to reload into.
1417 If one of them is acceptable, set rld[i].reg_rtx
1420 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1422 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1425 earlyclobber_operand_p (out
));
1427 /* If the outgoing register already contains the same value
1428 as the incoming one, we can dispense with loading it.
1429 The easiest way to tell the caller that is to give a phony
1430 value for the incoming operand (same as outgoing one). */
1431 if (rld
[i
].reg_rtx
== out
1432 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1433 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1434 static_reload_reg_p
, i
, inmode
))
1438 /* If this is an input reload and the operand contains a register that
1439 dies in this insn and is used nowhere else, see if it is the right class
1440 to be used for this reload. Use it if so. (This occurs most commonly
1441 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1442 this if it is also an output reload that mentions the register unless
1443 the output is a SUBREG that clobbers an entire register.
1445 Note that the operand might be one of the spill regs, if it is a
1446 pseudo reg and we are in a block where spilling has not taken place.
1447 But if there is no spilling in this block, that is OK.
1448 An explicitly used hard reg cannot be a spill reg. */
1450 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1455 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1456 if (REG_NOTE_KIND (note
) == REG_DEAD
1457 && GET_CODE (XEXP (note
, 0)) == REG
1458 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1459 && reg_mentioned_p (XEXP (note
, 0), in
)
1460 && ! refers_to_regno_for_reload_p (regno
,
1462 + HARD_REGNO_NREGS (regno
,
1464 PATTERN (this_insn
), inloc
)
1465 /* If this is also an output reload, IN cannot be used as
1466 the reload register if it is set in this insn unless IN
1468 && (out
== 0 || in
== out
1469 || ! hard_reg_set_here_p (regno
,
1471 + HARD_REGNO_NREGS (regno
,
1473 PATTERN (this_insn
)))
1474 /* ??? Why is this code so different from the previous?
1475 Is there any simple coherent way to describe the two together?
1476 What's going on here. */
1478 || (GET_CODE (in
) == SUBREG
1479 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1481 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1482 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1483 /* Make sure the operand fits in the reg that dies. */
1484 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1485 && HARD_REGNO_MODE_OK (regno
, inmode
)
1486 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1487 && HARD_REGNO_MODE_OK (regno
, outmode
))
1490 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1491 HARD_REGNO_NREGS (regno
, outmode
));
1493 for (offs
= 0; offs
< nregs
; offs
++)
1494 if (fixed_regs
[regno
+ offs
]
1495 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1501 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1508 output_reloadnum
= i
;
1513 /* Record an additional place we must replace a value
1514 for which we have already recorded a reload.
1515 RELOADNUM is the value returned by push_reload
1516 when the reload was recorded.
1517 This is used in insn patterns that use match_dup. */
1520 push_replacement (loc
, reloadnum
, mode
)
1523 enum machine_mode mode
;
1525 if (replace_reloads
)
1527 register struct replacement
*r
= &replacements
[n_replacements
++];
1528 r
->what
= reloadnum
;
1535 /* Transfer all replacements that used to be in reload FROM to be in
1539 transfer_replacements (to
, from
)
1544 for (i
= 0; i
< n_replacements
; i
++)
1545 if (replacements
[i
].what
== from
)
1546 replacements
[i
].what
= to
;
1549 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1550 or a subpart of it. If we have any replacements registered for IN_RTX,
1551 cancel the reloads that were supposed to load them.
1552 Return non-zero if we canceled any reloads. */
1554 remove_address_replacements (in_rtx
)
1558 char reload_flags
[MAX_RELOADS
];
1559 int something_changed
= 0;
1561 bzero (reload_flags
, sizeof reload_flags
);
1562 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1564 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1565 reload_flags
[replacements
[i
].what
] |= 1;
1568 replacements
[j
++] = replacements
[i
];
1569 reload_flags
[replacements
[i
].what
] |= 2;
1572 /* Note that the following store must be done before the recursive calls. */
1575 for (i
= n_reloads
- 1; i
>= 0; i
--)
1577 if (reload_flags
[i
] == 1)
1579 deallocate_reload_reg (i
);
1580 remove_address_replacements (rld
[i
].in
);
1582 something_changed
= 1;
1585 return something_changed
;
1588 /* If there is only one output reload, and it is not for an earlyclobber
1589 operand, try to combine it with a (logically unrelated) input reload
1590 to reduce the number of reload registers needed.
1592 This is safe if the input reload does not appear in
1593 the value being output-reloaded, because this implies
1594 it is not needed any more once the original insn completes.
1596 If that doesn't work, see we can use any of the registers that
1597 die in this insn as a reload register. We can if it is of the right
1598 class and does not appear in the value being output-reloaded. */
1604 int output_reload
= -1;
1605 int secondary_out
= -1;
1608 /* Find the output reload; return unless there is exactly one
1609 and that one is mandatory. */
1611 for (i
= 0; i
< n_reloads
; i
++)
1612 if (rld
[i
].out
!= 0)
1614 if (output_reload
>= 0)
1619 if (output_reload
< 0 || rld
[output_reload
].optional
)
1622 /* An input-output reload isn't combinable. */
1624 if (rld
[output_reload
].in
!= 0)
1627 /* If this reload is for an earlyclobber operand, we can't do anything. */
1628 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1631 /* Check each input reload; can we combine it? */
1633 for (i
= 0; i
< n_reloads
; i
++)
1634 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1635 /* Life span of this reload must not extend past main insn. */
1636 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1637 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1638 && rld
[i
].when_needed
!= RELOAD_OTHER
1639 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1640 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1641 rld
[output_reload
].outmode
))
1643 && rld
[i
].reg_rtx
== 0
1644 #ifdef SECONDARY_MEMORY_NEEDED
1645 /* Don't combine two reloads with different secondary
1646 memory locations. */
1647 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1648 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1649 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1650 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1652 && (SMALL_REGISTER_CLASSES
1653 ? (rld
[i
].class == rld
[output_reload
].class)
1654 : (reg_class_subset_p (rld
[i
].class,
1655 rld
[output_reload
].class)
1656 || reg_class_subset_p (rld
[output_reload
].class,
1658 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1659 /* Args reversed because the first arg seems to be
1660 the one that we imagine being modified
1661 while the second is the one that might be affected. */
1662 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1664 /* However, if the input is a register that appears inside
1665 the output, then we also can't share.
1666 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1667 If the same reload reg is used for both reg 69 and the
1668 result to be stored in memory, then that result
1669 will clobber the address of the memory ref. */
1670 && ! (GET_CODE (rld
[i
].in
) == REG
1671 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1672 rld
[output_reload
].out
))))
1673 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
)
1674 && (reg_class_size
[(int) rld
[i
].class]
1675 || SMALL_REGISTER_CLASSES
)
1676 /* We will allow making things slightly worse by combining an
1677 input and an output, but no worse than that. */
1678 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1679 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1683 /* We have found a reload to combine with! */
1684 rld
[i
].out
= rld
[output_reload
].out
;
1685 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1686 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1687 /* Mark the old output reload as inoperative. */
1688 rld
[output_reload
].out
= 0;
1689 /* The combined reload is needed for the entire insn. */
1690 rld
[i
].when_needed
= RELOAD_OTHER
;
1691 /* If the output reload had a secondary reload, copy it. */
1692 if (rld
[output_reload
].secondary_out_reload
!= -1)
1694 rld
[i
].secondary_out_reload
1695 = rld
[output_reload
].secondary_out_reload
;
1696 rld
[i
].secondary_out_icode
1697 = rld
[output_reload
].secondary_out_icode
;
1700 #ifdef SECONDARY_MEMORY_NEEDED
1701 /* Copy any secondary MEM. */
1702 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1703 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1704 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1706 /* If required, minimize the register class. */
1707 if (reg_class_subset_p (rld
[output_reload
].class,
1709 rld
[i
].class = rld
[output_reload
].class;
1711 /* Transfer all replacements from the old reload to the combined. */
1712 for (j
= 0; j
< n_replacements
; j
++)
1713 if (replacements
[j
].what
== output_reload
)
1714 replacements
[j
].what
= i
;
1719 /* If this insn has only one operand that is modified or written (assumed
1720 to be the first), it must be the one corresponding to this reload. It
1721 is safe to use anything that dies in this insn for that output provided
1722 that it does not occur in the output (we already know it isn't an
1723 earlyclobber. If this is an asm insn, give up. */
1725 if (INSN_CODE (this_insn
) == -1)
1728 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1729 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1730 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1733 /* See if some hard register that dies in this insn and is not used in
1734 the output is the right class. Only works if the register we pick
1735 up can fully hold our output reload. */
1736 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1737 if (REG_NOTE_KIND (note
) == REG_DEAD
1738 && GET_CODE (XEXP (note
, 0)) == REG
1739 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1740 rld
[output_reload
].out
)
1741 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1742 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1743 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1744 REGNO (XEXP (note
, 0)))
1745 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1746 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1747 /* Ensure that a secondary or tertiary reload for this output
1748 won't want this register. */
1749 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1750 || (! (TEST_HARD_REG_BIT
1751 (reg_class_contents
[(int) rld
[secondary_out
].class],
1752 REGNO (XEXP (note
, 0))))
1753 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1754 || ! (TEST_HARD_REG_BIT
1755 (reg_class_contents
[(int) rld
[secondary_out
].class],
1756 REGNO (XEXP (note
, 0)))))))
1757 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1759 rld
[output_reload
].reg_rtx
1760 = gen_rtx_REG (rld
[output_reload
].outmode
,
1761 REGNO (XEXP (note
, 0)));
1766 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1767 See if one of IN and OUT is a register that may be used;
1768 this is desirable since a spill-register won't be needed.
1769 If so, return the register rtx that proves acceptable.
1771 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1772 CLASS is the register class required for the reload.
1774 If FOR_REAL is >= 0, it is the number of the reload,
1775 and in some cases when it can be discovered that OUT doesn't need
1776 to be computed, clear out rld[FOR_REAL].out.
1778 If FOR_REAL is -1, this should not be done, because this call
1779 is just to see if a register can be found, not to find and install it.
1781 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1782 puts an additional constraint on being able to use IN for OUT since
1783 IN must not appear elsewhere in the insn (it is assumed that IN itself
1784 is safe from the earlyclobber). */
1787 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1788 inmode
, outmode
, class, for_real
, earlyclobber
)
1789 rtx real_in
, real_out
;
1790 rtx
*inloc
, *outloc
;
1791 enum machine_mode inmode
, outmode
;
1792 enum reg_class
class;
1802 /* If operands exceed a word, we can't use either of them
1803 unless they have the same size. */
1804 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1805 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1806 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1809 /* Find the inside of any subregs. */
1810 while (GET_CODE (out
) == SUBREG
)
1812 out_offset
= SUBREG_WORD (out
);
1813 out
= SUBREG_REG (out
);
1815 while (GET_CODE (in
) == SUBREG
)
1817 in_offset
= SUBREG_WORD (in
);
1818 in
= SUBREG_REG (in
);
1821 /* Narrow down the reg class, the same way push_reload will;
1822 otherwise we might find a dummy now, but push_reload won't. */
1823 class = PREFERRED_RELOAD_CLASS (in
, class);
1825 /* See if OUT will do. */
1826 if (GET_CODE (out
) == REG
1827 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1829 unsigned int regno
= REGNO (out
) + out_offset
;
1830 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1833 /* When we consider whether the insn uses OUT,
1834 ignore references within IN. They don't prevent us
1835 from copying IN into OUT, because those refs would
1836 move into the insn that reloads IN.
1838 However, we only ignore IN in its role as this reload.
1839 If the insn uses IN elsewhere and it contains OUT,
1840 that counts. We can't be sure it's the "same" operand
1841 so it might not go through this reload. */
1843 *inloc
= const0_rtx
;
1845 if (regno
< FIRST_PSEUDO_REGISTER
1846 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1847 PATTERN (this_insn
), outloc
))
1851 for (i
= 0; i
< nwords
; i
++)
1852 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1858 if (GET_CODE (real_out
) == REG
)
1861 value
= gen_rtx_REG (outmode
, regno
);
1868 /* Consider using IN if OUT was not acceptable
1869 or if OUT dies in this insn (like the quotient in a divmod insn).
1870 We can't use IN unless it is dies in this insn,
1871 which means we must know accurately which hard regs are live.
1872 Also, the result can't go in IN if IN is used within OUT,
1873 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1874 if (hard_regs_live_known
1875 && GET_CODE (in
) == REG
1876 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1878 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1879 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1880 && !fixed_regs
[REGNO (in
)]
1881 && HARD_REGNO_MODE_OK (REGNO (in
),
1882 /* The only case where out and real_out might
1883 have different modes is where real_out
1884 is a subreg, and in that case, out
1886 (GET_MODE (out
) != VOIDmode
1887 ? GET_MODE (out
) : outmode
)))
1889 unsigned int regno
= REGNO (in
) + in_offset
;
1890 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1892 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1893 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1894 PATTERN (this_insn
))
1896 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1897 PATTERN (this_insn
), inloc
)))
1901 for (i
= 0; i
< nwords
; i
++)
1902 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1908 /* If we were going to use OUT as the reload reg
1909 and changed our mind, it means OUT is a dummy that
1910 dies here. So don't bother copying value to it. */
1911 if (for_real
>= 0 && value
== real_out
)
1912 rld
[for_real
].out
= 0;
1913 if (GET_CODE (real_in
) == REG
)
1916 value
= gen_rtx_REG (inmode
, regno
);
1924 /* This page contains subroutines used mainly for determining
1925 whether the IN or an OUT of a reload can serve as the
1928 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1931 earlyclobber_operand_p (x
)
1936 for (i
= 0; i
< n_earlyclobbers
; i
++)
1937 if (reload_earlyclobbers
[i
] == x
)
1943 /* Return 1 if expression X alters a hard reg in the range
1944 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1945 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1946 X should be the body of an instruction. */
1949 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1950 unsigned int beg_regno
, end_regno
;
1953 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1955 register rtx op0
= SET_DEST (x
);
1957 while (GET_CODE (op0
) == SUBREG
)
1958 op0
= SUBREG_REG (op0
);
1959 if (GET_CODE (op0
) == REG
)
1961 unsigned int r
= REGNO (op0
);
1963 /* See if this reg overlaps range under consideration. */
1965 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1969 else if (GET_CODE (x
) == PARALLEL
)
1971 register int i
= XVECLEN (x
, 0) - 1;
1974 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1981 /* Return 1 if ADDR is a valid memory address for mode MODE,
1982 and check that each pseudo reg has the proper kind of
1986 strict_memory_address_p (mode
, addr
)
1987 enum machine_mode mode ATTRIBUTE_UNUSED
;
1990 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1997 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1998 if they are the same hard reg, and has special hacks for
1999 autoincrement and autodecrement.
2000 This is specifically intended for find_reloads to use
2001 in determining whether two operands match.
2002 X is the operand whose number is the lower of the two.
2004 The value is 2 if Y contains a pre-increment that matches
2005 a non-incrementing address in X. */
2007 /* ??? To be completely correct, we should arrange to pass
2008 for X the output operand and for Y the input operand.
2009 For now, we assume that the output operand has the lower number
2010 because that is natural in (SET output (... input ...)). */
2013 operands_match_p (x
, y
)
2017 register RTX_CODE code
= GET_CODE (x
);
2018 register const char *fmt
;
2023 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2024 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2025 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2031 i
= REGNO (SUBREG_REG (x
));
2032 if (i
>= FIRST_PSEUDO_REGISTER
)
2034 i
+= SUBREG_WORD (x
);
2039 if (GET_CODE (y
) == SUBREG
)
2041 j
= REGNO (SUBREG_REG (y
));
2042 if (j
>= FIRST_PSEUDO_REGISTER
)
2044 j
+= SUBREG_WORD (y
);
2049 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2050 multiple hard register group, so that for example (reg:DI 0) and
2051 (reg:SI 1) will be considered the same register. */
2052 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2053 && i
< FIRST_PSEUDO_REGISTER
)
2054 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2055 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2056 && j
< FIRST_PSEUDO_REGISTER
)
2057 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2061 /* If two operands must match, because they are really a single
2062 operand of an assembler insn, then two postincrements are invalid
2063 because the assembler insn would increment only once.
2064 On the other hand, an postincrement matches ordinary indexing
2065 if the postincrement is the output operand. */
2066 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2067 return operands_match_p (XEXP (x
, 0), y
);
2068 /* Two preincrements are invalid
2069 because the assembler insn would increment only once.
2070 On the other hand, an preincrement matches ordinary indexing
2071 if the preincrement is the input operand.
2072 In this case, return 2, since some callers need to do special
2073 things when this happens. */
2074 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2075 || GET_CODE (y
) == PRE_MODIFY
)
2076 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2080 /* Now we have disposed of all the cases
2081 in which different rtx codes can match. */
2082 if (code
!= GET_CODE (y
))
2084 if (code
== LABEL_REF
)
2085 return XEXP (x
, 0) == XEXP (y
, 0);
2086 if (code
== SYMBOL_REF
)
2087 return XSTR (x
, 0) == XSTR (y
, 0);
2089 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2091 if (GET_MODE (x
) != GET_MODE (y
))
2094 /* Compare the elements. If any pair of corresponding elements
2095 fail to match, return 0 for the whole things. */
2098 fmt
= GET_RTX_FORMAT (code
);
2099 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2105 if (XWINT (x
, i
) != XWINT (y
, i
))
2110 if (XINT (x
, i
) != XINT (y
, i
))
2115 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2118 /* If any subexpression returns 2,
2119 we should return 2 if we are successful. */
2128 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2130 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2132 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2140 /* It is believed that rtx's at this level will never
2141 contain anything but integers and other rtx's,
2142 except for within LABEL_REFs and SYMBOL_REFs. */
2147 return 1 + success_2
;
2150 /* Describe the range of registers or memory referenced by X.
2151 If X is a register, set REG_FLAG and put the first register
2152 number into START and the last plus one into END.
2153 If X is a memory reference, put a base address into BASE
2154 and a range of integer offsets into START and END.
2155 If X is pushing on the stack, we can assume it causes no trouble,
2156 so we set the SAFE field. */
2158 static struct decomposition
2162 struct decomposition val
;
2168 if (GET_CODE (x
) == MEM
)
2170 rtx base
= NULL_RTX
, offset
= 0;
2171 rtx addr
= XEXP (x
, 0);
2173 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2174 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2176 val
.base
= XEXP (addr
, 0);
2177 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2178 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2179 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2183 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2185 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2186 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2187 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2189 val
.base
= XEXP (addr
, 0);
2190 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2191 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2192 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2197 if (GET_CODE (addr
) == CONST
)
2199 addr
= XEXP (addr
, 0);
2202 if (GET_CODE (addr
) == PLUS
)
2204 if (CONSTANT_P (XEXP (addr
, 0)))
2206 base
= XEXP (addr
, 1);
2207 offset
= XEXP (addr
, 0);
2209 else if (CONSTANT_P (XEXP (addr
, 1)))
2211 base
= XEXP (addr
, 0);
2212 offset
= XEXP (addr
, 1);
2219 offset
= const0_rtx
;
2221 if (GET_CODE (offset
) == CONST
)
2222 offset
= XEXP (offset
, 0);
2223 if (GET_CODE (offset
) == PLUS
)
2225 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2227 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2228 offset
= XEXP (offset
, 0);
2230 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2232 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2233 offset
= XEXP (offset
, 1);
2237 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2238 offset
= const0_rtx
;
2241 else if (GET_CODE (offset
) != CONST_INT
)
2243 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2244 offset
= const0_rtx
;
2247 if (all_const
&& GET_CODE (base
) == PLUS
)
2248 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2250 if (GET_CODE (offset
) != CONST_INT
)
2253 val
.start
= INTVAL (offset
);
2254 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2258 else if (GET_CODE (x
) == REG
)
2261 val
.start
= true_regnum (x
);
2264 /* A pseudo with no hard reg. */
2265 val
.start
= REGNO (x
);
2266 val
.end
= val
.start
+ 1;
2270 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2272 else if (GET_CODE (x
) == SUBREG
)
2274 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2275 /* This could be more precise, but it's good enough. */
2276 return decompose (SUBREG_REG (x
));
2278 val
.start
= true_regnum (x
);
2280 return decompose (SUBREG_REG (x
));
2283 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2285 else if (CONSTANT_P (x
)
2286 /* This hasn't been assigned yet, so it can't conflict yet. */
2287 || GET_CODE (x
) == SCRATCH
)
2294 /* Return 1 if altering Y will not modify the value of X.
2295 Y is also described by YDATA, which should be decompose (Y). */
2298 immune_p (x
, y
, ydata
)
2300 struct decomposition ydata
;
2302 struct decomposition xdata
;
2305 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2309 if (GET_CODE (y
) != MEM
)
2311 /* If Y is memory and X is not, Y can't affect X. */
2312 if (GET_CODE (x
) != MEM
)
2315 xdata
= decompose (x
);
2317 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2319 /* If bases are distinct symbolic constants, there is no overlap. */
2320 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2322 /* Constants and stack slots never overlap. */
2323 if (CONSTANT_P (xdata
.base
)
2324 && (ydata
.base
== frame_pointer_rtx
2325 || ydata
.base
== hard_frame_pointer_rtx
2326 || ydata
.base
== stack_pointer_rtx
))
2328 if (CONSTANT_P (ydata
.base
)
2329 && (xdata
.base
== frame_pointer_rtx
2330 || xdata
.base
== hard_frame_pointer_rtx
2331 || xdata
.base
== stack_pointer_rtx
))
2333 /* If either base is variable, we don't know anything. */
2337 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2340 /* Similar, but calls decompose. */
2343 safe_from_earlyclobber (op
, clobber
)
2346 struct decomposition early_data
;
2348 early_data
= decompose (clobber
);
2349 return immune_p (op
, clobber
, early_data
);
2352 /* Main entry point of this file: search the body of INSN
2353 for values that need reloading and record them with push_reload.
2354 REPLACE nonzero means record also where the values occur
2355 so that subst_reloads can be used.
2357 IND_LEVELS says how many levels of indirection are supported by this
2358 machine; a value of zero means that a memory reference is not a valid
2361 LIVE_KNOWN says we have valid information about which hard
2362 regs are live at each point in the program; this is true when
2363 we are called from global_alloc but false when stupid register
2364 allocation has been done.
2366 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2367 which is nonnegative if the reg has been commandeered for reloading into.
2368 It is copied into STATIC_RELOAD_REG_P and referenced from there
2369 by various subroutines.
2371 Return TRUE if some operands need to be changed, because of swapping
2372 commutative operands, reg_equiv_address substitution, or whatever. */
2375 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2377 int replace
, ind_levels
;
2379 short *reload_reg_p
;
2381 register int insn_code_number
;
2384 /* These start out as the constraints for the insn
2385 and they are chewed up as we consider alternatives. */
2386 char *constraints
[MAX_RECOG_OPERANDS
];
2387 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2389 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2390 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2391 /* Nonzero for a MEM operand whose entire address needs a reload. */
2392 int address_reloaded
[MAX_RECOG_OPERANDS
];
2393 /* Value of enum reload_type to use for operand. */
2394 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2395 /* Value of enum reload_type to use within address of operand. */
2396 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2397 /* Save the usage of each operand. */
2398 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2399 int no_input_reloads
= 0, no_output_reloads
= 0;
2401 int this_alternative
[MAX_RECOG_OPERANDS
];
2402 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2403 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2404 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2405 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2406 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2408 int goal_alternative
[MAX_RECOG_OPERANDS
];
2409 int this_alternative_number
;
2410 int goal_alternative_number
= 0;
2411 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2412 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2413 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2414 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2415 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2416 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2417 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2418 int goal_alternative_swapped
;
2421 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2422 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2423 rtx body
= PATTERN (insn
);
2424 rtx set
= single_set (insn
);
2425 int goal_earlyclobber
= 0, this_earlyclobber
;
2426 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2432 n_earlyclobbers
= 0;
2433 replace_reloads
= replace
;
2434 hard_regs_live_known
= live_known
;
2435 static_reload_reg_p
= reload_reg_p
;
2437 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2438 neither are insns that SET cc0. Insns that use CC0 are not allowed
2439 to have any input reloads. */
2440 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2441 no_output_reloads
= 1;
2444 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2445 no_input_reloads
= 1;
2446 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2447 no_output_reloads
= 1;
2450 #ifdef SECONDARY_MEMORY_NEEDED
2451 /* The eliminated forms of any secondary memory locations are per-insn, so
2452 clear them out here. */
2454 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2457 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2458 is cheap to move between them. If it is not, there may not be an insn
2459 to do the copy, so we may need a reload. */
2460 if (GET_CODE (body
) == SET
2461 && GET_CODE (SET_DEST (body
)) == REG
2462 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2463 && GET_CODE (SET_SRC (body
)) == REG
2464 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2465 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2466 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2469 extract_insn (insn
);
2471 noperands
= reload_n_operands
= recog_data
.n_operands
;
2472 n_alternatives
= recog_data
.n_alternatives
;
2474 /* Just return "no reloads" if insn has no operands with constraints. */
2475 if (noperands
== 0 || n_alternatives
== 0)
2478 insn_code_number
= INSN_CODE (insn
);
2479 this_insn_is_asm
= insn_code_number
< 0;
2481 memcpy (operand_mode
, recog_data
.operand_mode
,
2482 noperands
* sizeof (enum machine_mode
));
2483 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2487 /* If we will need to know, later, whether some pair of operands
2488 are the same, we must compare them now and save the result.
2489 Reloading the base and index registers will clobber them
2490 and afterward they will fail to match. */
2492 for (i
= 0; i
< noperands
; i
++)
2497 substed_operand
[i
] = recog_data
.operand
[i
];
2500 modified
[i
] = RELOAD_READ
;
2502 /* Scan this operand's constraint to see if it is an output operand,
2503 an in-out operand, is commutative, or should match another. */
2508 modified
[i
] = RELOAD_WRITE
;
2510 modified
[i
] = RELOAD_READ_WRITE
;
2513 /* The last operand should not be marked commutative. */
2514 if (i
== noperands
- 1)
2519 else if (c
>= '0' && c
<= '9')
2522 operands_match
[c
][i
]
2523 = operands_match_p (recog_data
.operand
[c
],
2524 recog_data
.operand
[i
]);
2526 /* An operand may not match itself. */
2530 /* If C can be commuted with C+1, and C might need to match I,
2531 then C+1 might also need to match I. */
2532 if (commutative
>= 0)
2534 if (c
== commutative
|| c
== commutative
+ 1)
2536 int other
= c
+ (c
== commutative
? 1 : -1);
2537 operands_match
[other
][i
]
2538 = operands_match_p (recog_data
.operand
[other
],
2539 recog_data
.operand
[i
]);
2541 if (i
== commutative
|| i
== commutative
+ 1)
2543 int other
= i
+ (i
== commutative
? 1 : -1);
2544 operands_match
[c
][other
]
2545 = operands_match_p (recog_data
.operand
[c
],
2546 recog_data
.operand
[other
]);
2548 /* Note that C is supposed to be less than I.
2549 No need to consider altering both C and I because in
2550 that case we would alter one into the other. */
2556 /* Examine each operand that is a memory reference or memory address
2557 and reload parts of the addresses into index registers.
2558 Also here any references to pseudo regs that didn't get hard regs
2559 but are equivalent to constants get replaced in the insn itself
2560 with those constants. Nobody will ever see them again.
2562 Finally, set up the preferred classes of each operand. */
2564 for (i
= 0; i
< noperands
; i
++)
2566 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2568 address_reloaded
[i
] = 0;
2569 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2570 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2573 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2574 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2577 if (*constraints
[i
] == 0)
2578 /* Ignore things like match_operator operands. */
2580 else if (constraints
[i
][0] == 'p')
2582 find_reloads_address (VOIDmode
, NULL_PTR
,
2583 recog_data
.operand
[i
],
2584 recog_data
.operand_loc
[i
],
2585 i
, operand_type
[i
], ind_levels
, insn
);
2587 /* If we now have a simple operand where we used to have a
2588 PLUS or MULT, re-recognize and try again. */
2589 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2590 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2591 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2592 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2594 INSN_CODE (insn
) = -1;
2595 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2600 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2601 substed_operand
[i
] = recog_data
.operand
[i
];
2603 else if (code
== MEM
)
2606 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2607 recog_data
.operand_loc
[i
],
2608 XEXP (recog_data
.operand
[i
], 0),
2609 &XEXP (recog_data
.operand
[i
], 0),
2610 i
, address_type
[i
], ind_levels
, insn
);
2611 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2612 substed_operand
[i
] = recog_data
.operand
[i
];
2614 else if (code
== SUBREG
)
2616 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2618 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2621 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2623 &address_reloaded
[i
]);
2625 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2626 that didn't get a hard register, emit a USE with a REG_EQUAL
2627 note in front so that we might inherit a previous, possibly
2631 && GET_CODE (op
) == MEM
2632 && GET_CODE (reg
) == REG
2633 && (GET_MODE_SIZE (GET_MODE (reg
))
2634 >= GET_MODE_SIZE (GET_MODE (op
))))
2635 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2636 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2637 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2639 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2641 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2642 /* We can get a PLUS as an "operand" as a result of register
2643 elimination. See eliminate_regs and gen_reload. We handle
2644 a unary operator by reloading the operand. */
2645 substed_operand
[i
] = recog_data
.operand
[i
]
2646 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2647 ind_levels
, 0, insn
,
2648 &address_reloaded
[i
]);
2649 else if (code
== REG
)
2651 /* This is equivalent to calling find_reloads_toplev.
2652 The code is duplicated for speed.
2653 When we find a pseudo always equivalent to a constant,
2654 we replace it by the constant. We must be sure, however,
2655 that we don't try to replace it in the insn in which it
2657 register int regno
= REGNO (recog_data
.operand
[i
]);
2658 if (reg_equiv_constant
[regno
] != 0
2659 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2661 /* Record the existing mode so that the check if constants are
2662 allowed will work when operand_mode isn't specified. */
2664 if (operand_mode
[i
] == VOIDmode
)
2665 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2667 substed_operand
[i
] = recog_data
.operand
[i
]
2668 = reg_equiv_constant
[regno
];
2670 if (reg_equiv_memory_loc
[regno
] != 0
2671 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2672 /* We need not give a valid is_set_dest argument since the case
2673 of a constant equivalence was checked above. */
2674 substed_operand
[i
] = recog_data
.operand
[i
]
2675 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2676 ind_levels
, 0, insn
,
2677 &address_reloaded
[i
]);
2679 /* If the operand is still a register (we didn't replace it with an
2680 equivalent), get the preferred class to reload it into. */
2681 code
= GET_CODE (recog_data
.operand
[i
]);
2683 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2684 >= FIRST_PSEUDO_REGISTER
)
2685 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2689 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2690 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2693 /* If this is simply a copy from operand 1 to operand 0, merge the
2694 preferred classes for the operands. */
2695 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2696 && recog_data
.operand
[1] == SET_SRC (set
))
2698 preferred_class
[0] = preferred_class
[1]
2699 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2700 pref_or_nothing
[0] |= pref_or_nothing
[1];
2701 pref_or_nothing
[1] |= pref_or_nothing
[0];
2704 /* Now see what we need for pseudo-regs that didn't get hard regs
2705 or got the wrong kind of hard reg. For this, we must consider
2706 all the operands together against the register constraints. */
2708 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2711 goal_alternative_swapped
= 0;
2714 /* The constraints are made of several alternatives.
2715 Each operand's constraint looks like foo,bar,... with commas
2716 separating the alternatives. The first alternatives for all
2717 operands go together, the second alternatives go together, etc.
2719 First loop over alternatives. */
2721 for (this_alternative_number
= 0;
2722 this_alternative_number
< n_alternatives
;
2723 this_alternative_number
++)
2725 /* Loop over operands for one constraint alternative. */
2726 /* LOSERS counts those that don't fit this alternative
2727 and would require loading. */
2729 /* BAD is set to 1 if it some operand can't fit this alternative
2730 even after reloading. */
2732 /* REJECT is a count of how undesirable this alternative says it is
2733 if any reloading is required. If the alternative matches exactly
2734 then REJECT is ignored, but otherwise it gets this much
2735 counted against it in addition to the reloading needed. Each
2736 ? counts three times here since we want the disparaging caused by
2737 a bad register class to only count 1/3 as much. */
2740 this_earlyclobber
= 0;
2742 for (i
= 0; i
< noperands
; i
++)
2744 register char *p
= constraints
[i
];
2745 register int win
= 0;
2747 /* 0 => this operand can be reloaded somehow for this alternative */
2749 /* 0 => this operand can be reloaded if the alternative allows regs. */
2752 register rtx operand
= recog_data
.operand
[i
];
2754 /* Nonzero means this is a MEM that must be reloaded into a reg
2755 regardless of what the constraint says. */
2756 int force_reload
= 0;
2758 /* Nonzero if a constant forced into memory would be OK for this
2761 int earlyclobber
= 0;
2763 /* If the predicate accepts a unary operator, it means that
2764 we need to reload the operand, but do not do this for
2765 match_operator and friends. */
2766 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2767 operand
= XEXP (operand
, 0);
2769 /* If the operand is a SUBREG, extract
2770 the REG or MEM (or maybe even a constant) within.
2771 (Constants can occur as a result of reg_equiv_constant.) */
2773 while (GET_CODE (operand
) == SUBREG
)
2775 offset
+= SUBREG_WORD (operand
);
2776 operand
= SUBREG_REG (operand
);
2777 /* Force reload if this is a constant or PLUS or if there may
2778 be a problem accessing OPERAND in the outer mode. */
2779 if (CONSTANT_P (operand
)
2780 || GET_CODE (operand
) == PLUS
2781 /* We must force a reload of paradoxical SUBREGs
2782 of a MEM because the alignment of the inner value
2783 may not be enough to do the outer reference. On
2784 big-endian machines, it may also reference outside
2787 On machines that extend byte operations and we have a
2788 SUBREG where both the inner and outer modes are no wider
2789 than a word and the inner mode is narrower, is integral,
2790 and gets extended when loaded from memory, combine.c has
2791 made assumptions about the behavior of the machine in such
2792 register access. If the data is, in fact, in memory we
2793 must always load using the size assumed to be in the
2794 register and let the insn do the different-sized
2797 This is doubly true if WORD_REGISTER_OPERATIONS. In
2798 this case eliminate_regs has left non-paradoxical
2799 subregs for push_reloads to see. Make sure it does
2800 by forcing the reload.
2802 ??? When is it right at this stage to have a subreg
2803 of a mem that is _not_ to be handled specialy? IMO
2804 those should have been reduced to just a mem. */
2805 || ((GET_CODE (operand
) == MEM
2806 || (GET_CODE (operand
)== REG
2807 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2808 #ifndef WORD_REGISTER_OPERATIONS
2809 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2810 < BIGGEST_ALIGNMENT
)
2811 && (GET_MODE_SIZE (operand_mode
[i
])
2812 > GET_MODE_SIZE (GET_MODE (operand
))))
2813 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2814 #ifdef LOAD_EXTEND_OP
2815 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2816 && (GET_MODE_SIZE (GET_MODE (operand
))
2818 && (GET_MODE_SIZE (operand_mode
[i
])
2819 > GET_MODE_SIZE (GET_MODE (operand
)))
2820 && INTEGRAL_MODE_P (GET_MODE (operand
))
2821 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2826 /* Subreg of a hard reg which can't handle the subreg's mode
2827 or which would handle that mode in the wrong number of
2828 registers for subregging to work. */
2829 || (GET_CODE (operand
) == REG
2830 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2831 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2832 && (GET_MODE_SIZE (GET_MODE (operand
))
2834 && ((GET_MODE_SIZE (GET_MODE (operand
))
2836 != HARD_REGNO_NREGS (REGNO (operand
),
2837 GET_MODE (operand
))))
2838 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2843 this_alternative
[i
] = (int) NO_REGS
;
2844 this_alternative_win
[i
] = 0;
2845 this_alternative_match_win
[i
] = 0;
2846 this_alternative_offmemok
[i
] = 0;
2847 this_alternative_earlyclobber
[i
] = 0;
2848 this_alternative_matches
[i
] = -1;
2850 /* An empty constraint or empty alternative
2851 allows anything which matched the pattern. */
2852 if (*p
== 0 || *p
== ',')
2855 /* Scan this alternative's specs for this operand;
2856 set WIN if the operand fits any letter in this alternative.
2857 Otherwise, clear BADOP if this operand could
2858 fit some letter after reloads,
2859 or set WINREG if this operand could fit after reloads
2860 provided the constraint allows some registers. */
2862 while (*p
&& (c
= *p
++) != ',')
2865 case '=': case '+': case '*':
2869 /* The last operand should not be marked commutative. */
2870 if (i
!= noperands
- 1)
2883 /* Ignore rest of this alternative as far as
2884 reloading is concerned. */
2885 while (*p
&& *p
!= ',')
2889 case '0': case '1': case '2': case '3': case '4':
2890 case '5': case '6': case '7': case '8': case '9':
2893 this_alternative_matches
[i
] = c
;
2894 /* We are supposed to match a previous operand.
2895 If we do, we win if that one did.
2896 If we do not, count both of the operands as losers.
2897 (This is too conservative, since most of the time
2898 only a single reload insn will be needed to make
2899 the two operands win. As a result, this alternative
2900 may be rejected when it is actually desirable.) */
2901 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2902 /* If we are matching as if two operands were swapped,
2903 also pretend that operands_match had been computed
2905 But if I is the second of those and C is the first,
2906 don't exchange them, because operands_match is valid
2907 only on one side of its diagonal. */
2909 [(c
== commutative
|| c
== commutative
+ 1)
2910 ? 2 * commutative
+ 1 - c
: c
]
2911 [(i
== commutative
|| i
== commutative
+ 1)
2912 ? 2 * commutative
+ 1 - i
: i
])
2913 : operands_match
[c
][i
])
2915 /* If we are matching a non-offsettable address where an
2916 offsettable address was expected, then we must reject
2917 this combination, because we can't reload it. */
2918 if (this_alternative_offmemok
[c
]
2919 && GET_CODE (recog_data
.operand
[c
]) == MEM
2920 && this_alternative
[c
] == (int) NO_REGS
2921 && ! this_alternative_win
[c
])
2924 did_match
= this_alternative_win
[c
];
2928 /* Operands don't match. */
2930 /* Retroactively mark the operand we had to match
2931 as a loser, if it wasn't already. */
2932 if (this_alternative_win
[c
])
2934 this_alternative_win
[c
] = 0;
2935 if (this_alternative
[c
] == (int) NO_REGS
)
2937 /* But count the pair only once in the total badness of
2938 this alternative, if the pair can be a dummy reload. */
2940 = find_dummy_reload (recog_data
.operand
[i
],
2941 recog_data
.operand
[c
],
2942 recog_data
.operand_loc
[i
],
2943 recog_data
.operand_loc
[c
],
2944 operand_mode
[i
], operand_mode
[c
],
2945 this_alternative
[c
], -1,
2946 this_alternative_earlyclobber
[c
]);
2951 /* This can be fixed with reloads if the operand
2952 we are supposed to match can be fixed with reloads. */
2954 this_alternative
[i
] = this_alternative
[c
];
2956 /* If we have to reload this operand and some previous
2957 operand also had to match the same thing as this
2958 operand, we don't know how to do that. So reject this
2960 if (! did_match
|| force_reload
)
2961 for (j
= 0; j
< i
; j
++)
2962 if (this_alternative_matches
[j
]
2963 == this_alternative_matches
[i
])
2968 /* All necessary reloads for an address_operand
2969 were handled in find_reloads_address. */
2970 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2977 if (GET_CODE (operand
) == MEM
2978 || (GET_CODE (operand
) == REG
2979 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2980 && reg_renumber
[REGNO (operand
)] < 0))
2982 if (CONSTANT_P (operand
)
2983 /* force_const_mem does not accept HIGH. */
2984 && GET_CODE (operand
) != HIGH
)
2990 if (GET_CODE (operand
) == MEM
2991 && ! address_reloaded
[i
]
2992 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2993 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2998 if (GET_CODE (operand
) == MEM
2999 && ! address_reloaded
[i
]
3000 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3001 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3005 /* Memory operand whose address is not offsettable. */
3009 if (GET_CODE (operand
) == MEM
3010 && ! (ind_levels
? offsettable_memref_p (operand
)
3011 : offsettable_nonstrict_memref_p (operand
))
3012 /* Certain mem addresses will become offsettable
3013 after they themselves are reloaded. This is important;
3014 we don't want our own handling of unoffsettables
3015 to override the handling of reg_equiv_address. */
3016 && !(GET_CODE (XEXP (operand
, 0)) == REG
3018 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3022 /* Memory operand whose address is offsettable. */
3026 if ((GET_CODE (operand
) == MEM
3027 /* If IND_LEVELS, find_reloads_address won't reload a
3028 pseudo that didn't get a hard reg, so we have to
3029 reject that case. */
3030 && ((ind_levels
? offsettable_memref_p (operand
)
3031 : offsettable_nonstrict_memref_p (operand
))
3032 /* A reloaded address is offsettable because it is now
3033 just a simple register indirect. */
3034 || address_reloaded
[i
]))
3035 || (GET_CODE (operand
) == REG
3036 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3037 && reg_renumber
[REGNO (operand
)] < 0
3038 /* If reg_equiv_address is nonzero, we will be
3039 loading it into a register; hence it will be
3040 offsettable, but we cannot say that reg_equiv_mem
3041 is offsettable without checking. */
3042 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3043 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3044 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3046 /* force_const_mem does not accept HIGH. */
3047 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3048 || GET_CODE (operand
) == MEM
)
3055 /* Output operand that is stored before the need for the
3056 input operands (and their index registers) is over. */
3057 earlyclobber
= 1, this_earlyclobber
= 1;
3061 #ifndef REAL_ARITHMETIC
3062 /* Match any floating double constant, but only if
3063 we can examine the bits of it reliably. */
3064 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3065 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3066 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3069 if (GET_CODE (operand
) == CONST_DOUBLE
)
3074 if (GET_CODE (operand
) == CONST_DOUBLE
)
3080 if (GET_CODE (operand
) == CONST_DOUBLE
3081 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3086 if (GET_CODE (operand
) == CONST_INT
3087 || (GET_CODE (operand
) == CONST_DOUBLE
3088 && GET_MODE (operand
) == VOIDmode
))
3091 if (CONSTANT_P (operand
)
3092 #ifdef LEGITIMATE_PIC_OPERAND_P
3093 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3100 if (GET_CODE (operand
) == CONST_INT
3101 || (GET_CODE (operand
) == CONST_DOUBLE
3102 && GET_MODE (operand
) == VOIDmode
))
3114 if (GET_CODE (operand
) == CONST_INT
3115 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3125 /* A PLUS is never a valid operand, but reload can make
3126 it from a register when eliminating registers. */
3127 && GET_CODE (operand
) != PLUS
3128 /* A SCRATCH is not a valid operand. */
3129 && GET_CODE (operand
) != SCRATCH
3130 #ifdef LEGITIMATE_PIC_OPERAND_P
3131 && (! CONSTANT_P (operand
)
3133 || LEGITIMATE_PIC_OPERAND_P (operand
))
3135 && (GENERAL_REGS
== ALL_REGS
3136 || GET_CODE (operand
) != REG
3137 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3138 && reg_renumber
[REGNO (operand
)] < 0)))
3140 /* Drop through into 'r' case */
3144 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3148 if (REG_CLASS_FROM_LETTER (c
) == NO_REGS
)
3150 #ifdef EXTRA_CONSTRAINT
3151 if (EXTRA_CONSTRAINT (operand
, c
))
3158 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3160 if (GET_MODE (operand
) == BLKmode
)
3163 if (GET_CODE (operand
) == REG
3164 && reg_fits_class_p (operand
, this_alternative
[i
],
3165 offset
, GET_MODE (recog_data
.operand
[i
])))
3172 /* If this operand could be handled with a reg,
3173 and some reg is allowed, then this operand can be handled. */
3174 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3177 /* Record which operands fit this alternative. */
3178 this_alternative_earlyclobber
[i
] = earlyclobber
;
3179 if (win
&& ! force_reload
)
3180 this_alternative_win
[i
] = 1;
3181 else if (did_match
&& ! force_reload
)
3182 this_alternative_match_win
[i
] = 1;
3185 int const_to_mem
= 0;
3187 this_alternative_offmemok
[i
] = offmemok
;
3191 /* Alternative loses if it has no regs for a reg operand. */
3192 if (GET_CODE (operand
) == REG
3193 && this_alternative
[i
] == (int) NO_REGS
3194 && this_alternative_matches
[i
] < 0)
3197 /* If this is a constant that is reloaded into the desired
3198 class by copying it to memory first, count that as another
3199 reload. This is consistent with other code and is
3200 required to avoid choosing another alternative when
3201 the constant is moved into memory by this function on
3202 an early reload pass. Note that the test here is
3203 precisely the same as in the code below that calls
3205 if (CONSTANT_P (operand
)
3206 /* force_const_mem does not accept HIGH. */
3207 && GET_CODE (operand
) != HIGH
3208 && ((PREFERRED_RELOAD_CLASS (operand
,
3209 (enum reg_class
) this_alternative
[i
])
3211 || no_input_reloads
)
3212 && operand_mode
[i
] != VOIDmode
)
3215 if (this_alternative
[i
] != (int) NO_REGS
)
3219 /* If we can't reload this value at all, reject this
3220 alternative. Note that we could also lose due to
3221 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3224 if (! CONSTANT_P (operand
)
3225 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3226 && (PREFERRED_RELOAD_CLASS (operand
,
3227 (enum reg_class
) this_alternative
[i
])
3231 /* Alternative loses if it requires a type of reload not
3232 permitted for this insn. We can always reload SCRATCH
3233 and objects with a REG_UNUSED note. */
3234 else if (GET_CODE (operand
) != SCRATCH
3235 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3236 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3238 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3242 /* We prefer to reload pseudos over reloading other things,
3243 since such reloads may be able to be eliminated later.
3244 If we are reloading a SCRATCH, we won't be generating any
3245 insns, just using a register, so it is also preferred.
3246 So bump REJECT in other cases. Don't do this in the
3247 case where we are forcing a constant into memory and
3248 it will then win since we don't want to have a different
3249 alternative match then. */
3250 if (! (GET_CODE (operand
) == REG
3251 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3252 && GET_CODE (operand
) != SCRATCH
3253 && ! (const_to_mem
&& constmemok
))
3256 /* Input reloads can be inherited more often than output
3257 reloads can be removed, so penalize output reloads. */
3258 if (operand_type
[i
] != RELOAD_FOR_INPUT
3259 && GET_CODE (operand
) != SCRATCH
)
3263 /* If this operand is a pseudo register that didn't get a hard
3264 reg and this alternative accepts some register, see if the
3265 class that we want is a subset of the preferred class for this
3266 register. If not, but it intersects that class, use the
3267 preferred class instead. If it does not intersect the preferred
3268 class, show that usage of this alternative should be discouraged;
3269 it will be discouraged more still if the register is `preferred
3270 or nothing'. We do this because it increases the chance of
3271 reusing our spill register in a later insn and avoiding a pair
3272 of memory stores and loads.
3274 Don't bother with this if this alternative will accept this
3277 Don't do this for a multiword operand, since it is only a
3278 small win and has the risk of requiring more spill registers,
3279 which could cause a large loss.
3281 Don't do this if the preferred class has only one register
3282 because we might otherwise exhaust the class. */
3284 if (! win
&& ! did_match
3285 && this_alternative
[i
] != (int) NO_REGS
3286 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3287 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3289 if (! reg_class_subset_p (this_alternative
[i
],
3290 preferred_class
[i
]))
3292 /* Since we don't have a way of forming the intersection,
3293 we just do something special if the preferred class
3294 is a subset of the class we have; that's the most
3295 common case anyway. */
3296 if (reg_class_subset_p (preferred_class
[i
],
3297 this_alternative
[i
]))
3298 this_alternative
[i
] = (int) preferred_class
[i
];
3300 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3305 /* Now see if any output operands that are marked "earlyclobber"
3306 in this alternative conflict with any input operands
3307 or any memory addresses. */
3309 for (i
= 0; i
< noperands
; i
++)
3310 if (this_alternative_earlyclobber
[i
]
3311 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3313 struct decomposition early_data
;
3315 early_data
= decompose (recog_data
.operand
[i
]);
3317 if (modified
[i
] == RELOAD_READ
)
3320 if (this_alternative
[i
] == NO_REGS
)
3322 this_alternative_earlyclobber
[i
] = 0;
3323 if (this_insn_is_asm
)
3324 error_for_asm (this_insn
,
3325 "`&' constraint used with no register class");
3330 for (j
= 0; j
< noperands
; j
++)
3331 /* Is this an input operand or a memory ref? */
3332 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3333 || modified
[j
] != RELOAD_WRITE
)
3335 /* Ignore things like match_operator operands. */
3336 && *recog_data
.constraints
[j
] != 0
3337 /* Don't count an input operand that is constrained to match
3338 the early clobber operand. */
3339 && ! (this_alternative_matches
[j
] == i
3340 && rtx_equal_p (recog_data
.operand
[i
],
3341 recog_data
.operand
[j
]))
3342 /* Is it altered by storing the earlyclobber operand? */
3343 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3346 /* If the output is in a single-reg class,
3347 it's costly to reload it, so reload the input instead. */
3348 if (reg_class_size
[this_alternative
[i
]] == 1
3349 && (GET_CODE (recog_data
.operand
[j
]) == REG
3350 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3353 this_alternative_win
[j
] = 0;
3354 this_alternative_match_win
[j
] = 0;
3359 /* If an earlyclobber operand conflicts with something,
3360 it must be reloaded, so request this and count the cost. */
3364 this_alternative_win
[i
] = 0;
3365 this_alternative_match_win
[j
] = 0;
3366 for (j
= 0; j
< noperands
; j
++)
3367 if (this_alternative_matches
[j
] == i
3368 && this_alternative_match_win
[j
])
3370 this_alternative_win
[j
] = 0;
3371 this_alternative_match_win
[j
] = 0;
3377 /* If one alternative accepts all the operands, no reload required,
3378 choose that alternative; don't consider the remaining ones. */
3381 /* Unswap these so that they are never swapped at `finish'. */
3382 if (commutative
>= 0)
3384 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3385 recog_data
.operand
[commutative
+ 1]
3386 = substed_operand
[commutative
+ 1];
3388 for (i
= 0; i
< noperands
; i
++)
3390 goal_alternative_win
[i
] = this_alternative_win
[i
];
3391 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3392 goal_alternative
[i
] = this_alternative
[i
];
3393 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3394 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3395 goal_alternative_earlyclobber
[i
]
3396 = this_alternative_earlyclobber
[i
];
3398 goal_alternative_number
= this_alternative_number
;
3399 goal_alternative_swapped
= swapped
;
3400 goal_earlyclobber
= this_earlyclobber
;
3404 /* REJECT, set by the ! and ? constraint characters and when a register
3405 would be reloaded into a non-preferred class, discourages the use of
3406 this alternative for a reload goal. REJECT is incremented by six
3407 for each ? and two for each non-preferred class. */
3408 losers
= losers
* 6 + reject
;
3410 /* If this alternative can be made to work by reloading,
3411 and it needs less reloading than the others checked so far,
3412 record it as the chosen goal for reloading. */
3413 if (! bad
&& best
> losers
)
3415 for (i
= 0; i
< noperands
; i
++)
3417 goal_alternative
[i
] = this_alternative
[i
];
3418 goal_alternative_win
[i
] = this_alternative_win
[i
];
3419 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3420 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3421 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3422 goal_alternative_earlyclobber
[i
]
3423 = this_alternative_earlyclobber
[i
];
3425 goal_alternative_swapped
= swapped
;
3427 goal_alternative_number
= this_alternative_number
;
3428 goal_earlyclobber
= this_earlyclobber
;
3432 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3433 then we need to try each alternative twice,
3434 the second time matching those two operands
3435 as if we had exchanged them.
3436 To do this, really exchange them in operands.
3438 If we have just tried the alternatives the second time,
3439 return operands to normal and drop through. */
3441 if (commutative
>= 0)
3446 register enum reg_class tclass
;
3449 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3450 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3452 tclass
= preferred_class
[commutative
];
3453 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3454 preferred_class
[commutative
+ 1] = tclass
;
3456 t
= pref_or_nothing
[commutative
];
3457 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3458 pref_or_nothing
[commutative
+ 1] = t
;
3460 memcpy (constraints
, recog_data
.constraints
,
3461 noperands
* sizeof (char *));
3466 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3467 recog_data
.operand
[commutative
+ 1]
3468 = substed_operand
[commutative
+ 1];
3472 /* The operands don't meet the constraints.
3473 goal_alternative describes the alternative
3474 that we could reach by reloading the fewest operands.
3475 Reload so as to fit it. */
3477 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3479 /* No alternative works with reloads?? */
3480 if (insn_code_number
>= 0)
3481 fatal_insn ("Unable to generate reloads for:", insn
);
3482 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3483 /* Avoid further trouble with this insn. */
3484 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3489 /* Jump to `finish' from above if all operands are valid already.
3490 In that case, goal_alternative_win is all 1. */
3493 /* Right now, for any pair of operands I and J that are required to match,
3495 goal_alternative_matches[J] is I.
3496 Set up goal_alternative_matched as the inverse function:
3497 goal_alternative_matched[I] = J. */
3499 for (i
= 0; i
< noperands
; i
++)
3500 goal_alternative_matched
[i
] = -1;
3502 for (i
= 0; i
< noperands
; i
++)
3503 if (! goal_alternative_win
[i
]
3504 && goal_alternative_matches
[i
] >= 0)
3505 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3507 for (i
= 0; i
< noperands
; i
++)
3508 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3510 /* If the best alternative is with operands 1 and 2 swapped,
3511 consider them swapped before reporting the reloads. Update the
3512 operand numbers of any reloads already pushed. */
3514 if (goal_alternative_swapped
)
3518 tem
= substed_operand
[commutative
];
3519 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3520 substed_operand
[commutative
+ 1] = tem
;
3521 tem
= recog_data
.operand
[commutative
];
3522 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3523 recog_data
.operand
[commutative
+ 1] = tem
;
3524 tem
= *recog_data
.operand_loc
[commutative
];
3525 *recog_data
.operand_loc
[commutative
]
3526 = *recog_data
.operand_loc
[commutative
+ 1];
3527 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3529 for (i
= 0; i
< n_reloads
; i
++)
3531 if (rld
[i
].opnum
== commutative
)
3532 rld
[i
].opnum
= commutative
+ 1;
3533 else if (rld
[i
].opnum
== commutative
+ 1)
3534 rld
[i
].opnum
= commutative
;
3538 for (i
= 0; i
< noperands
; i
++)
3540 operand_reloadnum
[i
] = -1;
3542 /* If this is an earlyclobber operand, we need to widen the scope.
3543 The reload must remain valid from the start of the insn being
3544 reloaded until after the operand is stored into its destination.
3545 We approximate this with RELOAD_OTHER even though we know that we
3546 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3548 One special case that is worth checking is when we have an
3549 output that is earlyclobber but isn't used past the insn (typically
3550 a SCRATCH). In this case, we only need have the reload live
3551 through the insn itself, but not for any of our input or output
3553 But we must not accidentally narrow the scope of an existing
3554 RELOAD_OTHER reload - leave these alone.
3556 In any case, anything needed to address this operand can remain
3557 however they were previously categorized. */
3559 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3561 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3562 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3565 /* Any constants that aren't allowed and can't be reloaded
3566 into registers are here changed into memory references. */
3567 for (i
= 0; i
< noperands
; i
++)
3568 if (! goal_alternative_win
[i
]
3569 && CONSTANT_P (recog_data
.operand
[i
])
3570 /* force_const_mem does not accept HIGH. */
3571 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3572 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3573 (enum reg_class
) goal_alternative
[i
])
3575 || no_input_reloads
)
3576 && operand_mode
[i
] != VOIDmode
)
3578 substed_operand
[i
] = recog_data
.operand
[i
]
3579 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3580 recog_data
.operand
[i
]),
3581 i
, address_type
[i
], ind_levels
, 0, insn
,
3583 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3584 goal_alternative_number
))
3585 goal_alternative_win
[i
] = 1;
3588 /* Record the values of the earlyclobber operands for the caller. */
3589 if (goal_earlyclobber
)
3590 for (i
= 0; i
< noperands
; i
++)
3591 if (goal_alternative_earlyclobber
[i
])
3592 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3594 /* Now record reloads for all the operands that need them. */
3595 for (i
= 0; i
< noperands
; i
++)
3596 if (! goal_alternative_win
[i
])
3598 /* Operands that match previous ones have already been handled. */
3599 if (goal_alternative_matches
[i
] >= 0)
3601 /* Handle an operand with a nonoffsettable address
3602 appearing where an offsettable address will do
3603 by reloading the address into a base register.
3605 ??? We can also do this when the operand is a register and
3606 reg_equiv_mem is not offsettable, but this is a bit tricky,
3607 so we don't bother with it. It may not be worth doing. */
3608 else if (goal_alternative_matched
[i
] == -1
3609 && goal_alternative_offmemok
[i
]
3610 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3612 operand_reloadnum
[i
]
3613 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3614 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3616 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3617 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3618 rld
[operand_reloadnum
[i
]].inc
3619 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3621 /* If this operand is an output, we will have made any
3622 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3623 now we are treating part of the operand as an input, so
3624 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3626 if (modified
[i
] == RELOAD_WRITE
)
3628 for (j
= 0; j
< n_reloads
; j
++)
3630 if (rld
[j
].opnum
== i
)
3632 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3633 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3634 else if (rld
[j
].when_needed
3635 == RELOAD_FOR_OUTADDR_ADDRESS
)
3636 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3641 else if (goal_alternative_matched
[i
] == -1)
3643 operand_reloadnum
[i
]
3644 = push_reload ((modified
[i
] != RELOAD_WRITE
3645 ? recog_data
.operand
[i
] : 0),
3646 (modified
[i
] != RELOAD_READ
3647 ? recog_data
.operand
[i
] : 0),
3648 (modified
[i
] != RELOAD_WRITE
3649 ? recog_data
.operand_loc
[i
] : 0),
3650 (modified
[i
] != RELOAD_READ
3651 ? recog_data
.operand_loc
[i
] : 0),
3652 (enum reg_class
) goal_alternative
[i
],
3653 (modified
[i
] == RELOAD_WRITE
3654 ? VOIDmode
: operand_mode
[i
]),
3655 (modified
[i
] == RELOAD_READ
3656 ? VOIDmode
: operand_mode
[i
]),
3657 (insn_code_number
< 0 ? 0
3658 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3659 0, i
, operand_type
[i
]);
3661 /* In a matching pair of operands, one must be input only
3662 and the other must be output only.
3663 Pass the input operand as IN and the other as OUT. */
3664 else if (modified
[i
] == RELOAD_READ
3665 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3667 operand_reloadnum
[i
]
3668 = push_reload (recog_data
.operand
[i
],
3669 recog_data
.operand
[goal_alternative_matched
[i
]],
3670 recog_data
.operand_loc
[i
],
3671 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3672 (enum reg_class
) goal_alternative
[i
],
3674 operand_mode
[goal_alternative_matched
[i
]],
3675 0, 0, i
, RELOAD_OTHER
);
3676 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3678 else if (modified
[i
] == RELOAD_WRITE
3679 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3681 operand_reloadnum
[goal_alternative_matched
[i
]]
3682 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3683 recog_data
.operand
[i
],
3684 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3685 recog_data
.operand_loc
[i
],
3686 (enum reg_class
) goal_alternative
[i
],
3687 operand_mode
[goal_alternative_matched
[i
]],
3689 0, 0, i
, RELOAD_OTHER
);
3690 operand_reloadnum
[i
] = output_reloadnum
;
3692 else if (insn_code_number
>= 0)
3696 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3697 /* Avoid further trouble with this insn. */
3698 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3703 else if (goal_alternative_matched
[i
] < 0
3704 && goal_alternative_matches
[i
] < 0
3707 /* For each non-matching operand that's a MEM or a pseudo-register
3708 that didn't get a hard register, make an optional reload.
3709 This may get done even if the insn needs no reloads otherwise. */
3711 rtx operand
= recog_data
.operand
[i
];
3713 while (GET_CODE (operand
) == SUBREG
)
3714 operand
= XEXP (operand
, 0);
3715 if ((GET_CODE (operand
) == MEM
3716 || (GET_CODE (operand
) == REG
3717 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3718 /* If this is only for an output, the optional reload would not
3719 actually cause us to use a register now, just note that
3720 something is stored here. */
3721 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3722 || modified
[i
] == RELOAD_WRITE
)
3723 && ! no_input_reloads
3724 /* An optional output reload might allow to delete INSN later.
3725 We mustn't make in-out reloads on insns that are not permitted
3727 If this is an asm, we can't delete it; we must not even call
3728 push_reload for an optional output reload in this case,
3729 because we can't be sure that the constraint allows a register,
3730 and push_reload verifies the constraints for asms. */
3731 && (modified
[i
] == RELOAD_READ
3732 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3733 operand_reloadnum
[i
]
3734 = push_reload ((modified
[i
] != RELOAD_WRITE
3735 ? recog_data
.operand
[i
] : 0),
3736 (modified
[i
] != RELOAD_READ
3737 ? recog_data
.operand
[i
] : 0),
3738 (modified
[i
] != RELOAD_WRITE
3739 ? recog_data
.operand_loc
[i
] : 0),
3740 (modified
[i
] != RELOAD_READ
3741 ? recog_data
.operand_loc
[i
] : 0),
3742 (enum reg_class
) goal_alternative
[i
],
3743 (modified
[i
] == RELOAD_WRITE
3744 ? VOIDmode
: operand_mode
[i
]),
3745 (modified
[i
] == RELOAD_READ
3746 ? VOIDmode
: operand_mode
[i
]),
3747 (insn_code_number
< 0 ? 0
3748 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3749 1, i
, operand_type
[i
]);
3750 /* If a memory reference remains (either as a MEM or a pseudo that
3751 did not get a hard register), yet we can't make an optional
3752 reload, check if this is actually a pseudo register reference;
3753 we then need to emit a USE and/or a CLOBBER so that reload
3754 inheritance will do the right thing. */
3756 && (GET_CODE (operand
) == MEM
3757 || (GET_CODE (operand
) == REG
3758 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3759 && reg_renumber
[REGNO (operand
)] < 0)))
3761 operand
= *recog_data
.operand_loc
[i
];
3763 while (GET_CODE (operand
) == SUBREG
)
3764 operand
= XEXP (operand
, 0);
3765 if (GET_CODE (operand
) == REG
)
3767 if (modified
[i
] != RELOAD_WRITE
)
3768 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3769 if (modified
[i
] != RELOAD_READ
)
3770 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3774 else if (goal_alternative_matches
[i
] >= 0
3775 && goal_alternative_win
[goal_alternative_matches
[i
]]
3776 && modified
[i
] == RELOAD_READ
3777 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3778 && ! no_input_reloads
&& ! no_output_reloads
3781 /* Similarly, make an optional reload for a pair of matching
3782 objects that are in MEM or a pseudo that didn't get a hard reg. */
3784 rtx operand
= recog_data
.operand
[i
];
3786 while (GET_CODE (operand
) == SUBREG
)
3787 operand
= XEXP (operand
, 0);
3788 if ((GET_CODE (operand
) == MEM
3789 || (GET_CODE (operand
) == REG
3790 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3791 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3793 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3794 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3795 recog_data
.operand
[i
],
3796 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3797 recog_data
.operand_loc
[i
],
3798 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3799 operand_mode
[goal_alternative_matches
[i
]],
3801 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3804 /* Perform whatever substitutions on the operands we are supposed
3805 to make due to commutativity or replacement of registers
3806 with equivalent constants or memory slots. */
3808 for (i
= 0; i
< noperands
; i
++)
3810 /* We only do this on the last pass through reload, because it is
3811 possible for some data (like reg_equiv_address) to be changed during
3812 later passes. Moreover, we loose the opportunity to get a useful
3813 reload_{in,out}_reg when we do these replacements. */
3817 rtx substitution
= substed_operand
[i
];
3819 *recog_data
.operand_loc
[i
] = substitution
;
3821 /* If we're replacing an operand with a LABEL_REF, we need
3822 to make sure that there's a REG_LABEL note attached to
3823 this instruction. */
3824 if (GET_CODE (insn
) != JUMP_INSN
3825 && GET_CODE (substitution
) == LABEL_REF
3826 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3827 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3828 XEXP (substitution
, 0),
3832 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3835 /* If this insn pattern contains any MATCH_DUP's, make sure that
3836 they will be substituted if the operands they match are substituted.
3837 Also do now any substitutions we already did on the operands.
3839 Don't do this if we aren't making replacements because we might be
3840 propagating things allocated by frame pointer elimination into places
3841 it doesn't expect. */
3843 if (insn_code_number
>= 0 && replace
)
3844 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3846 int opno
= recog_data
.dup_num
[i
];
3847 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3848 if (operand_reloadnum
[opno
] >= 0)
3849 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3850 insn_data
[insn_code_number
].operand
[opno
].mode
);
3854 /* This loses because reloading of prior insns can invalidate the equivalence
3855 (or at least find_equiv_reg isn't smart enough to find it any more),
3856 causing this insn to need more reload regs than it needed before.
3857 It may be too late to make the reload regs available.
3858 Now this optimization is done safely in choose_reload_regs. */
3860 /* For each reload of a reg into some other class of reg,
3861 search for an existing equivalent reg (same value now) in the right class.
3862 We can use it as long as we don't need to change its contents. */
3863 for (i
= 0; i
< n_reloads
; i
++)
3864 if (rld
[i
].reg_rtx
== 0
3866 && GET_CODE (rld
[i
].in
) == REG
3870 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3871 static_reload_reg_p
, 0, rld
[i
].inmode
);
3872 /* Prevent generation of insn to load the value
3873 because the one we found already has the value. */
3875 rld
[i
].in
= rld
[i
].reg_rtx
;
3879 /* Perhaps an output reload can be combined with another
3880 to reduce needs by one. */
3881 if (!goal_earlyclobber
)
3884 /* If we have a pair of reloads for parts of an address, they are reloading
3885 the same object, the operands themselves were not reloaded, and they
3886 are for two operands that are supposed to match, merge the reloads and
3887 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3889 for (i
= 0; i
< n_reloads
; i
++)
3893 for (j
= i
+ 1; j
< n_reloads
; j
++)
3894 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3895 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3896 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3897 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3898 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3899 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3900 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3901 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3902 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3903 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3904 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3905 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3906 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3907 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3908 || (goal_alternative_matches
[rld
[j
].opnum
]
3911 for (k
= 0; k
< n_replacements
; k
++)
3912 if (replacements
[k
].what
== j
)
3913 replacements
[k
].what
= i
;
3915 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3916 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3917 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3919 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3924 /* Scan all the reloads and update their type.
3925 If a reload is for the address of an operand and we didn't reload
3926 that operand, change the type. Similarly, change the operand number
3927 of a reload when two operands match. If a reload is optional, treat it
3928 as though the operand isn't reloaded.
3930 ??? This latter case is somewhat odd because if we do the optional
3931 reload, it means the object is hanging around. Thus we need only
3932 do the address reload if the optional reload was NOT done.
3934 Change secondary reloads to be the address type of their operand, not
3937 If an operand's reload is now RELOAD_OTHER, change any
3938 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3939 RELOAD_FOR_OTHER_ADDRESS. */
3941 for (i
= 0; i
< n_reloads
; i
++)
3943 if (rld
[i
].secondary_p
3944 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
3945 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3947 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3948 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3949 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3950 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3951 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3952 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3954 /* If we have a secondary reload to go along with this reload,
3955 change its type to RELOAD_FOR_OPADDR_ADDR. */
3957 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3958 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3959 && rld
[i
].secondary_in_reload
!= -1)
3961 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3963 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3965 /* If there's a tertiary reload we have to change it also. */
3966 if (secondary_in_reload
> 0
3967 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3968 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3969 = RELOAD_FOR_OPADDR_ADDR
;
3972 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3973 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3974 && rld
[i
].secondary_out_reload
!= -1)
3976 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3978 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3980 /* If there's a tertiary reload we have to change it also. */
3981 if (secondary_out_reload
3982 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3983 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3984 = RELOAD_FOR_OPADDR_ADDR
;
3987 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3988 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3989 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3991 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3994 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3995 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3996 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3997 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3999 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4001 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4002 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4005 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4006 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4007 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4009 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4010 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4011 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4012 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4013 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4014 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4015 This is complicated by the fact that a single operand can have more
4016 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4017 choose_reload_regs without affecting code quality, and cases that
4018 actually fail are extremely rare, so it turns out to be better to fix
4019 the problem here by not generating cases that choose_reload_regs will
4021 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4022 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4024 We can reduce the register pressure by exploiting that a
4025 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4026 does not conflict with any of them, if it is only used for the first of
4027 the RELOAD_FOR_X_ADDRESS reloads. */
4029 int first_op_addr_num
= -2;
4030 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4031 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4032 int need_change
= 0;
4033 /* We use last_op_addr_reload and the contents of the above arrays
4034 first as flags - -2 means no instance encountered, -1 means exactly
4035 one instance encountered.
4036 If more than one instance has been encountered, we store the reload
4037 number of the first reload of the kind in question; reload numbers
4038 are known to be non-negative. */
4039 for (i
= 0; i
< noperands
; i
++)
4040 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4041 for (i
= n_reloads
- 1; i
>= 0; i
--)
4043 switch (rld
[i
].when_needed
)
4045 case RELOAD_FOR_OPERAND_ADDRESS
:
4046 if (++first_op_addr_num
>= 0)
4048 first_op_addr_num
= i
;
4052 case RELOAD_FOR_INPUT_ADDRESS
:
4053 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4055 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4059 case RELOAD_FOR_OUTPUT_ADDRESS
:
4060 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4062 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4073 for (i
= 0; i
< n_reloads
; i
++)
4076 enum reload_type type
;
4078 switch (rld
[i
].when_needed
)
4080 case RELOAD_FOR_OPADDR_ADDR
:
4081 first_num
= first_op_addr_num
;
4082 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4084 case RELOAD_FOR_INPADDR_ADDRESS
:
4085 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4086 type
= RELOAD_FOR_INPUT_ADDRESS
;
4088 case RELOAD_FOR_OUTADDR_ADDRESS
:
4089 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4090 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4097 else if (i
> first_num
)
4098 rld
[i
].when_needed
= type
;
4101 /* Check if the only TYPE reload that uses reload I is
4102 reload FIRST_NUM. */
4103 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4105 if (rld
[j
].when_needed
== type
4106 && (rld
[i
].secondary_p
4107 ? rld
[j
].secondary_in_reload
== i
4108 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4110 rld
[i
].when_needed
= type
;
4119 /* See if we have any reloads that are now allowed to be merged
4120 because we've changed when the reload is needed to
4121 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4122 check for the most common cases. */
4124 for (i
= 0; i
< n_reloads
; i
++)
4125 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4126 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4127 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4128 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4129 for (j
= 0; j
< n_reloads
; j
++)
4130 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4131 && rld
[j
].when_needed
== rld
[i
].when_needed
4132 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4133 && rld
[i
].class == rld
[j
].class
4134 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4135 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4137 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4138 transfer_replacements (i
, j
);
4143 /* If we made any reloads for addresses, see if they violate a
4144 "no input reloads" requirement for this insn. But loads that we
4145 do after the insn (such as for output addresses) are fine. */
4146 if (no_input_reloads
)
4147 for (i
= 0; i
< n_reloads
; i
++)
4149 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4150 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4154 /* Compute reload_mode and reload_nregs. */
4155 for (i
= 0; i
< n_reloads
; i
++)
4158 = (rld
[i
].inmode
== VOIDmode
4159 || (GET_MODE_SIZE (rld
[i
].outmode
)
4160 > GET_MODE_SIZE (rld
[i
].inmode
)))
4161 ? rld
[i
].outmode
: rld
[i
].inmode
;
4163 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4169 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4170 accepts a memory operand with constant address. */
4173 alternative_allows_memconst (constraint
, altnum
)
4174 const char *constraint
;
4178 /* Skip alternatives before the one requested. */
4181 while (*constraint
++ != ',');
4184 /* Scan the requested alternative for 'm' or 'o'.
4185 If one of them is present, this alternative accepts memory constants. */
4186 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4187 if (c
== 'm' || c
== 'o')
4192 /* Scan X for memory references and scan the addresses for reloading.
4193 Also checks for references to "constant" regs that we want to eliminate
4194 and replaces them with the values they stand for.
4195 We may alter X destructively if it contains a reference to such.
4196 If X is just a constant reg, we return the equivalent value
4199 IND_LEVELS says how many levels of indirect addressing this machine
4202 OPNUM and TYPE identify the purpose of the reload.
4204 IS_SET_DEST is true if X is the destination of a SET, which is not
4205 appropriate to be replaced by a constant.
4207 INSN, if nonzero, is the insn in which we do the reload. It is used
4208 to determine if we may generate output reloads, and where to put USEs
4209 for pseudos that we have to replace with stack slots.
4211 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4212 result of find_reloads_address. */
4215 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4219 enum reload_type type
;
4223 int *address_reloaded
;
4225 register RTX_CODE code
= GET_CODE (x
);
4227 register const char *fmt
= GET_RTX_FORMAT (code
);
4233 /* This code is duplicated for speed in find_reloads. */
4234 register int regno
= REGNO (x
);
4235 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4236 x
= reg_equiv_constant
[regno
];
4238 /* This creates (subreg (mem...)) which would cause an unnecessary
4239 reload of the mem. */
4240 else if (reg_equiv_mem
[regno
] != 0)
4241 x
= reg_equiv_mem
[regno
];
4243 else if (reg_equiv_memory_loc
[regno
]
4244 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4246 rtx mem
= make_memloc (x
, regno
);
4247 if (reg_equiv_address
[regno
]
4248 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4250 /* If this is not a toplevel operand, find_reloads doesn't see
4251 this substitution. We have to emit a USE of the pseudo so
4252 that delete_output_reload can see it. */
4253 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4254 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4256 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4257 opnum
, type
, ind_levels
, insn
);
4258 if (address_reloaded
)
4259 *address_reloaded
= i
;
4268 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4269 opnum
, type
, ind_levels
, insn
);
4270 if (address_reloaded
)
4271 *address_reloaded
= i
;
4276 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4278 /* Check for SUBREG containing a REG that's equivalent to a constant.
4279 If the constant has a known value, truncate it right now.
4280 Similarly if we are extracting a single-word of a multi-word
4281 constant. If the constant is symbolic, allow it to be substituted
4282 normally. push_reload will strip the subreg later. If the
4283 constant is VOIDmode, abort because we will lose the mode of
4284 the register (this should never happen because one of the cases
4285 above should handle it). */
4287 register int regno
= REGNO (SUBREG_REG (x
));
4290 if (subreg_lowpart_p (x
)
4291 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4292 && reg_equiv_constant
[regno
] != 0
4293 && (tem
= gen_lowpart_common (GET_MODE (x
),
4294 reg_equiv_constant
[regno
])) != 0)
4297 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4298 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4299 && reg_equiv_constant
[regno
] != 0
4300 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4302 GET_MODE (SUBREG_REG (x
)))) != 0)
4304 /* TEM is now a word sized constant for the bits from X that
4305 we wanted. However, TEM may be the wrong representation.
4307 Use gen_lowpart_common to convert a CONST_INT into a
4308 CONST_DOUBLE and vice versa as needed according to by the mode
4310 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4316 /* If the SUBREG is wider than a word, the above test will fail.
4317 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4318 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4319 a 32 bit target. We still can - and have to - handle this
4320 for non-paradoxical subregs of CONST_INTs. */
4321 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4322 && reg_equiv_constant
[regno
] != 0
4323 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4324 && (GET_MODE_SIZE (GET_MODE (x
))
4325 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4327 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4328 if (WORDS_BIG_ENDIAN
)
4329 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4330 - GET_MODE_BITSIZE (GET_MODE (x
))
4332 /* Here we use the knowledge that CONST_INTs have a
4333 HOST_WIDE_INT field. */
4334 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4335 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4336 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4339 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4340 && reg_equiv_constant
[regno
] != 0
4341 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4344 /* If the subreg contains a reg that will be converted to a mem,
4345 convert the subreg to a narrower memref now.
4346 Otherwise, we would get (subreg (mem ...) ...),
4347 which would force reload of the mem.
4349 We also need to do this if there is an equivalent MEM that is
4350 not offsettable. In that case, alter_subreg would produce an
4351 invalid address on big-endian machines.
4353 For machines that extend byte loads, we must not reload using
4354 a wider mode if we have a paradoxical SUBREG. find_reloads will
4355 force a reload in that case. So we should not do anything here. */
4357 else if (regno
>= FIRST_PSEUDO_REGISTER
4358 #ifdef LOAD_EXTEND_OP
4359 && (GET_MODE_SIZE (GET_MODE (x
))
4360 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4362 && (reg_equiv_address
[regno
] != 0
4363 || (reg_equiv_mem
[regno
] != 0
4364 && (! strict_memory_address_p (GET_MODE (x
),
4365 XEXP (reg_equiv_mem
[regno
], 0))
4366 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4367 || num_not_at_initial_offset
))))
4368 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4371 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4372 && (GET_MODE_SIZE (GET_MODE (x
))
4373 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4374 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4376 /* A paradoxical subreg will simply have the mode of the access
4377 changed, so we need to reload such a memory operand to stabilize
4378 the meaning of the memory access. */
4379 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4382 push_reload (NULL_RTX
, SUBREG_REG (x
), NULL_PTR
, &SUBREG_REG (x
),
4383 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4384 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4386 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), NULL_PTR
,
4387 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4388 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4391 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4395 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4396 ind_levels
, is_set_dest
, insn
,
4398 /* If we have replaced a reg with it's equivalent memory loc -
4399 that can still be handled here e.g. if it's in a paradoxical
4400 subreg - we must make the change in a copy, rather than using
4401 a destructive change. This way, find_reloads can still elect
4402 not to do the change. */
4403 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4405 x
= shallow_copy_rtx (x
);
4408 XEXP (x
, i
) = new_part
;
4414 /* Return a mem ref for the memory equivalent of reg REGNO.
4415 This mem ref is not shared with anything. */
4418 make_memloc (ad
, regno
)
4422 /* We must rerun eliminate_regs, in case the elimination
4423 offsets have changed. */
4425 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4427 /* If TEM might contain a pseudo, we must copy it to avoid
4428 modifying it when we do the substitution for the reload. */
4429 if (rtx_varies_p (tem
))
4430 tem
= copy_rtx (tem
);
4432 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4433 MEM_COPY_ATTRIBUTES (tem
, reg_equiv_memory_loc
[regno
]);
4437 /* Record all reloads needed for handling memory address AD
4438 which appears in *LOC in a memory reference to mode MODE
4439 which itself is found in location *MEMREFLOC.
4440 Note that we take shortcuts assuming that no multi-reg machine mode
4441 occurs as part of an address.
4443 OPNUM and TYPE specify the purpose of this reload.
4445 IND_LEVELS says how many levels of indirect addressing this machine
4448 INSN, if nonzero, is the insn in which we do the reload. It is used
4449 to determine if we may generate output reloads, and where to put USEs
4450 for pseudos that we have to replace with stack slots.
4452 Value is nonzero if this address is reloaded or replaced as a whole.
4453 This is interesting to the caller if the address is an autoincrement.
4455 Note that there is no verification that the address will be valid after
4456 this routine does its work. Instead, we rely on the fact that the address
4457 was valid when reload started. So we need only undo things that reload
4458 could have broken. These are wrong register types, pseudos not allocated
4459 to a hard register, and frame pointer elimination. */
4462 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4463 enum machine_mode mode
;
4468 enum reload_type type
;
4473 int removed_and
= 0;
4476 /* If the address is a register, see if it is a legitimate address and
4477 reload if not. We first handle the cases where we need not reload
4478 or where we must reload in a non-standard way. */
4480 if (GET_CODE (ad
) == REG
)
4484 if (reg_equiv_constant
[regno
] != 0
4485 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4487 *loc
= ad
= reg_equiv_constant
[regno
];
4491 tem
= reg_equiv_memory_loc
[regno
];
4494 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4496 tem
= make_memloc (ad
, regno
);
4497 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4499 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4500 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4503 /* We can avoid a reload if the register's equivalent memory
4504 expression is valid as an indirect memory address.
4505 But not all addresses are valid in a mem used as an indirect
4506 address: only reg or reg+constant. */
4509 && strict_memory_address_p (mode
, tem
)
4510 && (GET_CODE (XEXP (tem
, 0)) == REG
4511 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4512 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4513 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4515 /* TEM is not the same as what we'll be replacing the
4516 pseudo with after reload, put a USE in front of INSN
4517 in the final reload pass. */
4519 && num_not_at_initial_offset
4520 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4523 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4524 /* This doesn't really count as replacing the address
4525 as a whole, since it is still a memory access. */
4533 /* The only remaining case where we can avoid a reload is if this is a
4534 hard register that is valid as a base register and which is not the
4535 subject of a CLOBBER in this insn. */
4537 else if (regno
< FIRST_PSEUDO_REGISTER
4538 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4539 && ! regno_clobbered_p (regno
, this_insn
, mode
))
4542 /* If we do not have one of the cases above, we must do the reload. */
4543 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4544 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4548 if (strict_memory_address_p (mode
, ad
))
4550 /* The address appears valid, so reloads are not needed.
4551 But the address may contain an eliminable register.
4552 This can happen because a machine with indirect addressing
4553 may consider a pseudo register by itself a valid address even when
4554 it has failed to get a hard reg.
4555 So do a tree-walk to find and eliminate all such regs. */
4557 /* But first quickly dispose of a common case. */
4558 if (GET_CODE (ad
) == PLUS
4559 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4560 && GET_CODE (XEXP (ad
, 0)) == REG
4561 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4564 subst_reg_equivs_changed
= 0;
4565 *loc
= subst_reg_equivs (ad
, insn
);
4567 if (! subst_reg_equivs_changed
)
4570 /* Check result for validity after substitution. */
4571 if (strict_memory_address_p (mode
, ad
))
4575 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4580 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4585 *memrefloc
= copy_rtx (*memrefloc
);
4586 XEXP (*memrefloc
, 0) = ad
;
4587 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4593 /* The address is not valid. We have to figure out why. First see if
4594 we have an outer AND and remove it if so. Then analyze what's inside. */
4596 if (GET_CODE (ad
) == AND
)
4599 loc
= &XEXP (ad
, 0);
4603 /* One possibility for why the address is invalid is that it is itself
4604 a MEM. This can happen when the frame pointer is being eliminated, a
4605 pseudo is not allocated to a hard register, and the offset between the
4606 frame and stack pointers is not its initial value. In that case the
4607 pseudo will have been replaced by a MEM referring to the
4609 if (GET_CODE (ad
) == MEM
)
4611 /* First ensure that the address in this MEM is valid. Then, unless
4612 indirect addresses are valid, reload the MEM into a register. */
4614 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4615 opnum
, ADDR_TYPE (type
),
4616 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4618 /* If tem was changed, then we must create a new memory reference to
4619 hold it and store it back into memrefloc. */
4620 if (tem
!= ad
&& memrefloc
)
4622 *memrefloc
= copy_rtx (*memrefloc
);
4623 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4624 loc
= &XEXP (*memrefloc
, 0);
4626 loc
= &XEXP (*loc
, 0);
4629 /* Check similar cases as for indirect addresses as above except
4630 that we can allow pseudos and a MEM since they should have been
4631 taken care of above. */
4634 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4635 || GET_CODE (XEXP (tem
, 0)) == MEM
4636 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4637 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4638 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4639 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4641 /* Must use TEM here, not AD, since it is the one that will
4642 have any subexpressions reloaded, if needed. */
4643 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4644 BASE_REG_CLASS
, GET_MODE (tem
),
4647 return ! removed_and
;
4653 /* If we have address of a stack slot but it's not valid because the
4654 displacement is too large, compute the sum in a register.
4655 Handle all base registers here, not just fp/ap/sp, because on some
4656 targets (namely SH) we can also get too large displacements from
4657 big-endian corrections. */
4658 else if (GET_CODE (ad
) == PLUS
4659 && GET_CODE (XEXP (ad
, 0)) == REG
4660 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4661 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4662 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4664 /* Unshare the MEM rtx so we can safely alter it. */
4667 *memrefloc
= copy_rtx (*memrefloc
);
4668 loc
= &XEXP (*memrefloc
, 0);
4670 loc
= &XEXP (*loc
, 0);
4673 if (double_reg_address_ok
)
4675 /* Unshare the sum as well. */
4676 *loc
= ad
= copy_rtx (ad
);
4678 /* Reload the displacement into an index reg.
4679 We assume the frame pointer or arg pointer is a base reg. */
4680 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4681 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4687 /* If the sum of two regs is not necessarily valid,
4688 reload the sum into a base reg.
4689 That will at least work. */
4690 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4691 Pmode
, opnum
, type
, ind_levels
);
4693 return ! removed_and
;
4696 /* If we have an indexed stack slot, there are three possible reasons why
4697 it might be invalid: The index might need to be reloaded, the address
4698 might have been made by frame pointer elimination and hence have a
4699 constant out of range, or both reasons might apply.
4701 We can easily check for an index needing reload, but even if that is the
4702 case, we might also have an invalid constant. To avoid making the
4703 conservative assumption and requiring two reloads, we see if this address
4704 is valid when not interpreted strictly. If it is, the only problem is
4705 that the index needs a reload and find_reloads_address_1 will take care
4708 If we decide to do something here, it must be that
4709 `double_reg_address_ok' is true and that this address rtl was made by
4710 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4711 rework the sum so that the reload register will be added to the index.
4712 This is safe because we know the address isn't shared.
4714 We check for fp/ap/sp as both the first and second operand of the
4717 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4718 && GET_CODE (XEXP (ad
, 0)) == PLUS
4719 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4720 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4721 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4723 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4724 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4726 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4727 && ! memory_address_p (mode
, ad
))
4729 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4730 plus_constant (XEXP (XEXP (ad
, 0), 0),
4731 INTVAL (XEXP (ad
, 1))),
4732 XEXP (XEXP (ad
, 0), 1));
4733 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4734 GET_MODE (ad
), opnum
, type
, ind_levels
);
4735 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4741 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4742 && GET_CODE (XEXP (ad
, 0)) == PLUS
4743 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4744 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4745 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4747 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4748 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4750 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4751 && ! memory_address_p (mode
, ad
))
4753 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4754 XEXP (XEXP (ad
, 0), 0),
4755 plus_constant (XEXP (XEXP (ad
, 0), 1),
4756 INTVAL (XEXP (ad
, 1))));
4757 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4758 GET_MODE (ad
), opnum
, type
, ind_levels
);
4759 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4765 /* See if address becomes valid when an eliminable register
4766 in a sum is replaced. */
4769 if (GET_CODE (ad
) == PLUS
)
4770 tem
= subst_indexed_address (ad
);
4771 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4773 /* Ok, we win that way. Replace any additional eliminable
4776 subst_reg_equivs_changed
= 0;
4777 tem
= subst_reg_equivs (tem
, insn
);
4779 /* Make sure that didn't make the address invalid again. */
4781 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4788 /* If constants aren't valid addresses, reload the constant address
4790 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4792 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4793 Unshare it so we can safely alter it. */
4794 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4795 && CONSTANT_POOL_ADDRESS_P (ad
))
4797 *memrefloc
= copy_rtx (*memrefloc
);
4798 loc
= &XEXP (*memrefloc
, 0);
4800 loc
= &XEXP (*loc
, 0);
4803 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4805 return ! removed_and
;
4808 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4812 /* Find all pseudo regs appearing in AD
4813 that are eliminable in favor of equivalent values
4814 and do not have hard regs; replace them by their equivalents.
4815 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4816 front of it for pseudos that we have to replace with stack slots. */
4819 subst_reg_equivs (ad
, insn
)
4823 register RTX_CODE code
= GET_CODE (ad
);
4825 register const char *fmt
;
4841 register int regno
= REGNO (ad
);
4843 if (reg_equiv_constant
[regno
] != 0)
4845 subst_reg_equivs_changed
= 1;
4846 return reg_equiv_constant
[regno
];
4848 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4850 rtx mem
= make_memloc (ad
, regno
);
4851 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4853 subst_reg_equivs_changed
= 1;
4854 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4862 /* Quickly dispose of a common case. */
4863 if (XEXP (ad
, 0) == frame_pointer_rtx
4864 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4872 fmt
= GET_RTX_FORMAT (code
);
4873 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4875 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4879 /* Compute the sum of X and Y, making canonicalizations assumed in an
4880 address, namely: sum constant integers, surround the sum of two
4881 constants with a CONST, put the constant as the second operand, and
4882 group the constant on the outermost sum.
4884 This routine assumes both inputs are already in canonical form. */
4891 enum machine_mode mode
= GET_MODE (x
);
4893 if (mode
== VOIDmode
)
4894 mode
= GET_MODE (y
);
4896 if (mode
== VOIDmode
)
4899 if (GET_CODE (x
) == CONST_INT
)
4900 return plus_constant (y
, INTVAL (x
));
4901 else if (GET_CODE (y
) == CONST_INT
)
4902 return plus_constant (x
, INTVAL (y
));
4903 else if (CONSTANT_P (x
))
4904 tem
= x
, x
= y
, y
= tem
;
4906 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4907 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4909 /* Note that if the operands of Y are specified in the opposite
4910 order in the recursive calls below, infinite recursion will occur. */
4911 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4912 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4914 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4915 constant will have been placed second. */
4916 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4918 if (GET_CODE (x
) == CONST
)
4920 if (GET_CODE (y
) == CONST
)
4923 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4926 return gen_rtx_PLUS (mode
, x
, y
);
4929 /* If ADDR is a sum containing a pseudo register that should be
4930 replaced with a constant (from reg_equiv_constant),
4931 return the result of doing so, and also apply the associative
4932 law so that the result is more likely to be a valid address.
4933 (But it is not guaranteed to be one.)
4935 Note that at most one register is replaced, even if more are
4936 replaceable. Also, we try to put the result into a canonical form
4937 so it is more likely to be a valid address.
4939 In all other cases, return ADDR. */
4942 subst_indexed_address (addr
)
4945 rtx op0
= 0, op1
= 0, op2
= 0;
4949 if (GET_CODE (addr
) == PLUS
)
4951 /* Try to find a register to replace. */
4952 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4953 if (GET_CODE (op0
) == REG
4954 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4955 && reg_renumber
[regno
] < 0
4956 && reg_equiv_constant
[regno
] != 0)
4957 op0
= reg_equiv_constant
[regno
];
4958 else if (GET_CODE (op1
) == REG
4959 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4960 && reg_renumber
[regno
] < 0
4961 && reg_equiv_constant
[regno
] != 0)
4962 op1
= reg_equiv_constant
[regno
];
4963 else if (GET_CODE (op0
) == PLUS
4964 && (tem
= subst_indexed_address (op0
)) != op0
)
4966 else if (GET_CODE (op1
) == PLUS
4967 && (tem
= subst_indexed_address (op1
)) != op1
)
4972 /* Pick out up to three things to add. */
4973 if (GET_CODE (op1
) == PLUS
)
4974 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4975 else if (GET_CODE (op0
) == PLUS
)
4976 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4978 /* Compute the sum. */
4980 op1
= form_sum (op1
, op2
);
4982 op0
= form_sum (op0
, op1
);
4989 /* Record the pseudo registers we must reload into hard registers in a
4990 subexpression of a would-be memory address, X referring to a value
4991 in mode MODE. (This function is not called if the address we find
4994 CONTEXT = 1 means we are considering regs as index regs,
4995 = 0 means we are considering them as base regs.
4997 OPNUM and TYPE specify the purpose of any reloads made.
4999 IND_LEVELS says how many levels of indirect addressing are
5000 supported at this point in the address.
5002 INSN, if nonzero, is the insn in which we do the reload. It is used
5003 to determine if we may generate output reloads.
5005 We return nonzero if X, as a whole, is reloaded or replaced. */
5007 /* Note that we take shortcuts assuming that no multi-reg machine mode
5008 occurs as part of an address.
5009 Also, this is not fully machine-customizable; it works for machines
5010 such as vaxes and 68000's and 32000's, but other possible machines
5011 could have addressing modes that this does not handle right. */
5014 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5015 enum machine_mode mode
;
5020 enum reload_type type
;
5024 register RTX_CODE code
= GET_CODE (x
);
5030 register rtx orig_op0
= XEXP (x
, 0);
5031 register rtx orig_op1
= XEXP (x
, 1);
5032 register RTX_CODE code0
= GET_CODE (orig_op0
);
5033 register RTX_CODE code1
= GET_CODE (orig_op1
);
5034 register rtx op0
= orig_op0
;
5035 register rtx op1
= orig_op1
;
5037 if (GET_CODE (op0
) == SUBREG
)
5039 op0
= SUBREG_REG (op0
);
5040 code0
= GET_CODE (op0
);
5041 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5042 op0
= gen_rtx_REG (word_mode
,
5043 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5046 if (GET_CODE (op1
) == SUBREG
)
5048 op1
= SUBREG_REG (op1
);
5049 code1
= GET_CODE (op1
);
5050 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5051 op1
= gen_rtx_REG (GET_MODE (op1
),
5052 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5055 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5056 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5058 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5059 type
, ind_levels
, insn
);
5060 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5061 type
, ind_levels
, insn
);
5064 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5065 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5067 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5068 type
, ind_levels
, insn
);
5069 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5070 type
, ind_levels
, insn
);
5073 else if (code0
== CONST_INT
|| code0
== CONST
5074 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5075 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5076 type
, ind_levels
, insn
);
5078 else if (code1
== CONST_INT
|| code1
== CONST
5079 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5080 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5081 type
, ind_levels
, insn
);
5083 else if (code0
== REG
&& code1
== REG
)
5085 if (REG_OK_FOR_INDEX_P (op0
)
5086 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5088 else if (REG_OK_FOR_INDEX_P (op1
)
5089 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5091 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5092 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5093 type
, ind_levels
, insn
);
5094 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5095 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5096 type
, ind_levels
, insn
);
5097 else if (REG_OK_FOR_INDEX_P (op1
))
5098 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5099 type
, ind_levels
, insn
);
5100 else if (REG_OK_FOR_INDEX_P (op0
))
5101 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5102 type
, ind_levels
, insn
);
5105 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5106 type
, ind_levels
, insn
);
5107 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5108 type
, ind_levels
, insn
);
5112 else if (code0
== REG
)
5114 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5115 type
, ind_levels
, insn
);
5116 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5117 type
, ind_levels
, insn
);
5120 else if (code1
== REG
)
5122 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5123 type
, ind_levels
, insn
);
5124 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5125 type
, ind_levels
, insn
);
5134 rtx op0
= XEXP (x
, 0);
5135 rtx op1
= XEXP (x
, 1);
5137 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5140 /* Currently, we only support {PRE,POST}_MODIFY constructs
5141 where a base register is {inc,dec}remented by the contents
5142 of another register or by a constant value. Thus, these
5143 operands must match. */
5144 if (op0
!= XEXP (op1
, 0))
5147 /* Require index register (or constant). Let's just handle the
5148 register case in the meantime... If the target allows
5149 auto-modify by a constant then we could try replacing a pseudo
5150 register with its equivalent constant where applicable. */
5151 if (REG_P (XEXP (op1
, 1)))
5152 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5153 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5154 opnum
, type
, ind_levels
, insn
);
5156 if (REG_P (XEXP (op1
, 0)))
5158 register int regno
= REGNO (XEXP (op1
, 0));
5160 /* A register that is incremented cannot be constant! */
5161 if (regno
>= FIRST_PSEUDO_REGISTER
5162 && reg_equiv_constant
[regno
] != 0)
5165 /* Handle a register that is equivalent to a memory location
5166 which cannot be addressed directly. */
5167 if (reg_equiv_memory_loc
[regno
] != 0
5168 && (reg_equiv_address
[regno
] != 0
5169 || num_not_at_initial_offset
))
5171 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5173 if (reg_equiv_address
[regno
]
5174 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5176 /* First reload the memory location's address.
5177 We can't use ADDR_TYPE (type) here, because we need to
5178 write back the value after reading it, hence we actually
5179 need two registers. */
5180 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5181 &XEXP (tem
, 0), opnum
, type
,
5184 /* Then reload the memory location into a base
5186 push_reload (tem
, tem
, &XEXP (x
, 0), &XEXP (op1
, 0),
5187 BASE_REG_CLASS
, GET_MODE (x
), GET_MODE (x
),
5188 0, 0, opnum
, RELOAD_OTHER
);
5193 if (reg_renumber
[regno
] >= 0)
5194 regno
= reg_renumber
[regno
];
5196 /* We require a base register here... */
5197 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5199 push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5200 &XEXP (op1
, 0), &XEXP (x
, 0),
5202 GET_MODE (x
), GET_MODE (x
), 0, 0,
5203 opnum
, RELOAD_OTHER
);
5215 if (GET_CODE (XEXP (x
, 0)) == REG
)
5217 register int regno
= REGNO (XEXP (x
, 0));
5221 /* A register that is incremented cannot be constant! */
5222 if (regno
>= FIRST_PSEUDO_REGISTER
5223 && reg_equiv_constant
[regno
] != 0)
5226 /* Handle a register that is equivalent to a memory location
5227 which cannot be addressed directly. */
5228 if (reg_equiv_memory_loc
[regno
] != 0
5229 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5231 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5232 if (reg_equiv_address
[regno
]
5233 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5235 /* First reload the memory location's address.
5236 We can't use ADDR_TYPE (type) here, because we need to
5237 write back the value after reading it, hence we actually
5238 need two registers. */
5239 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5240 &XEXP (tem
, 0), opnum
, type
,
5242 /* Put this inside a new increment-expression. */
5243 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5244 /* Proceed to reload that, as if it contained a register. */
5248 /* If we have a hard register that is ok as an index,
5249 don't make a reload. If an autoincrement of a nice register
5250 isn't "valid", it must be that no autoincrement is "valid".
5251 If that is true and something made an autoincrement anyway,
5252 this must be a special context where one is allowed.
5253 (For example, a "push" instruction.)
5254 We can't improve this address, so leave it alone. */
5256 /* Otherwise, reload the autoincrement into a suitable hard reg
5257 and record how much to increment by. */
5259 if (reg_renumber
[regno
] >= 0)
5260 regno
= reg_renumber
[regno
];
5261 if ((regno
>= FIRST_PSEUDO_REGISTER
5262 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5263 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5270 /* If we can output the register afterwards, do so, this
5271 saves the extra update.
5272 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5273 CALL_INSN - and it does not set CC0.
5274 But don't do this if we cannot directly address the
5275 memory location, since this will make it harder to
5276 reuse address reloads, and increases register pressure.
5277 Also don't do this if we can probably update x directly. */
5278 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5280 : reg_equiv_mem
[regno
]);
5281 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5282 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5283 && memory_operand (equiv
, GET_MODE (equiv
))
5285 && ! sets_cc0_p (PATTERN (insn
))
5287 && ! (icode
!= CODE_FOR_nothing
5288 && ((*insn_data
[icode
].operand
[0].predicate
)
5290 && ((*insn_data
[icode
].operand
[1].predicate
)
5293 /* We use the original pseudo for loc, so that
5294 emit_reload_insns() knows which pseudo this
5295 reload refers to and updates the pseudo rtx, not
5296 its equivalent memory location, as well as the
5297 corresponding entry in reg_last_reload_reg. */
5298 loc
= &XEXP (x_orig
, 0);
5301 = push_reload (x
, x
, loc
, loc
,
5302 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5303 GET_MODE (x
), GET_MODE (x
), 0, 0,
5304 opnum
, RELOAD_OTHER
);
5309 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5310 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5311 GET_MODE (x
), GET_MODE (x
), 0, 0,
5314 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5320 /* Update the REG_INC notes. */
5322 for (link
= REG_NOTES (this_insn
);
5323 link
; link
= XEXP (link
, 1))
5324 if (REG_NOTE_KIND (link
) == REG_INC
5325 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5326 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5332 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5334 /* This is probably the result of a substitution, by eliminate_regs,
5335 of an equivalent address for a pseudo that was not allocated to a
5336 hard register. Verify that the specified address is valid and
5337 reload it into a register. */
5338 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5339 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5343 /* Since we know we are going to reload this item, don't decrement
5344 for the indirection level.
5346 Note that this is actually conservative: it would be slightly
5347 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5349 /* We can't use ADDR_TYPE (type) here, because we need to
5350 write back the value after reading it, hence we actually
5351 need two registers. */
5352 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5353 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5354 opnum
, type
, ind_levels
, insn
);
5356 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5357 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5358 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5360 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5362 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5364 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5371 /* This is probably the result of a substitution, by eliminate_regs, of
5372 an equivalent address for a pseudo that was not allocated to a hard
5373 register. Verify that the specified address is valid and reload it
5376 Since we know we are going to reload this item, don't decrement for
5377 the indirection level.
5379 Note that this is actually conservative: it would be slightly more
5380 efficient to use the value of SPILL_INDIRECT_LEVELS from
5383 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5384 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5385 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5386 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5387 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5392 register int regno
= REGNO (x
);
5394 if (reg_equiv_constant
[regno
] != 0)
5396 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5397 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5398 GET_MODE (x
), opnum
, type
, ind_levels
);
5402 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5403 that feeds this insn. */
5404 if (reg_equiv_mem
[regno
] != 0)
5406 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5407 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5408 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5413 if (reg_equiv_memory_loc
[regno
]
5414 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5416 rtx tem
= make_memloc (x
, regno
);
5417 if (reg_equiv_address
[regno
] != 0
5418 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5421 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5422 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5427 if (reg_renumber
[regno
] >= 0)
5428 regno
= reg_renumber
[regno
];
5430 if ((regno
>= FIRST_PSEUDO_REGISTER
5431 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5432 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5434 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5435 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5436 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5440 /* If a register appearing in an address is the subject of a CLOBBER
5441 in this insn, reload it into some other register to be safe.
5442 The CLOBBER is supposed to make the register unavailable
5443 from before this insn to after it. */
5444 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
)))
5446 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5447 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5448 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5455 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5457 /* If this is a SUBREG of a hard register and the resulting register
5458 is of the wrong class, reload the whole SUBREG. This avoids
5459 needless copies if SUBREG_REG is multi-word. */
5460 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5462 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5464 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5465 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5467 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5468 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5469 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5473 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5474 is larger than the class size, then reload the whole SUBREG. */
5477 enum reg_class
class = (context
? INDEX_REG_CLASS
5479 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5480 > reg_class_size
[class])
5482 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5484 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5485 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5497 register const char *fmt
= GET_RTX_FORMAT (code
);
5500 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5503 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5504 opnum
, type
, ind_levels
, insn
);
5511 /* X, which is found at *LOC, is a part of an address that needs to be
5512 reloaded into a register of class CLASS. If X is a constant, or if
5513 X is a PLUS that contains a constant, check that the constant is a
5514 legitimate operand and that we are supposed to be able to load
5515 it into the register.
5517 If not, force the constant into memory and reload the MEM instead.
5519 MODE is the mode to use, in case X is an integer constant.
5521 OPNUM and TYPE describe the purpose of any reloads made.
5523 IND_LEVELS says how many levels of indirect addressing this machine
5527 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5530 enum reg_class
class;
5531 enum machine_mode mode
;
5533 enum reload_type type
;
5537 && (! LEGITIMATE_CONSTANT_P (x
)
5538 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5542 tem
= x
= force_const_mem (mode
, x
);
5543 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5544 opnum
, type
, ind_levels
, 0);
5547 else if (GET_CODE (x
) == PLUS
5548 && CONSTANT_P (XEXP (x
, 1))
5549 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5550 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5554 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5555 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5556 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5557 opnum
, type
, ind_levels
, 0);
5560 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5561 mode
, VOIDmode
, 0, 0, opnum
, type
);
5564 /* X, a subreg of a pseudo, is a part of an address that needs to be
5567 If the pseudo is equivalent to a memory location that cannot be directly
5568 addressed, make the necessary address reloads.
5570 If address reloads have been necessary, or if the address is changed
5571 by register elimination, return the rtx of the memory location;
5572 otherwise, return X.
5574 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5577 OPNUM and TYPE identify the purpose of the reload.
5579 IND_LEVELS says how many levels of indirect addressing are
5580 supported at this point in the address.
5582 INSN, if nonzero, is the insn in which we do the reload. It is used
5583 to determine where to put USEs for pseudos that we have to replace with
5587 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5592 enum reload_type type
;
5596 int regno
= REGNO (SUBREG_REG (x
));
5598 if (reg_equiv_memory_loc
[regno
])
5600 /* If the address is not directly addressable, or if the address is not
5601 offsettable, then it must be replaced. */
5603 && (reg_equiv_address
[regno
]
5604 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5607 if (force_replace
|| num_not_at_initial_offset
)
5609 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5611 /* If the address changes because of register elimination, then
5612 it must be replaced. */
5614 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5616 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5618 if (BYTES_BIG_ENDIAN
)
5622 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5623 offset
+= MIN (size
, UNITS_PER_WORD
);
5624 size
= GET_MODE_SIZE (GET_MODE (x
));
5625 offset
-= MIN (size
, UNITS_PER_WORD
);
5627 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5628 PUT_MODE (tem
, GET_MODE (x
));
5629 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5630 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5632 /* If this is not a toplevel operand, find_reloads doesn't see
5633 this substitution. We have to emit a USE of the pseudo so
5634 that delete_output_reload can see it. */
5635 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5636 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5644 /* Substitute into the current INSN the registers into which we have reloaded
5645 the things that need reloading. The array `replacements'
5646 contains the locations of all pointers that must be changed
5647 and says what to replace them with.
5649 Return the rtx that X translates into; usually X, but modified. */
5656 for (i
= 0; i
< n_replacements
; i
++)
5658 register struct replacement
*r
= &replacements
[i
];
5659 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5662 /* Encapsulate RELOADREG so its machine mode matches what
5663 used to be there. Note that gen_lowpart_common will
5664 do the wrong thing if RELOADREG is multi-word. RELOADREG
5665 will always be a REG here. */
5666 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5667 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5669 /* If we are putting this into a SUBREG and RELOADREG is a
5670 SUBREG, we would be making nested SUBREGs, so we have to fix
5671 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5673 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5675 if (GET_MODE (*r
->subreg_loc
)
5676 == GET_MODE (SUBREG_REG (reloadreg
)))
5677 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5680 *r
->where
= SUBREG_REG (reloadreg
);
5681 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5685 *r
->where
= reloadreg
;
5687 /* If reload got no reg and isn't optional, something's wrong. */
5688 else if (! rld
[r
->what
].optional
)
5693 /* Make a copy of any replacements being done into X and move those copies
5694 to locations in Y, a copy of X. We only look at the highest level of
5698 copy_replacements (x
, y
)
5703 enum rtx_code code
= GET_CODE (x
);
5704 const char *fmt
= GET_RTX_FORMAT (code
);
5705 struct replacement
*r
;
5707 /* We can't support X being a SUBREG because we might then need to know its
5708 location if something inside it was replaced. */
5712 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5714 for (j
= 0; j
< n_replacements
; j
++)
5716 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5718 r
= &replacements
[n_replacements
++];
5719 r
->where
= replacements
[j
].where
;
5720 r
->subreg_loc
= &XEXP (y
, i
);
5721 r
->what
= replacements
[j
].what
;
5722 r
->mode
= replacements
[j
].mode
;
5724 else if (replacements
[j
].where
== &XEXP (x
, i
))
5726 r
= &replacements
[n_replacements
++];
5727 r
->where
= &XEXP (y
, i
);
5729 r
->what
= replacements
[j
].what
;
5730 r
->mode
= replacements
[j
].mode
;
5735 /* Change any replacements being done to *X to be done to *Y */
5738 move_replacements (x
, y
)
5744 for (i
= 0; i
< n_replacements
; i
++)
5745 if (replacements
[i
].subreg_loc
== x
)
5746 replacements
[i
].subreg_loc
= y
;
5747 else if (replacements
[i
].where
== x
)
5749 replacements
[i
].where
= y
;
5750 replacements
[i
].subreg_loc
= 0;
5754 /* If LOC was scheduled to be replaced by something, return the replacement.
5755 Otherwise, return *LOC. */
5758 find_replacement (loc
)
5761 struct replacement
*r
;
5763 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5765 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5767 if (reloadreg
&& r
->where
== loc
)
5769 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5770 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5774 else if (reloadreg
&& r
->subreg_loc
== loc
)
5776 /* RELOADREG must be either a REG or a SUBREG.
5778 ??? Is it actually still ever a SUBREG? If so, why? */
5780 if (GET_CODE (reloadreg
) == REG
)
5781 return gen_rtx_REG (GET_MODE (*loc
),
5782 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5783 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5786 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5787 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5791 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5792 what's inside and make a new rtl if so. */
5793 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5794 || GET_CODE (*loc
) == MULT
)
5796 rtx x
= find_replacement (&XEXP (*loc
, 0));
5797 rtx y
= find_replacement (&XEXP (*loc
, 1));
5799 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5800 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5806 /* Return nonzero if register in range [REGNO, ENDREGNO)
5807 appears either explicitly or implicitly in X
5808 other than being stored into (except for earlyclobber operands).
5810 References contained within the substructure at LOC do not count.
5811 LOC may be zero, meaning don't ignore anything.
5813 This is similar to refers_to_regno_p in rtlanal.c except that we
5814 look at equivalences for pseudos that didn't get hard registers. */
5817 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5818 unsigned int regno
, endregno
;
5831 code
= GET_CODE (x
);
5838 /* If this is a pseudo, a hard register must not have been allocated.
5839 X must therefore either be a constant or be in memory. */
5840 if (r
>= FIRST_PSEUDO_REGISTER
)
5842 if (reg_equiv_memory_loc
[r
])
5843 return refers_to_regno_for_reload_p (regno
, endregno
,
5844 reg_equiv_memory_loc
[r
],
5847 if (reg_equiv_constant
[r
])
5853 return (endregno
> r
5854 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5855 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5859 /* If this is a SUBREG of a hard reg, we can see exactly which
5860 registers are being modified. Otherwise, handle normally. */
5861 if (GET_CODE (SUBREG_REG (x
)) == REG
5862 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5864 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5865 unsigned int inner_endregno
5866 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5867 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5869 return endregno
> inner_regno
&& regno
< inner_endregno
;
5875 if (&SET_DEST (x
) != loc
5876 /* Note setting a SUBREG counts as referring to the REG it is in for
5877 a pseudo but not for hard registers since we can
5878 treat each word individually. */
5879 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5880 && loc
!= &SUBREG_REG (SET_DEST (x
))
5881 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5882 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5883 && refers_to_regno_for_reload_p (regno
, endregno
,
5884 SUBREG_REG (SET_DEST (x
)),
5886 /* If the output is an earlyclobber operand, this is
5888 || ((GET_CODE (SET_DEST (x
)) != REG
5889 || earlyclobber_operand_p (SET_DEST (x
)))
5890 && refers_to_regno_for_reload_p (regno
, endregno
,
5891 SET_DEST (x
), loc
))))
5894 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5903 /* X does not match, so try its subexpressions. */
5905 fmt
= GET_RTX_FORMAT (code
);
5906 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5908 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5916 if (refers_to_regno_for_reload_p (regno
, endregno
,
5920 else if (fmt
[i
] == 'E')
5923 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5924 if (loc
!= &XVECEXP (x
, i
, j
)
5925 && refers_to_regno_for_reload_p (regno
, endregno
,
5926 XVECEXP (x
, i
, j
), loc
))
5933 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5934 we check if any register number in X conflicts with the relevant register
5935 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5936 contains a MEM (we don't bother checking for memory addresses that can't
5937 conflict because we expect this to be a rare case.
5939 This function is similar to reg_overlap_mention_p in rtlanal.c except
5940 that we look at equivalences for pseudos that didn't get hard registers. */
5943 reg_overlap_mentioned_for_reload_p (x
, in
)
5946 int regno
, endregno
;
5948 /* Overly conservative. */
5949 if (GET_CODE (x
) == STRICT_LOW_PART
)
5952 /* If either argument is a constant, then modifying X can not affect IN. */
5953 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5955 else if (GET_CODE (x
) == SUBREG
)
5957 regno
= REGNO (SUBREG_REG (x
));
5958 if (regno
< FIRST_PSEUDO_REGISTER
)
5959 regno
+= SUBREG_WORD (x
);
5961 else if (GET_CODE (x
) == REG
)
5965 /* If this is a pseudo, it must not have been assigned a hard register.
5966 Therefore, it must either be in memory or be a constant. */
5968 if (regno
>= FIRST_PSEUDO_REGISTER
)
5970 if (reg_equiv_memory_loc
[regno
])
5971 return refers_to_mem_for_reload_p (in
);
5972 else if (reg_equiv_constant
[regno
])
5977 else if (GET_CODE (x
) == MEM
)
5978 return refers_to_mem_for_reload_p (in
);
5979 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5980 || GET_CODE (x
) == CC0
)
5981 return reg_mentioned_p (x
, in
);
5985 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5986 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5988 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5991 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5995 refers_to_mem_for_reload_p (x
)
6001 if (GET_CODE (x
) == MEM
)
6004 if (GET_CODE (x
) == REG
)
6005 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6006 && reg_equiv_memory_loc
[REGNO (x
)]);
6008 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6009 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6011 && (GET_CODE (XEXP (x
, i
)) == MEM
6012 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6018 /* Check the insns before INSN to see if there is a suitable register
6019 containing the same value as GOAL.
6020 If OTHER is -1, look for a register in class CLASS.
6021 Otherwise, just see if register number OTHER shares GOAL's value.
6023 Return an rtx for the register found, or zero if none is found.
6025 If RELOAD_REG_P is (short *)1,
6026 we reject any hard reg that appears in reload_reg_rtx
6027 because such a hard reg is also needed coming into this insn.
6029 If RELOAD_REG_P is any other nonzero value,
6030 it is a vector indexed by hard reg number
6031 and we reject any hard reg whose element in the vector is nonnegative
6032 as well as any that appears in reload_reg_rtx.
6034 If GOAL is zero, then GOALREG is a register number; we look
6035 for an equivalent for that register.
6037 MODE is the machine mode of the value we want an equivalence for.
6038 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6040 This function is used by jump.c as well as in the reload pass.
6042 If GOAL is the sum of the stack pointer and a constant, we treat it
6043 as if it were a constant except that sp is required to be unchanging. */
6046 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6049 enum reg_class
class;
6051 short *reload_reg_p
;
6053 enum machine_mode mode
;
6055 register rtx p
= insn
;
6056 rtx goaltry
, valtry
, value
, where
;
6058 register int regno
= -1;
6062 int goal_mem_addr_varies
= 0;
6063 int need_stable_sp
= 0;
6069 else if (GET_CODE (goal
) == REG
)
6070 regno
= REGNO (goal
);
6071 else if (GET_CODE (goal
) == MEM
)
6073 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6074 if (MEM_VOLATILE_P (goal
))
6076 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6078 /* An address with side effects must be reexecuted. */
6093 else if (CONSTANT_P (goal
))
6095 else if (GET_CODE (goal
) == PLUS
6096 && XEXP (goal
, 0) == stack_pointer_rtx
6097 && CONSTANT_P (XEXP (goal
, 1)))
6098 goal_const
= need_stable_sp
= 1;
6099 else if (GET_CODE (goal
) == PLUS
6100 && XEXP (goal
, 0) == frame_pointer_rtx
6101 && CONSTANT_P (XEXP (goal
, 1)))
6106 /* Scan insns back from INSN, looking for one that copies
6107 a value into or out of GOAL.
6108 Stop and give up if we reach a label. */
6113 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6116 if (GET_CODE (p
) == INSN
6117 /* If we don't want spill regs ... */
6118 && (! (reload_reg_p
!= 0
6119 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6120 /* ... then ignore insns introduced by reload; they aren't
6121 useful and can cause results in reload_as_needed to be
6122 different from what they were when calculating the need for
6123 spills. If we notice an input-reload insn here, we will
6124 reject it below, but it might hide a usable equivalent.
6125 That makes bad code. It may even abort: perhaps no reg was
6126 spilled for this insn because it was assumed we would find
6128 || INSN_UID (p
) < reload_first_uid
))
6131 pat
= single_set (p
);
6133 /* First check for something that sets some reg equal to GOAL. */
6136 && true_regnum (SET_SRC (pat
)) == regno
6137 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6140 && true_regnum (SET_DEST (pat
)) == regno
6141 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6143 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6144 /* When looking for stack pointer + const,
6145 make sure we don't use a stack adjust. */
6146 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6147 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6149 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6150 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6152 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6153 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6154 /* If we are looking for a constant,
6155 and something equivalent to that constant was copied
6156 into a reg, we can use that reg. */
6157 || (goal_const
&& REG_NOTES (p
) != 0
6158 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6159 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6161 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6162 || (GET_CODE (SET_DEST (pat
)) == REG
6163 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6164 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6166 && GET_CODE (goal
) == CONST_INT
6168 = operand_subword (XEXP (tem
, 0), 0, 0,
6170 && rtx_equal_p (goal
, goaltry
)
6172 = operand_subword (SET_DEST (pat
), 0, 0,
6174 && (valueno
= true_regnum (valtry
)) >= 0)))
6175 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6177 && GET_CODE (SET_DEST (pat
)) == REG
6178 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6179 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6181 && GET_CODE (goal
) == CONST_INT
6182 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6184 && rtx_equal_p (goal
, goaltry
)
6186 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6187 && (valueno
= true_regnum (valtry
)) >= 0)))
6191 if (valueno
!= other
)
6194 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6200 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6201 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6214 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6215 (or copying VALUE into GOAL, if GOAL is also a register).
6216 Now verify that VALUE is really valid. */
6218 /* VALUENO is the register number of VALUE; a hard register. */
6220 /* Don't try to re-use something that is killed in this insn. We want
6221 to be able to trust REG_UNUSED notes. */
6222 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6225 /* If we propose to get the value from the stack pointer or if GOAL is
6226 a MEM based on the stack pointer, we need a stable SP. */
6227 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6228 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6232 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6233 if (GET_MODE (value
) != mode
)
6236 /* Reject VALUE if it was loaded from GOAL
6237 and is also a register that appears in the address of GOAL. */
6239 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6240 && refers_to_regno_for_reload_p (valueno
,
6242 + HARD_REGNO_NREGS (valueno
, mode
)),
6246 /* Reject registers that overlap GOAL. */
6248 if (!goal_mem
&& !goal_const
6249 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6250 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6253 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6254 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6256 /* Reject VALUE if it is one of the regs reserved for reloads.
6257 Reload1 knows how to reuse them anyway, and it would get
6258 confused if we allocated one without its knowledge.
6259 (Now that insns introduced by reload are ignored above,
6260 this case shouldn't happen, but I'm not positive.) */
6262 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6265 for (i
= 0; i
< valuenregs
; ++i
)
6266 if (reload_reg_p
[valueno
+ i
] >= 0)
6270 /* Reject VALUE if it is a register being used for an input reload
6271 even if it is not one of those reserved. */
6273 if (reload_reg_p
!= 0)
6276 for (i
= 0; i
< n_reloads
; i
++)
6277 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6279 int regno1
= REGNO (rld
[i
].reg_rtx
);
6280 int nregs1
= HARD_REGNO_NREGS (regno1
,
6281 GET_MODE (rld
[i
].reg_rtx
));
6282 if (regno1
< valueno
+ valuenregs
6283 && regno1
+ nregs1
> valueno
)
6289 /* We must treat frame pointer as varying here,
6290 since it can vary--in a nonlocal goto as generated by expand_goto. */
6291 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6293 /* Now verify that the values of GOAL and VALUE remain unaltered
6294 until INSN is reached. */
6303 /* Don't trust the conversion past a function call
6304 if either of the two is in a call-clobbered register, or memory. */
6305 if (GET_CODE (p
) == CALL_INSN
)
6309 if (goal_mem
|| need_stable_sp
)
6312 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6313 for (i
= 0; i
< nregs
; ++i
)
6314 if (call_used_regs
[regno
+ i
])
6317 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6318 for (i
= 0; i
< valuenregs
; ++i
)
6319 if (call_used_regs
[valueno
+ i
])
6323 #ifdef NON_SAVING_SETJMP
6324 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6325 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6333 /* Watch out for unspec_volatile, and volatile asms. */
6334 if (volatile_insn_p (pat
))
6337 /* If this insn P stores in either GOAL or VALUE, return 0.
6338 If GOAL is a memory ref and this insn writes memory, return 0.
6339 If GOAL is a memory ref and its address is not constant,
6340 and this insn P changes a register used in GOAL, return 0. */
6342 if (GET_CODE (pat
) == COND_EXEC
)
6343 pat
= COND_EXEC_CODE (pat
);
6344 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6346 register rtx dest
= SET_DEST (pat
);
6347 while (GET_CODE (dest
) == SUBREG
6348 || GET_CODE (dest
) == ZERO_EXTRACT
6349 || GET_CODE (dest
) == SIGN_EXTRACT
6350 || GET_CODE (dest
) == STRICT_LOW_PART
)
6351 dest
= XEXP (dest
, 0);
6352 if (GET_CODE (dest
) == REG
)
6354 register int xregno
= REGNO (dest
);
6356 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6357 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6360 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6362 if (xregno
< valueno
+ valuenregs
6363 && xregno
+ xnregs
> valueno
)
6365 if (goal_mem_addr_varies
6366 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6368 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6371 else if (goal_mem
&& GET_CODE (dest
) == MEM
6372 && ! push_operand (dest
, GET_MODE (dest
)))
6374 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6375 && reg_equiv_memory_loc
[regno
] != 0)
6377 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6380 else if (GET_CODE (pat
) == PARALLEL
)
6383 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6385 register rtx v1
= XVECEXP (pat
, 0, i
);
6386 if (GET_CODE (v1
) == COND_EXEC
)
6387 v1
= COND_EXEC_CODE (v1
);
6388 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6390 register rtx dest
= SET_DEST (v1
);
6391 while (GET_CODE (dest
) == SUBREG
6392 || GET_CODE (dest
) == ZERO_EXTRACT
6393 || GET_CODE (dest
) == SIGN_EXTRACT
6394 || GET_CODE (dest
) == STRICT_LOW_PART
)
6395 dest
= XEXP (dest
, 0);
6396 if (GET_CODE (dest
) == REG
)
6398 register int xregno
= REGNO (dest
);
6400 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6401 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6404 if (xregno
< regno
+ nregs
6405 && xregno
+ xnregs
> regno
)
6407 if (xregno
< valueno
+ valuenregs
6408 && xregno
+ xnregs
> valueno
)
6410 if (goal_mem_addr_varies
6411 && reg_overlap_mentioned_for_reload_p (dest
,
6414 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6417 else if (goal_mem
&& GET_CODE (dest
) == MEM
6418 && ! push_operand (dest
, GET_MODE (dest
)))
6420 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6421 && reg_equiv_memory_loc
[regno
] != 0)
6423 else if (need_stable_sp
6424 && push_operand (dest
, GET_MODE (dest
)))
6430 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6434 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6435 link
= XEXP (link
, 1))
6437 pat
= XEXP (link
, 0);
6438 if (GET_CODE (pat
) == CLOBBER
)
6440 register rtx dest
= SET_DEST (pat
);
6442 if (GET_CODE (dest
) == REG
)
6444 register int xregno
= REGNO (dest
);
6446 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6448 if (xregno
< regno
+ nregs
6449 && xregno
+ xnregs
> regno
)
6451 else if (xregno
< valueno
+ valuenregs
6452 && xregno
+ xnregs
> valueno
)
6454 else if (goal_mem_addr_varies
6455 && reg_overlap_mentioned_for_reload_p (dest
,
6460 else if (goal_mem
&& GET_CODE (dest
) == MEM
6461 && ! push_operand (dest
, GET_MODE (dest
)))
6463 else if (need_stable_sp
6464 && push_operand (dest
, GET_MODE (dest
)))
6471 /* If this insn auto-increments or auto-decrements
6472 either regno or valueno, return 0 now.
6473 If GOAL is a memory ref and its address is not constant,
6474 and this insn P increments a register used in GOAL, return 0. */
6478 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6479 if (REG_NOTE_KIND (link
) == REG_INC
6480 && GET_CODE (XEXP (link
, 0)) == REG
)
6482 register int incno
= REGNO (XEXP (link
, 0));
6483 if (incno
< regno
+ nregs
&& incno
>= regno
)
6485 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6487 if (goal_mem_addr_varies
6488 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6498 /* Find a place where INCED appears in an increment or decrement operator
6499 within X, and return the amount INCED is incremented or decremented by.
6500 The value is always positive. */
6503 find_inc_amount (x
, inced
)
6506 register enum rtx_code code
= GET_CODE (x
);
6507 register const char *fmt
;
6512 register rtx addr
= XEXP (x
, 0);
6513 if ((GET_CODE (addr
) == PRE_DEC
6514 || GET_CODE (addr
) == POST_DEC
6515 || GET_CODE (addr
) == PRE_INC
6516 || GET_CODE (addr
) == POST_INC
)
6517 && XEXP (addr
, 0) == inced
)
6518 return GET_MODE_SIZE (GET_MODE (x
));
6519 else if ((GET_CODE (addr
) == PRE_MODIFY
6520 || GET_CODE (addr
) == POST_MODIFY
)
6521 && GET_CODE (XEXP (addr
, 1)) == PLUS
6522 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6523 && XEXP (addr
, 0) == inced
6524 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6526 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6527 return i
< 0 ? -i
: i
;
6531 fmt
= GET_RTX_FORMAT (code
);
6532 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6536 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6543 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6545 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6555 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6558 regno_clobbered_p (regno
, insn
, mode
)
6561 enum machine_mode mode
;
6563 int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6564 int endregno
= regno
+ nregs
;
6566 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6567 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6569 int test
= REGNO (XEXP (PATTERN (insn
), 0));
6571 return test
>= regno
&& test
< endregno
;
6574 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6576 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6580 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6581 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
)
6583 int test
= REGNO (XEXP (elt
, 0));
6585 if (test
>= regno
&& test
< endregno
)
6594 static const char *reload_when_needed_name
[] =
6597 "RELOAD_FOR_OUTPUT",
6599 "RELOAD_FOR_INPUT_ADDRESS",
6600 "RELOAD_FOR_INPADDR_ADDRESS",
6601 "RELOAD_FOR_OUTPUT_ADDRESS",
6602 "RELOAD_FOR_OUTADDR_ADDRESS",
6603 "RELOAD_FOR_OPERAND_ADDRESS",
6604 "RELOAD_FOR_OPADDR_ADDR",
6606 "RELOAD_FOR_OTHER_ADDRESS"
6609 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6611 /* These functions are used to print the variables set by 'find_reloads' */
6614 debug_reload_to_stream (f
)
6622 for (r
= 0; r
< n_reloads
; r
++)
6624 fprintf (f
, "Reload %d: ", r
);
6628 fprintf (f
, "reload_in (%s) = ",
6629 GET_MODE_NAME (rld
[r
].inmode
));
6630 print_inline_rtx (f
, rld
[r
].in
, 24);
6631 fprintf (f
, "\n\t");
6634 if (rld
[r
].out
!= 0)
6636 fprintf (f
, "reload_out (%s) = ",
6637 GET_MODE_NAME (rld
[r
].outmode
));
6638 print_inline_rtx (f
, rld
[r
].out
, 24);
6639 fprintf (f
, "\n\t");
6642 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6644 fprintf (f
, "%s (opnum = %d)",
6645 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6648 if (rld
[r
].optional
)
6649 fprintf (f
, ", optional");
6651 if (rld
[r
].nongroup
)
6652 fprintf (f
, ", nongroup");
6654 if (rld
[r
].inc
!= 0)
6655 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6657 if (rld
[r
].nocombine
)
6658 fprintf (f
, ", can't combine");
6660 if (rld
[r
].secondary_p
)
6661 fprintf (f
, ", secondary_reload_p");
6663 if (rld
[r
].in_reg
!= 0)
6665 fprintf (f
, "\n\treload_in_reg: ");
6666 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6669 if (rld
[r
].out_reg
!= 0)
6671 fprintf (f
, "\n\treload_out_reg: ");
6672 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6675 if (rld
[r
].reg_rtx
!= 0)
6677 fprintf (f
, "\n\treload_reg_rtx: ");
6678 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6682 if (rld
[r
].secondary_in_reload
!= -1)
6684 fprintf (f
, "%ssecondary_in_reload = %d",
6685 prefix
, rld
[r
].secondary_in_reload
);
6689 if (rld
[r
].secondary_out_reload
!= -1)
6690 fprintf (f
, "%ssecondary_out_reload = %d\n",
6691 prefix
, rld
[r
].secondary_out_reload
);
6694 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6696 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
6697 insn_data
[rld
[r
].secondary_in_icode
].name
);
6701 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6702 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
6703 insn_data
[rld
[r
].secondary_out_icode
].name
);
6712 debug_reload_to_stream (stderr
);