1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* This file contains subroutines used only from the file reload1.c.
22 It knows how to scan one insn for operands and values
23 that need to be copied into registers to make valid code.
24 It also finds other operands and values which are valid
25 but for which equivalent values in registers exist and
26 ought to be used instead.
28 Before processing the first insn of the function, call `init_reload'.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "insn-config.h"
92 #include "insn-codes.h"
96 #include "hard-reg-set.h"
100 #ifndef REGISTER_MOVE_COST
101 #define REGISTER_MOVE_COST(x, y) 2
104 /* The variables set up by `find_reloads' are:
106 n_reloads number of distinct reloads needed; max reload # + 1
107 tables indexed by reload number
108 reload_in rtx for value to reload from
109 reload_out rtx for where to store reload-reg afterward if nec
110 (often the same as reload_in)
111 reload_reg_class enum reg_class, saying what regs to reload into
112 reload_inmode enum machine_mode; mode this operand should have
113 when reloaded, on input.
114 reload_outmode enum machine_mode; mode this operand should have
115 when reloaded, on output.
116 reload_optional char, nonzero for an optional reload.
117 Optional reloads are ignored unless the
118 value is already sitting in a register.
119 reload_inc int, positive amount to increment or decrement by if
120 reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC.
121 Ignored otherwise (don't assume it is zero).
122 reload_in_reg rtx. A reg for which reload_in is the equivalent.
123 If reload_in is a symbol_ref which came from
124 reg_equiv_constant, then this is the pseudo
125 which has that symbol_ref as equivalent.
126 reload_reg_rtx rtx. This is the register to reload into.
127 If it is zero when `find_reloads' returns,
128 you must find a suitable register in the class
129 specified by reload_reg_class, and store here
130 an rtx for that register with mode from
131 reload_inmode or reload_outmode.
132 reload_nocombine char, nonzero if this reload shouldn't be
133 combined with another reload.
134 reload_opnum int, operand number being reloaded. This is
135 used to group related reloads and need not always
136 be equal to the actual operand number in the insn,
137 though it current will be; for in-out operands, it
138 is one of the two operand numbers.
139 reload_when_needed enum, classifies reload as needed either for
140 addressing an input reload, addressing an output,
141 for addressing a non-reloaded mem ref,
142 or for unspecified purposes (i.e., more than one
144 reload_secondary_reload int, gives the reload number of a secondary
145 reload, when needed; otherwise -1
146 reload_secondary_p int, 1 if this is a secondary register for one
148 reload_secondary_icode enum insn_code, if a secondary reload is required,
149 gives the INSN_CODE that uses the secondary
150 reload as a scratch register, or CODE_FOR_nothing
151 if the secondary reload register is to be an
152 intermediate register. */
155 rtx reload_in
[MAX_RELOADS
];
156 rtx reload_out
[MAX_RELOADS
];
157 enum reg_class reload_reg_class
[MAX_RELOADS
];
158 enum machine_mode reload_inmode
[MAX_RELOADS
];
159 enum machine_mode reload_outmode
[MAX_RELOADS
];
160 rtx reload_reg_rtx
[MAX_RELOADS
];
161 char reload_optional
[MAX_RELOADS
];
162 int reload_inc
[MAX_RELOADS
];
163 rtx reload_in_reg
[MAX_RELOADS
];
164 char reload_nocombine
[MAX_RELOADS
];
165 int reload_opnum
[MAX_RELOADS
];
166 enum reload_type reload_when_needed
[MAX_RELOADS
];
167 int reload_secondary_reload
[MAX_RELOADS
];
168 int reload_secondary_p
[MAX_RELOADS
];
169 enum insn_code reload_secondary_icode
[MAX_RELOADS
];
171 /* All the "earlyclobber" operands of the current insn
172 are recorded here. */
174 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
176 int reload_n_operands
;
178 /* Replacing reloads.
180 If `replace_reloads' is nonzero, then as each reload is recorded
181 an entry is made for it in the table `replacements'.
182 Then later `subst_reloads' can look through that table and
183 perform all the replacements needed. */
185 /* Nonzero means record the places to replace. */
186 static int replace_reloads
;
188 /* Each replacement is recorded with a structure like this. */
191 rtx
*where
; /* Location to store in */
192 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
193 a SUBREG; 0 otherwise. */
194 int what
; /* which reload this is for */
195 enum machine_mode mode
; /* mode it must have */
198 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
200 /* Number of replacements currently recorded. */
201 static int n_replacements
;
203 /* Used to track what is modified by an operand. */
206 int reg_flag
; /* Nonzero if referencing a register. */
207 int safe
; /* Nonzero if this can't conflict with anything. */
208 rtx base
; /* Base adddress for MEM. */
209 HOST_WIDE_INT start
; /* Starting offset or register number. */
210 HOST_WIDE_INT end
; /* Endinf offset or register number. */
213 /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable;
214 (see reg_equiv_address). */
215 static rtx memlocs
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
216 static int n_memlocs
;
218 #ifdef SECONDARY_MEMORY_NEEDED
220 /* Save MEMs needed to copy from one class of registers to another. One MEM
221 is used per mode, but normally only one or two modes are ever used.
223 We keep two versions, before and after register elimination. The one
224 after register elimination is record separately for each operand. This
225 is done in case the address is not valid to be sure that we separately
228 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
229 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
232 /* The instruction we are doing reloads for;
233 so we can test whether a register dies in it. */
234 static rtx this_insn
;
236 /* Nonzero if this instruction is a user-specified asm with operands. */
237 static int this_insn_is_asm
;
239 /* If hard_regs_live_known is nonzero,
240 we can tell which hard regs are currently live,
241 at least enough to succeed in choosing dummy reloads. */
242 static int hard_regs_live_known
;
244 /* Indexed by hard reg number,
245 element is nonegative if hard reg has been spilled.
246 This vector is passed to `find_reloads' as an argument
247 and is not changed here. */
248 static short *static_reload_reg_p
;
250 /* Set to 1 in subst_reg_equivs if it changes anything. */
251 static int subst_reg_equivs_changed
;
253 /* On return from push_reload, holds the reload-number for the OUT
254 operand, which can be different for that from the input operand. */
255 static int output_reloadnum
;
257 static enum reg_class find_secondary_reload
PROTO((rtx
, enum reg_class
,
258 enum machine_mode
, int,
263 enum machine_mode
*));
264 static int push_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
265 enum machine_mode
, enum machine_mode
,
266 int, int, int, enum reload_type
));
267 static void push_replacement
PROTO((rtx
*, int, enum machine_mode
));
268 static void combine_reloads
PROTO((void));
269 static rtx find_dummy_reload
PROTO((rtx
, rtx
, rtx
*, rtx
*,
270 enum machine_mode
, enum machine_mode
,
271 enum reg_class
, int));
272 static int earlyclobber_operand_p
PROTO((rtx
));
273 static int hard_reg_set_here_p
PROTO((int, int, rtx
));
274 static struct decomposition decompose
PROTO((rtx
));
275 static int immune_p
PROTO((rtx
, rtx
, struct decomposition
));
276 static int alternative_allows_memconst
PROTO((char *, int));
277 static rtx find_reloads_toplev
PROTO((rtx
, int, enum reload_type
, int, int));
278 static rtx make_memloc
PROTO((rtx
, int));
279 static int find_reloads_address
PROTO((enum machine_mode
, rtx
*, rtx
, rtx
*,
280 int, enum reload_type
, int));
281 static rtx subst_reg_equivs
PROTO((rtx
));
282 static rtx subst_indexed_address
PROTO((rtx
));
283 static int find_reloads_address_1
PROTO((rtx
, int, rtx
*, int,
284 enum reload_type
,int));
285 static void find_reloads_address_part
PROTO((rtx
, rtx
*, enum reg_class
,
286 enum machine_mode
, int,
287 enum reload_type
, int));
288 static int find_inc_amount
PROTO((rtx
, rtx
));
290 #ifdef HAVE_SECONDARY_RELOADS
292 /* Determine if any secondary reloads are needed for loading (if IN_P is
293 non-zero) or storing (if IN_P is zero) X to or from a reload register of
294 register class RELOAD_CLASS in mode RELOAD_MODE.
296 Return the register class of a secondary reload register, or NO_REGS if
297 none. *PMODE is set to the mode that the register is required in.
298 If the reload register is needed as a scratch register instead of an
299 intermediate register, *PICODE is set to the insn_code of the insn to be
300 used to load or store the primary reload register; otherwise *PICODE
301 is set to CODE_FOR_nothing.
303 In some cases (such as storing MQ into an external memory location on
304 the RT), both an intermediate register and a scratch register. In that
305 case, *PICODE is set to CODE_FOR_nothing, the class for the intermediate
306 register is returned, and the *PTERTIARY_... variables are set to describe
307 the scratch register. */
309 static enum reg_class
310 find_secondary_reload (x
, reload_class
, reload_mode
, in_p
, picode
, pmode
,
311 ptertiary_class
, ptertiary_icode
, ptertiary_mode
)
313 enum reg_class reload_class
;
314 enum machine_mode reload_mode
;
316 enum insn_code
*picode
;
317 enum machine_mode
*pmode
;
318 enum reg_class
*ptertiary_class
;
319 enum insn_code
*ptertiary_icode
;
320 enum machine_mode
*ptertiary_mode
;
322 enum reg_class
class = NO_REGS
;
323 enum machine_mode mode
= reload_mode
;
324 enum insn_code icode
= CODE_FOR_nothing
;
325 enum reg_class t_class
= NO_REGS
;
326 enum machine_mode t_mode
= VOIDmode
;
327 enum insn_code t_icode
= CODE_FOR_nothing
;
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem
[REGNO (x
)] != 0)
337 x
= reg_equiv_mem
[REGNO (x
)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
349 /* If we don't need any secondary registers, go away; the rest of the
350 values won't be used. */
351 if (class == NO_REGS
)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
358 : reload_out_optab
[(int) reload_mode
]);
360 if (icode
!= CODE_FOR_nothing
361 && insn_operand_predicate
[(int) icode
][in_p
]
362 && (! (insn_operand_predicate
[(int) icode
][in_p
]) (x
, reload_mode
)))
363 icode
= CODE_FOR_nothing
;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode
!= CODE_FOR_nothing
)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
378 char insn_letter
= insn_operand_constraint
[(int) icode
][!in_p
][in_p
];
379 enum reg_class insn_class
380 = (insn_letter
== 'r' ? GENERAL_REGS
381 : REG_CLASS_FROM_LETTER (insn_letter
));
383 if (insn_class
== NO_REGS
384 || (in_p
&& insn_operand_constraint
[(int) icode
][!in_p
][0] != '=')
385 /* The scratch register's constraint must start with "=&". */
386 || insn_operand_constraint
[(int) icode
][2][0] != '='
387 || insn_operand_constraint
[(int) icode
][2][1] != '&')
390 if (reg_class_subset_p (reload_class
, insn_class
))
391 mode
= insn_operand_mode
[(int) icode
][2];
394 char t_letter
= insn_operand_constraint
[(int) icode
][2][2];
396 t_mode
= insn_operand_mode
[(int) icode
][2];
397 t_class
= (t_letter
== 'r' ? GENERAL_REGS
398 : REG_CLASS_FROM_LETTER (t_letter
));
400 icode
= CODE_FOR_nothing
;
406 *ptertiary_class
= t_class
;
407 *ptertiary_mode
= t_mode
;
408 *ptertiary_icode
= t_icode
;
412 #endif /* HAVE_SECONDARY_RELOADS */
414 #ifdef SECONDARY_MEMORY_NEEDED
416 /* Return a memory location that will be used to copy X in mode MODE.
417 If we haven't already made a location for this mode in this insn,
418 call find_reloads_address on the location being returned. */
421 get_secondary_mem (x
, mode
, opnum
, type
)
423 enum machine_mode mode
;
425 enum reload_type type
;
430 /* If MODE is narrower than a word, widen it. This is required because
431 most machines that require these memory locations do not support
432 short load and stores from all registers (e.g., FP registers). We could
433 possibly conditionalize this, but we lose nothing by doing the wider
436 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
)
437 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
439 /* If we already have made a MEM for this operand in MODE, return it. */
440 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
441 return secondary_memlocs_elim
[(int) mode
][opnum
];
443 /* If this is the first time we've tried to get a MEM for this mode,
444 allocate a new one. `something_changed' in reload will get set
445 by noticing that the frame size has changed. */
447 if (secondary_memlocs
[(int) mode
] == 0)
449 #ifdef SECONDARY_MEMORY_NEEDED_RTX
450 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
452 secondary_memlocs
[(int) mode
]
453 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
457 /* Get a version of the address doing any eliminations needed. If that
458 didn't give us a new MEM, make a new one if it isn't valid. */
460 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
461 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
463 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
464 loc
= copy_rtx (loc
);
466 /* The only time the call below will do anything is if the stack
467 offset is too large. In that case IND_LEVELS doesn't matter, so we
468 can just pass a zero. Adjust the type to be the address of the
469 corresponding object. If the address was valid, save the eliminated
470 address. If it wasn't valid, we need to make a reload each time, so
475 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
476 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
479 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
483 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
487 /* Clear any secondary memory locations we've made. */
490 clear_secondary_mem ()
492 bzero (secondary_memlocs
, sizeof secondary_memlocs
);
494 #endif /* SECONDARY_MEMORY_NEEDED */
496 /* Record one reload that needs to be performed.
497 IN is an rtx saying where the data are to be found before this instruction.
498 OUT says where they must be stored after the instruction.
499 (IN is zero for data not read, and OUT is zero for data not written.)
500 INLOC and OUTLOC point to the places in the instructions where
501 IN and OUT were found.
502 If IN and OUT are both non-zero, it means the same register must be used
503 to reload both IN and OUT.
505 CLASS is a register class required for the reloaded data.
506 INMODE is the machine mode that the instruction requires
507 for the reg that replaces IN and OUTMODE is likewise for OUT.
509 If IN is zero, then OUT's location and mode should be passed as
512 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
514 OPTIONAL nonzero means this reload does not need to be performed:
515 it can be discarded if that is more convenient.
517 OPNUM and TYPE say what the purpose of this reload is.
519 The return value is the reload-number for this reload.
521 If both IN and OUT are nonzero, in some rare cases we might
522 want to make two separate reloads. (Actually we never do this now.)
523 Therefore, the reload-number for OUT is stored in
524 output_reloadnum when we return; the return value applies to IN.
525 Usually (presently always), when IN and OUT are nonzero,
526 the two reload-numbers are equal, but the caller should be careful to
530 push_reload (in
, out
, inloc
, outloc
, class,
531 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
532 register rtx in
, out
;
534 enum reg_class
class;
535 enum machine_mode inmode
, outmode
;
539 enum reload_type type
;
543 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
544 int secondary_reload
= -1;
545 enum insn_code secondary_icode
= CODE_FOR_nothing
;
547 /* Compare two RTX's. */
548 #define MATCHES(x, y) \
549 (x == y || (x != 0 && (GET_CODE (x) == REG \
550 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
551 : rtx_equal_p (x, y) && ! side_effects_p (x))))
553 /* Indicates if two reloads purposes are for similar enough things that we
554 can merge their reloads. */
555 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
556 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
557 || ((when1) == (when2) && (op1) == (op2)) \
558 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
559 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
560 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
561 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
562 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
564 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
565 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
566 ((when1) != (when2) \
567 || ! ((op1) == (op2) \
568 || (when1) == RELOAD_FOR_INPUT \
569 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
570 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
572 /* INMODE and/or OUTMODE could be VOIDmode if no mode
573 has been specified for the operand. In that case,
574 use the operand's mode as the mode to reload. */
575 if (inmode
== VOIDmode
&& in
!= 0)
576 inmode
= GET_MODE (in
);
577 if (outmode
== VOIDmode
&& out
!= 0)
578 outmode
= GET_MODE (out
);
580 /* If IN is a pseudo register everywhere-equivalent to a constant, and
581 it is not in a hard register, reload straight from the constant,
582 since we want to get rid of such pseudo registers.
583 Often this is done earlier, but not always in find_reloads_address. */
584 if (in
!= 0 && GET_CODE (in
) == REG
)
586 register int regno
= REGNO (in
);
588 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
589 && reg_equiv_constant
[regno
] != 0)
590 in
= reg_equiv_constant
[regno
];
593 /* Likewise for OUT. Of course, OUT will never be equivalent to
594 an actual constant, but it might be equivalent to a memory location
595 (in the case of a parameter). */
596 if (out
!= 0 && GET_CODE (out
) == REG
)
598 register int regno
= REGNO (out
);
600 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
601 && reg_equiv_constant
[regno
] != 0)
602 out
= reg_equiv_constant
[regno
];
605 /* If we have a read-write operand with an address side-effect,
606 change either IN or OUT so the side-effect happens only once. */
607 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
609 if (GET_CODE (XEXP (in
, 0)) == POST_INC
610 || GET_CODE (XEXP (in
, 0)) == POST_DEC
)
611 in
= gen_rtx (MEM
, GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
612 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
613 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
)
614 out
= gen_rtx (MEM
, GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
617 /* If we are reloading a (SUBREG constant ...), really reload just the
618 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
619 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
620 a pseudo and hence will become a MEM) with M1 wider than M2 and the
621 register is a pseudo, also reload the inside expression.
622 For machines that extend byte loads, do this for any SUBREG of a pseudo
623 where both M1 and M2 are a word or smaller unless they are the same
625 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
626 either M1 is not valid for R or M2 is wider than a word but we only
627 need one word to store an M2-sized quantity in R.
628 (However, if OUT is nonzero, we need to reload the reg *and*
629 the subreg, so do nothing here, and let following statement handle it.)
631 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
632 we can't handle it here because CONST_INT does not indicate a mode.
634 Similarly, we must reload the inside expression if we have a
635 STRICT_LOW_PART (presumably, in == out in the cas).
637 Also reload the inner expression if it does not require a secondary
638 reload but the SUBREG does. */
640 if (in
!= 0 && GET_CODE (in
) == SUBREG
641 && (CONSTANT_P (SUBREG_REG (in
))
642 || GET_CODE (SUBREG_REG (in
)) == PLUS
644 || (((GET_CODE (SUBREG_REG (in
)) == REG
645 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
646 || GET_CODE (SUBREG_REG (in
)) == MEM
)
647 && ((GET_MODE_SIZE (inmode
)
648 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
649 #ifdef LOAD_EXTEND_OP
650 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
651 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
653 && (GET_MODE_SIZE (inmode
)
654 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))))
657 || (GET_CODE (SUBREG_REG (in
)) == REG
658 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
659 /* The case where out is nonzero
660 is handled differently in the following statement. */
661 && (out
== 0 || SUBREG_WORD (in
) == 0)
662 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
663 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
665 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
667 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
668 GET_MODE (SUBREG_REG (in
)))))
669 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
672 #ifdef SECONDARY_INPUT_RELOAD_CLASS
673 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
674 && (SECONDARY_INPUT_RELOAD_CLASS (class,
675 GET_MODE (SUBREG_REG (in
)),
681 in_subreg_loc
= inloc
;
682 inloc
= &SUBREG_REG (in
);
684 #ifndef LOAD_EXTEND_OP
685 if (GET_CODE (in
) == MEM
)
686 /* This is supposed to happen only for paradoxical subregs made by
687 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
688 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
691 inmode
= GET_MODE (in
);
694 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
695 either M1 is not valid for R or M2 is wider than a word but we only
696 need one word to store an M2-sized quantity in R.
698 However, we must reload the inner reg *as well as* the subreg in
701 if (in
!= 0 && GET_CODE (in
) == SUBREG
702 && GET_CODE (SUBREG_REG (in
)) == REG
703 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
704 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
)), inmode
)
705 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
706 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
708 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
710 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
711 GET_MODE (SUBREG_REG (in
)))))))
713 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
714 GENERAL_REGS
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
718 /* Similarly for paradoxical and problematical SUBREGs on the output.
719 Note that there is no reason we need worry about the previous value
720 of SUBREG_REG (out); even if wider than out,
721 storing in a subreg is entitled to clobber it all
722 (except in the case of STRICT_LOW_PART,
723 and in that case the constraint should label it input-output.) */
724 if (out
!= 0 && GET_CODE (out
) == SUBREG
725 && (CONSTANT_P (SUBREG_REG (out
))
727 || (((GET_CODE (SUBREG_REG (out
)) == REG
728 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
729 || GET_CODE (SUBREG_REG (out
)) == MEM
)
730 && ((GET_MODE_SIZE (outmode
)
731 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
732 #ifdef LOAD_EXTEND_OP
733 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
734 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
736 && (GET_MODE_SIZE (outmode
)
737 != GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))))
740 || (GET_CODE (SUBREG_REG (out
)) == REG
741 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
742 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
743 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
745 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
747 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
748 GET_MODE (SUBREG_REG (out
)))))
749 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
750 + SUBREG_WORD (out
)),
752 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
753 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
754 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
755 GET_MODE (SUBREG_REG (out
)),
761 out_subreg_loc
= outloc
;
762 outloc
= &SUBREG_REG (out
);
764 #ifndef LOAD_EXTEND_OP
765 if (GET_CODE (out
) == MEM
766 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
769 outmode
= GET_MODE (out
);
772 /* If IN appears in OUT, we can't share any input-only reload for IN. */
773 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
774 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
775 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
778 /* If IN is a SUBREG of a hard register, make a new REG. This
779 simplifies some of the cases below. */
781 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
782 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
783 in
= gen_rtx (REG
, GET_MODE (in
),
784 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
786 /* Similarly for OUT. */
787 if (out
!= 0 && GET_CODE (out
) == SUBREG
788 && GET_CODE (SUBREG_REG (out
)) == REG
789 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
790 out
= gen_rtx (REG
, GET_MODE (out
),
791 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
793 /* Narrow down the class of register wanted if that is
794 desirable on this machine for efficiency. */
796 class = PREFERRED_RELOAD_CLASS (in
, class);
798 /* Output reloads may need analogous treatment, different in detail. */
799 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
801 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
804 /* Make sure we use a class that can handle the actual pseudo
805 inside any subreg. For example, on the 386, QImode regs
806 can appear within SImode subregs. Although GENERAL_REGS
807 can handle SImode, QImode needs a smaller class. */
808 #ifdef LIMIT_RELOAD_CLASS
810 class = LIMIT_RELOAD_CLASS (inmode
, class);
811 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
812 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
815 class = LIMIT_RELOAD_CLASS (outmode
, class);
816 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
817 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
820 /* Verify that this class is at least possible for the mode that
822 if (this_insn_is_asm
)
824 enum machine_mode mode
;
825 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
829 if (mode
== VOIDmode
)
831 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
838 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
839 if (HARD_REGNO_MODE_OK (i
, mode
)
840 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
842 int nregs
= HARD_REGNO_NREGS (i
, mode
);
845 for (j
= 1; j
< nregs
; j
++)
846 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
851 if (i
== FIRST_PSEUDO_REGISTER
)
853 error_for_asm (this_insn
, "impossible register constraint in `asm'");
858 if (class == NO_REGS
)
861 /* We can use an existing reload if the class is right
862 and at least one of IN and OUT is a match
863 and the other is at worst neutral.
864 (A zero compared against anything is neutral.)
866 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
867 for the same thing since that can cause us to need more reload registers
868 than we otherwise would. */
870 for (i
= 0; i
< n_reloads
; i
++)
871 if ((reg_class_subset_p (class, reload_reg_class
[i
])
872 || reg_class_subset_p (reload_reg_class
[i
], class))
873 /* If the existing reload has a register, it must fit our class. */
874 && (reload_reg_rtx
[i
] == 0
875 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
876 true_regnum (reload_reg_rtx
[i
])))
877 && ((in
!= 0 && MATCHES (reload_in
[i
], in
) && ! dont_share
878 && (out
== 0 || reload_out
[i
] == 0 || MATCHES (reload_out
[i
], out
)))
880 (out
!= 0 && MATCHES (reload_out
[i
], out
)
881 && (in
== 0 || reload_in
[i
] == 0 || MATCHES (reload_in
[i
], in
))))
882 && (reg_class_size
[(int) class] == 1
883 #ifdef SMALL_REGISTER_CLASSES
887 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
888 opnum
, reload_opnum
[i
]))
891 /* Reloading a plain reg for input can match a reload to postincrement
892 that reg, since the postincrement's value is the right value.
893 Likewise, it can match a preincrement reload, since we regard
894 the preincrementation as happening before any ref in this insn
897 for (i
= 0; i
< n_reloads
; i
++)
898 if ((reg_class_subset_p (class, reload_reg_class
[i
])
899 || reg_class_subset_p (reload_reg_class
[i
], class))
900 /* If the existing reload has a register, it must fit our class. */
901 && (reload_reg_rtx
[i
] == 0
902 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
903 true_regnum (reload_reg_rtx
[i
])))
904 && out
== 0 && reload_out
[i
] == 0 && reload_in
[i
] != 0
905 && ((GET_CODE (in
) == REG
906 && (GET_CODE (reload_in
[i
]) == POST_INC
907 || GET_CODE (reload_in
[i
]) == POST_DEC
908 || GET_CODE (reload_in
[i
]) == PRE_INC
909 || GET_CODE (reload_in
[i
]) == PRE_DEC
)
910 && MATCHES (XEXP (reload_in
[i
], 0), in
))
912 (GET_CODE (reload_in
[i
]) == REG
913 && (GET_CODE (in
) == POST_INC
914 || GET_CODE (in
) == POST_DEC
915 || GET_CODE (in
) == PRE_INC
916 || GET_CODE (in
) == PRE_DEC
)
917 && MATCHES (XEXP (in
, 0), reload_in
[i
])))
918 && (reg_class_size
[(int) class] == 1
919 #ifdef SMALL_REGISTER_CLASSES
923 && MERGABLE_RELOADS (type
, reload_when_needed
[i
],
924 opnum
, reload_opnum
[i
]))
926 /* Make sure reload_in ultimately has the increment,
927 not the plain register. */
928 if (GET_CODE (in
) == REG
)
935 #ifdef HAVE_SECONDARY_RELOADS
936 enum reg_class secondary_class
= NO_REGS
;
937 enum reg_class secondary_out_class
= NO_REGS
;
938 enum machine_mode secondary_mode
= inmode
;
939 enum machine_mode secondary_out_mode
= outmode
;
940 enum insn_code secondary_icode
;
941 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
942 enum reg_class tertiary_class
= NO_REGS
;
943 enum reg_class tertiary_out_class
= NO_REGS
;
944 enum machine_mode tertiary_mode
;
945 enum machine_mode tertiary_out_mode
;
946 enum insn_code tertiary_icode
;
947 enum insn_code tertiary_out_icode
= CODE_FOR_nothing
;
948 int tertiary_reload
= -1;
950 /* See if we need a secondary reload register to move between
951 CLASS and IN or CLASS and OUT. Get the modes and icodes to
952 use for each of them if so. */
954 #ifdef SECONDARY_INPUT_RELOAD_CLASS
957 = find_secondary_reload (in
, class, inmode
, 1, &secondary_icode
,
958 &secondary_mode
, &tertiary_class
,
959 &tertiary_icode
, &tertiary_mode
);
962 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
963 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
965 = find_secondary_reload (out
, class, outmode
, 0,
966 &secondary_out_icode
, &secondary_out_mode
,
967 &tertiary_out_class
, &tertiary_out_icode
,
971 /* We can only record one secondary and one tertiary reload. If both
972 IN and OUT need secondary reloads, we can only make an in-out
973 reload if neither need an insn and if the classes are compatible.
974 If they aren't, all we can do is abort since making two separate
975 reloads is invalid. */
977 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
978 && reg_class_subset_p (secondary_out_class
, secondary_class
))
979 secondary_class
= secondary_out_class
;
981 if (secondary_class
!= NO_REGS
&& secondary_out_class
!= NO_REGS
982 && (! reg_class_subset_p (secondary_class
, secondary_out_class
)
983 || secondary_icode
!= CODE_FOR_nothing
984 || secondary_out_icode
!= CODE_FOR_nothing
))
987 /* If we need a secondary reload for OUT but not IN, copy the
989 if (secondary_class
== NO_REGS
&& secondary_out_class
!= NO_REGS
)
991 secondary_class
= secondary_out_class
;
992 secondary_icode
= secondary_out_icode
;
993 tertiary_class
= tertiary_out_class
;
994 tertiary_icode
= tertiary_out_icode
;
995 tertiary_mode
= tertiary_out_mode
;
998 if (secondary_class
!= NO_REGS
)
1000 /* Secondary reloads don't conflict as badly as the primary object
1001 being reload. Specifically, we can always treat them as
1002 being for an input or output address and hence allowed to be
1003 reused in the same manner such address components could be
1004 reused. This is used as the reload_type for our secondary
1007 enum reload_type secondary_type
1008 = (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
1009 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
1012 /* This case isn't valid, so fail. Reload is allowed to use the
1013 same register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT
1014 reloads, but in the case of a secondary register, we actually
1015 need two different registers for correct code. We fail here
1016 to prevent the possibility of silently generating incorrect code
1019 The convention is that secondary input reloads are valid only if
1020 the secondary_class is different from class. If you have such
1021 a case, you can not use secondary reloads, you must work around
1022 the problem some other way.
1024 Allow this when secondary_mode is not inmode and assume that
1025 the generated code handles this case (it does on the Alpha, which
1026 is the only place this currently happens). */
1028 if (type
== RELOAD_FOR_INPUT
&& secondary_class
== class
1029 && secondary_mode
== inmode
)
1032 /* If we need a tertiary reload, see if we have one we can reuse
1033 or else make one. */
1035 if (tertiary_class
!= NO_REGS
)
1037 for (tertiary_reload
= 0; tertiary_reload
< n_reloads
;
1039 if (reload_secondary_p
[tertiary_reload
]
1040 && (reg_class_subset_p (tertiary_class
,
1041 reload_reg_class
[tertiary_reload
])
1042 || reg_class_subset_p (reload_reg_class
[tertiary_reload
],
1044 && ((reload_inmode
[tertiary_reload
] == tertiary_mode
)
1045 || reload_inmode
[tertiary_reload
] == VOIDmode
)
1046 && ((reload_outmode
[tertiary_reload
] == tertiary_mode
)
1047 || reload_outmode
[tertiary_reload
] == VOIDmode
)
1048 && (reload_secondary_icode
[tertiary_reload
]
1049 == CODE_FOR_nothing
)
1050 && (reg_class_size
[(int) tertiary_class
] == 1
1051 #ifdef SMALL_REGISTER_CLASSES
1055 && MERGABLE_RELOADS (secondary_type
,
1056 reload_when_needed
[tertiary_reload
],
1057 opnum
, reload_opnum
[tertiary_reload
]))
1059 if (tertiary_mode
!= VOIDmode
)
1060 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1061 if (tertiary_out_mode
!= VOIDmode
)
1062 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1063 if (reg_class_subset_p (tertiary_class
,
1064 reload_reg_class
[tertiary_reload
]))
1065 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1066 if (MERGE_TO_OTHER (secondary_type
,
1067 reload_when_needed
[tertiary_reload
],
1069 reload_opnum
[tertiary_reload
]))
1070 reload_when_needed
[tertiary_reload
] = RELOAD_OTHER
;
1071 reload_opnum
[tertiary_reload
]
1072 = MIN (reload_opnum
[tertiary_reload
], opnum
);
1073 reload_optional
[tertiary_reload
] &= optional
;
1074 reload_secondary_p
[tertiary_reload
] = 1;
1077 if (tertiary_reload
== n_reloads
)
1079 /* We need to make a new tertiary reload for this register
1081 reload_in
[tertiary_reload
] = reload_out
[tertiary_reload
] = 0;
1082 reload_reg_class
[tertiary_reload
] = tertiary_class
;
1083 reload_inmode
[tertiary_reload
] = tertiary_mode
;
1084 reload_outmode
[tertiary_reload
] = tertiary_mode
;
1085 reload_reg_rtx
[tertiary_reload
] = 0;
1086 reload_optional
[tertiary_reload
] = optional
;
1087 reload_inc
[tertiary_reload
] = 0;
1088 /* Maybe we could combine these, but it seems too tricky. */
1089 reload_nocombine
[tertiary_reload
] = 1;
1090 reload_in_reg
[tertiary_reload
] = 0;
1091 reload_opnum
[tertiary_reload
] = opnum
;
1092 reload_when_needed
[tertiary_reload
] = secondary_type
;
1093 reload_secondary_reload
[tertiary_reload
] = -1;
1094 reload_secondary_icode
[tertiary_reload
] = CODE_FOR_nothing
;
1095 reload_secondary_p
[tertiary_reload
] = 1;
1102 /* See if we can reuse an existing secondary reload. */
1103 for (secondary_reload
= 0; secondary_reload
< n_reloads
;
1105 if (reload_secondary_p
[secondary_reload
]
1106 && (reg_class_subset_p (secondary_class
,
1107 reload_reg_class
[secondary_reload
])
1108 || reg_class_subset_p (reload_reg_class
[secondary_reload
],
1110 && ((reload_inmode
[secondary_reload
] == secondary_mode
)
1111 || reload_inmode
[secondary_reload
] == VOIDmode
)
1112 && ((reload_outmode
[secondary_reload
] == secondary_out_mode
)
1113 || reload_outmode
[secondary_reload
] == VOIDmode
)
1114 && reload_secondary_reload
[secondary_reload
] == tertiary_reload
1115 && reload_secondary_icode
[secondary_reload
] == tertiary_icode
1116 && (reg_class_size
[(int) secondary_class
] == 1
1117 #ifdef SMALL_REGISTER_CLASSES
1121 && MERGABLE_RELOADS (secondary_type
,
1122 reload_when_needed
[secondary_reload
],
1123 opnum
, reload_opnum
[secondary_reload
]))
1125 if (secondary_mode
!= VOIDmode
)
1126 reload_inmode
[secondary_reload
] = secondary_mode
;
1127 if (secondary_out_mode
!= VOIDmode
)
1128 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1129 if (reg_class_subset_p (secondary_class
,
1130 reload_reg_class
[secondary_reload
]))
1131 reload_reg_class
[secondary_reload
] = secondary_class
;
1132 if (MERGE_TO_OTHER (secondary_type
,
1133 reload_when_needed
[secondary_reload
],
1134 opnum
, reload_opnum
[secondary_reload
]))
1135 reload_when_needed
[secondary_reload
] = RELOAD_OTHER
;
1136 reload_opnum
[secondary_reload
]
1137 = MIN (reload_opnum
[secondary_reload
], opnum
);
1138 reload_optional
[secondary_reload
] &= optional
;
1139 reload_secondary_p
[secondary_reload
] = 1;
1142 if (secondary_reload
== n_reloads
)
1144 /* We need to make a new secondary reload for this register
1146 reload_in
[secondary_reload
] = reload_out
[secondary_reload
] = 0;
1147 reload_reg_class
[secondary_reload
] = secondary_class
;
1148 reload_inmode
[secondary_reload
] = secondary_mode
;
1149 reload_outmode
[secondary_reload
] = secondary_out_mode
;
1150 reload_reg_rtx
[secondary_reload
] = 0;
1151 reload_optional
[secondary_reload
] = optional
;
1152 reload_inc
[secondary_reload
] = 0;
1153 /* Maybe we could combine these, but it seems too tricky. */
1154 reload_nocombine
[secondary_reload
] = 1;
1155 reload_in_reg
[secondary_reload
] = 0;
1156 reload_opnum
[secondary_reload
] = opnum
;
1157 reload_when_needed
[secondary_reload
] = secondary_type
;
1158 reload_secondary_reload
[secondary_reload
] = tertiary_reload
;
1159 reload_secondary_icode
[secondary_reload
] = tertiary_icode
;
1160 reload_secondary_p
[secondary_reload
] = 1;
1165 #ifdef SECONDARY_MEMORY_NEEDED
1166 /* If we need a memory location to copy between the two
1167 reload regs, set it up now. */
1169 if (in
!= 0 && secondary_icode
== CODE_FOR_nothing
1170 && SECONDARY_MEMORY_NEEDED (secondary_class
, class, inmode
))
1171 get_secondary_mem (in
, inmode
, opnum
, type
);
1173 if (out
!= 0 && secondary_icode
== CODE_FOR_nothing
1174 && SECONDARY_MEMORY_NEEDED (class, secondary_class
, outmode
))
1175 get_secondary_mem (out
, outmode
, opnum
, type
);
1181 /* We found no existing reload suitable for re-use.
1182 So add an additional reload. */
1185 reload_out
[i
] = out
;
1186 reload_reg_class
[i
] = class;
1187 reload_inmode
[i
] = inmode
;
1188 reload_outmode
[i
] = outmode
;
1189 reload_reg_rtx
[i
] = 0;
1190 reload_optional
[i
] = optional
;
1192 reload_nocombine
[i
] = 0;
1193 reload_in_reg
[i
] = inloc
? *inloc
: 0;
1194 reload_opnum
[i
] = opnum
;
1195 reload_when_needed
[i
] = type
;
1196 reload_secondary_reload
[i
] = secondary_reload
;
1197 reload_secondary_icode
[i
] = secondary_icode
;
1198 reload_secondary_p
[i
] = 0;
1202 #ifdef SECONDARY_MEMORY_NEEDED
1203 /* If a memory location is needed for the copy, make one. */
1204 if (in
!= 0 && GET_CODE (in
) == REG
1205 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1206 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1208 get_secondary_mem (in
, inmode
, opnum
, type
);
1210 if (out
!= 0 && GET_CODE (out
) == REG
1211 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1212 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1214 get_secondary_mem (out
, outmode
, opnum
, type
);
1219 /* We are reusing an existing reload,
1220 but we may have additional information for it.
1221 For example, we may now have both IN and OUT
1222 while the old one may have just one of them. */
1224 if (inmode
!= VOIDmode
)
1225 reload_inmode
[i
] = inmode
;
1226 if (outmode
!= VOIDmode
)
1227 reload_outmode
[i
] = outmode
;
1231 reload_out
[i
] = out
;
1232 if (reg_class_subset_p (class, reload_reg_class
[i
]))
1233 reload_reg_class
[i
] = class;
1234 reload_optional
[i
] &= optional
;
1235 if (MERGE_TO_OTHER (type
, reload_when_needed
[i
],
1236 opnum
, reload_opnum
[i
]))
1237 reload_when_needed
[i
] = RELOAD_OTHER
;
1238 reload_opnum
[i
] = MIN (reload_opnum
[i
], opnum
);
1241 /* If the ostensible rtx being reload differs from the rtx found
1242 in the location to substitute, this reload is not safe to combine
1243 because we cannot reliably tell whether it appears in the insn. */
1245 if (in
!= 0 && in
!= *inloc
)
1246 reload_nocombine
[i
] = 1;
1249 /* This was replaced by changes in find_reloads_address_1 and the new
1250 function inc_for_reload, which go with a new meaning of reload_inc. */
1252 /* If this is an IN/OUT reload in an insn that sets the CC,
1253 it must be for an autoincrement. It doesn't work to store
1254 the incremented value after the insn because that would clobber the CC.
1255 So we must do the increment of the value reloaded from,
1256 increment it, store it back, then decrement again. */
1257 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1261 reload_inc
[i
] = find_inc_amount (PATTERN (this_insn
), in
);
1262 /* If we did not find a nonzero amount-to-increment-by,
1263 that contradicts the belief that IN is being incremented
1264 in an address in this insn. */
1265 if (reload_inc
[i
] == 0)
1270 /* If we will replace IN and OUT with the reload-reg,
1271 record where they are located so that substitution need
1272 not do a tree walk. */
1274 if (replace_reloads
)
1278 register struct replacement
*r
= &replacements
[n_replacements
++];
1280 r
->subreg_loc
= in_subreg_loc
;
1284 if (outloc
!= 0 && outloc
!= inloc
)
1286 register struct replacement
*r
= &replacements
[n_replacements
++];
1289 r
->subreg_loc
= out_subreg_loc
;
1294 /* If this reload is just being introduced and it has both
1295 an incoming quantity and an outgoing quantity that are
1296 supposed to be made to match, see if either one of the two
1297 can serve as the place to reload into.
1299 If one of them is acceptable, set reload_reg_rtx[i]
1302 if (in
!= 0 && out
!= 0 && in
!= out
&& reload_reg_rtx
[i
] == 0)
1304 reload_reg_rtx
[i
] = find_dummy_reload (in
, out
, inloc
, outloc
,
1306 reload_reg_class
[i
], i
);
1308 /* If the outgoing register already contains the same value
1309 as the incoming one, we can dispense with loading it.
1310 The easiest way to tell the caller that is to give a phony
1311 value for the incoming operand (same as outgoing one). */
1312 if (reload_reg_rtx
[i
] == out
1313 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1314 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1315 static_reload_reg_p
, i
, inmode
))
1319 /* If this is an input reload and the operand contains a register that
1320 dies in this insn and is used nowhere else, see if it is the right class
1321 to be used for this reload. Use it if so. (This occurs most commonly
1322 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1323 this if it is also an output reload that mentions the register unless
1324 the output is a SUBREG that clobbers an entire register.
1326 Note that the operand might be one of the spill regs, if it is a
1327 pseudo reg and we are in a block where spilling has not taken place.
1328 But if there is no spilling in this block, that is OK.
1329 An explicitly used hard reg cannot be a spill reg. */
1331 if (reload_reg_rtx
[i
] == 0 && in
!= 0)
1336 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1337 if (REG_NOTE_KIND (note
) == REG_DEAD
1338 && GET_CODE (XEXP (note
, 0)) == REG
1339 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1340 && reg_mentioned_p (XEXP (note
, 0), in
)
1341 && ! refers_to_regno_for_reload_p (regno
,
1343 + HARD_REGNO_NREGS (regno
,
1345 PATTERN (this_insn
), inloc
)
1346 /* If this is also an output reload, IN cannot be used as
1347 the reload register if it is set in this insn unless IN
1349 && (out
== 0 || in
== out
1350 || ! hard_reg_set_here_p (regno
,
1352 + HARD_REGNO_NREGS (regno
,
1354 PATTERN (this_insn
)))
1355 /* ??? Why is this code so different from the previous?
1356 Is there any simple coherent way to describe the two together?
1357 What's going on here. */
1359 || (GET_CODE (in
) == SUBREG
1360 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1362 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1363 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1364 /* Make sure the operand fits in the reg that dies. */
1365 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1366 && HARD_REGNO_MODE_OK (regno
, inmode
)
1367 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1368 && HARD_REGNO_MODE_OK (regno
, outmode
)
1369 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], regno
)
1370 && !fixed_regs
[regno
])
1372 reload_reg_rtx
[i
] = gen_rtx (REG
, inmode
, regno
);
1378 output_reloadnum
= i
;
1383 /* Record an additional place we must replace a value
1384 for which we have already recorded a reload.
1385 RELOADNUM is the value returned by push_reload
1386 when the reload was recorded.
1387 This is used in insn patterns that use match_dup. */
1390 push_replacement (loc
, reloadnum
, mode
)
1393 enum machine_mode mode
;
1395 if (replace_reloads
)
1397 register struct replacement
*r
= &replacements
[n_replacements
++];
1398 r
->what
= reloadnum
;
1405 /* Transfer all replacements that used to be in reload FROM to be in
1409 transfer_replacements (to
, from
)
1414 for (i
= 0; i
< n_replacements
; i
++)
1415 if (replacements
[i
].what
== from
)
1416 replacements
[i
].what
= to
;
1419 /* If there is only one output reload, and it is not for an earlyclobber
1420 operand, try to combine it with a (logically unrelated) input reload
1421 to reduce the number of reload registers needed.
1423 This is safe if the input reload does not appear in
1424 the value being output-reloaded, because this implies
1425 it is not needed any more once the original insn completes.
1427 If that doesn't work, see we can use any of the registers that
1428 die in this insn as a reload register. We can if it is of the right
1429 class and does not appear in the value being output-reloaded. */
1435 int output_reload
= -1;
1438 /* Find the output reload; return unless there is exactly one
1439 and that one is mandatory. */
1441 for (i
= 0; i
< n_reloads
; i
++)
1442 if (reload_out
[i
] != 0)
1444 if (output_reload
>= 0)
1449 if (output_reload
< 0 || reload_optional
[output_reload
])
1452 /* An input-output reload isn't combinable. */
1454 if (reload_in
[output_reload
] != 0)
1457 /* If this reload is for an earlyclobber operand, we can't do anything. */
1458 if (earlyclobber_operand_p (reload_out
[output_reload
]))
1461 /* Check each input reload; can we combine it? */
1463 for (i
= 0; i
< n_reloads
; i
++)
1464 if (reload_in
[i
] && ! reload_optional
[i
] && ! reload_nocombine
[i
]
1465 /* Life span of this reload must not extend past main insn. */
1466 && reload_when_needed
[i
] != RELOAD_FOR_OUTPUT_ADDRESS
1467 && reload_when_needed
[i
] != RELOAD_OTHER
1468 && (CLASS_MAX_NREGS (reload_reg_class
[i
], reload_inmode
[i
])
1469 == CLASS_MAX_NREGS (reload_reg_class
[output_reload
],
1470 reload_outmode
[output_reload
]))
1471 && reload_inc
[i
] == 0
1472 && reload_reg_rtx
[i
] == 0
1473 /* Don't combine two reloads with different secondary reloads. */
1474 && (reload_secondary_reload
[i
] == reload_secondary_reload
[output_reload
]
1475 || reload_secondary_reload
[i
] == -1
1476 || reload_secondary_reload
[output_reload
] == -1)
1477 #ifdef SECONDARY_MEMORY_NEEDED
1478 /* Likewise for different secondary memory locations. */
1479 && (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]] == 0
1480 || secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] == 0
1481 || rtx_equal_p (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]],
1482 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]]))
1484 #ifdef SMALL_REGISTER_CLASSES
1485 && reload_reg_class
[i
] == reload_reg_class
[output_reload
]
1487 && (reg_class_subset_p (reload_reg_class
[i
],
1488 reload_reg_class
[output_reload
])
1489 || reg_class_subset_p (reload_reg_class
[output_reload
],
1490 reload_reg_class
[i
]))
1492 && (MATCHES (reload_in
[i
], reload_out
[output_reload
])
1493 /* Args reversed because the first arg seems to be
1494 the one that we imagine being modified
1495 while the second is the one that might be affected. */
1496 || (! reg_overlap_mentioned_for_reload_p (reload_out
[output_reload
],
1498 /* However, if the input is a register that appears inside
1499 the output, then we also can't share.
1500 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1501 If the same reload reg is used for both reg 69 and the
1502 result to be stored in memory, then that result
1503 will clobber the address of the memory ref. */
1504 && ! (GET_CODE (reload_in
[i
]) == REG
1505 && reg_overlap_mentioned_for_reload_p (reload_in
[i
],
1506 reload_out
[output_reload
]))))
1507 && (reg_class_size
[(int) reload_reg_class
[i
]]
1508 #ifdef SMALL_REGISTER_CLASSES
1512 /* We will allow making things slightly worse by combining an
1513 input and an output, but no worse than that. */
1514 && (reload_when_needed
[i
] == RELOAD_FOR_INPUT
1515 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT
))
1519 /* We have found a reload to combine with! */
1520 reload_out
[i
] = reload_out
[output_reload
];
1521 reload_outmode
[i
] = reload_outmode
[output_reload
];
1522 /* Mark the old output reload as inoperative. */
1523 reload_out
[output_reload
] = 0;
1524 /* The combined reload is needed for the entire insn. */
1525 reload_when_needed
[i
] = RELOAD_OTHER
;
1526 /* If the output reload had a secondary reload, copy it. */
1527 if (reload_secondary_reload
[output_reload
] != -1)
1528 reload_secondary_reload
[i
] = reload_secondary_reload
[output_reload
];
1529 #ifdef SECONDARY_MEMORY_NEEDED
1530 /* Copy any secondary MEM. */
1531 if (secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]] != 0)
1532 secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[i
]]
1533 = secondary_memlocs_elim
[(int) reload_outmode
[output_reload
]][reload_opnum
[output_reload
]];
1535 /* If required, minimize the register class. */
1536 if (reg_class_subset_p (reload_reg_class
[output_reload
],
1537 reload_reg_class
[i
]))
1538 reload_reg_class
[i
] = reload_reg_class
[output_reload
];
1540 /* Transfer all replacements from the old reload to the combined. */
1541 for (j
= 0; j
< n_replacements
; j
++)
1542 if (replacements
[j
].what
== output_reload
)
1543 replacements
[j
].what
= i
;
1548 /* If this insn has only one operand that is modified or written (assumed
1549 to be the first), it must be the one corresponding to this reload. It
1550 is safe to use anything that dies in this insn for that output provided
1551 that it does not occur in the output (we already know it isn't an
1552 earlyclobber. If this is an asm insn, give up. */
1554 if (INSN_CODE (this_insn
) == -1)
1557 for (i
= 1; i
< insn_n_operands
[INSN_CODE (this_insn
)]; i
++)
1558 if (insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '='
1559 || insn_operand_constraint
[INSN_CODE (this_insn
)][i
][0] == '+')
1562 /* See if some hard register that dies in this insn and is not used in
1563 the output is the right class. Only works if the register we pick
1564 up can fully hold our output reload. */
1565 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1566 if (REG_NOTE_KIND (note
) == REG_DEAD
1567 && GET_CODE (XEXP (note
, 0)) == REG
1568 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1569 reload_out
[output_reload
])
1570 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1571 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1572 && TEST_HARD_REG_BIT (reg_class_contents
[(int) reload_reg_class
[output_reload
]],
1573 REGNO (XEXP (note
, 0)))
1574 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), reload_outmode
[output_reload
])
1575 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1576 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1578 reload_reg_rtx
[output_reload
] = gen_rtx (REG
,
1579 reload_outmode
[output_reload
],
1580 REGNO (XEXP (note
, 0)));
1585 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1586 See if one of IN and OUT is a register that may be used;
1587 this is desirable since a spill-register won't be needed.
1588 If so, return the register rtx that proves acceptable.
1590 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1591 CLASS is the register class required for the reload.
1593 If FOR_REAL is >= 0, it is the number of the reload,
1594 and in some cases when it can be discovered that OUT doesn't need
1595 to be computed, clear out reload_out[FOR_REAL].
1597 If FOR_REAL is -1, this should not be done, because this call
1598 is just to see if a register can be found, not to find and install it. */
1601 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1602 inmode
, outmode
, class, for_real
)
1603 rtx real_in
, real_out
;
1604 rtx
*inloc
, *outloc
;
1605 enum machine_mode inmode
, outmode
;
1606 enum reg_class
class;
1615 /* If operands exceed a word, we can't use either of them
1616 unless they have the same size. */
1617 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1618 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1619 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1622 /* Find the inside of any subregs. */
1623 while (GET_CODE (out
) == SUBREG
)
1625 out_offset
= SUBREG_WORD (out
);
1626 out
= SUBREG_REG (out
);
1628 while (GET_CODE (in
) == SUBREG
)
1630 in_offset
= SUBREG_WORD (in
);
1631 in
= SUBREG_REG (in
);
1634 /* Narrow down the reg class, the same way push_reload will;
1635 otherwise we might find a dummy now, but push_reload won't. */
1636 class = PREFERRED_RELOAD_CLASS (in
, class);
1638 /* See if OUT will do. */
1639 if (GET_CODE (out
) == REG
1640 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1642 register int regno
= REGNO (out
) + out_offset
;
1643 int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1646 /* When we consider whether the insn uses OUT,
1647 ignore references within IN. They don't prevent us
1648 from copying IN into OUT, because those refs would
1649 move into the insn that reloads IN.
1651 However, we only ignore IN in its role as this reload.
1652 If the insn uses IN elsewhere and it contains OUT,
1653 that counts. We can't be sure it's the "same" operand
1654 so it might not go through this reload. */
1656 *inloc
= const0_rtx
;
1658 if (regno
< FIRST_PSEUDO_REGISTER
1659 /* A fixed reg that can overlap other regs better not be used
1660 for reloading in any way. */
1661 #ifdef OVERLAPPING_REGNO_P
1662 && ! (fixed_regs
[regno
] && OVERLAPPING_REGNO_P (regno
))
1664 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1665 PATTERN (this_insn
), outloc
))
1668 for (i
= 0; i
< nwords
; i
++)
1669 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1675 if (GET_CODE (real_out
) == REG
)
1678 value
= gen_rtx (REG
, outmode
, regno
);
1685 /* Consider using IN if OUT was not acceptable
1686 or if OUT dies in this insn (like the quotient in a divmod insn).
1687 We can't use IN unless it is dies in this insn,
1688 which means we must know accurately which hard regs are live.
1689 Also, the result can't go in IN if IN is used within OUT. */
1690 if (hard_regs_live_known
1691 && GET_CODE (in
) == REG
1692 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1694 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1695 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1696 && !fixed_regs
[REGNO (in
)]
1697 && HARD_REGNO_MODE_OK (REGNO (in
),
1698 /* The only case where out and real_out might
1699 have different modes is where real_out
1700 is a subreg, and in that case, out
1702 (GET_MODE (out
) != VOIDmode
1703 ? GET_MODE (out
) : outmode
)))
1705 register int regno
= REGNO (in
) + in_offset
;
1706 int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1708 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1709 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1710 PATTERN (this_insn
)))
1713 for (i
= 0; i
< nwords
; i
++)
1714 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1720 /* If we were going to use OUT as the reload reg
1721 and changed our mind, it means OUT is a dummy that
1722 dies here. So don't bother copying value to it. */
1723 if (for_real
>= 0 && value
== real_out
)
1724 reload_out
[for_real
] = 0;
1725 if (GET_CODE (real_in
) == REG
)
1728 value
= gen_rtx (REG
, inmode
, regno
);
1736 /* This page contains subroutines used mainly for determining
1737 whether the IN or an OUT of a reload can serve as the
1740 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1743 earlyclobber_operand_p (x
)
1748 for (i
= 0; i
< n_earlyclobbers
; i
++)
1749 if (reload_earlyclobbers
[i
] == x
)
1755 /* Return 1 if expression X alters a hard reg in the range
1756 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1757 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1758 X should be the body of an instruction. */
1761 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1762 register int beg_regno
, end_regno
;
1765 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1767 register rtx op0
= SET_DEST (x
);
1768 while (GET_CODE (op0
) == SUBREG
)
1769 op0
= SUBREG_REG (op0
);
1770 if (GET_CODE (op0
) == REG
)
1772 register int r
= REGNO (op0
);
1773 /* See if this reg overlaps range under consideration. */
1775 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1779 else if (GET_CODE (x
) == PARALLEL
)
1781 register int i
= XVECLEN (x
, 0) - 1;
1783 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1790 /* Return 1 if ADDR is a valid memory address for mode MODE,
1791 and check that each pseudo reg has the proper kind of
1795 strict_memory_address_p (mode
, addr
)
1796 enum machine_mode mode
;
1799 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1806 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1807 if they are the same hard reg, and has special hacks for
1808 autoincrement and autodecrement.
1809 This is specifically intended for find_reloads to use
1810 in determining whether two operands match.
1811 X is the operand whose number is the lower of the two.
1813 The value is 2 if Y contains a pre-increment that matches
1814 a non-incrementing address in X. */
1816 /* ??? To be completely correct, we should arrange to pass
1817 for X the output operand and for Y the input operand.
1818 For now, we assume that the output operand has the lower number
1819 because that is natural in (SET output (... input ...)). */
1822 operands_match_p (x
, y
)
1826 register RTX_CODE code
= GET_CODE (x
);
1832 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
1833 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
1834 && GET_CODE (SUBREG_REG (y
)) == REG
)))
1840 i
= REGNO (SUBREG_REG (x
));
1841 if (i
>= FIRST_PSEUDO_REGISTER
)
1843 i
+= SUBREG_WORD (x
);
1848 if (GET_CODE (y
) == SUBREG
)
1850 j
= REGNO (SUBREG_REG (y
));
1851 if (j
>= FIRST_PSEUDO_REGISTER
)
1853 j
+= SUBREG_WORD (y
);
1858 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
1859 multiple hard register group, so that for example (reg:DI 0) and
1860 (reg:SI 1) will be considered the same register. */
1861 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
1862 && i
< FIRST_PSEUDO_REGISTER
)
1863 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
1864 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
1865 && j
< FIRST_PSEUDO_REGISTER
)
1866 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
1870 /* If two operands must match, because they are really a single
1871 operand of an assembler insn, then two postincrements are invalid
1872 because the assembler insn would increment only once.
1873 On the other hand, an postincrement matches ordinary indexing
1874 if the postincrement is the output operand. */
1875 if (code
== POST_DEC
|| code
== POST_INC
)
1876 return operands_match_p (XEXP (x
, 0), y
);
1877 /* Two preincrements are invalid
1878 because the assembler insn would increment only once.
1879 On the other hand, an preincrement matches ordinary indexing
1880 if the preincrement is the input operand.
1881 In this case, return 2, since some callers need to do special
1882 things when this happens. */
1883 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
)
1884 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
1888 /* Now we have disposed of all the cases
1889 in which different rtx codes can match. */
1890 if (code
!= GET_CODE (y
))
1892 if (code
== LABEL_REF
)
1893 return XEXP (x
, 0) == XEXP (y
, 0);
1894 if (code
== SYMBOL_REF
)
1895 return XSTR (x
, 0) == XSTR (y
, 0);
1897 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1899 if (GET_MODE (x
) != GET_MODE (y
))
1902 /* Compare the elements. If any pair of corresponding elements
1903 fail to match, return 0 for the whole things. */
1906 fmt
= GET_RTX_FORMAT (code
);
1907 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
1913 if (XWINT (x
, i
) != XWINT (y
, i
))
1918 if (XINT (x
, i
) != XINT (y
, i
))
1923 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
1926 /* If any subexpression returns 2,
1927 we should return 2 if we are successful. */
1935 /* It is believed that rtx's at this level will never
1936 contain anything but integers and other rtx's,
1937 except for within LABEL_REFs and SYMBOL_REFs. */
1942 return 1 + success_2
;
1945 /* Return the number of times character C occurs in string S. */
1948 n_occurrences (c
, s
)
1958 /* Describe the range of registers or memory referenced by X.
1959 If X is a register, set REG_FLAG and put the first register
1960 number into START and the last plus one into END.
1961 If X is a memory reference, put a base address into BASE
1962 and a range of integer offsets into START and END.
1963 If X is pushing on the stack, we can assume it causes no trouble,
1964 so we set the SAFE field. */
1966 static struct decomposition
1970 struct decomposition val
;
1975 if (GET_CODE (x
) == MEM
)
1977 rtx base
, offset
= 0;
1978 rtx addr
= XEXP (x
, 0);
1980 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
1981 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
1983 val
.base
= XEXP (addr
, 0);
1984 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
1985 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
1986 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
1990 if (GET_CODE (addr
) == CONST
)
1992 addr
= XEXP (addr
, 0);
1995 if (GET_CODE (addr
) == PLUS
)
1997 if (CONSTANT_P (XEXP (addr
, 0)))
1999 base
= XEXP (addr
, 1);
2000 offset
= XEXP (addr
, 0);
2002 else if (CONSTANT_P (XEXP (addr
, 1)))
2004 base
= XEXP (addr
, 0);
2005 offset
= XEXP (addr
, 1);
2012 offset
= const0_rtx
;
2014 if (GET_CODE (offset
) == CONST
)
2015 offset
= XEXP (offset
, 0);
2016 if (GET_CODE (offset
) == PLUS
)
2018 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2020 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 1));
2021 offset
= XEXP (offset
, 0);
2023 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2025 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, XEXP (offset
, 0));
2026 offset
= XEXP (offset
, 1);
2030 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2031 offset
= const0_rtx
;
2034 else if (GET_CODE (offset
) != CONST_INT
)
2036 base
= gen_rtx (PLUS
, GET_MODE (base
), base
, offset
);
2037 offset
= const0_rtx
;
2040 if (all_const
&& GET_CODE (base
) == PLUS
)
2041 base
= gen_rtx (CONST
, GET_MODE (base
), base
);
2043 if (GET_CODE (offset
) != CONST_INT
)
2046 val
.start
= INTVAL (offset
);
2047 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2051 else if (GET_CODE (x
) == REG
)
2054 val
.start
= true_regnum (x
);
2057 /* A pseudo with no hard reg. */
2058 val
.start
= REGNO (x
);
2059 val
.end
= val
.start
+ 1;
2063 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2065 else if (GET_CODE (x
) == SUBREG
)
2067 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2068 /* This could be more precise, but it's good enough. */
2069 return decompose (SUBREG_REG (x
));
2071 val
.start
= true_regnum (x
);
2073 return decompose (SUBREG_REG (x
));
2076 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2078 else if (CONSTANT_P (x
)
2079 /* This hasn't been assigned yet, so it can't conflict yet. */
2080 || GET_CODE (x
) == SCRATCH
)
2087 /* Return 1 if altering Y will not modify the value of X.
2088 Y is also described by YDATA, which should be decompose (Y). */
2091 immune_p (x
, y
, ydata
)
2093 struct decomposition ydata
;
2095 struct decomposition xdata
;
2098 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2102 if (GET_CODE (y
) != MEM
)
2104 /* If Y is memory and X is not, Y can't affect X. */
2105 if (GET_CODE (x
) != MEM
)
2108 xdata
= decompose (x
);
2110 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2112 /* If bases are distinct symbolic constants, there is no overlap. */
2113 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2115 /* Constants and stack slots never overlap. */
2116 if (CONSTANT_P (xdata
.base
)
2117 && (ydata
.base
== frame_pointer_rtx
2118 || ydata
.base
== hard_frame_pointer_rtx
2119 || ydata
.base
== stack_pointer_rtx
))
2121 if (CONSTANT_P (ydata
.base
)
2122 && (xdata
.base
== frame_pointer_rtx
2123 || xdata
.base
== hard_frame_pointer_rtx
2124 || xdata
.base
== stack_pointer_rtx
))
2126 /* If either base is variable, we don't know anything. */
2131 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2134 /* Similar, but calls decompose. */
2137 safe_from_earlyclobber (op
, clobber
)
2140 struct decomposition early_data
;
2142 early_data
= decompose (clobber
);
2143 return immune_p (op
, clobber
, early_data
);
2146 /* Main entry point of this file: search the body of INSN
2147 for values that need reloading and record them with push_reload.
2148 REPLACE nonzero means record also where the values occur
2149 so that subst_reloads can be used.
2151 IND_LEVELS says how many levels of indirection are supported by this
2152 machine; a value of zero means that a memory reference is not a valid
2155 LIVE_KNOWN says we have valid information about which hard
2156 regs are live at each point in the program; this is true when
2157 we are called from global_alloc but false when stupid register
2158 allocation has been done.
2160 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2161 which is nonnegative if the reg has been commandeered for reloading into.
2162 It is copied into STATIC_RELOAD_REG_P and referenced from there
2163 by various subroutines. */
2166 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2168 int replace
, ind_levels
;
2170 short *reload_reg_p
;
2172 #ifdef REGISTER_CONSTRAINTS
2174 register int insn_code_number
;
2177 /* These are the constraints for the insn. We don't change them. */
2178 char *constraints1
[MAX_RECOG_OPERANDS
];
2179 /* These start out as the constraints for the insn
2180 and they are chewed up as we consider alternatives. */
2181 char *constraints
[MAX_RECOG_OPERANDS
];
2182 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2184 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2185 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2186 /* Nonzero for a MEM operand whose entire address needs a reload. */
2187 int address_reloaded
[MAX_RECOG_OPERANDS
];
2188 /* Value of enum reload_type to use for operand. */
2189 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2190 /* Value of enum reload_type to use within address of operand. */
2191 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2192 /* Save the usage of each operand. */
2193 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2194 int no_input_reloads
= 0, no_output_reloads
= 0;
2196 int this_alternative
[MAX_RECOG_OPERANDS
];
2197 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2198 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2199 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2200 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2202 int goal_alternative
[MAX_RECOG_OPERANDS
];
2203 int this_alternative_number
;
2204 int goal_alternative_number
;
2205 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2206 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2207 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2208 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2209 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2210 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2211 int goal_alternative_swapped
;
2214 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2215 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2216 rtx body
= PATTERN (insn
);
2217 rtx set
= single_set (insn
);
2218 int goal_earlyclobber
, this_earlyclobber
;
2219 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2222 this_insn_is_asm
= 0; /* Tentative. */
2226 n_earlyclobbers
= 0;
2227 replace_reloads
= replace
;
2228 hard_regs_live_known
= live_known
;
2229 static_reload_reg_p
= reload_reg_p
;
2231 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2232 neither are insns that SET cc0. Insns that use CC0 are not allowed
2233 to have any input reloads. */
2234 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2235 no_output_reloads
= 1;
2238 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2239 no_input_reloads
= 1;
2240 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2241 no_output_reloads
= 1;
2244 #ifdef SECONDARY_MEMORY_NEEDED
2245 /* The eliminated forms of any secondary memory locations are per-insn, so
2246 clear them out here. */
2248 bzero (secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2251 /* Find what kind of insn this is. NOPERANDS gets number of operands.
2252 Make OPERANDS point to a vector of operand values.
2253 Make OPERAND_LOCS point to a vector of pointers to
2254 where the operands were found.
2255 Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the
2256 constraint-strings for this insn.
2257 Return if the insn needs no reload processing. */
2259 switch (GET_CODE (body
))
2269 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2270 is cheap to move between them. If it is not, there may not be an insn
2271 to do the copy, so we may need a reload. */
2272 if (GET_CODE (SET_DEST (body
)) == REG
2273 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2274 && GET_CODE (SET_SRC (body
)) == REG
2275 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2276 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2277 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2281 reload_n_operands
= noperands
= asm_noperands (body
);
2284 /* This insn is an `asm' with operands. */
2286 insn_code_number
= -1;
2287 this_insn_is_asm
= 1;
2289 /* expand_asm_operands makes sure there aren't too many operands. */
2290 if (noperands
> MAX_RECOG_OPERANDS
)
2293 /* Now get the operand values and constraints out of the insn. */
2295 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
2296 constraints
, operand_mode
);
2299 bcopy (constraints
, constraints1
, noperands
* sizeof (char *));
2300 n_alternatives
= n_occurrences (',', constraints
[0]) + 1;
2301 for (i
= 1; i
< noperands
; i
++)
2302 if (n_alternatives
!= n_occurrences (',', constraints
[i
]) + 1)
2304 error_for_asm (insn
, "operand constraints differ in number of alternatives");
2305 /* Avoid further trouble with this insn. */
2306 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
2315 /* Ordinary insn: recognize it, get the operands via insn_extract
2316 and get the constraints. */
2318 insn_code_number
= recog_memoized (insn
);
2319 if (insn_code_number
< 0)
2320 fatal_insn_not_found (insn
);
2322 reload_n_operands
= noperands
= insn_n_operands
[insn_code_number
];
2323 n_alternatives
= insn_n_alternatives
[insn_code_number
];
2324 /* Just return "no reloads" if insn has no operands with constraints. */
2325 if (n_alternatives
== 0)
2327 insn_extract (insn
);
2328 for (i
= 0; i
< noperands
; i
++)
2330 constraints
[i
] = constraints1
[i
]
2331 = insn_operand_constraint
[insn_code_number
][i
];
2332 operand_mode
[i
] = insn_operand_mode
[insn_code_number
][i
];
2341 /* If we will need to know, later, whether some pair of operands
2342 are the same, we must compare them now and save the result.
2343 Reloading the base and index registers will clobber them
2344 and afterward they will fail to match. */
2346 for (i
= 0; i
< noperands
; i
++)
2351 substed_operand
[i
] = recog_operand
[i
];
2354 modified
[i
] = RELOAD_READ
;
2356 /* Scan this operand's constraint to see if it is an output operand,
2357 an in-out operand, is commutative, or should match another. */
2362 modified
[i
] = RELOAD_WRITE
;
2364 modified
[i
] = RELOAD_READ_WRITE
;
2367 /* The last operand should not be marked commutative. */
2368 if (i
== noperands
- 1)
2370 if (this_insn_is_asm
)
2371 warning_for_asm (this_insn
,
2372 "`%%' constraint used with last operand");
2379 else if (c
>= '0' && c
<= '9')
2382 operands_match
[c
][i
]
2383 = operands_match_p (recog_operand
[c
], recog_operand
[i
]);
2385 /* An operand may not match itself. */
2388 if (this_insn_is_asm
)
2389 warning_for_asm (this_insn
,
2390 "operand %d has constraint %d", i
, c
);
2395 /* If C can be commuted with C+1, and C might need to match I,
2396 then C+1 might also need to match I. */
2397 if (commutative
>= 0)
2399 if (c
== commutative
|| c
== commutative
+ 1)
2401 int other
= c
+ (c
== commutative
? 1 : -1);
2402 operands_match
[other
][i
]
2403 = operands_match_p (recog_operand
[other
], recog_operand
[i
]);
2405 if (i
== commutative
|| i
== commutative
+ 1)
2407 int other
= i
+ (i
== commutative
? 1 : -1);
2408 operands_match
[c
][other
]
2409 = operands_match_p (recog_operand
[c
], recog_operand
[other
]);
2411 /* Note that C is supposed to be less than I.
2412 No need to consider altering both C and I because in
2413 that case we would alter one into the other. */
2419 /* Examine each operand that is a memory reference or memory address
2420 and reload parts of the addresses into index registers.
2421 Also here any references to pseudo regs that didn't get hard regs
2422 but are equivalent to constants get replaced in the insn itself
2423 with those constants. Nobody will ever see them again.
2425 Finally, set up the preferred classes of each operand. */
2427 for (i
= 0; i
< noperands
; i
++)
2429 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
2431 address_reloaded
[i
] = 0;
2432 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2433 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2436 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2437 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2440 if (*constraints
[i
] == 0)
2441 /* Ignore things like match_operator operands. */
2443 else if (constraints
[i
][0] == 'p')
2445 find_reloads_address (VOIDmode
, NULL_PTR
,
2446 recog_operand
[i
], recog_operand_loc
[i
],
2447 i
, operand_type
[i
], ind_levels
);
2448 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2450 else if (code
== MEM
)
2452 if (find_reloads_address (GET_MODE (recog_operand
[i
]),
2453 recog_operand_loc
[i
],
2454 XEXP (recog_operand
[i
], 0),
2455 &XEXP (recog_operand
[i
], 0),
2456 i
, address_type
[i
], ind_levels
))
2457 address_reloaded
[i
] = 1;
2458 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2460 else if (code
== SUBREG
)
2461 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2462 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2465 && &SET_DEST (set
) == recog_operand_loc
[i
]);
2466 else if (code
== PLUS
)
2467 /* We can get a PLUS as an "operand" as a result of
2468 register elimination. See eliminate_regs and gen_input_reload. */
2469 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
]
2470 = find_reloads_toplev (recog_operand
[i
], i
, address_type
[i
],
2472 else if (code
== REG
)
2474 /* This is equivalent to calling find_reloads_toplev.
2475 The code is duplicated for speed.
2476 When we find a pseudo always equivalent to a constant,
2477 we replace it by the constant. We must be sure, however,
2478 that we don't try to replace it in the insn in which it
2480 register int regno
= REGNO (recog_operand
[i
]);
2481 if (reg_equiv_constant
[regno
] != 0
2482 && (set
== 0 || &SET_DEST (set
) != recog_operand_loc
[i
]))
2483 substed_operand
[i
] = recog_operand
[i
]
2484 = reg_equiv_constant
[regno
];
2485 #if 0 /* This might screw code in reload1.c to delete prior output-reload
2486 that feeds this insn. */
2487 if (reg_equiv_mem
[regno
] != 0)
2488 substed_operand
[i
] = recog_operand
[i
]
2489 = reg_equiv_mem
[regno
];
2491 if (reg_equiv_address
[regno
] != 0)
2493 /* If reg_equiv_address is not a constant address, copy it,
2494 since it may be shared. */
2495 rtx address
= reg_equiv_address
[regno
];
2497 if (rtx_varies_p (address
))
2498 address
= copy_rtx (address
);
2500 /* If this is an output operand, we must output a CLOBBER
2501 after INSN so find_equiv_reg knows REGNO is being written.
2502 Mark this insn specially, do we can put our output reloads
2505 if (modified
[i
] != RELOAD_READ
)
2506 PUT_MODE (emit_insn_after (gen_rtx (CLOBBER
, VOIDmode
,
2511 *recog_operand_loc
[i
] = recog_operand
[i
]
2512 = gen_rtx (MEM
, GET_MODE (recog_operand
[i
]), address
);
2513 RTX_UNCHANGING_P (recog_operand
[i
])
2514 = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
2515 find_reloads_address (GET_MODE (recog_operand
[i
]),
2516 recog_operand_loc
[i
],
2517 XEXP (recog_operand
[i
], 0),
2518 &XEXP (recog_operand
[i
], 0),
2519 i
, address_type
[i
], ind_levels
);
2520 substed_operand
[i
] = recog_operand
[i
] = *recog_operand_loc
[i
];
2523 /* If the operand is still a register (we didn't replace it with an
2524 equivalent), get the preferred class to reload it into. */
2525 code
= GET_CODE (recog_operand
[i
]);
2527 = ((code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
)
2528 ? reg_preferred_class (REGNO (recog_operand
[i
])) : NO_REGS
);
2530 = (code
== REG
&& REGNO (recog_operand
[i
]) >= FIRST_PSEUDO_REGISTER
2531 && reg_alternate_class (REGNO (recog_operand
[i
])) == NO_REGS
);
2534 /* If this is simply a copy from operand 1 to operand 0, merge the
2535 preferred classes for the operands. */
2536 if (set
!= 0 && noperands
>= 2 && recog_operand
[0] == SET_DEST (set
)
2537 && recog_operand
[1] == SET_SRC (set
))
2539 preferred_class
[0] = preferred_class
[1]
2540 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2541 pref_or_nothing
[0] |= pref_or_nothing
[1];
2542 pref_or_nothing
[1] |= pref_or_nothing
[0];
2545 /* Now see what we need for pseudo-regs that didn't get hard regs
2546 or got the wrong kind of hard reg. For this, we must consider
2547 all the operands together against the register constraints. */
2549 best
= MAX_RECOG_OPERANDS
+ 300;
2552 goal_alternative_swapped
= 0;
2555 /* The constraints are made of several alternatives.
2556 Each operand's constraint looks like foo,bar,... with commas
2557 separating the alternatives. The first alternatives for all
2558 operands go together, the second alternatives go together, etc.
2560 First loop over alternatives. */
2562 for (this_alternative_number
= 0;
2563 this_alternative_number
< n_alternatives
;
2564 this_alternative_number
++)
2566 /* Loop over operands for one constraint alternative. */
2567 /* LOSERS counts those that don't fit this alternative
2568 and would require loading. */
2570 /* BAD is set to 1 if it some operand can't fit this alternative
2571 even after reloading. */
2573 /* REJECT is a count of how undesirable this alternative says it is
2574 if any reloading is required. If the alternative matches exactly
2575 then REJECT is ignored, but otherwise it gets this much
2576 counted against it in addition to the reloading needed. Each
2577 ? counts three times here since we want the disparaging caused by
2578 a bad register class to only count 1/3 as much. */
2581 this_earlyclobber
= 0;
2583 for (i
= 0; i
< noperands
; i
++)
2585 register char *p
= constraints
[i
];
2586 register int win
= 0;
2587 /* 0 => this operand can be reloaded somehow for this alternative */
2589 /* 0 => this operand can be reloaded if the alternative allows regs. */
2592 register rtx operand
= recog_operand
[i
];
2594 /* Nonzero means this is a MEM that must be reloaded into a reg
2595 regardless of what the constraint says. */
2596 int force_reload
= 0;
2598 int earlyclobber
= 0;
2600 /* If the operand is a SUBREG, extract
2601 the REG or MEM (or maybe even a constant) within.
2602 (Constants can occur as a result of reg_equiv_constant.) */
2604 while (GET_CODE (operand
) == SUBREG
)
2606 offset
+= SUBREG_WORD (operand
);
2607 operand
= SUBREG_REG (operand
);
2608 /* Force reload if this is a constant or PLUS or if there may may
2609 be a problem accessing OPERAND in the outer mode. */
2610 if (CONSTANT_P (operand
)
2611 || GET_CODE (operand
) == PLUS
2612 /* We must force a reload of paradoxical SUBREGs
2613 of a MEM because the alignment of the inner value
2614 may not be enough to do the outer reference.
2616 On machines that extend byte operations and we have a
2617 SUBREG where both the inner and outer modes are different
2618 size but no wider than a word, combine.c has made
2619 assumptions about the behavior of the machine in such
2620 register access. If the data is, in fact, in memory we
2621 must always load using the size assumed to be in the
2622 register and let the insn do the different-sized
2624 || ((GET_CODE (operand
) == MEM
2625 || (GET_CODE (operand
)== REG
2626 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2627 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2628 < BIGGEST_ALIGNMENT
)
2629 && (GET_MODE_SIZE (operand_mode
[i
])
2630 > GET_MODE_SIZE (GET_MODE (operand
))))
2631 #ifdef LOAD_EXTEND_OP
2632 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2633 && (GET_MODE_SIZE (GET_MODE (operand
))
2635 && (GET_MODE_SIZE (operand_mode
[i
])
2636 != GET_MODE_SIZE (GET_MODE (operand
))))
2639 /* Subreg of a hard reg which can't handle the subreg's mode
2640 or which would handle that mode in the wrong number of
2641 registers for subregging to work. */
2642 || (GET_CODE (operand
) == REG
2643 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2644 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2645 && (GET_MODE_SIZE (GET_MODE (operand
))
2647 && ((GET_MODE_SIZE (GET_MODE (operand
))
2649 != HARD_REGNO_NREGS (REGNO (operand
),
2650 GET_MODE (operand
))))
2651 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2656 this_alternative
[i
] = (int) NO_REGS
;
2657 this_alternative_win
[i
] = 0;
2658 this_alternative_offmemok
[i
] = 0;
2659 this_alternative_earlyclobber
[i
] = 0;
2660 this_alternative_matches
[i
] = -1;
2662 /* An empty constraint or empty alternative
2663 allows anything which matched the pattern. */
2664 if (*p
== 0 || *p
== ',')
2667 /* Scan this alternative's specs for this operand;
2668 set WIN if the operand fits any letter in this alternative.
2669 Otherwise, clear BADOP if this operand could
2670 fit some letter after reloads,
2671 or set WINREG if this operand could fit after reloads
2672 provided the constraint allows some registers. */
2674 while (*p
&& (c
= *p
++) != ',')
2683 /* The last operand should not be marked commutative. */
2684 if (i
!= noperands
- 1)
2697 /* Ignore rest of this alternative as far as
2698 reloading is concerned. */
2699 while (*p
&& *p
!= ',') p
++;
2708 this_alternative_matches
[i
] = c
;
2709 /* We are supposed to match a previous operand.
2710 If we do, we win if that one did.
2711 If we do not, count both of the operands as losers.
2712 (This is too conservative, since most of the time
2713 only a single reload insn will be needed to make
2714 the two operands win. As a result, this alternative
2715 may be rejected when it is actually desirable.) */
2716 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2717 /* If we are matching as if two operands were swapped,
2718 also pretend that operands_match had been computed
2720 But if I is the second of those and C is the first,
2721 don't exchange them, because operands_match is valid
2722 only on one side of its diagonal. */
2724 [(c
== commutative
|| c
== commutative
+ 1)
2725 ? 2*commutative
+ 1 - c
: c
]
2726 [(i
== commutative
|| i
== commutative
+ 1)
2727 ? 2*commutative
+ 1 - i
: i
])
2728 : operands_match
[c
][i
])
2729 win
= this_alternative_win
[c
];
2732 /* Operands don't match. */
2734 /* Retroactively mark the operand we had to match
2735 as a loser, if it wasn't already. */
2736 if (this_alternative_win
[c
])
2738 this_alternative_win
[c
] = 0;
2739 if (this_alternative
[c
] == (int) NO_REGS
)
2741 /* But count the pair only once in the total badness of
2742 this alternative, if the pair can be a dummy reload. */
2744 = find_dummy_reload (recog_operand
[i
], recog_operand
[c
],
2745 recog_operand_loc
[i
], recog_operand_loc
[c
],
2746 operand_mode
[i
], operand_mode
[c
],
2747 this_alternative
[c
], -1);
2752 /* This can be fixed with reloads if the operand
2753 we are supposed to match can be fixed with reloads. */
2755 this_alternative
[i
] = this_alternative
[c
];
2757 /* If we have to reload this operand and some previous
2758 operand also had to match the same thing as this
2759 operand, we don't know how to do that. So reject this
2761 if (! win
|| force_reload
)
2762 for (j
= 0; j
< i
; j
++)
2763 if (this_alternative_matches
[j
]
2764 == this_alternative_matches
[i
])
2770 /* All necessary reloads for an address_operand
2771 were handled in find_reloads_address. */
2772 this_alternative
[i
] = (int) ALL_REGS
;
2779 if (GET_CODE (operand
) == MEM
2780 || (GET_CODE (operand
) == REG
2781 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2782 && reg_renumber
[REGNO (operand
)] < 0))
2784 if (CONSTANT_P (operand
))
2789 if (GET_CODE (operand
) == MEM
2790 && ! address_reloaded
[i
]
2791 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2792 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2797 if (GET_CODE (operand
) == MEM
2798 && ! address_reloaded
[i
]
2799 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2800 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2804 /* Memory operand whose address is not offsettable. */
2808 if (GET_CODE (operand
) == MEM
2809 && ! (ind_levels
? offsettable_memref_p (operand
)
2810 : offsettable_nonstrict_memref_p (operand
))
2811 /* Certain mem addresses will become offsettable
2812 after they themselves are reloaded. This is important;
2813 we don't want our own handling of unoffsettables
2814 to override the handling of reg_equiv_address. */
2815 && !(GET_CODE (XEXP (operand
, 0)) == REG
2817 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
2821 /* Memory operand whose address is offsettable. */
2825 if ((GET_CODE (operand
) == MEM
2826 /* If IND_LEVELS, find_reloads_address won't reload a
2827 pseudo that didn't get a hard reg, so we have to
2828 reject that case. */
2829 && (ind_levels
? offsettable_memref_p (operand
)
2830 : offsettable_nonstrict_memref_p (operand
)))
2831 /* Certain mem addresses will become offsettable
2832 after they themselves are reloaded. This is important;
2833 we don't want our own handling of unoffsettables
2834 to override the handling of reg_equiv_address. */
2835 || (GET_CODE (operand
) == MEM
2836 && GET_CODE (XEXP (operand
, 0)) == REG
2838 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0))
2839 || (GET_CODE (operand
) == REG
2840 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2841 && reg_renumber
[REGNO (operand
)] < 0
2842 /* If reg_equiv_address is nonzero, we will be
2843 loading it into a register; hence it will be
2844 offsettable, but we cannot say that reg_equiv_mem
2845 is offsettable without checking. */
2846 && ((reg_equiv_mem
[REGNO (operand
)] != 0
2847 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
2848 || (reg_equiv_address
[REGNO (operand
)] != 0))))
2850 if (CONSTANT_P (operand
) || GET_CODE (operand
) == MEM
)
2856 /* Output operand that is stored before the need for the
2857 input operands (and their index registers) is over. */
2858 earlyclobber
= 1, this_earlyclobber
= 1;
2862 /* Match any floating double constant, but only if
2863 we can examine the bits of it reliably. */
2864 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
2865 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
2866 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
2868 if (GET_CODE (operand
) == CONST_DOUBLE
)
2873 if (GET_CODE (operand
) == CONST_DOUBLE
)
2879 if (GET_CODE (operand
) == CONST_DOUBLE
2880 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
2885 if (GET_CODE (operand
) == CONST_INT
2886 || (GET_CODE (operand
) == CONST_DOUBLE
2887 && GET_MODE (operand
) == VOIDmode
))
2890 if (CONSTANT_P (operand
)
2891 #ifdef LEGITIMATE_PIC_OPERAND_P
2892 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
2899 if (GET_CODE (operand
) == CONST_INT
2900 || (GET_CODE (operand
) == CONST_DOUBLE
2901 && GET_MODE (operand
) == VOIDmode
))
2913 if (GET_CODE (operand
) == CONST_INT
2914 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
2924 /* A PLUS is never a valid operand, but reload can make
2925 it from a register when eliminating registers. */
2926 && GET_CODE (operand
) != PLUS
2927 /* A SCRATCH is not a valid operand. */
2928 && GET_CODE (operand
) != SCRATCH
2929 #ifdef LEGITIMATE_PIC_OPERAND_P
2930 && (! CONSTANT_P (operand
)
2932 || LEGITIMATE_PIC_OPERAND_P (operand
))
2934 && (GENERAL_REGS
== ALL_REGS
2935 || GET_CODE (operand
) != REG
2936 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2937 && reg_renumber
[REGNO (operand
)] < 0)))
2939 /* Drop through into 'r' case */
2943 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
2946 #ifdef EXTRA_CONSTRAINT
2952 if (EXTRA_CONSTRAINT (operand
, c
))
2959 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
2962 if (GET_MODE (operand
) == BLKmode
)
2965 if (GET_CODE (operand
) == REG
2966 && reg_fits_class_p (operand
, this_alternative
[i
],
2967 offset
, GET_MODE (recog_operand
[i
])))
2974 /* If this operand could be handled with a reg,
2975 and some reg is allowed, then this operand can be handled. */
2976 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
2979 /* Record which operands fit this alternative. */
2980 this_alternative_earlyclobber
[i
] = earlyclobber
;
2981 if (win
&& ! force_reload
)
2982 this_alternative_win
[i
] = 1;
2985 this_alternative_offmemok
[i
] = offmemok
;
2989 /* Alternative loses if it has no regs for a reg operand. */
2990 if (GET_CODE (operand
) == REG
2991 && this_alternative
[i
] == (int) NO_REGS
2992 && this_alternative_matches
[i
] < 0)
2995 /* Alternative loses if it requires a type of reload not
2996 permitted for this insn. We can always reload SCRATCH
2997 and objects with a REG_UNUSED note. */
2998 if (GET_CODE (operand
) != SCRATCH
2999 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3000 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3002 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
)
3005 /* If this is a constant that is reloaded into the desired
3006 class by copying it to memory first, count that as another
3007 reload. This is consistent with other code and is
3008 required to avoid chosing another alternative when
3009 the constant is moved into memory by this function on
3010 an early reload pass. Note that the test here is
3011 precisely the same as in the code below that calls
3013 if (CONSTANT_P (operand
)
3014 && (PREFERRED_RELOAD_CLASS (operand
,
3015 (enum reg_class
) this_alternative
[i
])
3017 && this_alternative
[i
] != (int) NO_REGS
3018 && operand_mode
[i
] != VOIDmode
)
3021 /* We prefer to reload pseudos over reloading other things,
3022 since such reloads may be able to be eliminated later.
3023 If we are reloading a SCRATCH, we won't be generating any
3024 insns, just using a register, so it is also preferred.
3025 So bump REJECT in other cases. */
3026 if (! (GET_CODE (operand
) == REG
3027 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3028 && GET_CODE (operand
) != SCRATCH
)
3032 /* If this operand is a pseudo register that didn't get a hard
3033 reg and this alternative accepts some register, see if the
3034 class that we want is a subset of the preferred class for this
3035 register. If not, but it intersects that class, use the
3036 preferred class instead. If it does not intersect the preferred
3037 class, show that usage of this alternative should be discouraged;
3038 it will be discouraged more still if the register is `preferred
3039 or nothing'. We do this because it increases the chance of
3040 reusing our spill register in a later insn and avoiding a pair
3041 of memory stores and loads.
3043 Don't bother with this if this alternative will accept this
3046 Don't do this for a multiword operand, if
3047 we have to worry about small classes, because making reg groups
3048 harder to allocate is asking for trouble.
3050 Don't do this if the preferred class has only one register
3051 because we might otherwise exhaust the class. */
3054 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3055 #ifdef SMALL_REGISTER_CLASSES
3056 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3058 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3060 if (! reg_class_subset_p (this_alternative
[i
],
3061 preferred_class
[i
]))
3063 /* Since we don't have a way of forming the intersection,
3064 we just do something special if the preferred class
3065 is a subset of the class we have; that's the most
3066 common case anyway. */
3067 if (reg_class_subset_p (preferred_class
[i
],
3068 this_alternative
[i
]))
3069 this_alternative
[i
] = (int) preferred_class
[i
];
3071 reject
+= (1 + pref_or_nothing
[i
]);
3076 /* Now see if any output operands that are marked "earlyclobber"
3077 in this alternative conflict with any input operands
3078 or any memory addresses. */
3080 for (i
= 0; i
< noperands
; i
++)
3081 if (this_alternative_earlyclobber
[i
]
3082 && this_alternative_win
[i
])
3084 struct decomposition early_data
;
3086 early_data
= decompose (recog_operand
[i
]);
3088 if (modified
[i
] == RELOAD_READ
)
3090 if (this_insn_is_asm
)
3091 warning_for_asm (this_insn
,
3092 "`&' constraint used with input operand");
3098 if (this_alternative
[i
] == NO_REGS
)
3100 this_alternative_earlyclobber
[i
] = 0;
3101 if (this_insn_is_asm
)
3102 error_for_asm (this_insn
,
3103 "`&' constraint used with no register class");
3108 for (j
= 0; j
< noperands
; j
++)
3109 /* Is this an input operand or a memory ref? */
3110 if ((GET_CODE (recog_operand
[j
]) == MEM
3111 || modified
[j
] != RELOAD_WRITE
)
3113 /* Ignore things like match_operator operands. */
3114 && *constraints1
[j
] != 0
3115 /* Don't count an input operand that is constrained to match
3116 the early clobber operand. */
3117 && ! (this_alternative_matches
[j
] == i
3118 && rtx_equal_p (recog_operand
[i
], recog_operand
[j
]))
3119 /* Is it altered by storing the earlyclobber operand? */
3120 && !immune_p (recog_operand
[j
], recog_operand
[i
], early_data
))
3122 /* If the output is in a single-reg class,
3123 it's costly to reload it, so reload the input instead. */
3124 if (reg_class_size
[this_alternative
[i
]] == 1
3125 && (GET_CODE (recog_operand
[j
]) == REG
3126 || GET_CODE (recog_operand
[j
]) == SUBREG
))
3129 this_alternative_win
[j
] = 0;
3134 /* If an earlyclobber operand conflicts with something,
3135 it must be reloaded, so request this and count the cost. */
3139 this_alternative_win
[i
] = 0;
3140 for (j
= 0; j
< noperands
; j
++)
3141 if (this_alternative_matches
[j
] == i
3142 && this_alternative_win
[j
])
3144 this_alternative_win
[j
] = 0;
3150 /* If one alternative accepts all the operands, no reload required,
3151 choose that alternative; don't consider the remaining ones. */
3154 /* Unswap these so that they are never swapped at `finish'. */
3155 if (commutative
>= 0)
3157 recog_operand
[commutative
] = substed_operand
[commutative
];
3158 recog_operand
[commutative
+ 1]
3159 = substed_operand
[commutative
+ 1];
3161 for (i
= 0; i
< noperands
; i
++)
3163 goal_alternative_win
[i
] = 1;
3164 goal_alternative
[i
] = this_alternative
[i
];
3165 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3166 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3167 goal_alternative_earlyclobber
[i
]
3168 = this_alternative_earlyclobber
[i
];
3170 goal_alternative_number
= this_alternative_number
;
3171 goal_alternative_swapped
= swapped
;
3172 goal_earlyclobber
= this_earlyclobber
;
3176 /* REJECT, set by the ! and ? constraint characters and when a register
3177 would be reloaded into a non-preferred class, discourages the use of
3178 this alternative for a reload goal. REJECT is incremented by three
3179 for each ? and one for each non-preferred class. */
3180 losers
= losers
* 3 + reject
;
3182 /* If this alternative can be made to work by reloading,
3183 and it needs less reloading than the others checked so far,
3184 record it as the chosen goal for reloading. */
3185 if (! bad
&& best
> losers
)
3187 for (i
= 0; i
< noperands
; i
++)
3189 goal_alternative
[i
] = this_alternative
[i
];
3190 goal_alternative_win
[i
] = this_alternative_win
[i
];
3191 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3192 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3193 goal_alternative_earlyclobber
[i
]
3194 = this_alternative_earlyclobber
[i
];
3196 goal_alternative_swapped
= swapped
;
3198 goal_alternative_number
= this_alternative_number
;
3199 goal_earlyclobber
= this_earlyclobber
;
3203 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3204 then we need to try each alternative twice,
3205 the second time matching those two operands
3206 as if we had exchanged them.
3207 To do this, really exchange them in operands.
3209 If we have just tried the alternatives the second time,
3210 return operands to normal and drop through. */
3212 if (commutative
>= 0)
3217 register enum reg_class tclass
;
3220 recog_operand
[commutative
] = substed_operand
[commutative
+ 1];
3221 recog_operand
[commutative
+ 1] = substed_operand
[commutative
];
3223 tclass
= preferred_class
[commutative
];
3224 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3225 preferred_class
[commutative
+ 1] = tclass
;
3227 t
= pref_or_nothing
[commutative
];
3228 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3229 pref_or_nothing
[commutative
+ 1] = t
;
3231 bcopy (constraints1
, constraints
, noperands
* sizeof (char *));
3236 recog_operand
[commutative
] = substed_operand
[commutative
];
3237 recog_operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3241 /* The operands don't meet the constraints.
3242 goal_alternative describes the alternative
3243 that we could reach by reloading the fewest operands.
3244 Reload so as to fit it. */
3246 if (best
== MAX_RECOG_OPERANDS
+ 300)
3248 /* No alternative works with reloads?? */
3249 if (insn_code_number
>= 0)
3251 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3252 /* Avoid further trouble with this insn. */
3253 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3258 /* Jump to `finish' from above if all operands are valid already.
3259 In that case, goal_alternative_win is all 1. */
3262 /* Right now, for any pair of operands I and J that are required to match,
3264 goal_alternative_matches[J] is I.
3265 Set up goal_alternative_matched as the inverse function:
3266 goal_alternative_matched[I] = J. */
3268 for (i
= 0; i
< noperands
; i
++)
3269 goal_alternative_matched
[i
] = -1;
3271 for (i
= 0; i
< noperands
; i
++)
3272 if (! goal_alternative_win
[i
]
3273 && goal_alternative_matches
[i
] >= 0)
3274 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3276 /* If the best alternative is with operands 1 and 2 swapped,
3277 consider them swapped before reporting the reloads. Update the
3278 operand numbers of any reloads already pushed. */
3280 if (goal_alternative_swapped
)
3284 tem
= substed_operand
[commutative
];
3285 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3286 substed_operand
[commutative
+ 1] = tem
;
3287 tem
= recog_operand
[commutative
];
3288 recog_operand
[commutative
] = recog_operand
[commutative
+ 1];
3289 recog_operand
[commutative
+ 1] = tem
;
3291 for (i
= 0; i
< n_reloads
; i
++)
3293 if (reload_opnum
[i
] == commutative
)
3294 reload_opnum
[i
] = commutative
+ 1;
3295 else if (reload_opnum
[i
] == commutative
+ 1)
3296 reload_opnum
[i
] = commutative
;
3300 /* Perform whatever substitutions on the operands we are supposed
3301 to make due to commutativity or replacement of registers
3302 with equivalent constants or memory slots. */
3304 for (i
= 0; i
< noperands
; i
++)
3306 *recog_operand_loc
[i
] = substed_operand
[i
];
3307 /* While we are looping on operands, initialize this. */
3308 operand_reloadnum
[i
] = -1;
3310 /* If this is an earlyclobber operand, we need to widen the scope.
3311 The reload must remain valid from the start of the insn being
3312 reloaded until after the operand is stored into its destination.
3313 We approximate this with RELOAD_OTHER even though we know that we
3314 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3316 One special case that is worth checking is when we have an
3317 output that is earlyclobber but isn't used past the insn (typically
3318 a SCRATCH). In this case, we only need have the reload live
3319 through the insn itself, but not for any of our input or output
3322 In any case, anything needed to address this operand can remain
3323 however they were previously categorized. */
3325 if (goal_alternative_earlyclobber
[i
])
3327 = (find_reg_note (insn
, REG_UNUSED
, recog_operand
[i
])
3328 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3331 /* Any constants that aren't allowed and can't be reloaded
3332 into registers are here changed into memory references. */
3333 for (i
= 0; i
< noperands
; i
++)
3334 if (! goal_alternative_win
[i
]
3335 && CONSTANT_P (recog_operand
[i
])
3336 && (PREFERRED_RELOAD_CLASS (recog_operand
[i
],
3337 (enum reg_class
) goal_alternative
[i
])
3339 && operand_mode
[i
] != VOIDmode
)
3341 *recog_operand_loc
[i
] = recog_operand
[i
]
3342 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3344 i
, address_type
[i
], ind_levels
, 0);
3345 if (alternative_allows_memconst (constraints1
[i
],
3346 goal_alternative_number
))
3347 goal_alternative_win
[i
] = 1;
3350 /* Record the values of the earlyclobber operands for the caller. */
3351 if (goal_earlyclobber
)
3352 for (i
= 0; i
< noperands
; i
++)
3353 if (goal_alternative_earlyclobber
[i
])
3354 reload_earlyclobbers
[n_earlyclobbers
++] = recog_operand
[i
];
3356 /* Now record reloads for all the operands that need them. */
3357 for (i
= 0; i
< noperands
; i
++)
3358 if (! goal_alternative_win
[i
])
3360 /* Operands that match previous ones have already been handled. */
3361 if (goal_alternative_matches
[i
] >= 0)
3363 /* Handle an operand with a nonoffsettable address
3364 appearing where an offsettable address will do
3365 by reloading the address into a base register.
3367 ??? We can also do this when the operand is a register and
3368 reg_equiv_mem is not offsettable, but this is a bit tricky,
3369 so we don't bother with it. It may not be worth doing. */
3370 else if (goal_alternative_matched
[i
] == -1
3371 && goal_alternative_offmemok
[i
]
3372 && GET_CODE (recog_operand
[i
]) == MEM
)
3374 operand_reloadnum
[i
]
3375 = push_reload (XEXP (recog_operand
[i
], 0), NULL_RTX
,
3376 &XEXP (recog_operand
[i
], 0), NULL_PTR
,
3377 BASE_REG_CLASS
, GET_MODE (XEXP (recog_operand
[i
], 0)),
3378 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3379 reload_inc
[operand_reloadnum
[i
]]
3380 = GET_MODE_SIZE (GET_MODE (recog_operand
[i
]));
3382 /* If this operand is an output, we will have made any
3383 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3384 now we are treating part of the operand as an input, so
3385 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3387 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
)
3388 for (j
= 0; j
< n_reloads
; j
++)
3389 if (reload_opnum
[j
] == i
3390 && reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3391 reload_when_needed
[j
] = RELOAD_FOR_INPUT_ADDRESS
;
3393 else if (goal_alternative_matched
[i
] == -1)
3394 operand_reloadnum
[i
] =
3395 push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3396 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3397 (modified
[i
] != RELOAD_WRITE
?
3398 recog_operand_loc
[i
] : 0),
3399 modified
[i
] != RELOAD_READ
? recog_operand_loc
[i
] : 0,
3400 (enum reg_class
) goal_alternative
[i
],
3401 (modified
[i
] == RELOAD_WRITE
3402 ? VOIDmode
: operand_mode
[i
]),
3403 (modified
[i
] == RELOAD_READ
3404 ? VOIDmode
: operand_mode
[i
]),
3405 (insn_code_number
< 0 ? 0
3406 : insn_operand_strict_low
[insn_code_number
][i
]),
3407 0, i
, operand_type
[i
]);
3408 /* In a matching pair of operands, one must be input only
3409 and the other must be output only.
3410 Pass the input operand as IN and the other as OUT. */
3411 else if (modified
[i
] == RELOAD_READ
3412 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3414 operand_reloadnum
[i
]
3415 = push_reload (recog_operand
[i
],
3416 recog_operand
[goal_alternative_matched
[i
]],
3417 recog_operand_loc
[i
],
3418 recog_operand_loc
[goal_alternative_matched
[i
]],
3419 (enum reg_class
) goal_alternative
[i
],
3421 operand_mode
[goal_alternative_matched
[i
]],
3422 0, 0, i
, RELOAD_OTHER
);
3423 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3425 else if (modified
[i
] == RELOAD_WRITE
3426 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3428 operand_reloadnum
[goal_alternative_matched
[i
]]
3429 = push_reload (recog_operand
[goal_alternative_matched
[i
]],
3431 recog_operand_loc
[goal_alternative_matched
[i
]],
3432 recog_operand_loc
[i
],
3433 (enum reg_class
) goal_alternative
[i
],
3434 operand_mode
[goal_alternative_matched
[i
]],
3436 0, 0, i
, RELOAD_OTHER
);
3437 operand_reloadnum
[i
] = output_reloadnum
;
3439 else if (insn_code_number
>= 0)
3443 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3444 /* Avoid further trouble with this insn. */
3445 PATTERN (insn
) = gen_rtx (USE
, VOIDmode
, const0_rtx
);
3450 else if (goal_alternative_matched
[i
] < 0
3451 && goal_alternative_matches
[i
] < 0
3454 /* For each non-matching operand that's a MEM or a pseudo-register
3455 that didn't get a hard register, make an optional reload.
3456 This may get done even if the insn needs no reloads otherwise. */
3458 rtx operand
= recog_operand
[i
];
3460 while (GET_CODE (operand
) == SUBREG
)
3461 operand
= XEXP (operand
, 0);
3462 if ((GET_CODE (operand
) == MEM
3463 || (GET_CODE (operand
) == REG
3464 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3465 && (enum reg_class
) goal_alternative
[i
] != NO_REGS
3466 && ! no_input_reloads
3467 /* Optional output reloads don't do anything and we mustn't
3468 make in-out reloads on insns that are not permitted output
3470 && (modified
[i
] == RELOAD_READ
3471 || (modified
[i
] == RELOAD_READ_WRITE
&& ! no_output_reloads
)))
3472 operand_reloadnum
[i
]
3473 = push_reload (modified
[i
] != RELOAD_WRITE
? recog_operand
[i
] : 0,
3474 modified
[i
] != RELOAD_READ
? recog_operand
[i
] : 0,
3475 (modified
[i
] != RELOAD_WRITE
3476 ? recog_operand_loc
[i
] : 0),
3477 (modified
[i
] != RELOAD_READ
3478 ? recog_operand_loc
[i
] : 0),
3479 (enum reg_class
) goal_alternative
[i
],
3480 (modified
[i
] == RELOAD_WRITE
3481 ? VOIDmode
: operand_mode
[i
]),
3482 (modified
[i
] == RELOAD_READ
3483 ? VOIDmode
: operand_mode
[i
]),
3484 (insn_code_number
< 0 ? 0
3485 : insn_operand_strict_low
[insn_code_number
][i
]),
3486 1, i
, operand_type
[i
]);
3488 else if (goal_alternative_matches
[i
] >= 0
3489 && goal_alternative_win
[goal_alternative_matches
[i
]]
3490 && modified
[i
] == RELOAD_READ
3491 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3492 && ! no_input_reloads
&& ! no_output_reloads
3495 /* Similarly, make an optional reload for a pair of matching
3496 objects that are in MEM or a pseudo that didn't get a hard reg. */
3498 rtx operand
= recog_operand
[i
];
3500 while (GET_CODE (operand
) == SUBREG
)
3501 operand
= XEXP (operand
, 0);
3502 if ((GET_CODE (operand
) == MEM
3503 || (GET_CODE (operand
) == REG
3504 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3505 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3507 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3508 = push_reload (recog_operand
[goal_alternative_matches
[i
]],
3510 recog_operand_loc
[goal_alternative_matches
[i
]],
3511 recog_operand_loc
[i
],
3512 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3513 operand_mode
[goal_alternative_matches
[i
]],
3515 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3518 /* If this insn pattern contains any MATCH_DUP's, make sure that
3519 they will be substituted if the operands they match are substituted.
3520 Also do now any substitutions we already did on the operands.
3522 Don't do this if we aren't making replacements because we might be
3523 propagating things allocated by frame pointer elimination into places
3524 it doesn't expect. */
3526 if (insn_code_number
>= 0 && replace
)
3527 for (i
= insn_n_dups
[insn_code_number
] - 1; i
>= 0; i
--)
3529 int opno
= recog_dup_num
[i
];
3530 *recog_dup_loc
[i
] = *recog_operand_loc
[opno
];
3531 if (operand_reloadnum
[opno
] >= 0)
3532 push_replacement (recog_dup_loc
[i
], operand_reloadnum
[opno
],
3533 insn_operand_mode
[insn_code_number
][opno
]);
3537 /* This loses because reloading of prior insns can invalidate the equivalence
3538 (or at least find_equiv_reg isn't smart enough to find it any more),
3539 causing this insn to need more reload regs than it needed before.
3540 It may be too late to make the reload regs available.
3541 Now this optimization is done safely in choose_reload_regs. */
3543 /* For each reload of a reg into some other class of reg,
3544 search for an existing equivalent reg (same value now) in the right class.
3545 We can use it as long as we don't need to change its contents. */
3546 for (i
= 0; i
< n_reloads
; i
++)
3547 if (reload_reg_rtx
[i
] == 0
3548 && reload_in
[i
] != 0
3549 && GET_CODE (reload_in
[i
]) == REG
3550 && reload_out
[i
] == 0)
3553 = find_equiv_reg (reload_in
[i
], insn
, reload_reg_class
[i
], -1,
3554 static_reload_reg_p
, 0, reload_inmode
[i
]);
3555 /* Prevent generation of insn to load the value
3556 because the one we found already has the value. */
3557 if (reload_reg_rtx
[i
])
3558 reload_in
[i
] = reload_reg_rtx
[i
];
3562 /* Perhaps an output reload can be combined with another
3563 to reduce needs by one. */
3564 if (!goal_earlyclobber
)
3567 /* If we have a pair of reloads for parts of an address, they are reloading
3568 the same object, the operands themselves were not reloaded, and they
3569 are for two operands that are supposed to match, merge the reloads and
3570 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3572 for (i
= 0; i
< n_reloads
; i
++)
3576 for (j
= i
+ 1; j
< n_reloads
; j
++)
3577 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3578 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3579 && (reload_when_needed
[j
] == RELOAD_FOR_INPUT_ADDRESS
3580 || reload_when_needed
[j
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3581 && rtx_equal_p (reload_in
[i
], reload_in
[j
])
3582 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3583 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]])
3584 && (operand_reloadnum
[reload_opnum
[j
]] < 0
3585 || reload_optional
[operand_reloadnum
[reload_opnum
[j
]]])
3586 && (goal_alternative_matches
[reload_opnum
[i
]] == reload_opnum
[j
]
3587 || (goal_alternative_matches
[reload_opnum
[j
]]
3588 == reload_opnum
[i
])))
3590 for (k
= 0; k
< n_replacements
; k
++)
3591 if (replacements
[k
].what
== j
)
3592 replacements
[k
].what
= i
;
3594 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3599 /* Scan all the reloads and update their type.
3600 If a reload is for the address of an operand and we didn't reload
3601 that operand, change the type. Similarly, change the operand number
3602 of a reload when two operands match. If a reload is optional, treat it
3603 as though the operand isn't reloaded.
3605 ??? This latter case is somewhat odd because if we do the optional
3606 reload, it means the object is hanging around. Thus we need only
3607 do the address reload if the optional reload was NOT done.
3609 Change secondary reloads to be the address type of their operand, not
3612 If an operand's reload is now RELOAD_OTHER, change any
3613 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3614 RELOAD_FOR_OTHER_ADDRESS. */
3616 for (i
= 0; i
< n_reloads
; i
++)
3618 if (reload_secondary_p
[i
]
3619 && reload_when_needed
[i
] == operand_type
[reload_opnum
[i
]])
3620 reload_when_needed
[i
] = address_type
[reload_opnum
[i
]];
3622 if ((reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3623 || reload_when_needed
[i
] == RELOAD_FOR_OUTPUT_ADDRESS
)
3624 && (operand_reloadnum
[reload_opnum
[i
]] < 0
3625 || reload_optional
[operand_reloadnum
[reload_opnum
[i
]]]))
3626 reload_when_needed
[i
] = RELOAD_FOR_OPERAND_ADDRESS
;
3628 if (reload_when_needed
[i
] == RELOAD_FOR_INPUT_ADDRESS
3629 && operand_reloadnum
[reload_opnum
[i
]] >= 0
3630 && (reload_when_needed
[operand_reloadnum
[reload_opnum
[i
]]]
3632 reload_when_needed
[i
] = RELOAD_FOR_OTHER_ADDRESS
;
3634 if (goal_alternative_matches
[reload_opnum
[i
]] >= 0)
3635 reload_opnum
[i
] = goal_alternative_matches
[reload_opnum
[i
]];
3638 /* See if we have any reloads that are now allowed to be merged
3639 because we've changed when the reload is needed to
3640 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
3641 check for the most common cases. */
3643 for (i
= 0; i
< n_reloads
; i
++)
3644 if (reload_in
[i
] != 0 && reload_out
[i
] == 0
3645 && (reload_when_needed
[i
] == RELOAD_FOR_OPERAND_ADDRESS
3646 || reload_when_needed
[i
] == RELOAD_FOR_OTHER_ADDRESS
))
3647 for (j
= 0; j
< n_reloads
; j
++)
3648 if (i
!= j
&& reload_in
[j
] != 0 && reload_out
[j
] == 0
3649 && reload_when_needed
[j
] == reload_when_needed
[i
]
3650 && MATCHES (reload_in
[i
], reload_in
[j
])
3651 && reload_reg_class
[i
] == reload_reg_class
[j
]
3652 && !reload_nocombine
[i
] && !reload_nocombine
[j
]
3653 && reload_reg_rtx
[i
] == reload_reg_rtx
[j
])
3655 reload_opnum
[i
] = MIN (reload_opnum
[i
], reload_opnum
[j
]);
3656 transfer_replacements (i
, j
);
3660 #else /* no REGISTER_CONSTRAINTS */
3662 int insn_code_number
;
3663 int goal_earlyclobber
= 0; /* Always 0, to make combine_reloads happen. */
3665 rtx body
= PATTERN (insn
);
3669 n_earlyclobbers
= 0;
3670 replace_reloads
= replace
;
3673 /* Find what kind of insn this is. NOPERANDS gets number of operands.
3674 Store the operand values in RECOG_OPERAND and the locations
3675 of the words in the insn that point to them in RECOG_OPERAND_LOC.
3676 Return if the insn needs no reload processing. */
3678 switch (GET_CODE (body
))
3689 noperands
= asm_noperands (body
);
3692 /* This insn is an `asm' with operands.
3693 First, find out how many operands, and allocate space. */
3695 insn_code_number
= -1;
3696 /* ??? This is a bug! ???
3697 Give up and delete this insn if it has too many operands. */
3698 if (noperands
> MAX_RECOG_OPERANDS
)
3701 /* Now get the operand values out of the insn. */
3703 decode_asm_operands (body
, recog_operand
, recog_operand_loc
,
3704 NULL_PTR
, NULL_PTR
);
3709 /* Ordinary insn: recognize it, allocate space for operands and
3710 constraints, and get them out via insn_extract. */
3712 insn_code_number
= recog_memoized (insn
);
3713 noperands
= insn_n_operands
[insn_code_number
];
3714 insn_extract (insn
);
3720 for (i
= 0; i
< noperands
; i
++)
3722 register RTX_CODE code
= GET_CODE (recog_operand
[i
]);
3723 int is_set_dest
= GET_CODE (body
) == SET
&& (i
== 0);
3725 if (insn_code_number
>= 0)
3726 if (insn_operand_address_p
[insn_code_number
][i
])
3727 find_reloads_address (VOIDmode
, NULL_PTR
,
3728 recog_operand
[i
], recog_operand_loc
[i
],
3729 i
, RELOAD_FOR_INPUT
, ind_levels
);
3731 /* In these cases, we can't tell if the operand is an input
3732 or an output, so be conservative. In practice it won't be
3736 find_reloads_address (GET_MODE (recog_operand
[i
]),
3737 recog_operand_loc
[i
],
3738 XEXP (recog_operand
[i
], 0),
3739 &XEXP (recog_operand
[i
], 0),
3740 i
, RELOAD_OTHER
, ind_levels
);
3742 recog_operand
[i
] = *recog_operand_loc
[i
]
3743 = find_reloads_toplev (recog_operand
[i
], i
, RELOAD_OTHER
,
3744 ind_levels
, is_set_dest
);
3747 register int regno
= REGNO (recog_operand
[i
]);
3748 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3749 recog_operand
[i
] = *recog_operand_loc
[i
]
3750 = reg_equiv_constant
[regno
];
3751 #if 0 /* This might screw code in reload1.c to delete prior output-reload
3752 that feeds this insn. */
3753 if (reg_equiv_mem
[regno
] != 0)
3754 recog_operand
[i
] = *recog_operand_loc
[i
]
3755 = reg_equiv_mem
[regno
];
3760 /* Perhaps an output reload can be combined with another
3761 to reduce needs by one. */
3762 if (!goal_earlyclobber
)
3764 #endif /* no REGISTER_CONSTRAINTS */
3767 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
3768 accepts a memory operand with constant address. */
3771 alternative_allows_memconst (constraint
, altnum
)
3776 /* Skip alternatives before the one requested. */
3779 while (*constraint
++ != ',');
3782 /* Scan the requested alternative for 'm' or 'o'.
3783 If one of them is present, this alternative accepts memory constants. */
3784 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
3785 if (c
== 'm' || c
== 'o')
3790 /* Scan X for memory references and scan the addresses for reloading.
3791 Also checks for references to "constant" regs that we want to eliminate
3792 and replaces them with the values they stand for.
3793 We may alter X destructively if it contains a reference to such.
3794 If X is just a constant reg, we return the equivalent value
3797 IND_LEVELS says how many levels of indirect addressing this machine
3800 OPNUM and TYPE identify the purpose of the reload.
3802 IS_SET_DEST is true if X is the destination of a SET, which is not
3803 appropriate to be replaced by a constant. */
3806 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
)
3809 enum reload_type type
;
3813 register RTX_CODE code
= GET_CODE (x
);
3815 register char *fmt
= GET_RTX_FORMAT (code
);
3820 /* This code is duplicated for speed in find_reloads. */
3821 register int regno
= REGNO (x
);
3822 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
3823 x
= reg_equiv_constant
[regno
];
3825 /* This creates (subreg (mem...)) which would cause an unnecessary
3826 reload of the mem. */
3827 else if (reg_equiv_mem
[regno
] != 0)
3828 x
= reg_equiv_mem
[regno
];
3830 else if (reg_equiv_address
[regno
] != 0)
3832 /* If reg_equiv_address varies, it may be shared, so copy it. */
3833 rtx addr
= reg_equiv_address
[regno
];
3835 if (rtx_varies_p (addr
))
3836 addr
= copy_rtx (addr
);
3838 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3839 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3840 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3842 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3849 find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
3850 opnum
, type
, ind_levels
);
3854 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
3856 /* Check for SUBREG containing a REG that's equivalent to a constant.
3857 If the constant has a known value, truncate it right now.
3858 Similarly if we are extracting a single-word of a multi-word
3859 constant. If the constant is symbolic, allow it to be substituted
3860 normally. push_reload will strip the subreg later. If the
3861 constant is VOIDmode, abort because we will lose the mode of
3862 the register (this should never happen because one of the cases
3863 above should handle it). */
3865 register int regno
= REGNO (SUBREG_REG (x
));
3868 if (subreg_lowpart_p (x
)
3869 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3870 && reg_equiv_constant
[regno
] != 0
3871 && (tem
= gen_lowpart_common (GET_MODE (x
),
3872 reg_equiv_constant
[regno
])) != 0)
3875 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
3876 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3877 && reg_equiv_constant
[regno
] != 0
3878 && (tem
= operand_subword (reg_equiv_constant
[regno
],
3880 GET_MODE (SUBREG_REG (x
)))) != 0)
3883 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
3884 && reg_equiv_constant
[regno
] != 0
3885 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
3888 /* If the subreg contains a reg that will be converted to a mem,
3889 convert the subreg to a narrower memref now.
3890 Otherwise, we would get (subreg (mem ...) ...),
3891 which would force reload of the mem.
3893 We also need to do this if there is an equivalent MEM that is
3894 not offsettable. In that case, alter_subreg would produce an
3895 invalid address on big-endian machines.
3897 For machines that extend byte loads, we must not reload using
3898 a wider mode if we have a paradoxical SUBREG. find_reloads will
3899 force a reload in that case. So we should not do anything here. */
3901 else if (regno
>= FIRST_PSEUDO_REGISTER
3902 #ifdef LOAD_EXTEND_OP
3903 && (GET_MODE_SIZE (GET_MODE (x
))
3904 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
3906 && (reg_equiv_address
[regno
] != 0
3907 || (reg_equiv_mem
[regno
] != 0
3908 && (! strict_memory_address_p (GET_MODE (x
),
3909 XEXP (reg_equiv_mem
[regno
], 0))
3910 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))))
3912 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
3913 rtx addr
= (reg_equiv_address
[regno
] ? reg_equiv_address
[regno
]
3914 : XEXP (reg_equiv_mem
[regno
], 0));
3915 #if BYTES_BIG_ENDIAN
3917 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
3918 offset
+= MIN (size
, UNITS_PER_WORD
);
3919 size
= GET_MODE_SIZE (GET_MODE (x
));
3920 offset
-= MIN (size
, UNITS_PER_WORD
);
3922 addr
= plus_constant (addr
, offset
);
3923 x
= gen_rtx (MEM
, GET_MODE (x
), addr
);
3924 RTX_UNCHANGING_P (x
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3925 find_reloads_address (GET_MODE (x
), NULL_PTR
,
3927 &XEXP (x
, 0), opnum
, type
, ind_levels
);
3932 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
3935 XEXP (x
, i
) = find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
3936 ind_levels
, is_set_dest
);
3941 /* Return a mem ref for the memory equivalent of reg REGNO.
3942 This mem ref is not shared with anything. */
3945 make_memloc (ad
, regno
)
3950 rtx tem
= reg_equiv_address
[regno
];
3952 #if 0 /* We cannot safely reuse a memloc made here;
3953 if the pseudo appears twice, and its mem needs a reload,
3954 it gets two separate reloads assigned, but it only
3955 gets substituted with the second of them;
3956 then it can get used before that reload reg gets loaded up. */
3957 for (i
= 0; i
< n_memlocs
; i
++)
3958 if (rtx_equal_p (tem
, XEXP (memlocs
[i
], 0)))
3962 /* If TEM might contain a pseudo, we must copy it to avoid
3963 modifying it when we do the substitution for the reload. */
3964 if (rtx_varies_p (tem
))
3965 tem
= copy_rtx (tem
);
3967 tem
= gen_rtx (MEM
, GET_MODE (ad
), tem
);
3968 RTX_UNCHANGING_P (tem
) = RTX_UNCHANGING_P (regno_reg_rtx
[regno
]);
3969 memlocs
[n_memlocs
++] = tem
;
3973 /* Record all reloads needed for handling memory address AD
3974 which appears in *LOC in a memory reference to mode MODE
3975 which itself is found in location *MEMREFLOC.
3976 Note that we take shortcuts assuming that no multi-reg machine mode
3977 occurs as part of an address.
3979 OPNUM and TYPE specify the purpose of this reload.
3981 IND_LEVELS says how many levels of indirect addressing this machine
3984 Value is nonzero if this address is reloaded or replaced as a whole.
3985 This is interesting to the caller if the address is an autoincrement.
3987 Note that there is no verification that the address will be valid after
3988 this routine does its work. Instead, we rely on the fact that the address
3989 was valid when reload started. So we need only undo things that reload
3990 could have broken. These are wrong register types, pseudos not allocated
3991 to a hard register, and frame pointer elimination. */
3994 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
)
3995 enum machine_mode mode
;
4000 enum reload_type type
;
4006 /* If the address is a register, see if it is a legitimate address and
4007 reload if not. We first handle the cases where we need not reload
4008 or where we must reload in a non-standard way. */
4010 if (GET_CODE (ad
) == REG
)
4014 if (reg_equiv_constant
[regno
] != 0
4015 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4017 *loc
= ad
= reg_equiv_constant
[regno
];
4021 else if (reg_equiv_address
[regno
] != 0)
4023 tem
= make_memloc (ad
, regno
);
4024 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4025 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4026 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4027 GET_MODE (ad
), VOIDmode
, 0, 0,
4032 /* We can avoid a reload if the register's equivalent memory expression
4033 is valid as an indirect memory address.
4034 But not all addresses are valid in a mem used as an indirect address:
4035 only reg or reg+constant. */
4037 else if (reg_equiv_mem
[regno
] != 0 && ind_levels
> 0
4038 && strict_memory_address_p (mode
, reg_equiv_mem
[regno
])
4039 && (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == REG
4040 || (GET_CODE (XEXP (reg_equiv_mem
[regno
], 0)) == PLUS
4041 && GET_CODE (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)) == REG
4042 && CONSTANT_P (XEXP (XEXP (reg_equiv_mem
[regno
], 0), 0)))))
4045 /* The only remaining case where we can avoid a reload is if this is a
4046 hard register that is valid as a base register and which is not the
4047 subject of a CLOBBER in this insn. */
4049 else if (regno
< FIRST_PSEUDO_REGISTER
&& REGNO_OK_FOR_BASE_P (regno
)
4050 && ! regno_clobbered_p (regno
, this_insn
))
4053 /* If we do not have one of the cases above, we must do the reload. */
4054 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4055 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4059 if (strict_memory_address_p (mode
, ad
))
4061 /* The address appears valid, so reloads are not needed.
4062 But the address may contain an eliminable register.
4063 This can happen because a machine with indirect addressing
4064 may consider a pseudo register by itself a valid address even when
4065 it has failed to get a hard reg.
4066 So do a tree-walk to find and eliminate all such regs. */
4068 /* But first quickly dispose of a common case. */
4069 if (GET_CODE (ad
) == PLUS
4070 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4071 && GET_CODE (XEXP (ad
, 0)) == REG
4072 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4075 subst_reg_equivs_changed
= 0;
4076 *loc
= subst_reg_equivs (ad
);
4078 if (! subst_reg_equivs_changed
)
4081 /* Check result for validity after substitution. */
4082 if (strict_memory_address_p (mode
, ad
))
4086 /* The address is not valid. We have to figure out why. One possibility
4087 is that it is itself a MEM. This can happen when the frame pointer is
4088 being eliminated, a pseudo is not allocated to a hard register, and the
4089 offset between the frame and stack pointers is not its initial value.
4090 In that case the pseudo will have been replaced by a MEM referring to
4091 the stack pointer. */
4092 if (GET_CODE (ad
) == MEM
)
4094 /* First ensure that the address in this MEM is valid. Then, unless
4095 indirect addresses are valid, reload the MEM into a register. */
4097 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4098 opnum
, type
, ind_levels
== 0 ? 0 : ind_levels
- 1);
4100 /* If tem was changed, then we must create a new memory reference to
4101 hold it and store it back into memrefloc. */
4102 if (tem
!= ad
&& memrefloc
)
4104 *memrefloc
= copy_rtx (*memrefloc
);
4105 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4106 loc
= &XEXP (*memrefloc
, 0);
4109 /* Check similar cases as for indirect addresses as above except
4110 that we can allow pseudos and a MEM since they should have been
4111 taken care of above. */
4114 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4115 || GET_CODE (XEXP (tem
, 0)) == MEM
4116 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4117 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4118 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4119 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4121 /* Must use TEM here, not AD, since it is the one that will
4122 have any subexpressions reloaded, if needed. */
4123 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4124 BASE_REG_CLASS
, GET_MODE (tem
), VOIDmode
, 0,
4132 /* If we have address of a stack slot but it's not valid
4133 (displacement is too large), compute the sum in a register. */
4134 else if (GET_CODE (ad
) == PLUS
4135 && (XEXP (ad
, 0) == frame_pointer_rtx
4136 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4137 || XEXP (ad
, 0) == hard_frame_pointer_rtx
4139 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4140 || XEXP (ad
, 0) == arg_pointer_rtx
4142 || XEXP (ad
, 0) == stack_pointer_rtx
)
4143 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4145 /* Unshare the MEM rtx so we can safely alter it. */
4148 rtx oldref
= *memrefloc
;
4149 *memrefloc
= copy_rtx (*memrefloc
);
4150 loc
= &XEXP (*memrefloc
, 0);
4152 if (double_reg_address_ok
)
4154 /* Unshare the sum as well. */
4155 *loc
= ad
= copy_rtx (ad
);
4156 /* Reload the displacement into an index reg.
4157 We assume the frame pointer or arg pointer is a base reg. */
4158 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4159 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4164 /* If the sum of two regs is not necessarily valid,
4165 reload the sum into a base reg.
4166 That will at least work. */
4167 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
,
4168 opnum
, type
, ind_levels
);
4173 /* If we have an indexed stack slot, there are three possible reasons why
4174 it might be invalid: The index might need to be reloaded, the address
4175 might have been made by frame pointer elimination and hence have a
4176 constant out of range, or both reasons might apply.
4178 We can easily check for an index needing reload, but even if that is the
4179 case, we might also have an invalid constant. To avoid making the
4180 conservative assumption and requiring two reloads, we see if this address
4181 is valid when not interpreted strictly. If it is, the only problem is
4182 that the index needs a reload and find_reloads_address_1 will take care
4185 There is still a case when we might generate an extra reload,
4186 however. In certain cases eliminate_regs will return a MEM for a REG
4187 (see the code there for details). In those cases, memory_address_p
4188 applied to our address will return 0 so we will think that our offset
4189 must be too large. But it might indeed be valid and the only problem
4190 is that a MEM is present where a REG should be. This case should be
4191 very rare and there doesn't seem to be any way to avoid it.
4193 If we decide to do something here, it must be that
4194 `double_reg_address_ok' is true and that this address rtl was made by
4195 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4196 rework the sum so that the reload register will be added to the index.
4197 This is safe because we know the address isn't shared.
4199 We check for fp/ap/sp as both the first and second operand of the
4202 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4203 && GET_CODE (XEXP (ad
, 0)) == PLUS
4204 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4205 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4206 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4208 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4209 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4211 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4212 && ! memory_address_p (mode
, ad
))
4214 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4215 plus_constant (XEXP (XEXP (ad
, 0), 0),
4216 INTVAL (XEXP (ad
, 1))),
4217 XEXP (XEXP (ad
, 0), 1));
4218 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4219 GET_MODE (ad
), opnum
, type
, ind_levels
);
4220 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4225 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4226 && GET_CODE (XEXP (ad
, 0)) == PLUS
4227 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4228 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4229 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4231 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4232 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4234 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4235 && ! memory_address_p (mode
, ad
))
4237 *loc
= ad
= gen_rtx (PLUS
, GET_MODE (ad
),
4238 plus_constant (XEXP (XEXP (ad
, 0), 1),
4239 INTVAL (XEXP (ad
, 1))),
4240 XEXP (XEXP (ad
, 0), 0));
4241 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4242 GET_MODE (ad
), opnum
, type
, ind_levels
);
4243 find_reloads_address_1 (XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
, type
, 0);
4248 /* See if address becomes valid when an eliminable register
4249 in a sum is replaced. */
4252 if (GET_CODE (ad
) == PLUS
)
4253 tem
= subst_indexed_address (ad
);
4254 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4256 /* Ok, we win that way. Replace any additional eliminable
4259 subst_reg_equivs_changed
= 0;
4260 tem
= subst_reg_equivs (tem
);
4262 /* Make sure that didn't make the address invalid again. */
4264 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4271 /* If constants aren't valid addresses, reload the constant address
4273 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4275 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4276 Unshare it so we can safely alter it. */
4277 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4278 && CONSTANT_POOL_ADDRESS_P (ad
))
4280 rtx oldref
= *memrefloc
;
4281 *memrefloc
= copy_rtx (*memrefloc
);
4282 loc
= &XEXP (*memrefloc
, 0);
4285 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4290 return find_reloads_address_1 (ad
, 0, loc
, opnum
, type
, ind_levels
);
4293 /* Find all pseudo regs appearing in AD
4294 that are eliminable in favor of equivalent values
4295 and do not have hard regs; replace them by their equivalents. */
4298 subst_reg_equivs (ad
)
4301 register RTX_CODE code
= GET_CODE (ad
);
4319 register int regno
= REGNO (ad
);
4321 if (reg_equiv_constant
[regno
] != 0)
4323 subst_reg_equivs_changed
= 1;
4324 return reg_equiv_constant
[regno
];
4330 /* Quickly dispose of a common case. */
4331 if (XEXP (ad
, 0) == frame_pointer_rtx
4332 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4336 fmt
= GET_RTX_FORMAT (code
);
4337 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4339 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
));
4343 /* Compute the sum of X and Y, making canonicalizations assumed in an
4344 address, namely: sum constant integers, surround the sum of two
4345 constants with a CONST, put the constant as the second operand, and
4346 group the constant on the outermost sum.
4348 This routine assumes both inputs are already in canonical form. */
4355 enum machine_mode mode
= GET_MODE (x
);
4357 if (mode
== VOIDmode
)
4358 mode
= GET_MODE (y
);
4360 if (mode
== VOIDmode
)
4363 if (GET_CODE (x
) == CONST_INT
)
4364 return plus_constant (y
, INTVAL (x
));
4365 else if (GET_CODE (y
) == CONST_INT
)
4366 return plus_constant (x
, INTVAL (y
));
4367 else if (CONSTANT_P (x
))
4368 tem
= x
, x
= y
, y
= tem
;
4370 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4371 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4373 /* Note that if the operands of Y are specified in the opposite
4374 order in the recursive calls below, infinite recursion will occur. */
4375 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4376 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4378 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4379 constant will have been placed second. */
4380 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4382 if (GET_CODE (x
) == CONST
)
4384 if (GET_CODE (y
) == CONST
)
4387 return gen_rtx (CONST
, VOIDmode
, gen_rtx (PLUS
, mode
, x
, y
));
4390 return gen_rtx (PLUS
, mode
, x
, y
);
4393 /* If ADDR is a sum containing a pseudo register that should be
4394 replaced with a constant (from reg_equiv_constant),
4395 return the result of doing so, and also apply the associative
4396 law so that the result is more likely to be a valid address.
4397 (But it is not guaranteed to be one.)
4399 Note that at most one register is replaced, even if more are
4400 replaceable. Also, we try to put the result into a canonical form
4401 so it is more likely to be a valid address.
4403 In all other cases, return ADDR. */
4406 subst_indexed_address (addr
)
4409 rtx op0
= 0, op1
= 0, op2
= 0;
4413 if (GET_CODE (addr
) == PLUS
)
4415 /* Try to find a register to replace. */
4416 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4417 if (GET_CODE (op0
) == REG
4418 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4419 && reg_renumber
[regno
] < 0
4420 && reg_equiv_constant
[regno
] != 0)
4421 op0
= reg_equiv_constant
[regno
];
4422 else if (GET_CODE (op1
) == REG
4423 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4424 && reg_renumber
[regno
] < 0
4425 && reg_equiv_constant
[regno
] != 0)
4426 op1
= reg_equiv_constant
[regno
];
4427 else if (GET_CODE (op0
) == PLUS
4428 && (tem
= subst_indexed_address (op0
)) != op0
)
4430 else if (GET_CODE (op1
) == PLUS
4431 && (tem
= subst_indexed_address (op1
)) != op1
)
4436 /* Pick out up to three things to add. */
4437 if (GET_CODE (op1
) == PLUS
)
4438 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4439 else if (GET_CODE (op0
) == PLUS
)
4440 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4442 /* Compute the sum. */
4444 op1
= form_sum (op1
, op2
);
4446 op0
= form_sum (op0
, op1
);
4453 /* Record the pseudo registers we must reload into hard registers
4454 in a subexpression of a would-be memory address, X.
4455 (This function is not called if the address we find is strictly valid.)
4456 CONTEXT = 1 means we are considering regs as index regs,
4457 = 0 means we are considering them as base regs.
4459 OPNUM and TYPE specify the purpose of any reloads made.
4461 IND_LEVELS says how many levels of indirect addressing are
4462 supported at this point in the address.
4464 We return nonzero if X, as a whole, is reloaded or replaced. */
4466 /* Note that we take shortcuts assuming that no multi-reg machine mode
4467 occurs as part of an address.
4468 Also, this is not fully machine-customizable; it works for machines
4469 such as vaxes and 68000's and 32000's, but other possible machines
4470 could have addressing modes that this does not handle right. */
4473 find_reloads_address_1 (x
, context
, loc
, opnum
, type
, ind_levels
)
4478 enum reload_type type
;
4481 register RTX_CODE code
= GET_CODE (x
);
4485 register rtx orig_op0
= XEXP (x
, 0);
4486 register rtx orig_op1
= XEXP (x
, 1);
4487 register RTX_CODE code0
= GET_CODE (orig_op0
);
4488 register RTX_CODE code1
= GET_CODE (orig_op1
);
4489 register rtx op0
= orig_op0
;
4490 register rtx op1
= orig_op1
;
4492 if (GET_CODE (op0
) == SUBREG
)
4494 op0
= SUBREG_REG (op0
);
4495 code0
= GET_CODE (op0
);
4497 if (GET_CODE (op1
) == SUBREG
)
4499 op1
= SUBREG_REG (op1
);
4500 code1
= GET_CODE (op1
);
4503 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code1
== MEM
)
4505 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4507 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4510 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code0
== MEM
)
4512 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4514 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4517 else if (code0
== CONST_INT
|| code0
== CONST
4518 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
4519 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
, ind_levels
);
4520 else if (code1
== CONST_INT
|| code1
== CONST
4521 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
4522 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
, ind_levels
);
4523 else if (code0
== REG
&& code1
== REG
)
4525 if (REG_OK_FOR_INDEX_P (op0
)
4526 && REG_OK_FOR_BASE_P (op1
))
4528 else if (REG_OK_FOR_INDEX_P (op1
)
4529 && REG_OK_FOR_BASE_P (op0
))
4531 else if (REG_OK_FOR_BASE_P (op1
))
4532 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4534 else if (REG_OK_FOR_BASE_P (op0
))
4535 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4537 else if (REG_OK_FOR_INDEX_P (op1
))
4538 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4540 else if (REG_OK_FOR_INDEX_P (op0
))
4541 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4545 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4547 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4551 else if (code0
== REG
)
4553 find_reloads_address_1 (orig_op0
, 1, &XEXP (x
, 0), opnum
, type
,
4555 find_reloads_address_1 (orig_op1
, 0, &XEXP (x
, 1), opnum
, type
,
4558 else if (code1
== REG
)
4560 find_reloads_address_1 (orig_op1
, 1, &XEXP (x
, 1), opnum
, type
,
4562 find_reloads_address_1 (orig_op0
, 0, &XEXP (x
, 0), opnum
, type
,
4566 else if (code
== POST_INC
|| code
== POST_DEC
4567 || code
== PRE_INC
|| code
== PRE_DEC
)
4569 if (GET_CODE (XEXP (x
, 0)) == REG
)
4571 register int regno
= REGNO (XEXP (x
, 0));
4575 /* A register that is incremented cannot be constant! */
4576 if (regno
>= FIRST_PSEUDO_REGISTER
4577 && reg_equiv_constant
[regno
] != 0)
4580 /* Handle a register that is equivalent to a memory location
4581 which cannot be addressed directly. */
4582 if (reg_equiv_address
[regno
] != 0)
4584 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
4585 /* First reload the memory location's address. */
4586 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
4587 &XEXP (tem
, 0), opnum
, type
, ind_levels
);
4588 /* Put this inside a new increment-expression. */
4589 x
= gen_rtx (GET_CODE (x
), GET_MODE (x
), tem
);
4590 /* Proceed to reload that, as if it contained a register. */
4593 /* If we have a hard register that is ok as an index,
4594 don't make a reload. If an autoincrement of a nice register
4595 isn't "valid", it must be that no autoincrement is "valid".
4596 If that is true and something made an autoincrement anyway,
4597 this must be a special context where one is allowed.
4598 (For example, a "push" instruction.)
4599 We can't improve this address, so leave it alone. */
4601 /* Otherwise, reload the autoincrement into a suitable hard reg
4602 and record how much to increment by. */
4604 if (reg_renumber
[regno
] >= 0)
4605 regno
= reg_renumber
[regno
];
4606 if ((regno
>= FIRST_PSEUDO_REGISTER
4607 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4608 : REGNO_OK_FOR_BASE_P (regno
))))
4613 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4614 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4615 GET_MODE (x
), GET_MODE (x
), VOIDmode
, 0,
4617 reload_inc
[reloadnum
]
4618 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
4623 /* Update the REG_INC notes. */
4625 for (link
= REG_NOTES (this_insn
);
4626 link
; link
= XEXP (link
, 1))
4627 if (REG_NOTE_KIND (link
) == REG_INC
4628 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
4629 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4634 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
4636 /* This is probably the result of a substitution, by eliminate_regs,
4637 of an equivalent address for a pseudo that was not allocated to a
4638 hard register. Verify that the specified address is valid and
4639 reload it into a register. */
4640 rtx tem
= XEXP (x
, 0);
4644 /* Since we know we are going to reload this item, don't decrement
4645 for the indirection level.
4647 Note that this is actually conservative: it would be slightly
4648 more efficient to use the value of SPILL_INDIRECT_LEVELS from
4650 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
4651 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
4652 opnum
, type
, ind_levels
);
4654 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4655 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4656 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4657 reload_inc
[reloadnum
]
4658 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
4660 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
4662 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
4667 else if (code
== MEM
)
4669 /* This is probably the result of a substitution, by eliminate_regs,
4670 of an equivalent address for a pseudo that was not allocated to a
4671 hard register. Verify that the specified address is valid and reload
4674 Since we know we are going to reload this item, don't decrement
4675 for the indirection level.
4677 Note that this is actually conservative: it would be slightly more
4678 efficient to use the value of SPILL_INDIRECT_LEVELS from
4681 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
4682 opnum
, type
, ind_levels
);
4684 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
4685 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4686 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4689 else if (code
== REG
)
4691 register int regno
= REGNO (x
);
4693 if (reg_equiv_constant
[regno
] != 0)
4695 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
4696 (context
? INDEX_REG_CLASS
4698 GET_MODE (x
), opnum
, type
, ind_levels
);
4702 #if 0 /* This might screw code in reload1.c to delete prior output-reload
4703 that feeds this insn. */
4704 if (reg_equiv_mem
[regno
] != 0)
4706 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
4707 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4708 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4712 if (reg_equiv_address
[regno
] != 0)
4714 x
= make_memloc (x
, regno
);
4715 find_reloads_address (GET_MODE (x
), 0, XEXP (x
, 0), &XEXP (x
, 0),
4716 opnum
, type
, ind_levels
);
4719 if (reg_renumber
[regno
] >= 0)
4720 regno
= reg_renumber
[regno
];
4721 if ((regno
>= FIRST_PSEUDO_REGISTER
4722 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
4723 : REGNO_OK_FOR_BASE_P (regno
))))
4725 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4726 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4727 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4731 /* If a register appearing in an address is the subject of a CLOBBER
4732 in this insn, reload it into some other register to be safe.
4733 The CLOBBER is supposed to make the register unavailable
4734 from before this insn to after it. */
4735 if (regno_clobbered_p (regno
, this_insn
))
4737 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
4738 context
? INDEX_REG_CLASS
: BASE_REG_CLASS
,
4739 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
4745 register char *fmt
= GET_RTX_FORMAT (code
);
4747 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4750 find_reloads_address_1 (XEXP (x
, i
), context
, &XEXP (x
, i
),
4751 opnum
, type
, ind_levels
);
4758 /* X, which is found at *LOC, is a part of an address that needs to be
4759 reloaded into a register of class CLASS. If X is a constant, or if
4760 X is a PLUS that contains a constant, check that the constant is a
4761 legitimate operand and that we are supposed to be able to load
4762 it into the register.
4764 If not, force the constant into memory and reload the MEM instead.
4766 MODE is the mode to use, in case X is an integer constant.
4768 OPNUM and TYPE describe the purpose of any reloads made.
4770 IND_LEVELS says how many levels of indirect addressing this machine
4774 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
4777 enum reg_class
class;
4778 enum machine_mode mode
;
4780 enum reload_type type
;
4784 && (! LEGITIMATE_CONSTANT_P (x
)
4785 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
4787 rtx tem
= x
= force_const_mem (mode
, x
);
4788 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4789 opnum
, type
, ind_levels
);
4792 else if (GET_CODE (x
) == PLUS
4793 && CONSTANT_P (XEXP (x
, 1))
4794 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
4795 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
4797 rtx tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
4799 x
= gen_rtx (PLUS
, GET_MODE (x
), XEXP (x
, 0), tem
);
4800 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
4801 opnum
, type
, ind_levels
);
4804 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
4805 mode
, VOIDmode
, 0, 0, opnum
, type
);
4808 /* Substitute into the current INSN the registers into which we have reloaded
4809 the things that need reloading. The array `replacements'
4810 says contains the locations of all pointers that must be changed
4811 and says what to replace them with.
4813 Return the rtx that X translates into; usually X, but modified. */
4820 for (i
= 0; i
< n_replacements
; i
++)
4822 register struct replacement
*r
= &replacements
[i
];
4823 register rtx reloadreg
= reload_reg_rtx
[r
->what
];
4826 /* Encapsulate RELOADREG so its machine mode matches what
4827 used to be there. Note that gen_lowpart_common will
4828 do the wrong thing if RELOADREG is multi-word. RELOADREG
4829 will always be a REG here. */
4830 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
4831 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4833 /* If we are putting this into a SUBREG and RELOADREG is a
4834 SUBREG, we would be making nested SUBREGs, so we have to fix
4835 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
4837 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
4839 if (GET_MODE (*r
->subreg_loc
)
4840 == GET_MODE (SUBREG_REG (reloadreg
)))
4841 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
4844 *r
->where
= SUBREG_REG (reloadreg
);
4845 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
4849 *r
->where
= reloadreg
;
4851 /* If reload got no reg and isn't optional, something's wrong. */
4852 else if (! reload_optional
[r
->what
])
4857 /* Make a copy of any replacements being done into X and move those copies
4858 to locations in Y, a copy of X. We only look at the highest level of
4862 copy_replacements (x
, y
)
4867 enum rtx_code code
= GET_CODE (x
);
4868 char *fmt
= GET_RTX_FORMAT (code
);
4869 struct replacement
*r
;
4871 /* We can't support X being a SUBREG because we might then need to know its
4872 location if something inside it was replaced. */
4876 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4878 for (j
= 0; j
< n_replacements
; j
++)
4880 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
4882 r
= &replacements
[n_replacements
++];
4883 r
->where
= replacements
[j
].where
;
4884 r
->subreg_loc
= &XEXP (y
, i
);
4885 r
->what
= replacements
[j
].what
;
4886 r
->mode
= replacements
[j
].mode
;
4888 else if (replacements
[j
].where
== &XEXP (x
, i
))
4890 r
= &replacements
[n_replacements
++];
4891 r
->where
= &XEXP (y
, i
);
4893 r
->what
= replacements
[j
].what
;
4894 r
->mode
= replacements
[j
].mode
;
4899 /* If LOC was scheduled to be replaced by something, return the replacement.
4900 Otherwise, return *LOC. */
4903 find_replacement (loc
)
4906 struct replacement
*r
;
4908 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
4910 rtx reloadreg
= reload_reg_rtx
[r
->what
];
4912 if (reloadreg
&& r
->where
== loc
)
4914 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
4915 reloadreg
= gen_rtx (REG
, r
->mode
, REGNO (reloadreg
));
4919 else if (reloadreg
&& r
->subreg_loc
== loc
)
4921 /* RELOADREG must be either a REG or a SUBREG.
4923 ??? Is it actually still ever a SUBREG? If so, why? */
4925 if (GET_CODE (reloadreg
) == REG
)
4926 return gen_rtx (REG
, GET_MODE (*loc
),
4927 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
4928 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
4931 return gen_rtx (SUBREG
, GET_MODE (*loc
), SUBREG_REG (reloadreg
),
4932 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
4939 /* Return nonzero if register in range [REGNO, ENDREGNO)
4940 appears either explicitly or implicitly in X
4941 other than being stored into (except for earlyclobber operands).
4943 References contained within the substructure at LOC do not count.
4944 LOC may be zero, meaning don't ignore anything.
4946 This is similar to refers_to_regno_p in rtlanal.c except that we
4947 look at equivalences for pseudos that didn't get hard registers. */
4950 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
4951 int regno
, endregno
;
4956 register RTX_CODE code
;
4963 code
= GET_CODE (x
);
4970 /* If this is a pseudo, a hard register must not have been allocated.
4971 X must therefore either be a constant or be in memory. */
4972 if (i
>= FIRST_PSEUDO_REGISTER
)
4974 if (reg_equiv_memory_loc
[i
])
4975 return refers_to_regno_for_reload_p (regno
, endregno
,
4976 reg_equiv_memory_loc
[i
],
4979 if (reg_equiv_constant
[i
])
4985 return (endregno
> i
4986 && regno
< i
+ (i
< FIRST_PSEUDO_REGISTER
4987 ? HARD_REGNO_NREGS (i
, GET_MODE (x
))
4991 /* If this is a SUBREG of a hard reg, we can see exactly which
4992 registers are being modified. Otherwise, handle normally. */
4993 if (GET_CODE (SUBREG_REG (x
)) == REG
4994 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
4996 int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
4998 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
4999 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5001 return endregno
> inner_regno
&& regno
< inner_endregno
;
5007 if (&SET_DEST (x
) != loc
5008 /* Note setting a SUBREG counts as referring to the REG it is in for
5009 a pseudo but not for hard registers since we can
5010 treat each word individually. */
5011 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5012 && loc
!= &SUBREG_REG (SET_DEST (x
))
5013 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5014 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5015 && refers_to_regno_for_reload_p (regno
, endregno
,
5016 SUBREG_REG (SET_DEST (x
)),
5018 /* If the ouput is an earlyclobber operand, this is
5020 || ((GET_CODE (SET_DEST (x
)) != REG
5021 || earlyclobber_operand_p (SET_DEST (x
)))
5022 && refers_to_regno_for_reload_p (regno
, endregno
,
5023 SET_DEST (x
), loc
))))
5026 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5032 /* X does not match, so try its subexpressions. */
5034 fmt
= GET_RTX_FORMAT (code
);
5035 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5037 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5045 if (refers_to_regno_for_reload_p (regno
, endregno
,
5049 else if (fmt
[i
] == 'E')
5052 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5053 if (loc
!= &XVECEXP (x
, i
, j
)
5054 && refers_to_regno_for_reload_p (regno
, endregno
,
5055 XVECEXP (x
, i
, j
), loc
))
5062 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5063 we check if any register number in X conflicts with the relevant register
5064 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5065 contains a MEM (we don't bother checking for memory addresses that can't
5066 conflict because we expect this to be a rare case.
5068 This function is similar to reg_overlap_mention_p in rtlanal.c except
5069 that we look at equivalences for pseudos that didn't get hard registers. */
5072 reg_overlap_mentioned_for_reload_p (x
, in
)
5075 int regno
, endregno
;
5077 if (GET_CODE (x
) == SUBREG
)
5079 regno
= REGNO (SUBREG_REG (x
));
5080 if (regno
< FIRST_PSEUDO_REGISTER
)
5081 regno
+= SUBREG_WORD (x
);
5083 else if (GET_CODE (x
) == REG
)
5087 /* If this is a pseudo, it must not have been assigned a hard register.
5088 Therefore, it must either be in memory or be a constant. */
5090 if (regno
>= FIRST_PSEUDO_REGISTER
)
5092 if (reg_equiv_memory_loc
[regno
])
5093 return refers_to_mem_for_reload_p (in
);
5094 else if (reg_equiv_constant
[regno
])
5099 else if (CONSTANT_P (x
))
5101 else if (GET_CODE (x
) == MEM
)
5102 return refers_to_mem_for_reload_p (in
);
5103 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5104 || GET_CODE (x
) == CC0
)
5105 return reg_mentioned_p (x
, in
);
5109 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5110 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5112 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5115 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
5119 refers_to_mem_for_reload_p (x
)
5125 if (GET_CODE (x
) == MEM
)
5128 if (GET_CODE (x
) == REG
)
5129 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
5130 && reg_equiv_memory_loc
[REGNO (x
)]);
5132 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
5133 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
5135 && (GET_CODE (XEXP (x
, i
)) == MEM
5136 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
5142 /* Check the insns before INSN to see if there is a suitable register
5143 containing the same value as GOAL.
5144 If OTHER is -1, look for a register in class CLASS.
5145 Otherwise, just see if register number OTHER shares GOAL's value.
5147 Return an rtx for the register found, or zero if none is found.
5149 If RELOAD_REG_P is (short *)1,
5150 we reject any hard reg that appears in reload_reg_rtx
5151 because such a hard reg is also needed coming into this insn.
5153 If RELOAD_REG_P is any other nonzero value,
5154 it is a vector indexed by hard reg number
5155 and we reject any hard reg whose element in the vector is nonnegative
5156 as well as any that appears in reload_reg_rtx.
5158 If GOAL is zero, then GOALREG is a register number; we look
5159 for an equivalent for that register.
5161 MODE is the machine mode of the value we want an equivalence for.
5162 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
5164 This function is used by jump.c as well as in the reload pass.
5166 If GOAL is the sum of the stack pointer and a constant, we treat it
5167 as if it were a constant except that sp is required to be unchanging. */
5170 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
5173 enum reg_class
class;
5175 short *reload_reg_p
;
5177 enum machine_mode mode
;
5179 register rtx p
= insn
;
5180 rtx goaltry
, valtry
, value
, where
;
5182 register int regno
= -1;
5186 int goal_mem_addr_varies
= 0;
5187 int need_stable_sp
= 0;
5193 else if (GET_CODE (goal
) == REG
)
5194 regno
= REGNO (goal
);
5195 else if (GET_CODE (goal
) == MEM
)
5197 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
5198 if (MEM_VOLATILE_P (goal
))
5200 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
5202 /* An address with side effects must be reexecuted. */
5213 else if (CONSTANT_P (goal
))
5215 else if (GET_CODE (goal
) == PLUS
5216 && XEXP (goal
, 0) == stack_pointer_rtx
5217 && CONSTANT_P (XEXP (goal
, 1)))
5218 goal_const
= need_stable_sp
= 1;
5222 /* On some machines, certain regs must always be rejected
5223 because they don't behave the way ordinary registers do. */
5225 #ifdef OVERLAPPING_REGNO_P
5226 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5227 && OVERLAPPING_REGNO_P (regno
))
5231 /* Scan insns back from INSN, looking for one that copies
5232 a value into or out of GOAL.
5233 Stop and give up if we reach a label. */
5238 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
5240 if (GET_CODE (p
) == INSN
5241 /* If we don't want spill regs ... */
5242 && (! (reload_reg_p
!= 0
5243 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
5244 /* ... then ignore insns introduced by reload; they aren't useful
5245 and can cause results in reload_as_needed to be different
5246 from what they were when calculating the need for spills.
5247 If we notice an input-reload insn here, we will reject it below,
5248 but it might hide a usable equivalent. That makes bad code.
5249 It may even abort: perhaps no reg was spilled for this insn
5250 because it was assumed we would find that equivalent. */
5251 || INSN_UID (p
) < reload_first_uid
))
5254 pat
= single_set (p
);
5255 /* First check for something that sets some reg equal to GOAL. */
5258 && true_regnum (SET_SRC (pat
)) == regno
5259 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5262 && true_regnum (SET_DEST (pat
)) == regno
5263 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
5265 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
5266 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5268 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
5269 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
5271 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
5272 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
5273 /* If we are looking for a constant,
5274 and something equivalent to that constant was copied
5275 into a reg, we can use that reg. */
5276 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5278 && rtx_equal_p (XEXP (tem
, 0), goal
)
5279 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
5280 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5282 && GET_CODE (SET_DEST (pat
)) == REG
5283 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5284 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5285 && GET_CODE (goal
) == CONST_INT
5286 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 0, 0,
5288 && rtx_equal_p (goal
, goaltry
)
5289 && (valtry
= operand_subword (SET_DEST (pat
), 0, 0,
5291 && (valueno
= true_regnum (valtry
)) >= 0)
5292 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
5294 && GET_CODE (SET_DEST (pat
)) == REG
5295 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
5296 && GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0))) == MODE_FLOAT
5297 && GET_CODE (goal
) == CONST_INT
5298 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
5300 && rtx_equal_p (goal
, goaltry
)
5302 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
5303 && (valueno
= true_regnum (valtry
)) >= 0)))
5306 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
5307 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
5317 /* We found a previous insn copying GOAL into a suitable other reg VALUE
5318 (or copying VALUE into GOAL, if GOAL is also a register).
5319 Now verify that VALUE is really valid. */
5321 /* VALUENO is the register number of VALUE; a hard register. */
5323 /* Don't try to re-use something that is killed in this insn. We want
5324 to be able to trust REG_UNUSED notes. */
5325 if (find_reg_note (where
, REG_UNUSED
, value
))
5328 /* If we propose to get the value from the stack pointer or if GOAL is
5329 a MEM based on the stack pointer, we need a stable SP. */
5330 if (valueno
== STACK_POINTER_REGNUM
5331 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
5335 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
5336 if (GET_MODE (value
) != mode
)
5339 /* Reject VALUE if it was loaded from GOAL
5340 and is also a register that appears in the address of GOAL. */
5342 if (goal_mem
&& value
== SET_DEST (PATTERN (where
))
5343 && refers_to_regno_for_reload_p (valueno
,
5345 + HARD_REGNO_NREGS (valueno
, mode
)),
5349 /* Reject registers that overlap GOAL. */
5351 if (!goal_mem
&& !goal_const
5352 && regno
+ HARD_REGNO_NREGS (regno
, mode
) > valueno
5353 && regno
< valueno
+ HARD_REGNO_NREGS (valueno
, mode
))
5356 /* Reject VALUE if it is one of the regs reserved for reloads.
5357 Reload1 knows how to reuse them anyway, and it would get
5358 confused if we allocated one without its knowledge.
5359 (Now that insns introduced by reload are ignored above,
5360 this case shouldn't happen, but I'm not positive.) */
5362 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1
5363 && reload_reg_p
[valueno
] >= 0)
5366 /* On some machines, certain regs must always be rejected
5367 because they don't behave the way ordinary registers do. */
5369 #ifdef OVERLAPPING_REGNO_P
5370 if (OVERLAPPING_REGNO_P (valueno
))
5374 nregs
= HARD_REGNO_NREGS (regno
, mode
);
5375 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
5377 /* Reject VALUE if it is a register being used for an input reload
5378 even if it is not one of those reserved. */
5380 if (reload_reg_p
!= 0)
5383 for (i
= 0; i
< n_reloads
; i
++)
5384 if (reload_reg_rtx
[i
] != 0 && reload_in
[i
])
5386 int regno1
= REGNO (reload_reg_rtx
[i
]);
5387 int nregs1
= HARD_REGNO_NREGS (regno1
,
5388 GET_MODE (reload_reg_rtx
[i
]));
5389 if (regno1
< valueno
+ valuenregs
5390 && regno1
+ nregs1
> valueno
)
5396 /* We must treat frame pointer as varying here,
5397 since it can vary--in a nonlocal goto as generated by expand_goto. */
5398 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
5400 /* Now verify that the values of GOAL and VALUE remain unaltered
5401 until INSN is reached. */
5410 /* Don't trust the conversion past a function call
5411 if either of the two is in a call-clobbered register, or memory. */
5412 if (GET_CODE (p
) == CALL_INSN
5413 && ((regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5414 && call_used_regs
[regno
])
5416 (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5417 && call_used_regs
[valueno
])
5423 #ifdef INSN_CLOBBERS_REGNO_P
5424 if ((valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
5425 && INSN_CLOBBERS_REGNO_P (p
, valueno
))
5426 || (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
5427 && INSN_CLOBBERS_REGNO_P (p
, regno
)))
5431 if (GET_RTX_CLASS (GET_CODE (p
)) == 'i')
5433 /* If this insn P stores in either GOAL or VALUE, return 0.
5434 If GOAL is a memory ref and this insn writes memory, return 0.
5435 If GOAL is a memory ref and its address is not constant,
5436 and this insn P changes a register used in GOAL, return 0. */
5439 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
5441 register rtx dest
= SET_DEST (pat
);
5442 while (GET_CODE (dest
) == SUBREG
5443 || GET_CODE (dest
) == ZERO_EXTRACT
5444 || GET_CODE (dest
) == SIGN_EXTRACT
5445 || GET_CODE (dest
) == STRICT_LOW_PART
)
5446 dest
= XEXP (dest
, 0);
5447 if (GET_CODE (dest
) == REG
)
5449 register int xregno
= REGNO (dest
);
5451 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5452 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5455 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
5457 if (xregno
< valueno
+ valuenregs
5458 && xregno
+ xnregs
> valueno
)
5460 if (goal_mem_addr_varies
5461 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
5464 else if (goal_mem
&& GET_CODE (dest
) == MEM
5465 && ! push_operand (dest
, GET_MODE (dest
)))
5467 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
5470 else if (GET_CODE (pat
) == PARALLEL
)
5473 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
5475 register rtx v1
= XVECEXP (pat
, 0, i
);
5476 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
5478 register rtx dest
= SET_DEST (v1
);
5479 while (GET_CODE (dest
) == SUBREG
5480 || GET_CODE (dest
) == ZERO_EXTRACT
5481 || GET_CODE (dest
) == SIGN_EXTRACT
5482 || GET_CODE (dest
) == STRICT_LOW_PART
)
5483 dest
= XEXP (dest
, 0);
5484 if (GET_CODE (dest
) == REG
)
5486 register int xregno
= REGNO (dest
);
5488 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
5489 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
5492 if (xregno
< regno
+ nregs
5493 && xregno
+ xnregs
> regno
)
5495 if (xregno
< valueno
+ valuenregs
5496 && xregno
+ xnregs
> valueno
)
5498 if (goal_mem_addr_varies
5499 && reg_overlap_mentioned_for_reload_p (dest
,
5503 else if (goal_mem
&& GET_CODE (dest
) == MEM
5504 && ! push_operand (dest
, GET_MODE (dest
)))
5506 else if (need_stable_sp
5507 && push_operand (dest
, GET_MODE (dest
)))
5514 /* If this insn auto-increments or auto-decrements
5515 either regno or valueno, return 0 now.
5516 If GOAL is a memory ref and its address is not constant,
5517 and this insn P increments a register used in GOAL, return 0. */
5521 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
5522 if (REG_NOTE_KIND (link
) == REG_INC
5523 && GET_CODE (XEXP (link
, 0)) == REG
)
5525 register int incno
= REGNO (XEXP (link
, 0));
5526 if (incno
< regno
+ nregs
&& incno
>= regno
)
5528 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
5530 if (goal_mem_addr_varies
5531 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
5541 /* Find a place where INCED appears in an increment or decrement operator
5542 within X, and return the amount INCED is incremented or decremented by.
5543 The value is always positive. */
5546 find_inc_amount (x
, inced
)
5549 register enum rtx_code code
= GET_CODE (x
);
5555 register rtx addr
= XEXP (x
, 0);
5556 if ((GET_CODE (addr
) == PRE_DEC
5557 || GET_CODE (addr
) == POST_DEC
5558 || GET_CODE (addr
) == PRE_INC
5559 || GET_CODE (addr
) == POST_INC
)
5560 && XEXP (addr
, 0) == inced
)
5561 return GET_MODE_SIZE (GET_MODE (x
));
5564 fmt
= GET_RTX_FORMAT (code
);
5565 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5569 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
5576 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
5578 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
5588 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
5591 regno_clobbered_p (regno
, insn
)
5595 if (GET_CODE (PATTERN (insn
)) == CLOBBER
5596 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
5597 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
5599 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
5601 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
5605 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
5606 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
5607 && REGNO (XEXP (elt
, 0)) == regno
)