1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "coretypes.h"
95 #include "insn-config.h"
101 #include "hard-reg-set.h"
105 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(m, x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int,
247 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
, int));
248 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
249 static void dup_replacements
PARAMS ((rtx
*, rtx
*));
250 static void combine_reloads
PARAMS ((void));
251 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
252 enum reload_type
, int, int));
253 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
254 enum machine_mode
, enum machine_mode
,
255 enum reg_class
, int, int));
256 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
257 static struct decomposition decompose
PARAMS ((rtx
));
258 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PARAMS ((const char *, int));
260 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
262 static rtx make_memloc
PARAMS ((rtx
, int));
263 static int maybe_memory_address_p
PARAMS ((enum machine_mode
, rtx
, rtx
*));
264 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
265 int, enum reload_type
, int, rtx
));
266 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
267 static rtx subst_indexed_address
PARAMS ((rtx
));
268 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
269 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
270 int, enum reload_type
,int, rtx
));
271 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
272 enum machine_mode
, int,
273 enum reload_type
, int));
274 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int,
275 enum reload_type
, int, rtx
));
276 static void copy_replacements_1
PARAMS ((rtx
*, rtx
*, int));
277 static bool have_replacement_p
PARAMS ((rtx
*));
278 static int find_inc_amount
PARAMS ((rtx
, rtx
));
280 #ifdef HAVE_SECONDARY_RELOADS
282 /* Determine if any secondary reloads are needed for loading (if IN_P is
283 nonzero) or storing (if IN_P is zero) X to or from a reload register of
284 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
285 are needed, push them.
287 Return the reload number of the secondary reload we made, or -1 if
288 we didn't need one. *PICODE is set to the insn_code to use if we do
289 need a secondary reload. */
292 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
298 enum reg_class reload_class
;
299 enum machine_mode reload_mode
;
300 enum reload_type type
;
301 enum insn_code
*picode
;
303 enum reg_class
class = NO_REGS
;
304 enum machine_mode mode
= reload_mode
;
305 enum insn_code icode
= CODE_FOR_nothing
;
306 enum reg_class t_class
= NO_REGS
;
307 enum machine_mode t_mode
= VOIDmode
;
308 enum insn_code t_icode
= CODE_FOR_nothing
;
309 enum reload_type secondary_type
;
310 int s_reload
, t_reload
= -1;
312 if (type
== RELOAD_FOR_INPUT_ADDRESS
313 || type
== RELOAD_FOR_OUTPUT_ADDRESS
314 || type
== RELOAD_FOR_INPADDR_ADDRESS
315 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
316 secondary_type
= type
;
318 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
320 *picode
= CODE_FOR_nothing
;
322 /* If X is a paradoxical SUBREG, use the inner value to determine both the
323 mode and object being reloaded. */
324 if (GET_CODE (x
) == SUBREG
325 && (GET_MODE_SIZE (GET_MODE (x
))
326 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
329 reload_mode
= GET_MODE (x
);
332 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
333 is still a pseudo-register by now, it *must* have an equivalent MEM
334 but we don't want to assume that), use that equivalent when seeing if
335 a secondary reload is needed since whether or not a reload is needed
336 might be sensitive to the form of the MEM. */
338 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
339 && reg_equiv_mem
[REGNO (x
)] != 0)
340 x
= reg_equiv_mem
[REGNO (x
)];
342 #ifdef SECONDARY_INPUT_RELOAD_CLASS
344 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
347 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
349 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
352 /* If we don't need any secondary registers, done. */
353 if (class == NO_REGS
)
356 /* Get a possible insn to use. If the predicate doesn't accept X, don't
359 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
360 : reload_out_optab
[(int) reload_mode
]);
362 if (icode
!= CODE_FOR_nothing
363 && insn_data
[(int) icode
].operand
[in_p
].predicate
364 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
365 icode
= CODE_FOR_nothing
;
367 /* If we will be using an insn, see if it can directly handle the reload
368 register we will be using. If it can, the secondary reload is for a
369 scratch register. If it can't, we will use the secondary reload for
370 an intermediate register and require a tertiary reload for the scratch
373 if (icode
!= CODE_FOR_nothing
)
375 /* If IN_P is nonzero, the reload register will be the output in
376 operand 0. If IN_P is zero, the reload register will be the input
377 in operand 1. Outputs should have an initial "=", which we must
380 enum reg_class insn_class
;
382 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
383 insn_class
= ALL_REGS
;
386 const char *insn_constraint
387 = &insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
388 char insn_letter
= *insn_constraint
;
390 = (insn_letter
== 'r' ? GENERAL_REGS
391 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter
,
394 if (insn_class
== NO_REGS
)
397 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
401 /* The scratch register's constraint must start with "=&". */
402 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
403 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
406 if (reg_class_subset_p (reload_class
, insn_class
))
407 mode
= insn_data
[(int) icode
].operand
[2].mode
;
410 const char *t_constraint
411 = &insn_data
[(int) icode
].operand
[2].constraint
[2];
412 char t_letter
= *t_constraint
;
414 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
415 t_class
= (t_letter
== 'r' ? GENERAL_REGS
416 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter
,
419 icode
= CODE_FOR_nothing
;
423 /* This case isn't valid, so fail. Reload is allowed to use the same
424 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
425 in the case of a secondary register, we actually need two different
426 registers for correct code. We fail here to prevent the possibility of
427 silently generating incorrect code later.
429 The convention is that secondary input reloads are valid only if the
430 secondary_class is different from class. If you have such a case, you
431 can not use secondary reloads, you must work around the problem some
434 Allow this when a reload_in/out pattern is being used. I.e. assume
435 that the generated code handles this case. */
437 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
438 && t_icode
== CODE_FOR_nothing
)
441 /* If we need a tertiary reload, see if we have one we can reuse or else
444 if (t_class
!= NO_REGS
)
446 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
447 if (rld
[t_reload
].secondary_p
448 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
449 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
450 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
451 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
452 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
453 == CODE_FOR_nothing
))
454 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
455 == CODE_FOR_nothing
)))
456 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
457 && MERGABLE_RELOADS (secondary_type
,
458 rld
[t_reload
].when_needed
,
459 opnum
, rld
[t_reload
].opnum
))
462 rld
[t_reload
].inmode
= t_mode
;
464 rld
[t_reload
].outmode
= t_mode
;
466 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
467 rld
[t_reload
].class = t_class
;
469 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
470 rld
[t_reload
].optional
&= optional
;
471 rld
[t_reload
].secondary_p
= 1;
472 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
473 opnum
, rld
[t_reload
].opnum
))
474 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
477 if (t_reload
== n_reloads
)
479 /* We need to make a new tertiary reload for this register class. */
480 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
481 rld
[t_reload
].class = t_class
;
482 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
483 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
484 rld
[t_reload
].reg_rtx
= 0;
485 rld
[t_reload
].optional
= optional
;
486 rld
[t_reload
].inc
= 0;
487 /* Maybe we could combine these, but it seems too tricky. */
488 rld
[t_reload
].nocombine
= 1;
489 rld
[t_reload
].in_reg
= 0;
490 rld
[t_reload
].out_reg
= 0;
491 rld
[t_reload
].opnum
= opnum
;
492 rld
[t_reload
].when_needed
= secondary_type
;
493 rld
[t_reload
].secondary_in_reload
= -1;
494 rld
[t_reload
].secondary_out_reload
= -1;
495 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
496 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
497 rld
[t_reload
].secondary_p
= 1;
503 /* See if we can reuse an existing secondary reload. */
504 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
505 if (rld
[s_reload
].secondary_p
506 && (reg_class_subset_p (class, rld
[s_reload
].class)
507 || reg_class_subset_p (rld
[s_reload
].class, class))
508 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
509 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
510 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
511 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
512 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
513 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
514 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
515 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
516 opnum
, rld
[s_reload
].opnum
))
519 rld
[s_reload
].inmode
= mode
;
521 rld
[s_reload
].outmode
= mode
;
523 if (reg_class_subset_p (class, rld
[s_reload
].class))
524 rld
[s_reload
].class = class;
526 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
527 rld
[s_reload
].optional
&= optional
;
528 rld
[s_reload
].secondary_p
= 1;
529 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
530 opnum
, rld
[s_reload
].opnum
))
531 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
534 if (s_reload
== n_reloads
)
536 #ifdef SECONDARY_MEMORY_NEEDED
537 /* If we need a memory location to copy between the two reload regs,
538 set it up now. Note that we do the input case before making
539 the reload and the output case after. This is due to the
540 way reloads are output. */
542 if (in_p
&& icode
== CODE_FOR_nothing
543 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
545 get_secondary_mem (x
, reload_mode
, opnum
, type
);
547 /* We may have just added new reloads. Make sure we add
548 the new reload at the end. */
549 s_reload
= n_reloads
;
553 /* We need to make a new secondary reload for this register class. */
554 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
555 rld
[s_reload
].class = class;
557 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
558 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
559 rld
[s_reload
].reg_rtx
= 0;
560 rld
[s_reload
].optional
= optional
;
561 rld
[s_reload
].inc
= 0;
562 /* Maybe we could combine these, but it seems too tricky. */
563 rld
[s_reload
].nocombine
= 1;
564 rld
[s_reload
].in_reg
= 0;
565 rld
[s_reload
].out_reg
= 0;
566 rld
[s_reload
].opnum
= opnum
;
567 rld
[s_reload
].when_needed
= secondary_type
;
568 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
569 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
570 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
571 rld
[s_reload
].secondary_out_icode
572 = ! in_p
? t_icode
: CODE_FOR_nothing
;
573 rld
[s_reload
].secondary_p
= 1;
577 #ifdef SECONDARY_MEMORY_NEEDED
578 if (! in_p
&& icode
== CODE_FOR_nothing
579 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
580 get_secondary_mem (x
, mode
, opnum
, type
);
587 #endif /* HAVE_SECONDARY_RELOADS */
589 #ifdef SECONDARY_MEMORY_NEEDED
591 /* Return a memory location that will be used to copy X in mode MODE.
592 If we haven't already made a location for this mode in this insn,
593 call find_reloads_address on the location being returned. */
596 get_secondary_mem (x
, mode
, opnum
, type
)
597 rtx x ATTRIBUTE_UNUSED
;
598 enum machine_mode mode
;
600 enum reload_type type
;
605 /* By default, if MODE is narrower than a word, widen it to a word.
606 This is required because most machines that require these memory
607 locations do not support short load and stores from all registers
608 (e.g., FP registers). */
610 #ifdef SECONDARY_MEMORY_NEEDED_MODE
611 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
613 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
614 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
617 /* If we already have made a MEM for this operand in MODE, return it. */
618 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
619 return secondary_memlocs_elim
[(int) mode
][opnum
];
621 /* If this is the first time we've tried to get a MEM for this mode,
622 allocate a new one. `something_changed' in reload will get set
623 by noticing that the frame size has changed. */
625 if (secondary_memlocs
[(int) mode
] == 0)
627 #ifdef SECONDARY_MEMORY_NEEDED_RTX
628 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
630 secondary_memlocs
[(int) mode
]
631 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
635 /* Get a version of the address doing any eliminations needed. If that
636 didn't give us a new MEM, make a new one if it isn't valid. */
638 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
639 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
641 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
642 loc
= copy_rtx (loc
);
644 /* The only time the call below will do anything is if the stack
645 offset is too large. In that case IND_LEVELS doesn't matter, so we
646 can just pass a zero. Adjust the type to be the address of the
647 corresponding object. If the address was valid, save the eliminated
648 address. If it wasn't valid, we need to make a reload each time, so
653 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
654 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
657 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
661 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
665 /* Clear any secondary memory locations we've made. */
668 clear_secondary_mem ()
670 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
672 #endif /* SECONDARY_MEMORY_NEEDED */
674 /* Find the largest class for which every register number plus N is valid in
675 M1 (if in range) and is cheap to move into REGNO.
676 Abort if no such class exists. */
678 static enum reg_class
679 find_valid_class (m1
, n
, dest_regno
)
680 enum machine_mode m1 ATTRIBUTE_UNUSED
;
682 unsigned int dest_regno ATTRIBUTE_UNUSED
;
687 enum reg_class best_class
= NO_REGS
;
688 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
689 unsigned int best_size
= 0;
692 for (class = 1; class < N_REG_CLASSES
; class++)
695 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
696 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
697 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
698 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
703 cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
705 if ((reg_class_size
[class] > best_size
706 && (best_cost
< 0 || best_cost
>= cost
))
710 best_size
= reg_class_size
[class];
711 best_cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
721 /* Return the number of a previously made reload that can be combined with
722 a new one, or n_reloads if none of the existing reloads can be used.
723 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
724 push_reload, they determine the kind of the new reload that we try to
725 combine. P_IN points to the corresponding value of IN, which can be
726 modified by this function.
727 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
730 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
732 enum reg_class
class;
733 enum reload_type type
;
734 int opnum
, dont_share
;
738 /* We can't merge two reloads if the output of either one is
741 if (earlyclobber_operand_p (out
))
744 /* We can use an existing reload if the class is right
745 and at least one of IN and OUT is a match
746 and the other is at worst neutral.
747 (A zero compared against anything is neutral.)
749 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
750 for the same thing since that can cause us to need more reload registers
751 than we otherwise would. */
753 for (i
= 0; i
< n_reloads
; i
++)
754 if ((reg_class_subset_p (class, rld
[i
].class)
755 || reg_class_subset_p (rld
[i
].class, class))
756 /* If the existing reload has a register, it must fit our class. */
757 && (rld
[i
].reg_rtx
== 0
758 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
759 true_regnum (rld
[i
].reg_rtx
)))
760 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
761 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
762 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
763 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
764 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
765 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
766 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
769 /* Reloading a plain reg for input can match a reload to postincrement
770 that reg, since the postincrement's value is the right value.
771 Likewise, it can match a preincrement reload, since we regard
772 the preincrementation as happening before any ref in this insn
774 for (i
= 0; i
< n_reloads
; i
++)
775 if ((reg_class_subset_p (class, rld
[i
].class)
776 || reg_class_subset_p (rld
[i
].class, class))
777 /* If the existing reload has a register, it must fit our
779 && (rld
[i
].reg_rtx
== 0
780 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
781 true_regnum (rld
[i
].reg_rtx
)))
782 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
783 && ((GET_CODE (in
) == REG
784 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
785 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
786 || (GET_CODE (rld
[i
].in
) == REG
787 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
788 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
789 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
790 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
791 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
792 opnum
, rld
[i
].opnum
))
794 /* Make sure reload_in ultimately has the increment,
795 not the plain register. */
796 if (GET_CODE (in
) == REG
)
803 /* Return nonzero if X is a SUBREG which will require reloading of its
804 SUBREG_REG expression. */
807 reload_inner_reg_of_subreg (x
, mode
, output
)
809 enum machine_mode mode
;
814 /* Only SUBREGs are problematical. */
815 if (GET_CODE (x
) != SUBREG
)
818 inner
= SUBREG_REG (x
);
820 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
821 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
824 /* If INNER is not a hard register, then INNER will not need to
826 if (GET_CODE (inner
) != REG
827 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
830 /* If INNER is not ok for MODE, then INNER will need reloading. */
831 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
834 /* If the outer part is a word or smaller, INNER larger than a
835 word and the number of regs for INNER is not the same as the
836 number of words in INNER, then INNER will need reloading. */
837 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
839 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
840 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
841 != (int) HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
844 /* Record one reload that needs to be performed.
845 IN is an rtx saying where the data are to be found before this instruction.
846 OUT says where they must be stored after the instruction.
847 (IN is zero for data not read, and OUT is zero for data not written.)
848 INLOC and OUTLOC point to the places in the instructions where
849 IN and OUT were found.
850 If IN and OUT are both nonzero, it means the same register must be used
851 to reload both IN and OUT.
853 CLASS is a register class required for the reloaded data.
854 INMODE is the machine mode that the instruction requires
855 for the reg that replaces IN and OUTMODE is likewise for OUT.
857 If IN is zero, then OUT's location and mode should be passed as
860 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
862 OPTIONAL nonzero means this reload does not need to be performed:
863 it can be discarded if that is more convenient.
865 OPNUM and TYPE say what the purpose of this reload is.
867 The return value is the reload-number for this reload.
869 If both IN and OUT are nonzero, in some rare cases we might
870 want to make two separate reloads. (Actually we never do this now.)
871 Therefore, the reload-number for OUT is stored in
872 output_reloadnum when we return; the return value applies to IN.
873 Usually (presently always), when IN and OUT are nonzero,
874 the two reload-numbers are equal, but the caller should be careful to
878 push_reload (in
, out
, inloc
, outloc
, class,
879 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
882 enum reg_class
class;
883 enum machine_mode inmode
, outmode
;
887 enum reload_type type
;
891 int dont_remove_subreg
= 0;
892 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
893 int secondary_in_reload
= -1, secondary_out_reload
= -1;
894 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
895 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
897 /* INMODE and/or OUTMODE could be VOIDmode if no mode
898 has been specified for the operand. In that case,
899 use the operand's mode as the mode to reload. */
900 if (inmode
== VOIDmode
&& in
!= 0)
901 inmode
= GET_MODE (in
);
902 if (outmode
== VOIDmode
&& out
!= 0)
903 outmode
= GET_MODE (out
);
905 /* If IN is a pseudo register everywhere-equivalent to a constant, and
906 it is not in a hard register, reload straight from the constant,
907 since we want to get rid of such pseudo registers.
908 Often this is done earlier, but not always in find_reloads_address. */
909 if (in
!= 0 && GET_CODE (in
) == REG
)
911 int regno
= REGNO (in
);
913 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
914 && reg_equiv_constant
[regno
] != 0)
915 in
= reg_equiv_constant
[regno
];
918 /* Likewise for OUT. Of course, OUT will never be equivalent to
919 an actual constant, but it might be equivalent to a memory location
920 (in the case of a parameter). */
921 if (out
!= 0 && GET_CODE (out
) == REG
)
923 int regno
= REGNO (out
);
925 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
926 && reg_equiv_constant
[regno
] != 0)
927 out
= reg_equiv_constant
[regno
];
930 /* If we have a read-write operand with an address side-effect,
931 change either IN or OUT so the side-effect happens only once. */
932 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
933 switch (GET_CODE (XEXP (in
, 0)))
935 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
936 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
939 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
940 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
947 /* If we are reloading a (SUBREG constant ...), really reload just the
948 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
949 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
950 a pseudo and hence will become a MEM) with M1 wider than M2 and the
951 register is a pseudo, also reload the inside expression.
952 For machines that extend byte loads, do this for any SUBREG of a pseudo
953 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
954 M2 is an integral mode that gets extended when loaded.
955 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
956 either M1 is not valid for R or M2 is wider than a word but we only
957 need one word to store an M2-sized quantity in R.
958 (However, if OUT is nonzero, we need to reload the reg *and*
959 the subreg, so do nothing here, and let following statement handle it.)
961 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
962 we can't handle it here because CONST_INT does not indicate a mode.
964 Similarly, we must reload the inside expression if we have a
965 STRICT_LOW_PART (presumably, in == out in the cas).
967 Also reload the inner expression if it does not require a secondary
968 reload but the SUBREG does.
970 Finally, reload the inner expression if it is a register that is in
971 the class whose registers cannot be referenced in a different size
972 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
973 cannot reload just the inside since we might end up with the wrong
974 register class. But if it is inside a STRICT_LOW_PART, we have
975 no choice, so we hope we do get the right register class there. */
977 if (in
!= 0 && GET_CODE (in
) == SUBREG
978 && (subreg_lowpart_p (in
) || strict_low
)
979 #ifdef CANNOT_CHANGE_MODE_CLASS
980 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, class)
982 && (CONSTANT_P (SUBREG_REG (in
))
983 || GET_CODE (SUBREG_REG (in
)) == PLUS
985 || (((GET_CODE (SUBREG_REG (in
)) == REG
986 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
987 || GET_CODE (SUBREG_REG (in
)) == MEM
)
988 && ((GET_MODE_SIZE (inmode
)
989 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
990 #ifdef LOAD_EXTEND_OP
991 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
992 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
994 && (GET_MODE_SIZE (inmode
)
995 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
996 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
997 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
999 #ifdef WORD_REGISTER_OPERATIONS
1000 || ((GET_MODE_SIZE (inmode
)
1001 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1002 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1003 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1007 || (GET_CODE (SUBREG_REG (in
)) == REG
1008 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1009 /* The case where out is nonzero
1010 is handled differently in the following statement. */
1011 && (out
== 0 || subreg_lowpart_p (in
))
1012 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1015 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1017 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
1018 GET_MODE (SUBREG_REG (in
)))))
1019 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1020 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1021 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
1022 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1023 GET_MODE (SUBREG_REG (in
)),
1027 #ifdef CANNOT_CHANGE_MODE_CLASS
1028 || (GET_CODE (SUBREG_REG (in
)) == REG
1029 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1030 && REG_CANNOT_CHANGE_MODE_P
1031 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1035 in_subreg_loc
= inloc
;
1036 inloc
= &SUBREG_REG (in
);
1038 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1039 if (GET_CODE (in
) == MEM
)
1040 /* This is supposed to happen only for paradoxical subregs made by
1041 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1042 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1045 inmode
= GET_MODE (in
);
1048 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1049 either M1 is not valid for R or M2 is wider than a word but we only
1050 need one word to store an M2-sized quantity in R.
1052 However, we must reload the inner reg *as well as* the subreg in
1055 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1056 code above. This can happen if SUBREG_BYTE != 0. */
1058 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1060 enum reg_class in_class
= class;
1062 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1064 = find_valid_class (inmode
,
1065 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1066 GET_MODE (SUBREG_REG (in
)),
1069 REGNO (SUBREG_REG (in
)));
1071 /* This relies on the fact that emit_reload_insns outputs the
1072 instructions for input reloads of type RELOAD_OTHER in the same
1073 order as the reloads. Thus if the outer reload is also of type
1074 RELOAD_OTHER, we are guaranteed that this inner reload will be
1075 output before the outer reload. */
1076 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1077 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1078 dont_remove_subreg
= 1;
1081 /* Similarly for paradoxical and problematical SUBREGs on the output.
1082 Note that there is no reason we need worry about the previous value
1083 of SUBREG_REG (out); even if wider than out,
1084 storing in a subreg is entitled to clobber it all
1085 (except in the case of STRICT_LOW_PART,
1086 and in that case the constraint should label it input-output.) */
1087 if (out
!= 0 && GET_CODE (out
) == SUBREG
1088 && (subreg_lowpart_p (out
) || strict_low
)
1089 #ifdef CANNOT_CHANGE_MODE_CLASS
1090 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, class)
1092 && (CONSTANT_P (SUBREG_REG (out
))
1094 || (((GET_CODE (SUBREG_REG (out
)) == REG
1095 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1096 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1097 && ((GET_MODE_SIZE (outmode
)
1098 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1099 #ifdef WORD_REGISTER_OPERATIONS
1100 || ((GET_MODE_SIZE (outmode
)
1101 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1102 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1103 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1107 || (GET_CODE (SUBREG_REG (out
)) == REG
1108 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1109 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1110 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1112 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1114 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1115 GET_MODE (SUBREG_REG (out
)))))
1116 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1117 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1118 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1119 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1120 GET_MODE (SUBREG_REG (out
)),
1124 #ifdef CANNOT_CHANGE_MODE_CLASS
1125 || (GET_CODE (SUBREG_REG (out
)) == REG
1126 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1127 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1128 GET_MODE (SUBREG_REG (out
)),
1133 out_subreg_loc
= outloc
;
1134 outloc
= &SUBREG_REG (out
);
1136 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1137 if (GET_CODE (out
) == MEM
1138 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1141 outmode
= GET_MODE (out
);
1144 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1145 either M1 is not valid for R or M2 is wider than a word but we only
1146 need one word to store an M2-sized quantity in R.
1148 However, we must reload the inner reg *as well as* the subreg in
1149 that case. In this case, the inner reg is an in-out reload. */
1151 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1153 /* This relies on the fact that emit_reload_insns outputs the
1154 instructions for output reloads of type RELOAD_OTHER in reverse
1155 order of the reloads. Thus if the outer reload is also of type
1156 RELOAD_OTHER, we are guaranteed that this inner reload will be
1157 output after the outer reload. */
1158 dont_remove_subreg
= 1;
1159 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1161 find_valid_class (outmode
,
1162 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1163 GET_MODE (SUBREG_REG (out
)),
1166 REGNO (SUBREG_REG (out
))),
1167 VOIDmode
, VOIDmode
, 0, 0,
1168 opnum
, RELOAD_OTHER
);
1171 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1172 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1173 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1174 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1177 /* If IN is a SUBREG of a hard register, make a new REG. This
1178 simplifies some of the cases below. */
1180 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1181 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1182 && ! dont_remove_subreg
)
1183 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1185 /* Similarly for OUT. */
1186 if (out
!= 0 && GET_CODE (out
) == SUBREG
1187 && GET_CODE (SUBREG_REG (out
)) == REG
1188 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1189 && ! dont_remove_subreg
)
1190 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1192 /* Narrow down the class of register wanted if that is
1193 desirable on this machine for efficiency. */
1195 class = PREFERRED_RELOAD_CLASS (in
, class);
1197 /* Output reloads may need analogous treatment, different in detail. */
1198 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1200 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1203 /* Make sure we use a class that can handle the actual pseudo
1204 inside any subreg. For example, on the 386, QImode regs
1205 can appear within SImode subregs. Although GENERAL_REGS
1206 can handle SImode, QImode needs a smaller class. */
1207 #ifdef LIMIT_RELOAD_CLASS
1209 class = LIMIT_RELOAD_CLASS (inmode
, class);
1210 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1211 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1214 class = LIMIT_RELOAD_CLASS (outmode
, class);
1215 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1216 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1219 /* Verify that this class is at least possible for the mode that
1221 if (this_insn_is_asm
)
1223 enum machine_mode mode
;
1224 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1228 if (mode
== VOIDmode
)
1230 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1235 outmode
= word_mode
;
1237 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1238 if (HARD_REGNO_MODE_OK (i
, mode
)
1239 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1241 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1244 for (j
= 1; j
< nregs
; j
++)
1245 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1250 if (i
== FIRST_PSEUDO_REGISTER
)
1252 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1257 /* Optional output reloads are always OK even if we have no register class,
1258 since the function of these reloads is only to have spill_reg_store etc.
1259 set, so that the storing insn can be deleted later. */
1260 if (class == NO_REGS
1261 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1264 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1268 /* See if we need a secondary reload register to move between CLASS
1269 and IN or CLASS and OUT. Get the icode and push any required reloads
1270 needed for each of them if so. */
1272 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1275 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1276 &secondary_in_icode
);
1279 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1280 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1281 secondary_out_reload
1282 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1283 type
, &secondary_out_icode
);
1286 /* We found no existing reload suitable for re-use.
1287 So add an additional reload. */
1289 #ifdef SECONDARY_MEMORY_NEEDED
1290 /* If a memory location is needed for the copy, make one. */
1291 if (in
!= 0 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == SUBREG
)
1292 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1293 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1295 get_secondary_mem (in
, inmode
, opnum
, type
);
1301 rld
[i
].class = class;
1302 rld
[i
].inmode
= inmode
;
1303 rld
[i
].outmode
= outmode
;
1305 rld
[i
].optional
= optional
;
1307 rld
[i
].nocombine
= 0;
1308 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1309 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1310 rld
[i
].opnum
= opnum
;
1311 rld
[i
].when_needed
= type
;
1312 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1313 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1314 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1315 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1316 rld
[i
].secondary_p
= 0;
1320 #ifdef SECONDARY_MEMORY_NEEDED
1321 if (out
!= 0 && (GET_CODE (out
) == REG
|| GET_CODE (out
) == SUBREG
)
1322 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1323 && SECONDARY_MEMORY_NEEDED (class,
1324 REGNO_REG_CLASS (reg_or_subregno (out
)),
1326 get_secondary_mem (out
, outmode
, opnum
, type
);
1331 /* We are reusing an existing reload,
1332 but we may have additional information for it.
1333 For example, we may now have both IN and OUT
1334 while the old one may have just one of them. */
1336 /* The modes can be different. If they are, we want to reload in
1337 the larger mode, so that the value is valid for both modes. */
1338 if (inmode
!= VOIDmode
1339 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1340 rld
[i
].inmode
= inmode
;
1341 if (outmode
!= VOIDmode
1342 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1343 rld
[i
].outmode
= outmode
;
1346 rtx in_reg
= inloc
? *inloc
: 0;
1347 /* If we merge reloads for two distinct rtl expressions that
1348 are identical in content, there might be duplicate address
1349 reloads. Remove the extra set now, so that if we later find
1350 that we can inherit this reload, we can get rid of the
1351 address reloads altogether.
1353 Do not do this if both reloads are optional since the result
1354 would be an optional reload which could potentially leave
1355 unresolved address replacements.
1357 It is not sufficient to call transfer_replacements since
1358 choose_reload_regs will remove the replacements for address
1359 reloads of inherited reloads which results in the same
1361 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1362 && ! (rld
[i
].optional
&& optional
))
1364 /* We must keep the address reload with the lower operand
1366 if (opnum
> rld
[i
].opnum
)
1368 remove_address_replacements (in
);
1370 in_reg
= rld
[i
].in_reg
;
1373 remove_address_replacements (rld
[i
].in
);
1376 rld
[i
].in_reg
= in_reg
;
1381 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1383 if (reg_class_subset_p (class, rld
[i
].class))
1384 rld
[i
].class = class;
1385 rld
[i
].optional
&= optional
;
1386 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1387 opnum
, rld
[i
].opnum
))
1388 rld
[i
].when_needed
= RELOAD_OTHER
;
1389 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1392 /* If the ostensible rtx being reloaded differs from the rtx found
1393 in the location to substitute, this reload is not safe to combine
1394 because we cannot reliably tell whether it appears in the insn. */
1396 if (in
!= 0 && in
!= *inloc
)
1397 rld
[i
].nocombine
= 1;
1400 /* This was replaced by changes in find_reloads_address_1 and the new
1401 function inc_for_reload, which go with a new meaning of reload_inc. */
1403 /* If this is an IN/OUT reload in an insn that sets the CC,
1404 it must be for an autoincrement. It doesn't work to store
1405 the incremented value after the insn because that would clobber the CC.
1406 So we must do the increment of the value reloaded from,
1407 increment it, store it back, then decrement again. */
1408 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1412 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1413 /* If we did not find a nonzero amount-to-increment-by,
1414 that contradicts the belief that IN is being incremented
1415 in an address in this insn. */
1416 if (rld
[i
].inc
== 0)
1421 /* If we will replace IN and OUT with the reload-reg,
1422 record where they are located so that substitution need
1423 not do a tree walk. */
1425 if (replace_reloads
)
1429 struct replacement
*r
= &replacements
[n_replacements
++];
1431 r
->subreg_loc
= in_subreg_loc
;
1435 if (outloc
!= 0 && outloc
!= inloc
)
1437 struct replacement
*r
= &replacements
[n_replacements
++];
1440 r
->subreg_loc
= out_subreg_loc
;
1445 /* If this reload is just being introduced and it has both
1446 an incoming quantity and an outgoing quantity that are
1447 supposed to be made to match, see if either one of the two
1448 can serve as the place to reload into.
1450 If one of them is acceptable, set rld[i].reg_rtx
1453 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1455 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1458 earlyclobber_operand_p (out
));
1460 /* If the outgoing register already contains the same value
1461 as the incoming one, we can dispense with loading it.
1462 The easiest way to tell the caller that is to give a phony
1463 value for the incoming operand (same as outgoing one). */
1464 if (rld
[i
].reg_rtx
== out
1465 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1466 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1467 static_reload_reg_p
, i
, inmode
))
1471 /* If this is an input reload and the operand contains a register that
1472 dies in this insn and is used nowhere else, see if it is the right class
1473 to be used for this reload. Use it if so. (This occurs most commonly
1474 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1475 this if it is also an output reload that mentions the register unless
1476 the output is a SUBREG that clobbers an entire register.
1478 Note that the operand might be one of the spill regs, if it is a
1479 pseudo reg and we are in a block where spilling has not taken place.
1480 But if there is no spilling in this block, that is OK.
1481 An explicitly used hard reg cannot be a spill reg. */
1483 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1487 enum machine_mode rel_mode
= inmode
;
1489 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1492 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1493 if (REG_NOTE_KIND (note
) == REG_DEAD
1494 && GET_CODE (XEXP (note
, 0)) == REG
1495 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1496 && reg_mentioned_p (XEXP (note
, 0), in
)
1497 && ! refers_to_regno_for_reload_p (regno
,
1499 + HARD_REGNO_NREGS (regno
,
1501 PATTERN (this_insn
), inloc
)
1502 /* If this is also an output reload, IN cannot be used as
1503 the reload register if it is set in this insn unless IN
1505 && (out
== 0 || in
== out
1506 || ! hard_reg_set_here_p (regno
,
1508 + HARD_REGNO_NREGS (regno
,
1510 PATTERN (this_insn
)))
1511 /* ??? Why is this code so different from the previous?
1512 Is there any simple coherent way to describe the two together?
1513 What's going on here. */
1515 || (GET_CODE (in
) == SUBREG
1516 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1518 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1519 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1520 /* Make sure the operand fits in the reg that dies. */
1521 && (GET_MODE_SIZE (rel_mode
)
1522 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1523 && HARD_REGNO_MODE_OK (regno
, inmode
)
1524 && HARD_REGNO_MODE_OK (regno
, outmode
))
1527 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1528 HARD_REGNO_NREGS (regno
, outmode
));
1530 for (offs
= 0; offs
< nregs
; offs
++)
1531 if (fixed_regs
[regno
+ offs
]
1532 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1538 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1545 output_reloadnum
= i
;
1550 /* Record an additional place we must replace a value
1551 for which we have already recorded a reload.
1552 RELOADNUM is the value returned by push_reload
1553 when the reload was recorded.
1554 This is used in insn patterns that use match_dup. */
1557 push_replacement (loc
, reloadnum
, mode
)
1560 enum machine_mode mode
;
1562 if (replace_reloads
)
1564 struct replacement
*r
= &replacements
[n_replacements
++];
1565 r
->what
= reloadnum
;
1572 /* Duplicate any replacement we have recorded to apply at
1573 location ORIG_LOC to also be performed at DUP_LOC.
1574 This is used in insn patterns that use match_dup. */
1577 dup_replacements (dup_loc
, orig_loc
)
1581 int i
, n
= n_replacements
;
1583 for (i
= 0; i
< n
; i
++)
1585 struct replacement
*r
= &replacements
[i
];
1586 if (r
->where
== orig_loc
)
1587 push_replacement (dup_loc
, r
->what
, r
->mode
);
1591 /* Transfer all replacements that used to be in reload FROM to be in
1595 transfer_replacements (to
, from
)
1600 for (i
= 0; i
< n_replacements
; i
++)
1601 if (replacements
[i
].what
== from
)
1602 replacements
[i
].what
= to
;
1605 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1606 or a subpart of it. If we have any replacements registered for IN_RTX,
1607 cancel the reloads that were supposed to load them.
1608 Return nonzero if we canceled any reloads. */
1610 remove_address_replacements (in_rtx
)
1614 char reload_flags
[MAX_RELOADS
];
1615 int something_changed
= 0;
1617 memset (reload_flags
, 0, sizeof reload_flags
);
1618 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1620 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1621 reload_flags
[replacements
[i
].what
] |= 1;
1624 replacements
[j
++] = replacements
[i
];
1625 reload_flags
[replacements
[i
].what
] |= 2;
1628 /* Note that the following store must be done before the recursive calls. */
1631 for (i
= n_reloads
- 1; i
>= 0; i
--)
1633 if (reload_flags
[i
] == 1)
1635 deallocate_reload_reg (i
);
1636 remove_address_replacements (rld
[i
].in
);
1638 something_changed
= 1;
1641 return something_changed
;
1644 /* If there is only one output reload, and it is not for an earlyclobber
1645 operand, try to combine it with a (logically unrelated) input reload
1646 to reduce the number of reload registers needed.
1648 This is safe if the input reload does not appear in
1649 the value being output-reloaded, because this implies
1650 it is not needed any more once the original insn completes.
1652 If that doesn't work, see we can use any of the registers that
1653 die in this insn as a reload register. We can if it is of the right
1654 class and does not appear in the value being output-reloaded. */
1660 int output_reload
= -1;
1661 int secondary_out
= -1;
1664 /* Find the output reload; return unless there is exactly one
1665 and that one is mandatory. */
1667 for (i
= 0; i
< n_reloads
; i
++)
1668 if (rld
[i
].out
!= 0)
1670 if (output_reload
>= 0)
1675 if (output_reload
< 0 || rld
[output_reload
].optional
)
1678 /* An input-output reload isn't combinable. */
1680 if (rld
[output_reload
].in
!= 0)
1683 /* If this reload is for an earlyclobber operand, we can't do anything. */
1684 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1687 /* If there is a reload for part of the address of this operand, we would
1688 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1689 its life to the point where doing this combine would not lower the
1690 number of spill registers needed. */
1691 for (i
= 0; i
< n_reloads
; i
++)
1692 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1693 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1694 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1697 /* Check each input reload; can we combine it? */
1699 for (i
= 0; i
< n_reloads
; i
++)
1700 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1701 /* Life span of this reload must not extend past main insn. */
1702 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1703 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1704 && rld
[i
].when_needed
!= RELOAD_OTHER
1705 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1706 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1707 rld
[output_reload
].outmode
))
1709 && rld
[i
].reg_rtx
== 0
1710 #ifdef SECONDARY_MEMORY_NEEDED
1711 /* Don't combine two reloads with different secondary
1712 memory locations. */
1713 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1714 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1715 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1716 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1718 && (SMALL_REGISTER_CLASSES
1719 ? (rld
[i
].class == rld
[output_reload
].class)
1720 : (reg_class_subset_p (rld
[i
].class,
1721 rld
[output_reload
].class)
1722 || reg_class_subset_p (rld
[output_reload
].class,
1724 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1725 /* Args reversed because the first arg seems to be
1726 the one that we imagine being modified
1727 while the second is the one that might be affected. */
1728 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1730 /* However, if the input is a register that appears inside
1731 the output, then we also can't share.
1732 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1733 If the same reload reg is used for both reg 69 and the
1734 result to be stored in memory, then that result
1735 will clobber the address of the memory ref. */
1736 && ! (GET_CODE (rld
[i
].in
) == REG
1737 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1738 rld
[output_reload
].out
))))
1739 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1740 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1741 && (reg_class_size
[(int) rld
[i
].class]
1742 || SMALL_REGISTER_CLASSES
)
1743 /* We will allow making things slightly worse by combining an
1744 input and an output, but no worse than that. */
1745 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1746 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1750 /* We have found a reload to combine with! */
1751 rld
[i
].out
= rld
[output_reload
].out
;
1752 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1753 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1754 /* Mark the old output reload as inoperative. */
1755 rld
[output_reload
].out
= 0;
1756 /* The combined reload is needed for the entire insn. */
1757 rld
[i
].when_needed
= RELOAD_OTHER
;
1758 /* If the output reload had a secondary reload, copy it. */
1759 if (rld
[output_reload
].secondary_out_reload
!= -1)
1761 rld
[i
].secondary_out_reload
1762 = rld
[output_reload
].secondary_out_reload
;
1763 rld
[i
].secondary_out_icode
1764 = rld
[output_reload
].secondary_out_icode
;
1767 #ifdef SECONDARY_MEMORY_NEEDED
1768 /* Copy any secondary MEM. */
1769 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1770 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1771 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1773 /* If required, minimize the register class. */
1774 if (reg_class_subset_p (rld
[output_reload
].class,
1776 rld
[i
].class = rld
[output_reload
].class;
1778 /* Transfer all replacements from the old reload to the combined. */
1779 for (j
= 0; j
< n_replacements
; j
++)
1780 if (replacements
[j
].what
== output_reload
)
1781 replacements
[j
].what
= i
;
1786 /* If this insn has only one operand that is modified or written (assumed
1787 to be the first), it must be the one corresponding to this reload. It
1788 is safe to use anything that dies in this insn for that output provided
1789 that it does not occur in the output (we already know it isn't an
1790 earlyclobber. If this is an asm insn, give up. */
1792 if (INSN_CODE (this_insn
) == -1)
1795 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1796 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1797 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1800 /* See if some hard register that dies in this insn and is not used in
1801 the output is the right class. Only works if the register we pick
1802 up can fully hold our output reload. */
1803 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1804 if (REG_NOTE_KIND (note
) == REG_DEAD
1805 && GET_CODE (XEXP (note
, 0)) == REG
1806 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1807 rld
[output_reload
].out
)
1808 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1809 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1810 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1811 REGNO (XEXP (note
, 0)))
1812 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1813 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1814 /* Ensure that a secondary or tertiary reload for this output
1815 won't want this register. */
1816 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1817 || (! (TEST_HARD_REG_BIT
1818 (reg_class_contents
[(int) rld
[secondary_out
].class],
1819 REGNO (XEXP (note
, 0))))
1820 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1821 || ! (TEST_HARD_REG_BIT
1822 (reg_class_contents
[(int) rld
[secondary_out
].class],
1823 REGNO (XEXP (note
, 0)))))))
1824 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1826 rld
[output_reload
].reg_rtx
1827 = gen_rtx_REG (rld
[output_reload
].outmode
,
1828 REGNO (XEXP (note
, 0)));
1833 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1834 See if one of IN and OUT is a register that may be used;
1835 this is desirable since a spill-register won't be needed.
1836 If so, return the register rtx that proves acceptable.
1838 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1839 CLASS is the register class required for the reload.
1841 If FOR_REAL is >= 0, it is the number of the reload,
1842 and in some cases when it can be discovered that OUT doesn't need
1843 to be computed, clear out rld[FOR_REAL].out.
1845 If FOR_REAL is -1, this should not be done, because this call
1846 is just to see if a register can be found, not to find and install it.
1848 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1849 puts an additional constraint on being able to use IN for OUT since
1850 IN must not appear elsewhere in the insn (it is assumed that IN itself
1851 is safe from the earlyclobber). */
1854 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1855 inmode
, outmode
, class, for_real
, earlyclobber
)
1856 rtx real_in
, real_out
;
1857 rtx
*inloc
, *outloc
;
1858 enum machine_mode inmode
, outmode
;
1859 enum reg_class
class;
1869 /* If operands exceed a word, we can't use either of them
1870 unless they have the same size. */
1871 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1872 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1873 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1876 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1877 respectively refers to a hard register. */
1879 /* Find the inside of any subregs. */
1880 while (GET_CODE (out
) == SUBREG
)
1882 if (GET_CODE (SUBREG_REG (out
)) == REG
1883 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1884 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1885 GET_MODE (SUBREG_REG (out
)),
1888 out
= SUBREG_REG (out
);
1890 while (GET_CODE (in
) == SUBREG
)
1892 if (GET_CODE (SUBREG_REG (in
)) == REG
1893 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1894 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1895 GET_MODE (SUBREG_REG (in
)),
1898 in
= SUBREG_REG (in
);
1901 /* Narrow down the reg class, the same way push_reload will;
1902 otherwise we might find a dummy now, but push_reload won't. */
1903 class = PREFERRED_RELOAD_CLASS (in
, class);
1905 /* See if OUT will do. */
1906 if (GET_CODE (out
) == REG
1907 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1909 unsigned int regno
= REGNO (out
) + out_offset
;
1910 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1913 /* When we consider whether the insn uses OUT,
1914 ignore references within IN. They don't prevent us
1915 from copying IN into OUT, because those refs would
1916 move into the insn that reloads IN.
1918 However, we only ignore IN in its role as this reload.
1919 If the insn uses IN elsewhere and it contains OUT,
1920 that counts. We can't be sure it's the "same" operand
1921 so it might not go through this reload. */
1923 *inloc
= const0_rtx
;
1925 if (regno
< FIRST_PSEUDO_REGISTER
1926 && HARD_REGNO_MODE_OK (regno
, outmode
)
1927 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1928 PATTERN (this_insn
), outloc
))
1932 for (i
= 0; i
< nwords
; i
++)
1933 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1939 if (GET_CODE (real_out
) == REG
)
1942 value
= gen_rtx_REG (outmode
, regno
);
1949 /* Consider using IN if OUT was not acceptable
1950 or if OUT dies in this insn (like the quotient in a divmod insn).
1951 We can't use IN unless it is dies in this insn,
1952 which means we must know accurately which hard regs are live.
1953 Also, the result can't go in IN if IN is used within OUT,
1954 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1955 if (hard_regs_live_known
1956 && GET_CODE (in
) == REG
1957 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1959 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1960 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1961 && !fixed_regs
[REGNO (in
)]
1962 && HARD_REGNO_MODE_OK (REGNO (in
),
1963 /* The only case where out and real_out might
1964 have different modes is where real_out
1965 is a subreg, and in that case, out
1967 (GET_MODE (out
) != VOIDmode
1968 ? GET_MODE (out
) : outmode
)))
1970 unsigned int regno
= REGNO (in
) + in_offset
;
1971 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1973 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
1974 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1975 PATTERN (this_insn
))
1977 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1978 PATTERN (this_insn
), inloc
)))
1982 for (i
= 0; i
< nwords
; i
++)
1983 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1989 /* If we were going to use OUT as the reload reg
1990 and changed our mind, it means OUT is a dummy that
1991 dies here. So don't bother copying value to it. */
1992 if (for_real
>= 0 && value
== real_out
)
1993 rld
[for_real
].out
= 0;
1994 if (GET_CODE (real_in
) == REG
)
1997 value
= gen_rtx_REG (inmode
, regno
);
2005 /* This page contains subroutines used mainly for determining
2006 whether the IN or an OUT of a reload can serve as the
2009 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2012 earlyclobber_operand_p (x
)
2017 for (i
= 0; i
< n_earlyclobbers
; i
++)
2018 if (reload_earlyclobbers
[i
] == x
)
2024 /* Return 1 if expression X alters a hard reg in the range
2025 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2026 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2027 X should be the body of an instruction. */
2030 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
2031 unsigned int beg_regno
, end_regno
;
2034 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2036 rtx op0
= SET_DEST (x
);
2038 while (GET_CODE (op0
) == SUBREG
)
2039 op0
= SUBREG_REG (op0
);
2040 if (GET_CODE (op0
) == REG
)
2042 unsigned int r
= REGNO (op0
);
2044 /* See if this reg overlaps range under consideration. */
2046 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
2050 else if (GET_CODE (x
) == PARALLEL
)
2052 int i
= XVECLEN (x
, 0) - 1;
2055 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2062 /* Return 1 if ADDR is a valid memory address for mode MODE,
2063 and check that each pseudo reg has the proper kind of
2067 strict_memory_address_p (mode
, addr
)
2068 enum machine_mode mode ATTRIBUTE_UNUSED
;
2071 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2078 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2079 if they are the same hard reg, and has special hacks for
2080 autoincrement and autodecrement.
2081 This is specifically intended for find_reloads to use
2082 in determining whether two operands match.
2083 X is the operand whose number is the lower of the two.
2085 The value is 2 if Y contains a pre-increment that matches
2086 a non-incrementing address in X. */
2088 /* ??? To be completely correct, we should arrange to pass
2089 for X the output operand and for Y the input operand.
2090 For now, we assume that the output operand has the lower number
2091 because that is natural in (SET output (... input ...)). */
2094 operands_match_p (x
, y
)
2098 RTX_CODE code
= GET_CODE (x
);
2104 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2105 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2106 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2112 i
= REGNO (SUBREG_REG (x
));
2113 if (i
>= FIRST_PSEUDO_REGISTER
)
2115 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2116 GET_MODE (SUBREG_REG (x
)),
2123 if (GET_CODE (y
) == SUBREG
)
2125 j
= REGNO (SUBREG_REG (y
));
2126 if (j
>= FIRST_PSEUDO_REGISTER
)
2128 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2129 GET_MODE (SUBREG_REG (y
)),
2136 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2137 multiple hard register group, so that for example (reg:DI 0) and
2138 (reg:SI 1) will be considered the same register. */
2139 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2140 && i
< FIRST_PSEUDO_REGISTER
)
2141 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2142 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2143 && j
< FIRST_PSEUDO_REGISTER
)
2144 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2148 /* If two operands must match, because they are really a single
2149 operand of an assembler insn, then two postincrements are invalid
2150 because the assembler insn would increment only once.
2151 On the other hand, a postincrement matches ordinary indexing
2152 if the postincrement is the output operand. */
2153 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2154 return operands_match_p (XEXP (x
, 0), y
);
2155 /* Two preincrements are invalid
2156 because the assembler insn would increment only once.
2157 On the other hand, a preincrement matches ordinary indexing
2158 if the preincrement is the input operand.
2159 In this case, return 2, since some callers need to do special
2160 things when this happens. */
2161 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2162 || GET_CODE (y
) == PRE_MODIFY
)
2163 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2167 /* Now we have disposed of all the cases
2168 in which different rtx codes can match. */
2169 if (code
!= GET_CODE (y
))
2171 if (code
== LABEL_REF
)
2172 return XEXP (x
, 0) == XEXP (y
, 0);
2173 if (code
== SYMBOL_REF
)
2174 return XSTR (x
, 0) == XSTR (y
, 0);
2176 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2178 if (GET_MODE (x
) != GET_MODE (y
))
2181 /* Compare the elements. If any pair of corresponding elements
2182 fail to match, return 0 for the whole things. */
2185 fmt
= GET_RTX_FORMAT (code
);
2186 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2192 if (XWINT (x
, i
) != XWINT (y
, i
))
2197 if (XINT (x
, i
) != XINT (y
, i
))
2202 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2205 /* If any subexpression returns 2,
2206 we should return 2 if we are successful. */
2215 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2217 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2219 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2227 /* It is believed that rtx's at this level will never
2228 contain anything but integers and other rtx's,
2229 except for within LABEL_REFs and SYMBOL_REFs. */
2234 return 1 + success_2
;
2237 /* Describe the range of registers or memory referenced by X.
2238 If X is a register, set REG_FLAG and put the first register
2239 number into START and the last plus one into END.
2240 If X is a memory reference, put a base address into BASE
2241 and a range of integer offsets into START and END.
2242 If X is pushing on the stack, we can assume it causes no trouble,
2243 so we set the SAFE field. */
2245 static struct decomposition
2249 struct decomposition val
;
2255 if (GET_CODE (x
) == MEM
)
2257 rtx base
= NULL_RTX
, offset
= 0;
2258 rtx addr
= XEXP (x
, 0);
2260 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2261 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2263 val
.base
= XEXP (addr
, 0);
2264 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2265 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2266 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2270 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2272 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2273 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2274 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2276 val
.base
= XEXP (addr
, 0);
2277 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2278 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2279 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2284 if (GET_CODE (addr
) == CONST
)
2286 addr
= XEXP (addr
, 0);
2289 if (GET_CODE (addr
) == PLUS
)
2291 if (CONSTANT_P (XEXP (addr
, 0)))
2293 base
= XEXP (addr
, 1);
2294 offset
= XEXP (addr
, 0);
2296 else if (CONSTANT_P (XEXP (addr
, 1)))
2298 base
= XEXP (addr
, 0);
2299 offset
= XEXP (addr
, 1);
2306 offset
= const0_rtx
;
2308 if (GET_CODE (offset
) == CONST
)
2309 offset
= XEXP (offset
, 0);
2310 if (GET_CODE (offset
) == PLUS
)
2312 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2314 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2315 offset
= XEXP (offset
, 0);
2317 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2319 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2320 offset
= XEXP (offset
, 1);
2324 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2325 offset
= const0_rtx
;
2328 else if (GET_CODE (offset
) != CONST_INT
)
2330 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2331 offset
= const0_rtx
;
2334 if (all_const
&& GET_CODE (base
) == PLUS
)
2335 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2337 if (GET_CODE (offset
) != CONST_INT
)
2340 val
.start
= INTVAL (offset
);
2341 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2345 else if (GET_CODE (x
) == REG
)
2348 val
.start
= true_regnum (x
);
2351 /* A pseudo with no hard reg. */
2352 val
.start
= REGNO (x
);
2353 val
.end
= val
.start
+ 1;
2357 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2359 else if (GET_CODE (x
) == SUBREG
)
2361 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2362 /* This could be more precise, but it's good enough. */
2363 return decompose (SUBREG_REG (x
));
2365 val
.start
= true_regnum (x
);
2367 return decompose (SUBREG_REG (x
));
2370 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2372 else if (CONSTANT_P (x
)
2373 /* This hasn't been assigned yet, so it can't conflict yet. */
2374 || GET_CODE (x
) == SCRATCH
)
2381 /* Return 1 if altering Y will not modify the value of X.
2382 Y is also described by YDATA, which should be decompose (Y). */
2385 immune_p (x
, y
, ydata
)
2387 struct decomposition ydata
;
2389 struct decomposition xdata
;
2392 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2396 if (GET_CODE (y
) != MEM
)
2398 /* If Y is memory and X is not, Y can't affect X. */
2399 if (GET_CODE (x
) != MEM
)
2402 xdata
= decompose (x
);
2404 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2406 /* If bases are distinct symbolic constants, there is no overlap. */
2407 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2409 /* Constants and stack slots never overlap. */
2410 if (CONSTANT_P (xdata
.base
)
2411 && (ydata
.base
== frame_pointer_rtx
2412 || ydata
.base
== hard_frame_pointer_rtx
2413 || ydata
.base
== stack_pointer_rtx
))
2415 if (CONSTANT_P (ydata
.base
)
2416 && (xdata
.base
== frame_pointer_rtx
2417 || xdata
.base
== hard_frame_pointer_rtx
2418 || xdata
.base
== stack_pointer_rtx
))
2420 /* If either base is variable, we don't know anything. */
2424 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2427 /* Similar, but calls decompose. */
2430 safe_from_earlyclobber (op
, clobber
)
2433 struct decomposition early_data
;
2435 early_data
= decompose (clobber
);
2436 return immune_p (op
, clobber
, early_data
);
2439 /* Main entry point of this file: search the body of INSN
2440 for values that need reloading and record them with push_reload.
2441 REPLACE nonzero means record also where the values occur
2442 so that subst_reloads can be used.
2444 IND_LEVELS says how many levels of indirection are supported by this
2445 machine; a value of zero means that a memory reference is not a valid
2448 LIVE_KNOWN says we have valid information about which hard
2449 regs are live at each point in the program; this is true when
2450 we are called from global_alloc but false when stupid register
2451 allocation has been done.
2453 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2454 which is nonnegative if the reg has been commandeered for reloading into.
2455 It is copied into STATIC_RELOAD_REG_P and referenced from there
2456 by various subroutines.
2458 Return TRUE if some operands need to be changed, because of swapping
2459 commutative operands, reg_equiv_address substitution, or whatever. */
2462 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2464 int replace
, ind_levels
;
2466 short *reload_reg_p
;
2468 int insn_code_number
;
2471 /* These start out as the constraints for the insn
2472 and they are chewed up as we consider alternatives. */
2473 char *constraints
[MAX_RECOG_OPERANDS
];
2474 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2476 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2477 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2478 /* Nonzero for a MEM operand whose entire address needs a reload. */
2479 int address_reloaded
[MAX_RECOG_OPERANDS
];
2480 /* Value of enum reload_type to use for operand. */
2481 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2482 /* Value of enum reload_type to use within address of operand. */
2483 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2484 /* Save the usage of each operand. */
2485 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2486 int no_input_reloads
= 0, no_output_reloads
= 0;
2488 int this_alternative
[MAX_RECOG_OPERANDS
];
2489 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2490 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2491 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2492 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2493 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2495 int goal_alternative
[MAX_RECOG_OPERANDS
];
2496 int this_alternative_number
;
2497 int goal_alternative_number
= 0;
2498 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2499 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2500 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2501 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2502 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2503 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2504 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2505 int goal_alternative_swapped
;
2508 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2509 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2510 rtx body
= PATTERN (insn
);
2511 rtx set
= single_set (insn
);
2512 int goal_earlyclobber
= 0, this_earlyclobber
;
2513 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2519 n_earlyclobbers
= 0;
2520 replace_reloads
= replace
;
2521 hard_regs_live_known
= live_known
;
2522 static_reload_reg_p
= reload_reg_p
;
2524 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2525 neither are insns that SET cc0. Insns that use CC0 are not allowed
2526 to have any input reloads. */
2527 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2528 no_output_reloads
= 1;
2531 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2532 no_input_reloads
= 1;
2533 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2534 no_output_reloads
= 1;
2537 #ifdef SECONDARY_MEMORY_NEEDED
2538 /* The eliminated forms of any secondary memory locations are per-insn, so
2539 clear them out here. */
2541 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2544 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2545 is cheap to move between them. If it is not, there may not be an insn
2546 to do the copy, so we may need a reload. */
2547 if (GET_CODE (body
) == SET
2548 && GET_CODE (SET_DEST (body
)) == REG
2549 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2550 && GET_CODE (SET_SRC (body
)) == REG
2551 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2552 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2553 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2554 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2557 extract_insn (insn
);
2559 noperands
= reload_n_operands
= recog_data
.n_operands
;
2560 n_alternatives
= recog_data
.n_alternatives
;
2562 /* Just return "no reloads" if insn has no operands with constraints. */
2563 if (noperands
== 0 || n_alternatives
== 0)
2566 insn_code_number
= INSN_CODE (insn
);
2567 this_insn_is_asm
= insn_code_number
< 0;
2569 memcpy (operand_mode
, recog_data
.operand_mode
,
2570 noperands
* sizeof (enum machine_mode
));
2571 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2575 /* If we will need to know, later, whether some pair of operands
2576 are the same, we must compare them now and save the result.
2577 Reloading the base and index registers will clobber them
2578 and afterward they will fail to match. */
2580 for (i
= 0; i
< noperands
; i
++)
2585 substed_operand
[i
] = recog_data
.operand
[i
];
2588 modified
[i
] = RELOAD_READ
;
2590 /* Scan this operand's constraint to see if it is an output operand,
2591 an in-out operand, is commutative, or should match another. */
2595 p
+= CONSTRAINT_LEN (c
, p
);
2597 modified
[i
] = RELOAD_WRITE
;
2599 modified
[i
] = RELOAD_READ_WRITE
;
2602 /* The last operand should not be marked commutative. */
2603 if (i
== noperands
- 1)
2608 else if (ISDIGIT (c
))
2610 c
= strtoul (p
- 1, &p
, 10);
2612 operands_match
[c
][i
]
2613 = operands_match_p (recog_data
.operand
[c
],
2614 recog_data
.operand
[i
]);
2616 /* An operand may not match itself. */
2620 /* If C can be commuted with C+1, and C might need to match I,
2621 then C+1 might also need to match I. */
2622 if (commutative
>= 0)
2624 if (c
== commutative
|| c
== commutative
+ 1)
2626 int other
= c
+ (c
== commutative
? 1 : -1);
2627 operands_match
[other
][i
]
2628 = operands_match_p (recog_data
.operand
[other
],
2629 recog_data
.operand
[i
]);
2631 if (i
== commutative
|| i
== commutative
+ 1)
2633 int other
= i
+ (i
== commutative
? 1 : -1);
2634 operands_match
[c
][other
]
2635 = operands_match_p (recog_data
.operand
[c
],
2636 recog_data
.operand
[other
]);
2638 /* Note that C is supposed to be less than I.
2639 No need to consider altering both C and I because in
2640 that case we would alter one into the other. */
2646 /* Examine each operand that is a memory reference or memory address
2647 and reload parts of the addresses into index registers.
2648 Also here any references to pseudo regs that didn't get hard regs
2649 but are equivalent to constants get replaced in the insn itself
2650 with those constants. Nobody will ever see them again.
2652 Finally, set up the preferred classes of each operand. */
2654 for (i
= 0; i
< noperands
; i
++)
2656 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2658 address_reloaded
[i
] = 0;
2659 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2660 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2663 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2664 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2667 if (*constraints
[i
] == 0)
2668 /* Ignore things like match_operator operands. */
2670 else if (constraints
[i
][0] == 'p'
2671 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2673 find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2674 recog_data
.operand
[i
],
2675 recog_data
.operand_loc
[i
],
2676 i
, operand_type
[i
], ind_levels
, insn
);
2678 /* If we now have a simple operand where we used to have a
2679 PLUS or MULT, re-recognize and try again. */
2680 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2681 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2682 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2683 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2685 INSN_CODE (insn
) = -1;
2686 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2691 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2692 substed_operand
[i
] = recog_data
.operand
[i
];
2694 /* Address operands are reloaded in their existing mode,
2695 no matter what is specified in the machine description. */
2696 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2698 else if (code
== MEM
)
2701 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2702 recog_data
.operand_loc
[i
],
2703 XEXP (recog_data
.operand
[i
], 0),
2704 &XEXP (recog_data
.operand
[i
], 0),
2705 i
, address_type
[i
], ind_levels
, insn
);
2706 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2707 substed_operand
[i
] = recog_data
.operand
[i
];
2709 else if (code
== SUBREG
)
2711 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2713 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2716 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2718 &address_reloaded
[i
]);
2720 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2721 that didn't get a hard register, emit a USE with a REG_EQUAL
2722 note in front so that we might inherit a previous, possibly
2726 && GET_CODE (op
) == MEM
2727 && GET_CODE (reg
) == REG
2728 && (GET_MODE_SIZE (GET_MODE (reg
))
2729 >= GET_MODE_SIZE (GET_MODE (op
))))
2730 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2732 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2734 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2736 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2737 /* We can get a PLUS as an "operand" as a result of register
2738 elimination. See eliminate_regs and gen_reload. We handle
2739 a unary operator by reloading the operand. */
2740 substed_operand
[i
] = recog_data
.operand
[i
]
2741 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2742 ind_levels
, 0, insn
,
2743 &address_reloaded
[i
]);
2744 else if (code
== REG
)
2746 /* This is equivalent to calling find_reloads_toplev.
2747 The code is duplicated for speed.
2748 When we find a pseudo always equivalent to a constant,
2749 we replace it by the constant. We must be sure, however,
2750 that we don't try to replace it in the insn in which it
2752 int regno
= REGNO (recog_data
.operand
[i
]);
2753 if (reg_equiv_constant
[regno
] != 0
2754 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2756 /* Record the existing mode so that the check if constants are
2757 allowed will work when operand_mode isn't specified. */
2759 if (operand_mode
[i
] == VOIDmode
)
2760 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2762 substed_operand
[i
] = recog_data
.operand
[i
]
2763 = reg_equiv_constant
[regno
];
2765 if (reg_equiv_memory_loc
[regno
] != 0
2766 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2767 /* We need not give a valid is_set_dest argument since the case
2768 of a constant equivalence was checked above. */
2769 substed_operand
[i
] = recog_data
.operand
[i
]
2770 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2771 ind_levels
, 0, insn
,
2772 &address_reloaded
[i
]);
2774 /* If the operand is still a register (we didn't replace it with an
2775 equivalent), get the preferred class to reload it into. */
2776 code
= GET_CODE (recog_data
.operand
[i
]);
2778 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2779 >= FIRST_PSEUDO_REGISTER
)
2780 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2784 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2785 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2788 /* If this is simply a copy from operand 1 to operand 0, merge the
2789 preferred classes for the operands. */
2790 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2791 && recog_data
.operand
[1] == SET_SRC (set
))
2793 preferred_class
[0] = preferred_class
[1]
2794 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2795 pref_or_nothing
[0] |= pref_or_nothing
[1];
2796 pref_or_nothing
[1] |= pref_or_nothing
[0];
2799 /* Now see what we need for pseudo-regs that didn't get hard regs
2800 or got the wrong kind of hard reg. For this, we must consider
2801 all the operands together against the register constraints. */
2803 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2806 goal_alternative_swapped
= 0;
2809 /* The constraints are made of several alternatives.
2810 Each operand's constraint looks like foo,bar,... with commas
2811 separating the alternatives. The first alternatives for all
2812 operands go together, the second alternatives go together, etc.
2814 First loop over alternatives. */
2816 for (this_alternative_number
= 0;
2817 this_alternative_number
< n_alternatives
;
2818 this_alternative_number
++)
2820 /* Loop over operands for one constraint alternative. */
2821 /* LOSERS counts those that don't fit this alternative
2822 and would require loading. */
2824 /* BAD is set to 1 if it some operand can't fit this alternative
2825 even after reloading. */
2827 /* REJECT is a count of how undesirable this alternative says it is
2828 if any reloading is required. If the alternative matches exactly
2829 then REJECT is ignored, but otherwise it gets this much
2830 counted against it in addition to the reloading needed. Each
2831 ? counts three times here since we want the disparaging caused by
2832 a bad register class to only count 1/3 as much. */
2835 this_earlyclobber
= 0;
2837 for (i
= 0; i
< noperands
; i
++)
2839 char *p
= constraints
[i
];
2844 /* 0 => this operand can be reloaded somehow for this alternative. */
2846 /* 0 => this operand can be reloaded if the alternative allows regs. */
2850 rtx operand
= recog_data
.operand
[i
];
2852 /* Nonzero means this is a MEM that must be reloaded into a reg
2853 regardless of what the constraint says. */
2854 int force_reload
= 0;
2856 /* Nonzero if a constant forced into memory would be OK for this
2859 int earlyclobber
= 0;
2861 /* If the predicate accepts a unary operator, it means that
2862 we need to reload the operand, but do not do this for
2863 match_operator and friends. */
2864 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2865 operand
= XEXP (operand
, 0);
2867 /* If the operand is a SUBREG, extract
2868 the REG or MEM (or maybe even a constant) within.
2869 (Constants can occur as a result of reg_equiv_constant.) */
2871 while (GET_CODE (operand
) == SUBREG
)
2873 /* Offset only matters when operand is a REG and
2874 it is a hard reg. This is because it is passed
2875 to reg_fits_class_p if it is a REG and all pseudos
2876 return 0 from that function. */
2877 if (GET_CODE (SUBREG_REG (operand
)) == REG
2878 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2880 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2881 GET_MODE (SUBREG_REG (operand
)),
2882 SUBREG_BYTE (operand
),
2883 GET_MODE (operand
));
2885 operand
= SUBREG_REG (operand
);
2886 /* Force reload if this is a constant or PLUS or if there may
2887 be a problem accessing OPERAND in the outer mode. */
2888 if (CONSTANT_P (operand
)
2889 || GET_CODE (operand
) == PLUS
2890 /* We must force a reload of paradoxical SUBREGs
2891 of a MEM because the alignment of the inner value
2892 may not be enough to do the outer reference. On
2893 big-endian machines, it may also reference outside
2896 On machines that extend byte operations and we have a
2897 SUBREG where both the inner and outer modes are no wider
2898 than a word and the inner mode is narrower, is integral,
2899 and gets extended when loaded from memory, combine.c has
2900 made assumptions about the behavior of the machine in such
2901 register access. If the data is, in fact, in memory we
2902 must always load using the size assumed to be in the
2903 register and let the insn do the different-sized
2906 This is doubly true if WORD_REGISTER_OPERATIONS. In
2907 this case eliminate_regs has left non-paradoxical
2908 subregs for push_reloads to see. Make sure it does
2909 by forcing the reload.
2911 ??? When is it right at this stage to have a subreg
2912 of a mem that is _not_ to be handled specially? IMO
2913 those should have been reduced to just a mem. */
2914 || ((GET_CODE (operand
) == MEM
2915 || (GET_CODE (operand
)== REG
2916 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2917 #ifndef WORD_REGISTER_OPERATIONS
2918 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2919 < BIGGEST_ALIGNMENT
)
2920 && (GET_MODE_SIZE (operand_mode
[i
])
2921 > GET_MODE_SIZE (GET_MODE (operand
))))
2922 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2923 #ifdef LOAD_EXTEND_OP
2924 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2925 && (GET_MODE_SIZE (GET_MODE (operand
))
2927 && (GET_MODE_SIZE (operand_mode
[i
])
2928 > GET_MODE_SIZE (GET_MODE (operand
)))
2929 && INTEGRAL_MODE_P (GET_MODE (operand
))
2930 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2935 /* This following hunk of code should no longer be
2936 needed at all with SUBREG_BYTE. If you need this
2937 code back, please explain to me why so I can
2938 fix the real problem. -DaveM */
2940 /* Subreg of a hard reg which can't handle the subreg's mode
2941 or which would handle that mode in the wrong number of
2942 registers for subregging to work. */
2943 || (GET_CODE (operand
) == REG
2944 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2945 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2946 && (GET_MODE_SIZE (GET_MODE (operand
))
2948 && ((GET_MODE_SIZE (GET_MODE (operand
))
2950 != HARD_REGNO_NREGS (REGNO (operand
),
2951 GET_MODE (operand
))))
2952 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2959 this_alternative
[i
] = (int) NO_REGS
;
2960 this_alternative_win
[i
] = 0;
2961 this_alternative_match_win
[i
] = 0;
2962 this_alternative_offmemok
[i
] = 0;
2963 this_alternative_earlyclobber
[i
] = 0;
2964 this_alternative_matches
[i
] = -1;
2966 /* An empty constraint or empty alternative
2967 allows anything which matched the pattern. */
2968 if (*p
== 0 || *p
== ',')
2971 /* Scan this alternative's specs for this operand;
2972 set WIN if the operand fits any letter in this alternative.
2973 Otherwise, clear BADOP if this operand could
2974 fit some letter after reloads,
2975 or set WINREG if this operand could fit after reloads
2976 provided the constraint allows some registers. */
2979 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
2988 case '=': case '+': case '*':
2992 /* The last operand should not be marked commutative. */
2993 if (i
!= noperands
- 1)
3006 /* Ignore rest of this alternative as far as
3007 reloading is concerned. */
3010 while (*p
&& *p
!= ',');
3014 case '0': case '1': case '2': case '3': case '4':
3015 case '5': case '6': case '7': case '8': case '9':
3016 m
= strtoul (p
, &end
, 10);
3020 this_alternative_matches
[i
] = m
;
3021 /* We are supposed to match a previous operand.
3022 If we do, we win if that one did.
3023 If we do not, count both of the operands as losers.
3024 (This is too conservative, since most of the time
3025 only a single reload insn will be needed to make
3026 the two operands win. As a result, this alternative
3027 may be rejected when it is actually desirable.) */
3028 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3029 /* If we are matching as if two operands were swapped,
3030 also pretend that operands_match had been computed
3032 But if I is the second of those and C is the first,
3033 don't exchange them, because operands_match is valid
3034 only on one side of its diagonal. */
3036 [(m
== commutative
|| m
== commutative
+ 1)
3037 ? 2 * commutative
+ 1 - m
: m
]
3038 [(i
== commutative
|| i
== commutative
+ 1)
3039 ? 2 * commutative
+ 1 - i
: i
])
3040 : operands_match
[m
][i
])
3042 /* If we are matching a non-offsettable address where an
3043 offsettable address was expected, then we must reject
3044 this combination, because we can't reload it. */
3045 if (this_alternative_offmemok
[m
]
3046 && GET_CODE (recog_data
.operand
[m
]) == MEM
3047 && this_alternative
[m
] == (int) NO_REGS
3048 && ! this_alternative_win
[m
])
3051 did_match
= this_alternative_win
[m
];
3055 /* Operands don't match. */
3057 /* Retroactively mark the operand we had to match
3058 as a loser, if it wasn't already. */
3059 if (this_alternative_win
[m
])
3061 this_alternative_win
[m
] = 0;
3062 if (this_alternative
[m
] == (int) NO_REGS
)
3064 /* But count the pair only once in the total badness of
3065 this alternative, if the pair can be a dummy reload. */
3067 = find_dummy_reload (recog_data
.operand
[i
],
3068 recog_data
.operand
[m
],
3069 recog_data
.operand_loc
[i
],
3070 recog_data
.operand_loc
[m
],
3071 operand_mode
[i
], operand_mode
[m
],
3072 this_alternative
[m
], -1,
3073 this_alternative_earlyclobber
[m
]);
3078 /* This can be fixed with reloads if the operand
3079 we are supposed to match can be fixed with reloads. */
3081 this_alternative
[i
] = this_alternative
[m
];
3083 /* If we have to reload this operand and some previous
3084 operand also had to match the same thing as this
3085 operand, we don't know how to do that. So reject this
3087 if (! did_match
|| force_reload
)
3088 for (j
= 0; j
< i
; j
++)
3089 if (this_alternative_matches
[j
]
3090 == this_alternative_matches
[i
])
3095 /* All necessary reloads for an address_operand
3096 were handled in find_reloads_address. */
3097 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3105 if (GET_CODE (operand
) == MEM
3106 || (GET_CODE (operand
) == REG
3107 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3108 && reg_renumber
[REGNO (operand
)] < 0))
3110 if (CONSTANT_P (operand
)
3111 /* force_const_mem does not accept HIGH. */
3112 && GET_CODE (operand
) != HIGH
)
3118 if (GET_CODE (operand
) == MEM
3119 && ! address_reloaded
[i
]
3120 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3121 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3126 if (GET_CODE (operand
) == MEM
3127 && ! address_reloaded
[i
]
3128 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3129 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3133 /* Memory operand whose address is not offsettable. */
3137 if (GET_CODE (operand
) == MEM
3138 && ! (ind_levels
? offsettable_memref_p (operand
)
3139 : offsettable_nonstrict_memref_p (operand
))
3140 /* Certain mem addresses will become offsettable
3141 after they themselves are reloaded. This is important;
3142 we don't want our own handling of unoffsettables
3143 to override the handling of reg_equiv_address. */
3144 && !(GET_CODE (XEXP (operand
, 0)) == REG
3146 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3150 /* Memory operand whose address is offsettable. */
3154 if ((GET_CODE (operand
) == MEM
3155 /* If IND_LEVELS, find_reloads_address won't reload a
3156 pseudo that didn't get a hard reg, so we have to
3157 reject that case. */
3158 && ((ind_levels
? offsettable_memref_p (operand
)
3159 : offsettable_nonstrict_memref_p (operand
))
3160 /* A reloaded address is offsettable because it is now
3161 just a simple register indirect. */
3162 || address_reloaded
[i
]))
3163 || (GET_CODE (operand
) == REG
3164 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3165 && reg_renumber
[REGNO (operand
)] < 0
3166 /* If reg_equiv_address is nonzero, we will be
3167 loading it into a register; hence it will be
3168 offsettable, but we cannot say that reg_equiv_mem
3169 is offsettable without checking. */
3170 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3171 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3172 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3174 /* force_const_mem does not accept HIGH. */
3175 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3176 || GET_CODE (operand
) == MEM
)
3183 /* Output operand that is stored before the need for the
3184 input operands (and their index registers) is over. */
3185 earlyclobber
= 1, this_earlyclobber
= 1;
3190 if (GET_CODE (operand
) == CONST_DOUBLE
3191 || (GET_CODE (operand
) == CONST_VECTOR
3192 && (GET_MODE_CLASS (GET_MODE (operand
))
3193 == MODE_VECTOR_FLOAT
)))
3199 if (GET_CODE (operand
) == CONST_DOUBLE
3200 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3205 if (GET_CODE (operand
) == CONST_INT
3206 || (GET_CODE (operand
) == CONST_DOUBLE
3207 && GET_MODE (operand
) == VOIDmode
))
3210 if (CONSTANT_P (operand
)
3211 #ifdef LEGITIMATE_PIC_OPERAND_P
3212 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3219 if (GET_CODE (operand
) == CONST_INT
3220 || (GET_CODE (operand
) == CONST_DOUBLE
3221 && GET_MODE (operand
) == VOIDmode
))
3233 if (GET_CODE (operand
) == CONST_INT
3234 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3244 /* A PLUS is never a valid operand, but reload can make
3245 it from a register when eliminating registers. */
3246 && GET_CODE (operand
) != PLUS
3247 /* A SCRATCH is not a valid operand. */
3248 && GET_CODE (operand
) != SCRATCH
3249 #ifdef LEGITIMATE_PIC_OPERAND_P
3250 && (! CONSTANT_P (operand
)
3252 || LEGITIMATE_PIC_OPERAND_P (operand
))
3254 && (GENERAL_REGS
== ALL_REGS
3255 || GET_CODE (operand
) != REG
3256 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3257 && reg_renumber
[REGNO (operand
)] < 0)))
3259 /* Drop through into 'r' case. */
3263 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3267 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3269 #ifdef EXTRA_CONSTRAINT_STR
3270 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3274 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3276 /* If the address was already reloaded,
3278 if (GET_CODE (operand
) == MEM
&& address_reloaded
[i
])
3280 /* Likewise if the address will be reloaded because
3281 reg_equiv_address is nonzero. For reg_equiv_mem
3282 we have to check. */
3283 if (GET_CODE (operand
) == REG
3284 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3285 && reg_renumber
[REGNO (operand
)] < 0
3286 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3287 && EXTRA_CONSTRAINT_STR (reg_equiv_mem
[REGNO (operand
)], c
, p
))
3288 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3291 /* If we didn't already win, we can reload
3292 constants via force_const_mem, and other
3293 MEMs by reloading the address like for 'o'. */
3294 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3295 || GET_CODE (operand
) == MEM
)
3301 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3303 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3306 /* If we didn't already win, we can reload
3307 the address into a base register. */
3308 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3313 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3320 = (int) (reg_class_subunion
3321 [this_alternative
[i
]]
3322 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3324 if (GET_MODE (operand
) == BLKmode
)
3327 if (GET_CODE (operand
) == REG
3328 && reg_fits_class_p (operand
, this_alternative
[i
],
3329 offset
, GET_MODE (recog_data
.operand
[i
])))
3333 while ((p
+= len
), c
);
3337 /* If this operand could be handled with a reg,
3338 and some reg is allowed, then this operand can be handled. */
3339 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3342 /* Record which operands fit this alternative. */
3343 this_alternative_earlyclobber
[i
] = earlyclobber
;
3344 if (win
&& ! force_reload
)
3345 this_alternative_win
[i
] = 1;
3346 else if (did_match
&& ! force_reload
)
3347 this_alternative_match_win
[i
] = 1;
3350 int const_to_mem
= 0;
3352 this_alternative_offmemok
[i
] = offmemok
;
3356 /* Alternative loses if it has no regs for a reg operand. */
3357 if (GET_CODE (operand
) == REG
3358 && this_alternative
[i
] == (int) NO_REGS
3359 && this_alternative_matches
[i
] < 0)
3362 /* If this is a constant that is reloaded into the desired
3363 class by copying it to memory first, count that as another
3364 reload. This is consistent with other code and is
3365 required to avoid choosing another alternative when
3366 the constant is moved into memory by this function on
3367 an early reload pass. Note that the test here is
3368 precisely the same as in the code below that calls
3370 if (CONSTANT_P (operand
)
3371 /* force_const_mem does not accept HIGH. */
3372 && GET_CODE (operand
) != HIGH
3373 && ((PREFERRED_RELOAD_CLASS (operand
,
3374 (enum reg_class
) this_alternative
[i
])
3376 || no_input_reloads
)
3377 && operand_mode
[i
] != VOIDmode
)
3380 if (this_alternative
[i
] != (int) NO_REGS
)
3384 /* If we can't reload this value at all, reject this
3385 alternative. Note that we could also lose due to
3386 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3389 if (! CONSTANT_P (operand
)
3390 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3391 && (PREFERRED_RELOAD_CLASS (operand
,
3392 (enum reg_class
) this_alternative
[i
])
3396 /* Alternative loses if it requires a type of reload not
3397 permitted for this insn. We can always reload SCRATCH
3398 and objects with a REG_UNUSED note. */
3399 else if (GET_CODE (operand
) != SCRATCH
3400 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3401 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3403 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3407 /* We prefer to reload pseudos over reloading other things,
3408 since such reloads may be able to be eliminated later.
3409 If we are reloading a SCRATCH, we won't be generating any
3410 insns, just using a register, so it is also preferred.
3411 So bump REJECT in other cases. Don't do this in the
3412 case where we are forcing a constant into memory and
3413 it will then win since we don't want to have a different
3414 alternative match then. */
3415 if (! (GET_CODE (operand
) == REG
3416 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3417 && GET_CODE (operand
) != SCRATCH
3418 && ! (const_to_mem
&& constmemok
))
3421 /* Input reloads can be inherited more often than output
3422 reloads can be removed, so penalize output reloads. */
3423 if (operand_type
[i
] != RELOAD_FOR_INPUT
3424 && GET_CODE (operand
) != SCRATCH
)
3428 /* If this operand is a pseudo register that didn't get a hard
3429 reg and this alternative accepts some register, see if the
3430 class that we want is a subset of the preferred class for this
3431 register. If not, but it intersects that class, use the
3432 preferred class instead. If it does not intersect the preferred
3433 class, show that usage of this alternative should be discouraged;
3434 it will be discouraged more still if the register is `preferred
3435 or nothing'. We do this because it increases the chance of
3436 reusing our spill register in a later insn and avoiding a pair
3437 of memory stores and loads.
3439 Don't bother with this if this alternative will accept this
3442 Don't do this for a multiword operand, since it is only a
3443 small win and has the risk of requiring more spill registers,
3444 which could cause a large loss.
3446 Don't do this if the preferred class has only one register
3447 because we might otherwise exhaust the class. */
3449 if (! win
&& ! did_match
3450 && this_alternative
[i
] != (int) NO_REGS
3451 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3452 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3454 if (! reg_class_subset_p (this_alternative
[i
],
3455 preferred_class
[i
]))
3457 /* Since we don't have a way of forming the intersection,
3458 we just do something special if the preferred class
3459 is a subset of the class we have; that's the most
3460 common case anyway. */
3461 if (reg_class_subset_p (preferred_class
[i
],
3462 this_alternative
[i
]))
3463 this_alternative
[i
] = (int) preferred_class
[i
];
3465 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3470 /* Now see if any output operands that are marked "earlyclobber"
3471 in this alternative conflict with any input operands
3472 or any memory addresses. */
3474 for (i
= 0; i
< noperands
; i
++)
3475 if (this_alternative_earlyclobber
[i
]
3476 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3478 struct decomposition early_data
;
3480 early_data
= decompose (recog_data
.operand
[i
]);
3482 if (modified
[i
] == RELOAD_READ
)
3485 if (this_alternative
[i
] == NO_REGS
)
3487 this_alternative_earlyclobber
[i
] = 0;
3488 if (this_insn_is_asm
)
3489 error_for_asm (this_insn
,
3490 "`&' constraint used with no register class");
3495 for (j
= 0; j
< noperands
; j
++)
3496 /* Is this an input operand or a memory ref? */
3497 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3498 || modified
[j
] != RELOAD_WRITE
)
3500 /* Ignore things like match_operator operands. */
3501 && *recog_data
.constraints
[j
] != 0
3502 /* Don't count an input operand that is constrained to match
3503 the early clobber operand. */
3504 && ! (this_alternative_matches
[j
] == i
3505 && rtx_equal_p (recog_data
.operand
[i
],
3506 recog_data
.operand
[j
]))
3507 /* Is it altered by storing the earlyclobber operand? */
3508 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3511 /* If the output is in a single-reg class,
3512 it's costly to reload it, so reload the input instead. */
3513 if (reg_class_size
[this_alternative
[i
]] == 1
3514 && (GET_CODE (recog_data
.operand
[j
]) == REG
3515 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3518 this_alternative_win
[j
] = 0;
3519 this_alternative_match_win
[j
] = 0;
3524 /* If an earlyclobber operand conflicts with something,
3525 it must be reloaded, so request this and count the cost. */
3529 this_alternative_win
[i
] = 0;
3530 this_alternative_match_win
[j
] = 0;
3531 for (j
= 0; j
< noperands
; j
++)
3532 if (this_alternative_matches
[j
] == i
3533 && this_alternative_match_win
[j
])
3535 this_alternative_win
[j
] = 0;
3536 this_alternative_match_win
[j
] = 0;
3542 /* If one alternative accepts all the operands, no reload required,
3543 choose that alternative; don't consider the remaining ones. */
3546 /* Unswap these so that they are never swapped at `finish'. */
3547 if (commutative
>= 0)
3549 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3550 recog_data
.operand
[commutative
+ 1]
3551 = substed_operand
[commutative
+ 1];
3553 for (i
= 0; i
< noperands
; i
++)
3555 goal_alternative_win
[i
] = this_alternative_win
[i
];
3556 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3557 goal_alternative
[i
] = this_alternative
[i
];
3558 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3559 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3560 goal_alternative_earlyclobber
[i
]
3561 = this_alternative_earlyclobber
[i
];
3563 goal_alternative_number
= this_alternative_number
;
3564 goal_alternative_swapped
= swapped
;
3565 goal_earlyclobber
= this_earlyclobber
;
3569 /* REJECT, set by the ! and ? constraint characters and when a register
3570 would be reloaded into a non-preferred class, discourages the use of
3571 this alternative for a reload goal. REJECT is incremented by six
3572 for each ? and two for each non-preferred class. */
3573 losers
= losers
* 6 + reject
;
3575 /* If this alternative can be made to work by reloading,
3576 and it needs less reloading than the others checked so far,
3577 record it as the chosen goal for reloading. */
3578 if (! bad
&& best
> losers
)
3580 for (i
= 0; i
< noperands
; i
++)
3582 goal_alternative
[i
] = this_alternative
[i
];
3583 goal_alternative_win
[i
] = this_alternative_win
[i
];
3584 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3585 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3586 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3587 goal_alternative_earlyclobber
[i
]
3588 = this_alternative_earlyclobber
[i
];
3590 goal_alternative_swapped
= swapped
;
3592 goal_alternative_number
= this_alternative_number
;
3593 goal_earlyclobber
= this_earlyclobber
;
3597 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3598 then we need to try each alternative twice,
3599 the second time matching those two operands
3600 as if we had exchanged them.
3601 To do this, really exchange them in operands.
3603 If we have just tried the alternatives the second time,
3604 return operands to normal and drop through. */
3606 if (commutative
>= 0)
3611 enum reg_class tclass
;
3614 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3615 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3616 /* Swap the duplicates too. */
3617 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3618 if (recog_data
.dup_num
[i
] == commutative
3619 || recog_data
.dup_num
[i
] == commutative
+ 1)
3620 *recog_data
.dup_loc
[i
]
3621 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3623 tclass
= preferred_class
[commutative
];
3624 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3625 preferred_class
[commutative
+ 1] = tclass
;
3627 t
= pref_or_nothing
[commutative
];
3628 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3629 pref_or_nothing
[commutative
+ 1] = t
;
3631 memcpy (constraints
, recog_data
.constraints
,
3632 noperands
* sizeof (char *));
3637 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3638 recog_data
.operand
[commutative
+ 1]
3639 = substed_operand
[commutative
+ 1];
3640 /* Unswap the duplicates too. */
3641 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3642 if (recog_data
.dup_num
[i
] == commutative
3643 || recog_data
.dup_num
[i
] == commutative
+ 1)
3644 *recog_data
.dup_loc
[i
]
3645 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3649 /* The operands don't meet the constraints.
3650 goal_alternative describes the alternative
3651 that we could reach by reloading the fewest operands.
3652 Reload so as to fit it. */
3654 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3656 /* No alternative works with reloads?? */
3657 if (insn_code_number
>= 0)
3658 fatal_insn ("unable to generate reloads for:", insn
);
3659 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3660 /* Avoid further trouble with this insn. */
3661 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3666 /* Jump to `finish' from above if all operands are valid already.
3667 In that case, goal_alternative_win is all 1. */
3670 /* Right now, for any pair of operands I and J that are required to match,
3672 goal_alternative_matches[J] is I.
3673 Set up goal_alternative_matched as the inverse function:
3674 goal_alternative_matched[I] = J. */
3676 for (i
= 0; i
< noperands
; i
++)
3677 goal_alternative_matched
[i
] = -1;
3679 for (i
= 0; i
< noperands
; i
++)
3680 if (! goal_alternative_win
[i
]
3681 && goal_alternative_matches
[i
] >= 0)
3682 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3684 for (i
= 0; i
< noperands
; i
++)
3685 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3687 /* If the best alternative is with operands 1 and 2 swapped,
3688 consider them swapped before reporting the reloads. Update the
3689 operand numbers of any reloads already pushed. */
3691 if (goal_alternative_swapped
)
3695 tem
= substed_operand
[commutative
];
3696 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3697 substed_operand
[commutative
+ 1] = tem
;
3698 tem
= recog_data
.operand
[commutative
];
3699 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3700 recog_data
.operand
[commutative
+ 1] = tem
;
3701 tem
= *recog_data
.operand_loc
[commutative
];
3702 *recog_data
.operand_loc
[commutative
]
3703 = *recog_data
.operand_loc
[commutative
+ 1];
3704 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3706 for (i
= 0; i
< n_reloads
; i
++)
3708 if (rld
[i
].opnum
== commutative
)
3709 rld
[i
].opnum
= commutative
+ 1;
3710 else if (rld
[i
].opnum
== commutative
+ 1)
3711 rld
[i
].opnum
= commutative
;
3715 for (i
= 0; i
< noperands
; i
++)
3717 operand_reloadnum
[i
] = -1;
3719 /* If this is an earlyclobber operand, we need to widen the scope.
3720 The reload must remain valid from the start of the insn being
3721 reloaded until after the operand is stored into its destination.
3722 We approximate this with RELOAD_OTHER even though we know that we
3723 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3725 One special case that is worth checking is when we have an
3726 output that is earlyclobber but isn't used past the insn (typically
3727 a SCRATCH). In this case, we only need have the reload live
3728 through the insn itself, but not for any of our input or output
3730 But we must not accidentally narrow the scope of an existing
3731 RELOAD_OTHER reload - leave these alone.
3733 In any case, anything needed to address this operand can remain
3734 however they were previously categorized. */
3736 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3738 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3739 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3742 /* Any constants that aren't allowed and can't be reloaded
3743 into registers are here changed into memory references. */
3744 for (i
= 0; i
< noperands
; i
++)
3745 if (! goal_alternative_win
[i
]
3746 && CONSTANT_P (recog_data
.operand
[i
])
3747 /* force_const_mem does not accept HIGH. */
3748 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3749 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3750 (enum reg_class
) goal_alternative
[i
])
3752 || no_input_reloads
)
3753 && operand_mode
[i
] != VOIDmode
)
3755 substed_operand
[i
] = recog_data
.operand
[i
]
3756 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3757 recog_data
.operand
[i
]),
3758 i
, address_type
[i
], ind_levels
, 0, insn
,
3760 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3761 goal_alternative_number
))
3762 goal_alternative_win
[i
] = 1;
3765 /* Record the values of the earlyclobber operands for the caller. */
3766 if (goal_earlyclobber
)
3767 for (i
= 0; i
< noperands
; i
++)
3768 if (goal_alternative_earlyclobber
[i
])
3769 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3771 /* Now record reloads for all the operands that need them. */
3772 for (i
= 0; i
< noperands
; i
++)
3773 if (! goal_alternative_win
[i
])
3775 /* Operands that match previous ones have already been handled. */
3776 if (goal_alternative_matches
[i
] >= 0)
3778 /* Handle an operand with a nonoffsettable address
3779 appearing where an offsettable address will do
3780 by reloading the address into a base register.
3782 ??? We can also do this when the operand is a register and
3783 reg_equiv_mem is not offsettable, but this is a bit tricky,
3784 so we don't bother with it. It may not be worth doing. */
3785 else if (goal_alternative_matched
[i
] == -1
3786 && goal_alternative_offmemok
[i
]
3787 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3789 operand_reloadnum
[i
]
3790 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3791 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3792 MODE_BASE_REG_CLASS (VOIDmode
),
3793 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3794 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3795 rld
[operand_reloadnum
[i
]].inc
3796 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3798 /* If this operand is an output, we will have made any
3799 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3800 now we are treating part of the operand as an input, so
3801 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3803 if (modified
[i
] == RELOAD_WRITE
)
3805 for (j
= 0; j
< n_reloads
; j
++)
3807 if (rld
[j
].opnum
== i
)
3809 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3810 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3811 else if (rld
[j
].when_needed
3812 == RELOAD_FOR_OUTADDR_ADDRESS
)
3813 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3818 else if (goal_alternative_matched
[i
] == -1)
3820 operand_reloadnum
[i
]
3821 = push_reload ((modified
[i
] != RELOAD_WRITE
3822 ? recog_data
.operand
[i
] : 0),
3823 (modified
[i
] != RELOAD_READ
3824 ? recog_data
.operand
[i
] : 0),
3825 (modified
[i
] != RELOAD_WRITE
3826 ? recog_data
.operand_loc
[i
] : 0),
3827 (modified
[i
] != RELOAD_READ
3828 ? recog_data
.operand_loc
[i
] : 0),
3829 (enum reg_class
) goal_alternative
[i
],
3830 (modified
[i
] == RELOAD_WRITE
3831 ? VOIDmode
: operand_mode
[i
]),
3832 (modified
[i
] == RELOAD_READ
3833 ? VOIDmode
: operand_mode
[i
]),
3834 (insn_code_number
< 0 ? 0
3835 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3836 0, i
, operand_type
[i
]);
3838 /* In a matching pair of operands, one must be input only
3839 and the other must be output only.
3840 Pass the input operand as IN and the other as OUT. */
3841 else if (modified
[i
] == RELOAD_READ
3842 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3844 operand_reloadnum
[i
]
3845 = push_reload (recog_data
.operand
[i
],
3846 recog_data
.operand
[goal_alternative_matched
[i
]],
3847 recog_data
.operand_loc
[i
],
3848 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3849 (enum reg_class
) goal_alternative
[i
],
3851 operand_mode
[goal_alternative_matched
[i
]],
3852 0, 0, i
, RELOAD_OTHER
);
3853 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3855 else if (modified
[i
] == RELOAD_WRITE
3856 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3858 operand_reloadnum
[goal_alternative_matched
[i
]]
3859 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3860 recog_data
.operand
[i
],
3861 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3862 recog_data
.operand_loc
[i
],
3863 (enum reg_class
) goal_alternative
[i
],
3864 operand_mode
[goal_alternative_matched
[i
]],
3866 0, 0, i
, RELOAD_OTHER
);
3867 operand_reloadnum
[i
] = output_reloadnum
;
3869 else if (insn_code_number
>= 0)
3873 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3874 /* Avoid further trouble with this insn. */
3875 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3881 /* Generate optional reloads only when optimizing, and only
3882 on the last pass through reload. Also, make sure we do not
3883 make an optional reload where we already have a mandatory
3884 one; this can happen in the case of address operands.
3886 To check for mandatory reloads, we use have_replacement_p.
3887 Note that this works only on the last pass through reload. */
3888 else if (!optimize
|| !replace
3889 || have_replacement_p (recog_data
.operand_loc
[i
]))
3892 else if (goal_alternative_matched
[i
] < 0
3893 && goal_alternative_matches
[i
] < 0)
3895 /* For each non-matching operand that's a MEM or a pseudo-register
3896 that didn't get a hard register, make an optional reload.
3897 This may get done even if the insn needs no reloads otherwise. */
3899 rtx operand
= recog_data
.operand
[i
];
3901 while (GET_CODE (operand
) == SUBREG
)
3902 operand
= SUBREG_REG (operand
);
3903 if ((GET_CODE (operand
) == MEM
3904 || (GET_CODE (operand
) == REG
3905 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3906 /* If this is only for an output, the optional reload would not
3907 actually cause us to use a register now, just note that
3908 something is stored here. */
3909 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3910 || modified
[i
] == RELOAD_WRITE
)
3911 && ! no_input_reloads
3912 /* An optional output reload might allow to delete INSN later.
3913 We mustn't make in-out reloads on insns that are not permitted
3915 If this is an asm, we can't delete it; we must not even call
3916 push_reload for an optional output reload in this case,
3917 because we can't be sure that the constraint allows a register,
3918 and push_reload verifies the constraints for asms. */
3919 && (modified
[i
] == RELOAD_READ
3920 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3921 operand_reloadnum
[i
]
3922 = push_reload ((modified
[i
] != RELOAD_WRITE
3923 ? recog_data
.operand
[i
] : 0),
3924 (modified
[i
] != RELOAD_READ
3925 ? recog_data
.operand
[i
] : 0),
3926 (modified
[i
] != RELOAD_WRITE
3927 ? recog_data
.operand_loc
[i
] : 0),
3928 (modified
[i
] != RELOAD_READ
3929 ? recog_data
.operand_loc
[i
] : 0),
3930 (enum reg_class
) goal_alternative
[i
],
3931 (modified
[i
] == RELOAD_WRITE
3932 ? VOIDmode
: operand_mode
[i
]),
3933 (modified
[i
] == RELOAD_READ
3934 ? VOIDmode
: operand_mode
[i
]),
3935 (insn_code_number
< 0 ? 0
3936 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3937 1, i
, operand_type
[i
]);
3938 /* If a memory reference remains (either as a MEM or a pseudo that
3939 did not get a hard register), yet we can't make an optional
3940 reload, check if this is actually a pseudo register reference;
3941 we then need to emit a USE and/or a CLOBBER so that reload
3942 inheritance will do the right thing. */
3943 else if (GET_CODE (operand
) == MEM
3944 || (GET_CODE (operand
) == REG
3945 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3946 && reg_renumber
[REGNO (operand
)] < 0))
3948 operand
= *recog_data
.operand_loc
[i
];
3950 while (GET_CODE (operand
) == SUBREG
)
3951 operand
= SUBREG_REG (operand
);
3952 if (GET_CODE (operand
) == REG
)
3954 if (modified
[i
] != RELOAD_WRITE
)
3955 /* We mark the USE with QImode so that we recognize
3956 it as one that can be safely deleted at the end
3958 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3960 if (modified
[i
] != RELOAD_READ
)
3961 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3965 else if (goal_alternative_matches
[i
] >= 0
3966 && goal_alternative_win
[goal_alternative_matches
[i
]]
3967 && modified
[i
] == RELOAD_READ
3968 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3969 && ! no_input_reloads
&& ! no_output_reloads
)
3971 /* Similarly, make an optional reload for a pair of matching
3972 objects that are in MEM or a pseudo that didn't get a hard reg. */
3974 rtx operand
= recog_data
.operand
[i
];
3976 while (GET_CODE (operand
) == SUBREG
)
3977 operand
= SUBREG_REG (operand
);
3978 if ((GET_CODE (operand
) == MEM
3979 || (GET_CODE (operand
) == REG
3980 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3981 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3983 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3984 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3985 recog_data
.operand
[i
],
3986 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3987 recog_data
.operand_loc
[i
],
3988 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3989 operand_mode
[goal_alternative_matches
[i
]],
3991 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3994 /* Perform whatever substitutions on the operands we are supposed
3995 to make due to commutativity or replacement of registers
3996 with equivalent constants or memory slots. */
3998 for (i
= 0; i
< noperands
; i
++)
4000 /* We only do this on the last pass through reload, because it is
4001 possible for some data (like reg_equiv_address) to be changed during
4002 later passes. Moreover, we loose the opportunity to get a useful
4003 reload_{in,out}_reg when we do these replacements. */
4007 rtx substitution
= substed_operand
[i
];
4009 *recog_data
.operand_loc
[i
] = substitution
;
4011 /* If we're replacing an operand with a LABEL_REF, we need
4012 to make sure that there's a REG_LABEL note attached to
4013 this instruction. */
4014 if (GET_CODE (insn
) != JUMP_INSN
4015 && GET_CODE (substitution
) == LABEL_REF
4016 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
4017 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
4018 XEXP (substitution
, 0),
4022 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4025 /* If this insn pattern contains any MATCH_DUP's, make sure that
4026 they will be substituted if the operands they match are substituted.
4027 Also do now any substitutions we already did on the operands.
4029 Don't do this if we aren't making replacements because we might be
4030 propagating things allocated by frame pointer elimination into places
4031 it doesn't expect. */
4033 if (insn_code_number
>= 0 && replace
)
4034 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4036 int opno
= recog_data
.dup_num
[i
];
4037 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4038 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4042 /* This loses because reloading of prior insns can invalidate the equivalence
4043 (or at least find_equiv_reg isn't smart enough to find it any more),
4044 causing this insn to need more reload regs than it needed before.
4045 It may be too late to make the reload regs available.
4046 Now this optimization is done safely in choose_reload_regs. */
4048 /* For each reload of a reg into some other class of reg,
4049 search for an existing equivalent reg (same value now) in the right class.
4050 We can use it as long as we don't need to change its contents. */
4051 for (i
= 0; i
< n_reloads
; i
++)
4052 if (rld
[i
].reg_rtx
== 0
4054 && GET_CODE (rld
[i
].in
) == REG
4058 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4059 static_reload_reg_p
, 0, rld
[i
].inmode
);
4060 /* Prevent generation of insn to load the value
4061 because the one we found already has the value. */
4063 rld
[i
].in
= rld
[i
].reg_rtx
;
4067 /* Perhaps an output reload can be combined with another
4068 to reduce needs by one. */
4069 if (!goal_earlyclobber
)
4072 /* If we have a pair of reloads for parts of an address, they are reloading
4073 the same object, the operands themselves were not reloaded, and they
4074 are for two operands that are supposed to match, merge the reloads and
4075 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4077 for (i
= 0; i
< n_reloads
; i
++)
4081 for (j
= i
+ 1; j
< n_reloads
; j
++)
4082 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4083 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4084 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4085 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4086 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4087 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4088 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4089 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4090 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4091 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4092 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4093 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4094 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4095 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4096 || (goal_alternative_matches
[rld
[j
].opnum
]
4099 for (k
= 0; k
< n_replacements
; k
++)
4100 if (replacements
[k
].what
== j
)
4101 replacements
[k
].what
= i
;
4103 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4104 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4105 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4107 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4112 /* Scan all the reloads and update their type.
4113 If a reload is for the address of an operand and we didn't reload
4114 that operand, change the type. Similarly, change the operand number
4115 of a reload when two operands match. If a reload is optional, treat it
4116 as though the operand isn't reloaded.
4118 ??? This latter case is somewhat odd because if we do the optional
4119 reload, it means the object is hanging around. Thus we need only
4120 do the address reload if the optional reload was NOT done.
4122 Change secondary reloads to be the address type of their operand, not
4125 If an operand's reload is now RELOAD_OTHER, change any
4126 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4127 RELOAD_FOR_OTHER_ADDRESS. */
4129 for (i
= 0; i
< n_reloads
; i
++)
4131 if (rld
[i
].secondary_p
4132 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4133 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4135 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4136 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4137 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4138 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4139 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4140 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4142 /* If we have a secondary reload to go along with this reload,
4143 change its type to RELOAD_FOR_OPADDR_ADDR. */
4145 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4146 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4147 && rld
[i
].secondary_in_reload
!= -1)
4149 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4151 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4153 /* If there's a tertiary reload we have to change it also. */
4154 if (secondary_in_reload
> 0
4155 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4156 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4157 = RELOAD_FOR_OPADDR_ADDR
;
4160 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4161 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4162 && rld
[i
].secondary_out_reload
!= -1)
4164 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4166 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4168 /* If there's a tertiary reload we have to change it also. */
4169 if (secondary_out_reload
4170 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4171 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4172 = RELOAD_FOR_OPADDR_ADDR
;
4175 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4176 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4177 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4179 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4182 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4183 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4184 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4185 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4187 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4189 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4190 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4193 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4194 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4195 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4197 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4198 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4199 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4200 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4201 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4202 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4203 This is complicated by the fact that a single operand can have more
4204 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4205 choose_reload_regs without affecting code quality, and cases that
4206 actually fail are extremely rare, so it turns out to be better to fix
4207 the problem here by not generating cases that choose_reload_regs will
4209 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4210 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4212 We can reduce the register pressure by exploiting that a
4213 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4214 does not conflict with any of them, if it is only used for the first of
4215 the RELOAD_FOR_X_ADDRESS reloads. */
4217 int first_op_addr_num
= -2;
4218 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4219 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4220 int need_change
= 0;
4221 /* We use last_op_addr_reload and the contents of the above arrays
4222 first as flags - -2 means no instance encountered, -1 means exactly
4223 one instance encountered.
4224 If more than one instance has been encountered, we store the reload
4225 number of the first reload of the kind in question; reload numbers
4226 are known to be non-negative. */
4227 for (i
= 0; i
< noperands
; i
++)
4228 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4229 for (i
= n_reloads
- 1; i
>= 0; i
--)
4231 switch (rld
[i
].when_needed
)
4233 case RELOAD_FOR_OPERAND_ADDRESS
:
4234 if (++first_op_addr_num
>= 0)
4236 first_op_addr_num
= i
;
4240 case RELOAD_FOR_INPUT_ADDRESS
:
4241 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4243 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4247 case RELOAD_FOR_OUTPUT_ADDRESS
:
4248 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4250 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4261 for (i
= 0; i
< n_reloads
; i
++)
4264 enum reload_type type
;
4266 switch (rld
[i
].when_needed
)
4268 case RELOAD_FOR_OPADDR_ADDR
:
4269 first_num
= first_op_addr_num
;
4270 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4272 case RELOAD_FOR_INPADDR_ADDRESS
:
4273 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4274 type
= RELOAD_FOR_INPUT_ADDRESS
;
4276 case RELOAD_FOR_OUTADDR_ADDRESS
:
4277 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4278 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4285 else if (i
> first_num
)
4286 rld
[i
].when_needed
= type
;
4289 /* Check if the only TYPE reload that uses reload I is
4290 reload FIRST_NUM. */
4291 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4293 if (rld
[j
].when_needed
== type
4294 && (rld
[i
].secondary_p
4295 ? rld
[j
].secondary_in_reload
== i
4296 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4298 rld
[i
].when_needed
= type
;
4307 /* See if we have any reloads that are now allowed to be merged
4308 because we've changed when the reload is needed to
4309 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4310 check for the most common cases. */
4312 for (i
= 0; i
< n_reloads
; i
++)
4313 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4314 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4315 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4316 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4317 for (j
= 0; j
< n_reloads
; j
++)
4318 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4319 && rld
[j
].when_needed
== rld
[i
].when_needed
4320 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4321 && rld
[i
].class == rld
[j
].class
4322 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4323 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4325 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4326 transfer_replacements (i
, j
);
4331 /* If we made any reloads for addresses, see if they violate a
4332 "no input reloads" requirement for this insn. But loads that we
4333 do after the insn (such as for output addresses) are fine. */
4334 if (no_input_reloads
)
4335 for (i
= 0; i
< n_reloads
; i
++)
4337 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4338 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4342 /* Compute reload_mode and reload_nregs. */
4343 for (i
= 0; i
< n_reloads
; i
++)
4346 = (rld
[i
].inmode
== VOIDmode
4347 || (GET_MODE_SIZE (rld
[i
].outmode
)
4348 > GET_MODE_SIZE (rld
[i
].inmode
)))
4349 ? rld
[i
].outmode
: rld
[i
].inmode
;
4351 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4354 /* Special case a simple move with an input reload and a
4355 destination of a hard reg, if the hard reg is ok, use it. */
4356 for (i
= 0; i
< n_reloads
; i
++)
4357 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4358 && GET_CODE (PATTERN (insn
)) == SET
4359 && GET_CODE (SET_DEST (PATTERN (insn
))) == REG
4360 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4362 rtx dest
= SET_DEST (PATTERN (insn
));
4363 unsigned int regno
= REGNO (dest
);
4365 if (regno
< FIRST_PSEUDO_REGISTER
4366 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4367 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4368 rld
[i
].reg_rtx
= dest
;
4374 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4375 accepts a memory operand with constant address. */
4378 alternative_allows_memconst (constraint
, altnum
)
4379 const char *constraint
;
4383 /* Skip alternatives before the one requested. */
4386 while (*constraint
++ != ',');
4389 /* Scan the requested alternative for 'm' or 'o'.
4390 If one of them is present, this alternative accepts memory constants. */
4391 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4392 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4393 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
, constraint
))
4398 /* Scan X for memory references and scan the addresses for reloading.
4399 Also checks for references to "constant" regs that we want to eliminate
4400 and replaces them with the values they stand for.
4401 We may alter X destructively if it contains a reference to such.
4402 If X is just a constant reg, we return the equivalent value
4405 IND_LEVELS says how many levels of indirect addressing this machine
4408 OPNUM and TYPE identify the purpose of the reload.
4410 IS_SET_DEST is true if X is the destination of a SET, which is not
4411 appropriate to be replaced by a constant.
4413 INSN, if nonzero, is the insn in which we do the reload. It is used
4414 to determine if we may generate output reloads, and where to put USEs
4415 for pseudos that we have to replace with stack slots.
4417 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4418 result of find_reloads_address. */
4421 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4425 enum reload_type type
;
4429 int *address_reloaded
;
4431 RTX_CODE code
= GET_CODE (x
);
4433 const char *fmt
= GET_RTX_FORMAT (code
);
4439 /* This code is duplicated for speed in find_reloads. */
4440 int regno
= REGNO (x
);
4441 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4442 x
= reg_equiv_constant
[regno
];
4444 /* This creates (subreg (mem...)) which would cause an unnecessary
4445 reload of the mem. */
4446 else if (reg_equiv_mem
[regno
] != 0)
4447 x
= reg_equiv_mem
[regno
];
4449 else if (reg_equiv_memory_loc
[regno
]
4450 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4452 rtx mem
= make_memloc (x
, regno
);
4453 if (reg_equiv_address
[regno
]
4454 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4456 /* If this is not a toplevel operand, find_reloads doesn't see
4457 this substitution. We have to emit a USE of the pseudo so
4458 that delete_output_reload can see it. */
4459 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4460 /* We mark the USE with QImode so that we recognize it
4461 as one that can be safely deleted at the end of
4463 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4466 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4467 opnum
, type
, ind_levels
, insn
);
4468 if (address_reloaded
)
4469 *address_reloaded
= i
;
4478 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4479 opnum
, type
, ind_levels
, insn
);
4480 if (address_reloaded
)
4481 *address_reloaded
= i
;
4486 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4488 /* Check for SUBREG containing a REG that's equivalent to a constant.
4489 If the constant has a known value, truncate it right now.
4490 Similarly if we are extracting a single-word of a multi-word
4491 constant. If the constant is symbolic, allow it to be substituted
4492 normally. push_reload will strip the subreg later. If the
4493 constant is VOIDmode, abort because we will lose the mode of
4494 the register (this should never happen because one of the cases
4495 above should handle it). */
4497 int regno
= REGNO (SUBREG_REG (x
));
4500 if (subreg_lowpart_p (x
)
4501 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4502 && reg_equiv_constant
[regno
] != 0
4503 && (tem
= gen_lowpart_common (GET_MODE (x
),
4504 reg_equiv_constant
[regno
])) != 0)
4507 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4508 && reg_equiv_constant
[regno
] != 0)
4511 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4512 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4518 /* If the subreg contains a reg that will be converted to a mem,
4519 convert the subreg to a narrower memref now.
4520 Otherwise, we would get (subreg (mem ...) ...),
4521 which would force reload of the mem.
4523 We also need to do this if there is an equivalent MEM that is
4524 not offsettable. In that case, alter_subreg would produce an
4525 invalid address on big-endian machines.
4527 For machines that extend byte loads, we must not reload using
4528 a wider mode if we have a paradoxical SUBREG. find_reloads will
4529 force a reload in that case. So we should not do anything here. */
4531 else if (regno
>= FIRST_PSEUDO_REGISTER
4532 #ifdef LOAD_EXTEND_OP
4533 && (GET_MODE_SIZE (GET_MODE (x
))
4534 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4536 && (reg_equiv_address
[regno
] != 0
4537 || (reg_equiv_mem
[regno
] != 0
4538 && (! strict_memory_address_p (GET_MODE (x
),
4539 XEXP (reg_equiv_mem
[regno
], 0))
4540 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4541 || num_not_at_initial_offset
))))
4542 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4546 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4550 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4551 ind_levels
, is_set_dest
, insn
,
4553 /* If we have replaced a reg with it's equivalent memory loc -
4554 that can still be handled here e.g. if it's in a paradoxical
4555 subreg - we must make the change in a copy, rather than using
4556 a destructive change. This way, find_reloads can still elect
4557 not to do the change. */
4558 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4560 x
= shallow_copy_rtx (x
);
4563 XEXP (x
, i
) = new_part
;
4569 /* Return a mem ref for the memory equivalent of reg REGNO.
4570 This mem ref is not shared with anything. */
4573 make_memloc (ad
, regno
)
4577 /* We must rerun eliminate_regs, in case the elimination
4578 offsets have changed. */
4580 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4582 /* If TEM might contain a pseudo, we must copy it to avoid
4583 modifying it when we do the substitution for the reload. */
4584 if (rtx_varies_p (tem
, 0))
4585 tem
= copy_rtx (tem
);
4587 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4588 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4590 /* Copy the result if it's still the same as the equivalence, to avoid
4591 modifying it when we do the substitution for the reload. */
4592 if (tem
== reg_equiv_memory_loc
[regno
])
4593 tem
= copy_rtx (tem
);
4597 /* Returns true if AD could be turned into a valid memory reference
4598 to mode MODE by reloading the part pointed to by PART into a
4602 maybe_memory_address_p (mode
, ad
, part
)
4603 enum machine_mode mode
;
4609 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4612 retv
= memory_address_p (mode
, ad
);
4618 /* Record all reloads needed for handling memory address AD
4619 which appears in *LOC in a memory reference to mode MODE
4620 which itself is found in location *MEMREFLOC.
4621 Note that we take shortcuts assuming that no multi-reg machine mode
4622 occurs as part of an address.
4624 OPNUM and TYPE specify the purpose of this reload.
4626 IND_LEVELS says how many levels of indirect addressing this machine
4629 INSN, if nonzero, is the insn in which we do the reload. It is used
4630 to determine if we may generate output reloads, and where to put USEs
4631 for pseudos that we have to replace with stack slots.
4633 Value is nonzero if this address is reloaded or replaced as a whole.
4634 This is interesting to the caller if the address is an autoincrement.
4636 Note that there is no verification that the address will be valid after
4637 this routine does its work. Instead, we rely on the fact that the address
4638 was valid when reload started. So we need only undo things that reload
4639 could have broken. These are wrong register types, pseudos not allocated
4640 to a hard register, and frame pointer elimination. */
4643 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4644 enum machine_mode mode
;
4649 enum reload_type type
;
4654 int removed_and
= 0;
4657 /* If the address is a register, see if it is a legitimate address and
4658 reload if not. We first handle the cases where we need not reload
4659 or where we must reload in a non-standard way. */
4661 if (GET_CODE (ad
) == REG
)
4665 /* If the register is equivalent to an invariant expression, substitute
4666 the invariant, and eliminate any eliminable register references. */
4667 tem
= reg_equiv_constant
[regno
];
4669 && (tem
= eliminate_regs (tem
, mode
, insn
))
4670 && strict_memory_address_p (mode
, tem
))
4676 tem
= reg_equiv_memory_loc
[regno
];
4679 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4681 tem
= make_memloc (ad
, regno
);
4682 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4684 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4685 &XEXP (tem
, 0), opnum
,
4686 ADDR_TYPE (type
), ind_levels
, insn
);
4688 /* We can avoid a reload if the register's equivalent memory
4689 expression is valid as an indirect memory address.
4690 But not all addresses are valid in a mem used as an indirect
4691 address: only reg or reg+constant. */
4694 && strict_memory_address_p (mode
, tem
)
4695 && (GET_CODE (XEXP (tem
, 0)) == REG
4696 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4697 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4698 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4700 /* TEM is not the same as what we'll be replacing the
4701 pseudo with after reload, put a USE in front of INSN
4702 in the final reload pass. */
4704 && num_not_at_initial_offset
4705 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4708 /* We mark the USE with QImode so that we
4709 recognize it as one that can be safely
4710 deleted at the end of reload. */
4711 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4714 /* This doesn't really count as replacing the address
4715 as a whole, since it is still a memory access. */
4723 /* The only remaining case where we can avoid a reload is if this is a
4724 hard register that is valid as a base register and which is not the
4725 subject of a CLOBBER in this insn. */
4727 else if (regno
< FIRST_PSEUDO_REGISTER
4728 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4729 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4732 /* If we do not have one of the cases above, we must do the reload. */
4733 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, MODE_BASE_REG_CLASS (mode
),
4734 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4738 if (strict_memory_address_p (mode
, ad
))
4740 /* The address appears valid, so reloads are not needed.
4741 But the address may contain an eliminable register.
4742 This can happen because a machine with indirect addressing
4743 may consider a pseudo register by itself a valid address even when
4744 it has failed to get a hard reg.
4745 So do a tree-walk to find and eliminate all such regs. */
4747 /* But first quickly dispose of a common case. */
4748 if (GET_CODE (ad
) == PLUS
4749 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4750 && GET_CODE (XEXP (ad
, 0)) == REG
4751 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4754 subst_reg_equivs_changed
= 0;
4755 *loc
= subst_reg_equivs (ad
, insn
);
4757 if (! subst_reg_equivs_changed
)
4760 /* Check result for validity after substitution. */
4761 if (strict_memory_address_p (mode
, ad
))
4765 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4770 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4775 *memrefloc
= copy_rtx (*memrefloc
);
4776 XEXP (*memrefloc
, 0) = ad
;
4777 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4783 /* The address is not valid. We have to figure out why. First see if
4784 we have an outer AND and remove it if so. Then analyze what's inside. */
4786 if (GET_CODE (ad
) == AND
)
4789 loc
= &XEXP (ad
, 0);
4793 /* One possibility for why the address is invalid is that it is itself
4794 a MEM. This can happen when the frame pointer is being eliminated, a
4795 pseudo is not allocated to a hard register, and the offset between the
4796 frame and stack pointers is not its initial value. In that case the
4797 pseudo will have been replaced by a MEM referring to the
4799 if (GET_CODE (ad
) == MEM
)
4801 /* First ensure that the address in this MEM is valid. Then, unless
4802 indirect addresses are valid, reload the MEM into a register. */
4804 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4805 opnum
, ADDR_TYPE (type
),
4806 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4808 /* If tem was changed, then we must create a new memory reference to
4809 hold it and store it back into memrefloc. */
4810 if (tem
!= ad
&& memrefloc
)
4812 *memrefloc
= copy_rtx (*memrefloc
);
4813 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4814 loc
= &XEXP (*memrefloc
, 0);
4816 loc
= &XEXP (*loc
, 0);
4819 /* Check similar cases as for indirect addresses as above except
4820 that we can allow pseudos and a MEM since they should have been
4821 taken care of above. */
4824 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4825 || GET_CODE (XEXP (tem
, 0)) == MEM
4826 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4827 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4828 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4829 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4831 /* Must use TEM here, not AD, since it is the one that will
4832 have any subexpressions reloaded, if needed. */
4833 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4834 MODE_BASE_REG_CLASS (mode
), GET_MODE (tem
),
4837 return ! removed_and
;
4843 /* If we have address of a stack slot but it's not valid because the
4844 displacement is too large, compute the sum in a register.
4845 Handle all base registers here, not just fp/ap/sp, because on some
4846 targets (namely SH) we can also get too large displacements from
4847 big-endian corrections. */
4848 else if (GET_CODE (ad
) == PLUS
4849 && GET_CODE (XEXP (ad
, 0)) == REG
4850 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4851 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4852 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4854 /* Unshare the MEM rtx so we can safely alter it. */
4857 *memrefloc
= copy_rtx (*memrefloc
);
4858 loc
= &XEXP (*memrefloc
, 0);
4860 loc
= &XEXP (*loc
, 0);
4863 if (double_reg_address_ok
)
4865 /* Unshare the sum as well. */
4866 *loc
= ad
= copy_rtx (ad
);
4868 /* Reload the displacement into an index reg.
4869 We assume the frame pointer or arg pointer is a base reg. */
4870 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4871 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4877 /* If the sum of two regs is not necessarily valid,
4878 reload the sum into a base reg.
4879 That will at least work. */
4880 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4881 Pmode
, opnum
, type
, ind_levels
);
4883 return ! removed_and
;
4886 /* If we have an indexed stack slot, there are three possible reasons why
4887 it might be invalid: The index might need to be reloaded, the address
4888 might have been made by frame pointer elimination and hence have a
4889 constant out of range, or both reasons might apply.
4891 We can easily check for an index needing reload, but even if that is the
4892 case, we might also have an invalid constant. To avoid making the
4893 conservative assumption and requiring two reloads, we see if this address
4894 is valid when not interpreted strictly. If it is, the only problem is
4895 that the index needs a reload and find_reloads_address_1 will take care
4898 If we decide to do something here, it must be that
4899 `double_reg_address_ok' is true and that this address rtl was made by
4900 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4901 rework the sum so that the reload register will be added to the index.
4902 This is safe because we know the address isn't shared.
4904 We check for fp/ap/sp as both the first and second operand of the
4907 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4908 && GET_CODE (XEXP (ad
, 0)) == PLUS
4909 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4910 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4911 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4913 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4914 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4916 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4917 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 1)))
4919 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4920 plus_constant (XEXP (XEXP (ad
, 0), 0),
4921 INTVAL (XEXP (ad
, 1))),
4922 XEXP (XEXP (ad
, 0), 1));
4923 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4924 MODE_BASE_REG_CLASS (mode
),
4925 GET_MODE (ad
), opnum
, type
, ind_levels
);
4926 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4932 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4933 && GET_CODE (XEXP (ad
, 0)) == PLUS
4934 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4935 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4936 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4938 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4939 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4941 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4942 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 0)))
4944 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4945 XEXP (XEXP (ad
, 0), 0),
4946 plus_constant (XEXP (XEXP (ad
, 0), 1),
4947 INTVAL (XEXP (ad
, 1))));
4948 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4949 MODE_BASE_REG_CLASS (mode
),
4950 GET_MODE (ad
), opnum
, type
, ind_levels
);
4951 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4957 /* See if address becomes valid when an eliminable register
4958 in a sum is replaced. */
4961 if (GET_CODE (ad
) == PLUS
)
4962 tem
= subst_indexed_address (ad
);
4963 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4965 /* Ok, we win that way. Replace any additional eliminable
4968 subst_reg_equivs_changed
= 0;
4969 tem
= subst_reg_equivs (tem
, insn
);
4971 /* Make sure that didn't make the address invalid again. */
4973 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4980 /* If constants aren't valid addresses, reload the constant address
4982 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4984 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4985 Unshare it so we can safely alter it. */
4986 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4987 && CONSTANT_POOL_ADDRESS_P (ad
))
4989 *memrefloc
= copy_rtx (*memrefloc
);
4990 loc
= &XEXP (*memrefloc
, 0);
4992 loc
= &XEXP (*loc
, 0);
4995 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4996 Pmode
, opnum
, type
, ind_levels
);
4997 return ! removed_and
;
5000 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
5004 /* Find all pseudo regs appearing in AD
5005 that are eliminable in favor of equivalent values
5006 and do not have hard regs; replace them by their equivalents.
5007 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5008 front of it for pseudos that we have to replace with stack slots. */
5011 subst_reg_equivs (ad
, insn
)
5015 RTX_CODE code
= GET_CODE (ad
);
5034 int regno
= REGNO (ad
);
5036 if (reg_equiv_constant
[regno
] != 0)
5038 subst_reg_equivs_changed
= 1;
5039 return reg_equiv_constant
[regno
];
5041 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
5043 rtx mem
= make_memloc (ad
, regno
);
5044 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
5046 subst_reg_equivs_changed
= 1;
5047 /* We mark the USE with QImode so that we recognize it
5048 as one that can be safely deleted at the end of
5050 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5059 /* Quickly dispose of a common case. */
5060 if (XEXP (ad
, 0) == frame_pointer_rtx
5061 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5069 fmt
= GET_RTX_FORMAT (code
);
5070 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5072 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5076 /* Compute the sum of X and Y, making canonicalizations assumed in an
5077 address, namely: sum constant integers, surround the sum of two
5078 constants with a CONST, put the constant as the second operand, and
5079 group the constant on the outermost sum.
5081 This routine assumes both inputs are already in canonical form. */
5088 enum machine_mode mode
= GET_MODE (x
);
5090 if (mode
== VOIDmode
)
5091 mode
= GET_MODE (y
);
5093 if (mode
== VOIDmode
)
5096 if (GET_CODE (x
) == CONST_INT
)
5097 return plus_constant (y
, INTVAL (x
));
5098 else if (GET_CODE (y
) == CONST_INT
)
5099 return plus_constant (x
, INTVAL (y
));
5100 else if (CONSTANT_P (x
))
5101 tem
= x
, x
= y
, y
= tem
;
5103 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5104 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5106 /* Note that if the operands of Y are specified in the opposite
5107 order in the recursive calls below, infinite recursion will occur. */
5108 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5109 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5111 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5112 constant will have been placed second. */
5113 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5115 if (GET_CODE (x
) == CONST
)
5117 if (GET_CODE (y
) == CONST
)
5120 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5123 return gen_rtx_PLUS (mode
, x
, y
);
5126 /* If ADDR is a sum containing a pseudo register that should be
5127 replaced with a constant (from reg_equiv_constant),
5128 return the result of doing so, and also apply the associative
5129 law so that the result is more likely to be a valid address.
5130 (But it is not guaranteed to be one.)
5132 Note that at most one register is replaced, even if more are
5133 replaceable. Also, we try to put the result into a canonical form
5134 so it is more likely to be a valid address.
5136 In all other cases, return ADDR. */
5139 subst_indexed_address (addr
)
5142 rtx op0
= 0, op1
= 0, op2
= 0;
5146 if (GET_CODE (addr
) == PLUS
)
5148 /* Try to find a register to replace. */
5149 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5150 if (GET_CODE (op0
) == REG
5151 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5152 && reg_renumber
[regno
] < 0
5153 && reg_equiv_constant
[regno
] != 0)
5154 op0
= reg_equiv_constant
[regno
];
5155 else if (GET_CODE (op1
) == REG
5156 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5157 && reg_renumber
[regno
] < 0
5158 && reg_equiv_constant
[regno
] != 0)
5159 op1
= reg_equiv_constant
[regno
];
5160 else if (GET_CODE (op0
) == PLUS
5161 && (tem
= subst_indexed_address (op0
)) != op0
)
5163 else if (GET_CODE (op1
) == PLUS
5164 && (tem
= subst_indexed_address (op1
)) != op1
)
5169 /* Pick out up to three things to add. */
5170 if (GET_CODE (op1
) == PLUS
)
5171 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5172 else if (GET_CODE (op0
) == PLUS
)
5173 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5175 /* Compute the sum. */
5177 op1
= form_sum (op1
, op2
);
5179 op0
= form_sum (op0
, op1
);
5186 /* Update the REG_INC notes for an insn. It updates all REG_INC
5187 notes for the instruction which refer to REGNO the to refer
5188 to the reload number.
5190 INSN is the insn for which any REG_INC notes need updating.
5192 REGNO is the register number which has been reloaded.
5194 RELOADNUM is the reload number. */
5197 update_auto_inc_notes (insn
, regno
, reloadnum
)
5198 rtx insn ATTRIBUTE_UNUSED
;
5199 int regno ATTRIBUTE_UNUSED
;
5200 int reloadnum ATTRIBUTE_UNUSED
;
5205 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5206 if (REG_NOTE_KIND (link
) == REG_INC
5207 && (int) REGNO (XEXP (link
, 0)) == regno
)
5208 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5212 /* Record the pseudo registers we must reload into hard registers in a
5213 subexpression of a would-be memory address, X referring to a value
5214 in mode MODE. (This function is not called if the address we find
5217 CONTEXT = 1 means we are considering regs as index regs,
5218 = 0 means we are considering them as base regs.
5220 OPNUM and TYPE specify the purpose of any reloads made.
5222 IND_LEVELS says how many levels of indirect addressing are
5223 supported at this point in the address.
5225 INSN, if nonzero, is the insn in which we do the reload. It is used
5226 to determine if we may generate output reloads.
5228 We return nonzero if X, as a whole, is reloaded or replaced. */
5230 /* Note that we take shortcuts assuming that no multi-reg machine mode
5231 occurs as part of an address.
5232 Also, this is not fully machine-customizable; it works for machines
5233 such as VAXen and 68000's and 32000's, but other possible machines
5234 could have addressing modes that this does not handle right. */
5237 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5238 enum machine_mode mode
;
5243 enum reload_type type
;
5247 RTX_CODE code
= GET_CODE (x
);
5253 rtx orig_op0
= XEXP (x
, 0);
5254 rtx orig_op1
= XEXP (x
, 1);
5255 RTX_CODE code0
= GET_CODE (orig_op0
);
5256 RTX_CODE code1
= GET_CODE (orig_op1
);
5260 if (GET_CODE (op0
) == SUBREG
)
5262 op0
= SUBREG_REG (op0
);
5263 code0
= GET_CODE (op0
);
5264 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5265 op0
= gen_rtx_REG (word_mode
,
5267 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5268 GET_MODE (SUBREG_REG (orig_op0
)),
5269 SUBREG_BYTE (orig_op0
),
5270 GET_MODE (orig_op0
))));
5273 if (GET_CODE (op1
) == SUBREG
)
5275 op1
= SUBREG_REG (op1
);
5276 code1
= GET_CODE (op1
);
5277 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5278 /* ??? Why is this given op1's mode and above for
5279 ??? op0 SUBREGs we use word_mode? */
5280 op1
= gen_rtx_REG (GET_MODE (op1
),
5282 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5283 GET_MODE (SUBREG_REG (orig_op1
)),
5284 SUBREG_BYTE (orig_op1
),
5285 GET_MODE (orig_op1
))));
5288 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5289 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5291 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5292 type
, ind_levels
, insn
);
5293 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5294 type
, ind_levels
, insn
);
5297 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5298 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5300 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5301 type
, ind_levels
, insn
);
5302 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5303 type
, ind_levels
, insn
);
5306 else if (code0
== CONST_INT
|| code0
== CONST
5307 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5308 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5309 type
, ind_levels
, insn
);
5311 else if (code1
== CONST_INT
|| code1
== CONST
5312 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5313 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5314 type
, ind_levels
, insn
);
5316 else if (code0
== REG
&& code1
== REG
)
5318 if (REG_OK_FOR_INDEX_P (op0
)
5319 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5321 else if (REG_OK_FOR_INDEX_P (op1
)
5322 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5324 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5325 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5326 type
, ind_levels
, insn
);
5327 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5328 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5329 type
, ind_levels
, insn
);
5330 else if (REG_OK_FOR_INDEX_P (op1
))
5331 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5332 type
, ind_levels
, insn
);
5333 else if (REG_OK_FOR_INDEX_P (op0
))
5334 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5335 type
, ind_levels
, insn
);
5338 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5339 type
, ind_levels
, insn
);
5340 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5341 type
, ind_levels
, insn
);
5345 else if (code0
== REG
)
5347 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5348 type
, ind_levels
, insn
);
5349 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5350 type
, ind_levels
, insn
);
5353 else if (code1
== REG
)
5355 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5356 type
, ind_levels
, insn
);
5357 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5358 type
, ind_levels
, insn
);
5367 rtx op0
= XEXP (x
, 0);
5368 rtx op1
= XEXP (x
, 1);
5370 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5373 /* Currently, we only support {PRE,POST}_MODIFY constructs
5374 where a base register is {inc,dec}remented by the contents
5375 of another register or by a constant value. Thus, these
5376 operands must match. */
5377 if (op0
!= XEXP (op1
, 0))
5380 /* Require index register (or constant). Let's just handle the
5381 register case in the meantime... If the target allows
5382 auto-modify by a constant then we could try replacing a pseudo
5383 register with its equivalent constant where applicable. */
5384 if (REG_P (XEXP (op1
, 1)))
5385 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5386 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5387 opnum
, type
, ind_levels
, insn
);
5389 if (REG_P (XEXP (op1
, 0)))
5391 int regno
= REGNO (XEXP (op1
, 0));
5394 /* A register that is incremented cannot be constant! */
5395 if (regno
>= FIRST_PSEUDO_REGISTER
5396 && reg_equiv_constant
[regno
] != 0)
5399 /* Handle a register that is equivalent to a memory location
5400 which cannot be addressed directly. */
5401 if (reg_equiv_memory_loc
[regno
] != 0
5402 && (reg_equiv_address
[regno
] != 0
5403 || num_not_at_initial_offset
))
5405 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5407 if (reg_equiv_address
[regno
]
5408 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5410 /* First reload the memory location's address.
5411 We can't use ADDR_TYPE (type) here, because we need to
5412 write back the value after reading it, hence we actually
5413 need two registers. */
5414 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5415 &XEXP (tem
, 0), opnum
,
5419 /* Then reload the memory location into a base
5421 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5423 MODE_BASE_REG_CLASS (mode
),
5424 GET_MODE (x
), GET_MODE (x
), 0,
5425 0, opnum
, RELOAD_OTHER
);
5427 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5432 if (reg_renumber
[regno
] >= 0)
5433 regno
= reg_renumber
[regno
];
5435 /* We require a base register here... */
5436 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5438 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5439 &XEXP (op1
, 0), &XEXP (x
, 0),
5440 MODE_BASE_REG_CLASS (mode
),
5441 GET_MODE (x
), GET_MODE (x
), 0, 0,
5442 opnum
, RELOAD_OTHER
);
5444 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5457 if (GET_CODE (XEXP (x
, 0)) == REG
)
5459 int regno
= REGNO (XEXP (x
, 0));
5463 /* A register that is incremented cannot be constant! */
5464 if (regno
>= FIRST_PSEUDO_REGISTER
5465 && reg_equiv_constant
[regno
] != 0)
5468 /* Handle a register that is equivalent to a memory location
5469 which cannot be addressed directly. */
5470 if (reg_equiv_memory_loc
[regno
] != 0
5471 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5473 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5474 if (reg_equiv_address
[regno
]
5475 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5477 /* First reload the memory location's address.
5478 We can't use ADDR_TYPE (type) here, because we need to
5479 write back the value after reading it, hence we actually
5480 need two registers. */
5481 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5482 &XEXP (tem
, 0), opnum
, type
,
5484 /* Put this inside a new increment-expression. */
5485 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5486 /* Proceed to reload that, as if it contained a register. */
5490 /* If we have a hard register that is ok as an index,
5491 don't make a reload. If an autoincrement of a nice register
5492 isn't "valid", it must be that no autoincrement is "valid".
5493 If that is true and something made an autoincrement anyway,
5494 this must be a special context where one is allowed.
5495 (For example, a "push" instruction.)
5496 We can't improve this address, so leave it alone. */
5498 /* Otherwise, reload the autoincrement into a suitable hard reg
5499 and record how much to increment by. */
5501 if (reg_renumber
[regno
] >= 0)
5502 regno
= reg_renumber
[regno
];
5503 if ((regno
>= FIRST_PSEUDO_REGISTER
5504 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5505 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5509 /* If we can output the register afterwards, do so, this
5510 saves the extra update.
5511 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5512 CALL_INSN - and it does not set CC0.
5513 But don't do this if we cannot directly address the
5514 memory location, since this will make it harder to
5515 reuse address reloads, and increases register pressure.
5516 Also don't do this if we can probably update x directly. */
5517 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5519 : reg_equiv_mem
[regno
]);
5520 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5521 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5522 && memory_operand (equiv
, GET_MODE (equiv
))
5524 && ! sets_cc0_p (PATTERN (insn
))
5526 && ! (icode
!= CODE_FOR_nothing
5527 && ((*insn_data
[icode
].operand
[0].predicate
)
5529 && ((*insn_data
[icode
].operand
[1].predicate
)
5532 /* We use the original pseudo for loc, so that
5533 emit_reload_insns() knows which pseudo this
5534 reload refers to and updates the pseudo rtx, not
5535 its equivalent memory location, as well as the
5536 corresponding entry in reg_last_reload_reg. */
5537 loc
= &XEXP (x_orig
, 0);
5540 = push_reload (x
, x
, loc
, loc
,
5541 (context
? INDEX_REG_CLASS
:
5542 MODE_BASE_REG_CLASS (mode
)),
5543 GET_MODE (x
), GET_MODE (x
), 0, 0,
5544 opnum
, RELOAD_OTHER
);
5549 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5550 (context
? INDEX_REG_CLASS
:
5551 MODE_BASE_REG_CLASS (mode
)),
5552 GET_MODE (x
), GET_MODE (x
), 0, 0,
5555 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5560 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5566 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5568 /* This is probably the result of a substitution, by eliminate_regs,
5569 of an equivalent address for a pseudo that was not allocated to a
5570 hard register. Verify that the specified address is valid and
5571 reload it into a register. */
5572 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5573 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5577 /* Since we know we are going to reload this item, don't decrement
5578 for the indirection level.
5580 Note that this is actually conservative: it would be slightly
5581 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5583 /* We can't use ADDR_TYPE (type) here, because we need to
5584 write back the value after reading it, hence we actually
5585 need two registers. */
5586 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5587 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5588 opnum
, type
, ind_levels
, insn
);
5590 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5591 (context
? INDEX_REG_CLASS
:
5592 MODE_BASE_REG_CLASS (mode
)),
5593 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5595 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5597 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5599 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5606 /* This is probably the result of a substitution, by eliminate_regs, of
5607 an equivalent address for a pseudo that was not allocated to a hard
5608 register. Verify that the specified address is valid and reload it
5611 Since we know we are going to reload this item, don't decrement for
5612 the indirection level.
5614 Note that this is actually conservative: it would be slightly more
5615 efficient to use the value of SPILL_INDIRECT_LEVELS from
5618 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5619 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5620 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5621 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5622 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5627 int regno
= REGNO (x
);
5629 if (reg_equiv_constant
[regno
] != 0)
5631 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5632 (context
? INDEX_REG_CLASS
:
5633 MODE_BASE_REG_CLASS (mode
)),
5634 GET_MODE (x
), opnum
, type
, ind_levels
);
5638 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5639 that feeds this insn. */
5640 if (reg_equiv_mem
[regno
] != 0)
5642 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5643 (context
? INDEX_REG_CLASS
:
5644 MODE_BASE_REG_CLASS (mode
)),
5645 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5650 if (reg_equiv_memory_loc
[regno
]
5651 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5653 rtx tem
= make_memloc (x
, regno
);
5654 if (reg_equiv_address
[regno
] != 0
5655 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5658 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5659 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5664 if (reg_renumber
[regno
] >= 0)
5665 regno
= reg_renumber
[regno
];
5667 if ((regno
>= FIRST_PSEUDO_REGISTER
5668 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5669 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5671 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5672 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5673 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5677 /* If a register appearing in an address is the subject of a CLOBBER
5678 in this insn, reload it into some other register to be safe.
5679 The CLOBBER is supposed to make the register unavailable
5680 from before this insn to after it. */
5681 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5683 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5684 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5685 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5692 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5694 /* If this is a SUBREG of a hard register and the resulting register
5695 is of the wrong class, reload the whole SUBREG. This avoids
5696 needless copies if SUBREG_REG is multi-word. */
5697 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5699 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5701 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5702 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5704 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5705 (context
? INDEX_REG_CLASS
:
5706 MODE_BASE_REG_CLASS (mode
)),
5707 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5711 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5712 is larger than the class size, then reload the whole SUBREG. */
5715 enum reg_class
class = (context
? INDEX_REG_CLASS
5716 : MODE_BASE_REG_CLASS (mode
));
5717 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5718 > reg_class_size
[class])
5720 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5722 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5723 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5735 const char *fmt
= GET_RTX_FORMAT (code
);
5738 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5741 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5742 opnum
, type
, ind_levels
, insn
);
5749 /* X, which is found at *LOC, is a part of an address that needs to be
5750 reloaded into a register of class CLASS. If X is a constant, or if
5751 X is a PLUS that contains a constant, check that the constant is a
5752 legitimate operand and that we are supposed to be able to load
5753 it into the register.
5755 If not, force the constant into memory and reload the MEM instead.
5757 MODE is the mode to use, in case X is an integer constant.
5759 OPNUM and TYPE describe the purpose of any reloads made.
5761 IND_LEVELS says how many levels of indirect addressing this machine
5765 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5768 enum reg_class
class;
5769 enum machine_mode mode
;
5771 enum reload_type type
;
5775 && (! LEGITIMATE_CONSTANT_P (x
)
5776 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5780 tem
= x
= force_const_mem (mode
, x
);
5781 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5782 opnum
, type
, ind_levels
, 0);
5785 else if (GET_CODE (x
) == PLUS
5786 && CONSTANT_P (XEXP (x
, 1))
5787 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5788 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5792 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5793 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5794 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5795 opnum
, type
, ind_levels
, 0);
5798 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5799 mode
, VOIDmode
, 0, 0, opnum
, type
);
5802 /* X, a subreg of a pseudo, is a part of an address that needs to be
5805 If the pseudo is equivalent to a memory location that cannot be directly
5806 addressed, make the necessary address reloads.
5808 If address reloads have been necessary, or if the address is changed
5809 by register elimination, return the rtx of the memory location;
5810 otherwise, return X.
5812 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5815 OPNUM and TYPE identify the purpose of the reload.
5817 IND_LEVELS says how many levels of indirect addressing are
5818 supported at this point in the address.
5820 INSN, if nonzero, is the insn in which we do the reload. It is used
5821 to determine where to put USEs for pseudos that we have to replace with
5825 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5830 enum reload_type type
;
5834 int regno
= REGNO (SUBREG_REG (x
));
5836 if (reg_equiv_memory_loc
[regno
])
5838 /* If the address is not directly addressable, or if the address is not
5839 offsettable, then it must be replaced. */
5841 && (reg_equiv_address
[regno
]
5842 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5845 if (force_replace
|| num_not_at_initial_offset
)
5847 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5849 /* If the address changes because of register elimination, then
5850 it must be replaced. */
5852 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5854 int offset
= SUBREG_BYTE (x
);
5855 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5856 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5858 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5859 PUT_MODE (tem
, GET_MODE (x
));
5861 /* If this was a paradoxical subreg that we replaced, the
5862 resulting memory must be sufficiently aligned to allow
5863 us to widen the mode of the memory. */
5864 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5868 base
= XEXP (tem
, 0);
5869 if (GET_CODE (base
) == PLUS
)
5871 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5872 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5874 base
= XEXP (base
, 0);
5876 if (GET_CODE (base
) != REG
5877 || (REGNO_POINTER_ALIGN (REGNO (base
))
5878 < outer_size
* BITS_PER_UNIT
))
5882 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5883 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5886 /* If this is not a toplevel operand, find_reloads doesn't see
5887 this substitution. We have to emit a USE of the pseudo so
5888 that delete_output_reload can see it. */
5889 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5890 /* We mark the USE with QImode so that we recognize it
5891 as one that can be safely deleted at the end of
5893 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5903 /* Substitute into the current INSN the registers into which we have reloaded
5904 the things that need reloading. The array `replacements'
5905 contains the locations of all pointers that must be changed
5906 and says what to replace them with.
5908 Return the rtx that X translates into; usually X, but modified. */
5911 subst_reloads (insn
)
5916 for (i
= 0; i
< n_replacements
; i
++)
5918 struct replacement
*r
= &replacements
[i
];
5919 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5922 #ifdef ENABLE_CHECKING
5923 /* Internal consistency test. Check that we don't modify
5924 anything in the equivalence arrays. Whenever something from
5925 those arrays needs to be reloaded, it must be unshared before
5926 being substituted into; the equivalence must not be modified.
5927 Otherwise, if the equivalence is used after that, it will
5928 have been modified, and the thing substituted (probably a
5929 register) is likely overwritten and not a usable equivalence. */
5932 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5934 #define CHECK_MODF(ARRAY) \
5935 if (ARRAY[check_regno] \
5936 && loc_mentioned_in_p (r->where, \
5937 ARRAY[check_regno])) \
5940 CHECK_MODF (reg_equiv_constant
);
5941 CHECK_MODF (reg_equiv_memory_loc
);
5942 CHECK_MODF (reg_equiv_address
);
5943 CHECK_MODF (reg_equiv_mem
);
5946 #endif /* ENABLE_CHECKING */
5948 /* If we're replacing a LABEL_REF with a register, add a
5949 REG_LABEL note to indicate to flow which label this
5950 register refers to. */
5951 if (GET_CODE (*r
->where
) == LABEL_REF
5952 && GET_CODE (insn
) == JUMP_INSN
)
5953 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
5954 XEXP (*r
->where
, 0),
5957 /* Encapsulate RELOADREG so its machine mode matches what
5958 used to be there. Note that gen_lowpart_common will
5959 do the wrong thing if RELOADREG is multi-word. RELOADREG
5960 will always be a REG here. */
5961 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5962 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5964 /* If we are putting this into a SUBREG and RELOADREG is a
5965 SUBREG, we would be making nested SUBREGs, so we have to fix
5966 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5968 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5970 if (GET_MODE (*r
->subreg_loc
)
5971 == GET_MODE (SUBREG_REG (reloadreg
)))
5972 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5976 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
5978 /* When working with SUBREGs the rule is that the byte
5979 offset must be a multiple of the SUBREG's mode. */
5980 final_offset
= (final_offset
/
5981 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5982 final_offset
= (final_offset
*
5983 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
5985 *r
->where
= SUBREG_REG (reloadreg
);
5986 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
5990 *r
->where
= reloadreg
;
5992 /* If reload got no reg and isn't optional, something's wrong. */
5993 else if (! rld
[r
->what
].optional
)
5998 /* Make a copy of any replacements being done into X and move those
5999 copies to locations in Y, a copy of X. */
6002 copy_replacements (x
, y
)
6005 /* We can't support X being a SUBREG because we might then need to know its
6006 location if something inside it was replaced. */
6007 if (GET_CODE (x
) == SUBREG
)
6010 copy_replacements_1 (&x
, &y
, n_replacements
);
6014 copy_replacements_1 (px
, py
, orig_replacements
)
6017 int orig_replacements
;
6021 struct replacement
*r
;
6025 for (j
= 0; j
< orig_replacements
; j
++)
6027 if (replacements
[j
].subreg_loc
== px
)
6029 r
= &replacements
[n_replacements
++];
6030 r
->where
= replacements
[j
].where
;
6032 r
->what
= replacements
[j
].what
;
6033 r
->mode
= replacements
[j
].mode
;
6035 else if (replacements
[j
].where
== px
)
6037 r
= &replacements
[n_replacements
++];
6040 r
->what
= replacements
[j
].what
;
6041 r
->mode
= replacements
[j
].mode
;
6047 code
= GET_CODE (x
);
6048 fmt
= GET_RTX_FORMAT (code
);
6050 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6053 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6054 else if (fmt
[i
] == 'E')
6055 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6056 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6061 /* Change any replacements being done to *X to be done to *Y. */
6064 move_replacements (x
, y
)
6070 for (i
= 0; i
< n_replacements
; i
++)
6071 if (replacements
[i
].subreg_loc
== x
)
6072 replacements
[i
].subreg_loc
= y
;
6073 else if (replacements
[i
].where
== x
)
6075 replacements
[i
].where
= y
;
6076 replacements
[i
].subreg_loc
= 0;
6080 /* If LOC was scheduled to be replaced by something, return the replacement.
6081 Otherwise, return *LOC. */
6084 find_replacement (loc
)
6087 struct replacement
*r
;
6089 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6091 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6093 if (reloadreg
&& r
->where
== loc
)
6095 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6096 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6100 else if (reloadreg
&& r
->subreg_loc
== loc
)
6102 /* RELOADREG must be either a REG or a SUBREG.
6104 ??? Is it actually still ever a SUBREG? If so, why? */
6106 if (GET_CODE (reloadreg
) == REG
)
6107 return gen_rtx_REG (GET_MODE (*loc
),
6108 (REGNO (reloadreg
) +
6109 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6110 GET_MODE (SUBREG_REG (*loc
)),
6113 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6117 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6119 /* When working with SUBREGs the rule is that the byte
6120 offset must be a multiple of the SUBREG's mode. */
6121 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6122 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6123 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6129 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6130 what's inside and make a new rtl if so. */
6131 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6132 || GET_CODE (*loc
) == MULT
)
6134 rtx x
= find_replacement (&XEXP (*loc
, 0));
6135 rtx y
= find_replacement (&XEXP (*loc
, 1));
6137 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6138 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6144 /* Return true if some replacement was scheduled at LOC. */
6147 have_replacement_p (loc
)
6150 struct replacement
*r
;
6152 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6153 if (r
->where
== loc
)
6159 /* Return nonzero if register in range [REGNO, ENDREGNO)
6160 appears either explicitly or implicitly in X
6161 other than being stored into (except for earlyclobber operands).
6163 References contained within the substructure at LOC do not count.
6164 LOC may be zero, meaning don't ignore anything.
6166 This is similar to refers_to_regno_p in rtlanal.c except that we
6167 look at equivalences for pseudos that didn't get hard registers. */
6170 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
6171 unsigned int regno
, endregno
;
6184 code
= GET_CODE (x
);
6191 /* If this is a pseudo, a hard register must not have been allocated.
6192 X must therefore either be a constant or be in memory. */
6193 if (r
>= FIRST_PSEUDO_REGISTER
)
6195 if (reg_equiv_memory_loc
[r
])
6196 return refers_to_regno_for_reload_p (regno
, endregno
,
6197 reg_equiv_memory_loc
[r
],
6200 if (reg_equiv_constant
[r
])
6206 return (endregno
> r
6207 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6208 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6212 /* If this is a SUBREG of a hard reg, we can see exactly which
6213 registers are being modified. Otherwise, handle normally. */
6214 if (GET_CODE (SUBREG_REG (x
)) == REG
6215 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6217 unsigned int inner_regno
= subreg_regno (x
);
6218 unsigned int inner_endregno
6219 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6220 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6222 return endregno
> inner_regno
&& regno
< inner_endregno
;
6228 if (&SET_DEST (x
) != loc
6229 /* Note setting a SUBREG counts as referring to the REG it is in for
6230 a pseudo but not for hard registers since we can
6231 treat each word individually. */
6232 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6233 && loc
!= &SUBREG_REG (SET_DEST (x
))
6234 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6235 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6236 && refers_to_regno_for_reload_p (regno
, endregno
,
6237 SUBREG_REG (SET_DEST (x
)),
6239 /* If the output is an earlyclobber operand, this is
6241 || ((GET_CODE (SET_DEST (x
)) != REG
6242 || earlyclobber_operand_p (SET_DEST (x
)))
6243 && refers_to_regno_for_reload_p (regno
, endregno
,
6244 SET_DEST (x
), loc
))))
6247 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6256 /* X does not match, so try its subexpressions. */
6258 fmt
= GET_RTX_FORMAT (code
);
6259 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6261 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6269 if (refers_to_regno_for_reload_p (regno
, endregno
,
6273 else if (fmt
[i
] == 'E')
6276 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6277 if (loc
!= &XVECEXP (x
, i
, j
)
6278 && refers_to_regno_for_reload_p (regno
, endregno
,
6279 XVECEXP (x
, i
, j
), loc
))
6286 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6287 we check if any register number in X conflicts with the relevant register
6288 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6289 contains a MEM (we don't bother checking for memory addresses that can't
6290 conflict because we expect this to be a rare case.
6292 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6293 that we look at equivalences for pseudos that didn't get hard registers. */
6296 reg_overlap_mentioned_for_reload_p (x
, in
)
6299 int regno
, endregno
;
6301 /* Overly conservative. */
6302 if (GET_CODE (x
) == STRICT_LOW_PART
6303 || GET_RTX_CLASS (GET_CODE (x
)) == 'a')
6306 /* If either argument is a constant, then modifying X can not affect IN. */
6307 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6309 else if (GET_CODE (x
) == SUBREG
)
6311 regno
= REGNO (SUBREG_REG (x
));
6312 if (regno
< FIRST_PSEUDO_REGISTER
)
6313 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6314 GET_MODE (SUBREG_REG (x
)),
6318 else if (GET_CODE (x
) == REG
)
6322 /* If this is a pseudo, it must not have been assigned a hard register.
6323 Therefore, it must either be in memory or be a constant. */
6325 if (regno
>= FIRST_PSEUDO_REGISTER
)
6327 if (reg_equiv_memory_loc
[regno
])
6328 return refers_to_mem_for_reload_p (in
);
6329 else if (reg_equiv_constant
[regno
])
6334 else if (GET_CODE (x
) == MEM
)
6335 return refers_to_mem_for_reload_p (in
);
6336 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6337 || GET_CODE (x
) == CC0
)
6338 return reg_mentioned_p (x
, in
);
6339 else if (GET_CODE (x
) == PLUS
)
6340 return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6341 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6345 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6346 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6348 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6351 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6355 refers_to_mem_for_reload_p (x
)
6361 if (GET_CODE (x
) == MEM
)
6364 if (GET_CODE (x
) == REG
)
6365 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6366 && reg_equiv_memory_loc
[REGNO (x
)]);
6368 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6369 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6371 && (GET_CODE (XEXP (x
, i
)) == MEM
6372 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6378 /* Check the insns before INSN to see if there is a suitable register
6379 containing the same value as GOAL.
6380 If OTHER is -1, look for a register in class CLASS.
6381 Otherwise, just see if register number OTHER shares GOAL's value.
6383 Return an rtx for the register found, or zero if none is found.
6385 If RELOAD_REG_P is (short *)1,
6386 we reject any hard reg that appears in reload_reg_rtx
6387 because such a hard reg is also needed coming into this insn.
6389 If RELOAD_REG_P is any other nonzero value,
6390 it is a vector indexed by hard reg number
6391 and we reject any hard reg whose element in the vector is nonnegative
6392 as well as any that appears in reload_reg_rtx.
6394 If GOAL is zero, then GOALREG is a register number; we look
6395 for an equivalent for that register.
6397 MODE is the machine mode of the value we want an equivalence for.
6398 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6400 This function is used by jump.c as well as in the reload pass.
6402 If GOAL is the sum of the stack pointer and a constant, we treat it
6403 as if it were a constant except that sp is required to be unchanging. */
6406 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6409 enum reg_class
class;
6411 short *reload_reg_p
;
6413 enum machine_mode mode
;
6416 rtx goaltry
, valtry
, value
, where
;
6422 int goal_mem_addr_varies
= 0;
6423 int need_stable_sp
= 0;
6429 else if (GET_CODE (goal
) == REG
)
6430 regno
= REGNO (goal
);
6431 else if (GET_CODE (goal
) == MEM
)
6433 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6434 if (MEM_VOLATILE_P (goal
))
6436 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6438 /* An address with side effects must be reexecuted. */
6453 else if (CONSTANT_P (goal
))
6455 else if (GET_CODE (goal
) == PLUS
6456 && XEXP (goal
, 0) == stack_pointer_rtx
6457 && CONSTANT_P (XEXP (goal
, 1)))
6458 goal_const
= need_stable_sp
= 1;
6459 else if (GET_CODE (goal
) == PLUS
6460 && XEXP (goal
, 0) == frame_pointer_rtx
6461 && CONSTANT_P (XEXP (goal
, 1)))
6466 /* Scan insns back from INSN, looking for one that copies
6467 a value into or out of GOAL.
6468 Stop and give up if we reach a label. */
6473 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6476 if (GET_CODE (p
) == INSN
6477 /* If we don't want spill regs ... */
6478 && (! (reload_reg_p
!= 0
6479 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6480 /* ... then ignore insns introduced by reload; they aren't
6481 useful and can cause results in reload_as_needed to be
6482 different from what they were when calculating the need for
6483 spills. If we notice an input-reload insn here, we will
6484 reject it below, but it might hide a usable equivalent.
6485 That makes bad code. It may even abort: perhaps no reg was
6486 spilled for this insn because it was assumed we would find
6488 || INSN_UID (p
) < reload_first_uid
))
6491 pat
= single_set (p
);
6493 /* First check for something that sets some reg equal to GOAL. */
6496 && true_regnum (SET_SRC (pat
)) == regno
6497 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6500 && true_regnum (SET_DEST (pat
)) == regno
6501 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6503 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6504 /* When looking for stack pointer + const,
6505 make sure we don't use a stack adjust. */
6506 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6507 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6509 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6510 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6512 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6513 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6514 /* If we are looking for a constant,
6515 and something equivalent to that constant was copied
6516 into a reg, we can use that reg. */
6517 || (goal_const
&& REG_NOTES (p
) != 0
6518 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6519 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6521 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6522 || (GET_CODE (SET_DEST (pat
)) == REG
6523 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6524 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6526 && GET_CODE (goal
) == CONST_INT
6528 = operand_subword (XEXP (tem
, 0), 0, 0,
6530 && rtx_equal_p (goal
, goaltry
)
6532 = operand_subword (SET_DEST (pat
), 0, 0,
6534 && (valueno
= true_regnum (valtry
)) >= 0)))
6535 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6537 && GET_CODE (SET_DEST (pat
)) == REG
6538 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6539 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6541 && GET_CODE (goal
) == CONST_INT
6542 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6544 && rtx_equal_p (goal
, goaltry
)
6546 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6547 && (valueno
= true_regnum (valtry
)) >= 0)))
6551 if (valueno
!= other
)
6554 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6560 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6561 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6574 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6575 (or copying VALUE into GOAL, if GOAL is also a register).
6576 Now verify that VALUE is really valid. */
6578 /* VALUENO is the register number of VALUE; a hard register. */
6580 /* Don't try to re-use something that is killed in this insn. We want
6581 to be able to trust REG_UNUSED notes. */
6582 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6585 /* If we propose to get the value from the stack pointer or if GOAL is
6586 a MEM based on the stack pointer, we need a stable SP. */
6587 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6588 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6592 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6593 if (GET_MODE (value
) != mode
)
6596 /* Reject VALUE if it was loaded from GOAL
6597 and is also a register that appears in the address of GOAL. */
6599 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6600 && refers_to_regno_for_reload_p (valueno
,
6602 + HARD_REGNO_NREGS (valueno
, mode
)),
6606 /* Reject registers that overlap GOAL. */
6608 if (!goal_mem
&& !goal_const
6609 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6610 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6613 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6614 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6616 /* Reject VALUE if it is one of the regs reserved for reloads.
6617 Reload1 knows how to reuse them anyway, and it would get
6618 confused if we allocated one without its knowledge.
6619 (Now that insns introduced by reload are ignored above,
6620 this case shouldn't happen, but I'm not positive.) */
6622 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6625 for (i
= 0; i
< valuenregs
; ++i
)
6626 if (reload_reg_p
[valueno
+ i
] >= 0)
6630 /* Reject VALUE if it is a register being used for an input reload
6631 even if it is not one of those reserved. */
6633 if (reload_reg_p
!= 0)
6636 for (i
= 0; i
< n_reloads
; i
++)
6637 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6639 int regno1
= REGNO (rld
[i
].reg_rtx
);
6640 int nregs1
= HARD_REGNO_NREGS (regno1
,
6641 GET_MODE (rld
[i
].reg_rtx
));
6642 if (regno1
< valueno
+ valuenregs
6643 && regno1
+ nregs1
> valueno
)
6649 /* We must treat frame pointer as varying here,
6650 since it can vary--in a nonlocal goto as generated by expand_goto. */
6651 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6653 /* Now verify that the values of GOAL and VALUE remain unaltered
6654 until INSN is reached. */
6663 /* Don't trust the conversion past a function call
6664 if either of the two is in a call-clobbered register, or memory. */
6665 if (GET_CODE (p
) == CALL_INSN
)
6669 if (goal_mem
|| need_stable_sp
)
6672 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6673 for (i
= 0; i
< nregs
; ++i
)
6674 if (call_used_regs
[regno
+ i
])
6677 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6678 for (i
= 0; i
< valuenregs
; ++i
)
6679 if (call_used_regs
[valueno
+ i
])
6681 #ifdef NON_SAVING_SETJMP
6682 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6691 /* Watch out for unspec_volatile, and volatile asms. */
6692 if (volatile_insn_p (pat
))
6695 /* If this insn P stores in either GOAL or VALUE, return 0.
6696 If GOAL is a memory ref and this insn writes memory, return 0.
6697 If GOAL is a memory ref and its address is not constant,
6698 and this insn P changes a register used in GOAL, return 0. */
6700 if (GET_CODE (pat
) == COND_EXEC
)
6701 pat
= COND_EXEC_CODE (pat
);
6702 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6704 rtx dest
= SET_DEST (pat
);
6705 while (GET_CODE (dest
) == SUBREG
6706 || GET_CODE (dest
) == ZERO_EXTRACT
6707 || GET_CODE (dest
) == SIGN_EXTRACT
6708 || GET_CODE (dest
) == STRICT_LOW_PART
)
6709 dest
= XEXP (dest
, 0);
6710 if (GET_CODE (dest
) == REG
)
6712 int xregno
= REGNO (dest
);
6714 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6715 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6718 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6720 if (xregno
< valueno
+ valuenregs
6721 && xregno
+ xnregs
> valueno
)
6723 if (goal_mem_addr_varies
6724 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6726 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6729 else if (goal_mem
&& GET_CODE (dest
) == MEM
6730 && ! push_operand (dest
, GET_MODE (dest
)))
6732 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6733 && reg_equiv_memory_loc
[regno
] != 0)
6735 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6738 else if (GET_CODE (pat
) == PARALLEL
)
6741 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6743 rtx v1
= XVECEXP (pat
, 0, i
);
6744 if (GET_CODE (v1
) == COND_EXEC
)
6745 v1
= COND_EXEC_CODE (v1
);
6746 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6748 rtx dest
= SET_DEST (v1
);
6749 while (GET_CODE (dest
) == SUBREG
6750 || GET_CODE (dest
) == ZERO_EXTRACT
6751 || GET_CODE (dest
) == SIGN_EXTRACT
6752 || GET_CODE (dest
) == STRICT_LOW_PART
)
6753 dest
= XEXP (dest
, 0);
6754 if (GET_CODE (dest
) == REG
)
6756 int xregno
= REGNO (dest
);
6758 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6759 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6762 if (xregno
< regno
+ nregs
6763 && xregno
+ xnregs
> regno
)
6765 if (xregno
< valueno
+ valuenregs
6766 && xregno
+ xnregs
> valueno
)
6768 if (goal_mem_addr_varies
6769 && reg_overlap_mentioned_for_reload_p (dest
,
6772 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6775 else if (goal_mem
&& GET_CODE (dest
) == MEM
6776 && ! push_operand (dest
, GET_MODE (dest
)))
6778 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6779 && reg_equiv_memory_loc
[regno
] != 0)
6781 else if (need_stable_sp
6782 && push_operand (dest
, GET_MODE (dest
)))
6788 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6792 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6793 link
= XEXP (link
, 1))
6795 pat
= XEXP (link
, 0);
6796 if (GET_CODE (pat
) == CLOBBER
)
6798 rtx dest
= SET_DEST (pat
);
6800 if (GET_CODE (dest
) == REG
)
6802 int xregno
= REGNO (dest
);
6804 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6806 if (xregno
< regno
+ nregs
6807 && xregno
+ xnregs
> regno
)
6809 else if (xregno
< valueno
+ valuenregs
6810 && xregno
+ xnregs
> valueno
)
6812 else if (goal_mem_addr_varies
6813 && reg_overlap_mentioned_for_reload_p (dest
,
6818 else if (goal_mem
&& GET_CODE (dest
) == MEM
6819 && ! push_operand (dest
, GET_MODE (dest
)))
6821 else if (need_stable_sp
6822 && push_operand (dest
, GET_MODE (dest
)))
6829 /* If this insn auto-increments or auto-decrements
6830 either regno or valueno, return 0 now.
6831 If GOAL is a memory ref and its address is not constant,
6832 and this insn P increments a register used in GOAL, return 0. */
6836 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6837 if (REG_NOTE_KIND (link
) == REG_INC
6838 && GET_CODE (XEXP (link
, 0)) == REG
)
6840 int incno
= REGNO (XEXP (link
, 0));
6841 if (incno
< regno
+ nregs
&& incno
>= regno
)
6843 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6845 if (goal_mem_addr_varies
6846 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6856 /* Find a place where INCED appears in an increment or decrement operator
6857 within X, and return the amount INCED is incremented or decremented by.
6858 The value is always positive. */
6861 find_inc_amount (x
, inced
)
6864 enum rtx_code code
= GET_CODE (x
);
6870 rtx addr
= XEXP (x
, 0);
6871 if ((GET_CODE (addr
) == PRE_DEC
6872 || GET_CODE (addr
) == POST_DEC
6873 || GET_CODE (addr
) == PRE_INC
6874 || GET_CODE (addr
) == POST_INC
)
6875 && XEXP (addr
, 0) == inced
)
6876 return GET_MODE_SIZE (GET_MODE (x
));
6877 else if ((GET_CODE (addr
) == PRE_MODIFY
6878 || GET_CODE (addr
) == POST_MODIFY
)
6879 && GET_CODE (XEXP (addr
, 1)) == PLUS
6880 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6881 && XEXP (addr
, 0) == inced
6882 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6884 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6885 return i
< 0 ? -i
: i
;
6889 fmt
= GET_RTX_FORMAT (code
);
6890 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6894 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6901 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6903 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6913 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6914 If SETS is nonzero, also consider SETs. */
6917 regno_clobbered_p (regno
, insn
, mode
, sets
)
6920 enum machine_mode mode
;
6923 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6924 unsigned int endregno
= regno
+ nregs
;
6926 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6927 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6928 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6930 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6932 return test
>= regno
&& test
< endregno
;
6935 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6937 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6941 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6942 if ((GET_CODE (elt
) == CLOBBER
6943 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6944 && GET_CODE (XEXP (elt
, 0)) == REG
)
6946 unsigned int test
= REGNO (XEXP (elt
, 0));
6948 if (test
>= regno
&& test
< endregno
)
6957 static const char *const reload_when_needed_name
[] =
6960 "RELOAD_FOR_OUTPUT",
6962 "RELOAD_FOR_INPUT_ADDRESS",
6963 "RELOAD_FOR_INPADDR_ADDRESS",
6964 "RELOAD_FOR_OUTPUT_ADDRESS",
6965 "RELOAD_FOR_OUTADDR_ADDRESS",
6966 "RELOAD_FOR_OPERAND_ADDRESS",
6967 "RELOAD_FOR_OPADDR_ADDR",
6969 "RELOAD_FOR_OTHER_ADDRESS"
6972 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6974 /* These functions are used to print the variables set by 'find_reloads' */
6977 debug_reload_to_stream (f
)
6985 for (r
= 0; r
< n_reloads
; r
++)
6987 fprintf (f
, "Reload %d: ", r
);
6991 fprintf (f
, "reload_in (%s) = ",
6992 GET_MODE_NAME (rld
[r
].inmode
));
6993 print_inline_rtx (f
, rld
[r
].in
, 24);
6994 fprintf (f
, "\n\t");
6997 if (rld
[r
].out
!= 0)
6999 fprintf (f
, "reload_out (%s) = ",
7000 GET_MODE_NAME (rld
[r
].outmode
));
7001 print_inline_rtx (f
, rld
[r
].out
, 24);
7002 fprintf (f
, "\n\t");
7005 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
7007 fprintf (f
, "%s (opnum = %d)",
7008 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7011 if (rld
[r
].optional
)
7012 fprintf (f
, ", optional");
7014 if (rld
[r
].nongroup
)
7015 fprintf (f
, ", nongroup");
7017 if (rld
[r
].inc
!= 0)
7018 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7020 if (rld
[r
].nocombine
)
7021 fprintf (f
, ", can't combine");
7023 if (rld
[r
].secondary_p
)
7024 fprintf (f
, ", secondary_reload_p");
7026 if (rld
[r
].in_reg
!= 0)
7028 fprintf (f
, "\n\treload_in_reg: ");
7029 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7032 if (rld
[r
].out_reg
!= 0)
7034 fprintf (f
, "\n\treload_out_reg: ");
7035 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7038 if (rld
[r
].reg_rtx
!= 0)
7040 fprintf (f
, "\n\treload_reg_rtx: ");
7041 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7045 if (rld
[r
].secondary_in_reload
!= -1)
7047 fprintf (f
, "%ssecondary_in_reload = %d",
7048 prefix
, rld
[r
].secondary_in_reload
);
7052 if (rld
[r
].secondary_out_reload
!= -1)
7053 fprintf (f
, "%ssecondary_out_reload = %d\n",
7054 prefix
, rld
[r
].secondary_out_reload
);
7057 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7059 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7060 insn_data
[rld
[r
].secondary_in_icode
].name
);
7064 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7065 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7066 insn_data
[rld
[r
].secondary_out_icode
].name
);
7075 debug_reload_to_stream (stderr
);