1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
91 #include "coretypes.h"
95 #include "insn-config.h"
101 #include "hard-reg-set.h"
105 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(m, x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int,
247 static int reload_inner_reg_of_subreg
PARAMS ((rtx
, enum machine_mode
, int));
248 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
249 static void dup_replacements
PARAMS ((rtx
*, rtx
*));
250 static void combine_reloads
PARAMS ((void));
251 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
252 enum reload_type
, int, int));
253 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
254 enum machine_mode
, enum machine_mode
,
255 enum reg_class
, int, int));
256 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
257 static struct decomposition decompose
PARAMS ((rtx
));
258 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PARAMS ((const char *, int));
260 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
262 static rtx make_memloc
PARAMS ((rtx
, int));
263 static int maybe_memory_address_p
PARAMS ((enum machine_mode
, rtx
, rtx
*));
264 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
265 int, enum reload_type
, int, rtx
));
266 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
267 static rtx subst_indexed_address
PARAMS ((rtx
));
268 static void update_auto_inc_notes
PARAMS ((rtx
, int, int));
269 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
270 int, enum reload_type
,int, rtx
));
271 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
272 enum machine_mode
, int,
273 enum reload_type
, int));
274 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int,
275 enum reload_type
, int, rtx
));
276 static void copy_replacements_1
PARAMS ((rtx
*, rtx
*, int));
277 static int find_inc_amount
PARAMS ((rtx
, rtx
));
279 #ifdef HAVE_SECONDARY_RELOADS
281 /* Determine if any secondary reloads are needed for loading (if IN_P is
282 nonzero) or storing (if IN_P is zero) X to or from a reload register of
283 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
284 are needed, push them.
286 Return the reload number of the secondary reload we made, or -1 if
287 we didn't need one. *PICODE is set to the insn_code to use if we do
288 need a secondary reload. */
291 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
297 enum reg_class reload_class
;
298 enum machine_mode reload_mode
;
299 enum reload_type type
;
300 enum insn_code
*picode
;
302 enum reg_class
class = NO_REGS
;
303 enum machine_mode mode
= reload_mode
;
304 enum insn_code icode
= CODE_FOR_nothing
;
305 enum reg_class t_class
= NO_REGS
;
306 enum machine_mode t_mode
= VOIDmode
;
307 enum insn_code t_icode
= CODE_FOR_nothing
;
308 enum reload_type secondary_type
;
309 int s_reload
, t_reload
= -1;
311 if (type
== RELOAD_FOR_INPUT_ADDRESS
312 || type
== RELOAD_FOR_OUTPUT_ADDRESS
313 || type
== RELOAD_FOR_INPADDR_ADDRESS
314 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
315 secondary_type
= type
;
317 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
319 *picode
= CODE_FOR_nothing
;
321 /* If X is a paradoxical SUBREG, use the inner value to determine both the
322 mode and object being reloaded. */
323 if (GET_CODE (x
) == SUBREG
324 && (GET_MODE_SIZE (GET_MODE (x
))
325 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
328 reload_mode
= GET_MODE (x
);
331 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
332 is still a pseudo-register by now, it *must* have an equivalent MEM
333 but we don't want to assume that), use that equivalent when seeing if
334 a secondary reload is needed since whether or not a reload is needed
335 might be sensitive to the form of the MEM. */
337 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
338 && reg_equiv_mem
[REGNO (x
)] != 0)
339 x
= reg_equiv_mem
[REGNO (x
)];
341 #ifdef SECONDARY_INPUT_RELOAD_CLASS
343 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
346 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
348 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
351 /* If we don't need any secondary registers, done. */
352 if (class == NO_REGS
)
355 /* Get a possible insn to use. If the predicate doesn't accept X, don't
358 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
359 : reload_out_optab
[(int) reload_mode
]);
361 if (icode
!= CODE_FOR_nothing
362 && insn_data
[(int) icode
].operand
[in_p
].predicate
363 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
364 icode
= CODE_FOR_nothing
;
366 /* If we will be using an insn, see if it can directly handle the reload
367 register we will be using. If it can, the secondary reload is for a
368 scratch register. If it can't, we will use the secondary reload for
369 an intermediate register and require a tertiary reload for the scratch
372 if (icode
!= CODE_FOR_nothing
)
374 /* If IN_P is nonzero, the reload register will be the output in
375 operand 0. If IN_P is zero, the reload register will be the input
376 in operand 1. Outputs should have an initial "=", which we must
379 enum reg_class insn_class
;
381 if (insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] == 0)
382 insn_class
= ALL_REGS
;
385 const char *insn_constraint
386 = &insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
387 char insn_letter
= *insn_constraint
;
389 = (insn_letter
== 'r' ? GENERAL_REGS
390 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) insn_letter
,
393 if (insn_class
== NO_REGS
)
396 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
400 /* The scratch register's constraint must start with "=&". */
401 if (insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
402 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
405 if (reg_class_subset_p (reload_class
, insn_class
))
406 mode
= insn_data
[(int) icode
].operand
[2].mode
;
409 const char *t_constraint
410 = &insn_data
[(int) icode
].operand
[2].constraint
[2];
411 char t_letter
= *t_constraint
;
413 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
414 t_class
= (t_letter
== 'r' ? GENERAL_REGS
415 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) t_letter
,
418 icode
= CODE_FOR_nothing
;
422 /* This case isn't valid, so fail. Reload is allowed to use the same
423 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
424 in the case of a secondary register, we actually need two different
425 registers for correct code. We fail here to prevent the possibility of
426 silently generating incorrect code later.
428 The convention is that secondary input reloads are valid only if the
429 secondary_class is different from class. If you have such a case, you
430 can not use secondary reloads, you must work around the problem some
433 Allow this when a reload_in/out pattern is being used. I.e. assume
434 that the generated code handles this case. */
436 if (in_p
&& class == reload_class
&& icode
== CODE_FOR_nothing
437 && t_icode
== CODE_FOR_nothing
)
440 /* If we need a tertiary reload, see if we have one we can reuse or else
443 if (t_class
!= NO_REGS
)
445 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
446 if (rld
[t_reload
].secondary_p
447 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
448 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
449 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
450 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
451 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
452 == CODE_FOR_nothing
))
453 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
454 == CODE_FOR_nothing
)))
455 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
456 && MERGABLE_RELOADS (secondary_type
,
457 rld
[t_reload
].when_needed
,
458 opnum
, rld
[t_reload
].opnum
))
461 rld
[t_reload
].inmode
= t_mode
;
463 rld
[t_reload
].outmode
= t_mode
;
465 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
466 rld
[t_reload
].class = t_class
;
468 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
469 rld
[t_reload
].optional
&= optional
;
470 rld
[t_reload
].secondary_p
= 1;
471 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
472 opnum
, rld
[t_reload
].opnum
))
473 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
476 if (t_reload
== n_reloads
)
478 /* We need to make a new tertiary reload for this register class. */
479 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
480 rld
[t_reload
].class = t_class
;
481 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
482 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
483 rld
[t_reload
].reg_rtx
= 0;
484 rld
[t_reload
].optional
= optional
;
485 rld
[t_reload
].inc
= 0;
486 /* Maybe we could combine these, but it seems too tricky. */
487 rld
[t_reload
].nocombine
= 1;
488 rld
[t_reload
].in_reg
= 0;
489 rld
[t_reload
].out_reg
= 0;
490 rld
[t_reload
].opnum
= opnum
;
491 rld
[t_reload
].when_needed
= secondary_type
;
492 rld
[t_reload
].secondary_in_reload
= -1;
493 rld
[t_reload
].secondary_out_reload
= -1;
494 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
495 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
496 rld
[t_reload
].secondary_p
= 1;
502 /* See if we can reuse an existing secondary reload. */
503 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
504 if (rld
[s_reload
].secondary_p
505 && (reg_class_subset_p (class, rld
[s_reload
].class)
506 || reg_class_subset_p (rld
[s_reload
].class, class))
507 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
508 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
509 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
510 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
511 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
512 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
513 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
514 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
515 opnum
, rld
[s_reload
].opnum
))
518 rld
[s_reload
].inmode
= mode
;
520 rld
[s_reload
].outmode
= mode
;
522 if (reg_class_subset_p (class, rld
[s_reload
].class))
523 rld
[s_reload
].class = class;
525 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
526 rld
[s_reload
].optional
&= optional
;
527 rld
[s_reload
].secondary_p
= 1;
528 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
529 opnum
, rld
[s_reload
].opnum
))
530 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
533 if (s_reload
== n_reloads
)
535 #ifdef SECONDARY_MEMORY_NEEDED
536 /* If we need a memory location to copy between the two reload regs,
537 set it up now. Note that we do the input case before making
538 the reload and the output case after. This is due to the
539 way reloads are output. */
541 if (in_p
&& icode
== CODE_FOR_nothing
542 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
544 get_secondary_mem (x
, reload_mode
, opnum
, type
);
546 /* We may have just added new reloads. Make sure we add
547 the new reload at the end. */
548 s_reload
= n_reloads
;
552 /* We need to make a new secondary reload for this register class. */
553 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
554 rld
[s_reload
].class = class;
556 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
557 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
558 rld
[s_reload
].reg_rtx
= 0;
559 rld
[s_reload
].optional
= optional
;
560 rld
[s_reload
].inc
= 0;
561 /* Maybe we could combine these, but it seems too tricky. */
562 rld
[s_reload
].nocombine
= 1;
563 rld
[s_reload
].in_reg
= 0;
564 rld
[s_reload
].out_reg
= 0;
565 rld
[s_reload
].opnum
= opnum
;
566 rld
[s_reload
].when_needed
= secondary_type
;
567 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
568 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
569 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
570 rld
[s_reload
].secondary_out_icode
571 = ! in_p
? t_icode
: CODE_FOR_nothing
;
572 rld
[s_reload
].secondary_p
= 1;
576 #ifdef SECONDARY_MEMORY_NEEDED
577 if (! in_p
&& icode
== CODE_FOR_nothing
578 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
579 get_secondary_mem (x
, mode
, opnum
, type
);
586 #endif /* HAVE_SECONDARY_RELOADS */
588 #ifdef SECONDARY_MEMORY_NEEDED
590 /* Return a memory location that will be used to copy X in mode MODE.
591 If we haven't already made a location for this mode in this insn,
592 call find_reloads_address on the location being returned. */
595 get_secondary_mem (x
, mode
, opnum
, type
)
596 rtx x ATTRIBUTE_UNUSED
;
597 enum machine_mode mode
;
599 enum reload_type type
;
604 /* By default, if MODE is narrower than a word, widen it to a word.
605 This is required because most machines that require these memory
606 locations do not support short load and stores from all registers
607 (e.g., FP registers). */
609 #ifdef SECONDARY_MEMORY_NEEDED_MODE
610 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
612 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
613 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
616 /* If we already have made a MEM for this operand in MODE, return it. */
617 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
618 return secondary_memlocs_elim
[(int) mode
][opnum
];
620 /* If this is the first time we've tried to get a MEM for this mode,
621 allocate a new one. `something_changed' in reload will get set
622 by noticing that the frame size has changed. */
624 if (secondary_memlocs
[(int) mode
] == 0)
626 #ifdef SECONDARY_MEMORY_NEEDED_RTX
627 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
629 secondary_memlocs
[(int) mode
]
630 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
634 /* Get a version of the address doing any eliminations needed. If that
635 didn't give us a new MEM, make a new one if it isn't valid. */
637 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
638 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
640 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
641 loc
= copy_rtx (loc
);
643 /* The only time the call below will do anything is if the stack
644 offset is too large. In that case IND_LEVELS doesn't matter, so we
645 can just pass a zero. Adjust the type to be the address of the
646 corresponding object. If the address was valid, save the eliminated
647 address. If it wasn't valid, we need to make a reload each time, so
652 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
653 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
656 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
660 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
664 /* Clear any secondary memory locations we've made. */
667 clear_secondary_mem ()
669 memset ((char *) secondary_memlocs
, 0, sizeof secondary_memlocs
);
671 #endif /* SECONDARY_MEMORY_NEEDED */
673 /* Find the largest class for which every register number plus N is valid in
674 M1 (if in range) and is cheap to move into REGNO.
675 Abort if no such class exists. */
677 static enum reg_class
678 find_valid_class (m1
, n
, dest_regno
)
679 enum machine_mode m1 ATTRIBUTE_UNUSED
;
681 unsigned int dest_regno ATTRIBUTE_UNUSED
;
686 enum reg_class best_class
= NO_REGS
;
687 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
688 unsigned int best_size
= 0;
691 for (class = 1; class < N_REG_CLASSES
; class++)
694 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
695 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
696 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
697 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
702 cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
704 if ((reg_class_size
[class] > best_size
705 && (best_cost
< 0 || best_cost
>= cost
))
709 best_size
= reg_class_size
[class];
710 best_cost
= REGISTER_MOVE_COST (m1
, class, dest_class
);
720 /* Return the number of a previously made reload that can be combined with
721 a new one, or n_reloads if none of the existing reloads can be used.
722 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
723 push_reload, they determine the kind of the new reload that we try to
724 combine. P_IN points to the corresponding value of IN, which can be
725 modified by this function.
726 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
729 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
731 enum reg_class
class;
732 enum reload_type type
;
733 int opnum
, dont_share
;
737 /* We can't merge two reloads if the output of either one is
740 if (earlyclobber_operand_p (out
))
743 /* We can use an existing reload if the class is right
744 and at least one of IN and OUT is a match
745 and the other is at worst neutral.
746 (A zero compared against anything is neutral.)
748 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
749 for the same thing since that can cause us to need more reload registers
750 than we otherwise would. */
752 for (i
= 0; i
< n_reloads
; i
++)
753 if ((reg_class_subset_p (class, rld
[i
].class)
754 || reg_class_subset_p (rld
[i
].class, class))
755 /* If the existing reload has a register, it must fit our class. */
756 && (rld
[i
].reg_rtx
== 0
757 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
758 true_regnum (rld
[i
].reg_rtx
)))
759 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
760 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
761 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
762 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
763 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
764 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
765 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
768 /* Reloading a plain reg for input can match a reload to postincrement
769 that reg, since the postincrement's value is the right value.
770 Likewise, it can match a preincrement reload, since we regard
771 the preincrementation as happening before any ref in this insn
773 for (i
= 0; i
< n_reloads
; i
++)
774 if ((reg_class_subset_p (class, rld
[i
].class)
775 || reg_class_subset_p (rld
[i
].class, class))
776 /* If the existing reload has a register, it must fit our
778 && (rld
[i
].reg_rtx
== 0
779 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
780 true_regnum (rld
[i
].reg_rtx
)))
781 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
782 && ((GET_CODE (in
) == REG
783 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
784 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
785 || (GET_CODE (rld
[i
].in
) == REG
786 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
787 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
788 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
789 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
790 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
791 opnum
, rld
[i
].opnum
))
793 /* Make sure reload_in ultimately has the increment,
794 not the plain register. */
795 if (GET_CODE (in
) == REG
)
802 /* Return nonzero if X is a SUBREG which will require reloading of its
803 SUBREG_REG expression. */
806 reload_inner_reg_of_subreg (x
, mode
, output
)
808 enum machine_mode mode
;
813 /* Only SUBREGs are problematical. */
814 if (GET_CODE (x
) != SUBREG
)
817 inner
= SUBREG_REG (x
);
819 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
820 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
823 /* If INNER is not a hard register, then INNER will not need to
825 if (GET_CODE (inner
) != REG
826 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
829 /* If INNER is not ok for MODE, then INNER will need reloading. */
830 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
833 /* If the outer part is a word or smaller, INNER larger than a
834 word and the number of regs for INNER is not the same as the
835 number of words in INNER, then INNER will need reloading. */
836 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
838 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
839 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
840 != (int) HARD_REGNO_NREGS (REGNO (inner
), GET_MODE (inner
))));
843 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
844 requiring an extra reload register. The caller has already found that
845 IN contains some reference to REGNO, so check that we can produce the
846 new value in a single step. E.g. if we have
847 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
848 instruction that adds one to a register, this should succeed.
849 However, if we have something like
850 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
851 needs to be loaded into a register first, we need a separate reload
853 Such PLUS reloads are generated by find_reload_address_part.
854 The out-of-range PLUS expressions are usually introduced in the instruction
855 patterns by register elimination and substituting pseudos without a home
856 by their function-invariant equivalences. */
858 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
862 struct recog_data save_recog_data
;
864 /* For matching constraints, we often get notional input reloads where
865 we want to use the original register as the reload register. I.e.
866 technically this is a non-optional input-output reload, but IN is
867 already a valid register, and has been chosen as the reload register.
868 Speed this up, since it trivially works. */
869 if (GET_CODE (in
) == REG
)
872 /* To test MEMs properly, we'd have to take into account all the reloads
873 that are already scheduled, which can become quite complicated.
874 And since we've already handled address reloads for this MEM, it
875 should always succeed anyway. */
876 if (GET_CODE (in
) == MEM
)
879 /* If we can make a simple SET insn that does the job, everything should
881 dst
= gen_rtx_REG (mode
, regno
);
882 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
883 save_recog_data
= recog_data
;
884 if (recog_memoized (test_insn
) >= 0)
886 extract_insn (test_insn
);
887 r
= constrain_operands (1);
889 recog_data
= save_recog_data
;
893 /* Record one reload that needs to be performed.
894 IN is an rtx saying where the data are to be found before this instruction.
895 OUT says where they must be stored after the instruction.
896 (IN is zero for data not read, and OUT is zero for data not written.)
897 INLOC and OUTLOC point to the places in the instructions where
898 IN and OUT were found.
899 If IN and OUT are both nonzero, it means the same register must be used
900 to reload both IN and OUT.
902 CLASS is a register class required for the reloaded data.
903 INMODE is the machine mode that the instruction requires
904 for the reg that replaces IN and OUTMODE is likewise for OUT.
906 If IN is zero, then OUT's location and mode should be passed as
909 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
911 OPTIONAL nonzero means this reload does not need to be performed:
912 it can be discarded if that is more convenient.
914 OPNUM and TYPE say what the purpose of this reload is.
916 The return value is the reload-number for this reload.
918 If both IN and OUT are nonzero, in some rare cases we might
919 want to make two separate reloads. (Actually we never do this now.)
920 Therefore, the reload-number for OUT is stored in
921 output_reloadnum when we return; the return value applies to IN.
922 Usually (presently always), when IN and OUT are nonzero,
923 the two reload-numbers are equal, but the caller should be careful to
927 push_reload (in
, out
, inloc
, outloc
, class,
928 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
931 enum reg_class
class;
932 enum machine_mode inmode
, outmode
;
936 enum reload_type type
;
940 int dont_remove_subreg
= 0;
941 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
942 int secondary_in_reload
= -1, secondary_out_reload
= -1;
943 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
944 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
946 /* INMODE and/or OUTMODE could be VOIDmode if no mode
947 has been specified for the operand. In that case,
948 use the operand's mode as the mode to reload. */
949 if (inmode
== VOIDmode
&& in
!= 0)
950 inmode
= GET_MODE (in
);
951 if (outmode
== VOIDmode
&& out
!= 0)
952 outmode
= GET_MODE (out
);
954 /* If IN is a pseudo register everywhere-equivalent to a constant, and
955 it is not in a hard register, reload straight from the constant,
956 since we want to get rid of such pseudo registers.
957 Often this is done earlier, but not always in find_reloads_address. */
958 if (in
!= 0 && GET_CODE (in
) == REG
)
960 int regno
= REGNO (in
);
962 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
963 && reg_equiv_constant
[regno
] != 0)
964 in
= reg_equiv_constant
[regno
];
967 /* Likewise for OUT. Of course, OUT will never be equivalent to
968 an actual constant, but it might be equivalent to a memory location
969 (in the case of a parameter). */
970 if (out
!= 0 && GET_CODE (out
) == REG
)
972 int regno
= REGNO (out
);
974 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
975 && reg_equiv_constant
[regno
] != 0)
976 out
= reg_equiv_constant
[regno
];
979 /* If we have a read-write operand with an address side-effect,
980 change either IN or OUT so the side-effect happens only once. */
981 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
982 switch (GET_CODE (XEXP (in
, 0)))
984 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
985 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
988 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
989 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
996 /* If we are reloading a (SUBREG constant ...), really reload just the
997 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
998 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
999 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1000 register is a pseudo, also reload the inside expression.
1001 For machines that extend byte loads, do this for any SUBREG of a pseudo
1002 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1003 M2 is an integral mode that gets extended when loaded.
1004 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1005 either M1 is not valid for R or M2 is wider than a word but we only
1006 need one word to store an M2-sized quantity in R.
1007 (However, if OUT is nonzero, we need to reload the reg *and*
1008 the subreg, so do nothing here, and let following statement handle it.)
1010 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1011 we can't handle it here because CONST_INT does not indicate a mode.
1013 Similarly, we must reload the inside expression if we have a
1014 STRICT_LOW_PART (presumably, in == out in the cas).
1016 Also reload the inner expression if it does not require a secondary
1017 reload but the SUBREG does.
1019 Finally, reload the inner expression if it is a register that is in
1020 the class whose registers cannot be referenced in a different size
1021 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1022 cannot reload just the inside since we might end up with the wrong
1023 register class. But if it is inside a STRICT_LOW_PART, we have
1024 no choice, so we hope we do get the right register class there. */
1026 if (in
!= 0 && GET_CODE (in
) == SUBREG
1027 && (subreg_lowpart_p (in
) || strict_low
)
1028 #ifdef CANNOT_CHANGE_MODE_CLASS
1029 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, class)
1031 && (CONSTANT_P (SUBREG_REG (in
))
1032 || GET_CODE (SUBREG_REG (in
)) == PLUS
1034 || (((GET_CODE (SUBREG_REG (in
)) == REG
1035 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1036 || GET_CODE (SUBREG_REG (in
)) == MEM
)
1037 && ((GET_MODE_SIZE (inmode
)
1038 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1039 #ifdef LOAD_EXTEND_OP
1040 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1041 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1043 && (GET_MODE_SIZE (inmode
)
1044 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1045 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
1046 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
1048 #ifdef WORD_REGISTER_OPERATIONS
1049 || ((GET_MODE_SIZE (inmode
)
1050 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1051 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1052 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1056 || (GET_CODE (SUBREG_REG (in
)) == REG
1057 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1058 /* The case where out is nonzero
1059 is handled differently in the following statement. */
1060 && (out
== 0 || subreg_lowpart_p (in
))
1061 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1062 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1064 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1066 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
1067 GET_MODE (SUBREG_REG (in
)))))
1068 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1069 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1070 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
1071 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1072 GET_MODE (SUBREG_REG (in
)),
1076 #ifdef CANNOT_CHANGE_MODE_CLASS
1077 || (GET_CODE (SUBREG_REG (in
)) == REG
1078 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1079 && REG_CANNOT_CHANGE_MODE_P
1080 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1084 in_subreg_loc
= inloc
;
1085 inloc
= &SUBREG_REG (in
);
1087 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1088 if (GET_CODE (in
) == MEM
)
1089 /* This is supposed to happen only for paradoxical subregs made by
1090 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1091 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
1094 inmode
= GET_MODE (in
);
1097 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1098 either M1 is not valid for R or M2 is wider than a word but we only
1099 need one word to store an M2-sized quantity in R.
1101 However, we must reload the inner reg *as well as* the subreg in
1104 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1105 code above. This can happen if SUBREG_BYTE != 0. */
1107 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1109 enum reg_class in_class
= class;
1111 if (GET_CODE (SUBREG_REG (in
)) == REG
)
1113 = find_valid_class (inmode
,
1114 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1115 GET_MODE (SUBREG_REG (in
)),
1118 REGNO (SUBREG_REG (in
)));
1120 /* This relies on the fact that emit_reload_insns outputs the
1121 instructions for input reloads of type RELOAD_OTHER in the same
1122 order as the reloads. Thus if the outer reload is also of type
1123 RELOAD_OTHER, we are guaranteed that this inner reload will be
1124 output before the outer reload. */
1125 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1126 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1127 dont_remove_subreg
= 1;
1130 /* Similarly for paradoxical and problematical SUBREGs on the output.
1131 Note that there is no reason we need worry about the previous value
1132 of SUBREG_REG (out); even if wider than out,
1133 storing in a subreg is entitled to clobber it all
1134 (except in the case of STRICT_LOW_PART,
1135 and in that case the constraint should label it input-output.) */
1136 if (out
!= 0 && GET_CODE (out
) == SUBREG
1137 && (subreg_lowpart_p (out
) || strict_low
)
1138 #ifdef CANNOT_CHANGE_MODE_CLASS
1139 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, class)
1141 && (CONSTANT_P (SUBREG_REG (out
))
1143 || (((GET_CODE (SUBREG_REG (out
)) == REG
1144 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1145 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1146 && ((GET_MODE_SIZE (outmode
)
1147 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1148 #ifdef WORD_REGISTER_OPERATIONS
1149 || ((GET_MODE_SIZE (outmode
)
1150 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1151 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1152 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1156 || (GET_CODE (SUBREG_REG (out
)) == REG
1157 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1158 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1159 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1161 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1163 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1164 GET_MODE (SUBREG_REG (out
)))))
1165 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1166 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1167 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1168 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1169 GET_MODE (SUBREG_REG (out
)),
1173 #ifdef CANNOT_CHANGE_MODE_CLASS
1174 || (GET_CODE (SUBREG_REG (out
)) == REG
1175 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1176 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1177 GET_MODE (SUBREG_REG (out
)),
1182 out_subreg_loc
= outloc
;
1183 outloc
= &SUBREG_REG (out
);
1185 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1186 if (GET_CODE (out
) == MEM
1187 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1190 outmode
= GET_MODE (out
);
1193 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1194 either M1 is not valid for R or M2 is wider than a word but we only
1195 need one word to store an M2-sized quantity in R.
1197 However, we must reload the inner reg *as well as* the subreg in
1198 that case. In this case, the inner reg is an in-out reload. */
1200 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1202 /* This relies on the fact that emit_reload_insns outputs the
1203 instructions for output reloads of type RELOAD_OTHER in reverse
1204 order of the reloads. Thus if the outer reload is also of type
1205 RELOAD_OTHER, we are guaranteed that this inner reload will be
1206 output after the outer reload. */
1207 dont_remove_subreg
= 1;
1208 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1210 find_valid_class (outmode
,
1211 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1212 GET_MODE (SUBREG_REG (out
)),
1215 REGNO (SUBREG_REG (out
))),
1216 VOIDmode
, VOIDmode
, 0, 0,
1217 opnum
, RELOAD_OTHER
);
1220 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1221 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1222 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1223 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1226 /* If IN is a SUBREG of a hard register, make a new REG. This
1227 simplifies some of the cases below. */
1229 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1230 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1231 && ! dont_remove_subreg
)
1232 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1234 /* Similarly for OUT. */
1235 if (out
!= 0 && GET_CODE (out
) == SUBREG
1236 && GET_CODE (SUBREG_REG (out
)) == REG
1237 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1238 && ! dont_remove_subreg
)
1239 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1241 /* Narrow down the class of register wanted if that is
1242 desirable on this machine for efficiency. */
1244 class = PREFERRED_RELOAD_CLASS (in
, class);
1246 /* Output reloads may need analogous treatment, different in detail. */
1247 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1249 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1252 /* Make sure we use a class that can handle the actual pseudo
1253 inside any subreg. For example, on the 386, QImode regs
1254 can appear within SImode subregs. Although GENERAL_REGS
1255 can handle SImode, QImode needs a smaller class. */
1256 #ifdef LIMIT_RELOAD_CLASS
1258 class = LIMIT_RELOAD_CLASS (inmode
, class);
1259 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1260 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1263 class = LIMIT_RELOAD_CLASS (outmode
, class);
1264 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1265 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1268 /* Verify that this class is at least possible for the mode that
1270 if (this_insn_is_asm
)
1272 enum machine_mode mode
;
1273 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1277 if (mode
== VOIDmode
)
1279 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1284 outmode
= word_mode
;
1286 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1287 if (HARD_REGNO_MODE_OK (i
, mode
)
1288 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1290 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1293 for (j
= 1; j
< nregs
; j
++)
1294 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1299 if (i
== FIRST_PSEUDO_REGISTER
)
1301 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1306 /* Optional output reloads are always OK even if we have no register class,
1307 since the function of these reloads is only to have spill_reg_store etc.
1308 set, so that the storing insn can be deleted later. */
1309 if (class == NO_REGS
1310 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1313 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1317 /* See if we need a secondary reload register to move between CLASS
1318 and IN or CLASS and OUT. Get the icode and push any required reloads
1319 needed for each of them if so. */
1321 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1324 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1325 &secondary_in_icode
);
1328 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1329 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1330 secondary_out_reload
1331 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1332 type
, &secondary_out_icode
);
1335 /* We found no existing reload suitable for re-use.
1336 So add an additional reload. */
1338 #ifdef SECONDARY_MEMORY_NEEDED
1339 /* If a memory location is needed for the copy, make one. */
1340 if (in
!= 0 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == SUBREG
)
1341 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1342 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1344 get_secondary_mem (in
, inmode
, opnum
, type
);
1350 rld
[i
].class = class;
1351 rld
[i
].inmode
= inmode
;
1352 rld
[i
].outmode
= outmode
;
1354 rld
[i
].optional
= optional
;
1356 rld
[i
].nocombine
= 0;
1357 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1358 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1359 rld
[i
].opnum
= opnum
;
1360 rld
[i
].when_needed
= type
;
1361 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1362 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1363 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1364 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1365 rld
[i
].secondary_p
= 0;
1369 #ifdef SECONDARY_MEMORY_NEEDED
1370 if (out
!= 0 && (GET_CODE (out
) == REG
|| GET_CODE (out
) == SUBREG
)
1371 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1372 && SECONDARY_MEMORY_NEEDED (class,
1373 REGNO_REG_CLASS (reg_or_subregno (out
)),
1375 get_secondary_mem (out
, outmode
, opnum
, type
);
1380 /* We are reusing an existing reload,
1381 but we may have additional information for it.
1382 For example, we may now have both IN and OUT
1383 while the old one may have just one of them. */
1385 /* The modes can be different. If they are, we want to reload in
1386 the larger mode, so that the value is valid for both modes. */
1387 if (inmode
!= VOIDmode
1388 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1389 rld
[i
].inmode
= inmode
;
1390 if (outmode
!= VOIDmode
1391 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1392 rld
[i
].outmode
= outmode
;
1395 rtx in_reg
= inloc
? *inloc
: 0;
1396 /* If we merge reloads for two distinct rtl expressions that
1397 are identical in content, there might be duplicate address
1398 reloads. Remove the extra set now, so that if we later find
1399 that we can inherit this reload, we can get rid of the
1400 address reloads altogether.
1402 Do not do this if both reloads are optional since the result
1403 would be an optional reload which could potentially leave
1404 unresolved address replacements.
1406 It is not sufficient to call transfer_replacements since
1407 choose_reload_regs will remove the replacements for address
1408 reloads of inherited reloads which results in the same
1410 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1411 && ! (rld
[i
].optional
&& optional
))
1413 /* We must keep the address reload with the lower operand
1415 if (opnum
> rld
[i
].opnum
)
1417 remove_address_replacements (in
);
1419 in_reg
= rld
[i
].in_reg
;
1422 remove_address_replacements (rld
[i
].in
);
1425 rld
[i
].in_reg
= in_reg
;
1430 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1432 if (reg_class_subset_p (class, rld
[i
].class))
1433 rld
[i
].class = class;
1434 rld
[i
].optional
&= optional
;
1435 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1436 opnum
, rld
[i
].opnum
))
1437 rld
[i
].when_needed
= RELOAD_OTHER
;
1438 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1441 /* If the ostensible rtx being reloaded differs from the rtx found
1442 in the location to substitute, this reload is not safe to combine
1443 because we cannot reliably tell whether it appears in the insn. */
1445 if (in
!= 0 && in
!= *inloc
)
1446 rld
[i
].nocombine
= 1;
1449 /* This was replaced by changes in find_reloads_address_1 and the new
1450 function inc_for_reload, which go with a new meaning of reload_inc. */
1452 /* If this is an IN/OUT reload in an insn that sets the CC,
1453 it must be for an autoincrement. It doesn't work to store
1454 the incremented value after the insn because that would clobber the CC.
1455 So we must do the increment of the value reloaded from,
1456 increment it, store it back, then decrement again. */
1457 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1461 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1462 /* If we did not find a nonzero amount-to-increment-by,
1463 that contradicts the belief that IN is being incremented
1464 in an address in this insn. */
1465 if (rld
[i
].inc
== 0)
1470 /* If we will replace IN and OUT with the reload-reg,
1471 record where they are located so that substitution need
1472 not do a tree walk. */
1474 if (replace_reloads
)
1478 struct replacement
*r
= &replacements
[n_replacements
++];
1480 r
->subreg_loc
= in_subreg_loc
;
1484 if (outloc
!= 0 && outloc
!= inloc
)
1486 struct replacement
*r
= &replacements
[n_replacements
++];
1489 r
->subreg_loc
= out_subreg_loc
;
1494 /* If this reload is just being introduced and it has both
1495 an incoming quantity and an outgoing quantity that are
1496 supposed to be made to match, see if either one of the two
1497 can serve as the place to reload into.
1499 If one of them is acceptable, set rld[i].reg_rtx
1502 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1504 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1507 earlyclobber_operand_p (out
));
1509 /* If the outgoing register already contains the same value
1510 as the incoming one, we can dispense with loading it.
1511 The easiest way to tell the caller that is to give a phony
1512 value for the incoming operand (same as outgoing one). */
1513 if (rld
[i
].reg_rtx
== out
1514 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1515 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1516 static_reload_reg_p
, i
, inmode
))
1520 /* If this is an input reload and the operand contains a register that
1521 dies in this insn and is used nowhere else, see if it is the right class
1522 to be used for this reload. Use it if so. (This occurs most commonly
1523 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1524 this if it is also an output reload that mentions the register unless
1525 the output is a SUBREG that clobbers an entire register.
1527 Note that the operand might be one of the spill regs, if it is a
1528 pseudo reg and we are in a block where spilling has not taken place.
1529 But if there is no spilling in this block, that is OK.
1530 An explicitly used hard reg cannot be a spill reg. */
1532 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1536 enum machine_mode rel_mode
= inmode
;
1538 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1541 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1542 if (REG_NOTE_KIND (note
) == REG_DEAD
1543 && GET_CODE (XEXP (note
, 0)) == REG
1544 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1545 && reg_mentioned_p (XEXP (note
, 0), in
)
1546 && ! refers_to_regno_for_reload_p (regno
,
1548 + HARD_REGNO_NREGS (regno
,
1550 PATTERN (this_insn
), inloc
)
1551 /* If this is also an output reload, IN cannot be used as
1552 the reload register if it is set in this insn unless IN
1554 && (out
== 0 || in
== out
1555 || ! hard_reg_set_here_p (regno
,
1557 + HARD_REGNO_NREGS (regno
,
1559 PATTERN (this_insn
)))
1560 /* ??? Why is this code so different from the previous?
1561 Is there any simple coherent way to describe the two together?
1562 What's going on here. */
1564 || (GET_CODE (in
) == SUBREG
1565 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1567 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1568 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1569 /* Make sure the operand fits in the reg that dies. */
1570 && (GET_MODE_SIZE (rel_mode
)
1571 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1572 && HARD_REGNO_MODE_OK (regno
, inmode
)
1573 && HARD_REGNO_MODE_OK (regno
, outmode
))
1576 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1577 HARD_REGNO_NREGS (regno
, outmode
));
1579 for (offs
= 0; offs
< nregs
; offs
++)
1580 if (fixed_regs
[regno
+ offs
]
1581 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1586 && (! (refers_to_regno_for_reload_p
1587 (regno
, (regno
+ HARD_REGNO_NREGS (regno
, inmode
)),
1589 || can_reload_into (in
, regno
, inmode
)))
1591 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1598 output_reloadnum
= i
;
1603 /* Record an additional place we must replace a value
1604 for which we have already recorded a reload.
1605 RELOADNUM is the value returned by push_reload
1606 when the reload was recorded.
1607 This is used in insn patterns that use match_dup. */
1610 push_replacement (loc
, reloadnum
, mode
)
1613 enum machine_mode mode
;
1615 if (replace_reloads
)
1617 struct replacement
*r
= &replacements
[n_replacements
++];
1618 r
->what
= reloadnum
;
1625 /* Duplicate any replacement we have recorded to apply at
1626 location ORIG_LOC to also be performed at DUP_LOC.
1627 This is used in insn patterns that use match_dup. */
1630 dup_replacements (dup_loc
, orig_loc
)
1634 int i
, n
= n_replacements
;
1636 for (i
= 0; i
< n
; i
++)
1638 struct replacement
*r
= &replacements
[i
];
1639 if (r
->where
== orig_loc
)
1640 push_replacement (dup_loc
, r
->what
, r
->mode
);
1644 /* Transfer all replacements that used to be in reload FROM to be in
1648 transfer_replacements (to
, from
)
1653 for (i
= 0; i
< n_replacements
; i
++)
1654 if (replacements
[i
].what
== from
)
1655 replacements
[i
].what
= to
;
1658 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1659 or a subpart of it. If we have any replacements registered for IN_RTX,
1660 cancel the reloads that were supposed to load them.
1661 Return nonzero if we canceled any reloads. */
1663 remove_address_replacements (in_rtx
)
1667 char reload_flags
[MAX_RELOADS
];
1668 int something_changed
= 0;
1670 memset (reload_flags
, 0, sizeof reload_flags
);
1671 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1673 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1674 reload_flags
[replacements
[i
].what
] |= 1;
1677 replacements
[j
++] = replacements
[i
];
1678 reload_flags
[replacements
[i
].what
] |= 2;
1681 /* Note that the following store must be done before the recursive calls. */
1684 for (i
= n_reloads
- 1; i
>= 0; i
--)
1686 if (reload_flags
[i
] == 1)
1688 deallocate_reload_reg (i
);
1689 remove_address_replacements (rld
[i
].in
);
1691 something_changed
= 1;
1694 return something_changed
;
1697 /* If there is only one output reload, and it is not for an earlyclobber
1698 operand, try to combine it with a (logically unrelated) input reload
1699 to reduce the number of reload registers needed.
1701 This is safe if the input reload does not appear in
1702 the value being output-reloaded, because this implies
1703 it is not needed any more once the original insn completes.
1705 If that doesn't work, see we can use any of the registers that
1706 die in this insn as a reload register. We can if it is of the right
1707 class and does not appear in the value being output-reloaded. */
1713 int output_reload
= -1;
1714 int secondary_out
= -1;
1717 /* Find the output reload; return unless there is exactly one
1718 and that one is mandatory. */
1720 for (i
= 0; i
< n_reloads
; i
++)
1721 if (rld
[i
].out
!= 0)
1723 if (output_reload
>= 0)
1728 if (output_reload
< 0 || rld
[output_reload
].optional
)
1731 /* An input-output reload isn't combinable. */
1733 if (rld
[output_reload
].in
!= 0)
1736 /* If this reload is for an earlyclobber operand, we can't do anything. */
1737 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1740 /* If there is a reload for part of the address of this operand, we would
1741 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1742 its life to the point where doing this combine would not lower the
1743 number of spill registers needed. */
1744 for (i
= 0; i
< n_reloads
; i
++)
1745 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1746 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1747 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1750 /* Check each input reload; can we combine it? */
1752 for (i
= 0; i
< n_reloads
; i
++)
1753 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1754 /* Life span of this reload must not extend past main insn. */
1755 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1756 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1757 && rld
[i
].when_needed
!= RELOAD_OTHER
1758 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1759 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1760 rld
[output_reload
].outmode
))
1762 && rld
[i
].reg_rtx
== 0
1763 #ifdef SECONDARY_MEMORY_NEEDED
1764 /* Don't combine two reloads with different secondary
1765 memory locations. */
1766 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1767 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1768 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1769 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1771 && (SMALL_REGISTER_CLASSES
1772 ? (rld
[i
].class == rld
[output_reload
].class)
1773 : (reg_class_subset_p (rld
[i
].class,
1774 rld
[output_reload
].class)
1775 || reg_class_subset_p (rld
[output_reload
].class,
1777 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1778 /* Args reversed because the first arg seems to be
1779 the one that we imagine being modified
1780 while the second is the one that might be affected. */
1781 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1783 /* However, if the input is a register that appears inside
1784 the output, then we also can't share.
1785 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1786 If the same reload reg is used for both reg 69 and the
1787 result to be stored in memory, then that result
1788 will clobber the address of the memory ref. */
1789 && ! (GET_CODE (rld
[i
].in
) == REG
1790 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1791 rld
[output_reload
].out
))))
1792 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1793 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1794 && (reg_class_size
[(int) rld
[i
].class]
1795 || SMALL_REGISTER_CLASSES
)
1796 /* We will allow making things slightly worse by combining an
1797 input and an output, but no worse than that. */
1798 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1799 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1803 /* We have found a reload to combine with! */
1804 rld
[i
].out
= rld
[output_reload
].out
;
1805 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1806 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1807 /* Mark the old output reload as inoperative. */
1808 rld
[output_reload
].out
= 0;
1809 /* The combined reload is needed for the entire insn. */
1810 rld
[i
].when_needed
= RELOAD_OTHER
;
1811 /* If the output reload had a secondary reload, copy it. */
1812 if (rld
[output_reload
].secondary_out_reload
!= -1)
1814 rld
[i
].secondary_out_reload
1815 = rld
[output_reload
].secondary_out_reload
;
1816 rld
[i
].secondary_out_icode
1817 = rld
[output_reload
].secondary_out_icode
;
1820 #ifdef SECONDARY_MEMORY_NEEDED
1821 /* Copy any secondary MEM. */
1822 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1823 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1824 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1826 /* If required, minimize the register class. */
1827 if (reg_class_subset_p (rld
[output_reload
].class,
1829 rld
[i
].class = rld
[output_reload
].class;
1831 /* Transfer all replacements from the old reload to the combined. */
1832 for (j
= 0; j
< n_replacements
; j
++)
1833 if (replacements
[j
].what
== output_reload
)
1834 replacements
[j
].what
= i
;
1839 /* If this insn has only one operand that is modified or written (assumed
1840 to be the first), it must be the one corresponding to this reload. It
1841 is safe to use anything that dies in this insn for that output provided
1842 that it does not occur in the output (we already know it isn't an
1843 earlyclobber. If this is an asm insn, give up. */
1845 if (INSN_CODE (this_insn
) == -1)
1848 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1849 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1850 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1853 /* See if some hard register that dies in this insn and is not used in
1854 the output is the right class. Only works if the register we pick
1855 up can fully hold our output reload. */
1856 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1857 if (REG_NOTE_KIND (note
) == REG_DEAD
1858 && GET_CODE (XEXP (note
, 0)) == REG
1859 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1860 rld
[output_reload
].out
)
1861 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1862 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1863 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1864 REGNO (XEXP (note
, 0)))
1865 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1866 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1867 /* Ensure that a secondary or tertiary reload for this output
1868 won't want this register. */
1869 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1870 || (! (TEST_HARD_REG_BIT
1871 (reg_class_contents
[(int) rld
[secondary_out
].class],
1872 REGNO (XEXP (note
, 0))))
1873 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1874 || ! (TEST_HARD_REG_BIT
1875 (reg_class_contents
[(int) rld
[secondary_out
].class],
1876 REGNO (XEXP (note
, 0)))))))
1877 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1879 rld
[output_reload
].reg_rtx
1880 = gen_rtx_REG (rld
[output_reload
].outmode
,
1881 REGNO (XEXP (note
, 0)));
1886 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1887 See if one of IN and OUT is a register that may be used;
1888 this is desirable since a spill-register won't be needed.
1889 If so, return the register rtx that proves acceptable.
1891 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1892 CLASS is the register class required for the reload.
1894 If FOR_REAL is >= 0, it is the number of the reload,
1895 and in some cases when it can be discovered that OUT doesn't need
1896 to be computed, clear out rld[FOR_REAL].out.
1898 If FOR_REAL is -1, this should not be done, because this call
1899 is just to see if a register can be found, not to find and install it.
1901 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1902 puts an additional constraint on being able to use IN for OUT since
1903 IN must not appear elsewhere in the insn (it is assumed that IN itself
1904 is safe from the earlyclobber). */
1907 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1908 inmode
, outmode
, class, for_real
, earlyclobber
)
1909 rtx real_in
, real_out
;
1910 rtx
*inloc
, *outloc
;
1911 enum machine_mode inmode
, outmode
;
1912 enum reg_class
class;
1922 /* If operands exceed a word, we can't use either of them
1923 unless they have the same size. */
1924 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1925 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1926 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1929 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1930 respectively refers to a hard register. */
1932 /* Find the inside of any subregs. */
1933 while (GET_CODE (out
) == SUBREG
)
1935 if (GET_CODE (SUBREG_REG (out
)) == REG
1936 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1937 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1938 GET_MODE (SUBREG_REG (out
)),
1941 out
= SUBREG_REG (out
);
1943 while (GET_CODE (in
) == SUBREG
)
1945 if (GET_CODE (SUBREG_REG (in
)) == REG
1946 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1947 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1948 GET_MODE (SUBREG_REG (in
)),
1951 in
= SUBREG_REG (in
);
1954 /* Narrow down the reg class, the same way push_reload will;
1955 otherwise we might find a dummy now, but push_reload won't. */
1956 class = PREFERRED_RELOAD_CLASS (in
, class);
1958 /* See if OUT will do. */
1959 if (GET_CODE (out
) == REG
1960 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1962 unsigned int regno
= REGNO (out
) + out_offset
;
1963 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1966 /* When we consider whether the insn uses OUT,
1967 ignore references within IN. They don't prevent us
1968 from copying IN into OUT, because those refs would
1969 move into the insn that reloads IN.
1971 However, we only ignore IN in its role as this reload.
1972 If the insn uses IN elsewhere and it contains OUT,
1973 that counts. We can't be sure it's the "same" operand
1974 so it might not go through this reload. */
1976 *inloc
= const0_rtx
;
1978 if (regno
< FIRST_PSEUDO_REGISTER
1979 && HARD_REGNO_MODE_OK (regno
, outmode
)
1980 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1981 PATTERN (this_insn
), outloc
))
1985 for (i
= 0; i
< nwords
; i
++)
1986 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1992 if (GET_CODE (real_out
) == REG
)
1995 value
= gen_rtx_REG (outmode
, regno
);
2002 /* Consider using IN if OUT was not acceptable
2003 or if OUT dies in this insn (like the quotient in a divmod insn).
2004 We can't use IN unless it is dies in this insn,
2005 which means we must know accurately which hard regs are live.
2006 Also, the result can't go in IN if IN is used within OUT,
2007 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2008 if (hard_regs_live_known
2009 && GET_CODE (in
) == REG
2010 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2012 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2013 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2014 && !fixed_regs
[REGNO (in
)]
2015 && HARD_REGNO_MODE_OK (REGNO (in
),
2016 /* The only case where out and real_out might
2017 have different modes is where real_out
2018 is a subreg, and in that case, out
2020 (GET_MODE (out
) != VOIDmode
2021 ? GET_MODE (out
) : outmode
)))
2023 unsigned int regno
= REGNO (in
) + in_offset
;
2024 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
2026 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2027 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2028 PATTERN (this_insn
))
2030 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2031 PATTERN (this_insn
), inloc
)))
2035 for (i
= 0; i
< nwords
; i
++)
2036 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2042 /* If we were going to use OUT as the reload reg
2043 and changed our mind, it means OUT is a dummy that
2044 dies here. So don't bother copying value to it. */
2045 if (for_real
>= 0 && value
== real_out
)
2046 rld
[for_real
].out
= 0;
2047 if (GET_CODE (real_in
) == REG
)
2050 value
= gen_rtx_REG (inmode
, regno
);
2058 /* This page contains subroutines used mainly for determining
2059 whether the IN or an OUT of a reload can serve as the
2062 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2065 earlyclobber_operand_p (x
)
2070 for (i
= 0; i
< n_earlyclobbers
; i
++)
2071 if (reload_earlyclobbers
[i
] == x
)
2077 /* Return 1 if expression X alters a hard reg in the range
2078 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2079 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2080 X should be the body of an instruction. */
2083 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
2084 unsigned int beg_regno
, end_regno
;
2087 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2089 rtx op0
= SET_DEST (x
);
2091 while (GET_CODE (op0
) == SUBREG
)
2092 op0
= SUBREG_REG (op0
);
2093 if (GET_CODE (op0
) == REG
)
2095 unsigned int r
= REGNO (op0
);
2097 /* See if this reg overlaps range under consideration. */
2099 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
2103 else if (GET_CODE (x
) == PARALLEL
)
2105 int i
= XVECLEN (x
, 0) - 1;
2108 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2115 /* Return 1 if ADDR is a valid memory address for mode MODE,
2116 and check that each pseudo reg has the proper kind of
2120 strict_memory_address_p (mode
, addr
)
2121 enum machine_mode mode ATTRIBUTE_UNUSED
;
2124 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2131 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2132 if they are the same hard reg, and has special hacks for
2133 autoincrement and autodecrement.
2134 This is specifically intended for find_reloads to use
2135 in determining whether two operands match.
2136 X is the operand whose number is the lower of the two.
2138 The value is 2 if Y contains a pre-increment that matches
2139 a non-incrementing address in X. */
2141 /* ??? To be completely correct, we should arrange to pass
2142 for X the output operand and for Y the input operand.
2143 For now, we assume that the output operand has the lower number
2144 because that is natural in (SET output (... input ...)). */
2147 operands_match_p (x
, y
)
2151 RTX_CODE code
= GET_CODE (x
);
2157 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2158 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2159 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2165 i
= REGNO (SUBREG_REG (x
));
2166 if (i
>= FIRST_PSEUDO_REGISTER
)
2168 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2169 GET_MODE (SUBREG_REG (x
)),
2176 if (GET_CODE (y
) == SUBREG
)
2178 j
= REGNO (SUBREG_REG (y
));
2179 if (j
>= FIRST_PSEUDO_REGISTER
)
2181 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2182 GET_MODE (SUBREG_REG (y
)),
2189 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2190 multiple hard register group, so that for example (reg:DI 0) and
2191 (reg:SI 1) will be considered the same register. */
2192 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2193 && i
< FIRST_PSEUDO_REGISTER
)
2194 i
+= HARD_REGNO_NREGS (i
, GET_MODE (x
)) - 1;
2195 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2196 && j
< FIRST_PSEUDO_REGISTER
)
2197 j
+= HARD_REGNO_NREGS (j
, GET_MODE (y
)) - 1;
2201 /* If two operands must match, because they are really a single
2202 operand of an assembler insn, then two postincrements are invalid
2203 because the assembler insn would increment only once.
2204 On the other hand, a postincrement matches ordinary indexing
2205 if the postincrement is the output operand. */
2206 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2207 return operands_match_p (XEXP (x
, 0), y
);
2208 /* Two preincrements are invalid
2209 because the assembler insn would increment only once.
2210 On the other hand, a preincrement matches ordinary indexing
2211 if the preincrement is the input operand.
2212 In this case, return 2, since some callers need to do special
2213 things when this happens. */
2214 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2215 || GET_CODE (y
) == PRE_MODIFY
)
2216 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2220 /* Now we have disposed of all the cases
2221 in which different rtx codes can match. */
2222 if (code
!= GET_CODE (y
))
2224 if (code
== LABEL_REF
)
2225 return XEXP (x
, 0) == XEXP (y
, 0);
2226 if (code
== SYMBOL_REF
)
2227 return XSTR (x
, 0) == XSTR (y
, 0);
2229 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2231 if (GET_MODE (x
) != GET_MODE (y
))
2234 /* Compare the elements. If any pair of corresponding elements
2235 fail to match, return 0 for the whole things. */
2238 fmt
= GET_RTX_FORMAT (code
);
2239 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2245 if (XWINT (x
, i
) != XWINT (y
, i
))
2250 if (XINT (x
, i
) != XINT (y
, i
))
2255 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2258 /* If any subexpression returns 2,
2259 we should return 2 if we are successful. */
2268 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2270 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2272 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2280 /* It is believed that rtx's at this level will never
2281 contain anything but integers and other rtx's,
2282 except for within LABEL_REFs and SYMBOL_REFs. */
2287 return 1 + success_2
;
2290 /* Describe the range of registers or memory referenced by X.
2291 If X is a register, set REG_FLAG and put the first register
2292 number into START and the last plus one into END.
2293 If X is a memory reference, put a base address into BASE
2294 and a range of integer offsets into START and END.
2295 If X is pushing on the stack, we can assume it causes no trouble,
2296 so we set the SAFE field. */
2298 static struct decomposition
2302 struct decomposition val
;
2308 if (GET_CODE (x
) == MEM
)
2310 rtx base
= NULL_RTX
, offset
= 0;
2311 rtx addr
= XEXP (x
, 0);
2313 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2314 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2316 val
.base
= XEXP (addr
, 0);
2317 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2318 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2319 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2323 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2325 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2326 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2327 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2329 val
.base
= XEXP (addr
, 0);
2330 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2331 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2332 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2337 if (GET_CODE (addr
) == CONST
)
2339 addr
= XEXP (addr
, 0);
2342 if (GET_CODE (addr
) == PLUS
)
2344 if (CONSTANT_P (XEXP (addr
, 0)))
2346 base
= XEXP (addr
, 1);
2347 offset
= XEXP (addr
, 0);
2349 else if (CONSTANT_P (XEXP (addr
, 1)))
2351 base
= XEXP (addr
, 0);
2352 offset
= XEXP (addr
, 1);
2359 offset
= const0_rtx
;
2361 if (GET_CODE (offset
) == CONST
)
2362 offset
= XEXP (offset
, 0);
2363 if (GET_CODE (offset
) == PLUS
)
2365 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2367 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2368 offset
= XEXP (offset
, 0);
2370 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2372 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2373 offset
= XEXP (offset
, 1);
2377 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2378 offset
= const0_rtx
;
2381 else if (GET_CODE (offset
) != CONST_INT
)
2383 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2384 offset
= const0_rtx
;
2387 if (all_const
&& GET_CODE (base
) == PLUS
)
2388 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2390 if (GET_CODE (offset
) != CONST_INT
)
2393 val
.start
= INTVAL (offset
);
2394 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2398 else if (GET_CODE (x
) == REG
)
2401 val
.start
= true_regnum (x
);
2404 /* A pseudo with no hard reg. */
2405 val
.start
= REGNO (x
);
2406 val
.end
= val
.start
+ 1;
2410 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2412 else if (GET_CODE (x
) == SUBREG
)
2414 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2415 /* This could be more precise, but it's good enough. */
2416 return decompose (SUBREG_REG (x
));
2418 val
.start
= true_regnum (x
);
2420 return decompose (SUBREG_REG (x
));
2423 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2425 else if (CONSTANT_P (x
)
2426 /* This hasn't been assigned yet, so it can't conflict yet. */
2427 || GET_CODE (x
) == SCRATCH
)
2434 /* Return 1 if altering Y will not modify the value of X.
2435 Y is also described by YDATA, which should be decompose (Y). */
2438 immune_p (x
, y
, ydata
)
2440 struct decomposition ydata
;
2442 struct decomposition xdata
;
2445 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2449 if (GET_CODE (y
) != MEM
)
2451 /* If Y is memory and X is not, Y can't affect X. */
2452 if (GET_CODE (x
) != MEM
)
2455 xdata
= decompose (x
);
2457 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2459 /* If bases are distinct symbolic constants, there is no overlap. */
2460 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2462 /* Constants and stack slots never overlap. */
2463 if (CONSTANT_P (xdata
.base
)
2464 && (ydata
.base
== frame_pointer_rtx
2465 || ydata
.base
== hard_frame_pointer_rtx
2466 || ydata
.base
== stack_pointer_rtx
))
2468 if (CONSTANT_P (ydata
.base
)
2469 && (xdata
.base
== frame_pointer_rtx
2470 || xdata
.base
== hard_frame_pointer_rtx
2471 || xdata
.base
== stack_pointer_rtx
))
2473 /* If either base is variable, we don't know anything. */
2477 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2480 /* Similar, but calls decompose. */
2483 safe_from_earlyclobber (op
, clobber
)
2486 struct decomposition early_data
;
2488 early_data
= decompose (clobber
);
2489 return immune_p (op
, clobber
, early_data
);
2492 /* Main entry point of this file: search the body of INSN
2493 for values that need reloading and record them with push_reload.
2494 REPLACE nonzero means record also where the values occur
2495 so that subst_reloads can be used.
2497 IND_LEVELS says how many levels of indirection are supported by this
2498 machine; a value of zero means that a memory reference is not a valid
2501 LIVE_KNOWN says we have valid information about which hard
2502 regs are live at each point in the program; this is true when
2503 we are called from global_alloc but false when stupid register
2504 allocation has been done.
2506 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2507 which is nonnegative if the reg has been commandeered for reloading into.
2508 It is copied into STATIC_RELOAD_REG_P and referenced from there
2509 by various subroutines.
2511 Return TRUE if some operands need to be changed, because of swapping
2512 commutative operands, reg_equiv_address substitution, or whatever. */
2515 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2517 int replace
, ind_levels
;
2519 short *reload_reg_p
;
2521 int insn_code_number
;
2524 /* These start out as the constraints for the insn
2525 and they are chewed up as we consider alternatives. */
2526 char *constraints
[MAX_RECOG_OPERANDS
];
2527 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2529 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2530 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2531 /* Nonzero for a MEM operand whose entire address needs a reload. */
2532 int address_reloaded
[MAX_RECOG_OPERANDS
];
2533 /* Nonzero for an address operand that needs to be completely reloaded. */
2534 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2535 /* Value of enum reload_type to use for operand. */
2536 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2537 /* Value of enum reload_type to use within address of operand. */
2538 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2539 /* Save the usage of each operand. */
2540 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2541 int no_input_reloads
= 0, no_output_reloads
= 0;
2543 int this_alternative
[MAX_RECOG_OPERANDS
];
2544 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2545 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2546 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2547 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2548 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2550 int goal_alternative
[MAX_RECOG_OPERANDS
];
2551 int this_alternative_number
;
2552 int goal_alternative_number
= 0;
2553 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2554 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2555 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2556 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2557 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2558 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2559 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2560 int goal_alternative_swapped
;
2563 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2564 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2565 rtx body
= PATTERN (insn
);
2566 rtx set
= single_set (insn
);
2567 int goal_earlyclobber
= 0, this_earlyclobber
;
2568 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2574 n_earlyclobbers
= 0;
2575 replace_reloads
= replace
;
2576 hard_regs_live_known
= live_known
;
2577 static_reload_reg_p
= reload_reg_p
;
2579 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2580 neither are insns that SET cc0. Insns that use CC0 are not allowed
2581 to have any input reloads. */
2582 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2583 no_output_reloads
= 1;
2586 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2587 no_input_reloads
= 1;
2588 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2589 no_output_reloads
= 1;
2592 #ifdef SECONDARY_MEMORY_NEEDED
2593 /* The eliminated forms of any secondary memory locations are per-insn, so
2594 clear them out here. */
2596 memset ((char *) secondary_memlocs_elim
, 0, sizeof secondary_memlocs_elim
);
2599 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2600 is cheap to move between them. If it is not, there may not be an insn
2601 to do the copy, so we may need a reload. */
2602 if (GET_CODE (body
) == SET
2603 && GET_CODE (SET_DEST (body
)) == REG
2604 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2605 && GET_CODE (SET_SRC (body
)) == REG
2606 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2607 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2608 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2609 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2612 extract_insn (insn
);
2614 noperands
= reload_n_operands
= recog_data
.n_operands
;
2615 n_alternatives
= recog_data
.n_alternatives
;
2617 /* Just return "no reloads" if insn has no operands with constraints. */
2618 if (noperands
== 0 || n_alternatives
== 0)
2621 insn_code_number
= INSN_CODE (insn
);
2622 this_insn_is_asm
= insn_code_number
< 0;
2624 memcpy (operand_mode
, recog_data
.operand_mode
,
2625 noperands
* sizeof (enum machine_mode
));
2626 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2630 /* If we will need to know, later, whether some pair of operands
2631 are the same, we must compare them now and save the result.
2632 Reloading the base and index registers will clobber them
2633 and afterward they will fail to match. */
2635 for (i
= 0; i
< noperands
; i
++)
2640 substed_operand
[i
] = recog_data
.operand
[i
];
2643 modified
[i
] = RELOAD_READ
;
2645 /* Scan this operand's constraint to see if it is an output operand,
2646 an in-out operand, is commutative, or should match another. */
2650 p
+= CONSTRAINT_LEN (c
, p
);
2652 modified
[i
] = RELOAD_WRITE
;
2654 modified
[i
] = RELOAD_READ_WRITE
;
2657 /* The last operand should not be marked commutative. */
2658 if (i
== noperands
- 1)
2663 else if (ISDIGIT (c
))
2665 c
= strtoul (p
- 1, &p
, 10);
2667 operands_match
[c
][i
]
2668 = operands_match_p (recog_data
.operand
[c
],
2669 recog_data
.operand
[i
]);
2671 /* An operand may not match itself. */
2675 /* If C can be commuted with C+1, and C might need to match I,
2676 then C+1 might also need to match I. */
2677 if (commutative
>= 0)
2679 if (c
== commutative
|| c
== commutative
+ 1)
2681 int other
= c
+ (c
== commutative
? 1 : -1);
2682 operands_match
[other
][i
]
2683 = operands_match_p (recog_data
.operand
[other
],
2684 recog_data
.operand
[i
]);
2686 if (i
== commutative
|| i
== commutative
+ 1)
2688 int other
= i
+ (i
== commutative
? 1 : -1);
2689 operands_match
[c
][other
]
2690 = operands_match_p (recog_data
.operand
[c
],
2691 recog_data
.operand
[other
]);
2693 /* Note that C is supposed to be less than I.
2694 No need to consider altering both C and I because in
2695 that case we would alter one into the other. */
2701 /* Examine each operand that is a memory reference or memory address
2702 and reload parts of the addresses into index registers.
2703 Also here any references to pseudo regs that didn't get hard regs
2704 but are equivalent to constants get replaced in the insn itself
2705 with those constants. Nobody will ever see them again.
2707 Finally, set up the preferred classes of each operand. */
2709 for (i
= 0; i
< noperands
; i
++)
2711 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2713 address_reloaded
[i
] = 0;
2714 address_operand_reloaded
[i
] = 0;
2715 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2716 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2719 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2720 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2723 if (*constraints
[i
] == 0)
2724 /* Ignore things like match_operator operands. */
2726 else if (constraints
[i
][0] == 'p'
2727 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2729 address_operand_reloaded
[i
]
2730 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2731 recog_data
.operand
[i
],
2732 recog_data
.operand_loc
[i
],
2733 i
, operand_type
[i
], ind_levels
, insn
);
2735 /* If we now have a simple operand where we used to have a
2736 PLUS or MULT, re-recognize and try again. */
2737 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2738 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2739 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2740 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2742 INSN_CODE (insn
) = -1;
2743 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2748 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2749 substed_operand
[i
] = recog_data
.operand
[i
];
2751 /* Address operands are reloaded in their existing mode,
2752 no matter what is specified in the machine description. */
2753 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2755 else if (code
== MEM
)
2758 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2759 recog_data
.operand_loc
[i
],
2760 XEXP (recog_data
.operand
[i
], 0),
2761 &XEXP (recog_data
.operand
[i
], 0),
2762 i
, address_type
[i
], ind_levels
, insn
);
2763 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2764 substed_operand
[i
] = recog_data
.operand
[i
];
2766 else if (code
== SUBREG
)
2768 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2770 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2773 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2775 &address_reloaded
[i
]);
2777 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2778 that didn't get a hard register, emit a USE with a REG_EQUAL
2779 note in front so that we might inherit a previous, possibly
2783 && GET_CODE (op
) == MEM
2784 && GET_CODE (reg
) == REG
2785 && (GET_MODE_SIZE (GET_MODE (reg
))
2786 >= GET_MODE_SIZE (GET_MODE (op
))))
2787 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2789 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2791 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2793 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2794 /* We can get a PLUS as an "operand" as a result of register
2795 elimination. See eliminate_regs and gen_reload. We handle
2796 a unary operator by reloading the operand. */
2797 substed_operand
[i
] = recog_data
.operand
[i
]
2798 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2799 ind_levels
, 0, insn
,
2800 &address_reloaded
[i
]);
2801 else if (code
== REG
)
2803 /* This is equivalent to calling find_reloads_toplev.
2804 The code is duplicated for speed.
2805 When we find a pseudo always equivalent to a constant,
2806 we replace it by the constant. We must be sure, however,
2807 that we don't try to replace it in the insn in which it
2809 int regno
= REGNO (recog_data
.operand
[i
]);
2810 if (reg_equiv_constant
[regno
] != 0
2811 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2813 /* Record the existing mode so that the check if constants are
2814 allowed will work when operand_mode isn't specified. */
2816 if (operand_mode
[i
] == VOIDmode
)
2817 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2819 substed_operand
[i
] = recog_data
.operand
[i
]
2820 = reg_equiv_constant
[regno
];
2822 if (reg_equiv_memory_loc
[regno
] != 0
2823 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2824 /* We need not give a valid is_set_dest argument since the case
2825 of a constant equivalence was checked above. */
2826 substed_operand
[i
] = recog_data
.operand
[i
]
2827 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2828 ind_levels
, 0, insn
,
2829 &address_reloaded
[i
]);
2831 /* If the operand is still a register (we didn't replace it with an
2832 equivalent), get the preferred class to reload it into. */
2833 code
= GET_CODE (recog_data
.operand
[i
]);
2835 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2836 >= FIRST_PSEUDO_REGISTER
)
2837 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2841 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2842 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2845 /* If this is simply a copy from operand 1 to operand 0, merge the
2846 preferred classes for the operands. */
2847 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2848 && recog_data
.operand
[1] == SET_SRC (set
))
2850 preferred_class
[0] = preferred_class
[1]
2851 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2852 pref_or_nothing
[0] |= pref_or_nothing
[1];
2853 pref_or_nothing
[1] |= pref_or_nothing
[0];
2856 /* Now see what we need for pseudo-regs that didn't get hard regs
2857 or got the wrong kind of hard reg. For this, we must consider
2858 all the operands together against the register constraints. */
2860 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2863 goal_alternative_swapped
= 0;
2866 /* The constraints are made of several alternatives.
2867 Each operand's constraint looks like foo,bar,... with commas
2868 separating the alternatives. The first alternatives for all
2869 operands go together, the second alternatives go together, etc.
2871 First loop over alternatives. */
2873 for (this_alternative_number
= 0;
2874 this_alternative_number
< n_alternatives
;
2875 this_alternative_number
++)
2877 /* Loop over operands for one constraint alternative. */
2878 /* LOSERS counts those that don't fit this alternative
2879 and would require loading. */
2881 /* BAD is set to 1 if it some operand can't fit this alternative
2882 even after reloading. */
2884 /* REJECT is a count of how undesirable this alternative says it is
2885 if any reloading is required. If the alternative matches exactly
2886 then REJECT is ignored, but otherwise it gets this much
2887 counted against it in addition to the reloading needed. Each
2888 ? counts three times here since we want the disparaging caused by
2889 a bad register class to only count 1/3 as much. */
2892 this_earlyclobber
= 0;
2894 for (i
= 0; i
< noperands
; i
++)
2896 char *p
= constraints
[i
];
2901 /* 0 => this operand can be reloaded somehow for this alternative. */
2903 /* 0 => this operand can be reloaded if the alternative allows regs. */
2907 rtx operand
= recog_data
.operand
[i
];
2909 /* Nonzero means this is a MEM that must be reloaded into a reg
2910 regardless of what the constraint says. */
2911 int force_reload
= 0;
2913 /* Nonzero if a constant forced into memory would be OK for this
2916 int earlyclobber
= 0;
2918 /* If the predicate accepts a unary operator, it means that
2919 we need to reload the operand, but do not do this for
2920 match_operator and friends. */
2921 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2922 operand
= XEXP (operand
, 0);
2924 /* If the operand is a SUBREG, extract
2925 the REG or MEM (or maybe even a constant) within.
2926 (Constants can occur as a result of reg_equiv_constant.) */
2928 while (GET_CODE (operand
) == SUBREG
)
2930 /* Offset only matters when operand is a REG and
2931 it is a hard reg. This is because it is passed
2932 to reg_fits_class_p if it is a REG and all pseudos
2933 return 0 from that function. */
2934 if (GET_CODE (SUBREG_REG (operand
)) == REG
2935 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2937 if (!subreg_offset_representable_p
2938 (REGNO (SUBREG_REG (operand
)),
2939 GET_MODE (SUBREG_REG (operand
)),
2940 SUBREG_BYTE (operand
),
2941 GET_MODE (operand
)))
2943 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2944 GET_MODE (SUBREG_REG (operand
)),
2945 SUBREG_BYTE (operand
),
2946 GET_MODE (operand
));
2948 operand
= SUBREG_REG (operand
);
2949 /* Force reload if this is a constant or PLUS or if there may
2950 be a problem accessing OPERAND in the outer mode. */
2951 if (CONSTANT_P (operand
)
2952 || GET_CODE (operand
) == PLUS
2953 /* We must force a reload of paradoxical SUBREGs
2954 of a MEM because the alignment of the inner value
2955 may not be enough to do the outer reference. On
2956 big-endian machines, it may also reference outside
2959 On machines that extend byte operations and we have a
2960 SUBREG where both the inner and outer modes are no wider
2961 than a word and the inner mode is narrower, is integral,
2962 and gets extended when loaded from memory, combine.c has
2963 made assumptions about the behavior of the machine in such
2964 register access. If the data is, in fact, in memory we
2965 must always load using the size assumed to be in the
2966 register and let the insn do the different-sized
2969 This is doubly true if WORD_REGISTER_OPERATIONS. In
2970 this case eliminate_regs has left non-paradoxical
2971 subregs for push_reloads to see. Make sure it does
2972 by forcing the reload.
2974 ??? When is it right at this stage to have a subreg
2975 of a mem that is _not_ to be handled specially? IMO
2976 those should have been reduced to just a mem. */
2977 || ((GET_CODE (operand
) == MEM
2978 || (GET_CODE (operand
)== REG
2979 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2980 #ifndef WORD_REGISTER_OPERATIONS
2981 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2982 < BIGGEST_ALIGNMENT
)
2983 && (GET_MODE_SIZE (operand_mode
[i
])
2984 > GET_MODE_SIZE (GET_MODE (operand
))))
2985 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2986 #ifdef LOAD_EXTEND_OP
2987 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2988 && (GET_MODE_SIZE (GET_MODE (operand
))
2990 && (GET_MODE_SIZE (operand_mode
[i
])
2991 > GET_MODE_SIZE (GET_MODE (operand
)))
2992 && INTEGRAL_MODE_P (GET_MODE (operand
))
2993 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
3002 this_alternative
[i
] = (int) NO_REGS
;
3003 this_alternative_win
[i
] = 0;
3004 this_alternative_match_win
[i
] = 0;
3005 this_alternative_offmemok
[i
] = 0;
3006 this_alternative_earlyclobber
[i
] = 0;
3007 this_alternative_matches
[i
] = -1;
3009 /* An empty constraint or empty alternative
3010 allows anything which matched the pattern. */
3011 if (*p
== 0 || *p
== ',')
3014 /* Scan this alternative's specs for this operand;
3015 set WIN if the operand fits any letter in this alternative.
3016 Otherwise, clear BADOP if this operand could
3017 fit some letter after reloads,
3018 or set WINREG if this operand could fit after reloads
3019 provided the constraint allows some registers. */
3022 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3031 case '=': case '+': case '*':
3035 /* The last operand should not be marked commutative. */
3036 if (i
!= noperands
- 1)
3049 /* Ignore rest of this alternative as far as
3050 reloading is concerned. */
3053 while (*p
&& *p
!= ',');
3057 case '0': case '1': case '2': case '3': case '4':
3058 case '5': case '6': case '7': case '8': case '9':
3059 m
= strtoul (p
, &end
, 10);
3063 this_alternative_matches
[i
] = m
;
3064 /* We are supposed to match a previous operand.
3065 If we do, we win if that one did.
3066 If we do not, count both of the operands as losers.
3067 (This is too conservative, since most of the time
3068 only a single reload insn will be needed to make
3069 the two operands win. As a result, this alternative
3070 may be rejected when it is actually desirable.) */
3071 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3072 /* If we are matching as if two operands were swapped,
3073 also pretend that operands_match had been computed
3075 But if I is the second of those and C is the first,
3076 don't exchange them, because operands_match is valid
3077 only on one side of its diagonal. */
3079 [(m
== commutative
|| m
== commutative
+ 1)
3080 ? 2 * commutative
+ 1 - m
: m
]
3081 [(i
== commutative
|| i
== commutative
+ 1)
3082 ? 2 * commutative
+ 1 - i
: i
])
3083 : operands_match
[m
][i
])
3085 /* If we are matching a non-offsettable address where an
3086 offsettable address was expected, then we must reject
3087 this combination, because we can't reload it. */
3088 if (this_alternative_offmemok
[m
]
3089 && GET_CODE (recog_data
.operand
[m
]) == MEM
3090 && this_alternative
[m
] == (int) NO_REGS
3091 && ! this_alternative_win
[m
])
3094 did_match
= this_alternative_win
[m
];
3098 /* Operands don't match. */
3100 /* Retroactively mark the operand we had to match
3101 as a loser, if it wasn't already. */
3102 if (this_alternative_win
[m
])
3104 this_alternative_win
[m
] = 0;
3105 if (this_alternative
[m
] == (int) NO_REGS
)
3107 /* But count the pair only once in the total badness of
3108 this alternative, if the pair can be a dummy reload. */
3110 = find_dummy_reload (recog_data
.operand
[i
],
3111 recog_data
.operand
[m
],
3112 recog_data
.operand_loc
[i
],
3113 recog_data
.operand_loc
[m
],
3114 operand_mode
[i
], operand_mode
[m
],
3115 this_alternative
[m
], -1,
3116 this_alternative_earlyclobber
[m
]);
3121 /* This can be fixed with reloads if the operand
3122 we are supposed to match can be fixed with reloads. */
3124 this_alternative
[i
] = this_alternative
[m
];
3126 /* If we have to reload this operand and some previous
3127 operand also had to match the same thing as this
3128 operand, we don't know how to do that. So reject this
3130 if (! did_match
|| force_reload
)
3131 for (j
= 0; j
< i
; j
++)
3132 if (this_alternative_matches
[j
]
3133 == this_alternative_matches
[i
])
3138 /* All necessary reloads for an address_operand
3139 were handled in find_reloads_address. */
3140 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3148 if (GET_CODE (operand
) == MEM
3149 || (GET_CODE (operand
) == REG
3150 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3151 && reg_renumber
[REGNO (operand
)] < 0))
3153 if (CONSTANT_P (operand
)
3154 /* force_const_mem does not accept HIGH. */
3155 && GET_CODE (operand
) != HIGH
)
3161 if (GET_CODE (operand
) == MEM
3162 && ! address_reloaded
[i
]
3163 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3164 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3169 if (GET_CODE (operand
) == MEM
3170 && ! address_reloaded
[i
]
3171 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3172 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3176 /* Memory operand whose address is not offsettable. */
3180 if (GET_CODE (operand
) == MEM
3181 && ! (ind_levels
? offsettable_memref_p (operand
)
3182 : offsettable_nonstrict_memref_p (operand
))
3183 /* Certain mem addresses will become offsettable
3184 after they themselves are reloaded. This is important;
3185 we don't want our own handling of unoffsettables
3186 to override the handling of reg_equiv_address. */
3187 && !(GET_CODE (XEXP (operand
, 0)) == REG
3189 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3193 /* Memory operand whose address is offsettable. */
3197 if ((GET_CODE (operand
) == MEM
3198 /* If IND_LEVELS, find_reloads_address won't reload a
3199 pseudo that didn't get a hard reg, so we have to
3200 reject that case. */
3201 && ((ind_levels
? offsettable_memref_p (operand
)
3202 : offsettable_nonstrict_memref_p (operand
))
3203 /* A reloaded address is offsettable because it is now
3204 just a simple register indirect. */
3205 || address_reloaded
[i
]))
3206 || (GET_CODE (operand
) == REG
3207 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3208 && reg_renumber
[REGNO (operand
)] < 0
3209 /* If reg_equiv_address is nonzero, we will be
3210 loading it into a register; hence it will be
3211 offsettable, but we cannot say that reg_equiv_mem
3212 is offsettable without checking. */
3213 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3214 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3215 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3217 /* force_const_mem does not accept HIGH. */
3218 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3219 || GET_CODE (operand
) == MEM
)
3226 /* Output operand that is stored before the need for the
3227 input operands (and their index registers) is over. */
3228 earlyclobber
= 1, this_earlyclobber
= 1;
3233 if (GET_CODE (operand
) == CONST_DOUBLE
3234 || (GET_CODE (operand
) == CONST_VECTOR
3235 && (GET_MODE_CLASS (GET_MODE (operand
))
3236 == MODE_VECTOR_FLOAT
)))
3242 if (GET_CODE (operand
) == CONST_DOUBLE
3243 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3248 if (GET_CODE (operand
) == CONST_INT
3249 || (GET_CODE (operand
) == CONST_DOUBLE
3250 && GET_MODE (operand
) == VOIDmode
))
3253 if (CONSTANT_P (operand
)
3254 #ifdef LEGITIMATE_PIC_OPERAND_P
3255 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3262 if (GET_CODE (operand
) == CONST_INT
3263 || (GET_CODE (operand
) == CONST_DOUBLE
3264 && GET_MODE (operand
) == VOIDmode
))
3276 if (GET_CODE (operand
) == CONST_INT
3277 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3287 /* A PLUS is never a valid operand, but reload can make
3288 it from a register when eliminating registers. */
3289 && GET_CODE (operand
) != PLUS
3290 /* A SCRATCH is not a valid operand. */
3291 && GET_CODE (operand
) != SCRATCH
3292 #ifdef LEGITIMATE_PIC_OPERAND_P
3293 && (! CONSTANT_P (operand
)
3295 || LEGITIMATE_PIC_OPERAND_P (operand
))
3297 && (GENERAL_REGS
== ALL_REGS
3298 || GET_CODE (operand
) != REG
3299 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3300 && reg_renumber
[REGNO (operand
)] < 0)))
3302 /* Drop through into 'r' case. */
3306 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3310 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3312 #ifdef EXTRA_CONSTRAINT_STR
3313 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3317 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3319 /* If the address was already reloaded,
3321 if (GET_CODE (operand
) == MEM
&& address_reloaded
[i
])
3323 /* Likewise if the address will be reloaded because
3324 reg_equiv_address is nonzero. For reg_equiv_mem
3325 we have to check. */
3326 if (GET_CODE (operand
) == REG
3327 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3328 && reg_renumber
[REGNO (operand
)] < 0
3329 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3330 && EXTRA_CONSTRAINT_STR (reg_equiv_mem
[REGNO (operand
)], c
, p
))
3331 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3334 /* If we didn't already win, we can reload
3335 constants via force_const_mem, and other
3336 MEMs by reloading the address like for 'o'. */
3337 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3338 || GET_CODE (operand
) == MEM
)
3344 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3346 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3349 /* If we didn't already win, we can reload
3350 the address into a base register. */
3351 this_alternative
[i
] = (int) MODE_BASE_REG_CLASS (VOIDmode
);
3356 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3363 = (int) (reg_class_subunion
3364 [this_alternative
[i
]]
3365 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3367 if (GET_MODE (operand
) == BLKmode
)
3370 if (GET_CODE (operand
) == REG
3371 && reg_fits_class_p (operand
, this_alternative
[i
],
3372 offset
, GET_MODE (recog_data
.operand
[i
])))
3376 while ((p
+= len
), c
);
3380 /* If this operand could be handled with a reg,
3381 and some reg is allowed, then this operand can be handled. */
3382 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3385 /* Record which operands fit this alternative. */
3386 this_alternative_earlyclobber
[i
] = earlyclobber
;
3387 if (win
&& ! force_reload
)
3388 this_alternative_win
[i
] = 1;
3389 else if (did_match
&& ! force_reload
)
3390 this_alternative_match_win
[i
] = 1;
3393 int const_to_mem
= 0;
3395 this_alternative_offmemok
[i
] = offmemok
;
3399 /* Alternative loses if it has no regs for a reg operand. */
3400 if (GET_CODE (operand
) == REG
3401 && this_alternative
[i
] == (int) NO_REGS
3402 && this_alternative_matches
[i
] < 0)
3405 /* If this is a constant that is reloaded into the desired
3406 class by copying it to memory first, count that as another
3407 reload. This is consistent with other code and is
3408 required to avoid choosing another alternative when
3409 the constant is moved into memory by this function on
3410 an early reload pass. Note that the test here is
3411 precisely the same as in the code below that calls
3413 if (CONSTANT_P (operand
)
3414 /* force_const_mem does not accept HIGH. */
3415 && GET_CODE (operand
) != HIGH
3416 && ((PREFERRED_RELOAD_CLASS (operand
,
3417 (enum reg_class
) this_alternative
[i
])
3419 || no_input_reloads
)
3420 && operand_mode
[i
] != VOIDmode
)
3423 if (this_alternative
[i
] != (int) NO_REGS
)
3427 /* If we can't reload this value at all, reject this
3428 alternative. Note that we could also lose due to
3429 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3432 if (! CONSTANT_P (operand
)
3433 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3434 && (PREFERRED_RELOAD_CLASS (operand
,
3435 (enum reg_class
) this_alternative
[i
])
3439 /* Alternative loses if it requires a type of reload not
3440 permitted for this insn. We can always reload SCRATCH
3441 and objects with a REG_UNUSED note. */
3442 else if (GET_CODE (operand
) != SCRATCH
3443 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3444 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3446 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3450 /* We prefer to reload pseudos over reloading other things,
3451 since such reloads may be able to be eliminated later.
3452 If we are reloading a SCRATCH, we won't be generating any
3453 insns, just using a register, so it is also preferred.
3454 So bump REJECT in other cases. Don't do this in the
3455 case where we are forcing a constant into memory and
3456 it will then win since we don't want to have a different
3457 alternative match then. */
3458 if (! (GET_CODE (operand
) == REG
3459 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3460 && GET_CODE (operand
) != SCRATCH
3461 && ! (const_to_mem
&& constmemok
))
3464 /* Input reloads can be inherited more often than output
3465 reloads can be removed, so penalize output reloads. */
3466 if (operand_type
[i
] != RELOAD_FOR_INPUT
3467 && GET_CODE (operand
) != SCRATCH
)
3471 /* If this operand is a pseudo register that didn't get a hard
3472 reg and this alternative accepts some register, see if the
3473 class that we want is a subset of the preferred class for this
3474 register. If not, but it intersects that class, use the
3475 preferred class instead. If it does not intersect the preferred
3476 class, show that usage of this alternative should be discouraged;
3477 it will be discouraged more still if the register is `preferred
3478 or nothing'. We do this because it increases the chance of
3479 reusing our spill register in a later insn and avoiding a pair
3480 of memory stores and loads.
3482 Don't bother with this if this alternative will accept this
3485 Don't do this for a multiword operand, since it is only a
3486 small win and has the risk of requiring more spill registers,
3487 which could cause a large loss.
3489 Don't do this if the preferred class has only one register
3490 because we might otherwise exhaust the class. */
3492 if (! win
&& ! did_match
3493 && this_alternative
[i
] != (int) NO_REGS
3494 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3495 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3497 if (! reg_class_subset_p (this_alternative
[i
],
3498 preferred_class
[i
]))
3500 /* Since we don't have a way of forming the intersection,
3501 we just do something special if the preferred class
3502 is a subset of the class we have; that's the most
3503 common case anyway. */
3504 if (reg_class_subset_p (preferred_class
[i
],
3505 this_alternative
[i
]))
3506 this_alternative
[i
] = (int) preferred_class
[i
];
3508 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3513 /* Now see if any output operands that are marked "earlyclobber"
3514 in this alternative conflict with any input operands
3515 or any memory addresses. */
3517 for (i
= 0; i
< noperands
; i
++)
3518 if (this_alternative_earlyclobber
[i
]
3519 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3521 struct decomposition early_data
;
3523 early_data
= decompose (recog_data
.operand
[i
]);
3525 if (modified
[i
] == RELOAD_READ
)
3528 if (this_alternative
[i
] == NO_REGS
)
3530 this_alternative_earlyclobber
[i
] = 0;
3531 if (this_insn_is_asm
)
3532 error_for_asm (this_insn
,
3533 "`&' constraint used with no register class");
3538 for (j
= 0; j
< noperands
; j
++)
3539 /* Is this an input operand or a memory ref? */
3540 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3541 || modified
[j
] != RELOAD_WRITE
)
3543 /* Ignore things like match_operator operands. */
3544 && *recog_data
.constraints
[j
] != 0
3545 /* Don't count an input operand that is constrained to match
3546 the early clobber operand. */
3547 && ! (this_alternative_matches
[j
] == i
3548 && rtx_equal_p (recog_data
.operand
[i
],
3549 recog_data
.operand
[j
]))
3550 /* Is it altered by storing the earlyclobber operand? */
3551 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3554 /* If the output is in a single-reg class,
3555 it's costly to reload it, so reload the input instead. */
3556 if (reg_class_size
[this_alternative
[i
]] == 1
3557 && (GET_CODE (recog_data
.operand
[j
]) == REG
3558 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3561 this_alternative_win
[j
] = 0;
3562 this_alternative_match_win
[j
] = 0;
3567 /* If an earlyclobber operand conflicts with something,
3568 it must be reloaded, so request this and count the cost. */
3572 this_alternative_win
[i
] = 0;
3573 this_alternative_match_win
[j
] = 0;
3574 for (j
= 0; j
< noperands
; j
++)
3575 if (this_alternative_matches
[j
] == i
3576 && this_alternative_match_win
[j
])
3578 this_alternative_win
[j
] = 0;
3579 this_alternative_match_win
[j
] = 0;
3585 /* If one alternative accepts all the operands, no reload required,
3586 choose that alternative; don't consider the remaining ones. */
3589 /* Unswap these so that they are never swapped at `finish'. */
3590 if (commutative
>= 0)
3592 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3593 recog_data
.operand
[commutative
+ 1]
3594 = substed_operand
[commutative
+ 1];
3596 for (i
= 0; i
< noperands
; i
++)
3598 goal_alternative_win
[i
] = this_alternative_win
[i
];
3599 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3600 goal_alternative
[i
] = this_alternative
[i
];
3601 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3602 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3603 goal_alternative_earlyclobber
[i
]
3604 = this_alternative_earlyclobber
[i
];
3606 goal_alternative_number
= this_alternative_number
;
3607 goal_alternative_swapped
= swapped
;
3608 goal_earlyclobber
= this_earlyclobber
;
3612 /* REJECT, set by the ! and ? constraint characters and when a register
3613 would be reloaded into a non-preferred class, discourages the use of
3614 this alternative for a reload goal. REJECT is incremented by six
3615 for each ? and two for each non-preferred class. */
3616 losers
= losers
* 6 + reject
;
3618 /* If this alternative can be made to work by reloading,
3619 and it needs less reloading than the others checked so far,
3620 record it as the chosen goal for reloading. */
3621 if (! bad
&& best
> losers
)
3623 for (i
= 0; i
< noperands
; i
++)
3625 goal_alternative
[i
] = this_alternative
[i
];
3626 goal_alternative_win
[i
] = this_alternative_win
[i
];
3627 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3628 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3629 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3630 goal_alternative_earlyclobber
[i
]
3631 = this_alternative_earlyclobber
[i
];
3633 goal_alternative_swapped
= swapped
;
3635 goal_alternative_number
= this_alternative_number
;
3636 goal_earlyclobber
= this_earlyclobber
;
3640 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3641 then we need to try each alternative twice,
3642 the second time matching those two operands
3643 as if we had exchanged them.
3644 To do this, really exchange them in operands.
3646 If we have just tried the alternatives the second time,
3647 return operands to normal and drop through. */
3649 if (commutative
>= 0)
3654 enum reg_class tclass
;
3657 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3658 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3659 /* Swap the duplicates too. */
3660 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3661 if (recog_data
.dup_num
[i
] == commutative
3662 || recog_data
.dup_num
[i
] == commutative
+ 1)
3663 *recog_data
.dup_loc
[i
]
3664 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3666 tclass
= preferred_class
[commutative
];
3667 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3668 preferred_class
[commutative
+ 1] = tclass
;
3670 t
= pref_or_nothing
[commutative
];
3671 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3672 pref_or_nothing
[commutative
+ 1] = t
;
3674 memcpy (constraints
, recog_data
.constraints
,
3675 noperands
* sizeof (char *));
3680 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3681 recog_data
.operand
[commutative
+ 1]
3682 = substed_operand
[commutative
+ 1];
3683 /* Unswap the duplicates too. */
3684 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3685 if (recog_data
.dup_num
[i
] == commutative
3686 || recog_data
.dup_num
[i
] == commutative
+ 1)
3687 *recog_data
.dup_loc
[i
]
3688 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3692 /* The operands don't meet the constraints.
3693 goal_alternative describes the alternative
3694 that we could reach by reloading the fewest operands.
3695 Reload so as to fit it. */
3697 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3699 /* No alternative works with reloads?? */
3700 if (insn_code_number
>= 0)
3701 fatal_insn ("unable to generate reloads for:", insn
);
3702 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3703 /* Avoid further trouble with this insn. */
3704 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3709 /* Jump to `finish' from above if all operands are valid already.
3710 In that case, goal_alternative_win is all 1. */
3713 /* Right now, for any pair of operands I and J that are required to match,
3715 goal_alternative_matches[J] is I.
3716 Set up goal_alternative_matched as the inverse function:
3717 goal_alternative_matched[I] = J. */
3719 for (i
= 0; i
< noperands
; i
++)
3720 goal_alternative_matched
[i
] = -1;
3722 for (i
= 0; i
< noperands
; i
++)
3723 if (! goal_alternative_win
[i
]
3724 && goal_alternative_matches
[i
] >= 0)
3725 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3727 for (i
= 0; i
< noperands
; i
++)
3728 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3730 /* If the best alternative is with operands 1 and 2 swapped,
3731 consider them swapped before reporting the reloads. Update the
3732 operand numbers of any reloads already pushed. */
3734 if (goal_alternative_swapped
)
3738 tem
= substed_operand
[commutative
];
3739 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3740 substed_operand
[commutative
+ 1] = tem
;
3741 tem
= recog_data
.operand
[commutative
];
3742 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3743 recog_data
.operand
[commutative
+ 1] = tem
;
3744 tem
= *recog_data
.operand_loc
[commutative
];
3745 *recog_data
.operand_loc
[commutative
]
3746 = *recog_data
.operand_loc
[commutative
+ 1];
3747 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3749 for (i
= 0; i
< n_reloads
; i
++)
3751 if (rld
[i
].opnum
== commutative
)
3752 rld
[i
].opnum
= commutative
+ 1;
3753 else if (rld
[i
].opnum
== commutative
+ 1)
3754 rld
[i
].opnum
= commutative
;
3758 for (i
= 0; i
< noperands
; i
++)
3760 operand_reloadnum
[i
] = -1;
3762 /* If this is an earlyclobber operand, we need to widen the scope.
3763 The reload must remain valid from the start of the insn being
3764 reloaded until after the operand is stored into its destination.
3765 We approximate this with RELOAD_OTHER even though we know that we
3766 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3768 One special case that is worth checking is when we have an
3769 output that is earlyclobber but isn't used past the insn (typically
3770 a SCRATCH). In this case, we only need have the reload live
3771 through the insn itself, but not for any of our input or output
3773 But we must not accidentally narrow the scope of an existing
3774 RELOAD_OTHER reload - leave these alone.
3776 In any case, anything needed to address this operand can remain
3777 however they were previously categorized. */
3779 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3781 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3782 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3785 /* Any constants that aren't allowed and can't be reloaded
3786 into registers are here changed into memory references. */
3787 for (i
= 0; i
< noperands
; i
++)
3788 if (! goal_alternative_win
[i
]
3789 && CONSTANT_P (recog_data
.operand
[i
])
3790 /* force_const_mem does not accept HIGH. */
3791 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3792 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3793 (enum reg_class
) goal_alternative
[i
])
3795 || no_input_reloads
)
3796 && operand_mode
[i
] != VOIDmode
)
3798 substed_operand
[i
] = recog_data
.operand
[i
]
3799 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3800 recog_data
.operand
[i
]),
3801 i
, address_type
[i
], ind_levels
, 0, insn
,
3803 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3804 goal_alternative_number
))
3805 goal_alternative_win
[i
] = 1;
3808 /* Record the values of the earlyclobber operands for the caller. */
3809 if (goal_earlyclobber
)
3810 for (i
= 0; i
< noperands
; i
++)
3811 if (goal_alternative_earlyclobber
[i
])
3812 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3814 /* Now record reloads for all the operands that need them. */
3815 for (i
= 0; i
< noperands
; i
++)
3816 if (! goal_alternative_win
[i
])
3818 /* Operands that match previous ones have already been handled. */
3819 if (goal_alternative_matches
[i
] >= 0)
3821 /* Handle an operand with a nonoffsettable address
3822 appearing where an offsettable address will do
3823 by reloading the address into a base register.
3825 ??? We can also do this when the operand is a register and
3826 reg_equiv_mem is not offsettable, but this is a bit tricky,
3827 so we don't bother with it. It may not be worth doing. */
3828 else if (goal_alternative_matched
[i
] == -1
3829 && goal_alternative_offmemok
[i
]
3830 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3832 operand_reloadnum
[i
]
3833 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3834 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3835 MODE_BASE_REG_CLASS (VOIDmode
),
3836 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3837 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3838 rld
[operand_reloadnum
[i
]].inc
3839 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3841 /* If this operand is an output, we will have made any
3842 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3843 now we are treating part of the operand as an input, so
3844 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3846 if (modified
[i
] == RELOAD_WRITE
)
3848 for (j
= 0; j
< n_reloads
; j
++)
3850 if (rld
[j
].opnum
== i
)
3852 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3853 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3854 else if (rld
[j
].when_needed
3855 == RELOAD_FOR_OUTADDR_ADDRESS
)
3856 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3861 else if (goal_alternative_matched
[i
] == -1)
3863 operand_reloadnum
[i
]
3864 = push_reload ((modified
[i
] != RELOAD_WRITE
3865 ? recog_data
.operand
[i
] : 0),
3866 (modified
[i
] != RELOAD_READ
3867 ? recog_data
.operand
[i
] : 0),
3868 (modified
[i
] != RELOAD_WRITE
3869 ? recog_data
.operand_loc
[i
] : 0),
3870 (modified
[i
] != RELOAD_READ
3871 ? recog_data
.operand_loc
[i
] : 0),
3872 (enum reg_class
) goal_alternative
[i
],
3873 (modified
[i
] == RELOAD_WRITE
3874 ? VOIDmode
: operand_mode
[i
]),
3875 (modified
[i
] == RELOAD_READ
3876 ? VOIDmode
: operand_mode
[i
]),
3877 (insn_code_number
< 0 ? 0
3878 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3879 0, i
, operand_type
[i
]);
3881 /* In a matching pair of operands, one must be input only
3882 and the other must be output only.
3883 Pass the input operand as IN and the other as OUT. */
3884 else if (modified
[i
] == RELOAD_READ
3885 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3887 operand_reloadnum
[i
]
3888 = push_reload (recog_data
.operand
[i
],
3889 recog_data
.operand
[goal_alternative_matched
[i
]],
3890 recog_data
.operand_loc
[i
],
3891 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3892 (enum reg_class
) goal_alternative
[i
],
3894 operand_mode
[goal_alternative_matched
[i
]],
3895 0, 0, i
, RELOAD_OTHER
);
3896 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3898 else if (modified
[i
] == RELOAD_WRITE
3899 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3901 operand_reloadnum
[goal_alternative_matched
[i
]]
3902 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3903 recog_data
.operand
[i
],
3904 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3905 recog_data
.operand_loc
[i
],
3906 (enum reg_class
) goal_alternative
[i
],
3907 operand_mode
[goal_alternative_matched
[i
]],
3909 0, 0, i
, RELOAD_OTHER
);
3910 operand_reloadnum
[i
] = output_reloadnum
;
3912 else if (insn_code_number
>= 0)
3916 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3917 /* Avoid further trouble with this insn. */
3918 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3923 else if (goal_alternative_matched
[i
] < 0
3924 && goal_alternative_matches
[i
] < 0
3925 && !address_operand_reloaded
[i
]
3928 /* For each non-matching operand that's a MEM or a pseudo-register
3929 that didn't get a hard register, make an optional reload.
3930 This may get done even if the insn needs no reloads otherwise. */
3932 rtx operand
= recog_data
.operand
[i
];
3934 while (GET_CODE (operand
) == SUBREG
)
3935 operand
= SUBREG_REG (operand
);
3936 if ((GET_CODE (operand
) == MEM
3937 || (GET_CODE (operand
) == REG
3938 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3939 /* If this is only for an output, the optional reload would not
3940 actually cause us to use a register now, just note that
3941 something is stored here. */
3942 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3943 || modified
[i
] == RELOAD_WRITE
)
3944 && ! no_input_reloads
3945 /* An optional output reload might allow to delete INSN later.
3946 We mustn't make in-out reloads on insns that are not permitted
3948 If this is an asm, we can't delete it; we must not even call
3949 push_reload for an optional output reload in this case,
3950 because we can't be sure that the constraint allows a register,
3951 and push_reload verifies the constraints for asms. */
3952 && (modified
[i
] == RELOAD_READ
3953 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3954 operand_reloadnum
[i
]
3955 = push_reload ((modified
[i
] != RELOAD_WRITE
3956 ? recog_data
.operand
[i
] : 0),
3957 (modified
[i
] != RELOAD_READ
3958 ? recog_data
.operand
[i
] : 0),
3959 (modified
[i
] != RELOAD_WRITE
3960 ? recog_data
.operand_loc
[i
] : 0),
3961 (modified
[i
] != RELOAD_READ
3962 ? recog_data
.operand_loc
[i
] : 0),
3963 (enum reg_class
) goal_alternative
[i
],
3964 (modified
[i
] == RELOAD_WRITE
3965 ? VOIDmode
: operand_mode
[i
]),
3966 (modified
[i
] == RELOAD_READ
3967 ? VOIDmode
: operand_mode
[i
]),
3968 (insn_code_number
< 0 ? 0
3969 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3970 1, i
, operand_type
[i
]);
3971 /* If a memory reference remains (either as a MEM or a pseudo that
3972 did not get a hard register), yet we can't make an optional
3973 reload, check if this is actually a pseudo register reference;
3974 we then need to emit a USE and/or a CLOBBER so that reload
3975 inheritance will do the right thing. */
3977 && (GET_CODE (operand
) == MEM
3978 || (GET_CODE (operand
) == REG
3979 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3980 && reg_renumber
[REGNO (operand
)] < 0)))
3982 operand
= *recog_data
.operand_loc
[i
];
3984 while (GET_CODE (operand
) == SUBREG
)
3985 operand
= SUBREG_REG (operand
);
3986 if (GET_CODE (operand
) == REG
)
3988 if (modified
[i
] != RELOAD_WRITE
)
3989 /* We mark the USE with QImode so that we recognize
3990 it as one that can be safely deleted at the end
3992 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
3994 if (modified
[i
] != RELOAD_READ
)
3995 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3999 else if (goal_alternative_matches
[i
] >= 0
4000 && goal_alternative_win
[goal_alternative_matches
[i
]]
4001 && modified
[i
] == RELOAD_READ
4002 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4003 && ! no_input_reloads
&& ! no_output_reloads
4006 /* Similarly, make an optional reload for a pair of matching
4007 objects that are in MEM or a pseudo that didn't get a hard reg. */
4009 rtx operand
= recog_data
.operand
[i
];
4011 while (GET_CODE (operand
) == SUBREG
)
4012 operand
= SUBREG_REG (operand
);
4013 if ((GET_CODE (operand
) == MEM
4014 || (GET_CODE (operand
) == REG
4015 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4016 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
4018 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4019 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4020 recog_data
.operand
[i
],
4021 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4022 recog_data
.operand_loc
[i
],
4023 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4024 operand_mode
[goal_alternative_matches
[i
]],
4026 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4029 /* Perform whatever substitutions on the operands we are supposed
4030 to make due to commutativity or replacement of registers
4031 with equivalent constants or memory slots. */
4033 for (i
= 0; i
< noperands
; i
++)
4035 /* We only do this on the last pass through reload, because it is
4036 possible for some data (like reg_equiv_address) to be changed during
4037 later passes. Moreover, we loose the opportunity to get a useful
4038 reload_{in,out}_reg when we do these replacements. */
4042 rtx substitution
= substed_operand
[i
];
4044 *recog_data
.operand_loc
[i
] = substitution
;
4046 /* If we're replacing an operand with a LABEL_REF, we need
4047 to make sure that there's a REG_LABEL note attached to
4048 this instruction. */
4049 if (GET_CODE (insn
) != JUMP_INSN
4050 && GET_CODE (substitution
) == LABEL_REF
4051 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
4052 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
4053 XEXP (substitution
, 0),
4057 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4060 /* If this insn pattern contains any MATCH_DUP's, make sure that
4061 they will be substituted if the operands they match are substituted.
4062 Also do now any substitutions we already did on the operands.
4064 Don't do this if we aren't making replacements because we might be
4065 propagating things allocated by frame pointer elimination into places
4066 it doesn't expect. */
4068 if (insn_code_number
>= 0 && replace
)
4069 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4071 int opno
= recog_data
.dup_num
[i
];
4072 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4073 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4077 /* This loses because reloading of prior insns can invalidate the equivalence
4078 (or at least find_equiv_reg isn't smart enough to find it any more),
4079 causing this insn to need more reload regs than it needed before.
4080 It may be too late to make the reload regs available.
4081 Now this optimization is done safely in choose_reload_regs. */
4083 /* For each reload of a reg into some other class of reg,
4084 search for an existing equivalent reg (same value now) in the right class.
4085 We can use it as long as we don't need to change its contents. */
4086 for (i
= 0; i
< n_reloads
; i
++)
4087 if (rld
[i
].reg_rtx
== 0
4089 && GET_CODE (rld
[i
].in
) == REG
4093 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4094 static_reload_reg_p
, 0, rld
[i
].inmode
);
4095 /* Prevent generation of insn to load the value
4096 because the one we found already has the value. */
4098 rld
[i
].in
= rld
[i
].reg_rtx
;
4102 /* Perhaps an output reload can be combined with another
4103 to reduce needs by one. */
4104 if (!goal_earlyclobber
)
4107 /* If we have a pair of reloads for parts of an address, they are reloading
4108 the same object, the operands themselves were not reloaded, and they
4109 are for two operands that are supposed to match, merge the reloads and
4110 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4112 for (i
= 0; i
< n_reloads
; i
++)
4116 for (j
= i
+ 1; j
< n_reloads
; j
++)
4117 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4118 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4119 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4120 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4121 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4122 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4123 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4124 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4125 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4126 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4127 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4128 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4129 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4130 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4131 || (goal_alternative_matches
[rld
[j
].opnum
]
4134 for (k
= 0; k
< n_replacements
; k
++)
4135 if (replacements
[k
].what
== j
)
4136 replacements
[k
].what
= i
;
4138 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4139 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4140 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4142 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4147 /* Scan all the reloads and update their type.
4148 If a reload is for the address of an operand and we didn't reload
4149 that operand, change the type. Similarly, change the operand number
4150 of a reload when two operands match. If a reload is optional, treat it
4151 as though the operand isn't reloaded.
4153 ??? This latter case is somewhat odd because if we do the optional
4154 reload, it means the object is hanging around. Thus we need only
4155 do the address reload if the optional reload was NOT done.
4157 Change secondary reloads to be the address type of their operand, not
4160 If an operand's reload is now RELOAD_OTHER, change any
4161 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4162 RELOAD_FOR_OTHER_ADDRESS. */
4164 for (i
= 0; i
< n_reloads
; i
++)
4166 if (rld
[i
].secondary_p
4167 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4168 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4170 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4171 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4172 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4173 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4174 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4175 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4177 /* If we have a secondary reload to go along with this reload,
4178 change its type to RELOAD_FOR_OPADDR_ADDR. */
4180 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4181 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4182 && rld
[i
].secondary_in_reload
!= -1)
4184 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4186 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4188 /* If there's a tertiary reload we have to change it also. */
4189 if (secondary_in_reload
> 0
4190 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4191 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4192 = RELOAD_FOR_OPADDR_ADDR
;
4195 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4196 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4197 && rld
[i
].secondary_out_reload
!= -1)
4199 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4201 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4203 /* If there's a tertiary reload we have to change it also. */
4204 if (secondary_out_reload
4205 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4206 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4207 = RELOAD_FOR_OPADDR_ADDR
;
4210 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4211 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4212 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4214 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4217 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4218 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4219 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4220 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4222 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4224 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4225 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4228 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4229 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4230 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4232 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4233 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4234 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4235 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4236 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4237 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4238 This is complicated by the fact that a single operand can have more
4239 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4240 choose_reload_regs without affecting code quality, and cases that
4241 actually fail are extremely rare, so it turns out to be better to fix
4242 the problem here by not generating cases that choose_reload_regs will
4244 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4245 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4247 We can reduce the register pressure by exploiting that a
4248 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4249 does not conflict with any of them, if it is only used for the first of
4250 the RELOAD_FOR_X_ADDRESS reloads. */
4252 int first_op_addr_num
= -2;
4253 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4254 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4255 int need_change
= 0;
4256 /* We use last_op_addr_reload and the contents of the above arrays
4257 first as flags - -2 means no instance encountered, -1 means exactly
4258 one instance encountered.
4259 If more than one instance has been encountered, we store the reload
4260 number of the first reload of the kind in question; reload numbers
4261 are known to be non-negative. */
4262 for (i
= 0; i
< noperands
; i
++)
4263 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4264 for (i
= n_reloads
- 1; i
>= 0; i
--)
4266 switch (rld
[i
].when_needed
)
4268 case RELOAD_FOR_OPERAND_ADDRESS
:
4269 if (++first_op_addr_num
>= 0)
4271 first_op_addr_num
= i
;
4275 case RELOAD_FOR_INPUT_ADDRESS
:
4276 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4278 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4282 case RELOAD_FOR_OUTPUT_ADDRESS
:
4283 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4285 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4296 for (i
= 0; i
< n_reloads
; i
++)
4299 enum reload_type type
;
4301 switch (rld
[i
].when_needed
)
4303 case RELOAD_FOR_OPADDR_ADDR
:
4304 first_num
= first_op_addr_num
;
4305 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4307 case RELOAD_FOR_INPADDR_ADDRESS
:
4308 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4309 type
= RELOAD_FOR_INPUT_ADDRESS
;
4311 case RELOAD_FOR_OUTADDR_ADDRESS
:
4312 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4313 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4320 else if (i
> first_num
)
4321 rld
[i
].when_needed
= type
;
4324 /* Check if the only TYPE reload that uses reload I is
4325 reload FIRST_NUM. */
4326 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4328 if (rld
[j
].when_needed
== type
4329 && (rld
[i
].secondary_p
4330 ? rld
[j
].secondary_in_reload
== i
4331 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4333 rld
[i
].when_needed
= type
;
4342 /* See if we have any reloads that are now allowed to be merged
4343 because we've changed when the reload is needed to
4344 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4345 check for the most common cases. */
4347 for (i
= 0; i
< n_reloads
; i
++)
4348 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4349 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4350 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4351 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4352 for (j
= 0; j
< n_reloads
; j
++)
4353 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4354 && rld
[j
].when_needed
== rld
[i
].when_needed
4355 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4356 && rld
[i
].class == rld
[j
].class
4357 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4358 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4360 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4361 transfer_replacements (i
, j
);
4366 /* If we made any reloads for addresses, see if they violate a
4367 "no input reloads" requirement for this insn. But loads that we
4368 do after the insn (such as for output addresses) are fine. */
4369 if (no_input_reloads
)
4370 for (i
= 0; i
< n_reloads
; i
++)
4372 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4373 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4377 /* Compute reload_mode and reload_nregs. */
4378 for (i
= 0; i
< n_reloads
; i
++)
4381 = (rld
[i
].inmode
== VOIDmode
4382 || (GET_MODE_SIZE (rld
[i
].outmode
)
4383 > GET_MODE_SIZE (rld
[i
].inmode
)))
4384 ? rld
[i
].outmode
: rld
[i
].inmode
;
4386 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4389 /* Special case a simple move with an input reload and a
4390 destination of a hard reg, if the hard reg is ok, use it. */
4391 for (i
= 0; i
< n_reloads
; i
++)
4392 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4393 && GET_CODE (PATTERN (insn
)) == SET
4394 && GET_CODE (SET_DEST (PATTERN (insn
))) == REG
4395 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4397 rtx dest
= SET_DEST (PATTERN (insn
));
4398 unsigned int regno
= REGNO (dest
);
4400 if (regno
< FIRST_PSEUDO_REGISTER
4401 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4402 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4404 int nr
= HARD_REGNO_NREGS (regno
, rld
[i
].mode
);
4407 for (nri
= 1; nri
< nr
; nri
++)
4408 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
+ nri
))
4412 rld
[i
].reg_rtx
= dest
;
4419 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4420 accepts a memory operand with constant address. */
4423 alternative_allows_memconst (constraint
, altnum
)
4424 const char *constraint
;
4428 /* Skip alternatives before the one requested. */
4431 while (*constraint
++ != ',');
4434 /* Scan the requested alternative for 'm' or 'o'.
4435 If one of them is present, this alternative accepts memory constants. */
4436 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4437 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4438 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
, constraint
))
4443 /* Scan X for memory references and scan the addresses for reloading.
4444 Also checks for references to "constant" regs that we want to eliminate
4445 and replaces them with the values they stand for.
4446 We may alter X destructively if it contains a reference to such.
4447 If X is just a constant reg, we return the equivalent value
4450 IND_LEVELS says how many levels of indirect addressing this machine
4453 OPNUM and TYPE identify the purpose of the reload.
4455 IS_SET_DEST is true if X is the destination of a SET, which is not
4456 appropriate to be replaced by a constant.
4458 INSN, if nonzero, is the insn in which we do the reload. It is used
4459 to determine if we may generate output reloads, and where to put USEs
4460 for pseudos that we have to replace with stack slots.
4462 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4463 result of find_reloads_address. */
4466 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4470 enum reload_type type
;
4474 int *address_reloaded
;
4476 RTX_CODE code
= GET_CODE (x
);
4478 const char *fmt
= GET_RTX_FORMAT (code
);
4484 /* This code is duplicated for speed in find_reloads. */
4485 int regno
= REGNO (x
);
4486 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4487 x
= reg_equiv_constant
[regno
];
4489 /* This creates (subreg (mem...)) which would cause an unnecessary
4490 reload of the mem. */
4491 else if (reg_equiv_mem
[regno
] != 0)
4492 x
= reg_equiv_mem
[regno
];
4494 else if (reg_equiv_memory_loc
[regno
]
4495 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4497 rtx mem
= make_memloc (x
, regno
);
4498 if (reg_equiv_address
[regno
]
4499 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4501 /* If this is not a toplevel operand, find_reloads doesn't see
4502 this substitution. We have to emit a USE of the pseudo so
4503 that delete_output_reload can see it. */
4504 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4505 /* We mark the USE with QImode so that we recognize it
4506 as one that can be safely deleted at the end of
4508 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4511 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4512 opnum
, type
, ind_levels
, insn
);
4513 if (address_reloaded
)
4514 *address_reloaded
= i
;
4523 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4524 opnum
, type
, ind_levels
, insn
);
4525 if (address_reloaded
)
4526 *address_reloaded
= i
;
4531 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4533 /* Check for SUBREG containing a REG that's equivalent to a constant.
4534 If the constant has a known value, truncate it right now.
4535 Similarly if we are extracting a single-word of a multi-word
4536 constant. If the constant is symbolic, allow it to be substituted
4537 normally. push_reload will strip the subreg later. If the
4538 constant is VOIDmode, abort because we will lose the mode of
4539 the register (this should never happen because one of the cases
4540 above should handle it). */
4542 int regno
= REGNO (SUBREG_REG (x
));
4545 if (subreg_lowpart_p (x
)
4546 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4547 && reg_equiv_constant
[regno
] != 0
4548 && (tem
= gen_lowpart_common (GET_MODE (x
),
4549 reg_equiv_constant
[regno
])) != 0)
4552 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4553 && reg_equiv_constant
[regno
] != 0)
4556 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4557 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4563 /* If the subreg contains a reg that will be converted to a mem,
4564 convert the subreg to a narrower memref now.
4565 Otherwise, we would get (subreg (mem ...) ...),
4566 which would force reload of the mem.
4568 We also need to do this if there is an equivalent MEM that is
4569 not offsettable. In that case, alter_subreg would produce an
4570 invalid address on big-endian machines.
4572 For machines that extend byte loads, we must not reload using
4573 a wider mode if we have a paradoxical SUBREG. find_reloads will
4574 force a reload in that case. So we should not do anything here. */
4576 else if (regno
>= FIRST_PSEUDO_REGISTER
4577 #ifdef LOAD_EXTEND_OP
4578 && (GET_MODE_SIZE (GET_MODE (x
))
4579 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4581 && (reg_equiv_address
[regno
] != 0
4582 || (reg_equiv_mem
[regno
] != 0
4583 && (! strict_memory_address_p (GET_MODE (x
),
4584 XEXP (reg_equiv_mem
[regno
], 0))
4585 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4586 || num_not_at_initial_offset
))))
4587 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4591 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4595 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4596 ind_levels
, is_set_dest
, insn
,
4598 /* If we have replaced a reg with it's equivalent memory loc -
4599 that can still be handled here e.g. if it's in a paradoxical
4600 subreg - we must make the change in a copy, rather than using
4601 a destructive change. This way, find_reloads can still elect
4602 not to do the change. */
4603 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4605 x
= shallow_copy_rtx (x
);
4608 XEXP (x
, i
) = new_part
;
4614 /* Return a mem ref for the memory equivalent of reg REGNO.
4615 This mem ref is not shared with anything. */
4618 make_memloc (ad
, regno
)
4622 /* We must rerun eliminate_regs, in case the elimination
4623 offsets have changed. */
4625 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4627 /* If TEM might contain a pseudo, we must copy it to avoid
4628 modifying it when we do the substitution for the reload. */
4629 if (rtx_varies_p (tem
, 0))
4630 tem
= copy_rtx (tem
);
4632 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4633 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4635 /* Copy the result if it's still the same as the equivalence, to avoid
4636 modifying it when we do the substitution for the reload. */
4637 if (tem
== reg_equiv_memory_loc
[regno
])
4638 tem
= copy_rtx (tem
);
4642 /* Returns true if AD could be turned into a valid memory reference
4643 to mode MODE by reloading the part pointed to by PART into a
4647 maybe_memory_address_p (mode
, ad
, part
)
4648 enum machine_mode mode
;
4654 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4657 retv
= memory_address_p (mode
, ad
);
4663 /* Record all reloads needed for handling memory address AD
4664 which appears in *LOC in a memory reference to mode MODE
4665 which itself is found in location *MEMREFLOC.
4666 Note that we take shortcuts assuming that no multi-reg machine mode
4667 occurs as part of an address.
4669 OPNUM and TYPE specify the purpose of this reload.
4671 IND_LEVELS says how many levels of indirect addressing this machine
4674 INSN, if nonzero, is the insn in which we do the reload. It is used
4675 to determine if we may generate output reloads, and where to put USEs
4676 for pseudos that we have to replace with stack slots.
4678 Value is nonzero if this address is reloaded or replaced as a whole.
4679 This is interesting to the caller if the address is an autoincrement.
4681 Note that there is no verification that the address will be valid after
4682 this routine does its work. Instead, we rely on the fact that the address
4683 was valid when reload started. So we need only undo things that reload
4684 could have broken. These are wrong register types, pseudos not allocated
4685 to a hard register, and frame pointer elimination. */
4688 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4689 enum machine_mode mode
;
4694 enum reload_type type
;
4699 int removed_and
= 0;
4702 /* If the address is a register, see if it is a legitimate address and
4703 reload if not. We first handle the cases where we need not reload
4704 or where we must reload in a non-standard way. */
4706 if (GET_CODE (ad
) == REG
)
4710 /* If the register is equivalent to an invariant expression, substitute
4711 the invariant, and eliminate any eliminable register references. */
4712 tem
= reg_equiv_constant
[regno
];
4714 && (tem
= eliminate_regs (tem
, mode
, insn
))
4715 && strict_memory_address_p (mode
, tem
))
4721 tem
= reg_equiv_memory_loc
[regno
];
4724 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4726 tem
= make_memloc (ad
, regno
);
4727 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4729 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4730 &XEXP (tem
, 0), opnum
,
4731 ADDR_TYPE (type
), ind_levels
, insn
);
4733 /* We can avoid a reload if the register's equivalent memory
4734 expression is valid as an indirect memory address.
4735 But not all addresses are valid in a mem used as an indirect
4736 address: only reg or reg+constant. */
4739 && strict_memory_address_p (mode
, tem
)
4740 && (GET_CODE (XEXP (tem
, 0)) == REG
4741 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4742 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4743 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4745 /* TEM is not the same as what we'll be replacing the
4746 pseudo with after reload, put a USE in front of INSN
4747 in the final reload pass. */
4749 && num_not_at_initial_offset
4750 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4753 /* We mark the USE with QImode so that we
4754 recognize it as one that can be safely
4755 deleted at the end of reload. */
4756 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4759 /* This doesn't really count as replacing the address
4760 as a whole, since it is still a memory access. */
4768 /* The only remaining case where we can avoid a reload is if this is a
4769 hard register that is valid as a base register and which is not the
4770 subject of a CLOBBER in this insn. */
4772 else if (regno
< FIRST_PSEUDO_REGISTER
4773 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4774 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4777 /* If we do not have one of the cases above, we must do the reload. */
4778 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, MODE_BASE_REG_CLASS (mode
),
4779 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4783 if (strict_memory_address_p (mode
, ad
))
4785 /* The address appears valid, so reloads are not needed.
4786 But the address may contain an eliminable register.
4787 This can happen because a machine with indirect addressing
4788 may consider a pseudo register by itself a valid address even when
4789 it has failed to get a hard reg.
4790 So do a tree-walk to find and eliminate all such regs. */
4792 /* But first quickly dispose of a common case. */
4793 if (GET_CODE (ad
) == PLUS
4794 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4795 && GET_CODE (XEXP (ad
, 0)) == REG
4796 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4799 subst_reg_equivs_changed
= 0;
4800 *loc
= subst_reg_equivs (ad
, insn
);
4802 if (! subst_reg_equivs_changed
)
4805 /* Check result for validity after substitution. */
4806 if (strict_memory_address_p (mode
, ad
))
4810 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4815 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4820 *memrefloc
= copy_rtx (*memrefloc
);
4821 XEXP (*memrefloc
, 0) = ad
;
4822 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4828 /* The address is not valid. We have to figure out why. First see if
4829 we have an outer AND and remove it if so. Then analyze what's inside. */
4831 if (GET_CODE (ad
) == AND
)
4834 loc
= &XEXP (ad
, 0);
4838 /* One possibility for why the address is invalid is that it is itself
4839 a MEM. This can happen when the frame pointer is being eliminated, a
4840 pseudo is not allocated to a hard register, and the offset between the
4841 frame and stack pointers is not its initial value. In that case the
4842 pseudo will have been replaced by a MEM referring to the
4844 if (GET_CODE (ad
) == MEM
)
4846 /* First ensure that the address in this MEM is valid. Then, unless
4847 indirect addresses are valid, reload the MEM into a register. */
4849 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4850 opnum
, ADDR_TYPE (type
),
4851 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4853 /* If tem was changed, then we must create a new memory reference to
4854 hold it and store it back into memrefloc. */
4855 if (tem
!= ad
&& memrefloc
)
4857 *memrefloc
= copy_rtx (*memrefloc
);
4858 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4859 loc
= &XEXP (*memrefloc
, 0);
4861 loc
= &XEXP (*loc
, 0);
4864 /* Check similar cases as for indirect addresses as above except
4865 that we can allow pseudos and a MEM since they should have been
4866 taken care of above. */
4869 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4870 || GET_CODE (XEXP (tem
, 0)) == MEM
4871 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4872 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4873 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4874 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4876 /* Must use TEM here, not AD, since it is the one that will
4877 have any subexpressions reloaded, if needed. */
4878 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4879 MODE_BASE_REG_CLASS (mode
), GET_MODE (tem
),
4882 return ! removed_and
;
4888 /* If we have address of a stack slot but it's not valid because the
4889 displacement is too large, compute the sum in a register.
4890 Handle all base registers here, not just fp/ap/sp, because on some
4891 targets (namely SH) we can also get too large displacements from
4892 big-endian corrections. */
4893 else if (GET_CODE (ad
) == PLUS
4894 && GET_CODE (XEXP (ad
, 0)) == REG
4895 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4896 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4897 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4899 /* Unshare the MEM rtx so we can safely alter it. */
4902 *memrefloc
= copy_rtx (*memrefloc
);
4903 loc
= &XEXP (*memrefloc
, 0);
4905 loc
= &XEXP (*loc
, 0);
4908 if (double_reg_address_ok
)
4910 /* Unshare the sum as well. */
4911 *loc
= ad
= copy_rtx (ad
);
4913 /* Reload the displacement into an index reg.
4914 We assume the frame pointer or arg pointer is a base reg. */
4915 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4916 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4922 /* If the sum of two regs is not necessarily valid,
4923 reload the sum into a base reg.
4924 That will at least work. */
4925 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
4926 Pmode
, opnum
, type
, ind_levels
);
4928 return ! removed_and
;
4931 /* If we have an indexed stack slot, there are three possible reasons why
4932 it might be invalid: The index might need to be reloaded, the address
4933 might have been made by frame pointer elimination and hence have a
4934 constant out of range, or both reasons might apply.
4936 We can easily check for an index needing reload, but even if that is the
4937 case, we might also have an invalid constant. To avoid making the
4938 conservative assumption and requiring two reloads, we see if this address
4939 is valid when not interpreted strictly. If it is, the only problem is
4940 that the index needs a reload and find_reloads_address_1 will take care
4943 Handle all base registers here, not just fp/ap/sp, because on some
4944 targets (namely SPARC) we can also get invalid addresses from preventive
4945 subreg big-endian corrections made by find_reloads_toplev.
4947 If we decide to do something, it must be that `double_reg_address_ok'
4948 is true. We generate a reload of the base register + constant and
4949 rework the sum so that the reload register will be added to the index.
4950 This is safe because we know the address isn't shared.
4952 We check for the base register as both the first and second operand of
4953 the innermost PLUS. */
4955 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4956 && GET_CODE (XEXP (ad
, 0)) == PLUS
4957 && GET_CODE (XEXP (XEXP (ad
, 0), 0)) == REG
4958 && REGNO (XEXP (XEXP (ad
, 0), 0)) < FIRST_PSEUDO_REGISTER
4959 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad
, 0), 0), mode
)
4960 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 1)))
4962 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4963 plus_constant (XEXP (XEXP (ad
, 0), 0),
4964 INTVAL (XEXP (ad
, 1))),
4965 XEXP (XEXP (ad
, 0), 1));
4966 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0),
4967 MODE_BASE_REG_CLASS (mode
),
4968 GET_MODE (ad
), opnum
, type
, ind_levels
);
4969 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4975 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4976 && GET_CODE (XEXP (ad
, 0)) == PLUS
4977 && GET_CODE (XEXP (XEXP (ad
, 0), 1)) == REG
4978 && REGNO (XEXP (XEXP (ad
, 0), 1)) < FIRST_PSEUDO_REGISTER
4979 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad
, 0), 1), mode
)
4980 && ! maybe_memory_address_p (mode
, ad
, &XEXP (XEXP (ad
, 0), 0)))
4982 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4983 XEXP (XEXP (ad
, 0), 0),
4984 plus_constant (XEXP (XEXP (ad
, 0), 1),
4985 INTVAL (XEXP (ad
, 1))));
4986 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4987 MODE_BASE_REG_CLASS (mode
),
4988 GET_MODE (ad
), opnum
, type
, ind_levels
);
4989 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4995 /* See if address becomes valid when an eliminable register
4996 in a sum is replaced. */
4999 if (GET_CODE (ad
) == PLUS
)
5000 tem
= subst_indexed_address (ad
);
5001 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
5003 /* Ok, we win that way. Replace any additional eliminable
5006 subst_reg_equivs_changed
= 0;
5007 tem
= subst_reg_equivs (tem
, insn
);
5009 /* Make sure that didn't make the address invalid again. */
5011 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
5018 /* If constants aren't valid addresses, reload the constant address
5020 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
5022 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5023 Unshare it so we can safely alter it. */
5024 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5025 && CONSTANT_POOL_ADDRESS_P (ad
))
5027 *memrefloc
= copy_rtx (*memrefloc
);
5028 loc
= &XEXP (*memrefloc
, 0);
5030 loc
= &XEXP (*loc
, 0);
5033 find_reloads_address_part (ad
, loc
, MODE_BASE_REG_CLASS (mode
),
5034 Pmode
, opnum
, type
, ind_levels
);
5035 return ! removed_and
;
5038 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
5042 /* Find all pseudo regs appearing in AD
5043 that are eliminable in favor of equivalent values
5044 and do not have hard regs; replace them by their equivalents.
5045 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5046 front of it for pseudos that we have to replace with stack slots. */
5049 subst_reg_equivs (ad
, insn
)
5053 RTX_CODE code
= GET_CODE (ad
);
5072 int regno
= REGNO (ad
);
5074 if (reg_equiv_constant
[regno
] != 0)
5076 subst_reg_equivs_changed
= 1;
5077 return reg_equiv_constant
[regno
];
5079 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
5081 rtx mem
= make_memloc (ad
, regno
);
5082 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
5084 subst_reg_equivs_changed
= 1;
5085 /* We mark the USE with QImode so that we recognize it
5086 as one that can be safely deleted at the end of
5088 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5097 /* Quickly dispose of a common case. */
5098 if (XEXP (ad
, 0) == frame_pointer_rtx
5099 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5107 fmt
= GET_RTX_FORMAT (code
);
5108 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5110 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5114 /* Compute the sum of X and Y, making canonicalizations assumed in an
5115 address, namely: sum constant integers, surround the sum of two
5116 constants with a CONST, put the constant as the second operand, and
5117 group the constant on the outermost sum.
5119 This routine assumes both inputs are already in canonical form. */
5126 enum machine_mode mode
= GET_MODE (x
);
5128 if (mode
== VOIDmode
)
5129 mode
= GET_MODE (y
);
5131 if (mode
== VOIDmode
)
5134 if (GET_CODE (x
) == CONST_INT
)
5135 return plus_constant (y
, INTVAL (x
));
5136 else if (GET_CODE (y
) == CONST_INT
)
5137 return plus_constant (x
, INTVAL (y
));
5138 else if (CONSTANT_P (x
))
5139 tem
= x
, x
= y
, y
= tem
;
5141 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5142 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5144 /* Note that if the operands of Y are specified in the opposite
5145 order in the recursive calls below, infinite recursion will occur. */
5146 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5147 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5149 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5150 constant will have been placed second. */
5151 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5153 if (GET_CODE (x
) == CONST
)
5155 if (GET_CODE (y
) == CONST
)
5158 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5161 return gen_rtx_PLUS (mode
, x
, y
);
5164 /* If ADDR is a sum containing a pseudo register that should be
5165 replaced with a constant (from reg_equiv_constant),
5166 return the result of doing so, and also apply the associative
5167 law so that the result is more likely to be a valid address.
5168 (But it is not guaranteed to be one.)
5170 Note that at most one register is replaced, even if more are
5171 replaceable. Also, we try to put the result into a canonical form
5172 so it is more likely to be a valid address.
5174 In all other cases, return ADDR. */
5177 subst_indexed_address (addr
)
5180 rtx op0
= 0, op1
= 0, op2
= 0;
5184 if (GET_CODE (addr
) == PLUS
)
5186 /* Try to find a register to replace. */
5187 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5188 if (GET_CODE (op0
) == REG
5189 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5190 && reg_renumber
[regno
] < 0
5191 && reg_equiv_constant
[regno
] != 0)
5192 op0
= reg_equiv_constant
[regno
];
5193 else if (GET_CODE (op1
) == REG
5194 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5195 && reg_renumber
[regno
] < 0
5196 && reg_equiv_constant
[regno
] != 0)
5197 op1
= reg_equiv_constant
[regno
];
5198 else if (GET_CODE (op0
) == PLUS
5199 && (tem
= subst_indexed_address (op0
)) != op0
)
5201 else if (GET_CODE (op1
) == PLUS
5202 && (tem
= subst_indexed_address (op1
)) != op1
)
5207 /* Pick out up to three things to add. */
5208 if (GET_CODE (op1
) == PLUS
)
5209 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5210 else if (GET_CODE (op0
) == PLUS
)
5211 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5213 /* Compute the sum. */
5215 op1
= form_sum (op1
, op2
);
5217 op0
= form_sum (op0
, op1
);
5224 /* Update the REG_INC notes for an insn. It updates all REG_INC
5225 notes for the instruction which refer to REGNO the to refer
5226 to the reload number.
5228 INSN is the insn for which any REG_INC notes need updating.
5230 REGNO is the register number which has been reloaded.
5232 RELOADNUM is the reload number. */
5235 update_auto_inc_notes (insn
, regno
, reloadnum
)
5236 rtx insn ATTRIBUTE_UNUSED
;
5237 int regno ATTRIBUTE_UNUSED
;
5238 int reloadnum ATTRIBUTE_UNUSED
;
5243 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5244 if (REG_NOTE_KIND (link
) == REG_INC
5245 && (int) REGNO (XEXP (link
, 0)) == regno
)
5246 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5250 /* Record the pseudo registers we must reload into hard registers in a
5251 subexpression of a would-be memory address, X referring to a value
5252 in mode MODE. (This function is not called if the address we find
5255 CONTEXT = 1 means we are considering regs as index regs,
5256 = 0 means we are considering them as base regs.
5258 OPNUM and TYPE specify the purpose of any reloads made.
5260 IND_LEVELS says how many levels of indirect addressing are
5261 supported at this point in the address.
5263 INSN, if nonzero, is the insn in which we do the reload. It is used
5264 to determine if we may generate output reloads.
5266 We return nonzero if X, as a whole, is reloaded or replaced. */
5268 /* Note that we take shortcuts assuming that no multi-reg machine mode
5269 occurs as part of an address.
5270 Also, this is not fully machine-customizable; it works for machines
5271 such as VAXen and 68000's and 32000's, but other possible machines
5272 could have addressing modes that this does not handle right. */
5275 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5276 enum machine_mode mode
;
5281 enum reload_type type
;
5285 RTX_CODE code
= GET_CODE (x
);
5291 rtx orig_op0
= XEXP (x
, 0);
5292 rtx orig_op1
= XEXP (x
, 1);
5293 RTX_CODE code0
= GET_CODE (orig_op0
);
5294 RTX_CODE code1
= GET_CODE (orig_op1
);
5298 if (GET_CODE (op0
) == SUBREG
)
5300 op0
= SUBREG_REG (op0
);
5301 code0
= GET_CODE (op0
);
5302 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5303 op0
= gen_rtx_REG (word_mode
,
5305 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5306 GET_MODE (SUBREG_REG (orig_op0
)),
5307 SUBREG_BYTE (orig_op0
),
5308 GET_MODE (orig_op0
))));
5311 if (GET_CODE (op1
) == SUBREG
)
5313 op1
= SUBREG_REG (op1
);
5314 code1
= GET_CODE (op1
);
5315 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5316 /* ??? Why is this given op1's mode and above for
5317 ??? op0 SUBREGs we use word_mode? */
5318 op1
= gen_rtx_REG (GET_MODE (op1
),
5320 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5321 GET_MODE (SUBREG_REG (orig_op1
)),
5322 SUBREG_BYTE (orig_op1
),
5323 GET_MODE (orig_op1
))));
5325 /* Plus in the index register may be created only as a result of
5326 register remateralization for expresion like &localvar*4. Reload it.
5327 It may be possible to combine the displacement on the outer level,
5328 but it is probably not worthwhile to do so. */
5331 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5332 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5333 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5334 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5335 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5339 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5340 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5342 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5343 type
, ind_levels
, insn
);
5344 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5345 type
, ind_levels
, insn
);
5348 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5349 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5351 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5352 type
, ind_levels
, insn
);
5353 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5354 type
, ind_levels
, insn
);
5357 else if (code0
== CONST_INT
|| code0
== CONST
5358 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5359 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5360 type
, ind_levels
, insn
);
5362 else if (code1
== CONST_INT
|| code1
== CONST
5363 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5364 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5365 type
, ind_levels
, insn
);
5367 else if (code0
== REG
&& code1
== REG
)
5369 if (REG_OK_FOR_INDEX_P (op0
)
5370 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5372 else if (REG_OK_FOR_INDEX_P (op1
)
5373 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5375 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5376 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5377 type
, ind_levels
, insn
);
5378 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5379 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5380 type
, ind_levels
, insn
);
5381 else if (REG_OK_FOR_INDEX_P (op1
))
5382 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5383 type
, ind_levels
, insn
);
5384 else if (REG_OK_FOR_INDEX_P (op0
))
5385 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5386 type
, ind_levels
, insn
);
5389 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5390 type
, ind_levels
, insn
);
5391 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5392 type
, ind_levels
, insn
);
5396 else if (code0
== REG
)
5398 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5399 type
, ind_levels
, insn
);
5400 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5401 type
, ind_levels
, insn
);
5404 else if (code1
== REG
)
5406 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5407 type
, ind_levels
, insn
);
5408 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5409 type
, ind_levels
, insn
);
5418 rtx op0
= XEXP (x
, 0);
5419 rtx op1
= XEXP (x
, 1);
5421 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5424 /* Currently, we only support {PRE,POST}_MODIFY constructs
5425 where a base register is {inc,dec}remented by the contents
5426 of another register or by a constant value. Thus, these
5427 operands must match. */
5428 if (op0
!= XEXP (op1
, 0))
5431 /* Require index register (or constant). Let's just handle the
5432 register case in the meantime... If the target allows
5433 auto-modify by a constant then we could try replacing a pseudo
5434 register with its equivalent constant where applicable. */
5435 if (REG_P (XEXP (op1
, 1)))
5436 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5437 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5438 opnum
, type
, ind_levels
, insn
);
5440 if (REG_P (XEXP (op1
, 0)))
5442 int regno
= REGNO (XEXP (op1
, 0));
5445 /* A register that is incremented cannot be constant! */
5446 if (regno
>= FIRST_PSEUDO_REGISTER
5447 && reg_equiv_constant
[regno
] != 0)
5450 /* Handle a register that is equivalent to a memory location
5451 which cannot be addressed directly. */
5452 if (reg_equiv_memory_loc
[regno
] != 0
5453 && (reg_equiv_address
[regno
] != 0
5454 || num_not_at_initial_offset
))
5456 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5458 if (reg_equiv_address
[regno
]
5459 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5461 /* First reload the memory location's address.
5462 We can't use ADDR_TYPE (type) here, because we need to
5463 write back the value after reading it, hence we actually
5464 need two registers. */
5465 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5466 &XEXP (tem
, 0), opnum
,
5470 /* Then reload the memory location into a base
5472 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5474 MODE_BASE_REG_CLASS (mode
),
5475 GET_MODE (x
), GET_MODE (x
), 0,
5476 0, opnum
, RELOAD_OTHER
);
5478 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5483 if (reg_renumber
[regno
] >= 0)
5484 regno
= reg_renumber
[regno
];
5486 /* We require a base register here... */
5487 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5489 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5490 &XEXP (op1
, 0), &XEXP (x
, 0),
5491 MODE_BASE_REG_CLASS (mode
),
5492 GET_MODE (x
), GET_MODE (x
), 0, 0,
5493 opnum
, RELOAD_OTHER
);
5495 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5508 if (GET_CODE (XEXP (x
, 0)) == REG
)
5510 int regno
= REGNO (XEXP (x
, 0));
5514 /* A register that is incremented cannot be constant! */
5515 if (regno
>= FIRST_PSEUDO_REGISTER
5516 && reg_equiv_constant
[regno
] != 0)
5519 /* Handle a register that is equivalent to a memory location
5520 which cannot be addressed directly. */
5521 if (reg_equiv_memory_loc
[regno
] != 0
5522 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5524 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5525 if (reg_equiv_address
[regno
]
5526 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5528 /* First reload the memory location's address.
5529 We can't use ADDR_TYPE (type) here, because we need to
5530 write back the value after reading it, hence we actually
5531 need two registers. */
5532 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5533 &XEXP (tem
, 0), opnum
, type
,
5535 /* Put this inside a new increment-expression. */
5536 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5537 /* Proceed to reload that, as if it contained a register. */
5541 /* If we have a hard register that is ok as an index,
5542 don't make a reload. If an autoincrement of a nice register
5543 isn't "valid", it must be that no autoincrement is "valid".
5544 If that is true and something made an autoincrement anyway,
5545 this must be a special context where one is allowed.
5546 (For example, a "push" instruction.)
5547 We can't improve this address, so leave it alone. */
5549 /* Otherwise, reload the autoincrement into a suitable hard reg
5550 and record how much to increment by. */
5552 if (reg_renumber
[regno
] >= 0)
5553 regno
= reg_renumber
[regno
];
5554 if ((regno
>= FIRST_PSEUDO_REGISTER
5555 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5556 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5560 /* If we can output the register afterwards, do so, this
5561 saves the extra update.
5562 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5563 CALL_INSN - and it does not set CC0.
5564 But don't do this if we cannot directly address the
5565 memory location, since this will make it harder to
5566 reuse address reloads, and increases register pressure.
5567 Also don't do this if we can probably update x directly. */
5568 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5570 : reg_equiv_mem
[regno
]);
5571 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5572 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5573 && memory_operand (equiv
, GET_MODE (equiv
))
5575 && ! sets_cc0_p (PATTERN (insn
))
5577 && ! (icode
!= CODE_FOR_nothing
5578 && ((*insn_data
[icode
].operand
[0].predicate
)
5580 && ((*insn_data
[icode
].operand
[1].predicate
)
5583 /* We use the original pseudo for loc, so that
5584 emit_reload_insns() knows which pseudo this
5585 reload refers to and updates the pseudo rtx, not
5586 its equivalent memory location, as well as the
5587 corresponding entry in reg_last_reload_reg. */
5588 loc
= &XEXP (x_orig
, 0);
5591 = push_reload (x
, x
, loc
, loc
,
5592 (context
? INDEX_REG_CLASS
:
5593 MODE_BASE_REG_CLASS (mode
)),
5594 GET_MODE (x
), GET_MODE (x
), 0, 0,
5595 opnum
, RELOAD_OTHER
);
5600 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5601 (context
? INDEX_REG_CLASS
:
5602 MODE_BASE_REG_CLASS (mode
)),
5603 GET_MODE (x
), GET_MODE (x
), 0, 0,
5606 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5611 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5617 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5619 /* This is probably the result of a substitution, by eliminate_regs,
5620 of an equivalent address for a pseudo that was not allocated to a
5621 hard register. Verify that the specified address is valid and
5622 reload it into a register. */
5623 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5624 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5628 /* Since we know we are going to reload this item, don't decrement
5629 for the indirection level.
5631 Note that this is actually conservative: it would be slightly
5632 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5634 /* We can't use ADDR_TYPE (type) here, because we need to
5635 write back the value after reading it, hence we actually
5636 need two registers. */
5637 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5638 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5639 opnum
, type
, ind_levels
, insn
);
5641 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5642 (context
? INDEX_REG_CLASS
:
5643 MODE_BASE_REG_CLASS (mode
)),
5644 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5646 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5648 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5650 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5657 /* This is probably the result of a substitution, by eliminate_regs, of
5658 an equivalent address for a pseudo that was not allocated to a hard
5659 register. Verify that the specified address is valid and reload it
5662 Since we know we are going to reload this item, don't decrement for
5663 the indirection level.
5665 Note that this is actually conservative: it would be slightly more
5666 efficient to use the value of SPILL_INDIRECT_LEVELS from
5669 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5670 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5671 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5672 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5673 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5678 int regno
= REGNO (x
);
5680 if (reg_equiv_constant
[regno
] != 0)
5682 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5683 (context
? INDEX_REG_CLASS
:
5684 MODE_BASE_REG_CLASS (mode
)),
5685 GET_MODE (x
), opnum
, type
, ind_levels
);
5689 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5690 that feeds this insn. */
5691 if (reg_equiv_mem
[regno
] != 0)
5693 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5694 (context
? INDEX_REG_CLASS
:
5695 MODE_BASE_REG_CLASS (mode
)),
5696 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5701 if (reg_equiv_memory_loc
[regno
]
5702 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5704 rtx tem
= make_memloc (x
, regno
);
5705 if (reg_equiv_address
[regno
] != 0
5706 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5709 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5710 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5715 if (reg_renumber
[regno
] >= 0)
5716 regno
= reg_renumber
[regno
];
5718 if ((regno
>= FIRST_PSEUDO_REGISTER
5719 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5720 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5722 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5723 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5724 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5728 /* If a register appearing in an address is the subject of a CLOBBER
5729 in this insn, reload it into some other register to be safe.
5730 The CLOBBER is supposed to make the register unavailable
5731 from before this insn to after it. */
5732 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5734 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5735 (context
? INDEX_REG_CLASS
: MODE_BASE_REG_CLASS (mode
)),
5736 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5743 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5745 /* If this is a SUBREG of a hard register and the resulting register
5746 is of the wrong class, reload the whole SUBREG. This avoids
5747 needless copies if SUBREG_REG is multi-word. */
5748 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5750 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5752 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5753 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5755 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5756 (context
? INDEX_REG_CLASS
:
5757 MODE_BASE_REG_CLASS (mode
)),
5758 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5762 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5763 is larger than the class size, then reload the whole SUBREG. */
5766 enum reg_class
class = (context
? INDEX_REG_CLASS
5767 : MODE_BASE_REG_CLASS (mode
));
5768 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5769 > reg_class_size
[class])
5771 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5773 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5774 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5786 const char *fmt
= GET_RTX_FORMAT (code
);
5789 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5792 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5793 opnum
, type
, ind_levels
, insn
);
5800 /* X, which is found at *LOC, is a part of an address that needs to be
5801 reloaded into a register of class CLASS. If X is a constant, or if
5802 X is a PLUS that contains a constant, check that the constant is a
5803 legitimate operand and that we are supposed to be able to load
5804 it into the register.
5806 If not, force the constant into memory and reload the MEM instead.
5808 MODE is the mode to use, in case X is an integer constant.
5810 OPNUM and TYPE describe the purpose of any reloads made.
5812 IND_LEVELS says how many levels of indirect addressing this machine
5816 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5819 enum reg_class
class;
5820 enum machine_mode mode
;
5822 enum reload_type type
;
5826 && (! LEGITIMATE_CONSTANT_P (x
)
5827 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5831 tem
= x
= force_const_mem (mode
, x
);
5832 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5833 opnum
, type
, ind_levels
, 0);
5836 else if (GET_CODE (x
) == PLUS
5837 && CONSTANT_P (XEXP (x
, 1))
5838 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5839 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5843 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5844 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5845 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5846 opnum
, type
, ind_levels
, 0);
5849 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5850 mode
, VOIDmode
, 0, 0, opnum
, type
);
5853 /* X, a subreg of a pseudo, is a part of an address that needs to be
5856 If the pseudo is equivalent to a memory location that cannot be directly
5857 addressed, make the necessary address reloads.
5859 If address reloads have been necessary, or if the address is changed
5860 by register elimination, return the rtx of the memory location;
5861 otherwise, return X.
5863 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5866 OPNUM and TYPE identify the purpose of the reload.
5868 IND_LEVELS says how many levels of indirect addressing are
5869 supported at this point in the address.
5871 INSN, if nonzero, is the insn in which we do the reload. It is used
5872 to determine where to put USEs for pseudos that we have to replace with
5876 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5881 enum reload_type type
;
5885 int regno
= REGNO (SUBREG_REG (x
));
5887 if (reg_equiv_memory_loc
[regno
])
5889 /* If the address is not directly addressable, or if the address is not
5890 offsettable, then it must be replaced. */
5892 && (reg_equiv_address
[regno
]
5893 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5896 if (force_replace
|| num_not_at_initial_offset
)
5898 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5900 /* If the address changes because of register elimination, then
5901 it must be replaced. */
5903 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5905 int offset
= SUBREG_BYTE (x
);
5906 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5907 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5909 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5910 PUT_MODE (tem
, GET_MODE (x
));
5912 /* If this was a paradoxical subreg that we replaced, the
5913 resulting memory must be sufficiently aligned to allow
5914 us to widen the mode of the memory. */
5915 if (outer_size
> inner_size
&& STRICT_ALIGNMENT
)
5919 base
= XEXP (tem
, 0);
5920 if (GET_CODE (base
) == PLUS
)
5922 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
5923 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
5925 base
= XEXP (base
, 0);
5927 if (GET_CODE (base
) != REG
5928 || (REGNO_POINTER_ALIGN (REGNO (base
))
5929 < outer_size
* BITS_PER_UNIT
))
5933 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5934 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5937 /* If this is not a toplevel operand, find_reloads doesn't see
5938 this substitution. We have to emit a USE of the pseudo so
5939 that delete_output_reload can see it. */
5940 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5941 /* We mark the USE with QImode so that we recognize it
5942 as one that can be safely deleted at the end of
5944 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
5954 /* Substitute into the current INSN the registers into which we have reloaded
5955 the things that need reloading. The array `replacements'
5956 contains the locations of all pointers that must be changed
5957 and says what to replace them with.
5959 Return the rtx that X translates into; usually X, but modified. */
5962 subst_reloads (insn
)
5967 for (i
= 0; i
< n_replacements
; i
++)
5969 struct replacement
*r
= &replacements
[i
];
5970 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5973 #ifdef ENABLE_CHECKING
5974 /* Internal consistency test. Check that we don't modify
5975 anything in the equivalence arrays. Whenever something from
5976 those arrays needs to be reloaded, it must be unshared before
5977 being substituted into; the equivalence must not be modified.
5978 Otherwise, if the equivalence is used after that, it will
5979 have been modified, and the thing substituted (probably a
5980 register) is likely overwritten and not a usable equivalence. */
5983 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
5985 #define CHECK_MODF(ARRAY) \
5986 if (ARRAY[check_regno] \
5987 && loc_mentioned_in_p (r->where, \
5988 ARRAY[check_regno])) \
5991 CHECK_MODF (reg_equiv_constant
);
5992 CHECK_MODF (reg_equiv_memory_loc
);
5993 CHECK_MODF (reg_equiv_address
);
5994 CHECK_MODF (reg_equiv_mem
);
5997 #endif /* ENABLE_CHECKING */
5999 /* If we're replacing a LABEL_REF with a register, add a
6000 REG_LABEL note to indicate to flow which label this
6001 register refers to. */
6002 if (GET_CODE (*r
->where
) == LABEL_REF
6003 && GET_CODE (insn
) == JUMP_INSN
)
6004 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
6005 XEXP (*r
->where
, 0),
6008 /* Encapsulate RELOADREG so its machine mode matches what
6009 used to be there. Note that gen_lowpart_common will
6010 do the wrong thing if RELOADREG is multi-word. RELOADREG
6011 will always be a REG here. */
6012 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6013 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6015 /* If we are putting this into a SUBREG and RELOADREG is a
6016 SUBREG, we would be making nested SUBREGs, so we have to fix
6017 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6019 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
6021 if (GET_MODE (*r
->subreg_loc
)
6022 == GET_MODE (SUBREG_REG (reloadreg
)))
6023 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
6027 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
6029 /* When working with SUBREGs the rule is that the byte
6030 offset must be a multiple of the SUBREG's mode. */
6031 final_offset
= (final_offset
/
6032 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6033 final_offset
= (final_offset
*
6034 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6036 *r
->where
= SUBREG_REG (reloadreg
);
6037 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
6041 *r
->where
= reloadreg
;
6043 /* If reload got no reg and isn't optional, something's wrong. */
6044 else if (! rld
[r
->what
].optional
)
6049 /* Make a copy of any replacements being done into X and move those
6050 copies to locations in Y, a copy of X. */
6053 copy_replacements (x
, y
)
6056 /* We can't support X being a SUBREG because we might then need to know its
6057 location if something inside it was replaced. */
6058 if (GET_CODE (x
) == SUBREG
)
6061 copy_replacements_1 (&x
, &y
, n_replacements
);
6065 copy_replacements_1 (px
, py
, orig_replacements
)
6068 int orig_replacements
;
6072 struct replacement
*r
;
6076 for (j
= 0; j
< orig_replacements
; j
++)
6078 if (replacements
[j
].subreg_loc
== px
)
6080 r
= &replacements
[n_replacements
++];
6081 r
->where
= replacements
[j
].where
;
6083 r
->what
= replacements
[j
].what
;
6084 r
->mode
= replacements
[j
].mode
;
6086 else if (replacements
[j
].where
== px
)
6088 r
= &replacements
[n_replacements
++];
6091 r
->what
= replacements
[j
].what
;
6092 r
->mode
= replacements
[j
].mode
;
6098 code
= GET_CODE (x
);
6099 fmt
= GET_RTX_FORMAT (code
);
6101 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6104 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6105 else if (fmt
[i
] == 'E')
6106 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6107 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6112 /* Change any replacements being done to *X to be done to *Y. */
6115 move_replacements (x
, y
)
6121 for (i
= 0; i
< n_replacements
; i
++)
6122 if (replacements
[i
].subreg_loc
== x
)
6123 replacements
[i
].subreg_loc
= y
;
6124 else if (replacements
[i
].where
== x
)
6126 replacements
[i
].where
= y
;
6127 replacements
[i
].subreg_loc
= 0;
6131 /* If LOC was scheduled to be replaced by something, return the replacement.
6132 Otherwise, return *LOC. */
6135 find_replacement (loc
)
6138 struct replacement
*r
;
6140 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6142 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6144 if (reloadreg
&& r
->where
== loc
)
6146 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6147 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6151 else if (reloadreg
&& r
->subreg_loc
== loc
)
6153 /* RELOADREG must be either a REG or a SUBREG.
6155 ??? Is it actually still ever a SUBREG? If so, why? */
6157 if (GET_CODE (reloadreg
) == REG
)
6158 return gen_rtx_REG (GET_MODE (*loc
),
6159 (REGNO (reloadreg
) +
6160 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6161 GET_MODE (SUBREG_REG (*loc
)),
6164 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6168 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6170 /* When working with SUBREGs the rule is that the byte
6171 offset must be a multiple of the SUBREG's mode. */
6172 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6173 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6174 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6180 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6181 what's inside and make a new rtl if so. */
6182 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6183 || GET_CODE (*loc
) == MULT
)
6185 rtx x
= find_replacement (&XEXP (*loc
, 0));
6186 rtx y
= find_replacement (&XEXP (*loc
, 1));
6188 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6189 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6195 /* Return nonzero if register in range [REGNO, ENDREGNO)
6196 appears either explicitly or implicitly in X
6197 other than being stored into (except for earlyclobber operands).
6199 References contained within the substructure at LOC do not count.
6200 LOC may be zero, meaning don't ignore anything.
6202 This is similar to refers_to_regno_p in rtlanal.c except that we
6203 look at equivalences for pseudos that didn't get hard registers. */
6206 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
6207 unsigned int regno
, endregno
;
6220 code
= GET_CODE (x
);
6227 /* If this is a pseudo, a hard register must not have been allocated.
6228 X must therefore either be a constant or be in memory. */
6229 if (r
>= FIRST_PSEUDO_REGISTER
)
6231 if (reg_equiv_memory_loc
[r
])
6232 return refers_to_regno_for_reload_p (regno
, endregno
,
6233 reg_equiv_memory_loc
[r
],
6236 if (reg_equiv_constant
[r
])
6242 return (endregno
> r
6243 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6244 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
6248 /* If this is a SUBREG of a hard reg, we can see exactly which
6249 registers are being modified. Otherwise, handle normally. */
6250 if (GET_CODE (SUBREG_REG (x
)) == REG
6251 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6253 unsigned int inner_regno
= subreg_regno (x
);
6254 unsigned int inner_endregno
6255 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6256 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6258 return endregno
> inner_regno
&& regno
< inner_endregno
;
6264 if (&SET_DEST (x
) != loc
6265 /* Note setting a SUBREG counts as referring to the REG it is in for
6266 a pseudo but not for hard registers since we can
6267 treat each word individually. */
6268 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6269 && loc
!= &SUBREG_REG (SET_DEST (x
))
6270 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
6271 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6272 && refers_to_regno_for_reload_p (regno
, endregno
,
6273 SUBREG_REG (SET_DEST (x
)),
6275 /* If the output is an earlyclobber operand, this is
6277 || ((GET_CODE (SET_DEST (x
)) != REG
6278 || earlyclobber_operand_p (SET_DEST (x
)))
6279 && refers_to_regno_for_reload_p (regno
, endregno
,
6280 SET_DEST (x
), loc
))))
6283 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6292 /* X does not match, so try its subexpressions. */
6294 fmt
= GET_RTX_FORMAT (code
);
6295 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6297 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6305 if (refers_to_regno_for_reload_p (regno
, endregno
,
6309 else if (fmt
[i
] == 'E')
6312 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6313 if (loc
!= &XVECEXP (x
, i
, j
)
6314 && refers_to_regno_for_reload_p (regno
, endregno
,
6315 XVECEXP (x
, i
, j
), loc
))
6322 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6323 we check if any register number in X conflicts with the relevant register
6324 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6325 contains a MEM (we don't bother checking for memory addresses that can't
6326 conflict because we expect this to be a rare case.
6328 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6329 that we look at equivalences for pseudos that didn't get hard registers. */
6332 reg_overlap_mentioned_for_reload_p (x
, in
)
6335 int regno
, endregno
;
6337 /* Overly conservative. */
6338 if (GET_CODE (x
) == STRICT_LOW_PART
6339 || GET_RTX_CLASS (GET_CODE (x
)) == 'a')
6342 /* If either argument is a constant, then modifying X can not affect IN. */
6343 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6345 else if (GET_CODE (x
) == SUBREG
)
6347 regno
= REGNO (SUBREG_REG (x
));
6348 if (regno
< FIRST_PSEUDO_REGISTER
)
6349 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6350 GET_MODE (SUBREG_REG (x
)),
6354 else if (GET_CODE (x
) == REG
)
6358 /* If this is a pseudo, it must not have been assigned a hard register.
6359 Therefore, it must either be in memory or be a constant. */
6361 if (regno
>= FIRST_PSEUDO_REGISTER
)
6363 if (reg_equiv_memory_loc
[regno
])
6364 return refers_to_mem_for_reload_p (in
);
6365 else if (reg_equiv_constant
[regno
])
6370 else if (GET_CODE (x
) == MEM
)
6371 return refers_to_mem_for_reload_p (in
);
6372 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6373 || GET_CODE (x
) == CC0
)
6374 return reg_mentioned_p (x
, in
);
6375 else if (GET_CODE (x
) == PLUS
)
6376 return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6377 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6381 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6382 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
6384 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6387 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6391 refers_to_mem_for_reload_p (x
)
6397 if (GET_CODE (x
) == MEM
)
6400 if (GET_CODE (x
) == REG
)
6401 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6402 && reg_equiv_memory_loc
[REGNO (x
)]);
6404 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6405 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6407 && (GET_CODE (XEXP (x
, i
)) == MEM
6408 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6414 /* Check the insns before INSN to see if there is a suitable register
6415 containing the same value as GOAL.
6416 If OTHER is -1, look for a register in class CLASS.
6417 Otherwise, just see if register number OTHER shares GOAL's value.
6419 Return an rtx for the register found, or zero if none is found.
6421 If RELOAD_REG_P is (short *)1,
6422 we reject any hard reg that appears in reload_reg_rtx
6423 because such a hard reg is also needed coming into this insn.
6425 If RELOAD_REG_P is any other nonzero value,
6426 it is a vector indexed by hard reg number
6427 and we reject any hard reg whose element in the vector is nonnegative
6428 as well as any that appears in reload_reg_rtx.
6430 If GOAL is zero, then GOALREG is a register number; we look
6431 for an equivalent for that register.
6433 MODE is the machine mode of the value we want an equivalence for.
6434 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6436 This function is used by jump.c as well as in the reload pass.
6438 If GOAL is the sum of the stack pointer and a constant, we treat it
6439 as if it were a constant except that sp is required to be unchanging. */
6442 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6445 enum reg_class
class;
6447 short *reload_reg_p
;
6449 enum machine_mode mode
;
6452 rtx goaltry
, valtry
, value
, where
;
6458 int goal_mem_addr_varies
= 0;
6459 int need_stable_sp
= 0;
6465 else if (GET_CODE (goal
) == REG
)
6466 regno
= REGNO (goal
);
6467 else if (GET_CODE (goal
) == MEM
)
6469 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6470 if (MEM_VOLATILE_P (goal
))
6472 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6474 /* An address with side effects must be reexecuted. */
6489 else if (CONSTANT_P (goal
))
6491 else if (GET_CODE (goal
) == PLUS
6492 && XEXP (goal
, 0) == stack_pointer_rtx
6493 && CONSTANT_P (XEXP (goal
, 1)))
6494 goal_const
= need_stable_sp
= 1;
6495 else if (GET_CODE (goal
) == PLUS
6496 && XEXP (goal
, 0) == frame_pointer_rtx
6497 && CONSTANT_P (XEXP (goal
, 1)))
6502 /* Scan insns back from INSN, looking for one that copies
6503 a value into or out of GOAL.
6504 Stop and give up if we reach a label. */
6509 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6512 if (GET_CODE (p
) == INSN
6513 /* If we don't want spill regs ... */
6514 && (! (reload_reg_p
!= 0
6515 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6516 /* ... then ignore insns introduced by reload; they aren't
6517 useful and can cause results in reload_as_needed to be
6518 different from what they were when calculating the need for
6519 spills. If we notice an input-reload insn here, we will
6520 reject it below, but it might hide a usable equivalent.
6521 That makes bad code. It may even abort: perhaps no reg was
6522 spilled for this insn because it was assumed we would find
6524 || INSN_UID (p
) < reload_first_uid
))
6527 pat
= single_set (p
);
6529 /* First check for something that sets some reg equal to GOAL. */
6532 && true_regnum (SET_SRC (pat
)) == regno
6533 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6536 && true_regnum (SET_DEST (pat
)) == regno
6537 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6539 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6540 /* When looking for stack pointer + const,
6541 make sure we don't use a stack adjust. */
6542 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6543 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6545 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6546 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6548 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6549 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6550 /* If we are looking for a constant,
6551 and something equivalent to that constant was copied
6552 into a reg, we can use that reg. */
6553 || (goal_const
&& REG_NOTES (p
) != 0
6554 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6555 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6557 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6558 || (GET_CODE (SET_DEST (pat
)) == REG
6559 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6560 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6562 && GET_CODE (goal
) == CONST_INT
6564 = operand_subword (XEXP (tem
, 0), 0, 0,
6566 && rtx_equal_p (goal
, goaltry
)
6568 = operand_subword (SET_DEST (pat
), 0, 0,
6570 && (valueno
= true_regnum (valtry
)) >= 0)))
6571 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6573 && GET_CODE (SET_DEST (pat
)) == REG
6574 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6575 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6577 && GET_CODE (goal
) == CONST_INT
6578 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6580 && rtx_equal_p (goal
, goaltry
)
6582 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6583 && (valueno
= true_regnum (valtry
)) >= 0)))
6587 if (valueno
!= other
)
6590 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6596 for (i
= HARD_REGNO_NREGS (valueno
, mode
) - 1; i
>= 0; i
--)
6597 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6610 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6611 (or copying VALUE into GOAL, if GOAL is also a register).
6612 Now verify that VALUE is really valid. */
6614 /* VALUENO is the register number of VALUE; a hard register. */
6616 /* Don't try to re-use something that is killed in this insn. We want
6617 to be able to trust REG_UNUSED notes. */
6618 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6621 /* If we propose to get the value from the stack pointer or if GOAL is
6622 a MEM based on the stack pointer, we need a stable SP. */
6623 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6624 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6628 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6629 if (GET_MODE (value
) != mode
)
6632 /* Reject VALUE if it was loaded from GOAL
6633 and is also a register that appears in the address of GOAL. */
6635 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6636 && refers_to_regno_for_reload_p (valueno
,
6638 + HARD_REGNO_NREGS (valueno
, mode
)),
6642 /* Reject registers that overlap GOAL. */
6644 if (!goal_mem
&& !goal_const
6645 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6646 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6649 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6650 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6652 /* Reject VALUE if it is one of the regs reserved for reloads.
6653 Reload1 knows how to reuse them anyway, and it would get
6654 confused if we allocated one without its knowledge.
6655 (Now that insns introduced by reload are ignored above,
6656 this case shouldn't happen, but I'm not positive.) */
6658 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6661 for (i
= 0; i
< valuenregs
; ++i
)
6662 if (reload_reg_p
[valueno
+ i
] >= 0)
6666 /* Reject VALUE if it is a register being used for an input reload
6667 even if it is not one of those reserved. */
6669 if (reload_reg_p
!= 0)
6672 for (i
= 0; i
< n_reloads
; i
++)
6673 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6675 int regno1
= REGNO (rld
[i
].reg_rtx
);
6676 int nregs1
= HARD_REGNO_NREGS (regno1
,
6677 GET_MODE (rld
[i
].reg_rtx
));
6678 if (regno1
< valueno
+ valuenregs
6679 && regno1
+ nregs1
> valueno
)
6685 /* We must treat frame pointer as varying here,
6686 since it can vary--in a nonlocal goto as generated by expand_goto. */
6687 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6689 /* Now verify that the values of GOAL and VALUE remain unaltered
6690 until INSN is reached. */
6699 /* Don't trust the conversion past a function call
6700 if either of the two is in a call-clobbered register, or memory. */
6701 if (GET_CODE (p
) == CALL_INSN
)
6705 if (goal_mem
|| need_stable_sp
)
6708 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6709 for (i
= 0; i
< nregs
; ++i
)
6710 if (call_used_regs
[regno
+ i
])
6713 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6714 for (i
= 0; i
< valuenregs
; ++i
)
6715 if (call_used_regs
[valueno
+ i
])
6717 #ifdef NON_SAVING_SETJMP
6718 if (NON_SAVING_SETJMP
&& find_reg_note (p
, REG_SETJMP
, NULL
))
6727 /* Watch out for unspec_volatile, and volatile asms. */
6728 if (volatile_insn_p (pat
))
6731 /* If this insn P stores in either GOAL or VALUE, return 0.
6732 If GOAL is a memory ref and this insn writes memory, return 0.
6733 If GOAL is a memory ref and its address is not constant,
6734 and this insn P changes a register used in GOAL, return 0. */
6736 if (GET_CODE (pat
) == COND_EXEC
)
6737 pat
= COND_EXEC_CODE (pat
);
6738 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6740 rtx dest
= SET_DEST (pat
);
6741 while (GET_CODE (dest
) == SUBREG
6742 || GET_CODE (dest
) == ZERO_EXTRACT
6743 || GET_CODE (dest
) == SIGN_EXTRACT
6744 || GET_CODE (dest
) == STRICT_LOW_PART
)
6745 dest
= XEXP (dest
, 0);
6746 if (GET_CODE (dest
) == REG
)
6748 int xregno
= REGNO (dest
);
6750 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6751 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6754 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6756 if (xregno
< valueno
+ valuenregs
6757 && xregno
+ xnregs
> valueno
)
6759 if (goal_mem_addr_varies
6760 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6762 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6765 else if (goal_mem
&& GET_CODE (dest
) == MEM
6766 && ! push_operand (dest
, GET_MODE (dest
)))
6768 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6769 && reg_equiv_memory_loc
[regno
] != 0)
6771 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6774 else if (GET_CODE (pat
) == PARALLEL
)
6777 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6779 rtx v1
= XVECEXP (pat
, 0, i
);
6780 if (GET_CODE (v1
) == COND_EXEC
)
6781 v1
= COND_EXEC_CODE (v1
);
6782 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6784 rtx dest
= SET_DEST (v1
);
6785 while (GET_CODE (dest
) == SUBREG
6786 || GET_CODE (dest
) == ZERO_EXTRACT
6787 || GET_CODE (dest
) == SIGN_EXTRACT
6788 || GET_CODE (dest
) == STRICT_LOW_PART
)
6789 dest
= XEXP (dest
, 0);
6790 if (GET_CODE (dest
) == REG
)
6792 int xregno
= REGNO (dest
);
6794 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6795 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6798 if (xregno
< regno
+ nregs
6799 && xregno
+ xnregs
> regno
)
6801 if (xregno
< valueno
+ valuenregs
6802 && xregno
+ xnregs
> valueno
)
6804 if (goal_mem_addr_varies
6805 && reg_overlap_mentioned_for_reload_p (dest
,
6808 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6811 else if (goal_mem
&& GET_CODE (dest
) == MEM
6812 && ! push_operand (dest
, GET_MODE (dest
)))
6814 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6815 && reg_equiv_memory_loc
[regno
] != 0)
6817 else if (need_stable_sp
6818 && push_operand (dest
, GET_MODE (dest
)))
6824 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6828 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6829 link
= XEXP (link
, 1))
6831 pat
= XEXP (link
, 0);
6832 if (GET_CODE (pat
) == CLOBBER
)
6834 rtx dest
= SET_DEST (pat
);
6836 if (GET_CODE (dest
) == REG
)
6838 int xregno
= REGNO (dest
);
6840 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6842 if (xregno
< regno
+ nregs
6843 && xregno
+ xnregs
> regno
)
6845 else if (xregno
< valueno
+ valuenregs
6846 && xregno
+ xnregs
> valueno
)
6848 else if (goal_mem_addr_varies
6849 && reg_overlap_mentioned_for_reload_p (dest
,
6854 else if (goal_mem
&& GET_CODE (dest
) == MEM
6855 && ! push_operand (dest
, GET_MODE (dest
)))
6857 else if (need_stable_sp
6858 && push_operand (dest
, GET_MODE (dest
)))
6865 /* If this insn auto-increments or auto-decrements
6866 either regno or valueno, return 0 now.
6867 If GOAL is a memory ref and its address is not constant,
6868 and this insn P increments a register used in GOAL, return 0. */
6872 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6873 if (REG_NOTE_KIND (link
) == REG_INC
6874 && GET_CODE (XEXP (link
, 0)) == REG
)
6876 int incno
= REGNO (XEXP (link
, 0));
6877 if (incno
< regno
+ nregs
&& incno
>= regno
)
6879 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6881 if (goal_mem_addr_varies
6882 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6892 /* Find a place where INCED appears in an increment or decrement operator
6893 within X, and return the amount INCED is incremented or decremented by.
6894 The value is always positive. */
6897 find_inc_amount (x
, inced
)
6900 enum rtx_code code
= GET_CODE (x
);
6906 rtx addr
= XEXP (x
, 0);
6907 if ((GET_CODE (addr
) == PRE_DEC
6908 || GET_CODE (addr
) == POST_DEC
6909 || GET_CODE (addr
) == PRE_INC
6910 || GET_CODE (addr
) == POST_INC
)
6911 && XEXP (addr
, 0) == inced
)
6912 return GET_MODE_SIZE (GET_MODE (x
));
6913 else if ((GET_CODE (addr
) == PRE_MODIFY
6914 || GET_CODE (addr
) == POST_MODIFY
)
6915 && GET_CODE (XEXP (addr
, 1)) == PLUS
6916 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6917 && XEXP (addr
, 0) == inced
6918 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6920 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6921 return i
< 0 ? -i
: i
;
6925 fmt
= GET_RTX_FORMAT (code
);
6926 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6930 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6937 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6939 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6949 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6950 If SETS is nonzero, also consider SETs. */
6953 regno_clobbered_p (regno
, insn
, mode
, sets
)
6956 enum machine_mode mode
;
6959 unsigned int nregs
= HARD_REGNO_NREGS (regno
, mode
);
6960 unsigned int endregno
= regno
+ nregs
;
6962 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
6963 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6964 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6966 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
6968 return test
>= regno
&& test
< endregno
;
6971 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6973 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6977 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6978 if ((GET_CODE (elt
) == CLOBBER
6979 || (sets
&& GET_CODE (PATTERN (insn
)) == SET
))
6980 && GET_CODE (XEXP (elt
, 0)) == REG
)
6982 unsigned int test
= REGNO (XEXP (elt
, 0));
6984 if (test
>= regno
&& test
< endregno
)
6993 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
6995 reload_adjust_reg_for_mode (reloadreg
, mode
)
6997 enum machine_mode mode
;
7001 if (GET_MODE (reloadreg
) == mode
)
7004 regno
= REGNO (reloadreg
);
7006 if (WORDS_BIG_ENDIAN
)
7007 regno
+= HARD_REGNO_NREGS (regno
, GET_MODE (reloadreg
))
7008 - HARD_REGNO_NREGS (regno
, mode
);
7010 return gen_rtx_REG (mode
, regno
);
7013 static const char *const reload_when_needed_name
[] =
7016 "RELOAD_FOR_OUTPUT",
7018 "RELOAD_FOR_INPUT_ADDRESS",
7019 "RELOAD_FOR_INPADDR_ADDRESS",
7020 "RELOAD_FOR_OUTPUT_ADDRESS",
7021 "RELOAD_FOR_OUTADDR_ADDRESS",
7022 "RELOAD_FOR_OPERAND_ADDRESS",
7023 "RELOAD_FOR_OPADDR_ADDR",
7025 "RELOAD_FOR_OTHER_ADDRESS"
7028 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
7030 /* These functions are used to print the variables set by 'find_reloads' */
7033 debug_reload_to_stream (f
)
7041 for (r
= 0; r
< n_reloads
; r
++)
7043 fprintf (f
, "Reload %d: ", r
);
7047 fprintf (f
, "reload_in (%s) = ",
7048 GET_MODE_NAME (rld
[r
].inmode
));
7049 print_inline_rtx (f
, rld
[r
].in
, 24);
7050 fprintf (f
, "\n\t");
7053 if (rld
[r
].out
!= 0)
7055 fprintf (f
, "reload_out (%s) = ",
7056 GET_MODE_NAME (rld
[r
].outmode
));
7057 print_inline_rtx (f
, rld
[r
].out
, 24);
7058 fprintf (f
, "\n\t");
7061 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
7063 fprintf (f
, "%s (opnum = %d)",
7064 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7067 if (rld
[r
].optional
)
7068 fprintf (f
, ", optional");
7070 if (rld
[r
].nongroup
)
7071 fprintf (f
, ", nongroup");
7073 if (rld
[r
].inc
!= 0)
7074 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7076 if (rld
[r
].nocombine
)
7077 fprintf (f
, ", can't combine");
7079 if (rld
[r
].secondary_p
)
7080 fprintf (f
, ", secondary_reload_p");
7082 if (rld
[r
].in_reg
!= 0)
7084 fprintf (f
, "\n\treload_in_reg: ");
7085 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7088 if (rld
[r
].out_reg
!= 0)
7090 fprintf (f
, "\n\treload_out_reg: ");
7091 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7094 if (rld
[r
].reg_rtx
!= 0)
7096 fprintf (f
, "\n\treload_reg_rtx: ");
7097 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7101 if (rld
[r
].secondary_in_reload
!= -1)
7103 fprintf (f
, "%ssecondary_in_reload = %d",
7104 prefix
, rld
[r
].secondary_in_reload
);
7108 if (rld
[r
].secondary_out_reload
!= -1)
7109 fprintf (f
, "%ssecondary_out_reload = %d\n",
7110 prefix
, rld
[r
].secondary_out_reload
);
7113 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7115 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7116 insn_data
[rld
[r
].secondary_in_icode
].name
);
7120 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7121 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7122 insn_data
[rld
[r
].secondary_out_icode
].name
);
7131 debug_reload_to_stream (stderr
);